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Searched refs:dev_priv (Results 1 – 177 of 177) sorted by relevance

/linux-4.1.27/drivers/gpu/drm/radeon/
Dradeon_cp.c61 static void radeon_do_cp_start(drm_radeon_private_t * dev_priv);
63 u32 radeon_read_ring_rptr(drm_radeon_private_t *dev_priv, u32 off) in radeon_read_ring_rptr() argument
67 if (dev_priv->flags & RADEON_IS_AGP) { in radeon_read_ring_rptr()
68 val = DRM_READ32(dev_priv->ring_rptr, off); in radeon_read_ring_rptr()
71 dev_priv->ring_rptr->handle) + in radeon_read_ring_rptr()
78 u32 radeon_get_ring_head(drm_radeon_private_t *dev_priv) in radeon_get_ring_head() argument
80 if (dev_priv->writeback_works) in radeon_get_ring_head()
81 return radeon_read_ring_rptr(dev_priv, 0); in radeon_get_ring_head()
83 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600) in radeon_get_ring_head()
90 void radeon_write_ring_rptr(drm_radeon_private_t *dev_priv, u32 off, u32 val) in radeon_write_ring_rptr() argument
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Dr600_cp.c102 static int r600_do_wait_for_fifo(drm_radeon_private_t *dev_priv, int entries) in r600_do_wait_for_fifo() argument
106 dev_priv->stats.boxes |= RADEON_BOX_WAIT_IDLE; in r600_do_wait_for_fifo()
108 for (i = 0; i < dev_priv->usec_timeout; i++) { in r600_do_wait_for_fifo()
110 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RV770) in r600_do_wait_for_fifo()
127 static int r600_do_wait_for_idle(drm_radeon_private_t *dev_priv) in r600_do_wait_for_idle() argument
131 dev_priv->stats.boxes |= RADEON_BOX_WAIT_IDLE; in r600_do_wait_for_idle()
133 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RV770) in r600_do_wait_for_idle()
134 ret = r600_do_wait_for_fifo(dev_priv, 8); in r600_do_wait_for_idle()
136 ret = r600_do_wait_for_fifo(dev_priv, 16); in r600_do_wait_for_idle()
139 for (i = 0; i < dev_priv->usec_timeout; i++) { in r600_do_wait_for_idle()
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Dradeon_irq.c41 drm_radeon_private_t *dev_priv = dev->dev_private; in radeon_irq_set_state() local
44 dev_priv->irq_enable_reg |= mask; in radeon_irq_set_state()
46 dev_priv->irq_enable_reg &= ~mask; in radeon_irq_set_state()
49 RADEON_WRITE(RADEON_GEN_INT_CNTL, dev_priv->irq_enable_reg); in radeon_irq_set_state()
54 drm_radeon_private_t *dev_priv = dev->dev_private; in r500_vbl_irq_set_state() local
57 dev_priv->r500_disp_irq_reg |= mask; in r500_vbl_irq_set_state()
59 dev_priv->r500_disp_irq_reg &= ~mask; in r500_vbl_irq_set_state()
62 RADEON_WRITE(R500_DxMODE_INT_MASK, dev_priv->r500_disp_irq_reg); in r500_vbl_irq_set_state()
67 drm_radeon_private_t *dev_priv = dev->dev_private; in radeon_enable_vblank() local
69 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600) { in radeon_enable_vblank()
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Dr600_blit.c77 set_render_target(drm_radeon_private_t *dev_priv, int format, int w, int h, u64 gpu_addr) in set_render_target() argument
92 if (((dev_priv->flags & RADEON_FAMILY_MASK) > CHIP_R600) && in set_render_target()
93 ((dev_priv->flags & RADEON_FAMILY_MASK) < CHIP_RV770)) { in set_render_target()
135 cp_set_surface_sync(drm_radeon_private_t *dev_priv, in cp_set_surface_sync() argument
159 drm_radeon_private_t *dev_priv = dev->dev_private; in set_shaders() local
168 vs = (u32 *) ((char *)dev->agp_buffer_map->handle + dev_priv->blit_vb->offset); in set_shaders()
169 ps = (u32 *) ((char *)dev->agp_buffer_map->handle + dev_priv->blit_vb->offset + 256); in set_shaders()
176 dev_priv->blit_vb->used = 512; in set_shaders()
178 gpu_addr = dev_priv->gart_buffers_offset + dev_priv->blit_vb->offset; in set_shaders()
215 cp_set_surface_sync(dev_priv, in set_shaders()
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Dradeon_state.c42 dev_priv, in radeon_check_and_fixup_offset()
47 u32 fb_end = dev_priv->fb_location + dev_priv->fb_size - 1; in radeon_check_and_fixup_offset()
67 if (radeon_check_offset(dev_priv, off)) in radeon_check_and_fixup_offset()
74 if (off < (dev_priv->fb_size + dev_priv->gart_size)) { in radeon_check_and_fixup_offset()
81 off = off - fb_end - 1 + dev_priv->gart_vm_start; in radeon_check_and_fixup_offset()
84 if (radeon_check_offset(dev_priv, off)) { in radeon_check_and_fixup_offset()
93 dev_priv, in radeon_check_and_fixup_packets()
104 if (radeon_check_and_fixup_offset(dev_priv, file_priv, data)) { in radeon_check_and_fixup_packets()
108 dev_priv->have_z_offset = 1; in radeon_check_and_fixup_packets()
115 if (radeon_check_and_fixup_offset(dev_priv, file_priv, data)) { in radeon_check_and_fixup_packets()
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Dr300_cmdbuf.c59 static int r300_emit_cliprects(drm_radeon_private_t *dev_priv, in r300_emit_cliprects() argument
87 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RV515) { in r300_emit_cliprects()
156 dev_priv->track_flush |= RADEON_FLUSH_EMITED; in r300_emit_cliprects()
166 drm_radeon_private_t *dev_priv = dev->dev_private; in r300_init_reg_flags() local
213 if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV530) in r300_init_reg_flags()
259 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RV515) { in r300_init_reg_flags()
295 dev_priv, in r300_emit_carefully_checked_packet0()
322 if (!radeon_check_offset(dev_priv, *value)) { in r300_emit_carefully_checked_packet0()
349 static __inline__ int r300_emit_packet0(drm_radeon_private_t *dev_priv, in r300_emit_packet0() argument
374 return r300_emit_carefully_checked_packet0(dev_priv, cmdbuf, in r300_emit_packet0()
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Dradeon_drv.h341 extern u32 radeon_get_ring_head(drm_radeon_private_t *dev_priv);
342 extern void radeon_set_ring_head(drm_radeon_private_t *dev_priv, u32 val);
344 #define GET_RING_HEAD(dev_priv) radeon_get_ring_head(dev_priv) argument
345 #define SET_RING_HEAD(dev_priv, val) radeon_set_ring_head(dev_priv, val) argument
350 static __inline__ int radeon_check_offset(drm_radeon_private_t *dev_priv, in radeon_check_offset() argument
353 u32 fb_start = dev_priv->fb_location; in radeon_check_offset()
354 u32 fb_end = fb_start + dev_priv->fb_size - 1; in radeon_check_offset()
355 u32 gart_start = dev_priv->gart_vm_start; in radeon_check_offset()
356 u32 gart_end = gart_start + dev_priv->gart_size - 1; in radeon_check_offset()
375 extern u32 radeon_read_fb_location(drm_radeon_private_t *dev_priv);
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Dradeon_mem.c208 static struct mem_block **get_heap(drm_radeon_private_t * dev_priv, int region) in get_heap() argument
212 return &dev_priv->gart_heap; in get_heap()
214 return &dev_priv->fb_heap; in get_heap()
222 drm_radeon_private_t *dev_priv = dev->dev_private; in radeon_mem_alloc() local
226 if (!dev_priv) { in radeon_mem_alloc()
231 heap = get_heap(dev_priv, alloc->region); in radeon_mem_alloc()
257 drm_radeon_private_t *dev_priv = dev->dev_private; in radeon_mem_free() local
261 if (!dev_priv) { in radeon_mem_free()
266 heap = get_heap(dev_priv, memfree->region); in radeon_mem_free()
283 drm_radeon_private_t *dev_priv = dev->dev_private; in radeon_mem_init_heap() local
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Dradeon_drv.c297 drm_radeon_private_t *dev_priv = dev->dev_private; in radeon_suspend() local
299 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600) in radeon_suspend()
303 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600) in radeon_suspend()
311 drm_radeon_private_t *dev_priv = dev->dev_private; in radeon_resume() local
313 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600) in radeon_resume()
317 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RS600) in radeon_resume()
318 RADEON_WRITE(R500_DxMODE_INT_MASK, dev_priv->r500_disp_irq_reg); in radeon_resume()
319 RADEON_WRITE(RADEON_GEN_INT_CNTL, dev_priv->irq_enable_reg); in radeon_resume()
/linux-4.1.27/drivers/gpu/drm/vmwgfx/
Dvmwgfx_irq.c36 struct vmw_private *dev_priv = vmw_priv(dev); in vmw_irq_handler() local
39 spin_lock(&dev_priv->irq_lock); in vmw_irq_handler()
40 status = inl(dev_priv->io_start + VMWGFX_IRQSTATUS_PORT); in vmw_irq_handler()
41 masked_status = status & dev_priv->irq_mask; in vmw_irq_handler()
42 spin_unlock(&dev_priv->irq_lock); in vmw_irq_handler()
45 outl(status, dev_priv->io_start + VMWGFX_IRQSTATUS_PORT); in vmw_irq_handler()
52 vmw_fences_update(dev_priv->fman); in vmw_irq_handler()
53 wake_up_all(&dev_priv->fence_queue); in vmw_irq_handler()
57 wake_up_all(&dev_priv->fifo_queue); in vmw_irq_handler()
63 static bool vmw_fifo_idle(struct vmw_private *dev_priv, uint32_t seqno) in vmw_fifo_idle() argument
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Dvmwgfx_drv.c297 static int vmw_dummy_query_bo_create(struct vmw_private *dev_priv) in vmw_dummy_query_bo_create() argument
310 ret = ttm_bo_create(&dev_priv->bdev, in vmw_dummy_query_bo_create()
338 dev_priv->dummy_query_bo = bo; in vmw_dummy_query_bo_create()
343 static int vmw_request_device(struct vmw_private *dev_priv) in vmw_request_device() argument
347 ret = vmw_fifo_init(dev_priv, &dev_priv->fifo); in vmw_request_device()
352 vmw_fence_fifo_up(dev_priv->fman); in vmw_request_device()
353 if (dev_priv->has_mob) { in vmw_request_device()
354 ret = vmw_otables_setup(dev_priv); in vmw_request_device()
361 ret = vmw_dummy_query_bo_create(dev_priv); in vmw_request_device()
368 if (dev_priv->has_mob) in vmw_request_device()
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Dvmwgfx_fifo.c32 bool vmw_fifo_have_3d(struct vmw_private *dev_priv) in vmw_fifo_have_3d() argument
34 __le32 __iomem *fifo_mem = dev_priv->mmio_virt; in vmw_fifo_have_3d()
36 const struct vmw_fifo_state *fifo = &dev_priv->fifo; in vmw_fifo_have_3d()
38 if (!(dev_priv->capabilities & SVGA_CAP_3D)) in vmw_fifo_have_3d()
41 if (dev_priv->capabilities & SVGA_CAP_GBOBJECTS) { in vmw_fifo_have_3d()
44 if (!dev_priv->has_mob) in vmw_fifo_have_3d()
47 spin_lock(&dev_priv->cap_lock); in vmw_fifo_have_3d()
48 vmw_write(dev_priv, SVGA_REG_DEV_CAP, SVGA3D_DEVCAP_3D); in vmw_fifo_have_3d()
49 result = vmw_read(dev_priv, SVGA_REG_DEV_CAP); in vmw_fifo_have_3d()
50 spin_unlock(&dev_priv->cap_lock); in vmw_fifo_have_3d()
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Dvmwgfx_overlay.c60 struct vmw_private *dev_priv = vmw_priv(dev); in vmw_overlay() local
61 return dev_priv ? dev_priv->overlay_priv : NULL; in vmw_overlay()
96 static int vmw_overlay_send_put(struct vmw_private *dev_priv, in vmw_overlay_send_put() argument
103 bool have_so = dev_priv->sou_priv ? true : false; in vmw_overlay_send_put()
127 cmds = vmw_fifo_reserve(dev_priv, fifo_size); in vmw_overlay_send_put()
174 vmw_fifo_commit(dev_priv, fifo_size); in vmw_overlay_send_put()
185 static int vmw_overlay_send_stop(struct vmw_private *dev_priv, in vmw_overlay_send_stop() argument
197 cmds = vmw_fifo_reserve(dev_priv, sizeof(*cmds)); in vmw_overlay_send_stop()
201 ret = vmw_fallback_wait(dev_priv, false, true, 0, in vmw_overlay_send_stop()
216 vmw_fifo_commit(dev_priv, sizeof(*cmds)); in vmw_overlay_send_stop()
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Dvmwgfx_ldu.c74 static int vmw_ldu_commit_list(struct vmw_private *dev_priv) in vmw_ldu_commit_list() argument
76 struct vmw_legacy_display *lds = dev_priv->ldu_priv; in vmw_ldu_commit_list()
86 if (!(dev_priv->capabilities & SVGA_CAP_DISPLAY_TOPOLOGY)) { in vmw_ldu_commit_list()
99 return vmw_kms_write_svga(dev_priv, w, h, fb->pitches[0], in vmw_ldu_commit_list()
107 vmw_kms_write_svga(dev_priv, fb->width, fb->height, fb->pitches[0], in vmw_ldu_commit_list()
112 vmw_write(dev_priv, SVGA_REG_NUM_GUEST_DISPLAYS, in vmw_ldu_commit_list()
119 vmw_write(dev_priv, SVGA_REG_DISPLAY_ID, i); in vmw_ldu_commit_list()
120 vmw_write(dev_priv, SVGA_REG_DISPLAY_IS_PRIMARY, !i); in vmw_ldu_commit_list()
121 vmw_write(dev_priv, SVGA_REG_DISPLAY_POSITION_X, crtc->x); in vmw_ldu_commit_list()
122 vmw_write(dev_priv, SVGA_REG_DISPLAY_POSITION_Y, crtc->y); in vmw_ldu_commit_list()
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Dvmwgfx_ioctl.c40 struct vmw_private *dev_priv = vmw_priv(dev); in vmw_getparam_ioctl() local
47 param->value = vmw_overlay_num_overlays(dev_priv); in vmw_getparam_ioctl()
50 param->value = vmw_overlay_num_free_overlays(dev_priv); in vmw_getparam_ioctl()
53 param->value = vmw_fifo_have_3d(dev_priv) ? 1 : 0; in vmw_getparam_ioctl()
56 param->value = dev_priv->capabilities; in vmw_getparam_ioctl()
59 param->value = dev_priv->fifo.capabilities; in vmw_getparam_ioctl()
62 param->value = dev_priv->prim_bb_mem; in vmw_getparam_ioctl()
66 __le32 __iomem *fifo_mem = dev_priv->mmio_virt; in vmw_getparam_ioctl()
67 const struct vmw_fifo_state *fifo = &dev_priv->fifo; in vmw_getparam_ioctl()
69 if ((dev_priv->capabilities & SVGA_CAP_GBOBJECTS)) { in vmw_getparam_ioctl()
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Dvmwgfx_scrn.c104 static int vmw_sou_fifo_create(struct vmw_private *dev_priv, in vmw_sou_fifo_create() argument
121 cmd = vmw_fifo_reserve(dev_priv, fifo_size); in vmw_sou_fifo_create()
148 vmw_fifo_commit(dev_priv, fifo_size); in vmw_sou_fifo_create()
158 static int vmw_sou_fifo_destroy(struct vmw_private *dev_priv, in vmw_sou_fifo_destroy() argument
176 cmd = vmw_fifo_reserve(dev_priv, fifo_size); in vmw_sou_fifo_destroy()
187 vmw_fifo_commit(dev_priv, fifo_size); in vmw_sou_fifo_destroy()
190 ret = vmw_fallback_wait(dev_priv, false, true, 0, false, 3*HZ); in vmw_sou_fifo_destroy()
202 static void vmw_sou_backing_free(struct vmw_private *dev_priv, in vmw_sou_backing_free() argument
219 static int vmw_sou_backing_alloc(struct vmw_private *dev_priv, in vmw_sou_backing_alloc() argument
229 vmw_sou_backing_free(dev_priv, sou); in vmw_sou_backing_alloc()
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Dvmwgfx_execbuf.c193 static int vmw_resource_context_res_add(struct vmw_private *dev_priv, in vmw_resource_context_res_add() argument
202 mutex_lock(&dev_priv->binding_mutex); in vmw_resource_context_res_add()
216 mutex_unlock(&dev_priv->binding_mutex); in vmw_resource_context_res_add()
284 static int vmw_cmd_invalid(struct vmw_private *dev_priv, in vmw_cmd_invalid() argument
291 static int vmw_cmd_ok(struct vmw_private *dev_priv, in vmw_cmd_ok() argument
436 static int vmw_cmd_res_reloc_add(struct vmw_private *dev_priv, in vmw_cmd_res_reloc_add() argument
457 if (res_type == vmw_res_context && dev_priv->has_mob && in vmw_cmd_res_reloc_add()
467 ret = vmw_resource_context_res_add(dev_priv, sw_context, res); in vmw_cmd_res_reloc_add()
501 vmw_cmd_res_check(struct vmw_private *dev_priv, in vmw_cmd_res_check() argument
541 ret = vmw_user_resource_lookup_handle(dev_priv, in vmw_cmd_res_check()
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Dvmwgfx_context.c109 struct vmw_private *dev_priv = res->dev_priv; in vmw_hw_context_destroy() local
117 mutex_lock(&dev_priv->cmdbuf_mutex); in vmw_hw_context_destroy()
119 mutex_lock(&dev_priv->binding_mutex); in vmw_hw_context_destroy()
122 mutex_unlock(&dev_priv->binding_mutex); in vmw_hw_context_destroy()
123 if (dev_priv->pinned_bo != NULL && in vmw_hw_context_destroy()
124 !dev_priv->query_cid_valid) in vmw_hw_context_destroy()
125 __vmw_execbuf_release_pinned_bo(dev_priv, NULL); in vmw_hw_context_destroy()
126 mutex_unlock(&dev_priv->cmdbuf_mutex); in vmw_hw_context_destroy()
130 vmw_execbuf_release_pinned_bo(dev_priv); in vmw_hw_context_destroy()
131 cmd = vmw_fifo_reserve(dev_priv, sizeof(*cmd)); in vmw_hw_context_destroy()
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Dvmwgfx_drv.h108 struct vmw_private *dev_priv; member
565 static inline void vmw_write(struct vmw_private *dev_priv, in vmw_write() argument
570 spin_lock_irqsave(&dev_priv->hw_lock, irq_flags); in vmw_write()
571 outl(offset, dev_priv->io_start + VMWGFX_INDEX_PORT); in vmw_write()
572 outl(value, dev_priv->io_start + VMWGFX_VALUE_PORT); in vmw_write()
573 spin_unlock_irqrestore(&dev_priv->hw_lock, irq_flags); in vmw_write()
576 static inline uint32_t vmw_read(struct vmw_private *dev_priv, in vmw_read() argument
582 spin_lock_irqsave(&dev_priv->hw_lock, irq_flags); in vmw_read()
583 outl(offset, dev_priv->io_start + VMWGFX_INDEX_PORT); in vmw_read()
584 val = inl(dev_priv->io_start + VMWGFX_VALUE_PORT); in vmw_read()
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Dvmwgfx_resource.c106 struct vmw_private *dev_priv = res->dev_priv; in vmw_resource_release_id() local
107 struct idr *idr = &dev_priv->res_idr[res->func->res_type]; in vmw_resource_release_id()
109 write_lock(&dev_priv->resource_lock); in vmw_resource_release_id()
113 write_unlock(&dev_priv->resource_lock); in vmw_resource_release_id()
120 struct vmw_private *dev_priv = res->dev_priv; in vmw_resource_release() local
122 struct idr *idr = &dev_priv->res_idr[res->func->res_type]; in vmw_resource_release()
126 write_unlock(&dev_priv->resource_lock); in vmw_resource_release()
147 mutex_lock(&dev_priv->binding_mutex); in vmw_resource_release()
149 mutex_unlock(&dev_priv->binding_mutex); in vmw_resource_release()
158 write_lock(&dev_priv->resource_lock); in vmw_resource_release()
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Dvmwgfx_shader.c95 static int vmw_gb_shader_init(struct vmw_private *dev_priv, in vmw_gb_shader_init() argument
106 ret = vmw_resource_init(dev_priv, res, true, in vmw_gb_shader_init()
132 struct vmw_private *dev_priv = res->dev_priv; in vmw_gb_shader_create() local
154 cmd = vmw_fifo_reserve(dev_priv, sizeof(*cmd)); in vmw_gb_shader_create()
167 vmw_fifo_commit(dev_priv, sizeof(*cmd)); in vmw_gb_shader_create()
168 (void) vmw_3d_resource_inc(dev_priv, false); in vmw_gb_shader_create()
181 struct vmw_private *dev_priv = res->dev_priv; in vmw_gb_shader_bind() local
190 cmd = vmw_fifo_reserve(dev_priv, sizeof(*cmd)); in vmw_gb_shader_bind()
203 vmw_fifo_commit(dev_priv, sizeof(*cmd)); in vmw_gb_shader_bind()
212 struct vmw_private *dev_priv = res->dev_priv; in vmw_gb_shader_unbind() local
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Dvmwgfx_ttm_glue.c34 struct vmw_private *dev_priv; in vmw_mmap() local
42 dev_priv = vmw_priv(file_priv->minor->dev); in vmw_mmap()
43 return ttm_bo_mmap(filp, vma, &dev_priv->bdev); in vmw_mmap()
57 int vmw_ttm_global_init(struct vmw_private *dev_priv) in vmw_ttm_global_init() argument
62 global_ref = &dev_priv->mem_global_ref; in vmw_ttm_global_init()
74 dev_priv->bo_global_ref.mem_glob = in vmw_ttm_global_init()
75 dev_priv->mem_global_ref.object; in vmw_ttm_global_init()
76 global_ref = &dev_priv->bo_global_ref.ref; in vmw_ttm_global_init()
90 drm_global_item_unref(&dev_priv->mem_global_ref); in vmw_ttm_global_init()
94 void vmw_ttm_global_release(struct vmw_private *dev_priv) in vmw_ttm_global_release() argument
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Dvmwgfx_mob.c75 static int vmw_mob_pt_populate(struct vmw_private *dev_priv,
93 static int vmw_setup_otable_base(struct vmw_private *dev_priv, in vmw_setup_otable_base() argument
109 vsgt = vmw_bo_sg_table(dev_priv->otable_bo); in vmw_setup_otable_base()
126 ret = vmw_mob_pt_populate(dev_priv, mob); in vmw_setup_otable_base()
134 cmd = vmw_fifo_reserve(dev_priv, sizeof(*cmd)); in vmw_setup_otable_base()
157 vmw_fifo_commit(dev_priv, sizeof(*cmd)); in vmw_setup_otable_base()
176 static void vmw_takedown_otable_base(struct vmw_private *dev_priv, in vmw_takedown_otable_base() argument
190 cmd = vmw_fifo_reserve(dev_priv, sizeof(*cmd)); in vmw_takedown_otable_base()
203 vmw_fifo_commit(dev_priv, sizeof(*cmd)); in vmw_takedown_otable_base()
231 int vmw_otables_setup(struct vmw_private *dev_priv) in vmw_otables_setup() argument
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Dvmwgfx_surface.c312 struct vmw_private *dev_priv = res->dev_priv; in vmw_hw_surface_destroy() local
323 cmd = vmw_fifo_reserve(dev_priv, vmw_surface_destroy_size()); in vmw_hw_surface_destroy()
331 vmw_fifo_commit(dev_priv, vmw_surface_destroy_size()); in vmw_hw_surface_destroy()
339 mutex_lock(&dev_priv->cmdbuf_mutex); in vmw_hw_surface_destroy()
341 dev_priv->used_memory_size -= res->backup_size; in vmw_hw_surface_destroy()
342 mutex_unlock(&dev_priv->cmdbuf_mutex); in vmw_hw_surface_destroy()
344 vmw_3d_resource_dec(dev_priv, false); in vmw_hw_surface_destroy()
362 struct vmw_private *dev_priv = res->dev_priv; in vmw_legacy_srf_create() local
372 if (unlikely(dev_priv->used_memory_size + res->backup_size >= in vmw_legacy_srf_create()
373 dev_priv->memory_size)) in vmw_legacy_srf_create()
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Dvmwgfx_dmabuf.c50 int vmw_dmabuf_to_placement(struct vmw_private *dev_priv, in vmw_dmabuf_to_placement() argument
58 ret = ttm_write_lock(&dev_priv->reservation_sem, interruptible); in vmw_dmabuf_to_placement()
62 vmw_execbuf_release_pinned_bo(dev_priv); in vmw_dmabuf_to_placement()
73 ttm_write_unlock(&dev_priv->reservation_sem); in vmw_dmabuf_to_placement()
93 int vmw_dmabuf_to_vram_or_gmr(struct vmw_private *dev_priv, in vmw_dmabuf_to_vram_or_gmr() argument
101 ret = ttm_write_lock(&dev_priv->reservation_sem, interruptible); in vmw_dmabuf_to_vram_or_gmr()
106 vmw_execbuf_release_pinned_bo(dev_priv); in vmw_dmabuf_to_vram_or_gmr()
144 ttm_write_unlock(&dev_priv->reservation_sem); in vmw_dmabuf_to_vram_or_gmr()
163 int vmw_dmabuf_to_vram(struct vmw_private *dev_priv, in vmw_dmabuf_to_vram() argument
174 return vmw_dmabuf_to_placement(dev_priv, buf, in vmw_dmabuf_to_vram()
[all …]
Dvmwgfx_gmr.c38 static int vmw_gmr2_bind(struct vmw_private *dev_priv, in vmw_gmr2_bind() argument
54 cmd_orig = cmd = vmw_fifo_reserve(dev_priv, cmd_size); in vmw_gmr2_bind()
101 vmw_fifo_commit(dev_priv, cmd_size); in vmw_gmr2_bind()
106 static void vmw_gmr2_unbind(struct vmw_private *dev_priv, in vmw_gmr2_unbind() argument
113 cmd = vmw_fifo_reserve(dev_priv, define_size); in vmw_gmr2_unbind()
124 vmw_fifo_commit(dev_priv, define_size); in vmw_gmr2_unbind()
128 int vmw_gmr_bind(struct vmw_private *dev_priv, in vmw_gmr_bind() argument
140 if (unlikely(!(dev_priv->capabilities & SVGA_CAP_GMR2))) in vmw_gmr_bind()
143 return vmw_gmr2_bind(dev_priv, &data_iter, num_pages, gmr_id); in vmw_gmr_bind()
147 void vmw_gmr_unbind(struct vmw_private *dev_priv, int gmr_id) in vmw_gmr_unbind() argument
[all …]
Dvmwgfx_kms.c88 int vmw_cursor_update_image(struct vmw_private *dev_priv, in vmw_cursor_update_image() argument
102 cmd = vmw_fifo_reserve(dev_priv, cmd_size); in vmw_cursor_update_image()
119 vmw_fifo_commit(dev_priv, cmd_size); in vmw_cursor_update_image()
124 int vmw_cursor_update_dmabuf(struct vmw_private *dev_priv, in vmw_cursor_update_dmabuf() argument
150 ret = vmw_cursor_update_image(dev_priv, virtual, width, height, in vmw_cursor_update_dmabuf()
161 void vmw_cursor_update_position(struct vmw_private *dev_priv, in vmw_cursor_update_position() argument
164 __le32 __iomem *fifo_mem = dev_priv->mmio_virt; in vmw_cursor_update_position()
177 struct vmw_private *dev_priv = vmw_priv(crtc->dev); in vmw_du_crtc_cursor_set() local
191 drm_modeset_lock_all(dev_priv->dev); in vmw_du_crtc_cursor_set()
202 ret = vmw_user_lookup_handle(dev_priv, tfile, in vmw_du_crtc_cursor_set()
[all …]
Dvmwgfx_buffer.c205 struct vmw_private *dev_priv; member
334 struct device *dev = vmw_tt->dev_priv->dev->dev; in vmw_ttm_unmap_from_dma()
356 struct device *dev = vmw_tt->dev_priv->dev->dev; in vmw_ttm_map_for_dma()
381 struct vmw_private *dev_priv = vmw_tt->dev_priv; in vmw_ttm_map_dma() local
382 struct ttm_mem_global *glob = vmw_mem_glob(dev_priv); in vmw_ttm_map_dma()
393 vsgt->mode = dev_priv->map_mode; in vmw_ttm_map_dma()
399 switch (dev_priv->map_mode) { in vmw_ttm_map_dma()
470 struct vmw_private *dev_priv = vmw_tt->dev_priv; in vmw_ttm_unmap_dma() local
475 switch (dev_priv->map_mode) { in vmw_ttm_unmap_dma()
481 ttm_mem_global_free(vmw_mem_glob(dev_priv), in vmw_ttm_unmap_dma()
[all …]
Dvmwgfx_kms.h63 int vmw_cursor_update_image(struct vmw_private *dev_priv,
66 int vmw_cursor_update_dmabuf(struct vmw_private *dev_priv,
70 void vmw_cursor_update_position(struct vmw_private *dev_priv,
151 int vmw_kms_init_legacy_display_system(struct vmw_private *dev_priv);
152 int vmw_kms_close_legacy_display_system(struct vmw_private *dev_priv);
157 int vmw_kms_init_screen_object_display(struct vmw_private *dev_priv);
158 int vmw_kms_close_screen_object_display(struct vmw_private *dev_priv);
159 int vmw_kms_sou_update_layout(struct vmw_private *dev_priv, unsigned num,
161 bool vmw_kms_screen_object_flippable(struct vmw_private *dev_priv,
163 void vmw_kms_screen_object_update_implicit_fb(struct vmw_private *dev_priv,
Dvmwgfx_fence.c35 struct vmw_private *dev_priv; member
143 struct vmw_private *dev_priv = fman->dev_priv; in vmw_fence_enable_signaling() local
145 __le32 __iomem *fifo_mem = dev_priv->mmio_virt; in vmw_fence_enable_signaling()
150 vmw_fifo_ping_host(dev_priv, SVGA_SYNC_GENERIC); in vmw_fence_enable_signaling()
177 struct vmw_private *dev_priv = fman->dev_priv; in vmw_fence_wait() local
185 vmw_fifo_ping_host(dev_priv, SVGA_SYNC_GENERIC); in vmw_fence_wait()
186 vmw_seqno_waiter_add(dev_priv); in vmw_fence_wait()
224 vmw_seqno_waiter_remove(dev_priv); in vmw_fence_wait()
263 vmw_goal_waiter_remove(fman->dev_priv); in vmw_fence_work_func()
284 struct vmw_fence_manager *vmw_fence_manager_init(struct vmw_private *dev_priv) in vmw_fence_manager_init() argument
[all …]
Dvmwgfx_gmrid_manager.c119 struct vmw_private *dev_priv = in vmw_gmrid_man_init() local
133 gman->max_gmr_ids = dev_priv->max_gmr_ids; in vmw_gmrid_man_init()
134 gman->max_gmr_pages = dev_priv->max_gmr_pages; in vmw_gmrid_man_init()
138 gman->max_gmr_pages = dev_priv->max_mob_pages; in vmw_gmrid_man_init()
Dvmwgfx_cmdbuf_res.c69 struct vmw_private *dev_priv; member
284 vmw_cmdbuf_res_man_create(struct vmw_private *dev_priv) in vmw_cmdbuf_res_man_create() argument
293 man->dev_priv = dev_priv; in vmw_cmdbuf_res_man_create()
Dvmwgfx_marker.c128 int vmw_wait_lag(struct vmw_private *dev_priv, in vmw_wait_lag() argument
138 seqno = atomic_read(&dev_priv->marker_seq); in vmw_wait_lag()
146 ret = vmw_wait_seqno(dev_priv, false, seqno, true, in vmw_wait_lag()
Dvmwgfx_resource_priv.h78 int vmw_resource_init(struct vmw_private *dev_priv, struct vmw_resource *res,
Dvmwgfx_fence.h63 vmw_fence_manager_init(struct vmw_private *dev_priv);
/linux-4.1.27/drivers/gpu/drm/savage/
Dsavage_bci.c38 savage_bci_wait_fifo_shadow(drm_savage_private_t * dev_priv, unsigned int n) in savage_bci_wait_fifo_shadow() argument
40 uint32_t mask = dev_priv->status_used_mask; in savage_bci_wait_fifo_shadow()
41 uint32_t threshold = dev_priv->bci_threshold_hi; in savage_bci_wait_fifo_shadow()
46 if (n > dev_priv->cob_size + SAVAGE_BCI_FIFO_SIZE - threshold) in savage_bci_wait_fifo_shadow()
53 status = dev_priv->status_ptr[0]; in savage_bci_wait_fifo_shadow()
67 savage_bci_wait_fifo_s3d(drm_savage_private_t * dev_priv, unsigned int n) in savage_bci_wait_fifo_s3d() argument
69 uint32_t maxUsed = dev_priv->cob_size + SAVAGE_BCI_FIFO_SIZE - n; in savage_bci_wait_fifo_s3d()
88 savage_bci_wait_fifo_s4(drm_savage_private_t * dev_priv, unsigned int n) in savage_bci_wait_fifo_s4() argument
90 uint32_t maxUsed = dev_priv->cob_size + SAVAGE_BCI_FIFO_SIZE - n; in savage_bci_wait_fifo_s4()
120 savage_bci_wait_event_shadow(drm_savage_private_t * dev_priv, uint16_t e) in savage_bci_wait_event_shadow() argument
[all …]
Dsavage_state.c29 void savage_emit_clip_rect_s3d(drm_savage_private_t * dev_priv, in savage_emit_clip_rect_s3d() argument
32 uint32_t scstart = dev_priv->state.s3d.new_scstart; in savage_emit_clip_rect_s3d()
33 uint32_t scend = dev_priv->state.s3d.new_scend; in savage_emit_clip_rect_s3d()
40 if (scstart != dev_priv->state.s3d.scstart || in savage_emit_clip_rect_s3d()
41 scend != dev_priv->state.s3d.scend) { in savage_emit_clip_rect_s3d()
48 dev_priv->state.s3d.scstart = scstart; in savage_emit_clip_rect_s3d()
49 dev_priv->state.s3d.scend = scend; in savage_emit_clip_rect_s3d()
50 dev_priv->waiting = 1; in savage_emit_clip_rect_s3d()
55 void savage_emit_clip_rect_s4(drm_savage_private_t * dev_priv, in savage_emit_clip_rect_s4() argument
58 uint32_t drawctrl0 = dev_priv->state.s4.new_drawctrl0; in savage_emit_clip_rect_s4()
[all …]
Dsavage_drv.h189 int (*wait_fifo) (struct drm_savage_private * dev_priv, unsigned int n);
190 int (*wait_evnt) (struct drm_savage_private * dev_priv, uint16_t e);
193 void (*emit_clip_rect) (struct drm_savage_private * dev_priv,
195 void (*dma_flush) (struct drm_savage_private * dev_priv);
203 extern uint16_t savage_bci_emit_event(drm_savage_private_t * dev_priv,
206 extern void savage_dma_reset(drm_savage_private_t * dev_priv);
207 extern void savage_dma_wait(drm_savage_private_t * dev_priv, unsigned int page);
208 extern uint32_t *savage_dma_alloc(drm_savage_private_t * dev_priv,
218 extern void savage_emit_clip_rect_s3d(drm_savage_private_t * dev_priv,
220 extern void savage_emit_clip_rect_s4(drm_savage_private_t * dev_priv,
[all …]
/linux-4.1.27/drivers/gpu/drm/via/
Dvia_dma.c60 dev_priv->dma_low += 8; \
68 dev_priv->dma_low += 8; \
71 static void via_cmdbuf_start(drm_via_private_t *dev_priv);
72 static void via_cmdbuf_pause(drm_via_private_t *dev_priv);
73 static void via_cmdbuf_reset(drm_via_private_t *dev_priv);
74 static void via_cmdbuf_rewind(drm_via_private_t *dev_priv);
75 static int via_wait_idle(drm_via_private_t *dev_priv);
76 static void via_pad_cache(drm_via_private_t *dev_priv, int qwords);
82 static uint32_t via_cmdbuf_space(drm_via_private_t *dev_priv) in via_cmdbuf_space() argument
84 uint32_t agp_base = dev_priv->dma_offset + (uint32_t) dev_priv->agpAddr; in via_cmdbuf_space()
[all …]
Dvia_irq.c100 drm_via_private_t *dev_priv = dev->dev_private; in via_get_vblank_counter() local
104 return atomic_read(&dev_priv->vbl_received); in via_get_vblank_counter()
110 drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private; in via_driver_irq_handler() local
114 drm_via_irq_t *cur_irq = dev_priv->via_irqs; in via_driver_irq_handler()
119 atomic_inc(&dev_priv->vbl_received); in via_driver_irq_handler()
120 if (!(atomic_read(&dev_priv->vbl_received) & 0x0F)) { in via_driver_irq_handler()
122 if (dev_priv->last_vblank_valid) { in via_driver_irq_handler()
123 dev_priv->usec_per_vblank = in via_driver_irq_handler()
125 &dev_priv->last_vblank) >> 4; in via_driver_irq_handler()
127 dev_priv->last_vblank = cur_vblank; in via_driver_irq_handler()
[all …]
Dvia_map.c30 drm_via_private_t *dev_priv = dev->dev_private; in via_do_init_map() local
34 dev_priv->sarea = drm_legacy_getsarea(dev); in via_do_init_map()
35 if (!dev_priv->sarea) { in via_do_init_map()
37 dev->dev_private = (void *)dev_priv; in via_do_init_map()
42 dev_priv->fb = drm_legacy_findmap(dev, init->fb_offset); in via_do_init_map()
43 if (!dev_priv->fb) { in via_do_init_map()
45 dev->dev_private = (void *)dev_priv; in via_do_init_map()
49 dev_priv->mmio = drm_legacy_findmap(dev, init->mmio_offset); in via_do_init_map()
50 if (!dev_priv->mmio) { in via_do_init_map()
52 dev->dev_private = (void *)dev_priv; in via_do_init_map()
[all …]
Dvia_mm.c43 drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private; in via_agp_init() local
46 drm_mm_init(&dev_priv->agp_mm, 0, agp->size >> VIA_MM_ALIGN_SHIFT); in via_agp_init()
48 dev_priv->agp_initialized = 1; in via_agp_init()
49 dev_priv->agp_offset = agp->offset; in via_agp_init()
59 drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private; in via_fb_init() local
62 drm_mm_init(&dev_priv->vram_mm, 0, fb->size >> VIA_MM_ALIGN_SHIFT); in via_fb_init()
64 dev_priv->vram_initialized = 1; in via_fb_init()
65 dev_priv->vram_offset = fb->offset; in via_fb_init()
76 drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private; in via_final_context() local
78 via_release_futex(dev_priv, context); in via_final_context()
[all …]
Dvia_video.c32 void via_init_futex(drm_via_private_t *dev_priv) in via_init_futex() argument
39 init_waitqueue_head(&(dev_priv->decoder_queue[i])); in via_init_futex()
40 XVMCLOCKPTR(dev_priv->sarea_priv, i)->lock = 0; in via_init_futex()
44 void via_cleanup_futex(drm_via_private_t *dev_priv) in via_cleanup_futex() argument
48 void via_release_futex(drm_via_private_t *dev_priv, int context) in via_release_futex() argument
53 if (!dev_priv->sarea_priv) in via_release_futex()
57 lock = (volatile int *)XVMCLOCKPTR(dev_priv->sarea_priv, i); in via_release_futex()
61 wake_up(&(dev_priv->decoder_queue[i])); in via_release_futex()
72 drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private; in via_decoder_futex() local
73 drm_via_sarea_t *sAPriv = dev_priv->sarea_priv; in via_decoder_futex()
[all …]
Dvia_verifier.c523 drm_via_private_t *dev_priv = in via_check_prim_list() local
581 if (dev_priv->num_fire_offsets >= in via_check_prim_list()
587 dev_priv->fire_offsets[dev_priv-> in via_check_prim_list()
716 via_parse_header2(drm_via_private_t *dev_priv, uint32_t const **buffer, in via_parse_header2() argument
724 next_fire = dev_priv->fire_offsets[*fire_count]; in via_parse_header2()
731 (*fire_count < dev_priv->num_fire_offsets) && in via_parse_header2()
742 if (++(*fire_count) < dev_priv->num_fire_offsets) in via_parse_header2()
743 next_fire = dev_priv->fire_offsets[*fire_count]; in via_parse_header2()
835 via_parse_header1(drm_via_private_t *dev_priv, uint32_t const **buffer, in via_parse_header1() argument
886 via_parse_vheader5(drm_via_private_t *dev_priv, uint32_t const **buffer, in via_parse_vheader5() argument
[all …]
Dvia_dmablit.c211 drm_via_private_t *dev_priv = (drm_via_private_t *)dev->dev_private; in via_fire_dmablit() local
292 drm_via_private_t *dev_priv = (drm_via_private_t *)dev->dev_private; in via_abort_dmablit() local
300 drm_via_private_t *dev_priv = (drm_via_private_t *)dev->dev_private; in via_dmablit_engine_off() local
317 drm_via_private_t *dev_priv = (drm_via_private_t *)dev->dev_private; in via_dmablit_handler() local
318 drm_via_blitq_t *blitq = dev_priv->blit_queues + engine; in via_dmablit_handler()
433 drm_via_private_t *dev_priv = (drm_via_private_t *)dev->dev_private; in via_dmablit_sync() local
434 drm_via_blitq_t *blitq = dev_priv->blit_queues + engine; in via_dmablit_sync()
545 drm_via_private_t *dev_priv = (drm_via_private_t *)dev->dev_private; in via_init_dmablit() local
551 blitq = dev_priv->blit_queues + i; in via_init_dmablit()
727 drm_via_private_t *dev_priv = (drm_via_private_t *)dev->dev_private; in via_dmablit() local
[all …]
Dvia_drv.h112 #define VIA_BASE ((dev_priv->mmio))
151 extern void via_init_futex(drm_via_private_t *dev_priv);
152 extern void via_cleanup_futex(drm_via_private_t *dev_priv);
153 extern void via_release_futex(drm_via_private_t *dev_priv, int context);
/linux-4.1.27/drivers/gpu/drm/r128/
Dr128_cce.c49 drm_r128_private_t *dev_priv = dev->dev_private; in R128_READ_PLL() local
56 static void r128_status(drm_r128_private_t *dev_priv) in r128_status() argument
77 static int r128_do_pixcache_flush(drm_r128_private_t *dev_priv) in r128_do_pixcache_flush() argument
85 for (i = 0; i < dev_priv->usec_timeout; i++) { in r128_do_pixcache_flush()
97 static int r128_do_wait_for_fifo(drm_r128_private_t *dev_priv, int entries) in r128_do_wait_for_fifo() argument
101 for (i = 0; i < dev_priv->usec_timeout; i++) { in r128_do_wait_for_fifo()
114 static int r128_do_wait_for_idle(drm_r128_private_t *dev_priv) in r128_do_wait_for_idle() argument
118 ret = r128_do_wait_for_fifo(dev_priv, 64); in r128_do_wait_for_idle()
122 for (i = 0; i < dev_priv->usec_timeout; i++) { in r128_do_wait_for_idle()
124 r128_do_pixcache_flush(dev_priv); in r128_do_wait_for_idle()
[all …]
Dr128_state.c39 static void r128_emit_clip_rects(drm_r128_private_t *dev_priv, in r128_emit_clip_rects() argument
82 static __inline__ void r128_emit_core(drm_r128_private_t *dev_priv) in r128_emit_core() argument
84 drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv; in r128_emit_core()
97 static __inline__ void r128_emit_context(drm_r128_private_t *dev_priv) in r128_emit_context() argument
99 drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv; in r128_emit_context()
123 static __inline__ void r128_emit_setup(drm_r128_private_t *dev_priv) in r128_emit_setup() argument
125 drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv; in r128_emit_setup()
139 static __inline__ void r128_emit_masks(drm_r128_private_t *dev_priv) in r128_emit_masks() argument
141 drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv; in r128_emit_masks()
158 static __inline__ void r128_emit_window(drm_r128_private_t *dev_priv) in r128_emit_window() argument
[all …]
Dr128_drv.h59 #define GET_RING_HEAD(dev_priv) R128_READ(R128_PM4_BUFFER_DL_RPTR) argument
152 extern int r128_wait_ring(drm_r128_private_t *dev_priv, int n);
154 extern int r128_do_cce_idle(drm_r128_private_t *dev_priv);
396 #define R128_READ(reg) DRM_READ32(dev_priv->mmio, (reg))
397 #define R128_WRITE(reg, val) DRM_WRITE32(dev_priv->mmio, (reg), (val))
398 #define R128_READ8(reg) DRM_READ8(dev_priv->mmio, (reg))
399 #define R128_WRITE8(reg, val) DRM_WRITE8(dev_priv->mmio, (reg), (val))
416 static __inline__ void r128_update_ring_snapshot(drm_r128_private_t *dev_priv) in r128_update_ring_snapshot() argument
418 drm_r128_ring_buffer_t *ring = &dev_priv->ring; in r128_update_ring_snapshot()
419 ring->space = (GET_RING_HEAD(dev_priv) - ring->tail) * sizeof(u32); in r128_update_ring_snapshot()
[all …]
Dr128_irq.c39 const drm_r128_private_t *dev_priv = dev->dev_private; in r128_get_vblank_counter() local
44 return atomic_read(&dev_priv->vbl_received); in r128_get_vblank_counter()
50 drm_r128_private_t *dev_priv = (drm_r128_private_t *) dev->dev_private; in r128_driver_irq_handler() local
58 atomic_inc(&dev_priv->vbl_received); in r128_driver_irq_handler()
67 drm_r128_private_t *dev_priv = dev->dev_private; in r128_enable_vblank() local
94 drm_r128_private_t *dev_priv = (drm_r128_private_t *) dev->dev_private; in r128_driver_irq_preinstall() local
109 drm_r128_private_t *dev_priv = (drm_r128_private_t *) dev->dev_private; in r128_driver_irq_uninstall() local
110 if (!dev_priv) in r128_driver_irq_uninstall()
/linux-4.1.27/drivers/gpu/drm/mga/
Dmga_dma.c53 int mga_do_wait_for_idle(drm_mga_private_t *dev_priv) in mga_do_wait_for_idle() argument
59 for (i = 0; i < dev_priv->usec_timeout; i++) { in mga_do_wait_for_idle()
75 static int mga_do_dma_reset(drm_mga_private_t *dev_priv) in mga_do_dma_reset() argument
77 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; in mga_do_dma_reset()
78 drm_mga_primary_buffer_t *primary = &dev_priv->prim; in mga_do_dma_reset()
103 void mga_do_dma_flush(drm_mga_private_t *dev_priv) in mga_do_dma_flush() argument
105 drm_mga_primary_buffer_t *primary = &dev_priv->prim; in mga_do_dma_flush()
113 for (i = 0; i < dev_priv->usec_timeout; i++) { in mga_do_dma_flush()
125 tail = primary->tail + dev_priv->primary->offset; in mga_do_dma_flush()
148 DRM_DEBUG(" head = 0x%06lx\n", (unsigned long)(head - dev_priv->primary->offset)); in mga_do_dma_flush()
[all …]
Dmga_state.c43 static void mga_emit_clip_rect(drm_mga_private_t *dev_priv, in mga_emit_clip_rect() argument
46 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; in mga_emit_clip_rect()
48 unsigned int pitch = dev_priv->front_pitch; in mga_emit_clip_rect()
55 if (dev_priv->chipset >= MGA_CARD_TYPE_G400) { in mga_emit_clip_rect()
68 static __inline__ void mga_g200_emit_context(drm_mga_private_t *dev_priv) in mga_g200_emit_context() argument
70 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; in mga_g200_emit_context()
82 MGA_WFLAG, ctx->wflag, MGA_ZORG, dev_priv->depth_offset); in mga_g200_emit_context()
91 static __inline__ void mga_g400_emit_context(drm_mga_private_t *dev_priv) in mga_g400_emit_context() argument
93 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv; in mga_g400_emit_context()
105 MGA_WFLAG, ctx->wflag, MGA_ZORG, dev_priv->depth_offset); in mga_g400_emit_context()
[all …]
Dmga_drv.h173 extern int mga_do_wait_for_idle(drm_mga_private_t *dev_priv);
175 extern void mga_do_dma_flush(drm_mga_private_t *dev_priv);
176 extern void mga_do_dma_wrap_start(drm_mga_private_t *dev_priv);
177 extern void mga_do_dma_wrap_end(drm_mga_private_t *dev_priv);
182 extern int mga_warp_install_microcode(drm_mga_private_t *dev_priv);
183 extern int mga_warp_init(drm_mga_private_t *dev_priv);
200 #define MGA_READ8(reg) DRM_READ8(dev_priv->mmio, (reg))
201 #define MGA_READ(reg) DRM_READ32(dev_priv->mmio, (reg))
202 #define MGA_WRITE8(reg, val) DRM_WRITE8(dev_priv->mmio, (reg), (val))
203 #define MGA_WRITE(reg, val) DRM_WRITE32(dev_priv->mmio, (reg), (val))
[all …]
Dmga_irq.c40 const drm_mga_private_t *const dev_priv = in mga_get_vblank_counter() local
46 return atomic_read(&dev_priv->vbl_received); in mga_get_vblank_counter()
53 drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private; in mga_driver_irq_handler() local
62 atomic_inc(&dev_priv->vbl_received); in mga_driver_irq_handler()
81 atomic_inc(&dev_priv->last_fence_retired); in mga_driver_irq_handler()
82 wake_up(&dev_priv->fence_queue); in mga_driver_irq_handler()
93 drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private; in mga_enable_vblank() local
123 drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private; in mga_driver_fence_wait() local
131 DRM_WAIT_ON(ret, dev_priv->fence_queue, 3 * HZ, in mga_driver_fence_wait()
132 (((cur_fence = atomic_read(&dev_priv->last_fence_retired)) in mga_driver_fence_wait()
[all …]
Dmga_warp.c49 int mga_warp_install_microcode(drm_mga_private_t *dev_priv) in mga_warp_install_microcode() argument
51 unsigned char *vcbase = dev_priv->warp->handle; in mga_warp_install_microcode()
52 unsigned long pcbase = dev_priv->warp->offset; in mga_warp_install_microcode()
61 switch (dev_priv->chipset) { in mga_warp_install_microcode()
104 if (size > dev_priv->warp->size) { in mga_warp_install_microcode()
106 size, dev_priv->warp->size); in mga_warp_install_microcode()
111 memset(dev_priv->warp_pipe_phys, 0, sizeof(dev_priv->warp_pipe_phys)); in mga_warp_install_microcode()
120 dev_priv->warp_pipe_phys[where] = pcbase; in mga_warp_install_microcode()
136 int mga_warp_init(drm_mga_private_t *dev_priv) in mga_warp_init() argument
142 switch (dev_priv->chipset) { in mga_warp_init()
/linux-4.1.27/drivers/gpu/drm/gma500/
Dpsb_drv.c112 struct drm_psb_private *dev_priv = dev->dev_private; in psb_driver_lastclose() local
113 struct psb_fbdev *fbdev = dev_priv->fbdev; in psb_driver_lastclose()
124 struct drm_psb_private *dev_priv = dev->dev_private; in psb_do_init() local
125 struct psb_gtt *pg = &dev_priv->gtt; in psb_do_init()
138 dev_priv->gatt_free_offset = pg->mmu_gatt_start + in psb_do_init()
141 spin_lock_init(&dev_priv->irqmask_lock); in psb_do_init()
142 spin_lock_init(&dev_priv->lock_2d); in psb_do_init()
153 psb_spank(dev_priv); in psb_do_init()
164 struct drm_psb_private *dev_priv = dev->dev_private; in psb_driver_unload() local
168 if (dev_priv) { in psb_driver_unload()
[all …]
Dpsb_irq.c86 psb_enable_pipestat(struct drm_psb_private *dev_priv, int pipe, u32 mask) in psb_enable_pipestat() argument
88 if ((dev_priv->pipestat[pipe] & mask) != mask) { in psb_enable_pipestat()
90 dev_priv->pipestat[pipe] |= mask; in psb_enable_pipestat()
92 if (gma_power_begin(dev_priv->dev, false)) { in psb_enable_pipestat()
97 gma_power_end(dev_priv->dev); in psb_enable_pipestat()
103 psb_disable_pipestat(struct drm_psb_private *dev_priv, int pipe, u32 mask) in psb_disable_pipestat() argument
105 if ((dev_priv->pipestat[pipe] & mask) != 0) { in psb_disable_pipestat()
107 dev_priv->pipestat[pipe] &= ~mask; in psb_disable_pipestat()
108 if (gma_power_begin(dev_priv->dev, false)) { in psb_disable_pipestat()
113 gma_power_end(dev_priv->dev); in psb_disable_pipestat()
[all …]
Dpower.c49 struct drm_psb_private *dev_priv = dev->dev_private; in gma_power_init() local
52 dev_priv->apm_base = dev_priv->apm_reg & 0xffff; in gma_power_init()
53 dev_priv->ospm_base &= 0xffff; in gma_power_init()
55 dev_priv->display_power = true; /* We start active */ in gma_power_init()
56 dev_priv->display_count = 0; /* Currently no users */ in gma_power_init()
57 dev_priv->suspended = false; /* And not suspended */ in gma_power_init()
61 if (dev_priv->ops->init_pm) in gma_power_init()
62 dev_priv->ops->init_pm(dev); in gma_power_init()
85 struct drm_psb_private *dev_priv = dev->dev_private; in gma_suspend_display() local
87 if (dev_priv->suspended) in gma_suspend_display()
[all …]
Dintel_bios.c58 parse_edp(struct drm_psb_private *dev_priv, struct bdb_header *bdb) in parse_edp() argument
67 dev_priv->edp.bpp = 18; in parse_edp()
69 if (dev_priv->edp.support) { in parse_edp()
71 dev_priv->edp.bpp); in parse_edp()
76 panel_type = dev_priv->panel_type; in parse_edp()
79 dev_priv->edp.bpp = 18; in parse_edp()
82 dev_priv->edp.bpp = 24; in parse_edp()
85 dev_priv->edp.bpp = 30; in parse_edp()
93 dev_priv->edp.pps = *edp_pps; in parse_edp()
96 dev_priv->edp.pps.t1_t3, dev_priv->edp.pps.t8, in parse_edp()
[all …]
Dbacklight.c32 struct drm_psb_private *dev_priv = dev->dev_private; in do_gma_backlight_set() local
33 backlight_update_status(dev_priv->backlight_device); in do_gma_backlight_set()
40 struct drm_psb_private *dev_priv = dev->dev_private; in gma_backlight_enable() local
41 dev_priv->backlight_enabled = true; in gma_backlight_enable()
42 if (dev_priv->backlight_device) { in gma_backlight_enable()
43 dev_priv->backlight_device->props.brightness = dev_priv->backlight_level; in gma_backlight_enable()
52 struct drm_psb_private *dev_priv = dev->dev_private; in gma_backlight_disable() local
53 dev_priv->backlight_enabled = false; in gma_backlight_disable()
54 if (dev_priv->backlight_device) { in gma_backlight_disable()
55 dev_priv->backlight_device->props.brightness = 0; in gma_backlight_disable()
[all …]
Dgtt.c67 struct drm_psb_private *dev_priv = dev->dev_private; in psb_gtt_entry() local
70 offset = r->resource.start - dev_priv->gtt_mem->start; in psb_gtt_entry()
72 return dev_priv->gtt_map + (offset >> PAGE_SHIFT); in psb_gtt_entry()
135 struct drm_psb_private *dev_priv = dev->dev_private; in psb_gtt_remove() local
143 pte = psb_gtt_mask_pte(page_to_pfn(dev_priv->scratch_page), in psb_gtt_remove()
248 struct drm_psb_private *dev_priv = dev->dev_private; in psb_gtt_pin() local
249 u32 gpu_base = dev_priv->gtt.gatt_start; in psb_gtt_pin()
251 mutex_lock(&dev_priv->gtt_mutex); in psb_gtt_pin()
262 psb_mmu_insert_pages(psb_mmu_get_default_pd(dev_priv->mmu), in psb_gtt_pin()
268 mutex_unlock(&dev_priv->gtt_mutex); in psb_gtt_pin()
[all …]
Dmid_bios.c34 struct drm_psb_private *dev_priv = dev->dev_private; in mid_get_fuse_settings() local
58 dev_priv->iLVDS_enable = fuse_value & FB_MIPI_DISABLE; in mid_get_fuse_settings()
61 dev_priv->iLVDS_enable ? "LVDS display" : "MIPI display"); in mid_get_fuse_settings()
64 if (dev_priv->iLVDS_enable) { in mid_get_fuse_settings()
65 dev_priv->is_lvds_on = true; in mid_get_fuse_settings()
66 dev_priv->is_mipi_on = false; in mid_get_fuse_settings()
68 dev_priv->is_mipi_on = true; in mid_get_fuse_settings()
69 dev_priv->is_lvds_on = false; in mid_get_fuse_settings()
72 dev_priv->video_device_fuse = fuse_value; in mid_get_fuse_settings()
80 dev_priv->fuse_reg_value = fuse_value; in mid_get_fuse_settings()
[all …]
Dintel_gmbus.c54 #define GMBUS_REG_READ(reg) ioread32(dev_priv->gmbus_reg + (reg))
55 #define GMBUS_REG_WRITE(reg, val) iowrite32((val), dev_priv->gmbus_reg + (reg))
70 struct drm_psb_private *dev_priv; member
77 struct drm_psb_private *dev_priv = dev->dev_private; in gma_intel_i2c_reset() local
81 static void intel_i2c_quirk_set(struct drm_psb_private *dev_priv, bool enable) in intel_i2c_quirk_set() argument
104 struct drm_psb_private *dev_priv = gpio->dev_priv; in get_reserved() local
118 struct drm_psb_private *dev_priv = gpio->dev_priv; in get_clock() local
128 struct drm_psb_private *dev_priv = gpio->dev_priv; in get_data() local
138 struct drm_psb_private *dev_priv = gpio->dev_priv; in set_clock() local
155 struct drm_psb_private *dev_priv = gpio->dev_priv; in set_data() local
[all …]
Dpsb_lid.c28 struct drm_psb_private * dev_priv = (struct drm_psb_private *)data; in psb_lid_timer_func() local
29 struct drm_device *dev = (struct drm_device *)dev_priv->dev; in psb_lid_timer_func()
30 struct timer_list *lid_timer = &dev_priv->lid_timer; in psb_lid_timer_func()
32 u32 __iomem *lid_state = dev_priv->opregion.lid_state; in psb_lid_timer_func()
35 if (readl(lid_state) == dev_priv->lid_last_state) in psb_lid_timer_func()
61 dev_priv->lid_last_state = readl(lid_state); in psb_lid_timer_func()
64 spin_lock_irqsave(&dev_priv->lid_lock, irq_flags); in psb_lid_timer_func()
69 spin_unlock_irqrestore(&dev_priv->lid_lock, irq_flags); in psb_lid_timer_func()
72 void psb_lid_timer_init(struct drm_psb_private *dev_priv) in psb_lid_timer_init() argument
74 struct timer_list *lid_timer = &dev_priv->lid_timer; in psb_lid_timer_init()
[all …]
Dcdv_device.c52 struct drm_psb_private *dev_priv = dev->dev_private; in cdv_output_init() local
58 cdv_intel_crt_init(dev, &dev_priv->mode_dev); in cdv_output_init()
59 cdv_intel_lvds_init(dev, &dev_priv->mode_dev); in cdv_output_init()
63 cdv_hdmi_init(dev, &dev_priv->mode_dev, SDVOB); in cdv_output_init()
65 cdv_intel_dp_init(dev, &dev_priv->mode_dev, DP_B); in cdv_output_init()
69 cdv_hdmi_init(dev, &dev_priv->mode_dev, SDVOC); in cdv_output_init()
71 cdv_intel_dp_init(dev, &dev_priv->mode_dev, DP_C); in cdv_output_init()
158 struct drm_psb_private *dev_priv = dev->dev_private; in cdv_backlight_init() local
173 dev_priv->backlight_device = cdv_backlight_device; in cdv_backlight_init()
174 dev_priv->backlight_enabled = true; in cdv_backlight_init()
[all …]
Dgma_device.c23 struct drm_psb_private *dev_priv = dev->dev_private; in gma_get_core_freq() local
34 dev_priv->core_freq = 100; in gma_get_core_freq()
37 dev_priv->core_freq = 133; in gma_get_core_freq()
40 dev_priv->core_freq = 150; in gma_get_core_freq()
43 dev_priv->core_freq = 178; in gma_get_core_freq()
46 dev_priv->core_freq = 200; in gma_get_core_freq()
51 dev_priv->core_freq = 266; in gma_get_core_freq()
54 dev_priv->core_freq = 0; in gma_get_core_freq()
Dpsb_intel_lvds.c73 struct drm_psb_private *dev_priv = dev->dev_private; in psb_intel_lvds_get_max_backlight() local
80 ret = dev_priv->regs.saveBLC_PWM_CTL; in psb_intel_lvds_get_max_backlight()
89 REG_READ(BLC_PWM_CTL), dev_priv->regs.saveBLC_PWM_CTL); in psb_intel_lvds_get_max_backlight()
102 struct drm_psb_private *dev_priv = in psb_lvds_i2c_set_brightness() local
105 struct psb_intel_i2c_chan *lvds_i2c_bus = dev_priv->lvds_i2c_bus; in psb_lvds_i2c_set_brightness()
122 if (dev_priv->lvds_bl->pol == BLC_POLARITY_INVERSE) in psb_lvds_i2c_set_brightness()
125 out_buf[0] = dev_priv->lvds_bl->brightnesscmd; in psb_lvds_i2c_set_brightness()
130 dev_priv->lvds_bl->brightnesscmd, in psb_lvds_i2c_set_brightness()
142 struct drm_psb_private *dev_priv = in psb_lvds_pwm_set_brightness() local
155 if (dev_priv->lvds_bl->pol == BLC_POLARITY_INVERSE) in psb_lvds_pwm_set_brightness()
[all …]
Doaktrail_lvds.c50 struct drm_psb_private *dev_priv = dev->dev_private; in oaktrail_lvds_set_power() local
61 dev_priv->is_lvds_on = true; in oaktrail_lvds_set_power()
62 if (dev_priv->ops->lvds_bl_power) in oaktrail_lvds_set_power()
63 dev_priv->ops->lvds_bl_power(dev, true); in oaktrail_lvds_set_power()
65 if (dev_priv->ops->lvds_bl_power) in oaktrail_lvds_set_power()
66 dev_priv->ops->lvds_bl_power(dev, false); in oaktrail_lvds_set_power()
72 dev_priv->is_lvds_on = false; in oaktrail_lvds_set_power()
96 struct drm_psb_private *dev_priv = dev->dev_private; in oaktrail_lvds_mode_set() local
97 struct psb_intel_mode_device *mode_dev = &dev_priv->mode_dev; in oaktrail_lvds_mode_set()
119 if (mode_dev->panel_wants_dither || dev_priv->lvds_dither) in oaktrail_lvds_mode_set()
[all …]
Dcdv_intel_lvds.c71 struct drm_psb_private *dev_priv = dev->dev_private; in cdv_intel_lvds_get_max_backlight() local
81 retval = ((dev_priv->regs.saveBLC_PWM_CTL & in cdv_intel_lvds_get_max_backlight()
95 struct drm_psb_private *dev_priv = dev->dev_private;
96 struct psb_intel_i2c_chan *lvds_i2c_bus = dev_priv->lvds_i2c_bus;
113 if (dev_priv->lvds_bl->pol == BLC_POLARITY_INVERSE)
116 out_buf[0] = dev_priv->lvds_bl->brightnesscmd;
129 struct drm_psb_private *dev_priv = dev->dev_private;
141 if (dev_priv->lvds_bl->pol == BLC_POLARITY_INVERSE)
157 struct drm_psb_private *dev_priv = dev->dev_private;
159 if (!dev_priv->lvds_bl) {
[all …]
Doaktrail_device.c36 struct drm_psb_private *dev_priv = dev->dev_private; in oaktrail_output_init() local
37 if (dev_priv->iLVDS_enable) in oaktrail_output_init()
38 oaktrail_lvds_init(dev, &dev_priv->mode_dev); in oaktrail_output_init()
41 if (dev_priv->hdmi_priv) in oaktrail_output_init()
42 oaktrail_hdmi_init(dev, &dev_priv->mode_dev); in oaktrail_output_init()
67 struct drm_psb_private *dev_priv = dev->dev_private; in oaktrail_set_brightness() local
84 blc_pwm_ctl = blc_pwm_ctl * dev_priv->blc_adj1; in oaktrail_set_brightness()
90 blc_pwm_ctl = blc_pwm_ctl * dev_priv->blc_adj2; in oaktrail_set_brightness()
112 struct drm_psb_private *dev_priv = dev->dev_private; in device_backlight_init() local
118 dev_priv->blc_adj1 = BLC_ADJUSTMENT_MAX; in device_backlight_init()
[all …]
Dopregion.c150 struct drm_psb_private *dev_priv = dev->dev_private; in asle_set_backlight() local
151 struct opregion_asle *asle = dev_priv->opregion.asle; in asle_set_backlight()
152 struct backlight_device *bd = dev_priv->backlight_device; in asle_set_backlight()
180 struct drm_psb_private *dev_priv = in psb_intel_opregion_asle_work() local
196 asle_stat |= asle_set_backlight(dev_priv->dev, asle->bclp); in psb_intel_opregion_asle_work()
204 struct drm_psb_private *dev_priv = dev->dev_private; in psb_intel_opregion_asle_intr() local
206 if (dev_priv->opregion.asle) in psb_intel_opregion_asle_intr()
207 schedule_work(&dev_priv->opregion.asle_work); in psb_intel_opregion_asle_intr()
217 struct drm_psb_private *dev_priv = dev->dev_private; in psb_intel_opregion_enable_asle() local
218 struct opregion_asle *asle = dev_priv->opregion.asle; in psb_intel_opregion_enable_asle()
[all …]
Dmdfld_device.c54 struct drm_psb_private *dev_priv = dev->dev_private; in mdfld_set_brightness() local
70 adjusted_level = level * dev_priv->blc_adj2; in mdfld_set_brightness()
72 dev_priv->brightness_adjusted = adjusted_level; in mdfld_set_brightness()
75 if (dev_priv->dpi_panel_on[0] || in mdfld_set_brightness()
76 dev_priv->dpi_panel_on[2]) in mdfld_set_brightness()
78 dev_priv->brightness_adjusted); in mdfld_set_brightness()
80 if (dev_priv->dpi_panel_on[0]) in mdfld_set_brightness()
82 dev_priv->brightness_adjusted); in mdfld_set_brightness()
85 if (dev_priv->dpi_panel_on[2]) in mdfld_set_brightness()
87 dev_priv->brightness_adjusted); in mdfld_set_brightness()
[all …]
Dpsb_device.c33 struct drm_psb_private *dev_priv = dev->dev_private; in psb_output_init() local
34 psb_intel_lvds_init(dev, &dev_priv->mode_dev); in psb_output_init()
70 struct drm_psb_private *dev_priv = dev->dev_private; in psb_backlight_setup() local
79 if (!dev_priv->lvds_bl) { in psb_backlight_setup()
83 bl_max_freq = dev_priv->lvds_bl->freq; in psb_backlight_setup()
86 core_clock = dev_priv->core_freq; in psb_backlight_setup()
125 struct drm_psb_private *dev_priv = dev->dev_private; in psb_backlight_init() local
147 dev_priv->backlight_device = psb_backlight_device; in psb_backlight_init()
150 psb_lid_timer_init(dev_priv); in psb_backlight_init()
164 struct drm_psb_private *dev_priv = dev->dev_private; in psb_init_pm() local
[all …]
Dframebuffer.c118 struct drm_psb_private *dev_priv = dev->dev_private; in psbfb_vm_fault() local
124 unsigned long phys_addr = (unsigned long)dev_priv->stolen_base + in psbfb_vm_fault()
341 struct drm_psb_private *dev_priv = dev->dev_private; in psbfb_create() local
408 memset(dev_priv->vram_addr + backing->offset, 0, size); in psbfb_create()
435 if (dev_priv->ops->accel_2d && pitch_lines > 8) /* 2D engine */ in psbfb_create()
455 info->screen_base = dev_priv->vram_addr + backing->offset; in psbfb_create()
458 if (dev_priv->gtt.stolen_size) { in psbfb_create()
465 info->apertures->ranges[0].size = dev_priv->gtt.stolen_size; in psbfb_create()
546 struct drm_psb_private *dev_priv = dev->dev_private; in psbfb_probe() local
557 dev_priv->vram_stolen_size) { in psbfb_probe()
[all …]
Daccel_2d.c51 void psb_spank(struct drm_psb_private *dev_priv) in psb_spank() argument
72 PSB_WSGX32(dev_priv->gtt.gatt_start, PSB_CR_BIF_TWOD_REQ_BASE); in psb_spank()
83 static int psb_2d_wait_available(struct drm_psb_private *dev_priv, in psb_2d_wait_available() argument
92 psb_spank(dev_priv); in psb_2d_wait_available()
108 static int psbfb_2d_submit(struct drm_psb_private *dev_priv, uint32_t *cmdbuf, in psbfb_2d_submit() argument
116 spin_lock_irqsave(&dev_priv->lock_2d, flags); in psbfb_2d_submit()
120 ret = psb_2d_wait_available(dev_priv, submit_size); in psbfb_2d_submit()
131 spin_unlock_irqrestore(&dev_priv->lock_2d, flags); in psbfb_2d_submit()
172 static int psb_accel_2d_copy(struct drm_psb_private *dev_priv, in psb_accel_2d_copy() argument
229 return psbfb_2d_submit(dev_priv, buffer, buf - buffer); in psb_accel_2d_copy()
[all …]
Dmdfld_output.c36 struct drm_psb_private *dev_priv = dev->dev_private; in mdfld_get_panel_type() local
37 return dev_priv->mdfld_panel_id; in mdfld_get_panel_type()
64 struct drm_psb_private *dev_priv = dev->dev_private; in mdfld_output_init() local
67 dev_priv->mdfld_panel_id = TC35876X; in mdfld_output_init()
69 mdfld_init_panel(dev, 0, dev_priv->mdfld_panel_id); in mdfld_output_init()
Dmdfld_intel_display.c53 struct drm_psb_private *dev_priv = dev->dev_private; in mdfldWaitForPipeDisable() local
54 const struct psb_offset *map = &dev_priv->regmap[pipe]; in mdfldWaitForPipeDisable()
81 struct drm_psb_private *dev_priv = dev->dev_private; in mdfldWaitForPipeEnable() local
82 const struct psb_offset *map = &dev_priv->regmap[pipe]; in mdfldWaitForPipeEnable()
167 struct drm_psb_private *dev_priv = dev->dev_private; in mdfld__intel_pipe_set_base() local
171 const struct psb_offset *map = &dev_priv->regmap[pipe]; in mdfld__intel_pipe_set_base()
240 struct drm_psb_private *dev_priv = dev->dev_private; in mdfld_disable_crtc() local
241 const struct psb_offset *map = &dev_priv->regmap[pipe]; in mdfld_disable_crtc()
307 struct drm_psb_private *dev_priv = dev->dev_private; in mdfld_crtc_dpms() local
310 const struct psb_offset *map = &dev_priv->regmap[pipe]; in mdfld_crtc_dpms()
[all …]
Dpsb_drv.h693 psb_enable_pipestat(struct drm_psb_private *dev_priv, int pipe, u32 mask);
696 psb_disable_pipestat(struct drm_psb_private *dev_priv, int pipe, u32 mask);
708 extern void psb_spank(struct drm_psb_private *dev_priv);
711 extern void psb_lid_timer_init(struct drm_psb_private *dev_priv);
712 extern void psb_lid_timer_takedown(struct drm_psb_private *dev_priv);
713 extern void psb_print_pagefault(struct drm_psb_private *dev_priv);
825 struct drm_psb_private *dev_priv = dev->dev_private; in REGISTER_READ() local
826 return ioread32(dev_priv->vdc_reg + reg); in REGISTER_READ()
831 struct drm_psb_private *dev_priv = dev->dev_private; in REGISTER_READ_AUX() local
832 return ioread32(dev_priv->aux_reg + reg); in REGISTER_READ_AUX()
[all …]
Dpsb_intel_display.c109 struct drm_psb_private *dev_priv = dev->dev_private; in psb_intel_crtc_mode_set() local
113 const struct psb_offset *map = &dev_priv->regmap[pipe]; in psb_intel_crtc_mode_set()
312 struct drm_psb_private *dev_priv = dev->dev_private; in psb_intel_crtc_clock_get() local
314 const struct psb_offset *map = &dev_priv->regmap[pipe]; in psb_intel_crtc_clock_get()
319 struct psb_pipe *p = &dev_priv->regs.pipe[pipe]; in psb_intel_crtc_clock_get()
337 is_lvds = (pipe == 1) && (dev_priv->regs.psb.saveLVDS & in psb_intel_crtc_clock_get()
394 struct drm_psb_private *dev_priv = dev->dev_private; in psb_intel_crtc_mode_get() local
395 struct psb_pipe *p = &dev_priv->regs.pipe[pipe]; in psb_intel_crtc_mode_get()
396 const struct psb_offset *map = &dev_priv->regmap[pipe]; in psb_intel_crtc_mode_get()
464 struct drm_psb_private *dev_priv = dev->dev_private; in psb_intel_cursor_init() local
[all …]
Dcdv_intel_dp.c326 struct cdv_intel_dp *intel_dp = encoder->dev_priv; in cdv_intel_dp_max_lane_count()
344 struct cdv_intel_dp *intel_dp = encoder->dev_priv; in cdv_intel_dp_max_link_bw()
382 struct cdv_intel_dp *intel_dp = intel_encoder->dev_priv; in cdv_intel_edp_panel_vdd_on()
417 struct cdv_intel_dp *intel_dp = intel_encoder->dev_priv; in cdv_intel_edp_panel_on()
445 struct cdv_intel_dp *intel_dp = intel_encoder->dev_priv; in cdv_intel_edp_panel_off()
496 struct cdv_intel_dp *intel_dp = intel_encoder->dev_priv; in cdv_intel_edp_backlight_off()
514 struct cdv_intel_dp *intel_dp = encoder->dev_priv; in cdv_intel_dp_mode_valid()
517 struct drm_psb_private *dev_priv = connector->dev->dev_private; in cdv_intel_dp_mode_valid() local
529 (cdv_intel_dp_link_required(mode->clock, dev_priv->edp.bpp) in cdv_intel_dp_mode_valid()
573 struct cdv_intel_dp *intel_dp = encoder->dev_priv; in cdv_intel_dp_aux_ch()
[all …]
Doaktrail_hdmi.c130 struct drm_psb_private *dev_priv = dev->dev_private; in oaktrail_hdmi_audio_enable() local
131 struct oaktrail_hdmi_dev *hdmi_dev = dev_priv->hdmi_priv; in oaktrail_hdmi_audio_enable()
145 struct drm_psb_private *dev_priv = dev->dev_private; in oaktrail_hdmi_audio_disable() local
146 struct oaktrail_hdmi_dev *hdmi_dev = dev_priv->hdmi_priv; in oaktrail_hdmi_audio_disable()
266 struct drm_psb_private *dev_priv = dev->dev_private; in oaktrail_crtc_hdmi_mode_set() local
267 struct oaktrail_hdmi_dev *hdmi_dev = dev_priv->hdmi_priv; in oaktrail_crtc_hdmi_mode_set()
496 struct drm_psb_private *dev_priv = dev->dev_private; in oaktrail_hdmi_dpms() local
497 struct oaktrail_hdmi_dev *hdmi_dev = dev_priv->hdmi_priv; in oaktrail_hdmi_dpms()
531 struct drm_psb_private *dev_priv = dev->dev_private; in oaktrail_hdmi_detect() local
532 struct oaktrail_hdmi_dev *hdmi_dev = dev_priv->hdmi_priv; in oaktrail_hdmi_detect()
[all …]
Dmdfld_dsi_output.c96 struct drm_psb_private *dev_priv; in mdfld_dsi_brightness_init() local
105 dev_priv = dev->dev_private; in mdfld_dsi_brightness_init()
124 dev_priv->mipi_ctrl_display = gen_ctrl_val; in mdfld_dsi_brightness_init()
135 struct drm_psb_private *dev_priv; in mdfld_dsi_brightness_control() local
147 dev_priv = dev->dev_private; in mdfld_dsi_brightness_control()
150 dsi_config = dev_priv->dsi_configs[1]; in mdfld_dsi_brightness_control()
152 dsi_config = dev_priv->dsi_configs[0]; in mdfld_dsi_brightness_control()
179 gen_ctrl_val = dev_priv->mipi_ctrl_display; in mdfld_dsi_brightness_control()
505 struct drm_psb_private *dev_priv = dev->dev_private; in mdfld_dsi_output_init() local
553 if (pipe && dev_priv->dsi_configs[0]) { in mdfld_dsi_output_init()
[all …]
Dgma_display.c60 struct drm_psb_private *dev_priv = dev->dev_private; in gma_pipe_set_base() local
64 const struct psb_offset *map = &dev_priv->regmap[pipe]; in gma_pipe_set_base()
142 struct drm_psb_private *dev_priv = dev->dev_private; in gma_crtc_load_lut() local
144 const struct psb_offset *map = &dev_priv->regmap[gma_crtc->pipe]; in gma_crtc_load_lut()
166 dev_priv->regs.pipe[0].palette[i] = in gma_crtc_load_lut()
203 struct drm_psb_private *dev_priv = dev->dev_private; in gma_crtc_dpms() local
206 const struct psb_offset *map = &dev_priv->regmap[pipe]; in gma_crtc_dpms()
214 dev_priv->ops->disable_sr(dev); in gma_crtc_dpms()
324 dev_priv->ops->update_wm(dev, crtc); in gma_crtc_dpms()
336 struct drm_psb_private *dev_priv = dev->dev_private; in gma_crtc_cursor_set() local
[all …]
Dcdv_intel_display.c466 struct drm_psb_private *dev_priv = dev->dev_private; in cdv_intel_pipe_enabled() local
469 crtc = dev_priv->pipe_to_crtc_mapping[pipe]; in cdv_intel_pipe_enabled()
500 struct drm_psb_private *dev_priv = dev->dev_private; in cdv_update_wm() local
558 dev_priv->ops->disable_sr(dev); in cdv_update_wm()
585 struct drm_psb_private *dev_priv = dev->dev_private; in cdv_intel_crtc_mode_set() local
588 const struct psb_offset *map = &dev_priv->regmap[pipe]; in cdv_intel_crtc_mode_set()
635 if (dev_priv->dplla_96mhz) in cdv_intel_crtc_mode_set()
656 if (is_lvds && dev_priv->lvds_use_ssc) { in cdv_intel_crtc_mode_set()
657 refclk = dev_priv->lvds_ssc_freq * 1000; in cdv_intel_crtc_mode_set()
658 DRM_DEBUG_KMS("Use SSC reference clock %d Mhz\n", dev_priv->lvds_ssc_freq); in cdv_intel_crtc_mode_set()
[all …]
Dblitter.c23 int gma_blt_wait_idle(struct drm_psb_private *dev_priv) in gma_blt_wait_idle() argument
29 if (IS_CDV(dev_priv->dev)) in gma_blt_wait_idle()
Dcdv_intel_hdmi.c68 struct mid_intel_hdmi_priv *hdmi_priv = gma_encoder->dev_priv; in cdv_hdmi_mode_set()
96 struct mid_intel_hdmi_priv *hdmi_priv = gma_encoder->dev_priv; in cdv_hdmi_dpms()
112 struct mid_intel_hdmi_priv *hdmi_priv = gma_encoder->dev_priv; in cdv_hdmi_save()
121 struct mid_intel_hdmi_priv *hdmi_priv = gma_encoder->dev_priv; in cdv_hdmi_restore()
131 struct mid_intel_hdmi_priv *hdmi_priv = gma_encoder->dev_priv; in cdv_hdmi_detect()
321 gma_encoder->dev_priv = hdmi_priv; in cdv_hdmi_init()
Doaktrail_crtc.c95 struct drm_psb_private *dev_priv = dev->dev_private; in mrst_limit() local
99 switch (dev_priv->core_freq) { in mrst_limit()
225 struct drm_psb_private *dev_priv = dev->dev_private; in oaktrail_crtc_dpms() local
228 const struct psb_offset *map = &dev_priv->regmap[pipe]; in oaktrail_crtc_dpms()
372 struct drm_psb_private *dev_priv = dev->dev_private; in oaktrail_crtc_mode_set() local
374 const struct psb_offset *map = &dev_priv->regmap[pipe]; in oaktrail_crtc_mode_set()
509 refclk = is_sdvo ? 96000 : dev_priv->core_freq * 1000; in oaktrail_crtc_mode_set()
600 struct drm_psb_private *dev_priv = dev->dev_private; in oaktrail_pipe_set_base() local
604 const struct psb_offset *map = &dev_priv->regmap[pipe]; in oaktrail_pipe_set_base()
Dmdfld_dsi_dpi.c119 struct drm_psb_private *dev_priv = dev->dev_private; in dsi_set_pipe_plane_enable_state() local
123 u32 dspcntr = dev_priv->dspcntr[pipe]; in dsi_set_pipe_plane_enable_state()
181 struct drm_psb_private *dev_priv = dev->dev_private; in mdfld_dsi_configure_down() local
183 if (!dev_priv->dpi_panel_on[pipe]) { in mdfld_dsi_configure_down()
202 struct drm_psb_private *dev_priv = dev->dev_private; in mdfld_dsi_configure_up() local
204 if (dev_priv->dpi_panel_on[pipe]) { in mdfld_dsi_configure_up()
642 struct drm_psb_private *dev_priv = dev->dev_private; in mdfld_dsi_dpi_set_power() local
662 dev_priv->dpi_panel_on[pipe] = true; in mdfld_dsi_dpi_set_power()
676 dev_priv->dpi_panel_on[pipe] = false; in mdfld_dsi_dpi_set_power()
822 struct drm_psb_private *dev_priv = dev->dev_private; in mdfld_dsi_dpi_mode_set() local
[all …]
Dpsb_intel_sdvo.c1238 sdvo = iout->dev_priv;
1311 struct drm_psb_private *dev_priv = connector->dev->dev_private; in psb_intel_sdvo_get_analog_edid() local
1314 &dev_priv->gmbus[dev_priv->crt_ddc_pin].adapter); in psb_intel_sdvo_get_analog_edid()
1580 struct drm_psb_private *dev_priv = connector->dev->dev_private; in psb_intel_sdvo_get_lvds_modes() local
1593 if (dev_priv->sdvo_lvds_vbt_mode != NULL) { in psb_intel_sdvo_get_lvds_modes()
1595 dev_priv->sdvo_lvds_vbt_mode); in psb_intel_sdvo_get_lvds_modes()
1664 struct drm_psb_private *dev_priv = connector->dev->dev_private; in psb_intel_sdvo_set_property() local
1673 if (property == dev_priv->force_audio_property) { in psb_intel_sdvo_set_property()
1694 if (property == dev_priv->broadcast_rgb_property) { in psb_intel_sdvo_set_property()
1922 psb_intel_sdvo_select_ddc_bus(struct drm_psb_private *dev_priv, in psb_intel_sdvo_select_ddc_bus() argument
[all …]
Dgem.c182 struct drm_psb_private *dev_priv; in psb_gem_fault() local
186 dev_priv = dev->dev_private; in psb_gem_fault()
212 pfn = (dev_priv->stolen_base + r->offset) >> PAGE_SHIFT; in psb_gem_fault()
Dmdfld_tpo_vid.c33 struct drm_psb_private *dev_priv = dev->dev_private; in tpo_vid_get_config_mode() local
34 struct oaktrail_timing_info *ti = &dev_priv->gct_data.DTD; in tpo_vid_get_config_mode()
Dblitter.h20 extern int gma_blt_wait_idle(struct drm_psb_private *dev_priv);
Doaktrail_lvds_i2c.c137 struct drm_psb_private *dev_priv = dev->dev_private; in oaktrail_lvds_i2c_init() local
145 chan->reg = dev_priv->lpc_gpio_base; in oaktrail_lvds_i2c_init()
Dmdfld_tmd_vid.c36 struct drm_psb_private *dev_priv = dev->dev_private; in tmd_vid_get_config_mode() local
37 struct oaktrail_timing_info *ti = &dev_priv->gct_data.DTD; in tmd_vid_get_config_mode()
Dmmu.c87 struct drm_psb_private *dev_priv = dev->dev_private; in psb_mmu_flush_pd_locked() local
115 struct drm_psb_private *dev_priv = dev->dev_private; in psb_mmu_flush() local
141 struct drm_psb_private *dev_priv = dev->dev_private; in psb_mmu_set_pd_context() local
251 struct drm_psb_private *dev_priv = dev->dev_private; in psb_mmu_free_pagedir() local
441 struct drm_psb_private *dev_priv = dev->dev_private; in psb_mmu_driver_takedown() local
454 struct drm_psb_private *dev_priv = dev->dev_private; in psb_mmu_driver_init() local
Dmdfld_dsi_pkg_sender.c595 struct drm_psb_private *dev_priv = dev->dev_private; in mdfld_dsi_pkg_sender_init() local
596 const struct psb_offset *map = &dev_priv->regmap[pipe]; in mdfld_dsi_pkg_sender_init()
Dpsb_intel_drv.h132 void *dev_priv; /* For sdvo_priv, lvds_priv, etc... */ member
Dtc35876x-dsi-lvds.c529 struct drm_psb_private *dev_priv = dev->dev_private; in tc35876x_toshiba_bridge_panel_on() local
574 tc35876x_brightness_control(dev, dev_priv->brightness_adjusted); in tc35876x_toshiba_bridge_panel_on()
/linux-4.1.27/drivers/gpu/drm/i915/
Di915_irq.c141 static void gen6_rps_irq_handler(struct drm_i915_private *dev_priv, u32 pm_iir);
145 ironlake_enable_display_irq(struct drm_i915_private *dev_priv, u32 mask) in ironlake_enable_display_irq() argument
147 assert_spin_locked(&dev_priv->irq_lock); in ironlake_enable_display_irq()
149 if (WARN_ON(!intel_irqs_enabled(dev_priv))) in ironlake_enable_display_irq()
152 if ((dev_priv->irq_mask & mask) != 0) { in ironlake_enable_display_irq()
153 dev_priv->irq_mask &= ~mask; in ironlake_enable_display_irq()
154 I915_WRITE(DEIMR, dev_priv->irq_mask); in ironlake_enable_display_irq()
160 ironlake_disable_display_irq(struct drm_i915_private *dev_priv, u32 mask) in ironlake_disable_display_irq() argument
162 assert_spin_locked(&dev_priv->irq_lock); in ironlake_disable_display_irq()
164 if (WARN_ON(!intel_irqs_enabled(dev_priv))) in ironlake_disable_display_irq()
[all …]
Dintel_uncore.c67 assert_device_not_suspended(struct drm_i915_private *dev_priv) in assert_device_not_suspended() argument
69 WARN_ONCE(HAS_RUNTIME_PM(dev_priv->dev) && dev_priv->pm.suspended, in assert_device_not_suspended()
127 fw_domains_get(struct drm_i915_private *dev_priv, enum forcewake_domains fw_domains) in fw_domains_get() argument
132 for_each_fw_domain_mask(d, fw_domains, dev_priv, id) { in fw_domains_get()
140 fw_domains_put(struct drm_i915_private *dev_priv, enum forcewake_domains fw_domains) in fw_domains_put() argument
145 for_each_fw_domain_mask(d, fw_domains, dev_priv, id) { in fw_domains_put()
152 fw_domains_posting_read(struct drm_i915_private *dev_priv) in fw_domains_posting_read() argument
158 for_each_fw_domain(d, dev_priv, id) { in fw_domains_posting_read()
165 fw_domains_reset(struct drm_i915_private *dev_priv, enum forcewake_domains fw_domains) in fw_domains_reset() argument
170 if (dev_priv->uncore.fw_domains == 0) in fw_domains_reset()
[all …]
Dintel_fbc.c46 struct drm_i915_private *dev_priv = dev->dev_private; in i8xx_fbc_disable() local
49 dev_priv->fbc.enabled = false; in i8xx_fbc_disable()
71 struct drm_i915_private *dev_priv = dev->dev_private; in i8xx_fbc_enable() local
79 dev_priv->fbc.enabled = true; in i8xx_fbc_enable()
82 cfb_pitch = dev_priv->fbc.uncompressed_size / FBC_LL_SIZE; in i8xx_fbc_enable()
122 struct drm_i915_private *dev_priv = dev->dev_private; in i8xx_fbc_enabled() local
130 struct drm_i915_private *dev_priv = dev->dev_private; in g4x_fbc_enable() local
136 dev_priv->fbc.enabled = true; in g4x_fbc_enable()
155 struct drm_i915_private *dev_priv = dev->dev_private; in g4x_fbc_disable() local
158 dev_priv->fbc.enabled = false; in g4x_fbc_disable()
[all …]
Dintel_fifo_underrun.c53 struct drm_i915_private *dev_priv = dev->dev_private; in ivb_can_enable_err_int() local
57 assert_spin_locked(&dev_priv->irq_lock); in ivb_can_enable_err_int()
59 for_each_pipe(dev_priv, pipe) { in ivb_can_enable_err_int()
60 crtc = to_intel_crtc(dev_priv->pipe_to_crtc_mapping[pipe]); in ivb_can_enable_err_int()
71 struct drm_i915_private *dev_priv = dev->dev_private; in cpt_can_enable_serr_int() local
75 assert_spin_locked(&dev_priv->irq_lock); in cpt_can_enable_serr_int()
77 for_each_pipe(dev_priv, pipe) { in cpt_can_enable_serr_int()
78 crtc = to_intel_crtc(dev_priv->pipe_to_crtc_mapping[pipe]); in cpt_can_enable_serr_int()
95 void i9xx_check_fifo_underruns(struct drm_i915_private *dev_priv) in i9xx_check_fifo_underruns() argument
99 spin_lock_irq(&dev_priv->irq_lock); in i9xx_check_fifo_underruns()
[all …]
Dintel_runtime_pm.c70 static bool hsw_power_well_enabled(struct drm_i915_private *dev_priv, in hsw_power_well_enabled() argument
89 bool __intel_display_power_is_enabled(struct drm_i915_private *dev_priv, in __intel_display_power_is_enabled() argument
97 if (dev_priv->pm.suspended) in __intel_display_power_is_enabled()
100 power_domains = &dev_priv->power_domains; in __intel_display_power_is_enabled()
134 bool intel_display_power_is_enabled(struct drm_i915_private *dev_priv, in intel_display_power_is_enabled() argument
140 power_domains = &dev_priv->power_domains; in intel_display_power_is_enabled()
143 ret = __intel_display_power_is_enabled(dev_priv, domain); in intel_display_power_is_enabled()
159 void intel_display_set_init_power(struct drm_i915_private *dev_priv, in intel_display_set_init_power() argument
162 if (dev_priv->power_domains.init_power_on == enable) in intel_display_set_init_power()
166 intel_display_power_get(dev_priv, POWER_DOMAIN_INIT); in intel_display_set_init_power()
[all …]
Di915_suspend.c34 struct drm_i915_private *dev_priv = dev->dev_private; in i915_save_display() local
38 dev_priv->regfile.saveDSPARB = I915_READ(DSPARB); in i915_save_display()
42 dev_priv->regfile.saveLVDS = I915_READ(PCH_LVDS); in i915_save_display()
44 dev_priv->regfile.saveLVDS = I915_READ(LVDS); in i915_save_display()
48 dev_priv->regfile.savePP_CONTROL = I915_READ(PCH_PP_CONTROL); in i915_save_display()
49 dev_priv->regfile.savePP_ON_DELAYS = I915_READ(PCH_PP_ON_DELAYS); in i915_save_display()
50 dev_priv->regfile.savePP_OFF_DELAYS = I915_READ(PCH_PP_OFF_DELAYS); in i915_save_display()
51 dev_priv->regfile.savePP_DIVISOR = I915_READ(PCH_PP_DIVISOR); in i915_save_display()
53 dev_priv->regfile.savePP_CONTROL = I915_READ(PP_CONTROL); in i915_save_display()
54 dev_priv->regfile.savePP_ON_DELAYS = I915_READ(PP_ON_DELAYS); in i915_save_display()
[all …]
Dintel_sideband.c42 static int vlv_sideband_rw(struct drm_i915_private *dev_priv, u32 devfn, in vlv_sideband_rw() argument
52 WARN_ON(!mutex_is_locked(&dev_priv->dpio_lock)); in vlv_sideband_rw()
78 u32 vlv_punit_read(struct drm_i915_private *dev_priv, u32 addr) in vlv_punit_read() argument
82 WARN_ON(!mutex_is_locked(&dev_priv->rps.hw_lock)); in vlv_punit_read()
84 mutex_lock(&dev_priv->dpio_lock); in vlv_punit_read()
85 vlv_sideband_rw(dev_priv, PCI_DEVFN(0, 0), IOSF_PORT_PUNIT, in vlv_punit_read()
87 mutex_unlock(&dev_priv->dpio_lock); in vlv_punit_read()
92 void vlv_punit_write(struct drm_i915_private *dev_priv, u32 addr, u32 val) in vlv_punit_write() argument
94 WARN_ON(!mutex_is_locked(&dev_priv->rps.hw_lock)); in vlv_punit_write()
96 mutex_lock(&dev_priv->dpio_lock); in vlv_punit_write()
[all …]
Di915_dma.c58 struct drm_i915_private *dev_priv = dev->dev_private; in i915_getparam() local
78 value = dev_priv->num_fence_regs - dev_priv->fence_reg_start; in i915_getparam()
81 value = dev_priv->overlay ? 1 : 0; in i915_getparam()
91 value = intel_ring_initialized(&dev_priv->ring[VCS]); in i915_getparam()
94 value = intel_ring_initialized(&dev_priv->ring[BCS]); in i915_getparam()
97 value = intel_ring_initialized(&dev_priv->ring[VECS]); in i915_getparam()
100 value = intel_ring_initialized(&dev_priv->ring[VCS2]); in i915_getparam()
182 struct drm_i915_private *dev_priv = dev->dev_private; in i915_setparam() local
193 if (param->value > dev_priv->num_fence_regs || in i915_setparam()
197 dev_priv->fence_reg_start = param->value; in i915_setparam()
[all …]
Dintel_pm.c57 struct drm_i915_private *dev_priv = dev->dev_private; in gen9_init_clock_gating() local
66 struct drm_i915_private *dev_priv = dev->dev_private; in skl_init_clock_gating() local
99 struct drm_i915_private *dev_priv = dev->dev_private; in i915_pineview_get_mem_freq() local
106 dev_priv->fsb_freq = 533; /* 133*4 */ in i915_pineview_get_mem_freq()
109 dev_priv->fsb_freq = 800; /* 200*4 */ in i915_pineview_get_mem_freq()
112 dev_priv->fsb_freq = 667; /* 167*4 */ in i915_pineview_get_mem_freq()
115 dev_priv->fsb_freq = 400; /* 100*4 */ in i915_pineview_get_mem_freq()
121 dev_priv->mem_freq = 533; in i915_pineview_get_mem_freq()
124 dev_priv->mem_freq = 667; in i915_pineview_get_mem_freq()
127 dev_priv->mem_freq = 800; in i915_pineview_get_mem_freq()
[all …]
Dintel_frontbuffer.c71 struct drm_i915_private *dev_priv = dev->dev_private; in intel_increase_pllclock() local
78 if (!dev_priv->lvds_downclock_avail) in intel_increase_pllclock()
85 assert_panel_unlocked(dev_priv, pipe); in intel_increase_pllclock()
110 struct drm_i915_private *dev_priv = dev->dev_private; in intel_mark_fb_busy() local
113 for_each_pipe(dev_priv, pipe) { in intel_mark_fb_busy()
138 struct drm_i915_private *dev_priv = dev->dev_private; in intel_fb_obj_invalidate() local
146 mutex_lock(&dev_priv->fb_tracking.lock); in intel_fb_obj_invalidate()
147 dev_priv->fb_tracking.busy_bits in intel_fb_obj_invalidate()
149 dev_priv->fb_tracking.flip_bits in intel_fb_obj_invalidate()
151 mutex_unlock(&dev_priv->fb_tracking.lock); in intel_fb_obj_invalidate()
[all …]
Dintel_bios.c210 parse_lfp_panel_data(struct drm_i915_private *dev_priv, in parse_lfp_panel_data() argument
225 dev_priv->vbt.lvds_dither = lvds_options->pixel_dither; in parse_lfp_panel_data()
240 dev_priv->vbt.drrs_type = STATIC_DRRS_SUPPORT; in parse_lfp_panel_data()
244 dev_priv->vbt.drrs_type = SEAMLESS_DRRS_SUPPORT; in parse_lfp_panel_data()
248 dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED; in parse_lfp_panel_data()
261 dev_priv->vbt.lvds_vbt = 1; in parse_lfp_panel_data()
273 dev_priv->vbt.lfp_lvds_vbt_mode = panel_fixed_mode; in parse_lfp_panel_data()
295 dev_priv->lvds_downclock_avail = 1; in parse_lfp_panel_data()
296 dev_priv->lvds_downclock = downclock * 10; in parse_lfp_panel_data()
309 dev_priv->vbt.bios_lvds_val = fp_timing->lvds_reg_val; in parse_lfp_panel_data()
[all …]
Dintel_i2c.c64 struct drm_i915_private *dev_priv = dev->dev_private; in intel_i2c_reset() local
66 I915_WRITE(dev_priv->gpio_mmio_base + GMBUS0, 0); in intel_i2c_reset()
67 I915_WRITE(dev_priv->gpio_mmio_base + GMBUS4, 0); in intel_i2c_reset()
70 static void intel_i2c_quirk_set(struct drm_i915_private *dev_priv, bool enable) in intel_i2c_quirk_set() argument
75 if (!IS_PINEVIEW(dev_priv->dev)) in intel_i2c_quirk_set()
88 struct drm_i915_private *dev_priv = bus->dev_priv; in get_reserved() local
89 struct drm_device *dev = dev_priv->dev; in get_reserved()
104 struct drm_i915_private *dev_priv = bus->dev_priv; in get_clock() local
114 struct drm_i915_private *dev_priv = bus->dev_priv; in get_data() local
124 struct drm_i915_private *dev_priv = bus->dev_priv; in set_clock() local
[all …]
Di915_gem_stolen.c47 struct drm_i915_private *dev_priv = dev->dev_private; in i915_stolen_to_physical() local
82 { .start = base, .end = base + dev_priv->gtt.stolen_size, }, in i915_stolen_to_physical()
83 { .start = base, .end = base + dev_priv->gtt.stolen_size, }, in i915_stolen_to_physical()
93 gtt_end = gtt_start + gtt_total_entries(dev_priv->gtt) * 4; in i915_stolen_to_physical()
104 dev_priv->gtt.stolen_size = stolen[0].end - stolen[0].start; in i915_stolen_to_physical()
107 dev_priv->gtt.stolen_size = stolen[1].end - stolen[1].start; in i915_stolen_to_physical()
116 base, base + (u32) dev_priv->gtt.stolen_size - 1); in i915_stolen_to_physical()
126 r = devm_request_mem_region(dev->dev, base, dev_priv->gtt.stolen_size, in i915_stolen_to_physical()
138 dev_priv->gtt.stolen_size - 1, in i915_stolen_to_physical()
146 base, base + (uint32_t)dev_priv->gtt.stolen_size); in i915_stolen_to_physical()
[all …]
Dintel_psr.c66 struct drm_i915_private *dev_priv = dev->dev_private; in vlv_is_psr_active_on_pipe() local
80 struct drm_i915_private *dev_priv = dev->dev_private; in intel_psr_write_vsc() local
108 struct drm_i915_private *dev_priv = dev->dev_private; in vlv_psr_setup_vsc() local
143 struct drm_i915_private *dev_priv = dev->dev_private; in hsw_psr_enable_sink() local
161 if (dev_priv->psr.link_standby) in hsw_psr_enable_sink()
202 struct drm_i915_private *dev_priv = dev->dev_private; in vlv_psr_enable_source() local
217 struct drm_i915_private *dev_priv = dev->dev_private; in vlv_psr_activate() local
234 struct drm_i915_private *dev_priv = dev->dev_private; in hsw_psr_enable_source() local
240 uint32_t idle_frames = dev_priv->vbt.psr.idle_frames ? in hsw_psr_enable_source()
241 dev_priv->vbt.psr.idle_frames + 1 : 2; in hsw_psr_enable_source()
[all …]
Di915_sysfs.c40 struct drm_i915_private *dev_priv = dev->dev_private; in calc_residency() local
48 intel_runtime_pm_get(dev_priv); in calc_residency()
95 intel_runtime_pm_put(dev_priv); in calc_residency()
199 struct drm_i915_private *dev_priv = drm_dev->dev_private; in i915_l3_read() local
215 if (dev_priv->l3_parity.remap_info[slice]) in i915_l3_read()
217 dev_priv->l3_parity.remap_info[slice] + (offset/4), in i915_l3_read()
235 struct drm_i915_private *dev_priv = drm_dev->dev_private; in i915_l3_write() local
252 if (!dev_priv->l3_parity.remap_info[slice]) { in i915_l3_write()
272 dev_priv->l3_parity.remap_info[slice] = temp; in i915_l3_write()
274 memcpy(dev_priv->l3_parity.remap_info[slice] + (offset/4), buf, count); in i915_l3_write()
[all …]
Di915_gem_shrinker.c75 i915_gem_shrink(struct drm_i915_private *dev_priv, in i915_gem_shrink() argument
82 { &dev_priv->mm.unbound_list, I915_SHRINK_UNBOUND }, in i915_gem_shrink()
83 { &dev_priv->mm.bound_list, I915_SHRINK_BOUND }, in i915_gem_shrink()
159 unsigned long i915_gem_shrink_all(struct drm_i915_private *dev_priv) in i915_gem_shrink_all() argument
161 i915_gem_evict_everything(dev_priv->dev); in i915_gem_shrink_all()
162 return i915_gem_shrink(dev_priv, LONG_MAX, in i915_gem_shrink_all()
197 struct drm_i915_private *dev_priv = in i915_gem_shrinker_count() local
199 struct drm_device *dev = dev_priv->dev; in i915_gem_shrinker_count()
208 list_for_each_entry(obj, &dev_priv->mm.unbound_list, global_list) in i915_gem_shrinker_count()
212 list_for_each_entry(obj, &dev_priv->mm.bound_list, global_list) { in i915_gem_shrinker_count()
[all …]
Di915_drv.c436 struct drm_i915_private *dev_priv = dev->dev_private; in intel_detect_pch() local
443 dev_priv->pch_type = PCH_NOP; in intel_detect_pch()
461 dev_priv->pch_id = id; in intel_detect_pch()
464 dev_priv->pch_type = PCH_IBX; in intel_detect_pch()
468 dev_priv->pch_type = PCH_CPT; in intel_detect_pch()
473 dev_priv->pch_type = PCH_CPT; in intel_detect_pch()
477 dev_priv->pch_type = PCH_LPT; in intel_detect_pch()
482 dev_priv->pch_type = PCH_LPT; in intel_detect_pch()
487 dev_priv->pch_type = PCH_SPT; in intel_detect_pch()
491 dev_priv->pch_type = PCH_SPT; in intel_detect_pch()
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Dintel_hdmi.c50 struct drm_i915_private *dev_priv = dev->dev_private; in assert_hdmi_port_disabled() local
118 struct drm_i915_private *dev_priv) in hsw_infoframe_data_reg() argument
139 struct drm_i915_private *dev_priv = dev->dev_private; in g4x_write_infoframe() local
173 struct drm_i915_private *dev_priv = dev->dev_private; in g4x_infoframe_enabled() local
189 struct drm_i915_private *dev_priv = dev->dev_private; in ibx_write_infoframe() local
224 struct drm_i915_private *dev_priv = dev->dev_private; in ibx_infoframe_enabled() local
238 struct drm_i915_private *dev_priv = dev->dev_private; in cpt_write_infoframe() local
276 struct drm_i915_private *dev_priv = dev->dev_private; in cpt_infoframe_enabled() local
290 struct drm_i915_private *dev_priv = dev->dev_private; in vlv_write_infoframe() local
325 struct drm_i915_private *dev_priv = dev->dev_private; in vlv_infoframe_enabled() local
[all …]
Di915_debugfs.c191 struct drm_i915_private *dev_priv = dev->dev_private; in i915_gem_object_list_info() local
192 struct i915_address_space *vm = &dev_priv->gtt.base; in i915_gem_object_list_info()
247 struct drm_i915_private *dev_priv = dev->dev_private; in i915_gem_stolen_list_info() local
258 list_for_each_entry(obj, &dev_priv->mm.bound_list, global_list) { in i915_gem_stolen_list_info()
268 list_for_each_entry(obj, &dev_priv->mm.unbound_list, global_list) { in i915_gem_stolen_list_info()
376 struct drm_i915_private *dev_priv) in print_batch_pool_stats() argument
384 &dev_priv->mm.batch_pool.cache_list, in print_batch_pool_stats()
406 struct drm_i915_private *dev_priv = dev->dev_private; in i915_gem_object_info() local
410 struct i915_address_space *vm = &dev_priv->gtt.base; in i915_gem_object_info()
420 dev_priv->mm.object_count, in i915_gem_object_info()
[all …]
Dintel_display.c133 struct drm_i915_private *dev_priv = dev->dev_private; in intel_pch_rawclk() local
144 struct drm_i915_private *dev_priv = dev->dev_private; in intel_fdi_link_freq() local
977 enum transcoder intel_pipe_to_cpu_transcoder(struct drm_i915_private *dev_priv, in intel_pipe_to_cpu_transcoder() argument
980 struct drm_crtc *crtc = dev_priv->pipe_to_crtc_mapping[pipe]; in intel_pipe_to_cpu_transcoder()
988 struct drm_i915_private *dev_priv = dev->dev_private; in pipe_dsl_stopped() local
1024 struct drm_i915_private *dev_priv = dev->dev_private; in intel_wait_for_pipe_off() local
1049 bool ibx_digital_port_connected(struct drm_i915_private *dev_priv, in ibx_digital_port_connected() argument
1054 if (HAS_PCH_IBX(dev_priv->dev)) { in ibx_digital_port_connected()
1093 void assert_pll(struct drm_i915_private *dev_priv, in assert_pll() argument
1109 static void assert_dsi_pll(struct drm_i915_private *dev_priv, bool state) in assert_dsi_pll() argument
[all …]
Dintel_audio.c98 struct drm_i915_private *dev_priv = connector->dev->dev_private; in intel_eld_uptodate() local
122 struct drm_i915_private *dev_priv = encoder->base.dev->dev_private; in g4x_audio_codec_disable() local
143 struct drm_i915_private *dev_priv = connector->dev->dev_private; in g4x_audio_codec_enable() local
180 struct drm_i915_private *dev_priv = encoder->base.dev->dev_private; in hsw_audio_codec_disable() local
208 struct drm_i915_private *dev_priv = connector->dev->dev_private; in hsw_audio_codec_enable() local
260 struct drm_i915_private *dev_priv = encoder->base.dev->dev_private; in ilk_audio_codec_disable() local
273 if (HAS_PCH_IBX(dev_priv->dev)) { in ilk_audio_codec_disable()
276 } else if (IS_VALLEYVIEW(dev_priv)) { in ilk_audio_codec_disable()
311 struct drm_i915_private *dev_priv = connector->dev->dev_private; in ilk_audio_codec_enable() local
406 struct drm_i915_private *dev_priv = dev->dev_private; in intel_audio_codec_enable() local
[all …]
Dintel_dp.c255 struct drm_i915_private *dev_priv = dev->dev_private; in intel_hrawclk() local
297 struct drm_i915_private *dev_priv = dev->dev_private; in pps_lock() local
305 intel_display_power_get(dev_priv, power_domain); in pps_lock()
307 mutex_lock(&dev_priv->pps_mutex); in pps_lock()
315 struct drm_i915_private *dev_priv = dev->dev_private; in pps_unlock() local
318 mutex_unlock(&dev_priv->pps_mutex); in pps_unlock()
321 intel_display_power_put(dev_priv, power_domain); in pps_unlock()
329 struct drm_i915_private *dev_priv = dev->dev_private; in vlv_power_sequencer_kick() local
389 struct drm_i915_private *dev_priv = dev->dev_private; in vlv_power_sequencer_pipe() local
394 lockdep_assert_held(&dev_priv->pps_mutex); in vlv_power_sequencer_pipe()
[all …]
Di915_gem.c82 static void i915_gem_info_add_obj(struct drm_i915_private *dev_priv, in i915_gem_info_add_obj() argument
85 spin_lock(&dev_priv->mm.object_stat_lock); in i915_gem_info_add_obj()
86 dev_priv->mm.object_count++; in i915_gem_info_add_obj()
87 dev_priv->mm.object_memory += size; in i915_gem_info_add_obj()
88 spin_unlock(&dev_priv->mm.object_stat_lock); in i915_gem_info_add_obj()
91 static void i915_gem_info_remove_obj(struct drm_i915_private *dev_priv, in i915_gem_info_remove_obj() argument
94 spin_lock(&dev_priv->mm.object_stat_lock); in i915_gem_info_remove_obj()
95 dev_priv->mm.object_count--; in i915_gem_info_remove_obj()
96 dev_priv->mm.object_memory -= size; in i915_gem_info_remove_obj()
97 spin_unlock(&dev_priv->mm.object_stat_lock); in i915_gem_info_remove_obj()
[all …]
Dintel_panel.c383 struct drm_i915_private *dev_priv = dev->dev_private; in intel_panel_detect() local
386 if (!i915.panel_ignore_lid && dev_priv->opregion.lid_state) { in intel_panel_detect()
387 return ioread32(dev_priv->opregion.lid_state) & 0x1 ? in intel_panel_detect()
468 struct drm_i915_private *dev_priv = dev->dev_private; in intel_panel_compute_brightness() local
477 dev_priv->quirks & QUIRK_INVERT_BRIGHTNESS) { in intel_panel_compute_brightness()
487 struct drm_i915_private *dev_priv = dev->dev_private; in bdw_get_backlight() local
495 struct drm_i915_private *dev_priv = dev->dev_private; in pch_get_backlight() local
503 struct drm_i915_private *dev_priv = dev->dev_private; in i9xx_get_backlight() local
523 struct drm_i915_private *dev_priv = dev->dev_private; in _vlv_get_backlight() local
542 struct drm_i915_private *dev_priv = dev->dev_private; in intel_panel_get_backlight() local
[all …]
Dintel_dsi_pll.c229 struct drm_i915_private *dev_priv = encoder->base.dev->dev_private; in vlv_configure_dsi_pll() local
253 vlv_cck_write(dev_priv, CCK_REG_DSI_PLL_CONTROL, 0); in vlv_configure_dsi_pll()
254 vlv_cck_write(dev_priv, CCK_REG_DSI_PLL_DIVIDER, dsi_mnp.dsi_pll_div); in vlv_configure_dsi_pll()
255 vlv_cck_write(dev_priv, CCK_REG_DSI_PLL_CONTROL, dsi_mnp.dsi_pll_ctrl); in vlv_configure_dsi_pll()
260 struct drm_i915_private *dev_priv = encoder->base.dev->dev_private; in vlv_enable_dsi_pll() local
265 mutex_lock(&dev_priv->dpio_lock); in vlv_enable_dsi_pll()
272 tmp = vlv_cck_read(dev_priv, CCK_REG_DSI_PLL_CONTROL); in vlv_enable_dsi_pll()
274 vlv_cck_write(dev_priv, CCK_REG_DSI_PLL_CONTROL, tmp); in vlv_enable_dsi_pll()
276 if (wait_for(vlv_cck_read(dev_priv, CCK_REG_DSI_PLL_CONTROL) & in vlv_enable_dsi_pll()
279 mutex_unlock(&dev_priv->dpio_lock); in vlv_enable_dsi_pll()
[all …]
Di915_gem_gtt.c100 static void bdw_setup_private_ppat(struct drm_i915_private *dev_priv);
101 static void chv_setup_private_ppat(struct drm_i915_private *dev_priv);
861 struct drm_i915_private *dev_priv = ppgtt->base.dev->dev_private; in gen6_dump_ppgtt() local
870 pd_addr = (gen6_pte_t __iomem *)dev_priv->gtt.gsm + in gen6_dump_ppgtt()
933 static void gen6_write_page_range(struct drm_i915_private *dev_priv, in gen6_write_page_range() argument
945 readl(dev_priv->gtt.gsm); in gen6_write_page_range()
983 struct drm_i915_private *dev_priv = to_i915(ppgtt->base.dev); in vgpu_mm_switch() local
1026 struct drm_i915_private *dev_priv = dev->dev_private; in gen6_mm_switch() local
1039 struct drm_i915_private *dev_priv = dev->dev_private; in gen8_ppgtt_enable() local
1043 for_each_ring(ring, dev_priv, j) { in gen8_ppgtt_enable()
[all …]
Dintel_ringbuffer.c80 struct drm_i915_private *dev_priv = ring->dev->dev_private; in intel_ring_stopped() local
81 return dev_priv->gpu_error.stop_rings & intel_ring_flag(ring); in intel_ring_stopped()
443 struct drm_i915_private *dev_priv = ring->dev->dev_private; in ring_write_tail() local
449 struct drm_i915_private *dev_priv = ring->dev->dev_private; in intel_ring_get_active_head() local
465 struct drm_i915_private *dev_priv = ring->dev->dev_private; in ring_setup_phys_status_page() local
468 addr = dev_priv->status_page_dmah->busaddr; in ring_setup_phys_status_page()
470 addr |= (dev_priv->status_page_dmah->busaddr >> 28) & 0xf0; in ring_setup_phys_status_page()
477 struct drm_i915_private *dev_priv = ring->dev->dev_private; in intel_ring_setup_status_page() local
538 struct drm_i915_private *dev_priv = to_i915(ring->dev); in stop_ring() local
568 struct drm_i915_private *dev_priv = dev->dev_private; in init_ring_common() local
[all …]
Di915_vgpu.c63 struct drm_i915_private *dev_priv = to_i915(dev); in i915_check_vgpu() local
72 magic = readq(dev_priv->regs + vgtif_reg(magic)); in i915_check_vgpu()
77 readw(dev_priv->regs + vgtif_reg(version_major)), in i915_check_vgpu()
78 readw(dev_priv->regs + vgtif_reg(version_minor))); in i915_check_vgpu()
84 dev_priv->vgpu.active = true; in i915_check_vgpu()
183 struct drm_i915_private *dev_priv = to_i915(dev); in intel_vgt_balloon() local
184 struct i915_address_space *ggtt_vm = &dev_priv->gtt.base; in intel_vgt_balloon()
206 mappable_end > dev_priv->gtt.mappable_end || in intel_vgt_balloon()
207 unmappable_base < dev_priv->gtt.mappable_end || in intel_vgt_balloon()
214 if (unmappable_base > dev_priv->gtt.mappable_end) { in intel_vgt_balloon()
[all …]
Di915_gem_context.c110 struct drm_i915_private *dev_priv = dev->dev_private; in get_context_size() local
188 struct drm_i915_private *dev_priv = dev->dev_private; in __create_hw_context() local
197 list_add_tail(&ctx->link, &dev_priv->context_list); in __create_hw_context()
199 if (dev_priv->hw_context_size) { in __create_hw_context()
201 i915_gem_alloc_context_obj(dev, dev_priv->hw_context_size); in __create_hw_context()
296 struct drm_i915_private *dev_priv = dev->dev_private; in i915_gem_context_reset() local
302 list_for_each_entry(ctx, &dev_priv->context_list, link) { in i915_gem_context_reset()
310 struct intel_engine_cs *ring = &dev_priv->ring[i]; in i915_gem_context_reset()
329 struct drm_i915_private *dev_priv = dev->dev_private; in i915_gem_context_init() local
335 if (WARN_ON(dev_priv->ring[RCS].default_context)) in i915_gem_context_init()
[all …]
Dintel_drv.h722 struct drm_i915_private *dev_priv = dev->dev_private; in intel_get_crtc_for_pipe() local
723 return dev_priv->pipe_to_crtc_mapping[pipe]; in intel_get_crtc_for_pipe()
729 struct drm_i915_private *dev_priv = dev->dev_private; in intel_get_crtc_for_plane() local
730 return dev_priv->plane_to_crtc_mapping[plane]; in intel_get_crtc_for_plane()
811 bool intel_set_cpu_fifo_underrun_reporting(struct drm_i915_private *dev_priv,
813 bool intel_set_pch_fifo_underrun_reporting(struct drm_i915_private *dev_priv,
816 void intel_cpu_fifo_underrun_irq_handler(struct drm_i915_private *dev_priv,
818 void intel_pch_fifo_underrun_irq_handler(struct drm_i915_private *dev_priv,
820 void i9xx_check_fifo_underruns(struct drm_i915_private *dev_priv);
823 void gen5_enable_gt_irq(struct drm_i915_private *dev_priv, uint32_t mask);
[all …]
Di915_gpu_error.c334 struct drm_i915_private *dev_priv = dev->dev_private; in i915_error_state_to_str() local
378 err_printf(m, "Missed interrupts: 0x%08lx\n", dev_priv->gpu_error.missed_irq_rings); in i915_error_state_to_str()
380 for (i = 0; i < dev_priv->num_fence_regs; i++) in i915_error_state_to_str()
418 err_puts(m, dev_priv->ring[i].name); in i915_error_state_to_str()
431 dev_priv->ring[i].name, obj->gtt_offset); in i915_error_state_to_str()
437 dev_priv->ring[i].name, in i915_error_state_to_str()
449 dev_priv->ring[i].name, in i915_error_state_to_str()
456 dev_priv->ring[i].name, in i915_error_state_to_str()
472 dev_priv->ring[i].name, in i915_error_state_to_str()
577 i915_error_object_create(struct drm_i915_private *dev_priv, in i915_error_object_create() argument
[all …]
Di915_drv.h324 void (*mode_set)(struct drm_i915_private *dev_priv,
326 void (*enable)(struct drm_i915_private *dev_priv,
328 void (*disable)(struct drm_i915_private *dev_priv,
330 bool (*get_hw_state)(struct drm_i915_private *dev_priv,
617 void (*force_wake_get)(struct drm_i915_private *dev_priv,
619 void (*force_wake_put)(struct drm_i915_private *dev_priv,
622 uint8_t (*mmio_readb)(struct drm_i915_private *dev_priv, off_t offset, bool trace);
623 uint16_t (*mmio_readw)(struct drm_i915_private *dev_priv, off_t offset, bool trace);
624 uint32_t (*mmio_readl)(struct drm_i915_private *dev_priv, off_t offset, bool trace);
625 uint64_t (*mmio_readq)(struct drm_i915_private *dev_priv, off_t offset, bool trace);
[all …]
Dintel_ddi.c194 struct drm_i915_private *dev_priv = dev->dev_private; in intel_prepare_ddi_buffers() local
198 int hdmi_level = dev_priv->vbt.ddi_port_info[port].hdmi_level_shift; in intel_prepare_ddi_buffers()
209 if (dev_priv->vbt.edp_low_vswing) { in intel_prepare_ddi_buffers()
319 static void intel_wait_ddi_buf_idle(struct drm_i915_private *dev_priv, in intel_wait_ddi_buf_idle() argument
345 struct drm_i915_private *dev_priv = dev->dev_private; in hsw_fdi_link_train() local
361 rx_ctl_val = dev_priv->fdi_rx_config | FDI_RX_ENHANCE_FRAME_ENABLE | in hsw_fdi_link_train()
444 intel_wait_ddi_buf_idle(dev_priv, PORT_E); in hsw_fdi_link_train()
677 static int intel_ddi_calc_wrpll_link(struct drm_i915_private *dev_priv, in intel_ddi_calc_wrpll_link() argument
711 static int skl_calc_wrpll_link(struct drm_i915_private *dev_priv, in skl_calc_wrpll_link() argument
775 struct drm_i915_private *dev_priv = encoder->base.dev->dev_private; in skl_ddi_clock_get() local
[all …]
Dintel_lvds.c74 struct drm_i915_private *dev_priv = dev->dev_private; in intel_lvds_get_hw_state() local
80 if (!intel_display_power_is_enabled(dev_priv, power_domain)) in intel_lvds_get_hw_state()
100 struct drm_i915_private *dev_priv = dev->dev_private; in intel_lvds_get_config() local
130 if (HAS_PCH_SPLIT(dev_priv->dev)) in intel_lvds_get_config()
140 struct drm_i915_private *dev_priv = dev->dev_private; in intel_pre_enable_lvds() local
148 assert_fdi_rx_pll_disabled(dev_priv, pipe); in intel_pre_enable_lvds()
149 assert_shared_dpll_disabled(dev_priv, in intel_pre_enable_lvds()
152 assert_pll_disabled(dev_priv, pipe); in intel_pre_enable_lvds()
217 struct drm_i915_private *dev_priv = dev->dev_private; in intel_enable_lvds() local
244 struct drm_i915_private *dev_priv = dev->dev_private; in intel_disable_lvds() local
[all …]
Dintel_dsi.c52 struct drm_i915_private *dev_priv = dev->dev_private; in wait_for_dsi_fifo_empty() local
62 static void write_data(struct drm_i915_private *dev_priv, u32 reg, in write_data() argument
77 static void read_data(struct drm_i915_private *dev_priv, u32 reg, in read_data() argument
95 struct drm_i915_private *dev_priv = dev->dev_private; in intel_dsi_host_transfer() local
127 write_data(dev_priv, data_reg, packet.payload, in intel_dsi_host_transfer()
147 read_data(dev_priv, data_reg, msg->rx_buf, msg->rx_len); in intel_dsi_host_transfer()
215 struct drm_i915_private *dev_priv = dev->dev_private; in dpi_send_cmd() local
240 static void band_gap_reset(struct drm_i915_private *dev_priv) in band_gap_reset() argument
242 mutex_lock(&dev_priv->dpio_lock); in band_gap_reset()
244 vlv_flisdsi_write(dev_priv, 0x08, 0x0001); in band_gap_reset()
[all …]
Dintel_lrc.c292 struct drm_i915_private *dev_priv = dev->dev_private; in execlists_elsp_write() local
308 intel_uncore_forcewake_get(dev_priv, FORCEWAKE_ALL); in execlists_elsp_write()
318 intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL); in execlists_elsp_write()
466 struct drm_i915_private *dev_priv = ring->dev->dev_private; in intel_lrc_irq_handler() local
523 struct drm_i915_private *dev_priv = ring->dev->dev_private; in execlists_context_queue() local
541 request->uniq = dev_priv->request_uniq++; in execlists_context_queue()
549 intel_runtime_pm_get(dev_priv); in execlists_context_queue()
659 struct drm_i915_private *dev_priv = dev->dev_private; in intel_execlists_submission() local
671 if (instp_mode != 0 && ring != &dev_priv->ring[RCS]) { in intel_execlists_submission()
676 if (instp_mode != dev_priv->relative_constants_mode) { in intel_execlists_submission()
[all …]
Dintel_modes.c85 struct drm_i915_private *dev_priv = dev->dev_private; in intel_attach_force_audio_property() local
88 prop = dev_priv->force_audio_property; in intel_attach_force_audio_property()
97 dev_priv->force_audio_property = prop; in intel_attach_force_audio_property()
112 struct drm_i915_private *dev_priv = dev->dev_private; in intel_attach_broadcast_rgb_property() local
115 prop = dev_priv->broadcast_rgb_property; in intel_attach_broadcast_rgb_property()
124 dev_priv->broadcast_rgb_property = prop; in intel_attach_broadcast_rgb_property()
Dintel_fbdev.c179 struct drm_i915_private *dev_priv = dev->dev_private; in intelfb_create() local
244 info->apertures->ranges[0].size = dev_priv->gtt.mappable_end; in intelfb_create()
250 ioremap_wc(dev_priv->gtt.mappable_base + i915_gem_obj_ggtt_offset(obj), in intelfb_create()
689 struct drm_i915_private *dev_priv = dev->dev_private; in intel_fbdev_init() local
711 dev_priv->fbdev = ifbdev; in intel_fbdev_init()
712 INIT_WORK(&dev_priv->fbdev_suspend_work, intel_fbdev_suspend_worker); in intel_fbdev_init()
721 struct drm_i915_private *dev_priv = data; in intel_fbdev_initial_config() local
722 struct intel_fbdev *ifbdev = dev_priv->fbdev; in intel_fbdev_initial_config()
730 struct drm_i915_private *dev_priv = dev->dev_private; in intel_fbdev_fini() local
731 if (!dev_priv->fbdev) in intel_fbdev_fini()
[all …]
Di915_reg.h810 #define DPIO_PHY_IOSF_PORT(phy) (dev_priv->dpio_phy_iosf_port[phy])
1836 #define _DPLL_A (dev_priv->info.display_mmio_offset + 0x6014)
1837 #define _DPLL_B (dev_priv->info.display_mmio_offset + 0x6018)
1838 #define _CHV_DPLL_C (dev_priv->info.display_mmio_offset + 0x6030)
1924 #define _DPLL_A_MD (dev_priv->info.display_mmio_offset + 0x601c)
1925 #define _DPLL_B_MD (dev_priv->info.display_mmio_offset + 0x6020)
1926 #define _CHV_DPLL_C_MD (dev_priv->info.display_mmio_offset + 0x603c)
1996 #define DSPCLK_GATE_D (dev_priv->info.display_mmio_offset + 0x6200)
2135 #define PALETTE(pipe) (dev_priv->info.palette_offsets[pipe] + \
2136 dev_priv->info.display_mmio_offset)
[all …]
Dintel_opregion.c234 struct drm_i915_private *dev_priv = dev->dev_private; in swsci() local
235 struct opregion_swsci __iomem *swsci = dev_priv->opregion.swsci; in swsci()
250 if ((dev_priv->opregion.swsci_sbcb_sub_functions & in swsci()
254 if ((dev_priv->opregion.swsci_gbda_sub_functions & in swsci()
411 struct drm_i915_private *dev_priv = dev->dev_private; in asle_set_backlight() local
413 struct opregion_asle __iomem *asle = dev_priv->opregion.asle; in asle_set_backlight()
522 struct drm_i915_private *dev_priv = in asle_work() local
524 struct drm_device *dev = dev_priv->dev; in asle_work()
525 struct opregion_asle __iomem *asle = dev_priv->opregion.asle; in asle_work()
573 struct drm_i915_private *dev_priv = dev->dev_private; in intel_opregion_asle_intr() local
[all …]
Dintel_dsi_panel_vbt.c205 struct drm_i915_private *dev_priv = dev->dev_private; in mipi_exec_gpio() local
220 mutex_lock(&dev_priv->dpio_lock); in mipi_exec_gpio()
224 vlv_gpio_nc_write(dev_priv, function, 0x2000CC00); in mipi_exec_gpio()
231 vlv_gpio_nc_write(dev_priv, pad, val); in mipi_exec_gpio()
232 mutex_unlock(&dev_priv->dpio_lock); in mipi_exec_gpio()
306 struct drm_i915_private *dev_priv = dev->dev_private; in vbt_panel_prepare() local
309 sequence = dev_priv->vbt.dsi.sequence[MIPI_SEQ_ASSERT_RESET]; in vbt_panel_prepare()
312 sequence = dev_priv->vbt.dsi.sequence[MIPI_SEQ_INIT_OTP]; in vbt_panel_prepare()
323 struct drm_i915_private *dev_priv = dev->dev_private; in vbt_panel_unprepare() local
326 sequence = dev_priv->vbt.dsi.sequence[MIPI_SEQ_DEASSERT_RESET]; in vbt_panel_unprepare()
[all …]
Dintel_crt.c70 struct drm_i915_private *dev_priv = dev->dev_private; in intel_crt_get_hw_state() local
76 if (!intel_display_power_is_enabled(dev_priv, power_domain)) in intel_crt_get_hw_state()
94 struct drm_i915_private *dev_priv = encoder->base.dev->dev_private; in intel_crt_get_flags() local
144 struct drm_i915_private *dev_priv = dev->dev_private; in hsw_crt_pre_enable() local
158 struct drm_i915_private *dev_priv = dev->dev_private; in intel_crt_set_dpms() local
214 struct drm_i915_private *dev_priv = dev->dev_private; in hsw_crt_post_disable() local
337 struct drm_i915_private *dev_priv = dev->dev_private; in intel_ironlake_crt_detect_hotplug() local
382 struct drm_i915_private *dev_priv = dev->dev_private; in valleyview_crt_detect_hotplug() local
423 struct drm_i915_private *dev_priv = dev->dev_private; in intel_crt_detect_hotplug() local
506 struct drm_i915_private *dev_priv = crt->base.base.dev->dev_private; in intel_crt_detect_ddc() local
[all …]
Di915_gem_tiling.c90 struct drm_i915_private *dev_priv = dev->dev_private; in i915_gem_detect_bit_6_swizzle() local
105 if (dev_priv->preserve_bios_swizzle) { in i915_gem_detect_bit_6_swizzle()
187 dev_priv->quirks |= QUIRK_PIN_SWIZZLED_PAGES; in i915_gem_detect_bit_6_swizzle()
226 dev_priv->mm.bit_6_swizzle_x = swizzle_x; in i915_gem_detect_bit_6_swizzle()
227 dev_priv->mm.bit_6_swizzle_y = swizzle_y; in i915_gem_detect_bit_6_swizzle()
324 struct drm_i915_private *dev_priv = dev->dev_private; in i915_gem_set_tiling() local
349 args->swizzle_mode = dev_priv->mm.bit_6_swizzle_x; in i915_gem_set_tiling()
351 args->swizzle_mode = dev_priv->mm.bit_6_swizzle_y; in i915_gem_set_tiling()
394 dev_priv->quirks & QUIRK_PIN_SWIZZLED_PAGES) { in i915_gem_set_tiling()
442 struct drm_i915_private *dev_priv = dev->dev_private; in i915_gem_get_tiling() local
[all …]
Dintel_overlay.c192 struct drm_i915_private *dev_priv = overlay->dev->dev_private; in intel_overlay_map_regs() local
198 regs = io_mapping_map_wc(dev_priv->gtt.mappable, in intel_overlay_map_regs()
215 struct drm_i915_private *dev_priv = dev->dev_private; in intel_overlay_do_wait_request() local
216 struct intel_engine_cs *ring = &dev_priv->ring[RCS]; in intel_overlay_do_wait_request()
240 struct drm_i915_private *dev_priv = dev->dev_private; in intel_overlay_on() local
241 struct intel_engine_cs *ring = &dev_priv->ring[RCS]; in intel_overlay_on()
247 WARN_ON(IS_I830(dev) && !(dev_priv->quirks & QUIRK_PIPEA_FORCE)); in intel_overlay_on()
267 struct drm_i915_private *dev_priv = dev->dev_private; in intel_overlay_continue() local
268 struct intel_engine_cs *ring = &dev_priv->ring[RCS]; in intel_overlay_continue()
327 struct drm_i915_private *dev_priv = dev->dev_private; in intel_overlay_off() local
[all …]
Di915_gem_execbuffer.c299 struct drm_i915_private *dev_priv = dev->dev_private; in relocate_entry_gtt() local
316 reloc_page = io_mapping_map_atomic_wc(dev_priv->gtt.mappable, in relocate_entry_gtt()
326 io_mapping_map_atomic_wc(dev_priv->gtt.mappable, in relocate_entry_gtt()
1046 struct drm_i915_private *dev_priv = to_i915(ring->dev); in i915_gem_execbuffer_move_to_active() local
1047 list_move_tail(&dev_priv->fence_regs[obj->fence_reg].lru_list, in i915_gem_execbuffer_move_to_active()
1048 &dev_priv->mm.fence_list); in i915_gem_execbuffer_move_to_active()
1073 struct drm_i915_private *dev_priv = dev->dev_private; in i915_reset_gen7_sol_offsets() local
1076 if (!IS_GEN7(dev) || ring != &dev_priv->ring[RCS]) { in i915_reset_gen7_sol_offsets()
1145 struct drm_i915_private *dev_priv = to_i915(batch_obj->base.dev); in i915_gem_execbuffer_parse() local
1150 shadow_batch_obj = i915_gem_batch_pool_get(&dev_priv->mm.batch_pool, in i915_gem_execbuffer_parse()
[all …]
Di915_gem_userptr.c75 struct drm_i915_private *dev_priv = to_i915(dev); in cancel_userptr() local
79 was_interruptible = dev_priv->mm.interruptible; in cancel_userptr()
80 dev_priv->mm.interruptible = false; in cancel_userptr()
88 dev_priv->mm.interruptible = was_interruptible; in cancel_userptr()
408 __i915_mm_struct_find(struct drm_i915_private *dev_priv, struct mm_struct *real) in __i915_mm_struct_find() argument
413 hash_for_each_possible(dev_priv->mm_structs, mm, node, (unsigned long)real) in __i915_mm_struct_find()
423 struct drm_i915_private *dev_priv = to_i915(obj->base.dev); in i915_gem_userptr_init__mm_struct() local
437 mutex_lock(&dev_priv->mm_lock); in i915_gem_userptr_init__mm_struct()
438 mm = __i915_mm_struct_find(dev_priv, current->mm); in i915_gem_userptr_init__mm_struct()
455 hash_add(dev_priv->mm_structs, in i915_gem_userptr_init__mm_struct()
[all …]
Di915_gem_debug.c37 struct drm_i915_private *dev_priv = dev->dev_private; in i915_verify_lists() local
44 list_for_each_entry(obj, &dev_priv->render_ring.active_list, list) { in i915_verify_lists()
66 list_for_each_entry(obj, &dev_priv->mm.flushing_list, list) { in i915_verify_lists()
84 list_for_each_entry(obj, &dev_priv->mm.gpu_write_list, gpu_write_list) { in i915_verify_lists()
Dintel_dvo.c117 struct drm_i915_private *dev_priv = dev->dev_private; in intel_dvo_connector_get_hw_state() local
133 struct drm_i915_private *dev_priv = dev->dev_private; in intel_dvo_get_hw_state() local
150 struct drm_i915_private *dev_priv = encoder->base.dev->dev_private; in intel_dvo_get_config() local
171 struct drm_i915_private *dev_priv = encoder->base.dev->dev_private; in intel_disable_dvo() local
183 struct drm_i915_private *dev_priv = encoder->base.dev->dev_private; in intel_enable_dvo() local
297 struct drm_i915_private *dev_priv = dev->dev_private; in intel_dvo_pre_enable() local
359 struct drm_i915_private *dev_priv = connector->dev->dev_private; in intel_dvo_get_modes() local
367 intel_gmbus_get_adapter(dev_priv, GMBUS_PORT_DPC)); in intel_dvo_get_modes()
431 struct drm_i915_private *dev_priv = dev->dev_private; in intel_dvo_get_current_mode() local
461 struct drm_i915_private *dev_priv = dev->dev_private; in intel_dvo_init() local
[all …]
Ddvo_sil164.c70 struct sil164_priv *sil = dvo->dev_priv; in sil164_readb()
107 struct sil164_priv *sil = dvo->dev_priv; in sil164_writeb()
144 dvo->dev_priv = sil; in sil164_init()
262 struct sil164_priv *sil = dvo->dev_priv; in sil164_destroy()
266 dvo->dev_priv = NULL; in sil164_destroy()
Dintel_tv.c841 struct drm_i915_private *dev_priv = dev->dev_private; in intel_tv_get_hw_state() local
856 struct drm_i915_private *dev_priv = dev->dev_private; in intel_enable_tv() local
869 struct drm_i915_private *dev_priv = dev->dev_private; in intel_disable_tv() local
943 set_tv_mode_timings(struct drm_i915_private *dev_priv, in set_tv_mode_timings() argument
1001 static void set_color_conversion(struct drm_i915_private *dev_priv, in set_color_conversion() argument
1024 struct drm_i915_private *dev_priv = dev->dev_private; in intel_tv_pre_enable() local
1102 set_tv_mode_timings(dev_priv, tv_mode, burst_ena); in intel_tv_pre_enable()
1108 set_color_conversion(dev_priv, color_conversion); in intel_tv_pre_enable()
1120 assert_pipe_disabled(dev_priv, intel_crtc->pipe); in intel_tv_pre_enable()
1185 struct drm_i915_private *dev_priv = dev->dev_private; in intel_tv_detect_type() local
[all …]
Ddvo_tfp410.c95 struct tfp410_priv *tfp = dvo->dev_priv; in tfp410_readb()
132 struct tfp410_priv *tfp = dvo->dev_priv; in tfp410_writeb()
180 dvo->dev_priv = tfp; in tfp410_init()
301 struct tfp410_priv *tfp = dvo->dev_priv; in tfp410_destroy()
305 dvo->dev_priv = NULL; in tfp410_destroy()
Dintel_sprite.c170 struct drm_i915_private *dev_priv = crtc->base.dev->dev_private; in intel_update_primary_plane() local
188 struct drm_i915_private *dev_priv = dev->dev_private; in skl_update_plane() local
299 struct drm_i915_private *dev_priv = dev->dev_private; in skl_disable_plane() local
316 struct drm_i915_private *dev_priv = intel_plane->base.dev->dev_private; in chv_update_csc() local
361 struct drm_i915_private *dev_priv = dev->dev_private; in vlv_update_plane() local
480 intel_flush_primary_plane(dev_priv, intel_crtc->plane); in vlv_update_plane()
487 struct drm_i915_private *dev_priv = dev->dev_private; in vlv_disable_plane() local
500 intel_flush_primary_plane(dev_priv, intel_crtc->plane); in vlv_disable_plane()
515 struct drm_i915_private *dev_priv = dev->dev_private; in ivb_update_plane() local
630 intel_flush_primary_plane(dev_priv, intel_crtc->plane); in ivb_update_plane()
[all …]
Ddvo_ivch.c168 struct ivch_priv *priv = dvo->dev_priv; in ivch_read()
211 struct ivch_priv *priv = dvo->dev_priv; in ivch_write()
248 dvo->dev_priv = priv; in ivch_init()
419 struct ivch_priv *priv = dvo->dev_priv; in ivch_destroy()
423 dvo->dev_priv = NULL; in ivch_destroy()
Ddvo_ch7xxx.c137 struct ch7xxx_priv *ch7xxx = dvo->dev_priv; in ch7xxx_readb()
175 struct ch7xxx_priv *ch7xxx = dvo->dev_priv; in ch7xxx_writeb()
212 dvo->dev_priv = ch7xxx; in ch7xxx_init()
351 struct ch7xxx_priv *ch7xxx = dvo->dev_priv; in ch7xxx_destroy()
355 dvo->dev_priv = NULL; in ch7xxx_destroy()
Dintel_sdvo.c239 struct drm_i915_private *dev_priv = dev->dev_private; in intel_sdvo_write_sdvox() local
1182 struct drm_i915_private *dev_priv = dev->dev_private; in intel_sdvo_pre_enable() local
1322 struct drm_i915_private *dev_priv = dev->dev_private; in intel_sdvo_get_hw_state() local
1345 struct drm_i915_private *dev_priv = dev->dev_private; in intel_sdvo_get_config() local
1430 struct drm_i915_private *dev_priv = encoder->base.dev->dev_private; in intel_disable_sdvo() local
1472 struct drm_i915_private *dev_priv = dev->dev_private; in intel_enable_sdvo() local
1662 struct drm_i915_private *dev_priv = connector->dev->dev_private; in intel_sdvo_get_analog_edid() local
1665 intel_gmbus_get_adapter(dev_priv, in intel_sdvo_get_analog_edid()
1666 dev_priv->vbt.crt_ddc_pin)); in intel_sdvo_get_analog_edid()
1945 struct drm_i915_private *dev_priv = connector->dev->dev_private; in intel_sdvo_get_lvds_modes() local
[all …]
Di915_gem_evict.c252 struct drm_i915_private *dev_priv = dev->dev_private; in i915_gem_evict_everything() local
257 list_for_each_entry(vm, &dev_priv->vm_list, global_link) { in i915_gem_evict_everything()
280 list_for_each_entry_safe(vm, v, &dev_priv->vm_list, global_link) in i915_gem_evict_everything()
Dintel_dp_mst.c149 struct drm_i915_private *dev_priv = dev->dev_private; in intel_mst_pre_enable_dp() local
211 struct drm_i915_private *dev_priv = dev->dev_private; in intel_mst_enable_dp() local
243 struct drm_i915_private *dev_priv = dev->dev_private; in intel_dp_mst_enc_get_config() local
396 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); in intel_connector_add_to_fbdev() local
397 drm_fb_helper_add_one_connector(&dev_priv->fbdev->helper, &connector->base); in intel_connector_add_to_fbdev()
404 struct drm_i915_private *dev_priv = to_i915(connector->base.dev); in intel_connector_remove_from_fbdev() local
405 drm_fb_helper_remove_one_connector(&dev_priv->fbdev->helper, &connector->base); in intel_connector_remove_from_fbdev()
Ddvo_ns2501.c379 struct ns2501_priv *ns = dvo->dev_priv; in ns2501_readb()
424 struct ns2501_priv *ns = dvo->dev_priv; in ns2501_writeb()
468 dvo->dev_priv = ns; in ns2501_init()
537 struct ns2501_priv *ns = (struct ns2501_priv *)(dvo->dev_priv); in ns2501_mode_set()
577 struct ns2501_priv *ns = (struct ns2501_priv *)(dvo->dev_priv); in ns2501_dpms()
615 struct ns2501_priv *ns = dvo->dev_priv; in ns2501_destroy()
619 dvo->dev_priv = NULL; in ns2501_destroy()
Ddvo_ch7017.c212 dvo->dev_priv = priv; in ch7017_init()
397 struct ch7017_priv *priv = dvo->dev_priv; in ch7017_destroy()
401 dvo->dev_priv = NULL; in ch7017_destroy()
Dintel_ringbuffer.h55 (i915_gem_obj_ggtt_offset(dev_priv->semaphore_obj) + \
60 (i915_gem_obj_ggtt_offset(dev_priv->semaphore_obj) + \
65 if (!dev_priv->semaphore_obj) { \
Ddvo.h41 void *dev_priv; member
Di915_trace.h762 __entry->dev = ctx->file_priv->dev_priv->dev->primary->index;
/linux-4.1.27/drivers/gpu/drm/i810/
Di810_dma.c91 drm_i810_private_t *dev_priv; in i810_mmap_buffers() local
96 dev_priv = dev->dev_private; in i810_mmap_buffers()
97 buf = dev_priv->mmap_buffer; in i810_mmap_buffers()
126 drm_i810_private_t *dev_priv = dev->dev_private; in i810_map_buffer() local
136 dev_priv->mmap_buffer = buf; in i810_map_buffer()
140 dev_priv->mmap_buffer = NULL; in i810_map_buffer()
212 drm_i810_private_t *dev_priv = in i810_dma_cleanup() local
215 if (dev_priv->ring.virtual_start) in i810_dma_cleanup()
216 drm_legacy_ioremapfree(&dev_priv->ring.map, dev); in i810_dma_cleanup()
217 if (dev_priv->hw_status_page) { in i810_dma_cleanup()
[all …]
Di810_drv.h134 dev_priv->mmio_map->handle)
150 if (dev_priv->ring.space < n*4) \
152 dev_priv->ring.space -= n*4; \
153 outring = dev_priv->ring.tail; \
154 ringmask = dev_priv->ring.tail_mask; \
155 virt = dev_priv->ring.virtual_start; \
161 dev_priv->ring.tail = outring; \
/linux-4.1.27/drivers/gpu/drm/sis/
Dsis_mm.c65 drm_sis_private_t *dev_priv = dev->dev_private; in sis_fb_init() local
71 drm_mm_init(&dev_priv->vram_mm, 0, fb->size >> SIS_MM_ALIGN_SHIFT); in sis_fb_init()
73 dev_priv->vram_initialized = 1; in sis_fb_init()
74 dev_priv->vram_offset = fb->offset; in sis_fb_init()
85 drm_sis_private_t *dev_priv = dev->dev_private; in sis_drm_alloc() local
94 if (0 == ((pool == 0) ? dev_priv->vram_initialized : in sis_drm_alloc()
95 dev_priv->agp_initialized)) { in sis_drm_alloc()
110 retval = drm_mm_insert_node(&dev_priv->agp_mm, in sis_drm_alloc()
123 retval = drm_mm_insert_node(&dev_priv->vram_mm, in sis_drm_alloc()
133 retval = idr_alloc(&dev_priv->object_idr, item, 1, 0, GFP_KERNEL); in sis_drm_alloc()
[all …]
Dsis_drv.c42 drm_sis_private_t *dev_priv; in sis_driver_load() local
46 dev_priv = kzalloc(sizeof(drm_sis_private_t), GFP_KERNEL); in sis_driver_load()
47 if (dev_priv == NULL) in sis_driver_load()
50 idr_init(&dev_priv->object_idr); in sis_driver_load()
51 dev->dev_private = (void *)dev_priv; in sis_driver_load()
52 dev_priv->chipset = chipset; in sis_driver_load()
59 drm_sis_private_t *dev_priv = dev->dev_private; in sis_driver_unload() local
61 idr_destroy(&dev_priv->object_idr); in sis_driver_unload()
63 kfree(dev_priv); in sis_driver_unload()
Dsis_drv.h52 #define SIS_BASE (dev_priv->mmio)
/linux-4.1.27/drivers/net/ethernet/amd/
Dam79c961a.c236 struct dev_priv *priv = netdev_priv(dev); in am79c961_init_for_open()
308 struct dev_priv *priv = netdev_priv(dev); in am79c961_timer()
334 struct dev_priv *priv = netdev_priv(dev); in am79c961_open()
359 struct dev_priv *priv = netdev_priv(dev); in am79c961_close()
382 struct dev_priv *priv = netdev_priv(dev); in am79c961_setmulticastlist()
446 struct dev_priv *priv = netdev_priv(dev); in am79c961_sendpacket()
484 am79c961_rx(struct net_device *dev, struct dev_priv *priv) in am79c961_rx()
541 am79c961_tx(struct net_device *dev, struct dev_priv *priv) in am79c961_tx()
591 struct dev_priv *priv = netdev_priv(dev); in am79c961_interrupt()
639 struct dev_priv *priv = netdev_priv(dev); in am79c961_hw_init()
[all …]
Dam79c961a.h132 struct dev_priv { struct
/linux-4.1.27/drivers/net/ethernet/seeq/
Dether3.h25 #define priv(dev) ((struct dev_priv *)netdev_priv(dev))
156 struct dev_priv { struct
Dether3.c765 dev = alloc_etherdev(sizeof(struct dev_priv)); in ether3_probe()
/linux-4.1.27/drivers/gpu/drm/exynos/
Dexynos_drm_plane.c195 struct exynos_drm_private *dev_priv = dev->dev_private; in exynos_plane_attach_zpos_property() local
198 prop = dev_priv->plane_zpos_property; in exynos_plane_attach_zpos_property()
205 dev_priv->plane_zpos_property = prop; in exynos_plane_attach_zpos_property()
Dexynos_drm_crtc.c313 struct exynos_drm_private *dev_priv = dev->dev_private; in exynos_drm_crtc_finish_pageflip() local
314 struct drm_crtc *drm_crtc = dev_priv->crtc[pipe]; in exynos_drm_crtc_finish_pageflip()
/linux-4.1.27/drivers/net/ethernet/micrel/
Dksz884x.c1468 struct dev_priv { struct
4642 struct dev_priv *priv = netdev_priv(dev); in send_packet()
4840 struct dev_priv *priv = netdev_priv(dev); in netdev_tx()
4914 struct dev_priv *priv = netdev_priv(dev); in netdev_tx_timeout()
4995 struct dev_priv *priv = netdev_priv(dev); in rx_proc()
5165 struct dev_priv *priv = netdev_priv(dev); in dev_rcv_special()
5249 struct dev_priv *priv = netdev_priv(dev); in netdev_intr()
5322 struct dev_priv *priv = netdev_priv(dev); in netdev_netpoll()
5362 struct dev_priv *priv = netdev_priv(dev); in netdev_close()
5449 struct dev_priv *priv = netdev_priv(dev); in prepare_hardware()
[all …]
/linux-4.1.27/drivers/gpu/drm/sti/
Dsti_compositor.c95 struct sti_drm_private *dev_priv = drm_dev->dev_private; in sti_compositor_bind() local
99 dev_priv->compo = compo; in sti_compositor_bind()
Dsti_drm_crtc.c247 struct sti_drm_private *dev_priv = dev->dev_private; in sti_drm_crtc_enable_vblank() local
248 struct sti_compositor *compo = dev_priv->compo; in sti_drm_crtc_enable_vblank()
/linux-4.1.27/include/media/
Dv4l2-subdev.h616 void *dev_priv; member
670 sd->dev_priv = p; in v4l2_set_subdevdata()
675 return sd->dev_priv; in v4l2_get_subdevdata()
/linux-4.1.27/drivers/media/v4l2-core/
Dv4l2-subdev.c583 sd->dev_priv = NULL; in v4l2_subdev_init()
/linux-4.1.27/Documentation/zh_CN/video4linux/
Dv4l2-framework.txt222 指针保存在 v4l2_subdev 的私有数据域(dev_priv)中。这使得通过 v4l2_subdev