34 	struct drm_psb_private *dev_priv = dev->dev_private;  in mid_get_fuse_settings()  local
58 		dev_priv->iLVDS_enable = fuse_value & FB_MIPI_DISABLE;  in mid_get_fuse_settings()
61 		 dev_priv->iLVDS_enable ? "LVDS display" : "MIPI display");  in mid_get_fuse_settings()
64 	 if (dev_priv->iLVDS_enable) {  in mid_get_fuse_settings()
65 		dev_priv->is_lvds_on = true;  in mid_get_fuse_settings()
66 		dev_priv->is_mipi_on = false;  in mid_get_fuse_settings()
68 		dev_priv->is_mipi_on = true;  in mid_get_fuse_settings()
69 		dev_priv->is_lvds_on = false;  in mid_get_fuse_settings()
72 	dev_priv->video_device_fuse = fuse_value;  in mid_get_fuse_settings()
80 	dev_priv->fuse_reg_value = fuse_value;  in mid_get_fuse_settings()
84 		dev_priv->core_freq = 200;  in mid_get_fuse_settings()
87 		dev_priv->core_freq = 100;  in mid_get_fuse_settings()
90 		dev_priv->core_freq = 166;  in mid_get_fuse_settings()
95 		dev_priv->core_freq = 0;  in mid_get_fuse_settings()
97 	dev_dbg(dev->dev, "LNC core clk is %dMHz.\n", dev_priv->core_freq);  in mid_get_fuse_settings()
104 static void mid_get_pci_revID(struct drm_psb_private *dev_priv)  in mid_get_pci_revID()  argument
114 	dev_priv->platform_rev_id = (uint8_t) platform_rev_id;  in mid_get_pci_revID()
116 	dev_dbg(dev_priv->dev->dev, "platform_rev_id is %x\n",  in mid_get_pci_revID()
117 					dev_priv->platform_rev_id);  in mid_get_pci_revID()
170 static int mid_get_vbt_data_r0(struct drm_psb_private *dev_priv, u32 addr)  in mid_get_vbt_data_r0()  argument
187 	dev_priv->gct_data.bpi = bpi;  in mid_get_vbt_data_r0()
188 	dev_priv->gct_data.pt = gct.PD.PanelType;  in mid_get_vbt_data_r0()
189 	dev_priv->gct_data.DTD = gct.panel[bpi].DTD;  in mid_get_vbt_data_r0()
190 	dev_priv->gct_data.Panel_Port_Control =  in mid_get_vbt_data_r0()
192 	dev_priv->gct_data.Panel_MIPI_Display_Descriptor =  in mid_get_vbt_data_r0()
198 static int mid_get_vbt_data_r1(struct drm_psb_private *dev_priv, u32 addr)  in mid_get_vbt_data_r1()  argument
215 	dev_priv->gct_data.bpi = bpi;  in mid_get_vbt_data_r1()
216 	dev_priv->gct_data.pt = gct.PD.PanelType;  in mid_get_vbt_data_r1()
217 	dev_priv->gct_data.DTD = gct.panel[bpi].DTD;  in mid_get_vbt_data_r1()
218 	dev_priv->gct_data.Panel_Port_Control =  in mid_get_vbt_data_r1()
220 	dev_priv->gct_data.Panel_MIPI_Display_Descriptor =  in mid_get_vbt_data_r1()
226 static int mid_get_vbt_data_r10(struct drm_psb_private *dev_priv, u32 addr)  in mid_get_vbt_data_r10()  argument
231 	struct oaktrail_timing_info *dp_ti = &dev_priv->gct_data.DTD;  in mid_get_vbt_data_r10()
249 	dev_priv->gct_data.bpi = vbt.primary_panel_idx;  in mid_get_vbt_data_r10()
250 	dev_priv->gct_data.Panel_MIPI_Display_Descriptor =  in mid_get_vbt_data_r10()
278 static void mid_get_vbt_data(struct drm_psb_private *dev_priv)  in mid_get_vbt_data()  argument
280 	struct drm_device *dev = dev_priv->dev;  in mid_get_vbt_data()
311 		ret = mid_get_vbt_data_r0(dev_priv, addr);  in mid_get_vbt_data()
314 		ret = mid_get_vbt_data_r1(dev_priv, addr);  in mid_get_vbt_data()
317 		ret = mid_get_vbt_data_r10(dev_priv, addr);  in mid_get_vbt_data()
327 		dev_priv->has_gct = true;  in mid_get_vbt_data()
332 	struct drm_psb_private *dev_priv = dev->dev_private;  in mid_chip_setup()  local
334 	mid_get_vbt_data(dev_priv);  in mid_chip_setup()
335 	mid_get_pci_revID(dev_priv);  in mid_chip_setup()