34 	struct drm_i915_private *dev_priv = dev->dev_private;  in i915_save_display()  local
38 		dev_priv->regfile.saveDSPARB = I915_READ(DSPARB);  in i915_save_display()
42 		dev_priv->regfile.saveLVDS = I915_READ(PCH_LVDS);  in i915_save_display()
44 		dev_priv->regfile.saveLVDS = I915_READ(LVDS);  in i915_save_display()
48 		dev_priv->regfile.savePP_CONTROL = I915_READ(PCH_PP_CONTROL);  in i915_save_display()
49 		dev_priv->regfile.savePP_ON_DELAYS = I915_READ(PCH_PP_ON_DELAYS);  in i915_save_display()
50 		dev_priv->regfile.savePP_OFF_DELAYS = I915_READ(PCH_PP_OFF_DELAYS);  in i915_save_display()
51 		dev_priv->regfile.savePP_DIVISOR = I915_READ(PCH_PP_DIVISOR);  in i915_save_display()
53 		dev_priv->regfile.savePP_CONTROL = I915_READ(PP_CONTROL);  in i915_save_display()
54 		dev_priv->regfile.savePP_ON_DELAYS = I915_READ(PP_ON_DELAYS);  in i915_save_display()
55 		dev_priv->regfile.savePP_OFF_DELAYS = I915_READ(PP_OFF_DELAYS);  in i915_save_display()
56 		dev_priv->regfile.savePP_DIVISOR = I915_READ(PP_DIVISOR);  in i915_save_display()
61 		dev_priv->regfile.saveFBC_CONTROL = I915_READ(FBC_CONTROL);  in i915_save_display()
66 	struct drm_i915_private *dev_priv = dev->dev_private;  in i915_restore_display()  local
71 		I915_WRITE(DSPARB, dev_priv->regfile.saveDSPARB);  in i915_restore_display()
77 		I915_WRITE(PCH_LVDS, dev_priv->regfile.saveLVDS & mask);  in i915_restore_display()
79 		I915_WRITE(LVDS, dev_priv->regfile.saveLVDS & mask);  in i915_restore_display()
83 		I915_WRITE(PCH_PP_ON_DELAYS, dev_priv->regfile.savePP_ON_DELAYS);  in i915_restore_display()
84 		I915_WRITE(PCH_PP_OFF_DELAYS, dev_priv->regfile.savePP_OFF_DELAYS);  in i915_restore_display()
85 		I915_WRITE(PCH_PP_DIVISOR, dev_priv->regfile.savePP_DIVISOR);  in i915_restore_display()
86 		I915_WRITE(PCH_PP_CONTROL, dev_priv->regfile.savePP_CONTROL);  in i915_restore_display()
88 		I915_WRITE(PP_ON_DELAYS, dev_priv->regfile.savePP_ON_DELAYS);  in i915_restore_display()
89 		I915_WRITE(PP_OFF_DELAYS, dev_priv->regfile.savePP_OFF_DELAYS);  in i915_restore_display()
90 		I915_WRITE(PP_DIVISOR, dev_priv->regfile.savePP_DIVISOR);  in i915_restore_display()
91 		I915_WRITE(PP_CONTROL, dev_priv->regfile.savePP_CONTROL);  in i915_restore_display()
99 		I915_WRITE(FBC_CONTROL, dev_priv->regfile.saveFBC_CONTROL);  in i915_restore_display()
106 	struct drm_i915_private *dev_priv = dev->dev_private;  in i915_save_state()  local
115 				     &dev_priv->regfile.saveGCDGMBUS);  in i915_save_state()
119 		dev_priv->regfile.saveCACHE_MODE_0 = I915_READ(CACHE_MODE_0);  in i915_save_state()
122 	dev_priv->regfile.saveMI_ARB_STATE = I915_READ(MI_ARB_STATE);  in i915_save_state()
126 		dev_priv->regfile.saveSWF0[i] = I915_READ(SWF00 + (i << 2));  in i915_save_state()
127 		dev_priv->regfile.saveSWF1[i] = I915_READ(SWF10 + (i << 2));  in i915_save_state()
130 		dev_priv->regfile.saveSWF2[i] = I915_READ(SWF30 + (i << 2));  in i915_save_state()
139 	struct drm_i915_private *dev_priv = dev->dev_private;  in i915_restore_state()  local
148 				      dev_priv->regfile.saveGCDGMBUS);  in i915_restore_state()
153 		I915_WRITE(CACHE_MODE_0, dev_priv->regfile.saveCACHE_MODE_0 |  in i915_restore_state()
157 	I915_WRITE(MI_ARB_STATE, dev_priv->regfile.saveMI_ARB_STATE | 0xffff0000);  in i915_restore_state()
160 		I915_WRITE(SWF00 + (i << 2), dev_priv->regfile.saveSWF0[i]);  in i915_restore_state()
161 		I915_WRITE(SWF10 + (i << 2), dev_priv->regfile.saveSWF1[i]);  in i915_restore_state()
164 		I915_WRITE(SWF30 + (i << 2), dev_priv->regfile.saveSWF2[i]);  in i915_restore_state()