Lines Matching refs:dev_priv
32 bool vmw_fifo_have_3d(struct vmw_private *dev_priv) in vmw_fifo_have_3d() argument
34 __le32 __iomem *fifo_mem = dev_priv->mmio_virt; in vmw_fifo_have_3d()
36 const struct vmw_fifo_state *fifo = &dev_priv->fifo; in vmw_fifo_have_3d()
38 if (!(dev_priv->capabilities & SVGA_CAP_3D)) in vmw_fifo_have_3d()
41 if (dev_priv->capabilities & SVGA_CAP_GBOBJECTS) { in vmw_fifo_have_3d()
44 if (!dev_priv->has_mob) in vmw_fifo_have_3d()
47 spin_lock(&dev_priv->cap_lock); in vmw_fifo_have_3d()
48 vmw_write(dev_priv, SVGA_REG_DEV_CAP, SVGA3D_DEVCAP_3D); in vmw_fifo_have_3d()
49 result = vmw_read(dev_priv, SVGA_REG_DEV_CAP); in vmw_fifo_have_3d()
50 spin_unlock(&dev_priv->cap_lock); in vmw_fifo_have_3d()
55 if (!(dev_priv->capabilities & SVGA_CAP_EXTENDED_FIFO)) in vmw_fifo_have_3d()
75 if (!dev_priv->sou_priv) in vmw_fifo_have_3d()
81 bool vmw_fifo_have_pitchlock(struct vmw_private *dev_priv) in vmw_fifo_have_pitchlock() argument
83 __le32 __iomem *fifo_mem = dev_priv->mmio_virt; in vmw_fifo_have_pitchlock()
86 if (!(dev_priv->capabilities & SVGA_CAP_EXTENDED_FIFO)) in vmw_fifo_have_pitchlock()
96 int vmw_fifo_init(struct vmw_private *dev_priv, struct vmw_fifo_state *fifo) in vmw_fifo_init() argument
98 __le32 __iomem *fifo_mem = dev_priv->mmio_virt; in vmw_fifo_init()
119 DRM_INFO("width %d\n", vmw_read(dev_priv, SVGA_REG_WIDTH)); in vmw_fifo_init()
120 DRM_INFO("height %d\n", vmw_read(dev_priv, SVGA_REG_HEIGHT)); in vmw_fifo_init()
121 DRM_INFO("bpp %d\n", vmw_read(dev_priv, SVGA_REG_BITS_PER_PIXEL)); in vmw_fifo_init()
123 dev_priv->enable_state = vmw_read(dev_priv, SVGA_REG_ENABLE); in vmw_fifo_init()
124 dev_priv->config_done_state = vmw_read(dev_priv, SVGA_REG_CONFIG_DONE); in vmw_fifo_init()
125 dev_priv->traces_state = vmw_read(dev_priv, SVGA_REG_TRACES); in vmw_fifo_init()
126 vmw_write(dev_priv, SVGA_REG_ENABLE, 1); in vmw_fifo_init()
129 if (dev_priv->capabilities & SVGA_CAP_EXTENDED_FIFO) in vmw_fifo_init()
130 min = vmw_read(dev_priv, SVGA_REG_MEM_REGS); in vmw_fifo_init()
137 iowrite32(dev_priv->mmio_size, fifo_mem + SVGA_FIFO_MAX); in vmw_fifo_init()
144 vmw_write(dev_priv, SVGA_REG_CONFIG_DONE, 1); in vmw_fifo_init()
155 atomic_set(&dev_priv->marker_seq, dev_priv->last_read_seqno); in vmw_fifo_init()
156 iowrite32(dev_priv->last_read_seqno, fifo_mem + SVGA_FIFO_FENCE); in vmw_fifo_init()
158 return vmw_fifo_send_fence(dev_priv, &dummy); in vmw_fifo_init()
161 void vmw_fifo_ping_host(struct vmw_private *dev_priv, uint32_t reason) in vmw_fifo_ping_host() argument
163 __le32 __iomem *fifo_mem = dev_priv->mmio_virt; in vmw_fifo_ping_host()
174 vmw_write(dev_priv, SVGA_REG_SYNC, reason); in vmw_fifo_ping_host()
179 void vmw_fifo_release(struct vmw_private *dev_priv, struct vmw_fifo_state *fifo) in vmw_fifo_release() argument
181 __le32 __iomem *fifo_mem = dev_priv->mmio_virt; in vmw_fifo_release()
183 vmw_write(dev_priv, SVGA_REG_SYNC, SVGA_SYNC_GENERIC); in vmw_fifo_release()
184 while (vmw_read(dev_priv, SVGA_REG_BUSY) != 0) in vmw_fifo_release()
187 dev_priv->last_read_seqno = ioread32(fifo_mem + SVGA_FIFO_FENCE); in vmw_fifo_release()
189 vmw_write(dev_priv, SVGA_REG_CONFIG_DONE, in vmw_fifo_release()
190 dev_priv->config_done_state); in vmw_fifo_release()
191 vmw_write(dev_priv, SVGA_REG_ENABLE, in vmw_fifo_release()
192 dev_priv->enable_state); in vmw_fifo_release()
193 vmw_write(dev_priv, SVGA_REG_TRACES, in vmw_fifo_release()
194 dev_priv->traces_state); in vmw_fifo_release()
209 static bool vmw_fifo_is_full(struct vmw_private *dev_priv, uint32_t bytes) in vmw_fifo_is_full() argument
211 __le32 __iomem *fifo_mem = dev_priv->mmio_virt; in vmw_fifo_is_full()
220 static int vmw_fifo_wait_noirq(struct vmw_private *dev_priv, in vmw_fifo_wait_noirq() argument
231 prepare_to_wait(&dev_priv->fifo_queue, &__wait, in vmw_fifo_wait_noirq()
234 if (!vmw_fifo_is_full(dev_priv, bytes)) in vmw_fifo_wait_noirq()
247 finish_wait(&dev_priv->fifo_queue, &__wait); in vmw_fifo_wait_noirq()
248 wake_up_all(&dev_priv->fifo_queue); in vmw_fifo_wait_noirq()
253 static int vmw_fifo_wait(struct vmw_private *dev_priv, in vmw_fifo_wait() argument
260 if (likely(!vmw_fifo_is_full(dev_priv, bytes))) in vmw_fifo_wait()
263 vmw_fifo_ping_host(dev_priv, SVGA_SYNC_FIFOFULL); in vmw_fifo_wait()
264 if (!(dev_priv->capabilities & SVGA_CAP_IRQMASK)) in vmw_fifo_wait()
265 return vmw_fifo_wait_noirq(dev_priv, bytes, in vmw_fifo_wait()
268 spin_lock(&dev_priv->waiter_lock); in vmw_fifo_wait()
269 if (atomic_add_return(1, &dev_priv->fifo_queue_waiters) > 0) { in vmw_fifo_wait()
270 spin_lock_irqsave(&dev_priv->irq_lock, irq_flags); in vmw_fifo_wait()
272 dev_priv->io_start + VMWGFX_IRQSTATUS_PORT); in vmw_fifo_wait()
273 dev_priv->irq_mask |= SVGA_IRQFLAG_FIFO_PROGRESS; in vmw_fifo_wait()
274 vmw_write(dev_priv, SVGA_REG_IRQMASK, dev_priv->irq_mask); in vmw_fifo_wait()
275 spin_unlock_irqrestore(&dev_priv->irq_lock, irq_flags); in vmw_fifo_wait()
277 spin_unlock(&dev_priv->waiter_lock); in vmw_fifo_wait()
281 (dev_priv->fifo_queue, in vmw_fifo_wait()
282 !vmw_fifo_is_full(dev_priv, bytes), timeout); in vmw_fifo_wait()
285 (dev_priv->fifo_queue, in vmw_fifo_wait()
286 !vmw_fifo_is_full(dev_priv, bytes), timeout); in vmw_fifo_wait()
293 spin_lock(&dev_priv->waiter_lock); in vmw_fifo_wait()
294 if (atomic_dec_and_test(&dev_priv->fifo_queue_waiters)) { in vmw_fifo_wait()
295 spin_lock_irqsave(&dev_priv->irq_lock, irq_flags); in vmw_fifo_wait()
296 dev_priv->irq_mask &= ~SVGA_IRQFLAG_FIFO_PROGRESS; in vmw_fifo_wait()
297 vmw_write(dev_priv, SVGA_REG_IRQMASK, dev_priv->irq_mask); in vmw_fifo_wait()
298 spin_unlock_irqrestore(&dev_priv->irq_lock, irq_flags); in vmw_fifo_wait()
300 spin_unlock(&dev_priv->waiter_lock); in vmw_fifo_wait()
315 void *vmw_fifo_reserve(struct vmw_private *dev_priv, uint32_t bytes) in vmw_fifo_reserve() argument
317 struct vmw_fifo_state *fifo_state = &dev_priv->fifo; in vmw_fifo_reserve()
318 __le32 __iomem *fifo_mem = dev_priv->mmio_virt; in vmw_fifo_reserve()
348 else if (vmw_fifo_is_full(dev_priv, bytes)) { in vmw_fifo_reserve()
349 ret = vmw_fifo_wait(dev_priv, bytes, in vmw_fifo_reserve()
361 ret = vmw_fifo_wait(dev_priv, bytes, in vmw_fifo_reserve()
439 void vmw_fifo_commit(struct vmw_private *dev_priv, uint32_t bytes) in vmw_fifo_commit() argument
441 struct vmw_fifo_state *fifo_state = &dev_priv->fifo; in vmw_fifo_commit()
442 __le32 __iomem *fifo_mem = dev_priv->mmio_virt; in vmw_fifo_commit()
481 vmw_fifo_ping_host(dev_priv, SVGA_SYNC_GENERIC); in vmw_fifo_commit()
485 int vmw_fifo_send_fence(struct vmw_private *dev_priv, uint32_t *seqno) in vmw_fifo_send_fence() argument
487 struct vmw_fifo_state *fifo_state = &dev_priv->fifo; in vmw_fifo_send_fence()
493 fm = vmw_fifo_reserve(dev_priv, bytes); in vmw_fifo_send_fence()
495 *seqno = atomic_read(&dev_priv->marker_seq); in vmw_fifo_send_fence()
497 (void)vmw_fallback_wait(dev_priv, false, true, *seqno, in vmw_fifo_send_fence()
503 *seqno = atomic_add_return(1, &dev_priv->marker_seq); in vmw_fifo_send_fence()
513 vmw_fifo_commit(dev_priv, 0); in vmw_fifo_send_fence()
522 vmw_fifo_commit(dev_priv, bytes); in vmw_fifo_send_fence()
524 vmw_update_seqno(dev_priv, fifo_state); in vmw_fifo_send_fence()
539 static int vmw_fifo_emit_dummy_legacy_query(struct vmw_private *dev_priv, in vmw_fifo_emit_dummy_legacy_query() argument
548 struct ttm_buffer_object *bo = dev_priv->dummy_query_bo; in vmw_fifo_emit_dummy_legacy_query()
554 cmd = vmw_fifo_reserve(dev_priv, sizeof(*cmd)); in vmw_fifo_emit_dummy_legacy_query()
574 vmw_fifo_commit(dev_priv, sizeof(*cmd)); in vmw_fifo_emit_dummy_legacy_query()
588 static int vmw_fifo_emit_dummy_gb_query(struct vmw_private *dev_priv, in vmw_fifo_emit_dummy_gb_query() argument
597 struct ttm_buffer_object *bo = dev_priv->dummy_query_bo; in vmw_fifo_emit_dummy_gb_query()
603 cmd = vmw_fifo_reserve(dev_priv, sizeof(*cmd)); in vmw_fifo_emit_dummy_gb_query()
618 vmw_fifo_commit(dev_priv, sizeof(*cmd)); in vmw_fifo_emit_dummy_gb_query()
642 int vmw_fifo_emit_dummy_query(struct vmw_private *dev_priv, in vmw_fifo_emit_dummy_query() argument
645 if (dev_priv->has_mob) in vmw_fifo_emit_dummy_query()
646 return vmw_fifo_emit_dummy_gb_query(dev_priv, cid); in vmw_fifo_emit_dummy_query()
648 return vmw_fifo_emit_dummy_legacy_query(dev_priv, cid); in vmw_fifo_emit_dummy_query()