| /linux-4.1.27/drivers/gpu/drm/amd/include/ |
| D | cik_structs.h | 28 uint32_t header;
29 uint32_t compute_dispatch_initiator;
30 uint32_t compute_dim_x;
31 uint32_t compute_dim_y;
32 uint32_t compute_dim_z;
33 uint32_t compute_start_x;
34 uint32_t compute_start_y;
35 uint32_t compute_start_z;
36 uint32_t compute_num_thread_x;
37 uint32_t compute_num_thread_y;
[all …]
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| D | kgd_kfd_interface.h | 134 uint32_t (*get_max_engine_clock_in_mhz)(struct kgd_dev *kgd);
137 void (*program_sh_mem_settings)(struct kgd_dev *kgd, uint32_t vmid,
138 uint32_t sh_mem_config, uint32_t sh_mem_ape1_base,
139 uint32_t sh_mem_ape1_limit, uint32_t sh_mem_bases);
144 int (*init_pipeline)(struct kgd_dev *kgd, uint32_t pipe_id,
145 uint32_t hpd_size, uint64_t hpd_gpu_addr);
147 int (*hqd_load)(struct kgd_dev *kgd, void *mqd, uint32_t pipe_id,
148 uint32_t queue_id, uint32_t __user *wptr);
153 uint32_t pipe_id, uint32_t queue_id);
155 int (*hqd_destroy)(struct kgd_dev *kgd, uint32_t reset_type,
[all …]
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| /linux-4.1.27/arch/mips/include/asm/octeon/ |
| D | cvmx-pciercx-defs.h | 110 uint32_t u32;
113 uint32_t devid:16;
114 uint32_t vendid:16;
116 uint32_t vendid:16;
117 uint32_t devid:16;
134 uint32_t u32;
137 uint32_t dpe:1;
138 uint32_t sse:1;
139 uint32_t rma:1;
140 uint32_t rta:1;
[all …]
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| D | cvmx-pci-defs.h | 118 uint32_t u32;
121 uint32_t reserved_18_31:14;
122 uint32_t addr_idx:14;
123 uint32_t ca:1;
124 uint32_t end_swp:2;
125 uint32_t addr_v:1;
127 uint32_t addr_v:1;
128 uint32_t end_swp:2;
129 uint32_t ca:1;
130 uint32_t addr_idx:14;
[all …]
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| D | octeon.h | 59 uint32_t desc_version;
60 uint32_t desc_size;
68 uint32_t exception_base_addr;
69 uint32_t stack_size;
70 uint32_t heap_size;
72 uint32_t argc;
73 uint32_t argv[OCTEON_ARGV_MAX_ARGS];
85 uint32_t flags;
86 uint32_t core_mask;
88 uint32_t dram_size;
[all …]
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| D | cvmx-bootinfo.h | 57 uint32_t major_version;
58 uint32_t minor_version;
65 uint32_t exception_base_addr;
66 uint32_t stack_size;
67 uint32_t flags;
68 uint32_t core_mask;
70 uint32_t dram_size;
72 uint32_t phy_mem_desc_addr;
74 uint32_t debugger_flags_base_addr;
77 uint32_t eclock_hz;
[all …]
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| D | cvmx-bootmem.h | 100 uint32_t lock;
102 uint32_t flags;
106 uint32_t major_version;
112 uint32_t minor_version;
118 uint32_t named_block_num_blocks;
121 uint32_t named_block_name_len;
125 uint32_t flags;
126 uint32_t lock;
129 uint32_t minor_version;
130 uint32_t major_version;
[all …]
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| D | cvmx-l2c.h | 178 void cvmx_l2c_config_perf(uint32_t counter, enum cvmx_l2c_event event, uint32_t clear_on_read);
188 uint64_t cvmx_l2c_read_perf(uint32_t counter);
199 int cvmx_l2c_get_core_way_partition(uint32_t core);
217 int cvmx_l2c_set_core_way_partition(uint32_t core, uint32_t mask);
243 int cvmx_l2c_set_hw_way_partition(uint32_t mask);
307 union cvmx_l2c_tag cvmx_l2c_get_tag(uint32_t association, uint32_t index);
310 static inline union cvmx_l2c_tag cvmx_get_l2c_tag(uint32_t association, uint32_t index) __attribute…
311 static inline union cvmx_l2c_tag cvmx_get_l2c_tag(uint32_t association, uint32_t index) in cvmx_get_l2c_tag()
324 uint32_t cvmx_l2c_address_to_index(uint64_t addr);
367 void cvmx_l2c_flush_line(uint32_t assoc, uint32_t index);
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| D | cvmx-sysinfo.h | 62 uint32_t stack_size;
64 uint32_t heap_size;
66 uint32_t core_mask;
68 uint32_t init_core;
74 uint32_t cpu_clock_hz;
77 uint32_t dram_data_rate_hz;
105 uint32_t dfa_ref_clock_hz;
107 uint32_t bootloader_config_flags;
150 uint32_t cpu_clock_hz);
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| D | cvmx-pip.h | 185 uint32_t dropped_octets;
187 uint32_t dropped_packets;
189 uint32_t pci_raw_packets;
191 uint32_t octets;
193 uint32_t packets;
199 uint32_t multicast_packets;
205 uint32_t broadcast_packets;
207 uint32_t len_64_packets;
209 uint32_t len_65_127_packets;
211 uint32_t len_128_255_packets;
[all …]
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| /linux-4.1.27/drivers/scsi/qla2xxx/ |
| D | qla_dbg.h | 59 uint32_t host_status;
60 uint32_t host_reg[32];
61 uint32_t shadow_reg[7];
63 uint32_t xseq_gp_reg[128];
64 uint32_t xseq_0_reg[16];
65 uint32_t xseq_1_reg[16];
66 uint32_t rseq_gp_reg[128];
67 uint32_t rseq_0_reg[16];
68 uint32_t rseq_1_reg[16];
69 uint32_t rseq_2_reg[16];
[all …]
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| D | qla_nx2.h | 242 uint32_t test_mask;
243 uint32_t test_value;
248 uint32_t test_mask;
249 uint32_t xor_value;
250 uint32_t or_value;
259 uint32_t arg1;
260 uint32_t arg2;
265 uint32_t dr_addr;
266 uint32_t dr_value;
267 uint32_t ar_addr;
[all …]
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| D | qla_tmpl.h | 14 uint32_t template_type;
15 uint32_t entry_offset;
16 uint32_t template_size;
17 uint32_t reserved_1;
19 uint32_t entry_count;
20 uint32_t template_version;
21 uint32_t capture_timestamp;
22 uint32_t template_checksum;
24 uint32_t reserved_2;
25 uint32_t driver_info[3];
[all …]
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| D | qla_fw.h | 107 uint32_t firmware_options_1;
108 uint32_t firmware_options_2;
109 uint32_t firmware_options_3;
172 uint32_t host_p;
203 uint32_t efi_parameters;
263 uint32_t checksum;
298 uint32_t request_q_address[2];
299 uint32_t response_q_address[2];
300 uint32_t prio_request_q_address[2];
308 uint32_t atio_q_address[2];
[all …]
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| D | qla_def.h | 98 #define MSW(x) ((uint16_t)((uint32_t)(x) >> 16))
100 #define LSD(x) ((uint32_t)((uint64_t)(x)))
101 #define MSD(x) ((uint32_t)((((uint64_t)(x)) >> 16) >> 16))
103 #define MAKE_HANDLE(x, y) ((uint32_t)((((uint32_t)(x)) << 16) | (uint32_t)(y)))
294 uint32_t request_sense_length;
295 uint32_t fw_sense_length;
331 uint32_t flags;
332 uint32_t data;
343 uint32_t req_len;
344 uint32_t rsp_len;
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| D | qla_gbl.h | 35 extern int qla2x00_load_risc(struct scsi_qla_host *, uint32_t *);
36 extern int qla24xx_load_risc(scsi_qla_host_t *, uint32_t *);
37 extern int qla81xx_load_risc(scsi_qla_host_t *, uint32_t *);
67 extern int qla2x00_async_tm_cmd(fc_port_t *, uint32_t, uint32_t, uint32_t);
81 extern int __qla83xx_set_idc_control(scsi_qla_host_t *, uint32_t);
82 extern int __qla83xx_get_idc_control(scsi_qla_host_t *, uint32_t *);
219 extern int qla2x00_start_bidir(srb_t *, struct scsi_qla_host *, uint32_t);
225 uint32_t *, uint16_t, struct qla_tgt_cmd *);
227 uint32_t *, uint16_t, struct qla_tgt_cmd *);
229 uint32_t *, uint16_t, struct qla_tgt_cmd *);
[all …]
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| D | qla_nx.h | 719 uint32_t int_vec_bit;
720 uint32_t tgt_status_reg;
721 uint32_t tgt_mask_reg;
722 uint32_t pci_int_reg;
801 uint32_t findex;
802 uint32_t num_entries;
803 uint32_t entry_size;
804 uint32_t reserved[5];
808 uint32_t findex;
809 uint32_t size;
[all …]
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| D | qla_target.h | 137 uint32_t sys_define_2; /* System defined. */
147 uint32_t srr_rel_offs;
156 uint32_t reserved;
166 uint32_t exchange_address;
167 uint32_t srr_rel_offs;
189 uint32_t reserved_5;
212 uint32_t sys_define_2; /* System defined. */
222 uint32_t srr_rel_offs;
231 uint32_t handle;
239 uint32_t exchange_address;
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| D | qla_mr.h | 24 uint32_t handle; /* System handle. */
49 uint32_t dseg_0_address[2]; /* Data segment 0 address. */
50 uint32_t dseg_0_len; /* Data segment 0 length. */
60 uint32_t handle; /* System handle. */
61 uint32_t reserved_3; /* System handle. */
74 uint32_t sense_len; /* FCP SENSE length. */
100 uint32_t reserved_0;
143 uint32_t handle; /* System handle. */
144 uint32_t reserved_0; /* System handle. */
150 uint32_t adapid; /* Adapter ID */
[all …]
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| D | qla_nx2.c | 19 uint32_t
26 qla8044_wr_reg(struct qla_hw_data *ha, ulong addr, uint32_t val) in qla8044_wr_reg()
33 const uint32_t crb_reg) in qla8044_rd_direct()
45 const uint32_t crb_reg, in qla8044_wr_direct()
46 const uint32_t value) in qla8044_wr_direct()
55 qla8044_set_win_base(scsi_qla_host_t *vha, uint32_t addr) in qla8044_set_win_base()
57 uint32_t val; in qla8044_set_win_base()
75 qla8044_rd_reg_indirect(scsi_qla_host_t *vha, uint32_t addr, uint32_t *data) in qla8044_rd_reg_indirect()
90 qla8044_wr_reg_indirect(scsi_qla_host_t *vha, uint32_t addr, uint32_t data) in qla8044_wr_reg_indirect()
115 uint32_t raddr, uint32_t waddr) in qla8044_read_write_crb_reg()
[all …]
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| D | qla_sup.c | 104 qla2x00_nvram_request(struct qla_hw_data *ha, uint32_t nv_cmd) in qla2x00_nvram_request()
153 qla2x00_get_nvram_word(struct qla_hw_data *ha, uint32_t addr) in qla2x00_get_nvram_word()
156 uint32_t nv_cmd; in qla2x00_get_nvram_word()
186 qla2x00_write_nvram_word(struct qla_hw_data *ha, uint32_t addr, uint16_t data) in qla2x00_write_nvram_word()
190 uint32_t nv_cmd, wait_cnt; in qla2x00_write_nvram_word()
243 qla2x00_write_nvram_word_tmo(struct qla_hw_data *ha, uint32_t addr, in qla2x00_write_nvram_word_tmo()
244 uint16_t data, uint32_t tmo) in qla2x00_write_nvram_word_tmo()
248 uint32_t nv_cmd; in qla2x00_write_nvram_word_tmo()
310 uint32_t word, wait_cnt; in qla2x00_clear_nvram_protection()
375 uint32_t word, wait_cnt; in qla2x00_set_nvram_protection()
[all …]
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| D | qla_bsg.h | 76 uint32_t start_addr;
79 uint32_t id;
85 uint32_t param0;
86 uint32_t param1;
90 uint32_t type;
99 uint32_t context;
146 uint32_t len; /* bytes in payload following this struct */
199 uint32_t count;
231 uint32_t addr;
232 uint32_t val;
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| /linux-4.1.27/drivers/gpu/drm/msm/mdp/mdp5/ |
| D | mdp5.xml.h | 153 static inline uint32_t MDSS_HW_VERSION_STEP(uint32_t val) in MDSS_HW_VERSION_STEP()
159 static inline uint32_t MDSS_HW_VERSION_MINOR(uint32_t val) in MDSS_HW_VERSION_MINOR()
165 static inline uint32_t MDSS_HW_VERSION_MAJOR(uint32_t val) in MDSS_HW_VERSION_MAJOR()
177 static inline uint32_t __offset_MDP(uint32_t idx) in __offset_MDP()
184 static inline uint32_t REG_MDP5_MDP(uint32_t i0) { return 0x00000000 + __offset_MDP(i0); } in REG_MDP5_MDP()
186 static inline uint32_t REG_MDP5_MDP_HW_VERSION(uint32_t i0) { return 0x00000000 + __offset_MDP(i0);… in REG_MDP5_MDP_HW_VERSION()
189 static inline uint32_t MDP5_MDP_HW_VERSION_STEP(uint32_t val) in MDP5_MDP_HW_VERSION_STEP()
195 static inline uint32_t MDP5_MDP_HW_VERSION_MINOR(uint32_t val) in MDP5_MDP_HW_VERSION_MINOR()
201 static inline uint32_t MDP5_MDP_HW_VERSION_MAJOR(uint32_t val) in MDP5_MDP_HW_VERSION_MAJOR()
206 static inline uint32_t REG_MDP5_MDP_DISP_INTF_SEL(uint32_t i0) { return 0x00000004 + __offset_MDP(i… in REG_MDP5_MDP_DISP_INTF_SEL()
[all …]
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| D | mdp5_plane.c | 28 uint32_t reg_offset;
30 uint32_t flush_mask; /* used to commit pipe registers */
32 uint32_t nformats;
33 uint32_t formats[32];
43 uint32_t src_x, uint32_t src_y,
44 uint32_t src_w, uint32_t src_h);
284 uint32_t value = mdp5_read(mdp5_kms, REG_MDP5_PIPE_OP_MODE(pipe)) & in csc_disable()
294 uint32_t i, mode = 0; /* RGB, no CSC */ in csc_enable()
295 uint32_t *matrix; in csc_enable()
324 uint32_t *pre_clamp = csc->pre_clamp; in csc_enable()
[all …]
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| D | mdp5_cfg.h | 36 uint32_t base[MAX_BASES]
44 uint32_t nb_stages; /* number of stages per blender */
49 uint32_t flush_hw_mask; /* FLUSH register's hardware mask */
55 uint32_t clients[MAX_CLIENTS]; /* SMP port allocation /pipe */
63 uint32_t base[MAX_BASES];
82 uint32_t max_clk;
107 uint32_t major, uint32_t minor);
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| /linux-4.1.27/drivers/gpu/drm/amd/amdkfd/ |
| D | kfd_pm4_headers.h | 31 uint32_t reserved1:8; /* < reserved */
32 uint32_t opcode:8; /* < IT opcode */
33 uint32_t count:14; /* < number of DWORDs - 1
36 uint32_t type:2; /* < packet identifier.
40 uint32_t u32all;
57 uint32_t ordinal1;
62 uint32_t vmid_mask:16;
63 uint32_t unmap_latency:8;
64 uint32_t reserved1:5;
67 uint32_t ordinal2;
[all …]
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| D | kfd_topology.h | 45 uint32_t cpu_cores_count;
46 uint32_t simd_count;
47 uint32_t mem_banks_count;
48 uint32_t caches_count;
49 uint32_t io_links_count;
50 uint32_t cpu_core_id_base;
51 uint32_t simd_id_base;
52 uint32_t capability;
53 uint32_t max_waves_per_simd;
54 uint32_t lds_size_in_kb;
[all …]
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| D | kfd_crat.h | 48 uint32_t signature;
49 uint32_t length;
54 uint32_t oem_revision;
55 uint32_t creator_id;
56 uint32_t creator_revision;
57 uint32_t total_entries;
96 uint32_t flags;
97 uint32_t proximity_domain;
98 uint32_t processor_id_low;
129 uint32_t flags;
[all …]
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| D | kfd_priv.h | 120 uint32_t range_start;
121 uint32_t range_end;
123 uint32_t *cpu_ptr;
285 uint32_t priority;
286 uint32_t queue_percent;
287 uint32_t *read_ptr;
288 uint32_t *write_ptr;
289 uint32_t __iomem *doorbell_ptr;
290 uint32_t doorbell_off;
296 uint32_t sdma_engine_id;
[all …]
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| D | kfd_mqd_manager.h | 69 uint32_t pipe_id, uint32_t queue_id,
70 uint32_t __user *wptr);
77 unsigned int timeout, uint32_t pipe_id,
78 uint32_t queue_id);
84 uint64_t queue_address, uint32_t pipe_id,
85 uint32_t queue_id);
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| /linux-4.1.27/tools/firewire/ |
| D | nosy-dump.h | 14 uint32_t timestamp;
17 uint32_t zero:24;
18 uint32_t phy_id:6;
19 uint32_t identifier:2;
23 uint32_t zero:16;
24 uint32_t gap_count:6;
25 uint32_t set_gap_count:1;
26 uint32_t set_root:1;
27 uint32_t root_id:6;
28 uint32_t identifier:2;
[all …]
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| /linux-4.1.27/drivers/staging/octeon-usb/ |
| D | octeon-hcd.h | 113 uint32_t u32;
148 __BITFIELD_FIELD(uint32_t reserved_9_31 : 23,
149 __BITFIELD_FIELD(uint32_t ptxfemplvl : 1,
150 __BITFIELD_FIELD(uint32_t nptxfemplvl : 1,
151 __BITFIELD_FIELD(uint32_t reserved_6_6 : 1,
152 __BITFIELD_FIELD(uint32_t dmaen : 1,
153 __BITFIELD_FIELD(uint32_t hbstlen : 4,
154 __BITFIELD_FIELD(uint32_t glblintrmsk : 1,
167 uint32_t u32;
215 __BITFIELD_FIELD(uint32_t dfifodepth : 16,
[all …]
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| /linux-4.1.27/drivers/scsi/lpfc/ |
| D | lpfc_hw.h | 80 uint32_t Revision:8;
81 uint32_t InId:24;
83 uint32_t word;
89 uint32_t CmdRsp:16;
90 uint32_t Size:16;
92 uint32_t word;
113 uint32_t PortID;
121 uint32_t PortId; /* For RFT_ID requests */
124 uint32_t rsvd0:16;
125 uint32_t rsvd1:7;
[all …]
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| D | lpfc.h | 89 #define putPaddrLow(addr) ((uint32_t) (0xffffffff & (u64)(addr)))
90 #define putPaddrHigh(addr) ((uint32_t) (0xffffffff & (((u64)(addr))>>32)))
122 uint32_t buffer_tag; /* used for tagged queue ring */
127 uint32_t max_count;
128 uint32_t current_count;
134 uint32_t size;
135 uint32_t tag;
148 uint32_t status; /* vpd status value */
149 uint32_t length; /* number of bytes actually returned */
151 uint32_t rsvd1; /* Revision numbers */
[all …]
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| D | lpfc_bsg.h | 40 uint32_t command;
41 uint32_t type_mask;
42 uint32_t ev_req_id;
43 uint32_t ev_reg_id;
47 uint32_t command;
48 uint32_t ev_reg_id;
49 uint32_t ev_req_id;
53 uint32_t immed_data;
54 uint32_t type;
58 uint32_t command;
[all …]
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| D | lpfc_hw4.h | 59 uint32_t addr_lo;
60 uint32_t addr_hi;
64 uint32_t word0;
213 uint32_t w;
216 uint32_t bdeFlags:8; /* BDE Flags 0 IS A SUPPORTED
218 uint32_t bdeSize:24; /* Size of buffer (in bytes) */
220 uint32_t bdeSize:24; /* Size of buffer (in bytes) */
221 uint32_t bdeFlags:8; /* BDE Flags 0 IS A SUPPORTED
233 uint32_t addrLow;
234 uint32_t addrHigh;
[all …]
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| D | lpfc_sli.h | 61 uint32_t iocb_flag;
85 uint32_t drvrTimeout; /* driver timeout in seconds */
86 uint32_t fcp_wqidx; /* index to FCP work queue */
173 uint32_t local_getidx; /* last available cmd index (from cmdGetInx) */
174 uint32_t next_cmdidx; /* next_cmd index */
175 uint32_t rspidx; /* current index in response ring */
176 uint32_t cmdidx; /* current index in command ring */
181 uint32_t *cmdringaddr; /* virtual address for cmd rings */
182 uint32_t *rspringaddr; /* virtual address for rsp rings */
203 uint32_t fast_iotag; /* max fastlookup based iotag */
[all …]
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| D | lpfc_nl.h | 59 uint32_t event_type;
60 uint32_t payload_length; /* RSCN data length in bytes */
61 uint32_t rscn_payload[];
66 uint32_t event_type;
67 uint32_t subcategory;
82 uint32_t command;
83 uint32_t reason_code;
84 uint32_t explanation;
95 uint32_t event_type;
96 uint32_t subcategory;
[all …]
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| D | lpfc_sli4.h | 134 uint32_t entry_count; /* Number of entries to support on the queue */
135 uint32_t entry_size; /* Size of each queue entry. */
136 uint32_t entry_repost; /* Count of entries before doorbell is rung */
138 uint32_t queue_id; /* Queue ID assigned by the hardware */
139 uint32_t assoc_qid; /* Queue ID associated with, for CQ/WQ/MQ */
141 uint32_t page_count; /* Number of pages allocated for this queue */
142 uint32_t host_index; /* The host's index for putting or getting */
143 uint32_t hba_index; /* The last known hba index for get or put */
152 uint32_t q_cnt_1;
153 uint32_t q_cnt_2;
[all …]
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| D | lpfc_crtn.h | 31 void lpfc_config_async(struct lpfc_hba *, LPFC_MBOXQ_t *, uint32_t);
42 int lpfc_reg_rpi(struct lpfc_hba *, uint16_t, uint32_t, uint8_t *,
44 void lpfc_set_var(struct lpfc_hba *, LPFC_MBOXQ_t *, uint32_t, uint32_t);
45 void lpfc_unreg_login(struct lpfc_hba *, uint16_t, uint32_t, LPFC_MBOXQ_t *);
46 void lpfc_unreg_did(struct lpfc_hba *, uint16_t, uint32_t, LPFC_MBOXQ_t *);
53 void lpfc_init_link(struct lpfc_hba *, LPFC_MBOXQ_t *, uint32_t, uint32_t);
61 struct lpfc_vport *lpfc_find_vport_by_did(struct lpfc_hba *, uint32_t);
98 void lpfc_nlp_init(struct lpfc_vport *, struct lpfc_nodelist *, uint32_t);
102 struct lpfc_nodelist *lpfc_setup_disc_node(struct lpfc_vport *, uint32_t);
113 int lpfc_workq_post_event(struct lpfc_hba *, void *, void *, uint32_t);
[all …]
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| D | lpfc_nportdisc.c | 70 struct serv_parm *sp, uint32_t class, int flogi) in lpfc_check_sparm()
168 uint32_t *lp; in lpfc_check_elscmpl_iocb()
182 lp = (uint32_t *) prsp->virt; in lpfc_check_elscmpl_iocb()
183 ptr = (void *)((uint8_t *)lp + sizeof(uint32_t)); in lpfc_check_elscmpl_iocb()
280 uint32_t *lp; in lpfc_rcv_plogi()
316 lp = (uint32_t *) pcmd->virt; in lpfc_rcv_plogi()
317 sp = (struct serv_parm *) ((uint8_t *) lp + sizeof (uint32_t)); in lpfc_rcv_plogi()
517 uint32_t cmd; in lpfc_mbx_cmpl_resume_rpi()
546 uint32_t *lp; in lpfc_rcv_padisc()
547 uint32_t cmd; in lpfc_rcv_padisc()
[all …]
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| D | lpfc_scsi.h | 59 uint32_t rspRsvd1; /* FC Word 0, byte 0:3 */
60 uint32_t rspRsvd2; /* FC Word 1, byte 0:3 */
71 uint32_t rspResId; /* Residual xfer if residual count field set in
74 uint32_t rspSnsLen; /* Length of sense data in fcpSnsInfo */
76 uint32_t rspRspLen; /* Length of FCP response data in fcpRspInfo */
92 uint32_t rspInfoRsvd; /* FCP_RSP_INFO bytes 4-7 (reserved) */
122 uint32_t fcpDl; /* Total transfer length */
127 uint32_t cmd_count;
135 uint32_t timeout;
139 uint32_t result; /* From IOCB Word 4. */
[all …]
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| D | lpfc_compat.h | 40 uint32_t __iomem *dest32; in lpfc_memcpy_to_slim()
41 uint32_t *src32; in lpfc_memcpy_to_slim()
45 dest32 = (uint32_t __iomem *) dest; in lpfc_memcpy_to_slim()
46 src32 = (uint32_t *) src; in lpfc_memcpy_to_slim()
62 uint32_t *dest32; in lpfc_memcpy_from_slim()
63 uint32_t __iomem *src32; in lpfc_memcpy_from_slim()
67 dest32 = (uint32_t *) dest; in lpfc_memcpy_from_slim()
68 src32 = (uint32_t __iomem *) src; in lpfc_memcpy_from_slim()
86 __iowrite32_copy(dest, src, bytes / sizeof(uint32_t)); in lpfc_memcpy_to_slim()
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| D | lpfc_vport.h | 31 uint32_t api_versions;
56 uint32_t vports_max;
57 uint32_t vports_inuse;
58 uint32_t rpi_max;
59 uint32_t rpi_inuse;
65 uint32_t api_version;
67 uint32_t options;
106 uint32_t cmd;
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| /linux-4.1.27/drivers/gpu/drm/msm/mdp/mdp4/ |
| D | mdp4.xml.h | 112 static inline uint32_t MDP4_VERSION_MINOR(uint32_t val) in MDP4_VERSION_MINOR()
118 static inline uint32_t MDP4_VERSION_MAJOR(uint32_t val) in MDP4_VERSION_MAJOR()
140 static inline uint32_t MDP4_DISP_INTF_SEL_PRIM(enum mdp4_intf val) in MDP4_DISP_INTF_SEL_PRIM()
146 static inline uint32_t MDP4_DISP_INTF_SEL_SEC(enum mdp4_intf val) in MDP4_DISP_INTF_SEL_SEC()
152 static inline uint32_t MDP4_DISP_INTF_SEL_EXT(enum mdp4_intf val) in MDP4_DISP_INTF_SEL_EXT()
182 static inline uint32_t MDP4_LAYERMIXER2_IN_CFG_PIPE0(enum mdp_mixer_stage_id val) in MDP4_LAYERMIXER2_IN_CFG_PIPE0()
189 static inline uint32_t MDP4_LAYERMIXER2_IN_CFG_PIPE1(enum mdp_mixer_stage_id val) in MDP4_LAYERMIXER2_IN_CFG_PIPE1()
196 static inline uint32_t MDP4_LAYERMIXER2_IN_CFG_PIPE2(enum mdp_mixer_stage_id val) in MDP4_LAYERMIXER2_IN_CFG_PIPE2()
203 static inline uint32_t MDP4_LAYERMIXER2_IN_CFG_PIPE3(enum mdp_mixer_stage_id val) in MDP4_LAYERMIXER2_IN_CFG_PIPE3()
210 static inline uint32_t MDP4_LAYERMIXER2_IN_CFG_PIPE4(enum mdp_mixer_stage_id val) in MDP4_LAYERMIXER2_IN_CFG_PIPE4()
[all …]
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| D | mdp4_kms.h | 53 uint32_t blank_cursor_iova;
60 uint32_t max_clk;
73 static inline uint32_t pipe2flush(enum mdp4_pipe pipe) in pipe2flush()
84 static inline uint32_t ovlp2flush(int ovlp) in ovlp2flush()
93 static inline uint32_t dma2irq(enum mdp4_dma dma) in dma2irq()
103 static inline uint32_t dma2err(enum mdp4_dma dma) in dma2err()
113 static inline uint32_t mixercfg(uint32_t mixer_cfg, int mixer, in mixercfg()
170 void mdp4_set_irqmask(struct mdp_kms *mdp_kms, uint32_t irqmask);
192 uint32_t mdp4_get_formats(enum mdp4_pipe pipe_id, uint32_t *pixel_formats, in mdp4_get_formats()
193 uint32_t max_formats) in mdp4_get_formats()
[all …]
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| /linux-4.1.27/drivers/gpu/drm/msm/adreno/ |
| D | a4xx.xml.h | 180 static inline uint32_t A4XX_CGC_HLSQ_EARLY_CYC(uint32_t val) in A4XX_CGC_HLSQ_EARLY_CYC()
231 static inline uint32_t A4XX_RB_FRAME_BUFFER_DIMENSION_WIDTH(uint32_t val) in A4XX_RB_FRAME_BUFFER_DIMENSION_WIDTH()
237 static inline uint32_t A4XX_RB_FRAME_BUFFER_DIMENSION_HEIGHT(uint32_t val) in A4XX_RB_FRAME_BUFFER_DIMENSION_HEIGHT()
253 static inline uint32_t A4XX_RB_MODE_CONTROL_WIDTH(uint32_t val) in A4XX_RB_MODE_CONTROL_WIDTH()
259 static inline uint32_t A4XX_RB_MODE_CONTROL_HEIGHT(uint32_t val) in A4XX_RB_MODE_CONTROL_HEIGHT()
272 static inline uint32_t A4XX_RB_MSAA_CONTROL_SAMPLES(uint32_t val) in A4XX_RB_MSAA_CONTROL_SAMPLES()
285 static inline uint32_t A4XX_RB_RENDER_CONTROL2_MSAA_SAMPLES(uint32_t val) in A4XX_RB_RENDER_CONTROL2_MSAA_SAMPLES()
291 static inline uint32_t REG_A4XX_RB_MRT(uint32_t i0) { return 0x000020a4 + 0x5*i0; } in REG_A4XX_RB_MRT()
293 static inline uint32_t REG_A4XX_RB_MRT_CONTROL(uint32_t i0) { return 0x000020a4 + 0x5*i0; } in REG_A4XX_RB_MRT_CONTROL()
301 static inline uint32_t A4XX_RB_MRT_CONTROL_COMPONENT_ENABLE(uint32_t val) in A4XX_RB_MRT_CONTROL_COMPONENT_ENABLE()
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| D | a3xx.xml.h | 630 static inline uint32_t REG_A3XX_CP_PROTECT(uint32_t i0) { return 0x00000460 + 0x1*i0; } in REG_A3XX_CP_PROTECT()
632 static inline uint32_t REG_A3XX_CP_PROTECT_REG(uint32_t i0) { return 0x00000460 + 0x1*i0; } in REG_A3XX_CP_PROTECT_REG()
660 static inline uint32_t A3XX_GRAS_CL_GB_CLIP_ADJ_HORZ(uint32_t val) in A3XX_GRAS_CL_GB_CLIP_ADJ_HORZ()
666 static inline uint32_t A3XX_GRAS_CL_GB_CLIP_ADJ_VERT(uint32_t val) in A3XX_GRAS_CL_GB_CLIP_ADJ_VERT()
674 static inline uint32_t A3XX_GRAS_CL_VPORT_XOFFSET(float val) in A3XX_GRAS_CL_VPORT_XOFFSET()
682 static inline uint32_t A3XX_GRAS_CL_VPORT_XSCALE(float val) in A3XX_GRAS_CL_VPORT_XSCALE()
690 static inline uint32_t A3XX_GRAS_CL_VPORT_YOFFSET(float val) in A3XX_GRAS_CL_VPORT_YOFFSET()
698 static inline uint32_t A3XX_GRAS_CL_VPORT_YSCALE(float val) in A3XX_GRAS_CL_VPORT_YSCALE()
706 static inline uint32_t A3XX_GRAS_CL_VPORT_ZOFFSET(float val) in A3XX_GRAS_CL_VPORT_ZOFFSET()
714 static inline uint32_t A3XX_GRAS_CL_VPORT_ZSCALE(float val) in A3XX_GRAS_CL_VPORT_ZSCALE()
[all …]
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| D | a2xx.xml.h | 262 static inline uint32_t A2XX_MH_MMU_CONFIG_RB_W_CLNT_BEHAVIOR(enum adreno_mmu_clnt_beh val) in A2XX_MH_MMU_CONFIG_RB_W_CLNT_BEHAVIOR()
268 static inline uint32_t A2XX_MH_MMU_CONFIG_CP_W_CLNT_BEHAVIOR(enum adreno_mmu_clnt_beh val) in A2XX_MH_MMU_CONFIG_CP_W_CLNT_BEHAVIOR()
274 static inline uint32_t A2XX_MH_MMU_CONFIG_CP_R0_CLNT_BEHAVIOR(enum adreno_mmu_clnt_beh val) in A2XX_MH_MMU_CONFIG_CP_R0_CLNT_BEHAVIOR()
280 static inline uint32_t A2XX_MH_MMU_CONFIG_CP_R1_CLNT_BEHAVIOR(enum adreno_mmu_clnt_beh val) in A2XX_MH_MMU_CONFIG_CP_R1_CLNT_BEHAVIOR()
286 static inline uint32_t A2XX_MH_MMU_CONFIG_CP_R2_CLNT_BEHAVIOR(enum adreno_mmu_clnt_beh val) in A2XX_MH_MMU_CONFIG_CP_R2_CLNT_BEHAVIOR()
292 static inline uint32_t A2XX_MH_MMU_CONFIG_CP_R3_CLNT_BEHAVIOR(enum adreno_mmu_clnt_beh val) in A2XX_MH_MMU_CONFIG_CP_R3_CLNT_BEHAVIOR()
298 static inline uint32_t A2XX_MH_MMU_CONFIG_CP_R4_CLNT_BEHAVIOR(enum adreno_mmu_clnt_beh val) in A2XX_MH_MMU_CONFIG_CP_R4_CLNT_BEHAVIOR()
304 static inline uint32_t A2XX_MH_MMU_CONFIG_VGT_R0_CLNT_BEHAVIOR(enum adreno_mmu_clnt_beh val) in A2XX_MH_MMU_CONFIG_VGT_R0_CLNT_BEHAVIOR()
310 static inline uint32_t A2XX_MH_MMU_CONFIG_VGT_R1_CLNT_BEHAVIOR(enum adreno_mmu_clnt_beh val) in A2XX_MH_MMU_CONFIG_VGT_R1_CLNT_BEHAVIOR()
316 static inline uint32_t A2XX_MH_MMU_CONFIG_TC_R_CLNT_BEHAVIOR(enum adreno_mmu_clnt_beh val) in A2XX_MH_MMU_CONFIG_TC_R_CLNT_BEHAVIOR()
[all …]
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| D | adreno_pm4.xml.h | 217 static inline uint32_t CP_LOAD_STATE_0_DST_OFF(uint32_t val) in CP_LOAD_STATE_0_DST_OFF()
223 static inline uint32_t CP_LOAD_STATE_0_STATE_SRC(enum adreno_state_src val) in CP_LOAD_STATE_0_STATE_SRC()
229 static inline uint32_t CP_LOAD_STATE_0_STATE_BLOCK(enum adreno_state_block val) in CP_LOAD_STATE_0_STATE_BLOCK()
235 static inline uint32_t CP_LOAD_STATE_0_NUM_UNIT(uint32_t val) in CP_LOAD_STATE_0_NUM_UNIT()
243 static inline uint32_t CP_LOAD_STATE_1_STATE_TYPE(enum adreno_state_type val) in CP_LOAD_STATE_1_STATE_TYPE()
249 static inline uint32_t CP_LOAD_STATE_1_EXT_SRC_ADDR(uint32_t val) in CP_LOAD_STATE_1_EXT_SRC_ADDR()
257 static inline uint32_t CP_DRAW_INDX_0_VIZ_QUERY(uint32_t val) in CP_DRAW_INDX_0_VIZ_QUERY()
265 static inline uint32_t CP_DRAW_INDX_1_PRIM_TYPE(enum pc_di_primtype val) in CP_DRAW_INDX_1_PRIM_TYPE()
271 static inline uint32_t CP_DRAW_INDX_1_SOURCE_SELECT(enum pc_di_src_sel val) in CP_DRAW_INDX_1_SOURCE_SELECT()
277 static inline uint32_t CP_DRAW_INDX_1_VIS_CULL(enum pc_di_vis_cull_mode val) in CP_DRAW_INDX_1_VIS_CULL()
[all …]
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| D | adreno_common.xml.h | 157 static inline uint32_t AXXX_CP_RB_CNTL_BUFSZ(uint32_t val) in AXXX_CP_RB_CNTL_BUFSZ()
163 static inline uint32_t AXXX_CP_RB_CNTL_BLKSZ(uint32_t val) in AXXX_CP_RB_CNTL_BLKSZ()
169 static inline uint32_t AXXX_CP_RB_CNTL_BUF_SWAP(uint32_t val) in AXXX_CP_RB_CNTL_BUF_SWAP()
180 static inline uint32_t AXXX_CP_RB_RPTR_ADDR_SWAP(uint32_t val) in AXXX_CP_RB_RPTR_ADDR_SWAP()
186 static inline uint32_t AXXX_CP_RB_RPTR_ADDR_ADDR(uint32_t val) in AXXX_CP_RB_RPTR_ADDR_ADDR()
204 static inline uint32_t AXXX_CP_QUEUE_THRESHOLDS_CSQ_IB1_START(uint32_t val) in AXXX_CP_QUEUE_THRESHOLDS_CSQ_IB1_START()
210 static inline uint32_t AXXX_CP_QUEUE_THRESHOLDS_CSQ_IB2_START(uint32_t val) in AXXX_CP_QUEUE_THRESHOLDS_CSQ_IB2_START()
216 static inline uint32_t AXXX_CP_QUEUE_THRESHOLDS_CSQ_ST_START(uint32_t val) in AXXX_CP_QUEUE_THRESHOLDS_CSQ_ST_START()
224 static inline uint32_t AXXX_CP_MEQ_THRESHOLDS_MEQ_END(uint32_t val) in AXXX_CP_MEQ_THRESHOLDS_MEQ_END()
230 static inline uint32_t AXXX_CP_MEQ_THRESHOLDS_ROQ_END(uint32_t val) in AXXX_CP_MEQ_THRESHOLDS_ROQ_END()
[all …]
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| /linux-4.1.27/include/uapi/linux/ |
| D | fuse.h | 155 uint32_t atimensec;
156 uint32_t mtimensec;
157 uint32_t ctimensec;
158 uint32_t mode;
159 uint32_t nlink;
160 uint32_t uid;
161 uint32_t gid;
162 uint32_t rdev;
163 uint32_t blksize;
164 uint32_t padding;
[all …]
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| D | kfd_ioctl.h | 33 uint32_t major_version; /* from KFD */
34 uint32_t minor_version; /* from KFD */
51 uint32_t ring_size; /* to KFD */
52 uint32_t gpu_id; /* to KFD */
53 uint32_t queue_type; /* to KFD */
54 uint32_t queue_percentage; /* to KFD */
55 uint32_t queue_priority; /* to KFD */
56 uint32_t queue_id; /* from KFD */
65 uint32_t queue_id; /* to KFD */
66 uint32_t pad;
[all …]
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| D | wil6210_uapi.h | 75 uint32_t op; /* enum wil_memio_op */
76 uint32_t addr; /* should be 32-bit aligned */
77 uint32_t val;
81 uint32_t op; /* enum wil_memio_op */
82 uint32_t addr; /* should be 32-bit aligned */
83 uint32_t size; /* should be multiple of 4 */
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| D | rds.h | 120 uint32_t len;
129 uint32_t sndbuf;
134 uint32_t rcvbuf;
145 uint32_t last_sent_nxt;
146 uint32_t last_expected_una;
147 uint32_t last_seen_una;
157 uint32_t max_send_wr;
158 uint32_t max_recv_wr;
159 uint32_t max_send_sge;
160 uint32_t rdma_mr_max;
[all …]
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| /linux-4.1.27/include/uapi/drm/ |
| D | vmwgfx_drm.h | 112 uint32_t param;
113 uint32_t pad64;
135 uint32_t pad64;
177 uint32_t flags;
178 uint32_t format;
179 uint32_t mip_levels[DRM_VMW_MAX_SURFACE_FACES];
213 uint32_t width;
214 uint32_t height;
215 uint32_t depth;
216 uint32_t pad64;
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| D | nouveau_drm.h | 52 uint32_t handle;
53 uint32_t domain;
57 uint32_t tile_mode;
58 uint32_t tile_flags;
63 uint32_t channel_hint;
64 uint32_t align;
69 uint32_t valid;
70 uint32_t domain;
76 uint32_t handle;
77 uint32_t read_domains;
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| D | qxl_drm.h | 51 uint32_t size;
52 uint32_t handle; /* 0 is an invalid handle */
57 uint32_t handle;
58 uint32_t pad;
73 uint32_t src_handle; /* dest handle to compute address from */
74 uint32_t dst_handle; /* 0 if to command buffer */
75 uint32_t reloc_type;
76 uint32_t pad;
82 uint32_t type;
83 uint32_t command_size;
[all …]
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| D | msm_drm.h | 56 uint32_t pipe; /* in, MSM_PIPE_x */
57 uint32_t param; /* in, MSM_PARAM_x */
81 uint32_t flags; /* in, mask of MSM_BO_x */
82 uint32_t handle; /* out */
86 uint32_t handle; /* in */
87 uint32_t pad;
98 uint32_t handle; /* in */
99 uint32_t op; /* in, mask of MSM_PREP_x */
104 uint32_t handle; /* in */
123 uint32_t submit_offset; /* in, offset from submit_bo */
[all …]
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| D | omap_drm.h | 52 uint32_t bytes; /* (for non-tiled formats) */
61 uint32_t flags; /* in */
62 uint32_t handle; /* out */
63 uint32_t __pad;
73 uint32_t handle; /* buffer handle (in) */
74 uint32_t op; /* mask of omap_gem_op (in) */
78 uint32_t handle; /* buffer handle (in) */
79 uint32_t op; /* mask of omap_gem_op (in) */
84 uint32_t nregions;
85 uint32_t __pad;
[all …]
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| D | radeon_drm.h | 812 uint32_t handle;
813 uint32_t initial_domain;
814 uint32_t flags;
830 uint32_t flags;
831 uint32_t handle;
853 uint32_t handle;
854 uint32_t tiling_flags;
855 uint32_t pitch;
859 uint32_t handle;
860 uint32_t tiling_flags;
[all …]
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| D | armada_drm.h | 20 uint32_t handle;
21 uint32_t size;
27 uint32_t handle;
28 uint32_t pad;
38 uint32_t handle;
39 uint32_t offset;
40 uint32_t size;
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| /linux-4.1.27/drivers/scsi/arcmsr/ |
| D | arcmsr.h | 89 #define dma_addr_hi32(addr) (uint32_t) ((addr>>16)>>16)
90 #define dma_addr_lo32(addr) (uint32_t) (addr & 0xffffffff)
98 uint32_t HeaderLength;
100 uint32_t Timeout;
101 uint32_t ControlCode;
102 uint32_t ReturnCode;
103 uint32_t Length;
181 uint32_t data_len;
191 uint32_t signature; /*0, 00-03*/
192 uint32_t request_len; /*1, 04-07*/
[all …]
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| /linux-4.1.27/drivers/gpu/drm/msm/dsi/ |
| D | dsi.xml.h | 103 static inline uint32_t DSI_6G_HW_VERSION_MAJOR(uint32_t val) in DSI_6G_HW_VERSION_MAJOR()
109 static inline uint32_t DSI_6G_HW_VERSION_MINOR(uint32_t val) in DSI_6G_HW_VERSION_MINOR()
115 static inline uint32_t DSI_6G_HW_VERSION_STEP(uint32_t val) in DSI_6G_HW_VERSION_STEP()
146 static inline uint32_t DSI_VID_CFG0_VIRT_CHANNEL(uint32_t val) in DSI_VID_CFG0_VIRT_CHANNEL()
152 static inline uint32_t DSI_VID_CFG0_DST_FORMAT(enum dsi_vid_dst_format val) in DSI_VID_CFG0_DST_FORMAT()
158 static inline uint32_t DSI_VID_CFG0_TRAFFIC_MODE(enum dsi_traffic_mode val) in DSI_VID_CFG0_TRAFFIC_MODE()
175 static inline uint32_t DSI_VID_CFG1_RGB_SWAP(enum dsi_rgb_swap val) in DSI_VID_CFG1_RGB_SWAP()
183 static inline uint32_t DSI_ACTIVE_H_START(uint32_t val) in DSI_ACTIVE_H_START()
189 static inline uint32_t DSI_ACTIVE_H_END(uint32_t val) in DSI_ACTIVE_H_END()
197 static inline uint32_t DSI_ACTIVE_V_START(uint32_t val) in DSI_ACTIVE_V_START()
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| D | mmss_cc.xml.h | 55 static inline uint32_t __offset_CLK(enum mmss_cc_clk idx) in __offset_CLK()
63 static inline uint32_t REG_MMSS_CC_CLK(enum mmss_cc_clk i0) { return 0x00000000 + __offset_CLK(i0);… in REG_MMSS_CC_CLK()
65 static inline uint32_t REG_MMSS_CC_CLK_CC(enum mmss_cc_clk i0) { return 0x00000000 + __offset_CLK(i… in REG_MMSS_CC_CLK_CC()
71 static inline uint32_t MMSS_CC_CLK_CC_MND_MODE(uint32_t val) in MMSS_CC_CLK_CC_MND_MODE()
77 static inline uint32_t MMSS_CC_CLK_CC_PMXO_SEL(uint32_t val) in MMSS_CC_CLK_CC_PMXO_SEL()
82 static inline uint32_t REG_MMSS_CC_CLK_MD(enum mmss_cc_clk i0) { return 0x00000004 + __offset_CLK(i… in REG_MMSS_CC_CLK_MD()
85 static inline uint32_t MMSS_CC_CLK_MD_D(uint32_t val) in MMSS_CC_CLK_MD_D()
91 static inline uint32_t MMSS_CC_CLK_MD_M(uint32_t val) in MMSS_CC_CLK_MD_M()
96 static inline uint32_t REG_MMSS_CC_CLK_NS(enum mmss_cc_clk i0) { return 0x00000008 + __offset_CLK(i… in REG_MMSS_CC_CLK_NS()
99 static inline uint32_t MMSS_CC_CLK_NS_SRC(uint32_t val) in MMSS_CC_CLK_NS_SRC()
[all …]
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| /linux-4.1.27/drivers/net/ethernet/chelsio/cxgb3/ |
| D | cxgb3_ioctl.h | 53 uint32_t cmd;
54 uint32_t addr;
55 uint32_t val;
59 uint32_t cmd;
60 uint32_t cntxt_type;
61 uint32_t cntxt_id;
62 uint32_t data[4];
69 uint32_t cmd;
70 uint32_t queue_num;
71 uint32_t idx;
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| /linux-4.1.27/include/video/ |
| D | gbe.h | 14 volatile uint32_t ctrlstat; /* general control */
15 volatile uint32_t dotclock; /* dot clock PLL control */
16 volatile uint32_t i2c; /* crt I2C control */
17 volatile uint32_t sysclk; /* system clock PLL control */
18 volatile uint32_t i2cfp; /* flat panel I2C control */
19 volatile uint32_t id; /* device id/chip revision */
20 volatile uint32_t config; /* power on configuration [1] */
21 volatile uint32_t bist; /* internal bist status [1] */
22 uint32_t _pad0[0x010000/4 - 8];
23 volatile uint32_t vt_xy; /* current dot coords */
[all …]
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| /linux-4.1.27/drivers/scsi/mpt3sas/ |
| D | mpt3sas_ctl.h | 102 uint32_t ioc_number;
103 uint32_t port_number;
104 uint32_t max_data_size;
126 uint32_t device:5;
127 uint32_t function:3;
128 uint32_t bus:24;
130 uint32_t word;
132 uint32_t segment_id;
164 uint32_t adapter_type;
165 uint32_t port_number;
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| /linux-4.1.27/drivers/scsi/mpt2sas/ |
| D | mpt2sas_ctl.h | 98 uint32_t ioc_number;
99 uint32_t port_number;
100 uint32_t max_data_size;
122 uint32_t device:5;
123 uint32_t function:3;
124 uint32_t bus:24;
126 uint32_t word;
128 uint32_t segment_id;
160 uint32_t adapter_type;
161 uint32_t port_number;
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| /linux-4.1.27/include/linux/ |
| D | ioc4.h | 34 uint32_t raw;
36 uint32_t valid:1; /* Address captured */
37 uint32_t master_id:4; /* Unit causing error
45 uint32_t mul_err:1; /* Multiple errors occurred */
46 uint32_t addr:26; /* Bits 31-6 of error addr */
49 uint32_t pci_err_addr_h; /* Bits 63-32 of error addr */
51 uint32_t raw;
64 uint32_t raw;
66 uint32_t ata_int:1; /* ATA port passthru */
67 uint32_t ata_memerr:1; /* ATA halted by mem error */
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| D | pe.h | 45 uint32_t peaddr; /* address of pe header */
102 uint32_t magic; /* PE magic */
105 uint32_t timestamp; /* time_t */
106 uint32_t symbol_table; /* symbol table offset */
107 uint32_t symbols; /* number of symbols */
144 uint32_t text_size; /* size of text section(s) */
145 uint32_t data_size; /* size of data section(s) */
146 uint32_t bss_size; /* size of bss section(s) */
147 uint32_t entry_point; /* file offset of entry point */
148 uint32_t code_base; /* relative code addr in ram */
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| /linux-4.1.27/drivers/gpu/drm/radeon/ |
| D | smu7_discrete.h | 40 uint32_t RefClockFrequency;
41 uint32_t PmTimerP;
42 uint32_t FeatureEnables;
43 uint32_t PreVBlankGap;
44 uint32_t VBlankTimeout;
45 uint32_t TrainTimeGap;
47 uint32_t MvddSwitchTime;
48 uint32_t LongestAcpiTrainTime;
49 uint32_t AcpiDelay;
50 uint32_t G5TrainTime;
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| D | nislands_smc.h | 49 uint32_t TDPLimit;
50 uint32_t NearTDPLimit;
51 uint32_t SafePowerLimit;
52 uint32_t PowerBoostLimit;
58 uint32_t vCG_SPLL_FUNC_CNTL;
59 uint32_t vCG_SPLL_FUNC_CNTL_2;
60 uint32_t vCG_SPLL_FUNC_CNTL_3;
61 uint32_t vCG_SPLL_FUNC_CNTL_4;
62 uint32_t vCG_SPLL_SPREAD_SPECTRUM;
63 uint32_t vCG_SPLL_SPREAD_SPECTRUM_2;
[all …]
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| D | sislands_smc.h | 52 uint32_t dpm2Flags;
65 uint32_t SwitchDownCounter;
66 uint32_t SysScalingFactor;
73 uint32_t TDPLimit;
74 uint32_t NearTDPLimit;
75 uint32_t SafePowerLimit;
76 uint32_t PowerBoostLimit;
77 uint32_t MinLimitDelta;
83 uint32_t EstimatedDGPU_T;
84 uint32_t EstimatedDGPU_P;
[all …]
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| D | smu7_fusion.h | 41 uint32_t RefClockFrequency;
42 uint32_t PmTimerP;
43 uint32_t FeatureEnables;
44 uint32_t HandshakeDisables;
56 uint32_t AverageGraphicsA;
57 uint32_t AverageMemoryA;
58 uint32_t AverageGioA;
70 uint32_t DRAM_LOG_ADDR_H;
71 uint32_t DRAM_LOG_ADDR_L;
72 uint32_t DRAM_LOG_PHY_ADDR_H;
[all …]
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| D | smu7.h | 87 uint32_t Ki;
90 uint32_t StatePrecision;
91 uint32_t LfPrecision;
92 uint32_t LfOffset;
93 uint32_t MaxState;
94 uint32_t MaxLfFraction;
95 uint32_t StateShift;
122 uint32_t Digest[5];
123 uint32_t Version;
124 uint32_t HeaderSize;
[all …]
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| D | rv770_smc.h | 36 uint32_t vCG_SPLL_FUNC_CNTL;
37 uint32_t vCG_SPLL_FUNC_CNTL_2;
38 uint32_t vCG_SPLL_FUNC_CNTL_3;
39 uint32_t vCG_SPLL_SPREAD_SPECTRUM;
40 uint32_t vCG_SPLL_SPREAD_SPECTRUM_2;
41 uint32_t sclk_value;
48 uint32_t vMPLL_AD_FUNC_CNTL;
49 uint32_t vMPLL_AD_FUNC_CNTL_2;
50 uint32_t vMPLL_DQ_FUNC_CNTL;
51 uint32_t vMPLL_DQ_FUNC_CNTL_2;
[all …]
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| D | atom.h | 115 void (* reg_write)(struct card_info *, uint32_t, uint32_t); /* filled by driver */
116 uint32_t (* reg_read)(struct card_info *, uint32_t); /* filled by driver */
117 void (* ioreg_write)(struct card_info *, uint32_t, uint32_t); /* filled by driver */
118 uint32_t (* ioreg_read)(struct card_info *, uint32_t); /* filled by driver */
119 void (* mc_write)(struct card_info *, uint32_t, uint32_t); /* filled by driver */
120 uint32_t (* mc_read)(struct card_info *, uint32_t); /* filled by driver */
121 void (* pll_write)(struct card_info *, uint32_t, uint32_t); /* filled by driver */
122 uint32_t (* pll_read)(struct card_info *, uint32_t); /* filled by driver */
130 uint32_t cmd_table, data_table;
134 uint32_t fb_base;
[all …]
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| D | radeon_mode.h | 123 uint32_t mask_clk_reg;
124 uint32_t mask_data_reg;
125 uint32_t a_clk_reg;
126 uint32_t a_data_reg;
127 uint32_t en_clk_reg;
128 uint32_t en_data_reg;
129 uint32_t y_clk_reg;
130 uint32_t y_data_reg;
131 uint32_t mask_clk_mask;
132 uint32_t mask_data_mask;
[all …]
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| D | radeon_ucode.h | 157 uint32_t size_bytes; /* size of the entire header+image(s) in bytes */
158 uint32_t header_size_bytes; /* size of just the header in bytes */
163 uint32_t ucode_version;
164 uint32_t ucode_size_bytes; /* size of ucode in bytes */
165 uint32_t ucode_array_offset_bytes; /* payload offset from the start of the header */
166 uint32_t crc32; /* crc32 checksum of the payload */
172 uint32_t io_debug_size_bytes; /* size of debug array in dwords */
173 uint32_t io_debug_array_offset_bytes; /* payload offset from the start of the header */
179 uint32_t ucode_start_addr;
185 uint32_t ucode_feature_version;
[all …]
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| D | radeon_kfd.c | 53 static uint32_t get_max_engine_clock_in_mhz(struct kgd_dev *kgd);
60 static void kgd_program_sh_mem_settings(struct kgd_dev *kgd, uint32_t vmid,
61 uint32_t sh_mem_config, uint32_t sh_mem_ape1_base,
62 uint32_t sh_mem_ape1_limit, uint32_t sh_mem_bases);
67 static int kgd_init_pipeline(struct kgd_dev *kgd, uint32_t pipe_id,
68 uint32_t hpd_size, uint64_t hpd_gpu_addr);
70 static int kgd_hqd_load(struct kgd_dev *kgd, void *mqd, uint32_t pipe_id,
71 uint32_t queue_id, uint32_t __user *wptr);
74 uint32_t pipe_id, uint32_t queue_id);
76 static int kgd_hqd_destroy(struct kgd_dev *kgd, uint32_t reset_type,
[all …]
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| D | ppsmc.h | 172 #define PPSMC_MSG_DPM_Config ((uint32_t) 0x102)
173 #define PPSMC_MSG_DPM_ForceState ((uint32_t) 0x104)
174 #define PPSMC_MSG_PG_SIMD_Config ((uint32_t) 0x108)
175 #define PPSMC_MSG_Thermal_Cntl_Enable ((uint32_t) 0x10a)
176 #define PPSMC_MSG_Voltage_Cntl_Enable ((uint32_t) 0x109)
177 #define PPSMC_MSG_VCEPowerOFF ((uint32_t) 0x10e)
178 #define PPSMC_MSG_VCEPowerON ((uint32_t) 0x10f)
179 #define PPSMC_MSG_DPM_N_LevelsDisabled ((uint32_t) 0x112)
180 #define PPSMC_MSG_DCE_RemoveVoltageAdjustment ((uint32_t) 0x11d)
181 #define PPSMC_MSG_DCE_AllowVoltageAdjustment ((uint32_t) 0x11e)
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| D | radeon_bios.c | 293 uint32_t viph_control; in r700_read_disabled_bios()
294 uint32_t bus_cntl; in r700_read_disabled_bios()
295 uint32_t d1vga_control; in r700_read_disabled_bios()
296 uint32_t d2vga_control; in r700_read_disabled_bios()
297 uint32_t vga_render_control; in r700_read_disabled_bios()
298 uint32_t rom_cntl; in r700_read_disabled_bios()
299 uint32_t cg_spll_func_cntl = 0; in r700_read_disabled_bios()
300 uint32_t cg_spll_status; in r700_read_disabled_bios()
362 uint32_t viph_control; in r600_read_disabled_bios()
363 uint32_t bus_cntl; in r600_read_disabled_bios()
[all …]
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| D | radeon_asic.h | 34 uint32_t radeon_legacy_get_engine_clock(struct radeon_device *rdev);
35 void radeon_legacy_set_engine_clock(struct radeon_device *rdev, uint32_t eng_clock);
36 uint32_t radeon_legacy_get_memory_clock(struct radeon_device *rdev);
39 uint32_t radeon_atom_get_engine_clock(struct radeon_device *rdev);
40 void radeon_atom_set_engine_clock(struct radeon_device *rdev, uint32_t eng_clock);
41 uint32_t radeon_atom_get_memory_clock(struct radeon_device *rdev);
42 void radeon_atom_set_memory_clock(struct radeon_device *rdev, uint32_t mem_clock);
70 uint64_t r100_pci_gart_get_page_entry(uint64_t addr, uint32_t flags);
83 void r100_pll_wreg(struct radeon_device *rdev, uint32_t reg, uint32_t v);
84 uint32_t r100_pll_rreg(struct radeon_device *rdev, uint32_t reg);
[all …]
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| /linux-4.1.27/arch/mips/cavium-octeon/ |
| D | octeon_boot.h | 29 uint32_t app_start_func_addr;
31 uint32_t k0_val;
34 uint32_t flags; /* flags */
35 uint32_t pad;
41 uint32_t labi_signature;
42 uint32_t start_core0_addr;
43 uint32_t avail_coremask;
44 uint32_t pci_console_active;
45 uint32_t icache_prefetch_disable;
46 uint32_t padding;
[all …]
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| /linux-4.1.27/include/xen/interface/ |
| D | platform.h | 41 uint32_t secs;
42 uint32_t nsecs;
59 uint32_t type;
61 uint32_t handle;
62 uint32_t reg;
76 uint32_t handle;
77 uint32_t reg;
85 uint32_t reg;
89 uint32_t type;
97 uint32_t length; /* Length of microcode data. */
[all …]
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| D | xen-mca.h | 86 uint32_t mc_socketid; /* physical socket of the physical core */
89 uint32_t mc_apicid;
90 uint32_t mc_flags;
115 uint32_t mc_msrs; /* Number of msr with valid values. */
157 uint32_t mc_socketid;
179 uint32_t mi_nentries;
180 uint32_t flags;
190 uint32_t mc_cpunr;
191 uint32_t mc_chipid;
194 uint32_t mc_apicid;
[all …]
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| D | event_channel.h | 14 typedef uint32_t evtchn_port_t;
62 uint32_t virq;
63 uint32_t vcpu;
77 uint32_t pirq;
79 uint32_t flags; /* BIND_PIRQ__* */
92 uint32_t vcpu;
138 uint32_t status;
139 uint32_t vcpu; /* VCPU to which this channel is bound. */
148 uint32_t pirq; /* EVTCHNSTAT_pirq */
149 uint32_t virq; /* EVTCHNSTAT_virq */
[all …]
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| D | xen.h | 488 uint32_t version;
489 uint32_t pad0;
498 uint32_t tsc_to_system_mul;
618 uint32_t flags; /* SIF_xxx flags. */
620 uint32_t store_evtchn; /* Event channel for store communication. */
624 uint32_t evtchn; /* Event channel for console page. */
627 uint32_t info_off; /* Offset of console_info struct. */
628 uint32_t info_size; /* Size of console_info struct from start.*/
666 uint32_t mod_start;
668 uint32_t mod_end;
[all …]
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| D | physdev.h | 38 uint32_t irq;
69 uint32_t irq;
71 uint32_t flags; /* XENIRQSTAT_* */
89 uint32_t iopl;
100 uint32_t nr_ports;
112 uint32_t reg;
114 uint32_t value;
125 uint32_t irq;
127 uint32_t vector;
200 uint32_t cmd;
[all …]
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| D | grant_table.h | 90 typedef uint32_t grant_ref_t;
112 uint32_t frame;
201 uint32_t pad0;
230 uint32_t __spacer[4]; /* Pad to a power of two */
242 typedef uint32_t grant_handle_t;
265 uint32_t flags; /* GNTMAP_* */
310 uint32_t nr_frames;
402 uint32_t nr_frames;
403 uint32_t max_nr_frames;
440 uint32_t version;
[all …]
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| /linux-4.1.27/drivers/gpu/drm/msm/hdmi/ |
| D | hdmi.xml.h | 84 static inline uint32_t HDMI_ACR_PKT_CTRL_SELECT(enum hdmi_acr_cts val) in HDMI_ACR_PKT_CTRL_SELECT()
91 static inline uint32_t HDMI_ACR_PKT_CTRL_N_MULTIPLIER(uint32_t val) in HDMI_ACR_PKT_CTRL_N_MULTIPLIER()
118 static inline uint32_t HDMI_GEN_PKT_CTRL_GENERIC0_UPDATE(uint32_t val) in HDMI_GEN_PKT_CTRL_GENERIC0_UPDATE()
126 static inline uint32_t HDMI_GEN_PKT_CTRL_GENERIC0_LINE(uint32_t val) in HDMI_GEN_PKT_CTRL_GENERIC0_LINE()
132 static inline uint32_t HDMI_GEN_PKT_CTRL_GENERIC1_LINE(uint32_t val) in HDMI_GEN_PKT_CTRL_GENERIC1_LINE()
144 static inline uint32_t REG_HDMI_AVI_INFO(uint32_t i0) { return 0x0000006c + 0x4*i0; } in REG_HDMI_AVI_INFO()
148 static inline uint32_t REG_HDMI_GENERIC0(uint32_t i0) { return 0x00000088 + 0x4*i0; } in REG_HDMI_GENERIC0()
152 static inline uint32_t REG_HDMI_GENERIC1(uint32_t i0) { return 0x000000a8 + 0x4*i0; } in REG_HDMI_GENERIC1()
154 static inline uint32_t REG_HDMI_ACR(enum hdmi_acr_cts i0) { return 0x000000c4 + 0x8*i0; } in REG_HDMI_ACR()
156 static inline uint32_t REG_HDMI_ACR_0(enum hdmi_acr_cts i0) { return 0x000000c4 + 0x8*i0; } in REG_HDMI_ACR_0()
[all …]
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| /linux-4.1.27/drivers/gpu/drm/qxl/ |
| D | qxl_dev.h | 150 #define QXL_ROM_MAGIC (*(uint32_t *)"QXRO")
151 #define QXL_RAM_MAGIC (*(uint32_t *)"QXRA")
222 uint32_t top;
223 uint32_t left;
224 uint32_t bottom;
225 uint32_t right;
230 uint32_t magic;
231 uint32_t id;
232 uint32_t update_id;
233 uint32_t compression_level;
[all …]
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| /linux-4.1.27/drivers/scsi/qla4xxx/ |
| D | ql4_83xx.h | 90 static const uint32_t qla4_83xx_reg_tbl[] = {
233 uint32_t array[QLA83XX_MAX_RESET_SEQ_ENTRIES];
246 uint32_t select_addr;
247 uint32_t read_addr;
248 uint32_t select_value;
251 uint32_t poll_wait;
252 uint32_t poll_mask;
253 uint32_t data_size;
254 uint32_t rsvd_1;
259 uint32_t addr_1;
[all …]
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| D | ql4_glbl.h | 30 uint32_t offset, uint32_t len);
41 uint32_t *num_valid_ddb_entries,
42 uint32_t *next_ddb_index,
43 uint32_t *fw_ddb_device_state,
44 uint32_t *conn_err_detail,
49 dma_addr_t fw_ddb_entry_dma, uint32_t *mbx_sts);
50 uint8_t qla4xxx_get_ifcb(struct scsi_qla_host *ha, uint32_t *mbox_cmd,
51 uint32_t *mbox_sts, dma_addr_t init_fw_cb_dma);
57 int qla4xxx_set_acb(struct scsi_qla_host *ha, uint32_t *mbox_cmd,
58 uint32_t *mbox_sts, dma_addr_t acb_dma);
[all …]
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| D | ql4_fw.h | 200 static inline uint32_t set_rmask(uint32_t val) in set_rmask()
206 static inline uint32_t clr_rmask(uint32_t val) in clr_rmask()
278 uint32_t Asuint32_t;
312 uint32_t block_size;
313 uint32_t alt_block_size;
314 uint32_t flash_size;
315 uint32_t wrt_enable_data;
356 uint32_t code;
357 uint32_t size;
358 uint32_t start;
[all …]
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| D | ql4_def.h | 263 uint32_t mbox_cmd;
265 uint32_t pid;
272 uint32_t mbox_sts[MBOX_AEN_REG_COUNT];
289 uint32_t fw_ddb_device_state; /* F/W Device State -- see ql4_fw.h */
295 int (*ddb_change)(struct scsi_qla_host *ha, uint32_t fw_ddb_index,
296 struct ddb_entry *ddb_entry, uint32_t state);
310 uint32_t default_time2wait; /* Default Min time between
366 uint32_t data_size;
370 uint32_t status;
371 uint32_t pid;
[all …]
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| D | ql4_nx.h | 602 static const uint32_t qla4_82xx_reg_tbl[] = {
891 uint32_t entry_type;
892 uint32_t entry_size;
893 uint32_t entry_capture_size;
905 uint32_t addr;
911 uint32_t data_size;
912 uint32_t op_count;
921 uint32_t value_1;
922 uint32_t value_2;
923 uint32_t value_3;
[all …]
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| D | ql4_mbx.c | 15 void qla4xxx_queue_mbox_cmd(struct scsi_qla_host *ha, uint32_t *mbx_cmd, in qla4xxx_queue_mbox_cmd()
84 uint8_t outCount, uint32_t *mbx_cmd, in qla4xxx_mailbox_command()
85 uint32_t *mbx_sts) in qla4xxx_mailbox_command()
91 uint32_t dev_state; in qla4xxx_mailbox_command()
287 uint32_t mbox_cmd[MBOX_REG_COUNT]; in qla4xxx_get_minidump_template()
288 uint32_t mbox_sts[MBOX_REG_COUNT]; in qla4xxx_get_minidump_template()
318 uint32_t mbox_cmd[MBOX_REG_COUNT]; in qla4xxx_req_template_size()
319 uint32_t mbox_sts[MBOX_REG_COUNT]; in qla4xxx_req_template_size()
372 qla4xxx_set_ifcb(struct scsi_qla_host *ha, uint32_t *mbox_cmd, in qla4xxx_set_ifcb()
373 uint32_t *mbox_sts, dma_addr_t init_fw_cb_dma) in qla4xxx_set_ifcb()
[all …]
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| D | ql4_83xx.c | 16 uint32_t qla4_83xx_rd_reg(struct scsi_qla_host *ha, ulong addr) in qla4_83xx_rd_reg()
21 void qla4_83xx_wr_reg(struct scsi_qla_host *ha, ulong addr, uint32_t val) in qla4_83xx_wr_reg()
26 static int qla4_83xx_set_win_base(struct scsi_qla_host *ha, uint32_t addr) in qla4_83xx_set_win_base()
28 uint32_t val; in qla4_83xx_set_win_base()
42 int qla4_83xx_rd_reg_indirect(struct scsi_qla_host *ha, uint32_t addr, in qla4_83xx_rd_reg_indirect()
43 uint32_t *data) in qla4_83xx_rd_reg_indirect()
58 int qla4_83xx_wr_reg_indirect(struct scsi_qla_host *ha, uint32_t addr, in qla4_83xx_wr_reg_indirect()
59 uint32_t data) in qla4_83xx_wr_reg_indirect()
78 uint32_t lock_status = 0; in qla4_83xx_flash_lock()
108 int qla4_83xx_flash_read_u32(struct scsi_qla_host *ha, uint32_t flash_addr, in qla4_83xx_flash_read_u32()
[all …]
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| D | ql4_nx.c | 401 uint32_t qla4_82xx_rd_32(struct scsi_qla_host *ha, ulong off) in qla4_82xx_rd_32()
426 int qla4_82xx_md_rd_32(struct scsi_qla_host *ha, uint32_t off, uint32_t *data) in qla4_82xx_md_rd_32()
428 uint32_t win_read, off_value; in qla4_82xx_md_rd_32()
452 int qla4_82xx_md_wr_32(struct scsi_qla_host *ha, uint32_t off, uint32_t data) in qla4_82xx_md_wr_32()
454 uint32_t win_read, off_value; in qla4_82xx_md_wr_32()
1191 uint32_t *data, uint32_t count) in qla4_8xxx_ms_mem_write_128b()
1194 uint32_t agt_ctrl; in qla4_8xxx_ms_mem_write_128b()
1287 qla4_82xx_load_from_flash(struct scsi_qla_host *ha, uint32_t image_start) in qla4_82xx_load_from_flash()
1332 static int qla4_82xx_load_fw(struct scsi_qla_host *ha, uint32_t image_start) in qla4_82xx_load_fw()
1369 uint32_t temp; in qla4_82xx_pci_mem_read_2M()
[all …]
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| /linux-4.1.27/include/scsi/ |
| D | iscsi_if.h | 104 uint32_t type; /* k/u events type */
105 uint32_t iferror; /* carries interface or resource errors */
111 uint32_t initial_cmdsn;
117 uint32_t initial_cmdsn;
122 uint32_t sid;
125 uint32_t sid;
126 uint32_t cid;
129 uint32_t sid;
130 uint32_t cid;
132 uint32_t is_leading;
[all …]
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| D | scsi_transport_iscsi.h | 94 uint32_t sn);
97 uint32_t cid);
118 char *data, uint32_t data_size);
140 uint32_t enable, struct sockaddr *dst_addr);
143 uint32_t len);
149 int (*send_ping) (struct Scsi_Host *shost, uint32_t iface_num,
150 uint32_t iface_type, uint32_t payload_size,
151 uint32_t pid, struct sockaddr *dst_addr);
153 uint32_t *num_entries, char *buf);
187 char *data, uint32_t data_size);
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| D | libiscsi.h | 100 uint32_t data_length; /* copied from R2T */
101 uint32_t data_offset; /* copied from R2T */
181 uint32_t exp_statsn;
182 uint32_t statsn;
243 uint32_t scsicmd_pdus_cnt;
244 uint32_t dataout_pdus_cnt;
245 uint32_t scsirsp_pdus_cnt;
246 uint32_t datain_pdus_cnt;
247 uint32_t r2t_pdus_cnt;
248 uint32_t tmfcmd_pdus_cnt;
[all …]
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| /linux-4.1.27/arch/parisc/include/asm/ |
| D | hardware.h | 42 volatile uint32_t nothing; /* reg 0 */
43 volatile uint32_t io_eim;
44 volatile uint32_t io_dc_adata;
45 volatile uint32_t io_ii_cdata;
46 volatile uint32_t io_dma_link; /* reg 4 */
47 volatile uint32_t io_dma_command;
48 volatile uint32_t io_dma_address;
49 volatile uint32_t io_dma_count;
50 volatile uint32_t io_flex; /* reg 8 */
51 volatile uint32_t io_spa_address;
[all …]
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| /linux-4.1.27/drivers/gpu/drm/nouveau/dispnv04/ |
| D | disp.h | 28 uint32_t fb_start;
29 uint32_t crtc_cfg;
30 uint32_t cursor_cfg;
31 uint32_t gpio_ext;
32 uint32_t crtc_830;
33 uint32_t crtc_834;
34 uint32_t crtc_850;
35 uint32_t crtc_eng_ctrl;
38 uint32_t nv10_cursync;
40 uint32_t ramdac_gen_ctrl;
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| D | tvnv17.h | 33 uint32_t hfilter[4][7];
34 uint32_t hfilter2[4][7];
35 uint32_t vfilter[4][7];
37 uint32_t ptv_200;
38 uint32_t ptv_204;
39 uint32_t ptv_208;
40 uint32_t ptv_20c;
41 uint32_t ptv_304;
42 uint32_t ptv_500;
43 uint32_t ptv_504;
[all …]
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| /linux-4.1.27/drivers/gpu/drm/gma500/ |
| D | psb_drv.h | 338 uint32_t saveVCLK_DIVISOR_VGA0;
339 uint32_t saveVCLK_DIVISOR_VGA1;
340 uint32_t saveVCLK_POST_DIV;
341 uint32_t saveVGACNTRL;
342 uint32_t saveADPA;
343 uint32_t saveLVDS;
344 uint32_t saveDVOA;
345 uint32_t saveDVOB;
346 uint32_t saveDVOC;
347 uint32_t savePP_ON;
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| D | mmu.h | 32 uint32_t bif_ctrl;
44 uint32_t index;
45 uint32_t count;
47 uint32_t *v;
57 uint32_t pd_mask;
58 uint32_t invalid_pde;
59 uint32_t invalid_pte;
76 uint32_t num_pages);
78 uint32_t start_pfn,
80 uint32_t num_pages, int type);
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| D | mmu.c | 51 static inline uint32_t psb_mmu_pt_index(uint32_t offset) in psb_mmu_pt_index()
56 static inline uint32_t psb_mmu_pd_index(uint32_t offset) in psb_mmu_pd_index()
90 uint32_t val = PSB_RSGX32(PSB_CR_BIF_CTRL); in psb_mmu_flush_pd_locked()
116 uint32_t val; in psb_mmu_flush()
142 uint32_t offset = (hw_context == 0) ? PSB_CR_BIF_DIR_LIST_BASE0 : in psb_mmu_set_pd_context()
161 static inline uint32_t psb_mmu_mask_pte(uint32_t pfn, int type) in psb_mmu_mask_pte()
163 uint32_t mask = PSB_PTE_VALID; in psb_mmu_mask_pte()
179 uint32_t *v; in psb_mmu_alloc_pd()
206 for (i = 0; i < (PAGE_SIZE / sizeof(uint32_t)); ++i) in psb_mmu_alloc_pd()
212 for (i = 0; i < (PAGE_SIZE / sizeof(uint32_t)); ++i) in psb_mmu_alloc_pd()
[all …]
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| D | psb_intel_drv.h | 108 uint32_t saveBLC_PWM_CTL;
146 uint32_t saveDSPCNTR;
147 uint32_t savePIPECONF;
148 uint32_t savePIPESRC;
149 uint32_t saveDPLL;
150 uint32_t saveFP0;
151 uint32_t saveFP1;
152 uint32_t saveHTOTAL;
153 uint32_t saveHBLANK;
154 uint32_t saveHSYNC;
[all …]
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| D | accel_2d.c | 86 uint32_t avail = PSB_RSGX32(PSB_CR_2D_SOCIF); in psb_2d_wait_available()
108 static int psbfb_2d_submit(struct drm_psb_private *dev_priv, uint32_t *cmdbuf, in psbfb_2d_submit()
173 uint32_t src_offset, uint32_t src_stride, in psb_accel_2d_copy()
174 uint32_t src_format, uint32_t dst_offset, in psb_accel_2d_copy()
175 uint32_t dst_stride, uint32_t dst_format, in psb_accel_2d_copy()
180 uint32_t blit_cmd; in psb_accel_2d_copy()
181 uint32_t buffer[10]; in psb_accel_2d_copy()
182 uint32_t *buf; in psb_accel_2d_copy()
183 uint32_t direction; in psb_accel_2d_copy()
247 uint32_t offset; in psbfb_copyarea_accel()
[all …]
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| /linux-4.1.27/drivers/gpu/drm/msm/edp/ |
| D | edp.xml.h | 82 static inline uint32_t EDP_CONFIGURATION_CTRL_LANES(uint32_t val) in EDP_CONFIGURATION_CTRL_LANES()
89 static inline uint32_t EDP_CONFIGURATION_CTRL_COLOR(enum edp_color_depth val) in EDP_CONFIGURATION_CTRL_COLOR()
101 static inline uint32_t EDP_TOTAL_HOR_VER_HORIZ(uint32_t val) in EDP_TOTAL_HOR_VER_HORIZ()
107 static inline uint32_t EDP_TOTAL_HOR_VER_VERT(uint32_t val) in EDP_TOTAL_HOR_VER_VERT()
115 static inline uint32_t EDP_START_HOR_VER_FROM_SYNC_HORIZ(uint32_t val) in EDP_START_HOR_VER_FROM_SYNC_HORIZ()
121 static inline uint32_t EDP_START_HOR_VER_FROM_SYNC_VERT(uint32_t val) in EDP_START_HOR_VER_FROM_SYNC_VERT()
129 static inline uint32_t EDP_HSYNC_VSYNC_WIDTH_POLARITY_HORIZ(uint32_t val) in EDP_HSYNC_VSYNC_WIDTH_POLARITY_HORIZ()
136 static inline uint32_t EDP_HSYNC_VSYNC_WIDTH_POLARITY_VERT(uint32_t val) in EDP_HSYNC_VSYNC_WIDTH_POLARITY_VERT()
145 static inline uint32_t EDP_ACTIVE_HOR_VER_HORIZ(uint32_t val) in EDP_ACTIVE_HOR_VER_HORIZ()
151 static inline uint32_t EDP_ACTIVE_HOR_VER_VERT(uint32_t val) in EDP_ACTIVE_HOR_VER_VERT()
[all …]
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| /linux-4.1.27/drivers/scsi/csiostor/ |
| D | csio_mb.h | 110 uint32_t n_req; /* number of mbox req */
111 uint32_t n_rsp; /* number of mbox rsp */
112 uint32_t n_activeq; /* number of mbox req active Q */
113 uint32_t n_cbfnq; /* number of mbox req cbfn Q */
114 uint32_t n_tmo; /* number of mbox timeout */
115 uint32_t n_cancel; /* number of mbox cancel */
116 uint32_t n_err; /* number of mbox error */
127 uint32_t tmo; /* Timeout */
137 uint32_t a_mbox; /* Async mbox num */
138 uint32_t intr_idx; /* Interrupt index */
[all …]
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| D | csio_lnode.h | 58 CSIO_LNE_NONE = (uint32_t)0,
79 uint32_t fka_adv;
80 uint32_t fcfi;
107 uint32_t n_link_up; /* Link down */
108 uint32_t n_link_down; /* Link up */
109 uint32_t n_err; /* error */
110 uint32_t n_err_nomem; /* memory not available */
111 uint32_t n_inval_parm; /* Invalid parameters */
112 uint32_t n_evt_unexp; /* unexpected event */
113 uint32_t n_evt_drop; /* dropped event */
[all …]
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| D | csio_scsi.h | 57 extern uint32_t csio_max_scan_tmo;
58 extern uint32_t csio_delta_scan_tmo;
96 uint32_t n_rn_nr_error; /* No. of remote-node-not-
99 uint32_t n_hw_nr_error; /* No. of hw-module-not-
102 uint32_t n_dmamap_error; /* No. of DMA map erros */
103 uint32_t n_unsupp_sge_error; /* No. of too-many-SGes
106 uint32_t n_no_req_error; /* No. of Out-of-ioreqs error */
107 uint32_t n_busy_error; /* No. of -EBUSY errors */
108 uint32_t n_hosterror; /* No. of FW_HOSTERROR I/O */
109 uint32_t n_rsperror; /* No. of response errors */
[all …]
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| D | csio_hw.h | 106 uint32_t intr_idx; /* MSIX Vector index */
214 uint32_t n_abort_req; /* Total abort request */
215 uint32_t n_abort_rsp; /* Total abort response */
216 uint32_t n_close_req; /* Total close request */
217 uint32_t n_close_rsp; /* Total close response */
218 uint32_t n_err; /* Total Errors */
219 uint32_t n_drop; /* Total request dropped */
220 uint32_t n_active; /* Count of active_q */
221 uint32_t n_cbfn; /* Count of cbfn_q */
254 uint32_t sf_size; /* serial flash
[all …]
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| D | csio_rnode.h | 42 CSIO_RNFE_NONE = (uint32_t)0, /* None */
61 uint32_t n_err; /* error */
62 uint32_t n_err_inval; /* invalid parameter */
63 uint32_t n_err_nomem; /* error nomem */
64 uint32_t n_evt_unexp; /* unexpected event */
65 uint32_t n_evt_drop; /* unexpected event */
66 uint32_t n_evt_fw[PROTO_ERR_IMPL_LOGO + 1]; /* fw events */
68 uint32_t n_lun_rst; /* Number of resets of
72 uint32_t n_lun_rst_fail; /* Number of LUN reset
75 uint32_t n_tgt_rst; /* Number of target resets */
[all …]
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| D | csio_wr.h | 158 uint32_t reserved6;
209 uint32_t eqid;
235 uint32_t len; /* Buffer size */
245 uint32_t nsge; /* Number of SG elements */
246 uint32_t tmo; /* Driver timeout */
247 uint32_t datadir; /* Data direction */
328 uint32_t size1;
330 uint32_t size2;
343 uint32_t totlen; /* Total length */
350 typedef void (*iq_handler_t)(struct csio_hw *, void *, uint32_t,
[all …]
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| /linux-4.1.27/scripts/dtc/libfdt/ |
| D | fdt.h | 7 uint32_t magic; /* magic word FDT_MAGIC */
8 uint32_t totalsize; /* total size of DT block */
9 uint32_t off_dt_struct; /* offset to structure */
10 uint32_t off_dt_strings; /* offset to strings */
11 uint32_t off_mem_rsvmap; /* offset to memory reserve map */
12 uint32_t version; /* format version */
13 uint32_t last_comp_version; /* last compatible version */
16 uint32_t boot_cpuid_phys; /* Which physical CPU id we're
19 uint32_t size_dt_strings; /* size of the strings block */
22 uint32_t size_dt_struct; /* size of the structure block */
[all …]
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| /linux-4.1.27/drivers/scsi/ |
| D | ips.h | 431 uint32_t lba;
432 uint32_t sg_addr;
436 uint32_t ccsar;
437 uint32_t cccr;
444 uint32_t reserved2;
445 uint32_t buffer_addr;
446 uint32_t reserved3;
447 uint32_t ccsar;
448 uint32_t cccr;
456 uint32_t reserved3;
[all …]
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| /linux-4.1.27/arch/tile/include/hv/ |
| D | drv_xgbe_impl.h | 115 volatile uint32_t __packet_write;
119 uint32_t __last_packet_plus_one;
182 volatile uint32_t __buffer_write;
186 uint32_t __last_buffer;
201 uint32_t __buffer_queue[NETIO_NUM_SIZES];
204 uint32_t __epp_location;
208 volatile uint32_t __acks_received;
210 volatile uint32_t __last_completion_rcv;
212 uint32_t __max_outstanding;
218 uint32_t __padding[3];
[all …]
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| D | drv_xgbe_intf.h | 173 uint32_t val0; /**< Value. Meaning depends upon the specific call. */
174 uint32_t val1; /**< Value. Meaning depends upon the specific call. */
178 int __netio_fastio0(uint32_t fastio_index);
180 int __netio_fastio1(uint32_t fastio_index, uint32_t arg0);
182 netio_fastio_rv3_t __netio_fastio3_rv3(uint32_t fastio_index, uint32_t arg0,
183 uint32_t arg1, uint32_t arg2);
185 int __netio_fastio4(uint32_t fastio_index, uint32_t arg0, uint32_t arg1,
186 uint32_t arg2, uint32_t arg3);
188 int __netio_fastio6(uint32_t fastio_index, uint32_t arg0, uint32_t arg1,
189 uint32_t arg2, uint32_t arg3, uint32_t arg4, uint32_t arg5);
[all …]
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| /linux-4.1.27/drivers/media/i2c/ |
| D | smiapp-pll.h | 33 uint32_t sys_clk_freq_hz;
34 uint32_t pix_clk_freq_hz;
54 uint32_t link_freq;
55 uint32_t ext_clk_freq_hz;
60 uint32_t pll_ip_clk_freq_hz;
61 uint32_t pll_op_clk_freq_hz;
65 uint32_t pixel_rate_csi;
66 uint32_t pixel_rate_pixel_array;
72 uint32_t min_sys_clk_freq_hz;
73 uint32_t max_sys_clk_freq_hz;
[all …]
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| D | smiapp-pll.c | 27 static inline uint32_t clk_div_even(uint32_t a) in clk_div_even()
29 return max_t(uint32_t, 1, a & ~1); in clk_div_even()
33 static inline uint32_t clk_div_even_up(uint32_t a) in clk_div_even_up()
40 static inline uint32_t is_one_or_even(uint32_t a) in is_one_or_even()
50 static int bounds_check(struct device *dev, uint32_t val, in bounds_check()
51 uint32_t min, uint32_t max, char *str) in bounds_check()
162 struct smiapp_pll *pll, struct smiapp_pll_branch *op_pll, uint32_t mul, in __smiapp_pll_calculate()
163 uint32_t div, uint32_t lane_op_clock_ratio) in __smiapp_pll_calculate()
165 uint32_t sys_div; in __smiapp_pll_calculate()
166 uint32_t best_pix_div = INT_MAX >> 1; in __smiapp_pll_calculate()
[all …]
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| /linux-4.1.27/fs/udf/ |
| D | udfdecl.h | 101 uint32_t block;
102 uint32_t volDescSeqNum;
161 struct kernel_lb_addr *, uint32_t *, sector_t *);
163 struct kernel_lb_addr *, uint32_t, int);
165 struct kernel_lb_addr *, uint32_t, int);
167 struct kernel_lb_addr, uint32_t);
169 struct kernel_lb_addr *, uint32_t *, int);
171 struct kernel_lb_addr *, uint32_t *, int);
176 extern struct genericFormat *udf_add_extendedattr(struct inode *, uint32_t,
177 uint32_t, uint8_t);
[all …]
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| D | partition.c | 29 uint32_t udf_get_pblock(struct super_block *sb, uint32_t block, in udf_get_pblock()
30 uint16_t partition, uint32_t offset) in udf_get_pblock()
46 uint32_t udf_get_pblock_virt15(struct super_block *sb, uint32_t block, in udf_get_pblock_virt15()
47 uint16_t partition, uint32_t offset) in udf_get_pblock_virt15()
50 uint32_t newblock; in udf_get_pblock_virt15()
51 uint32_t index; in udf_get_pblock_virt15()
52 uint32_t loc; in udf_get_pblock_virt15()
72 index = (sb->s_blocksize - vdata->s_start_offset) / sizeof(uint32_t); in udf_get_pblock_virt15()
75 newblock = 1 + (block / (sb->s_blocksize / sizeof(uint32_t))); in udf_get_pblock_virt15()
76 index = block % (sb->s_blocksize / sizeof(uint32_t)); in udf_get_pblock_virt15()
[all …]
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| /linux-4.1.27/fs/jffs2/ |
| D | jffs2_fs_sb.h | 51 uint32_t highest_ino;
52 uint32_t checked_ino;
63 uint32_t cleanmarker_size; /* Size of an _inline_ CLEANMARKER
66 uint32_t flash_size;
67 uint32_t used_size;
68 uint32_t dirty_size;
69 uint32_t wasted_size;
70 uint32_t free_size;
71 uint32_t erasing_size;
72 uint32_t bad_size;
[all …]
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| D | nodelist.h | 88 uint32_t flash_offset;
91 uint32_t __totlen; /* This may die; use ref_totlen(c, jeb, ) below */
174 uint32_t ino;
179 uint32_t pino_nlink; /* Directories store parent inode
216 uint32_t ofs; /* The offset to which the data of this node belongs */
217 uint32_t size;
218 uint32_t frags; /* Number of fragments which currently refer
232 uint32_t version;
233 uint32_t data_crc;
234 uint32_t partial_crc;
[all …]
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| D | compr.h | 54 uint32_t *srclen, uint32_t *destlen);
56 uint32_t cdatalen, uint32_t datalen);
60 uint32_t compr_buf_size; /* used by size compr. mode */
61 uint32_t stat_compr_orig_size;
62 uint32_t stat_compr_new_size;
63 uint32_t stat_compr_blocks;
64 uint32_t stat_decompr_blocks;
75 uint32_t *datalen, uint32_t *cdatalen);
79 unsigned char *data_out, uint32_t cdatalen, uint32_t datalen);
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| D | xattr.h | 33 uint32_t xid;
34 uint32_t version;
36 uint32_t data_crc;
37 uint32_t hashkey;
39 uint32_t name_len; /* length of xname */
41 uint32_t value_len; /* length of xvalue */
53 uint32_t xseqno;
56 uint32_t ino; /* only used in scanning/building */
60 uint32_t xid; /* only used in sccanning/building */
78 uint32_t xid, uint32_t version);
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| /linux-4.1.27/arch/ia64/include/asm/sn/ |
| D | ioc3.h | 9 uint32_t sscr;
10 uint32_t stpir;
11 uint32_t stcir;
12 uint32_t srpir;
13 uint32_t srcir;
14 uint32_t srtr;
15 uint32_t shadow;
56 uint32_t pci_id;
57 uint32_t pci_scr;
58 uint32_t pci_rev;
[all …]
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| /linux-4.1.27/include/linux/mfd/ |
| D | cros_ec_commands.h | 536 uint32_t version;
546 uint32_t in_data; /* Pass anything here */
550 uint32_t out_data; /* Output will be in_data + 0x01020304 */
567 uint32_t current_image; /* One of ec_current_image */
574 uint32_t offset; /* Starting value for read buffer */
575 uint32_t size; /* Size to read in bytes */
579 uint32_t data[32];
633 uint32_t version_mask;
651 uint32_t flags; /* Mask of enum ec_comms_status */
659 uint32_t ec_result;
[all …]
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| /linux-4.1.27/drivers/gpu/drm/via/ |
| D | via_dma.c | 57 *((uint32_t *)(vb)) = ((nReg) >> 2) | HALCYON_HEADER1; \
58 *((uint32_t *)(vb) + 1) = (nData); \
59 vb = ((uint32_t *)vb) + 2; \
82 static uint32_t via_cmdbuf_space(drm_via_private_t *dev_priv) in via_cmdbuf_space()
84 uint32_t agp_base = dev_priv->dma_offset + (uint32_t) dev_priv->agpAddr; in via_cmdbuf_space()
85 uint32_t hw_addr = *(dev_priv->hw_addr_ptr) - agp_base; in via_cmdbuf_space()
96 static uint32_t via_cmdbuf_lag(drm_via_private_t *dev_priv) in via_cmdbuf_lag()
98 uint32_t agp_base = dev_priv->dma_offset + (uint32_t) dev_priv->agpAddr; in via_cmdbuf_lag()
99 uint32_t hw_addr = *(dev_priv->hw_addr_ptr) - agp_base; in via_cmdbuf_lag()
113 uint32_t agp_base = dev_priv->dma_offset + (uint32_t) dev_priv->agpAddr; in via_cmdbuf_wait()
[all …]
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| D | via_verifier.h | 38 uint32_t z_addr;
39 uint32_t d_addr;
40 uint32_t t_addr[2][10];
41 uint32_t pitch[2][10];
42 uint32_t height[2][10];
43 uint32_t tex_level_lo[2];
44 uint32_t tex_level_hi[2];
45 uint32_t tex_palette_size[2];
46 uint32_t tex_npot[2];
52 uint32_t vertex_count;
[all …]
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| D | via_verifier.c | 238 eat_words(const uint32_t **buf, const uint32_t *buf_end, unsigned num_words) in eat_words()
305 uint32_t *addr, *pitch, *height, tex; in finish_current_sequence()
347 investigate_hazard(uint32_t cmd, hazard_t hz, drm_via_state_t *cur_seq) in investigate_hazard()
349 register uint32_t tmp, *tmp_addr; in investigate_hazard()
520 via_check_prim_list(uint32_t const **buffer, const uint32_t * buf_end, in via_check_prim_list()
525 uint32_t a_fire, bcmd, dw_count; in via_check_prim_list()
528 const uint32_t *buf = *buffer; in via_check_prim_list()
624 via_check_header2(uint32_t const **buffer, const uint32_t *buf_end, in via_check_header2()
627 uint32_t cmd; in via_check_header2()
630 const uint32_t *buf = *buffer; in via_check_header2()
[all …]
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| D | via_drv.h | 53 typedef uint32_t maskarray_t[5];
57 uint32_t pending_mask;
58 uint32_t enable_mask;
73 uint32_t dma_wrap;
74 volatile uint32_t *last_pause_ptr;
75 volatile uint32_t *hw_addr_ptr;
83 const uint32_t *fire_offsets[VIA_FIRE_BUF_SIZE];
84 uint32_t num_fire_offsets;
89 uint32_t irq_enable_mask;
90 uint32_t irq_pending_mask;
[all …]
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| /linux-4.1.27/fs/nfs/ |
| D | callback.h | 66 uint32_t bitmap[2];
71 uint32_t bitmap[2];
82 uint32_t truncate;
88 uint32_t rc_sequenceid;
89 uint32_t rc_slotid;
94 uint32_t rcl_nrefcalls;
101 uint32_t csa_sequenceid;
102 uint32_t csa_slotid;
103 uint32_t csa_highestslotid;
104 uint32_t csa_cachethis;
[all …]
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| /linux-4.1.27/drivers/gpu/drm/vmwgfx/ |
| D | vmwgfx_drv.h | 148 uint32_t *image;
156 uint32_t flags;
157 uint32_t format;
158 uint32_t mip_levels[DRM_VMW_MAX_SURFACE_FACES];
161 uint32_t num_sizes;
167 uint32_t multisample_count;
183 uint32_t capabilities;
192 uint32_t index;
209 uint32_t handle;
339 uint32_t cur_reloc;
[all …]
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| D | vmwgfx_fifo.c | 35 uint32_t fifo_min, hwversion; in vmw_fifo_have_3d()
42 uint32_t result; in vmw_fifo_have_3d()
84 uint32_t caps; in vmw_fifo_have_pitchlock()
99 uint32_t max; in vmw_fifo_init()
100 uint32_t min; in vmw_fifo_init()
101 uint32_t dummy; in vmw_fifo_init()
161 void vmw_fifo_ping_host(struct vmw_private *dev_priv, uint32_t reason) in vmw_fifo_ping_host()
209 static bool vmw_fifo_is_full(struct vmw_private *dev_priv, uint32_t bytes) in vmw_fifo_is_full()
212 uint32_t max = ioread32(fifo_mem + SVGA_FIFO_MAX); in vmw_fifo_is_full()
213 uint32_t next_cmd = ioread32(fifo_mem + SVGA_FIFO_NEXT_CMD); in vmw_fifo_is_full()
[all …]
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| D | vmwgfx_gmr.c | 45 uint32_t *cmd; in vmw_gmr2_bind()
46 uint32_t *cmd_orig; in vmw_gmr2_bind()
47 uint32_t define_size = sizeof(define_cmd) + sizeof(*cmd); in vmw_gmr2_bind()
48 uint32_t remap_num = num_pages / VMW_PPN_PER_REMAP + ((num_pages % VMW_PPN_PER_REMAP) > 0); in vmw_gmr2_bind()
49 uint32_t remap_size = VMW_PPN_SIZE * num_pages + (sizeof(remap_cmd) + sizeof(*cmd)) * remap_num; in vmw_gmr2_bind()
50 uint32_t remap_pos = 0; in vmw_gmr2_bind()
51 uint32_t cmd_size = define_size + remap_size; in vmw_gmr2_bind()
52 uint32_t i; in vmw_gmr2_bind()
110 uint32_t define_size = sizeof(define_cmd) + 4; in vmw_gmr2_unbind()
111 uint32_t *cmd; in vmw_gmr2_unbind()
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| /linux-4.1.27/arch/mips/include/asm/netlogic/ |
| D | haldefs.h | 45 static inline uint32_t
46 nlm_read_reg(uint64_t base, uint32_t reg) in nlm_read_reg()
48 volatile uint32_t *addr = (volatile uint32_t *)(long)base + reg; in nlm_read_reg()
54 nlm_write_reg(uint64_t base, uint32_t reg, uint32_t val) in nlm_write_reg()
56 volatile uint32_t *addr = (volatile uint32_t *)(long)base + reg; in nlm_write_reg()
71 nlm_read_reg64(uint64_t base, uint32_t reg) in nlm_read_reg64()
98 nlm_write_reg64(uint64_t base, uint32_t reg, uint64_t val) in nlm_write_reg64()
128 static inline uint32_t
129 nlm_read_reg_xkphys(uint64_t base, uint32_t reg) in nlm_read_reg_xkphys()
135 nlm_write_reg_xkphys(uint64_t base, uint32_t reg, uint32_t val) in nlm_write_reg_xkphys()
[all …]
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| /linux-4.1.27/arch/x86/pci/ |
| D | olpc.c | 45 static const uint32_t lxnb_hdr[] = { /* dev 1 function 0 - devfn = 8 */
58 static const uint32_t gxnb_hdr[] = { /* dev 1 function 0 - devfn = 8 */
71 static const uint32_t lxfb_hdr[] = { /* dev 1 function 1 - devfn = 9 */
84 static const uint32_t gxfb_hdr[] = { /* dev 1 function 1 - devfn = 9 */
97 static const uint32_t aes_hdr[] = { /* dev 1 function 2 - devfn = 0xa */
111 static const uint32_t isa_hdr[] = { /* dev f function 0 - devfn = 78 */
124 static const uint32_t ac97_hdr[] = { /* dev f function 3 - devfn = 7b */
137 static const uint32_t ohci_hdr[] = { /* dev f function 4 - devfn = 7c */
151 static const uint32_t ehci_hdr[] = { /* dev f function 4 - devfn = 7d */
169 static uint32_t ff_loc = ~0;
[all …]
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| /linux-4.1.27/drivers/gpu/drm/msm/mdp/ |
| D | mdp_kms.h | 33 void (*set_irqmask)(struct mdp_kms *mdp_kms, uint32_t irqmask);
44 uint32_t vblank_mask; /* irq bits set for userspace vblank */
68 uint32_t irqmask;
70 void (*irq)(struct mdp_irq *irq, uint32_t irqstatus);
73 void mdp_dispatch_irqs(struct mdp_kms *mdp_kms, uint32_t status);
74 void mdp_update_vblank_mask(struct mdp_kms *mdp_kms, uint32_t mask, bool enable);
75 void mdp_irq_wait(struct mdp_kms *mdp_kms, uint32_t irqmask);
97 uint32_t mdp_get_formats(uint32_t *formats, uint32_t max_formats, bool rgb_only);
98 const struct msm_format *mdp_get_format(struct msm_kms *kms, uint32_t format);
110 uint32_t matrix[9];
[all …]
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| /linux-4.1.27/drivers/gpu/drm/i915/ |
| D | i915_vgpu.h | 47 uint32_t vgt_id; /* ID of vGT instance */
48 uint32_t rsv1[12]; /* pad to offset 0x40 */
58 uint32_t base;
59 uint32_t size;
63 uint32_t base;
64 uint32_t size;
67 uint32_t fence_num;
68 uint32_t rsv2[3];
70 uint32_t rsv3[0x200 - 24]; /* pad to half page */
75 uint32_t rsv4;
[all …]
|
| D | i915_gem_gtt.h | 39 typedef uint32_t gen6_pte_t;
126 uint32_t pixel_format;
219 uint32_t pd_offset;
352 static inline uint32_t i915_pte_index(uint64_t address, uint32_t pde_shift) in i915_pte_index()
354 const uint32_t mask = NUM_PTE(pde_shift) - 1; in i915_pte_index()
363 static inline uint32_t i915_pte_count(uint64_t addr, size_t length, in i915_pte_count()
364 uint32_t pde_shift) in i915_pte_count()
380 static inline uint32_t i915_pde_index(uint64_t addr, uint32_t shift) in i915_pde_index()
385 static inline uint32_t gen6_pte_index(uint32_t addr) in gen6_pte_index()
390 static inline size_t gen6_pte_count(uint32_t addr, uint32_t length) in gen6_pte_count()
[all …]
|
| /linux-4.1.27/arch/mips/kvm/ |
| D | dyntrans.c | 31 int kvm_mips_trans_cache_index(uint32_t inst, uint32_t *opc, in kvm_mips_trans_cache_index()
36 uint32_t synci_inst = 0x0; in kvm_mips_trans_cache_index()
42 memcpy((void *)kseg0_opc, (void *)&synci_inst, sizeof(uint32_t)); in kvm_mips_trans_cache_index()
52 int kvm_mips_trans_cache_va(uint32_t inst, uint32_t *opc, in kvm_mips_trans_cache_va()
57 uint32_t synci_inst = SYNCI_TEMPLATE, base, offset; in kvm_mips_trans_cache_va()
67 memcpy((void *)kseg0_opc, (void *)&synci_inst, sizeof(uint32_t)); in kvm_mips_trans_cache_va()
73 int kvm_mips_trans_mfc0(uint32_t inst, uint32_t *opc, struct kvm_vcpu *vcpu) in kvm_mips_trans_mfc0()
76 uint32_t mfc0_inst; in kvm_mips_trans_mfc0()
99 memcpy((void *)kseg0_opc, (void *)&mfc0_inst, sizeof(uint32_t)); in kvm_mips_trans_mfc0()
103 memcpy((void *)opc, (void *)&mfc0_inst, sizeof(uint32_t)); in kvm_mips_trans_mfc0()
[all …]
|
| /linux-4.1.27/arch/frv/include/asm/ |
| D | mb86943a.h | 17 #define __reg_MB86943_sl_ctl *(volatile uint32_t *) (__region_CS1 + 0x00)
28 #define __reg_MB86943_ecs_ctl(N) *(volatile uint32_t *) (__region_CS1 + 0x08 + (0x08*(N)))
29 #define __reg_MB86943_ecs_range(N) *(volatile uint32_t *) (__region_CS1 + 0x20 + (0x10*(N)))
30 #define __reg_MB86943_ecs_base(N) *(volatile uint32_t *) (__region_CS1 + 0x28 + (0x10*(N)))
32 #define __reg_MB86943_sl_pci_io_range *(volatile uint32_t *) (__region_CS1 + 0x50)
33 #define __reg_MB86943_sl_pci_io_base *(volatile uint32_t *) (__region_CS1 + 0x58)
34 #define __reg_MB86943_sl_pci_mem_range *(volatile uint32_t *) (__region_CS1 + 0x60)
35 #define __reg_MB86943_sl_pci_mem_base *(volatile uint32_t *) (__region_CS1 + 0x68)
36 #define __reg_MB86943_pci_sl_io_base *(volatile uint32_t *) (__region_CS1 + 0x70)
37 #define __reg_MB86943_pci_sl_mem_base *(volatile uint32_t *) (__region_CS1 + 0x78)
[all …]
|
| D | cmpxchg.h | 53 extern uint32_t __xchg_32(uint32_t i, volatile void *v);
61 case 4: __xg_orig = (__typeof__(*(ptr))) __xchg_32((uint32_t) x, __xg_ptr); break; \
122 extern uint32_t __cmpxchg_32(uint32_t *v, uint32_t test, uint32_t new);
133 __cmpxchg_32((__force uint32_t *)__xg_ptr, \
134 (__force uint32_t)__xg_test, \
135 (__force uint32_t)__xg_new); break; \
|
| /linux-4.1.27/arch/blackfin/mach-bf609/ |
| D | pm.c | 90 uint32_t ulCGU_CTL;
91 uint32_t ulCGU_STAT;
92 uint32_t ulCGU_DIV;
93 uint32_t ulCGU_CLKOUTSEL;
94 uint32_t ulWUA_Flags;
95 uint32_t ulWUA_BootAddr;
96 uint32_t ulWUA_User;
97 uint32_t ulDDR_CTL;
98 uint32_t ulDDR_CFG;
99 uint32_t ulDDR_TR0;
[all …]
|
| /linux-4.1.27/arch/parisc/kernel/ |
| D | perf.c | 194 static int perf_config(uint32_t *image_ptr);
202 static int perf_stop_counters(uint32_t *raddr);
203 static const struct rdr_tbl_ent * perf_rdr_get_entry(uint32_t rdr_num);
204 static int perf_rdr_read_ubuf(uint32_t rdr_num, uint64_t *buffer);
205 static int perf_rdr_clear(uint32_t rdr_num);
207 static void perf_rdr_write(uint32_t rdr_num, uint64_t *buffer);
210 extern uint64_t perf_rdr_shift_in_W (uint32_t rdr_num, uint16_t width);
211 extern uint64_t perf_rdr_shift_in_U (uint32_t rdr_num, uint16_t width);
212 extern void perf_rdr_shift_out_W (uint32_t rdr_num, uint64_t buffer);
213 extern void perf_rdr_shift_out_U (uint32_t rdr_num, uint64_t buffer);
[all …]
|
| /linux-4.1.27/drivers/gpu/drm/msm/ |
| D | msm_gem.h | 30 uint32_t flags;
42 uint32_t read_fence, write_fence;
57 uint32_t iova;
76 static inline uint32_t msm_gem_fence(struct msm_gem_object *msm_obj, in msm_gem_fence()
77 uint32_t op) in msm_gem_fence()
79 uint32_t fence = 0; in msm_gem_fence()
101 uint32_t fence;
106 uint32_t type;
107 uint32_t size; /* in dwords */
108 uint32_t iova;
[all …]
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| D | msm_gpu.h | 45 int (*get_param)(struct msm_gpu *gpu, uint32_t param, uint64_t *value);
54 uint32_t (*last_fence)(struct msm_gpu *gpu);
75 uint32_t totaltime, activetime; /* sw counters */
76 uint32_t last_cntrs[5]; /* hw counters */
78 uint32_t num_perfcntrs;
81 uint32_t rb_iova;
86 uint32_t submitted_fence;
104 uint32_t fast_rate, slow_rate, bus_freq;
108 uint32_t bsc;
120 uint32_t hangcheck_fence;
[all …]
|
| D | msm_drv.h | 94 uint32_t next_fence, completed_fence;
109 uint32_t pending_crtcs;
143 uint32_t pixel_format;
149 uint32_t fence;
167 int msm_wait_fence_interruptable(struct drm_device *dev, uint32_t fence,
170 struct msm_fence_cb *cb, uint32_t fence);
171 void msm_update_fence(struct drm_device *dev, uint32_t fence);
182 uint32_t *iova);
183 int msm_gem_get_iova(struct drm_gem_object *obj, int id, uint32_t *iova);
184 uint32_t msm_gem_iova(struct drm_gem_object *obj, int id);
[all …]
|
| /linux-4.1.27/arch/powerpc/include/asm/ |
| D | opal.h | 40 int64_t opal_rtc_write(uint32_t year_month_day,
43 int64_t opal_tpo_write(uint64_t token, uint32_t year_mon_day,
44 uint32_t hour_min);
66 uint64_t offset, uint32_t data);
67 int64_t opal_set_xive(uint32_t isn, uint16_t server, uint8_t priority);
68 int64_t opal_get_xive(uint32_t isn, __be16 *server, uint8_t *priority);
80 int64_t opal_pci_err_inject(uint64_t phb_id, uint32_t pe_no, uint32_t type,
81 uint32_t func, uint64_t addr, uint64_t mask);
103 int64_t opal_pci_set_peltv(uint64_t phb_id, uint32_t parent_pe, uint32_t child_pe,
105 int64_t opal_pci_set_mve(uint64_t phb_id, uint32_t mve_number, uint32_t pe_number);
[all …]
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| D | hvcserver.h | 46 uint32_t unit_address;
47 uint32_t partition_ID;
52 extern int hvcs_get_partner_info(uint32_t unit_address,
54 extern int hvcs_register_connection(uint32_t unit_address,
55 uint32_t p_partition_ID, uint32_t p_unit_address);
56 extern int hvcs_free_connection(uint32_t unit_address);
|
| /linux-4.1.27/drivers/scsi/megaraid/ |
| D | megaraid_ioctl.h | 124 uint32_t opcode;
125 uint32_t adapno;
127 uint32_t xferlen;
128 uint32_t data_dir;
134 uint32_t user_data_len;
137 uint32_t pad_for_64bit_align;
188 uint32_t unique_id;
189 uint32_t host_no;
220 uint32_t uid;
238 uint32_t buf_size;
[all …]
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| D | mbox_defs.h | 166 uint32_t lba;
167 uint32_t xferaddr;
191 uint32_t xferaddr_lo;
192 uint32_t xferaddr_hi;
247 uint32_t dataxferaddr;
248 uint32_t dataxferlen;
253 uint32_t dataxferaddr_lo;
254 uint32_t dataxferaddr_hi;
303 uint32_t dataxferaddr;
304 uint32_t dataxferlen;
[all …]
|
| /linux-4.1.27/include/uapi/xen/ |
| D | gntdev.h | 38 uint32_t domid;
40 uint32_t ref;
53 uint32_t count;
54 uint32_t pad;
75 uint32_t count;
76 uint32_t pad;
101 uint32_t count;
102 uint32_t pad;
116 uint32_t count;
140 uint32_t action;
[all …]
|
| /linux-4.1.27/drivers/gpu/drm/armada/ |
| D | armada_crtc.h | 14 uint32_t offset;
15 uint32_t mask;
16 uint32_t val;
45 uint32_t spu_v_h_total;
46 uint32_t spu_v_porch;
47 uint32_t spu_adv_reg;
59 uint32_t cursor_hw_pos;
60 uint32_t cursor_hw_sz;
61 uint32_t cursor_w;
62 uint32_t cursor_h;
[all …]
|
| D | armada_drm.h | 22 armada_updatel(uint32_t val, uint32_t mask, void __iomem *ptr) in armada_updatel()
24 uint32_t ov, v; in armada_updatel()
32 static inline uint32_t armada_pitch(uint32_t width, uint32_t bpp) in armada_pitch()
34 uint32_t pitch = bpp != 4 ? width * ((bpp + 7) / 8) : width / 2; in armada_pitch()
63 uint32_t spu_adv_reg;
67 uint32_t *);
|
| /linux-4.1.27/drivers/tty/hvc/ |
| D | hvc_bfin_jtag.c | 27 static inline uint32_t bfin_write_emudat(uint32_t emudat) in bfin_write_emudat()
33 static inline uint32_t bfin_read_emudat(void) in bfin_read_emudat()
35 uint32_t emudat; in bfin_read_emudat()
41 static int hvc_bfin_put_chars(uint32_t vt, const char *buf, int count) in hvc_bfin_put_chars()
43 static uint32_t outbound_len; in hvc_bfin_put_chars()
44 uint32_t emudat; in hvc_bfin_put_chars()
56 ret = min(outbound_len, (uint32_t)4); in hvc_bfin_put_chars()
65 static int hvc_bfin_get_chars(uint32_t vt, char *buf, int count) in hvc_bfin_get_chars()
67 static uint32_t inbound_len; in hvc_bfin_get_chars()
68 uint32_t emudat; in hvc_bfin_get_chars()
[all …]
|
| /linux-4.1.27/include/xen/interface/io/ |
| D | pciif.h | 71 uint32_t cmd;
77 uint32_t domain; /* PCI Domain/Segment */
78 uint32_t bus;
79 uint32_t devfn;
86 uint32_t value;
88 uint32_t info;
96 uint32_t cmd;
101 uint32_t domain; /* PCI Domain/Segment*/
102 uint32_t bus;
103 uint32_t devfn;
[all …]
|
| /linux-4.1.27/fs/dlm/ |
| D | dlm_internal.h | 107 uint32_t flags;
122 uint32_t generation;
141 uint32_t flags;
220 uint32_t flags; /* DLM_CBF_ */
231 uint32_t lkb_id; /* our lock ID */
232 uint32_t lkb_remid; /* lock ID on remote partner */
233 uint32_t lkb_exflags; /* external flags from caller */
234 uint32_t lkb_sbflags; /* lksb flags */
235 uint32_t lkb_flags; /* internal flags */
236 uint32_t lkb_lvbseq; /* lvb sequence number */
[all …]
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| D | lock.h | 20 uint32_t saved_seq);
47 uint32_t flags, void *name, unsigned int namelen,
50 int mode, uint32_t flags, uint32_t lkid, char *lvb_in,
53 int mode, uint32_t flags, void *name, unsigned int namelen,
54 unsigned long timeout_cs, uint32_t *lkid);
56 uint32_t flags, uint32_t lkid, char *lvb_in);
58 uint32_t flags, uint32_t lkid);
61 int dlm_user_deadlock(struct dlm_ls *ls, uint32_t flags, uint32_t lkid);
|
| /linux-4.1.27/arch/powerpc/kernel/ |
| D | module_32.c | 84 uint32_t *x, *y, tmp; in relaswap()
87 y = (uint32_t *)_x; in relaswap()
88 x = (uint32_t *)_y; in relaswap()
90 for (i = 0; i < sizeof(Elf32_Rela) / sizeof(uint32_t); i++) { in relaswap()
182 static uint32_t do_plt_call(void *location, in do_plt_call()
199 if (entry_matches(entry, val)) return (uint32_t)entry; in do_plt_call()
209 return (uint32_t)entry; in do_plt_call()
221 uint32_t *location; in apply_relocate_add()
222 uint32_t value; in apply_relocate_add()
240 *(uint32_t *)location = value; in apply_relocate_add()
[all …]
|
| /linux-4.1.27/arch/blackfin/include/asm/ |
| D | bfrom.h | 36 static uint32_t (* const bfrom_SysControl)(uint32_t action_flags, ADI_SYSCTRL_VALUES *power_setting…
63 static uint32_t (* const bfrom_OtpCommand)(uint32_t command, uint32_t value) = (void *)0xEF000018;
64 static uint32_t (* const bfrom_OtpRead)(uint32_t page, uint32_t flags, uint64_t *page_content) = (v…
65 static uint32_t (* const bfrom_OtpWrite)(uint32_t page, uint32_t flags, uint64_t *page_content) = (…
|
| /linux-4.1.27/include/uapi/scsi/ |
| D | scsi_bsg_fc.h | 168 uint32_t status; /* See FC_CTELS_STATUS_xxx */
199 uint32_t preamble_word0; /* revision & IN_ID */
200 uint32_t preamble_word1; /* GS_Type, GS_SubType, Options, Rsvd */
201 uint32_t preamble_word2; /* Cmd Code, Max Size */
224 uint32_t vendor_cmd[0];
231 uint32_t vendor_rsp[0];
268 uint32_t preamble_word0; /* revision & IN_ID */
269 uint32_t preamble_word1; /* GS_Type, GS_SubType, Options, Rsvd */
270 uint32_t preamble_word2; /* Cmd Code, Max Size */
282 uint32_t msgcode;
[all …]
|
| /linux-4.1.27/drivers/gpu/drm/nouveau/ |
| D | nouveau_abi16.h | 46 uint32_t fb_ctxdma_handle;
47 uint32_t tt_ctxdma_handle;
50 uint32_t pushbuf_domains;
53 uint32_t notifier_handle;
57 uint32_t handle;
58 uint32_t grclass;
60 uint32_t nr_subchan;
69 uint32_t handle;
74 uint32_t channel;
75 uint32_t handle;
[all …]
|
| /linux-4.1.27/drivers/scsi/aic7xxx/aicasm/ |
| D | aicasm_insformat.h | 50 uint32_t immediate : 8,
57 uint32_t parity : 1,
69 uint32_t shift_control : 8,
76 uint32_t parity : 1,
88 uint32_t immediate : 8,
94 uint32_t parity : 1,
105 uint32_t opcode_ext : 8,
112 uint32_t parity : 1,
124 uint32_t opcode_ext : 8,
130 uint32_t parity : 1,
[all …]
|
| /linux-4.1.27/drivers/gpu/drm/tilcdc/ |
| D | tilcdc_drv.h | 57 uint32_t max_bandwidth;
62 uint32_t max_pixelclock;
67 uint32_t max_width;
128 uint32_t ac_bias;
131 uint32_t ac_bias_intrpt;
134 uint32_t dma_burst_sz;
137 uint32_t bpp;
140 uint32_t fdd;
149 uint32_t sync_edge;
152 uint32_t sync_ctrl;
[all …]
|
| /linux-4.1.27/include/linux/platform_data/ |
| D | video-msm_fb.h | 61 uint32_t caps;
68 void (*remote_write)(struct msm_mddi_client_data *, uint32_t val,
69 uint32_t reg);
70 uint32_t (*remote_read)(struct msm_mddi_client_data *, uint32_t reg);
116 void (*dma)(struct mdp_device *mpd, uint32_t addr,
117 uint32_t stride, uint32_t w, uint32_t h, uint32_t x,
118 uint32_t y, struct msmfb_callback *callback, int interface);
122 void (*set_grp_disp)(struct mdp_device *mdp, uint32_t disp_id);
|
| /linux-4.1.27/drivers/video/fbdev/msm/ |
| D | mdp_ppp.c | 31 uint32_t src0;
32 uint32_t src1;
33 uint32_t dst0;
34 uint32_t dst1;
35 uint32_t src_cfg;
36 uint32_t dst_cfg;
37 uint32_t src_pack;
38 uint32_t dst_pack;
39 uint32_t src_rect;
40 uint32_t dst_rect;
[all …]
|
| /linux-4.1.27/tools/power/cpupower/debug/i386/ |
| D | powernow-k8-decode.c | 28 static int get_fidvid(uint32_t cpu, uint32_t *fid, uint32_t *vid) in get_fidvid()
47 *fid = ((uint32_t )(msr & 0xffffffffull)) & MSR_S_LO_CURRENT_FID; in get_fidvid()
48 *vid = ((uint32_t )(msr>>32 & 0xffffffffull)) & MSR_S_HI_CURRENT_VID; in get_fidvid()
58 static uint32_t find_freq_from_fid(uint32_t fid) in find_freq_from_fid()
64 static uint32_t find_millivolts_from_vid(uint32_t vid) in find_millivolts_from_vid()
73 uint32_t fid, vid; in main()
|
| /linux-4.1.27/arch/x86/include/asm/xen/ |
| D | interface_32.h | 49 uint32_t ebx;
50 uint32_t ecx;
51 uint32_t edx;
52 uint32_t esi;
53 uint32_t edi;
54 uint32_t ebp;
55 uint32_t eax;
58 uint32_t eip;
62 uint32_t eflags; /* eflags.IF == !saved_upcall_mask */
63 uint32_t esp;
|
| /linux-4.1.27/include/trace/events/ |
| D | hswadsp.h | 22 TP_PROTO(uint32_t status, uint32_t mask),
250 __field( uint32_t, id )
251 __field( uint32_t, frequency )
252 __field( uint32_t, bitdepth )
253 __field( uint32_t, map )
254 __field( uint32_t, config )
255 __field( uint32_t, style )
272 (int) __entry->id, (uint32_t)__entry->frequency,
273 (uint32_t)__entry->bitdepth, (uint32_t)__entry->map,
274 (uint32_t)__entry->config, (uint32_t)__entry->style,
[all …]
|
| /linux-4.1.27/drivers/scsi/aic7xxx/ |
| D | aic7xxx_osm.h | 136 typedef uint32_t bus_size_t;
345 uint32_t xfer_len;
346 uint32_t sense_resid; /* Auto-Sense residual */
365 #define AHC_LINUX_NOIRQ ((uint32_t)~0)
366 uint32_t irq; /* IRQ for this adapter */
367 uint32_t bios_address;
474 uint32_t ahc_pci_read_config(ahc_dev_softc_t pci,
478 int reg, uint32_t value,
523 static inline void ahc_cmd_set_transaction_status(struct scsi_cmnd *, uint32_t);
524 static inline void ahc_set_transaction_status(struct scb *, uint32_t);
[all …]
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| D | aic79xx_osm.h | 118 extern uint32_t aic79xx_allow_memio;
123 typedef uint32_t bus_size_t;
341 uint32_t xfer_len;
342 uint32_t sense_resid; /* Auto-Sense residual */
360 #define AHD_LINUX_NOIRQ ((uint32_t)~0)
361 uint32_t irq; /* IRQ for this adapter */
362 uint32_t bios_address;
472 uint32_t ahd_pci_read_config(ahd_dev_softc_t pci,
475 int reg, uint32_t value,
512 static inline void ahd_cmd_set_transaction_status(struct scsi_cmnd *, uint32_t);
[all …]
|
| /linux-4.1.27/include/drm/ |
| D | drm_crtc.h | 59 uint32_t id;
60 uint32_t type;
211 uint32_t pixel_format; /* fourcc format */
233 uint32_t flags;
235 uint32_t num_values;
343 uint32_t handle, uint32_t width, uint32_t height);
345 uint32_t handle, uint32_t width, uint32_t height,
351 uint32_t start, uint32_t size);
369 uint32_t flags);
462 uint32_t gamma_size;
[all …]
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| D | drm_plane_helper.h | 98 uint32_t src_x, uint32_t src_y,
99 uint32_t src_w, uint32_t src_h);
108 uint32_t src_x, uint32_t src_y,
109 uint32_t src_w, uint32_t src_h);
|
| /linux-4.1.27/lib/xz/ |
| D | xz_dec_bcj.c | 45 uint32_t pos;
48 uint32_t x86_prev_mask;
97 uint32_t prev_mask = s->x86_prev_mask; in bcj_x86()
98 uint32_t src; in bcj_x86()
99 uint32_t dest; in bcj_x86()
100 uint32_t j; in bcj_x86()
132 dest = src - (s->pos + (uint32_t)i + 5); in bcj_x86()
141 src = dest ^ (((uint32_t)1 << (32 - j)) - 1); in bcj_x86()
145 dest |= (uint32_t)0 - (dest & 0x01000000); in bcj_x86()
163 uint32_t instr; in bcj_powerpc()
[all …]
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| D | xz_dec_lzma2.c | 75 uint32_t size;
81 uint32_t size_max;
88 uint32_t allocated;
96 uint32_t range;
97 uint32_t code;
103 uint32_t init_bytes_left;
134 uint32_t rep0;
135 uint32_t rep1;
136 uint32_t rep2;
137 uint32_t rep3;
[all …]
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| D | xz_crc32.c | 28 STATIC_RW_DATA uint32_t xz_crc32_table[256];
32 const uint32_t poly = 0xEDB88320; in xz_crc32_init()
34 uint32_t i; in xz_crc32_init()
35 uint32_t j; in xz_crc32_init()
36 uint32_t r; in xz_crc32_init()
49 XZ_EXTERN uint32_t xz_crc32(const uint8_t *buf, size_t size, uint32_t crc) in xz_crc32()
|
| /linux-4.1.27/arch/mips/include/asm/ |
| D | kvm_host.h | 381 uint32_t guest_inst;
404 uint32_t count_ctl;
406 uint32_t count_bias;
408 uint32_t count_hz;
431 uint32_t guest_user_asid[NR_CPUS];
432 uint32_t guest_kernel_asid[NR_CPUS];
623 uint32_t cause);
625 uint32_t cause);
656 uint32_t kvm_get_kernel_asid(struct kvm_vcpu *vcpu);
658 uint32_t kvm_get_user_asid(struct kvm_vcpu *vcpu);
[all …]
|
| /linux-4.1.27/drivers/gpu/drm/exynos/ |
| D | exynos_drm_plane.h | 16 uint32_t src_x, uint32_t src_y,
17 uint32_t src_w, uint32_t src_h);
21 uint32_t src_x, uint32_t src_y,
22 uint32_t src_w, uint32_t src_h);
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| /linux-4.1.27/sound/sh/ |
| D | aica.h | 61 uint32_t cmd; /* Command ID */
62 uint32_t pos; /* Sample position */
63 uint32_t length; /* Sample length */
64 uint32_t freq; /* Frequency */
65 uint32_t vol; /* Volume 0-255 */
66 uint32_t pan; /* Pan 0-255 */
67 uint32_t sfmt; /* Sound format */
68 uint32_t flags; /* Bit flags */
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| /linux-4.1.27/drivers/gpu/drm/omapdrm/ |
| D | omap_drv.h | 46 uint32_t rotation;
48 uint32_t crtc_w, crtc_h;
49 uint32_t src_x, src_y;
50 uint32_t src_w, src_h;
76 uint32_t irqmask;
78 void (*irq)(struct omap_drm_irq *irq, uint32_t irqstatus);
85 uint32_t irqmask, int count);
90 uint32_t omaprev;
122 uint32_t vblank_mask; /* irq bits set for userspace vblank */
199 uint32_t omap_framebuffer_get_formats(uint32_t *pixel_formats,
[all …]
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| D | omap_dmm_tiler.h | 92 uint32_t npages, uint32_t roll, bool wait);
103 dma_addr_t tiler_tsptr(struct tiler_block *block, uint32_t orient,
104 uint32_t x, uint32_t y);
105 uint32_t tiler_stride(enum tiler_fmt fmt, uint32_t orient);
109 uint32_t tiler_get_cpu_cache_flags(void);
115 static inline enum tiler_fmt gem2fmt(uint32_t flags) in gem2fmt()
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| /linux-4.1.27/drivers/crypto/qat/qat_common/ |
| D | adf_transport.c | 54 static inline uint32_t adf_modulo(uint32_t data, uint32_t shift) in adf_modulo()
56 uint32_t div = data >> shift; in adf_modulo()
57 uint32_t mult = div << shift; in adf_modulo()
69 static int adf_verify_ring_size(uint32_t msg_size, uint32_t msg_num) in adf_verify_ring_size()
80 static int adf_reserve_ring(struct adf_etr_bank_data *bank, uint32_t ring) in adf_reserve_ring()
92 static void adf_unreserve_ring(struct adf_etr_bank_data *bank, uint32_t ring) in adf_unreserve_ring()
99 static void adf_enable_ring_irq(struct adf_etr_bank_data *bank, uint32_t ring) in adf_enable_ring_irq()
109 static void adf_disable_ring_irq(struct adf_etr_bank_data *bank, uint32_t ring) in adf_disable_ring_irq()
117 int adf_send_message(struct adf_etr_ring_data *ring, uint32_t *msg) in adf_send_message()
139 uint32_t msg_counter = 0; in adf_handle_response()
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| D | adf_accel_devices.h | 127 uint32_t instances;
137 uint32_t (*get_accel_mask)(uint32_t fuse);
138 uint32_t (*get_ae_mask)(uint32_t fuse);
139 uint32_t (*get_misc_bar_id)(struct adf_hw_device_data *self);
140 uint32_t (*get_etr_bar_id)(struct adf_hw_device_data *self);
141 uint32_t (*get_num_aes)(struct adf_hw_device_data *self);
142 uint32_t (*get_num_accels)(struct adf_hw_device_data *self);
155 uint32_t pci_dev_id;
156 uint32_t fuses;
157 uint32_t accel_capabilities_mask;
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| /linux-4.1.27/include/asm-generic/ |
| D | div64.h | 26 uint32_t __base = (base); \
27 uint32_t __rem; \
35 extern uint32_t __div64_32(uint64_t *dividend, uint32_t divisor);
41 uint32_t __base = (base); \
42 uint32_t __rem; \
45 __rem = (uint32_t)(n) % __base; \
46 (n) = (uint32_t)(n) / __base; \
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| /linux-4.1.27/arch/mips/include/asm/vr41xx/ |
| D | pci.h | 26 uint32_t bus_base_address;
27 uint32_t address_mask;
28 uint32_t pci_base_address;
32 uint32_t address_mask;
33 uint32_t bus_base_address;
42 uint32_t base_address;
46 uint32_t base_address;
71 uint32_t pci_clock_max;
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| /linux-4.1.27/drivers/crypto/qat/qat_dh895xcc/ |
| D | adf_dh895xcc_hw_data.c | 53 static const uint32_t thrd_to_arb_map_sku4[] = {
59 static const uint32_t thrd_to_arb_map_sku6[] = {
71 static uint32_t get_accel_mask(uint32_t fuse) in get_accel_mask()
77 static uint32_t get_ae_mask(uint32_t fuse) in get_ae_mask()
82 static uint32_t get_num_accels(struct adf_hw_device_data *self) in get_num_accels()
84 uint32_t i, ctr = 0; in get_num_accels()
96 static uint32_t get_num_aes(struct adf_hw_device_data *self) in get_num_aes()
98 uint32_t i, ctr = 0; in get_num_aes()
110 static uint32_t get_misc_bar_id(struct adf_hw_device_data *self) in get_misc_bar_id()
115 static uint32_t get_etr_bar_id(struct adf_hw_device_data *self) in get_etr_bar_id()
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| /linux-4.1.27/drivers/gpu/drm/savage/ |
| D | savage_drv.h | 79 uint32_t vbaddr;
83 uint32_t texctrl, texaddr;
84 uint32_t scstart, new_scstart;
85 uint32_t scend, new_scend;
89 uint32_t texdescr, texaddr0, texaddr1;
90 uint32_t drawctrl0, new_drawctrl0;
91 uint32_t drawctrl1, new_drawctrl1;
168 volatile uint32_t *status_ptr, *bci_ptr;
169 uint32_t status_used_mask;
179 uint32_t hw_draw_ctrl, hw_zbuf_ctrl;
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| /linux-4.1.27/scripts/ |
| D | sortextable.c | 112 static uint32_t rbe(const uint32_t *x) in rbe()
124 static uint32_t rle(const uint32_t *x) in rle()
137 static void wbe(uint32_t val, uint32_t *x) in wbe()
149 static void wle(uint32_t val, uint32_t *x) in wle()
159 static uint32_t (*r)(const uint32_t *);
162 static void (*w)(uint32_t, uint32_t *);
218 uint32_t *loc = (uint32_t *)(extab_image + i); in sort_relative_table()
228 uint32_t *loc = (uint32_t *)(extab_image + i); in sort_relative_table()
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| /linux-4.1.27/include/uapi/linux/hsi/ |
| D | hsi_char.h | 51 uint32_t mode;
52 uint32_t flow;
53 uint32_t channels;
57 uint32_t mode;
58 uint32_t channels;
59 uint32_t speed;
60 uint32_t arb_mode;
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| /linux-4.1.27/Documentation/misc-devices/mei/ |
| D | mei-amt-version.c | 252 uint32_t count;
263 uint32_t command;
264 uint32_t length;
269 uint32_t status;
308 static uint32_t amt_verify_code_versions(const struct amt_host_if_resp_header *resp) in amt_verify_code_versions()
310 uint32_t status = AMT_STATUS_SUCCESS; in amt_verify_code_versions()
313 uint32_t ver_type_cnt; in amt_verify_code_versions()
314 uint32_t len; in amt_verify_code_versions()
315 uint32_t i; in amt_verify_code_versions()
319 code_ver_len = resp->header.length - sizeof(uint32_t); in amt_verify_code_versions()
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| /linux-4.1.27/net/batman-adv/ |
| D | hash.h | 33 typedef uint32_t (*batadv_hashdata_choose_cb)(const void *, uint32_t);
39 uint32_t size; /* size of hashtable */
43 struct batadv_hashtable *batadv_hash_new(uint32_t size);
63 uint32_t i; in batadv_hash_delete()
90 static inline uint32_t batadv_hash_bytes(uint32_t hash, const void *data, in batadv_hash_bytes()
91 uint32_t size) in batadv_hash_bytes()
121 uint32_t index; in batadv_hash_add()
165 uint32_t index; in batadv_hash_remove()
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| /linux-4.1.27/drivers/video/fbdev/geode/ |
| D | lxfb.h | 47 uint32_t gp[GP_REG_COUNT];
48 uint32_t dc[DC_REG_COUNT];
52 uint32_t dc_pal[DC_PAL_COUNT];
53 uint32_t vp_pal[VP_PAL_COUNT];
54 uint32_t hcoeff[DC_HFILT_COUNT * 2];
55 uint32_t vcoeff[DC_VFILT_COUNT];
56 uint32_t vp_coeff[VP_COEFF_SIZE / 4];
385 static inline uint32_t read_gp(struct lxfb_par *par, int reg) in read_gp()
390 static inline void write_gp(struct lxfb_par *par, int reg, uint32_t val) in write_gp()
395 static inline uint32_t read_dc(struct lxfb_par *par, int reg) in read_dc()
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| /linux-4.1.27/drivers/mtd/devices/ |
| D | st_spi_fsm.c | 247 uint32_t data_size;
248 uint32_t addr1;
249 uint32_t addr2;
250 uint32_t addr_cfg;
251 uint32_t seq_opc[5];
252 uint32_t mode;
253 uint32_t dummy;
254 uint32_t status;
256 uint32_t seq_cfg;
268 uint32_t configuration;
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