103 static inline uint32_t DSI_6G_HW_VERSION_MAJOR(uint32_t val)  in DSI_6G_HW_VERSION_MAJOR()
109 static inline uint32_t DSI_6G_HW_VERSION_MINOR(uint32_t val)  in DSI_6G_HW_VERSION_MINOR()
115 static inline uint32_t DSI_6G_HW_VERSION_STEP(uint32_t val)  in DSI_6G_HW_VERSION_STEP()
146 static inline uint32_t DSI_VID_CFG0_VIRT_CHANNEL(uint32_t val)  in DSI_VID_CFG0_VIRT_CHANNEL()
152 static inline uint32_t DSI_VID_CFG0_DST_FORMAT(enum dsi_vid_dst_format val)  in DSI_VID_CFG0_DST_FORMAT()
158 static inline uint32_t DSI_VID_CFG0_TRAFFIC_MODE(enum dsi_traffic_mode val)  in DSI_VID_CFG0_TRAFFIC_MODE()
175 static inline uint32_t DSI_VID_CFG1_RGB_SWAP(enum dsi_rgb_swap val)  in DSI_VID_CFG1_RGB_SWAP()
183 static inline uint32_t DSI_ACTIVE_H_START(uint32_t val)  in DSI_ACTIVE_H_START()
189 static inline uint32_t DSI_ACTIVE_H_END(uint32_t val)  in DSI_ACTIVE_H_END()
197 static inline uint32_t DSI_ACTIVE_V_START(uint32_t val)  in DSI_ACTIVE_V_START()
203 static inline uint32_t DSI_ACTIVE_V_END(uint32_t val)  in DSI_ACTIVE_V_END()
211 static inline uint32_t DSI_TOTAL_H_TOTAL(uint32_t val)  in DSI_TOTAL_H_TOTAL()
217 static inline uint32_t DSI_TOTAL_V_TOTAL(uint32_t val)  in DSI_TOTAL_V_TOTAL()
225 static inline uint32_t DSI_ACTIVE_HSYNC_START(uint32_t val)  in DSI_ACTIVE_HSYNC_START()
231 static inline uint32_t DSI_ACTIVE_HSYNC_END(uint32_t val)  in DSI_ACTIVE_HSYNC_END()
239 static inline uint32_t DSI_ACTIVE_VSYNC_HPOS_START(uint32_t val)  in DSI_ACTIVE_VSYNC_HPOS_START()
245 static inline uint32_t DSI_ACTIVE_VSYNC_HPOS_END(uint32_t val)  in DSI_ACTIVE_VSYNC_HPOS_END()
253 static inline uint32_t DSI_ACTIVE_VSYNC_VPOS_START(uint32_t val)  in DSI_ACTIVE_VSYNC_VPOS_START()
259 static inline uint32_t DSI_ACTIVE_VSYNC_VPOS_END(uint32_t val)  in DSI_ACTIVE_VSYNC_VPOS_END()
272 static inline uint32_t DSI_CMD_CFG0_DST_FORMAT(enum dsi_cmd_dst_format val)  in DSI_CMD_CFG0_DST_FORMAT()
281 static inline uint32_t DSI_CMD_CFG0_INTERLEAVE_MAX(uint32_t val)  in DSI_CMD_CFG0_INTERLEAVE_MAX()
287 static inline uint32_t DSI_CMD_CFG0_RGB_SWAP(enum dsi_rgb_swap val)  in DSI_CMD_CFG0_RGB_SWAP()
295 static inline uint32_t DSI_CMD_CFG1_WR_MEM_START(uint32_t val)  in DSI_CMD_CFG1_WR_MEM_START()
301 static inline uint32_t DSI_CMD_CFG1_WR_MEM_CONTINUE(uint32_t val)  in DSI_CMD_CFG1_WR_MEM_CONTINUE()
314 static inline uint32_t DSI_CMD_MDP_STREAM_CTRL_DATA_TYPE(uint32_t val)  in DSI_CMD_MDP_STREAM_CTRL_DATA_TYPE()
320 static inline uint32_t DSI_CMD_MDP_STREAM_CTRL_VIRTUAL_CHANNEL(uint32_t val)  in DSI_CMD_MDP_STREAM_CTRL_VIRTUAL_CHANNEL()
326 static inline uint32_t DSI_CMD_MDP_STREAM_CTRL_WORD_COUNT(uint32_t val)  in DSI_CMD_MDP_STREAM_CTRL_WORD_COUNT()
334 static inline uint32_t DSI_CMD_MDP_STREAM_TOTAL_H_TOTAL(uint32_t val)  in DSI_CMD_MDP_STREAM_TOTAL_H_TOTAL()
340 static inline uint32_t DSI_CMD_MDP_STREAM_TOTAL_V_TOTAL(uint32_t val)  in DSI_CMD_MDP_STREAM_TOTAL_V_TOTAL()
347 static inline uint32_t REG_DSI_RDBK(uint32_t i0) { return 0x00000068 + 0x4*i0; }  in REG_DSI_RDBK()
349 static inline uint32_t REG_DSI_RDBK_DATA(uint32_t i0) { return 0x00000068 + 0x4*i0; }  in REG_DSI_RDBK_DATA()
354 static inline uint32_t DSI_TRIG_CTRL_DMA_TRIGGER(enum dsi_cmd_trigger val)  in DSI_TRIG_CTRL_DMA_TRIGGER()
360 static inline uint32_t DSI_TRIG_CTRL_MDP_TRIGGER(enum dsi_cmd_trigger val)  in DSI_TRIG_CTRL_MDP_TRIGGER()
366 static inline uint32_t DSI_TRIG_CTRL_STREAM(uint32_t val)  in DSI_TRIG_CTRL_STREAM()
382 static inline uint32_t DSI_CLKOUT_TIMING_CTRL_T_CLK_PRE(uint32_t val)  in DSI_CLKOUT_TIMING_CTRL_T_CLK_PRE()
388 static inline uint32_t DSI_CLKOUT_TIMING_CTRL_T_CLK_POST(uint32_t val)  in DSI_CLKOUT_TIMING_CTRL_T_CLK_POST()
400 static inline uint32_t DSI_LANE_SWAP_CTRL_DLN_SWAP_SEL(enum dsi_lane_swap val)  in DSI_LANE_SWAP_CTRL_DLN_SWAP_SEL()
429 static inline uint32_t DSI_RDBK_DATA_CTRL_COUNT(uint32_t val)  in DSI_RDBK_DATA_CTRL_COUNT()
438 static inline uint32_t DSI_VERSION_MAJOR(uint32_t val)  in DSI_VERSION_MAJOR()
550 static inline uint32_t REG_DSI_8960_LN(uint32_t i0) { return 0x00000300 + 0x40*i0; }  in REG_DSI_8960_LN()
552 static inline uint32_t REG_DSI_8960_LN_CFG_0(uint32_t i0) { return 0x00000300 + 0x40*i0; }  in REG_DSI_8960_LN_CFG_0()
554 static inline uint32_t REG_DSI_8960_LN_CFG_1(uint32_t i0) { return 0x00000304 + 0x40*i0; }  in REG_DSI_8960_LN_CFG_1()
556 static inline uint32_t REG_DSI_8960_LN_CFG_2(uint32_t i0) { return 0x00000308 + 0x40*i0; }  in REG_DSI_8960_LN_CFG_2()
558 static inline uint32_t REG_DSI_8960_LN_TEST_DATAPATH(uint32_t i0) { return 0x0000030c + 0x40*i0; }  in REG_DSI_8960_LN_TEST_DATAPATH()
560 static inline uint32_t REG_DSI_8960_LN_TEST_STR_0(uint32_t i0) { return 0x00000314 + 0x40*i0; }  in REG_DSI_8960_LN_TEST_STR_0()
562 static inline uint32_t REG_DSI_8960_LN_TEST_STR_1(uint32_t i0) { return 0x00000318 + 0x40*i0; }  in REG_DSI_8960_LN_TEST_STR_1()
659 static inline uint32_t REG_DSI_28nm_PHY_LN(uint32_t i0) { return 0x00000000 + 0x40*i0; }  in REG_DSI_28nm_PHY_LN()
661 static inline uint32_t REG_DSI_28nm_PHY_LN_CFG_0(uint32_t i0) { return 0x00000000 + 0x40*i0; }  in REG_DSI_28nm_PHY_LN_CFG_0()
663 static inline uint32_t REG_DSI_28nm_PHY_LN_CFG_1(uint32_t i0) { return 0x00000004 + 0x40*i0; }  in REG_DSI_28nm_PHY_LN_CFG_1()
665 static inline uint32_t REG_DSI_28nm_PHY_LN_CFG_2(uint32_t i0) { return 0x00000008 + 0x40*i0; }  in REG_DSI_28nm_PHY_LN_CFG_2()
667 static inline uint32_t REG_DSI_28nm_PHY_LN_CFG_3(uint32_t i0) { return 0x0000000c + 0x40*i0; }  in REG_DSI_28nm_PHY_LN_CFG_3()
669 static inline uint32_t REG_DSI_28nm_PHY_LN_CFG_4(uint32_t i0) { return 0x00000010 + 0x40*i0; }  in REG_DSI_28nm_PHY_LN_CFG_4()
671 static inline uint32_t REG_DSI_28nm_PHY_LN_TEST_DATAPATH(uint32_t i0) { return 0x00000014 + 0x40*i0…  in REG_DSI_28nm_PHY_LN_TEST_DATAPATH()
673 static inline uint32_t REG_DSI_28nm_PHY_LN_DEBUG_SEL(uint32_t i0) { return 0x00000018 + 0x40*i0; }  in REG_DSI_28nm_PHY_LN_DEBUG_SEL()
675 static inline uint32_t REG_DSI_28nm_PHY_LN_TEST_STR_0(uint32_t i0) { return 0x0000001c + 0x40*i0; }  in REG_DSI_28nm_PHY_LN_TEST_STR_0()
677 static inline uint32_t REG_DSI_28nm_PHY_LN_TEST_STR_1(uint32_t i0) { return 0x00000020 + 0x40*i0; }  in REG_DSI_28nm_PHY_LN_TEST_STR_1()
700 static inline uint32_t DSI_28nm_PHY_TIMING_CTRL_0_CLK_ZERO(uint32_t val)  in DSI_28nm_PHY_TIMING_CTRL_0_CLK_ZERO()
708 static inline uint32_t DSI_28nm_PHY_TIMING_CTRL_1_CLK_TRAIL(uint32_t val)  in DSI_28nm_PHY_TIMING_CTRL_1_CLK_TRAIL()
716 static inline uint32_t DSI_28nm_PHY_TIMING_CTRL_2_CLK_PREPARE(uint32_t val)  in DSI_28nm_PHY_TIMING_CTRL_2_CLK_PREPARE()
727 static inline uint32_t DSI_28nm_PHY_TIMING_CTRL_4_HS_EXIT(uint32_t val)  in DSI_28nm_PHY_TIMING_CTRL_4_HS_EXIT()
735 static inline uint32_t DSI_28nm_PHY_TIMING_CTRL_5_HS_ZERO(uint32_t val)  in DSI_28nm_PHY_TIMING_CTRL_5_HS_ZERO()
743 static inline uint32_t DSI_28nm_PHY_TIMING_CTRL_6_HS_PREPARE(uint32_t val)  in DSI_28nm_PHY_TIMING_CTRL_6_HS_PREPARE()
751 static inline uint32_t DSI_28nm_PHY_TIMING_CTRL_7_HS_TRAIL(uint32_t val)  in DSI_28nm_PHY_TIMING_CTRL_7_HS_TRAIL()
759 static inline uint32_t DSI_28nm_PHY_TIMING_CTRL_8_HS_RQST(uint32_t val)  in DSI_28nm_PHY_TIMING_CTRL_8_HS_RQST()
767 static inline uint32_t DSI_28nm_PHY_TIMING_CTRL_9_TA_GO(uint32_t val)  in DSI_28nm_PHY_TIMING_CTRL_9_TA_GO()
773 static inline uint32_t DSI_28nm_PHY_TIMING_CTRL_9_TA_SURE(uint32_t val)  in DSI_28nm_PHY_TIMING_CTRL_9_TA_SURE()
781 static inline uint32_t DSI_28nm_PHY_TIMING_CTRL_10_TA_GET(uint32_t val)  in DSI_28nm_PHY_TIMING_CTRL_10_TA_GET()
789 static inline uint32_t DSI_28nm_PHY_TIMING_CTRL_11_TRIG3_CMD(uint32_t val)  in DSI_28nm_PHY_TIMING_CTRL_11_TRIG3_CMD()