180 static inline uint32_t A4XX_CGC_HLSQ_EARLY_CYC(uint32_t val)  in A4XX_CGC_HLSQ_EARLY_CYC()
231 static inline uint32_t A4XX_RB_FRAME_BUFFER_DIMENSION_WIDTH(uint32_t val)  in A4XX_RB_FRAME_BUFFER_DIMENSION_WIDTH()
237 static inline uint32_t A4XX_RB_FRAME_BUFFER_DIMENSION_HEIGHT(uint32_t val)  in A4XX_RB_FRAME_BUFFER_DIMENSION_HEIGHT()
253 static inline uint32_t A4XX_RB_MODE_CONTROL_WIDTH(uint32_t val)  in A4XX_RB_MODE_CONTROL_WIDTH()
259 static inline uint32_t A4XX_RB_MODE_CONTROL_HEIGHT(uint32_t val)  in A4XX_RB_MODE_CONTROL_HEIGHT()
272 static inline uint32_t A4XX_RB_MSAA_CONTROL_SAMPLES(uint32_t val)  in A4XX_RB_MSAA_CONTROL_SAMPLES()
285 static inline uint32_t A4XX_RB_RENDER_CONTROL2_MSAA_SAMPLES(uint32_t val)  in A4XX_RB_RENDER_CONTROL2_MSAA_SAMPLES()
291 static inline uint32_t REG_A4XX_RB_MRT(uint32_t i0) { return 0x000020a4 + 0x5*i0; }  in REG_A4XX_RB_MRT()
293 static inline uint32_t REG_A4XX_RB_MRT_CONTROL(uint32_t i0) { return 0x000020a4 + 0x5*i0; }  in REG_A4XX_RB_MRT_CONTROL()
301 static inline uint32_t A4XX_RB_MRT_CONTROL_COMPONENT_ENABLE(uint32_t val)  in A4XX_RB_MRT_CONTROL_COMPONENT_ENABLE()
306 static inline uint32_t REG_A4XX_RB_MRT_BUF_INFO(uint32_t i0) { return 0x000020a5 + 0x5*i0; }  in REG_A4XX_RB_MRT_BUF_INFO()
309 static inline uint32_t A4XX_RB_MRT_BUF_INFO_COLOR_FORMAT(enum a4xx_color_fmt val)  in A4XX_RB_MRT_BUF_INFO_COLOR_FORMAT()
315 static inline uint32_t A4XX_RB_MRT_BUF_INFO_DITHER_MODE(enum adreno_rb_dither_mode val)  in A4XX_RB_MRT_BUF_INFO_DITHER_MODE()
321 static inline uint32_t A4XX_RB_MRT_BUF_INFO_COLOR_SWAP(enum a3xx_color_swap val)  in A4XX_RB_MRT_BUF_INFO_COLOR_SWAP()
327 static inline uint32_t A4XX_RB_MRT_BUF_INFO_COLOR_BUF_PITCH(uint32_t val)  in A4XX_RB_MRT_BUF_INFO_COLOR_BUF_PITCH()
332 static inline uint32_t REG_A4XX_RB_MRT_BASE(uint32_t i0) { return 0x000020a6 + 0x5*i0; }  in REG_A4XX_RB_MRT_BASE()
334 static inline uint32_t REG_A4XX_RB_MRT_CONTROL3(uint32_t i0) { return 0x000020a7 + 0x5*i0; }  in REG_A4XX_RB_MRT_CONTROL3()
337 static inline uint32_t A4XX_RB_MRT_CONTROL3_STRIDE(uint32_t val)  in A4XX_RB_MRT_CONTROL3_STRIDE()
342 static inline uint32_t REG_A4XX_RB_MRT_BLEND_CONTROL(uint32_t i0) { return 0x000020a8 + 0x5*i0; }  in REG_A4XX_RB_MRT_BLEND_CONTROL()
345 static inline uint32_t A4XX_RB_MRT_BLEND_CONTROL_RGB_SRC_FACTOR(enum adreno_rb_blend_factor val)  in A4XX_RB_MRT_BLEND_CONTROL_RGB_SRC_FACTOR()
351 static inline uint32_t A4XX_RB_MRT_BLEND_CONTROL_RGB_BLEND_OPCODE(enum a4xx_rb_blend_opcode val)  in A4XX_RB_MRT_BLEND_CONTROL_RGB_BLEND_OPCODE()
357 static inline uint32_t A4XX_RB_MRT_BLEND_CONTROL_RGB_DEST_FACTOR(enum adreno_rb_blend_factor val)  in A4XX_RB_MRT_BLEND_CONTROL_RGB_DEST_FACTOR()
363 static inline uint32_t A4XX_RB_MRT_BLEND_CONTROL_ALPHA_SRC_FACTOR(enum adreno_rb_blend_factor val)  in A4XX_RB_MRT_BLEND_CONTROL_ALPHA_SRC_FACTOR()
369 static inline uint32_t A4XX_RB_MRT_BLEND_CONTROL_ALPHA_BLEND_OPCODE(enum a4xx_rb_blend_opcode val)  in A4XX_RB_MRT_BLEND_CONTROL_ALPHA_BLEND_OPCODE()
375 static inline uint32_t A4XX_RB_MRT_BLEND_CONTROL_ALPHA_DEST_FACTOR(enum adreno_rb_blend_factor val)  in A4XX_RB_MRT_BLEND_CONTROL_ALPHA_DEST_FACTOR()
383 static inline uint32_t A4XX_RB_BLEND_RED_UINT(uint32_t val)  in A4XX_RB_BLEND_RED_UINT()
389 static inline uint32_t A4XX_RB_BLEND_RED_FLOAT(float val)  in A4XX_RB_BLEND_RED_FLOAT()
397 static inline uint32_t A4XX_RB_BLEND_GREEN_UINT(uint32_t val)  in A4XX_RB_BLEND_GREEN_UINT()
403 static inline uint32_t A4XX_RB_BLEND_GREEN_FLOAT(float val)  in A4XX_RB_BLEND_GREEN_FLOAT()
411 static inline uint32_t A4XX_RB_BLEND_BLUE_UINT(uint32_t val)  in A4XX_RB_BLEND_BLUE_UINT()
417 static inline uint32_t A4XX_RB_BLEND_BLUE_FLOAT(float val)  in A4XX_RB_BLEND_BLUE_FLOAT()
425 static inline uint32_t A4XX_RB_BLEND_ALPHA_UINT(uint32_t val)  in A4XX_RB_BLEND_ALPHA_UINT()
431 static inline uint32_t A4XX_RB_BLEND_ALPHA_FLOAT(float val)  in A4XX_RB_BLEND_ALPHA_FLOAT()
439 static inline uint32_t A4XX_RB_ALPHA_CONTROL_ALPHA_REF(uint32_t val)  in A4XX_RB_ALPHA_CONTROL_ALPHA_REF()
446 static inline uint32_t A4XX_RB_ALPHA_CONTROL_ALPHA_TEST_FUNC(enum adreno_compare_func val)  in A4XX_RB_ALPHA_CONTROL_ALPHA_TEST_FUNC()
456 static inline uint32_t A4XX_RB_FS_OUTPUT_SAMPLE_MASK(uint32_t val)  in A4XX_RB_FS_OUTPUT_SAMPLE_MASK()
464 static inline uint32_t A4XX_RB_RENDER_CONTROL3_COMPONENT_ENABLE(uint32_t val)  in A4XX_RB_RENDER_CONTROL3_COMPONENT_ENABLE()
472 static inline uint32_t A4XX_RB_COPY_CONTROL_MSAA_RESOLVE(enum a3xx_msaa_samples val)  in A4XX_RB_COPY_CONTROL_MSAA_RESOLVE()
478 static inline uint32_t A4XX_RB_COPY_CONTROL_MODE(enum adreno_rb_copy_control_mode val)  in A4XX_RB_COPY_CONTROL_MODE()
484 static inline uint32_t A4XX_RB_COPY_CONTROL_FASTCLEAR(uint32_t val)  in A4XX_RB_COPY_CONTROL_FASTCLEAR()
490 static inline uint32_t A4XX_RB_COPY_CONTROL_GMEM_BASE(uint32_t val)  in A4XX_RB_COPY_CONTROL_GMEM_BASE()
498 static inline uint32_t A4XX_RB_COPY_DEST_BASE_BASE(uint32_t val)  in A4XX_RB_COPY_DEST_BASE_BASE()
506 static inline uint32_t A4XX_RB_COPY_DEST_PITCH_PITCH(uint32_t val)  in A4XX_RB_COPY_DEST_PITCH_PITCH()
514 static inline uint32_t A4XX_RB_COPY_DEST_INFO_FORMAT(enum a4xx_color_fmt val)  in A4XX_RB_COPY_DEST_INFO_FORMAT()
520 static inline uint32_t A4XX_RB_COPY_DEST_INFO_SWAP(enum a3xx_color_swap val)  in A4XX_RB_COPY_DEST_INFO_SWAP()
526 static inline uint32_t A4XX_RB_COPY_DEST_INFO_DITHER_MODE(enum adreno_rb_dither_mode val)  in A4XX_RB_COPY_DEST_INFO_DITHER_MODE()
532 static inline uint32_t A4XX_RB_COPY_DEST_INFO_COMPONENT_ENABLE(uint32_t val)  in A4XX_RB_COPY_DEST_INFO_COMPONENT_ENABLE()
538 static inline uint32_t A4XX_RB_COPY_DEST_INFO_ENDIAN(enum adreno_rb_surface_endian val)  in A4XX_RB_COPY_DEST_INFO_ENDIAN()
544 static inline uint32_t A4XX_RB_COPY_DEST_INFO_TILE(enum a4xx_tile_mode val)  in A4XX_RB_COPY_DEST_INFO_TILE()
559 static inline uint32_t A4XX_RB_DEPTH_CONTROL_ZFUNC(enum adreno_compare_func val)  in A4XX_RB_DEPTH_CONTROL_ZFUNC()
572 static inline uint32_t A4XX_RB_DEPTH_INFO_DEPTH_FORMAT(enum a4xx_depth_format val)  in A4XX_RB_DEPTH_INFO_DEPTH_FORMAT()
578 static inline uint32_t A4XX_RB_DEPTH_INFO_DEPTH_BASE(uint32_t val)  in A4XX_RB_DEPTH_INFO_DEPTH_BASE()
586 static inline uint32_t A4XX_RB_DEPTH_PITCH(uint32_t val)  in A4XX_RB_DEPTH_PITCH()
594 static inline uint32_t A4XX_RB_DEPTH_PITCH2(uint32_t val)  in A4XX_RB_DEPTH_PITCH2()
605 static inline uint32_t A4XX_RB_STENCIL_CONTROL_FUNC(enum adreno_compare_func val)  in A4XX_RB_STENCIL_CONTROL_FUNC()
611 static inline uint32_t A4XX_RB_STENCIL_CONTROL_FAIL(enum adreno_stencil_op val)  in A4XX_RB_STENCIL_CONTROL_FAIL()
617 static inline uint32_t A4XX_RB_STENCIL_CONTROL_ZPASS(enum adreno_stencil_op val)  in A4XX_RB_STENCIL_CONTROL_ZPASS()
623 static inline uint32_t A4XX_RB_STENCIL_CONTROL_ZFAIL(enum adreno_stencil_op val)  in A4XX_RB_STENCIL_CONTROL_ZFAIL()
629 static inline uint32_t A4XX_RB_STENCIL_CONTROL_FUNC_BF(enum adreno_compare_func val)  in A4XX_RB_STENCIL_CONTROL_FUNC_BF()
635 static inline uint32_t A4XX_RB_STENCIL_CONTROL_FAIL_BF(enum adreno_stencil_op val)  in A4XX_RB_STENCIL_CONTROL_FAIL_BF()
641 static inline uint32_t A4XX_RB_STENCIL_CONTROL_ZPASS_BF(enum adreno_stencil_op val)  in A4XX_RB_STENCIL_CONTROL_ZPASS_BF()
647 static inline uint32_t A4XX_RB_STENCIL_CONTROL_ZFAIL_BF(enum adreno_stencil_op val)  in A4XX_RB_STENCIL_CONTROL_ZFAIL_BF()
658 static inline uint32_t A4XX_RB_STENCILREFMASK_STENCILREF(uint32_t val)  in A4XX_RB_STENCILREFMASK_STENCILREF()
664 static inline uint32_t A4XX_RB_STENCILREFMASK_STENCILMASK(uint32_t val)  in A4XX_RB_STENCILREFMASK_STENCILMASK()
670 static inline uint32_t A4XX_RB_STENCILREFMASK_STENCILWRITEMASK(uint32_t val)  in A4XX_RB_STENCILREFMASK_STENCILWRITEMASK()
678 static inline uint32_t A4XX_RB_STENCILREFMASK_BF_STENCILREF(uint32_t val)  in A4XX_RB_STENCILREFMASK_BF_STENCILREF()
684 static inline uint32_t A4XX_RB_STENCILREFMASK_BF_STENCILMASK(uint32_t val)  in A4XX_RB_STENCILREFMASK_BF_STENCILMASK()
690 static inline uint32_t A4XX_RB_STENCILREFMASK_BF_STENCILWRITEMASK(uint32_t val)  in A4XX_RB_STENCILREFMASK_BF_STENCILWRITEMASK()
699 static inline uint32_t A4XX_RB_BIN_OFFSET_X(uint32_t val)  in A4XX_RB_BIN_OFFSET_X()
705 static inline uint32_t A4XX_RB_BIN_OFFSET_Y(uint32_t val)  in A4XX_RB_BIN_OFFSET_Y()
710 static inline uint32_t REG_A4XX_RB_VPORT_Z_CLAMP(uint32_t i0) { return 0x00002120 + 0x2*i0; }  in REG_A4XX_RB_VPORT_Z_CLAMP()
712 static inline uint32_t REG_A4XX_RB_VPORT_Z_CLAMP_MIN(uint32_t i0) { return 0x00002120 + 0x2*i0; }  in REG_A4XX_RB_VPORT_Z_CLAMP_MIN()
714 static inline uint32_t REG_A4XX_RB_VPORT_Z_CLAMP_MAX(uint32_t i0) { return 0x00002121 + 0x2*i0; }  in REG_A4XX_RB_VPORT_Z_CLAMP_MAX()
720 static inline uint32_t REG_A4XX_RBBM_CLOCK_CTL_TP(uint32_t i0) { return 0x00000004 + 0x1*i0; }  in REG_A4XX_RBBM_CLOCK_CTL_TP()
722 static inline uint32_t REG_A4XX_RBBM_CLOCK_CTL_TP_REG(uint32_t i0) { return 0x00000004 + 0x1*i0; }  in REG_A4XX_RBBM_CLOCK_CTL_TP_REG()
724 static inline uint32_t REG_A4XX_RBBM_CLOCK_CTL2_TP(uint32_t i0) { return 0x00000008 + 0x1*i0; }  in REG_A4XX_RBBM_CLOCK_CTL2_TP()
726 static inline uint32_t REG_A4XX_RBBM_CLOCK_CTL2_TP_REG(uint32_t i0) { return 0x00000008 + 0x1*i0; }  in REG_A4XX_RBBM_CLOCK_CTL2_TP_REG()
728 static inline uint32_t REG_A4XX_RBBM_CLOCK_HYST_TP(uint32_t i0) { return 0x0000000c + 0x1*i0; }  in REG_A4XX_RBBM_CLOCK_HYST_TP()
730 static inline uint32_t REG_A4XX_RBBM_CLOCK_HYST_TP_REG(uint32_t i0) { return 0x0000000c + 0x1*i0; }  in REG_A4XX_RBBM_CLOCK_HYST_TP_REG()
732 static inline uint32_t REG_A4XX_RBBM_CLOCK_DELAY_TP(uint32_t i0) { return 0x00000010 + 0x1*i0; }  in REG_A4XX_RBBM_CLOCK_DELAY_TP()
734 static inline uint32_t REG_A4XX_RBBM_CLOCK_DELAY_TP_REG(uint32_t i0) { return 0x00000010 + 0x1*i0; }  in REG_A4XX_RBBM_CLOCK_DELAY_TP_REG()
810 static inline uint32_t REG_A4XX_RBBM_CLOCK_CTL_SP(uint32_t i0) { return 0x00000068 + 0x1*i0; }  in REG_A4XX_RBBM_CLOCK_CTL_SP()
812 static inline uint32_t REG_A4XX_RBBM_CLOCK_CTL_SP_REG(uint32_t i0) { return 0x00000068 + 0x1*i0; }  in REG_A4XX_RBBM_CLOCK_CTL_SP_REG()
814 static inline uint32_t REG_A4XX_RBBM_CLOCK_CTL2_SP(uint32_t i0) { return 0x0000006c + 0x1*i0; }  in REG_A4XX_RBBM_CLOCK_CTL2_SP()
816 static inline uint32_t REG_A4XX_RBBM_CLOCK_CTL2_SP_REG(uint32_t i0) { return 0x0000006c + 0x1*i0; }  in REG_A4XX_RBBM_CLOCK_CTL2_SP_REG()
818 static inline uint32_t REG_A4XX_RBBM_CLOCK_HYST_SP(uint32_t i0) { return 0x00000070 + 0x1*i0; }  in REG_A4XX_RBBM_CLOCK_HYST_SP()
820 static inline uint32_t REG_A4XX_RBBM_CLOCK_HYST_SP_REG(uint32_t i0) { return 0x00000070 + 0x1*i0; }  in REG_A4XX_RBBM_CLOCK_HYST_SP_REG()
822 static inline uint32_t REG_A4XX_RBBM_CLOCK_DELAY_SP(uint32_t i0) { return 0x00000074 + 0x1*i0; }  in REG_A4XX_RBBM_CLOCK_DELAY_SP()
824 static inline uint32_t REG_A4XX_RBBM_CLOCK_DELAY_SP_REG(uint32_t i0) { return 0x00000074 + 0x1*i0; }  in REG_A4XX_RBBM_CLOCK_DELAY_SP_REG()
826 static inline uint32_t REG_A4XX_RBBM_CLOCK_CTL_RB(uint32_t i0) { return 0x00000078 + 0x1*i0; }  in REG_A4XX_RBBM_CLOCK_CTL_RB()
828 static inline uint32_t REG_A4XX_RBBM_CLOCK_CTL_RB_REG(uint32_t i0) { return 0x00000078 + 0x1*i0; }  in REG_A4XX_RBBM_CLOCK_CTL_RB_REG()
830 static inline uint32_t REG_A4XX_RBBM_CLOCK_CTL2_RB(uint32_t i0) { return 0x0000007c + 0x1*i0; }  in REG_A4XX_RBBM_CLOCK_CTL2_RB()
832 static inline uint32_t REG_A4XX_RBBM_CLOCK_CTL2_RB_REG(uint32_t i0) { return 0x0000007c + 0x1*i0; }  in REG_A4XX_RBBM_CLOCK_CTL2_RB_REG()
834 static inline uint32_t REG_A4XX_RBBM_CLOCK_CTL_MARB_CCU(uint32_t i0) { return 0x00000082 + 0x1*i0; }  in REG_A4XX_RBBM_CLOCK_CTL_MARB_CCU()
836 static inline uint32_t REG_A4XX_RBBM_CLOCK_CTL_MARB_CCU_REG(uint32_t i0) { return 0x00000082 + 0x1*…  in REG_A4XX_RBBM_CLOCK_CTL_MARB_CCU_REG()
838 static inline uint32_t REG_A4XX_RBBM_CLOCK_HYST_RB_MARB_CCU(uint32_t i0) { return 0x00000086 + 0x1*…  in REG_A4XX_RBBM_CLOCK_HYST_RB_MARB_CCU()
840 static inline uint32_t REG_A4XX_RBBM_CLOCK_HYST_RB_MARB_CCU_REG(uint32_t i0) { return 0x00000086 + …  in REG_A4XX_RBBM_CLOCK_HYST_RB_MARB_CCU_REG()
854 static inline uint32_t REG_A4XX_RBBM_CLOCK_DELAY_RB_MARB_CCU_L1(uint32_t i0) { return 0x0000008e + …  in REG_A4XX_RBBM_CLOCK_DELAY_RB_MARB_CCU_L1()
856 static inline uint32_t REG_A4XX_RBBM_CLOCK_DELAY_RB_MARB_CCU_L1_REG(uint32_t i0) { return 0x0000008…  in REG_A4XX_RBBM_CLOCK_DELAY_RB_MARB_CCU_L1_REG()
977 static inline uint32_t REG_A4XX_CP_PROTECT(uint32_t i0) { return 0x00000240 + 0x1*i0; }  in REG_A4XX_CP_PROTECT()
979 static inline uint32_t REG_A4XX_CP_PROTECT_REG(uint32_t i0) { return 0x00000240 + 0x1*i0; }  in REG_A4XX_CP_PROTECT_REG()
1001 static inline uint32_t REG_A4XX_CP_SCRATCH(uint32_t i0) { return 0x00000578 + 0x1*i0; }  in REG_A4XX_CP_SCRATCH()
1003 static inline uint32_t REG_A4XX_CP_SCRATCH_REG(uint32_t i0) { return 0x00000578 + 0x1*i0; }  in REG_A4XX_CP_SCRATCH_REG()
1017 static inline uint32_t A4XX_SP_VS_CTRL_REG0_THREADMODE(enum a3xx_threadmode val)  in A4XX_SP_VS_CTRL_REG0_THREADMODE()
1025 static inline uint32_t A4XX_SP_VS_CTRL_REG0_HALFREGFOOTPRINT(uint32_t val)  in A4XX_SP_VS_CTRL_REG0_HALFREGFOOTPRINT()
1031 static inline uint32_t A4XX_SP_VS_CTRL_REG0_FULLREGFOOTPRINT(uint32_t val)  in A4XX_SP_VS_CTRL_REG0_FULLREGFOOTPRINT()
1037 static inline uint32_t A4XX_SP_VS_CTRL_REG0_INOUTREGOVERLAP(uint32_t val)  in A4XX_SP_VS_CTRL_REG0_INOUTREGOVERLAP()
1043 static inline uint32_t A4XX_SP_VS_CTRL_REG0_THREADSIZE(enum a3xx_threadsize val)  in A4XX_SP_VS_CTRL_REG0_THREADSIZE()
1053 static inline uint32_t A4XX_SP_VS_CTRL_REG1_CONSTLENGTH(uint32_t val)  in A4XX_SP_VS_CTRL_REG1_CONSTLENGTH()
1059 static inline uint32_t A4XX_SP_VS_CTRL_REG1_INITIALOUTSTANDING(uint32_t val)  in A4XX_SP_VS_CTRL_REG1_INITIALOUTSTANDING()
1067 static inline uint32_t A4XX_SP_VS_PARAM_REG_POSREGID(uint32_t val)  in A4XX_SP_VS_PARAM_REG_POSREGID()
1073 static inline uint32_t A4XX_SP_VS_PARAM_REG_PSIZEREGID(uint32_t val)  in A4XX_SP_VS_PARAM_REG_PSIZEREGID()
1079 static inline uint32_t A4XX_SP_VS_PARAM_REG_TOTALVSOUTVAR(uint32_t val)  in A4XX_SP_VS_PARAM_REG_TOTALVSOUTVAR()
1084 static inline uint32_t REG_A4XX_SP_VS_OUT(uint32_t i0) { return 0x000022c7 + 0x1*i0; }  in REG_A4XX_SP_VS_OUT()
1086 static inline uint32_t REG_A4XX_SP_VS_OUT_REG(uint32_t i0) { return 0x000022c7 + 0x1*i0; }  in REG_A4XX_SP_VS_OUT_REG()
1089 static inline uint32_t A4XX_SP_VS_OUT_REG_A_REGID(uint32_t val)  in A4XX_SP_VS_OUT_REG_A_REGID()
1095 static inline uint32_t A4XX_SP_VS_OUT_REG_A_COMPMASK(uint32_t val)  in A4XX_SP_VS_OUT_REG_A_COMPMASK()
1101 static inline uint32_t A4XX_SP_VS_OUT_REG_B_REGID(uint32_t val)  in A4XX_SP_VS_OUT_REG_B_REGID()
1107 static inline uint32_t A4XX_SP_VS_OUT_REG_B_COMPMASK(uint32_t val)  in A4XX_SP_VS_OUT_REG_B_COMPMASK()
1112 static inline uint32_t REG_A4XX_SP_VS_VPC_DST(uint32_t i0) { return 0x000022d8 + 0x1*i0; }  in REG_A4XX_SP_VS_VPC_DST()
1114 static inline uint32_t REG_A4XX_SP_VS_VPC_DST_REG(uint32_t i0) { return 0x000022d8 + 0x1*i0; }  in REG_A4XX_SP_VS_VPC_DST_REG()
1117 static inline uint32_t A4XX_SP_VS_VPC_DST_REG_OUTLOC0(uint32_t val)  in A4XX_SP_VS_VPC_DST_REG_OUTLOC0()
1123 static inline uint32_t A4XX_SP_VS_VPC_DST_REG_OUTLOC1(uint32_t val)  in A4XX_SP_VS_VPC_DST_REG_OUTLOC1()
1129 static inline uint32_t A4XX_SP_VS_VPC_DST_REG_OUTLOC2(uint32_t val)  in A4XX_SP_VS_VPC_DST_REG_OUTLOC2()
1135 static inline uint32_t A4XX_SP_VS_VPC_DST_REG_OUTLOC3(uint32_t val)  in A4XX_SP_VS_VPC_DST_REG_OUTLOC3()
1143 static inline uint32_t A4XX_SP_VS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET(uint32_t val)  in A4XX_SP_VS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET()
1149 static inline uint32_t A4XX_SP_VS_OBJ_OFFSET_REG_SHADEROBJOFFSET(uint32_t val)  in A4XX_SP_VS_OBJ_OFFSET_REG_SHADEROBJOFFSET()
1165 static inline uint32_t A4XX_SP_FS_CTRL_REG0_THREADMODE(enum a3xx_threadmode val)  in A4XX_SP_FS_CTRL_REG0_THREADMODE()
1173 static inline uint32_t A4XX_SP_FS_CTRL_REG0_HALFREGFOOTPRINT(uint32_t val)  in A4XX_SP_FS_CTRL_REG0_HALFREGFOOTPRINT()
1179 static inline uint32_t A4XX_SP_FS_CTRL_REG0_FULLREGFOOTPRINT(uint32_t val)  in A4XX_SP_FS_CTRL_REG0_FULLREGFOOTPRINT()
1185 static inline uint32_t A4XX_SP_FS_CTRL_REG0_INOUTREGOVERLAP(uint32_t val)  in A4XX_SP_FS_CTRL_REG0_INOUTREGOVERLAP()
1191 static inline uint32_t A4XX_SP_FS_CTRL_REG0_THREADSIZE(enum a3xx_threadsize val)  in A4XX_SP_FS_CTRL_REG0_THREADSIZE()
1201 static inline uint32_t A4XX_SP_FS_CTRL_REG1_CONSTLENGTH(uint32_t val)  in A4XX_SP_FS_CTRL_REG1_CONSTLENGTH()
1212 static inline uint32_t A4XX_SP_FS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET(uint32_t val)  in A4XX_SP_FS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET()
1218 static inline uint32_t A4XX_SP_FS_OBJ_OFFSET_REG_SHADEROBJOFFSET(uint32_t val)  in A4XX_SP_FS_OBJ_OFFSET_REG_SHADEROBJOFFSET()
1235 static inline uint32_t A4XX_SP_FS_OUTPUT_REG_DEPTH_REGID(uint32_t val)  in A4XX_SP_FS_OUTPUT_REG_DEPTH_REGID()
1240 static inline uint32_t REG_A4XX_SP_FS_MRT(uint32_t i0) { return 0x000022f1 + 0x1*i0; }  in REG_A4XX_SP_FS_MRT()
1242 static inline uint32_t REG_A4XX_SP_FS_MRT_REG(uint32_t i0) { return 0x000022f1 + 0x1*i0; }  in REG_A4XX_SP_FS_MRT_REG()
1245 static inline uint32_t A4XX_SP_FS_MRT_REG_REGID(uint32_t val)  in A4XX_SP_FS_MRT_REG_REGID()
1252 static inline uint32_t A4XX_SP_FS_MRT_REG_MRTFORMAT(enum a4xx_color_fmt val)  in A4XX_SP_FS_MRT_REG_MRTFORMAT()
1260 static inline uint32_t A4XX_SP_HS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET(uint32_t val)  in A4XX_SP_HS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET()
1266 static inline uint32_t A4XX_SP_HS_OBJ_OFFSET_REG_SHADEROBJOFFSET(uint32_t val)  in A4XX_SP_HS_OBJ_OFFSET_REG_SHADEROBJOFFSET()
1274 static inline uint32_t A4XX_SP_DS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET(uint32_t val)  in A4XX_SP_DS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET()
1280 static inline uint32_t A4XX_SP_DS_OBJ_OFFSET_REG_SHADEROBJOFFSET(uint32_t val)  in A4XX_SP_DS_OBJ_OFFSET_REG_SHADEROBJOFFSET()
1288 static inline uint32_t A4XX_SP_GS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET(uint32_t val)  in A4XX_SP_GS_OBJ_OFFSET_REG_CONSTOBJECTOFFSET()
1294 static inline uint32_t A4XX_SP_GS_OBJ_OFFSET_REG_SHADEROBJOFFSET(uint32_t val)  in A4XX_SP_GS_OBJ_OFFSET_REG_SHADEROBJOFFSET()
1312 static inline uint32_t A4XX_VPC_ATTR_TOTALATTR(uint32_t val)  in A4XX_VPC_ATTR_TOTALATTR()
1319 static inline uint32_t A4XX_VPC_ATTR_THRDASSIGN(uint32_t val)  in A4XX_VPC_ATTR_THRDASSIGN()
1328 static inline uint32_t A4XX_VPC_PACK_NUMBYPASSVAR(uint32_t val)  in A4XX_VPC_PACK_NUMBYPASSVAR()
1334 static inline uint32_t A4XX_VPC_PACK_NUMFPNONPOSVAR(uint32_t val)  in A4XX_VPC_PACK_NUMFPNONPOSVAR()
1340 static inline uint32_t A4XX_VPC_PACK_NUMNONPOSVSVAR(uint32_t val)  in A4XX_VPC_PACK_NUMNONPOSVSVAR()
1345 static inline uint32_t REG_A4XX_VPC_VARYING_INTERP(uint32_t i0) { return 0x00002142 + 0x1*i0; }  in REG_A4XX_VPC_VARYING_INTERP()
1347 static inline uint32_t REG_A4XX_VPC_VARYING_INTERP_MODE(uint32_t i0) { return 0x00002142 + 0x1*i0; }  in REG_A4XX_VPC_VARYING_INTERP_MODE()
1349 static inline uint32_t REG_A4XX_VPC_VARYING_PS_REPL(uint32_t i0) { return 0x0000214a + 0x1*i0; }  in REG_A4XX_VPC_VARYING_PS_REPL()
1351 static inline uint32_t REG_A4XX_VPC_VARYING_PS_REPL_MODE(uint32_t i0) { return 0x0000214a + 0x1*i0;…  in REG_A4XX_VPC_VARYING_PS_REPL_MODE()
1358 static inline uint32_t A4XX_VSC_BIN_SIZE_WIDTH(uint32_t val)  in A4XX_VSC_BIN_SIZE_WIDTH()
1364 static inline uint32_t A4XX_VSC_BIN_SIZE_HEIGHT(uint32_t val)  in A4XX_VSC_BIN_SIZE_HEIGHT()
1375 static inline uint32_t REG_A4XX_VSC_PIPE_CONFIG(uint32_t i0) { return 0x00000c08 + 0x1*i0; }  in REG_A4XX_VSC_PIPE_CONFIG()
1377 static inline uint32_t REG_A4XX_VSC_PIPE_CONFIG_REG(uint32_t i0) { return 0x00000c08 + 0x1*i0; }  in REG_A4XX_VSC_PIPE_CONFIG_REG()
1380 static inline uint32_t A4XX_VSC_PIPE_CONFIG_REG_X(uint32_t val)  in A4XX_VSC_PIPE_CONFIG_REG_X()
1386 static inline uint32_t A4XX_VSC_PIPE_CONFIG_REG_Y(uint32_t val)  in A4XX_VSC_PIPE_CONFIG_REG_Y()
1392 static inline uint32_t A4XX_VSC_PIPE_CONFIG_REG_W(uint32_t val)  in A4XX_VSC_PIPE_CONFIG_REG_W()
1398 static inline uint32_t A4XX_VSC_PIPE_CONFIG_REG_H(uint32_t val)  in A4XX_VSC_PIPE_CONFIG_REG_H()
1403 static inline uint32_t REG_A4XX_VSC_PIPE_DATA_ADDRESS(uint32_t i0) { return 0x00000c10 + 0x1*i0; }  in REG_A4XX_VSC_PIPE_DATA_ADDRESS()
1405 static inline uint32_t REG_A4XX_VSC_PIPE_DATA_ADDRESS_REG(uint32_t i0) { return 0x00000c10 + 0x1*i0…  in REG_A4XX_VSC_PIPE_DATA_ADDRESS_REG()
1407 static inline uint32_t REG_A4XX_VSC_PIPE_DATA_LENGTH(uint32_t i0) { return 0x00000c18 + 0x1*i0; }  in REG_A4XX_VSC_PIPE_DATA_LENGTH()
1409 static inline uint32_t REG_A4XX_VSC_PIPE_DATA_LENGTH_REG(uint32_t i0) { return 0x00000c18 + 0x1*i0;…  in REG_A4XX_VSC_PIPE_DATA_LENGTH_REG()
1424 static inline uint32_t A4XX_VFD_CONTROL_0_TOTALATTRTOVS(uint32_t val)  in A4XX_VFD_CONTROL_0_TOTALATTRTOVS()
1430 static inline uint32_t A4XX_VFD_CONTROL_0_BYPASSATTROVS(uint32_t val)  in A4XX_VFD_CONTROL_0_BYPASSATTROVS()
1436 static inline uint32_t A4XX_VFD_CONTROL_0_STRMDECINSTRCNT(uint32_t val)  in A4XX_VFD_CONTROL_0_STRMDECINSTRCNT()
1442 static inline uint32_t A4XX_VFD_CONTROL_0_STRMFETCHINSTRCNT(uint32_t val)  in A4XX_VFD_CONTROL_0_STRMFETCHINSTRCNT()
1450 static inline uint32_t A4XX_VFD_CONTROL_1_MAXSTORAGE(uint32_t val)  in A4XX_VFD_CONTROL_1_MAXSTORAGE()
1456 static inline uint32_t A4XX_VFD_CONTROL_1_REGID4VTX(uint32_t val)  in A4XX_VFD_CONTROL_1_REGID4VTX()
1462 static inline uint32_t A4XX_VFD_CONTROL_1_REGID4INST(uint32_t val)  in A4XX_VFD_CONTROL_1_REGID4INST()
1472 static inline uint32_t A4XX_VFD_CONTROL_3_REGID_VTXCNT(uint32_t val)  in A4XX_VFD_CONTROL_3_REGID_VTXCNT()
1481 static inline uint32_t REG_A4XX_VFD_FETCH(uint32_t i0) { return 0x0000220a + 0x4*i0; }  in REG_A4XX_VFD_FETCH()
1483 static inline uint32_t REG_A4XX_VFD_FETCH_INSTR_0(uint32_t i0) { return 0x0000220a + 0x4*i0; }  in REG_A4XX_VFD_FETCH_INSTR_0()
1486 static inline uint32_t A4XX_VFD_FETCH_INSTR_0_FETCHSIZE(uint32_t val)  in A4XX_VFD_FETCH_INSTR_0_FETCHSIZE()
1492 static inline uint32_t A4XX_VFD_FETCH_INSTR_0_BUFSTRIDE(uint32_t val)  in A4XX_VFD_FETCH_INSTR_0_BUFSTRIDE()
1499 static inline uint32_t REG_A4XX_VFD_FETCH_INSTR_1(uint32_t i0) { return 0x0000220b + 0x4*i0; }  in REG_A4XX_VFD_FETCH_INSTR_1()
1501 static inline uint32_t REG_A4XX_VFD_FETCH_INSTR_2(uint32_t i0) { return 0x0000220c + 0x4*i0; }  in REG_A4XX_VFD_FETCH_INSTR_2()
1504 static inline uint32_t A4XX_VFD_FETCH_INSTR_2_SIZE(uint32_t val)  in A4XX_VFD_FETCH_INSTR_2_SIZE()
1509 static inline uint32_t REG_A4XX_VFD_FETCH_INSTR_3(uint32_t i0) { return 0x0000220d + 0x4*i0; }  in REG_A4XX_VFD_FETCH_INSTR_3()
1512 static inline uint32_t A4XX_VFD_FETCH_INSTR_3_STEPRATE(uint32_t val)  in A4XX_VFD_FETCH_INSTR_3_STEPRATE()
1517 static inline uint32_t REG_A4XX_VFD_DECODE(uint32_t i0) { return 0x0000228a + 0x1*i0; }  in REG_A4XX_VFD_DECODE()
1519 static inline uint32_t REG_A4XX_VFD_DECODE_INSTR(uint32_t i0) { return 0x0000228a + 0x1*i0; }  in REG_A4XX_VFD_DECODE_INSTR()
1522 static inline uint32_t A4XX_VFD_DECODE_INSTR_WRITEMASK(uint32_t val)  in A4XX_VFD_DECODE_INSTR_WRITEMASK()
1529 static inline uint32_t A4XX_VFD_DECODE_INSTR_FORMAT(enum a4xx_vtx_fmt val)  in A4XX_VFD_DECODE_INSTR_FORMAT()
1535 static inline uint32_t A4XX_VFD_DECODE_INSTR_REGID(uint32_t val)  in A4XX_VFD_DECODE_INSTR_REGID()
1542 static inline uint32_t A4XX_VFD_DECODE_INSTR_SWAP(enum a3xx_color_swap val)  in A4XX_VFD_DECODE_INSTR_SWAP()
1548 static inline uint32_t A4XX_VFD_DECODE_INSTR_SHIFTCNT(uint32_t val)  in A4XX_VFD_DECODE_INSTR_SHIFTCNT()
1579 static inline uint32_t A4XX_GRAS_CL_GB_CLIP_ADJ_HORZ(uint32_t val)  in A4XX_GRAS_CL_GB_CLIP_ADJ_HORZ()
1585 static inline uint32_t A4XX_GRAS_CL_GB_CLIP_ADJ_VERT(uint32_t val)  in A4XX_GRAS_CL_GB_CLIP_ADJ_VERT()
1593 static inline uint32_t A4XX_GRAS_CL_VPORT_XOFFSET_0(float val)  in A4XX_GRAS_CL_VPORT_XOFFSET_0()
1601 static inline uint32_t A4XX_GRAS_CL_VPORT_XSCALE_0(float val)  in A4XX_GRAS_CL_VPORT_XSCALE_0()
1609 static inline uint32_t A4XX_GRAS_CL_VPORT_YOFFSET_0(float val)  in A4XX_GRAS_CL_VPORT_YOFFSET_0()
1617 static inline uint32_t A4XX_GRAS_CL_VPORT_YSCALE_0(float val)  in A4XX_GRAS_CL_VPORT_YSCALE_0()
1625 static inline uint32_t A4XX_GRAS_CL_VPORT_ZOFFSET_0(float val)  in A4XX_GRAS_CL_VPORT_ZOFFSET_0()
1633 static inline uint32_t A4XX_GRAS_CL_VPORT_ZSCALE_0(float val)  in A4XX_GRAS_CL_VPORT_ZSCALE_0()
1641 static inline uint32_t A4XX_GRAS_SU_POINT_MINMAX_MIN(float val)  in A4XX_GRAS_SU_POINT_MINMAX_MIN()
1643 …return ((((uint32_t)(val * 16.0))) << A4XX_GRAS_SU_POINT_MINMAX_MIN__SHIFT) & A4XX_GRAS_SU_POINT_M…  in A4XX_GRAS_SU_POINT_MINMAX_MIN()
1647 static inline uint32_t A4XX_GRAS_SU_POINT_MINMAX_MAX(float val)  in A4XX_GRAS_SU_POINT_MINMAX_MAX()
1649 …return ((((uint32_t)(val * 16.0))) << A4XX_GRAS_SU_POINT_MINMAX_MAX__SHIFT) & A4XX_GRAS_SU_POINT_M…  in A4XX_GRAS_SU_POINT_MINMAX_MAX()
1655 static inline uint32_t A4XX_GRAS_SU_POINT_SIZE(float val)  in A4XX_GRAS_SU_POINT_SIZE()
1666 static inline uint32_t A4XX_GRAS_SU_POLY_OFFSET_SCALE(float val)  in A4XX_GRAS_SU_POLY_OFFSET_SCALE()
1674 static inline uint32_t A4XX_GRAS_SU_POLY_OFFSET_OFFSET(float val)  in A4XX_GRAS_SU_POLY_OFFSET_OFFSET()
1682 static inline uint32_t A4XX_GRAS_DEPTH_CONTROL_FORMAT(enum a4xx_depth_format val)  in A4XX_GRAS_DEPTH_CONTROL_FORMAT()
1693 static inline uint32_t A4XX_GRAS_SU_MODE_CONTROL_LINEHALFWIDTH(float val)  in A4XX_GRAS_SU_MODE_CONTROL_LINEHALFWIDTH()
1703 static inline uint32_t A4XX_GRAS_SC_CONTROL_RENDER_MODE(enum a3xx_render_mode val)  in A4XX_GRAS_SC_CONTROL_RENDER_MODE()
1709 static inline uint32_t A4XX_GRAS_SC_CONTROL_MSAA_SAMPLES(uint32_t val)  in A4XX_GRAS_SC_CONTROL_MSAA_SAMPLES()
1716 static inline uint32_t A4XX_GRAS_SC_CONTROL_RASTER_MODE(uint32_t val)  in A4XX_GRAS_SC_CONTROL_RASTER_MODE()
1725 static inline uint32_t A4XX_GRAS_SC_SCREEN_SCISSOR_TL_X(uint32_t val)  in A4XX_GRAS_SC_SCREEN_SCISSOR_TL_X()
1731 static inline uint32_t A4XX_GRAS_SC_SCREEN_SCISSOR_TL_Y(uint32_t val)  in A4XX_GRAS_SC_SCREEN_SCISSOR_TL_Y()
1740 static inline uint32_t A4XX_GRAS_SC_SCREEN_SCISSOR_BR_X(uint32_t val)  in A4XX_GRAS_SC_SCREEN_SCISSOR_BR_X()
1746 static inline uint32_t A4XX_GRAS_SC_SCREEN_SCISSOR_BR_Y(uint32_t val)  in A4XX_GRAS_SC_SCREEN_SCISSOR_BR_Y()
1755 static inline uint32_t A4XX_GRAS_SC_WINDOW_SCISSOR_BR_X(uint32_t val)  in A4XX_GRAS_SC_WINDOW_SCISSOR_BR_X()
1761 static inline uint32_t A4XX_GRAS_SC_WINDOW_SCISSOR_BR_Y(uint32_t val)  in A4XX_GRAS_SC_WINDOW_SCISSOR_BR_Y()
1770 static inline uint32_t A4XX_GRAS_SC_WINDOW_SCISSOR_TL_X(uint32_t val)  in A4XX_GRAS_SC_WINDOW_SCISSOR_TL_X()
1776 static inline uint32_t A4XX_GRAS_SC_WINDOW_SCISSOR_TL_Y(uint32_t val)  in A4XX_GRAS_SC_WINDOW_SCISSOR_TL_Y()
1785 static inline uint32_t A4XX_GRAS_SC_EXTENT_WINDOW_BR_X(uint32_t val)  in A4XX_GRAS_SC_EXTENT_WINDOW_BR_X()
1791 static inline uint32_t A4XX_GRAS_SC_EXTENT_WINDOW_BR_Y(uint32_t val)  in A4XX_GRAS_SC_EXTENT_WINDOW_BR_Y()
1800 static inline uint32_t A4XX_GRAS_SC_EXTENT_WINDOW_TL_X(uint32_t val)  in A4XX_GRAS_SC_EXTENT_WINDOW_TL_X()
1806 static inline uint32_t A4XX_GRAS_SC_EXTENT_WINDOW_TL_Y(uint32_t val)  in A4XX_GRAS_SC_EXTENT_WINDOW_TL_Y()
1836 static inline uint32_t A4XX_HLSQ_CONTROL_0_REG_FSTHREADSIZE(enum a3xx_threadsize val)  in A4XX_HLSQ_CONTROL_0_REG_FSTHREADSIZE()
1846 static inline uint32_t A4XX_HLSQ_CONTROL_0_REG_CONSTMODE(uint32_t val)  in A4XX_HLSQ_CONTROL_0_REG_CONSTMODE()
1858 static inline uint32_t A4XX_HLSQ_CONTROL_1_REG_VSTHREADSIZE(enum a3xx_threadsize val)  in A4XX_HLSQ_CONTROL_1_REG_VSTHREADSIZE()
1866 static inline uint32_t A4XX_HLSQ_CONTROL_1_REG_COORDREGID(uint32_t val)  in A4XX_HLSQ_CONTROL_1_REG_COORDREGID()
1875 static inline uint32_t A4XX_HLSQ_CONTROL_2_REG_PRIMALLOCTHRESHOLD(uint32_t val)  in A4XX_HLSQ_CONTROL_2_REG_PRIMALLOCTHRESHOLD()
1881 static inline uint32_t A4XX_HLSQ_CONTROL_2_REG_FACEREGID(uint32_t val)  in A4XX_HLSQ_CONTROL_2_REG_FACEREGID()
1889 static inline uint32_t A4XX_HLSQ_CONTROL_3_REG_REGID(uint32_t val)  in A4XX_HLSQ_CONTROL_3_REG_REGID()
1897 static inline uint32_t A4XX_HLSQ_VS_CONTROL_REG_CONSTLENGTH(uint32_t val)  in A4XX_HLSQ_VS_CONTROL_REG_CONSTLENGTH()
1903 static inline uint32_t A4XX_HLSQ_VS_CONTROL_REG_CONSTOBJECTOFFSET(uint32_t val)  in A4XX_HLSQ_VS_CONTROL_REG_CONSTOBJECTOFFSET()
1909 static inline uint32_t A4XX_HLSQ_VS_CONTROL_REG_SHADEROBJOFFSET(uint32_t val)  in A4XX_HLSQ_VS_CONTROL_REG_SHADEROBJOFFSET()
1915 static inline uint32_t A4XX_HLSQ_VS_CONTROL_REG_INSTRLENGTH(uint32_t val)  in A4XX_HLSQ_VS_CONTROL_REG_INSTRLENGTH()
1923 static inline uint32_t A4XX_HLSQ_FS_CONTROL_REG_CONSTLENGTH(uint32_t val)  in A4XX_HLSQ_FS_CONTROL_REG_CONSTLENGTH()
1929 static inline uint32_t A4XX_HLSQ_FS_CONTROL_REG_CONSTOBJECTOFFSET(uint32_t val)  in A4XX_HLSQ_FS_CONTROL_REG_CONSTOBJECTOFFSET()
1935 static inline uint32_t A4XX_HLSQ_FS_CONTROL_REG_SHADEROBJOFFSET(uint32_t val)  in A4XX_HLSQ_FS_CONTROL_REG_SHADEROBJOFFSET()
1941 static inline uint32_t A4XX_HLSQ_FS_CONTROL_REG_INSTRLENGTH(uint32_t val)  in A4XX_HLSQ_FS_CONTROL_REG_INSTRLENGTH()
1949 static inline uint32_t A4XX_HLSQ_HS_CONTROL_REG_CONSTLENGTH(uint32_t val)  in A4XX_HLSQ_HS_CONTROL_REG_CONSTLENGTH()
1955 static inline uint32_t A4XX_HLSQ_HS_CONTROL_REG_CONSTOBJECTOFFSET(uint32_t val)  in A4XX_HLSQ_HS_CONTROL_REG_CONSTOBJECTOFFSET()
1961 static inline uint32_t A4XX_HLSQ_HS_CONTROL_REG_SHADEROBJOFFSET(uint32_t val)  in A4XX_HLSQ_HS_CONTROL_REG_SHADEROBJOFFSET()
1967 static inline uint32_t A4XX_HLSQ_HS_CONTROL_REG_INSTRLENGTH(uint32_t val)  in A4XX_HLSQ_HS_CONTROL_REG_INSTRLENGTH()
1975 static inline uint32_t A4XX_HLSQ_DS_CONTROL_REG_CONSTLENGTH(uint32_t val)  in A4XX_HLSQ_DS_CONTROL_REG_CONSTLENGTH()
1981 static inline uint32_t A4XX_HLSQ_DS_CONTROL_REG_CONSTOBJECTOFFSET(uint32_t val)  in A4XX_HLSQ_DS_CONTROL_REG_CONSTOBJECTOFFSET()
1987 static inline uint32_t A4XX_HLSQ_DS_CONTROL_REG_SHADEROBJOFFSET(uint32_t val)  in A4XX_HLSQ_DS_CONTROL_REG_SHADEROBJOFFSET()
1993 static inline uint32_t A4XX_HLSQ_DS_CONTROL_REG_INSTRLENGTH(uint32_t val)  in A4XX_HLSQ_DS_CONTROL_REG_INSTRLENGTH()
2001 static inline uint32_t A4XX_HLSQ_GS_CONTROL_REG_CONSTLENGTH(uint32_t val)  in A4XX_HLSQ_GS_CONTROL_REG_CONSTLENGTH()
2007 static inline uint32_t A4XX_HLSQ_GS_CONTROL_REG_CONSTOBJECTOFFSET(uint32_t val)  in A4XX_HLSQ_GS_CONTROL_REG_CONSTOBJECTOFFSET()
2013 static inline uint32_t A4XX_HLSQ_GS_CONTROL_REG_SHADEROBJOFFSET(uint32_t val)  in A4XX_HLSQ_GS_CONTROL_REG_SHADEROBJOFFSET()
2019 static inline uint32_t A4XX_HLSQ_GS_CONTROL_REG_INSTRLENGTH(uint32_t val)  in A4XX_HLSQ_GS_CONTROL_REG_INSTRLENGTH()
2102 static inline uint32_t A4XX_UNKNOWN_20F7(float val)  in A4XX_UNKNOWN_20F7()
2135 static inline uint32_t A4XX_TEX_SAMP_0_XY_MAG(enum a4xx_tex_filter val)  in A4XX_TEX_SAMP_0_XY_MAG()
2141 static inline uint32_t A4XX_TEX_SAMP_0_XY_MIN(enum a4xx_tex_filter val)  in A4XX_TEX_SAMP_0_XY_MIN()
2147 static inline uint32_t A4XX_TEX_SAMP_0_WRAP_S(enum a4xx_tex_clamp val)  in A4XX_TEX_SAMP_0_WRAP_S()
2153 static inline uint32_t A4XX_TEX_SAMP_0_WRAP_T(enum a4xx_tex_clamp val)  in A4XX_TEX_SAMP_0_WRAP_T()
2159 static inline uint32_t A4XX_TEX_SAMP_0_WRAP_R(enum a4xx_tex_clamp val)  in A4XX_TEX_SAMP_0_WRAP_R()
2167 static inline uint32_t A4XX_TEX_SAMP_1_COMPARE_FUNC(enum adreno_compare_func val)  in A4XX_TEX_SAMP_1_COMPARE_FUNC()
2175 static inline uint32_t A4XX_TEX_SAMP_1_MAX_LOD(float val)  in A4XX_TEX_SAMP_1_MAX_LOD()
2177 …return ((((uint32_t)(val * 256.0))) << A4XX_TEX_SAMP_1_MAX_LOD__SHIFT) & A4XX_TEX_SAMP_1_MAX_LOD__…  in A4XX_TEX_SAMP_1_MAX_LOD()
2181 static inline uint32_t A4XX_TEX_SAMP_1_MIN_LOD(float val)  in A4XX_TEX_SAMP_1_MIN_LOD()
2183 …return ((((uint32_t)(val * 256.0))) << A4XX_TEX_SAMP_1_MIN_LOD__SHIFT) & A4XX_TEX_SAMP_1_MIN_LOD__…  in A4XX_TEX_SAMP_1_MIN_LOD()
2190 static inline uint32_t A4XX_TEX_CONST_0_SWIZ_X(enum a4xx_tex_swiz val)  in A4XX_TEX_CONST_0_SWIZ_X()
2196 static inline uint32_t A4XX_TEX_CONST_0_SWIZ_Y(enum a4xx_tex_swiz val)  in A4XX_TEX_CONST_0_SWIZ_Y()
2202 static inline uint32_t A4XX_TEX_CONST_0_SWIZ_Z(enum a4xx_tex_swiz val)  in A4XX_TEX_CONST_0_SWIZ_Z()
2208 static inline uint32_t A4XX_TEX_CONST_0_SWIZ_W(enum a4xx_tex_swiz val)  in A4XX_TEX_CONST_0_SWIZ_W()
2214 static inline uint32_t A4XX_TEX_CONST_0_MIPLVLS(uint32_t val)  in A4XX_TEX_CONST_0_MIPLVLS()
2220 static inline uint32_t A4XX_TEX_CONST_0_FMT(enum a4xx_tex_fmt val)  in A4XX_TEX_CONST_0_FMT()
2226 static inline uint32_t A4XX_TEX_CONST_0_TYPE(enum a4xx_tex_type val)  in A4XX_TEX_CONST_0_TYPE()
2234 static inline uint32_t A4XX_TEX_CONST_1_HEIGHT(uint32_t val)  in A4XX_TEX_CONST_1_HEIGHT()
2240 static inline uint32_t A4XX_TEX_CONST_1_WIDTH(uint32_t val)  in A4XX_TEX_CONST_1_WIDTH()
2248 static inline uint32_t A4XX_TEX_CONST_2_FETCHSIZE(enum a4xx_tex_fetchsize val)  in A4XX_TEX_CONST_2_FETCHSIZE()
2254 static inline uint32_t A4XX_TEX_CONST_2_PITCH(uint32_t val)  in A4XX_TEX_CONST_2_PITCH()
2260 static inline uint32_t A4XX_TEX_CONST_2_SWAP(enum a3xx_color_swap val)  in A4XX_TEX_CONST_2_SWAP()
2268 static inline uint32_t A4XX_TEX_CONST_3_LAYERSZ(uint32_t val)  in A4XX_TEX_CONST_3_LAYERSZ()
2274 static inline uint32_t A4XX_TEX_CONST_3_DEPTH(uint32_t val)  in A4XX_TEX_CONST_3_DEPTH()
2282 static inline uint32_t A4XX_TEX_CONST_4_LAYERSZ(uint32_t val)  in A4XX_TEX_CONST_4_LAYERSZ()
2288 static inline uint32_t A4XX_TEX_CONST_4_BASE(uint32_t val)  in A4XX_TEX_CONST_4_BASE()