Lines Matching refs:uint32_t
90 static const uint32_t qla4_83xx_reg_tbl[] = {
233 uint32_t array[QLA83XX_MAX_RESET_SEQ_ENTRIES];
246 uint32_t select_addr;
247 uint32_t read_addr;
248 uint32_t select_value;
251 uint32_t poll_wait;
252 uint32_t poll_mask;
253 uint32_t data_size;
254 uint32_t rsvd_1;
259 uint32_t addr_1;
260 uint32_t value;
264 uint32_t poll;
265 uint32_t mask;
266 uint32_t modify_mask;
267 uint32_t data_size;
268 uint32_t rsvd;
275 uint32_t addr_1;
276 uint32_t addr_2;
277 uint32_t value_1;
281 uint32_t poll;
282 uint32_t mask;
283 uint32_t value_2;
284 uint32_t data_size;
290 uint32_t addr_1;
291 uint32_t addr_2;
292 uint32_t value_1;
293 uint32_t value_2;
294 uint32_t poll;
295 uint32_t mask;
296 uint32_t data_size;
297 uint32_t rsvd;
304 uint32_t select_addr_1;
305 uint32_t select_addr_2;
306 uint32_t select_value_1;
307 uint32_t select_value_2;
308 uint32_t op_count;
309 uint32_t select_value_mask;
310 uint32_t read_addr;
319 uint32_t addr_1;
320 uint32_t addr_2;
321 uint32_t value_1;
322 uint32_t value_2;
323 uint32_t poll_wait;
324 uint32_t poll_mask;
325 uint32_t modify_mask;
326 uint32_t data_size;
331 uint32_t request_desc; /* IDC request descriptor */
332 uint32_t info1; /* IDC additional info */
333 uint32_t info2; /* IDC additional info */
334 uint32_t info3; /* IDC additional info */
350 uint32_t desc_card_addr;
353 uint32_t start_dma_cmd;
355 uint32_t read_addr;
356 uint32_t read_data_size;
361 uint32_t read_data_size; /* 0-23: size, 24-31: rsvd */