53 static uint32_t get_max_engine_clock_in_mhz(struct kgd_dev *kgd);
60 static void kgd_program_sh_mem_settings(struct kgd_dev *kgd, uint32_t vmid,
61 		uint32_t sh_mem_config,	uint32_t sh_mem_ape1_base,
62 		uint32_t sh_mem_ape1_limit, uint32_t sh_mem_bases);
67 static int kgd_init_pipeline(struct kgd_dev *kgd, uint32_t pipe_id,
68 				uint32_t hpd_size, uint64_t hpd_gpu_addr);
70 static int kgd_hqd_load(struct kgd_dev *kgd, void *mqd, uint32_t pipe_id,
71 			uint32_t queue_id, uint32_t __user *wptr);
74 				uint32_t pipe_id, uint32_t queue_id);
76 static int kgd_hqd_destroy(struct kgd_dev *kgd, uint32_t reset_type,
77 				unsigned int timeout, uint32_t pipe_id,
78 				uint32_t queue_id);
289 static uint32_t get_max_engine_clock_in_mhz(struct kgd_dev *kgd)  in get_max_engine_clock_in_mhz()
302 static void write_register(struct kgd_dev *kgd, uint32_t offset, uint32_t value)  in write_register()
309 static uint32_t read_register(struct kgd_dev *kgd, uint32_t offset)  in read_register()
316 static void lock_srbm(struct kgd_dev *kgd, uint32_t mec, uint32_t pipe,  in lock_srbm()
317 			uint32_t queue, uint32_t vmid)  in lock_srbm()
320 	uint32_t value = PIPEID(pipe) | MEID(mec) | VMID(vmid) | QUEUEID(queue);  in lock_srbm()
334 static void acquire_queue(struct kgd_dev *kgd, uint32_t pipe_id,  in acquire_queue()
335 				uint32_t queue_id)  in acquire_queue()
337 	uint32_t mec = (++pipe_id / CIK_PIPE_PER_MEC) + 1;  in acquire_queue()
338 	uint32_t pipe = (pipe_id % CIK_PIPE_PER_MEC);  in acquire_queue()
348 static void kgd_program_sh_mem_settings(struct kgd_dev *kgd, uint32_t vmid,  in kgd_program_sh_mem_settings()
349 					uint32_t sh_mem_config,  in kgd_program_sh_mem_settings()
350 					uint32_t sh_mem_ape1_base,  in kgd_program_sh_mem_settings()
351 					uint32_t sh_mem_ape1_limit,  in kgd_program_sh_mem_settings()
352 					uint32_t sh_mem_bases)  in kgd_program_sh_mem_settings()
374 	uint32_t pasid_mapping = (pasid == 0) ? 0 :  in kgd_set_pasid_vmid_mapping()
375 				(uint32_t)pasid | ATC_VMID_PASID_MAPPING_VALID;  in kgd_set_pasid_vmid_mapping()
377 	write_register(kgd, ATC_VMID0_PASID_MAPPING + vmid*sizeof(uint32_t),  in kgd_set_pasid_vmid_mapping()
386 	write_register(kgd, IH_VMID_0_LUT + vmid * sizeof(uint32_t),  in kgd_set_pasid_vmid_mapping()
392 static int kgd_init_pipeline(struct kgd_dev *kgd, uint32_t pipe_id,  in kgd_init_pipeline()
393 				uint32_t hpd_size, uint64_t hpd_gpu_addr)  in kgd_init_pipeline()
395 	uint32_t mec = (pipe_id / CIK_PIPE_PER_MEC) + 1;  in kgd_init_pipeline()
396 	uint32_t pipe = (pipe_id % CIK_PIPE_PER_MEC);  in kgd_init_pipeline()
410 static inline uint32_t get_sdma_base_addr(struct cik_sdma_rlc_registers *m)  in get_sdma_base_addr()
412 	uint32_t retval;  in get_sdma_base_addr()
432 static int kgd_hqd_load(struct kgd_dev *kgd, void *mqd, uint32_t pipe_id,  in kgd_hqd_load()
433 			uint32_t queue_id, uint32_t __user *wptr)  in kgd_hqd_load()
435 	uint32_t wptr_shadow, is_wptr_shadow_valid;  in kgd_hqd_load()
512 	uint32_t sdma_base_addr;  in kgd_hqd_sdma_load()
549 				uint32_t pipe_id, uint32_t queue_id)  in kgd_hqd_is_occupied()
551 	uint32_t act;  in kgd_hqd_is_occupied()
553 	uint32_t low, high;  in kgd_hqd_is_occupied()
572 	uint32_t sdma_base_addr;  in kgd_hqd_sdma_is_occupied()
573 	uint32_t sdma_rlc_rb_cntl;  in kgd_hqd_sdma_is_occupied()
587 static int kgd_hqd_destroy(struct kgd_dev *kgd, uint32_t reset_type,  in kgd_hqd_destroy()
588 				unsigned int timeout, uint32_t pipe_id,  in kgd_hqd_destroy()
589 				uint32_t queue_id)  in kgd_hqd_destroy()
591 	uint32_t temp;  in kgd_hqd_destroy()
620 	uint32_t sdma_base_addr;  in kgd_hqd_sdma_destroy()
621 	uint32_t temp;  in kgd_hqd_sdma_destroy()