Lines Matching refs:uint32_t
49 uint32_t TDPLimit;
50 uint32_t NearTDPLimit;
51 uint32_t SafePowerLimit;
52 uint32_t PowerBoostLimit;
58 uint32_t vCG_SPLL_FUNC_CNTL;
59 uint32_t vCG_SPLL_FUNC_CNTL_2;
60 uint32_t vCG_SPLL_FUNC_CNTL_3;
61 uint32_t vCG_SPLL_FUNC_CNTL_4;
62 uint32_t vCG_SPLL_SPREAD_SPECTRUM;
63 uint32_t vCG_SPLL_SPREAD_SPECTRUM_2;
64 uint32_t sclk_value;
71 uint32_t vMPLL_FUNC_CNTL;
72 uint32_t vMPLL_FUNC_CNTL_1;
73 uint32_t vMPLL_FUNC_CNTL_2;
74 uint32_t vMPLL_AD_FUNC_CNTL;
75 uint32_t vMPLL_AD_FUNC_CNTL_2;
76 uint32_t vMPLL_DQ_FUNC_CNTL;
77 uint32_t vMPLL_DQ_FUNC_CNTL_2;
78 uint32_t vMCLK_PWRMGT_CNTL;
79 uint32_t vDLL_CNTL;
80 uint32_t vMPLL_SS;
81 uint32_t vMPLL_SS2;
82 uint32_t mclk_value;
106 uint32_t aT;
107 uint32_t bSP;
114 uint32_t powergate_en;
119 uint32_t SQPowerThrottle;
120 uint32_t SQPowerThrottle_2;
121 uint32_t reserved[2];
154 uint32_t lowMask[NISLANDS_SMC_VOLTAGEMASK_MAX];
168 uint32_t lowSMIO[NISLANDS_MAX_NO_VREG_STEPS];
200 uint32_t tpp[SMC_NISLANDS_MC_TPP_CAC_NUM_OF_ENTRIES];
201 uint32_t cacValue[SMC_NISLANDS_MC_TPP_CAC_NUM_OF_ENTRIES];
209 uint32_t cac_bif_lut[SMC_NISLANDS_BIF_LUT_NUM_OF_ENTRIES];
210 …uint32_t cac_lkge_lut[SMC_NISLANDS_LKGE_LUT_NUM_OF_TEMP_ENTRIES][SMC_NISLANDS_LKGE_…
212 uint32_t pwr_const;
214 uint32_t dc_cacValue;
215 uint32_t bif_cacValue;
216 uint32_t lkge_pwr;
224 uint32_t last_power;
236 uint32_t dynPwr_TDP[4];
237 uint32_t lkgePwr_TDP[4];
238 uint32_t power_TDP[4];
239 uint32_t avg_dynPwr_TDP;
240 uint32_t avg_lkgePwr_TDP;
241 uint32_t avg_power_TDP;
242 uint32_t lts_power_TDP;
263 uint32_t value[SMC_NISLANDS_MC_REGISTER_ARRAY_SIZE];
280 uint32_t mc_arb_dram_timing;
281 uint32_t mc_arb_dram_timing2;
299 uint32_t freq[256];
300 uint32_t ss[256];