1/*
2 * Permission is hereby granted, free of charge, to any person obtaining a copy
3 * of this software and associated documentation files (the "Software"), to
4 * deal in the Software without restriction, including without limitation the
5 * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
6 * sell copies of the Software, and to permit persons to whom the Software is
7 * furnished to do so, subject to the following conditions:
8 *
9 * The above copyright notice and this permission notice shall be included in
10 * all copies or substantial portions of the Software.
11 *
12 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
13 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
14 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
15 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
16 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
17 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
18 * DEALINGS IN THE SOFTWARE.
19 */
20
21#ifndef __XEN_PUBLIC_PHYSDEV_H__
22#define __XEN_PUBLIC_PHYSDEV_H__
23
24/*
25 * Prototype for this hypercall is:
26 *  int physdev_op(int cmd, void *args)
27 * @cmd	 == PHYSDEVOP_??? (physdev operation).
28 * @args == Operation-specific extra arguments (NULL if none).
29 */
30
31/*
32 * Notify end-of-interrupt (EOI) for the specified IRQ.
33 * @arg == pointer to physdev_eoi structure.
34 */
35#define PHYSDEVOP_eoi			12
36struct physdev_eoi {
37	/* IN */
38	uint32_t irq;
39};
40
41/*
42 * Register a shared page for the hypervisor to indicate whether the guest
43 * must issue PHYSDEVOP_eoi. The semantics of PHYSDEVOP_eoi change slightly
44 * once the guest used this function in that the associated event channel
45 * will automatically get unmasked. The page registered is used as a bit
46 * array indexed by Xen's PIRQ value.
47 */
48#define PHYSDEVOP_pirq_eoi_gmfn_v1       17
49/*
50 * Register a shared page for the hypervisor to indicate whether the
51 * guest must issue PHYSDEVOP_eoi. This hypercall is very similar to
52 * PHYSDEVOP_pirq_eoi_gmfn_v1 but it doesn't change the semantics of
53 * PHYSDEVOP_eoi. The page registered is used as a bit array indexed by
54 * Xen's PIRQ value.
55 */
56#define PHYSDEVOP_pirq_eoi_gmfn_v2       28
57struct physdev_pirq_eoi_gmfn {
58    /* IN */
59    xen_ulong_t gmfn;
60};
61
62/*
63 * Query the status of an IRQ line.
64 * @arg == pointer to physdev_irq_status_query structure.
65 */
66#define PHYSDEVOP_irq_status_query	 5
67struct physdev_irq_status_query {
68	/* IN */
69	uint32_t irq;
70	/* OUT */
71	uint32_t flags; /* XENIRQSTAT_* */
72};
73
74/* Need to call PHYSDEVOP_eoi when the IRQ has been serviced? */
75#define _XENIRQSTAT_needs_eoi	(0)
76#define	 XENIRQSTAT_needs_eoi	(1U<<_XENIRQSTAT_needs_eoi)
77
78/* IRQ shared by multiple guests? */
79#define _XENIRQSTAT_shared	(1)
80#define	 XENIRQSTAT_shared	(1U<<_XENIRQSTAT_shared)
81
82/*
83 * Set the current VCPU's I/O privilege level.
84 * @arg == pointer to physdev_set_iopl structure.
85 */
86#define PHYSDEVOP_set_iopl		 6
87struct physdev_set_iopl {
88	/* IN */
89	uint32_t iopl;
90};
91
92/*
93 * Set the current VCPU's I/O-port permissions bitmap.
94 * @arg == pointer to physdev_set_iobitmap structure.
95 */
96#define PHYSDEVOP_set_iobitmap		 7
97struct physdev_set_iobitmap {
98	/* IN */
99	uint8_t * bitmap;
100	uint32_t nr_ports;
101};
102
103/*
104 * Read or write an IO-APIC register.
105 * @arg == pointer to physdev_apic structure.
106 */
107#define PHYSDEVOP_apic_read		 8
108#define PHYSDEVOP_apic_write		 9
109struct physdev_apic {
110	/* IN */
111	unsigned long apic_physbase;
112	uint32_t reg;
113	/* IN or OUT */
114	uint32_t value;
115};
116
117/*
118 * Allocate or free a physical upcall vector for the specified IRQ line.
119 * @arg == pointer to physdev_irq structure.
120 */
121#define PHYSDEVOP_alloc_irq_vector	10
122#define PHYSDEVOP_free_irq_vector	11
123struct physdev_irq {
124	/* IN */
125	uint32_t irq;
126	/* IN or OUT */
127	uint32_t vector;
128};
129
130#define MAP_PIRQ_TYPE_MSI		0x0
131#define MAP_PIRQ_TYPE_GSI		0x1
132#define MAP_PIRQ_TYPE_UNKNOWN		0x2
133#define MAP_PIRQ_TYPE_MSI_SEG		0x3
134#define MAP_PIRQ_TYPE_MULTI_MSI		0x4
135
136#define PHYSDEVOP_map_pirq		13
137struct physdev_map_pirq {
138    domid_t domid;
139    /* IN */
140    int type;
141    /* IN */
142    int index;
143    /* IN or OUT */
144    int pirq;
145    /* IN - high 16 bits hold segment for ..._MSI_SEG and ..._MULTI_MSI */
146    int bus;
147    /* IN */
148    int devfn;
149    /* IN
150     * - For MSI-X contains entry number.
151     * - For MSI with ..._MULTI_MSI contains number of vectors.
152     * OUT (..._MULTI_MSI only)
153     * - Number of vectors allocated.
154     */
155    int entry_nr;
156    /* IN */
157    uint64_t table_base;
158};
159
160#define PHYSDEVOP_unmap_pirq		14
161struct physdev_unmap_pirq {
162    domid_t domid;
163    /* IN */
164    int pirq;
165};
166
167#define PHYSDEVOP_manage_pci_add	15
168#define PHYSDEVOP_manage_pci_remove	16
169struct physdev_manage_pci {
170	/* IN */
171	uint8_t bus;
172	uint8_t devfn;
173};
174
175#define PHYSDEVOP_restore_msi            19
176struct physdev_restore_msi {
177	/* IN */
178	uint8_t bus;
179	uint8_t devfn;
180};
181
182#define PHYSDEVOP_manage_pci_add_ext	20
183struct physdev_manage_pci_ext {
184	/* IN */
185	uint8_t bus;
186	uint8_t devfn;
187	unsigned is_extfn;
188	unsigned is_virtfn;
189	struct {
190		uint8_t bus;
191		uint8_t devfn;
192	} physfn;
193};
194
195/*
196 * Argument to physdev_op_compat() hypercall. Superceded by new physdev_op()
197 * hypercall since 0x00030202.
198 */
199struct physdev_op {
200	uint32_t cmd;
201	union {
202		struct physdev_irq_status_query	     irq_status_query;
203		struct physdev_set_iopl		     set_iopl;
204		struct physdev_set_iobitmap	     set_iobitmap;
205		struct physdev_apic		     apic_op;
206		struct physdev_irq		     irq_op;
207	} u;
208};
209
210#define PHYSDEVOP_setup_gsi    21
211struct physdev_setup_gsi {
212    int gsi;
213    /* IN */
214    uint8_t triggering;
215    /* IN */
216    uint8_t polarity;
217    /* IN */
218};
219
220#define PHYSDEVOP_get_nr_pirqs    22
221struct physdev_nr_pirqs {
222    /* OUT */
223    uint32_t nr_pirqs;
224};
225
226/* type is MAP_PIRQ_TYPE_GSI or MAP_PIRQ_TYPE_MSI
227 * the hypercall returns a free pirq */
228#define PHYSDEVOP_get_free_pirq    23
229struct physdev_get_free_pirq {
230    /* IN */
231    int type;
232    /* OUT */
233    uint32_t pirq;
234};
235
236#define XEN_PCI_DEV_EXTFN              0x1
237#define XEN_PCI_DEV_VIRTFN             0x2
238#define XEN_PCI_DEV_PXM                0x4
239
240#define XEN_PCI_MMCFG_RESERVED         0x1
241
242#define PHYSDEVOP_pci_mmcfg_reserved    24
243struct physdev_pci_mmcfg_reserved {
244    uint64_t address;
245    uint16_t segment;
246    uint8_t start_bus;
247    uint8_t end_bus;
248    uint32_t flags;
249};
250
251#define PHYSDEVOP_pci_device_add        25
252struct physdev_pci_device_add {
253    /* IN */
254    uint16_t seg;
255    uint8_t bus;
256    uint8_t devfn;
257    uint32_t flags;
258    struct {
259        uint8_t bus;
260        uint8_t devfn;
261    } physfn;
262#if defined(__STDC_VERSION__) && __STDC_VERSION__ >= 199901L
263    uint32_t optarr[];
264#elif defined(__GNUC__)
265    uint32_t optarr[0];
266#endif
267};
268
269#define PHYSDEVOP_pci_device_remove     26
270#define PHYSDEVOP_restore_msi_ext       27
271/*
272 * Dom0 should use these two to announce MMIO resources assigned to
273 * MSI-X capable devices won't (prepare) or may (release) change.
274 */
275#define PHYSDEVOP_prepare_msix          30
276#define PHYSDEVOP_release_msix          31
277struct physdev_pci_device {
278    /* IN */
279    uint16_t seg;
280    uint8_t bus;
281    uint8_t devfn;
282};
283
284#define PHYSDEVOP_DBGP_RESET_PREPARE    1
285#define PHYSDEVOP_DBGP_RESET_DONE       2
286
287#define PHYSDEVOP_DBGP_BUS_UNKNOWN      0
288#define PHYSDEVOP_DBGP_BUS_PCI          1
289
290#define PHYSDEVOP_dbgp_op               29
291struct physdev_dbgp_op {
292    /* IN */
293    uint8_t op;
294    uint8_t bus;
295    union {
296        struct physdev_pci_device pci;
297    } u;
298};
299
300/*
301 * Notify that some PIRQ-bound event channels have been unmasked.
302 * ** This command is obsolete since interface version 0x00030202 and is **
303 * ** unsupported by newer versions of Xen.				 **
304 */
305#define PHYSDEVOP_IRQ_UNMASK_NOTIFY	 4
306
307/*
308 * These all-capitals physdev operation names are superceded by the new names
309 * (defined above) since interface version 0x00030202.
310 */
311#define PHYSDEVOP_IRQ_STATUS_QUERY	 PHYSDEVOP_irq_status_query
312#define PHYSDEVOP_SET_IOPL		 PHYSDEVOP_set_iopl
313#define PHYSDEVOP_SET_IOBITMAP		 PHYSDEVOP_set_iobitmap
314#define PHYSDEVOP_APIC_READ		 PHYSDEVOP_apic_read
315#define PHYSDEVOP_APIC_WRITE		 PHYSDEVOP_apic_write
316#define PHYSDEVOP_ASSIGN_VECTOR		 PHYSDEVOP_alloc_irq_vector
317#define PHYSDEVOP_FREE_VECTOR		 PHYSDEVOP_free_irq_vector
318#define PHYSDEVOP_IRQ_NEEDS_UNMASK_NOTIFY XENIRQSTAT_needs_eoi
319#define PHYSDEVOP_IRQ_SHARED		 XENIRQSTAT_shared
320
321#endif /* __XEN_PUBLIC_PHYSDEV_H__ */
322