Lines Matching refs:uint32_t

123 	uint32_t mask_clk_reg;
124 	uint32_t mask_data_reg;
125 	uint32_t a_clk_reg;
126 	uint32_t a_data_reg;
127 	uint32_t en_clk_reg;
128 	uint32_t en_data_reg;
129 	uint32_t y_clk_reg;
130 	uint32_t y_data_reg;
131 	uint32_t mask_clk_mask;
132 	uint32_t mask_data_mask;
133 	uint32_t a_clk_mask;
134 	uint32_t a_data_mask;
135 	uint32_t en_clk_mask;
136 	uint32_t en_data_mask;
137 	uint32_t y_clk_mask;
138 	uint32_t y_data_mask;
142     uint32_t freq;
143     uint32_t value;
167 	uint32_t reference_freq;
170 	uint32_t reference_div;
171 	uint32_t post_div;
174 	uint32_t pll_in_min;
175 	uint32_t pll_in_max;
176 	uint32_t pll_out_min;
177 	uint32_t pll_out_max;
178 	uint32_t lcd_pll_out_min;
179 	uint32_t lcd_pll_out_max;
180 	uint32_t best_vco;
183 	uint32_t min_ref_div;
184 	uint32_t max_ref_div;
185 	uint32_t min_post_div;
186 	uint32_t max_post_div;
187 	uint32_t min_feedback_div;
188 	uint32_t max_feedback_div;
189 	uint32_t min_frac_feedback_div;
190 	uint32_t max_frac_feedback_div;
193 	uint32_t flags;
196 	uint32_t id;
279 	uint32_t active_encoders;
299 	uint32_t tv_uv_adr;
300 	uint32_t timing_cntl;
301 	uint32_t hrestart;
302 	uint32_t vrestart;
303 	uint32_t frestart;
333 	uint32_t crtc_offset;
344 	uint32_t legacy_display_base_addr;
376 	uint32_t ps2_pdac_adj;
389 	uint32_t lvds_gen_cntl;
399 	uint32_t ps2_tvdac_adj;
400 	uint32_t ntsc_tvdac_adj;
401 	uint32_t pal_tvdac_adj;
431 	uint32_t lcd_misc;
433 	uint32_t lcd_ss_id;
462 	uint32_t encoder_enum;
463 	uint32_t encoder_id;
464 	uint32_t devices;
465 	uint32_t active_device;
466 	uint32_t flags;
467 	uint32_t pixel_clock;
470 	uint32_t underscan_hborder;
471 	uint32_t underscan_vborder;
480 	uint32_t offset;
486 	uint32_t igp_lane_info;
544 	uint32_t connector_id;
545 	uint32_t devices;
692 			  uint32_t connector_id,
693 			  uint32_t supported_device,
696 			  uint32_t igp_lane_info,
702 			    uint32_t connector_id,
703 			    uint32_t supported_device,
708 extern uint32_t
709 radeon_get_encoder_enum(struct drm_device *dev, uint32_t supported_device,
817 				      uint32_t *dot_clock_p,
818 				      uint32_t *fb_div_p,
819 				      uint32_t *frac_fb_div_p,
820 				      uint32_t *ref_div_p,
821 				      uint32_t *post_div_p);
870 				   uint32_t handle,
871 				   uint32_t width,
872 				   uint32_t height,
962 				      uint32_t *h_total_disp, uint32_t *h_sync_strt_wid,
963 				      uint32_t *v_total_disp, uint32_t *v_sync_strt_wid);
965 				  uint32_t *htotal_cntl, uint32_t *ppll_ref_div,
966 				  uint32_t *ppll_div_3, uint32_t *pixclks_cntl);
968 				  uint32_t *htotal2_cntl, uint32_t *p2pll_ref_div,
969 				  uint32_t *p2pll_div_0, uint32_t *pixclks_cntl);