401 uint32_t qla4_82xx_rd_32(struct scsi_qla_host *ha, ulong off)  in qla4_82xx_rd_32()
426 int qla4_82xx_md_rd_32(struct scsi_qla_host *ha, uint32_t off, uint32_t *data)  in qla4_82xx_md_rd_32()
428 	uint32_t win_read, off_value;  in qla4_82xx_md_rd_32()
452 int qla4_82xx_md_wr_32(struct scsi_qla_host *ha, uint32_t off, uint32_t data)  in qla4_82xx_md_wr_32()
454 	uint32_t win_read, off_value;  in qla4_82xx_md_wr_32()
1191 				uint32_t *data, uint32_t count)  in qla4_8xxx_ms_mem_write_128b()
1194 	uint32_t agt_ctrl;  in qla4_8xxx_ms_mem_write_128b()
1287 qla4_82xx_load_from_flash(struct scsi_qla_host *ha, uint32_t image_start)  in qla4_82xx_load_from_flash()
1332 static int qla4_82xx_load_fw(struct scsi_qla_host *ha, uint32_t image_start)  in qla4_82xx_load_fw()
1369 	uint32_t temp;  in qla4_82xx_pci_mem_read_2M()
1445 		*(uint32_t *)data = val;  in qla4_82xx_pci_mem_read_2M()
1460 	uint32_t temp;  in qla4_82xx_pci_mem_write_2M()
1499 		tmpw = *((uint32_t *)data);  in qla4_82xx_pci_mem_write_2M()
1589 	uint32_t state = 0;  in qla4_82xx_rcvpeg_ready()
1619 	uint32_t drv_active;  in qla4_8xxx_set_drv_active()
1641 	uint32_t drv_active;  in qla4_8xxx_clear_drv_active()
1662 	uint32_t drv_state, drv_active;  in qla4_8xxx_need_reset()
1686 	uint32_t drv_state;  in qla4_8xxx_set_rst_ready()
1707 	uint32_t drv_state;  in qla4_8xxx_clear_rst_ready()
1729 	uint32_t qsnt_state;  in qla4_8xxx_set_qsnt_ready()
1748 qla4_82xx_start_firmware(struct scsi_qla_host *ha, uint32_t image_start)  in qla4_82xx_start_firmware()
1824 static uint32_t ql4_84xx_poll_wait_for_ready(struct scsi_qla_host *ha,  in ql4_84xx_poll_wait_for_ready()
1825 					     uint32_t addr1, uint32_t mask)  in ql4_84xx_poll_wait_for_ready()
1828 	uint32_t rval = QLA_SUCCESS;  in ql4_84xx_poll_wait_for_ready()
1829 	uint32_t temp;  in ql4_84xx_poll_wait_for_ready()
1846 uint32_t ql4_84xx_ipmdio_rd_reg(struct scsi_qla_host *ha, uint32_t addr1,  in ql4_84xx_ipmdio_rd_reg()
1847 				uint32_t addr3, uint32_t mask, uint32_t addr,  in ql4_84xx_ipmdio_rd_reg()
1848 				uint32_t *data_ptr)  in ql4_84xx_ipmdio_rd_reg()
1851 	uint32_t temp;  in ql4_84xx_ipmdio_rd_reg()
1852 	uint32_t data;  in ql4_84xx_ipmdio_rd_reg()
1873 static uint32_t ql4_84xx_poll_wait_ipmdio_bus_idle(struct scsi_qla_host *ha,  in ql4_84xx_poll_wait_ipmdio_bus_idle()
1874 						    uint32_t addr1,  in ql4_84xx_poll_wait_ipmdio_bus_idle()
1875 						    uint32_t addr2,  in ql4_84xx_poll_wait_ipmdio_bus_idle()
1876 						    uint32_t addr3,  in ql4_84xx_poll_wait_ipmdio_bus_idle()
1877 						    uint32_t mask)  in ql4_84xx_poll_wait_ipmdio_bus_idle()
1880 	uint32_t temp;  in ql4_84xx_poll_wait_ipmdio_bus_idle()
1881 	uint32_t rval = QLA_SUCCESS;  in ql4_84xx_poll_wait_ipmdio_bus_idle()
1898 				  uint32_t addr1, uint32_t addr3,  in ql4_84xx_ipmdio_wr_reg()
1899 				  uint32_t mask, uint32_t addr,  in ql4_84xx_ipmdio_wr_reg()
1900 				  uint32_t value)  in ql4_84xx_ipmdio_wr_reg()
1921 				uint32_t **d_ptr)  in qla4_8xxx_minidump_process_rdcrb()
1923 	uint32_t r_addr, r_stride, loop_cnt, i, r_value;  in qla4_8xxx_minidump_process_rdcrb()
1925 	uint32_t *data_ptr = *d_ptr;  in qla4_8xxx_minidump_process_rdcrb()
1945 	uint32_t dma_eng_num = 0, cmd_sts_and_cntrl = 0;  in qla4_83xx_check_dma_engine_state()
1975 	uint32_t dma_eng_num = 0, cmd_sts_and_cntrl = 0;  in qla4_83xx_start_pex_dma()
2029 				uint32_t **d_ptr)  in qla4_8xxx_minidump_pex_dma_read()
2033 	uint32_t size, read_size;  in qla4_8xxx_minidump_pex_dma_read()
2106 			      (uint32_t *)&dma_desc,  in qla4_8xxx_minidump_pex_dma_read()
2134 	*d_ptr = (uint32_t *)data_ptr;  in qla4_8xxx_minidump_pex_dma_read()
2146 				 uint32_t **d_ptr)  in qla4_8xxx_minidump_process_l2tag()
2148 	uint32_t addr, r_addr, c_addr, t_r_addr;  in qla4_8xxx_minidump_process_l2tag()
2149 	uint32_t i, k, loop_count, t_value, r_cnt, r_value;  in qla4_8xxx_minidump_process_l2tag()
2151 	uint32_t c_value_w, c_value_r;  in qla4_8xxx_minidump_process_l2tag()
2154 	uint32_t *data_ptr = *d_ptr;  in qla4_8xxx_minidump_process_l2tag()
2207 	uint32_t read_value, opcode, poll_time, addr, index, rval = QLA_SUCCESS;  in qla4_8xxx_minidump_process_control()
2208 	uint32_t crb_addr;  in qla4_8xxx_minidump_process_control()
2322 				uint32_t **d_ptr)  in qla4_8xxx_minidump_process_rdocm()
2324 	uint32_t r_addr, r_stride, loop_cnt, i, r_value;  in qla4_8xxx_minidump_process_rdocm()
2326 	uint32_t *data_ptr = *d_ptr;  in qla4_8xxx_minidump_process_rdocm()
2344 		__func__, (long unsigned int) (loop_cnt * sizeof(uint32_t))));  in qla4_8xxx_minidump_process_rdocm()
2350 				uint32_t **d_ptr)  in qla4_8xxx_minidump_process_rdmux()
2352 	uint32_t r_addr, s_stride, s_addr, s_value, loop_cnt, i, r_value;  in qla4_8xxx_minidump_process_rdmux()
2354 	uint32_t *data_ptr = *d_ptr;  in qla4_8xxx_minidump_process_rdmux()
2376 				uint32_t **d_ptr)  in qla4_8xxx_minidump_process_l1cache()
2378 	uint32_t addr, r_addr, c_addr, t_r_addr;  in qla4_8xxx_minidump_process_l1cache()
2379 	uint32_t i, k, loop_count, t_value, r_cnt, r_value;  in qla4_8xxx_minidump_process_l1cache()
2380 	uint32_t c_value_w;  in qla4_8xxx_minidump_process_l1cache()
2382 	uint32_t *data_ptr = *d_ptr;  in qla4_8xxx_minidump_process_l1cache()
2410 				uint32_t **d_ptr)  in qla4_8xxx_minidump_process_queue()
2412 	uint32_t s_addr, r_addr;  in qla4_8xxx_minidump_process_queue()
2413 	uint32_t r_stride, r_value, r_cnt, qid = 0;  in qla4_8xxx_minidump_process_queue()
2414 	uint32_t i, k, loop_cnt;  in qla4_8xxx_minidump_process_queue()
2416 	uint32_t *data_ptr = *d_ptr;  in qla4_8xxx_minidump_process_queue()
2443 				uint32_t **d_ptr)  in qla4_82xx_minidump_process_rdrom()
2445 	uint32_t r_addr, r_value;  in qla4_82xx_minidump_process_rdrom()
2446 	uint32_t i, loop_cnt;  in qla4_82xx_minidump_process_rdrom()
2448 	uint32_t *data_ptr = *d_ptr;  in qla4_82xx_minidump_process_rdrom()
2453 	loop_cnt = rom_hdr->read_data_size/sizeof(uint32_t);  in qla4_82xx_minidump_process_rdrom()
2466 		r_addr += sizeof(uint32_t);  in qla4_82xx_minidump_process_rdrom()
2477 				uint32_t **d_ptr)  in __qla4_8xxx_minidump_process_rdmem()
2479 	uint32_t r_addr, r_value, r_data;  in __qla4_8xxx_minidump_process_rdmem()
2480 	uint32_t i, j, loop_cnt;  in __qla4_8xxx_minidump_process_rdmem()
2483 	uint32_t *data_ptr = *d_ptr;  in __qla4_8xxx_minidump_process_rdmem()
2559 				uint32_t **d_ptr)  in qla4_8xxx_minidump_process_rdmem()
2561 	uint32_t *data_ptr = *d_ptr;  in qla4_8xxx_minidump_process_rdmem()
2589 static uint32_t qla83xx_minidump_process_pollrd(struct scsi_qla_host *ha,  in qla83xx_minidump_process_pollrd()
2591 				uint32_t **d_ptr)  in qla83xx_minidump_process_pollrd()
2593 	uint32_t r_addr, s_addr, s_value, r_value, poll_wait, poll_mask;  in qla83xx_minidump_process_pollrd()
2595 	uint32_t *data_ptr = *d_ptr;  in qla83xx_minidump_process_pollrd()
2596 	uint32_t rval = QLA_SUCCESS;  in qla83xx_minidump_process_pollrd()
2638 static uint32_t qla4_84xx_minidump_process_rddfe(struct scsi_qla_host *ha,  in qla4_84xx_minidump_process_rddfe()
2640 				uint32_t **d_ptr)  in qla4_84xx_minidump_process_rddfe()
2643 	uint32_t addr1, addr2, value, data, temp, wrval;  in qla4_84xx_minidump_process_rddfe()
2646 	uint32_t poll, mask, data_size, modify_mask;  in qla4_84xx_minidump_process_rddfe()
2647 	uint32_t wait_count = 0;  in qla4_84xx_minidump_process_rddfe()
2648 	uint32_t *data_ptr = *d_ptr;  in qla4_84xx_minidump_process_rddfe()
2650 	uint32_t rval = QLA_SUCCESS;  in qla4_84xx_minidump_process_rddfe()
2734 static uint32_t qla4_84xx_minidump_process_rdmdio(struct scsi_qla_host *ha,  in qla4_84xx_minidump_process_rdmdio()
2736 				uint32_t **d_ptr)  in qla4_84xx_minidump_process_rdmdio()
2739 	uint32_t addr1, addr2, value1, value2, data, selval;  in qla4_84xx_minidump_process_rdmdio()
2741 	uint32_t addr3, addr4, addr5, addr6, addr7;  in qla4_84xx_minidump_process_rdmdio()
2743 	uint32_t poll, mask;  in qla4_84xx_minidump_process_rdmdio()
2744 	uint32_t *data_ptr = *d_ptr;  in qla4_84xx_minidump_process_rdmdio()
2810 static uint32_t qla4_84xx_minidump_process_pollwr(struct scsi_qla_host *ha,  in qla4_84xx_minidump_process_pollwr()
2812 				uint32_t **d_ptr)  in qla4_84xx_minidump_process_pollwr()
2814 	uint32_t addr1, addr2, value1, value2, poll, mask, r_value;  in qla4_84xx_minidump_process_pollwr()
2816 	uint32_t wait_count = 0;  in qla4_84xx_minidump_process_pollwr()
2817 	uint32_t rval = QLA_SUCCESS;  in qla4_84xx_minidump_process_pollwr()
2861 				uint32_t **d_ptr)  in qla83xx_minidump_process_rdmux2()
2863 	uint32_t sel_val1, sel_val2, t_sel_val, data, i;  in qla83xx_minidump_process_rdmux2()
2864 	uint32_t sel_addr1, sel_addr2, sel_val_mask, read_addr;  in qla83xx_minidump_process_rdmux2()
2866 	uint32_t *data_ptr = *d_ptr;  in qla83xx_minidump_process_rdmux2()
2902 static uint32_t qla83xx_minidump_process_pollrdmwr(struct scsi_qla_host *ha,  in qla83xx_minidump_process_pollrdmwr()
2904 				uint32_t **d_ptr)  in qla83xx_minidump_process_pollrdmwr()
2906 	uint32_t poll_wait, poll_mask, r_value, data;  in qla83xx_minidump_process_pollrdmwr()
2907 	uint32_t addr_1, addr_2, value_1, value_2;  in qla83xx_minidump_process_pollrdmwr()
2908 	uint32_t *data_ptr = *d_ptr;  in qla83xx_minidump_process_pollrdmwr()
2909 	uint32_t rval = QLA_SUCCESS;  in qla83xx_minidump_process_pollrdmwr()
2968 static uint32_t qla4_83xx_minidump_process_rdrom(struct scsi_qla_host *ha,  in qla4_83xx_minidump_process_rdrom()
2970 				uint32_t **d_ptr)  in qla4_83xx_minidump_process_rdrom()
2972 	uint32_t fl_addr, u32_count, rval;  in qla4_83xx_minidump_process_rdrom()
2974 	uint32_t *data_ptr = *d_ptr;  in qla4_83xx_minidump_process_rdrom()
2978 	u32_count = le32_to_cpu(rom_hdr->read_data_size)/sizeof(uint32_t);  in qla4_83xx_minidump_process_rdrom()
3008 	uint32_t *data_ptr;  in qla4_8xxx_collect_md_data()
3009 	uint32_t data_collected = 0;  in qla4_8xxx_collect_md_data()
3012 	uint32_t timestamp;  in qla4_8xxx_collect_md_data()
3023 	data_ptr = (uint32_t *)((uint8_t *)ha->fw_dump +  in qla4_8xxx_collect_md_data()
3264 	uint32_t old_count, count;  in qla4_8xxx_device_bootstrap()
3324 	uint32_t dev_state, drv_state, drv_active;  in qla4_82xx_need_reset_handler()
3325 	uint32_t active_mask = 0xFFFFFFFF;  in qla4_82xx_need_reset_handler()
3412 	uint32_t drv_active;  in qla4_82xx_set_idc_ver()
3434 	uint32_t drv_active;  in qla4_83xx_set_idc_ver()
3471 	uint32_t drv_active;  in qla4_8xxx_update_idc_reg()
3512 	uint32_t dev_state;  in qla4_8xxx_device_state_handler()
3645 static inline uint32_t
3646 flash_conf_addr(struct ql82xx_hw_data *hw, uint32_t faddr)  in flash_conf_addr()
3651 static inline uint32_t
3652 flash_data_addr(struct ql82xx_hw_data *hw, uint32_t faddr)  in flash_data_addr()
3657 static uint32_t *
3658 qla4_82xx_read_flash_data(struct scsi_qla_host *ha, uint32_t *dwptr,  in qla4_82xx_read_flash_data()
3659     uint32_t faddr, uint32_t length)  in qla4_82xx_read_flash_data()
3661 	uint32_t i;  in qla4_82xx_read_flash_data()
3662 	uint32_t val;  in qla4_82xx_read_flash_data()
3694 		uint32_t offset, uint32_t length)  in qla4_82xx_read_optrom_data()
3696 	qla4_82xx_read_flash_data(ha, (uint32_t *)buf, offset, length);  in qla4_82xx_read_optrom_data()
3701 qla4_8xxx_find_flt_start(struct scsi_qla_host *ha, uint32_t *start)  in qla4_8xxx_find_flt_start()
3718 qla4_8xxx_get_flt_info(struct scsi_qla_host *ha, uint32_t flt_addr)  in qla4_8xxx_get_flt_info()
3723 	uint32_t start, status;  in qla4_8xxx_get_flt_info()
3898 	uint32_t *wptr;  in qla4_82xx_get_idc_param()
3902 	wptr = (uint32_t *)ha->request_ring;  in qla4_82xx_get_idc_param()
3921 void qla4_82xx_queue_mbox_cmd(struct scsi_qla_host *ha, uint32_t *mbx_cmd,  in qla4_82xx_queue_mbox_cmd()
3958 	uint32_t flt_addr;  in qla4_8xxx_get_flash_info()
3988 	uint32_t mbox_cmd[MBOX_REG_COUNT];  in qla4_8xxx_stop_firmware()
3989 	uint32_t mbox_sts[MBOX_REG_COUNT];  in qla4_8xxx_stop_firmware()
4011 	uint32_t dev_state;  in qla4_82xx_isp_reset()
4047 	uint32_t mbox_cmd[MBOX_REG_COUNT];  in qla4_8xxx_get_sys_info()
4048 	uint32_t mbox_sts[MBOX_REG_COUNT];  in qla4_8xxx_get_sys_info()
4116 	uint32_t mbox_cmd[MBOX_REG_COUNT];  in qla4_8xxx_intr_enable()
4117 	uint32_t mbox_sts[MBOX_REG_COUNT];  in qla4_8xxx_intr_enable()
4137 	uint32_t mbox_cmd[MBOX_REG_COUNT];  in qla4_8xxx_intr_disable()
4138 	uint32_t mbox_sts[MBOX_REG_COUNT];  in qla4_8xxx_intr_disable()