| /linux-4.4.14/drivers/clk/berlin/ |
| D | berlin2-div.c | 77 struct berlin2_div *div = to_berlin2_div(hw); in berlin2_div_is_enabled() local
78 struct berlin2_div_map *map = &div->map; in berlin2_div_is_enabled()
81 if (div->lock) in berlin2_div_is_enabled()
82 spin_lock(div->lock); in berlin2_div_is_enabled()
84 reg = readl_relaxed(div->base + map->gate_offs); in berlin2_div_is_enabled()
87 if (div->lock) in berlin2_div_is_enabled()
88 spin_unlock(div->lock); in berlin2_div_is_enabled()
95 struct berlin2_div *div = to_berlin2_div(hw); in berlin2_div_enable() local
96 struct berlin2_div_map *map = &div->map; in berlin2_div_enable()
99 if (div->lock) in berlin2_div_enable()
[all …]
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| /linux-4.4.14/drivers/clk/ti/ |
| D | divider.c | 38 for (clkt = table; clkt->div; clkt++) in _get_table_maxdiv()
39 if (clkt->div > maxdiv) in _get_table_maxdiv()
40 maxdiv = clkt->div; in _get_table_maxdiv()
60 for (clkt = table; clkt->div; clkt++) in _get_table_div()
62 return clkt->div; in _get_table_div()
78 unsigned int div) in _get_table_val() argument
82 for (clkt = table; clkt->div; clkt++) in _get_table_val()
83 if (clkt->div == div) in _get_table_val()
88 static unsigned int _get_val(struct clk_divider *divider, u8 div) in _get_val() argument
91 return div; in _get_val()
[all …]
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| D | fapll.c | 80 void __iomem *div; member
320 if (!synth->div) in ti_fapll_synth_recalc_rate()
351 synth_div_m = readl_relaxed(synth->div) & SYNTH_MAX_DIV_M; in ti_fapll_synth_recalc_rate()
364 post_div_m = readl_relaxed(synth->div) & SYNTH_MAX_DIV_M; in ti_fapll_synth_get_frac_rate()
415 if (ti_fapll_clock_is_bypass(fd) || !synth->div || !rate) in ti_fapll_synth_round_rate()
450 if (ti_fapll_clock_is_bypass(fd) || !synth->div || !rate) in ti_fapll_synth_set_rate()
472 v = readl_relaxed(synth->div); in ti_fapll_synth_set_rate()
476 writel_relaxed(v, synth->div); in ti_fapll_synth_set_rate()
492 void __iomem *div, in ti_fapll_synth_setup() argument
517 synth->div = div; in ti_fapll_synth_setup()
[all …]
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| D | fixed-factor.c | 41 u32 div, mult; in of_ti_fixed_factor_clk_setup() local
44 if (of_property_read_u32(node, "ti,clock-div", &div)) { in of_ti_fixed_factor_clk_setup()
60 mult, div); in of_ti_fixed_factor_clk_setup()
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| D | clk-3xxx-legacy.c | 173 .div = 1,
199 .div = 1,
211 .div = 1,
267 .div = 1,
344 .div = 1,
370 .div = 1,
382 .div = 1,
413 .div = 1,
470 .div = 1,
559 .div = 2,
[all …]
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| /linux-4.4.14/drivers/clk/ |
| D | clk-divider.c | 40 for (clkt = table; clkt->div; clkt++) in _get_table_maxdiv()
41 if (clkt->div > maxdiv) in _get_table_maxdiv()
42 maxdiv = clkt->div; in _get_table_maxdiv()
51 for (clkt = table; clkt->div; clkt++) in _get_table_mindiv()
52 if (clkt->div < mindiv) in _get_table_mindiv()
53 mindiv = clkt->div; in _get_table_mindiv()
74 for (clkt = table; clkt->div; clkt++) in _get_table_div()
76 return clkt->div; in _get_table_div()
95 unsigned int div) in _get_table_val() argument
99 for (clkt = table; clkt->div; clkt++) in _get_table_val()
[all …]
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| D | clk-cdce706.c | 32 #define CDCE706_DIVIDER(div) (13 + (div)) argument
53 #define CDCE706_DIVIDER_PLL(div) (9 + (div) - ((div) > 2) - ((div) > 4)) argument
54 #define CDCE706_DIVIDER_PLL_SHIFT(div) ((div) < 2 ? 5 : 3 * ((div) & 1)) argument
55 #define CDCE706_DIVIDER_PLL_MASK(div) (0x7 << CDCE706_DIVIDER_PLL_SHIFT(div)) argument
76 unsigned div; member
175 __func__, hwd->idx, hwd->mux, hwd->mul, hwd->div); in cdce706_pll_recalc_rate()
178 if (hwd->div && hwd->mul) { in cdce706_pll_recalc_rate()
181 do_div(res, hwd->div); in cdce706_pll_recalc_rate()
185 if (hwd->div) in cdce706_pll_recalc_rate()
186 return parent_rate / hwd->div; in cdce706_pll_recalc_rate()
[all …]
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| D | clk-qoriq.c | 43 struct clockgen_pll_div div[4]; member
52 int div; /* PLL_DIVn */ member
355 cg->fman[0] = cg->pll[CGA_PLL2].div[PLL_DIV2].clk; in p2041_init_periph()
357 cg->fman[0] = cg->pll[PLATFORM_PLL].div[PLL_DIV2].clk; in p2041_init_periph()
367 cg->fman[0] = cg->pll[CGA_PLL3].div[PLL_DIV2].clk; in p4080_init_periph()
369 cg->fman[0] = cg->pll[PLATFORM_PLL].div[PLL_DIV2].clk; in p4080_init_periph()
372 cg->fman[1] = cg->pll[CGA_PLL3].div[PLL_DIV2].clk; in p4080_init_periph()
374 cg->fman[1] = cg->pll[PLATFORM_PLL].div[PLL_DIV2].clk; in p4080_init_periph()
380 int div = PLL_DIV2; in p5020_init_periph() local
384 div = PLL_DIV4; in p5020_init_periph()
[all …]
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| D | clk-fixed-factor.c | 35 do_div(rate, fix->div); in clk_factor_recalc_rate()
47 best_parent = (rate / fix->mult) * fix->div; in clk_factor_round_rate()
51 return (*prate / fix->div) * fix->mult; in clk_factor_round_rate()
75 unsigned int mult, unsigned int div) in clk_register_fixed_factor() argument
87 fix->div = div; in clk_register_fixed_factor()
114 u32 div, mult; in of_fixed_factor_clk_setup() local
116 if (of_property_read_u32(node, "clock-div", &div)) { in of_fixed_factor_clk_setup()
132 mult, div); in of_fixed_factor_clk_setup()
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| D | clk-highbank.c | 209 u32 div = (readl(hbclk->reg) & HB_A9_PCLK_DIV) ? 8 : 4; in clk_cpu_periphclk_recalc_rate() local
210 return parent_rate / div; in clk_cpu_periphclk_recalc_rate()
221 u32 div = (readl(hbclk->reg) & HB_A9_BCLK_DIV_MASK) >> HB_A9_BCLK_DIV_SHIFT; in clk_cpu_a9bclk_recalc_rate() local
223 return parent_rate / (div + 2); in clk_cpu_a9bclk_recalc_rate()
234 u32 div; in clk_periclk_recalc_rate() local
236 div = readl(hbclk->reg) & 0x1f; in clk_periclk_recalc_rate()
237 div++; in clk_periclk_recalc_rate()
238 div *= 2; in clk_periclk_recalc_rate()
240 return parent_rate / div; in clk_periclk_recalc_rate()
246 u32 div; in clk_periclk_round_rate() local
[all …]
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| D | clk-clps711x.c | 31 { .val = 0, .div = 32, },
32 { .val = 1, .div = 8, },
33 { .val = 2, .div = 2, },
34 { .val = 3, .div = 1, },
38 { .val = 0, .div = 256, },
39 { .val = 1, .div = 1, },
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| D | clk-moxart.c | 61 unsigned int div, val; in moxart_of_apb_clk_init() local
80 div = div_idx[val] * 2; in moxart_of_apb_clk_init()
88 clk = clk_register_fixed_factor(NULL, name, parent_name, 0, 1, div); in moxart_of_apb_clk_init()
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| /linux-4.4.14/drivers/clk/mxs/ |
| D | clk-div.c | 44 struct clk_div *div = to_clk_div(hw); in clk_div_recalc_rate() local
46 return div->ops->recalc_rate(&div->divider.hw, parent_rate); in clk_div_recalc_rate()
52 struct clk_div *div = to_clk_div(hw); in clk_div_round_rate() local
54 return div->ops->round_rate(&div->divider.hw, rate, prate); in clk_div_round_rate()
60 struct clk_div *div = to_clk_div(hw); in clk_div_set_rate() local
63 ret = div->ops->set_rate(&div->divider.hw, rate, parent_rate); in clk_div_set_rate()
65 ret = mxs_clk_wait(div->reg, div->busy); in clk_div_set_rate()
79 struct clk_div *div; in mxs_clk_div() local
83 div = kzalloc(sizeof(*div), GFP_KERNEL); in mxs_clk_div()
84 if (!div) in mxs_clk_div()
[all …]
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| D | clk-frac.c | 43 u32 div; in clk_frac_recalc_rate() local
46 div = readl_relaxed(frac->reg) >> frac->shift; in clk_frac_recalc_rate()
47 div &= (1 << frac->width) - 1; in clk_frac_recalc_rate()
49 tmp_rate = (u64)parent_rate * div; in clk_frac_recalc_rate()
58 u32 div; in clk_frac_round_rate() local
67 div = tmp; in clk_frac_round_rate()
69 if (!div) in clk_frac_round_rate()
72 tmp_rate = (u64)parent_rate * div; in clk_frac_round_rate()
84 u32 div, val; in clk_frac_set_rate() local
93 div = tmp; in clk_frac_set_rate()
[all …]
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| /linux-4.4.14/drivers/clk/sunxi/ |
| D | clk-sunxi.c | 47 #define SUN6I_AHB1_DIV_SET(reg, div) ((reg & ~SUN6I_AHB1_DIV_MASK) | \ argument
48 (div << SUN6I_AHB1_DIV_SHIFT))
53 #define SUN6I_AHB1_PLL6_DIV_SET(reg, div) ((reg & ~SUN6I_AHB1_PLL6_DIV_MASK) | \ argument
54 (div << SUN6I_AHB1_PLL6_DIV_SHIFT))
86 u8 div, calcp, calcm = 1; in sun6i_ahb1_clk_round() local
95 div = DIV_ROUND_UP(parent_rate, rate); in sun6i_ahb1_clk_round()
99 if (div < 4) in sun6i_ahb1_clk_round()
101 else if (div / 2 < 4) in sun6i_ahb1_clk_round()
103 else if (div / 4 < 4) in sun6i_ahb1_clk_round()
108 calcm = DIV_ROUND_UP(div, 1 << calcp); in sun6i_ahb1_clk_round()
[all …]
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| D | clk-sun6i-ar100.c | 42 int div = (val >> SUN6I_AR100_DIV_SHIFT) & SUN6I_AR100_DIV_MASK; in ar100_recalc_rate() local
44 return (parent_rate >> shift) / (div + 1); in ar100_recalc_rate()
60 unsigned long div; in ar100_determine_rate() local
65 div = DIV_ROUND_UP(parent_rate, req->rate); in ar100_determine_rate()
75 shift = ffs(div) - 1; in ar100_determine_rate()
79 div >>= shift; in ar100_determine_rate()
86 while (div > SUN6I_AR100_DIV_MAX) { in ar100_determine_rate()
88 div >>= 1; in ar100_determine_rate()
100 tmp_rate = (parent_rate >> shift) / div; in ar100_determine_rate()
141 unsigned long div = parent_rate / rate; in ar100_set_rate() local
[all …]
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| D | clk-sun8i-mbus.c | 32 u8 div; in sun8i_a23_get_mbus_factors() local
41 div = DIV_ROUND_UP(parent_rate, *freq); in sun8i_a23_get_mbus_factors()
43 if (div > 8) in sun8i_a23_get_mbus_factors()
44 div = 8; in sun8i_a23_get_mbus_factors()
46 *freq = parent_rate / div; in sun8i_a23_get_mbus_factors()
52 *m = div - 1; in sun8i_a23_get_mbus_factors()
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| D | clk-sun9i-core.c | 117 u32 div; in sun9i_a80_get_gt_factors() local
122 div = DIV_ROUND_UP(parent_rate, *freq); in sun9i_a80_get_gt_factors()
125 if (div > 4) in sun9i_a80_get_gt_factors()
126 div = 4; in sun9i_a80_get_gt_factors()
128 *freq = parent_rate / div; in sun9i_a80_get_gt_factors()
134 *m = div; in sun9i_a80_get_gt_factors()
268 u32 div; in sun9i_a80_get_apb1_factors() local
274 div = DIV_ROUND_UP(parent_rate, *freq); in sun9i_a80_get_apb1_factors()
277 if (div > 256) in sun9i_a80_get_apb1_factors()
278 div = 256; in sun9i_a80_get_apb1_factors()
[all …]
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| D | clk-sun6i-apb0.c | 24 { .val = 0, .div = 2, },
25 { .val = 1, .div = 2, },
26 { .val = 2, .div = 4, },
27 { .val = 3, .div = 8, },
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| D | clk-mod0.c | 34 u8 div, calcm, calcp; in sun4i_a10_get_mod0_factors() local
41 div = DIV_ROUND_UP(parent_rate, *freq); in sun4i_a10_get_mod0_factors()
43 if (div < 16) in sun4i_a10_get_mod0_factors()
45 else if (div / 2 < 16) in sun4i_a10_get_mod0_factors()
47 else if (div / 4 < 16) in sun4i_a10_get_mod0_factors()
52 calcm = DIV_ROUND_UP(div, 1 << calcp); in sun4i_a10_get_mod0_factors()
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| /linux-4.4.14/drivers/clk/bcm/ |
| D | clk-iproc-asiu.c | 32 struct iproc_asiu_div div; member
92 val = readl(asiu->div_base + clk->div.offset); in iproc_asiu_clk_recalc_rate()
93 if ((val & (1 << clk->div.en_shift)) == 0) { in iproc_asiu_clk_recalc_rate()
99 div_h = (val >> clk->div.high_shift) & bit_mask(clk->div.high_width); in iproc_asiu_clk_recalc_rate()
101 div_l = (val >> clk->div.low_shift) & bit_mask(clk->div.low_width); in iproc_asiu_clk_recalc_rate()
114 unsigned int div; in iproc_asiu_clk_round_rate() local
122 div = DIV_ROUND_UP(*parent_rate, rate); in iproc_asiu_clk_round_rate()
123 if (div < 2) in iproc_asiu_clk_round_rate()
126 return *parent_rate / div; in iproc_asiu_clk_round_rate()
134 unsigned int div, div_h, div_l; in iproc_asiu_clk_set_rate() local
[all …]
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| D | clk-kona.c | 57 static inline u64 scaled_div_value(struct bcm_clk_div *div, u32 reg_div) in scaled_div_value() argument
59 return (u64)reg_div + ((u64)1 << div->u.s.frac_width); in scaled_div_value()
67 u64 scaled_div_build(struct bcm_clk_div *div, u32 div_value, u32 billionths) in scaled_div_build() argument
75 combined <<= div->u.s.frac_width; in scaled_div_build()
82 scaled_div_min(struct bcm_clk_div *div) in scaled_div_min() argument
84 if (divider_is_fixed(div)) in scaled_div_min()
85 return (u64)div->u.fixed; in scaled_div_min()
87 return scaled_div_value(div, 0); in scaled_div_min()
91 u64 scaled_div_max(struct bcm_clk_div *div) in scaled_div_max() argument
95 if (divider_is_fixed(div)) in scaled_div_max()
[all …]
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| D | clk-kona-setup.c | 55 struct bcm_clk_div *div; in clk_requires_trigger() local
64 div = &peri->div; in clk_requires_trigger()
65 if (!divider_exists(div)) in clk_requires_trigger()
69 if (!divider_is_fixed(div)) in clk_requires_trigger()
72 div = &peri->pre_div; in clk_requires_trigger()
74 return divider_exists(div) && !divider_is_fixed(div); in clk_requires_trigger()
83 struct bcm_clk_div *div; in peri_clk_data_offsets_valid() local
129 div = &peri->div; in peri_clk_data_offsets_valid()
130 if (divider_exists(div)) { in peri_clk_data_offsets_valid()
131 if (div->u.s.offset > limit) { in peri_clk_data_offsets_valid()
[all …]
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| D | clk-bcm281xx.c | 26 .div = FRAC_DIVIDER(0x0e00, 0, 22, 16),
56 .div = DIVIDER(0x0a04, 3, 4),
64 .div = DIVIDER(0x0a00, 4, 5),
110 .div = DIVIDER(0x0a28, 4, 14),
122 .div = DIVIDER(0x0a2c, 4, 14),
134 .div = DIVIDER(0x0a34, 4, 14),
146 .div = DIVIDER(0x0a30, 4, 14),
155 .div = FIXED_DIVIDER(2),
167 .div = FIXED_DIVIDER(2),
174 .div = DIVIDER(0x0a38, 12, 2),
[all …]
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| D | clk-bcm2835.c | 830 u64 div; in bcm2835_pll_choose_ndiv_and_fdiv() local
832 div = (u64)rate << A2W_PLL_FRAC_BITS; in bcm2835_pll_choose_ndiv_and_fdiv()
833 do_div(div, parent_rate); in bcm2835_pll_choose_ndiv_and_fdiv()
835 *ndiv = div >> A2W_PLL_FRAC_BITS; in bcm2835_pll_choose_ndiv_and_fdiv()
836 *fdiv = div & ((1 << A2W_PLL_FRAC_BITS) - 1); in bcm2835_pll_choose_ndiv_and_fdiv()
1033 struct clk_divider div; member
1041 return container_of(hw, struct bcm2835_pll_divider, div.hw); in bcm2835_pll_divider_from_hw()
1066 u32 div = cprman_read(cprman, data->a2w_reg); in bcm2835_pll_divider_get_rate() local
1068 div &= (1 << A2W_PLL_DIV_BITS) - 1; in bcm2835_pll_divider_get_rate()
1069 if (div == 0) in bcm2835_pll_divider_get_rate()
[all …]
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| D | clk-bcm21664.c | 73 .div = DIVIDER(0x0a28, 4, 14),
85 .div = DIVIDER(0x0a2c, 4, 14),
97 .div = DIVIDER(0x0a34, 4, 14),
109 .div = DIVIDER(0x0a30, 4, 14),
168 .div = FRAC_DIVIDER(0x0a10, 4, 12, 8),
178 .div = FRAC_DIVIDER(0x0a14, 4, 12, 8),
188 .div = FRAC_DIVIDER(0x0a18, 4, 12, 8),
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| D | clk-kona.h | 65 #define divider_exists(div) FLAG_TEST(div, DIV, EXISTS) argument
66 #define divider_is_fixed(div) FLAG_TEST(div, DIV, FIXED) argument
67 #define divider_has_fraction(div) (!divider_is_fixed(div) && \ argument
68 (div)->u.s.frac_width > 0)
397 struct bcm_clk_div div; member
504 extern u64 scaled_div_max(struct bcm_clk_div *div);
505 extern u64 scaled_div_build(struct bcm_clk_div *div, u32 div_value,
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| D | clk-iproc-pll.c | 516 unsigned int div; in iproc_clk_round_rate() local
524 div = DIV_ROUND_UP(*parent_rate, rate); in iproc_clk_round_rate()
525 if (div < 2) in iproc_clk_round_rate()
528 if (div > 256) in iproc_clk_round_rate()
529 div = 256; in iproc_clk_round_rate()
531 return *parent_rate / div; in iproc_clk_round_rate()
541 unsigned int div; in iproc_clk_set_rate() local
546 div = DIV_ROUND_UP(parent_rate, rate); in iproc_clk_set_rate()
547 if (div > 256) in iproc_clk_set_rate()
551 if (div == 256) { in iproc_clk_set_rate()
[all …]
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| /linux-4.4.14/drivers/clk/spear/ |
| D | spear1340_clock.c | 191 {.div = 0x073A8}, /* for vco1div2 = 600 MHz */
192 {.div = 0x06062}, /* for vco1div2 = 500 MHz */
193 {.div = 0x04D1B}, /* for vco1div2 = 400 MHz */
194 {.div = 0x04000}, /* for vco1div2 = 332 MHz */
195 {.div = 0x03031}, /* for vco1div2 = 250 MHz */
196 {.div = 0x0268D}, /* for vco1div2 = 200 MHz */
243 {.div = 0x08000},
244 {.div = 0x06a38},
245 {.div = 0x06666},
246 {.div = 0x06000},
[all …]
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| D | clk-frac-synth.c | 52 prate /= (2 * rtbl[index].div); in frac_calc_rate()
73 unsigned int div = 1, val; in clk_frac_recalc_rate() local
83 div = val & DIV_FACTOR_MASK; in clk_frac_recalc_rate()
85 if (!div) in clk_frac_recalc_rate()
90 parent_rate = (parent_rate << 14) / (2 * div); in clk_frac_recalc_rate()
110 val |= rtbl[i].div & DIV_FACTOR_MASK; in clk_frac_set_rate()
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| D | clk-gpt-synth.c | 60 unsigned int div = 1, val; in clk_gpt_recalc_rate() local
70 div += val & GPT_MSCALE_MASK; in clk_gpt_recalc_rate()
71 div *= 1 << (((val >> GPT_NSCALE_SHIFT) & GPT_NSCALE_MASK) + 1); in clk_gpt_recalc_rate()
73 if (!div) in clk_gpt_recalc_rate()
76 return parent_rate / div; in clk_gpt_recalc_rate()
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| /linux-4.4.14/drivers/clk/tegra/ |
| D | clk-divider.c | 71 int div, mul; in clk_frac_div_recalc_rate() local
75 div = reg & div_mask(divider); in clk_frac_div_recalc_rate()
78 div += mul; in clk_frac_div_recalc_rate()
81 rate += div - 1; in clk_frac_div_recalc_rate()
82 do_div(rate, div); in clk_frac_div_recalc_rate()
91 int div, mul; in clk_frac_div_round_rate() local
97 div = get_div(divider, rate, output_rate); in clk_frac_div_round_rate()
98 if (div < 0) in clk_frac_div_round_rate()
103 return DIV_ROUND_UP(output_rate * mul, div + mul); in clk_frac_div_round_rate()
110 int div; in clk_frac_div_set_rate() local
[all …]
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| /linux-4.4.14/sound/aoa/soundbus/i2sbus/ |
| D | interface.h | 90 # define I2S_SF_MCLKDIV_OTHER(div) (((div/2-1)<<I2S_SF_MCLKDIV_SHIFT)&I2S_SF_MCLKDIV_MASK) argument
91 static inline int i2s_sf_mclkdiv(int div, int *out) in i2s_sf_mclkdiv() argument
95 switch(div) { in i2s_sf_mclkdiv()
101 if (div%2) return -1; in i2s_sf_mclkdiv()
102 d = div/2-1; in i2s_sf_mclkdiv()
105 *out |= I2S_SF_MCLKDIV_OTHER(div); in i2s_sf_mclkdiv()
117 # define I2S_SF_SCLKDIV_OTHER(div) (((div/2-1)<<I2S_SF_SCLKDIV_SHIFT)&I2S_SF_SCLKDIV_MASK) argument
118 static inline int i2s_sf_sclkdiv(int div, int *out) in i2s_sf_sclkdiv() argument
122 switch(div) { in i2s_sf_sclkdiv()
126 if (div%2) return -1; in i2s_sf_sclkdiv()
[all …]
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| /linux-4.4.14/drivers/clk/hisilicon/ |
| D | clkdivider-hi6220.c | 106 struct hi6220_clk_divider *div; in hi6220_register_clkdiv() local
114 div = kzalloc(sizeof(*div), GFP_KERNEL); in hi6220_register_clkdiv()
115 if (!div) in hi6220_register_clkdiv()
124 kfree(div); in hi6220_register_clkdiv()
129 table[i].div = min_div + i; in hi6220_register_clkdiv()
130 table[i].val = table[i].div - 1; in hi6220_register_clkdiv()
140 div->reg = reg; in hi6220_register_clkdiv()
141 div->shift = shift; in hi6220_register_clkdiv()
142 div->width = width; in hi6220_register_clkdiv()
143 div->mask = mask_bit ? BIT(mask_bit) : 0; in hi6220_register_clkdiv()
[all …]
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| /linux-4.4.14/drivers/clk/rockchip/ |
| D | clk.c | 52 struct clk_divider *div = NULL; in rockchip_clk_register_branch() local
83 div = kzalloc(sizeof(*div), GFP_KERNEL); in rockchip_clk_register_branch()
84 if (!div) in rockchip_clk_register_branch()
87 div->flags = div_flags; in rockchip_clk_register_branch()
88 div->reg = base + muxdiv_offset; in rockchip_clk_register_branch()
89 div->shift = div_shift; in rockchip_clk_register_branch()
90 div->width = div_width; in rockchip_clk_register_branch()
91 div->lock = lock; in rockchip_clk_register_branch()
92 div->table = div_table; in rockchip_clk_register_branch()
100 div ? &div->hw : NULL, div_ops, in rockchip_clk_register_branch()
[all …]
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| D | clk-rk3188.c | 243 { .val = 0, .div = 2 },
244 { .val = 1, .div = 4 },
245 { .val = 2, .div = 8 },
246 { .val = 3, .div = 16 },
518 { .val = 0, .div = 1 },
519 { .val = 1, .div = 2 },
520 { .val = 2, .div = 3 },
521 { .val = 3, .div = 4 },
522 { .val = 4, .div = 8 },
630 { .val = 0, .div = 1 },
[all …]
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| /linux-4.4.14/drivers/clk/imx/ |
| D | clk-pllv3.c | 104 u32 div = (readl_relaxed(pll->base) >> pll->div_shift) & pll->div_mask; in clk_pllv3_recalc_rate() local
106 return (div == 1) ? parent_rate * 22 : parent_rate * 20; in clk_pllv3_recalc_rate()
122 u32 val, div; in clk_pllv3_set_rate() local
125 div = 1; in clk_pllv3_set_rate()
127 div = 0; in clk_pllv3_set_rate()
133 val |= (div << pll->div_shift); in clk_pllv3_set_rate()
151 u32 div = readl_relaxed(pll->base) & pll->div_mask; in clk_pllv3_sys_recalc_rate() local
153 return parent_rate * div / 2; in clk_pllv3_sys_recalc_rate()
162 u32 div; in clk_pllv3_sys_round_rate() local
168 div = rate * 2 / parent_rate; in clk_pllv3_sys_round_rate()
[all …]
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| D | clk-busy.c | 33 struct clk_divider div; member
41 struct clk_divider *div = container_of(hw, struct clk_divider, hw); in to_clk_busy_divider() local
43 return container_of(div, struct clk_busy_divider, div); in to_clk_busy_divider()
51 return busy->div_ops->recalc_rate(&busy->div.hw, parent_rate); in clk_busy_divider_recalc_rate()
59 return busy->div_ops->round_rate(&busy->div.hw, rate, prate); in clk_busy_divider_round_rate()
68 ret = busy->div_ops->set_rate(&busy->div.hw, rate, parent_rate); in clk_busy_divider_set_rate()
96 busy->div.reg = reg; in imx_clk_busy_divider()
97 busy->div.shift = shift; in imx_clk_busy_divider()
98 busy->div.width = width; in imx_clk_busy_divider()
99 busy->div.lock = &imx_ccm_lock; in imx_clk_busy_divider()
[all …]
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| D | clk-fixup-div.c | 63 struct clk_divider *div = to_clk_div(hw); in clk_fixup_div_set_rate() local
73 if (value > div_mask(div)) in clk_fixup_div_set_rate()
74 value = div_mask(div); in clk_fixup_div_set_rate()
76 spin_lock_irqsave(div->lock, flags); in clk_fixup_div_set_rate()
78 val = readl(div->reg); in clk_fixup_div_set_rate()
79 val &= ~(div_mask(div) << div->shift); in clk_fixup_div_set_rate()
80 val |= value << div->shift; in clk_fixup_div_set_rate()
82 writel(val, div->reg); in clk_fixup_div_set_rate()
84 spin_unlock_irqrestore(div->lock, flags); in clk_fixup_div_set_rate()
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| D | clk-cpu.c | 19 struct clk *div; member
35 return clk_get_rate(cpu->div); in clk_cpu_recalc_rate()
67 clk_set_rate(cpu->div, rate); in clk_cpu_set_rate()
79 struct clk *div, struct clk *mux, struct clk *pll, in imx_clk_cpu() argument
90 cpu->div = div; in imx_clk_cpu()
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| D | clk-imx6sl.c | 75 { .val = 0, .div = 20, },
76 { .val = 1, .div = 10, },
77 { .val = 2, .div = 5, },
78 { .val = 3, .div = 4, },
83 { .val = 2, .div = 1, },
84 { .val = 1, .div = 2, },
85 { .val = 0, .div = 4, },
90 { .val = 0, .div = 1, },
91 { .val = 1, .div = 2, },
92 { .val = 2, .div = 1, },
[all …]
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| D | clk-imx6q.c | 94 { .val = 0, .div = 20, },
95 { .val = 1, .div = 10, },
96 { .val = 2, .div = 5, },
97 { .val = 3, .div = 4, },
102 { .val = 2, .div = 1, },
103 { .val = 1, .div = 2, },
104 { .val = 0, .div = 4, },
109 { .val = 0, .div = 1, },
110 { .val = 1, .div = 2, },
111 { .val = 2, .div = 1, },
[all …]
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| /linux-4.4.14/arch/c6x/platforms/ |
| D | plldata.c | 178 sysclks[2].div = 3; in c6455_setup_clocks()
180 sysclks[3].div = 6; in c6455_setup_clocks()
181 sysclks[4].div = PLLDIV4; in c6455_setup_clocks()
182 sysclks[5].div = PLLDIV5; in c6455_setup_clocks()
216 sysclks[1].div = 1; in c6457_setup_clocks()
218 sysclks[2].div = 3; in c6457_setup_clocks()
220 sysclks[3].div = 6; in c6457_setup_clocks()
221 sysclks[4].div = PLLDIV4; in c6457_setup_clocks()
222 sysclks[5].div = PLLDIV5; in c6457_setup_clocks()
268 sysclks[i].div = 1; in c6472_setup_clocks()
[all …]
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| /linux-4.4.14/drivers/mmc/host/ |
| D | sdhci-cns3xxx.c | 29 int div = 1; in sdhci_cns3xxx_set_clock() local
40 while (host->max_clk / div > clock) { in sdhci_cns3xxx_set_clock()
45 if (div < 4) in sdhci_cns3xxx_set_clock()
46 div += 1; in sdhci_cns3xxx_set_clock()
47 else if (div < 256) in sdhci_cns3xxx_set_clock()
48 div *= 2; in sdhci_cns3xxx_set_clock()
54 clock, host->max_clk / div); in sdhci_cns3xxx_set_clock()
57 if (div != 3) in sdhci_cns3xxx_set_clock()
58 div >>= 1; in sdhci_cns3xxx_set_clock()
60 clk = div << SDHCI_DIVIDER_SHIFT; in sdhci_cns3xxx_set_clock()
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| D | sdhci-of-arasan.c | 42 u32 div; in sdhci_arasan_get_timeout_clock() local
46 div = readl(host->ioaddr + SDHCI_ARASAN_CLK_CTRL_OFFSET); in sdhci_arasan_get_timeout_clock()
47 div = (div & CLK_CTRL_TIMEOUT_MASK) >> CLK_CTRL_TIMEOUT_SHIFT; in sdhci_arasan_get_timeout_clock()
50 freq /= 1 << (CLK_CTRL_TIMEOUT_MIN_EXP + div); in sdhci_arasan_get_timeout_clock()
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| D | dw_mmc-exynos.c | 255 u8 div; in dw_mci_exynos_adjust_clock() local
271 div = dw_mci_exynos_get_ciu_div(host); in dw_mci_exynos_adjust_clock()
272 ret = clk_set_rate(host->ciu_clk, wanted * div); in dw_mci_exynos_adjust_clock()
276 wanted * div, ret); in dw_mci_exynos_adjust_clock()
278 host->bus_hz = actual / div; in dw_mci_exynos_adjust_clock()
321 u32 div = 0; in dw_mci_exynos_parse_dt() local
339 of_property_read_u32(np, "samsung,dw-mshc-ciu-div", &div); in dw_mci_exynos_parse_dt()
340 priv->ciu_div = div; in dw_mci_exynos_parse_dt()
348 priv->sdr_timing = SDMMC_CLKSEL_TIMING(timing[0], timing[1], div); in dw_mci_exynos_parse_dt()
355 priv->ddr_timing = SDMMC_CLKSEL_TIMING(timing[0], timing[1], div); in dw_mci_exynos_parse_dt()
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| /linux-4.4.14/drivers/media/i2c/ |
| D | aptina-pll.c | 38 unsigned int div; in aptina_pll_calculate() local
55 div = gcd(pll->pix_clock, pll->ext_clock); in aptina_pll_calculate()
56 pll->m = pll->pix_clock / div; in aptina_pll_calculate()
57 div = pll->ext_clock / div; in aptina_pll_calculate()
72 mf_min = max(mf_min, limits->n_min * limits->p1_min / div); in aptina_pll_calculate()
76 mf_max = min(mf_max, DIV_ROUND_UP(limits->n_max * limits->p1_max, div)); in aptina_pll_calculate()
141 p1_min = max(limits->p1_min, DIV_ROUND_UP(limits->out_clock_min * div, in aptina_pll_calculate()
143 p1_max = min(limits->p1_max, limits->out_clock_max * div / in aptina_pll_calculate()
147 unsigned int mf_inc = p1 / gcd(div, p1); in aptina_pll_calculate()
152 limits->int_clock_max * div)), mf_inc); in aptina_pll_calculate()
[all …]
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| D | smiapp-pll.c | 163 uint32_t div, uint32_t lane_op_clock_ratio) in __smiapp_pll_calculate() argument
201 / div); in __smiapp_pll_calculate()
228 more_mul_factor = lcm(div, pll->pre_pll_clk_div) / div; in __smiapp_pll_calculate()
244 op_pll->sys_clk_div = div * i / pll->pre_pll_clk_div; in __smiapp_pll_calculate()
403 uint32_t mul, div; in smiapp_pll_calculate() local
458 div = pll->ext_clk_freq_hz / i; in smiapp_pll_calculate()
459 dev_dbg(dev, "mul %u / div %u\n", mul, div); in smiapp_pll_calculate()
473 op_pll, mul, div, in smiapp_pll_calculate()
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| /linux-4.4.14/drivers/clk/meson/ |
| D | clkc.c | 55 struct clk_divider *div = NULL; in meson_clk_register_composite() local
79 div = kzalloc(sizeof(*div), GFP_KERNEL); in meson_clk_register_composite()
80 if (!div) { in meson_clk_register_composite()
85 div->reg = clk_base + clk_conf->reg_off in meson_clk_register_composite()
87 div->shift = composite_conf->div_parm.shift; in meson_clk_register_composite()
88 div->width = composite_conf->div_parm.width; in meson_clk_register_composite()
89 div->lock = &clk_lock; in meson_clk_register_composite()
90 div->flags = composite_conf->div_flags; in meson_clk_register_composite()
91 div->table = composite_conf->div_table; in meson_clk_register_composite()
112 div ? &div->hw : NULL, &clk_divider_ops, in meson_clk_register_composite()
[all …]
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| D | meson8b-clkc.c | 92 { .val = 1, .div = 1 },
93 { .val = 2, .div = 2 },
94 { .val = 3, .div = 3 },
95 { .val = 2, .div = 4 },
96 { .val = 3, .div = 6 },
97 { .val = 4, .div = 8 },
98 { .val = 5, .div = 10 },
99 { .val = 6, .div = 12 },
100 { .val = 7, .div = 14 },
101 { .val = 8, .div = 16 },
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| D | clk-cpu.c | 77 unsigned int div, sel, N = 0; in meson_clk_cpu_set_rate() local
80 div = DIV_ROUND_UP(parent_rate, rate); in meson_clk_cpu_set_rate()
82 if (div <= 3) { in meson_clk_cpu_set_rate()
83 sel = div - 1; in meson_clk_cpu_set_rate()
86 N = div / 2; in meson_clk_cpu_set_rate()
105 unsigned int div = 1; in meson_clk_cpu_recalc_rate() local
115 div = sel + 1; in meson_clk_cpu_recalc_rate()
117 div = 2 * N; in meson_clk_cpu_recalc_rate()
119 return parent_rate / div; in meson_clk_cpu_recalc_rate()
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| /linux-4.4.14/drivers/pwm/ |
| D | pwm-rcar.c | 75 unsigned int div; in rcar_pwm_get_clock_division() local
80 for (div = 0; div <= RCAR_PWM_MAX_DIVISION; div++) { in rcar_pwm_get_clock_division()
82 (1 << div); in rcar_pwm_get_clock_division()
88 return (div <= RCAR_PWM_MAX_DIVISION) ? div : -ERANGE; in rcar_pwm_get_clock_division()
92 unsigned int div) in rcar_pwm_set_clock_control() argument
99 if (div & 1) in rcar_pwm_set_clock_control()
102 div >>= 1; in rcar_pwm_set_clock_control()
104 value |= div << RCAR_PWMCR_CC0_SHIFT; in rcar_pwm_set_clock_control()
108 static int rcar_pwm_set_counter(struct rcar_pwm_chip *rp, int div, int duty_ns, in rcar_pwm_set_counter() argument
115 one_cycle = (unsigned long long)NSEC_PER_SEC * 100ULL * (1 << div); in rcar_pwm_set_counter()
[all …]
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| D | pwm-sun4i.c | 104 u64 clk_rate, div = 0; in sun4i_pwm_config() local
118 div = clk_rate * period_ns + NSEC_PER_SEC / 2; in sun4i_pwm_config()
119 do_div(div, NSEC_PER_SEC); in sun4i_pwm_config()
120 if (div - 1 > PWM_PRD_MASK) in sun4i_pwm_config()
129 div = clk_rate; in sun4i_pwm_config()
130 do_div(div, prescaler_table[prescaler]); in sun4i_pwm_config()
131 div = div * period_ns; in sun4i_pwm_config()
132 do_div(div, NSEC_PER_SEC); in sun4i_pwm_config()
133 if (div - 1 <= PWM_PRD_MASK) in sun4i_pwm_config()
137 if (div - 1 > PWM_PRD_MASK) { in sun4i_pwm_config()
[all …]
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| D | pwm-mxs.c | 35 #define PERIOD_CDIV(div) (((div) & 0x7) << 20) argument
54 int ret, div = 0; in mxs_pwm_config() local
61 c = rate / cdiv[div]; in mxs_pwm_config()
66 div++; in mxs_pwm_config()
67 if (div >= PERIOD_CDIV_MAX) in mxs_pwm_config()
89 PERIOD_INACTIVE_LOW | PERIOD_CDIV(div), in mxs_pwm_config()
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| D | pwm-atmel.c | 112 unsigned long long div; in atmel_pwm_config() local
123 div = (unsigned long long)clk_get_rate(atmel_pwm->clk) * period_ns; in atmel_pwm_config()
124 do_div(div, NSEC_PER_SEC); in atmel_pwm_config()
126 while (div > PWM_MAX_PRD) { in atmel_pwm_config()
127 div >>= 1; in atmel_pwm_config()
137 prd = div; in atmel_pwm_config()
138 div *= duty_ns; in atmel_pwm_config()
139 do_div(div, period_ns); in atmel_pwm_config()
140 dty = prd - div; in atmel_pwm_config()
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| D | pwm-rockchip.c | 106 u64 clk_rate, div; in rockchip_pwm_config() local
116 div = clk_rate * period_ns; in rockchip_pwm_config()
117 do_div(div, pc->data->prescaler * NSEC_PER_SEC); in rockchip_pwm_config()
118 period = div; in rockchip_pwm_config()
120 div = clk_rate * duty_ns; in rockchip_pwm_config()
121 do_div(div, pc->data->prescaler * NSEC_PER_SEC); in rockchip_pwm_config()
122 duty = div; in rockchip_pwm_config()
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| D | pwm-spear.c | 81 u64 val, div, clk_rate; in spear_pwm_config() local
97 div = 1000000000; in spear_pwm_config()
98 div *= 1 + prescale; in spear_pwm_config()
100 pv = div64_u64(val, div); in spear_pwm_config()
102 dc = div64_u64(val, div); in spear_pwm_config()
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| D | pwm-img.c | 91 u32 val, div, duty, timebase; in img_pwm_config() local
107 div = PWM_CTRL_CFG_NO_SUB_DIV; in img_pwm_config()
110 div = PWM_CTRL_CFG_SUB_DIV0; in img_pwm_config()
113 div = PWM_CTRL_CFG_SUB_DIV1; in img_pwm_config()
116 div = PWM_CTRL_CFG_SUB_DIV0_DIV1; in img_pwm_config()
128 val |= (div & PWM_CTRL_CFG_DIV_MASK) << in img_pwm_config()
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| D | pwm-bcm-kona.c | 115 u64 val, div, rate; in kona_pwmc_config() local
133 div = 1000000000; in kona_pwmc_config()
134 div *= 1 + prescale; in kona_pwmc_config()
136 pc = div64_u64(val, div); in kona_pwmc_config()
138 dc = div64_u64(val, div); in kona_pwmc_config()
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| D | pwm-mtk-disp.c | 72 u64 div, rate; in mtk_disp_pwm_config() local
91 div = NSEC_PER_SEC * (clk_div + 1); in mtk_disp_pwm_config()
92 period = div64_u64(rate * period_ns, div); in mtk_disp_pwm_config()
96 high_width = div64_u64(rate * duty_ns, div); in mtk_disp_pwm_config()
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| /linux-4.4.14/drivers/media/tuners/ |
| D | tea5767.c | 136 unsigned int div, frq; in tea5767_status_dump() local
148 div = ((buffer[0] & 0x3f) << 8) | buffer[1]; in tea5767_status_dump()
152 frq = (div * 50000 - 700000 - 225000) / 4; /* Freq in KHz */ in tea5767_status_dump()
155 frq = (div * 50000 + 700000 + 225000) / 4; /* Freq in KHz */ in tea5767_status_dump()
158 frq = (div * 32768 + 700000 + 225000) / 4; /* Freq in KHz */ in tea5767_status_dump()
162 frq = (div * 32768 - 700000 - 225000) / 4; /* Freq in KHz */ in tea5767_status_dump()
165 buffer[0] = (div >> 8) & 0x3f; in tea5767_status_dump()
166 buffer[1] = div & 0xff; in tea5767_status_dump()
169 frq / 1000, frq % 1000, div); in tea5767_status_dump()
194 unsigned div; in set_radio_freq() local
[all …]
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| D | tuner-simple.c | 441 u16 div, u8 config, u8 cb) in simple_post_tune() argument
477 buffer[0] = (div>>8) & 0x7f; in simple_post_tune()
478 buffer[1] = div & 0xff; in simple_post_tune()
549 u16 div; in simple_set_tv_freq() local
587 div = params->frequency + IFPCoff + offset; in simple_set_tv_freq()
593 offset / 16, offset % 16 * 100 / 16, div); in simple_set_tv_freq()
598 if (t_params->cb_first_if_lower_freq && div < priv->last_div) { in simple_set_tv_freq()
601 buffer[2] = (div>>8) & 0x7f; in simple_set_tv_freq()
602 buffer[3] = div & 0xff; in simple_set_tv_freq()
604 buffer[0] = (div>>8) & 0x7f; in simple_set_tv_freq()
[all …]
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| D | tea5761.c | 128 unsigned int div, frq; in tea5761_status_dump() local
130 div = ((buffer[2] & 0x3f) << 8) | buffer[3]; in tea5761_status_dump()
132 frq = 1000 * (div * 32768 / 1000 + FREQ_OFFSET + 225) / 4; /* Freq in KHz */ in tea5761_status_dump()
135 frq / 1000, frq % 1000, div); in tea5761_status_dump()
146 unsigned div; in __set_radio_freq() local
166 div = (1000 * (frq * 4 / 16 + 700 + 225) ) >> 15; in __set_radio_freq()
167 buffer[1] = (div >> 8) & 0x3f; in __set_radio_freq()
168 buffer[2] = div & 0xff; in __set_radio_freq()
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| D | m88rs6000t.c | 40 u32 div, ts_mclk; in m88rs6000t_set_demod_mclk() local
69 div = 36000 * pll_div_fb; in m88rs6000t_set_demod_mclk()
70 div /= ts_mclk; in m88rs6000t_set_demod_mclk()
72 if (div <= 32) { in m88rs6000t_set_demod_mclk()
75 f1 = div / 2; in m88rs6000t_set_demod_mclk()
76 f2 = div - f1; in m88rs6000t_set_demod_mclk()
78 } else if (div <= 48) { in m88rs6000t_set_demod_mclk()
80 f0 = div / 3; in m88rs6000t_set_demod_mclk()
81 f1 = (div - f0) / 2; in m88rs6000t_set_demod_mclk()
82 f2 = div - f0 - f1; in m88rs6000t_set_demod_mclk()
[all …]
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| D | tda18271-common.c | 568 u32 div; in tda18271_calc_main_pll() local
576 div = ((d * (freq / 1000)) << 7) / 125; in tda18271_calc_main_pll()
578 regs[R_MD1] = 0x7f & (div >> 16); in tda18271_calc_main_pll()
579 regs[R_MD2] = 0xff & (div >> 8); in tda18271_calc_main_pll()
580 regs[R_MD3] = 0xff & div; in tda18271_calc_main_pll()
591 u32 div; in tda18271_calc_cal_pll() local
599 div = ((d * (freq / 1000)) << 7) / 125; in tda18271_calc_cal_pll()
601 regs[R_CD1] = 0x7f & (div >> 16); in tda18271_calc_cal_pll()
602 regs[R_CD2] = 0xff & (div >> 8); in tda18271_calc_cal_pll()
603 regs[R_CD3] = 0xff & div; in tda18271_calc_cal_pll()
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| D | mxl301rf.c | 183 u32 tmp, div; in mxl301rf_set_params() local
206 div = 1000000; in mxl301rf_set_params()
209 div >>= 1; in mxl301rf_set_params()
210 if (tmp > div) { in mxl301rf_set_params()
211 tmp -= div; in mxl301rf_set_params()
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| /linux-4.4.14/arch/mips/ath79/ |
| D | clock.c | 63 u32 div; in ar71xx_clocks_init() local
69 div = ((pll >> AR71XX_PLL_FB_SHIFT) & AR71XX_PLL_FB_MASK) + 1; in ar71xx_clocks_init()
70 freq = div * ref_rate; in ar71xx_clocks_init()
72 div = ((pll >> AR71XX_CPU_DIV_SHIFT) & AR71XX_CPU_DIV_MASK) + 1; in ar71xx_clocks_init()
73 cpu_rate = freq / div; in ar71xx_clocks_init()
75 div = ((pll >> AR71XX_DDR_DIV_SHIFT) & AR71XX_DDR_DIV_MASK) + 1; in ar71xx_clocks_init()
76 ddr_rate = freq / div; in ar71xx_clocks_init()
78 div = (((pll >> AR71XX_AHB_DIV_SHIFT) & AR71XX_AHB_DIV_MASK) + 1) * 2; in ar71xx_clocks_init()
79 ahb_rate = cpu_rate / div; in ar71xx_clocks_init()
98 u32 div; in ar724x_clocks_init() local
[all …]
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| /linux-4.4.14/drivers/clk/mvebu/ |
| D | orion.c | 60 int *mult, int *div) in mv88f5182_get_clk_ratio() argument
66 *div = 2; in mv88f5182_get_clk_ratio()
69 *div = 3; in mv88f5182_get_clk_ratio()
72 *div = 1; in mv88f5182_get_clk_ratio()
117 int *mult, int *div) in mv88f5281_get_clk_ratio() argument
123 *div = 2; in mv88f5281_get_clk_ratio()
126 *div = 3; in mv88f5281_get_clk_ratio()
129 *div = 1; in mv88f5281_get_clk_ratio()
183 int *mult, int *div) in mv88f6183_get_clk_ratio() argument
189 *div = 2; in mv88f6183_get_clk_ratio()
[all …]
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| D | clk-cpu.c | 54 u32 reg, div; in clk_cpu_recalc_rate() local
57 div = (reg >> (cpuclk->cpu * 8)) & SYS_CTRL_CLK_DIVIDER_MASK; in clk_cpu_recalc_rate()
58 return parent_rate / div; in clk_cpu_recalc_rate()
65 u32 div; in clk_cpu_round_rate() local
67 div = *parent_rate / rate; in clk_cpu_round_rate()
68 if (div == 0) in clk_cpu_round_rate()
69 div = 1; in clk_cpu_round_rate()
70 else if (div > 3) in clk_cpu_round_rate()
71 div = 3; in clk_cpu_round_rate()
73 return *parent_rate / div; in clk_cpu_round_rate()
[all …]
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| D | clk-corediv.c | 128 u32 reg, div; in clk_corediv_recalc_rate() local
131 div = (reg >> desc->offset) & desc->mask; in clk_corediv_recalc_rate()
132 return parent_rate / div; in clk_corediv_recalc_rate()
139 u32 div; in clk_corediv_round_rate() local
141 div = *parent_rate / rate; in clk_corediv_round_rate()
142 if (div < 4) in clk_corediv_round_rate()
143 div = 4; in clk_corediv_round_rate()
144 else if (div > 6) in clk_corediv_round_rate()
145 div = 8; in clk_corediv_round_rate()
147 return *parent_rate / div; in clk_corediv_round_rate()
[all …]
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| D | armada-39x.c | 94 void __iomem *sar, int id, int *mult, int *div) in armada_39x_get_clk_ratio() argument
99 *div = 2; in armada_39x_get_clk_ratio()
103 *div = 4; in armada_39x_get_clk_ratio()
107 *div = 2; in armada_39x_get_clk_ratio()
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| D | armada-370.c | 116 void __iomem *sar, int id, int *mult, int *div) in a370_get_clk_ratio() argument
124 *div = a370_nbclk_ratios[opt][1]; in a370_get_clk_ratio()
128 *div = a370_hclk_ratios[opt][1]; in a370_get_clk_ratio()
132 *div = a370_dramclk_ratios[opt][1]; in a370_get_clk_ratio()
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| D | kirkwood.c | 129 void __iomem *sar, int id, int *mult, int *div) in kirkwood_get_clk_ratio() argument
136 *div = kirkwood_cpu_l2_ratios[opt][1]; in kirkwood_get_clk_ratio()
144 *div = kirkwood_cpu_ddr_ratios[opt][1]; in kirkwood_get_clk_ratio()
169 void __iomem *sar, int id, int *mult, int *div) in mv88f6180_get_clk_ratio() argument
176 *div = 2; in mv88f6180_get_clk_ratio()
184 *div = mv88f6180_cpu_ddr_ratios[opt][1]; in mv88f6180_get_clk_ratio()
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| D | armada-xp.c | 126 void __iomem *sar, int id, int *mult, int *div) in axp_get_clk_ratio() argument
140 *div = axp_nbclk_ratios[opt][1]; in axp_get_clk_ratio()
144 *div = axp_hclk_ratios[opt][1]; in axp_get_clk_ratio()
148 *div = axp_dramclk_ratios[opt][1]; in axp_get_clk_ratio()
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| D | armada-375.c | 117 void __iomem *sar, int id, int *mult, int *div) in armada_375_get_clk_ratio() argument
125 *div = armada_375_cpu_l2_ratios[opt][1]; in armada_375_get_clk_ratio()
129 *div = armada_375_cpu_ddr_ratios[opt][1]; in armada_375_get_clk_ratio()
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| D | dove.c | 127 void __iomem *sar, int id, int *mult, int *div) in dove_get_clk_ratio() argument
135 *div = dove_cpu_l2_ratios[opt][1]; in dove_get_clk_ratio()
143 *div = dove_cpu_ddr_ratios[opt][1]; in dove_get_clk_ratio()
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| D | armada-38x.c | 100 void __iomem *sar, int id, int *mult, int *div) in armada_38x_get_clk_ratio() argument
108 *div = armada_38x_cpu_l2_ratios[opt][1]; in armada_38x_get_clk_ratio()
112 *div = armada_38x_cpu_ddr_ratios[opt][1]; in armada_38x_get_clk_ratio()
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| /linux-4.4.14/drivers/clk/qcom/ |
| D | clk-regmap-divider.c | 40 u32 div; in div_set_rate() local
42 div = divider_get_val(rate, parent_rate, NULL, divider->width, in div_set_rate()
47 div << divider->shift); in div_set_rate()
55 u32 div; in div_recalc_rate() local
57 regmap_read(clkr->regmap, divider->reg, &div); in div_recalc_rate()
58 div >>= divider->shift; in div_recalc_rate()
59 div &= BIT(divider->width) - 1; in div_recalc_rate()
61 return divider_recalc_rate(hw, parent_rate, div, NULL, in div_recalc_rate()
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| D | clk-rcg2.c | 515 unsigned long parent_rate, div; in clk_byte_determine_rate() local
525 div = DIV_ROUND_UP((2 * parent_rate), req->rate) - 1; in clk_byte_determine_rate()
526 div = min_t(u32, div, mask); in clk_byte_determine_rate()
528 req->rate = calc_rate(parent_rate, 0, 0, 0, div); in clk_byte_determine_rate()
538 unsigned long div; in clk_byte_set_rate() local
541 div = DIV_ROUND_UP((2 * parent_rate), rate) - 1; in clk_byte_set_rate()
542 div = min_t(u32, div, mask); in clk_byte_set_rate()
544 f.pre_div = div; in clk_byte_set_rate()
571 unsigned long parent_rate, div; in clk_byte2_determine_rate() local
582 div = DIV_ROUND_UP((2 * parent_rate), rate) - 1; in clk_byte2_determine_rate()
[all …]
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| /linux-4.4.14/arch/arm/boot/dts/ |
| D | am33xx-clocks.dtsi | 24 clock-div = <1>;
32 clock-div = <1>;
40 clock-div = <1>;
48 clock-div = <1>;
56 clock-div = <1>;
64 clock-div = <1>;
72 clock-div = <1>;
80 clock-div = <1>;
88 clock-div = <1>;
96 clock-div = <1>;
[all …]
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| D | am43xx-clocks.dtsi | 40 clock-div = <1>;
48 clock-div = <1>;
56 clock-div = <1>;
64 clock-div = <1>;
72 clock-div = <1>;
80 clock-div = <1>;
88 clock-div = <1>;
96 clock-div = <1>;
104 clock-div = <1>;
215 ti,max-div = <31>;
[all …]
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| D | omap54xx-clocks.dtsi | 122 ti,max-div = <31>;
132 clock-div = <8>;
139 ti,max-div = <4>;
158 clock-div = <16>;
165 ti,max-div = <31>;
195 ti,max-div = <63>;
205 clock-div = <1>;
213 clock-div = <2>;
220 ti,max-div = <63>;
229 ti,max-div = <63>;
[all …]
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| D | dra7xx-clocks.dtsi | 208 ti,max-div = <31>;
219 ti,max-div = <4>;
228 ti,max-div = <31>;
239 ti,max-div = <31>;
271 ti,max-div = <63>;
283 clock-div = <1>;
297 ti,max-div = <31>;
309 clock-div = <1>;
317 clock-div = <1>;
339 ti,max-div = <31>;
[all …]
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| D | omap36xx-omap3430es2plus-clocks.dtsi | 39 clock-div = <2>;
55 clock-div = <1>;
79 clock-div = <2>;
87 clock-div = <2>;
95 clock-div = <4>;
103 clock-div = <8>;
111 clock-div = <10>;
119 clock-div = <4>;
127 clock-div = <8>;
135 clock-div = <16>;
[all …]
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| D | omap3xxx-clocks.dtsi | 29 ti,max-div = <3>;
47 clock-div = <1>;
55 clock-div = <1>;
63 clock-div = <1>;
71 clock-div = <1>;
79 clock-div = <1>;
207 ti,max-div = <63>;
217 clock-div = <1>;
234 clock-div = <1>;
249 ti,max-div = <31>;
[all …]
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| D | omap44xx-clocks.dtsi | 153 ti,max-div = <31>;
165 clock-div = <8>;
172 ti,max-div = <4>;
182 ti,max-div = <2>;
190 ti,max-div = <31>;
222 ti,max-div = <31>;
233 ti,max-div = <31>;
245 clock-div = <2>;
252 ti,max-div = <31>;
264 ti,max-div = <2>;
[all …]
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| D | dm816x-clocks.dtsi | 102 ti,max-div = <8>;
119 ti,max-div = <7>;
127 ti,max-div = <7>;
135 ti,max-div = <7>;
143 ti,max-div = <1>;
151 ti,max-div = <1>;
167 ti,max-div = <7>;
175 ti,max-div = <7>;
191 ti,max-div = <7>;
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| D | omap36xx-am35xx-omap3430es2plus-clocks.dtsi | 16 clock-div = <3>;
24 clock-div = <5>;
41 ti,max-div = <31>;
59 clock-div = <3>;
67 clock-div = <4>;
75 clock-div = <6>;
83 clock-div = <1>;
91 clock-div = <2>;
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| D | keystone-clocks.dtsi | 30 clock-div = <1>;
39 clock-div = <1>;
68 clock-div = <2>;
77 clock-div = <3>;
86 clock-div = <3>;
95 clock-div = <4>;
104 clock-div = <6>;
113 clock-div = <12>;
122 clock-div = <24>;
131 clock-div = <3>;
[all …]
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| D | omap24xx-clocks.dtsi | 90 clock-div = <1>;
107 ti,max-div = <3>;
164 clock-div = <1>;
176 clock-div = <2>;
192 clock-div = <4>;
221 ti,max-div = <64>;
238 ti,max-div = <31>;
268 ti,max-div = <31>;
285 ti,max-div = <4>;
308 ti,max-div = <4>;
[all …]
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| D | r8a7793.dtsi | 207 clock-div = <2>;
215 clock-div = <5>;
223 clock-div = <3>;
231 clock-div = <6>;
239 clock-div = <12>;
247 clock-div = <24>;
255 clock-div = <(48 * 1024)>;
263 clock-div = <15>;
271 clock-div = <2>;
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| D | omap34xx-omap36xx-clocks.dtsi | 16 clock-div = <1>;
81 clock-div = <1>;
129 clock-div = <1>;
153 clock-div = <1>;
161 ti,max-div = <7>;
180 ti,max-div = <31>;
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| D | socfpga.dtsi | 152 div-reg = <0xe0 0 9>;
160 div-reg = <0xe4 0 9>;
168 div-reg = <0xe8 0 9>;
314 div-reg = <0x64 0 2>;
322 div-reg = <0x64 2 2>;
329 div-reg = <0x64 4 3>;
337 div-reg = <0x64 7 3>;
345 div-reg = <0x68 0 2>;
353 div-reg = <0x68 2 2>;
361 div-reg = <0x6C 0 3>;
[all …]
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| D | omap3430es1-clocks.dtsi | 23 ti,max-div = <7>;
33 clock-div = <1>;
96 clock-div = <2>;
120 clock-div = <1>;
144 ti,max-div = <1>;
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| /linux-4.4.14/drivers/clk/samsung/ |
| D | clk-s3c2443.c | 126 { .val = 0, .div = 1 },
127 { .val = 1, .div = 2 },
128 { .val = 3, .div = 4 },
133 { .val = 0, .div = 1 },
134 { .val = 1, .div = 3 },
135 { .val = 2, .div = 5 },
136 { .val = 3, .div = 7 },
137 { .val = 4, .div = 9 },
138 { .val = 5, .div = 11 },
139 { .val = 6, .div = 13 },
[all …]
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| D | clk-s3c2410.c | 103 { .val = 0, .div = 1 },
104 { .val = 1, .div = 2 },
105 { .val = 2, .div = 4 },
106 { .val = 3, .div = 6 },
107 { .val = 4, .div = 8 },
108 { .val = 5, .div = 10 },
109 { .val = 6, .div = 12 },
110 { .val = 7, .div = 14 },
283 { .val = 0, .div = 4 },
284 { .val = 1, .div = 8 },
[all …]
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| D | clk-s3c2412.c | 90 { .val = 0, .div = 1 },
91 { .val = 1, .div = 2 },
92 { .val = 2, .div = 4 },
93 { .val = 3, .div = 6 },
94 { .val = 4, .div = 8 },
95 { .val = 5, .div = 10 },
96 { .val = 6, .div = 12 },
97 { .val = 7, .div = 14 },
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| D | clk-cpu.c | 132 static void exynos_set_safe_div(void __iomem *base, unsigned long div, in exynos_set_safe_div() argument
138 div0 = (div0 & ~mask) | (div & mask); in exynos_set_safe_div()
225 unsigned long div = 0, div_mask = DIV_MASK; in exynos_cpuclk_post_rate_change() local
246 div |= (cfg_data->div0 & E4210_DIV0_ATB_MASK); in exynos_cpuclk_post_rate_change()
250 exynos_set_safe_div(base, div, div_mask); in exynos_cpuclk_post_rate_change()
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| /linux-4.4.14/drivers/gpu/drm/nouveau/ |
| D | nouveau_backlight.c | 102 u32 div = 1025; in nv50_get_intensity() local
107 return ((val * 100) + (div / 2)) / div; in nv50_get_intensity()
117 u32 div = 1025; in nv50_set_intensity() local
118 u32 val = (bd->props.brightness * div) / 100; in nv50_set_intensity()
138 u32 div, val; in nva3_get_intensity() local
140 div = nvif_rd32(device, NV50_PDISP_SOR_PWM_DIV(or)); in nva3_get_intensity()
143 if (div && div >= val) in nva3_get_intensity()
144 return ((val * 100) + (div / 2)) / div; in nva3_get_intensity()
156 u32 div, val; in nva3_set_intensity() local
158 div = nvif_rd32(device, NV50_PDISP_SOR_PWM_DIV(or)); in nva3_set_intensity()
[all …]
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| /linux-4.4.14/drivers/clk/shmobile/ |
| D | clk-div6.c | 34 unsigned int div; member
48 | CPG_DIV6_DIV(clock->div - 1); in cpg_div6_clock_enable()
83 unsigned int div = (clk_readl(clock->reg) & CPG_DIV6_DIV_MASK) + 1; in cpg_div6_clock_recalc_rate() local
85 return parent_rate / div; in cpg_div6_clock_recalc_rate()
91 unsigned int div; in cpg_div6_clock_calc_div() local
96 div = DIV_ROUND_CLOSEST(parent_rate, rate); in cpg_div6_clock_calc_div()
97 return clamp_t(unsigned int, div, 1, 64); in cpg_div6_clock_calc_div()
103 unsigned int div = cpg_div6_clock_calc_div(rate, *parent_rate); in cpg_div6_clock_round_rate() local
105 return *parent_rate / div; in cpg_div6_clock_round_rate()
112 unsigned int div = cpg_div6_clock_calc_div(rate, parent_rate); in cpg_div6_clock_set_rate() local
[all …]
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| D | clk-rcar-gen2.c | 179 fixed->div = 6; in cpg_rcan_clk_register()
213 struct clk_divider *div; in cpg_adsp_clk_register() local
217 div = kzalloc(sizeof(*div), GFP_KERNEL); in cpg_adsp_clk_register()
218 if (!div) in cpg_adsp_clk_register()
221 div->reg = cpg->reg + CPG_ADSPCKCR; in cpg_adsp_clk_register()
222 div->width = 4; in cpg_adsp_clk_register()
223 div->table = cpg_adsp_div_table; in cpg_adsp_clk_register()
224 div->lock = &cpg->lock; in cpg_adsp_clk_register()
228 kfree(div); in cpg_adsp_clk_register()
238 &div->hw, &clk_divider_ops, in cpg_adsp_clk_register()
[all …]
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| D | clk-r8a73a4.c | 70 unsigned int div = 1; in r8a73a4_cpg_register_clock() local
82 div = 2; in r8a73a4_cpg_register_clock()
89 div = 2; in r8a73a4_cpg_register_clock()
103 div = 2; in r8a73a4_cpg_register_clock()
111 div = 2; in r8a73a4_cpg_register_clock()
132 div = 2; in r8a73a4_cpg_register_clock()
136 div = 2; in r8a73a4_cpg_register_clock()
140 div = 4; in r8a73a4_cpg_register_clock()
160 div = 2; in r8a73a4_cpg_register_clock()
163 div *= 32; in r8a73a4_cpg_register_clock()
[all …]
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| D | clk-r8a7779.c | 100 unsigned int div = 1; in r8a7779_cpg_register_clock() local
106 div = config->z_div; in r8a7779_cpg_register_clock()
109 div = config->zs_and_s_div; in r8a7779_cpg_register_clock()
111 div = config->s1_div; in r8a7779_cpg_register_clock()
113 div = config->p_div; in r8a7779_cpg_register_clock()
115 div = config->b_and_out_div; in r8a7779_cpg_register_clock()
120 return clk_register_fixed_factor(NULL, name, parent_name, 0, mult, div); in r8a7779_cpg_register_clock()
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| D | clk-r8a7740.c | 72 unsigned int div = 1; in r8a7740_cpg_register_clock() local
79 div = 2048; in r8a7740_cpg_register_clock()
84 div = 1024; in r8a7740_cpg_register_clock()
94 div = 2; in r8a7740_cpg_register_clock()
108 div = 2; in r8a7740_cpg_register_clock()
121 div = 2; in r8a7740_cpg_register_clock()
139 mult, div); in r8a7740_cpg_register_clock()
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| /linux-4.4.14/drivers/gpu/ipu-v3/ |
| D | ipu-di.c | 275 struct ipu_di_signal_cfg *sig, int div) in ipu_di_sync_config_noninterlaced() argument
290 .offset_count = div * sig->v_to_h_sync, in ipu_di_sync_config_noninterlaced()
350 .offset_count = div * sig->v_to_h_sync + 18, /* magic value from Freescale TVE driver */ in ipu_di_sync_config_noninterlaced()
376 .offset_count = div * sig->v_to_h_sync + 18, /* magic value from Freescale TVE driver */ in ipu_di_sync_config_noninterlaced()
435 unsigned div; in ipu_di_config_clock() local
440 div = DIV_ROUND_CLOSEST(in_rate, sig->mode.pixelclock); in ipu_di_config_clock()
441 div = clamp(div, 1U, 255U); in ipu_di_config_clock()
443 clkgen0 = div << 4; in ipu_di_config_clock()
454 unsigned div, error; in ipu_di_config_clock() local
457 div = DIV_ROUND_CLOSEST(clkrate, sig->mode.pixelclock); in ipu_di_config_clock()
[all …]
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| /linux-4.4.14/arch/arm/mach-rpc/include/mach/ |
| D | acornfb.h | 85 u_int div; in acornfb_vidc20_find_rates() local
88 div = var->pixclock / 9090; /*9921*/ in acornfb_vidc20_find_rates()
91 if (div == 0) in acornfb_vidc20_find_rates()
92 div = 1; in acornfb_vidc20_find_rates()
93 if (div > 8) in acornfb_vidc20_find_rates()
94 div = 8; in acornfb_vidc20_find_rates()
97 switch (div) { in acornfb_vidc20_find_rates()
136 vidc->pll_ctl = acornfb_vidc20_find_pll(var->pixclock / div); in acornfb_vidc20_find_rates()
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| /linux-4.4.14/drivers/clk/ingenic/ |
| D | cgu.c | 319 u32 div_reg, div; in ingenic_clk_recalc_rate() local
324 div_reg = readl(cgu->base + clk_info->div.reg); in ingenic_clk_recalc_rate()
325 div = (div_reg >> clk_info->div.shift) & in ingenic_clk_recalc_rate()
326 GENMASK(clk_info->div.bits - 1, 0); in ingenic_clk_recalc_rate()
327 div += 1; in ingenic_clk_recalc_rate()
329 rate /= div; in ingenic_clk_recalc_rate()
339 unsigned div; in ingenic_clk_calc_div() local
342 div = DIV_ROUND_UP(parent_rate, req_rate); in ingenic_clk_calc_div()
345 div = min_t(unsigned, div, 1 << clk_info->div.bits); in ingenic_clk_calc_div()
346 div = max_t(unsigned, div, 1); in ingenic_clk_calc_div()
[all …]
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| D | jz4740-cgu.c | 93 .div = { CGU_REG_CPCCR, 21, 1, -1, -1, -1 },
99 .div = { CGU_REG_CPCCR, 0, 4, 22, -1, -1 },
105 .div = { CGU_REG_CPCCR, 4, 4, 22, -1, -1 },
111 .div = { CGU_REG_CPCCR, 8, 4, 22, -1, -1 },
117 .div = { CGU_REG_CPCCR, 12, 4, 22, -1, -1 },
123 .div = { CGU_REG_CPCCR, 16, 5, 22, -1, -1 },
130 .div = { CGU_REG_LPCDR, 0, 11, -1, -1, -1 },
137 .div = { CGU_REG_I2SCDR, 0, 8, -1, -1, -1 },
145 .div = { CGU_REG_SSICDR, 0, 4, -1, -1, -1 },
152 .div = { CGU_REG_MSCCDR, 0, 5, -1, -1, -1 },
[all …]
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| D | jz4780-cgu.c | 299 .div = { CGU_REG_CLOCKCONTROL, 0, 4, 22, -1, -1 },
305 .div = { CGU_REG_CLOCKCONTROL, 4, 4, -1, -1, -1 },
313 .div = { CGU_REG_CLOCKCONTROL, 8, 4, 21, -1, -1 },
326 .div = { CGU_REG_CLOCKCONTROL, 12, 4, 20, -1, -1 },
332 .div = { CGU_REG_CLOCKCONTROL, 16, 4, 20, -1, -1 },
339 .div = { CGU_REG_DDRCDR, 0, 4, 29, 28, 27 },
347 .div = { CGU_REG_VPUCDR, 0, 4, 29, 28, 27 },
355 .div = { CGU_REG_I2SCDR, 0, 8, 29, 28, 27 },
369 .div = { CGU_REG_LP0CDR, 0, 8, 28, 27, 26 },
377 .div = { CGU_REG_LP1CDR, 0, 8, 28, 27, 26 },
[all …]
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| /linux-4.4.14/sound/soc/sh/rcar/ |
| D | adg.c | 53 static u32 rsnd_adg_calculate_rbgx(unsigned long div) in rsnd_adg_calculate_rbgx() argument
57 if (!div) in rsnd_adg_calculate_rbgx()
62 if (0 == (div % ratio)) in rsnd_adg_calculate_rbgx()
63 return (u32)((i << 8) | ((div / ratio) - 1)); in rsnd_adg_calculate_rbgx()
172 int idx, sel, div, step, ret; in rsnd_adg_set_convert_clk_gen2() local
195 for (div = 2; div <= 98304; div += step) { in rsnd_adg_set_convert_clk_gen2()
196 diff = abs(src_rate - sel_rate[sel] / div); in rsnd_adg_set_convert_clk_gen2()
210 div += step; in rsnd_adg_set_convert_clk_gen2()
253 int idx, sel, div, shift; in rsnd_adg_set_convert_clk_gen1() local
267 for (div = 128, idx = 0; in rsnd_adg_set_convert_clk_gen1()
[all …]
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| /linux-4.4.14/drivers/video/fbdev/omap2/dss/ |
| D | rfbi.c | 388 static inline unsigned long round_to_extif_ticks(unsigned long ps, int div) in round_to_extif_ticks() argument
390 int bus_tick = extif_clk_period * div; in round_to_extif_ticks()
394 static int calc_reg_timing(struct rfbi_timings *t, int div) in calc_reg_timing() argument
396 t->clk_div = div; in calc_reg_timing()
398 t->cs_on_time = round_to_extif_ticks(t->cs_on_time, div); in calc_reg_timing()
400 t->we_on_time = round_to_extif_ticks(t->we_on_time, div); in calc_reg_timing()
401 t->we_off_time = round_to_extif_ticks(t->we_off_time, div); in calc_reg_timing()
402 t->we_cycle_time = round_to_extif_ticks(t->we_cycle_time, div); in calc_reg_timing()
404 t->re_on_time = round_to_extif_ticks(t->re_on_time, div); in calc_reg_timing()
405 t->re_off_time = round_to_extif_ticks(t->re_off_time, div); in calc_reg_timing()
[all …]
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| /linux-4.4.14/include/linux/ |
| D | ktime.h | 169 extern s64 __ktime_divns(const ktime_t kt, s64 div);
170 static inline s64 ktime_divns(const ktime_t kt, s64 div) in ktime_divns() argument
176 BUG_ON(div < 0); in ktime_divns()
177 if (__builtin_constant_p(div) && !(div >> 32)) { in ktime_divns()
181 do_div(tmp, div); in ktime_divns()
184 return __ktime_divns(kt, div); in ktime_divns()
188 static inline s64 ktime_divns(const ktime_t kt, s64 div) in ktime_divns() argument
194 WARN_ON(div < 0); in ktime_divns()
195 return kt.tv64 / div; in ktime_divns()
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| D | jz4740-adc.h | 30 #define JZ_ADC_CONFIG_CLKDIV(div) ((div) << 5) argument
|
| /linux-4.4.14/drivers/video/fbdev/omap/ |
| D | sossi.c | 125 static u32 ps_to_sossi_ticks(u32 ps, int div) in ps_to_sossi_ticks() argument
127 u32 clk_period = HZ_TO_PS(sossi.fck_hz) * div; in ps_to_sossi_ticks()
135 int div = t->clk_div; in calc_rd_timings() local
141 reon = ps_to_sossi_ticks(t->re_on_time, div); in calc_rd_timings()
146 reoff = ps_to_sossi_ticks(t->re_off_time, div); in calc_rd_timings()
155 recyc = ps_to_sossi_ticks(t->re_cycle_time, div); in calc_rd_timings()
166 actim = ps_to_sossi_ticks(t->access_time, div); in calc_rd_timings()
186 int div = t->clk_div; in calc_wr_timings() local
192 weon = ps_to_sossi_ticks(t->we_on_time, div); in calc_wr_timings()
197 weoff = ps_to_sossi_ticks(t->we_off_time, div); in calc_wr_timings()
[all …]
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| D | hwa742.c | 629 static unsigned long round_to_extif_ticks(unsigned long ps, int div) in round_to_extif_ticks() argument
631 int bus_tick = hwa742.extif_clk_period * div; in round_to_extif_ticks()
635 static int calc_reg_timing(unsigned long sysclk, int div) in calc_reg_timing() argument
650 "extif_clk_div %d\n", systim, hwa742.extif_clk_period, div); in calc_reg_timing()
654 t->clk_div = div; in calc_reg_timing()
656 t->we_on_time = round_to_extif_ticks(t->cs_on_time + 2000, div); in calc_reg_timing()
657 t->re_on_time = round_to_extif_ticks(t->cs_on_time + 2000, div); in calc_reg_timing()
658 t->access_time = round_to_extif_ticks(t->re_on_time + 12200, div); in calc_reg_timing()
659 t->we_off_time = round_to_extif_ticks(t->we_on_time + 1000, div); in calc_reg_timing()
660 t->re_off_time = round_to_extif_ticks(t->re_on_time + 16000, div); in calc_reg_timing()
[all …]
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| /linux-4.4.14/sound/soc/samsung/ |
| D | s3c-i2s-v2.c | 450 int div_id, int div) in s3c2412_i2s_set_clkdiv() argument
455 pr_debug("%s(%p, %d, %d)\n", __func__, cpu_dai, div_id, div); in s3c2412_i2s_set_clkdiv()
459 switch (div) { in s3c2412_i2s_set_clkdiv()
461 div = S3C2412_IISMOD_BCLK_16FS; in s3c2412_i2s_set_clkdiv()
465 div = S3C2412_IISMOD_BCLK_32FS; in s3c2412_i2s_set_clkdiv()
469 div = S3C2412_IISMOD_BCLK_24FS; in s3c2412_i2s_set_clkdiv()
473 div = S3C2412_IISMOD_BCLK_48FS; in s3c2412_i2s_set_clkdiv()
482 writel(reg | div, i2s->regs + S3C2412_IISMOD); in s3c2412_i2s_set_clkdiv()
488 switch (div) { in s3c2412_i2s_set_clkdiv()
490 div = S3C2412_IISMOD_RCLK_256FS; in s3c2412_i2s_set_clkdiv()
[all …]
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| D | rx1950_uda1380.c | 158 int div; in rx1950_hw_params() local
168 div = s3c24xx_i2s_get_clockrate() / (256 * rate); in rx1950_hw_params()
170 div++; in rx1950_hw_params()
176 div = 1; in rx1950_hw_params()
204 S3C24XX_PRESCALE(div, div)); in rx1950_hw_params()
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| D | jive_wm8750.c | 43 struct s3c_i2sv2_rate_calc div; in jive_hw_params() local
61 s3c_i2sv2_iis_calc_rate(&div, NULL, params_rate(params), in jive_hw_params()
70 ret = snd_soc_dai_set_clkdiv(cpu_dai, S3C2412_DIV_RCLK, div.fs_div); in jive_hw_params()
75 div.clk_div - 1); in jive_hw_params()
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| D | h1940_uda1380.c | 78 int div; in h1940_hw_params() local
86 div = s3c24xx_i2s_get_clockrate() / (384 * rate); in h1940_hw_params()
88 div++; in h1940_hw_params()
116 S3C24XX_PRESCALE(div, div)); in h1940_hw_params()
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| D | s3c24xx_uda134x.c | 136 unsigned int div; in s3c24xx_uda134x_hw_params() local
156 div = 1; in s3c24xx_uda134x_hw_params()
159 div = bi % 33; in s3c24xx_uda134x_hw_params()
167 div, clk, err); in s3c24xx_uda134x_hw_params()
191 S3C24XX_PRESCALE(div, div)); in s3c24xx_uda134x_hw_params()
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| /linux-4.4.14/drivers/clk/mmp/ |
| D | clk-mix.c | 38 for (clkt = mix->div_table; clkt->div; clkt++) in _get_maxdiv()
39 if (clkt->div > maxdiv) in _get_maxdiv()
40 maxdiv = clkt->div; in _get_maxdiv()
55 for (clkt = mix->div_table; clkt->div; clkt++) in _get_div()
57 return clkt->div; in _get_div()
58 if (clkt->div == 0) in _get_div()
83 static unsigned int _get_div_val(struct mmp_clk_mix *mix, unsigned int div) in _get_div_val() argument
88 return div; in _get_div_val()
90 return __ffs(div); in _get_div_val()
92 for (clkt = mix->div_table; clkt->div; clkt++) in _get_div_val()
[all …]
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| /linux-4.4.14/drivers/clk/at91/ |
| D | clk-smd.c | 49 unsigned long div; in at91sam9x5_clk_smd_round_rate() local
56 div = *parent_rate / rate; in at91sam9x5_clk_smd_round_rate()
57 if (div > SMD_MAX_DIV) in at91sam9x5_clk_smd_round_rate()
60 bestrate = *parent_rate / div; in at91sam9x5_clk_smd_round_rate()
61 tmp = *parent_rate / (div + 1); in at91sam9x5_clk_smd_round_rate()
97 unsigned long div = parent_rate / rate; in at91sam9x5_clk_smd_set_rate() local
99 if (parent_rate % rate || div < 1 || div > (SMD_MAX_DIV + 1)) in at91sam9x5_clk_smd_set_rate()
102 tmp |= (div - 1) << SMD_DIV_SHIFT; in at91sam9x5_clk_smd_set_rate()
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| D | clk-h32mx.c | 55 unsigned long div; in clk_sama5d4_h32mx_round_rate() local
59 div = *parent_rate / 2; in clk_sama5d4_h32mx_round_rate()
60 if (rate < div) in clk_sama5d4_h32mx_round_rate()
61 return div; in clk_sama5d4_h32mx_round_rate()
63 if (rate - div < *parent_rate - rate) in clk_sama5d4_h32mx_round_rate()
64 return div; in clk_sama5d4_h32mx_round_rate()
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| D | clk-usb.c | 70 int div; in at91sam9x5_clk_usb_determine_rate() local
76 for (div = 1; div < SAM9X5_USB_MAX_DIV + 2; div++) { in at91sam9x5_clk_usb_determine_rate()
79 tmp_parent_rate = req->rate * div; in at91sam9x5_clk_usb_determine_rate()
82 tmp_rate = DIV_ROUND_CLOSEST(tmp_parent_rate, div); in at91sam9x5_clk_usb_determine_rate()
139 unsigned long div; in at91sam9x5_clk_usb_set_rate() local
144 div = DIV_ROUND_CLOSEST(parent_rate, rate); in at91sam9x5_clk_usb_set_rate()
145 if (div > SAM9X5_USB_MAX_DIV + 1 || !div) in at91sam9x5_clk_usb_set_rate()
149 tmp |= (div - 1) << SAM9X5_USB_DIV_SHIFT; in at91sam9x5_clk_usb_set_rate()
317 unsigned long div; in at91rm9200_clk_usb_set_rate() local
322 div = DIV_ROUND_CLOSEST(parent_rate, rate); in at91rm9200_clk_usb_set_rate()
[all …]
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| D | clk-plldiv.c | 42 unsigned long div; in clk_plldiv_round_rate() local
46 div = *parent_rate / 2; in clk_plldiv_round_rate()
47 if (rate < div) in clk_plldiv_round_rate()
48 return div; in clk_plldiv_round_rate()
50 if (rate - div < *parent_rate - rate) in clk_plldiv_round_rate()
51 return div; in clk_plldiv_round_rate()
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| D | clk-pll.c | 65 u8 div; member
94 u8 div; in clk_pll_prepare() local
98 div = PLL_DIV(pllr); in clk_pll_prepare()
102 (div == pll->div && mul == pll->mul)) in clk_pll_prepare()
116 (pll->div | (PLL_MAX_COUNT << PLL_COUNT_SHIFT) | in clk_pll_prepare()
155 if (!pll->div || !pll->mul) in clk_pll_recalc_rate()
158 return (parent_rate / pll->div) * (pll->mul + 1); in clk_pll_recalc_rate()
163 u32 *div, u32 *mul, in clk_pll_get_best_div_mul() argument
261 if (div) in clk_pll_get_best_div_mul()
262 *div = bestdiv; in clk_pll_get_best_div_mul()
[all …]
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| D | clk-generated.c | 110 u32 div; in clk_generated_determine_rate() local
123 for (div = 1; div < GENERATED_MAX_DIV + 2; div++) { in clk_generated_determine_rate()
124 tmp_rate = DIV_ROUND_CLOSEST(parent_rate, div); in clk_generated_determine_rate()
179 u32 div; in clk_generated_set_rate() local
187 div = DIV_ROUND_CLOSEST(parent_rate, rate); in clk_generated_set_rate()
188 if (div > GENERATED_MAX_DIV + 1 || !div) in clk_generated_set_rate()
191 gck->gckdiv = div - 1; in clk_generated_set_rate()
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| D | clk-peripheral.c | 47 u32 div; member
157 periph->div = shift; in clk_sam9x5_peripheral_autodiv()
172 pmc_write(pmc, AT91_PMC_PCR, tmp | AT91_PMC_PCR_DIV(periph->div) in clk_sam9x5_peripheral_enable()
229 periph->div = PERIPHERAL_RSHIFT(tmp); in clk_sam9x5_peripheral_recalc_rate()
235 return parent_rate >> periph->div; in clk_sam9x5_peripheral_recalc_rate()
303 periph->div = shift; in clk_sam9x5_peripheral_set_rate()
344 periph->div = 0; in at91_clk_register_sam9x5_peripheral()
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| /linux-4.4.14/drivers/gpu/drm/nouveau/nvkm/subdev/volt/ |
| D | gk104.c | 42 u32 div, duty; in gk104_volt_get() local
44 div = nvkm_rd32(device, 0x20340); in gk104_volt_get()
47 return bios->base + bios->pwm_range * duty / div; in gk104_volt_get()
55 u32 div, duty; in gk104_volt_set() local
58 div = 27648000 / bios->pwm_freq; in gk104_volt_set()
59 duty = (uv - bios->base) * div / bios->pwm_range; in gk104_volt_set()
61 nvkm_wr32(device, 0x20340, div); in gk104_volt_set()
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| /linux-4.4.14/drivers/net/ethernet/stmicro/stmmac/ |
| D | dwmac-ipq806x.c | 108 int div; in get_clk_div_sgmii() local
112 div = NSS_COMMON_CLK_DIV_SGMII_1000; in get_clk_div_sgmii()
116 div = NSS_COMMON_CLK_DIV_SGMII_100; in get_clk_div_sgmii()
120 div = NSS_COMMON_CLK_DIV_SGMII_10; in get_clk_div_sgmii()
128 return div; in get_clk_div_sgmii()
134 int div; in get_clk_div_rgmii() local
138 div = NSS_COMMON_CLK_DIV_RGMII_1000; in get_clk_div_rgmii()
142 div = NSS_COMMON_CLK_DIV_RGMII_100; in get_clk_div_rgmii()
146 div = NSS_COMMON_CLK_DIV_RGMII_10; in get_clk_div_rgmii()
154 return div; in get_clk_div_rgmii()
[all …]
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| /linux-4.4.14/drivers/cpufreq/ |
| D | cpufreq-nforce2.c | 23 #define NFORCE2_PLL(mul, div) (0x100000 | (mul << 8) | div) argument
69 unsigned char mul, div; in nforce2_calc_fsb() local
72 div = pll & 0xff; in nforce2_calc_fsb()
74 if (div > 0) in nforce2_calc_fsb()
75 return NFORCE2_XTAL * mul / div; in nforce2_calc_fsb()
89 unsigned char mul = 0, div = 0; in nforce2_calc_pll() local
93 while (((mul == 0) || (div == 0)) && (tried <= 3)) { in nforce2_calc_pll()
99 div = xdiv; in nforce2_calc_pll()
104 if ((mul == 0) || (div == 0)) in nforce2_calc_pll()
107 return NFORCE2_PLL(mul, div); in nforce2_calc_pll()
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| D | s3c2440-cpufreq.c | 204 int div; in run_freq_for() local
206 for (div = *divs; div > 0; div = *divs++) { in run_freq_for()
207 freq = fclk / div; in run_freq_for()
209 if (freq > max_hclk && div != 1) in run_freq_for()
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| /linux-4.4.14/drivers/clk/pistachio/ |
| D | clk.c | 95 struct pistachio_div *div, in pistachio_clk_register_div() argument
102 clk = clk_register_divider(NULL, div[i].name, div[i].parent, in pistachio_clk_register_div()
103 0, p->base + div[i].reg, 0, in pistachio_clk_register_div()
104 div[i].width, div[i].div_flags, in pistachio_clk_register_div()
106 p->clk_data.clks[div[i].id] = clk; in pistachio_clk_register_div()
119 0, 1, ff[i].div); in pistachio_clk_register_fixed_factor()
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| /linux-4.4.14/arch/unicore32/kernel/ |
| D | clock.c | 102 unsigned long div; member
104 {.rate = 25175000, .cfg = 0x00002001, .div = 0x9},
105 {.rate = 31500000, .cfg = 0x00002001, .div = 0x7},
106 {.rate = 40000000, .cfg = 0x00003801, .div = 0x9},
107 {.rate = 49500000, .cfg = 0x00003801, .div = 0x7},
108 {.rate = 65000000, .cfg = 0x00002c01, .div = 0x4},
109 {.rate = 78750000, .cfg = 0x00002400, .div = 0x7},
110 {.rate = 108000000, .cfg = 0x00002c01, .div = 0x2},
111 {.rate = 106500000, .cfg = 0x00003c01, .div = 0x3},
112 {.rate = 50650000, .cfg = 0x00106400, .div = 0x9},
[all …]
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| /linux-4.4.14/drivers/clk/socfpga/ |
| D | clk-periph-a10.c | 35 u32 div; in clk_periclk_recalc_rate() local
38 div = socfpgaclk->fixed_div; in clk_periclk_recalc_rate()
40 div = readl(socfpgaclk->div_reg) >> socfpgaclk->shift; in clk_periclk_recalc_rate()
41 div &= GENMASK(socfpgaclk->width - 1, 0); in clk_periclk_recalc_rate()
42 div += 1; in clk_periclk_recalc_rate()
44 div = ((readl(socfpgaclk->hw.reg) & 0x7ff) + 1); in clk_periclk_recalc_rate()
47 return parent_rate / div; in clk_periclk_recalc_rate()
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| D | clk-periph.c | 31 u32 div, val; in clk_periclk_recalc_rate() local
34 div = socfpgaclk->fixed_div; in clk_periclk_recalc_rate()
41 div = ((readl(socfpgaclk->hw.reg) & 0x1ff) + 1); in clk_periclk_recalc_rate()
44 return parent_rate / div; in clk_periclk_recalc_rate()
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| D | clk-gate.c | 102 u32 div = 1, val; in socfpga_clk_recalc_rate() local
105 div = socfpgaclk->fixed_div; in socfpga_clk_recalc_rate()
111 div = val + 1; in socfpga_clk_recalc_rate()
113 div = (1 << val); in socfpga_clk_recalc_rate()
116 return parent_rate / div; in socfpga_clk_recalc_rate()
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| D | clk-gate-a10.c | 36 u32 div = 1, val; in socfpga_gate_clk_recalc_rate() local
39 div = socfpgaclk->fixed_div; in socfpga_gate_clk_recalc_rate()
43 div = (1 << val); in socfpga_gate_clk_recalc_rate()
46 return parent_rate / div; in socfpga_gate_clk_recalc_rate()
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| /linux-4.4.14/arch/blackfin/mach-bf609/ |
| D | clock.c | 154 u32 div; in pll_round_rate() local
155 div = rate / clk->parent->rate; in pll_round_rate()
156 return clk->parent->rate * div; in pll_round_rate()
190 u32 div = bfin_read32(CGU0_DIV); in sys_clk_get_rate() local
191 div = (div & clk->mask) >> clk->shift; in sys_clk_get_rate()
198 drate /= div; in sys_clk_get_rate()
202 return clk->parent->rate / div; in sys_clk_get_rate()
238 u32 div = bfin_read32(CGU0_DIV); in sys_clk_set_rate() local
239 div = (div & clk->mask) >> clk->shift; in sys_clk_set_rate()
246 div = (clk_get_rate(clk) * div) / rate; in sys_clk_set_rate()
[all …]
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| /linux-4.4.14/arch/m68k/math-emu/ |
| D | multi_arith.h | 131 #define fp_div64(quot, rem, srch, srcl, div) \ argument
133 : "dm" (div), "1" (srch), "0" (srcl))
182 struct fp_ext *div) in fp_dividemant() argument
192 if (src->mant.m64 >= div->mant.m64) { in fp_dividemant()
193 fp_sub64(src->mant, div->mant); in fp_dividemant()
209 dummy = div->mant.m32[1] / div->mant.m32[0] + 1; in fp_dividemant()
215 if (src->mant.m32[0] == div->mant.m32[0]) { in fp_dividemant()
216 fp_div64(first, rem, 0, src->mant.m32[1], div->mant.m32[0]); in fp_dividemant()
221 fp_div64(first, rem, src->mant.m32[0], src->mant.m32[1], div->mant.m32[0]); in fp_dividemant()
226 fp_mul64(tmp.m32[0], tmp.m32[1], div->mant.m32[0], first - *mantp); in fp_dividemant()
[all …]
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| /linux-4.4.14/drivers/gpu/drm/armada/ |
| D | armada_510.c | 64 uint32_t rate, ref, div; in armada510_crtc_compute_clock() local
68 div = DIV_ROUND_UP(ref, rate); in armada510_crtc_compute_clock()
69 if (div < 1) in armada510_crtc_compute_clock()
70 div = 1; in armada510_crtc_compute_clock()
73 *sclk = div | SCLK_510_EXTCLK1; in armada510_crtc_compute_clock()
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| /linux-4.4.14/drivers/clk/nxp/ |
| D | clk-lpc18xx-ccu.c | 211 struct clk_divider *div = NULL; in lpc18xx_ccu_register_branch_gate_div() local
215 div = kzalloc(sizeof(*div), GFP_KERNEL); in lpc18xx_ccu_register_branch_gate_div()
216 if (!div) in lpc18xx_ccu_register_branch_gate_div()
219 div->reg = branch->offset + reg_base; in lpc18xx_ccu_register_branch_gate_div()
220 div->flags = CLK_DIVIDER_READ_ONLY; in lpc18xx_ccu_register_branch_gate_div()
221 div->shift = 27; in lpc18xx_ccu_register_branch_gate_div()
222 div->width = 1; in lpc18xx_ccu_register_branch_gate_div()
224 div_hw = &div->hw; in lpc18xx_ccu_register_branch_gate_div()
236 kfree(div); in lpc18xx_ccu_register_branch_gate_div()
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| /linux-4.4.14/drivers/clk/mediatek/ |
| D | clk-mtk.c | 85 CLK_SET_RATE_PARENT, ff->mult, ff->div); in mtk_clk_register_factors()
144 struct clk_divider *div = NULL; in mtk_clk_register_composite() local
190 div = kzalloc(sizeof(*div), GFP_KERNEL); in mtk_clk_register_composite()
191 if (!div) { in mtk_clk_register_composite()
196 div->reg = base + mc->divider_reg; in mtk_clk_register_composite()
197 div->shift = mc->divider_shift; in mtk_clk_register_composite()
198 div->width = mc->divider_width; in mtk_clk_register_composite()
199 div->lock = lock; in mtk_clk_register_composite()
201 div_hw = &div->hw; in mtk_clk_register_composite()
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| /linux-4.4.14/arch/m68k/atari/ |
| D | debug.c | 219 int clksrc, clkmode, div, reg3, reg5; in atari_init_scc_port() local
229 div = div_table[baud]; in atari_init_scc_port()
236 div = 0; in atari_init_scc_port()
253 SCC_WRITE(12, div); /* BRG value */ in atari_init_scc_port()
256 SCC_WRITE(14, brgsrc_table[baud] | (div ? 1 : 0)); in atari_init_scc_port()
269 int div; in atari_init_midi_port() local
276 div = ACIA_DIV64; /* really 7812.5 bps */ in atari_init_midi_port()
278 div = ACIA_DIV1; /* really 500 kbps (does that work??) */ in atari_init_midi_port()
280 div = ACIA_DIV16; /* 31250 bps, standard for MIDI */ in atari_init_midi_port()
283 acia.mid_ctrl = div | csize | parity | in atari_init_midi_port()
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| /linux-4.4.14/drivers/media/dvb-frontends/ |
| D | bsbe1.h | 77 u32 div; in alps_bsbe1_tuner_set_params() local
84 div = p->frequency / 1000; in alps_bsbe1_tuner_set_params()
85 data[0] = (div >> 8) & 0x7f; in alps_bsbe1_tuner_set_params()
86 data[1] = div & 0xff; in alps_bsbe1_tuner_set_params()
87 data[2] = 0x80 | ((div & 0x18000) >> 10) | 0x1; in alps_bsbe1_tuner_set_params()
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| D | bsru6.h | 108 u32 div; in alps_bsru6_tuner_set_params() local
115 div = (p->frequency + (125 - 1)) / 125; /* round correctly */ in alps_bsru6_tuner_set_params()
116 buf[0] = (div >> 8) & 0x7f; in alps_bsru6_tuner_set_params()
117 buf[1] = div & 0xff; in alps_bsru6_tuner_set_params()
118 buf[2] = 0x80 | ((div & 0x18000) >> 10) | 4; in alps_bsru6_tuner_set_params()
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| D | tua6100.c | 74 u32 div; in tua6100_set_params() local
119 div = prediv / _P; in tua6100_set_params()
120 reg1[1] |= (div >> 9) & 0x03; in tua6100_set_params()
121 reg1[2] = div >> 1; in tua6100_set_params()
122 reg1[3] = (div << 7); in tua6100_set_params()
123 priv->frequency = ((div * _P) * (_ri / 1000)) / _R; in tua6100_set_params()
126 reg1[3] |= (prediv - (div*_P)) & 0x7f; in tua6100_set_params()
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| D | tdhd1.h | 49 u32 div; in alps_tdhd1_204a_tuner_set_params() local
51 div = (p->frequency + 36166666) / 166666; in alps_tdhd1_204a_tuner_set_params()
53 data[0] = (div >> 8) & 0x7f; in alps_tdhd1_204a_tuner_set_params()
54 data[1] = div & 0xff; in alps_tdhd1_204a_tuner_set_params()
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| D | tda826x.c | 79 u32 div; in tda826x_set_params() local
87 div = (p->frequency + (1000-1)) / 1000; in tda826x_set_params()
103 buf[3] = div >> 7; in tda826x_set_params()
104 buf[4] = div << 1; in tda826x_set_params()
120 priv->frequency = div * 1000; in tda826x_set_params()
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| D | zl10036.c | 187 u32 div, foffset; in zl10036_set_frequency() local
189 div = (frequency + _FR/2) / _FR; in zl10036_set_frequency()
190 state->frequency = div * _FR; in zl10036_set_frequency()
194 buf[0] = (div >> 8) & 0x7f; in zl10036_set_frequency()
195 buf[1] = (div >> 0) & 0xff; in zl10036_set_frequency()
198 frequency, state->frequency, foffset, div); in zl10036_set_frequency()
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| /linux-4.4.14/arch/arm/mach-lpc32xx/ |
| D | clock.c | 917 u32 div, rate, oldclk; in mmc_get_rate() local
923 div = __raw_readl(LPC32XX_CLKPWR_MS_CTRL); in mmc_get_rate()
930 div = div & LPC32XX_CLKPWR_MSCARD_SDCARD_DIV(0xf); in mmc_get_rate()
932 if (!div) in mmc_get_rate()
933 div = 1; in mmc_get_rate()
935 return rate / div; in mmc_get_rate()
940 unsigned long div, prate; in mmc_round_rate() local
948 div = prate / rate; in mmc_round_rate()
949 if (div > 0xf) in mmc_round_rate()
950 div = 0xf; in mmc_round_rate()
[all …]
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| /linux-4.4.14/arch/powerpc/boot/ |
| D | cuboot-acadia.c | 49 unsigned long div; /* total divisor udiv * bdiv */ in get_clocks() local
130 div = plloutb / (16 * baud); /* total divisor */ in get_clocks()
139 ibdiv = div / i; in get_clocks()
141 idiff = (est > div) ? (est-div) : (div-est); in get_clocks()
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| D | cuboot-52xx.c | 27 int div; in platform_fixups() local
50 div = in_8(reg + 0x204) & 0x0020 ? 8 : 4; in platform_fixups()
51 sysfreq = bd.bi_busfreq * div; in platform_fixups()
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| /linux-4.4.14/drivers/clk/st/ |
| D | clkgen-mux.c | 60 struct clk_divider div[NUM_INPUTS]; member
174 struct clk_hw *div_hw = &genamux->div[genamux->muxsel].hw; in clkgena_divmux_recalc_rate()
185 struct clk_hw *div_hw = &genamux->div[genamux->muxsel].hw; in clkgena_divmux_set_rate()
196 struct clk_hw *div_hw = &genamux->div[genamux->muxsel].hw; in clkgena_divmux_round_rate()
262 genamux->div[i].width = divider_width; in clk_register_genamux()
263 genamux->div[i].reg = divbase + (idx * sizeof(u32)); in clk_register_genamux()
465 { .val = 0, .div = 1 },
466 { .val = 1, .div = 16 },
467 { .div = 0 },
746 struct clk_divider *div; in st_of_clkgen_vcc_setup() local
[all …]
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| D | clk-flexgen.c | 107 unsigned long div; in flexgen_round_rate() local
110 div = clk_best_div(*prate, rate); in flexgen_round_rate()
113 *prate = rate * div; in flexgen_round_rate()
117 return *prate / div; in flexgen_round_rate()
142 unsigned long div = 0; in flexgen_set_rate() local
148 div = clk_best_div(parent_rate, rate); in flexgen_set_rate()
156 if (div <= 64) { in flexgen_set_rate()
158 ret = clk_divider_ops.set_rate(fdiv_hw, rate, rate * div); in flexgen_set_rate()
161 ret = clk_divider_ops.set_rate(pdiv_hw, rate, rate * div); in flexgen_set_rate()
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| /linux-4.4.14/drivers/media/pci/ttpci/ |
| D | budget.c | 216 u32 div = (c->frequency + 479500) / 125; in alps_bsrv2_tuner_set_params() local
230 buf[0] = (div >> 8) & 0x7f; in alps_bsrv2_tuner_set_params()
231 buf[1] = div & 0xff; in alps_bsrv2_tuner_set_params()
232 buf[2] = ((div & 0x18000) >> 10) | 0x95; in alps_bsrv2_tuner_set_params()
255 u32 div; in alps_tdbe2_tuner_set_params() local
259 div = (c->frequency + 35937500 + 31250) / 62500; in alps_tdbe2_tuner_set_params()
261 data[0] = (div >> 8) & 0x7f; in alps_tdbe2_tuner_set_params()
262 data[1] = div & 0xff; in alps_tdbe2_tuner_set_params()
263 data[2] = 0x85 | ((div >> 10) & 0x60); in alps_tdbe2_tuner_set_params()
284 u32 div; in grundig_29504_401_tuner_set_params() local
[all …]
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| D | budget-patch.c | 274 u32 div = (p->frequency + 479500) / 125; in alps_bsrv2_tuner_set_params() local
288 buf[0] = (div >> 8) & 0x7f; in alps_bsrv2_tuner_set_params()
289 buf[1] = div & 0xff; in alps_bsrv2_tuner_set_params()
290 buf[2] = ((div & 0x18000) >> 10) | 0x95; in alps_bsrv2_tuner_set_params()
313 u32 div; in grundig_29504_451_tuner_set_params() local
317 div = p->frequency / 125; in grundig_29504_451_tuner_set_params()
318 data[0] = (div >> 8) & 0x7f; in grundig_29504_451_tuner_set_params()
319 data[1] = div & 0xff; in grundig_29504_451_tuner_set_params()
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| /linux-4.4.14/arch/mn10300/include/asm/ |
| D | div64.h | 79 unsigned __muldiv64u(unsigned val, unsigned mult, unsigned div) in __muldiv64u() argument
87 : "0"(val), "ir"(mult), "r"(div) in __muldiv64u()
100 signed __muldiv64s(signed val, signed mult, signed div) in __muldiv64s() argument
108 : "0"(val), "ir"(mult), "r"(div) in __muldiv64s()
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| /linux-4.4.14/drivers/mfd/ |
| D | db8500-prcmu.c | 725 int prcmu_config_clkout(u8 clkout, u8 source, u8 div) in prcmu_config_clkout() argument
736 BUG_ON(div > 63); in prcmu_config_clkout()
739 if (!div && !requests[clkout]) in prcmu_config_clkout()
747 (div << PRCM_CLKOCR_CLKODIV0_SHIFT)); in prcmu_config_clkout()
754 (div << PRCM_CLKOCR_CLKODIV1_SHIFT)); in prcmu_config_clkout()
763 if (div) { in prcmu_config_clkout()
776 requests[clkout] += (div ? 1 : -1); in prcmu_config_clkout()
981 u32 div; in request_even_slower_clocks() local
984 div = (val & PRCM_CLK_MGT_CLKPLLDIV_MASK); in request_even_slower_clocks()
986 if ((div <= 1) || (div > 15)) { in request_even_slower_clocks()
[all …]
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| D | mcp-core.c | 63 void mcp_set_telecom_divisor(struct mcp *mcp, unsigned int div) in mcp_set_telecom_divisor() argument
68 mcp->ops->set_telecom_divisor(mcp, div); in mcp_set_telecom_divisor()
80 void mcp_set_audio_divisor(struct mcp *mcp, unsigned int div) in mcp_set_audio_divisor() argument
85 mcp->ops->set_audio_divisor(mcp, div); in mcp_set_audio_divisor()
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| D | rtsx_usb.c | 388 static u8 revise_ssc_depth(u8 ssc_depth, u8 div) in revise_ssc_depth() argument
390 if (div > CLK_DIV_1) { in revise_ssc_depth()
391 if (ssc_depth > div - 1) in revise_ssc_depth()
392 ssc_depth -= (div - 1); in revise_ssc_depth()
404 u8 n, clk_divider, mcu_cnt, div; in rtsx_usb_switch_clock() local
448 div = CLK_DIV_1; in rtsx_usb_switch_clock()
449 while (n < MIN_DIV_N && div < CLK_DIV_4) { in rtsx_usb_switch_clock()
451 div++; in rtsx_usb_switch_clock()
453 dev_dbg(&ucr->pusb_intf->dev, "n = %d, div = %d\n", n, div); in rtsx_usb_switch_clock()
458 ssc_depth = revise_ssc_depth(ssc_depth, div); in rtsx_usb_switch_clock()
[all …]
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| /linux-4.4.14/drivers/spi/ |
| D | spi-sun4i.c | 59 #define SUN4I_CLK_CTL_CDR2(div) ((div) & SUN4I_CLK_CTL_CDR2_MASK) argument
61 #define SUN4I_CLK_CTL_CDR1(div) (((div) & SUN4I_CLK_CTL_CDR1_MASK) << 8) argument
172 unsigned int mclk_rate, div, timeout; in sun4i_spi_transfer_one() local
251 div = mclk_rate / (2 * spi->max_speed_hz); in sun4i_spi_transfer_one()
252 if (div <= (SUN4I_CLK_CTL_CDR2_MASK + 1)) { in sun4i_spi_transfer_one()
253 if (div > 0) in sun4i_spi_transfer_one()
254 div--; in sun4i_spi_transfer_one()
256 reg = SUN4I_CLK_CTL_CDR2(div) | SUN4I_CLK_CTL_DRS; in sun4i_spi_transfer_one()
258 div = ilog2(mclk_rate) - ilog2(spi->max_speed_hz); in sun4i_spi_transfer_one()
259 reg = SUN4I_CLK_CTL_CDR1(div); in sun4i_spi_transfer_one()
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| D | spi-sun6i.c | 64 #define SUN6I_CLK_CTL_CDR2(div) (((div) & SUN6I_CLK_CTL_CDR2_MASK) << 0) argument
66 #define SUN6I_CLK_CTL_CDR1(div) (((div) & SUN6I_CLK_CTL_CDR1_MASK) << 8) argument
162 unsigned int mclk_rate, div, timeout; in sun6i_spi_transfer_one() local
239 div = mclk_rate / (2 * spi->max_speed_hz); in sun6i_spi_transfer_one()
240 if (div <= (SUN6I_CLK_CTL_CDR2_MASK + 1)) { in sun6i_spi_transfer_one()
241 if (div > 0) in sun6i_spi_transfer_one()
242 div--; in sun6i_spi_transfer_one()
244 reg = SUN6I_CLK_CTL_CDR2(div) | SUN6I_CLK_CTL_DRS; in sun6i_spi_transfer_one()
246 div = ilog2(mclk_rate) - ilog2(spi->max_speed_hz); in sun6i_spi_transfer_one()
247 reg = SUN6I_CLK_CTL_CDR1(div); in sun6i_spi_transfer_one()
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| /linux-4.4.14/arch/s390/kernel/ |
| D | vtime.c | 66 u64 delta, fac, mult, div; in update_mt_scaling() local
72 mult = div = 0; in update_mt_scaling()
75 div += delta; in update_mt_scaling()
80 div *= fac; in update_mt_scaling()
81 if (div > 0) { in update_mt_scaling()
84 __this_cpu_write(mt_scaling_div, div); in update_mt_scaling()
133 u64 div = __this_cpu_read(mt_scaling_div); in do_account_vtime() local
135 user_scaled = (user_scaled * mult) / div; in do_account_vtime()
136 system_scaled = (system_scaled * mult) / div; in do_account_vtime()
199 u64 div = __this_cpu_read(mt_scaling_div); in vtime_account_irq_enter() local
[all …]
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| /linux-4.4.14/arch/powerpc/platforms/512x/ |
| D | clock-commonclk.c | 229 int mul, int div) in mpc512x_clk_factor() argument
235 mul, div); in mpc512x_clk_factor()
367 { .val = 2, .div = 2, },
368 { .val = 3, .div = 3, },
369 { .val = 4, .div = 4, },
370 { .val = 6, .div = 6, },
371 { .div = 0, },
376 { .val = 1, .div = 1, },
377 { .val = 2, .div = 2, },
378 { .val = 3, .div = 3, },
[all …]
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| /linux-4.4.14/sound/soc/codecs/ |
| D | adau17x1.c | 310 unsigned int val, div, dsp_div; in adau17x1_hw_params() local
324 div = 0; in adau17x1_hw_params()
328 div = 1; in adau17x1_hw_params()
332 div = 2; in adau17x1_hw_params()
336 div = 3; in adau17x1_hw_params()
340 div = 4; in adau17x1_hw_params()
344 div = 5; in adau17x1_hw_params()
348 div = 6; in adau17x1_hw_params()
356 ADAU17X1_CONVERTER0_CONVSR_MASK, div); in adau17x1_hw_params()
358 regmap_write(adau->regmap, ADAU17X1_SERIAL_SAMPLING_RATE, div); in adau17x1_hw_params()
[all …]
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| D | rl6231.c | 74 int div[] = {2, 3, 4, 6, 8, 12}; in rl6231_calc_dmic_clk() local
77 if (rate < 1000000 * div[0]) { in rl6231_calc_dmic_clk()
82 for (i = 0; i < ARRAY_SIZE(div); i++) { in rl6231_calc_dmic_clk()
83 if ((div[i] % 3) == 0) in rl6231_calc_dmic_clk()
86 if (3072000 * div[i] >= rate) in rl6231_calc_dmic_clk()
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| D | wm8900.c | 693 unsigned int div; in fll_factors() local
701 div = 1; in fll_factors()
703 div *= 2; in fll_factors()
710 if (div > 32) { in fll_factors()
713 div, Fref, Fout, target); in fll_factors()
717 fll_div->fllclk_div = div >> 2; in fll_factors()
825 int div_id, int div) in wm8900_set_dai_clkdiv() argument
832 WM8900_REG_CLOCKING1_BCLK_MASK, div); in wm8900_set_dai_clkdiv()
836 WM8900_REG_CLOCKING1_OPCLK_MASK, div); in wm8900_set_dai_clkdiv()
840 WM8900_LRC_MASK, div); in wm8900_set_dai_clkdiv()
[all …]
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| D | wm9081.c | 123 int div; /* *10 due to .5s */ member
471 unsigned int div; in fll_factors() local
475 div = 1; in fll_factors()
476 while ((Fref / div) > 13500000) { in fll_factors()
477 div *= 2; in fll_factors()
479 if (div > 8) { in fll_factors()
485 fll_div->fll_clk_ref_div = div / 2; in fll_factors()
490 Fref /= div; in fll_factors()
493 div = 0; in fll_factors()
496 div++; in fll_factors()
[all …]
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| /linux-4.4.14/drivers/gpu/drm/amd/amdgpu/ |
| D | amdgpu_afmt.c | 54 unsigned long div, mul; in amdgpu_afmt_calc_cts() local
61 div = gcd(n, cts); in amdgpu_afmt_calc_cts()
63 n /= div; in amdgpu_afmt_calc_cts()
64 cts /= div; in amdgpu_afmt_calc_cts()
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| /linux-4.4.14/arch/arm/mach-s3c24xx/ |
| D | iotiming-s3c2410.c | 108 unsigned int div = to_div(cyc, hclk_tns); in calc_0124() local
112 __func__, cyc, hclk_tns, shift, div); in calc_0124()
114 switch (div) { in calc_0124()
156 unsigned int div = to_div(cyc, hclk_tns); in calc_tacc() local
160 __func__, cyc, nwait_en, hclk_tns, div); in calc_tacc()
163 if (nwait_en && div < 4) in calc_tacc()
164 div = 4; in calc_tacc()
166 switch (div) { in calc_tacc()
175 val = div - 1; in calc_tacc()
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| /linux-4.4.14/arch/mips/ralink/ |
| D | mt7620.c | 246 mt7620_calc_rate(u32 ref_rate, u32 mul, u32 div) in mt7620_calc_rate() argument
252 do_div(t, div); in mt7620_calc_rate()
290 u32 div; in mt7620_get_cpu_pll_rate() local
305 div = (reg >> CPLL_CFG0_PLL_DIV_RATIO_SHIFT) & in mt7620_get_cpu_pll_rate()
308 WARN_ON(div >= ARRAY_SIZE(mt7620_clk_divider)); in mt7620_get_cpu_pll_rate()
310 return mt7620_calc_rate(xtal_rate, mul, mt7620_clk_divider[div]); in mt7620_get_cpu_pll_rate()
333 u32 div; in mt7620_get_cpu_rate() local
338 div = (reg >> CPU_SYS_CLKCFG_CPU_FDIV_SHIFT) & in mt7620_get_cpu_rate()
341 return mt7620_calc_rate(pll_rate, mul, div); in mt7620_get_cpu_rate()
366 u32 div; in mt7620_get_sys_rate() local
[all …]
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| /linux-4.4.14/drivers/staging/comedi/drivers/ |
| D | comedi_8254.c | 368 unsigned int div = d1 * d2; in comedi_8254_cascade_ns_to_timer() local
381 if (div * i8254->osc_base == *nanosec && in comedi_8254_cascade_ns_to_timer()
385 div > d1 && div > d2 && in comedi_8254_cascade_ns_to_timer()
386 div * i8254->osc_base > div && in comedi_8254_cascade_ns_to_timer()
387 div * i8254->osc_base > i8254->osc_base) in comedi_8254_cascade_ns_to_timer()
390 div = *nanosec / i8254->osc_base; in comedi_8254_cascade_ns_to_timer()
392 start = div / d2; in comedi_8254_cascade_ns_to_timer()
395 for (d1 = start; d1 <= div / d1 + 1 && d1 <= I8254_MAX_COUNT; d1++) { in comedi_8254_cascade_ns_to_timer()
396 for (d2 = div / d1; in comedi_8254_cascade_ns_to_timer()
397 d1 * d2 <= div + d1 + 1 && d2 <= I8254_MAX_COUNT; d2++) { in comedi_8254_cascade_ns_to_timer()
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| /linux-4.4.14/drivers/iio/adc/ |
| D | xilinx-xadc-core.c | 332 unsigned int div; in xadc_zynq_setup() local
347 div = 2; in xadc_zynq_setup()
349 div = pcap_rate / tck_rate; in xadc_zynq_setup()
350 if (pcap_rate / div > XADC_ZYNQ_TCK_RATE_MAX) in xadc_zynq_setup()
351 div++; in xadc_zynq_setup()
354 if (div <= 3) in xadc_zynq_setup()
356 else if (div <= 7) in xadc_zynq_setup()
358 else if (div <= 15) in xadc_zynq_setup()
376 unsigned int div; in xadc_zynq_get_dclk_rate() local
383 div = 4; in xadc_zynq_get_dclk_rate()
[all …]
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| /linux-4.4.14/drivers/media/pci/bt8xx/ |
| D | dvb-bt8xx.c | 157 u32 div; in thomson_dtt7579_tuner_calc_regs() local
164 div = (((c->frequency + 83333) * 3) / 500000) + IF_FREQUENCYx6; in thomson_dtt7579_tuner_calc_regs()
181 pllbuf[1] = div >> 8; in thomson_dtt7579_tuner_calc_regs()
182 pllbuf[2] = div & 0xff; in thomson_dtt7579_tuner_calc_regs()
279 u32 div; in microtune_mt7202dtf_tuner_set_params() local
282 div = (36000000 + c->frequency + 83333) / 166666; in microtune_mt7202dtf_tuner_set_params()
303 data[0] = (div >> 8) & 0x7f; in microtune_mt7202dtf_tuner_set_params()
304 data[1] = div & 0xff; in microtune_mt7202dtf_tuner_set_params()
305 data[2] = ((div >> 10) & 0x60) | cfg; in microtune_mt7202dtf_tuner_set_params()
311 return (div * 166666 - 36000000); in microtune_mt7202dtf_tuner_set_params()
[all …]
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| /linux-4.4.14/arch/arc/plat-axs10x/ |
| D | axs10x.c | 361 union pll_reg div; in encode_div() local
363 div.val = 0; in encode_div()
365 div.noupd = !upd; in encode_div()
366 div.bypass = id == 1 ? 1 : 0; in encode_div()
367 div.edge = (id%2 == 0) ? 0 : 1; /* 0 = rising */ in encode_div()
368 div.low = (id%2 == 0) ? id >> 1 : (id >> 1)+1; in encode_div()
369 div.high = id >> 1; in encode_div()
371 return div.val; in encode_div()
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| /linux-4.4.14/arch/x86/realmode/rm/ |
| D | wakemain.c | 17 u16 div = 1193181/hz; in beep() local
21 outb(div, 0x42); /* LSB of counter */ in beep()
23 outb(div >> 8, 0x42); /* MSB of counter */ in beep()
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| /linux-4.4.14/drivers/media/pci/mantis/ |
| D | mantis_vp1033.c | 93 u32 div; in lgtdqcs001f_tuner_set() local
98 div = p->frequency / 250; in lgtdqcs001f_tuner_set()
100 buf[0] = (div >> 8) & 0x7f; in lgtdqcs001f_tuner_set()
101 buf[1] = div & 0xff; in lgtdqcs001f_tuner_set()
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| /linux-4.4.14/arch/m68k/coldfire/ |
| D | m53xx.c | 539 int clock_limp(int div) in clock_limp() argument
544 if (div < MIN_LPD) in clock_limp()
545 div = MIN_LPD; in clock_limp()
546 if (div > MAX_LPD) in clock_limp()
547 div = MAX_LPD; in clock_limp()
554 writew(MCF_CCM_CDR_LPDIV(div) | MCF_CCM_CDR_SSIDIV(temp), MCF_CCM_CDR); in clock_limp()
558 return (FREF/(3*(1 << div))); in clock_limp()
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| /linux-4.4.14/drivers/tty/serial/ |
| D | max310x.c | 489 unsigned int mode = 0, clk = port->uartclk, div = clk / baud; in max310x_set_baud() local
492 if (div < 16) in max310x_set_baud()
493 div = 16; in max310x_set_baud()
495 if (clk % baud && (div / 16) < 0x8000) { in max310x_set_baud()
499 div = clk / baud; in max310x_set_baud()
501 if (clk % baud && (div / 16) < 0x8000) { in max310x_set_baud()
505 div = clk / baud; in max310x_set_baud()
509 max310x_port_write(port, MAX310X_BRGDIVMSB_REG, (div / 16) >> 8); in max310x_set_baud()
510 max310x_port_write(port, MAX310X_BRGDIVLSB_REG, div / 16); in max310x_set_baud()
511 max310x_port_write(port, MAX310X_BRGCFG_REG, (div % 16) | mode); in max310x_set_baud()
[all …]
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| /linux-4.4.14/drivers/sh/clk/ |
| D | core.c | 45 unsigned long mult, div; in clk_rate_table_build() local
52 div = 1; in clk_rate_table_build()
56 div = src_table->divisors[i]; in clk_rate_table_build()
61 if (!div || !mult || (bitmap && !test_bit(i, bitmap))) in clk_rate_table_build()
64 freq = clk->parent->rate * mult / div; in clk_rate_table_build()
563 unsigned long error = ULONG_MAX, freq_high, freq_low, div; in clk_round_parent() local
613 div = freq->frequency / target; in clk_round_parent()
614 freq_high = freq->frequency / div; in clk_round_parent()
615 freq_low = freq->frequency / (div + 1); in clk_round_parent()
632 freq->frequency, div, freq_high, div + 1, freq_low, in clk_round_parent()
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| /linux-4.4.14/drivers/gpu/drm/imx/ |
| D | imx-tve.c | 320 int div = 1; in imx_tve_encoder_mode_set() local
332 div = 2; in imx_tve_encoder_mode_set()
333 clk_set_rate(tve->di_clk, rounded_rate / div); in imx_tve_encoder_mode_set()
429 unsigned long div; in clk_tve_di_round_rate() local
431 div = *prate / rate; in clk_tve_di_round_rate()
432 if (div >= 4) in clk_tve_di_round_rate()
434 else if (div >= 2) in clk_tve_di_round_rate()
443 unsigned long div; in clk_tve_di_set_rate() local
447 div = parent_rate / rate; in clk_tve_di_set_rate()
448 if (div >= 4) in clk_tve_di_set_rate()
[all …]
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| /linux-4.4.14/include/linux/mfd/ |
| D | ucb1x00.h | 234 static inline void ucb1x00_set_audio_divisor(struct ucb1x00 *ucb, unsigned int div) in ucb1x00_set_audio_divisor() argument
236 mcp_set_audio_divisor(ucb->mcp, div); in ucb1x00_set_audio_divisor()
244 static inline void ucb1x00_set_telecom_divisor(struct ucb1x00 *ucb, unsigned int div) in ucb1x00_set_telecom_divisor() argument
246 mcp_set_telecom_divisor(ucb->mcp, div); in ucb1x00_set_telecom_divisor()
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| /linux-4.4.14/sound/soc/pxa/ |
| D | pxa-ssp.c | 182 static void pxa_ssp_set_scr(struct ssp_device *ssp, u32 div) in pxa_ssp_set_scr() argument
188 sscr0 |= ((div - 2)/2) << 8; /* 2..512 */ in pxa_ssp_set_scr()
191 sscr0 |= (div - 1) << 8; /* 1..4096 */ in pxa_ssp_set_scr()
202 u32 div; in pxa_ssp_get_scr() local
205 div = ((sscr0 >> 8) & 0xff) * 2 + 2; in pxa_ssp_get_scr()
207 div = ((sscr0 >> 8) & 0xfff) + 1; in pxa_ssp_get_scr()
208 return div; in pxa_ssp_get_scr()
272 int div_id, int div) in pxa_ssp_set_dai_clkdiv() argument
280 val = (pxa_ssp_read_reg(ssp, SSACD) & ~0x7) | SSACD_ACDS(div); in pxa_ssp_set_dai_clkdiv()
288 switch (div) { in pxa_ssp_set_dai_clkdiv()
[all …]
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| /linux-4.4.14/drivers/i2c/busses/ |
| D | i2c-mpc.c | 206 const struct mpc_i2c_divider *div = NULL; in mpc_i2c_get_fdr_52xx() local
225 div = &mpc_i2c_dividers_52xx[i]; in mpc_i2c_get_fdr_52xx()
227 if (div->fdr & 0xc0 && pvr == 0x80822011) in mpc_i2c_get_fdr_52xx()
229 if (div->divider >= divider) in mpc_i2c_get_fdr_52xx()
233 *real_clk = mpc5xxx_get_bus_frequency(node) / div->divider; in mpc_i2c_get_fdr_52xx()
234 return (int)div->fdr; in mpc_i2c_get_fdr_52xx()
381 const struct mpc_i2c_divider *div = NULL; in mpc_i2c_get_fdr_8xxx() local
407 div = &mpc_i2c_dividers_8xxx[i]; in mpc_i2c_get_fdr_8xxx()
408 if (div->divider >= divider) in mpc_i2c_get_fdr_8xxx()
412 *real_clk = fsl_get_sys_freq() / prescaler / div->divider; in mpc_i2c_get_fdr_8xxx()
[all …]
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| /linux-4.4.14/drivers/gpu/drm/radeon/ |
| D | radeon_audio.c | 556 unsigned long div, mul; in radeon_audio_calc_cts() local
563 div = gcd(n, cts); in radeon_audio_calc_cts()
565 n /= div; in radeon_audio_calc_cts()
566 cts /= div; in radeon_audio_calc_cts()
779 unsigned int radeon_audio_decode_dfs_div(unsigned int div) in radeon_audio_decode_dfs_div() argument
781 if (div >= 8 && div < 64) in radeon_audio_decode_dfs_div()
782 return (div - 8) * 25 + 200; in radeon_audio_decode_dfs_div()
783 else if (div >= 64 && div < 96) in radeon_audio_decode_dfs_div()
784 return (div - 64) * 50 + 1600; in radeon_audio_decode_dfs_div()
785 else if (div >= 96 && div < 128) in radeon_audio_decode_dfs_div()
[all …]
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| /linux-4.4.14/drivers/staging/rts5208/ |
| D | rtsx_card.c | 640 u8 mcu_cnt, div, max_div, ssc_depth, ssc_depth_mask; in switch_ssc_clock() local
662 div = CLK_DIV_1; in switch_ssc_clock()
663 while ((N < min_N) && (div < max_div)) { in switch_ssc_clock()
665 div++; in switch_ssc_clock()
667 dev_dbg(rtsx_dev(chip), "N = %d, div = %d\n", N, div); in switch_ssc_clock()
682 rtsx_add_cmd(chip, WRITE_REG_CMD, CLK_DIV, 0xFF, (div << 4) | mcu_cnt); in switch_ssc_clock()
715 u8 sel, div, mcu_cnt; in switch_normal_clock() local
725 div = CLK_DIV_4; in switch_normal_clock()
732 div = CLK_DIV_4; in switch_normal_clock()
739 div = CLK_DIV_2; in switch_normal_clock()
[all …]
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| /linux-4.4.14/drivers/clk/sirf/ |
| D | clk-atlas7.c | 294 { .val = 0, .div = 1 },
295 { .val = 1, .div = 2 },
296 { .val = 2, .div = 4 },
297 { .val = 3, .div = 8 },
298 { .val = 4, .div = 16 },
299 { .val = 5, .div = 32 },
1439 struct atlas7_div_init_data *div; in atlas7_clk_init() local
1644 div = ÷r_list[i]; in atlas7_clk_init()
1645 clk = clk_register_divider(NULL, div->div_name, in atlas7_clk_init()
1646 div->parent_name, div->divider_flags, sirfsoc_clk_vbase + div->div_offset, in atlas7_clk_init()
[all …]
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| /linux-4.4.14/Documentation/devicetree/bindings/clock/ti/ |
| D | fixed-factor-clock.txt | 14 - ti,clock-div: fixed divider.
30 ti,clock-div = <2>;
38 ti,clock-div = <1>;
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| /linux-4.4.14/drivers/memory/ |
| D | omap-gpmc.c | 304 int div; in gpmc_get_clk_period() local
310 div = (l & 0x03) + 1; in gpmc_get_clk_period()
312 tick_ps *= div; in gpmc_get_clk_period()
654 int div = gpmc_ns_to_ticks(wait_monitoring); in gpmc_calc_waitmonitoring_divider() local
656 div += GPMC_CONFIG1_WAITMONITORINGTIME_MAX - 1; in gpmc_calc_waitmonitoring_divider()
657 div /= GPMC_CONFIG1_WAITMONITORINGTIME_MAX; in gpmc_calc_waitmonitoring_divider()
659 if (div > 4) in gpmc_calc_waitmonitoring_divider()
661 if (div <= 0) in gpmc_calc_waitmonitoring_divider()
662 div = 1; in gpmc_calc_waitmonitoring_divider()
664 return div; in gpmc_calc_waitmonitoring_divider()
[all …]
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| /linux-4.4.14/arch/nios2/ |
| D | Makefile | 28 KBUILD_CFLAGS += $(if $(CONFIG_NIOS2_HW_DIV_SUPPORT),-mhw-div,-mno-hw-div)
|
| /linux-4.4.14/drivers/clk/zte/ |
| D | clk-zx296702.c | 65 { .val = 1, .div = 2, },
66 { .val = 3, .div = 4, },
71 { .val = 0, .div = 1, },
72 { .val = 1, .div = 2, },
73 { .val = 3, .div = 4, },
78 { .val = 0, .div = 1, },
79 { .val = 1, .div = 2, },
80 { .val = 3, .div = 4, },
81 { .val = 5, .div = 6, },
82 { .val = 7, .div = 8, },
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| /linux-4.4.14/drivers/media/platform/s3c-camif/ |
| D | camif-regs.c | 235 unsigned int div, rem; in camif_get_dma_burst() local
240 for (div = 16; div >= 2; div /= 2) { in camif_get_dma_burst()
241 if (nwords < div) in camif_get_dma_burst()
244 rem = nwords & (div - 1); in camif_get_dma_burst()
246 *mburst = div; in camif_get_dma_burst()
247 *rburst = div; in camif_get_dma_burst()
250 if (rem == div / 2 || rem == div / 4) { in camif_get_dma_burst()
251 *mburst = div; in camif_get_dma_burst()
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| /linux-4.4.14/arch/arm/mach-omap1/ |
| D | clock.c | 52 u32 div = omap_readl(MOD_CONF_CTRL_1); in omap1_sossi_recalc() local
54 div = (div >> 17) & 0x7; in omap1_sossi_recalc()
55 div++; in omap1_sossi_recalc()
57 return clk->parent->rate / div; in omap1_sossi_recalc()
369 int div; in omap1_set_sossi_rate() local
374 div = (p_rate + rate - 1) / rate; in omap1_set_sossi_rate()
375 div--; in omap1_set_sossi_rate()
376 if (div < 0 || div > 7) in omap1_set_sossi_rate()
381 l |= div << 17; in omap1_set_sossi_rate()
384 clk->rate = p_rate / (div + 1); in omap1_set_sossi_rate()
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| /linux-4.4.14/Documentation/devicetree/bindings/clock/ |
| D | renesas,h8300-div-clock.txt | 5 - compatible: Must be "renesas,sh73a0-h8300-div-clock"
19 compatible = "renesas,h8300-div-clock";
|
| D | fixed-factor-clock.txt | 10 - clock-div: fixed divider.
22 clock-div = <2>;
|
| /linux-4.4.14/arch/arm/mach-omap2/ |
| D | clkt2xxx_dpllcore.c | 115 u32 cur_rate, low, mult, div, valid_rate, done_rate; in omap2_reprogram_dpllcore() local
144 div = ((curr_prcm_set->xtal_speed / 1000000) - 1); in omap2_reprogram_dpllcore()
156 tmpset.cm_clksel1_pll |= (div << __ffs(dd->mult_mask)); in omap2_reprogram_dpllcore()
|
| /linux-4.4.14/arch/arm/mach-shmobile/ |
| D | timer.c | 22 unsigned int mult, unsigned int div) in shmobile_setup_delay_hz() argument
32 unsigned int value = HZ * div / mult; in shmobile_setup_delay_hz()
|
| /linux-4.4.14/drivers/media/usb/ttusb-budget/ |
| D | dvb-ttusb-budget.c | 1028 u32 div; in alps_tdmb7_tuner_set_params() local
1030 div = (p->frequency + 36166667) / 166667; in alps_tdmb7_tuner_set_params()
1032 data[0] = (div >> 8) & 0x7f; in alps_tdmb7_tuner_set_params()
1033 data[1] = div & 0xff; in alps_tdmb7_tuner_set_params()
1034 data[2] = ((div >> 10) & 0x60) | 0x85; in alps_tdmb7_tuner_set_params()
1289 u32 div; in philips_tsa5059_tuner_set_params() local
1295 div = (p->frequency + (125 - 1)) / 125; /* round correctly */ in philips_tsa5059_tuner_set_params()
1296 buf[0] = (div >> 8) & 0x7f; in philips_tsa5059_tuner_set_params()
1297 buf[1] = div & 0xff; in philips_tsa5059_tuner_set_params()
1298 buf[2] = 0x80 | ((div & 0x18000) >> 10) | 4; in philips_tsa5059_tuner_set_params()
[all …]
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| /linux-4.4.14/Documentation/devicetree/bindings/i2c/ |
| D | nvidia,tegra20-i2c.txt | 29 - Tegra30/Tegra20 I2C controller has 2 clock source called div-clk and
30 fast-clk. Tegra114 has only one clock source called as div-clk and
46 - div-clk
49 - div-clk
69 clock-names = "div-clk", "fast-clk";
|