63 	u32 div;  in ar71xx_clocks_init()  local
69 	div = ((pll >> AR71XX_PLL_FB_SHIFT) & AR71XX_PLL_FB_MASK) + 1;  in ar71xx_clocks_init()
70 	freq = div * ref_rate;  in ar71xx_clocks_init()
72 	div = ((pll >> AR71XX_CPU_DIV_SHIFT) & AR71XX_CPU_DIV_MASK) + 1;  in ar71xx_clocks_init()
73 	cpu_rate = freq / div;  in ar71xx_clocks_init()
75 	div = ((pll >> AR71XX_DDR_DIV_SHIFT) & AR71XX_DDR_DIV_MASK) + 1;  in ar71xx_clocks_init()
76 	ddr_rate = freq / div;  in ar71xx_clocks_init()
78 	div = (((pll >> AR71XX_AHB_DIV_SHIFT) & AR71XX_AHB_DIV_MASK) + 1) * 2;  in ar71xx_clocks_init()
79 	ahb_rate = cpu_rate / div;  in ar71xx_clocks_init()
98 	u32 div;  in ar724x_clocks_init()  local
103 	div = ((pll >> AR724X_PLL_FB_SHIFT) & AR724X_PLL_FB_MASK);  in ar724x_clocks_init()
104 	freq = div * ref_rate;  in ar724x_clocks_init()
106 	div = ((pll >> AR724X_PLL_REF_DIV_SHIFT) & AR724X_PLL_REF_DIV_MASK);  in ar724x_clocks_init()
107 	freq *= div;  in ar724x_clocks_init()
111 	div = ((pll >> AR724X_DDR_DIV_SHIFT) & AR724X_DDR_DIV_MASK) + 1;  in ar724x_clocks_init()
112 	ddr_rate = freq / div;  in ar724x_clocks_init()
114 	div = (((pll >> AR724X_AHB_DIV_SHIFT) & AR724X_AHB_DIV_MASK) + 1) * 2;  in ar724x_clocks_init()
115 	ahb_rate = cpu_rate / div;  in ar724x_clocks_init()
134 	u32 div;  in ar913x_clocks_init()  local
139 	div = ((pll >> AR913X_PLL_FB_SHIFT) & AR913X_PLL_FB_MASK);  in ar913x_clocks_init()
140 	freq = div * ref_rate;  in ar913x_clocks_init()
144 	div = ((pll >> AR913X_DDR_DIV_SHIFT) & AR913X_DDR_DIV_MASK) + 1;  in ar913x_clocks_init()
145 	ddr_rate = freq / div;  in ar913x_clocks_init()
147 	div = (((pll >> AR913X_AHB_DIV_SHIFT) & AR913X_AHB_DIV_MASK) + 1) * 2;  in ar913x_clocks_init()
148 	ahb_rate = cpu_rate / div;  in ar913x_clocks_init()