229 	int mul, int div)  in mpc512x_clk_factor()  argument
235 					 mul, div);  in mpc512x_clk_factor()
367 	{ .val = 2, .div = 2, },
368 	{ .val = 3, .div = 3, },
369 	{ .val = 4, .div = 4, },
370 	{ .val = 6, .div = 6, },
371 	{ .div = 0, },
376 	{ .val = 1, .div = 1, },
377 	{ .val = 2, .div = 2, },
378 	{ .val = 3, .div = 3, },
379 	{ .val = 4, .div = 4, },
380 	{ .div = 0, },
600 	int div;  in mpc512x_clk_setup_mclk()  local
651 	div = clk_get_rate(clks[MPC512x_CLK_SYS]);  in mpc512x_clk_setup_mclk()
652 	div /= clk_get_rate(clks[MPC512x_CLK_IPS]);  in mpc512x_clk_setup_mclk()
654 	out_be32(mccr_reg, (0 << 16) | ((div - 1) << 17));  in mpc512x_clk_setup_mclk()
655 	out_be32(mccr_reg, (1 << 16) | ((div - 1) << 17));  in mpc512x_clk_setup_mclk()
708 	int mul, div;  in mpc512x_clk_setup_clock_tree()  local
780 	div = 2;	/* compensate for the fractional factor */  in mpc512x_clk_setup_clock_tree()
781 	clks[MPC512x_CLK_E300] = mpc512x_clk_factor("e300", "csb", mul, div);  in mpc512x_clk_setup_clock_tree()