Searched refs:upper_32_bits (Results 1 - 151 of 151) sorted by relevance

/linux-4.1.27/drivers/gpu/drm/radeon/
H A Dsi_dma.c83 ib->ptr[ib->length_dw++] = upper_32_bits(pe) & 0xff; si_dma_vm_copy_pages()
84 ib->ptr[ib->length_dw++] = upper_32_bits(src) & 0xff; si_dma_vm_copy_pages()
122 ib->ptr[ib->length_dw++] = upper_32_bits(pe) & 0xff; si_dma_vm_write_pages()
134 ib->ptr[ib->length_dw++] = upper_32_bits(value); si_dma_vm_write_pages()
174 ib->ptr[ib->length_dw++] = upper_32_bits(pe) & 0xff; si_dma_vm_set_pages()
178 ib->ptr[ib->length_dw++] = upper_32_bits(value); si_dma_vm_set_pages()
266 radeon_ring_write(ring, upper_32_bits(dst_offset) & 0xff); si_copy_dma()
267 radeon_ring_write(ring, upper_32_bits(src_offset) & 0xff); si_copy_dma()
H A Devergreen_dma.c49 radeon_ring_write(ring, (upper_32_bits(addr) & 0xff)); evergreen_dma_fence_ring_emit()
79 radeon_ring_write(ring, upper_32_bits(ring->next_rptr_gpu_addr) & 0xff); evergreen_dma_ring_ib_execute()
90 radeon_ring_write(ring, (ib->length_dw << 12) | (upper_32_bits(ib->gpu_addr) & 0xFF)); evergreen_dma_ring_ib_execute()
143 radeon_ring_write(ring, upper_32_bits(dst_offset) & 0xff); evergreen_copy_dma()
144 radeon_ring_write(ring, upper_32_bits(src_offset) & 0xff); evergreen_copy_dma()
H A Dni_dma.c135 radeon_ring_write(ring, upper_32_bits(ring->next_rptr_gpu_addr) & 0xff); cayman_dma_ring_ib_execute()
146 radeon_ring_write(ring, (ib->length_dw << 12) | (upper_32_bits(ib->gpu_addr) & 0xFF)); cayman_dma_ring_ib_execute()
223 upper_32_bits(rdev->wb.gpu_addr + wb_offset) & 0xFF); cayman_dma_resume()
331 ib->ptr[ib->length_dw++] = upper_32_bits(pe) & 0xff; cayman_dma_vm_copy_pages()
332 ib->ptr[ib->length_dw++] = upper_32_bits(src) & 0xff; cayman_dma_vm_copy_pages()
371 ib->ptr[ib->length_dw++] = upper_32_bits(pe) & 0xff; cayman_dma_vm_write_pages()
383 ib->ptr[ib->length_dw++] = upper_32_bits(value); cayman_dma_vm_write_pages()
423 ib->ptr[ib->length_dw++] = upper_32_bits(pe) & 0xff; cayman_dma_vm_set_pages()
427 ib->ptr[ib->length_dw++] = upper_32_bits(value); cayman_dma_vm_set_pages()
H A Dr600_dma.c144 upper_32_bits(rdev->wb.gpu_addr + R600_WB_DMA_RPTR_OFFSET) & 0xFF); r600_dma_resume()
256 radeon_ring_write(ring, upper_32_bits(gpu_addr) & 0xff); r600_dma_ring_test()
296 radeon_ring_write(ring, (upper_32_bits(addr) & 0xff)); r600_dma_fence_ring_emit()
323 radeon_ring_write(ring, upper_32_bits(addr) & 0xff); r600_dma_semaphore_ring_emit()
361 ib.ptr[2] = upper_32_bits(gpu_addr) & 0xff; r600_dma_ib_test()
411 radeon_ring_write(ring, upper_32_bits(ring->next_rptr_gpu_addr) & 0xff); r600_dma_ring_ib_execute()
422 radeon_ring_write(ring, (ib->length_dw << 16) | (upper_32_bits(ib->gpu_addr) & 0xFF)); r600_dma_ring_ib_execute()
474 radeon_ring_write(ring, (((upper_32_bits(dst_offset) & 0xff) << 16) | r600_copy_dma()
475 (upper_32_bits(src_offset) & 0xff))); r600_copy_dma()
H A Drv770_dma.c77 radeon_ring_write(ring, upper_32_bits(dst_offset) & 0xff); rv770_copy_dma()
78 radeon_ring_write(ring, upper_32_bits(src_offset) & 0xff); rv770_copy_dma()
H A Dcik_sdma.c146 radeon_ring_write(ring, upper_32_bits(ring->next_rptr_gpu_addr)); cik_sdma_ring_ib_execute()
156 radeon_ring_write(ring, upper_32_bits(ib->gpu_addr)); cik_sdma_ring_ib_execute()
209 radeon_ring_write(ring, upper_32_bits(addr)); cik_sdma_fence_ring_emit()
238 radeon_ring_write(ring, upper_32_bits(addr)); cik_sdma_semaphore_ring_emit()
401 upper_32_bits(rdev->wb.gpu_addr + wb_offset) & 0xFFFFFFFF); cik_sdma_gfx_resume()
615 radeon_ring_write(ring, upper_32_bits(src_offset)); cik_copy_dma()
617 radeon_ring_write(ring, upper_32_bits(dst_offset)); cik_copy_dma()
671 radeon_ring_write(ring, upper_32_bits(gpu_addr)); cik_sdma_ring_test()
729 ib.ptr[2] = upper_32_bits(gpu_addr); cik_sdma_ib_test()
813 ib->ptr[ib->length_dw++] = upper_32_bits(src); cik_sdma_vm_copy_pages()
815 ib->ptr[ib->length_dw++] = upper_32_bits(pe); cik_sdma_vm_copy_pages()
854 ib->ptr[ib->length_dw++] = upper_32_bits(pe); cik_sdma_vm_write_pages()
867 ib->ptr[ib->length_dw++] = upper_32_bits(value); cik_sdma_vm_write_pages()
907 ib->ptr[ib->length_dw++] = upper_32_bits(pe); cik_sdma_vm_set_pages()
911 ib->ptr[ib->length_dw++] = upper_32_bits(value); cik_sdma_vm_set_pages()
H A Devergreen_cs.c1845 ib[idx + 1] = (tmp & 0xffffff00) | (upper_32_bits(offset) & 0xff); evergreen_packet3_check()
1891 ib[idx+1] = upper_32_bits(offset) & 0xff; evergreen_packet3_check()
1926 ib[idx+1] = upper_32_bits(offset) & 0xff; evergreen_packet3_check()
1954 ib[idx+2] = upper_32_bits(offset) & 0xff; evergreen_packet3_check()
2047 ib[idx+2] = upper_32_bits(reloc->gpu_offset) & 0xff; evergreen_packet3_check()
2127 ib[idx+2] = upper_32_bits(offset) & 0xff; evergreen_packet3_check()
2188 ib[idx+1] = (ib[idx+1] & 0xffffff00) | (upper_32_bits(offset) & 0xff); evergreen_packet3_check()
2226 ib[idx+3] = upper_32_bits(offset) & 0xff; evergreen_packet3_check()
2268 ib[idx+2] = upper_32_bits(offset) & 0xff; evergreen_packet3_check()
2290 ib[idx+2] = (ib[idx+2] & 0xffffff00) | (upper_32_bits(offset) & 0xff); evergreen_packet3_check()
2312 ib[idx+2] = (ib[idx+2] & 0xffffff00) | (upper_32_bits(offset) & 0xff); evergreen_packet3_check()
2440 (upper_32_bits(offset64) & 0xff); evergreen_packet3_check()
2520 ib[idx+2] = upper_32_bits(offset) & 0xff; evergreen_packet3_check()
2539 ib[idx+4] = upper_32_bits(offset) & 0xff; evergreen_packet3_check()
2568 ib[idx+1] = upper_32_bits(offset) & 0xff; evergreen_packet3_check()
2593 ib[idx+2] = upper_32_bits(offset) & 0xff; evergreen_packet3_check()
2617 ib[idx+4] = upper_32_bits(offset) & 0xff; evergreen_packet3_check()
2799 ib[idx+2] += upper_32_bits(dst_reloc->gpu_offset) & 0xff; evergreen_dma_cs_parse()
2843 ib[idx+3] += upper_32_bits(dst_reloc->gpu_offset) & 0xff; evergreen_dma_cs_parse()
2844 ib[idx+4] += upper_32_bits(src_reloc->gpu_offset) & 0xff; evergreen_dma_cs_parse()
2859 ib[idx+8] += upper_32_bits(dst_reloc->gpu_offset) & 0xff; evergreen_dma_cs_parse()
2865 ib[idx+8] += upper_32_bits(src_reloc->gpu_offset) & 0xff; evergreen_dma_cs_parse()
2902 ib[idx+3] += upper_32_bits(dst_reloc->gpu_offset) & 0xff; evergreen_dma_cs_parse()
2903 ib[idx+4] += upper_32_bits(src_reloc->gpu_offset) & 0xff; evergreen_dma_cs_parse()
2914 ib[idx+2] += upper_32_bits(src_reloc->gpu_offset) & 0xff; evergreen_dma_cs_parse()
2916 ib[idx+5] += upper_32_bits(dst_reloc->gpu_offset) & 0xff; evergreen_dma_cs_parse()
2952 ib[idx+4] += upper_32_bits(dst_reloc->gpu_offset) & 0xff; evergreen_dma_cs_parse()
2953 ib[idx+5] += upper_32_bits(dst2_reloc->gpu_offset) & 0xff; evergreen_dma_cs_parse()
2954 ib[idx+6] += upper_32_bits(src_reloc->gpu_offset) & 0xff; evergreen_dma_cs_parse()
2992 ib[idx+9] += upper_32_bits(src_reloc->gpu_offset) & 0xff; evergreen_dma_cs_parse()
3008 ib[idx+8] += upper_32_bits(dst_reloc->gpu_offset) & 0xff; evergreen_dma_cs_parse()
3012 ib[idx+8] += upper_32_bits(src_reloc->gpu_offset) & 0xff; evergreen_dma_cs_parse()
3054 ib[idx+9] += upper_32_bits(src_reloc->gpu_offset) & 0xff; evergreen_dma_cs_parse()
3070 ib[idx+8] += upper_32_bits(dst_reloc->gpu_offset) & 0xff; evergreen_dma_cs_parse()
3076 ib[idx+8] += upper_32_bits(src_reloc->gpu_offset) & 0xff; evergreen_dma_cs_parse()
3141 ib[idx+9] += upper_32_bits(src_reloc->gpu_offset) & 0xff; evergreen_dma_cs_parse()
3163 ib[idx+3] += (upper_32_bits(dst_reloc->gpu_offset) << 16) & 0x00ff0000; evergreen_dma_cs_parse()
H A Dvce_v1_0.c104 WREG32(VCE_RB_BASE_HI, upper_32_bits(ring->gpu_addr)); vce_v1_0_start()
111 WREG32(VCE_RB_BASE_HI2, upper_32_bits(ring->gpu_addr)); vce_v1_0_start()
H A Dradeon_cursor.c238 upper_32_bits(radeon_crtc->cursor_addr)); radeon_set_cursor()
245 upper_32_bits(radeon_crtc->cursor_addr)); radeon_set_cursor()
248 upper_32_bits(radeon_crtc->cursor_addr)); radeon_set_cursor()
H A Dr600_cs.c1678 ib[idx + 1] = (tmp & 0xffffff00) | (upper_32_bits(offset) & 0xff); r600_packet3_check()
1719 ib[idx+1] = upper_32_bits(offset) & 0xff; r600_packet3_check()
1771 ib[idx+2] = upper_32_bits(offset) & 0xff; r600_packet3_check()
1815 ib[idx+1] = (ib[idx+1] & 0xffffff00) | (upper_32_bits(offset) & 0xff); r600_packet3_check()
1845 ib[idx+3] = upper_32_bits(offset) & 0xff; r600_packet3_check()
1883 ib[idx+2] = upper_32_bits(offset) & 0xff; r600_packet3_check()
1905 ib[idx+2] = (ib[idx+2] & 0xffffff00) | (upper_32_bits(offset) & 0xff); r600_packet3_check()
2012 (upper_32_bits(offset64) & 0xff); r600_packet3_check()
2154 ib[idx+2] = upper_32_bits(offset) & 0xff; r600_packet3_check()
2173 ib[idx+4] = upper_32_bits(offset) & 0xff; r600_packet3_check()
2202 ib[idx+1] = upper_32_bits(offset) & 0xff; r600_packet3_check()
2227 ib[idx+2] = upper_32_bits(offset) & 0xff; r600_packet3_check()
2251 ib[idx+4] = upper_32_bits(offset) & 0xff; r600_packet3_check()
2513 ib[idx+2] += upper_32_bits(dst_reloc->gpu_offset) & 0xff; r600_dma_cs_parse()
2545 ib[idx+6] += upper_32_bits(dst_reloc->gpu_offset) & 0xff; r600_dma_cs_parse()
2551 ib[idx+6] += upper_32_bits(src_reloc->gpu_offset) & 0xff; r600_dma_cs_parse()
2567 ib[idx+3] += upper_32_bits(dst_reloc->gpu_offset) & 0xff; r600_dma_cs_parse()
2568 ib[idx+4] += upper_32_bits(src_reloc->gpu_offset) & 0xff; r600_dma_cs_parse()
2578 ib[idx+3] += upper_32_bits(src_reloc->gpu_offset) & 0xff; r600_dma_cs_parse()
2579 ib[idx+3] += (upper_32_bits(dst_reloc->gpu_offset) & 0xff) << 16; r600_dma_cs_parse()
2612 ib[idx+3] += (upper_32_bits(dst_reloc->gpu_offset) << 16) & 0x00ff0000; r600_dma_cs_parse()
H A Dradeon_vce.c365 ib.ptr[ib.length_dw++] = upper_32_bits(dummy); radeon_vce_get_create_msg()
419 ib.ptr[ib.length_dw++] = upper_32_bits(dummy); radeon_vce_get_destroy_msg()
706 radeon_ring_write(ring, upper_32_bits(ib->gpu_addr)); radeon_vce_ib_execute()
725 radeon_ring_write(ring, upper_32_bits(addr)); radeon_vce_fence_emit()
H A Duvd_v2_2.c50 radeon_ring_write(ring, upper_32_bits(addr) & 0xff); uvd_v2_2_fence_emit()
H A Drv515.c388 upper_32_bits(rdev->mc.vram_start)); rv515_mc_resume()
390 upper_32_bits(rdev->mc.vram_start)); rv515_mc_resume()
393 upper_32_bits(rdev->mc.vram_start)); rv515_mc_resume()
395 upper_32_bits(rdev->mc.vram_start)); rv515_mc_resume()
492 S_000004_AGP_BASE_ADDR_2(upper_32_bits(rdev->mc.agp_base))); rv515_mc_program()
H A Dradeon_kfd.c402 upper_32_bits(hpd_gpu_addr >> 8)); kgd_init_pipeline()
559 high = upper_32_bits(queue_address >> 8); kgd_hqd_is_occupied()
H A Drs400.c162 tmp |= (upper_32_bits(rdev->gart.table_addr) & 0xff) << 4; rs400_gart_enable()
220 ((upper_32_bits(addr) & 0xff) << 4); rs400_gart_get_page_entry()
H A Dr520.c158 S_000007_AGP_BASE_ADDR_2(upper_32_bits(rdev->mc.agp_base))); r520_mc_program()
H A Datombios_crtc.c1376 upper_32_bits(fb_location)); dce4_crtc_do_set_base()
1378 upper_32_bits(fb_location)); dce4_crtc_do_set_base()
1583 WREG32(R700_D2GRPH_PRIMARY_SURFACE_ADDRESS_HIGH, upper_32_bits(fb_location)); avivo_crtc_do_set_base()
1584 WREG32(R700_D2GRPH_SECONDARY_SURFACE_ADDRESS_HIGH, upper_32_bits(fb_location)); avivo_crtc_do_set_base()
1586 WREG32(R700_D1GRPH_PRIMARY_SURFACE_ADDRESS_HIGH, upper_32_bits(fb_location)); avivo_crtc_do_set_base()
1587 WREG32(R700_D1GRPH_SECONDARY_SURFACE_ADDRESS_HIGH, upper_32_bits(fb_location)); avivo_crtc_do_set_base()
H A Drv770.c816 WREG32(D2GRPH_SECONDARY_SURFACE_ADDRESS_HIGH, upper_32_bits(crtc_base)); rv770_page_flip()
817 WREG32(D2GRPH_PRIMARY_SURFACE_ADDRESS_HIGH, upper_32_bits(crtc_base)); rv770_page_flip()
819 WREG32(D1GRPH_SECONDARY_SURFACE_ADDRESS_HIGH, upper_32_bits(crtc_base)); rv770_page_flip()
820 WREG32(D1GRPH_PRIMARY_SURFACE_ADDRESS_HIGH, upper_32_bits(crtc_base)); rv770_page_flip()
H A Duvd_v1_0.c363 WREG32(UVD_LMI_EXT40_ADDR, upper_32_bits(ring->gpu_addr) | uvd_v1_0_start()
H A Devergreen.c1356 upper_32_bits(crtc_base)); evergreen_page_flip()
1361 upper_32_bits(crtc_base)); evergreen_page_flip()
2810 upper_32_bits(rdev->mc.vram_start)); evergreen_mc_resume()
2812 upper_32_bits(rdev->mc.vram_start)); evergreen_mc_resume()
2820 WREG32(EVERGREEN_VGA_MEMORY_BASE_ADDRESS_HIGH, upper_32_bits(rdev->mc.vram_start)); evergreen_mc_resume()
2990 radeon_ring_write(ring, (upper_32_bits(ring->next_rptr_gpu_addr) & 0xff) | (1 << 18)); evergreen_ring_ib_execute()
3001 radeon_ring_write(ring, upper_32_bits(ib->gpu_addr) & 0xFF); evergreen_ring_ib_execute()
3145 WREG32(CP_RB_RPTR_ADDR_HI, upper_32_bits(rdev->wb.gpu_addr + RADEON_WB_CP_RPTR_OFFSET) & 0xFF); evergreen_cp_resume()
4322 dst_ptr[0] = cpu_to_le32(upper_32_bits(reg_list_mc_addr)); sumo_rlc_init()
4329 data = upper_32_bits(reg_list_mc_addr); sumo_rlc_init()
H A Dcik.c3952 radeon_ring_write(ring, (upper_32_bits(addr) & 0xffff) | cik_fence_gfx_ring_emit()
3964 radeon_ring_write(ring, (upper_32_bits(addr) & 0xffff) | DATA_SEL(1) | INT_SEL(2)); cik_fence_gfx_ring_emit()
3992 radeon_ring_write(ring, upper_32_bits(addr)); cik_fence_compute_ring_emit()
4018 radeon_ring_write(ring, (upper_32_bits(addr) & 0xffff) | sel); cik_semaphore_ring_emit()
4080 radeon_ring_write(ring, upper_32_bits(src_offset)); cik_copy_cpdma()
4082 radeon_ring_write(ring, upper_32_bits(dst_offset)); cik_copy_cpdma()
4141 radeon_ring_write(ring, upper_32_bits(ring->next_rptr_gpu_addr)); cik_ring_ib_execute()
4156 radeon_ring_write(ring, upper_32_bits(ib->gpu_addr) & 0xFFFF); cik_ring_ib_execute()
4477 WREG32(CP_RB0_RPTR_ADDR_HI, upper_32_bits(rdev->wb.gpu_addr + RADEON_WB_CP_RPTR_OFFSET) & 0xFF); cik_cp_gfx_resume()
4490 WREG32(CP_RB0_BASE_HI, upper_32_bits(rb_addr)); cik_cp_gfx_resume()
4935 WREG32(CP_HPD_EOP_BASE_ADDR_HI, upper_32_bits(eop_gpu_addr) >> 8); cik_cp_compute_resume()
5034 mqd->queue_state.cp_mqd_base_addr_hi = upper_32_bits(mqd_gpu_addr); cik_cp_compute_resume()
5045 mqd->queue_state.cp_hqd_pq_base_hi = upper_32_bits(hqd_gpu_addr); cik_cp_compute_resume()
5073 mqd->queue_state.cp_hqd_pq_wptr_poll_addr_hi = upper_32_bits(wb_gpu_addr) & 0xffff; cik_cp_compute_resume()
5085 upper_32_bits(wb_gpu_addr) & 0xffff; cik_cp_compute_resume()
7042 WREG32(RLC_GPM_SCRATCH_DATA, upper_32_bits(rdev->rlc.clear_state_gpu_addr)); cik_init_gfx_cgpg()
7404 WREG32(IH_RB_WPTR_ADDR_HI, upper_32_bits(rdev->wb.gpu_addr + R600_WB_IH_WPTR_OFFSET) & 0xFF); cik_irq_init()
H A Dr300.c79 ((upper_32_bits(addr) & 0xff) << 24); rv370_pcie_gart_get_page_entry()
1320 upper_32_bits(rdev->mc.agp_base) & 0xff); r300_mc_program()
H A Dr600.c2700 WREG32(CP_RB_RPTR_ADDR_HI, upper_32_bits(rdev->wb.gpu_addr + RADEON_WB_CP_RPTR_OFFSET) & 0xFF); r600_cp_resume()
2839 radeon_ring_write(ring, (upper_32_bits(addr) & 0xff) | DATA_SEL(1) | INT_SEL(2)); r600_fence_ring_emit()
2889 radeon_ring_write(ring, (upper_32_bits(addr) & 0xff) | sel); r600_semaphore_ring_emit()
2949 tmp = upper_32_bits(src_offset) & 0xff; r600_copy_cpdma()
2956 radeon_ring_write(ring, upper_32_bits(dst_offset) & 0xff); r600_copy_cpdma()
3294 radeon_ring_write(ring, (upper_32_bits(ring->next_rptr_gpu_addr) & 0xff) | (1 << 18)); r600_ring_ib_execute()
3305 radeon_ring_write(ring, upper_32_bits(ib->gpu_addr) & 0xFF); r600_ring_ib_execute()
3626 WREG32(IH_RB_WPTR_ADDR_HI, upper_32_bits(rdev->wb.gpu_addr + R600_WB_IH_WPTR_OFFSET) & 0xFF); r600_irq_init()
H A Dni.c1401 radeon_ring_write(ring, (upper_32_bits(addr) & 0xff) | DATA_SEL(1) | INT_SEL(2)); cayman_fence_ring_emit()
1431 radeon_ring_write(ring, upper_32_bits(ib->gpu_addr) & 0xFF); cayman_ring_ib_execute()
1685 WREG32(cp_rb_rptr_addr_hi[i], upper_32_bits(addr) & 0xFF); cayman_cp_resume()
H A Dsi.c3390 radeon_ring_write(ring, (upper_32_bits(addr) & 0xff) | DATA_SEL(1) | INT_SEL(2)); si_fence_ring_emit()
3423 radeon_ring_write(ring, upper_32_bits(ring->next_rptr_gpu_addr)); si_ring_ib_execute()
3436 radeon_ring_write(ring, upper_32_bits(ib->gpu_addr) & 0xFFFF); si_ring_ib_execute()
3677 WREG32(CP_RB0_RPTR_ADDR_HI, upper_32_bits(rdev->wb.gpu_addr + RADEON_WB_CP_RPTR_OFFSET) & 0xFF); si_cp_resume()
3708 WREG32(CP_RB1_RPTR_ADDR_HI, upper_32_bits(rdev->wb.gpu_addr + RADEON_WB_CP1_RPTR_OFFSET) & 0xFF); si_cp_resume()
3732 WREG32(CP_RB2_RPTR_ADDR_HI, upper_32_bits(rdev->wb.gpu_addr + RADEON_WB_CP2_RPTR_OFFSET) & 0xFF); si_cp_resume()
6036 WREG32(IH_RB_WPTR_ADDR_HI, upper_32_bits(rdev->wb.gpu_addr + R600_WB_IH_WPTR_OFFSET) & 0xFF); si_irq_init()
H A Dr600_cp.c1853 RADEON_WRITE(R600_CP_RB_RPTR_ADDR_HI, upper_32_bits(rptr_addr)); r600_cp_init_ring_buffer()
2409 OUT_RING((upper_32_bits(offset) & 0xff)); r600_cp_dispatch_indirect()
H A Dradeon_cp.c231 u32 agp_base_hi = upper_32_bits(agp_base); radeon_write_agp_base()
937 temp |= (upper_32_bits(dev_priv->gart_info.bus_addr) & 0xff) << 4; radeon_set_igpgart()
H A Dr600_dpm.c522 WREG32(UPPER_GPIO_ENABLE, upper_32_bits(mask)); r600_voltage_control_enable_pins()
H A Dr100.c3838 upper_32_bits(rdev->mc.agp_base) & 0xff); r100_mc_program()
/linux-4.1.27/drivers/media/pci/pt3/
H A Dpt3_dma.c63 iowrite32(upper_32_bits(adap->desc_buf[0].b_addr), pt3_start_dma()
194 d->next_h = upper_32_bits(desc_addr); pt3_alloc_dmabuf()
200 d->addr_h = upper_32_bits(data_addr); pt3_alloc_dmabuf()
205 d->next_h = upper_32_bits(desc_addr); pt3_alloc_dmabuf()
214 d->next_h = upper_32_bits(desc_addr); pt3_alloc_dmabuf()
/linux-4.1.27/drivers/pci/host/
H A Dpci-xgene.c165 val = (val32 & 0x0000ffff) | (upper_32_bits(mask) << 16); xgene_pcie_set_ib_mask()
169 val = (val32 & 0xffff0000) | (upper_32_bits(mask) >> 16); xgene_pcie_set_ib_mask()
254 writel(upper_32_bits(cpu_addr), base + 0x04); xgene_pcie_setup_ob_reg()
256 writel(upper_32_bits(mask), base + 0x0c); xgene_pcie_setup_ob_reg()
258 writel(upper_32_bits(pci_addr), base + 0x14); xgene_pcie_setup_ob_reg()
264 writel(upper_32_bits(addr), csr_base + CFGBARH); xgene_pcie_setup_cfg_reg()
309 writel(upper_32_bits(pim) | EN_COHERENCY, addr + 0x04); xgene_pcie_setup_pims()
311 writel(upper_32_bits(size), addr + 0x14); xgene_pcie_setup_pims()
368 writel(upper_32_bits(cpu_addr), bar_addr + 0x4); xgene_pcie_setup_ib_reg()
380 writel(upper_32_bits(cpu_addr), bar_addr + 0x4); xgene_pcie_setup_ib_reg()
382 writel(upper_32_bits(mask), csr_base + IR3MSKL + 0x4); xgene_pcie_setup_ib_reg()
H A Dpcie-designware.c559 dw_pcie_writel_rc(pp, upper_32_bits(pp->mem_bus_addr), dw_pcie_prog_viewport_mem_outbound()
575 dw_pcie_writel_rc(pp, upper_32_bits(pp->io_bus_addr), dw_pcie_prog_viewport_io_outbound()
H A Dpcie-rcar.c344 rcar_pci_write_reg(pcie, upper_32_bits(res_start), PCIEPAUR(win)); rcar_pcie_setup_window()
834 rcar_pci_write_reg(pcie, upper_32_bits(pci_addr), PCIEPRAR(idx+1)); rcar_pcie_inbound_ranges()
835 rcar_pci_write_reg(pcie, upper_32_bits(cpu_addr), PCIELAR(idx+1)); rcar_pcie_inbound_ranges()
/linux-4.1.27/drivers/gpu/drm/amd/amdkfd/
H A Dkfd_mqd_manager_cik.c76 m->cp_mqd_base_addr_hi = upper_32_bits(addr); init_mqd()
185 m->cp_hqd_pq_base_hi = upper_32_bits((uint64_t)q->queue_address >> 8); update_mqd()
187 m->cp_hqd_pq_rptr_report_addr_hi = upper_32_bits((uint64_t)q->read_ptr); update_mqd()
224 m->sdma_rlc_rb_base_hi = upper_32_bits(q->queue_address >> 8); update_mqd_sdma()
226 m->sdma_rlc_rb_rptr_addr_hi = upper_32_bits((uint64_t)q->read_ptr); update_mqd_sdma()
325 m->cp_mqd_base_addr_hi = upper_32_bits(addr); init_mqd_hiq()
371 m->cp_hqd_pq_base_hi = upper_32_bits((uint64_t)q->queue_address >> 8); update_mqd_hiq()
373 m->cp_hqd_pq_rptr_report_addr_hi = upper_32_bits((uint64_t)q->read_ptr); update_mqd_hiq()
H A Dkfd_packet_manager.c134 packet->bitfields3.ib_base_hi = upper_32_bits(ib); pm_create_runlist()
174 packet->gds_addr_hi = upper_32_bits(qpd->gds_context_area); pm_create_map_process()
225 upper_32_bits(q->gart_mqd_addr); pm_create_map_queue()
231 upper_32_bits((uint64_t)q->properties.write_ptr); pm_create_map_queue()
373 packet->gws_mask_hi = upper_32_bits(res->gws_mask); pm_send_set_resources()
376 packet->queue_mask_hi = upper_32_bits(res->queue_mask); pm_send_set_resources()
455 packet->addr_hi = upper_32_bits((uint64_t)fence_address); pm_send_query_status()
457 packet->data_hi = upper_32_bits((uint64_t)fence_value); pm_send_query_status()
/linux-4.1.27/drivers/gpu/drm/nouveau/
H A Dnvc0_fence.c37 OUT_RING (chan, upper_32_bits(virtual)); nvc0_fence_emit32()
53 OUT_RING (chan, upper_32_bits(virtual)); nvc0_fence_sync32()
H A Dnouveau_bo.c702 OUT_RING (chan, upper_32_bits(node->vma[0].offset)); nve0_bo_move_copy()
704 OUT_RING (chan, upper_32_bits(node->vma[1].offset)); nve0_bo_move_copy()
745 OUT_RING (chan, upper_32_bits(src_offset)); nvc0_bo_move_copy()
747 OUT_RING (chan, upper_32_bits(dst_offset)); nvc0_bo_move_copy()
783 OUT_RING (chan, upper_32_bits(dst_offset)); nvc0_bo_move_m2mf()
786 OUT_RING (chan, upper_32_bits(src_offset)); nvc0_bo_move_m2mf()
822 OUT_RING (chan, upper_32_bits(src_offset)); nva3_bo_move_copy()
824 OUT_RING (chan, upper_32_bits(dst_offset)); nva3_bo_move_copy()
849 OUT_RING (chan, upper_32_bits(node->vma[0].offset)); nv98_bo_move_exec()
851 OUT_RING (chan, upper_32_bits(node->vma[1].offset)); nv98_bo_move_exec()
868 OUT_RING (chan, upper_32_bits(node->vma[0].offset)); nv84_bo_move_exec()
870 OUT_RING (chan, upper_32_bits(node->vma[1].offset)); nv84_bo_move_exec()
944 OUT_RING (chan, upper_32_bits(src_offset)); nv50_bo_move_m2mf()
945 OUT_RING (chan, upper_32_bits(dst_offset)); nv50_bo_move_m2mf()
H A Dnv50_fbcon.c242 OUT_RING(chan, upper_32_bits(fb->vma.offset)); nv50_fbcon_accel_init()
251 OUT_RING(chan, upper_32_bits(fb->vma.offset)); nv50_fbcon_accel_init()
H A Dnv84_fence.c46 OUT_RING (chan, upper_32_bits(virtual)); nv84_fence_emit32()
64 OUT_RING (chan, upper_32_bits(virtual)); nv84_fence_sync32()
H A Dnvc0_fbcon.c242 OUT_RING (chan, upper_32_bits(fb->vma.offset)); nvc0_fbcon_accel_init()
253 OUT_RING (chan, upper_32_bits(fb->vma.offset)); nvc0_fbcon_accel_init()
H A Dnouveau_dma.c98 nouveau_bo_wr32(pb, ip++, upper_32_bits(offset) | length << 8); nv50_dma_push()
H A Dnv50_display.c589 OUT_RING (chan, upper_32_bits(addr ^ 0x10)); nv50_display_flip_next()
594 OUT_RING (chan, upper_32_bits(addr)); nv50_display_flip_next()
606 OUT_RING (chan, upper_32_bits(addr ^ 0x10)); nv50_display_flip_next()
612 OUT_RING (chan, upper_32_bits(addr)); nv50_display_flip_next()
/linux-4.1.27/drivers/gpu/drm/nouveau/nvkm/subdev/bar/
H A Dnv50.c167 nv_wo32(priv->bar3, 0x0c, upper_32_bits(limit) << 24 | nv50_bar_ctor()
168 upper_32_bits(start)); nv50_bar_ctor()
194 nv_wo32(priv->bar1, 0x0c, upper_32_bits(limit) << 24 | nv50_bar_ctor()
195 upper_32_bits(start)); nv50_bar_ctor()
H A Dgf100.c127 nv_wo32(bar_vm->mem, 0x0204, upper_32_bits(bar_vm->pgd->addr)); gf100_bar_ctor_vm()
129 nv_wo32(bar_vm->mem, 0x020c, upper_32_bits(bar_len - 1)); gf100_bar_ctor_vm()
/linux-4.1.27/drivers/gpu/drm/nouveau/nvkm/subdev/timer/
H A Dgk20a.c30 u32 hi = upper_32_bits(priv->suspend_time); gk20a_timer_init()
/linux-4.1.27/drivers/net/ethernet/altera/
H A Daltera_msgdma.c124 csrwr32(upper_32_bits(buffer->dma_addr), priv->tx_dma_desc, msgdma_tx_buffer()
178 csrwr32(upper_32_bits(dma_addr), priv->rx_dma_desc, msgdma_add_rx_desc()
H A Daltera_tse_main.c1350 if (upper_32_bits(priv->rxdescmem_busaddr)) { altera_tse_probe()
1355 if (upper_32_bits(priv->txdescmem_busaddr)) { altera_tse_probe()
/linux-4.1.27/drivers/gpu/drm/nouveau/nvkm/engine/dmaobj/
H A Dgf100.c63 nv_wo32(*pgpuobj, 0x0c, upper_32_bits(priv->base.limit) << 24 | gf100_dmaobj_bind()
64 upper_32_bits(priv->base.start)); gf100_dmaobj_bind()
H A Dnv50.c75 nv_wo32(*pgpuobj, 0x0c, upper_32_bits(priv->base.limit) << 24 | nv50_dmaobj_bind()
76 upper_32_bits(priv->base.start)); nv50_dmaobj_bind()
/linux-4.1.27/arch/powerpc/include/asm/
H A Dppc-pci.h29 #define BUID_HI(buid) upper_32_bits(buid)
/linux-4.1.27/drivers/gpu/drm/nouveau/nvkm/subdev/mmu/
H A Dnv50.c61 nv_wo32(pgd, (pde * 8) + 4, upper_32_bits(phys)); nv50_vm_map_pgt()
97 u32 offset_h = upper_32_bits(phys); nv50_vm_map()
133 nv_wo32(pgt, pte + 4, upper_32_bits(phys)); nv50_vm_map_sg()
H A Dgf100.c124 nv_wo32(pgt, pte + 4, upper_32_bits(phys)); gf100_vm_map()
142 nv_wo32(pgt, pte + 4, upper_32_bits(phys)); gf100_vm_map_sg()
/linux-4.1.27/drivers/gpu/drm/nouveau/nvkm/engine/fifo/
H A Dg84.c71 nv_wo32(base->eng, addr + 0x0c, upper_32_bits(limit) << 24 | g84_fifo_context_attach()
72 upper_32_bits(start)); g84_fifo_context_attach()
215 nv_wo32(base->ramfc, 0x0c, upper_32_bits(args->v0.offset)); g84_fifo_chan_ctor_dma()
217 nv_wo32(base->ramfc, 0x14, upper_32_bits(args->v0.offset)); g84_fifo_chan_ctor_dma()
296 nv_wo32(base->ramfc, 0x54, upper_32_bits(ioffset) | (ilength << 16)); g84_fifo_chan_ctor_ind()
H A Dnv50.c93 nv_wo32(base->eng, addr + 0x0c, upper_32_bits(limit) << 24 | nv50_fifo_context_attach()
94 upper_32_bits(start)); nv50_fifo_context_attach()
232 nv_wo32(base->ramfc, 0x0c, upper_32_bits(args->v0.offset)); nv50_fifo_chan_ctor_dma()
234 nv_wo32(base->ramfc, 0x14, upper_32_bits(args->v0.offset)); nv50_fifo_chan_ctor_dma()
301 nv_wo32(base->ramfc, 0x54, upper_32_bits(ioffset) | (ilength << 16)); nv50_fifo_chan_ctor_ind()
H A Dgf100.c139 nv_wo32(base, addr + 0x04, upper_32_bits(ectx->vma.offset)); gf100_fifo_context_attach()
231 nv_wo32(base, 0x0c, upper_32_bits(priv->user.mem->addr + usermem)); gf100_fifo_chan_ctor()
235 nv_wo32(base, 0x4c, upper_32_bits(ioffset) | (ilength << 16)); gf100_fifo_chan_ctor()
336 nv_wo32(base, 0x0204, upper_32_bits(base->pgd->addr)); gf100_fifo_context_ctor()
H A Dgk104.c163 nv_wo32(base, addr + 0x04, upper_32_bits(ectx->vma.offset)); gk104_fifo_context_attach()
268 nv_wo32(base, 0x0c, upper_32_bits(priv->user.mem->addr + usermem)); gk104_fifo_chan_ctor()
272 nv_wo32(base, 0x4c, upper_32_bits(ioffset) | (ilength << 16)); gk104_fifo_chan_ctor()
368 nv_wo32(base, 0x0204, upper_32_bits(base->pgd->addr)); gk104_fifo_context_ctor()
/linux-4.1.27/drivers/net/dsa/
H A Dbcm_sf2.h119 reg_writel(priv, upper_32_bits(val), REG_DIR_DATA_WRITE); \
/linux-4.1.27/drivers/gpu/drm/nouveau/nvkm/engine/sw/
H A Dgf100.c107 nv_wr32(priv, 0x06000c, upper_32_bits(chan->vblank.offset)); gf100_sw_vblsem_release()
/linux-4.1.27/arch/powerpc/mm/
H A Dhugetlbpage-book3e.c138 mtspr(SPRN_MAS7, upper_32_bits(mas7_3)); book3e_hugetlb_preload()
/linux-4.1.27/drivers/net/ethernet/samsung/sxgbe/
H A Dsxgbe_dma.c69 writel(upper_32_bits(dma_tx), sxgbe_dma_channel_init()
74 writel(upper_32_bits(dma_rx), sxgbe_dma_channel_init()
/linux-4.1.27/arch/powerpc/sysdev/
H A Dppc4xx_msi.c154 mtdcri(SDR0, *sdr_addr, upper_32_bits(res.start)); /*HIGH addr */ ppc4xx_setup_pcieh_hw()
172 msi->msi_addr_hi = upper_32_bits(msi_phys); ppc4xx_setup_pcieh_hw()
H A Dfsl_85xx_l2ctlr.c124 upper_32_bits(sram_params.sram_offset) & L2SRAM_BARE_MSK_HI4); mpc85xx_l2ctlr_of_probe()
H A Dppc4xx_hsta_msi.c72 msg.address_hi = upper_32_bits(addr); hsta_setup_msi_irqs()
H A Dfsl_msi.c164 msg->address_hi = upper_32_bits(address); fsl_compose_msi_msg()
/linux-4.1.27/drivers/iommu/
H A Dfsl_pamu.c691 out_be32(&pamu_regs->ppbah, upper_32_bits(ppaact_phys)); setup_one_pamu()
694 out_be32(&pamu_regs->pplah, upper_32_bits(ppaact_phys)); setup_one_pamu()
697 out_be32(&pamu_regs->spbah, upper_32_bits(spaact_phys)); setup_one_pamu()
700 out_be32(&pamu_regs->splah, upper_32_bits(spaact_phys)); setup_one_pamu()
703 out_be32(&pamu_regs->obah, upper_32_bits(omt_phys)); setup_one_pamu()
706 out_be32(&pamu_regs->olah, upper_32_bits(omt_phys)); setup_one_pamu()
958 law[i].lawbarh = upper_32_bits(phys); create_csd()
H A Damd_iommu.c836 cmd->data[1] = upper_32_bits(__pa(address)); build_completion_wait()
871 cmd->data[3] = upper_32_bits(address); build_inv_iommu_pages()
904 cmd->data[3] = upper_32_bits(address); build_inv_iotlb_pages()
920 cmd->data[3] = upper_32_bits(address); build_inv_iommu_pasid()
942 cmd->data[3] = upper_32_bits(address); build_inv_iotlb_pasid()
/linux-4.1.27/drivers/gpu/drm/i915/
H A Di915_gem_render_state.c103 s = upper_32_bits(r); render_state_setup()
H A Dintel_lrc.c1205 intel_logical_ring_emit(ringbuf, upper_32_bits(offset)); gen8_emit_bb_start()
1818 reg_state[CTX_PDP3_UDW+1] = upper_32_bits(ppgtt->pdp.page_directory[3]->daddr); populate_lr_context()
1820 reg_state[CTX_PDP2_UDW+1] = upper_32_bits(ppgtt->pdp.page_directory[2]->daddr); populate_lr_context()
1822 reg_state[CTX_PDP1_UDW+1] = upper_32_bits(ppgtt->pdp.page_directory[1]->daddr); populate_lr_context()
1824 reg_state[CTX_PDP0_UDW+1] = upper_32_bits(ppgtt->pdp.page_directory[0]->daddr); populate_lr_context()
H A Di915_gem_execbuffer.c285 *(uint32_t *)(vaddr + page_offset) = upper_32_bits(delta); relocate_entry_cpu()
330 iowrite32(upper_32_bits(delta), relocate_entry_gtt()
376 clflush_write32(vaddr + page_offset, upper_32_bits(delta)); relocate_entry_clflush()
H A Dintel_ringbuffer.c1151 intel_ring_emit(signaller, upper_32_bits(gtt_offset)); for_each_ring()
1191 intel_ring_emit(signaller, upper_32_bits(gtt_offset)); for_each_ring()
1303 upper_32_bits(GEN8_WAIT_OFFSET(waiter, signaller->id))); gen8_ring_sync()
2392 intel_ring_emit(ring, upper_32_bits(offset)); gen8_ring_dispatch_execbuffer()
H A Di915_dma.c266 upper_32_bits(dev_priv->mch_res.start)); intel_alloc_mchbar_resource()
H A Di915_gpu_error.c268 err_printf(m, " FADDR: 0x%08x %08x\n", upper_32_bits(ring->faddr), i915_ring_error_state()
H A Di915_gem_gtt.c1203 WARN_ON(upper_32_bits(start)); gen6_alloc_va_range()
/linux-4.1.27/drivers/usb/gadget/udc/bdc/
H A Dbdc_cmd.c154 param1 = upper_32_bits(ep->bd_list.bd_table_array[0]->dma); bdc_config_ep()
239 param1 = upper_32_bits(dma_addr); bdc_ep_bla()
H A Dbdc_core.c187 upp32 = upper_32_bits(bdc->scratchpad.sp_dma); scratchpad_setup()
249 upp32 = upper_32_bits(bdc->srr.dma_addr); bdc_mem_init()
H A Dbdc_ep.c116 cpu_to_le32(upper_32_bits(next_table->dma)); chain_table()
487 bd->offset[1] = cpu_to_le32(upper_32_bits(buf_add)); setup_bd_list_xfr()
850 bd_start->offset[1] = cpu_to_le32(upper_32_bits(next_bd_dma)); ep_dequeue()
/linux-4.1.27/drivers/net/ethernet/intel/i40e/
H A Di40e_adminq.c194 cpu_to_le32(upper_32_bits(bi->pa)); i40e_alloc_arq_bufs()
315 wr32(hw, hw->aq.asq.bah, upper_32_bits(hw->aq.asq.desc_buf.pa)); i40e_config_asq_regs()
344 wr32(hw, hw->aq.arq.bah, upper_32_bits(hw->aq.arq.desc_buf.pa)); i40e_config_arq_regs()
770 cpu_to_le32(upper_32_bits(details->cookie)); i40e_asq_send_command()
833 cpu_to_le32(upper_32_bits(dma_buff->pa)); i40e_asq_send_command()
994 desc->params.external.addr_high = cpu_to_le32(upper_32_bits(bi->pa)); i40e_clean_arq_element()
H A Di40e_hmc.h124 val1 = (u32)(upper_32_bits(pa)); \
/linux-4.1.27/drivers/net/ethernet/intel/i40evf/
H A Di40e_adminq.c192 cpu_to_le32(upper_32_bits(bi->pa)); i40e_alloc_arq_bufs()
313 wr32(hw, hw->aq.asq.bah, upper_32_bits(hw->aq.asq.desc_buf.pa)); i40e_config_asq_regs()
342 wr32(hw, hw->aq.arq.bah, upper_32_bits(hw->aq.arq.desc_buf.pa)); i40e_config_arq_regs()
721 cpu_to_le32(upper_32_bits(details->cookie)); i40evf_asq_send_command()
784 cpu_to_le32(upper_32_bits(dma_buff->pa)); i40evf_asq_send_command()
946 desc->params.external.addr_high = cpu_to_le32(upper_32_bits(bi->pa)); i40evf_clean_arq_element()
H A Di40e_hmc.h124 val1 = (u32)(upper_32_bits(pa)); \
/linux-4.1.27/sound/soc/fsl/
H A Dfsl_dma.c176 upper_32_bits(dma_private->dma_buf_next)); fsl_dma_update_pointers()
182 upper_32_bits(dma_private->dma_buf_next)); fsl_dma_update_pointers()
668 upper_32_bits(temp_addr)); fsl_dma_hw_params()
672 upper_32_bits(ssi_sxx_phys)); fsl_dma_hw_params()
676 upper_32_bits(ssi_sxx_phys)); fsl_dma_hw_params()
680 upper_32_bits(temp_addr)); fsl_dma_hw_params()
/linux-4.1.27/drivers/scsi/
H A Dmvumi.c225 m_sg->baseaddr_h = cpu_to_le32(upper_32_bits(busaddr)); mvumi_make_sgl()
241 m_sg->baseaddr_h = cpu_to_le32(upper_32_bits(busaddr)); mvumi_make_sgl()
269 m_sg->baseaddr_h = cpu_to_le32(upper_32_bits(phy_addr)); mvumi_internal_cmd_sgl()
901 hs_page4->ib_baseaddr_h = upper_32_bits(mhba->ib_list_phys); mvumi_hs_build_page()
904 hs_page4->ob_baseaddr_h = upper_32_bits(mhba->ob_list_phys); mvumi_hs_build_page()
1149 iowrite32(upper_32_bits(mhba->handshake_page_phys), mvumi_handshake()
1207 iowrite32(upper_32_bits(mhba->ib_shadow_phys), mvumi_handshake()
1217 iowrite32(upper_32_bits(mhba->ob_shadow_phys), mvumi_handshake()
1889 cpu_to_le32(upper_32_bits(cmd->frame_phys)); mvumi_send_command()
H A Ddpt_i2o.c160 return upper_32_bits(addr); dma_high()
/linux-4.1.27/drivers/infiniband/hw/nes/
H A Dnes_mgt.c449 upper_32_bits(u64tmp)); forward_fpdus()
454 upper_32_bits(fpdu_info->frags[0].physaddr)); forward_fpdus()
459 upper_32_bits(fpdu_info->frags[1].physaddr)); forward_fpdus()
464 upper_32_bits(fpdu_info->frags[2].physaddr)); forward_fpdus()
469 upper_32_bits(fpdu_info->frags[3].physaddr)); forward_fpdus()
H A Dnes.h311 wqe_words[index + 1] = cpu_to_le32(upper_32_bits(value)); set_wqe_64bit_value()
340 (u32)(upper_32_bits((unsigned long)(nesqp)))); nes_fill_init_qp_wqe()
H A Dnes_hw.c3110 cpu_to_le32((u32)(upper_32_bits((unsigned long)cqp_request))); nes_cqp_ce_handler()
H A Dnes_verbs.c1322 nesqp->nesqp_context->aeq_token_high = cpu_to_le32((u32)(upper_32_bits((unsigned long)(nesqp)))); nes_create_qp()
/linux-4.1.27/drivers/usb/host/
H A Dxhci-dbg.c322 upper_32_bits(le64_to_cpu(trb->link.segment_ptr)), xhci_debug_segment()
404 upper_32_bits(le64_to_cpu(entry->seg_addr)), xhci_dbg_erst()
419 upper_32_bits(val)); xhci_dbg_cmd_ptrs()
H A Dxhci-ring.c2253 upper_32_bits(le64_to_cpu(event->buffer)),
2276 upper_32_bits(le64_to_cpu(event->buffer)),
3180 upper_32_bits(addr), queue_bulk_sg_tx()
3348 upper_32_bits(addr), xhci_queue_bulk_tx()
3464 upper_32_bits(urb->transfer_dma), xhci_queue_ctrl_tx()
3691 upper_32_bits(addr), xhci_queue_isoc_tx()
3874 upper_32_bits(in_ctx_ptr), 0, xhci_queue_address_device()
3900 upper_32_bits(in_ctx_ptr), 0, xhci_queue_configure_endpoint()
3910 upper_32_bits(in_ctx_ptr), 0, xhci_queue_evaluate_context()
3984 upper_32_bits(addr), trb_stream_id, xhci_queue_new_dequeue_state()
H A Dxhci.h1646 u32 val_hi = upper_32_bits(val); xhci_write_64()
/linux-4.1.27/drivers/scsi/be2iscsi/
H A Dbe_mgmt.c309 sge->pa_hi = cpu_to_le32(upper_32_bits(nonemb_cmd->dma)); mgmt_get_session_info()
448 sge->pa_hi = cpu_to_le32(upper_32_bits(nonemb_cmd.dma)); mgmt_check_supported_fw()
538 mcc_sge->pa_hi = cpu_to_le32(upper_32_bits(nonemb_cmd->dma)); mgmt_vendor_specific_fw_cmd()
620 sge->pa_hi = cpu_to_le32(upper_32_bits(nonemb_cmd->dma)); mgmt_invalidate_icds()
794 sge->pa_hi = cpu_to_le32(upper_32_bits(nonemb_cmd->dma)); mgmt_open_connection()
868 sge->pa_hi = cpu_to_le32(upper_32_bits(nonemb_cmd->dma)); mgmt_exec_nonemb_cmd()
H A Dbe_cmds.c656 val |= (upper_32_bits(mbox_mem->dma) >> 2) << 2; be_mbox_notify()
713 val |= (upper_32_bits(mbox_mem->dma) >> 2) << 2; be_mbox_notify_wait()
776 pages[i].hi = cpu_to_le32(upper_32_bits(dma)); be_cmd_page_addrs_prepare()
H A Dbe_main.c2325 upper_32_bits(addr)); hwi_write_sgl_v2()
2340 upper_32_bits(addr)); hwi_write_sgl_v2()
2383 upper_32_bits(addr)); hwi_write_sgl_v2()
2525 upper_32_bits(io_task->mtask_addr)); hwi_write_buffer()
2557 upper_32_bits(io_task->mtask_addr)); hwi_write_buffer()
/linux-4.1.27/drivers/infiniband/hw/ocrdma/
H A Docrdma_hw.c378 q_pa[i].hi = (u32) upper_32_bits(host_pa); ocrdma_build_q_pages()
1235 mqe->u.nonemb_req.sge[0].pa_hi = (u32) upper_32_bits(dev->stats_mem.pa); ocrdma_mbx_rdma_stats()
1283 mqe->u.nonemb_req.sge[0].pa_hi = (u32) upper_32_bits(dma.pa); ocrdma_mbx_get_ctrl_attribs()
1626 pbes[i].pa_hi = (u32)cpu_to_le32(upper_32_bits(pa)); ocrdma_mbx_create_ah_tbl()
1630 cmd->tbl_addr[0].hi = (u32)upper_32_bits(dev->av_tbl.pbl.pa); ocrdma_mbx_create_ah_tbl()
1925 cmd->totlen_high = upper_32_bits(hwmr->len); ocrdma_mbx_reg_mr()
1927 cmd->fbo_high = (u32) upper_32_bits(hwmr->fbo); ocrdma_mbx_reg_mr()
1929 cmd->va_hiaddr = (u32) upper_32_bits(hwmr->va); ocrdma_mbx_reg_mr()
1933 cmd->pbl[i].hi = upper_32_bits(hwmr->pbl_table[i].pa); ocrdma_mbx_reg_mr()
1965 upper_32_bits(hwmr->pbl_table[i + pbl_offset].pa); ocrdma_mbx_reg_mr_cont()
2825 mqe_sge->pa_hi = (u32) upper_32_bits(pa); ocrdma_mbx_get_dcbx_config()
H A Docrdma_verbs.c625 rsp.dpp_page_addr_hi = upper_32_bits(dpp_page_addr); ocrdma_copy_pd_uresp()
862 cpu_to_le32(upper_32_bits build_user_pbes()
1951 sge[i].addr_hi = upper_32_bits(sg_list[i].addr); ocrdma_build_sges()
2040 ext_rw->addr_hi = upper_32_bits(wr->wr.rdma.remote_addr); ocrdma_build_write()
2060 ext_rw->addr_hi = upper_32_bits(wr->wr.rdma.remote_addr); ocrdma_build_read()
2084 pbe->pa_hi = cpu_to_le32((u32) upper_32_bits(buf_addr)); build_frmr_pbes()
2141 fast_reg->va_hi = upper_32_bits(wr->wr.fast_reg.iova_start); ocrdma_build_fr()
2143 fast_reg->fbo_hi = upper_32_bits(fbo); ocrdma_build_fr()
3110 cpu_to_le32((u32) upper_32_bits(buf_addr)); build_kernel_pbes()
3115 cpu_to_le32((u32) upper_32_bits(buf_addr)); build_kernel_pbes()
/linux-4.1.27/drivers/scsi/pm8001/
H A Dpm80xx_hwi.c3940 cpu_to_le32(upper_32_bits(phys_addr)); pm80xx_chip_ssp_io_req()
3947 cpu_to_le32(upper_32_bits(dma_addr)); pm80xx_chip_ssp_io_req()
3954 end_addr_high = cpu_to_le32(upper_32_bits(end_addr)); pm80xx_chip_ssp_io_req()
3971 cpu_to_le32(upper_32_bits(phys_addr)); pm80xx_chip_ssp_io_req()
4000 cpu_to_le32(upper_32_bits(phys_addr)); pm80xx_chip_ssp_io_req()
4006 cpu_to_le32(upper_32_bits(dma_addr)); pm80xx_chip_ssp_io_req()
4013 end_addr_high = cpu_to_le32(upper_32_bits(end_addr)); pm80xx_chip_ssp_io_req()
4030 cpu_to_le32(upper_32_bits(phys_addr)); pm80xx_chip_ssp_io_req()
4119 sata_cmd.enc_addr_high = upper_32_bits(phys_addr); pm80xx_chip_sata_req()
4124 sata_cmd.enc_addr_high = upper_32_bits(dma_addr); pm80xx_chip_sata_req()
4131 end_addr_high = cpu_to_le32(upper_32_bits(end_addr)); pm80xx_chip_sata_req()
4148 upper_32_bits(phys_addr); pm80xx_chip_sata_req()
4185 sata_cmd.addr_high = upper_32_bits(phys_addr); pm80xx_chip_sata_req()
4190 sata_cmd.addr_high = upper_32_bits(dma_addr); pm80xx_chip_sata_req()
4197 end_addr_high = cpu_to_le32(upper_32_bits(end_addr)); pm80xx_chip_sata_req()
4214 upper_32_bits(phys_addr); pm80xx_chip_sata_req()
H A Dpm8001_hwi.c4322 ssp_cmd.addr_high = cpu_to_le32(upper_32_bits(phys_addr)); pm8001_chip_ssp_io_req()
4327 ssp_cmd.addr_high = cpu_to_le32(upper_32_bits(dma_addr)); pm8001_chip_ssp_io_req()
4395 sata_cmd.addr_high = upper_32_bits(phys_addr); pm8001_chip_sata_req()
4400 sata_cmd.addr_high = upper_32_bits(dma_addr); pm8001_chip_sata_req()
4920 cpu_to_le32(upper_32_bits(le64_to_cpu(info->sgl.addr))); pm8001_chip_fw_flash_update_build()
H A Dpm8001_sas.c128 *pphys_addr_hi = upper_32_bits(phys_align); pm8001_mem_alloc()
/linux-4.1.27/drivers/scsi/esas2r/
H A Desas2r_init.c412 upper_32_bits(bus_addr), esas2r_init_adapter()
1122 upper_32_bits(ppaddr)); esas2r_check_adapter()
1127 upper_32_bits(ppaddr)); esas2r_check_adapter()
1133 upper_32_bits(ppaddr)); esas2r_check_adapter()
/linux-4.1.27/drivers/scsi/isci/
H A Dunsolicited_frame_control.c172 upper_32_bits(uf_control->address_table.array[frame_get]) == 0 && sci_unsolicited_frame_control_release_frame()
H A Drequest.c108 e->address_upper = upper_32_bits(sg_dma_address(sg)); init_sgl_element()
142 upper_32_bits(dma_addr); sci_request_build_sgl()
161 scu_sg->A.address_upper = upper_32_bits(dma_addr); sci_request_build_sgl()
265 task_context->command_iu_upper = upper_32_bits(dma_addr); scu_ssp_reqeust_construct_task_context()
274 task_context->response_iu_upper = upper_32_bits(dma_addr); scu_ssp_reqeust_construct_task_context()
553 task_context->command_iu_upper = upper_32_bits(dma_addr); scu_sata_reqeust_construct_task_context()
3292 task_context->command_iu_upper = upper_32_bits(sg_dma_address(sg)); sci_io_request_construct_smp()
H A Dhost.c2306 writel(upper_32_bits(ihost->cq_dma), &ihost->smu_registers->completion_queue_upper); sci_controller_mem_init()
2309 writel(upper_32_bits(ihost->rnc_dma), &ihost->smu_registers->remote_node_context_upper); sci_controller_mem_init()
2312 writel(upper_32_bits(ihost->tc_dma), &ihost->smu_registers->host_task_table_upper); sci_controller_mem_init()
2322 writel(upper_32_bits(ihost->uf_control.headers.physical_address), sci_controller_mem_init()
2327 writel(upper_32_bits(ihost->uf_control.address_table.physical_address), sci_controller_mem_init()
H A Dremote_node_context.c132 rnc->ssp.remote_sas_address_hi = upper_32_bits(sas_addr); sci_remote_node_context_construct_buffer()
/linux-4.1.27/drivers/clocksource/
H A Darm_global_timer.c99 writel(upper_32_bits(counter), gt_base + GT_COMP1); gt_compare_set()
/linux-4.1.27/drivers/gpu/drm/nouveau/nvkm/engine/gr/
H A Dctxgf100.c1225 nv_wr32(priv, 0x406804 + (i * 0x20), upper_32_bits(tpc_set)); gf100_grctx_generate_r406800()
1226 nv_wr32(priv, 0x406c04 + (i * 0x20), upper_32_bits(tpc_set ^ tpc_mask)); gf100_grctx_generate_r406800()
1284 nv_wo32(chan, 0x0204, upper_32_bits(chan->addr + 0x1000)); gf100_grctx_generate()
1296 nv_wo32(chan, 0x2004 + (i * 8), upper_32_bits(addr)); gf100_grctx_generate()
H A Dgf100.c350 nv_wo32(chan, 0x18, upper_32_bits(chan->mmio_vma.offset)); gf100_gr_context_ctor()
/linux-4.1.27/sound/pci/hda/
H A Dhda_controller.c151 upper_32_bits(azx_dev->bdl.addr)); azx_setup_controller()
307 bdl[1] = cpu_to_le32(upper_32_bits(addr)); setup_bdle()
1001 azx_writel(chip, CORBUBASE, upper_32_bits(chip->corb.addr)); azx_init_cmd_io()
1040 azx_writel(chip, RIRBUBASE, upper_32_bits(chip->rirb.addr)); azx_init_cmd_io()
1663 azx_writel(chip, DPUBASE, upper_32_bits(chip->posbuf.addr)); azx_init_chip()
/linux-4.1.27/sound/pci/lola/
H A Dlola.c390 lola_writel(chip, BAR0, CORBUBASE, upper_32_bits(chip->corb.addr)); setup_corb_rirb()
407 lola_writel(chip, BAR0, RIRBUBASE, upper_32_bits(chip->rirb.addr)); setup_corb_rirb()
H A Dlola_pcm.c334 bdl[1] = cpu_to_le32(upper_32_bits(addr)); setup_bdle()
452 lola_dsd_write(chip, str->dsd, BDPU, upper_32_bits(bdl)); lola_setup_controller()
/linux-4.1.27/drivers/net/ethernet/broadcom/
H A Dbgmac.c134 dma_desc->addr_high = cpu_to_le32(upper_32_bits(slot->dma_addr)); bgmac_dma_tx_add_buf()
394 dma_desc->addr_high = cpu_to_le32(upper_32_bits(ring->slots[desc_idx].dma_addr)); bgmac_dma_rx_setup_desc()
689 upper_32_bits(ring->dma_base)); bgmac_dma_init()
707 upper_32_bits(ring->dma_base)); bgmac_dma_init()
H A Dbcmsysport.c83 __raw_writel(upper_32_bits(addr) & DESC_ADDR_HI_MASK, dma_desc_set_addr()
1001 len_status = upper_32_bits(mapping) & DESC_ADDR_HI_MASK; bcm_sysport_xmit()
/linux-4.1.27/drivers/net/ethernet/brocade/bna/
H A Dbfa_ioc.h64 dma_addr->a32.addr_hi = (u32) htonl(upper_32_bits(pa)); __bfa_dma_be_addr_set()
/linux-4.1.27/drivers/crypto/caam/
H A Ddesc_constr.h120 *offset = upper_32_bits(data); append_u64()
/linux-4.1.27/drivers/net/ethernet/agere/
H A Det131x.c1552 writel(upper_32_bits(rx_local->rx_status_bus), &rx_dma->dma_wb_base_hi); et131x_config_rx_dma_regs()
1558 writel(upper_32_bits(rx_local->ps_ring_physaddr), &rx_dma->psr_base_hi); et131x_config_rx_dma_regs()
1604 writel(upper_32_bits(fbr->ring_physaddr), base_hi); et131x_config_rx_dma_regs()
1645 writel(upper_32_bits(tx_ring->tx_desc_ring_pa), &txdma->pr_base_hi); et131x_config_tx_dma_regs()
1652 writel(upper_32_bits(tx_ring->tx_status_pa), &txdma->dma_wb_base_hi); et131x_config_tx_dma_regs()
1965 fbr->bus_high[k] = upper_32_bits(fbr_physaddr); et131x_rx_dma_memory_alloc()
2467 desc[frag].addr_hi = upper_32_bits(dma_addr); nic_send_packet()
2476 desc[frag].addr_hi = upper_32_bits(dma_addr); nic_send_packet()
2486 desc[frag].addr_hi = upper_32_bits(dma_addr); nic_send_packet()
2497 desc[frag].addr_hi = upper_32_bits(dma_addr); nic_send_packet()
/linux-4.1.27/drivers/net/ethernet/emulex/benet/
H A Dbe_cmds.c586 val |= (upper_32_bits(mbox_mem->dma) >> 2) << 2; be_mbox_notify_wait()
695 wrb->tag1 = upper_32_bits(addr); fill_wrb_tags()
717 sge->pa_hi = cpu_to_le32(upper_32_bits(mem->dma)); be_wrb_cmd_hdr_prepare()
733 pages[i].hi = cpu_to_le32(upper_32_bits(dma)); be_cmd_page_addrs_prepare()
2298 req->addr_high = cpu_to_le32(upper_32_bits(cmd->dma + lancer_cmd_write_object()
2426 req->addr_high = cpu_to_le32(upper_32_bits(cmd->dma)); lancer_cmd_read_object()
H A Dbe_main.c687 wrb->frag_pa_hi = cpu_to_le32(upper_32_bits(addr)); wrb_fill()
2095 rxd->fragpa_hi = cpu_to_le32(upper_32_bits(frag_dmaaddr)); be_post_rx_frags()
/linux-4.1.27/drivers/net/ethernet/amd/xgbe/
H A Dxgbe-dev.c1113 upper_32_bits(rdata->rdesc_dma)); xgbe_tx_desc_init()
1147 rdesc->desc1 = cpu_to_le32(upper_32_bits(rdata->rx.hdr.dma)); xgbe_rx_desc_reset()
1149 rdesc->desc3 = cpu_to_le32(upper_32_bits(rdata->rx.buf.dma)); xgbe_rx_desc_reset()
1189 upper_32_bits(rdata->rdesc_dma)); xgbe_rx_desc_init()
1504 rdesc->desc1 = cpu_to_le32(upper_32_bits(rdata->skb_dma)); xgbe_dev_xmit()
1557 rdesc->desc1 = cpu_to_le32(upper_32_bits(rdata->skb_dma)); xgbe_dev_xmit()
/linux-4.1.27/fs/afs/
H A Dfsclient.c481 bp[4] = htonl(upper_32_bits(offset)); afs_fs_fetch_data64()
502 if (upper_32_bits(offset) || upper_32_bits(offset + length)) afs_fs_fetch_data()
/linux-4.1.27/drivers/net/wireless/ath/wil6210/
H A Dtxrx.h47 addr->addr_high = cpu_to_le16((u16)upper_32_bits(pa)); wil_desc_addr_set()
/linux-4.1.27/arch/sh/drivers/pci/
H A Dpcie-sh7786.c453 pci_write_reg(chan, upper_32_bits(res->start), pcie_init()
/linux-4.1.27/drivers/scsi/aacraid/
H A Dsrc.c475 BUG_ON(upper_32_bits(address) != 0L); aac_src_deliver_message()
499 src_writel(dev, MUnit.IQ_H, upper_32_bits(address) & 0xffffffff); aac_src_deliver_message()
/linux-4.1.27/drivers/dma/
H A Dfsl_raid.c255 cf[index].addr_high = upper_32_bits(addr); fill_cfd_frame()
269 desc->hwdesc.lbea32 = upper_32_bits(paddr); fsl_re_init_desc()
/linux-4.1.27/drivers/block/rsxx/
H A Ddma.c790 iowrite32(upper_32_bits(ctrl->status.dma_addr), rsxx_hw_buffers_init()
795 iowrite32(upper_32_bits(ctrl->cmd.dma_addr), ctrl->regmap + CB_ADD_HI); rsxx_hw_buffers_init()
/linux-4.1.27/drivers/usb/dwc3/
H A Dcore.c230 upper_32_bits(evt->dma)); dwc3_event_buffers_setup()
307 param = upper_32_bits(scratch_addr); dwc3_setup_scratch_buffers()
H A Dep0.c76 trb->bph = upper_32_bits(buf_dma); dwc3_ep0_start_trans()
86 params.param0 = upper_32_bits(dwc->ep0_trb_addr); dwc3_ep0_start_trans()
H A Dgadget.c583 trb_link->bph = upper_32_bits(dwc3_trb_dma_offset(dep, trb_st_hw)); __dwc3_gadget_ep_enable()
805 trb->bph = upper_32_bits(dma); dwc3_prepare_one_trb()
1015 params.param0 = upper_32_bits(req->trb_dma); __dwc3_gadget_kick_transfer()
/linux-4.1.27/include/linux/
H A Dkernel.h150 * upper_32_bits - return bits 32-63 of a number
157 #define upper_32_bits(n) ((u32)(((n) >> 16) >> 16)) macro
/linux-4.1.27/drivers/char/
H A Dmbcs.c720 upper_32_bits(debug0), lower_32_bits(debug0)); show_algo()
/linux-4.1.27/drivers/pci/
H A Dsetup-bus.c666 bu = upper_32_bits(region.start); pci_setup_bridge_mmio_pref()
667 lu = upper_32_bits(region.end); pci_setup_bridge_mmio_pref()
/linux-4.1.27/drivers/net/wireless/b43/
H A Ddma.c64 addr = upper_32_bits(dmaaddr); b43_dma_address()
74 addr = upper_32_bits(dmaaddr); b43_dma_address()
/linux-4.1.27/drivers/net/ethernet/marvell/
H A Dskge.c947 rd->dma_hi = upper_32_bits(map); skge_rx_setup()
2554 if (upper_32_bits(skge->dma) != upper_32_bits(skge->dma + skge->mem_size)) { skge_up()
2760 td->dma_hi = upper_32_bits(map); skge_xmit_frame()
2800 tf->dma_hi = upper_32_bits(map); skge_xmit_frame()
H A Dsky2.c1103 sky2_write32(hw, Y2_QADDR(qaddr, PREF_UNIT_ADDR_HI), upper_32_bits(addr)); sky2_prefetch_init()
1197 le->addr = cpu_to_le32(upper_32_bits(map)); sky2_rx_add()
1868 upper = upper_32_bits(mapping); sky2_xmit_frame()
1958 upper = upper_32_bits(mapping); sky2_xmit_frame()
/linux-4.1.27/drivers/crypto/ccp/
H A Dccp-ops.c189 return upper_32_bits(info->address + info->offset) & 0x0000ffff; ccp_addr_hi()
338 cr[5] = upper_32_bits(op->u.sha.msg_bits); ccp_perform_sha()
/linux-4.1.27/kernel/
H A Dsys.c2371 if (upper_32_bits(s.totalram) || upper_32_bits(s.totalswap)) { COMPAT_SYSCALL_DEFINE1()
/linux-4.1.27/drivers/i2c/busses/
H A Di2c-ismt.c573 desc->dptr_high = upper_32_bits(dma_addr); ismt_access()
/linux-4.1.27/drivers/misc/mei/
H A Dhw-txe.c1213 u32 hi32 = upper_32_bits(addr); mei_txe_setup_satt2()
/linux-4.1.27/drivers/scsi/ufs/
H A Dufshcd.c1021 cpu_to_le32(upper_32_bits(sg->dma_address)); scsi_for_each_sg()
2019 cpu_to_le32(upper_32_bits(cmd_desc_element_addr)); ufshcd_host_memory_configure()
2530 ufshcd_writel(hba, upper_32_bits(hba->utrdl_dma_addr), ufshcd_make_hba_operational()
2534 ufshcd_writel(hba, upper_32_bits(hba->utmrdl_dma_addr), ufshcd_make_hba_operational()
/linux-4.1.27/drivers/char/agp/
H A Dintel-gtt.c1036 upper_32_bits(intel_private.ifp_resource.start)); intel_i965_g33_setup_chipset_flush()
/linux-4.1.27/sound/pci/lx6464es/
H A Dlx6464es.c452 lower_32_bits(buf), upper_32_bits(buf), lx_trigger_start()
/linux-4.1.27/drivers/scsi/megaraid/
H A Dmegaraid_sas_fusion.c699 cpu_to_le32(upper_32_bits(ioc_init_handle)); megasas_ioc_init_fusion()
705 req_desc.u.high = cpu_to_le32(upper_32_bits(cmd->frame_phys_addr)); megasas_ioc_init_fusion()
H A Dmegaraid_sas_base.c670 writel(upper_32_bits(frame_phys_addr), megasas_fire_cmd_skinny()
1007 cpu_to_le32(upper_32_bits(cmd_to_abort->frame_phys_addr)); megasas_issue_blocked_abort_cmd()
1266 cpu_to_le32(upper_32_bits(cmd->sense_phys_addr)); megasas_build_dcdb()
4307 cpu_to_le32(upper_32_bits(initq_info_h)); megasas_issue_init_mfi()
/linux-4.1.27/drivers/crypto/
H A Dtalitos.c61 talitos_ptr->eptr = upper_32_bits(dma_addr); to_talitos_ptr()
234 upper_32_bits(request->dma_desc)); talitos_submit()
/linux-4.1.27/drivers/net/wireless/rt2x00/
H A Drt2400pci.c1249 rx_high = upper_32_bits(tsf); rt2400pci_fill_rxdone()
/linux-4.1.27/sound/pci/ctxfi/
H A Dcthw20k1.c1278 ptp_phys_high = upper_32_bits(info->vm_pgt_phys); hw_trn_init()
H A Dcthw20k2.c1257 ptp_phys_high = upper_32_bits(info->vm_pgt_phys); hw_trn_init()
/linux-4.1.27/arch/x86/kvm/
H A Dsvm.c587 high = upper_32_bits(val); svm_init_erratum_383()
1838 high = upper_32_bits(value); is_erratum_383()
/linux-4.1.27/drivers/message/fusion/
H A Dmptbase.c1080 (upper_32_bits(dma_addr)); mpt_add_sge_64bit()
1102 tmp = (u32)(upper_32_bits(dma_addr)); mpt_add_sge_64bit_1078()
1164 tmp = (u32)(upper_32_bits(dma_addr)); mpt_add_chain_64bit()
/linux-4.1.27/drivers/net/ethernet/ti/
H A Dtlan.c218 tag->buffer[8].address = upper_32_bits(addr); tlan_store_skb()
/linux-4.1.27/drivers/net/ethernet/broadcom/genet/
H A Dbcmgenet.c99 __raw_writel(upper_32_bits(addr), d + DMA_DESC_ADDRESS_HI); dmadesc_set_addr()
/linux-4.1.27/drivers/scsi/arcmsr/
H A Darcmsr_hba.c3232 cdb_phyaddr_hi32 = upper_32_bits(dma_coherent_handle); arcmsr_iop_confirm()
/linux-4.1.27/drivers/block/
H A Dcciss.c3401 u32 upper32 = upper_32_bits(start_blk); do_cciss_request()

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