1/* 2 * Adaptec AAC series RAID controller driver 3 * (c) Copyright 2001 Red Hat Inc. 4 * 5 * based on the old aacraid driver that is.. 6 * Adaptec aacraid device driver for Linux. 7 * 8 * Copyright (c) 2000-2010 Adaptec, Inc. 9 * 2010 PMC-Sierra, Inc. (aacraid@pmc-sierra.com) 10 * 11 * This program is free software; you can redistribute it and/or modify 12 * it under the terms of the GNU General Public License as published by 13 * the Free Software Foundation; either version 2, or (at your option) 14 * any later version. 15 * 16 * This program is distributed in the hope that it will be useful, 17 * but WITHOUT ANY WARRANTY; without even the implied warranty of 18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 19 * GNU General Public License for more details. 20 * 21 * You should have received a copy of the GNU General Public License 22 * along with this program; see the file COPYING. If not, write to 23 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. 24 * 25 * Module Name: 26 * src.c 27 * 28 * Abstract: Hardware Device Interface for PMC SRC based controllers 29 * 30 */ 31 32#include <linux/kernel.h> 33#include <linux/init.h> 34#include <linux/types.h> 35#include <linux/pci.h> 36#include <linux/spinlock.h> 37#include <linux/slab.h> 38#include <linux/blkdev.h> 39#include <linux/delay.h> 40#include <linux/completion.h> 41#include <linux/time.h> 42#include <linux/interrupt.h> 43#include <scsi/scsi_host.h> 44 45#include "aacraid.h" 46 47static int aac_src_get_sync_status(struct aac_dev *dev); 48 49irqreturn_t aac_src_intr_message(int irq, void *dev_id) 50{ 51 struct aac_msix_ctx *ctx; 52 struct aac_dev *dev; 53 unsigned long bellbits, bellbits_shifted; 54 int vector_no; 55 int isFastResponse, mode; 56 u32 index, handle; 57 58 ctx = (struct aac_msix_ctx *)dev_id; 59 dev = ctx->dev; 60 vector_no = ctx->vector_no; 61 62 if (dev->msi_enabled) { 63 mode = AAC_INT_MODE_MSI; 64 if (vector_no == 0) { 65 bellbits = src_readl(dev, MUnit.ODR_MSI); 66 if (bellbits & 0x40000) 67 mode |= AAC_INT_MODE_AIF; 68 if (bellbits & 0x1000) 69 mode |= AAC_INT_MODE_SYNC; 70 } 71 } else { 72 mode = AAC_INT_MODE_INTX; 73 bellbits = src_readl(dev, MUnit.ODR_R); 74 if (bellbits & PmDoorBellResponseSent) { 75 bellbits = PmDoorBellResponseSent; 76 src_writel(dev, MUnit.ODR_C, bellbits); 77 src_readl(dev, MUnit.ODR_C); 78 } else { 79 bellbits_shifted = (bellbits >> SRC_ODR_SHIFT); 80 src_writel(dev, MUnit.ODR_C, bellbits); 81 src_readl(dev, MUnit.ODR_C); 82 83 if (bellbits_shifted & DoorBellAifPending) 84 mode |= AAC_INT_MODE_AIF; 85 else if (bellbits_shifted & OUTBOUNDDOORBELL_0) 86 mode |= AAC_INT_MODE_SYNC; 87 } 88 } 89 90 if (mode & AAC_INT_MODE_SYNC) { 91 unsigned long sflags; 92 struct list_head *entry; 93 int send_it = 0; 94 extern int aac_sync_mode; 95 96 if (!aac_sync_mode && !dev->msi_enabled) { 97 src_writel(dev, MUnit.ODR_C, bellbits); 98 src_readl(dev, MUnit.ODR_C); 99 } 100 101 if (dev->sync_fib) { 102 if (dev->sync_fib->callback) 103 dev->sync_fib->callback(dev->sync_fib->callback_data, 104 dev->sync_fib); 105 spin_lock_irqsave(&dev->sync_fib->event_lock, sflags); 106 if (dev->sync_fib->flags & FIB_CONTEXT_FLAG_WAIT) { 107 dev->management_fib_count--; 108 up(&dev->sync_fib->event_wait); 109 } 110 spin_unlock_irqrestore(&dev->sync_fib->event_lock, 111 sflags); 112 spin_lock_irqsave(&dev->sync_lock, sflags); 113 if (!list_empty(&dev->sync_fib_list)) { 114 entry = dev->sync_fib_list.next; 115 dev->sync_fib = list_entry(entry, 116 struct fib, 117 fiblink); 118 list_del(entry); 119 send_it = 1; 120 } else { 121 dev->sync_fib = NULL; 122 } 123 spin_unlock_irqrestore(&dev->sync_lock, sflags); 124 if (send_it) { 125 aac_adapter_sync_cmd(dev, SEND_SYNCHRONOUS_FIB, 126 (u32)dev->sync_fib->hw_fib_pa, 127 0, 0, 0, 0, 0, 128 NULL, NULL, NULL, NULL, NULL); 129 } 130 } 131 if (!dev->msi_enabled) 132 mode = 0; 133 134 } 135 136 if (mode & AAC_INT_MODE_AIF) { 137 /* handle AIF */ 138 aac_intr_normal(dev, 0, 2, 0, NULL); 139 if (dev->msi_enabled) 140 aac_src_access_devreg(dev, AAC_CLEAR_AIF_BIT); 141 mode = 0; 142 } 143 144 if (mode) { 145 index = dev->host_rrq_idx[vector_no]; 146 147 for (;;) { 148 isFastResponse = 0; 149 /* remove toggle bit (31) */ 150 handle = (dev->host_rrq[index] & 0x7fffffff); 151 /* check fast response bit (30) */ 152 if (handle & 0x40000000) 153 isFastResponse = 1; 154 handle &= 0x0000ffff; 155 if (handle == 0) 156 break; 157 if (dev->msi_enabled && dev->max_msix > 1) 158 atomic_dec(&dev->rrq_outstanding[vector_no]); 159 dev->host_rrq[index++] = 0; 160 aac_intr_normal(dev, handle-1, 0, isFastResponse, NULL); 161 if (index == (vector_no + 1) * dev->vector_cap) 162 index = vector_no * dev->vector_cap; 163 dev->host_rrq_idx[vector_no] = index; 164 } 165 mode = 0; 166 } 167 168 return IRQ_HANDLED; 169} 170 171/** 172 * aac_src_disable_interrupt - Disable interrupts 173 * @dev: Adapter 174 */ 175 176static void aac_src_disable_interrupt(struct aac_dev *dev) 177{ 178 src_writel(dev, MUnit.OIMR, dev->OIMR = 0xffffffff); 179} 180 181/** 182 * aac_src_enable_interrupt_message - Enable interrupts 183 * @dev: Adapter 184 */ 185 186static void aac_src_enable_interrupt_message(struct aac_dev *dev) 187{ 188 aac_src_access_devreg(dev, AAC_ENABLE_INTERRUPT); 189} 190 191/** 192 * src_sync_cmd - send a command and wait 193 * @dev: Adapter 194 * @command: Command to execute 195 * @p1: first parameter 196 * @ret: adapter status 197 * 198 * This routine will send a synchronous command to the adapter and wait 199 * for its completion. 200 */ 201 202static int src_sync_cmd(struct aac_dev *dev, u32 command, 203 u32 p1, u32 p2, u32 p3, u32 p4, u32 p5, u32 p6, 204 u32 *status, u32 * r1, u32 * r2, u32 * r3, u32 * r4) 205{ 206 unsigned long start; 207 unsigned long delay; 208 int ok; 209 210 /* 211 * Write the command into Mailbox 0 212 */ 213 writel(command, &dev->IndexRegs->Mailbox[0]); 214 /* 215 * Write the parameters into Mailboxes 1 - 6 216 */ 217 writel(p1, &dev->IndexRegs->Mailbox[1]); 218 writel(p2, &dev->IndexRegs->Mailbox[2]); 219 writel(p3, &dev->IndexRegs->Mailbox[3]); 220 writel(p4, &dev->IndexRegs->Mailbox[4]); 221 222 /* 223 * Clear the synch command doorbell to start on a clean slate. 224 */ 225 if (!dev->msi_enabled) 226 src_writel(dev, 227 MUnit.ODR_C, 228 OUTBOUNDDOORBELL_0 << SRC_ODR_SHIFT); 229 230 /* 231 * Disable doorbell interrupts 232 */ 233 src_writel(dev, MUnit.OIMR, dev->OIMR = 0xffffffff); 234 235 /* 236 * Force the completion of the mask register write before issuing 237 * the interrupt. 238 */ 239 src_readl(dev, MUnit.OIMR); 240 241 /* 242 * Signal that there is a new synch command 243 */ 244 src_writel(dev, MUnit.IDR, INBOUNDDOORBELL_0 << SRC_IDR_SHIFT); 245 246 if (!dev->sync_mode || command != SEND_SYNCHRONOUS_FIB) { 247 ok = 0; 248 start = jiffies; 249 250 if (command == IOP_RESET_ALWAYS) { 251 /* Wait up to 10 sec */ 252 delay = 10*HZ; 253 } else { 254 /* Wait up to 5 minutes */ 255 delay = 300*HZ; 256 } 257 while (time_before(jiffies, start+delay)) { 258 udelay(5); /* Delay 5 microseconds to let Mon960 get info. */ 259 /* 260 * Mon960 will set doorbell0 bit when it has completed the command. 261 */ 262 if (aac_src_get_sync_status(dev) & OUTBOUNDDOORBELL_0) { 263 /* 264 * Clear the doorbell. 265 */ 266 if (dev->msi_enabled) 267 aac_src_access_devreg(dev, 268 AAC_CLEAR_SYNC_BIT); 269 else 270 src_writel(dev, 271 MUnit.ODR_C, 272 OUTBOUNDDOORBELL_0 << SRC_ODR_SHIFT); 273 ok = 1; 274 break; 275 } 276 /* 277 * Yield the processor in case we are slow 278 */ 279 msleep(1); 280 } 281 if (unlikely(ok != 1)) { 282 /* 283 * Restore interrupt mask even though we timed out 284 */ 285 aac_adapter_enable_int(dev); 286 return -ETIMEDOUT; 287 } 288 /* 289 * Pull the synch status from Mailbox 0. 290 */ 291 if (status) 292 *status = readl(&dev->IndexRegs->Mailbox[0]); 293 if (r1) 294 *r1 = readl(&dev->IndexRegs->Mailbox[1]); 295 if (r2) 296 *r2 = readl(&dev->IndexRegs->Mailbox[2]); 297 if (r3) 298 *r3 = readl(&dev->IndexRegs->Mailbox[3]); 299 if (r4) 300 *r4 = readl(&dev->IndexRegs->Mailbox[4]); 301 if (command == GET_COMM_PREFERRED_SETTINGS) 302 dev->max_msix = 303 readl(&dev->IndexRegs->Mailbox[5]) & 0xFFFF; 304 /* 305 * Clear the synch command doorbell. 306 */ 307 if (!dev->msi_enabled) 308 src_writel(dev, 309 MUnit.ODR_C, 310 OUTBOUNDDOORBELL_0 << SRC_ODR_SHIFT); 311 } 312 313 /* 314 * Restore interrupt mask 315 */ 316 aac_adapter_enable_int(dev); 317 return 0; 318} 319 320/** 321 * aac_src_interrupt_adapter - interrupt adapter 322 * @dev: Adapter 323 * 324 * Send an interrupt to the i960 and breakpoint it. 325 */ 326 327static void aac_src_interrupt_adapter(struct aac_dev *dev) 328{ 329 src_sync_cmd(dev, BREAKPOINT_REQUEST, 330 0, 0, 0, 0, 0, 0, 331 NULL, NULL, NULL, NULL, NULL); 332} 333 334/** 335 * aac_src_notify_adapter - send an event to the adapter 336 * @dev: Adapter 337 * @event: Event to send 338 * 339 * Notify the i960 that something it probably cares about has 340 * happened. 341 */ 342 343static void aac_src_notify_adapter(struct aac_dev *dev, u32 event) 344{ 345 switch (event) { 346 347 case AdapNormCmdQue: 348 src_writel(dev, MUnit.ODR_C, 349 INBOUNDDOORBELL_1 << SRC_ODR_SHIFT); 350 break; 351 case HostNormRespNotFull: 352 src_writel(dev, MUnit.ODR_C, 353 INBOUNDDOORBELL_4 << SRC_ODR_SHIFT); 354 break; 355 case AdapNormRespQue: 356 src_writel(dev, MUnit.ODR_C, 357 INBOUNDDOORBELL_2 << SRC_ODR_SHIFT); 358 break; 359 case HostNormCmdNotFull: 360 src_writel(dev, MUnit.ODR_C, 361 INBOUNDDOORBELL_3 << SRC_ODR_SHIFT); 362 break; 363 case FastIo: 364 src_writel(dev, MUnit.ODR_C, 365 INBOUNDDOORBELL_6 << SRC_ODR_SHIFT); 366 break; 367 case AdapPrintfDone: 368 src_writel(dev, MUnit.ODR_C, 369 INBOUNDDOORBELL_5 << SRC_ODR_SHIFT); 370 break; 371 default: 372 BUG(); 373 break; 374 } 375} 376 377/** 378 * aac_src_start_adapter - activate adapter 379 * @dev: Adapter 380 * 381 * Start up processing on an i960 based AAC adapter 382 */ 383 384static void aac_src_start_adapter(struct aac_dev *dev) 385{ 386 struct aac_init *init; 387 int i; 388 389 /* reset host_rrq_idx first */ 390 for (i = 0; i < dev->max_msix; i++) { 391 dev->host_rrq_idx[i] = i * dev->vector_cap; 392 atomic_set(&dev->rrq_outstanding[i], 0); 393 } 394 dev->fibs_pushed_no = 0; 395 396 init = dev->init; 397 init->HostElapsedSeconds = cpu_to_le32(get_seconds()); 398 399 /* We can only use a 32 bit address here */ 400 src_sync_cmd(dev, INIT_STRUCT_BASE_ADDRESS, (u32)(ulong)dev->init_pa, 401 0, 0, 0, 0, 0, NULL, NULL, NULL, NULL, NULL); 402} 403 404/** 405 * aac_src_check_health 406 * @dev: device to check if healthy 407 * 408 * Will attempt to determine if the specified adapter is alive and 409 * capable of handling requests, returning 0 if alive. 410 */ 411static int aac_src_check_health(struct aac_dev *dev) 412{ 413 u32 status = src_readl(dev, MUnit.OMR); 414 415 /* 416 * Check to see if the board failed any self tests. 417 */ 418 if (unlikely(status & SELF_TEST_FAILED)) 419 return -1; 420 421 /* 422 * Check to see if the board panic'd. 423 */ 424 if (unlikely(status & KERNEL_PANIC)) 425 return (status >> 16) & 0xFF; 426 /* 427 * Wait for the adapter to be up and running. 428 */ 429 if (unlikely(!(status & KERNEL_UP_AND_RUNNING))) 430 return -3; 431 /* 432 * Everything is OK 433 */ 434 return 0; 435} 436 437/** 438 * aac_src_deliver_message 439 * @fib: fib to issue 440 * 441 * Will send a fib, returning 0 if successful. 442 */ 443static int aac_src_deliver_message(struct fib *fib) 444{ 445 struct aac_dev *dev = fib->dev; 446 struct aac_queue *q = &dev->queues->queue[AdapNormCmdQueue]; 447 u32 fibsize; 448 dma_addr_t address; 449 struct aac_fib_xporthdr *pFibX; 450 u16 hdr_size = le16_to_cpu(fib->hw_fib_va->header.Size); 451 u16 vector_no; 452 453 atomic_inc(&q->numpending); 454 455 if (dev->msi_enabled && fib->hw_fib_va->header.Command != AifRequest && 456 dev->max_msix > 1) { 457 vector_no = fib->vector_no; 458 fib->hw_fib_va->header.Handle += (vector_no << 16); 459 } else { 460 vector_no = 0; 461 } 462 463 atomic_inc(&dev->rrq_outstanding[vector_no]); 464 465 if (dev->comm_interface == AAC_COMM_MESSAGE_TYPE2) { 466 /* Calculate the amount to the fibsize bits */ 467 fibsize = (hdr_size + 127) / 128 - 1; 468 if (fibsize > (ALIGN32 - 1)) 469 return -EMSGSIZE; 470 /* New FIB header, 32-bit */ 471 address = fib->hw_fib_pa; 472 fib->hw_fib_va->header.StructType = FIB_MAGIC2; 473 fib->hw_fib_va->header.SenderFibAddress = (u32)address; 474 fib->hw_fib_va->header.u.TimeStamp = 0; 475 BUG_ON(upper_32_bits(address) != 0L); 476 address |= fibsize; 477 } else { 478 /* Calculate the amount to the fibsize bits */ 479 fibsize = (sizeof(struct aac_fib_xporthdr) + hdr_size + 127) / 128 - 1; 480 if (fibsize > (ALIGN32 - 1)) 481 return -EMSGSIZE; 482 483 /* Fill XPORT header */ 484 pFibX = (void *)fib->hw_fib_va - sizeof(struct aac_fib_xporthdr); 485 pFibX->Handle = cpu_to_le32(fib->hw_fib_va->header.Handle); 486 pFibX->HostAddress = cpu_to_le64(fib->hw_fib_pa); 487 pFibX->Size = cpu_to_le32(hdr_size); 488 489 /* 490 * The xport header has been 32-byte aligned for us so that fibsize 491 * can be masked out of this address by hardware. -- BenC 492 */ 493 address = fib->hw_fib_pa - sizeof(struct aac_fib_xporthdr); 494 if (address & (ALIGN32 - 1)) 495 return -EINVAL; 496 address |= fibsize; 497 } 498 499 src_writel(dev, MUnit.IQ_H, upper_32_bits(address) & 0xffffffff); 500 src_writel(dev, MUnit.IQ_L, address & 0xffffffff); 501 502 return 0; 503} 504 505/** 506 * aac_src_ioremap 507 * @size: mapping resize request 508 * 509 */ 510static int aac_src_ioremap(struct aac_dev *dev, u32 size) 511{ 512 if (!size) { 513 iounmap(dev->regs.src.bar1); 514 dev->regs.src.bar1 = NULL; 515 iounmap(dev->regs.src.bar0); 516 dev->base = dev->regs.src.bar0 = NULL; 517 return 0; 518 } 519 dev->regs.src.bar1 = ioremap(pci_resource_start(dev->pdev, 2), 520 AAC_MIN_SRC_BAR1_SIZE); 521 dev->base = NULL; 522 if (dev->regs.src.bar1 == NULL) 523 return -1; 524 dev->base = dev->regs.src.bar0 = ioremap(dev->base_start, size); 525 if (dev->base == NULL) { 526 iounmap(dev->regs.src.bar1); 527 dev->regs.src.bar1 = NULL; 528 return -1; 529 } 530 dev->IndexRegs = &((struct src_registers __iomem *) 531 dev->base)->u.tupelo.IndexRegs; 532 return 0; 533} 534 535/** 536 * aac_srcv_ioremap 537 * @size: mapping resize request 538 * 539 */ 540static int aac_srcv_ioremap(struct aac_dev *dev, u32 size) 541{ 542 if (!size) { 543 iounmap(dev->regs.src.bar0); 544 dev->base = dev->regs.src.bar0 = NULL; 545 return 0; 546 } 547 dev->base = dev->regs.src.bar0 = ioremap(dev->base_start, size); 548 if (dev->base == NULL) 549 return -1; 550 dev->IndexRegs = &((struct src_registers __iomem *) 551 dev->base)->u.denali.IndexRegs; 552 return 0; 553} 554 555static int aac_src_restart_adapter(struct aac_dev *dev, int bled) 556{ 557 u32 var, reset_mask; 558 559 if (bled >= 0) { 560 if (bled) 561 printk(KERN_ERR "%s%d: adapter kernel panic'd %x.\n", 562 dev->name, dev->id, bled); 563 dev->a_ops.adapter_enable_int = aac_src_disable_interrupt; 564 bled = aac_adapter_sync_cmd(dev, IOP_RESET_ALWAYS, 565 0, 0, 0, 0, 0, 0, &var, &reset_mask, NULL, NULL, NULL); 566 if ((bled || (var != 0x00000001)) && 567 !dev->doorbell_mask) 568 return -EINVAL; 569 else if (dev->doorbell_mask) { 570 reset_mask = dev->doorbell_mask; 571 bled = 0; 572 var = 0x00000001; 573 } 574 575 if ((dev->pdev->device == PMC_DEVICE_S7 || 576 dev->pdev->device == PMC_DEVICE_S8 || 577 dev->pdev->device == PMC_DEVICE_S9) && dev->msi_enabled) { 578 aac_src_access_devreg(dev, AAC_ENABLE_INTX); 579 dev->msi_enabled = 0; 580 msleep(5000); /* Delay 5 seconds */ 581 } 582 583 if (!bled && (dev->supplement_adapter_info.SupportedOptions2 & 584 AAC_OPTION_DOORBELL_RESET)) { 585 src_writel(dev, MUnit.IDR, reset_mask); 586 ssleep(45); 587 } else { 588 src_writel(dev, MUnit.IDR, 0x100); 589 ssleep(45); 590 } 591 } 592 593 if (src_readl(dev, MUnit.OMR) & KERNEL_PANIC) 594 return -ENODEV; 595 596 if (startup_timeout < 300) 597 startup_timeout = 300; 598 599 return 0; 600} 601 602/** 603 * aac_src_select_comm - Select communications method 604 * @dev: Adapter 605 * @comm: communications method 606 */ 607int aac_src_select_comm(struct aac_dev *dev, int comm) 608{ 609 switch (comm) { 610 case AAC_COMM_MESSAGE: 611 dev->a_ops.adapter_intr = aac_src_intr_message; 612 dev->a_ops.adapter_deliver = aac_src_deliver_message; 613 break; 614 default: 615 return 1; 616 } 617 return 0; 618} 619 620/** 621 * aac_src_init - initialize an Cardinal Frey Bar card 622 * @dev: device to configure 623 * 624 */ 625 626int aac_src_init(struct aac_dev *dev) 627{ 628 unsigned long start; 629 unsigned long status; 630 int restart = 0; 631 int instance = dev->id; 632 const char *name = dev->name; 633 634 dev->a_ops.adapter_ioremap = aac_src_ioremap; 635 dev->a_ops.adapter_comm = aac_src_select_comm; 636 637 dev->base_size = AAC_MIN_SRC_BAR0_SIZE; 638 if (aac_adapter_ioremap(dev, dev->base_size)) { 639 printk(KERN_WARNING "%s: unable to map adapter.\n", name); 640 goto error_iounmap; 641 } 642 643 /* Failure to reset here is an option ... */ 644 dev->a_ops.adapter_sync_cmd = src_sync_cmd; 645 dev->a_ops.adapter_enable_int = aac_src_disable_interrupt; 646 if ((aac_reset_devices || reset_devices) && 647 !aac_src_restart_adapter(dev, 0)) 648 ++restart; 649 /* 650 * Check to see if the board panic'd while booting. 651 */ 652 status = src_readl(dev, MUnit.OMR); 653 if (status & KERNEL_PANIC) { 654 if (aac_src_restart_adapter(dev, aac_src_check_health(dev))) 655 goto error_iounmap; 656 ++restart; 657 } 658 /* 659 * Check to see if the board failed any self tests. 660 */ 661 status = src_readl(dev, MUnit.OMR); 662 if (status & SELF_TEST_FAILED) { 663 printk(KERN_ERR "%s%d: adapter self-test failed.\n", 664 dev->name, instance); 665 goto error_iounmap; 666 } 667 /* 668 * Check to see if the monitor panic'd while booting. 669 */ 670 if (status & MONITOR_PANIC) { 671 printk(KERN_ERR "%s%d: adapter monitor panic.\n", 672 dev->name, instance); 673 goto error_iounmap; 674 } 675 start = jiffies; 676 /* 677 * Wait for the adapter to be up and running. Wait up to 3 minutes 678 */ 679 while (!((status = src_readl(dev, MUnit.OMR)) & 680 KERNEL_UP_AND_RUNNING)) { 681 if ((restart && 682 (status & (KERNEL_PANIC|SELF_TEST_FAILED|MONITOR_PANIC))) || 683 time_after(jiffies, start+HZ*startup_timeout)) { 684 printk(KERN_ERR "%s%d: adapter kernel failed to start, init status = %lx.\n", 685 dev->name, instance, status); 686 goto error_iounmap; 687 } 688 if (!restart && 689 ((status & (KERNEL_PANIC|SELF_TEST_FAILED|MONITOR_PANIC)) || 690 time_after(jiffies, start + HZ * 691 ((startup_timeout > 60) 692 ? (startup_timeout - 60) 693 : (startup_timeout / 2))))) { 694 if (likely(!aac_src_restart_adapter(dev, 695 aac_src_check_health(dev)))) 696 start = jiffies; 697 ++restart; 698 } 699 msleep(1); 700 } 701 if (restart && aac_commit) 702 aac_commit = 1; 703 /* 704 * Fill in the common function dispatch table. 705 */ 706 dev->a_ops.adapter_interrupt = aac_src_interrupt_adapter; 707 dev->a_ops.adapter_disable_int = aac_src_disable_interrupt; 708 dev->a_ops.adapter_enable_int = aac_src_disable_interrupt; 709 dev->a_ops.adapter_notify = aac_src_notify_adapter; 710 dev->a_ops.adapter_sync_cmd = src_sync_cmd; 711 dev->a_ops.adapter_check_health = aac_src_check_health; 712 dev->a_ops.adapter_restart = aac_src_restart_adapter; 713 714 /* 715 * First clear out all interrupts. Then enable the one's that we 716 * can handle. 717 */ 718 aac_adapter_comm(dev, AAC_COMM_MESSAGE); 719 aac_adapter_disable_int(dev); 720 src_writel(dev, MUnit.ODR_C, 0xffffffff); 721 aac_adapter_enable_int(dev); 722 723 if (aac_init_adapter(dev) == NULL) 724 goto error_iounmap; 725 if (dev->comm_interface != AAC_COMM_MESSAGE_TYPE1) 726 goto error_iounmap; 727 728 dev->msi = aac_msi && !pci_enable_msi(dev->pdev); 729 730 dev->aac_msix[0].vector_no = 0; 731 dev->aac_msix[0].dev = dev; 732 733 if (request_irq(dev->pdev->irq, dev->a_ops.adapter_intr, 734 IRQF_SHARED, "aacraid", &(dev->aac_msix[0])) < 0) { 735 736 if (dev->msi) 737 pci_disable_msi(dev->pdev); 738 739 printk(KERN_ERR "%s%d: Interrupt unavailable.\n", 740 name, instance); 741 goto error_iounmap; 742 } 743 dev->dbg_base = pci_resource_start(dev->pdev, 2); 744 dev->dbg_base_mapped = dev->regs.src.bar1; 745 dev->dbg_size = AAC_MIN_SRC_BAR1_SIZE; 746 dev->a_ops.adapter_enable_int = aac_src_enable_interrupt_message; 747 748 aac_adapter_enable_int(dev); 749 750 if (!dev->sync_mode) { 751 /* 752 * Tell the adapter that all is configured, and it can 753 * start accepting requests 754 */ 755 aac_src_start_adapter(dev); 756 } 757 return 0; 758 759error_iounmap: 760 761 return -1; 762} 763 764/** 765 * aac_srcv_init - initialize an SRCv card 766 * @dev: device to configure 767 * 768 */ 769 770int aac_srcv_init(struct aac_dev *dev) 771{ 772 unsigned long start; 773 unsigned long status; 774 int restart = 0; 775 int instance = dev->id; 776 int i, j; 777 const char *name = dev->name; 778 int cpu; 779 780 dev->a_ops.adapter_ioremap = aac_srcv_ioremap; 781 dev->a_ops.adapter_comm = aac_src_select_comm; 782 783 dev->base_size = AAC_MIN_SRCV_BAR0_SIZE; 784 if (aac_adapter_ioremap(dev, dev->base_size)) { 785 printk(KERN_WARNING "%s: unable to map adapter.\n", name); 786 goto error_iounmap; 787 } 788 789 /* Failure to reset here is an option ... */ 790 dev->a_ops.adapter_sync_cmd = src_sync_cmd; 791 dev->a_ops.adapter_enable_int = aac_src_disable_interrupt; 792 if ((aac_reset_devices || reset_devices) && 793 !aac_src_restart_adapter(dev, 0)) 794 ++restart; 795 /* 796 * Check to see if flash update is running. 797 * Wait for the adapter to be up and running. Wait up to 5 minutes 798 */ 799 status = src_readl(dev, MUnit.OMR); 800 if (status & FLASH_UPD_PENDING) { 801 start = jiffies; 802 do { 803 status = src_readl(dev, MUnit.OMR); 804 if (time_after(jiffies, start+HZ*FWUPD_TIMEOUT)) { 805 printk(KERN_ERR "%s%d: adapter flash update failed.\n", 806 dev->name, instance); 807 goto error_iounmap; 808 } 809 } while (!(status & FLASH_UPD_SUCCESS) && 810 !(status & FLASH_UPD_FAILED)); 811 /* Delay 10 seconds. 812 * Because right now FW is doing a soft reset, 813 * do not read scratch pad register at this time 814 */ 815 ssleep(10); 816 } 817 /* 818 * Check to see if the board panic'd while booting. 819 */ 820 status = src_readl(dev, MUnit.OMR); 821 if (status & KERNEL_PANIC) { 822 if (aac_src_restart_adapter(dev, aac_src_check_health(dev))) 823 goto error_iounmap; 824 ++restart; 825 } 826 /* 827 * Check to see if the board failed any self tests. 828 */ 829 status = src_readl(dev, MUnit.OMR); 830 if (status & SELF_TEST_FAILED) { 831 printk(KERN_ERR "%s%d: adapter self-test failed.\n", dev->name, instance); 832 goto error_iounmap; 833 } 834 /* 835 * Check to see if the monitor panic'd while booting. 836 */ 837 if (status & MONITOR_PANIC) { 838 printk(KERN_ERR "%s%d: adapter monitor panic.\n", dev->name, instance); 839 goto error_iounmap; 840 } 841 start = jiffies; 842 /* 843 * Wait for the adapter to be up and running. Wait up to 3 minutes 844 */ 845 while (!((status = src_readl(dev, MUnit.OMR)) & 846 KERNEL_UP_AND_RUNNING) || 847 status == 0xffffffff) { 848 if ((restart && 849 (status & (KERNEL_PANIC|SELF_TEST_FAILED|MONITOR_PANIC))) || 850 time_after(jiffies, start+HZ*startup_timeout)) { 851 printk(KERN_ERR "%s%d: adapter kernel failed to start, init status = %lx.\n", 852 dev->name, instance, status); 853 goto error_iounmap; 854 } 855 if (!restart && 856 ((status & (KERNEL_PANIC|SELF_TEST_FAILED|MONITOR_PANIC)) || 857 time_after(jiffies, start + HZ * 858 ((startup_timeout > 60) 859 ? (startup_timeout - 60) 860 : (startup_timeout / 2))))) { 861 if (likely(!aac_src_restart_adapter(dev, aac_src_check_health(dev)))) 862 start = jiffies; 863 ++restart; 864 } 865 msleep(1); 866 } 867 if (restart && aac_commit) 868 aac_commit = 1; 869 /* 870 * Fill in the common function dispatch table. 871 */ 872 dev->a_ops.adapter_interrupt = aac_src_interrupt_adapter; 873 dev->a_ops.adapter_disable_int = aac_src_disable_interrupt; 874 dev->a_ops.adapter_enable_int = aac_src_disable_interrupt; 875 dev->a_ops.adapter_notify = aac_src_notify_adapter; 876 dev->a_ops.adapter_sync_cmd = src_sync_cmd; 877 dev->a_ops.adapter_check_health = aac_src_check_health; 878 dev->a_ops.adapter_restart = aac_src_restart_adapter; 879 880 /* 881 * First clear out all interrupts. Then enable the one's that we 882 * can handle. 883 */ 884 aac_adapter_comm(dev, AAC_COMM_MESSAGE); 885 aac_adapter_disable_int(dev); 886 src_writel(dev, MUnit.ODR_C, 0xffffffff); 887 aac_adapter_enable_int(dev); 888 889 if (aac_init_adapter(dev) == NULL) 890 goto error_iounmap; 891 if (dev->comm_interface != AAC_COMM_MESSAGE_TYPE2) 892 goto error_iounmap; 893 if (dev->msi_enabled) 894 aac_src_access_devreg(dev, AAC_ENABLE_MSIX); 895 if (!dev->sync_mode && dev->msi_enabled && dev->max_msix > 1) { 896 cpu = cpumask_first(cpu_online_mask); 897 for (i = 0; i < dev->max_msix; i++) { 898 dev->aac_msix[i].vector_no = i; 899 dev->aac_msix[i].dev = dev; 900 901 if (request_irq(dev->msixentry[i].vector, 902 dev->a_ops.adapter_intr, 903 0, 904 "aacraid", 905 &(dev->aac_msix[i]))) { 906 printk(KERN_ERR "%s%d: Failed to register IRQ for vector %d.\n", 907 name, instance, i); 908 for (j = 0 ; j < i ; j++) 909 free_irq(dev->msixentry[j].vector, 910 &(dev->aac_msix[j])); 911 pci_disable_msix(dev->pdev); 912 goto error_iounmap; 913 } 914 if (irq_set_affinity_hint( 915 dev->msixentry[i].vector, 916 get_cpu_mask(cpu))) { 917 printk(KERN_ERR "%s%d: Failed to set IRQ affinity for cpu %d\n", 918 name, instance, cpu); 919 } 920 cpu = cpumask_next(cpu, cpu_online_mask); 921 } 922 } else { 923 dev->aac_msix[0].vector_no = 0; 924 dev->aac_msix[0].dev = dev; 925 926 if (request_irq(dev->pdev->irq, dev->a_ops.adapter_intr, 927 IRQF_SHARED, 928 "aacraid", 929 &(dev->aac_msix[0])) < 0) { 930 if (dev->msi) 931 pci_disable_msi(dev->pdev); 932 printk(KERN_ERR "%s%d: Interrupt unavailable.\n", 933 name, instance); 934 goto error_iounmap; 935 } 936 } 937 dev->dbg_base = dev->base_start; 938 dev->dbg_base_mapped = dev->base; 939 dev->dbg_size = dev->base_size; 940 dev->a_ops.adapter_enable_int = aac_src_enable_interrupt_message; 941 942 aac_adapter_enable_int(dev); 943 944 if (!dev->sync_mode) { 945 /* 946 * Tell the adapter that all is configured, and it can 947 * start accepting requests 948 */ 949 aac_src_start_adapter(dev); 950 } 951 return 0; 952 953error_iounmap: 954 955 return -1; 956} 957 958void aac_src_access_devreg(struct aac_dev *dev, int mode) 959{ 960 u_int32_t val; 961 962 switch (mode) { 963 case AAC_ENABLE_INTERRUPT: 964 src_writel(dev, 965 MUnit.OIMR, 966 dev->OIMR = (dev->msi_enabled ? 967 AAC_INT_ENABLE_TYPE1_MSIX : 968 AAC_INT_ENABLE_TYPE1_INTX)); 969 break; 970 971 case AAC_DISABLE_INTERRUPT: 972 src_writel(dev, 973 MUnit.OIMR, 974 dev->OIMR = AAC_INT_DISABLE_ALL); 975 break; 976 977 case AAC_ENABLE_MSIX: 978 /* set bit 6 */ 979 val = src_readl(dev, MUnit.IDR); 980 val |= 0x40; 981 src_writel(dev, MUnit.IDR, val); 982 src_readl(dev, MUnit.IDR); 983 /* unmask int. */ 984 val = PMC_ALL_INTERRUPT_BITS; 985 src_writel(dev, MUnit.IOAR, val); 986 val = src_readl(dev, MUnit.OIMR); 987 src_writel(dev, 988 MUnit.OIMR, 989 val & (~(PMC_GLOBAL_INT_BIT2 | PMC_GLOBAL_INT_BIT0))); 990 break; 991 992 case AAC_DISABLE_MSIX: 993 /* reset bit 6 */ 994 val = src_readl(dev, MUnit.IDR); 995 val &= ~0x40; 996 src_writel(dev, MUnit.IDR, val); 997 src_readl(dev, MUnit.IDR); 998 break; 999 1000 case AAC_CLEAR_AIF_BIT: 1001 /* set bit 5 */ 1002 val = src_readl(dev, MUnit.IDR); 1003 val |= 0x20; 1004 src_writel(dev, MUnit.IDR, val); 1005 src_readl(dev, MUnit.IDR); 1006 break; 1007 1008 case AAC_CLEAR_SYNC_BIT: 1009 /* set bit 4 */ 1010 val = src_readl(dev, MUnit.IDR); 1011 val |= 0x10; 1012 src_writel(dev, MUnit.IDR, val); 1013 src_readl(dev, MUnit.IDR); 1014 break; 1015 1016 case AAC_ENABLE_INTX: 1017 /* set bit 7 */ 1018 val = src_readl(dev, MUnit.IDR); 1019 val |= 0x80; 1020 src_writel(dev, MUnit.IDR, val); 1021 src_readl(dev, MUnit.IDR); 1022 /* unmask int. */ 1023 val = PMC_ALL_INTERRUPT_BITS; 1024 src_writel(dev, MUnit.IOAR, val); 1025 src_readl(dev, MUnit.IOAR); 1026 val = src_readl(dev, MUnit.OIMR); 1027 src_writel(dev, MUnit.OIMR, 1028 val & (~(PMC_GLOBAL_INT_BIT2))); 1029 break; 1030 1031 default: 1032 break; 1033 } 1034} 1035 1036static int aac_src_get_sync_status(struct aac_dev *dev) 1037{ 1038 1039 int val; 1040 1041 if (dev->msi_enabled) 1042 val = src_readl(dev, MUnit.ODR_MSI) & 0x1000 ? 1 : 0; 1043 else 1044 val = src_readl(dev, MUnit.ODR_R) >> SRC_ODR_SHIFT; 1045 1046 return val; 1047} 1048