1845 		ib[idx + 1] = (tmp & 0xffffff00) | (upper_32_bits(offset) & 0xff);  in evergreen_packet3_check()
1891 		ib[idx+1] = upper_32_bits(offset) & 0xff;  in evergreen_packet3_check()
1926 		ib[idx+1] = upper_32_bits(offset) & 0xff;  in evergreen_packet3_check()
1954 		ib[idx+2] = upper_32_bits(offset) & 0xff;  in evergreen_packet3_check()
2047 		ib[idx+2] = upper_32_bits(reloc->gpu_offset) & 0xff;  in evergreen_packet3_check()
2127 			ib[idx+2] = upper_32_bits(offset) & 0xff;  in evergreen_packet3_check()
2188 				ib[idx+1] = (ib[idx+1] & 0xffffff00) | (upper_32_bits(offset) & 0xff);  in evergreen_packet3_check()
2226 				ib[idx+3] = upper_32_bits(offset) & 0xff;  in evergreen_packet3_check()
2268 			ib[idx+2] = upper_32_bits(offset) & 0xff;  in evergreen_packet3_check()
2290 		ib[idx+2] = (ib[idx+2] & 0xffffff00) | (upper_32_bits(offset) & 0xff);  in evergreen_packet3_check()
2312 		ib[idx+2] = (ib[idx+2] & 0xffffff00) | (upper_32_bits(offset) & 0xff);  in evergreen_packet3_check()
2440 						    (upper_32_bits(offset64) & 0xff);  in evergreen_packet3_check()
2520 			ib[idx+2] = upper_32_bits(offset) & 0xff;  in evergreen_packet3_check()
2539 			ib[idx+4] = upper_32_bits(offset) & 0xff;  in evergreen_packet3_check()
2568 		ib[idx+1] = upper_32_bits(offset) & 0xff;  in evergreen_packet3_check()
2593 			ib[idx+2] = upper_32_bits(offset) & 0xff;  in evergreen_packet3_check()
2617 			ib[idx+4] = upper_32_bits(offset) & 0xff;  in evergreen_packet3_check()
2799 				ib[idx+2] += upper_32_bits(dst_reloc->gpu_offset) & 0xff;  in evergreen_dma_cs_parse()
2843 				ib[idx+3] += upper_32_bits(dst_reloc->gpu_offset) & 0xff;  in evergreen_dma_cs_parse()
2844 				ib[idx+4] += upper_32_bits(src_reloc->gpu_offset) & 0xff;  in evergreen_dma_cs_parse()
2859 					ib[idx+8] += upper_32_bits(dst_reloc->gpu_offset) & 0xff;  in evergreen_dma_cs_parse()
2865 					ib[idx+8] += upper_32_bits(src_reloc->gpu_offset) & 0xff;  in evergreen_dma_cs_parse()
2902 				ib[idx+3] += upper_32_bits(dst_reloc->gpu_offset) & 0xff;  in evergreen_dma_cs_parse()
2903 				ib[idx+4] += upper_32_bits(src_reloc->gpu_offset) & 0xff;  in evergreen_dma_cs_parse()
2914 				ib[idx+2] += upper_32_bits(src_reloc->gpu_offset) & 0xff;  in evergreen_dma_cs_parse()
2916 				ib[idx+5] += upper_32_bits(dst_reloc->gpu_offset) & 0xff;  in evergreen_dma_cs_parse()
2952 				ib[idx+4] += upper_32_bits(dst_reloc->gpu_offset) & 0xff;  in evergreen_dma_cs_parse()
2953 				ib[idx+5] += upper_32_bits(dst2_reloc->gpu_offset) & 0xff;  in evergreen_dma_cs_parse()
2954 				ib[idx+6] += upper_32_bits(src_reloc->gpu_offset) & 0xff;  in evergreen_dma_cs_parse()
2992 				ib[idx+9] += upper_32_bits(src_reloc->gpu_offset) & 0xff;  in evergreen_dma_cs_parse()
3008 					ib[idx+8] += upper_32_bits(dst_reloc->gpu_offset) & 0xff;  in evergreen_dma_cs_parse()
3012 					ib[idx+8] += upper_32_bits(src_reloc->gpu_offset) & 0xff;  in evergreen_dma_cs_parse()
3054 				ib[idx+9] += upper_32_bits(src_reloc->gpu_offset) & 0xff;  in evergreen_dma_cs_parse()
3070 					ib[idx+8] += upper_32_bits(dst_reloc->gpu_offset) & 0xff;  in evergreen_dma_cs_parse()
3076 					ib[idx+8] += upper_32_bits(src_reloc->gpu_offset) & 0xff;  in evergreen_dma_cs_parse()
3141 				ib[idx+9] += upper_32_bits(src_reloc->gpu_offset) & 0xff;  in evergreen_dma_cs_parse()
3163 			ib[idx+3] += (upper_32_bits(dst_reloc->gpu_offset) << 16) & 0x00ff0000;  in evergreen_dma_cs_parse()