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Searched refs:reg_val (Results 1 – 160 of 160) sorted by relevance

/linux-4.1.27/drivers/net/ethernet/samsung/sxgbe/
Dsxgbe_mtl.c26 u32 reg_val; in sxgbe_mtl_init() local
28 reg_val = readl(ioaddr + SXGBE_MTL_OP_MODE_REG); in sxgbe_mtl_init()
29 reg_val &= ETS_RST; in sxgbe_mtl_init()
34 reg_val &= ETS_WRR; in sxgbe_mtl_init()
37 reg_val |= ETS_WFQ; in sxgbe_mtl_init()
40 reg_val |= ETS_DWRR; in sxgbe_mtl_init()
43 writel(reg_val, ioaddr + SXGBE_MTL_OP_MODE_REG); in sxgbe_mtl_init()
47 reg_val &= RAA_SP; in sxgbe_mtl_init()
50 reg_val |= RAA_WSP; in sxgbe_mtl_init()
53 writel(reg_val, ioaddr + SXGBE_MTL_OP_MODE_REG); in sxgbe_mtl_init()
[all …]
Dsxgbe_dma.c26 u32 reg_val; in sxgbe_dma_init() local
28 reg_val = readl(ioaddr + SXGBE_DMA_SYSBUS_MODE_REG); in sxgbe_dma_init()
36 reg_val |= SXGBE_DMA_AXI_UNDEF_BURST; in sxgbe_dma_init()
39 reg_val |= (burst_map << SXGBE_DMA_BLENMAP_LSHIFT); in sxgbe_dma_init()
41 writel(reg_val, ioaddr + SXGBE_DMA_SYSBUS_MODE_REG); in sxgbe_dma_init()
50 u32 reg_val; in sxgbe_dma_channel_init() local
53 reg_val = readl(ioaddr + SXGBE_DMA_CHA_CTL_REG(cha_num)); in sxgbe_dma_channel_init()
56 reg_val |= SXGBE_DMA_PBL_X8MODE; in sxgbe_dma_channel_init()
57 writel(reg_val, ioaddr + SXGBE_DMA_CHA_CTL_REG(cha_num)); in sxgbe_dma_channel_init()
59 reg_val = readl(ioaddr + SXGBE_DMA_CHA_TXCTL_REG(cha_num)); in sxgbe_dma_channel_init()
[all …]
Dsxgbe_core.c170 u32 reg_val; in sxgbe_core_enable_rxqueue() local
172 reg_val = readl(ioaddr + SXGBE_CORE_RX_CTL0_REG); in sxgbe_core_enable_rxqueue()
173 reg_val &= ~(SXGBE_CORE_RXQ_ENABLE_MASK << queue_num); in sxgbe_core_enable_rxqueue()
174 reg_val |= SXGBE_CORE_RXQ_ENABLE; in sxgbe_core_enable_rxqueue()
175 writel(reg_val, ioaddr + SXGBE_CORE_RX_CTL0_REG); in sxgbe_core_enable_rxqueue()
180 u32 reg_val; in sxgbe_core_disable_rxqueue() local
182 reg_val = readl(ioaddr + SXGBE_CORE_RX_CTL0_REG); in sxgbe_core_disable_rxqueue()
183 reg_val &= ~(SXGBE_CORE_RXQ_ENABLE_MASK << queue_num); in sxgbe_core_disable_rxqueue()
184 reg_val |= SXGBE_CORE_RXQ_DISABLE; in sxgbe_core_disable_rxqueue()
185 writel(reg_val, ioaddr + SXGBE_CORE_RX_CTL0_REG); in sxgbe_core_disable_rxqueue()
Dsxgbe_ethtool.c387 u32 reg_val = 0; in sxgbe_set_rss_hash_opt() local
404 reg_val = SXGBE_CORE_RSS_CTL_TCP4TE; in sxgbe_set_rss_hash_opt()
413 reg_val = SXGBE_CORE_RSS_CTL_UDP4TE; in sxgbe_set_rss_hash_opt()
430 reg_val = SXGBE_CORE_RSS_CTL_IP2TE; in sxgbe_set_rss_hash_opt()
437 reg_val |= readl(priv->ioaddr + SXGBE_CORE_RSS_CTL_REG); in sxgbe_set_rss_hash_opt()
438 writel(reg_val, priv->ioaddr + SXGBE_CORE_RSS_CTL_REG); in sxgbe_set_rss_hash_opt()
/linux-4.1.27/arch/arm/mach-iop13xx/
Dpci.c559 u32 reg_val; in iop13xx_atue_setup() local
605 reg_val = __raw_readl(IOP13XX_ATUE_OIOBAR); in iop13xx_atue_setup()
606 reg_val &= ~0x7; in iop13xx_atue_setup()
607 reg_val |= func; in iop13xx_atue_setup()
608 __raw_writel(reg_val, IOP13XX_ATUE_OIOBAR); in iop13xx_atue_setup()
612 reg_val = __raw_readl(IOP13XX_ATUE_OUMBAR0); in iop13xx_atue_setup()
613 reg_val &= ~(IOP13XX_ATU_OUMBAR_FUNC_NUM_MASK << in iop13xx_atue_setup()
615 reg_val |= func << IOP13XX_ATU_OUMBAR_FUNC_NUM; in iop13xx_atue_setup()
616 __raw_writel(reg_val, IOP13XX_ATUE_OUMBAR0); in iop13xx_atue_setup()
618 reg_val = __raw_readl(IOP13XX_ATUE_OUMBAR1); in iop13xx_atue_setup()
[all …]
/linux-4.1.27/drivers/input/keyboard/
Dimx_keypad.c88 unsigned short reg_val; in imx_keypad_scan_matrix() local
99 reg_val = readw(keypad->mmio_base + KPDR); in imx_keypad_scan_matrix()
100 reg_val |= 0xff00; in imx_keypad_scan_matrix()
101 writew(reg_val, keypad->mmio_base + KPDR); in imx_keypad_scan_matrix()
103 reg_val = readw(keypad->mmio_base + KPCR); in imx_keypad_scan_matrix()
104 reg_val &= ~((keypad->cols_en_mask & 0xff) << 8); in imx_keypad_scan_matrix()
105 writew(reg_val, keypad->mmio_base + KPCR); in imx_keypad_scan_matrix()
109 reg_val = readw(keypad->mmio_base + KPCR); in imx_keypad_scan_matrix()
110 reg_val |= (keypad->cols_en_mask & 0xff) << 8; in imx_keypad_scan_matrix()
111 writew(reg_val, keypad->mmio_base + KPCR); in imx_keypad_scan_matrix()
[all …]
Dtca6416-keypad.c94 u16 reg_val, val; in tca6416_keys_scan() local
97 error = tca6416_read_reg(chip, TCA6416_INPUT, &reg_val); in tca6416_keys_scan()
101 reg_val &= chip->pinmask; in tca6416_keys_scan()
104 val = reg_val ^ chip->reg_input; in tca6416_keys_scan()
105 chip->reg_input = reg_val; in tca6416_keys_scan()
111 int state = ((reg_val & (1 << i)) ? 1 : 0) in tca6416_keys_scan()
/linux-4.1.27/drivers/media/dvb-frontends/
Daf9033_priv.h29 struct reg_val { struct
190 static const struct reg_val ofsm_init[] = {
303 static const struct reg_val tuner_init_tua9001[] = {
345 static const struct reg_val tuner_init_fc0011[] = {
406 static const struct reg_val tuner_init_fc0012[] = {
449 static const struct reg_val tuner_init_mxl5007t[] = {
484 static const struct reg_val tuner_init_tda18218[] = {
517 static const struct reg_val tuner_init_fc2580[] = {
554 static const struct reg_val ofsm_init_it9135_v1[] = {
667 static const struct reg_val tuner_init_it9135_38[] = {
[all …]
Dtc90522.c49 struct reg_val { struct
55 reg_write(struct tc90522_state *state, const struct reg_val *regs, int num) in reg_write() argument
109 struct reg_val set_tsid[] = { in tc90522s_set_tsid()
121 struct reg_val rv; in tc90522t_set_layers()
482 static const struct reg_val reset_sat = { 0x03, 0x01 };
483 static const struct reg_val reset_ter = { 0x01, 0x40 };
538 struct reg_val agc_sat[] = { in tc90522_set_if_agc()
544 struct reg_val agc_ter[] = { in tc90522_set_if_agc()
550 struct reg_val *rv; in tc90522_set_if_agc()
570 static const struct reg_val sleep_sat = { 0x17, 0x01 };
[all …]
Dhd29l2_priv.h54 struct reg_val { struct
Dau8522_decoder.c55 u8 reg_val[8]; member
339 filter_coef[i].reg_val[filter_coef_type]); in setup_decoder_defaults()
461 lpfilter_coef[i].reg_val[0]); in set_audio_input()
Daf9033.c177 const struct reg_val *tab, int tab_len) in af9033_wr_reg_val_tab()
243 const struct reg_val *init; in af9033_init()
Dhd29l2.c732 static const struct reg_val tab[] = { in hd29l2_init()
/linux-4.1.27/sound/drivers/opl3/
Dopl3_synth.c406 unsigned char reg_val; in snd_opl3_play_note() local
426 reg_val = (unsigned char) note->fnum; in snd_opl3_play_note()
428 opl3->command(opl3, opl3_reg, reg_val); in snd_opl3_play_note()
430 reg_val = 0x00; in snd_opl3_play_note()
433 reg_val |= OPL3_KEYON_BIT; in snd_opl3_play_note()
435 reg_val |= (note->octave << 2) & OPL3_BLOCKNUM_MASK; in snd_opl3_play_note()
437 reg_val |= (unsigned char) (note->fnum >> 8) & OPL3_FNUM_HIGH_MASK; in snd_opl3_play_note()
441 opl3->command(opl3, opl3_reg, reg_val); in snd_opl3_play_note()
454 unsigned char reg_val; in snd_opl3_set_voice() local
478 reg_val = 0x00; in snd_opl3_set_voice()
[all …]
Dopl3_midi.c311 unsigned char reg_val; in snd_opl3_note_on() local
413 reg_val = vp->keyon_reg & ~OPL3_KEYON_BIT; in snd_opl3_note_on()
414 opl3->command(opl3, opl3_reg, reg_val); in snd_opl3_note_on()
421 reg_val = vp->keyon_reg & ~OPL3_KEYON_BIT; in snd_opl3_note_on()
422 opl3->command(opl3, opl3_reg, reg_val); in snd_opl3_note_on()
484 reg_val = fm->op[i].am_vib; in snd_opl3_note_on()
486 opl3->command(opl3, opl3_reg, reg_val); in snd_opl3_note_on()
489 reg_val = vol_op[i]; in snd_opl3_note_on()
491 opl3->command(opl3, opl3_reg, reg_val); in snd_opl3_note_on()
494 reg_val = fm->op[i].attack_decay; in snd_opl3_note_on()
[all …]
Dopl3_drums.c142 unsigned char reg_val; in snd_opl3_drum_vol_set() local
146 reg_val = data->ksl_level; in snd_opl3_drum_vol_set()
147 snd_opl3_calc_volume(&reg_val, vel, chan); in snd_opl3_drum_vol_set()
149 opl3->command(opl3, opl3_reg, reg_val); in snd_opl3_drum_vol_set()
153 reg_val = data->feedback_connection | OPL3_STEREO_BITS; in snd_opl3_drum_vol_set()
155 reg_val &= ~OPL3_VOICE_TO_RIGHT; in snd_opl3_drum_vol_set()
157 reg_val &= ~OPL3_VOICE_TO_LEFT; in snd_opl3_drum_vol_set()
159 opl3->command(opl3, opl3_reg, reg_val); in snd_opl3_drum_vol_set()
/linux-4.1.27/drivers/net/ethernet/allwinner/
Dsun4i-emac.c91 unsigned int reg_val; in emac_update_speed() local
94 reg_val = readl(db->membase + EMAC_MAC_SUPP_REG); in emac_update_speed()
95 reg_val &= ~(0x1 << 8); in emac_update_speed()
97 reg_val |= 1 << 8; in emac_update_speed()
98 writel(reg_val, db->membase + EMAC_MAC_SUPP_REG); in emac_update_speed()
104 unsigned int reg_val; in emac_update_duplex() local
107 reg_val = readl(db->membase + EMAC_MAC_CTL1_REG); in emac_update_duplex()
108 reg_val &= ~EMAC_MAC_CTL1_DUPLEX_EN; in emac_update_duplex()
110 reg_val |= EMAC_MAC_CTL1_DUPLEX_EN; in emac_update_duplex()
111 writel(reg_val, db->membase + EMAC_MAC_CTL1_REG); in emac_update_duplex()
[all …]
/linux-4.1.27/drivers/staging/media/lirc/
Dlirc_bt829.c334 int reg_val; in do_set_bits() local
336 reg_val = read_index(0x34); in do_set_bits()
338 reg_val &= 0xFFFFFFDF; in do_set_bits()
339 reg_val |= 1; in do_set_bits()
341 reg_val &= 0xFFFFFFFE; in do_set_bits()
342 reg_val |= 0x20; in do_set_bits()
344 reg_val |= 0x10; in do_set_bits()
345 write_index(0x34, reg_val); in do_set_bits()
347 reg_val = read_index(0x31); in do_set_bits()
349 reg_val |= 0x1000000; in do_set_bits()
[all …]
/linux-4.1.27/drivers/ata/
Dahci_sunxi.c63 u32 reg_val; in sunxi_clrbits() local
65 reg_val = readl(reg); in sunxi_clrbits()
66 reg_val &= ~(clr_val); in sunxi_clrbits()
67 writel(reg_val, reg); in sunxi_clrbits()
72 u32 reg_val; in sunxi_setbits() local
74 reg_val = readl(reg); in sunxi_setbits()
75 reg_val |= set_val; in sunxi_setbits()
76 writel(reg_val, reg); in sunxi_setbits()
81 u32 reg_val; in sunxi_clrsetbits() local
83 reg_val = readl(reg); in sunxi_clrsetbits()
[all …]
Dahci_imx.c298 u32 reg_val; in ahci_imx_error_handler() local
319 reg_val = readl(mmio + IMX_P0PHYCR); in ahci_imx_error_handler()
320 writel(reg_val | IMX_P0PHYCR_TEST_PDDQ, mmio + IMX_P0PHYCR); in ahci_imx_error_handler()
535 unsigned int reg_val; in imx_ahci_probe() local
611 reg_val = readl(hpriv->mmio + HOST_CAP); in imx_ahci_probe()
612 if (!(reg_val & HOST_CAP_SSS)) { in imx_ahci_probe()
613 reg_val |= HOST_CAP_SSS; in imx_ahci_probe()
614 writel(reg_val, hpriv->mmio + HOST_CAP); in imx_ahci_probe()
616 reg_val = readl(hpriv->mmio + HOST_PORTS_IMPL); in imx_ahci_probe()
617 if (!(reg_val & 0x1)) { in imx_ahci_probe()
[all …]
/linux-4.1.27/arch/mips/pci/
Dfixup-malta.c69 unsigned char reg_val; in malta_piix_func0_fixup() local
83 pci_read_config_byte(pdev, PIIX4_FUNC0_PIRQRC+i, &reg_val); in malta_piix_func0_fixup()
84 if (reg_val & PIIX4_FUNC0_PIRQRC_IRQ_ROUTING_DISABLE) in malta_piix_func0_fixup()
87 pci_irq[PCIA+i] = piixirqmap[reg_val & in malta_piix_func0_fixup()
97 pci_read_config_byte(pdev, PIIX4_FUNC0_TOM, &reg_val); in malta_piix_func0_fixup()
98 pci_write_config_byte(pdev, PIIX4_FUNC0_TOM, reg_val | in malta_piix_func0_fixup()
108 pci_read_config_byte(pdev, PIIX4_FUNC0_SERIRQC, &reg_val); in malta_piix_func0_fixup()
109 reg_val |= PIIX4_FUNC0_SERIRQC_EN | PIIX4_FUNC0_SERIRQC_CONT; in malta_piix_func0_fixup()
110 pci_write_config_byte(pdev, PIIX4_FUNC0_SERIRQC, reg_val); in malta_piix_func0_fixup()
123 unsigned char reg_val; in malta_piix_func1_fixup() local
[all …]
/linux-4.1.27/drivers/video/backlight/
Dlm3639_bl.c54 unsigned int reg_val; in lm3639_chip_init() local
64 reg_val = (pdata->pin_pwm & 0x40) | pdata->pin_strobe | pdata->pin_tx; in lm3639_chip_init()
65 ret = regmap_update_bits(pchip->regmap, REG_IO_CTRL, 0x7C, reg_val); in lm3639_chip_init()
80 reg_val = pdata->fled_pins; in lm3639_chip_init()
81 reg_val |= pdata->bled_pins; in lm3639_chip_init()
83 reg_val = pdata->fled_pins; in lm3639_chip_init()
84 reg_val |= pdata->bled_pins | 0x01; in lm3639_chip_init()
87 ret = regmap_update_bits(pchip->regmap, REG_ENABLE, 0x79, reg_val); in lm3639_chip_init()
101 unsigned int reg_val; in lm3639_bled_update_status() local
105 ret = regmap_read(pchip->regmap, REG_FLAG, &reg_val); in lm3639_bled_update_status()
[all …]
Dadp8860_bl.c142 uint8_t reg_val; in adp8860_set_bits() local
147 ret = adp8860_read(client, reg, &reg_val); in adp8860_set_bits()
149 if (!ret && ((reg_val & bit_mask) != bit_mask)) { in adp8860_set_bits()
150 reg_val |= bit_mask; in adp8860_set_bits()
151 ret = adp8860_write(client, reg, reg_val); in adp8860_set_bits()
161 uint8_t reg_val; in adp8860_clr_bits() local
166 ret = adp8860_read(client, reg, &reg_val); in adp8860_clr_bits()
168 if (!ret && (reg_val & bit_mask)) { in adp8860_clr_bits()
169 reg_val &= ~bit_mask; in adp8860_clr_bits()
170 ret = adp8860_write(client, reg, reg_val); in adp8860_clr_bits()
[all …]
Dadp8870_bl.c157 uint8_t reg_val; in adp8870_set_bits() local
162 ret = adp8870_read(client, reg, &reg_val); in adp8870_set_bits()
164 if (!ret && ((reg_val & bit_mask) != bit_mask)) { in adp8870_set_bits()
165 reg_val |= bit_mask; in adp8870_set_bits()
166 ret = adp8870_write(client, reg, reg_val); in adp8870_set_bits()
176 uint8_t reg_val; in adp8870_clr_bits() local
181 ret = adp8870_read(client, reg, &reg_val); in adp8870_clr_bits()
183 if (!ret && (reg_val & bit_mask)) { in adp8870_clr_bits()
184 reg_val &= ~bit_mask; in adp8870_clr_bits()
185 ret = adp8870_write(client, reg, reg_val); in adp8870_clr_bits()
[all …]
Dadp5520_bl.c84 uint8_t reg_val; in adp5520_bl_get_brightness() local
86 error = adp5520_read(data->master, ADP5520_BL_VALUE, &reg_val); in adp5520_bl_get_brightness()
88 return error ? data->current_brightness : reg_val; in adp5520_bl_get_brightness()
148 uint8_t reg_val; in adp5520_show() local
151 ret = adp5520_read(data->master, reg, &reg_val); in adp5520_show()
157 return sprintf(buf, "%u\n", reg_val); in adp5520_show()
Dlm3630a_bl.c54 unsigned int reg_val; in lm3630a_read() local
56 rval = regmap_read(pchip->regmap, reg, &reg_val); in lm3630a_read()
59 return reg_val & 0xFF; in lm3630a_read()
/linux-4.1.27/drivers/pwm/
Dpwm-tiecap.c71 unsigned int reg_val; in ecap_pwm_config() local
93 reg_val = readw(pc->mmio_base + ECCTL2); in ecap_pwm_config()
96 reg_val |= ECCTL2_APWM_MODE | ECCTL2_SYNC_SEL_DISA; in ecap_pwm_config()
98 writew(reg_val, pc->mmio_base + ECCTL2); in ecap_pwm_config()
115 reg_val = readw(pc->mmio_base + ECCTL2); in ecap_pwm_config()
117 reg_val &= ~ECCTL2_APWM_MODE; in ecap_pwm_config()
118 writew(reg_val, pc->mmio_base + ECCTL2); in ecap_pwm_config()
129 unsigned short reg_val; in ecap_pwm_set_polarity() local
132 reg_val = readw(pc->mmio_base + ECCTL2); in ecap_pwm_set_polarity()
135 reg_val |= ECCTL2_APWM_POL_LOW; in ecap_pwm_set_polarity()
[all …]
/linux-4.1.27/drivers/mtd/nand/
Domap_elm.c113 u32 reg_val; in elm_config() local
131 reg_val = (bch_type & ECC_BCH_LEVEL_MASK) | (ELM_ECC_SIZE << 16); in elm_config()
132 elm_write_reg(info, ELM_LOCATION_CONFIG, reg_val); in elm_config()
152 u32 reg_val; in elm_configure_page_mode() local
154 reg_val = elm_read_reg(info, ELM_PAGE_CTRL); in elm_configure_page_mode()
156 reg_val |= BIT(index); /* enable page mode */ in elm_configure_page_mode()
158 reg_val &= ~BIT(index); /* disable page mode */ in elm_configure_page_mode()
160 elm_write_reg(info, ELM_PAGE_CTRL, reg_val); in elm_configure_page_mode()
261 u32 reg_val; in elm_start_processing() local
271 reg_val = elm_read_reg(info, offset); in elm_start_processing()
[all …]
/linux-4.1.27/drivers/media/i2c/
Dlm3646.c105 unsigned int reg_val; in lm3646_get_ctrl() local
111 rval = regmap_read(flash->regmap, REG_FLAG, &reg_val); in lm3646_get_ctrl()
116 if (reg_val & FAULT_TIMEOUT) in lm3646_get_ctrl()
118 if (reg_val & FAULT_SHORT_CIRCUIT) in lm3646_get_ctrl()
120 if (reg_val & FAULT_UVLO) in lm3646_get_ctrl()
122 if (reg_val & FAULT_IVFM) in lm3646_get_ctrl()
124 if (reg_val & FAULT_OCP) in lm3646_get_ctrl()
126 if (reg_val & FAULT_OVERTEMP) in lm3646_get_ctrl()
128 if (reg_val & FAULT_NTC_TRIP) in lm3646_get_ctrl()
130 if (reg_val & FAULT_OVP) in lm3646_get_ctrl()
[all …]
Dlm3560.c176 unsigned int reg_val; in lm3560_get_ctrl() local
177 rval = regmap_read(flash->regmap, REG_FLAG, &reg_val); in lm3560_get_ctrl()
180 if (reg_val & FAULT_SHORT_CIRCUIT) in lm3560_get_ctrl()
182 if (reg_val & FAULT_OVERTEMP) in lm3560_get_ctrl()
184 if (reg_val & FAULT_TIMEOUT) in lm3560_get_ctrl()
383 unsigned int reg_val; in lm3560_init_device() local
396 rval = regmap_read(flash->regmap, REG_FLAG, &reg_val); in lm3560_init_device()
Dmt9m032.c252 u16 reg_val = MT9M032_FORMATTER2_DOUT_EN in update_formatter2() local
257 reg_val |= MT9M032_FORMATTER2_PIXCLK_EN; /* pixclock enable */ in update_formatter2()
259 return mt9m032_write(client, MT9M032_FORMATTER2, reg_val); in update_formatter2()
283 u16 reg_val; in mt9m032_setup_pll() local
307 reg_val = (pll.p1 == 6 ? MT9M032_FORMATTER1_PLL_P1_6 : 0) in mt9m032_setup_pll()
309 ret = mt9m032_write(client, MT9M032_FORMATTER1, reg_val); in mt9m032_setup_pll()
598 int reg_val = (vflip << MT9M032_READ_MODE2_VFLIP_SHIFT) in update_read_mode2() local
603 return mt9m032_write(client, MT9M032_READ_MODE2, reg_val); in update_read_mode2()
612 u16 reg_val; in mt9m032_set_gain() local
627 reg_val = ((digital_gain_val & MT9M032_GAIN_DIGITAL_MASK) in mt9m032_set_gain()
[all …]
/linux-4.1.27/arch/arm/mach-qcom/
Dplatsmp.c176 unsigned reg_val; in kpssv2_release_secondary() local
214 reg_val = (64 << BHS_CNT_SHIFT) | (0x3f << LDO_PWR_DWN_SHIFT) | BHS_EN; in kpssv2_release_secondary()
215 writel_relaxed(reg_val, reg + APC_PWR_GATE_CTL); in kpssv2_release_secondary()
221 reg_val |= 0x3f << BHS_SEG_SHIFT; in kpssv2_release_secondary()
222 writel_relaxed(reg_val, reg + APC_PWR_GATE_CTL); in kpssv2_release_secondary()
228 reg_val |= 0x3f << LDO_BYP_SHIFT; in kpssv2_release_secondary()
229 writel_relaxed(reg_val, reg + APC_PWR_GATE_CTL); in kpssv2_release_secondary()
236 reg_val = COREPOR_RST | CLAMP; in kpssv2_release_secondary()
237 writel_relaxed(reg_val, reg + APCS_CPU_PWR_CTL); in kpssv2_release_secondary()
241 reg_val &= ~CLAMP; in kpssv2_release_secondary()
[all …]
/linux-4.1.27/drivers/clk/bcm/
Dclk-kona.c40 static inline u32 bitfield_extract(u32 reg_val, u32 shift, u32 width) in bitfield_extract() argument
42 return (reg_val & bitfield_mask(shift, width)) >> shift; in bitfield_extract()
46 static inline u32 bitfield_replace(u32 reg_val, u32 shift, u32 width, u32 val) in bitfield_replace() argument
50 return (reg_val & ~mask) | (val << shift); in bitfield_replace()
135 __ccu_write(struct ccu_data *ccu, u32 reg_offset, u32 reg_val) in __ccu_write() argument
137 writel(reg_val, ccu->base + reg_offset); in __ccu_write()
335 u32 reg_val; in policy_init() local
337 reg_val = __ccu_read(ccu, offset); in policy_init()
338 reg_val |= mask; in policy_init()
339 __ccu_write(ccu, offset, reg_val); in policy_init()
[all …]
/linux-4.1.27/arch/mips/netlogic/xlp/
Dahci-init.c97 uint32_t reg_val; in sata_clear_glue_reg() local
99 reg_val = nlm_read_sata_reg(regbase, off); in sata_clear_glue_reg()
100 nlm_write_sata_reg(regbase, off, (reg_val & ~bit)); in sata_clear_glue_reg()
105 uint32_t reg_val; in sata_set_glue_reg() local
107 reg_val = nlm_read_sata_reg(regbase, off); in sata_set_glue_reg()
108 nlm_write_sata_reg(regbase, off, (reg_val | bit)); in sata_set_glue_reg()
113 uint32_t reg_val; in nlm_sata_firmware_init() local
137 reg_val = nlm_read_sata_reg(regbase, SATA_STATUS); in nlm_sata_firmware_init()
139 } while (((reg_val & 0xF0) != 0xF0) && (i < 10000)); in nlm_sata_firmware_init()
142 if (reg_val & (P0_PHY_READY << i)) in nlm_sata_firmware_init()
Dahci-init-xlp2.c171 u32 reg_val; in sata_clear_glue_reg() local
173 reg_val = nlm_read_sata_reg(regbase, off); in sata_clear_glue_reg()
174 nlm_write_sata_reg(regbase, off, (reg_val & ~bit)); in sata_clear_glue_reg()
179 u32 reg_val; in sata_set_glue_reg() local
181 reg_val = nlm_read_sata_reg(regbase, off); in sata_set_glue_reg()
182 nlm_write_sata_reg(regbase, off, (reg_val | bit)); in sata_set_glue_reg()
255 u32 reg_val; in nlm_sata_firmware_init() local
315 reg_val = nlm_read_sata_reg(regbase, SATA_STATUS); in nlm_sata_firmware_init()
316 if ((reg_val & P1_PHY_READY) && (reg_val & P0_PHY_READY)) in nlm_sata_firmware_init()
321 if (reg_val & P0_PHY_READY) in nlm_sata_firmware_init()
[all …]
/linux-4.1.27/drivers/mfd/
Dadp5520.c74 uint8_t reg_val; in __adp5520_ack_bits() local
79 ret = __adp5520_read(client, reg, &reg_val); in __adp5520_ack_bits()
82 reg_val |= bit_mask; in __adp5520_ack_bits()
83 ret = __adp5520_write(client, reg, reg_val); in __adp5520_ack_bits()
105 uint8_t reg_val; in adp5520_set_bits() local
110 ret = __adp5520_read(chip->client, reg, &reg_val); in adp5520_set_bits()
112 if (!ret && ((reg_val & bit_mask) != bit_mask)) { in adp5520_set_bits()
113 reg_val |= bit_mask; in adp5520_set_bits()
114 ret = __adp5520_write(chip->client, reg, reg_val); in adp5520_set_bits()
125 uint8_t reg_val; in adp5520_clr_bits() local
[all …]
Dda903x.c176 uint8_t reg_val; in da903x_set_bits() local
181 ret = __da903x_read(chip->client, reg, &reg_val); in da903x_set_bits()
185 if ((reg_val & bit_mask) != bit_mask) { in da903x_set_bits()
186 reg_val |= bit_mask; in da903x_set_bits()
187 ret = __da903x_write(chip->client, reg, reg_val); in da903x_set_bits()
198 uint8_t reg_val; in da903x_clr_bits() local
203 ret = __da903x_read(chip->client, reg, &reg_val); in da903x_clr_bits()
207 if (reg_val & bit_mask) { in da903x_clr_bits()
208 reg_val &= ~bit_mask; in da903x_clr_bits()
209 ret = __da903x_write(chip->client, reg, reg_val); in da903x_clr_bits()
[all …]
Dda9052-i2c.c96 int reg_val, ret; in da9052_i2c_disable_multiwrite() local
98 ret = regmap_read(da9052->regmap, DA9052_CONTROL_B_REG, &reg_val); in da9052_i2c_disable_multiwrite()
102 if (!(reg_val & DA9052_CONTROL_B_WRITEMODE)) { in da9052_i2c_disable_multiwrite()
103 reg_val |= DA9052_CONTROL_B_WRITEMODE; in da9052_i2c_disable_multiwrite()
105 reg_val); in da9052_i2c_disable_multiwrite()
Dtwl6030-irq.c275 u8 reg_val = 0; in twl6030_mmc_card_detect_config() local
286 ret = twl_i2c_read_u8(TWL6030_MODULE_ID0, &reg_val, TWL6030_MMCCTRL); in twl6030_mmc_card_detect_config()
291 reg_val &= ~VMMC_AUTO_OFF; in twl6030_mmc_card_detect_config()
292 reg_val |= SW_FC; in twl6030_mmc_card_detect_config()
293 ret = twl_i2c_write_u8(TWL6030_MODULE_ID0, reg_val, TWL6030_MMCCTRL); in twl6030_mmc_card_detect_config()
300 ret = twl_i2c_read_u8(TWL6030_MODULE_ID0, &reg_val, in twl6030_mmc_card_detect_config()
307 reg_val &= ~(MMC_PU | MMC_PD); in twl6030_mmc_card_detect_config()
308 ret = twl_i2c_write_u8(TWL6030_MODULE_ID0, reg_val, in twl6030_mmc_card_detect_config()
/linux-4.1.27/drivers/net/ethernet/intel/ixgbe/
Dixgbe_x550.c840 u32 reg_val; in ixgbe_setup_ixfi_x550em() local
845 IXGBE_SB_IOSF_TARGET_KR_PHY, &reg_val); in ixgbe_setup_ixfi_x550em()
849 reg_val &= ~IXGBE_KRM_LINK_CTRL_1_TETH_AN_ENABLE; in ixgbe_setup_ixfi_x550em()
850 reg_val &= ~IXGBE_KRM_LINK_CTRL_1_TETH_FORCE_SPEED_MASK; in ixgbe_setup_ixfi_x550em()
855 reg_val |= IXGBE_KRM_LINK_CTRL_1_TETH_FORCE_SPEED_10G; in ixgbe_setup_ixfi_x550em()
858 reg_val |= IXGBE_KRM_LINK_CTRL_1_TETH_FORCE_SPEED_1G; in ixgbe_setup_ixfi_x550em()
867 IXGBE_SB_IOSF_TARGET_KR_PHY, reg_val); in ixgbe_setup_ixfi_x550em()
874 IXGBE_SB_IOSF_TARGET_KR_PHY, &reg_val); in ixgbe_setup_ixfi_x550em()
878 reg_val |= IXGBE_KRM_RX_TRN_LINKUP_CTRL_CONV_WO_PROTOCOL; in ixgbe_setup_ixfi_x550em()
881 IXGBE_SB_IOSF_TARGET_KR_PHY, reg_val); in ixgbe_setup_ixfi_x550em()
[all …]
Dixgbe_common.h103 s32 prot_autoc_read_generic(struct ixgbe_hw *hw, bool *, u32 *reg_val);
104 s32 prot_autoc_write_generic(struct ixgbe_hw *hw, u32 reg_val, bool locked);
Dixgbe_common.c700 u32 reg_val; in ixgbe_stop_adapter_generic() local
724 reg_val = IXGBE_READ_REG(hw, IXGBE_RXDCTL(i)); in ixgbe_stop_adapter_generic()
725 reg_val &= ~IXGBE_RXDCTL_ENABLE; in ixgbe_stop_adapter_generic()
726 reg_val |= IXGBE_RXDCTL_SWFLSH; in ixgbe_stop_adapter_generic()
727 IXGBE_WRITE_REG(hw, IXGBE_RXDCTL(i), reg_val); in ixgbe_stop_adapter_generic()
2566 s32 prot_autoc_read_generic(struct ixgbe_hw *hw, bool *locked, u32 *reg_val) in prot_autoc_read_generic() argument
2569 *reg_val = IXGBE_READ_REG(hw, IXGBE_AUTOC); in prot_autoc_read_generic()
2580 s32 prot_autoc_write_generic(struct ixgbe_hw *hw, u32 reg_val, bool locked) in prot_autoc_write_generic() argument
2582 IXGBE_WRITE_REG(hw, IXGBE_AUTOC, reg_val); in prot_autoc_write_generic()
Dixgbe_82599.c200 u32 *reg_val) in prot_autoc_read_82599() argument
215 *reg_val = IXGBE_READ_REG(hw, IXGBE_AUTOC); in prot_autoc_read_82599()
/linux-4.1.27/drivers/leds/
Dleds-lm3530.c231 u8 reg_val[LM3530_REG_MAX]; in lm3530_init_registers() local
267 reg_val[0] = gen_config; /* LM3530_GEN_CONFIG */ in lm3530_init_registers()
268 reg_val[1] = als.config; /* LM3530_ALS_CONFIG */ in lm3530_init_registers()
269 reg_val[2] = brt_ramp; /* LM3530_BRT_RAMP_RATE */ in lm3530_init_registers()
270 reg_val[3] = als.imp_sel; /* LM3530_ALS_IMP_SELECT */ in lm3530_init_registers()
271 reg_val[4] = brightness; /* LM3530_BRT_CTRL_REG */ in lm3530_init_registers()
272 reg_val[5] = als.zones[0]; /* LM3530_ALS_ZB0_REG */ in lm3530_init_registers()
273 reg_val[6] = als.zones[1]; /* LM3530_ALS_ZB1_REG */ in lm3530_init_registers()
274 reg_val[7] = als.zones[2]; /* LM3530_ALS_ZB2_REG */ in lm3530_init_registers()
275 reg_val[8] = als.zones[3]; /* LM3530_ALS_ZB3_REG */ in lm3530_init_registers()
[all …]
Dleds-wm831x-status.c31 int reg_val; /* Control register value */ member
51 led->reg_val &= ~(WM831X_LED_SRC_MASK | WM831X_LED_MODE_MASK | in wm831x_status_work()
56 led->reg_val |= led->src << WM831X_LED_SRC_SHIFT; in wm831x_status_work()
58 led->reg_val |= 2 << WM831X_LED_MODE_SHIFT; in wm831x_status_work()
59 led->reg_val |= led->blink_time << WM831X_LED_DUR_SHIFT; in wm831x_status_work()
60 led->reg_val |= led->blink_cyc; in wm831x_status_work()
63 led->reg_val |= 1 << WM831X_LED_MODE_SHIFT; in wm831x_status_work()
68 wm831x_reg_write(led->wm831x, led->reg, led->reg_val); in wm831x_status_work()
270 drvdata->reg_val = wm831x_reg_read(wm831x, drvdata->reg); in wm831x_status_probe()
272 if (drvdata->reg_val & WM831X_LED_MODE_MASK) in wm831x_status_probe()
[all …]
Dleds-lm355x.c174 unsigned int reg_val; in lm355x_chip_init() local
180 reg_val = pdata->pin_tx2 | pdata->ntc_pin; in lm355x_chip_init()
181 ret = regmap_update_bits(chip->regmap, 0xE0, 0x28, reg_val); in lm355x_chip_init()
184 reg_val = pdata->pass_mode; in lm355x_chip_init()
185 ret = regmap_update_bits(chip->regmap, 0xA0, 0x04, reg_val); in lm355x_chip_init()
191 reg_val = pdata->pin_tx2 | pdata->ntc_pin | pdata->pass_mode; in lm355x_chip_init()
192 ret = regmap_update_bits(chip->regmap, 0x0A, 0xC4, reg_val); in lm355x_chip_init()
211 unsigned int reg_val; in lm355x_control() local
263 reg_val = 0x00; in lm355x_control()
265 reg_val = 0x01; in lm355x_control()
[all …]
/linux-4.1.27/drivers/input/mouse/
Dsentelic.c50 static unsigned char fsp_test_swap_cmd(unsigned char reg_val) in fsp_test_swap_cmd() argument
52 switch (reg_val) { in fsp_test_swap_cmd()
59 return (reg_val >> 4) | (reg_val << 4); in fsp_test_swap_cmd()
61 return reg_val; /* swap isn't necessary */ in fsp_test_swap_cmd()
69 static unsigned char fsp_test_invert_cmd(unsigned char reg_val) in fsp_test_invert_cmd() argument
71 switch (reg_val) { in fsp_test_invert_cmd()
78 return ~reg_val; in fsp_test_invert_cmd()
80 return reg_val; /* inversion isn't necessary */ in fsp_test_invert_cmd()
84 static int fsp_reg_read(struct psmouse *psmouse, int reg_addr, int *reg_val) in fsp_reg_read() argument
129 *reg_val = param[2]; in fsp_reg_read()
[all …]
Dalps.c1853 u16 reg_val = 0x181; in alps_absolute_mode_v6() local
1860 ret = alps_monitor_mode_write_reg(psmouse, 0x000, reg_val); in alps_absolute_mode_v6()
2004 int reg_val, ret = -1; in alps_passthrough_mode_v3() local
2009 reg_val = alps_command_mode_read_reg(psmouse, reg_base + 0x0008); in alps_passthrough_mode_v3()
2010 if (reg_val == -1) in alps_passthrough_mode_v3()
2014 reg_val |= 0x01; in alps_passthrough_mode_v3()
2016 reg_val &= ~0x01; in alps_passthrough_mode_v3()
2018 ret = __alps_command_mode_write_reg(psmouse, reg_val); in alps_passthrough_mode_v3()
2029 int reg_val; in alps_absolute_mode_v3() local
2031 reg_val = alps_command_mode_read_reg(psmouse, 0x0004); in alps_absolute_mode_v3()
[all …]
/linux-4.1.27/drivers/gpio/
Dgpio-pca953x.c209 u8 reg_val; in pca953x_gpio_direction_input() local
213 reg_val = chip->reg_direction[off / BANK_SZ] | (1u << (off % BANK_SZ)); in pca953x_gpio_direction_input()
223 ret = pca953x_write_single(chip, offset, reg_val, off); in pca953x_gpio_direction_input()
227 chip->reg_direction[off / BANK_SZ] = reg_val; in pca953x_gpio_direction_input()
238 u8 reg_val; in pca953x_gpio_direction_output() local
244 reg_val = chip->reg_output[off / BANK_SZ] in pca953x_gpio_direction_output()
247 reg_val = chip->reg_output[off / BANK_SZ] in pca953x_gpio_direction_output()
258 ret = pca953x_write_single(chip, offset, reg_val, off); in pca953x_gpio_direction_output()
262 chip->reg_output[off / BANK_SZ] = reg_val; in pca953x_gpio_direction_output()
265 reg_val = chip->reg_direction[off / BANK_SZ] & ~(1u << (off % BANK_SZ)); in pca953x_gpio_direction_output()
[all …]
Dgpio-sch.c70 u8 reg_val; in sch_gpio_reg_get() local
75 reg_val = !!(inb(sch->iobase + offset) & BIT(bit)); in sch_gpio_reg_get()
77 return reg_val; in sch_gpio_reg_get()
85 u8 reg_val; in sch_gpio_reg_set() local
90 reg_val = inb(sch->iobase + offset); in sch_gpio_reg_set()
93 outb(reg_val | BIT(bit), sch->iobase + offset); in sch_gpio_reg_set()
95 outb((reg_val & ~BIT(bit)), sch->iobase + offset); in sch_gpio_reg_set()
Dgpio-pch.c111 u32 reg_val; in pch_gpio_set() local
116 reg_val = ioread32(&chip->reg->po); in pch_gpio_set()
118 reg_val |= (1 << nr); in pch_gpio_set()
120 reg_val &= ~(1 << nr); in pch_gpio_set()
122 iowrite32(reg_val, &chip->reg->po); in pch_gpio_set()
138 u32 reg_val; in pch_gpio_direction_output() local
143 reg_val = ioread32(&chip->reg->po); in pch_gpio_direction_output()
145 reg_val |= (1 << nr); in pch_gpio_direction_output()
147 reg_val &= ~(1 << nr); in pch_gpio_direction_output()
148 iowrite32(reg_val, &chip->reg->po); in pch_gpio_direction_output()
[all …]
Dgpio-ml-ioh.c108 u32 reg_val; in ioh_gpio_set() local
113 reg_val = ioread32(&chip->reg->regs[chip->ch].po); in ioh_gpio_set()
115 reg_val |= (1 << nr); in ioh_gpio_set()
117 reg_val &= ~(1 << nr); in ioh_gpio_set()
119 iowrite32(reg_val, &chip->reg->regs[chip->ch].po); in ioh_gpio_set()
135 u32 reg_val; in ioh_gpio_direction_output() local
144 reg_val = ioread32(&chip->reg->regs[chip->ch].po); in ioh_gpio_direction_output()
146 reg_val |= (1 << nr); in ioh_gpio_direction_output()
148 reg_val &= ~(1 << nr); in ioh_gpio_direction_output()
149 iowrite32(reg_val, &chip->reg->regs[chip->ch].po); in ioh_gpio_direction_output()
[all …]
Dgpio-adp5520.c28 uint8_t reg_val; in adp5520_gpio_get_value() local
38 adp5520_read(dev->master, ADP5520_GPIO_OUT, &reg_val); in adp5520_gpio_get_value()
40 adp5520_read(dev->master, ADP5520_GPIO_IN, &reg_val); in adp5520_gpio_get_value()
42 return !!(reg_val & dev->lut[off]); in adp5520_gpio_get_value()
Dgpio-max732x.c205 uint8_t reg_val; in max732x_gpio_get_value() local
208 ret = max732x_readb(chip, is_group_a(chip, off), &reg_val); in max732x_gpio_get_value()
212 return reg_val & (1u << (off & 0x7)); in max732x_gpio_get_value()
/linux-4.1.27/drivers/media/platform/
Dfsl-viu.c214 static struct viu_reg reg_val; variable
442 reg_val.field_base_addr = videobuf_to_dma_contig(&buf->vb); in buffer_activate()
445 buf, buf->vb.i, (unsigned long)reg_val.field_base_addr); in buffer_activate()
448 reg_val.status_cfg = 0; in buffer_activate()
452 reg_val.status_cfg &= ~MODE_32BIT; in buffer_activate()
453 reg_val.dma_inc = buf->vb.width * 2; in buffer_activate()
456 reg_val.status_cfg |= MODE_32BIT; in buffer_activate()
457 reg_val.dma_inc = buf->vb.width * 4; in buffer_activate()
466 reg_val.picture_count = (buf->vb.height / 2) << 16 | in buffer_activate()
469 reg_val.status_cfg |= DMA_ACT | INT_DMA_END_EN | INT_FIELD_EN; in buffer_activate()
[all …]
/linux-4.1.27/drivers/crypto/qat/qat_dh895xcc/
Dadf_admin.c109 uint64_t reg_val; in adf_init_admin_comms() local
122 reg_val = (uint64_t)admin->phy_addr; in adf_init_admin_comms()
123 ADF_CSR_WR(csr, ADF_DH895XCC_ADMINMSGUR_OFFSET, reg_val >> 32); in adf_init_admin_comms()
124 ADF_CSR_WR(csr, ADF_DH895XCC_ADMINMSGLR_OFFSET, reg_val); in adf_init_admin_comms()
/linux-4.1.27/arch/mips/kernel/
Dtraps.c1730 unsigned int reg_val; in cache_parity_error() local
1735 reg_val = read_c0_cacheerr(); in cache_parity_error()
1736 printk("c0_cacheerr == %08x\n", reg_val); in cache_parity_error()
1739 reg_val & (1<<30) ? "secondary" : "primary", in cache_parity_error()
1740 reg_val & (1<<31) ? "data" : "insn"); in cache_parity_error()
1744 reg_val & (1<<29) ? "ED " : "", in cache_parity_error()
1745 reg_val & (1<<28) ? "ET " : "", in cache_parity_error()
1746 reg_val & (1<<27) ? "ES " : "", in cache_parity_error()
1747 reg_val & (1<<26) ? "EE " : "", in cache_parity_error()
1748 reg_val & (1<<25) ? "EB " : "", in cache_parity_error()
[all …]
/linux-4.1.27/drivers/net/ethernet/chelsio/cxgb3/
Dael1002.c77 struct reg_val { struct
84 static int set_phy_regs(struct cphy *phy, const struct reg_val *rv) in set_phy_regs() argument
295 static const struct reg_val regs[] = { in ael2005_setup_sr_edc()
327 static const struct reg_val regs[] = { in ael2005_setup_twinax_edc()
331 static const struct reg_val preemphasis[] = { in ael2005_setup_twinax_edc()
396 static const struct reg_val regs0[] = { in ael2005_reset()
406 static const struct reg_val regs1[] = { in ael2005_reset()
525 static const struct reg_val regs[] = { in ael2020_setup_sr_edc()
554 static const struct reg_val uCclock40MHz[] = { in ael2020_setup_twinax_edc()
561 static const struct reg_val uCclockActivate[] = { in ael2020_setup_twinax_edc()
[all …]
/linux-4.1.27/drivers/net/ethernet/broadcom/bnx2x/
Dbnx2x_init.h677 u32 reg_val; in bnx2x_set_mcp_parity() local
680 reg_val = REG_RD(bp, mcp_attn_ctl_regs[i].addr); in bnx2x_set_mcp_parity()
683 reg_val |= mcp_attn_ctl_regs[i].bits; in bnx2x_set_mcp_parity()
685 reg_val &= ~mcp_attn_ctl_regs[i].bits; in bnx2x_set_mcp_parity()
687 REG_WR(bp, mcp_attn_ctl_regs[i].addr, reg_val); in bnx2x_set_mcp_parity()
727 u32 reg_val, mcp_aeu_bits = in bnx2x_clear_blocks_parity() local
743 reg_val = REG_RD(bp, bnx2x_blocks_parity_data[i]. in bnx2x_clear_blocks_parity()
745 if (reg_val & reg_mask) in bnx2x_clear_blocks_parity()
749 reg_val & reg_mask); in bnx2x_clear_blocks_parity()
754 reg_val = REG_RD(bp, MISC_REG_AEU_AFTER_INVERT_4_MCP); in bnx2x_clear_blocks_parity()
[all …]
Dbnx2x_link.c5022 u16 reg_val; in bnx2x_set_autoneg() local
5027 MDIO_COMBO_IEEE0_MII_CONTROL, &reg_val); in bnx2x_set_autoneg()
5031 reg_val |= MDIO_COMBO_IEEO_MII_CONTROL_AN_EN; in bnx2x_set_autoneg()
5033 reg_val &= ~(MDIO_COMBO_IEEO_MII_CONTROL_AN_EN | in bnx2x_set_autoneg()
5038 MDIO_COMBO_IEEE0_MII_CONTROL, reg_val); in bnx2x_set_autoneg()
5044 MDIO_SERDES_DIGITAL_A_1000X_CONTROL1, &reg_val); in bnx2x_set_autoneg()
5045 reg_val &= ~(MDIO_SERDES_DIGITAL_A_1000X_CONTROL1_SIGNAL_DETECT_EN | in bnx2x_set_autoneg()
5047 reg_val |= MDIO_SERDES_DIGITAL_A_1000X_CONTROL1_FIBER_MODE; in bnx2x_set_autoneg()
5049 reg_val |= MDIO_SERDES_DIGITAL_A_1000X_CONTROL1_AUTODET; in bnx2x_set_autoneg()
5051 reg_val &= ~MDIO_SERDES_DIGITAL_A_1000X_CONTROL1_AUTODET; in bnx2x_set_autoneg()
[all …]
/linux-4.1.27/drivers/input/touchscreen/
Dsun4i-ts.c127 static void sun4i_ts_irq_handle_input(struct sun4i_ts_data *ts, u32 reg_val) in sun4i_ts_irq_handle_input() argument
131 if (reg_val & FIFO_DATA_PENDING) { in sun4i_ts_irq_handle_input()
150 if (reg_val & TP_UP_PENDING) { in sun4i_ts_irq_handle_input()
160 u32 reg_val; in sun4i_ts_irq() local
162 reg_val = readl(ts->base + TP_INT_FIFOS); in sun4i_ts_irq()
164 if (reg_val & TEMP_DATA_PENDING) in sun4i_ts_irq()
168 sun4i_ts_irq_handle_input(ts, reg_val); in sun4i_ts_irq()
170 writel(reg_val, ts->base + TP_INT_FIFOS); in sun4i_ts_irq()
/linux-4.1.27/drivers/clk/
Dclk-axi-clkgen.c293 unsigned int reg_val; in axi_clkgen_v2_mmcm_read() local
300 reg_val = AXI_CLKGEN_V2_DRP_CNTRL_SEL | AXI_CLKGEN_V2_DRP_CNTRL_READ; in axi_clkgen_v2_mmcm_read()
301 reg_val |= (reg << 16); in axi_clkgen_v2_mmcm_read()
303 axi_clkgen_write(axi_clkgen, AXI_CLKGEN_V2_REG_DRP_CNTRL, reg_val); in axi_clkgen_v2_mmcm_read()
317 unsigned int reg_val = 0; in axi_clkgen_v2_mmcm_write() local
325 axi_clkgen_v2_mmcm_read(axi_clkgen, reg, &reg_val); in axi_clkgen_v2_mmcm_write()
326 reg_val &= ~mask; in axi_clkgen_v2_mmcm_write()
329 reg_val |= AXI_CLKGEN_V2_DRP_CNTRL_SEL | (reg << 16) | (val & mask); in axi_clkgen_v2_mmcm_write()
331 axi_clkgen_write(axi_clkgen, AXI_CLKGEN_V2_REG_DRP_CNTRL, reg_val); in axi_clkgen_v2_mmcm_write()
/linux-4.1.27/drivers/video/fbdev/via/
Dviafbdev.c1146 u8 reg_val = 0; in viafb_dvp0_proc_write() local
1158 if (kstrtou8(value, 0, &reg_val) < 0) in viafb_dvp0_proc_write()
1161 reg_val); in viafb_dvp0_proc_write()
1165 reg_val, 0x0f); in viafb_dvp0_proc_write()
1169 reg_val << 4, BIT5); in viafb_dvp0_proc_write()
1171 reg_val << 1, BIT1); in viafb_dvp0_proc_write()
1175 reg_val << 3, BIT4); in viafb_dvp0_proc_write()
1177 reg_val << 2, BIT2); in viafb_dvp0_proc_write()
1217 u8 reg_val = 0; in viafb_dvp1_proc_write() local
1229 if (kstrtou8(value, 0, &reg_val) < 0) in viafb_dvp1_proc_write()
[all …]
/linux-4.1.27/drivers/hwmon/
Dadm1021.c210 int reg_val, err; in set_temp_max() local
218 reg_val = clamp_val(temp, -128, 127); in set_temp_max()
219 data->temp_max[index] = reg_val * 1000; in set_temp_max()
222 reg_val); in set_temp_max()
236 int reg_val, err; in set_temp_min() local
244 reg_val = clamp_val(temp, -128, 127); in set_temp_min()
245 data->temp_min[index] = reg_val * 1000; in set_temp_min()
248 reg_val); in set_temp_min()
/linux-4.1.27/drivers/net/ethernet/intel/ixgbevf/
Dvf.c138 u32 reg_val; in ixgbevf_stop_hw_vf() local
149 reg_val = IXGBE_READ_REG(hw, IXGBE_VFRXDCTL(i)); in ixgbevf_stop_hw_vf()
150 if (reg_val & IXGBE_RXDCTL_ENABLE) { in ixgbevf_stop_hw_vf()
151 reg_val &= ~IXGBE_RXDCTL_ENABLE; in ixgbevf_stop_hw_vf()
152 IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(i), reg_val); in ixgbevf_stop_hw_vf()
167 reg_val = IXGBE_READ_REG(hw, IXGBE_VFTXDCTL(i)); in ixgbevf_stop_hw_vf()
168 if (reg_val & IXGBE_TXDCTL_ENABLE) { in ixgbevf_stop_hw_vf()
169 reg_val &= ~IXGBE_TXDCTL_ENABLE; in ixgbevf_stop_hw_vf()
170 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(i), reg_val); in ixgbevf_stop_hw_vf()
/linux-4.1.27/drivers/gpu/drm/gma500/
Dpsb_irq.c517 uint32_t reg_val = 0; in psb_enable_vblank() local
526 reg_val = REG_READ(pipeconf_reg); in psb_enable_vblank()
530 if (!(reg_val & PIPEACONF_ENABLE)) in psb_enable_vblank()
581 uint32_t reg_val = 0; in mdfld_enable_te() local
585 reg_val = REG_READ(pipeconf_reg); in mdfld_enable_te()
589 if (!(reg_val & PIPEACONF_ENABLE)) in mdfld_enable_te()
630 uint32_t reg_val = 0; in psb_get_vblank_counter() local
654 reg_val = REG_READ(pipeconf_reg); in psb_get_vblank_counter()
656 if (!(reg_val & PIPEACONF_ENABLE)) { in psb_get_vblank_counter()
/linux-4.1.27/sound/soc/codecs/
Dda9055.c457 static int da9055_get_alc_data(struct snd_soc_codec *codec, u8 reg_val) in da9055_get_alc_data() argument
466 snd_soc_write(codec, DA9055_ALC_CIC_OP_LVL_CTRL, reg_val); in da9055_get_alc_data()
470 reg_val | DA9055_ALC_DATA_MIDDLE); in da9055_get_alc_data()
475 reg_val | DA9055_ALC_DATA_TOP); in da9055_get_alc_data()
488 u8 reg_val, adc_left, adc_right, mic_left, mic_right; in da9055_put_alc_sw() local
529 reg_val = (offset_l & DA9055_ALC_OFFSET_15_8) >> 8; in da9055_put_alc_sw()
530 snd_soc_write(codec, DA9055_ALC_OFFSET_OP2M_L, reg_val); in da9055_put_alc_sw()
531 reg_val = (offset_l & DA9055_ALC_OFFSET_17_16) >> 16; in da9055_put_alc_sw()
532 snd_soc_write(codec, DA9055_ALC_OFFSET_OP2U_L, reg_val); in da9055_put_alc_sw()
534 reg_val = (offset_r & DA9055_ALC_OFFSET_15_8) >> 8; in da9055_put_alc_sw()
[all …]
Dda7213.c196 static int da7213_get_alc_data(struct snd_soc_codec *codec, u8 reg_val) in da7213_get_alc_data() argument
205 snd_soc_write(codec, DA7213_ALC_CIC_OP_LVL_CTRL, reg_val); in da7213_get_alc_data()
209 reg_val | DA7213_ALC_DATA_MIDDLE); in da7213_get_alc_data()
214 reg_val | DA7213_ALC_DATA_TOP); in da7213_get_alc_data()
225 u8 reg_val; in da7213_alc_calib_man() local
240 reg_val = (offset_l & DA7213_ALC_OFFSET_15_8) >> 8; in da7213_alc_calib_man()
241 snd_soc_write(codec, DA7213_ALC_OFFSET_MAN_M_L, reg_val); in da7213_alc_calib_man()
242 reg_val = (offset_l & DA7213_ALC_OFFSET_19_16) >> 16; in da7213_alc_calib_man()
243 snd_soc_write(codec, DA7213_ALC_OFFSET_MAN_U_L, reg_val); in da7213_alc_calib_man()
245 reg_val = (offset_r & DA7213_ALC_OFFSET_15_8) >> 8; in da7213_alc_calib_man()
[all …]
Drt5651.c1414 unsigned int reg_val = 0; in rt5651_set_dai_fmt() local
1421 reg_val |= RT5651_I2S_MS_S; in rt5651_set_dai_fmt()
1432 reg_val |= RT5651_I2S_BP_INV; in rt5651_set_dai_fmt()
1442 reg_val |= RT5651_I2S_DF_LEFT; in rt5651_set_dai_fmt()
1445 reg_val |= RT5651_I2S_DF_PCM_A; in rt5651_set_dai_fmt()
1448 reg_val |= RT5651_I2S_DF_PCM_B; in rt5651_set_dai_fmt()
1458 RT5651_I2S_DF_MASK, reg_val); in rt5651_set_dai_fmt()
1463 RT5651_I2S_DF_MASK, reg_val); in rt5651_set_dai_fmt()
1477 unsigned int reg_val = 0; in rt5651_set_dai_sysclk() local
1484 reg_val |= RT5651_SCLK_SRC_MCLK; in rt5651_set_dai_sysclk()
[all …]
Drt5640.c1740 unsigned int reg_val = 0; in rt5640_set_dai_fmt() local
1748 reg_val |= RT5640_I2S_MS_S; in rt5640_set_dai_fmt()
1759 reg_val |= RT5640_I2S_BP_INV; in rt5640_set_dai_fmt()
1769 reg_val |= RT5640_I2S_DF_LEFT; in rt5640_set_dai_fmt()
1772 reg_val |= RT5640_I2S_DF_PCM_A; in rt5640_set_dai_fmt()
1775 reg_val |= RT5640_I2S_DF_PCM_B; in rt5640_set_dai_fmt()
1789 RT5640_I2S_DF_MASK, reg_val); in rt5640_set_dai_fmt()
1794 RT5640_I2S_DF_MASK, reg_val); in rt5640_set_dai_fmt()
1805 unsigned int reg_val = 0; in rt5640_set_dai_sysclk() local
1812 reg_val |= RT5640_SCLK_SRC_MCLK; in rt5640_set_dai_sysclk()
[all …]
Drt5670.c2390 unsigned int reg_val = 0; in rt5670_set_dai_fmt() local
2397 reg_val |= RT5670_I2S_MS_S; in rt5670_set_dai_fmt()
2408 reg_val |= RT5670_I2S_BP_INV; in rt5670_set_dai_fmt()
2418 reg_val |= RT5670_I2S_DF_LEFT; in rt5670_set_dai_fmt()
2421 reg_val |= RT5670_I2S_DF_PCM_A; in rt5670_set_dai_fmt()
2424 reg_val |= RT5670_I2S_DF_PCM_B; in rt5670_set_dai_fmt()
2434 RT5670_I2S_DF_MASK, reg_val); in rt5670_set_dai_fmt()
2439 RT5670_I2S_DF_MASK, reg_val); in rt5670_set_dai_fmt()
2453 unsigned int reg_val = 0; in rt5670_set_dai_sysclk() local
2457 reg_val |= RT5670_SCLK_SRC_MCLK; in rt5670_set_dai_sysclk()
[all …]
Drt5645.c2132 unsigned int reg_val = 0, pol_sft; in rt5645_set_dai_fmt() local
2148 reg_val |= RT5645_I2S_MS_S; in rt5645_set_dai_fmt()
2159 reg_val |= (1 << pol_sft); in rt5645_set_dai_fmt()
2169 reg_val |= RT5645_I2S_DF_LEFT; in rt5645_set_dai_fmt()
2172 reg_val |= RT5645_I2S_DF_PCM_A; in rt5645_set_dai_fmt()
2175 reg_val |= RT5645_I2S_DF_PCM_B; in rt5645_set_dai_fmt()
2184 RT5645_I2S_DF_MASK, reg_val); in rt5645_set_dai_fmt()
2189 RT5645_I2S_DF_MASK, reg_val); in rt5645_set_dai_fmt()
2203 unsigned int reg_val = 0; in rt5645_set_dai_sysclk() local
2210 reg_val |= RT5645_SCLK_SRC_MCLK; in rt5645_set_dai_sysclk()
[all …]
Drt5677.c4082 unsigned int reg_val = 0; in rt5677_set_dai_fmt() local
4089 reg_val |= RT5677_I2S_MS_S; in rt5677_set_dai_fmt()
4100 reg_val |= RT5677_I2S_BP_INV; in rt5677_set_dai_fmt()
4110 reg_val |= RT5677_I2S_DF_LEFT; in rt5677_set_dai_fmt()
4113 reg_val |= RT5677_I2S_DF_PCM_A; in rt5677_set_dai_fmt()
4116 reg_val |= RT5677_I2S_DF_PCM_B; in rt5677_set_dai_fmt()
4126 RT5677_I2S_DF_MASK, reg_val); in rt5677_set_dai_fmt()
4131 RT5677_I2S_DF_MASK, reg_val); in rt5677_set_dai_fmt()
4136 RT5677_I2S_DF_MASK, reg_val); in rt5677_set_dai_fmt()
4141 RT5677_I2S_DF_MASK, reg_val); in rt5677_set_dai_fmt()
[all …]
Drt5631.c1214 u16 reg_val; member
1221 u16 reg_val; member
1400 coeff_div[coeff].reg_val); in rt5631_hifi_pcm_params()
1499 codec_master_pll_div[i].reg_val); in rt5631_codec_set_dai_pll()
1518 codec_slave_pll_div[i].reg_val); in rt5631_codec_set_dai_pll()
/linux-4.1.27/drivers/thermal/ti-soc-thermal/
Dti-bandgap.c407 u32 temp, reg_val; in ti_bandgap_unmask_interrupts() local
413 reg_val = ti_bandgap_readl(bgp, tsr->bgap_mask_ctrl); in ti_bandgap_unmask_interrupts()
416 reg_val |= tsr->mask_hot_mask; in ti_bandgap_unmask_interrupts()
418 reg_val &= ~tsr->mask_hot_mask; in ti_bandgap_unmask_interrupts()
421 reg_val |= tsr->mask_cold_mask; in ti_bandgap_unmask_interrupts()
423 reg_val &= ~tsr->mask_cold_mask; in ti_bandgap_unmask_interrupts()
424 ti_bandgap_writel(bgp, reg_val, tsr->bgap_mask_ctrl); in ti_bandgap_unmask_interrupts()
448 u32 thresh_val, reg_val, t_hot, t_cold, ctrl; in ti_bandgap_update_alert_threshold() local
476 reg_val = thresh_val & in ti_bandgap_update_alert_threshold()
478 reg_val |= (t_hot << __ffs(tsr->threshold_thot_mask)) | in ti_bandgap_update_alert_threshold()
[all …]
/linux-4.1.27/drivers/net/ethernet/amd/
Damd8111e.c116 unsigned int reg_val; in amd8111e_read_phy() local
119 reg_val = readl(mmio + PHY_ACCESS); in amd8111e_read_phy()
120 while (reg_val & PHY_CMD_ACTIVE) in amd8111e_read_phy()
121 reg_val = readl( mmio + PHY_ACCESS ); in amd8111e_read_phy()
126 reg_val = readl(mmio + PHY_ACCESS); in amd8111e_read_phy()
128 } while (--repeat && (reg_val & PHY_CMD_ACTIVE)); in amd8111e_read_phy()
129 if(reg_val & PHY_RD_ERR) in amd8111e_read_phy()
132 *val = reg_val & 0xffff; in amd8111e_read_phy()
146 unsigned int reg_val; in amd8111e_write_phy() local
148 reg_val = readl(mmio + PHY_ACCESS); in amd8111e_write_phy()
[all …]
/linux-4.1.27/drivers/media/tuners/
Dmxl301rf.c146 struct reg_val { struct
151 static const struct reg_val set_idac[] = { argument
164 struct reg_val tune0[] = { in mxl301rf_set_params()
174 struct reg_val tune1[] = { in mxl301rf_set_params()
238 static const struct reg_val standby_data[] = {
Dtua9001_priv.h24 struct reg_val { struct
Dtua9001.c72 struct reg_val data[] = { in tua9001_init()
142 struct reg_val data[2]; in tua9001_set_params()
/linux-4.1.27/drivers/net/ethernet/intel/i40e/
Di40e_diag.c141 u16 reg_val; in i40e_diag_eeprom_test() local
144 ret_code = i40e_read_nvm_word(hw, I40E_SR_NVM_CONTROL_WORD, &reg_val); in i40e_diag_eeprom_test()
146 ((reg_val & I40E_SR_CONTROL_WORD_1_MASK) == in i40e_diag_eeprom_test()
Di40e_ethtool.c2449 u32 reg_val; in i40e_get_rxfh() local
2459 reg_val = rd32(hw, I40E_PFQF_HLUT(i)); in i40e_get_rxfh()
2460 indir[j++] = reg_val & 0xff; in i40e_get_rxfh()
2461 indir[j++] = (reg_val >> 8) & 0xff; in i40e_get_rxfh()
2462 indir[j++] = (reg_val >> 16) & 0xff; in i40e_get_rxfh()
2463 indir[j++] = (reg_val >> 24) & 0xff; in i40e_get_rxfh()
2468 reg_val = rd32(hw, I40E_PFQF_HKEY(i)); in i40e_get_rxfh()
2469 key[j++] = (u8)(reg_val & 0xff); in i40e_get_rxfh()
2470 key[j++] = (u8)((reg_val >> 8) & 0xff); in i40e_get_rxfh()
2471 key[j++] = (u8)((reg_val >> 16) & 0xff); in i40e_get_rxfh()
[all …]
Di40e_common.c705 u32 reg_val; in i40e_pre_tx_queue_cfg() local
712 reg_val = rd32(hw, I40E_GLLAN_TXPRE_QDIS(reg_block)); in i40e_pre_tx_queue_cfg()
713 reg_val &= ~I40E_GLLAN_TXPRE_QDIS_QINDX_MASK; in i40e_pre_tx_queue_cfg()
714 reg_val |= (abs_queue_idx << I40E_GLLAN_TXPRE_QDIS_QINDX_SHIFT); in i40e_pre_tx_queue_cfg()
717 reg_val |= I40E_GLLAN_TXPRE_QDIS_CLEAR_QDIS_MASK; in i40e_pre_tx_queue_cfg()
719 reg_val |= I40E_GLLAN_TXPRE_QDIS_SET_QDIS_MASK; in i40e_pre_tx_queue_cfg()
721 wr32(hw, I40E_GLLAN_TXPRE_QDIS(reg_block), reg_val); in i40e_pre_tx_queue_cfg()
2131 u32 reg_addr, u64 *reg_val, in i40e_aq_debug_read_register() argument
2139 if (reg_val == NULL) in i40e_aq_debug_read_register()
2149 *reg_val = ((u64)le32_to_cpu(cmd_resp->value_high) << 32) | in i40e_aq_debug_read_register()
[all …]
Di40e_prototype.h73 u32 reg_addr, u64 reg_val,
76 u32 reg_addr, u64 *reg_val,
Di40e_main.c7415 u32 reg_val; in i40e_config_rss() local
7431 reg_val = rd32(hw, I40E_PFQF_CTL_0); in i40e_config_rss()
7433 reg_val |= I40E_PFQF_CTL_0_HASHLUTSIZE_512; in i40e_config_rss()
7435 reg_val &= ~I40E_PFQF_CTL_0_HASHLUTSIZE_512; in i40e_config_rss()
7436 wr32(hw, I40E_PFQF_CTL_0, reg_val); in i40e_config_rss()
/linux-4.1.27/drivers/net/ethernet/amd/xgbe/
Dxgbe-common.h1055 u32 reg_val = XGMAC_IOREAD((_pdata), _reg); \
1056 SET_BITS(reg_val, \
1059 XGMAC_IOWRITE((_pdata), _reg, reg_val); \
1081 u32 reg_val = XGMAC_MTL_IOREAD((_pdata), (_n), _reg); \
1082 SET_BITS(reg_val, \
1085 XGMAC_MTL_IOWRITE((_pdata), (_n), _reg, reg_val); \
1105 u32 reg_val = XGMAC_DMA_IOREAD((_channel), _reg); \
1106 SET_BITS(reg_val, \
1109 XGMAC_DMA_IOWRITE((_channel), _reg, reg_val); \
Dxgbe-dev.c497 unsigned int reg, reg_val; in xgbe_disable_tx_flow_control() local
509 reg_val = XGMAC_IOREAD(pdata, reg); in xgbe_disable_tx_flow_control()
510 XGMAC_SET_BITS(reg_val, MAC_Q0TFCR, TFE, 0); in xgbe_disable_tx_flow_control()
511 XGMAC_IOWRITE(pdata, reg, reg_val); in xgbe_disable_tx_flow_control()
522 unsigned int reg, reg_val; in xgbe_enable_tx_flow_control() local
534 reg_val = XGMAC_IOREAD(pdata, reg); in xgbe_enable_tx_flow_control()
537 XGMAC_SET_BITS(reg_val, MAC_Q0TFCR, TFE, 1); in xgbe_enable_tx_flow_control()
539 XGMAC_SET_BITS(reg_val, MAC_Q0TFCR, PT, 0xffff); in xgbe_enable_tx_flow_control()
541 XGMAC_IOWRITE(pdata, reg, reg_val); in xgbe_enable_tx_flow_control()
1347 unsigned int mask, reg, reg_val; in xgbe_config_dcb_pfc() local
[all …]
/linux-4.1.27/include/linux/mfd/da9055/
Dcore.h83 unsigned char reg_val) in da9055_reg_update() argument
85 return regmap_update_bits(da9055->regmap, reg, bit_mask, reg_val); in da9055_reg_update()
/linux-4.1.27/arch/arm/plat-orion/
Dgpio.c505 u32 reg_val; in orion_gpio_unmask_irq() local
509 reg_val = irq_reg_readl(gc, ct->regs.mask); in orion_gpio_unmask_irq()
510 reg_val |= mask; in orion_gpio_unmask_irq()
511 irq_reg_writel(gc, reg_val, ct->regs.mask); in orion_gpio_unmask_irq()
520 u32 reg_val; in orion_gpio_mask_irq() local
523 reg_val = irq_reg_readl(gc, ct->regs.mask); in orion_gpio_mask_irq()
524 reg_val &= ~mask; in orion_gpio_mask_irq()
525 irq_reg_writel(gc, reg_val, ct->regs.mask); in orion_gpio_mask_irq()
/linux-4.1.27/arch/sparc/include/asm/
Dhypervisor.h2945 unsigned long *reg_val);
2947 unsigned long reg_val);
2955 unsigned long *reg_val);
2957 unsigned long reg_val);
2966 unsigned long *reg_val);
2968 unsigned long reg_val);
/linux-4.1.27/drivers/regulator/
Dhi6421-regulator.c411 u32 reg_val; in hi6421_regulator_ldo_get_mode() local
413 regmap_read(rdev->regmap, rdev->desc->enable_reg, &reg_val); in hi6421_regulator_ldo_get_mode()
414 if (reg_val & info->mode_mask) in hi6421_regulator_ldo_get_mode()
423 u32 reg_val; in hi6421_regulator_buck_get_mode() local
425 regmap_read(rdev->regmap, rdev->desc->enable_reg, &reg_val); in hi6421_regulator_buck_get_mode()
426 if (reg_val & info->mode_mask) in hi6421_regulator_buck_get_mode()
Dda9052-regulator.c123 int reg_val = 0; in da9052_dcdc_set_current_limit() local
135 reg_val = i; in da9052_dcdc_set_current_limit()
150 reg_val << 2); in da9052_dcdc_set_current_limit()
155 reg_val << 6); in da9052_dcdc_set_current_limit()
Dda9211-regulator.c300 int reg_val, err, ret = IRQ_NONE; in da9211_irq_handler() local
302 err = regmap_read(chip->regmap, DA9211_REG_EVENT_B, &reg_val); in da9211_irq_handler()
306 if (reg_val & DA9211_E_OV_CURR_A) { in da9211_irq_handler()
318 if (reg_val & DA9211_E_OV_CURR_B) { in da9211_irq_handler()
Dtps80031-regulator.c105 u8 reg_val; in tps80031_reg_is_enabled() local
112 &reg_val); in tps80031_reg_is_enabled()
118 return (reg_val & TPS80031_STATE_MASK) == TPS80031_STATE_ON; in tps80031_reg_is_enabled()
184 u8 reg_val; in tps80031_dcdc_set_voltage_sel() local
188 ri->rinfo->force_reg, &reg_val); in tps80031_dcdc_set_voltage_sel()
194 if (!(reg_val & SMPS_CMD_MASK)) { in tps80031_dcdc_set_voltage_sel()
Dmax8660.c93 u8 reg_val = (max8660->shadow_regs[reg] & mask) | val; in max8660_write() local
96 max8660_addresses[reg], reg_val); in max8660_write()
99 max8660_addresses[reg], reg_val); in max8660_write()
101 max8660->shadow_regs[reg] = reg_val; in max8660_write()
Dda903x.c161 uint8_t reg_val; in da903x_is_enabled() local
164 ret = da903x_read(da9034_dev, info->enable_reg, &reg_val); in da903x_is_enabled()
168 return !!(reg_val & (1 << info->enable_bit)); in da903x_is_enabled()
Dtps65910-regulator.c933 u8 reg_val = srvsel & VDD1_OP_SEL_MASK; in tps65910_set_ext_sleep_config() local
936 reg_val); in tps65910_set_ext_sleep_config()
/linux-4.1.27/drivers/media/usb/as102/
Das10x_cmd.h297 struct as10x_register_value reg_val; member
308 struct as10x_register_value reg_val; member
324 struct as10x_register_value reg_val; member
350 struct as10x_register_value reg_val; member
Das10x_cmd_cfg.c72 *pvalue = le32_to_cpu((__force __le32)prsp->body.context.rsp.reg_val.u.value32); in as10x_cmd_get_context()
104 pcmd->body.context.req.reg_val.u.value32 = (__force u32)cpu_to_le32(value); in as10x_cmd_set_context()
/linux-4.1.27/drivers/mmc/host/
Dsdhci-pxav3.c289 u8 reg_val = readb(pxa->sdio3_conf_reg); in pxav3_set_uhs_signaling() local
293 reg_val &= ~SDIO3_CONF_CLK_INV; in pxav3_set_uhs_signaling()
294 reg_val |= SDIO3_CONF_SD_FB_CLK; in pxav3_set_uhs_signaling()
296 reg_val |= SDIO3_CONF_CLK_INV; in pxav3_set_uhs_signaling()
297 reg_val &= ~SDIO3_CONF_SD_FB_CLK; in pxav3_set_uhs_signaling()
299 writeb(reg_val, pxa->sdio3_conf_reg); in pxav3_set_uhs_signaling()
Domap_hsmmc.c1158 u32 reg_val = 0; in omap_hsmmc_switch_opcond() local
1181 reg_val = OMAP_HSMMC_READ(host->base, HCTL); in omap_hsmmc_switch_opcond()
1199 reg_val |= SDVS18; in omap_hsmmc_switch_opcond()
1201 reg_val |= SDVS30; in omap_hsmmc_switch_opcond()
1203 OMAP_HSMMC_WRITE(host->base, HCTL, reg_val); in omap_hsmmc_switch_opcond()
/linux-4.1.27/drivers/net/ethernet/intel/igb/
De1000_i210.c848 u32 wuc, mdicnfg, ctrl, ctrl_ext, reg_val; in igb_pll_workaround_i210() local
855 reg_val = mdicnfg & ~E1000_MDICNFG_EXT_MDIO; in igb_pll_workaround_i210()
856 wr32(E1000_MDICNFG, reg_val); in igb_pll_workaround_i210()
884 reg_val = (E1000_INVM_AUTOLOAD << 4) | (tmp_nvm << 16); in igb_pll_workaround_i210()
885 wr32(E1000_EEARBC_I210, reg_val); in igb_pll_workaround_i210()
893 reg_val = (E1000_INVM_AUTOLOAD << 4) | (nvm_word << 16); in igb_pll_workaround_i210()
894 wr32(E1000_EEARBC_I210, reg_val); in igb_pll_workaround_i210()
De1000_82575.c2031 u32 reg_val, reg_offset; in igb_vmdq_set_anti_spoofing_pf() local
2045 reg_val = rd32(reg_offset); in igb_vmdq_set_anti_spoofing_pf()
2047 reg_val |= (E1000_DTXSWC_MAC_SPOOF_MASK | in igb_vmdq_set_anti_spoofing_pf()
2052 reg_val ^= (1 << pf | 1 << (pf + MAX_NUM_VFS)); in igb_vmdq_set_anti_spoofing_pf()
2054 reg_val &= ~(E1000_DTXSWC_MAC_SPOOF_MASK | in igb_vmdq_set_anti_spoofing_pf()
2057 wr32(reg_offset, reg_val); in igb_vmdq_set_anti_spoofing_pf()
Digb_main.c7903 u32 reg_val, reg_offset; in igb_ndo_set_vf_spoofchk() local
7912 reg_val = rd32(reg_offset); in igb_ndo_set_vf_spoofchk()
7914 reg_val |= ((1 << vf) | in igb_ndo_set_vf_spoofchk()
7917 reg_val &= ~((1 << vf) | in igb_ndo_set_vf_spoofchk()
7919 wr32(reg_offset, reg_val); in igb_ndo_set_vf_spoofchk()
/linux-4.1.27/arch/powerpc/kernel/
Dfadump.c445 u64 reg_val) in fadump_set_regval() argument
451 regs->gpr[i] = (unsigned long)reg_val; in fadump_set_regval()
453 regs->nip = (unsigned long)reg_val; in fadump_set_regval()
455 regs->msr = (unsigned long)reg_val; in fadump_set_regval()
457 regs->ctr = (unsigned long)reg_val; in fadump_set_regval()
459 regs->link = (unsigned long)reg_val; in fadump_set_regval()
461 regs->xer = (unsigned long)reg_val; in fadump_set_regval()
463 regs->ccr = (unsigned long)reg_val; in fadump_set_regval()
465 regs->dar = (unsigned long)reg_val; in fadump_set_regval()
467 regs->dsisr = (unsigned long)reg_val; in fadump_set_regval()
/linux-4.1.27/drivers/watchdog/
Dda9055_wdt.c42 u8 reg_val; member
73 da9055_wdt_maps[i].reg_val << in da9055_wdt_set_timeout()
Drn5t618_wdt.c44 u8 reg_val; member
69 rn5t618_wdt_map[i].reg_val); in rn5t618_wdt_set_timeout()
Dda9052_wdt.c39 u8 reg_val; member
93 da9052_wdt_maps[i].reg_val); in da9052_wdt_set_timeout()
/linux-4.1.27/include/linux/mfd/da9052/
Dda9052.h194 unsigned char reg_val) in da9052_reg_update() argument
198 ret = regmap_update_bits(da9052->regmap, reg, bit_mask, reg_val); in da9052_reg_update()
/linux-4.1.27/drivers/media/pci/pt3/
Dpt3.c94 struct reg_val { struct
100 pt3_demod_write(struct pt3_adapter *adap, const struct reg_val *data, int num) in pt3_demod_write() argument
147 struct reg_val rv = { 0x1e, 0x99 }; in pt3_set_tuner_power()
225 static const struct reg_val init0_sat[] = {
229 static const struct reg_val init0_ter[] = {
233 static const struct reg_val cfg_sat[] = {
237 static const struct reg_val cfg_ter[] = {
/linux-4.1.27/drivers/net/wireless/iwlwifi/mvm/
Dops.c145 u32 reg_val = 0; in iwl_mvm_nic_config() local
156 reg_val |= CSR_HW_REV_STEP(mvm->trans->hw_rev) << in iwl_mvm_nic_config()
158 reg_val |= CSR_HW_REV_DASH(mvm->trans->hw_rev) << in iwl_mvm_nic_config()
162 reg_val |= radio_cfg_type << CSR_HW_IF_CONFIG_REG_POS_PHY_TYPE; in iwl_mvm_nic_config()
163 reg_val |= radio_cfg_step << CSR_HW_IF_CONFIG_REG_POS_PHY_STEP; in iwl_mvm_nic_config()
164 reg_val |= radio_cfg_dash << CSR_HW_IF_CONFIG_REG_POS_PHY_DASH; in iwl_mvm_nic_config()
177 reg_val |= CSR_HW_IF_CONFIG_REG_BIT_RADIO_SI; in iwl_mvm_nic_config()
187 reg_val); in iwl_mvm_nic_config()
/linux-4.1.27/drivers/staging/iio/light/
Dtsl2583.c339 u8 reg_val; in taos_als_calibrate() local
353 reg_val = i2c_smbus_read_byte(chip->client); in taos_als_calibrate()
354 if ((reg_val & (TSL258X_CNTL_ADC_ENBL | TSL258X_CNTL_PWR_ON)) in taos_als_calibrate()
369 reg_val = i2c_smbus_read_byte(chip->client); in taos_als_calibrate()
371 if ((reg_val & TSL258X_STA_ADC_VALID) != TSL258X_STA_ADC_VALID) { in taos_als_calibrate()
Dtsl2x7x_core.c573 u8 reg_val; in tsl2x7x_als_calibrate() local
586 reg_val = i2c_smbus_read_byte(chip->client); in tsl2x7x_als_calibrate()
587 if ((reg_val & (TSL2X7X_CNTL_ADC_ENBL | TSL2X7X_CNTL_PWR_ON)) in tsl2x7x_als_calibrate()
602 reg_val = i2c_smbus_read_byte(chip->client); in tsl2x7x_als_calibrate()
603 if ((reg_val & TSL2X7X_STA_ADC_VALID) != TSL2X7X_STA_ADC_VALID) { in tsl2x7x_als_calibrate()
637 u8 reg_val = 0; in tsl2x7x_chip_on() local
742 reg_val = TSL2X7X_CNTL_PWR_ON | TSL2X7X_CNTL_ADC_ENBL; in tsl2x7x_chip_on()
745 reg_val |= TSL2X7X_CNTL_PROX_DET_ENBL; in tsl2x7x_chip_on()
747 reg_val |= chip->tsl2x7x_settings.interrupts_en; in tsl2x7x_chip_on()
749 (TSL2X7X_CMD_REG | TSL2X7X_CNTRL), reg_val); in tsl2x7x_chip_on()
/linux-4.1.27/drivers/pinctrl/intel/
Dpinctrl-baytrail.c336 u32 reg_val; in byt_gpio_direction_output() local
349 reg_val = readl(reg) | BYT_DIR_MASK; in byt_gpio_direction_output()
350 reg_val &= ~(BYT_OUTPUT_EN | BYT_INPUT_EN); in byt_gpio_direction_output()
353 writel(reg_val | BYT_LEVEL, reg); in byt_gpio_direction_output()
355 writel(reg_val & ~BYT_LEVEL, reg); in byt_gpio_direction_output()
/linux-4.1.27/drivers/media/usb/dvb-usb-v2/
Daf9035.h37 struct reg_val { struct
/linux-4.1.27/drivers/iio/accel/
Dmma9553.c272 u16 reg_val, config; in mma9553_set_config() local
274 reg_val = *p_reg_val; in mma9553_set_config()
275 if (val == mma9553_get_bits(reg_val, mask)) in mma9553_set_config()
278 reg_val = mma9553_set_bits(reg_val, val, mask); in mma9553_set_config()
280 reg, reg_val); in mma9553_set_config()
287 *p_reg_val = reg_val; in mma9553_set_config()
Dbma180.c168 u8 reg_val = (ret & ~mask) | (val << (ffs(mask) - 1)); in bma180_set_bits() local
173 return i2c_smbus_write_byte_data(data->client, reg, reg_val); in bma180_set_bits()
280 u8 reg_val = mode ? data->part_info->lowpower_val : 0; in bma180_set_pmode() local
282 data->part_info->power_mask, reg_val); in bma180_set_pmode()
/linux-4.1.27/drivers/power/avs/
Dsmartreflex.c50 u32 reg_val; in sr_modify_reg() local
66 reg_val = __raw_readl(sr->base + offset); in sr_modify_reg()
67 reg_val &= ~mask; in sr_modify_reg()
71 reg_val |= value; in sr_modify_reg()
73 __raw_writel(reg_val, (sr->base + offset)); in sr_modify_reg()
/linux-4.1.27/sound/pci/aw2/
Daw2-saa7146.c444 unsigned int reg_val = READREG(GPIO_CTRL); in snd_aw2_saa7146_is_using_digital_input() local
445 if ((reg_val & 0xFF) == 0x40) in snd_aw2_saa7146_is_using_digital_input()
/linux-4.1.27/drivers/net/phy/
Damd-xgbe-phy.c276 u16 reg_val = XSIR0_IOREAD((_priv), _reg); \
277 SET_BITS(reg_val, \
280 XSIR0_IOWRITE((_priv), _reg, reg_val); \
296 u16 reg_val = XSIR1_IOREAD((_priv), _reg); \
297 SET_BITS(reg_val, \
300 XSIR1_IOWRITE((_priv), _reg, reg_val); \
323 u16 reg_val = XRXTX_IOREAD((_priv), _reg); \
324 SET_BITS(reg_val, \
327 XRXTX_IOWRITE((_priv), _reg, reg_val); \
/linux-4.1.27/drivers/power/
Daxp288_fuel_gauge.c870 u8 reg_val; in fuel_gauge_set_lowbatt_thresholds() local
880 reg_val = FG_LOW_CAP_WARN_THR; in fuel_gauge_set_lowbatt_thresholds()
882 reg_val = FG_LOW_CAP_CRIT_THR; in fuel_gauge_set_lowbatt_thresholds()
884 reg_val = FG_LOW_CAP_SHDN_THR; in fuel_gauge_set_lowbatt_thresholds()
886 reg_val |= FG_LOW_CAP_THR1_VAL; in fuel_gauge_set_lowbatt_thresholds()
887 ret = fuel_gauge_reg_writeb(info, AXP288_FG_LOW_CAP_REG, reg_val); in fuel_gauge_set_lowbatt_thresholds()
Dwm831x_power.c134 int reg_val; member
214 *reg |= map[i].reg_val; in wm831x_battey_apply_config()
Dab8500_fg.c542 u8 reg_val; in ab8500_fg_inst_curr_start() local
549 AB8500_RTC_CC_CONF_REG, &reg_val); in ab8500_fg_inst_curr_start()
553 if (!(reg_val & CC_PWR_UP_ENA)) { in ab8500_fg_inst_curr_start()
/linux-4.1.27/drivers/rapidio/
Drio.c1032 u32 reg_val; in rio_mport_get_efb() local
1037 &reg_val); in rio_mport_get_efb()
1040 RIO_ASM_INFO_CAR, &reg_val); in rio_mport_get_efb()
1041 return reg_val & RIO_EXT_FTR_PTR_MASK; in rio_mport_get_efb()
1044 rio_local_read_config_32(port, from, &reg_val); in rio_mport_get_efb()
1047 from, &reg_val); in rio_mport_get_efb()
1048 return RIO_GET_BLOCK_ID(reg_val); in rio_mport_get_efb()
/linux-4.1.27/drivers/base/regmap/
Dregmap.c2223 unsigned int reg_val; in regmap_field_read() local
2224 ret = regmap_read(field->regmap, field->reg, &reg_val); in regmap_field_read()
2228 reg_val &= field->mask; in regmap_field_read()
2229 reg_val >>= field->shift; in regmap_field_read()
2230 *val = reg_val; in regmap_field_read()
2250 unsigned int reg_val; in regmap_fields_read() local
2257 &reg_val); in regmap_fields_read()
2261 reg_val &= field->mask; in regmap_fields_read()
2262 reg_val >>= field->shift; in regmap_fields_read()
2263 *val = reg_val; in regmap_fields_read()
/linux-4.1.27/drivers/isdn/hisax/
Dhfc_usb.h89 __u8 reg_val; /* value to be written (or read) */ member
Dhfc_usb.c233 cpu_to_le16(hfc->ctrl_buff[hfc->ctrl_out_idx].reg_val); in ctrl_start_transfer()
248 buf->reg_val = val; in queue_control_request()
/linux-4.1.27/sound/soc/
Dsoc-ops.c70 unsigned int reg_val; in snd_soc_get_enum_double() local
73 ret = snd_soc_component_read(component, e->reg, &reg_val); in snd_soc_get_enum_double()
76 val = (reg_val >> e->shift_l) & e->mask; in snd_soc_get_enum_double()
80 val = (reg_val >> e->shift_l) & e->mask; in snd_soc_get_enum_double()
Dsoc-dapm.c2915 unsigned int reg_val, val; in snd_soc_dapm_get_enum_double() local
2918 int ret = soc_dapm_read(dapm, e->reg, &reg_val); in snd_soc_dapm_get_enum_double()
2922 reg_val = dapm_kcontrol_get_value(kcontrol); in snd_soc_dapm_get_enum_double()
2925 val = (reg_val >> e->shift_l) & e->mask; in snd_soc_dapm_get_enum_double()
2928 val = (reg_val >> e->shift_r) & e->mask; in snd_soc_dapm_get_enum_double()
/linux-4.1.27/drivers/net/ethernet/qlogic/qlge/
Dqlge_dbg.c12 u32 reg_val; in ql_read_other_func_reg() local
19 status = ql_read_mpi_reg(qdev, register_to_read, &reg_val); in ql_read_other_func_reg()
23 return reg_val; in ql_read_other_func_reg()
28 u32 reg, u32 reg_val) in ql_write_other_func_reg() argument
37 status = ql_write_mpi_reg(qdev, register_to_read, reg_val); in ql_write_other_func_reg()
702 u32 func_num, reg, reg_val; in ql_get_sem_registers() local
709 status = ql_read_mpi_reg(qdev, reg, &reg_val); in ql_get_sem_registers()
710 *buf = reg_val; in ql_get_sem_registers()
/linux-4.1.27/drivers/net/wireless/ath/ath6kl/
Ddebug.c936 __le32 reg_val; in ath6kl_regdump_open() local
958 (u32 *)&reg_val); in ath6kl_regdump_open()
963 "0x%06x 0x%08x\n", addr, le32_to_cpu(reg_val)); in ath6kl_regdump_open()
974 (u32 *)&reg_val); in ath6kl_regdump_open()
980 addr, le32_to_cpu(reg_val)); in ath6kl_regdump_open()
1075 u32 reg_addr, reg_val; in ath6kl_regwrite_write() local
1094 if (kstrtou32(sptr, 0, &reg_val)) in ath6kl_regwrite_write()
1098 ar->debug.diag_reg_val_wr = reg_val; in ath6kl_regwrite_write()
/linux-4.1.27/sound/pci/
Dazt3328.c669 unsigned short reg_val = 0; in snd_azf3328_mixer_ac97_read() local
678 reg_val = snd_azf3328_mixer_inw(chip, in snd_azf3328_mixer_ac97_read()
695 reg_val |= azf_emulated_ac97_caps; in snd_azf3328_mixer_ac97_read()
698 reg_val |= azf_emulated_ac97_powerdown; in snd_azf3328_mixer_ac97_read()
703 reg_val |= 0; in snd_azf3328_mixer_ac97_read()
706 reg_val = azf_emulated_ac97_vendor_id >> 16; in snd_azf3328_mixer_ac97_read()
709 reg_val = azf_emulated_ac97_vendor_id & 0xffff; in snd_azf3328_mixer_ac97_read()
720 return reg_val; in snd_azf3328_mixer_ac97_read()
/linux-4.1.27/drivers/scsi/qla2xxx/
Dqla_mr.c530 uint32_t reg_val; in qlafx00_soc_cpu_reset() local
544 reg_val = QLAFX00_GET_HBA_SOC_REG(ha, 0x60840); in qlafx00_soc_cpu_reset()
545 reg_val &= ~(1<<12); in qlafx00_soc_cpu_reset()
546 QLAFX00_SET_HBA_SOC_REG(ha, 0x60840, reg_val); in qlafx00_soc_cpu_reset()
548 reg_val = QLAFX00_GET_HBA_SOC_REG(ha, 0x60844); in qlafx00_soc_cpu_reset()
549 reg_val &= ~(1<<12); in qlafx00_soc_cpu_reset()
550 QLAFX00_SET_HBA_SOC_REG(ha, 0x60844, reg_val); in qlafx00_soc_cpu_reset()
552 reg_val = QLAFX00_GET_HBA_SOC_REG(ha, 0x60848); in qlafx00_soc_cpu_reset()
553 reg_val &= ~(1<<12); in qlafx00_soc_cpu_reset()
554 QLAFX00_SET_HBA_SOC_REG(ha, 0x60848, reg_val); in qlafx00_soc_cpu_reset()
[all …]
/linux-4.1.27/drivers/staging/rts5208/
Dxd.c1633 u8 reg_val, page_cnt; in xd_read_multiple_pages() local
1702 retval = rtsx_read_register(chip, XD_PAGE_STATUS, &reg_val); in xd_read_multiple_pages()
1708 if (reg_val != XD_GPG) in xd_read_multiple_pages()
1711 retval = rtsx_read_register(chip, XD_CTL, &reg_val); in xd_read_multiple_pages()
1717 if (((reg_val & (XD_ECC1_ERROR | XD_ECC1_UNCORRECTABLE)) in xd_read_multiple_pages()
1719 || ((reg_val & (XD_ECC2_ERROR | XD_ECC2_UNCORRECTABLE)) in xd_read_multiple_pages()
1852 u8 page_cnt, reg_val; in xd_write_multiple_pages() local
1938 retval = rtsx_read_register(chip, XD_DAT, &reg_val); in xd_write_multiple_pages()
1943 if (reg_val & PROGRAM_ERROR) { in xd_write_multiple_pages()
/linux-4.1.27/drivers/scsi/lpfc/
Dlpfc_debugfs.c2899 uint32_t drb_reg_id, value, reg_val = 0; in lpfc_idiag_drbacc_write() local
2952 reg_val = value; in lpfc_idiag_drbacc_write()
2954 reg_val = readl(drb_reg); in lpfc_idiag_drbacc_write()
2955 reg_val |= value; in lpfc_idiag_drbacc_write()
2958 reg_val = readl(drb_reg); in lpfc_idiag_drbacc_write()
2959 reg_val &= ~value; in lpfc_idiag_drbacc_write()
2961 writel(reg_val, drb_reg); in lpfc_idiag_drbacc_write()
3111 uint32_t ctl_reg_id, value, reg_val = 0; in lpfc_idiag_ctlacc_write() local
3176 reg_val = value; in lpfc_idiag_ctlacc_write()
3178 reg_val = readl(ctl_reg); in lpfc_idiag_ctlacc_write()
[all …]
Dlpfc_attr.c905 uint32_t reg_val; in lpfc_sli4_pdev_reg_request() local
940 reg_val = readl(phba->sli4_hba.conf_regs_memmap_p + in lpfc_sli4_pdev_reg_request()
944 reg_val |= LPFC_FW_DUMP_REQUEST; in lpfc_sli4_pdev_reg_request()
946 reg_val |= LPFC_CTL_PDEV_CTL_FRST; in lpfc_sli4_pdev_reg_request()
948 reg_val |= LPFC_CTL_PDEV_CTL_DRST; in lpfc_sli4_pdev_reg_request()
950 writel(reg_val, phba->sli4_hba.conf_regs_memmap_p + in lpfc_sli4_pdev_reg_request()
962 "access: x%x\n", reg_val); in lpfc_sli4_pdev_reg_request()
967 "access: x%x\n", reg_val); in lpfc_sli4_pdev_reg_request()
/linux-4.1.27/drivers/i2c/busses/
Di2c-eg20t.c630 u32 reg_val; in pch_i2c_handler() local
646 reg_val = ioread32(p + PCH_I2CSR); in pch_i2c_handler()
647 if (reg_val & (I2CMAL_BIT | I2CMCF_BIT | I2CMIF_BIT)) { in pch_i2c_handler()
/linux-4.1.27/drivers/usb/musb/
Dtusb6010.c40 #define TUSB_REV_MAJOR(reg_val) ((reg_val >> 4) & 0xf) argument
41 #define TUSB_REV_MINOR(reg_val) (reg_val & 0xf) argument
/linux-4.1.27/drivers/net/can/
Dpch_can.c233 u32 reg_val = ioread32(&priv->regs->opt); in pch_can_set_optmode() local
236 reg_val |= PCH_OPT_SILENT; in pch_can_set_optmode()
239 reg_val |= PCH_OPT_LBACK; in pch_can_set_optmode()
242 iowrite32(reg_val, &priv->regs->opt); in pch_can_set_optmode()
/linux-4.1.27/drivers/isdn/hardware/mISDN/
Dhfcsusb.h116 __u8 reg_val; /* value to be written (or read) */ member
Dhfcsusb.c80 cpu_to_le16(hw->ctrl_buff[hw->ctrl_out_idx].reg_val); in ctrl_start_transfer()
105 buf->reg_val = val; in write_reg()
/linux-4.1.27/drivers/staging/octeon/
Dethernet.c587 const struct device_node *parent, int reg_val) in cvm_oct_of_get_child() argument
598 if (addr && (be32_to_cpu(*addr) == reg_val)) in cvm_oct_of_get_child()
/linux-4.1.27/drivers/media/i2c/s5c73m3/
Ds5c73m3.h431 u8 reg_val; member
Ds5c73m3-core.c389 prev_size->width, prev_size->height, prev_size->reg_val); in s5c73m3_set_frame_size()
391 chg_mode = prev_size->reg_val | COMM_CHG_MODE_NEW; in s5c73m3_set_frame_size()
396 cap_size->width, cap_size->height, cap_size->reg_val); in s5c73m3_set_frame_size()
397 chg_mode |= cap_size->reg_val; in s5c73m3_set_frame_size()
/linux-4.1.27/sound/soc/fsl/
Dfsl_ssi.c1152 u32 reg_val; in fsl_ssi_ac97_read() local
1162 regmap_read(regs, CCSR_SSI_SACDAT, &reg_val); in fsl_ssi_ac97_read()
1163 val = (reg_val >> 4) & 0xffff; in fsl_ssi_ac97_read()
/linux-4.1.27/drivers/net/wireless/ath/ath10k/
Ddebug.c1078 u32 reg_addr, reg_val; in ath10k_reg_value_read() local
1091 reg_val = ath10k_hif_read32(ar, reg_addr); in ath10k_reg_value_read()
1092 len = scnprintf(buf, sizeof(buf), "0x%08x:0x%08x\n", reg_addr, reg_val); in ath10k_reg_value_read()
1107 u32 reg_addr, reg_val; in ath10k_reg_value_write() local
1120 ret = kstrtou32_from_user(user_buf, count, 0, &reg_val); in ath10k_reg_value_write()
1124 ath10k_hif_write32(ar, reg_addr, reg_val); in ath10k_reg_value_write()
/linux-4.1.27/drivers/pinctrl/bcm/
Dpinctrl-bcm281xx.c970 static inline void bcm281xx_pin_update(u32 *reg_val, u32 *reg_mask, in bcm281xx_pin_update() argument
974 *reg_val &= ~param_mask; in bcm281xx_pin_update()
975 *reg_val |= (param_val << param_shift) & param_mask; in bcm281xx_pin_update()
/linux-4.1.27/drivers/scsi/pm8001/
Dpm80xx_hwi.c52 u32 reg_val; in pm80xx_bar4_shift() local
58 reg_val = pm8001_cr32(pm8001_ha, 0, MEMBASE_II_SHIFT_REGISTER); in pm80xx_bar4_shift()
59 } while ((reg_val != shift_value) && time_before(jiffies, start)); in pm80xx_bar4_shift()
60 if (reg_val != shift_value) { in pm80xx_bar4_shift()
63 " = 0x%x\n", reg_val)); in pm80xx_bar4_shift()
94 u32 accum_len , reg_val, index, *temp; in pm80xx_get_fatal_dump() local
228 reg_val = pm8001_mr32(fatal_table_address, in pm80xx_get_fatal_dump()
230 } while ((reg_val) && time_before(jiffies, start)); in pm80xx_get_fatal_dump()
232 if (reg_val != 0) { in pm80xx_get_fatal_dump()
235 " = 0x%x\n", reg_val)); in pm80xx_get_fatal_dump()
/linux-4.1.27/drivers/tty/serial/
Dsirfsoc_uart.h398 unsigned int reg_val; member
Dsirfsoc_uart.c948 clk_div_reg = baudrate_to_regv[ic].reg_val; in sirfsoc_uart_set_termios()
/linux-4.1.27/drivers/net/wireless/ath/ath9k/
Dar9003_eeprom.c3887 u32 reg_val; in ar9003_hw_internal_regulator_apply() local
3934 reg_val = le32_to_cpu(pBase->swreg); in ar9003_hw_internal_regulator_apply()
3935 REG_WRITE(ah, AR_PHY_PMU1, reg_val); in ar9003_hw_internal_regulator_apply()
3941 reg_val = le32_to_cpu(pBase->swreg); in ar9003_hw_internal_regulator_apply()
3945 REG_WRITE(ah, AR_RTC_REG_CONTROL0, reg_val); in ar9003_hw_internal_regulator_apply()
3970 reg_val = REG_READ(ah, AR_RTC_SLEEP_CLK) | in ar9003_hw_internal_regulator_apply()
3972 REG_WRITE(ah, AR_RTC_SLEEP_CLK, reg_val); in ar9003_hw_internal_regulator_apply()
/linux-4.1.27/drivers/net/wireless/brcm80211/brcmfmac/
Dsdio.c3846 u32 reg_val; in brcmf_sdio_probe_attach() local
3890 reg_val = brcmf_sdiod_regrb(bus->sdiodev, in brcmf_sdio_probe_attach()
3895 reg_val |= SDIO_CCCR_BRCM_CARDCTRL_WLANRESET; in brcmf_sdio_probe_attach()
3898 SDIO_CCCR_BRCM_CARDCTRL, reg_val, &err); in brcmf_sdio_probe_attach()
3905 reg_val = brcmf_sdiod_regrl(bus->sdiodev, reg_addr, &err); in brcmf_sdio_probe_attach()
3909 reg_val |= (BCMA_CC_PMU_CTL_RES_RELOAD << BCMA_CC_PMU_CTL_RES_SHIFT); in brcmf_sdio_probe_attach()
3911 brcmf_sdiod_regwl(bus->sdiodev, reg_addr, reg_val, &err); in brcmf_sdio_probe_attach()
/linux-4.1.27/drivers/net/wireless/iwlwifi/pcie/
Dtx.c648 u32 reg_val; in iwl_pcie_tx_start() local
690 reg_val = iwl_read_direct32(trans, FH_TX_CHICKEN_BITS_REG); in iwl_pcie_tx_start()
692 reg_val | FH_TX_CHICKEN_BITS_SCD_AUTO_RETRY_EN); in iwl_pcie_tx_start()
/linux-4.1.27/drivers/net/ethernet/sun/
Dniu.c2743 static u64 vlan_entry_set_parity(u64 reg_val) in vlan_entry_set_parity() argument
2751 if (hweight64(reg_val & port01_mask) & 1) in vlan_entry_set_parity()
2752 reg_val |= ENET_VLAN_TBL_PARITY0; in vlan_entry_set_parity()
2754 reg_val &= ~ENET_VLAN_TBL_PARITY0; in vlan_entry_set_parity()
2756 if (hweight64(reg_val & port23_mask) & 1) in vlan_entry_set_parity()
2757 reg_val |= ENET_VLAN_TBL_PARITY1; in vlan_entry_set_parity()
2759 reg_val &= ~ENET_VLAN_TBL_PARITY1; in vlan_entry_set_parity()
2761 return reg_val; in vlan_entry_set_parity()
2767 u64 reg_val = nr64(ENET_VLAN_TBL(index)); in vlan_tbl_write() local
2769 reg_val &= ~((ENET_VLAN_TBL_VPR | in vlan_tbl_write()
[all …]
Dsungem.c251 static void gem_handle_mif_event(struct gem *gp, u32 reg_val, u32 changed_bits) in gem_handle_mif_event() argument
518 u32 reg_val, changed_bits; in gem_mif_interrupt() local
520 reg_val = (mif_status & MIF_STATUS_DATA) >> 16; in gem_mif_interrupt()
523 gem_handle_mif_event(gp, reg_val, changed_bits); in gem_mif_interrupt()
/linux-4.1.27/drivers/gpu/drm/i915/
Dintel_display.c6095 u32 reg_val; in vlv_pllb_recal_opamp() local
6101 reg_val = vlv_dpio_read(dev_priv, pipe, VLV_PLL_DW9(1)); in vlv_pllb_recal_opamp()
6102 reg_val &= 0xffffff00; in vlv_pllb_recal_opamp()
6103 reg_val |= 0x00000030; in vlv_pllb_recal_opamp()
6104 vlv_dpio_write(dev_priv, pipe, VLV_PLL_DW9(1), reg_val); in vlv_pllb_recal_opamp()
6106 reg_val = vlv_dpio_read(dev_priv, pipe, VLV_REF_DW13); in vlv_pllb_recal_opamp()
6107 reg_val &= 0x8cffffff; in vlv_pllb_recal_opamp()
6108 reg_val = 0x8c000000; in vlv_pllb_recal_opamp()
6109 vlv_dpio_write(dev_priv, pipe, VLV_REF_DW13, reg_val); in vlv_pllb_recal_opamp()
6111 reg_val = vlv_dpio_read(dev_priv, pipe, VLV_PLL_DW9(1)); in vlv_pllb_recal_opamp()
[all …]
/linux-4.1.27/drivers/net/ethernet/intel/e1000e/
Dnetdev.c3024 u32 reg_val; in e1000_configure_tx() local
3026 reg_val = er32(IOSFPC); in e1000_configure_tx()
3027 reg_val |= E1000_RCTL_RDMTS_HEX; in e1000_configure_tx()
3028 ew32(IOSFPC, reg_val); in e1000_configure_tx()
3030 reg_val = er32(TARC(0)); in e1000_configure_tx()
3031 reg_val |= E1000_TARC0_CB_MULTIQ_3_REQ; in e1000_configure_tx()
3032 ew32(TARC(0), reg_val); in e1000_configure_tx()
/linux-4.1.27/drivers/net/wireless/iwlwifi/dvm/
Dmain.c1902 u32 reg_val = in iwl_nic_config() local
1914 reg_val); in iwl_nic_config()
/linux-4.1.27/drivers/video/fbdev/aty/
Dradeon_base.c241 } reg_val; typedef
247 static reg_val common_regs[] = {
/linux-4.1.27/drivers/net/ethernet/emulex/benet/
Dbe_cmds.c4004 u32 reg_val; in lancer_wait_idle() local
4008 reg_val = ioread32(adapter->db + PHYSDEV_CONTROL_OFFSET); in lancer_wait_idle()
4009 if ((reg_val & PHYSDEV_CONTROL_INP_MASK) == 0) in lancer_wait_idle()
/linux-4.1.27/drivers/net/wireless/iwlegacy/
D4965-mac.c5190 u32 reg_val; in il4965_alive_notify() local
5218 reg_val = il_rd(il, FH49_TX_CHICKEN_BITS_REG); in il4965_alive_notify()
5220 reg_val | FH49_TX_CHICKEN_BITS_SCD_AUTO_RETRY_EN); in il4965_alive_notify()