113 	u32 reg_val;  in elm_config()  local
131 	reg_val = (bch_type & ECC_BCH_LEVEL_MASK) | (ELM_ECC_SIZE << 16);  in elm_config()
132 	elm_write_reg(info, ELM_LOCATION_CONFIG, reg_val);  in elm_config()
152 	u32 reg_val;  in elm_configure_page_mode()  local
154 	reg_val = elm_read_reg(info, ELM_PAGE_CTRL);  in elm_configure_page_mode()
156 		reg_val |= BIT(index);	/* enable page mode */  in elm_configure_page_mode()
158 		reg_val &= ~BIT(index);	/* disable page mode */  in elm_configure_page_mode()
160 	elm_write_reg(info, ELM_PAGE_CTRL, reg_val);  in elm_configure_page_mode()
261 	u32 reg_val;  in elm_start_processing()  local
271 			reg_val = elm_read_reg(info, offset);  in elm_start_processing()
272 			reg_val |= ELM_SYNDROME_VALID;  in elm_start_processing()
273 			elm_write_reg(info, offset, reg_val);  in elm_start_processing()
294 	u32 reg_val;  in elm_error_correction()  local
301 			reg_val = elm_read_reg(info, offset);  in elm_error_correction()
304 			if (reg_val & ECC_CORRECTABLE_MASK) {  in elm_error_correction()
309 				err_vec[i].error_count = reg_val &  in elm_error_correction()
315 					reg_val = elm_read_reg(info, offset);  in elm_error_correction()
316 					err_vec[i].error_loc[j] = reg_val &  in elm_error_correction()
350 	u32 reg_val;  in elm_decode_bch_error_page()  local
353 	reg_val = elm_read_reg(info, ELM_IRQSTATUS);  in elm_decode_bch_error_page()
354 	elm_write_reg(info, ELM_IRQSTATUS, reg_val & INTR_STATUS_PAGE_VALID);  in elm_decode_bch_error_page()
367 	reg_val = elm_read_reg(info, ELM_IRQENABLE);  in elm_decode_bch_error_page()
368 	elm_write_reg(info, ELM_IRQENABLE, reg_val & ~INTR_EN_PAGE_MASK);  in elm_decode_bch_error_page()
375 	u32 reg_val;  in elm_isr()  local
378 	reg_val = elm_read_reg(info, ELM_IRQSTATUS);  in elm_isr()
381 	if (reg_val & INTR_STATUS_PAGE_VALID) {  in elm_isr()
383 				reg_val & INTR_STATUS_PAGE_VALID);  in elm_isr()