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Searched refs:regval (Results 1 – 165 of 165) sorted by relevance

/linux-4.1.27/drivers/media/pci/cx23885/
Dcx23885-417.c284 u32 regval; in cx23885_mc417_init() local
289 regval = MC417_SPD_CTL(MC417_SPD_CTL_FAST) | in cx23885_mc417_init()
292 cx_write(MC417_CTL, regval); in cx23885_mc417_init()
295 regval = MC417_MIRDY; in cx23885_mc417_init()
296 cx_write(MC417_OEN, regval); in cx23885_mc417_init()
299 regval = MC417_MIWR | MC417_MIRD | MC417_MICS; in cx23885_mc417_init()
300 cx_write(MC417_RWD, regval); in cx23885_mc417_init()
320 u32 regval; in mc417_register_write() local
328 regval = MC417_MIRD | MC417_MIRDY | MCI_REGISTER_DATA_BYTE0 | in mc417_register_write()
330 cx_write(MC417_RWD, regval); in mc417_register_write()
[all …]
/linux-4.1.27/arch/arm/mach-w90x900/
Dgpio.c58 unsigned int regval; in nuc900_gpio_get() local
60 regval = __raw_readl(pio); in nuc900_gpio_get()
61 regval &= GPIO_GPIO(offset); in nuc900_gpio_get()
63 return (regval != 0); in nuc900_gpio_get()
70 unsigned int regval; in nuc900_gpio_set() local
75 regval = __raw_readl(pio); in nuc900_gpio_set()
78 regval |= GPIO_GPIO(offset); in nuc900_gpio_set()
80 regval &= ~GPIO_GPIO(offset); in nuc900_gpio_set()
82 __raw_writel(regval, pio); in nuc900_gpio_set()
91 unsigned int regval; in nuc900_dir_input() local
[all …]
Dirq.c85 unsigned long regval; in nuc900_group_enable() local
87 regval = __raw_readl(REG_AIC_GEN); in nuc900_group_enable()
90 regval |= groupen; in nuc900_group_enable()
92 regval &= ~groupen; in nuc900_group_enable()
94 __raw_writel(regval, REG_AIC_GEN); in nuc900_group_enable()
/linux-4.1.27/drivers/rapidio/switches/
Dtsi57x.c124 u32 regval; in tsi57x_set_domain() local
132 TSI578_SP_MODE_GLBL, &regval); in tsi57x_set_domain()
134 regval & ~TSI578_SP_MODE_LUT_512); in tsi57x_set_domain()
146 u32 regval; in tsi57x_get_domain() local
152 TSI578_GLBL_ROUTE_BASE, &regval); in tsi57x_get_domain()
154 *sw_domain = (u8)(regval >> 24); in tsi57x_get_domain()
162 u32 regval; in tsi57x_em_init() local
171 TSI578_SP_MODE(portnum), &regval); in tsi57x_em_init()
174 regval & ~TSI578_SP_MODE_PW_DIS); in tsi57x_em_init()
180 &regval); in tsi57x_em_init()
[all …]
Didt_gen2.c203 u32 regval; in idtg2_get_domain() local
209 IDT_RIO_DOMAIN, &regval); in idtg2_get_domain()
211 *sw_domain = (u8)(regval & 0xff); in idtg2_get_domain()
219 u32 regval; in idtg2_em_init() local
244 rio_read_config_32(rdev, IDT_DEV_CTRL_1, &regval); in idtg2_em_init()
246 regval | IDT_DEV_CTRL_1_GENPW | IDT_DEV_CTRL_1_PRSTBEH); in idtg2_em_init()
262 rio_read_config_32(rdev, IDT_PORT_OPS(i), &regval); in idtg2_em_init()
264 IDT_PORT_OPS(i), regval | IDT_PORT_OPS_GENPW | in idtg2_em_init()
284 rio_read_config_32(rdev, IDT_LANE_CTRL(i), &regval); in idtg2_em_init()
286 regval | IDT_LANE_CTRL_GENPW); in idtg2_em_init()
[all …]
Dtsi568.c117 u32 regval; in tsi568_em_init() local
125 rio_read_config_32(rdev, TSI568_SP_MODE(portnum), &regval); in tsi568_em_init()
127 regval | TSI568_SP_MODE_PW_DIS); in tsi568_em_init()
Didtcps.c109 u32 regval; in idtcps_get_domain() local
115 IDTCPS_RIO_DOMAIN, &regval); in idtcps_get_domain()
117 *sw_domain = (u8)(regval & 0xff); in idtcps_get_domain()
/linux-4.1.27/arch/arm/mach-omap2/
Domap_phy_internal.c72 u32 regval; in am35x_musb_reset() local
75 regval = omap_ctrl_readl(AM35XX_CONTROL_IP_SW_RESET); in am35x_musb_reset()
77 regval |= AM35XX_USBOTGSS_SW_RST; in am35x_musb_reset()
78 omap_ctrl_writel(regval, AM35XX_CONTROL_IP_SW_RESET); in am35x_musb_reset()
80 regval &= ~AM35XX_USBOTGSS_SW_RST; in am35x_musb_reset()
81 omap_ctrl_writel(regval, AM35XX_CONTROL_IP_SW_RESET); in am35x_musb_reset()
83 regval = omap_ctrl_readl(AM35XX_CONTROL_IP_SW_RESET); in am35x_musb_reset()
126 u32 regval; in am35x_musb_clear_irq() local
128 regval = omap_ctrl_readl(AM35XX_CONTROL_LVL_INTR_CLEAR); in am35x_musb_clear_irq()
129 regval |= AM35XX_USBOTGSS_INT_CLR; in am35x_musb_clear_irq()
[all …]
Dsdram-nokia.c158 static int set_sdrc_timing_regval(u32 *regval, int st_bit, int end_bit, in set_sdrc_timing_regval() argument
161 static int set_sdrc_timing_regval(u32 *regval, int st_bit, int end_bit, in set_sdrc_timing_regval()
171 *regval &= ~(mask << st_bit); in set_sdrc_timing_regval()
172 *regval |= ticks << st_bit; in set_sdrc_timing_regval()
195 static int set_sdrc_timing_regval_ps(u32 *regval, int st_bit, int end_bit, in set_sdrc_timing_regval_ps() argument
198 static int set_sdrc_timing_regval_ps(u32 *regval, int st_bit, int end_bit, in set_sdrc_timing_regval_ps()
211 ret = set_sdrc_timing_regval(regval, st_bit, end_bit, ticks, in set_sdrc_timing_regval_ps()
214 ret = set_sdrc_timing_regval(regval, st_bit, end_bit, ticks); in set_sdrc_timing_regval_ps()
/linux-4.1.27/drivers/watchdog/
Dts72xx_wdt.c52 int regval; member
88 int regval; member
113 return ts72xx_wdt_map[i].regval; in timeout_to_regval()
126 static int regval_to_timeout(int regval) in regval_to_timeout() argument
131 if (ts72xx_wdt_map[i].regval == regval) in regval_to_timeout()
166 __raw_writeb((u8)wdt->regval, wdt->control_reg); in ts72xx_wdt_start()
184 int regval; in ts72xx_wdt_open() local
190 regval = timeout_to_regval(timeout); in ts72xx_wdt_open()
191 if (regval < 0) { in ts72xx_wdt_open()
195 return regval; in ts72xx_wdt_open()
[all …]
Dda9063_wdt.c57 static int _da9063_wdt_set_timeout(struct da9063 *da9063, unsigned int regval) in _da9063_wdt_set_timeout() argument
60 DA9063_TWDSCALE_MASK, regval); in _da9063_wdt_set_timeout()
/linux-4.1.27/drivers/phy/
Dphy-berlin-sata.c71 u32 regval; in phy_berlin_sata_reg_setbits() local
77 regval = readl(ctrl_reg + PORT_VSR_DATA); in phy_berlin_sata_reg_setbits()
78 regval &= ~mask; in phy_berlin_sata_reg_setbits()
79 regval |= val; in phy_berlin_sata_reg_setbits()
80 writel(regval, ctrl_reg + PORT_VSR_DATA); in phy_berlin_sata_reg_setbits()
89 u32 regval; in phy_berlin_sata_power_on() local
97 regval = readl(priv->base + HOST_VSA_DATA); in phy_berlin_sata_power_on()
98 regval &= ~desc->power_bit; in phy_berlin_sata_power_on()
99 writel(regval, priv->base + HOST_VSA_DATA); in phy_berlin_sata_power_on()
103 regval = readl(priv->base + HOST_VSA_DATA); in phy_berlin_sata_power_on()
[all …]
Dphy-miphy365x.c208 u8 regval; in miphy365x_hfc_not_rdy() local
211 regval = readb_relaxed(miphy_phy->base + STATUS_REG); in miphy365x_hfc_not_rdy()
212 if (!(regval & mask)) in miphy365x_hfc_not_rdy()
227 u8 regval; in miphy365x_rdy() local
230 regval = readb_relaxed(miphy_phy->base + STATUS_REG); in miphy365x_rdy()
231 if ((regval & mask) == mask) in miphy365x_rdy()
/linux-4.1.27/drivers/regulator/
Dab3100.c163 u8 regval; in ab3100_enable_regulator() local
166 &regval); in ab3100_enable_regulator()
174 if (regval & AB3100_REG_ON_MASK) in ab3100_enable_regulator()
177 regval |= AB3100_REG_ON_MASK; in ab3100_enable_regulator()
180 regval); in ab3100_enable_regulator()
194 u8 regval; in ab3100_disable_regulator() local
212 &regval); in ab3100_disable_regulator()
218 regval &= ~AB3100_REG_ON_MASK; in ab3100_disable_regulator()
220 regval); in ab3100_disable_regulator()
226 u8 regval; in ab3100_is_enabled_regulator() local
[all …]
Dab8500-ext.c63 u8 regval; in ab8500_ext_regulator_enable() local
75 regval = info->update_val_hp; in ab8500_ext_regulator_enable()
77 regval = info->update_val; in ab8500_ext_regulator_enable()
81 info->update_mask, regval); in ab8500_ext_regulator_enable()
91 info->update_mask, regval); in ab8500_ext_regulator_enable()
100 u8 regval; in ab8500_ext_regulator_disable() local
111 regval = info->update_val_hw; in ab8500_ext_regulator_disable()
113 regval = 0; in ab8500_ext_regulator_disable()
117 info->update_mask, regval); in ab8500_ext_regulator_disable()
127 info->update_mask, regval); in ab8500_ext_regulator_disable()
[all …]
Dlp8755.c96 unsigned int regval; in lp8755_buck_enable_time() local
100 ret = lp8755_read(pchip, 0x12 + id, &regval); in lp8755_buck_enable_time()
105 return (regval & 0xff) * 100; in lp8755_buck_enable_time()
154 unsigned int regval; in lp8755_buck_get_mode() local
158 ret = lp8755_read(pchip, 0x06, &regval); in lp8755_buck_get_mode()
163 if (regval & (0x01 << id)) in lp8755_buck_get_mode()
166 ret = lp8755_read(pchip, 0x08 + id, &regval); in lp8755_buck_get_mode()
171 if (regval & 0x20) in lp8755_buck_get_mode()
185 unsigned int regval = 0x00; in lp8755_buck_set_ramp() local
192 regval = 0x07; in lp8755_buck_set_ramp()
[all …]
Dtps6105x-regulator.c63 u8 regval; in tps6105x_regulator_is_enabled() local
66 ret = tps6105x_get(tps6105x, TPS6105X_REG_0, &regval); in tps6105x_regulator_is_enabled()
69 regval &= TPS6105X_REG0_MODE_MASK; in tps6105x_regulator_is_enabled()
70 regval >>= TPS6105X_REG0_MODE_SHIFT; in tps6105x_regulator_is_enabled()
72 if (regval == TPS6105X_REG0_MODE_VOLTAGE) in tps6105x_regulator_is_enabled()
81 u8 regval; in tps6105x_regulator_get_voltage_sel() local
84 ret = tps6105x_get(tps6105x, TPS6105X_REG_0, &regval); in tps6105x_regulator_get_voltage_sel()
88 regval &= TPS6105X_REG0_VOLTAGE_MASK; in tps6105x_regulator_get_voltage_sel()
89 regval >>= TPS6105X_REG0_VOLTAGE_SHIFT; in tps6105x_regulator_get_voltage_sel()
90 return (int) regval; in tps6105x_regulator_get_voltage_sel()
Dmt6397-regulator.c151 u32 regval; in mt6397_get_status() local
154 ret = regmap_read(rdev->regmap, info->desc.enable_reg, &regval); in mt6397_get_status()
160 return (regval & info->qi) ? REGULATOR_STATUS_ON : REGULATOR_STATUS_OFF; in mt6397_get_status()
253 u32 regval; in mt6397_set_buck_vosel_reg() local
259 &regval) < 0) { in mt6397_set_buck_vosel_reg()
265 if (regval & mt6397_regulators[i].vselctrl_mask) { in mt6397_set_buck_vosel_reg()
Dab8500.c296 u8 regval; in ab8500_regulator_is_enabled() local
304 info->update_bank, info->update_reg, &regval); in ab8500_regulator_is_enabled()
315 info->update_mask, regval); in ab8500_regulator_is_enabled()
317 if (regval & info->update_mask) in ab8500_regulator_is_enabled()
483 u8 regval; in ab8500_regulator_get_voltage_sel() local
493 info->voltage_bank, info->voltage_reg, &regval); in ab8500_regulator_get_voltage_sel()
505 voltage_shift, regval); in ab8500_regulator_get_voltage_sel()
507 return (regval & info->voltage_mask) >> voltage_shift; in ab8500_regulator_get_voltage_sel()
514 u8 regval, regval_expand; in ab8540_aux3_regulator_get_voltage_sel() local
540 info->voltage_bank, info->voltage_reg, &regval); in ab8540_aux3_regulator_get_voltage_sel()
[all …]
Dfan53555.c164 int regval = -1, i; in fan53555_set_ramp() local
168 regval = i; in fan53555_set_ramp()
173 if (regval < 0) { in fan53555_set_ramp()
179 CTL_SLEW_MASK, regval << CTL_SLEW_SHIFT); in fan53555_set_ramp()
/linux-4.1.27/drivers/edac/
Dsynopsys_edac.c156 u32 regval, clearval = 0; in synps_edac_geterror_info() local
158 regval = readl(base + STAT_OFST); in synps_edac_geterror_info()
159 if (!regval) in synps_edac_geterror_info()
162 p->ce_cnt = (regval & STAT_CECNT_MASK) >> STAT_CECNT_SHIFT; in synps_edac_geterror_info()
163 p->ue_cnt = regval & STAT_UECNT_MASK; in synps_edac_geterror_info()
165 regval = readl(base + CE_LOG_OFST); in synps_edac_geterror_info()
166 if (!(p->ce_cnt && (regval & LOG_VALID))) in synps_edac_geterror_info()
169 p->ceinfo.bitpos = (regval & CE_LOG_BITPOS_MASK) >> CE_LOG_BITPOS_SHIFT; in synps_edac_geterror_info()
170 regval = readl(base + CE_ADDR_OFST); in synps_edac_geterror_info()
171 p->ceinfo.row = (regval & ADDR_ROW_MASK) >> ADDR_ROW_SHIFT; in synps_edac_geterror_info()
[all …]
/linux-4.1.27/drivers/net/wireless/ath/ath9k/
Dar9002_phy.c525 u32 regval; in ar9002_hw_antdiv_comb_conf_get() local
527 regval = REG_READ(ah, AR_PHY_MULTICHAIN_GAIN_CTL); in ar9002_hw_antdiv_comb_conf_get()
528 antconf->main_lna_conf = (regval & AR_PHY_9285_ANT_DIV_MAIN_LNACONF) >> in ar9002_hw_antdiv_comb_conf_get()
530 antconf->alt_lna_conf = (regval & AR_PHY_9285_ANT_DIV_ALT_LNACONF) >> in ar9002_hw_antdiv_comb_conf_get()
532 antconf->fast_div_bias = (regval & AR_PHY_9285_FAST_DIV_BIAS) >> in ar9002_hw_antdiv_comb_conf_get()
542 u32 regval; in ar9002_hw_antdiv_comb_conf_set() local
544 regval = REG_READ(ah, AR_PHY_MULTICHAIN_GAIN_CTL); in ar9002_hw_antdiv_comb_conf_set()
545 regval &= ~(AR_PHY_9285_ANT_DIV_MAIN_LNACONF | in ar9002_hw_antdiv_comb_conf_set()
548 regval |= ((antconf->main_lna_conf << AR_PHY_9285_ANT_DIV_MAIN_LNACONF_S) in ar9002_hw_antdiv_comb_conf_set()
550 regval |= ((antconf->alt_lna_conf << AR_PHY_9285_ANT_DIV_ALT_LNACONF_S) in ar9002_hw_antdiv_comb_conf_set()
[all …]
Dar9003_phy.c1523 u32 regval; in ar9003_hw_antdiv_comb_conf_get() local
1525 regval = REG_READ(ah, AR_PHY_MC_GAIN_CTRL); in ar9003_hw_antdiv_comb_conf_get()
1526 antconf->main_lna_conf = (regval & AR_PHY_ANT_DIV_MAIN_LNACONF) >> in ar9003_hw_antdiv_comb_conf_get()
1528 antconf->alt_lna_conf = (regval & AR_PHY_ANT_DIV_ALT_LNACONF) >> in ar9003_hw_antdiv_comb_conf_get()
1530 antconf->fast_div_bias = (regval & AR_PHY_ANT_FAST_DIV_BIAS) >> in ar9003_hw_antdiv_comb_conf_get()
1555 u32 regval; in ar9003_hw_antdiv_comb_conf_set() local
1557 regval = REG_READ(ah, AR_PHY_MC_GAIN_CTRL); in ar9003_hw_antdiv_comb_conf_set()
1558 regval &= ~(AR_PHY_ANT_DIV_MAIN_LNACONF | in ar9003_hw_antdiv_comb_conf_set()
1563 regval |= ((antconf->main_lna_conf << AR_PHY_ANT_DIV_MAIN_LNACONF_S) in ar9003_hw_antdiv_comb_conf_set()
1565 regval |= ((antconf->alt_lna_conf << AR_PHY_ANT_DIV_ALT_LNACONF_S) in ar9003_hw_antdiv_comb_conf_set()
[all …]
Dar9003_mci.c853 u32 regval; in ar9003_mci_set_btcoex_ctrl_9565_1ANT() local
855 regval = SM(1, AR_BTCOEX_CTRL_AR9462_MODE) | in ar9003_mci_set_btcoex_ctrl_9565_1ANT()
867 REG_WRITE(ah, AR_BTCOEX_CTRL, regval); in ar9003_mci_set_btcoex_ctrl_9565_1ANT()
872 u32 regval; in ar9003_mci_set_btcoex_ctrl_9565_2ANT() local
874 regval = SM(1, AR_BTCOEX_CTRL_AR9462_MODE) | in ar9003_mci_set_btcoex_ctrl_9565_2ANT()
886 REG_WRITE(ah, AR_BTCOEX_CTRL, regval); in ar9003_mci_set_btcoex_ctrl_9565_2ANT()
891 u32 regval; in ar9003_mci_set_btcoex_ctrl_9462() local
893 regval = SM(1, AR_BTCOEX_CTRL_AR9462_MODE) | in ar9003_mci_set_btcoex_ctrl_9462()
903 REG_WRITE(ah, AR_BTCOEX_CTRL, regval); in ar9003_mci_set_btcoex_ctrl_9462()
911 u32 regval, i; in ar9003_mci_reset() local
[all …]
Deeprom_9287.c420 u32 reg32, regOffset, regChainOffset, regval; in ath9k_hw_set_ar9287_power_cal_table() local
499 regval = SM(pdGainOverlap_t2, in ath9k_hw_set_ar9287_power_cal_table()
512 regval); in ath9k_hw_set_ar9287_power_cal_table()
912 u32 regChainOffset, regval; in ath9k_hw_ar9287_set_board_values() local
976 regval = REG_READ(ah, AR9287_AN_RF2G3_CH0); in ath9k_hw_ar9287_set_board_values()
977 regval &= ~(AR9287_AN_RF2G3_DB1 | in ath9k_hw_ar9287_set_board_values()
983 regval |= (SM(pModal->db1, AR9287_AN_RF2G3_DB1) | in ath9k_hw_ar9287_set_board_values()
990 ath9k_hw_analog_shift_regwrite(ah, AR9287_AN_RF2G3_CH0, regval); in ath9k_hw_ar9287_set_board_values()
992 regval = REG_READ(ah, AR9287_AN_RF2G3_CH1); in ath9k_hw_ar9287_set_board_values()
993 regval &= ~(AR9287_AN_RF2G3_DB1 | in ath9k_hw_ar9287_set_board_values()
[all …]
Dar9003_eeprom.c3580 u32 regval, value, gpio; in ar9003_hw_ant_ctrl_apply() local
3660 regval = REG_READ(ah, AR_PHY_MC_GAIN_CTRL); in ar9003_hw_ant_ctrl_apply()
3661 regval &= (~AR_ANT_DIV_CTRL_ALL); in ar9003_hw_ant_ctrl_apply()
3662 regval |= (value & 0x3f) << AR_ANT_DIV_CTRL_ALL_S; in ar9003_hw_ant_ctrl_apply()
3664 regval &= (~AR_PHY_ANT_DIV_LNADIV); in ar9003_hw_ant_ctrl_apply()
3665 regval |= ((value >> 6) & 0x1) << AR_PHY_ANT_DIV_LNADIV_S; in ar9003_hw_ant_ctrl_apply()
3668 regval |= AR_ANT_DIV_ENABLE; in ar9003_hw_ant_ctrl_apply()
3672 regval |= (1 << AR_PHY_ANT_SW_RX_PROT_S); in ar9003_hw_ant_ctrl_apply()
3681 regval &= ~(1 << AR_PHY_ANT_DIV_LNADIV_S); in ar9003_hw_ant_ctrl_apply()
3682 regval &= ~(1 << AR_PHY_ANT_SW_RX_PROT_S); in ar9003_hw_ant_ctrl_apply()
[all …]
Dhw.c821 u32 regval, pll2_divint, pll2_divfrac, refdiv; in ath9k_hw_init_pll() local
854 regval = REG_READ(ah, AR_PHY_PLL_MODE); in ath9k_hw_init_pll()
856 regval |= (0x1 << 22); in ath9k_hw_init_pll()
858 regval |= (0x1 << 16); in ath9k_hw_init_pll()
859 REG_WRITE(ah, AR_PHY_PLL_MODE, regval); in ath9k_hw_init_pll()
866 regval = REG_READ(ah, AR_PHY_PLL_MODE); in ath9k_hw_init_pll()
868 regval = (regval & 0x80071fff) | in ath9k_hw_init_pll()
874 regval = (regval & 0x01c00fff) | in ath9k_hw_init_pll()
881 regval |= (0x6 << 12); in ath9k_hw_init_pll()
883 regval = (regval & 0x80071fff) | in ath9k_hw_init_pll()
[all …]
Dar9002_calib.c401 int delta, currPDADC, regval; in ar9280_hw_olc_temp_compensation() local
417 regval = ah->originalGain[i] - delta; in ar9280_hw_olc_temp_compensation()
418 if (regval < 0) in ar9280_hw_olc_temp_compensation()
419 regval = 0; in ar9280_hw_olc_temp_compensation()
423 AR_PHY_TX_GAIN, regval); in ar9280_hw_olc_temp_compensation()
Ddebug.c870 u32 regval; in read_file_regval() local
873 regval = REG_READ_D(ah, sc->debug.regidx); in read_file_regval()
875 len = sprintf(buf, "0x%08x\n", regval); in read_file_regval()
884 unsigned long regval; in write_file_regval() local
893 if (kstrtoul(buf, 0, &regval)) in write_file_regval()
897 REG_WRITE_D(ah, sc->debug.regidx, regval); in write_file_regval()
/linux-4.1.27/drivers/net/ethernet/intel/i40e/
Di40e_ptp.c462 u32 tsyntype, regval; in i40e_ptp_set_timestamp_mode() local
527 regval = rd32(hw, I40E_PRTTSYN_CTL0); in i40e_ptp_set_timestamp_mode()
529 regval |= I40E_PRTTSYN_CTL0_TXTIME_INT_ENA_MASK; in i40e_ptp_set_timestamp_mode()
531 regval &= ~I40E_PRTTSYN_CTL0_TXTIME_INT_ENA_MASK; in i40e_ptp_set_timestamp_mode()
532 wr32(hw, I40E_PRTTSYN_CTL0, regval); in i40e_ptp_set_timestamp_mode()
534 regval = rd32(hw, I40E_PFINT_ICR0_ENA); in i40e_ptp_set_timestamp_mode()
536 regval |= I40E_PFINT_ICR0_ENA_TIMESYNC_MASK; in i40e_ptp_set_timestamp_mode()
538 regval &= ~I40E_PFINT_ICR0_ENA_TIMESYNC_MASK; in i40e_ptp_set_timestamp_mode()
539 wr32(hw, I40E_PFINT_ICR0_ENA, regval); in i40e_ptp_set_timestamp_mode()
547 regval = rd32(hw, I40E_PRTTSYN_CTL1); in i40e_ptp_set_timestamp_mode()
[all …]
/linux-4.1.27/drivers/i2c/busses/
Di2c-sirf.c105 u32 regval; in i2c_sirfsoc_queue_cmd() local
111 regval = SIRFSOC_I2C_READ | SIRFSOC_I2C_CMD_RP(0); in i2c_sirfsoc_queue_cmd()
114 regval |= SIRFSOC_I2C_STOP | SIRFSOC_I2C_NACK; in i2c_sirfsoc_queue_cmd()
115 writel(regval, in i2c_sirfsoc_queue_cmd()
124 regval = SIRFSOC_I2C_WRITE | SIRFSOC_I2C_CMD_RP(0); in i2c_sirfsoc_queue_cmd()
127 regval |= SIRFSOC_I2C_STOP; in i2c_sirfsoc_queue_cmd()
128 writel(regval, in i2c_sirfsoc_queue_cmd()
185 u32 regval = SIRFSOC_I2C_START | SIRFSOC_I2C_CMD_RP(0) | SIRFSOC_I2C_WRITE; in i2c_sirfsoc_set_address() local
189 regval |= SIRFSOC_I2C_STOP; in i2c_sirfsoc_set_address()
191 writel(regval, siic->base + SIRFSOC_I2C_CMD(siic->cmd_ptr++)); in i2c_sirfsoc_set_address()
[all …]
Di2c-jz4780.c193 unsigned short regval; in jz4780_i2c_disable() local
199 regval = jz4780_i2c_readw(i2c, JZ4780_I2C_ENSTA); in jz4780_i2c_disable()
200 if (!(regval & JZ4780_I2C_ENB_I2C)) in jz4780_i2c_disable()
206 dev_err(&i2c->adap.dev, "disable failed: ENSTA=0x%04x\n", regval); in jz4780_i2c_disable()
212 unsigned short regval; in jz4780_i2c_enable() local
218 regval = jz4780_i2c_readw(i2c, JZ4780_I2C_ENSTA); in jz4780_i2c_enable()
219 if (regval & JZ4780_I2C_ENB_I2C) in jz4780_i2c_enable()
225 dev_err(&i2c->adap.dev, "enable failed: ENSTA=0x%04x\n", regval); in jz4780_i2c_enable()
231 unsigned short regval; in jz4780_i2c_set_target() local
235 regval = jz4780_i2c_readw(i2c, JZ4780_I2C_STA); in jz4780_i2c_set_target()
[all …]
Di2c-cadence.c456 u32 regval; in cdns_i2c_master_reset() local
461 regval = cdns_i2c_readreg(CDNS_I2C_CR_OFFSET); in cdns_i2c_master_reset()
462 regval &= ~CDNS_I2C_CR_HOLD; in cdns_i2c_master_reset()
463 regval |= CDNS_I2C_CR_CLR_FIFO; in cdns_i2c_master_reset()
464 cdns_i2c_writereg(regval, CDNS_I2C_CR_OFFSET); in cdns_i2c_master_reset()
468 regval = cdns_i2c_readreg(CDNS_I2C_ISR_OFFSET); in cdns_i2c_master_reset()
469 cdns_i2c_writereg(regval, CDNS_I2C_ISR_OFFSET); in cdns_i2c_master_reset()
471 regval = cdns_i2c_readreg(CDNS_I2C_SR_OFFSET); in cdns_i2c_master_reset()
472 cdns_i2c_writereg(regval, CDNS_I2C_SR_OFFSET); in cdns_i2c_master_reset()
/linux-4.1.27/arch/sparc/include/asm/
Dturbosparc.h105 static inline void turbosparc_set_ccreg(unsigned long regval) in turbosparc_set_ccreg() argument
109 : "r" (regval), "r" (0x600), "i" (ASI_M_MMUREGS) in turbosparc_set_ccreg()
115 unsigned long regval; in turbosparc_get_ccreg() local
118 : "=r" (regval) in turbosparc_get_ccreg()
120 return regval; in turbosparc_get_ccreg()
Dviking.h145 static inline void viking_set_bpreg(unsigned long regval) in viking_set_bpreg() argument
149 : "r" (regval), "i" (ASI_M_ACTION) in viking_set_bpreg()
155 unsigned long regval; in viking_get_bpreg() local
158 : "=r" (regval) in viking_get_bpreg()
160 return regval; in viking_get_bpreg()
Dpgtsrmmu.h149 void srmmu_set_mmureg(unsigned long regval);
/linux-4.1.27/sound/soc/qcom/
Dlpass-cpu.c88 unsigned int regval; in lpass_cpu_daiops_hw_params() local
98 regval = LPAIF_I2SCTL_LOOPBACK_DISABLE | in lpass_cpu_daiops_hw_params()
103 regval |= LPAIF_I2SCTL_BITWIDTH_16; in lpass_cpu_daiops_hw_params()
106 regval |= LPAIF_I2SCTL_BITWIDTH_24; in lpass_cpu_daiops_hw_params()
109 regval |= LPAIF_I2SCTL_BITWIDTH_32; in lpass_cpu_daiops_hw_params()
119 regval |= LPAIF_I2SCTL_SPKMODE_SD0; in lpass_cpu_daiops_hw_params()
120 regval |= LPAIF_I2SCTL_SPKMONO_MONO; in lpass_cpu_daiops_hw_params()
123 regval |= LPAIF_I2SCTL_SPKMODE_SD0; in lpass_cpu_daiops_hw_params()
124 regval |= LPAIF_I2SCTL_SPKMONO_STEREO; in lpass_cpu_daiops_hw_params()
127 regval |= LPAIF_I2SCTL_SPKMODE_QUAD01; in lpass_cpu_daiops_hw_params()
[all …]
Dlpass-platform.c91 unsigned int regval; in lpass_platform_pcmops_hw_params() local
102 regval = LPAIF_RDMACTL_BURSTEN_INCR4 | in lpass_platform_pcmops_hw_params()
111 regval |= LPAIF_RDMACTL_WPSCNT_ONE; in lpass_platform_pcmops_hw_params()
114 regval |= LPAIF_RDMACTL_WPSCNT_TWO; in lpass_platform_pcmops_hw_params()
117 regval |= LPAIF_RDMACTL_WPSCNT_THREE; in lpass_platform_pcmops_hw_params()
120 regval |= LPAIF_RDMACTL_WPSCNT_FOUR; in lpass_platform_pcmops_hw_params()
132 regval |= LPAIF_RDMACTL_WPSCNT_ONE; in lpass_platform_pcmops_hw_params()
135 regval |= LPAIF_RDMACTL_WPSCNT_TWO; in lpass_platform_pcmops_hw_params()
138 regval |= LPAIF_RDMACTL_WPSCNT_FOUR; in lpass_platform_pcmops_hw_params()
141 regval |= LPAIF_RDMACTL_WPSCNT_SIX; in lpass_platform_pcmops_hw_params()
[all …]
/linux-4.1.27/drivers/mfd/
Dtps6105x.c69 u8 regval; in tps6105x_mask_and_set() local
77 regval = ret; in tps6105x_mask_and_set()
78 regval = (~bitmask & regval) | (bitmask & bitvalues); in tps6105x_mask_and_set()
79 ret = i2c_smbus_write_byte_data(tps6105x->client, reg, regval); in tps6105x_mask_and_set()
92 u8 regval; in tps6105x_startup() local
94 ret = tps6105x_get(tps6105x, TPS6105X_REG_0, &regval); in tps6105x_startup()
97 switch (regval >> TPS6105X_REG0_MODE_SHIFT) { in tps6105x_startup()
Dab3100-core.c73 u8 reg, u8 regval) in ab3100_set_register_interruptible() argument
75 u8 regandval[2] = {reg, regval}; in ab3100_set_register_interruptible()
122 u8 reg, u8 regval) in ab3100_set_test_register_interruptible() argument
124 u8 regandval[2] = {reg, regval}; in ab3100_set_test_register_interruptible()
152 u8 reg, u8 *regval) in ab3100_get_register_interruptible() argument
184 err = i2c_master_recv(ab3100->i2c_client, regval, 1); in ab3100_get_register_interruptible()
Dasic3.c244 int regval; in asic3_mask_irq() local
248 regval = asic3_read_register(asic, in asic3_mask_irq()
252 regval &= ~(ASIC3_INTMASK_MASK0 << in asic3_mask_irq()
258 regval); in asic3_mask_irq()
281 int regval; in asic3_unmask_irq() local
285 regval = asic3_read_register(asic, in asic3_unmask_irq()
289 regval |= (ASIC3_INTMASK_MASK0 << in asic3_unmask_irq()
295 regval); in asic3_unmask_irq()
/linux-4.1.27/drivers/hwmon/
Dk10temp.c79 u32 regval; in show_temp() local
85 &regval); in show_temp()
87 pci_read_config_dword(pdev, REG_REPORTED_TEMPERATURE, &regval); in show_temp()
89 return sprintf(buf, "%u\n", (regval >> 21) * 125); in show_temp()
103 u32 regval; in show_temp_crit() local
107 REG_HARDWARE_THERMAL_CONTROL, &regval); in show_temp_crit()
108 value = ((regval >> 16) & 0x7f) * 500 + 52000; in show_temp_crit()
110 value -= ((regval >> 24) & 0xf) * 500; in show_temp_crit()
Dasc7621.c250 u16 regval; in show_fan16() local
253 regval = (data->reg[param->msb[0]] << 8) | data->reg[param->lsb[0]]; in show_fan16()
257 (regval == 0 ? -1 : (regval) == in show_fan16()
258 0xffff ? 0 : 5400000 / regval)); in show_fan16()
311 u16 regval; in show_in10() local
315 regval = (data->reg[param->msb[0]] << 8) | (data->reg[param->lsb[0]]); in show_in10()
319 regval = (regval >> 6) * asc7621_in_scaling[nr] / (0xc0 << 2); in show_in10()
321 return sprintf(buf, "%u\n", regval); in show_in10()
418 u8 regval = data->reg[param->msb[0]]; in show_temp62() local
419 int temp = ((s8) (regval & 0xfc) * 1000) + ((regval & 0x03) * 250); in show_temp62()
[all …]
Dltc4245.c177 const u8 regval = data->vregs[reg - 0x10]; in ltc4245_get_voltage() local
183 voltage = regval * 55; in ltc4245_get_voltage()
187 voltage = regval * 22; in ltc4245_get_voltage()
191 voltage = regval * 15; in ltc4245_get_voltage()
195 voltage = regval * -55; in ltc4245_get_voltage()
198 voltage = regval * 10; in ltc4245_get_voltage()
213 const u8 regval = data->vregs[reg - 0x10]; in ltc4245_get_current() local
234 voltage = regval * 250; /* voltage in uV */ in ltc4245_get_current()
238 voltage = regval * 125; /* voltage in uV */ in ltc4245_get_current()
242 voltage = regval * 125; /* voltage in uV */ in ltc4245_get_current()
[all …]
Dltc2945.c251 int regval; in ltc2945_set_value() local
259 regval = ltc2945_val_to_reg(dev, reg, val); in ltc2945_set_value()
261 regval = clamp_val(regval, 0, 0xffffff); in ltc2945_set_value()
262 regbuf[0] = regval >> 16; in ltc2945_set_value()
263 regbuf[1] = (regval >> 8) & 0xff; in ltc2945_set_value()
264 regbuf[2] = regval; in ltc2945_set_value()
267 regval = clamp_val(regval, 0, 0xfff) << 4; in ltc2945_set_value()
268 regbuf[0] = regval >> 8; in ltc2945_set_value()
269 regbuf[1] = regval & 0xff; in ltc2945_set_value()
Dads7828.c69 unsigned int regval; in ads7828_show_in() local
72 err = regmap_read(data->regmap, cmd, &regval); in ads7828_show_in()
77 DIV_ROUND_CLOSEST(regval * data->lsb_resol, 1000)); in ads7828_show_in()
123 unsigned int regval; in ads7828_probe() local
165 regmap_read(data->regmap, data->cmd_byte, &regval); in ads7828_probe()
Dadc128d818.c164 u8 reg, regval; in adc128_set_in() local
174 regval = clamp_val(DIV_ROUND_CLOSEST(val, 10), 0, 255); in adc128_set_in()
175 data->in[index][nr] = regval << 4; in adc128_set_in()
177 i2c_smbus_write_byte_data(data->client, reg, regval); in adc128_set_in()
205 s8 regval; in adc128_set_temp() local
212 regval = clamp_val(DIV_ROUND_CLOSEST(val, 1000), -128, 127); in adc128_set_temp()
213 data->temp[index] = regval << 1; in adc128_set_temp()
217 regval); in adc128_set_temp()
Dltc4215.c82 const u8 regval = data->regs[reg]; in ltc4215_get_voltage() local
88 voltage = regval * 151 / 1000; in ltc4215_get_voltage()
92 voltage = regval * 605 / 10; in ltc4215_get_voltage()
99 voltage = regval * 482 * 125 / 1000; in ltc4215_get_voltage()
Dtmp103.c70 unsigned int regval; in tmp103_show_temp() local
73 ret = regmap_read(regmap, sda->index, &regval); in tmp103_show_temp()
77 return sprintf(buf, "%d\n", tmp103_reg_to_mc(regval)); in tmp103_show_temp()
Dina209.c239 u16 regval; in ina209_set_interval() local
250 regval = ina209_reg_from_interval(data->regs[INA209_CONFIGURATION], in ina209_set_interval()
253 regval); in ina209_set_interval()
254 data->regs[INA209_CONFIGURATION] = regval; in ina209_set_interval()
255 data->update_interval = ina209_interval_from_reg(regval); in ina209_set_interval()
Dlm95234.c472 u8 regval; in set_interval() local
481 for (regval = 0; regval < 3; regval++) { in set_interval()
482 if (val <= update_intervals[regval]) in set_interval()
487 data->interval = msecs_to_jiffies(update_intervals[regval]); in set_interval()
488 i2c_smbus_write_byte_data(data->client, LM95234_REG_CONVRATE, regval); in set_interval()
Dnct6775.c3186 int regval; in nct6775_check_fan_inputs() local
3194 regval = superio_inb(sioreg, 0x2c); in nct6775_check_fan_inputs()
3196 fan3pin = regval & (1 << 6); in nct6775_check_fan_inputs()
3197 pwm3pin = regval & (1 << 7); in nct6775_check_fan_inputs()
3252 regval = superio_inb(sioreg, 0x24); in nct6775_check_fan_inputs()
3253 fan3pin = !(regval & 0x80); in nct6775_check_fan_inputs()
3254 pwm3pin = regval & 0x08; in nct6775_check_fan_inputs()
3264 regval = superio_inb(sioreg, 0x1c); in nct6775_check_fan_inputs()
3266 fan3pin = !(regval & (1 << 5)); in nct6775_check_fan_inputs()
3267 fan4pin = !(regval & (1 << 6)); in nct6775_check_fan_inputs()
[all …]
Dnct7802.c350 unsigned int regval; in show_beep() local
353 err = regmap_read(data->regmap, sattr->nr, &regval); in show_beep()
357 return sprintf(buf, "%u\n", !!(regval & (1 << sattr->index))); in show_beep()
Dw83627ehf.c1980 int fan3pin, fan4pin, fan4min, fan5pin, regval; in w83627ehf_check_fan_inputs() local
2002 regval = superio_inb(sio_data->sioreg, SIO_REG_ENABLE); in w83627ehf_check_fan_inputs()
2004 if (regval & 0x80) in w83627ehf_check_fan_inputs()
2009 if (regval & 0x40) in w83627ehf_check_fan_inputs()
2014 if (regval & 0x20) in w83627ehf_check_fan_inputs()
2053 regval = w83627ehf_read_value(data, W83627EHF_REG_FANDIV1); in w83627ehf_check_fan_inputs()
2054 if ((regval & (1 << 2)) && fan4pin) { in w83627ehf_check_fan_inputs()
2058 if (!(regval & (1 << 1)) && fan5pin) { in w83627ehf_check_fan_inputs()
Dit87.c690 u8 reg, regval; in set_temp() local
706 regval = it87_read_value(data, IT87_REG_BEEP_ENABLE); in set_temp()
707 if (!(regval & 0x80)) { in set_temp()
708 regval |= 0x80; in set_temp()
709 it87_write_value(data, IT87_REG_BEEP_ENABLE, regval); in set_temp()
/linux-4.1.27/drivers/video/fbdev/core/
Dsvgalib.c25 u8 regval, bitval, bitnum; in svga_wcrt_multi() local
28 regval = vga_rcrt(regbase, regset->regnum); in svga_wcrt_multi()
32 regval = regval & ~bitval; in svga_wcrt_multi()
33 if (value & 1) regval = regval | bitval; in svga_wcrt_multi()
37 vga_wcrt(regbase, regset->regnum, regval); in svga_wcrt_multi()
45 u8 regval, bitval, bitnum; in svga_wseq_multi() local
48 regval = vga_rseq(regbase, regset->regnum); in svga_wseq_multi()
52 regval = regval & ~bitval; in svga_wseq_multi()
53 if (value & 1) regval = regval | bitval; in svga_wseq_multi()
57 vga_wseq(regbase, regset->regnum, regval); in svga_wseq_multi()
[all …]
/linux-4.1.27/drivers/net/ethernet/intel/ixgbe/
Dixgbe_ptp.c464 u64 regval = 0, ns; in ixgbe_ptp_tx_hwtstamp() local
467 regval |= (u64)IXGBE_READ_REG(hw, IXGBE_TXSTMPL); in ixgbe_ptp_tx_hwtstamp()
468 regval |= (u64)IXGBE_READ_REG(hw, IXGBE_TXSTMPH) << 32; in ixgbe_ptp_tx_hwtstamp()
471 ns = timecounter_cyc2time(&adapter->tc, regval); in ixgbe_ptp_tx_hwtstamp()
529 u64 regval = 0, ns; in ixgbe_ptp_rx_hwtstamp() local
537 regval |= (u64)IXGBE_READ_REG(hw, IXGBE_RXSTMPL); in ixgbe_ptp_rx_hwtstamp()
538 regval |= (u64)IXGBE_READ_REG(hw, IXGBE_RXSTMPH) << 32; in ixgbe_ptp_rx_hwtstamp()
541 ns = timecounter_cyc2time(&adapter->tc, regval); in ixgbe_ptp_rx_hwtstamp()
594 u32 regval; in ixgbe_ptp_set_timestamp_mode() local
664 regval = IXGBE_READ_REG(hw, IXGBE_TSYNCTXCTL); in ixgbe_ptp_set_timestamp_mode()
[all …]
Dixgbe_82598.c181 u32 regval; in ixgbe_start_hw_82598() local
192 regval = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL(i)); in ixgbe_start_hw_82598()
193 regval &= ~IXGBE_DCA_TXCTRL_DESC_WRO_EN; in ixgbe_start_hw_82598()
194 IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL(i), regval); in ixgbe_start_hw_82598()
199 regval = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i)); in ixgbe_start_hw_82598()
200 regval &= ~(IXGBE_DCA_RXCTRL_DATA_WRO_EN | in ixgbe_start_hw_82598()
202 IXGBE_WRITE_REG(hw, IXGBE_DCA_RXCTRL(i), regval); in ixgbe_start_hw_82598()
Dixgbe_sriov.c1376 u32 regval; in ixgbe_ndo_set_vf_spoofchk() local
1383 regval = IXGBE_READ_REG(hw, IXGBE_PFVFSPOOF(vf_target_reg)); in ixgbe_ndo_set_vf_spoofchk()
1384 regval &= ~(1 << vf_target_shift); in ixgbe_ndo_set_vf_spoofchk()
1385 regval |= (setting << vf_target_shift); in ixgbe_ndo_set_vf_spoofchk()
1386 IXGBE_WRITE_REG(hw, IXGBE_PFVFSPOOF(vf_target_reg), regval); in ixgbe_ndo_set_vf_spoofchk()
1390 regval = IXGBE_READ_REG(hw, IXGBE_PFVFSPOOF(vf_target_reg)); in ixgbe_ndo_set_vf_spoofchk()
1391 regval &= ~(1 << vf_target_shift); in ixgbe_ndo_set_vf_spoofchk()
1392 regval |= (setting << vf_target_shift); in ixgbe_ndo_set_vf_spoofchk()
1393 IXGBE_WRITE_REG(hw, IXGBE_PFVFSPOOF(vf_target_reg), regval); in ixgbe_ndo_set_vf_spoofchk()
Dixgbe_common.c326 u32 regval; in ixgbe_start_hw_gen2() local
328 regval = IXGBE_READ_REG(hw, IXGBE_DCA_TXCTRL_82599(i)); in ixgbe_start_hw_gen2()
329 regval &= ~IXGBE_DCA_TXCTRL_DESC_WRO_EN; in ixgbe_start_hw_gen2()
330 IXGBE_WRITE_REG(hw, IXGBE_DCA_TXCTRL_82599(i), regval); in ixgbe_start_hw_gen2()
334 u32 regval; in ixgbe_start_hw_gen2() local
336 regval = IXGBE_READ_REG(hw, IXGBE_DCA_RXCTRL(i)); in ixgbe_start_hw_gen2()
337 regval &= ~(IXGBE_DCA_RXCTRL_DATA_WRO_EN | in ixgbe_start_hw_gen2()
339 IXGBE_WRITE_REG(hw, IXGBE_DCA_RXCTRL(i), regval); in ixgbe_start_hw_gen2()
2644 s32 ixgbe_enable_rx_dma_generic(struct ixgbe_hw *hw, u32 regval) in ixgbe_enable_rx_dma_generic() argument
2646 if (regval & IXGBE_RXCTRL_RXEN) in ixgbe_enable_rx_dma_generic()
Dixgbe_common.h82 s32 ixgbe_enable_rx_dma_generic(struct ixgbe_hw *hw, u32 regval);
Dixgbe_82599.c1970 static s32 ixgbe_enable_rx_dma_82599(struct ixgbe_hw *hw, u32 regval) in ixgbe_enable_rx_dma_82599() argument
1980 if (regval & IXGBE_RXCTRL_RXEN) in ixgbe_enable_rx_dma_82599()
/linux-4.1.27/drivers/rtc/
Drtc-ab3100.c204 u8 regval; in ab3100_rtc_probe() local
209 AB3100_RTC, &regval); in ab3100_rtc_probe()
215 if ((regval & 0xFE) != RTC_SETTING) { in ab3100_rtc_probe()
217 regval); in ab3100_rtc_probe()
220 if ((regval & 1) == 0) { in ab3100_rtc_probe()
225 regval = 1 | RTC_SETTING; in ab3100_rtc_probe()
227 AB3100_RTC, regval); in ab3100_rtc_probe()
/linux-4.1.27/drivers/iio/adc/
Dtwl4030-madc.c679 u8 regval; in twl4030_madc_set_current_generator() local
682 &regval, TWL4030_BCI_BCICTL1); in twl4030_madc_set_current_generator()
691 regval |= regmask; in twl4030_madc_set_current_generator()
693 regval &= ~regmask; in twl4030_madc_set_current_generator()
696 regval, TWL4030_BCI_BCICTL1); in twl4030_madc_set_current_generator()
714 u8 regval; in twl4030_madc_set_power() local
718 &regval, TWL4030_MADC_CTRL1); in twl4030_madc_set_power()
725 regval |= TWL4030_MADC_MADCON; in twl4030_madc_set_power()
727 regval &= ~TWL4030_MADC_MADCON; in twl4030_madc_set_power()
728 ret = twl_i2c_write_u8(TWL4030_MODULE_MADC, regval, TWL4030_MADC_CTRL1); in twl4030_madc_set_power()
[all …]
Dad7291.c280 u16 regval; in ad7291_write_event_config() local
283 regval = chip->command; in ad7291_write_event_config()
301 regval &= ~AD7291_AUTOCYCLE; in ad7291_write_event_config()
302 regval |= chip->c_mask; in ad7291_write_event_config()
304 regval |= AD7291_AUTOCYCLE; in ad7291_write_event_config()
306 ret = ad7291_i2c_write(chip, AD7291_COMMAND, regval); in ad7291_write_event_config()
310 chip->command = regval; in ad7291_write_event_config()
329 u16 regval; in ad7291_read_raw() local
342 regval = chip->command & (~AD7291_VOLTAGE_MASK); in ad7291_read_raw()
343 regval |= BIT(15 - chan->channel); in ad7291_read_raw()
[all …]
/linux-4.1.27/drivers/net/ethernet/intel/igb/
Digb_ptp.c691 u64 regval; in igb_ptp_tx_hwtstamp() local
693 regval = rd32(E1000_TXSTMPL); in igb_ptp_tx_hwtstamp()
694 regval |= (u64)rd32(E1000_TXSTMPH) << 32; in igb_ptp_tx_hwtstamp()
696 igb_ptp_systim_to_hwtstamp(adapter, &shhwtstamps, regval); in igb_ptp_tx_hwtstamp()
717 __le64 *regval = (__le64 *)va; in igb_ptp_rx_pktstamp() local
724 le64_to_cpu(regval[1])); in igb_ptp_rx_pktstamp()
740 u64 regval; in igb_ptp_rx_rgtstamp() local
755 regval = rd32(E1000_RXSTMPL); in igb_ptp_rx_rgtstamp()
756 regval |= (u64)rd32(E1000_RXSTMPH) << 32; in igb_ptp_rx_rgtstamp()
758 igb_ptp_systim_to_hwtstamp(adapter, skb_hwtstamps(skb), regval); in igb_ptp_rx_rgtstamp()
[all …]
Digb_main.c1483 u32 regval = rd32(E1000_EIAM); in igb_irq_disable() local
1485 wr32(E1000_EIAM, regval & ~adapter->eims_enable_mask); in igb_irq_disable()
1487 regval = rd32(E1000_EIAC); in igb_irq_disable()
1488 wr32(E1000_EIAC, regval & ~adapter->eims_enable_mask); in igb_irq_disable()
1514 u32 regval = rd32(E1000_EIAC); in igb_irq_enable() local
1516 wr32(E1000_EIAC, regval | adapter->eims_enable_mask); in igb_irq_enable()
1517 regval = rd32(E1000_EIAM); in igb_irq_enable()
1518 wr32(E1000_EIAM, regval | adapter->eims_enable_mask); in igb_irq_enable()
/linux-4.1.27/drivers/spi/
Dspi-sirf.c491 u32 regval = readl(sspi->base + SIRFSOC_SPI_CTRL); in spi_sirfsoc_chipselect() local
495 regval |= SIRFSOC_SPI_CS_IO_OUT; in spi_sirfsoc_chipselect()
497 regval &= ~SIRFSOC_SPI_CS_IO_OUT; in spi_sirfsoc_chipselect()
501 regval &= ~SIRFSOC_SPI_CS_IO_OUT; in spi_sirfsoc_chipselect()
503 regval |= SIRFSOC_SPI_CS_IO_OUT; in spi_sirfsoc_chipselect()
506 writel(regval, sspi->base + SIRFSOC_SPI_CTRL); in spi_sirfsoc_chipselect()
527 u32 regval; in spi_sirfsoc_setup_transfer() local
536 regval = (sspi->ctrl_freq / (2 * hz)) - 1; in spi_sirfsoc_setup_transfer()
537 if (regval > 0xFFFF || regval < 0) { in spi_sirfsoc_setup_transfer()
544 regval |= SIRFSOC_SPI_TRAN_DAT_FORMAT_8; in spi_sirfsoc_setup_transfer()
[all …]
Dspi-ep93xx.c147 u8 regval; in ep93xx_spi_enable() local
154 regval = ep93xx_spi_read_u8(espi, SSPCR1); in ep93xx_spi_enable()
155 regval |= SSPCR1_SSE; in ep93xx_spi_enable()
156 ep93xx_spi_write_u8(espi, SSPCR1, regval); in ep93xx_spi_enable()
163 u8 regval; in ep93xx_spi_disable() local
165 regval = ep93xx_spi_read_u8(espi, SSPCR1); in ep93xx_spi_disable()
166 regval &= ~SSPCR1_SSE; in ep93xx_spi_disable()
167 ep93xx_spi_write_u8(espi, SSPCR1, regval); in ep93xx_spi_disable()
174 u8 regval; in ep93xx_spi_enable_interrupts() local
176 regval = ep93xx_spi_read_u8(espi, SSPCR1); in ep93xx_spi_enable_interrupts()
[all …]
Dspi-fsl-espi.c612 u32 regval; in fsl_espi_suspend() local
617 regval = mpc8xxx_spi_read_reg(&reg_base->mode); in fsl_espi_suspend()
618 regval &= ~SPMODE_ENABLE; in fsl_espi_suspend()
619 mpc8xxx_spi_write_reg(&reg_base->mode, regval); in fsl_espi_suspend()
628 u32 regval; in fsl_espi_resume() local
633 regval = mpc8xxx_spi_read_reg(&reg_base->mode); in fsl_espi_resume()
634 regval |= SPMODE_ENABLE; in fsl_espi_resume()
635 mpc8xxx_spi_write_reg(&reg_base->mode, regval); in fsl_espi_resume()
649 u32 regval, csmode; in fsl_espi_probe() local
726 regval = pdata->initial_spmode | SPMODE_INIT_VAL | SPMODE_ENABLE; in fsl_espi_probe()
[all …]
Dspi-fsl-spi.c616 u32 regval; in fsl_spi_probe() local
679 regval = pdata->initial_spmode | SPMODE_INIT_VAL | SPMODE_ENABLE; in fsl_spi_probe()
681 regval &= ~SPMODE_LEN(0xF); in fsl_spi_probe()
682 regval |= SPMODE_LEN(mpc8xxx_spi->max_bits_per_word - 1); in fsl_spi_probe()
685 regval |= SPMODE_OP; in fsl_spi_probe()
687 mpc8xxx_spi_write_reg(&reg_base->mode, regval); in fsl_spi_probe()
/linux-4.1.27/drivers/rapidio/
Drio.c576 u32 regval; in rio_set_port_lockout() local
580 &regval); in rio_set_port_lockout()
582 regval |= RIO_PORT_N_CTL_LOCKOUT; in rio_set_port_lockout()
584 regval &= ~RIO_PORT_N_CTL_LOCKOUT; in rio_set_port_lockout()
588 regval); in rio_set_port_lockout()
610 u32 regval; in rio_enable_rx_tx_port() local
624 &regval); in rio_enable_rx_tx_port()
627 ext_ftr_ptr + RIO_PORT_N_CTL_CSR(port_num), &regval) < 0) in rio_enable_rx_tx_port()
631 if (regval & RIO_PORT_N_CTL_P_TYP_SER) { in rio_enable_rx_tx_port()
633 regval = regval | RIO_PORT_N_CTL_EN_RX_SER in rio_enable_rx_tx_port()
[all …]
Drio-scan.c568 u32 regval; in rio_enum_peer() local
584 hopcount, RIO_COMPONENT_TAG_CSR, &regval); in rio_enum_peer()
586 if (regval) { in rio_enum_peer()
587 rdev = rio_get_comptag((regval & 0xffff), NULL); in rio_enum_peer()
752 u32 regval; in rio_enum_complete() local
755 &regval); in rio_enum_complete()
756 return (regval & RIO_PORT_GEN_DISCOVERED) ? 1 : 0; in rio_enum_complete()
/linux-4.1.27/arch/mips/loongson/lemote-2f/
Dclock.c97 int regval; in clk_set_rate() local
118 regval = LOONGSON_CHIPCFG(0); in clk_set_rate()
119 regval = (regval & ~0x7) | (pos->driver_data - 1); in clk_set_rate()
120 LOONGSON_CHIPCFG(0) = regval; in clk_set_rate()
/linux-4.1.27/drivers/staging/iio/cdc/
Dad7152.c98 u8 regval) in ad7152_start_calib() argument
114 regval |= AD7152_CONF_CH1EN; in ad7152_start_calib()
116 regval |= AD7152_CONF_CH2EN; in ad7152_start_calib()
119 ret = i2c_smbus_write_byte_data(chip->client, AD7152_REG_CFG, regval); in ad7152_start_calib()
132 } while ((ret == regval) && timeout--); in ad7152_start_calib()
327 u8 regval = 0; in ad7152_read_raw() local
335 regval = chip->setup[chan->channel]; in ad7152_read_raw()
342 if (regval != chip->setup[chan->channel]) { in ad7152_read_raw()
351 regval = AD7152_CONF_CH1EN; in ad7152_read_raw()
353 regval = AD7152_CONF_CH2EN; in ad7152_read_raw()
[all …]
Dad7746.c288 u8 regval) in ad7746_start_calib() argument
303 regval |= chip->config; in ad7746_start_calib()
304 ret = i2c_smbus_write_byte_data(chip->client, AD7746_REG_CFG, regval); in ad7746_start_calib()
317 } while ((ret == regval) && timeout--); in ad7746_start_calib()
572 u8 regval, reg; in ad7746_read_raw() local
584 regval = chip->config | AD7746_CONF_MODE_SINGLE_CONV; in ad7746_read_raw()
586 regval); in ad7746_read_raw()
701 unsigned char regval = 0; in ad7746_probe() local
728 regval |= AD7746_EXCSETUP_NEXCA; in ad7746_probe()
730 regval |= AD7746_EXCSETUP_EXCA; in ad7746_probe()
[all …]
/linux-4.1.27/sound/soc/codecs/
Dmax98095.c1218 u8 regval; in max98095_dai1_hw_params() local
1237 if (rate_value(rate, &regval)) in max98095_dai1_hw_params()
1241 M98095_CLKMODE_MASK, regval); in max98095_dai1_hw_params()
1279 u8 regval; in max98095_dai2_hw_params() local
1298 if (rate_value(rate, &regval)) in max98095_dai2_hw_params()
1302 M98095_CLKMODE_MASK, regval); in max98095_dai2_hw_params()
1340 u8 regval; in max98095_dai3_hw_params() local
1359 if (rate_value(rate, &regval)) in max98095_dai3_hw_params()
1363 M98095_CLKMODE_MASK, regval); in max98095_dai3_hw_params()
1435 u8 regval = 0; in max98095_dai1_set_fmt() local
[all …]
Dmax98088.c1229 u8 regval; in max98088_dai1_hw_params() local
1250 if (rate_value(rate, &regval)) in max98088_dai1_hw_params()
1254 M98088_CLKMODE_MASK, regval); in max98088_dai1_hw_params()
1296 u8 regval; in max98088_dai2_hw_params() local
1317 if (rate_value(rate, &regval)) in max98088_dai2_hw_params()
1321 M98088_CLKMODE_MASK, regval); in max98088_dai2_hw_params()
1862 u8 regval = 0; in max98088_handle_pdata() local
1871 regval |= M98088_DIGMIC_L; in max98088_handle_pdata()
1874 regval |= M98088_DIGMIC_R; in max98088_handle_pdata()
1876 max98088->digmic = (regval ? 1 : 0); in max98088_handle_pdata()
[all …]
Dmax98090.c1652 u8 regval; in max98090_dai_set_fmt() local
1660 regval = 0; in max98090_dai_set_fmt()
1676 regval |= M98090_MAS_MASK | in max98090_dai_set_fmt()
1680 regval |= M98090_MAS_MASK | in max98090_dai_set_fmt()
1684 regval |= M98090_MAS_MASK | in max98090_dai_set_fmt()
1695 snd_soc_write(codec, M98090_REG_MASTER_MODE, regval); in max98090_dai_set_fmt()
1697 regval = 0; in max98090_dai_set_fmt()
1700 regval |= M98090_DLY_MASK; in max98090_dai_set_fmt()
1705 regval |= M98090_RJ_MASK; in max98090_dai_set_fmt()
1718 regval |= M98090_WCI_MASK; in max98090_dai_set_fmt()
[all …]
/linux-4.1.27/drivers/net/ethernet/samsung/sxgbe/
Dsxgbe_core.c26 u32 regval; in sxgbe_core_init() local
29 regval = readl(ioaddr + SXGBE_CORE_TX_CONFIG_REG); in sxgbe_core_init()
33 regval |= SXGBE_TX_JABBER_DISABLE; in sxgbe_core_init()
34 writel(regval, ioaddr + SXGBE_CORE_TX_CONFIG_REG); in sxgbe_core_init()
37 regval = readl(ioaddr + SXGBE_CORE_RX_CONFIG_REG); in sxgbe_core_init()
42 regval |= SXGBE_RX_JUMBPKT_ENABLE | SXGBE_RX_ACS_ENABLE; in sxgbe_core_init()
43 writel(regval, ioaddr + SXGBE_CORE_RX_CONFIG_REG); in sxgbe_core_init()
/linux-4.1.27/drivers/media/usb/stkwebcam/
Dstk-sensor.c282 struct regval *rv) in stk_sensor_write_regvals()
310 static struct regval ov_initvals[] = {
400 static struct regval ov_fmt_uyvy[] = {
413 static struct regval ov_fmt_yuyv[] = {
427 static struct regval ov_fmt_rgbr[] = {
444 static struct regval ov_fmt_rgbp[] = {
461 static struct regval ov_fmt_bayer[] = {
509 struct regval *rv; in stk_sensor_configure()
Dstk-webcam.h89 struct regval { struct
Dstk-webcam.c239 static struct regval stk1125_initvals[] = {
271 struct regval *rv; in stk_initialise()
/linux-4.1.27/drivers/sbus/char/
Ddisplay7seg.c90 u8 regval = 0; in d7s_release() local
92 regval = readb(p->regs); in d7s_release()
94 regval |= D7S_FLIP; in d7s_release()
96 regval &= ~D7S_FLIP; in d7s_release()
97 writeb(regval, p->regs); in d7s_release()
/linux-4.1.27/drivers/i2c/muxes/
Di2c-mux-pca954x.c154 u8 regval; in pca954x_select_chan() local
159 regval = chan | chip->enable; in pca954x_select_chan()
161 regval = 1 << chan; in pca954x_select_chan()
164 if (data->last_chan != regval) { in pca954x_select_chan()
165 ret = pca954x_reg_write(adap, client, regval); in pca954x_select_chan()
166 data->last_chan = regval; in pca954x_select_chan()
/linux-4.1.27/sound/sh/
Daica.c149 u32 regval; in spu_disable() local
151 regval = readl(ARM_RESET_REGISTER); in spu_disable()
152 regval |= 1; in spu_disable()
155 writel(regval, ARM_RESET_REGISTER); in spu_disable()
159 regval = readl(SPU_REGISTER_BASE + (i * 0x80)); in spu_disable()
160 regval = (regval & ~0x4000) | 0x8000; in spu_disable()
163 writel(regval, SPU_REGISTER_BASE + (i * 0x80)); in spu_disable()
172 u32 regval = readl(ARM_RESET_REGISTER); in spu_enable() local
173 regval &= ~1; in spu_enable()
176 writel(regval, ARM_RESET_REGISTER); in spu_enable()
/linux-4.1.27/arch/sparc/kernel/
Dauxio_32.c87 unsigned char regval; in set_auxio() local
94 regval = sbus_readb(auxio_register); in set_auxio()
95 sbus_writeb(((regval | bits_on) & ~bits_off) | AUXIO_ORMEIN4M, in set_auxio()
Dauxio_64.c34 u8 regval, newval; in __auxio_rmw() local
38 regval = (ebus ? in __auxio_rmw()
41 newval = regval | bits_on; in __auxio_rmw()
/linux-4.1.27/arch/ia64/sn/kernel/
Dirq.c422 u64 regval; in sn_check_intr() local
441 regval = pcireg_intr_status_get(pcibus_info); in sn_check_intr()
445 regval &= 0xff; in sn_check_intr()
446 if (sn_irq_info->irq_int_bit & regval & in sn_check_intr()
448 regval &= ~(sn_irq_info->irq_int_bit & regval); in sn_check_intr()
453 sn_irq_info->irq_last_intr = regval; in sn_check_intr()
/linux-4.1.27/arch/arm/mach-omap1/
Dclock.c232 u16 regval; in omap1_clk_set_rate_dsp_domain() local
240 regval = __raw_readw(DSP_CKCTL); in omap1_clk_set_rate_dsp_domain()
241 regval &= ~(3 << clk->rate_offset); in omap1_clk_set_rate_dsp_domain()
242 regval |= dsor_exp << clk->rate_offset; in omap1_clk_set_rate_dsp_domain()
243 __raw_writew(regval, DSP_CKCTL); in omap1_clk_set_rate_dsp_domain()
262 u16 regval; in omap1_clk_set_rate_ckctl_arm() local
270 regval = omap_readw(ARM_CKCTL); in omap1_clk_set_rate_ckctl_arm()
271 regval &= ~(3 << clk->rate_offset); in omap1_clk_set_rate_ckctl_arm()
272 regval |= dsor_exp << clk->rate_offset; in omap1_clk_set_rate_ckctl_arm()
273 regval = verify_ckctl_value(regval); in omap1_clk_set_rate_ckctl_arm()
[all …]
/linux-4.1.27/drivers/video/fbdev/
Darkfb.c477 u8 regval; in ark_dac_read_regs() local
480 regval = vga_rseq(par->state.vgabase, 0x1C); in ark_dac_read_regs()
483 vga_wseq(par->state.vgabase, 0x1C, regval | (code[0] & 4 ? 0x80 : 0)); in ark_dac_read_regs()
489 vga_wseq(par->state.vgabase, 0x1C, regval); in ark_dac_read_regs()
496 u8 regval; in ark_dac_write_regs() local
499 regval = vga_rseq(par->state.vgabase, 0x1C); in ark_dac_write_regs()
502 vga_wseq(par->state.vgabase, 0x1C, regval | (code[0] & 4 ? 0x80 : 0)); in ark_dac_write_regs()
508 vga_wseq(par->state.vgabase, 0x1C, regval); in ark_dac_write_regs()
515 u8 regval; in ark_set_pixclock() local
524 regval = vga_r(par->state.vgabase, VGA_MIS_R); in ark_set_pixclock()
[all …]
Ds3fb.c473 u8 regval; in s3_set_pixclock() local
484 regval = vga_r(par->state.vgabase, VGA_MIS_R); in s3_set_pixclock()
485 vga_w(par->state.vgabase, VGA_MIS_W, regval | VGA_MIS_ENB_PLL_LOAD); in s3_set_pixclock()
503 regval = vga_rseq (par->state.vgabase, 0x15); /* | 0x80; */ in s3_set_pixclock()
504 vga_wseq(par->state.vgabase, 0x15, regval & ~(1<<5)); in s3_set_pixclock()
505 vga_wseq(par->state.vgabase, 0x15, regval | (1<<5)); in s3_set_pixclock()
506 vga_wseq(par->state.vgabase, 0x15, regval & ~(1<<5)); in s3_set_pixclock()
1131 u8 regval, cr38, cr39; in s3_pci_probe() local
1202 regval = vga_rcrt(par->state.vgabase, 0x36); in s3_pci_probe()
1207 switch ((regval & 0xE0) >> 5) { in s3_pci_probe()
[all …]
Dvt8623fb.c264 u8 regval; in vt8623_set_pixclock() local
274 regval = vga_r(par->state.vgabase, VGA_MIS_R); in vt8623_set_pixclock()
275 vga_w(par->state.vgabase, VGA_MIS_W, regval | VGA_MIS_ENB_PLL_LOAD); in vt8623_set_pixclock()
/linux-4.1.27/drivers/iio/proximity/
Dsx9500.c199 __be16 regval; in sx9500_read_proximity() local
205 ret = regmap_bulk_read(data->regmap, SX9500_REG_USE_MSB, &regval, 2); in sx9500_read_proximity()
209 *val = be16_to_cpu(regval); in sx9500_read_proximity()
218 unsigned int regval; in sx9500_read_samp_freq() local
221 ret = regmap_read(data->regmap, SX9500_REG_PROX_CTRL0, &regval); in sx9500_read_samp_freq()
227 regval = (regval & SX9500_SCAN_PERIOD_MASK) >> SX9500_SCAN_PERIOD_SHIFT; in sx9500_read_samp_freq()
228 *val = sx9500_samp_freq_table[regval].val; in sx9500_read_samp_freq()
229 *val2 = sx9500_samp_freq_table[regval].val2; in sx9500_read_samp_freq()
/linux-4.1.27/drivers/media/dvb-frontends/
Dstv0900_core.c624 if (INRANGE(lookup->table[imin].regval, agc_gain, in stv0900_get_rf_level()
625 lookup->table[imax].regval)) { in stv0900_get_rf_level()
629 if (INRANGE(lookup->table[imin].regval, in stv0900_get_rf_level()
631 lookup->table[i].regval)) in stv0900_get_rf_level()
637 rf_lvl = (s32)agc_gain - lookup->table[imin].regval; in stv0900_get_rf_level()
640 rf_lvl /= (lookup->table[imax].regval - in stv0900_get_rf_level()
641 lookup->table[imin].regval); in stv0900_get_rf_level()
643 } else if (agc_gain > lookup->table[0].regval) in stv0900_get_rf_level()
645 else if (agc_gain < lookup->table[lookup->size-1].regval) in stv0900_get_rf_level()
680 regval, in stv0900_carr_get_quality() local
[all …]
Dstv0900_priv.h63 s32 regval;/* binary value */ member
Dstv0367.c3279 u32 regval = 0, temp = 0; in stv0367cab_read_snr() local
3314 regval += (stv0367_readbits(state, F367CAB_SNR_LO) in stv0367cab_read_snr()
3318 regval /= 10; /*for average over 10 times in for loop above*/ in stv0367cab_read_snr()
3319 if (regval != 0) { in stv0367cab_read_snr()
3322 temp /= regval; in stv0367cab_read_snr()
/linux-4.1.27/drivers/staging/iio/frequency/
Dad9832.c36 unsigned long regval; in ad9832_write_frequency() local
41 regval = ad9832_calc_freqreg(st->mclk, fout); in ad9832_write_frequency()
45 ((regval >> 24) & 0xFF)); in ad9832_write_frequency()
48 ((regval >> 16) & 0xFF)); in ad9832_write_frequency()
51 ((regval >> 8) & 0xFF)); in ad9832_write_frequency()
54 ((regval >> 0) & 0xFF)); in ad9832_write_frequency()
Dad9834.c39 unsigned long regval; in ad9834_write_frequency() local
44 regval = ad9834_calc_freqreg(st->mclk, fout); in ad9834_write_frequency()
46 st->freq_data[0] = cpu_to_be16(addr | (regval & in ad9834_write_frequency()
48 st->freq_data[1] = cpu_to_be16(addr | ((regval >> in ad9834_write_frequency()
/linux-4.1.27/drivers/iio/gyro/
Ditg3200_core.c93 u8 regval; in itg3200_read_raw() local
112 ret = itg3200_read_reg_8(indio_dev, ITG3200_REG_DLPF, &regval); in itg3200_read_raw()
116 *val = (regval & ITG3200_DLPF_CFG_MASK) ? 1000 : 8000; in itg3200_read_raw()
120 &regval); in itg3200_read_raw()
124 *val /= regval + 1; in itg3200_read_raw()
/linux-4.1.27/drivers/net/ethernet/xilinx/
Dxilinx_axienet_main.c1204 u32 regval; in axienet_ethtools_get_pauseparam() local
1207 regval = axienet_ior(lp, XAE_FCC_OFFSET); in axienet_ethtools_get_pauseparam()
1208 epauseparm->tx_pause = regval & XAE_FCC_FCTX_MASK; in axienet_ethtools_get_pauseparam()
1209 epauseparm->rx_pause = regval & XAE_FCC_FCRX_MASK; in axienet_ethtools_get_pauseparam()
1226 u32 regval = 0; in axienet_ethtools_set_pauseparam() local
1235 regval = axienet_ior(lp, XAE_FCC_OFFSET); in axienet_ethtools_set_pauseparam()
1237 regval |= XAE_FCC_FCTX_MASK; in axienet_ethtools_set_pauseparam()
1239 regval &= ~XAE_FCC_FCTX_MASK; in axienet_ethtools_set_pauseparam()
1241 regval |= XAE_FCC_FCRX_MASK; in axienet_ethtools_set_pauseparam()
1243 regval &= ~XAE_FCC_FCRX_MASK; in axienet_ethtools_set_pauseparam()
[all …]
/linux-4.1.27/drivers/hwmon/pmbus/
Dpmbus_core.c666 u16 regval; in pmbus_data2reg() local
670 regval = pmbus_data2reg_direct(data, sensor, val); in pmbus_data2reg()
673 regval = pmbus_data2reg_vid(data, sensor, val); in pmbus_data2reg()
677 regval = pmbus_data2reg_linear(data, sensor, val); in pmbus_data2reg()
680 return regval; in pmbus_data2reg()
714 u8 regval; in pmbus_get_boolean() local
720 regval = status & mask; in pmbus_get_boolean()
722 ret = !!regval; in pmbus_get_boolean()
736 ret = !!(regval && v1 >= v2); in pmbus_get_boolean()
777 u16 regval; in pmbus_set_sensor() local
[all …]
/linux-4.1.27/drivers/net/ethernet/intel/e1000e/
Dich8lan.c75 u16 regval; member
88 u16 regval; member
99 u16 regval; member
112 u32 regval; member
3259 hsfsts.regval = er16flash(ICH_FLASH_HSFSTS); in e1000_flash_cycle_init_ich8lan()
3271 ew32flash(ICH_FLASH_HSFSTS, hsfsts.regval & 0xFFFF); in e1000_flash_cycle_init_ich8lan()
3273 ew16flash(ICH_FLASH_HSFSTS, hsfsts.regval); in e1000_flash_cycle_init_ich8lan()
3290 ew32flash(ICH_FLASH_HSFSTS, hsfsts.regval & 0xFFFF); in e1000_flash_cycle_init_ich8lan()
3292 ew16flash(ICH_FLASH_HSFSTS, hsfsts.regval); in e1000_flash_cycle_init_ich8lan()
3301 hsfsts.regval = er16flash(ICH_FLASH_HSFSTS); in e1000_flash_cycle_init_ich8lan()
[all …]
Dnetdev.c3587 u32 regval; in e1000e_config_hwtstamp() local
3684 regval = er32(TSYNCTXCTL); in e1000e_config_hwtstamp()
3685 regval &= ~E1000_TSYNCTXCTL_ENABLED; in e1000e_config_hwtstamp()
3686 regval |= tsync_tx_ctl; in e1000e_config_hwtstamp()
3687 ew32(TSYNCTXCTL, regval); in e1000e_config_hwtstamp()
3689 (regval & E1000_TSYNCTXCTL_ENABLED)) { in e1000e_config_hwtstamp()
3695 regval = er32(TSYNCRXCTL); in e1000e_config_hwtstamp()
3696 regval &= ~(E1000_TSYNCRXCTL_ENABLED | E1000_TSYNCRXCTL_TYPE_MASK); in e1000e_config_hwtstamp()
3697 regval |= tsync_rx_ctl; in e1000e_config_hwtstamp()
3698 ew32(TSYNCRXCTL, regval); in e1000e_config_hwtstamp()
[all …]
/linux-4.1.27/include/linux/fsl/bestcomm/
Dbestcomm_priv.h254 u16 regval; in bcom_disable_prefetch() local
256 regval = in_be16(&bcom_eng->regs->PtdCntrl); in bcom_disable_prefetch()
257 out_be16(&bcom_eng->regs->PtdCntrl, regval | 1); in bcom_disable_prefetch()
/linux-4.1.27/drivers/media/usb/em28xx/
Dem28xx-input.c495 int regval; in em28xx_query_buttons() local
502 regval = em28xx_read_reg(dev, dev->button_polling_addresses[i]); in em28xx_query_buttons()
503 if (regval < 0) in em28xx_query_buttons()
516 is_pressed = regval & button->mask; in em28xx_query_buttons()
526 (~regval & button->mask) in em28xx_query_buttons()
527 | (regval & ~button->mask)); in em28xx_query_buttons()
558 dev->button_polling_last_values[i] = regval; in em28xx_query_buttons()
/linux-4.1.27/drivers/memory/
Domap-gpmc.c1035 u32 regval; in gpmc_configure() local
1047 regval = gpmc_read_reg(GPMC_CONFIG); in gpmc_configure()
1049 regval &= ~GPMC_CONFIG_WRITEPROTECT; /* WP is ON */ in gpmc_configure()
1051 regval |= GPMC_CONFIG_WRITEPROTECT; /* WP is OFF */ in gpmc_configure()
1052 gpmc_write_reg(GPMC_CONFIG, regval); in gpmc_configure()
1119 u32 regval; in gpmc_irq_endis() local
1123 regval = gpmc_read_reg(GPMC_IRQENABLE); in gpmc_irq_endis()
1125 regval |= gpmc_client_irq[i].bitmask; in gpmc_irq_endis()
1127 regval &= ~gpmc_client_irq[i].bitmask; in gpmc_irq_endis()
1128 gpmc_write_reg(GPMC_IRQENABLE, regval); in gpmc_irq_endis()
[all …]
/linux-4.1.27/drivers/pwm/
Dpwm-tiehrpwm.c154 unsigned short regval; in ehrpwm_modify() local
156 regval = readw(base + offset); in ehrpwm_modify()
157 regval &= ~mask; in ehrpwm_modify()
158 regval |= val & mask; in ehrpwm_modify()
159 writew(regval, base + offset); in ehrpwm_modify()
/linux-4.1.27/drivers/pinctrl/sunxi/
Dpinctrl-sunxi.c492 u32 regval; in sunxi_pinctrl_gpio_set() local
496 regval = readl(pctl->membase + reg); in sunxi_pinctrl_gpio_set()
499 regval |= BIT(index); in sunxi_pinctrl_gpio_set()
501 regval &= ~(BIT(index)); in sunxi_pinctrl_gpio_set()
503 writel(regval, pctl->membase + reg); in sunxi_pinctrl_gpio_set()
595 u32 regval; in sunxi_pinctrl_irq_set_type() local
628 regval = readl(pctl->membase + reg); in sunxi_pinctrl_irq_set_type()
629 regval &= ~(IRQ_CFG_IRQ_MASK << index); in sunxi_pinctrl_irq_set_type()
630 writel(regval | (mode << index), pctl->membase + reg); in sunxi_pinctrl_irq_set_type()
/linux-4.1.27/drivers/pci/host/
Dpci-keystone-dw.c378 u32 regval; in ks_pcie_cfg_setup() local
383 regval = (bus << 16) | (device << 8) | function; in ks_pcie_cfg_setup()
391 regval |= BIT(24); in ks_pcie_cfg_setup()
393 writel(regval, ks_pcie->va_app_base + CFG_SETUP); in ks_pcie_cfg_setup()
/linux-4.1.27/arch/arm/mach-lpc32xx/
Dcommon.h51 extern u32 clk_get_pllrate_from_reg(u32 inputclk, u32 regval);
Dclock.c208 u32 clk_get_pllrate_from_reg(u32 inputclk, u32 regval) in clk_get_pllrate_from_reg() argument
215 if ((regval & LPC32XX_CLKPWR_HCLKPLL_CCO_BYPASS) != 0) in clk_get_pllrate_from_reg()
217 if ((regval & LPC32XX_CLKPWR_HCLKPLL_POSTDIV_BYPASS) != 0) in clk_get_pllrate_from_reg()
219 if ((regval & LPC32XX_CLKPWR_HCLKPLL_FDBK_SEL_FCLK) != 0) in clk_get_pllrate_from_reg()
221 pllcfg.pll_m = 1 + ((regval >> 1) & 0xFF); in clk_get_pllrate_from_reg()
222 pllcfg.pll_n = 1 + ((regval >> 9) & 0x3); in clk_get_pllrate_from_reg()
223 pllcfg.pll_p = pll_postdivs[((regval >> 11) & 0x3)]; in clk_get_pllrate_from_reg()
/linux-4.1.27/drivers/rapidio/devices/
Dtsi721.c376 u32 regval; in tsi721_dbell_handler() local
379 regval = ioread32(priv->regs + TSI721_SR_CHINTE(IDB_QUEUE)); in tsi721_dbell_handler()
380 regval &= ~TSI721_SR_CHINT_IDBQRCV; in tsi721_dbell_handler()
381 iowrite32(regval, in tsi721_dbell_handler()
398 u32 regval; in tsi721_db_dpc() local
447 regval = ioread32(priv->regs + TSI721_SR_CHINTE(IDB_QUEUE)); in tsi721_db_dpc()
448 regval |= TSI721_SR_CHINT_IDBQRCV; in tsi721_db_dpc()
449 iowrite32(regval, in tsi721_db_dpc()
889 u32 regval; in tsi721_rio_map_inb_mem() local
897 regval = ioread32(priv->regs + TSI721_IBWIN_LB(i)); in tsi721_rio_map_inb_mem()
[all …]
/linux-4.1.27/drivers/net/wireless/brcm80211/brcmsmac/phy/
Dphy_n.c15098 u16 regval[4]; in wlc_phy_adjust_lnagaintbl_nphy() local
15131 regval[0] = nphy_def_lnagains[2] + gain_delta[core]; in wlc_phy_adjust_lnagaintbl_nphy()
15132 regval[1] = nphy_def_lnagains[3] + gain_delta[core]; in wlc_phy_adjust_lnagaintbl_nphy()
15133 regval[2] = nphy_def_lnagains[3] + gain_delta[core]; in wlc_phy_adjust_lnagaintbl_nphy()
15134 regval[3] = nphy_def_lnagains[3] + gain_delta[core]; in wlc_phy_adjust_lnagaintbl_nphy()
15137 regval[ctr] = in wlc_phy_adjust_lnagaintbl_nphy()
15141 wlc_phy_table_write_nphy(pi, core, 4, 8, 16, regval); in wlc_phy_adjust_lnagaintbl_nphy()
15596 u16 regval[21]; in wlc_phy_workarounds_nphy_gainctrl() local
16022 regval[ctr] = (hpf_code << 8) | 0x7c; in wlc_phy_workarounds_nphy_gainctrl()
16023 wlc_phy_table_write_nphy(pi, 7, 4, 0x106, 16, regval); in wlc_phy_workarounds_nphy_gainctrl()
[all …]
/linux-4.1.27/drivers/pinctrl/
Dpinctrl-u300.c936 u16 regval, val, mask; in u300_pmx_endisable() local
949 regval = readw(upmx->virtbase + u300_pmx_registers[i]); in u300_pmx_endisable()
950 regval &= ~mask; in u300_pmx_endisable()
951 regval |= val; in u300_pmx_endisable()
952 writew(regval, upmx->virtbase + u300_pmx_registers[i]); in u300_pmx_endisable()
Dpinctrl-tegra-xusb.c369 u32 regval; in tegra_xusb_padctl_pinconf_group_set() local
383 regval = padctl_readl(padctl, lane->offset); in tegra_xusb_padctl_pinconf_group_set()
386 regval &= ~BIT(lane->iddq); in tegra_xusb_padctl_pinconf_group_set()
388 regval |= BIT(lane->iddq); in tegra_xusb_padctl_pinconf_group_set()
390 padctl_writel(padctl, regval, lane->offset); in tegra_xusb_padctl_pinconf_group_set()
/linux-4.1.27/drivers/net/phy/
Dmicrel.c471 int regval; in ksz8873mll_read_status() local
474 regval = phy_read(phydev, KSZ8873MLL_GLOBAL_CONTROL_4); in ksz8873mll_read_status()
476 regval = phy_read(phydev, KSZ8873MLL_GLOBAL_CONTROL_4); in ksz8873mll_read_status()
478 if (regval & KSZ8873MLL_GLOBAL_CONTROL_4_DUPLEX) in ksz8873mll_read_status()
483 if (regval & KSZ8873MLL_GLOBAL_CONTROL_4_SPEED) in ksz8873mll_read_status()
/linux-4.1.27/drivers/staging/rtl8188eu/hal/
Dbb_cfg.c709 u32 regval; in rtl88eu_phy_bb_config() local
715 regval = usb_read16(adapt, REG_SYS_FUNC_EN); in rtl88eu_phy_bb_config()
716 usb_write16(adapt, REG_SYS_FUNC_EN, (u16)(regval|BIT13|BIT0|BIT1)); in rtl88eu_phy_bb_config()
/linux-4.1.27/drivers/tty/serial/
Dxilinx_uartps.c558 unsigned int regval; in cdns_uart_stop_tx() local
560 regval = readl(port->membase + CDNS_UART_CR_OFFSET); in cdns_uart_stop_tx()
561 regval |= CDNS_UART_CR_TX_DIS; in cdns_uart_stop_tx()
563 writel(regval, port->membase + CDNS_UART_CR_OFFSET); in cdns_uart_stop_tx()
572 unsigned int regval; in cdns_uart_stop_rx() local
574 regval = readl(port->membase + CDNS_UART_CR_OFFSET); in cdns_uart_stop_rx()
575 regval |= CDNS_UART_CR_RX_DIS; in cdns_uart_stop_rx()
577 writel(regval, port->membase + CDNS_UART_CR_OFFSET); in cdns_uart_stop_rx()
Dip22zilog.c139 unsigned char regval; in ip22zilog_clear_fifo() local
141 regval = readb(&channel->control); in ip22zilog_clear_fifo()
143 if (regval & Rx_CH_AV) in ip22zilog_clear_fifo()
146 regval = read_zsreg(channel, R1); in ip22zilog_clear_fifo()
150 if (regval & (PAR_ERR | Rx_OVR | CRC_ERR)) { in ip22zilog_clear_fifo()
Dsunzilog.c156 unsigned char regval; in sunzilog_clear_fifo() local
158 regval = readb(&channel->control); in sunzilog_clear_fifo()
160 if (regval & Rx_CH_AV) in sunzilog_clear_fifo()
163 regval = read_zsreg(channel, R1); in sunzilog_clear_fifo()
167 if (regval & (PAR_ERR | Rx_OVR | CRC_ERR)) { in sunzilog_clear_fifo()
/linux-4.1.27/drivers/ata/
Dsata_nv.c1895 u8 regval; in nv_swncq_host_init() local
1898 pci_read_config_byte(pdev, 0x7f, &regval); in nv_swncq_host_init()
1899 regval &= ~(1 << 7); in nv_swncq_host_init()
1900 pci_write_config_byte(pdev, 0x7f, regval); in nv_swncq_host_init()
2410 u8 regval; in nv_init_one() local
2412 pci_read_config_byte(pdev, NV_MCP_SATA_CFG_20, &regval); in nv_init_one()
2413 regval |= NV_MCP_SATA_CFG_20_SATA_SPACE_EN; in nv_init_one()
2414 pci_write_config_byte(pdev, NV_MCP_SATA_CFG_20, regval); in nv_init_one()
2447 u8 regval; in nv_pci_device_resume() local
2449 pci_read_config_byte(pdev, NV_MCP_SATA_CFG_20, &regval); in nv_pci_device_resume()
[all …]
/linux-4.1.27/sound/soc/
Dsoc-ops.c846 unsigned int regval; in snd_soc_get_xr_sx() local
851 ret = snd_soc_component_read(component, regbase+i, &regval); in snd_soc_get_xr_sx()
854 val |= (regval & regwmask) << (regwshift*(regcount-i-1)); in snd_soc_get_xr_sx()
894 unsigned int i, regval, regmask; in snd_soc_put_xr_sx() local
901 regval = (val >> (regwshift*(regcount-i-1))) & regwmask; in snd_soc_put_xr_sx()
904 regmask, regval); in snd_soc_put_xr_sx()
/linux-4.1.27/drivers/net/wireless/ath/ath5k/
Dreset.c450 u32 regval; in ath5k_hw_wisoc_reset() local
478 regval = ioread32(reg); in ath5k_hw_wisoc_reset()
479 iowrite32(regval | val, reg); in ath5k_hw_wisoc_reset()
480 regval = ioread32(reg); in ath5k_hw_wisoc_reset()
484 iowrite32(regval & ~val, reg); in ath5k_hw_wisoc_reset()
485 regval = ioread32(reg); in ath5k_hw_wisoc_reset()
/linux-4.1.27/drivers/irqchip/
Dirq-mips-gic.c58 unsigned int regval; in gic_update_bits() local
60 regval = gic_read(reg); in gic_update_bits()
61 regval &= ~mask; in gic_update_bits()
62 regval |= val; in gic_update_bits()
63 gic_write(reg, regval); in gic_update_bits()
/linux-4.1.27/drivers/iio/magnetometer/
Dak8975.c426 u8 regval; in ak8975_set_mode() local
429 regval = (data->cntl_cache & ~data->def->ctrl_masks[CNTL_MODE]) | in ak8975_set_mode()
432 data->def->ctrl_regs[CNTL], regval); in ak8975_set_mode()
436 data->cntl_cache = regval; in ak8975_set_mode()
/linux-4.1.27/drivers/thermal/ti-soc-thermal/
Dti-bandgap.c957 bgp->regval[id].data = data; in ti_bandgap_set_sensor_data()
976 return bgp->regval[id].data; in ti_bandgap_get_sensor_data()
1230 bgp->regval = devm_kzalloc(&pdev->dev, sizeof(*bgp->regval) * in ti_bandgap_build()
1232 if (!bgp->regval) { in ti_bandgap_build()
1488 rval = &bgp->regval[i]; in ti_bandgap_save_ctxt()
1521 rval = &bgp->regval[i]; in ti_bandgap_restore_ctxt()
Dti-bandgap.h243 struct temp_sensor_regval *regval; member
/linux-4.1.27/virt/kvm/arm/
Dvgic.c399 u32 regval; in vgic_reg_access() local
407 regval = *reg; in vgic_reg_access()
410 regval = 0; in vgic_reg_access()
420 regval |= data; in vgic_reg_access()
424 regval &= ~data; in vgic_reg_access()
428 regval = (regval & ~(mask << word_offset)) | data; in vgic_reg_access()
431 *reg = regval; in vgic_reg_access()
435 regval = 0; in vgic_reg_access()
439 mmio_data_write(mmio, mask, regval >> word_offset); in vgic_reg_access()
/linux-4.1.27/drivers/mmc/host/
Domap_hsmmc.c529 unsigned long regval; in omap_hsmmc_set_clock() local
537 regval = OMAP_HSMMC_READ(host->base, SYSCTL); in omap_hsmmc_set_clock()
538 regval = regval & ~(CLKD_MASK | DTO_MASK); in omap_hsmmc_set_clock()
540 regval = regval | (clkdiv << 6) | (DTO << 16); in omap_hsmmc_set_clock()
541 OMAP_HSMMC_WRITE(host->base, SYSCTL, regval); in omap_hsmmc_set_clock()
564 regval = OMAP_HSMMC_READ(host->base, HCTL); in omap_hsmmc_set_clock()
566 regval |= HSPE; in omap_hsmmc_set_clock()
568 regval &= ~HSPE; in omap_hsmmc_set_clock()
570 OMAP_HSMMC_WRITE(host->base, HCTL, regval); in omap_hsmmc_set_clock()
/linux-4.1.27/drivers/net/ethernet/adi/
Dbfin_mac.c857 u64 regval; in bfin_tx_hwtstamp() local
859 regval = bfin_read_EMAC_PTP_TXSNAPLO(); in bfin_tx_hwtstamp()
860 regval |= (u64)bfin_read_EMAC_PTP_TXSNAPHI() << 32; in bfin_tx_hwtstamp()
862 ns = regval << lp->shift; in bfin_tx_hwtstamp()
873 u64 regval, ns; in bfin_rx_hwtstamp() local
885 regval = bfin_read_EMAC_PTP_RXSNAPLO(); in bfin_rx_hwtstamp()
886 regval |= (u64)bfin_read_EMAC_PTP_RXSNAPHI() << 32; in bfin_rx_hwtstamp()
887 ns = regval << lp->shift; in bfin_rx_hwtstamp()
/linux-4.1.27/sound/oss/
Dsb_mixer.c235 static void oss_change_bits(sb_devc *devc, unsigned char *regval, int dev, int chn, int newval) in oss_change_bits() argument
245 *regval &= ~(mask << shift); /* Mask out previous value */ in oss_change_bits()
246 *regval |= (newval & mask) << shift; /* Set the new value */ in oss_change_bits()
Dad1848.c459 static void oss_change_bits(ad1848_info *devc, unsigned char *regval, in oss_change_bits() argument
488 *regval &= ~(mask << shift); /* Clear bits */ in oss_change_bits()
489 *regval |= (newval & mask) << shift; /* Set new value */ in oss_change_bits()
/linux-4.1.27/drivers/net/ethernet/amd/
Dsunlance.c468 u16 regval = 0; in init_restart_lance() local
479 regval = sbus_readw(lp->lregs + RDP); in init_restart_lance()
481 if (regval & (LE_C0_ERR | LE_C0_IDON)) in init_restart_lance()
485 if (i == 100 || (regval & LE_C0_ERR)) { in init_restart_lance()
487 i, regval); in init_restart_lance()
928 u32 regval = lp->init_block_dvma & 0xff000000; in lance_open() local
930 sbus_writel(regval, lp->dregs + DMA_TEST); in lance_open()
/linux-4.1.27/drivers/media/usb/stk1160/
Dstk1160.h171 struct regval { struct
Dstk1160-v4l.c58 static struct regval std525[] = { in stk1160_set_std()
77 static struct regval std625[] = { in stk1160_set_std()
Dstk1160-core.c133 static const struct regval ctl[] = { in stk1160_reg_reset()
/linux-4.1.27/drivers/net/wireless/rtlwifi/rtl8192ce/
Dphy.c98 u16 regval; in rtl92c_phy_bb_config() local
103 regval = rtl_read_word(rtlpriv, REG_SYS_FUNC_EN); in rtl92c_phy_bb_config()
105 regval | BIT(13) | BIT(0) | BIT(1)); in rtl92c_phy_bb_config()
/linux-4.1.27/drivers/net/ethernet/broadcom/
Dsb1250-mac.c441 int regval; in sbmac_mii_read() local
489 regval = 0; in sbmac_mii_read()
492 regval <<= 1; in sbmac_mii_read()
496 regval |= 1; in sbmac_mii_read()
508 return regval; in sbmac_mii_read()
529 u16 regval) in sbmac_mii_write() argument
542 sbmac_mii_senddata(sbm_mdio, regval, 16); in sbmac_mii_write()
/linux-4.1.27/drivers/staging/netlogic/
Dxlr_net.c341 u32 regval; in xlr_set_rx_mode() local
343 regval = xlr_nae_rdreg(priv->base_addr, R_MAC_FILTER_CONFIG); in xlr_set_rx_mode()
346 regval |= (1 << O_MAC_FILTER_CONFIG__BROADCAST_EN) | in xlr_set_rx_mode()
351 regval &= ~((1 << O_MAC_FILTER_CONFIG__PAUSE_FRAME_EN) | in xlr_set_rx_mode()
355 xlr_nae_wreg(priv->base_addr, R_MAC_FILTER_CONFIG, regval); in xlr_set_rx_mode()
/linux-4.1.27/drivers/net/wireless/rtlwifi/rtl8192cu/
Dphy.c126 u16 regval; in rtl92cu_phy_bb_config() local
131 regval = rtl_read_word(rtlpriv, REG_SYS_FUNC_EN); in rtl92cu_phy_bb_config()
132 rtl_write_word(rtlpriv, REG_SYS_FUNC_EN, regval | BIT(13) | in rtl92cu_phy_bb_config()
/linux-4.1.27/drivers/spmi/
Dspmi-pmic-arb.c818 u32 regval; in spmi_pmic_arb_probe() local
849 regval = readl_relaxed(core + PMIC_ARB_REG_CHNL(chan)); in spmi_pmic_arb_probe()
850 if (!regval) in spmi_pmic_arb_probe()
853 ppid = (regval >> 8) & 0xFFF; in spmi_pmic_arb_probe()
/linux-4.1.27/drivers/gpu/ipu-v3/
Dipu-common.c357 u32 bursts, regval; in ipu_idmac_lock_enable() local
387 regval = ipu_idmac_read(ipu, idmac_lock_en_info[i].reg); in ipu_idmac_lock_enable()
388 regval &= ~(0x03 << idmac_lock_en_info[i].shift); in ipu_idmac_lock_enable()
389 regval |= (bursts << idmac_lock_en_info[i].shift); in ipu_idmac_lock_enable()
390 ipu_idmac_write(ipu, regval, idmac_lock_en_info[i].reg); in ipu_idmac_lock_enable()
/linux-4.1.27/drivers/net/usb/
Dsmsc95xx.c224 int idx, int regval, int in_pm) in __smsc95xx_mdio_write() argument
239 val = regval; in __smsc95xx_mdio_write()
273 int idx, int regval) in smsc95xx_mdio_write_nopm() argument
275 __smsc95xx_mdio_write(netdev, phy_id, idx, regval, 1); in smsc95xx_mdio_write_nopm()
284 int regval) in smsc95xx_mdio_write() argument
286 __smsc95xx_mdio_write(netdev, phy_id, idx, regval, 0); in smsc95xx_mdio_write()
Dsmsc75xx.c233 int idx, int regval, int in_pm) in __smsc75xx_mdio_write() argument
248 val = regval; in __smsc75xx_mdio_write()
284 int idx, int regval) in smsc75xx_mdio_write_nopm() argument
286 __smsc75xx_mdio_write(netdev, phy_id, idx, regval, 1); in smsc75xx_mdio_write_nopm()
295 int regval) in smsc75xx_mdio_write() argument
297 __smsc75xx_mdio_write(netdev, phy_id, idx, regval, 0); in smsc75xx_mdio_write()
/linux-4.1.27/drivers/net/ethernet/sun/
Dsunbmac.c102 u32 regval; in qec_init() local
108 regval = GLOB_CTRL_B32; in qec_init()
110 regval = GLOB_CTRL_B16; in qec_init()
111 sbus_writel(regval | GLOB_CTRL_BMODE, gregs + GLOB_CTRL); in qec_init()
/linux-4.1.27/drivers/net/wireless/brcm80211/brcmfmac/
Dsdio.c181 #define SBSDIO_ALPAV(regval) ((regval) & SBSDIO_AVBITS) argument
182 #define SBSDIO_HTAV(regval) (((regval) & SBSDIO_AVBITS) == SBSDIO_AVBITS) argument
183 #define SBSDIO_ALPONLY(regval) (SBSDIO_ALPAV(regval) && !SBSDIO_HTAV(regval)) argument
184 #define SBSDIO_CLKAV(regval, alponly) \ argument
185 (SBSDIO_ALPAV(regval) && (alponly ? 1 : SBSDIO_HTAV(regval)))
755 static int w_sdreg32(struct brcmf_sdio *bus, u32 regval, u32 reg_offset) in w_sdreg32() argument
761 brcmf_sdiod_regwl(bus->sdiodev, core->base + reg_offset, regval, &ret); in w_sdreg32()
/linux-4.1.27/drivers/clk/st/
Dclkgen-mux.c85 u32 regval = readl(mux->feedback_reg[mux->muxsel]); in clkgena_divmux_is_running() local
86 u32 running = regval & BIT(mux->feedback_bit_idx); in clkgena_divmux_is_running()
/linux-4.1.27/drivers/net/ethernet/natsemi/
Dnatsemi.c2725 u32 regval = readl(ioaddr + WOLCmd); in netdev_get_wol() local
2737 if (regval & WakePhy) in netdev_get_wol()
2739 if (regval & WakeUnicast) in netdev_get_wol()
2741 if (regval & WakeMulticast) in netdev_get_wol()
2743 if (regval & WakeBroadcast) in netdev_get_wol()
2745 if (regval & WakeArp) in netdev_get_wol()
2747 if (regval & WakeMagic) in netdev_get_wol()
2749 if (regval & WakeMagicSecure) { in netdev_get_wol()
/linux-4.1.27/drivers/media/tuners/
Dxc5000.c672 u16 regval; in xc_debug_dump() local
714 xc5000_readreg(priv, priv->pll_register_no, &regval); in xc_debug_dump()
715 dprintk(1, "*** PLL lock status = 0x%04x\n", regval); in xc_debug_dump()
/linux-4.1.27/drivers/usb/serial/
Dmos7840.c453 __u8 regval = 0x0; in mos7840_control_callback() local
477 regval = (__u8) data[0]; in mos7840_control_callback()
478 dev_dbg(dev, "%s data is %x\n", __func__, regval); in mos7840_control_callback()
480 mos7840_handle_new_msr(mos7840_port, regval); in mos7840_control_callback()
482 mos7840_handle_new_lsr(mos7840_port, regval); in mos7840_control_callback()
/linux-4.1.27/drivers/net/wireless/b43/
Dphy_ht.c730 u32 regval[64]; in b43_phy_ht_tx_power_ctl_setup() local
736 regval[i] = pwr; in b43_phy_ht_tx_power_ctl_setup()
738 b43_httab_write_bulk(dev, B43_HTTAB16(26 + c, 0), 64, regval); in b43_phy_ht_tx_power_ctl_setup()
Dphy_n.c4066 u32 regval[64]; in b43_nphy_tx_power_ctl_setup() local
4216 regval[i] = pwr; in b43_nphy_tx_power_ctl_setup()
4218 b43_ntab_write_bulk(dev, B43_NTAB32(26 + c, 0), 64, regval); in b43_nphy_tx_power_ctl_setup()
/linux-4.1.27/sound/isa/opti9xx/
Dmiro.c1206 unsigned char regval; in snd_card_miro_aci_detect() local
1216 regval=inb(miro->mc_base + 4); in snd_card_miro_aci_detect()
1217 aci->aci_port = (regval & 0x10) ? 0x344 : 0x354; in snd_card_miro_aci_detect()
/linux-4.1.27/drivers/staging/iio/
Diio_simple_dummy.c50 int regval; /* what would be written to hardware */ member
/linux-4.1.27/drivers/usb/gadget/udc/
Datmel_usba_udc.c1104 u32 regval; in set_address() local
1107 regval = usba_readl(udc, CTRL); in set_address()
1108 regval = USBA_BFINS(DEV_ADDR, addr, regval); in set_address()
1109 usba_writel(udc, CTRL, regval); in set_address()
/linux-4.1.27/drivers/scsi/pm8001/
Dpm80xx_hwi.c1190 u32 regval; in pm80xx_chip_soft_rst() local
1202 regval = pm8001_cr32(pm8001_ha, 0, SPC_REG_SOFT_RESET); in pm80xx_chip_soft_rst()
1204 pm8001_printk("reset register before write : 0x%x\n", regval)); in pm80xx_chip_soft_rst()
1209 regval = pm8001_cr32(pm8001_ha, 0, SPC_REG_SOFT_RESET); in pm80xx_chip_soft_rst()
1211 pm8001_printk("reset register after write 0x%x\n", regval)); in pm80xx_chip_soft_rst()
1213 if ((regval & SPCv_SOFT_RESET_READ_MASK) == in pm80xx_chip_soft_rst()
1217 regval)); in pm80xx_chip_soft_rst()
1221 regval)); in pm80xx_chip_soft_rst()
/linux-4.1.27/drivers/net/wan/
Dfarsync.c682 unsigned int regval; in fst_cpureset() local
714 regval = inl(card->pci_conf + CNTRL_9052); in fst_cpureset()
716 outl(regval | 0x40000000, card->pci_conf + CNTRL_9052); in fst_cpureset()
717 outl(regval & ~0x40000000, card->pci_conf + CNTRL_9052); in fst_cpureset()
/linux-4.1.27/drivers/net/wireless/rtlwifi/rtl8188ee/
Dphy.c259 u16 regval; in rtl88e_phy_bb_config() local
263 regval = rtl_read_word(rtlpriv, REG_SYS_FUNC_EN); in rtl88e_phy_bb_config()
265 regval | BIT(13) | BIT(0) | BIT(1)); in rtl88e_phy_bb_config()
/linux-4.1.27/drivers/net/wireless/rtlwifi/rtl8723be/
Dphy.c122 u16 regval; in rtl8723be_phy_bb_config() local
127 regval = rtl_read_word(rtlpriv, REG_SYS_FUNC_EN); in rtl8723be_phy_bb_config()
129 regval | BIT(13) | BIT(0) | BIT(1)); in rtl8723be_phy_bb_config()
/linux-4.1.27/drivers/net/wireless/rtlwifi/rtl8821ae/
Dphy.c327 u8 regval; in rtl8821ae_phy_bb_config() local
332 regval = rtl_read_byte(rtlpriv, REG_SYS_FUNC_EN); in rtl8821ae_phy_bb_config()
333 regval |= FEN_PCIEA; in rtl8821ae_phy_bb_config()
334 rtl_write_byte(rtlpriv, REG_SYS_FUNC_EN, regval); in rtl8821ae_phy_bb_config()
336 regval | FEN_BB_GLB_RSTN | FEN_BBRSTB); in rtl8821ae_phy_bb_config()
/linux-4.1.27/drivers/net/wireless/rtlwifi/rtl8192ee/
Dphy.c249 u16 regval; in rtl92ee_phy_bb_config() local
254 regval = rtl_read_word(rtlpriv, REG_SYS_FUNC_EN); in rtl92ee_phy_bb_config()
256 regval | BIT(13) | BIT(0) | BIT(1)); in rtl92ee_phy_bb_config()
/linux-4.1.27/drivers/net/ethernet/dec/tulip/
Dde4x5.c1997 u_char irq, regval; in de4x5_eisa_probe() local
2028 regval = inb(EISA_REG0) & (ER0_INTL | ER0_INTT); in de4x5_eisa_probe()
2047 outb (ER0_BSW | ER0_BMW | ER0_EPT | regval, EISA_REG0); in de4x5_eisa_probe()
2049 irq = de4x5_irq[(regval >> 1) & 0x03]; in de4x5_eisa_probe()
/linux-4.1.27/drivers/net/wireless/rtlwifi/rtl8192de/
Dphy.c756 u16 regval; in rtl92d_phy_bb_config() local
761 regval = rtl_read_word(rtlpriv, REG_SYS_FUNC_EN); in rtl92d_phy_bb_config()
763 regval | BIT(13) | BIT(0) | BIT(1)); in rtl92d_phy_bb_config()
/linux-4.1.27/drivers/net/ethernet/chelsio/cxgb4/
Dt4fw_api.h2922 __be32 regval; member