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Searched refs:mmio_base (Results 1 – 114 of 114) sorted by relevance

/linux-4.1.27/drivers/input/keyboard/
Dimx_keypad.c54 void __iomem *mmio_base; member
99 reg_val = readw(keypad->mmio_base + KPDR); in imx_keypad_scan_matrix()
101 writew(reg_val, keypad->mmio_base + KPDR); in imx_keypad_scan_matrix()
103 reg_val = readw(keypad->mmio_base + KPCR); in imx_keypad_scan_matrix()
105 writew(reg_val, keypad->mmio_base + KPCR); in imx_keypad_scan_matrix()
109 reg_val = readw(keypad->mmio_base + KPCR); in imx_keypad_scan_matrix()
111 writew(reg_val, keypad->mmio_base + KPCR); in imx_keypad_scan_matrix()
118 reg_val = readw(keypad->mmio_base + KPDR); in imx_keypad_scan_matrix()
120 writew(reg_val, keypad->mmio_base + KPDR); in imx_keypad_scan_matrix()
132 reg_val = readw(keypad->mmio_base + KPDR); in imx_keypad_scan_matrix()
[all …]
Dpxa930_rotary.c26 void __iomem *mmio_base; member
34 uint32_t sbcr = __raw_readl(r->mmio_base + SBCR); in clear_sbcr()
36 __raw_writel(sbcr | SBCR_ERSB, r->mmio_base + SBCR); in clear_sbcr()
37 __raw_writel(sbcr & ~SBCR_ERSB, r->mmio_base + SBCR); in clear_sbcr()
46 ercr = __raw_readl(r->mmio_base + ERCR) & 0xf; in rotary_irq()
115 r->mmio_base = ioremap_nocache(res->start, resource_size(res)); in pxa930_rotary_probe()
116 if (r->mmio_base == NULL) { in pxa930_rotary_probe()
171 iounmap(r->mmio_base); in pxa930_rotary_probe()
183 iounmap(r->mmio_base); in pxa930_rotary_remove()
Dw90p910_keypad.c52 void __iomem *mmio_base; member
80 kstatus = __raw_readl(keypad->mmio_base + KPI_STATUS); in w90p910_keypad_irq_handler()
99 val = __raw_readl(keypad->mmio_base + KPI_CONF); in w90p910_keypad_open()
107 __raw_writel(val, keypad->mmio_base + KPI_CONF); in w90p910_keypad_open()
170 keypad->mmio_base = ioremap(res->start, resource_size(res)); in w90p910_keypad_probe()
171 if (keypad->mmio_base == NULL) { in w90p910_keypad_probe()
227 iounmap(keypad->mmio_base); in w90p910_keypad_probe()
247 iounmap(keypad->mmio_base); in w90p910_keypad_remove()
Dep93xx_keypad.c72 void __iomem *mmio_base; member
91 status = __raw_readl(keypad->mmio_base + KEY_REG); in ep93xx_keypad_irq_handler()
158 __raw_writel(val, keypad->mmio_base + KEY_INIT); in ep93xx_keypad_config()
277 keypad->mmio_base = ioremap(res->start, resource_size(res)); in ep93xx_keypad_probe()
278 if (keypad->mmio_base == NULL) { in ep93xx_keypad_probe()
340 iounmap(keypad->mmio_base); in ep93xx_keypad_probe()
363 iounmap(keypad->mmio_base); in ep93xx_keypad_remove()
Dpxa27x_keypad.c93 #define keypad_readl(off) __raw_readl(keypad->mmio_base + (off))
94 #define keypad_writel(off, v) __raw_writel((v), keypad->mmio_base + (off))
104 void __iomem *mmio_base; member
752 keypad->mmio_base = devm_ioremap_resource(&pdev->dev, res); in pxa27x_keypad_probe()
753 if (IS_ERR(keypad->mmio_base)) in pxa27x_keypad_probe()
754 return PTR_ERR(keypad->mmio_base); in pxa27x_keypad_probe()
/linux-4.1.27/drivers/pwm/
Dpwm-tiecap.c52 void __iomem *mmio_base; member
93 reg_val = readw(pc->mmio_base + ECCTL2); in ecap_pwm_config()
98 writew(reg_val, pc->mmio_base + ECCTL2); in ecap_pwm_config()
102 writel(duty_cycles, pc->mmio_base + CAP2); in ecap_pwm_config()
103 writel(period_cycles, pc->mmio_base + CAP1); in ecap_pwm_config()
110 writel(duty_cycles, pc->mmio_base + CAP4); in ecap_pwm_config()
111 writel(period_cycles, pc->mmio_base + CAP3); in ecap_pwm_config()
115 reg_val = readw(pc->mmio_base + ECCTL2); in ecap_pwm_config()
118 writew(reg_val, pc->mmio_base + ECCTL2); in ecap_pwm_config()
132 reg_val = readw(pc->mmio_base + ECCTL2); in ecap_pwm_set_polarity()
[all …]
Dpwm-tiehrpwm.c129 void __iomem *mmio_base; member
229 ehrpwm_modify(pc->mmio_base, aqctl_reg, aqctl_mask, aqctl_val); in configure_polarity()
295 ehrpwm_modify(pc->mmio_base, TBCTL, TBCTL_CLKDIV_MASK, tb_divval); in ehrpwm_pwm_config()
302 ehrpwm_modify(pc->mmio_base, TBCTL, TBCTL_PRDLD_MASK, TBCTL_PRDLD_SHDW); in ehrpwm_pwm_config()
304 ehrpwm_write(pc->mmio_base, TBPRD, period_cycles); in ehrpwm_pwm_config()
307 ehrpwm_modify(pc->mmio_base, TBCTL, TBCTL_CTRMODE_MASK, in ehrpwm_pwm_config()
317 ehrpwm_write(pc->mmio_base, cmp_reg, duty_cycles); in ehrpwm_pwm_config()
352 ehrpwm_modify(pc->mmio_base, AQSFRC, AQSFRC_RLDCSF_MASK, in ehrpwm_pwm_enable()
355 ehrpwm_modify(pc->mmio_base, AQCSFRC, aqcsfrc_mask, aqcsfrc_val); in ehrpwm_pwm_enable()
369 ehrpwm_modify(pc->mmio_base, TBCTL, TBCTL_RUN_MASK, TBCTL_FREE_RUN); in ehrpwm_pwm_enable()
[all …]
Dpwm-tipwmss.c31 void __iomem *mmio_base; member
42 val = readw(info->mmio_base + PWMSS_CLKCONFIG); in pwmss_submodule_state_change()
44 writew(val , info->mmio_base + PWMSS_CLKCONFIG); in pwmss_submodule_state_change()
47 return readw(info->mmio_base + PWMSS_CLKSTATUS); in pwmss_submodule_state_change()
71 info->mmio_base = devm_ioremap_resource(&pdev->dev, r); in pwmss_probe()
72 if (IS_ERR(info->mmio_base)) in pwmss_probe()
73 return PTR_ERR(info->mmio_base); in pwmss_probe()
102 info->pwmss_clkconfig = readw(info->mmio_base + PWMSS_CLKCONFIG); in pwmss_suspend()
112 writew(info->pwmss_clkconfig, info->mmio_base + PWMSS_CLKCONFIG); in pwmss_resume()
Dpwm-imx.c54 void __iomem *mmio_base; member
87 u32 max = readl(imx->mmio_base + MX1_PWMP); in imx_pwm_config_v1()
89 writel(max - p, imx->mmio_base + MX1_PWMS); in imx_pwm_config_v1()
99 val = readl(imx->mmio_base + MX1_PWMC); in imx_pwm_set_enable_v1()
106 writel(val, imx->mmio_base + MX1_PWMC); in imx_pwm_set_enable_v1()
129 sr = readl(imx->mmio_base + MX3_PWMSR); in imx_pwm_config_v2()
135 sr = readl(imx->mmio_base + MX3_PWMSR); in imx_pwm_config_v2()
140 writel(MX3_PWMCR_SWR, imx->mmio_base + MX3_PWMCR); in imx_pwm_config_v2()
143 cr = readl(imx->mmio_base + MX3_PWMCR); in imx_pwm_config_v2()
172 writel(duty_cycles, imx->mmio_base + MX3_PWMSAR); in imx_pwm_config_v2()
[all …]
Dpwm-spear.c54 void __iomem *mmio_base; member
67 return readl_relaxed(chip->mmio_base + (num << 4) + offset); in spear_pwm_readl()
74 writel_relaxed(val, chip->mmio_base + (num << 4) + offset); in spear_pwm_writel()
186 pc->mmio_base = devm_ioremap_resource(&pdev->dev, r); in spear_pwm_probe()
187 if (IS_ERR(pc->mmio_base)) in spear_pwm_probe()
188 return PTR_ERR(pc->mmio_base); in spear_pwm_probe()
215 val = readl_relaxed(pc->mmio_base + PWMMCR); in spear_pwm_probe()
217 writel_relaxed(val, pc->mmio_base + PWMMCR); in spear_pwm_probe()
Dpwm-pxa.c51 void __iomem *mmio_base; member
99 writel(prescale, pc->mmio_base + offset + PWMCR); in pxa_pwm_config()
100 writel(dc, pc->mmio_base + offset + PWMDCR); in pxa_pwm_config()
101 writel(pv, pc->mmio_base + offset + PWMPCR); in pxa_pwm_config()
200 pwm->mmio_base = devm_ioremap_resource(&pdev->dev, r); in pwm_probe()
201 if (IS_ERR(pwm->mmio_base)) in pwm_probe()
202 return PTR_ERR(pwm->mmio_base); in pwm_probe()
Dpwm-tegra.c47 void __iomem *mmio_base; member
57 return readl(chip->mmio_base + (num << 4)); in pwm_readl()
63 writel(val, chip->mmio_base + (num << 4)); in pwm_writel()
182 pwm->mmio_base = devm_ioremap_resource(&pdev->dev, r); in tegra_pwm_probe()
183 if (IS_ERR(pwm->mmio_base)) in tegra_pwm_probe()
184 return PTR_ERR(pwm->mmio_base); in tegra_pwm_probe()
/linux-4.1.27/drivers/input/mouse/
Dpxa930_trkball.c47 void __iomem *mmio_base; member
61 tbcntr = __raw_readl(trkball->mmio_base + TBCNTR); in pxa930_trkball_interrupt()
63 if (tbcntr == __raw_readl(trkball->mmio_base + TBCNTR)) { in pxa930_trkball_interrupt()
72 __raw_writel(TBSBC_TBSBC, trkball->mmio_base + TBSBC); in pxa930_trkball_interrupt()
73 __raw_writel(0, trkball->mmio_base + TBSBC); in pxa930_trkball_interrupt()
83 __raw_writel(v, trkball->mmio_base + TBCR); in write_tbcr()
86 if (__raw_readl(trkball->mmio_base + TBCR) == v) in write_tbcr()
104 tbcr = __raw_readl(trkball->mmio_base + TBCR); in pxa930_trkball_config()
110 tbcr = __raw_readl(trkball->mmio_base + TBCR); in pxa930_trkball_config()
114 __raw_writel(TBSBC_TBSBC, trkball->mmio_base + TBSBC); in pxa930_trkball_config()
[all …]
/linux-4.1.27/drivers/net/wireless/b43/
Dpio.h71 u16 mmio_base; member
100 u16 mmio_base; member
110 return b43_read16(q->dev, q->mmio_base + offset); in b43_piotx_read16()
115 return b43_read32(q->dev, q->mmio_base + offset); in b43_piotx_read32()
121 b43_write16(q->dev, q->mmio_base + offset, value); in b43_piotx_write16()
127 b43_write32(q->dev, q->mmio_base + offset, value); in b43_piotx_write32()
133 return b43_read16(q->dev, q->mmio_base + offset); in b43_piorx_read16()
138 return b43_read32(q->dev, q->mmio_base + offset); in b43_piorx_read32()
144 b43_write16(q->dev, q->mmio_base + offset, value); in b43_piorx_write16()
150 b43_write32(q->dev, q->mmio_base + offset, value); in b43_piorx_write32()
Dpio.c148 q->mmio_base = index_to_pioqueue_base(dev, index) + in b43_setup_pioqueue_tx()
182 q->mmio_base = index_to_pioqueue_base(dev, index) + in b43_setup_pioqueue_rx()
343 q->mmio_base + B43_PIO_TXDATA, in tx_write_2byte_queue()
355 q->mmio_base + B43_PIO_TXDATA, in tx_write_2byte_queue()
397 q->mmio_base + B43_PIO8_TXDATA, in tx_write_4byte_queue()
425 q->mmio_base + B43_PIO8_TXDATA, in tx_write_4byte_queue()
671 q->mmio_base + B43_PIO8_RXDATA, in pio_rx_frame()
675 q->mmio_base + B43_PIO_RXDATA, in pio_rx_frame()
719 q->mmio_base + B43_PIO8_RXDATA, in pio_rx_frame()
727 q->mmio_base + B43_PIO8_RXDATA, in pio_rx_frame()
[all …]
Ddma.c452 static int b43_dmacontroller_rx_reset(struct b43_wldev *dev, u16 mmio_base, in b43_dmacontroller_rx_reset() argument
462 b43_write32(dev, mmio_base + offset, 0); in b43_dmacontroller_rx_reset()
466 value = b43_read32(dev, mmio_base + offset); in b43_dmacontroller_rx_reset()
491 static int b43_dmacontroller_tx_reset(struct b43_wldev *dev, u16 mmio_base, in b43_dmacontroller_tx_reset() argument
503 value = b43_read32(dev, mmio_base + offset); in b43_dmacontroller_tx_reset()
520 b43_write32(dev, mmio_base + offset, 0); in b43_dmacontroller_tx_reset()
524 value = b43_read32(dev, mmio_base + offset); in b43_dmacontroller_tx_reset()
769 b43_dmacontroller_tx_reset(ring->dev, ring->mmio_base, in dmacontroller_cleanup()
777 b43_dmacontroller_rx_reset(ring->dev, ring->mmio_base, in dmacontroller_cleanup()
816 u16 mmio_base; in supported_dma_mask() local
[all …]
Ddma.h250 u16 mmio_base; member
279 return b43_read32(ring->dev, ring->mmio_base + offset); in b43_dma_read()
284 b43_write32(ring->dev, ring->mmio_base + offset, value); in b43_dma_write()
/linux-4.1.27/drivers/ata/
Dsata_sil.c270 void __iomem *mmio_base = ap->host->iomap[SIL_MMIO_BAR]; in sil_bmdma_stop() local
271 void __iomem *bmdma2 = mmio_base + sil_port[ap->port_no].bmdma2; in sil_bmdma_stop()
296 void __iomem *mmio_base = ap->host->iomap[SIL_MMIO_BAR]; in sil_bmdma_start() local
297 void __iomem *bmdma2 = mmio_base + sil_port[ap->port_no].bmdma2; in sil_bmdma_start()
363 void __iomem *mmio_base = ap->host->iomap[SIL_MMIO_BAR]; in sil_set_mode() local
364 void __iomem *addr = mmio_base + sil_port[ap->port_no].xfer_mode; in sil_set_mode()
524 void __iomem *mmio_base = host->iomap[SIL_MMIO_BAR]; in sil_interrupt() local
532 u32 bmdma2 = readl(mmio_base + sil_port[ap->port_no].bmdma2); in sil_interrupt()
553 void __iomem *mmio_base = ap->host->iomap[SIL_MMIO_BAR]; in sil_freeze() local
557 writel(0, mmio_base + sil_port[ap->port_no].sien); in sil_freeze()
[all …]
Dpata_pdc2027x.c479 void __iomem *mmio_base = host->iomap[PDC_MMIO_BAR]; in pdc_read_counter() local
485 bccrl = ioread32(mmio_base + PDC_BYTE_COUNT) & 0x7fff; in pdc_read_counter()
486 bccrh = ioread32(mmio_base + PDC_BYTE_COUNT + 0x100) & 0x7fff; in pdc_read_counter()
489 bccrlv = ioread32(mmio_base + PDC_BYTE_COUNT) & 0x7fff; in pdc_read_counter()
490 bccrhv = ioread32(mmio_base + PDC_BYTE_COUNT + 0x100) & 0x7fff; in pdc_read_counter()
520 void __iomem *mmio_base = host->iomap[PDC_MMIO_BAR]; in pdc_adjust_pll() local
539 pll_ctl = ioread16(mmio_base + PDC_PLL_CTL); in pdc_adjust_pll()
579 iowrite16(pll_ctl, mmio_base + PDC_PLL_CTL); in pdc_adjust_pll()
580 ioread16(mmio_base + PDC_PLL_CTL); /* flush */ in pdc_adjust_pll()
590 pll_ctl = ioread16(mmio_base + PDC_PLL_CTL); in pdc_adjust_pll()
[all …]
Dsata_qstor.c208 u8 __iomem *mmio_base = qs_mmio_base(ap->host); in qs_freeze() local
210 writeb(0, mmio_base + QS_HCT_CTRL); /* disable host interrupts */ in qs_freeze()
216 u8 __iomem *mmio_base = qs_mmio_base(ap->host); in qs_thaw() local
219 writeb(1, mmio_base + QS_HCT_CTRL); /* enable host interrupts */ in qs_thaw()
375 u8 __iomem *mmio_base = qs_mmio_base(host); in qs_intr_pkt() local
378 u32 sff0 = readl(mmio_base + QS_HST_SFF); in qs_intr_pkt()
379 u32 sff1 = readl(mmio_base + QS_HST_SFF + 4); in qs_intr_pkt()
485 void __iomem *mmio_base = qs_mmio_base(ap->host); in qs_port_start() local
486 void __iomem *chan = mmio_base + (ap->port_no * 0x4000); in qs_port_start()
508 void __iomem *mmio_base = qs_mmio_base(host); in qs_host_stop() local
[all …]
Dpata_sil680.c343 void __iomem *mmio_base; in sil680_init_one() local
386 mmio_base = host->iomap[SIL680_MMIO_BAR]; in sil680_init_one()
387 host->ports[0]->ioaddr.bmdma_addr = mmio_base + 0x00; in sil680_init_one()
388 host->ports[0]->ioaddr.cmd_addr = mmio_base + 0x80; in sil680_init_one()
389 host->ports[0]->ioaddr.ctl_addr = mmio_base + 0x8a; in sil680_init_one()
390 host->ports[0]->ioaddr.altstatus_addr = mmio_base + 0x8a; in sil680_init_one()
392 host->ports[1]->ioaddr.bmdma_addr = mmio_base + 0x08; in sil680_init_one()
393 host->ports[1]->ioaddr.cmd_addr = mmio_base + 0xc0; in sil680_init_one()
394 host->ports[1]->ioaddr.ctl_addr = mmio_base + 0xca; in sil680_init_one()
395 host->ports[1]->ioaddr.altstatus_addr = mmio_base + 0xca; in sil680_init_one()
Dsata_inic162x.c235 void __iomem *mmio_base; member
262 return hpriv->mmio_base + ap->port_no * PORT_SIZE; in inic_port_base()
420 host_irq_stat = readw(hpriv->mmio_base + HOST_IRQ_STAT); in inic_interrupt()
748 static int init_controller(void __iomem *mmio_base, u16 hctl) in init_controller() argument
758 writew(hctl | HCTL_SOFTRST, mmio_base + HOST_CTL); in init_controller()
759 readw(mmio_base + HOST_CTL); /* flush */ in init_controller()
763 val = readw(mmio_base + HOST_CTL); in init_controller()
773 void __iomem *port_base = mmio_base + i * PORT_SIZE; in init_controller()
780 writew(hctl & ~HCTL_IRQOFF, mmio_base + HOST_CTL); in init_controller()
781 val = readw(mmio_base + HOST_IRQ_MASK); in init_controller()
[all …]
Dsata_svw.c430 void __iomem *mmio_base; in k2_sata_init_one() local
475 mmio_base = host->iomap[bar_pos]; in k2_sata_init_one()
484 k2_sata_setup_port(&ap->ioaddr, mmio_base + offset); in k2_sata_init_one()
501 writel(readl(mmio_base + K2_SATA_SICR1_OFFSET) & ~0x00040000, in k2_sata_init_one()
502 mmio_base + K2_SATA_SICR1_OFFSET); in k2_sata_init_one()
505 writel(0xffffffff, mmio_base + K2_SATA_SCR_ERROR_OFFSET); in k2_sata_init_one()
506 writel(0x0, mmio_base + K2_SATA_SIM_OFFSET); in k2_sata_init_one()
Dpdc_adma.c592 static int adma_set_dma_masks(struct pci_dev *pdev, void __iomem *mmio_base) in adma_set_dma_masks() argument
615 void __iomem *mmio_base; in adma_ata_init_one() local
637 mmio_base = host->iomap[ADMA_MMIO_BAR]; in adma_ata_init_one()
639 rc = adma_set_dma_masks(pdev, mmio_base); in adma_ata_init_one()
645 void __iomem *port_base = ADMA_ATA_REGS(mmio_base, port_no); in adma_ata_init_one()
646 unsigned int offset = port_base - mmio_base; in adma_ata_init_one()
Dsata_vsc.c348 void __iomem *mmio_base; in vsc_sata_init_one() local
375 mmio_base = host->iomap[VSC_MMIO_BAR]; in vsc_sata_init_one()
381 vsc_sata_setup_port(&ap->ioaddr, mmio_base + offset); in vsc_sata_init_one()
Dsata_nv.c1622 void __iomem *mmio_base = ap->host->iomap[NV_MMIO_BAR]; in nv_ck804_freeze() local
1626 mask = readb(mmio_base + NV_INT_ENABLE_CK804); in nv_ck804_freeze()
1628 writeb(mask, mmio_base + NV_INT_ENABLE_CK804); in nv_ck804_freeze()
1633 void __iomem *mmio_base = ap->host->iomap[NV_MMIO_BAR]; in nv_ck804_thaw() local
1637 writeb(NV_INT_ALL << shift, mmio_base + NV_INT_STATUS_CK804); in nv_ck804_thaw()
1639 mask = readb(mmio_base + NV_INT_ENABLE_CK804); in nv_ck804_thaw()
1641 writeb(mask, mmio_base + NV_INT_ENABLE_CK804); in nv_ck804_thaw()
1646 void __iomem *mmio_base = ap->host->iomap[NV_MMIO_BAR]; in nv_mcp55_freeze() local
1650 writel(NV_INT_ALL_MCP55 << shift, mmio_base + NV_INT_STATUS_MCP55); in nv_mcp55_freeze()
1652 mask = readl(mmio_base + NV_INT_ENABLE_MCP55); in nv_mcp55_freeze()
[all …]
Dsata_sx4.c796 void __iomem *mmio_base; in pdc20621_interrupt() local
805 mmio_base = host->iomap[PDC_MMIO_BAR]; in pdc20621_interrupt()
808 mmio_base += PDC_CHIP0_OFS; in pdc20621_interrupt()
809 mask = readl(mmio_base + PDC_20621_SEQMASK); in pdc20621_interrupt()
840 mmio_base); in pdc20621_interrupt()
Dsata_mv.c1293 static void mv_dump_all_regs(void __iomem *mmio_base, int port, in mv_dump_all_regs() argument
1297 void __iomem *hc_base = mv_hc_base(mmio_base, in mv_dump_all_regs()
1319 mv_dump_mem(mmio_base+0xc00, 0x3c); in mv_dump_all_regs()
1320 mv_dump_mem(mmio_base+0xd00, 0x34); in mv_dump_all_regs()
1321 mv_dump_mem(mmio_base+0xf00, 0x4); in mv_dump_all_regs()
1322 mv_dump_mem(mmio_base+0x1d00, 0x6c); in mv_dump_all_regs()
1324 hc_base = mv_hc_base(mmio_base, hc); in mv_dump_all_regs()
1329 port_base = mv_port_base(mmio_base, p); in mv_dump_all_regs()
/linux-4.1.27/drivers/watchdog/
Dep93xx_wdt.c50 static void __iomem *mmio_base; variable
63 writel(0x5555, mmio_base + EP93XX_WATCHDOG); in ep93xx_wdt_timer_ping()
73 writel(0xaaaa, mmio_base + EP93XX_WATCHDOG); in ep93xx_wdt_start()
82 writel(0xaa55, mmio_base + EP93XX_WATCHDOG); in ep93xx_wdt_stop()
121 mmio_base = devm_ioremap_resource(&pdev->dev, res); in ep93xx_wdt_probe()
122 if (IS_ERR(mmio_base)) in ep93xx_wdt_probe()
123 return PTR_ERR(mmio_base); in ep93xx_wdt_probe()
132 val = readl(mmio_base + EP93XX_WATCHDOG); in ep93xx_wdt_probe()
/linux-4.1.27/arch/tile/gxio/
Duart.c45 context->mmio_base = (void __force *) in gxio_uart_init()
48 if (context->mmio_base == NULL) { in gxio_uart_init()
61 iounmap((void __force __iomem *)(context->mmio_base)); in gxio_uart_destroy()
64 context->mmio_base = NULL; in gxio_uart_destroy()
76 __gxio_mmio_write(context->mmio_base + offset, word); in gxio_uart_write()
84 return __gxio_mmio_read(context->mmio_base + offset); in gxio_uart_read()
Dusb_host.c53 context->mmio_base = in gxio_usb_host_init()
56 if (context->mmio_base == NULL) { in gxio_usb_host_init()
68 iounmap((void __force __iomem *)(context->mmio_base)); in gxio_usb_host_destroy()
71 context->mmio_base = NULL; in gxio_usb_host_destroy()
81 return context->mmio_base; in gxio_usb_host_get_reg_start()
Dkiorpc.c33 pgprot_t mmio_base, prot = { 0 }; in iorpc_ioremap() local
38 err = __iorpc_get_mmio_base(hv_fd, &mmio_base); in iorpc_ioremap()
55 prot = hv_pte_set_lotar(prot, hv_pte_get_lotar(mmio_base)); in iorpc_ioremap()
56 pfn = pte_pfn(mmio_base) + PFN_DOWN(offset); in iorpc_ioremap()
/linux-4.1.27/drivers/usb/host/
Dohci-pxa27x.c123 void __iomem *mmio_base; member
142 uint32_t uhcrhda = __raw_readl(pxa_ohci->mmio_base + UHCRHDA); in pxa27x_ohci_select_pmm()
143 uint32_t uhcrhdb = __raw_readl(pxa_ohci->mmio_base + UHCRHDB); in pxa27x_ohci_select_pmm()
167 __raw_writel(uhcrhda, pxa_ohci->mmio_base + UHCRHDA); in pxa27x_ohci_select_pmm()
168 __raw_writel(uhcrhdb, pxa_ohci->mmio_base + UHCRHDB); in pxa27x_ohci_select_pmm()
223 uint32_t uhchr = __raw_readl(pxa_ohci->mmio_base + UHCHR); in pxa27x_setup_hc()
224 uint32_t uhcrhda = __raw_readl(pxa_ohci->mmio_base + UHCRHDA); in pxa27x_setup_hc()
256 __raw_writel(uhchr, pxa_ohci->mmio_base + UHCHR); in pxa27x_setup_hc()
257 __raw_writel(uhcrhda, pxa_ohci->mmio_base + UHCRHDA); in pxa27x_setup_hc()
262 uint32_t uhchr = __raw_readl(pxa_ohci->mmio_base + UHCHR); in pxa27x_reset_hc()
[all …]
/linux-4.1.27/drivers/gpu/drm/i915/
Dintel_ringbuffer.h32 #define I915_READ_TAIL(ring) I915_READ(RING_TAIL((ring)->mmio_base))
33 #define I915_WRITE_TAIL(ring, val) I915_WRITE(RING_TAIL((ring)->mmio_base), val)
35 #define I915_READ_START(ring) I915_READ(RING_START((ring)->mmio_base))
36 #define I915_WRITE_START(ring, val) I915_WRITE(RING_START((ring)->mmio_base), val)
38 #define I915_READ_HEAD(ring) I915_READ(RING_HEAD((ring)->mmio_base))
39 #define I915_WRITE_HEAD(ring, val) I915_WRITE(RING_HEAD((ring)->mmio_base), val)
41 #define I915_READ_CTL(ring) I915_READ(RING_CTL((ring)->mmio_base))
42 #define I915_WRITE_CTL(ring, val) I915_WRITE(RING_CTL((ring)->mmio_base), val)
44 #define I915_READ_IMR(ring) I915_READ(RING_IMR((ring)->mmio_base))
45 #define I915_WRITE_IMR(ring, val) I915_WRITE(RING_IMR((ring)->mmio_base), val)
[all …]
Dintel_lrc.h30 #define RING_ELSP(ring) ((ring)->mmio_base+0x230)
31 #define RING_EXECLIST_STATUS(ring) ((ring)->mmio_base+0x234)
32 #define RING_CONTEXT_CONTROL(ring) ((ring)->mmio_base+0x244)
35 #define RING_CONTEXT_STATUS_BUF(ring) ((ring)->mmio_base+0x370)
36 #define RING_CONTEXT_STATUS_PTR(ring) ((ring)->mmio_base+0x3a0)
Dintel_lrc.c1137 I915_WRITE(RING_HWSTAM(ring->mmio_base), 0xffffffff); in gen8_init_common_ring()
1140 I915_WRITE(RING_HWS_PGA(ring->mmio_base), in gen8_init_common_ring()
1142 POSTING_READ(RING_HWS_PGA(ring->mmio_base)); in gen8_init_common_ring()
1224 POSTING_READ(RING_IMR(ring->mmio_base)); in gen8_logical_ring_get_irq()
1240 POSTING_READ(RING_IMR(ring->mmio_base)); in gen8_logical_ring_put_irq()
1489 ring->mmio_base = RENDER_RING_BASE; in logical_render_ring_init()
1526 ring->mmio_base = GEN6_BSD_RING_BASE; in logical_bsd_ring_init()
1551 ring->mmio_base = GEN8_BSD2_RING_BASE; in logical_bsd2_ring_init()
1576 ring->mmio_base = BLT_RING_BASE; in logical_blt_ring_init()
1601 ring->mmio_base = VEBOX_RING_BASE; in logical_vebox_ring_init()
[all …]
Di915_gpu_error.c835 ering->semaphore_mboxes[0] = I915_READ(RING_SYNC_0(ring->mmio_base)); in gen6_record_semaphore_state()
836 ering->semaphore_mboxes[1] = I915_READ(RING_SYNC_1(ring->mmio_base)); in gen6_record_semaphore_state()
842 I915_READ(RING_SYNC_2(ring->mmio_base)); in gen6_record_semaphore_state()
855 ering->rc_psmi = I915_READ(ring->mmio_base + 0x50); in i915_record_ring_state()
864 ering->faddr = I915_READ(RING_DMA_FADD(ring->mmio_base)); in i915_record_ring_state()
865 ering->ipeir = I915_READ(RING_IPEIR(ring->mmio_base)); in i915_record_ring_state()
866 ering->ipehr = I915_READ(RING_IPEHR(ring->mmio_base)); in i915_record_ring_state()
867 ering->instdone = I915_READ(RING_INSTDONE(ring->mmio_base)); in i915_record_ring_state()
868 ering->instps = I915_READ(RING_INSTPS(ring->mmio_base)); in i915_record_ring_state()
869 ering->bbaddr = I915_READ(RING_BBADDR(ring->mmio_base)); in i915_record_ring_state()
[all …]
Dintel_ringbuffer.c453 acthd = I915_READ64_2x32(RING_ACTHD(ring->mmio_base), in intel_ring_get_active_head()
454 RING_ACTHD_UDW(ring->mmio_base)); in intel_ring_get_active_head()
456 acthd = I915_READ(RING_ACTHD(ring->mmio_base)); in intel_ring_get_active_head()
504 mmio = RING_HWS_PGA_GEN6(ring->mmio_base); in intel_ring_setup_status_page()
507 mmio = RING_HWS_PGA(ring->mmio_base); in intel_ring_setup_status_page()
521 u32 reg = RING_INSTPM(ring->mmio_base); in intel_ring_setup_status_page()
1415 POSTING_READ(RING_ACTHD(ring->mmio_base)); in gen6_ring_get_seqno()
1683 POSTING_READ(RING_IMR(ring->mmio_base)); in gen8_ring_get_irq()
1705 POSTING_READ(RING_IMR(ring->mmio_base)); in gen8_ring_put_irq()
2290 I915_WRITE(RING_SYNC_0(ring->mmio_base), 0); in intel_ring_init_seqno()
[all …]
Di915_gem_context.c539 intel_ring_emit(ring, RING_PSMI_CTL(signaller->mmio_base)); in mi_set_context()
564 intel_ring_emit(ring, RING_PSMI_CTL(signaller->mmio_base)); in mi_set_context()
Di915_reg.h134 #define RING_PP_DIR_BASE(ring) ((ring)->mmio_base+0x228)
135 #define RING_PP_DIR_BASE_READ(ring) ((ring)->mmio_base+0x518)
136 #define RING_PP_DIR_DCLV(ring) ((ring)->mmio_base+0x220)
139 #define GEN8_RING_PDP_UDW(ring, n) ((ring)->mmio_base+0x270 + ((n) * 8 + 4))
140 #define GEN8_RING_PDP_LDW(ring, n) ((ring)->mmio_base+0x270 + (n) * 8)
1373 #define RING_MODE_GEN7(ring) ((ring)->mmio_base+0x29c)
Dintel_pm.c4311 I915_WRITE(RING_MAX_IDLE(ring->mmio_base), 10); in gen9_enable_rc6()
4360 I915_WRITE(RING_MAX_IDLE(ring->mmio_base), 10); in gen8_enable_rps()
4457 I915_WRITE(RING_MAX_IDLE(ring->mmio_base), 10); in gen6_enable_rps()
4996 I915_WRITE(RING_MAX_IDLE(ring->mmio_base), 10); in cherryview_enable_rps()
5101 I915_WRITE(RING_MAX_IDLE(ring->mmio_base), 10); in valleyview_enable_rps()
Di915_debugfs.c2165 u64 pdp = I915_READ(ring->mmio_base + offset + 4); in gen8_ppgtt_info()
2167 pdp |= I915_READ(ring->mmio_base + offset); in gen8_ppgtt_info()
Di915_irq.c2713 ipehr = I915_READ(RING_IPEHR(ring->mmio_base)); in semaphore_waits_for()
/linux-4.1.27/drivers/mtd/nand/
Dcs553x_nand.c144 void __iomem *mmio_base = this->IO_ADDR_R; in cs553x_hwcontrol() local
147 writeb(ctl, mmio_base + MM_NAND_CTL); in cs553x_hwcontrol()
156 void __iomem *mmio_base = this->IO_ADDR_R; in cs553x_device_ready() local
157 unsigned char foo = readb(mmio_base + MM_NAND_STS); in cs553x_device_ready()
165 void __iomem *mmio_base = this->IO_ADDR_R; in cs_enable_hwecc() local
167 writeb(0x07, mmio_base + MM_NAND_ECC_CTL); in cs_enable_hwecc()
174 void __iomem *mmio_base = this->IO_ADDR_R; in cs_calculate_ecc() local
176 ecc = readl(mmio_base + MM_NAND_STS); in cs_calculate_ecc()
329 void __iomem *mmio_base; in cs553x_cleanup() local
335 mmio_base = this->IO_ADDR_R; in cs553x_cleanup()
[all …]
Dpxa3xx_nand.c130 writel_relaxed((val), (info)->mmio_base + (off))
133 readl_relaxed((info)->mmio_base + (off))
184 void __iomem *mmio_base; member
497 __raw_readsl(info->mmio_base + NDDB, data, 8); in drain_fifo()
516 __raw_readsl(info->mmio_base + NDDB, data, len); in drain_fifo()
525 __raw_writesl(info->mmio_base + NDDB, in handle_data_pio()
530 __raw_writesl(info->mmio_base + NDDB, in handle_data_pio()
1710 info->mmio_base = devm_ioremap_resource(&pdev->dev, r); in alloc_nand_resource()
1711 if (IS_ERR(info->mmio_base)) { in alloc_nand_resource()
1712 ret = PTR_ERR(info->mmio_base); in alloc_nand_resource()
/linux-4.1.27/drivers/rtc/
Drtc-ep93xx.c38 void __iomem *mmio_base; member
48 comp = __raw_readl(ep93xx_rtc->mmio_base + EP93XX_RTC_SWCOMP); in ep93xx_rtc_get_swcomp()
66 time = __raw_readl(ep93xx_rtc->mmio_base + EP93XX_RTC_DATA); in ep93xx_rtc_read_time()
76 __raw_writel(secs + 1, ep93xx_rtc->mmio_base + EP93XX_RTC_LOAD); in ep93xx_rtc_set_mmss()
141 ep93xx_rtc->mmio_base = devm_ioremap_resource(&pdev->dev, res); in ep93xx_rtc_probe()
142 if (IS_ERR(ep93xx_rtc->mmio_base)) in ep93xx_rtc_probe()
143 return PTR_ERR(ep93xx_rtc->mmio_base); in ep93xx_rtc_probe()
/linux-4.1.27/drivers/acpi/
Dacpi_lpss.c79 void __iomem *mmio_base; member
97 val = readl(pdata->mmio_base + offset); in lpss_uart_setup()
98 writel(val | LPSS_TX_INT_MASK, pdata->mmio_base + offset); in lpss_uart_setup()
100 val = readl(pdata->mmio_base + LPSS_UART_CPR); in lpss_uart_setup()
103 val = readl(pdata->mmio_base + offset); in lpss_uart_setup()
105 writel(val, pdata->mmio_base + offset); in lpss_uart_setup()
115 val = readl(pdata->mmio_base + offset); in lpss_deassert_reset()
117 writel(val, pdata->mmio_base + offset); in lpss_deassert_reset()
126 if (readl(pdata->mmio_base + pdata->dev_desc->prv_offset)) in byt_i2c_setup()
129 writel(0, pdata->mmio_base + LPSS_I2C_ENABLE); in byt_i2c_setup()
[all …]
/linux-4.1.27/drivers/video/fbdev/mb862xx/
Dmb862xxfbdrv.c635 par->host = par->mmio_base; in mb862xx_gdc_init()
636 par->i2c = par->mmio_base + MB862XX_I2C_BASE; in mb862xx_gdc_init()
637 par->disp = par->mmio_base + MB862XX_DISP_BASE; in mb862xx_gdc_init()
638 par->cap = par->mmio_base + MB862XX_CAP_BASE; in mb862xx_gdc_init()
639 par->draw = par->mmio_base + MB862XX_DRAW_BASE; in mb862xx_gdc_init()
640 par->geo = par->mmio_base + MB862XX_GEO_BASE; in mb862xx_gdc_init()
641 par->pio = par->mmio_base + MB862XX_PIO_BASE; in mb862xx_gdc_init()
729 par->mmio_base = ioremap(par->mmio_base_phys, par->mmio_len); in of_platform_mb862xx_probe()
730 if (par->mmio_base == NULL) { in of_platform_mb862xx_probe()
776 iounmap(par->mmio_base); in of_platform_mb862xx_probe()
[all …]
Dmb862xxfb.h58 void __iomem *mmio_base; /* remapped registers */ member
/linux-4.1.27/arch/arm/mach-pxa/
Dpxa3xx-ulpi.c34 void __iomem *mmio_base; member
44 return __raw_readl(u2d->mmio_base + reg); in u2d_readl()
49 __raw_writel(val, u2d->mmio_base + reg); in u2d_writel()
228 u2d->otg->io_priv = u2d->mmio_base; in pxa310_otg_init()
316 u2d->mmio_base = ioremap(r->start, resource_size(r)); in pxa3xx_u2d_probe()
317 if (!u2d->mmio_base) { in pxa3xx_u2d_probe()
344 iounmap(u2d->mmio_base); in pxa3xx_u2d_probe()
368 iounmap(u2d->mmio_base); in pxa3xx_u2d_remove()
/linux-4.1.27/drivers/gpio/
Dgpio-ep93xx.c30 void __iomem *mmio_base; member
322 void __iomem *mmio_base, struct ep93xx_gpio_bank *bank) in ep93xx_gpio_add_bank() argument
324 void __iomem *data = mmio_base + bank->data; in ep93xx_gpio_add_bank()
325 void __iomem *dir = mmio_base + bank->dir; in ep93xx_gpio_add_bank()
355 ep93xx_gpio->mmio_base = devm_ioremap_resource(dev, res); in ep93xx_gpio_probe()
356 if (IS_ERR(ep93xx_gpio->mmio_base)) in ep93xx_gpio_probe()
357 return PTR_ERR(ep93xx_gpio->mmio_base); in ep93xx_gpio_probe()
364 ep93xx_gpio->mmio_base, bank)) in ep93xx_gpio_probe()
/linux-4.1.27/drivers/net/ethernet/broadcom/
Dbgmac.c54 if (!ring->mmio_base) in bgmac_dma_tx_reset()
61 bgmac_write(bgmac, ring->mmio_base + BGMAC_DMA_TX_CTL, in bgmac_dma_tx_reset()
64 val = bgmac_read(bgmac, ring->mmio_base + BGMAC_DMA_TX_STATUS); in bgmac_dma_tx_reset()
76 ring->mmio_base, val); in bgmac_dma_tx_reset()
79 bgmac_write(bgmac, ring->mmio_base + BGMAC_DMA_TX_CTL, 0); in bgmac_dma_tx_reset()
81 ring->mmio_base + BGMAC_DMA_TX_STATUS, in bgmac_dma_tx_reset()
85 ring->mmio_base); in bgmac_dma_tx_reset()
87 val = bgmac_read(bgmac, ring->mmio_base + BGMAC_DMA_TX_STATUS); in bgmac_dma_tx_reset()
90 ring->mmio_base); in bgmac_dma_tx_reset()
99 ctl = bgmac_read(bgmac, ring->mmio_base + BGMAC_DMA_TX_CTL); in bgmac_dma_tx_enable()
[all …]
Dbgmac.h425 u16 mmio_base; member
/linux-4.1.27/drivers/video/fbdev/
Dasiliantfb.c48 #define mmio_base (p->screen_base + 0x400000) macro
51 writeb((num), mmio_base + (ap)); writeb((val), mmio_base + (dp)); \
86 readb(mmio_base + 0x7b4); in mm_write_ar()
219 writeb(0xc7, mmio_base + 0x784); /* set misc output reg */ in asiliant_set_timing()
221 writeb(0x07, mmio_base + 0x784); /* set misc output reg */ in asiliant_set_timing()
316 writeb(regno, mmio_base + 0x790); in asiliantfb_setcolreg()
318 writeb(red, mmio_base + 0x791); in asiliantfb_setcolreg()
319 writeb(green, mmio_base + 0x791); in asiliantfb_setcolreg()
320 writeb(blue, mmio_base + 0x791); in asiliantfb_setcolreg()
470 writeb(0x20, mmio_base + 0x780); in chips_hw_init()
[all …]
Dpvr2fb.c80 #define DISP_BASE par->mmio_base
142 unsigned long mmio_base; /* MMIO base */ member
265 fb_writel(type, par->mmio_base + 0x108); in pvr2fb_set_pal_type()
272 fb_writel(val, par->mmio_base + 0x1000 + (4 * regno)); in pvr2fb_set_pal_entry()
777 par->mmio_base = (unsigned long)ioremap_nocache(pvr2_fix.mmio_start, in pvr2fb_common_init()
779 if (!par->mmio_base) { in pvr2fb_common_init()
816 rev = fb_readl(par->mmio_base + 0x04); in pvr2fb_common_init()
844 if (par->mmio_base) in pvr2fb_common_init()
845 iounmap((void *)par->mmio_base); in pvr2fb_common_init()
911 if (currentpar->mmio_base) { in pvr2fb_dc_exit()
[all …]
Dpxa3xx-gcu.c98 void __iomem *mmio_base; member
118 return __raw_readl(priv->mmio_base + off); in gc_readl()
124 __raw_writel(val, priv->mmio_base + off); in gc_writel()
615 priv->mmio_base = devm_ioremap_resource(dev, r); in pxa3xx_gcu_probe()
616 if (IS_ERR(priv->mmio_base)) in pxa3xx_gcu_probe()
617 return PTR_ERR(priv->mmio_base); in pxa3xx_gcu_probe()
Dep93xx-fb.c117 void __iomem *mmio_base; member
129 return __raw_readl(fbi->mmio_base + off); in ep93xxfb_readl()
135 __raw_writel(val, fbi->mmio_base + off); in ep93xxfb_writel()
533 fbi->mmio_base = devm_ioremap(&pdev->dev, res->start, in ep93xxfb_probe()
535 if (!fbi->mmio_base) { in ep93xxfb_probe()
Dvt8623fb.c34 char __iomem *mmio_base; member
720 par->mmio_base = pci_iomap(dev, 1, 0); in vt8623_pci_probe()
721 if (! par->mmio_base) { in vt8623_pci_probe()
798 pci_iounmap(dev, par->mmio_base); in vt8623_pci_probe()
830 pci_iounmap(dev, par->mmio_base); in vt8623_pci_remove()
Dpxafb.h114 void __iomem *mmio_base; member
Dpxafb.c94 return __raw_readl(fbi->mmio_base + off); in lcd_readl()
100 __raw_writel(val, fbi->mmio_base + off); in lcd_writel()
2157 fbi->mmio_base = ioremap(r->start, resource_size(r)); in pxafb_probe()
2158 if (fbi->mmio_base == NULL) { in pxafb_probe()
2254 iounmap(fbi->mmio_base); in pxafb_probe()
2292 iounmap(fbi->mmio_base); in pxafb_remove()
/linux-4.1.27/sound/soc/pxa/
Dpxa-ssp.c70 sscr0 = __raw_readl(ssp->mmio_base + SSCR0) | SSCR0_SSE; in pxa_ssp_enable()
71 __raw_writel(sscr0, ssp->mmio_base + SSCR0); in pxa_ssp_enable()
78 sscr0 = __raw_readl(ssp->mmio_base + SSCR0) & ~SSCR0_SSE; in pxa_ssp_disable()
79 __raw_writel(sscr0, ssp->mmio_base + SSCR0); in pxa_ssp_disable()
141 priv->cr0 = __raw_readl(ssp->mmio_base + SSCR0); in pxa_ssp_suspend()
142 priv->cr1 = __raw_readl(ssp->mmio_base + SSCR1); in pxa_ssp_suspend()
143 priv->to = __raw_readl(ssp->mmio_base + SSTO); in pxa_ssp_suspend()
144 priv->psp = __raw_readl(ssp->mmio_base + SSPSP); in pxa_ssp_suspend()
159 __raw_writel(sssr, ssp->mmio_base + SSSR); in pxa_ssp_resume()
160 __raw_writel(priv->cr0 & ~SSCR0_SSE, ssp->mmio_base + SSCR0); in pxa_ssp_resume()
[all …]
Dmmp-sspa.c55 __raw_writel(val, sspa->mmio_base + reg); in mmp_sspa_write_reg()
60 return __raw_readl(sspa->mmio_base + reg); in mmp_sspa_read_reg()
437 priv->sspa->mmio_base = devm_ioremap_resource(&pdev->dev, res); in asoc_mmp_sspa_probe()
438 if (IS_ERR(priv->sspa->mmio_base)) in asoc_mmp_sspa_probe()
439 return PTR_ERR(priv->sspa->mmio_base); in asoc_mmp_sspa_probe()
/linux-4.1.27/drivers/iommu/
Damd_iommu_init.c304 memcpy_toio(iommu->mmio_base + MMIO_EXCL_BASE_OFFSET, in iommu_set_exclusion_range()
308 memcpy_toio(iommu->mmio_base + MMIO_EXCL_LIMIT_OFFSET, in iommu_set_exclusion_range()
317 BUG_ON(iommu->mmio_base == NULL); in iommu_set_device_table()
321 memcpy_toio(iommu->mmio_base + MMIO_DEV_TABLE_OFFSET, in iommu_set_device_table()
330 ctrl = readl(iommu->mmio_base + MMIO_CONTROL_OFFSET); in iommu_feature_enable()
332 writel(ctrl, iommu->mmio_base + MMIO_CONTROL_OFFSET); in iommu_feature_enable()
339 ctrl = readl(iommu->mmio_base + MMIO_CONTROL_OFFSET); in iommu_feature_disable()
341 writel(ctrl, iommu->mmio_base + MMIO_CONTROL_OFFSET); in iommu_feature_disable()
348 ctrl = readl(iommu->mmio_base + MMIO_CONTROL_OFFSET); in iommu_set_inv_tlb_timeout()
351 writel(ctrl, iommu->mmio_base + MMIO_CONTROL_OFFSET); in iommu_set_inv_tlb_timeout()
[all …]
Damd_iommu.c666 head = readl(iommu->mmio_base + MMIO_EVT_HEAD_OFFSET); in iommu_poll_events()
667 tail = readl(iommu->mmio_base + MMIO_EVT_TAIL_OFFSET); in iommu_poll_events()
674 writel(head, iommu->mmio_base + MMIO_EVT_HEAD_OFFSET); in iommu_poll_events()
704 head = readl(iommu->mmio_base + MMIO_PPR_HEAD_OFFSET); in iommu_poll_ppr_log()
705 tail = readl(iommu->mmio_base + MMIO_PPR_TAIL_OFFSET); in iommu_poll_ppr_log()
737 writel(head, iommu->mmio_base + MMIO_PPR_HEAD_OFFSET); in iommu_poll_ppr_log()
743 head = readl(iommu->mmio_base + MMIO_PPR_HEAD_OFFSET); in iommu_poll_ppr_log()
744 tail = readl(iommu->mmio_base + MMIO_PPR_TAIL_OFFSET); in iommu_poll_ppr_log()
751 u32 status = readl(iommu->mmio_base + MMIO_STATUS_OFFSET); in amd_iommu_int_thread()
756 iommu->mmio_base + MMIO_STATUS_OFFSET); in amd_iommu_int_thread()
[all …]
Damd_iommu_types.h500 u8 __iomem *mmio_base; member
/linux-4.1.27/drivers/net/wireless/b43legacy/
Dpio.h52 u16 mmio_base; member
86 return b43legacy_read16(queue->dev, queue->mmio_base + offset); in b43legacy_pio_read()
93 b43legacy_write16(queue->dev, queue->mmio_base + offset, value); in b43legacy_pio_write()
Ddma.h144 u16 mmio_base; member
170 return b43legacy_read32(ring->dev, ring->mmio_base + offset); in b43legacy_dma_read()
177 b43legacy_write32(ring->dev, ring->mmio_base + offset, value); in b43legacy_dma_write()
Ddma.c351 u16 mmio_base, in b43legacy_dmacontroller_rx_reset() argument
361 b43legacy_write32(dev, mmio_base + offset, 0); in b43legacy_dmacontroller_rx_reset()
364 value = b43legacy_read32(dev, mmio_base + offset); in b43legacy_dmacontroller_rx_reset()
382 u16 mmio_base, in b43legacy_dmacontroller_tx_reset() argument
393 value = b43legacy_read32(dev, mmio_base + offset); in b43legacy_dmacontroller_tx_reset()
402 b43legacy_write32(dev, mmio_base + offset, 0); in b43legacy_dmacontroller_tx_reset()
405 value = b43legacy_read32(dev, mmio_base + offset); in b43legacy_dmacontroller_tx_reset()
585 b43legacy_dmacontroller_tx_reset(ring->dev, ring->mmio_base, in dmacontroller_cleanup()
589 b43legacy_dmacontroller_rx_reset(ring->dev, ring->mmio_base, in dmacontroller_cleanup()
622 u16 mmio_base; in supported_dma_mask() local
[all …]
Dpio.c126 switch (queue->mmio_base) { in generate_cookie()
341 queue->mmio_base = pio_mmio_base; in b43legacy_setup_pioqueue()
354 qsize = b43legacy_read16(dev, queue->mmio_base in b43legacy_setup_pioqueue()
559 B43legacy_WARN_ON(queue->mmio_base != B43legacy_MMIO_PIO1_BASE); in pio_rx_error()
599 if (unlikely(len == 0 && queue->mmio_base != in b43legacy_pio_rx()
605 if (queue->mmio_base == B43legacy_MMIO_PIO4_BASE) in b43legacy_pio_rx()
617 (queue->mmio_base == B43legacy_MMIO_PIO1_BASE), in b43legacy_pio_rx()
621 if (queue->mmio_base == B43legacy_MMIO_PIO4_BASE) { in b43legacy_pio_rx()
/linux-4.1.27/drivers/thermal/st/
Dst_thermal_memmap.c135 sensor->mmio_base = devm_ioremap_resource(dev, res); in st_mmap_regmap_init()
136 if (IS_ERR(sensor->mmio_base)) { in st_mmap_regmap_init()
138 return PTR_ERR(sensor->mmio_base); in st_mmap_regmap_init()
141 sensor->regmap = devm_regmap_init_mmio(dev, sensor->mmio_base, in st_mmap_regmap_init()
Dst_thermal.h96 void __iomem *mmio_base; member
/linux-4.1.27/drivers/scsi/ufs/
Dufshcd-pci.c120 void __iomem *mmio_base; in ufshcd_pci_probe() local
137 mmio_base = pcim_iomap_table(pdev)[0]; in ufshcd_pci_probe()
147 err = ufshcd_init(hba, mmio_base, pdev->irq); in ufshcd_pci_probe()
Dufshcd-pltfrm.c299 void __iomem *mmio_base; in ufshcd_pltfrm_probe() local
305 mmio_base = devm_ioremap_resource(dev, mem_res); in ufshcd_pltfrm_probe()
306 if (IS_ERR(*(void **)&mmio_base)) { in ufshcd_pltfrm_probe()
307 err = PTR_ERR(*(void **)&mmio_base); in ufshcd_pltfrm_probe()
342 err = ufshcd_init(hba, mmio_base, irq); in ufshcd_pltfrm_probe()
Dufshcd.h377 void __iomem *mmio_base; member
506 writel((val), (hba)->mmio_base + (reg))
508 readl((hba)->mmio_base + (reg))
Dufshcd.c5438 int ufshcd_init(struct ufs_hba *hba, void __iomem *mmio_base, unsigned int irq) in ufshcd_init() argument
5444 if (!mmio_base) { in ufshcd_init()
5451 hba->mmio_base = mmio_base; in ufshcd_init()
/linux-4.1.27/arch/powerpc/kernel/
Dudbg_16550.c163 unsigned char __iomem *mmio_base; member
192 return in_8(udbg_uart.mmio_base + (reg * udbg_uart_stride)); in udbg_uart_in_mmio()
197 out_8(udbg_uart.mmio_base + (reg * udbg_uart_stride), data); in udbg_uart_out_mmio()
205 udbg_uart.mmio_base = addr; in udbg_uart_init_mmio()
/linux-4.1.27/drivers/video/fbdev/aty/
Dradeonfb.h298 void __iomem *mmio_base; member
388 #define INREG8(addr) readb((rinfo->mmio_base)+addr)
389 #define OUTREG8(addr,val) writeb(val, (rinfo->mmio_base)+addr)
390 #define INREG16(addr) readw((rinfo->mmio_base)+addr)
391 #define OUTREG16(addr,val) writew(val, (rinfo->mmio_base)+addr)
392 #define INREG(addr) readl((rinfo->mmio_base)+addr)
393 #define OUTREG(addr,val) writel(val, (rinfo->mmio_base)+addr)
Dradeon_base.c2211 rinfo->mmio_base = ioremap(rinfo->mmio_base_phys, RADEON_REGSIZE); in radeonfb_pci_register()
2212 if (!rinfo->mmio_base) { in radeonfb_pci_register()
2391 iounmap(rinfo->mmio_base); in radeonfb_pci_register()
2441 iounmap(rinfo->mmio_base); in radeonfb_pci_unregister()
/linux-4.1.27/drivers/video/fbdev/intelfb/
Dintelfbhw.h523 #define INREG8(addr) readb((u8 __iomem *)(dinfo->mmio_base + (addr)))
524 #define INREG16(addr) readw((u16 __iomem *)(dinfo->mmio_base + (addr)))
525 #define INREG(addr) readl((u32 __iomem *)(dinfo->mmio_base + (addr)))
526 #define OUTREG8(addr, val) writeb((val),(u8 __iomem *)(dinfo->mmio_base + \
528 #define OUTREG16(addr, val) writew((val),(u16 __iomem *)(dinfo->mmio_base + \
530 #define OUTREG(addr, val) writel((val),(u32 __iomem *)(dinfo->mmio_base + \
Dintelfbdrv.c479 if (dinfo->mmio_base) in cleanup()
480 iounmap((void __iomem *)dinfo->mmio_base); in cleanup()
688 dinfo->mmio_base = in intelfb_pci_register()
691 if (!dinfo->mmio_base) { in intelfb_pci_register()
782 dinfo->mmio_base); in intelfb_pci_register()
Dintelfb.h300 u8 __iomem *mmio_base; member
/linux-4.1.27/include/linux/
Dpxa2xx_ssp.h206 void __iomem *mmio_base; member
229 __raw_writel(val, dev->mmio_base + reg); in pxa_ssp_write_reg()
240 return __raw_readl(dev->mmio_base + reg); in pxa_ssp_read_reg()
/linux-4.1.27/drivers/scsi/
Dstex.c295 void __iomem *mmio_base; /* iomapped PCI memory space */ member
510 writel(hba->req_head, hba->mmio_base + IMR0); in stex_send_cmd()
511 writel(MU_INBOUND_DOORBELL_REQHEADCHANGED, hba->mmio_base + IDBL); in stex_send_cmd()
512 readl(hba->mmio_base + IDBL); /* flush */ in stex_send_cmd()
540 writel((addr >> 16) >> 16, hba->mmio_base + YH2I_REQ_HI); in stex_ss_send_cmd()
541 readl(hba->mmio_base + YH2I_REQ_HI); /* flush */ in stex_ss_send_cmd()
542 writel(addr, hba->mmio_base + YH2I_REQ); in stex_ss_send_cmd()
543 readl(hba->mmio_base + YH2I_REQ); /* flush */ in stex_ss_send_cmd()
753 void __iomem *base = hba->mmio_base; in stex_mu_intr()
841 void __iomem *base = hba->mmio_base; in stex_intr()
[all …]
Dmegaraid.c80 #define RDINDOOR(adapter) readl((adapter)->mmio_base + 0x20)
81 #define RDOUTDOOR(adapter) readl((adapter)->mmio_base + 0x2C)
82 #define WRINDOOR(adapter,value) writel(value, (adapter)->mmio_base + 0x20)
83 #define WROUTDOOR(adapter,value) writel(value, (adapter)->mmio_base + 0x2C)
4294 adapter->mmio_base = (void __iomem *) mega_baseport; in megaraid_probe_one()
Dmegaraid.h770 void __iomem *mmio_base; member
/linux-4.1.27/arch/ia64/pci/
Dpci.c146 u64 mmio_base; in new_space() local
152 mmio_base = (u64) ioremap(phys_base, 0); in new_space()
154 if (io_space[i].mmio_base == mmio_base && in new_space()
165 io_space[i].mmio_base = mmio_base; in new_space()
200 base = __pa(io_space[space_nr].mmio_base); in add_io_space()
/linux-4.1.27/drivers/media/platform/omap3isp/
Disp.h190 void __iomem *mmio_base[OMAP3_ISP_IOMEM_LAST]; member
291 return __raw_readl(isp->mmio_base[isp_mmio_range] + reg_offset); in isp_reg_readl()
305 __raw_writel(reg_value, isp->mmio_base[isp_mmio_range] + reg_offset); in isp_reg_writel()
Disp.c2471 isp->mmio_base[map_idx] = in isp_probe()
2473 if (IS_ERR(isp->mmio_base[map_idx])) in isp_probe()
2474 return PTR_ERR(isp->mmio_base[map_idx]); in isp_probe()
2522 isp->mmio_base[i] = in isp_probe()
2523 isp->mmio_base[0] + isp_res_maps[m].offset[i]; in isp_probe()
2526 isp->mmio_base[i] = in isp_probe()
2527 isp->mmio_base[OMAP3_ISP_IOMEM_CSI2A_REGS1] in isp_probe()
/linux-4.1.27/arch/arm/plat-pxa/
Dssp.c194 ssp->mmio_base = devm_ioremap(dev, res->start, resource_size(res)); in pxa_ssp_probe()
195 if (ssp->mmio_base == NULL) { in pxa_ssp_probe()
242 iounmap(ssp->mmio_base); in pxa_ssp_remove()
/linux-4.1.27/arch/tile/include/gxio/
Dusb_host.h40 char *mmio_base; member
Duart.h40 char *mmio_base; member
/linux-4.1.27/drivers/pci/hotplug/
Dshpchp_hpc.c614 release_mem_region(ctrl->mmio_base, ctrl->mmio_size); in hpc_release_ctlr()
950 ctrl->mmio_base = pci_resource_start(pdev, 0); in shpc_init()
984 ctrl->mmio_base = in shpc_init()
999 if (!request_mem_region(ctrl->mmio_base, ctrl->mmio_size, MY_NAME)) { in shpc_init()
1005 ctrl->creg = ioremap(ctrl->mmio_base, ctrl->mmio_size); in shpc_init()
1008 ctrl->mmio_size, ctrl->mmio_base); in shpc_init()
1009 release_mem_region(ctrl->mmio_base, ctrl->mmio_size); in shpc_init()
Dshpchp.h115 unsigned long mmio_base; member
/linux-4.1.27/drivers/staging/sm7xxfb/
Dsm7xxfb.c771 unsigned long mmio_base; in smtcfb_pci_probe() local
817 mmio_base = pci_resource_start(pdev, 0); in smtcfb_pci_probe()
823 sfb->fb.fix.mmio_start = mmio_base + 0x00400000; in smtcfb_pci_probe()
827 sfb->lfb = ioremap(mmio_base, 0x00c00000); in smtcfb_pci_probe()
829 sfb->lfb = ioremap(mmio_base, 0x00800000); in smtcfb_pci_probe()
862 sfb->fb.fix.mmio_start = mmio_base; in smtcfb_pci_probe()
865 sfb->dp_regs = ioremap(mmio_base, 0x00a00000); in smtcfb_pci_probe()
/linux-4.1.27/drivers/spi/
Dspi-pxa2xx-pci.c155 ssp->mmio_base = pcim_iomap_table(dev)[0]; in pxa2xx_spi_pci_probe()
156 if (!ssp->mmio_base) { in pxa2xx_spi_pci_probe()
Dspi-pxa2xx.c1273 ssp->mmio_base = devm_ioremap_resource(&pdev->dev, res); in pxa2xx_spi_acpi_get_pdata()
1274 if (IS_ERR(ssp->mmio_base)) in pxa2xx_spi_acpi_get_pdata()
1333 if (!ssp->mmio_base) { in pxa2xx_spi_probe()
1368 drv_data->ioaddr = ssp->mmio_base; in pxa2xx_spi_probe()
/linux-4.1.27/drivers/staging/xgifb/
DXGIfb.h66 phys_addr_t mmio_base; member
DXGI_main_26.c1210 fix->mmio_start = xgifb_info->mmio_base; in XGIfb_get_fix()
1682 xgifb_info->mmio_base = pci_resource_start(pdev, 1); in xgifb_probe()
1763 if (!request_mem_region(xgifb_info->mmio_base, in xgifb_probe()
1774 xgifb_info->mmio_vbase = ioremap(xgifb_info->mmio_base, in xgifb_probe()
1785 (u64) xgifb_info->mmio_base, xgifb_info->mmio_vbase, in xgifb_probe()
2042 release_mem_region(xgifb_info->mmio_base, xgifb_info->mmio_size); in xgifb_probe()
2069 release_mem_region(xgifb_info->mmio_base, xgifb_info->mmio_size); in xgifb_remove()
/linux-4.1.27/drivers/gpu/drm/msm/mdp/mdp5/
Dmdp5_ctl.h26 void __iomem *mmio_base, const struct mdp5_cfg_hw *hw_cfg);
Dmdp5_ctl.c511 void __iomem *mmio_base, const struct mdp5_cfg_hw *hw_cfg) in mdp5_ctlm_init() argument
/linux-4.1.27/drivers/gpu/drm/nouveau/nvkm/engine/device/
Dbase.c293 u64 disable, mmio_base, mmio_size; local
328 mmio_base = nv_device_resource_start(device, 0);
341 map = ioremap(mmio_base, 0x102000);
449 nv_subdev(device)->mmio = ioremap(mmio_base, mmio_size);
/linux-4.1.27/arch/ia64/include/asm/
Dio.h49 unsigned long mmio_base; /* base in MMIO space */ member
139 return (void *) (space->mmio_base | offset); in __ia64_mk_io_addr()
/linux-4.1.27/drivers/scsi/sym53c8xx_2/
Dsym_glue.h206 unsigned long mmio_base; member
Dsym_glue.c1303 np->mmio_ba = (u32)dev->mmio_base; in sym_attach()
1533 device->mmio_base = bus_addr.start; in sym_iomap_device()
1548 if (device->mmio_base) in sym_iomap_device()
/linux-4.1.27/drivers/gpu/drm/savage/
Dsavage_bci.c565 unsigned long mmio_base, fb_base, fb_size, aperture_base; in savage_driver_firstopen() local
577 mmio_base = fb_base + SAVAGE_FB_SIZE_S3; in savage_driver_firstopen()
599 mmio_base = pci_resource_start(dev->pdev, 0); in savage_driver_firstopen()
618 mmio_base = pci_resource_start(dev->pdev, 0); in savage_driver_firstopen()
627 ret = drm_legacy_addmap(dev, mmio_base, SAVAGE_MMIO_SIZE, in savage_driver_firstopen()
/linux-4.1.27/drivers/pci/
Dquirks.c3430 void __iomem *mmio_base; in reset_ivb_igd() local
3437 mmio_base = pci_iomap(dev, 0, 0); in reset_ivb_igd()
3438 if (!mmio_base) in reset_ivb_igd()
3441 iowrite32(0x00000002, mmio_base + MSG_CTL); in reset_ivb_igd()
3449 iowrite32(0x00000005, mmio_base + SOUTH_CHICKEN2); in reset_ivb_igd()
3451 val = ioread32(mmio_base + PCH_PP_CONTROL) & 0xfffffffe; in reset_ivb_igd()
3452 iowrite32(val, mmio_base + PCH_PP_CONTROL); in reset_ivb_igd()
3456 val = ioread32(mmio_base + PCH_PP_STATUS); in reset_ivb_igd()
3464 iowrite32(0x00000002, mmio_base + NSDE_PWR_STATE); in reset_ivb_igd()
3466 pci_iounmap(dev, mmio_base); in reset_ivb_igd()
/linux-4.1.27/drivers/scsi/pcmcia/
Dnsp_cs.c721 unsigned long mmio_base = SCpnt->device->host->base; in nsp_pio_read() local
774 nsp_mmio_fifo32_read(mmio_base, SCpnt->SCp.ptr, res >> 2); in nsp_pio_read()
820 unsigned long mmio_base = SCpnt->device->host->base; in nsp_pio_write() local
873 nsp_mmio_fifo32_write(mmio_base, SCpnt->SCp.ptr, res >> 2); in nsp_pio_write()
/linux-4.1.27/drivers/video/fbdev/sis/
Dsis.h449 unsigned long mmio_base; member
Dsis_main.c1850 fix->mmio_start = ivideo->mmio_base; in sisfb_get_fix()
6000 ivideo->mmio_base = pci_resource_start(pdev, 1); in sisfb_probe()
6183 if(!request_mem_region(ivideo->mmio_base, ivideo->mmio_size, "sisfb MMIO")) { in sisfb_probe()
6197 ivideo->mmio_vbase = ioremap(ivideo->mmio_base, ivideo->mmio_size); in sisfb_probe()
6203 error_2: release_mem_region(ivideo->mmio_base, ivideo->mmio_size); in sisfb_probe()
6222 ivideo->mmio_base, (unsigned long)ivideo->mmio_vbase, ivideo->mmio_size / 1024); in sisfb_probe()
6502 release_mem_region(ivideo->mmio_base, ivideo->mmio_size); in sisfb_remove()
/linux-4.1.27/drivers/gpu/drm/mga/
Dmga_drv.h118 resource_size_t mmio_base; /**< Bus address of base of MMIO. */ member
Dmga_dma.c406 dev_priv->mmio_base = pci_resource_start(dev->pdev, 1); in mga_driver_load()
711 err = drm_legacy_addmap(dev, dev_priv->mmio_base, dev_priv->mmio_size, in mga_do_dma_bootstrap()
/linux-4.1.27/arch/ia64/sn/kernel/
Dsetup.c421 io_space[0].mmio_base = in sn_setup()
/linux-4.1.27/drivers/staging/emxx_udc/
Demxx_udc.c3318 void __iomem *mmio_base; in nbu2ss_drv_probe() local
3327 mmio_base = devm_ioremap_resource(&pdev->dev, r); in nbu2ss_drv_probe()
3328 if (IS_ERR(mmio_base)) in nbu2ss_drv_probe()
3329 return PTR_ERR(mmio_base); in nbu2ss_drv_probe()
3340 udc->p_regs = (struct fc_regs *)mmio_base; in nbu2ss_drv_probe()
/linux-4.1.27/arch/ia64/kernel/
Dsetup.c447 io_space[0].mmio_base = ia64_iobase; in io_port_init()