Lines Matching refs:mmio_base
453 acthd = I915_READ64_2x32(RING_ACTHD(ring->mmio_base), in intel_ring_get_active_head()
454 RING_ACTHD_UDW(ring->mmio_base)); in intel_ring_get_active_head()
456 acthd = I915_READ(RING_ACTHD(ring->mmio_base)); in intel_ring_get_active_head()
504 mmio = RING_HWS_PGA_GEN6(ring->mmio_base); in intel_ring_setup_status_page()
507 mmio = RING_HWS_PGA(ring->mmio_base); in intel_ring_setup_status_page()
521 u32 reg = RING_INSTPM(ring->mmio_base); in intel_ring_setup_status_page()
1415 POSTING_READ(RING_ACTHD(ring->mmio_base)); in gen6_ring_get_seqno()
1683 POSTING_READ(RING_IMR(ring->mmio_base)); in gen8_ring_get_irq()
1705 POSTING_READ(RING_IMR(ring->mmio_base)); in gen8_ring_put_irq()
2290 I915_WRITE(RING_SYNC_0(ring->mmio_base), 0); in intel_ring_init_seqno()
2291 I915_WRITE(RING_SYNC_1(ring->mmio_base), 0); in intel_ring_init_seqno()
2293 I915_WRITE(RING_SYNC_2(ring->mmio_base), 0); in intel_ring_init_seqno()
2324 POSTING_READ(RING_TAIL(ring->mmio_base)); in gen6_bsd_ring_write_tail()
2498 ring->mmio_base = RENDER_RING_BASE; in intel_init_render_ring_buffer()
2648 ring->mmio_base = GEN6_BSD_RING_BASE; in intel_init_bsd_ring_buffer()
2690 ring->mmio_base = BSD_RING_BASE; in intel_init_bsd_ring_buffer()
2723 ring->mmio_base = GEN8_BSD2_RING_BASE; in intel_init_bsd2_ring_buffer()
2752 ring->mmio_base = BLT_RING_BASE; in intel_init_blt_ring_buffer()
2809 ring->mmio_base = VEBOX_RING_BASE; in intel_init_vebox_ring_buffer()