270 	void __iomem *mmio_base = ap->host->iomap[SIL_MMIO_BAR];  in sil_bmdma_stop()  local
271 	void __iomem *bmdma2 = mmio_base + sil_port[ap->port_no].bmdma2;  in sil_bmdma_stop()
296 	void __iomem *mmio_base = ap->host->iomap[SIL_MMIO_BAR];  in sil_bmdma_start()  local
297 	void __iomem *bmdma2 = mmio_base + sil_port[ap->port_no].bmdma2;  in sil_bmdma_start()
363 	void __iomem *mmio_base = ap->host->iomap[SIL_MMIO_BAR];  in sil_set_mode()  local
364 	void __iomem *addr = mmio_base + sil_port[ap->port_no].xfer_mode;  in sil_set_mode()
524 	void __iomem *mmio_base = host->iomap[SIL_MMIO_BAR];  in sil_interrupt()  local
532 		u32 bmdma2 = readl(mmio_base + sil_port[ap->port_no].bmdma2);  in sil_interrupt()
553 	void __iomem *mmio_base = ap->host->iomap[SIL_MMIO_BAR];  in sil_freeze()  local
557 	writel(0, mmio_base + sil_port[ap->port_no].sien);  in sil_freeze()
560 	tmp = readl(mmio_base + SIL_SYSCFG);  in sil_freeze()
562 	writel(tmp, mmio_base + SIL_SYSCFG);  in sil_freeze()
563 	readl(mmio_base + SIL_SYSCFG);	/* flush */  in sil_freeze()
581 	void __iomem *mmio_base = ap->host->iomap[SIL_MMIO_BAR];  in sil_thaw()  local
590 		writel(SIL_SIEN_N, mmio_base + sil_port[ap->port_no].sien);  in sil_thaw()
593 	tmp = readl(mmio_base + SIL_SYSCFG);  in sil_thaw()
595 	writel(tmp, mmio_base + SIL_SYSCFG);  in sil_thaw()
665 	void __iomem *mmio_base = host->iomap[SIL_MMIO_BAR];  in sil_init_controller()  local
677 			       mmio_base + sil_port[i].fifo_cfg);  in sil_init_controller()
687 			tmp = readl(mmio_base + sil_port[i].sfis_cfg);  in sil_init_controller()
693 			writel(tmp & ~0x3, mmio_base + sil_port[i].sfis_cfg);  in sil_init_controller()
700 		tmp = readl(mmio_base + sil_port[2].bmdma);  in sil_init_controller()
703 			       mmio_base + sil_port[2].bmdma);  in sil_init_controller()
739 	void __iomem *mmio_base;  in sil_init_one()  local
780 	mmio_base = host->iomap[SIL_MMIO_BAR];  in sil_init_one()
786 		ioaddr->cmd_addr = mmio_base + sil_port[i].tf;  in sil_init_one()
788 		ioaddr->ctl_addr = mmio_base + sil_port[i].ctl;  in sil_init_one()
789 		ioaddr->bmdma_addr = mmio_base + sil_port[i].bmdma;  in sil_init_one()
790 		ioaddr->scr_addr = mmio_base + sil_port[i].scr;  in sil_init_one()