Searched refs:ha (Results 1 - 200 of 353) sorted by relevance

12

/linux-4.1.27/drivers/scsi/qla2xxx/
H A D	qla_dfs.c	22 struct qla_hw_data *ha = vha->hw; qla2x00_dfs_fce_show() local 24 mutex_lock(&ha->fce_mutex); qla2x00_dfs_fce_show() 27 seq_printf(s, "In Pointer = %llx\n\n", (unsigned long long)ha->fce_wr); qla2x00_dfs_fce_show() 28 seq_printf(s, "Base = %llx\n\n", (unsigned long long) ha->fce_dma); qla2x00_dfs_fce_show() 31 ha->fce_mb[0], ha->fce_mb[2], ha->fce_mb[3], ha->fce_mb[4], qla2x00_dfs_fce_show() 32 ha->fce_mb[5], ha->fce_mb[6]); qla2x00_dfs_fce_show() 34 fce = (uint32_t *) ha->fce; qla2x00_dfs_fce_show() 35 fce_start = (unsigned long long) ha->fce_dma; qla2x00_dfs_fce_show() 36 for (cnt = 0; cnt < fce_calc_size(ha->fce_bufs) / 4; cnt++) { qla2x00_dfs_fce_show() 47 mutex_unlock(&ha->fce_mutex); qla2x00_dfs_fce_show() 56 struct qla_hw_data *ha = vha->hw; qla2x00_dfs_fce_open() local 59 if (!ha->flags.fce_enabled) qla2x00_dfs_fce_open() 62 mutex_lock(&ha->fce_mutex); qla2x00_dfs_fce_open() 65 rval = qla2x00_disable_fce_trace(vha, &ha->fce_wr, &ha->fce_rd); qla2x00_dfs_fce_open() 70 ha->flags.fce_enabled = 0; qla2x00_dfs_fce_open() 72 mutex_unlock(&ha->fce_mutex); qla2x00_dfs_fce_open() 81 struct qla_hw_data *ha = vha->hw; qla2x00_dfs_fce_release() local 84 if (ha->flags.fce_enabled) qla2x00_dfs_fce_release() 87 mutex_lock(&ha->fce_mutex); qla2x00_dfs_fce_release() 90 ha->flags.fce_enabled = 1; qla2x00_dfs_fce_release() 91 memset(ha->fce, 0, fce_calc_size(ha->fce_bufs)); qla2x00_dfs_fce_release() 92 rval = qla2x00_enable_fce_trace(vha, ha->fce_dma, ha->fce_bufs, qla2x00_dfs_fce_release() 93 ha->fce_mb, &ha->fce_bufs); qla2x00_dfs_fce_release() 97 ha->flags.fce_enabled = 0; qla2x00_dfs_fce_release() 100 mutex_unlock(&ha->fce_mutex); qla2x00_dfs_fce_release() 115 struct qla_hw_data *ha = vha->hw; qla2x00_dfs_setup() local 117 if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha) && qla2x00_dfs_setup() 118 !IS_QLA27XX(ha)) qla2x00_dfs_setup() 120 if (!ha->fce) qla2x00_dfs_setup() 135 if (ha->dfs_dir) qla2x00_dfs_setup() 138 mutex_init(&ha->fce_mutex); qla2x00_dfs_setup() 139 ha->dfs_dir = debugfs_create_dir(vha->host_str, qla2x00_dfs_root); qla2x00_dfs_setup() 140 if (!ha->dfs_dir) { qla2x00_dfs_setup() 142 "Unable to create debugfs ha directory.\n"); qla2x00_dfs_setup() 149 ha->dfs_fce = debugfs_create_file("fce", S_IRUSR, ha->dfs_dir, vha, qla2x00_dfs_setup() 151 if (!ha->dfs_fce) { qla2x00_dfs_setup() 163 struct qla_hw_data *ha = vha->hw; qla2x00_dfs_remove() local 164 if (ha->dfs_fce) { qla2x00_dfs_remove() 165 debugfs_remove(ha->dfs_fce); qla2x00_dfs_remove() 166 ha->dfs_fce = NULL; qla2x00_dfs_remove() 169 if (ha->dfs_dir) { qla2x00_dfs_remove() 170 debugfs_remove(ha->dfs_dir); qla2x00_dfs_remove() 171 ha->dfs_dir = NULL; qla2x00_dfs_remove()
H A D	qla_os.c	323 static int qla2x00_alloc_queues(struct qla_hw_data *ha, struct req_que *req, qla2x00_alloc_queues() argument 326 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); qla2x00_alloc_queues() 327 ha->req_q_map = kzalloc(sizeof(struct req_que *) * ha->max_req_queues, qla2x00_alloc_queues() 329 if (!ha->req_q_map) { qla2x00_alloc_queues() 335 ha->rsp_q_map = kzalloc(sizeof(struct rsp_que *) * ha->max_rsp_queues, qla2x00_alloc_queues() 337 if (!ha->rsp_q_map) { qla2x00_alloc_queues() 346 ha->rsp_q_map[0] = rsp; qla2x00_alloc_queues() 347 ha->req_q_map[0] = req; qla2x00_alloc_queues() 348 set_bit(0, ha->rsp_qid_map); qla2x00_alloc_queues() 349 set_bit(0, ha->req_qid_map); qla2x00_alloc_queues() 353 kfree(ha->req_q_map); qla2x00_alloc_queues() 354 ha->req_q_map = NULL; qla2x00_alloc_queues() 359 static void qla2x00_free_req_que(struct qla_hw_data *ha, struct req_que *req) qla2x00_free_req_que() argument 361 if (IS_QLAFX00(ha)) { qla2x00_free_req_que() 363 dma_free_coherent(&ha->pdev->dev, qla2x00_free_req_que() 367 dma_free_coherent(&ha->pdev->dev, qla2x00_free_req_que() 378 static void qla2x00_free_rsp_que(struct qla_hw_data *ha, struct rsp_que *rsp) qla2x00_free_rsp_que() argument 380 if (IS_QLAFX00(ha)) { qla2x00_free_rsp_que() 382 dma_free_coherent(&ha->pdev->dev, qla2x00_free_rsp_que() 386 dma_free_coherent(&ha->pdev->dev, qla2x00_free_rsp_que() 394 static void qla2x00_free_queues(struct qla_hw_data *ha) qla2x00_free_queues() argument 400 for (cnt = 0; cnt < ha->max_req_queues; cnt++) { qla2x00_free_queues() 401 if (!test_bit(cnt, ha->req_qid_map)) qla2x00_free_queues() 404 req = ha->req_q_map[cnt]; qla2x00_free_queues() 405 qla2x00_free_req_que(ha, req); qla2x00_free_queues() 407 kfree(ha->req_q_map); qla2x00_free_queues() 408 ha->req_q_map = NULL; qla2x00_free_queues() 410 for (cnt = 0; cnt < ha->max_rsp_queues; cnt++) { qla2x00_free_queues() 411 if (!test_bit(cnt, ha->rsp_qid_map)) qla2x00_free_queues() 414 rsp = ha->rsp_q_map[cnt]; qla2x00_free_queues() 415 qla2x00_free_rsp_que(ha, rsp); qla2x00_free_queues() 417 kfree(ha->rsp_q_map); qla2x00_free_queues() 418 ha->rsp_q_map = NULL; qla2x00_free_queues() 425 struct qla_hw_data *ha = vha->hw; qla25xx_setup_mode() local 427 if (!(ha->fw_attributes & BIT_6)) { qla25xx_setup_mode() 435 req = qla25xx_create_req_que(ha, options, 0, 0, -1, qla25xx_setup_mode() 442 ha->wq = alloc_workqueue("qla2xxx_wq", WQ_MEM_RECLAIM, 1); qla25xx_setup_mode() 443 vha->req = ha->req_q_map[req]; qla25xx_setup_mode() 445 for (ques = 1; ques < ha->max_rsp_queues; ques++) { qla25xx_setup_mode() 446 ret = qla25xx_create_rsp_que(ha, options, 0, 0, req); qla25xx_setup_mode() 453 ha->flags.cpu_affinity_enabled = 1; qla25xx_setup_mode() 457 ha->max_rsp_queues, ha->max_req_queues); qla25xx_setup_mode() 461 ha->max_rsp_queues, ha->max_req_queues); qla25xx_setup_mode() 466 destroy_workqueue(ha->wq); qla25xx_setup_mode() 467 ha->wq = NULL; qla25xx_setup_mode() 468 vha->req = ha->req_q_map[0]; qla25xx_setup_mode() 470 ha->mqenable = 0; qla25xx_setup_mode() 471 kfree(ha->req_q_map); qla25xx_setup_mode() 472 kfree(ha->rsp_q_map); qla25xx_setup_mode() 473 ha->max_req_queues = ha->max_rsp_queues = 1; qla25xx_setup_mode() 480 struct qla_hw_data *ha = vha->hw; qla2x00_pci_info_str() local 487 pci_bus = (ha->pci_attr & (BIT_9 | BIT_10)) >> 9; qla2x00_pci_info_str() 492 pci_bus = (ha->pci_attr & BIT_8) >> 8; qla2x00_pci_info_str() 505 struct qla_hw_data *ha = vha->hw; qla24xx_pci_info_str() local 508 if (pci_is_pcie(ha->pdev)) { qla24xx_pci_info_str() 512 pcie_capability_read_dword(ha->pdev, PCI_EXP_LNKCAP, &lstat); qla24xx_pci_info_str() 538 pci_bus = (ha->pci_attr & CSRX_PCIX_BUS_MODE_MASK) >> 8; qla24xx_pci_info_str() 560 struct qla_hw_data *ha = vha->hw; qla2x00_fw_version_str() local 562 snprintf(str, size, "%d.%02d.%02d ", ha->fw_major_version, qla2x00_fw_version_str() 563 ha->fw_minor_version, ha->fw_subminor_version); qla2x00_fw_version_str() 565 if (ha->fw_attributes & BIT_9) { qla2x00_fw_version_str() 570 switch (ha->fw_attributes & 0xFF) { qla2x00_fw_version_str() 584 sprintf(un_str, "(%x)", ha->fw_attributes); qla2x00_fw_version_str() 588 if (ha->fw_attributes & 0x100) qla2x00_fw_version_str() 597 struct qla_hw_data *ha = vha->hw; qla24xx_fw_version_str() local 599 snprintf(str, size, "%d.%02d.%02d (%x)", ha->fw_major_version, qla24xx_fw_version_str() 600 ha->fw_minor_version, ha->fw_subminor_version, ha->fw_attributes); qla24xx_fw_version_str() 609 struct qla_hw_data *ha = sp->fcport->vha->hw; qla2x00_sp_free_dma() local 618 dma_unmap_sg(&ha->pdev->dev, scsi_prot_sglist(cmd), qla2x00_sp_free_dma() 625 qla2x00_clean_dsd_pool(ha, sp, NULL); qla2x00_sp_free_dma() 630 dma_pool_free(ha->dl_dma_pool, ctx, qla2x00_sp_free_dma() 638 dma_pool_free(ha->fcp_cmnd_dma_pool, ctx1->fcp_cmnd, qla2x00_sp_free_dma() 640 list_splice(&ctx1->dsd_list, &ha->gbl_dsd_list); qla2x00_sp_free_dma() 641 ha->gbl_dsd_inuse -= ctx1->dsd_use_cnt; qla2x00_sp_free_dma() 642 ha->gbl_dsd_avail += ctx1->dsd_use_cnt; qla2x00_sp_free_dma() 643 mempool_free(ctx1, ha->ctx_mempool); qla2x00_sp_free_dma() 654 struct qla_hw_data *ha = (struct qla_hw_data *)data; qla2x00_sp_compl() local 671 qla2x00_sp_free_dma(ha, sp); qla2x00_sp_compl() 684 struct qla_hw_data *ha = vha->hw; qla2xxx_queuecommand() local 685 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); qla2xxx_queuecommand() 689 if (ha->flags.eeh_busy) { qla2xxx_queuecommand() 690 if (ha->flags.pci_channel_io_perm_failure) { qla2xxx_queuecommand() 761 rval = ha->isp_ops->start_scsi(sp); qla2xxx_queuecommand() 771 qla2x00_sp_free_dma(ha, sp); qla2xxx_queuecommand() 804 struct qla_hw_data *ha = vha->hw; qla2x00_eh_wait_on_command() local 807 if (unlikely(pci_channel_offline(ha->pdev)) || ha->flags.eeh_busy) { qla2x00_eh_wait_on_command() 829 * ha - pointer to host adapter structure 844 struct qla_hw_data *ha = vha->hw; qla2x00_wait_for_hba_online() local 845 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev); qla2x00_wait_for_hba_online() 851 ha->dpc_active) && time_before(jiffies, wait_online)) { qla2x00_wait_for_hba_online() 868 * ha - pointer to host adapter structure 878 struct qla_hw_data *ha = vha->hw; qla2x00_wait_for_hba_ready() local 880 while (((qla2x00_reset_active(vha)) || ha->dpc_active || qla2x00_wait_for_hba_ready() 881 ha->flags.mbox_busy) || qla2x00_wait_for_hba_ready() 892 struct qla_hw_data *ha = vha->hw; qla2x00_wait_for_chip_reset() local 893 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev); qla2x00_wait_for_chip_reset() 899 ha->dpc_active) && time_before(jiffies, wait_reset)) { qla2x00_wait_for_chip_reset() 904 ha->flags.chip_reset_done) qla2x00_wait_for_chip_reset() 907 if (ha->flags.chip_reset_done) qla2x00_wait_for_chip_reset() 946 struct qla_hw_data *ha = vha->hw; qla2xxx_eh_abort() local 959 spin_lock_irqsave(&ha->hardware_lock, flags); qla2xxx_eh_abort() 962 spin_unlock_irqrestore(&ha->hardware_lock, flags); qla2xxx_eh_abort() 973 spin_unlock_irqrestore(&ha->hardware_lock, flags); qla2xxx_eh_abort() 974 rval = ha->isp_ops->abort_command(sp); qla2xxx_eh_abort() 994 spin_lock_irqsave(&ha->hardware_lock, flags); qla2xxx_eh_abort() 1001 sp->done(ha, sp, 0); qla2xxx_eh_abort() 1002 spin_unlock_irqrestore(&ha->hardware_lock, flags); qla2xxx_eh_abort() 1030 struct qla_hw_data *ha = vha->hw; qla2x00_eh_wait_for_pending_commands() local 1037 spin_lock_irqsave(&ha->hardware_lock, flags); qla2x00_eh_wait_for_pending_commands() 1065 spin_unlock_irqrestore(&ha->hardware_lock, flags); qla2x00_eh_wait_for_pending_commands() 1067 spin_lock_irqsave(&ha->hardware_lock, flags); qla2x00_eh_wait_for_pending_commands() 1069 spin_unlock_irqrestore(&ha->hardware_lock, flags); qla2x00_eh_wait_for_pending_commands() 1140 struct qla_hw_data *ha = vha->hw; qla2xxx_eh_device_reset() local 1143 ha->isp_ops->lun_reset); qla2xxx_eh_device_reset() 1150 struct qla_hw_data *ha = vha->hw; qla2xxx_eh_target_reset() local 1153 ha->isp_ops->target_reset); qla2xxx_eh_target_reset() 1242 struct qla_hw_data *ha = vha->hw; qla2xxx_eh_host_reset() local 1246 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev); qla2xxx_eh_host_reset() 1258 if (qla2x00_reset_active(vha) || ha->optrom_state != QLA_SWAITING) qla2xxx_eh_host_reset() 1273 if (ha->wq) qla2xxx_eh_host_reset() 1274 flush_workqueue(ha->wq); qla2xxx_eh_host_reset() 1277 if (ha->isp_ops->abort_isp(base_vha)) { qla2xxx_eh_host_reset() 1309 * ha = adapter block pointer. 1319 struct qla_hw_data *ha = vha->hw; qla2x00_loop_reset() local 1321 if (IS_QLAFX00(ha)) { qla2x00_loop_reset() 1325 if (ql2xtargetreset == 1 && ha->flags.enable_target_reset) { qla2x00_loop_reset() 1330 ret = ha->isp_ops->target_reset(fcport, 0, 0); qla2x00_loop_reset() 1340 if (ha->flags.enable_lip_full_login && !IS_CNA_CAPABLE(ha)) { qla2x00_loop_reset() 1351 if (ha->flags.enable_lip_reset) { qla2x00_loop_reset() 1370 struct qla_hw_data *ha = vha->hw; qla2x00_abort_all_cmds() local 1373 qlt_host_reset_handler(ha); qla2x00_abort_all_cmds() 1375 spin_lock_irqsave(&ha->hardware_lock, flags); qla2x00_abort_all_cmds() 1376 for (que = 0; que < ha->max_req_queues; que++) { qla2x00_abort_all_cmds() 1377 req = ha->req_q_map[que]; qla2x00_abort_all_cmds() 1390 spin_unlock_irqrestore(&ha->hardware_lock, flags); qla2x00_abort_all_cmds() 1427 * @ha: HA context 1429 * At exit, the @ha's flags.enable_64bit_addressing set to indicated 1433 qla2x00_config_dma_addressing(struct qla_hw_data *ha) qla2x00_config_dma_addressing() argument 1436 ha->flags.enable_64bit_addressing = 0; qla2x00_config_dma_addressing() 1438 if (!dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(64))) { qla2x00_config_dma_addressing() 1440 if (MSD(dma_get_required_mask(&ha->pdev->dev)) && qla2x00_config_dma_addressing() 1441 !pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(64))) { qla2x00_config_dma_addressing() 1443 ha->flags.enable_64bit_addressing = 1; qla2x00_config_dma_addressing() 1444 ha->isp_ops->calc_req_entries = qla2x00_calc_iocbs_64; qla2x00_config_dma_addressing() 1445 ha->isp_ops->build_iocbs = qla2x00_build_scsi_iocbs_64; qla2x00_config_dma_addressing() 1450 dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(32)); qla2x00_config_dma_addressing() 1451 pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(32)); qla2x00_config_dma_addressing() 1455 qla2x00_enable_intrs(struct qla_hw_data *ha) qla2x00_enable_intrs() argument 1458 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; qla2x00_enable_intrs() 1460 spin_lock_irqsave(&ha->hardware_lock, flags); qla2x00_enable_intrs() 1461 ha->interrupts_on = 1; qla2x00_enable_intrs() 1465 spin_unlock_irqrestore(&ha->hardware_lock, flags); qla2x00_enable_intrs() 1470 qla2x00_disable_intrs(struct qla_hw_data *ha) qla2x00_disable_intrs() argument 1473 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; qla2x00_disable_intrs() 1475 spin_lock_irqsave(&ha->hardware_lock, flags); qla2x00_disable_intrs() 1476 ha->interrupts_on = 0; qla2x00_disable_intrs() 1480 spin_unlock_irqrestore(&ha->hardware_lock, flags); qla2x00_disable_intrs() 1484 qla24xx_enable_intrs(struct qla_hw_data *ha) qla24xx_enable_intrs() argument 1487 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; qla24xx_enable_intrs() 1489 spin_lock_irqsave(&ha->hardware_lock, flags); qla24xx_enable_intrs() 1490 ha->interrupts_on = 1; qla24xx_enable_intrs() 1493 spin_unlock_irqrestore(&ha->hardware_lock, flags); qla24xx_enable_intrs() 1497 qla24xx_disable_intrs(struct qla_hw_data *ha) qla24xx_disable_intrs() argument 1500 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; qla24xx_disable_intrs() 1502 if (IS_NOPOLLING_TYPE(ha)) qla24xx_disable_intrs() 1504 spin_lock_irqsave(&ha->hardware_lock, flags); qla24xx_disable_intrs() 1505 ha->interrupts_on = 0; qla24xx_disable_intrs() 1508 spin_unlock_irqrestore(&ha->hardware_lock, flags); qla24xx_disable_intrs() 1512 qla2x00_iospace_config(struct qla_hw_data *ha) qla2x00_iospace_config() argument 1518 if (pci_request_selected_regions(ha->pdev, ha->bars, qla2x00_iospace_config() 1520 ql_log_pci(ql_log_fatal, ha->pdev, 0x0011, qla2x00_iospace_config() 1522 pci_name(ha->pdev)); qla2x00_iospace_config() 1525 if (!(ha->bars & 1)) qla2x00_iospace_config() 1529 pio = pci_resource_start(ha->pdev, 0); qla2x00_iospace_config() 1530 if (pci_resource_flags(ha->pdev, 0) & IORESOURCE_IO) { qla2x00_iospace_config() 1531 if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) { qla2x00_iospace_config() 1532 ql_log_pci(ql_log_warn, ha->pdev, 0x0012, qla2x00_iospace_config() 1534 pci_name(ha->pdev)); qla2x00_iospace_config() 1538 ql_log_pci(ql_log_warn, ha->pdev, 0x0013, qla2x00_iospace_config() 1540 pci_name(ha->pdev)); qla2x00_iospace_config() 1543 ha->pio_address = pio; qla2x00_iospace_config() 1544 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0014, qla2x00_iospace_config() 1546 (unsigned long long)ha->pio_address); qla2x00_iospace_config() 1550 if (!(pci_resource_flags(ha->pdev, 1) & IORESOURCE_MEM)) { qla2x00_iospace_config() 1551 ql_log_pci(ql_log_fatal, ha->pdev, 0x0015, qla2x00_iospace_config() 1553 pci_name(ha->pdev)); qla2x00_iospace_config() 1556 if (pci_resource_len(ha->pdev, 1) < MIN_IOBASE_LEN) { qla2x00_iospace_config() 1557 ql_log_pci(ql_log_fatal, ha->pdev, 0x0016, qla2x00_iospace_config() 1559 pci_name(ha->pdev)); qla2x00_iospace_config() 1563 ha->iobase = ioremap(pci_resource_start(ha->pdev, 1), MIN_IOBASE_LEN); qla2x00_iospace_config() 1564 if (!ha->iobase) { qla2x00_iospace_config() 1565 ql_log_pci(ql_log_fatal, ha->pdev, 0x0017, qla2x00_iospace_config() 1567 pci_name(ha->pdev)); qla2x00_iospace_config() 1572 ha->max_req_queues = ha->max_rsp_queues = 1; qla2x00_iospace_config() 1575 (!IS_QLA25XX(ha) && !IS_QLA81XX(ha))) qla2x00_iospace_config() 1578 ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 3), qla2x00_iospace_config() 1579 pci_resource_len(ha->pdev, 3)); qla2x00_iospace_config() 1580 if (ha->mqiobase) { qla2x00_iospace_config() 1581 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0018, qla2x00_iospace_config() 1582 "MQIO Base=%p.\n", ha->mqiobase); qla2x00_iospace_config() 1584 pci_read_config_word(ha->pdev, QLA_PCI_MSIX_CONTROL, &msix); qla2x00_iospace_config() 1585 ha->msix_count = msix; qla2x00_iospace_config() 1590 ha->max_rsp_queues = (ha->msix_count - 1 > cpus) ? qla2x00_iospace_config() 1591 (cpus + 1) : (ha->msix_count - 1); qla2x00_iospace_config() 1592 ha->max_req_queues = 2; qla2x00_iospace_config() 1594 ha->max_req_queues = ql2xmaxqueues > QLA_MQ_SIZE ? qla2x00_iospace_config() 1596 ql_dbg_pci(ql_dbg_multiq, ha->pdev, 0xc008, qla2x00_iospace_config() 1598 ha->max_req_queues); qla2x00_iospace_config() 1599 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0019, qla2x00_iospace_config() 1601 ha->max_req_queues); qla2x00_iospace_config() 1603 ql_log_pci(ql_log_info, ha->pdev, 0x001a, qla2x00_iospace_config() 1606 ql_log_pci(ql_log_info, ha->pdev, 0x001b, qla2x00_iospace_config() 1610 ha->msix_count = ha->max_rsp_queues + 1; qla2x00_iospace_config() 1611 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x001c, qla2x00_iospace_config() 1612 "MSIX Count:%d.\n", ha->msix_count); qla2x00_iospace_config() 1621 qla83xx_iospace_config(struct qla_hw_data *ha) qla83xx_iospace_config() argument 1626 if (pci_request_selected_regions(ha->pdev, ha->bars, qla83xx_iospace_config() 1628 ql_log_pci(ql_log_fatal, ha->pdev, 0x0117, qla83xx_iospace_config() 1630 pci_name(ha->pdev)); qla83xx_iospace_config() 1636 if (!(pci_resource_flags(ha->pdev, 0) & IORESOURCE_MEM)) { qla83xx_iospace_config() 1637 ql_log_pci(ql_log_warn, ha->pdev, 0x0118, qla83xx_iospace_config() 1639 pci_name(ha->pdev)); qla83xx_iospace_config() 1642 if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) { qla83xx_iospace_config() 1643 ql_log_pci(ql_log_warn, ha->pdev, 0x0119, qla83xx_iospace_config() 1645 pci_name(ha->pdev)); qla83xx_iospace_config() 1649 ha->iobase = ioremap(pci_resource_start(ha->pdev, 0), MIN_IOBASE_LEN); qla83xx_iospace_config() 1650 if (!ha->iobase) { qla83xx_iospace_config() 1651 ql_log_pci(ql_log_fatal, ha->pdev, 0x011a, qla83xx_iospace_config() 1653 pci_name(ha->pdev)); qla83xx_iospace_config() 1660 ha->max_req_queues = ha->max_rsp_queues = 1; qla83xx_iospace_config() 1661 ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 4), qla83xx_iospace_config() 1662 pci_resource_len(ha->pdev, 4)); qla83xx_iospace_config() 1664 if (!ha->mqiobase) { qla83xx_iospace_config() 1665 ql_log_pci(ql_log_fatal, ha->pdev, 0x011d, qla83xx_iospace_config() 1670 ha->msixbase = ioremap(pci_resource_start(ha->pdev, 2), qla83xx_iospace_config() 1671 pci_resource_len(ha->pdev, 2)); qla83xx_iospace_config() 1672 if (ha->msixbase) { qla83xx_iospace_config() 1674 pci_read_config_word(ha->pdev, qla83xx_iospace_config() 1676 ha->msix_count = msix; qla83xx_iospace_config() 1681 ha->max_rsp_queues = (ha->msix_count - 1 > cpus) ? qla83xx_iospace_config() 1682 (cpus + 1) : (ha->msix_count - 1); qla83xx_iospace_config() 1683 ha->max_req_queues = 2; qla83xx_iospace_config() 1685 ha->max_req_queues = ql2xmaxqueues > QLA_MQ_SIZE ? qla83xx_iospace_config() 1687 ql_dbg_pci(ql_dbg_multiq, ha->pdev, 0xc00c, qla83xx_iospace_config() 1689 ha->max_req_queues); qla83xx_iospace_config() 1690 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011b, qla83xx_iospace_config() 1692 ha->max_req_queues); qla83xx_iospace_config() 1694 ql_log_pci(ql_log_info, ha->pdev, 0x011c, qla83xx_iospace_config() 1697 ql_log_pci(ql_log_info, ha->pdev, 0x011e, qla83xx_iospace_config() 1701 ha->msix_count = ha->max_rsp_queues + 1; qla83xx_iospace_config() 1703 qlt_83xx_iospace_config(ha); qla83xx_iospace_config() 1705 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011f, qla83xx_iospace_config() 1706 "MSIX Count:%d.\n", ha->msix_count); qla83xx_iospace_config() 2094 qla2x00_set_isp_flags(struct qla_hw_data *ha) qla2x00_set_isp_flags() argument 2096 ha->device_type = DT_EXTENDED_IDS; qla2x00_set_isp_flags() 2097 switch (ha->pdev->device) { qla2x00_set_isp_flags() 2099 ha->device_type |= DT_ISP2100; qla2x00_set_isp_flags() 2100 ha->device_type &= ~DT_EXTENDED_IDS; qla2x00_set_isp_flags() 2101 ha->fw_srisc_address = RISC_START_ADDRESS_2100; qla2x00_set_isp_flags() 2104 ha->device_type |= DT_ISP2200; qla2x00_set_isp_flags() 2105 ha->device_type &= ~DT_EXTENDED_IDS; qla2x00_set_isp_flags() 2106 ha->fw_srisc_address = RISC_START_ADDRESS_2100; qla2x00_set_isp_flags() 2109 ha->device_type |= DT_ISP2300; qla2x00_set_isp_flags() 2110 ha->device_type |= DT_ZIO_SUPPORTED; qla2x00_set_isp_flags() 2111 ha->fw_srisc_address = RISC_START_ADDRESS_2300; qla2x00_set_isp_flags() 2114 ha->device_type |= DT_ISP2312; qla2x00_set_isp_flags() 2115 ha->device_type |= DT_ZIO_SUPPORTED; qla2x00_set_isp_flags() 2116 ha->fw_srisc_address = RISC_START_ADDRESS_2300; qla2x00_set_isp_flags() 2119 ha->device_type |= DT_ISP2322; qla2x00_set_isp_flags() 2120 ha->device_type |= DT_ZIO_SUPPORTED; qla2x00_set_isp_flags() 2121 if (ha->pdev->subsystem_vendor == 0x1028 && qla2x00_set_isp_flags() 2122 ha->pdev->subsystem_device == 0x0170) qla2x00_set_isp_flags() 2123 ha->device_type |= DT_OEM_001; qla2x00_set_isp_flags() 2124 ha->fw_srisc_address = RISC_START_ADDRESS_2300; qla2x00_set_isp_flags() 2127 ha->device_type |= DT_ISP6312; qla2x00_set_isp_flags() 2128 ha->fw_srisc_address = RISC_START_ADDRESS_2300; qla2x00_set_isp_flags() 2131 ha->device_type |= DT_ISP6322; qla2x00_set_isp_flags() 2132 ha->fw_srisc_address = RISC_START_ADDRESS_2300; qla2x00_set_isp_flags() 2135 ha->device_type |= DT_ISP2422; qla2x00_set_isp_flags() 2136 ha->device_type |= DT_ZIO_SUPPORTED; qla2x00_set_isp_flags() 2137 ha->device_type |= DT_FWI2; qla2x00_set_isp_flags() 2138 ha->device_type |= DT_IIDMA; qla2x00_set_isp_flags() 2139 ha->fw_srisc_address = RISC_START_ADDRESS_2400; qla2x00_set_isp_flags() 2142 ha->device_type |= DT_ISP2432; qla2x00_set_isp_flags() 2143 ha->device_type |= DT_ZIO_SUPPORTED; qla2x00_set_isp_flags() 2144 ha->device_type |= DT_FWI2; qla2x00_set_isp_flags() 2145 ha->device_type |= DT_IIDMA; qla2x00_set_isp_flags() 2146 ha->fw_srisc_address = RISC_START_ADDRESS_2400; qla2x00_set_isp_flags() 2149 ha->device_type |= DT_ISP8432; qla2x00_set_isp_flags() 2150 ha->device_type |= DT_ZIO_SUPPORTED; qla2x00_set_isp_flags() 2151 ha->device_type |= DT_FWI2; qla2x00_set_isp_flags() 2152 ha->device_type |= DT_IIDMA; qla2x00_set_isp_flags() 2153 ha->fw_srisc_address = RISC_START_ADDRESS_2400; qla2x00_set_isp_flags() 2156 ha->device_type |= DT_ISP5422; qla2x00_set_isp_flags() 2157 ha->device_type |= DT_FWI2; qla2x00_set_isp_flags() 2158 ha->fw_srisc_address = RISC_START_ADDRESS_2400; qla2x00_set_isp_flags() 2161 ha->device_type |= DT_ISP5432; qla2x00_set_isp_flags() 2162 ha->device_type |= DT_FWI2; qla2x00_set_isp_flags() 2163 ha->fw_srisc_address = RISC_START_ADDRESS_2400; qla2x00_set_isp_flags() 2166 ha->device_type |= DT_ISP2532; qla2x00_set_isp_flags() 2167 ha->device_type |= DT_ZIO_SUPPORTED; qla2x00_set_isp_flags() 2168 ha->device_type |= DT_FWI2; qla2x00_set_isp_flags() 2169 ha->device_type |= DT_IIDMA; qla2x00_set_isp_flags() 2170 ha->fw_srisc_address = RISC_START_ADDRESS_2400; qla2x00_set_isp_flags() 2173 ha->device_type |= DT_ISP8001; qla2x00_set_isp_flags() 2174 ha->device_type |= DT_ZIO_SUPPORTED; qla2x00_set_isp_flags() 2175 ha->device_type |= DT_FWI2; qla2x00_set_isp_flags() 2176 ha->device_type |= DT_IIDMA; qla2x00_set_isp_flags() 2177 ha->fw_srisc_address = RISC_START_ADDRESS_2400; qla2x00_set_isp_flags() 2180 ha->device_type |= DT_ISP8021; qla2x00_set_isp_flags() 2181 ha->device_type |= DT_ZIO_SUPPORTED; qla2x00_set_isp_flags() 2182 ha->device_type |= DT_FWI2; qla2x00_set_isp_flags() 2183 ha->fw_srisc_address = RISC_START_ADDRESS_2400; qla2x00_set_isp_flags() 2185 qla82xx_init_flags(ha); qla2x00_set_isp_flags() 2188 ha->device_type |= DT_ISP8044; qla2x00_set_isp_flags() 2189 ha->device_type |= DT_ZIO_SUPPORTED; qla2x00_set_isp_flags() 2190 ha->device_type |= DT_FWI2; qla2x00_set_isp_flags() 2191 ha->fw_srisc_address = RISC_START_ADDRESS_2400; qla2x00_set_isp_flags() 2193 qla82xx_init_flags(ha); qla2x00_set_isp_flags() 2196 ha->device_type |= DT_ISP2031; qla2x00_set_isp_flags() 2197 ha->device_type |= DT_ZIO_SUPPORTED; qla2x00_set_isp_flags() 2198 ha->device_type |= DT_FWI2; qla2x00_set_isp_flags() 2199 ha->device_type |= DT_IIDMA; qla2x00_set_isp_flags() 2200 ha->device_type |= DT_T10_PI; qla2x00_set_isp_flags() 2201 ha->fw_srisc_address = RISC_START_ADDRESS_2400; qla2x00_set_isp_flags() 2204 ha->device_type |= DT_ISP8031; qla2x00_set_isp_flags() 2205 ha->device_type |= DT_ZIO_SUPPORTED; qla2x00_set_isp_flags() 2206 ha->device_type |= DT_FWI2; qla2x00_set_isp_flags() 2207 ha->device_type |= DT_IIDMA; qla2x00_set_isp_flags() 2208 ha->device_type |= DT_T10_PI; qla2x00_set_isp_flags() 2209 ha->fw_srisc_address = RISC_START_ADDRESS_2400; qla2x00_set_isp_flags() 2212 ha->device_type |= DT_ISPFX00; qla2x00_set_isp_flags() 2215 ha->device_type |= DT_ISP2071; qla2x00_set_isp_flags() 2216 ha->device_type |= DT_ZIO_SUPPORTED; qla2x00_set_isp_flags() 2217 ha->device_type |= DT_FWI2; qla2x00_set_isp_flags() 2218 ha->device_type |= DT_IIDMA; qla2x00_set_isp_flags() 2219 ha->fw_srisc_address = RISC_START_ADDRESS_2400; qla2x00_set_isp_flags() 2222 ha->device_type |= DT_ISP2271; qla2x00_set_isp_flags() 2223 ha->device_type |= DT_ZIO_SUPPORTED; qla2x00_set_isp_flags() 2224 ha->device_type |= DT_FWI2; qla2x00_set_isp_flags() 2225 ha->device_type |= DT_IIDMA; qla2x00_set_isp_flags() 2226 ha->fw_srisc_address = RISC_START_ADDRESS_2400; qla2x00_set_isp_flags() 2230 if (IS_QLA82XX(ha)) qla2x00_set_isp_flags() 2231 ha->port_no = ha->portnum & 1; qla2x00_set_isp_flags() 2234 pci_read_config_byte(ha->pdev, PCI_INTERRUPT_PIN, &ha->port_no); qla2x00_set_isp_flags() 2235 if (IS_QLA27XX(ha)) qla2x00_set_isp_flags() 2236 ha->port_no--; qla2x00_set_isp_flags() 2238 ha->port_no = !(ha->port_no & 1); qla2x00_set_isp_flags() 2241 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x000b, qla2x00_set_isp_flags() 2243 ha->device_type, ha->port_no, ha->fw_srisc_address); qla2x00_set_isp_flags() 2282 struct qla_hw_data *ha; qla2x00_probe_one() local 2325 ha = kzalloc(sizeof(struct qla_hw_data), GFP_KERNEL); qla2x00_probe_one() 2326 if (!ha) { qla2x00_probe_one() 2328 "Unable to allocate memory for ha.\n"); qla2x00_probe_one() 2332 "Memory allocated for ha=%p.\n", ha); qla2x00_probe_one() 2333 ha->pdev = pdev; qla2x00_probe_one() 2334 ha->tgt.enable_class_2 = ql2xenableclass2; qla2x00_probe_one() 2335 INIT_LIST_HEAD(&ha->tgt.q_full_list); qla2x00_probe_one() 2336 spin_lock_init(&ha->tgt.q_full_lock); qla2x00_probe_one() 2339 ha->bars = bars; qla2x00_probe_one() 2340 ha->mem_only = mem_only; qla2x00_probe_one() 2341 spin_lock_init(&ha->hardware_lock); qla2x00_probe_one() 2342 spin_lock_init(&ha->vport_slock); qla2x00_probe_one() 2343 mutex_init(&ha->selflogin_lock); qla2x00_probe_one() 2344 mutex_init(&ha->optrom_mutex); qla2x00_probe_one() 2347 qla2x00_set_isp_flags(ha); qla2x00_probe_one() 2350 if (IS_QLA24XX(ha) || IS_QLA25XX(ha) || IS_QLA81XX(ha) || qla2x00_probe_one() 2351 IS_QLA83XX(ha) || IS_QLA27XX(ha)) qla2x00_probe_one() 2354 ha->prev_topology = 0; qla2x00_probe_one() 2355 ha->init_cb_size = sizeof(init_cb_t); qla2x00_probe_one() 2356 ha->link_data_rate = PORT_SPEED_UNKNOWN; qla2x00_probe_one() 2357 ha->optrom_size = OPTROM_SIZE_2300; qla2x00_probe_one() 2360 if (IS_QLA2100(ha)) { qla2x00_probe_one() 2361 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100; qla2x00_probe_one() 2362 ha->mbx_count = MAILBOX_REGISTER_COUNT_2100; qla2x00_probe_one() 2365 ha->max_loop_id = SNS_LAST_LOOP_ID_2100; qla2x00_probe_one() 2366 ha->gid_list_info_size = 4; qla2x00_probe_one() 2367 ha->flash_conf_off = ~0; qla2x00_probe_one() 2368 ha->flash_data_off = ~0; qla2x00_probe_one() 2369 ha->nvram_conf_off = ~0; qla2x00_probe_one() 2370 ha->nvram_data_off = ~0; qla2x00_probe_one() 2371 ha->isp_ops = &qla2100_isp_ops; qla2x00_probe_one() 2372 } else if (IS_QLA2200(ha)) { qla2x00_probe_one() 2373 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100; qla2x00_probe_one() 2374 ha->mbx_count = MAILBOX_REGISTER_COUNT_2200; qla2x00_probe_one() 2377 ha->max_loop_id = SNS_LAST_LOOP_ID_2100; qla2x00_probe_one() 2378 ha->gid_list_info_size = 4; qla2x00_probe_one() 2379 ha->flash_conf_off = ~0; qla2x00_probe_one() 2380 ha->flash_data_off = ~0; qla2x00_probe_one() 2381 ha->nvram_conf_off = ~0; qla2x00_probe_one() 2382 ha->nvram_data_off = ~0; qla2x00_probe_one() 2383 ha->isp_ops = &qla2100_isp_ops; qla2x00_probe_one() 2384 } else if (IS_QLA23XX(ha)) { qla2x00_probe_one() 2385 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100; qla2x00_probe_one() 2386 ha->mbx_count = MAILBOX_REGISTER_COUNT; qla2x00_probe_one() 2389 ha->max_loop_id = SNS_LAST_LOOP_ID_2300; qla2x00_probe_one() 2390 ha->gid_list_info_size = 6; qla2x00_probe_one() 2391 if (IS_QLA2322(ha) || IS_QLA6322(ha)) qla2x00_probe_one() 2392 ha->optrom_size = OPTROM_SIZE_2322; qla2x00_probe_one() 2393 ha->flash_conf_off = ~0; qla2x00_probe_one() 2394 ha->flash_data_off = ~0; qla2x00_probe_one() 2395 ha->nvram_conf_off = ~0; qla2x00_probe_one() 2396 ha->nvram_data_off = ~0; qla2x00_probe_one() 2397 ha->isp_ops = &qla2300_isp_ops; qla2x00_probe_one() 2398 } else if (IS_QLA24XX_TYPE(ha)) { qla2x00_probe_one() 2399 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400; qla2x00_probe_one() 2400 ha->mbx_count = MAILBOX_REGISTER_COUNT; qla2x00_probe_one() 2403 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX; qla2x00_probe_one() 2404 ha->max_loop_id = SNS_LAST_LOOP_ID_2300; qla2x00_probe_one() 2405 ha->init_cb_size = sizeof(struct mid_init_cb_24xx); qla2x00_probe_one() 2406 ha->gid_list_info_size = 8; qla2x00_probe_one() 2407 ha->optrom_size = OPTROM_SIZE_24XX; qla2x00_probe_one() 2408 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA24XX; qla2x00_probe_one() 2409 ha->isp_ops = &qla24xx_isp_ops; qla2x00_probe_one() 2410 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF; qla2x00_probe_one() 2411 ha->flash_data_off = FARX_ACCESS_FLASH_DATA; qla2x00_probe_one() 2412 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF; qla2x00_probe_one() 2413 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA; qla2x00_probe_one() 2414 } else if (IS_QLA25XX(ha)) { qla2x00_probe_one() 2415 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400; qla2x00_probe_one() 2416 ha->mbx_count = MAILBOX_REGISTER_COUNT; qla2x00_probe_one() 2419 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX; qla2x00_probe_one() 2420 ha->max_loop_id = SNS_LAST_LOOP_ID_2300; qla2x00_probe_one() 2421 ha->init_cb_size = sizeof(struct mid_init_cb_24xx); qla2x00_probe_one() 2422 ha->gid_list_info_size = 8; qla2x00_probe_one() 2423 ha->optrom_size = OPTROM_SIZE_25XX; qla2x00_probe_one() 2424 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX; qla2x00_probe_one() 2425 ha->isp_ops = &qla25xx_isp_ops; qla2x00_probe_one() 2426 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF; qla2x00_probe_one() 2427 ha->flash_data_off = FARX_ACCESS_FLASH_DATA; qla2x00_probe_one() 2428 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF; qla2x00_probe_one() 2429 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA; qla2x00_probe_one() 2430 } else if (IS_QLA81XX(ha)) { qla2x00_probe_one() 2431 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400; qla2x00_probe_one() 2432 ha->mbx_count = MAILBOX_REGISTER_COUNT; qla2x00_probe_one() 2435 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX; qla2x00_probe_one() 2436 ha->max_loop_id = SNS_LAST_LOOP_ID_2300; qla2x00_probe_one() 2437 ha->init_cb_size = sizeof(struct mid_init_cb_81xx); qla2x00_probe_one() 2438 ha->gid_list_info_size = 8; qla2x00_probe_one() 2439 ha->optrom_size = OPTROM_SIZE_81XX; qla2x00_probe_one() 2440 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX; qla2x00_probe_one() 2441 ha->isp_ops = &qla81xx_isp_ops; qla2x00_probe_one() 2442 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX; qla2x00_probe_one() 2443 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX; qla2x00_probe_one() 2444 ha->nvram_conf_off = ~0; qla2x00_probe_one() 2445 ha->nvram_data_off = ~0; qla2x00_probe_one() 2446 } else if (IS_QLA82XX(ha)) { qla2x00_probe_one() 2447 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400; qla2x00_probe_one() 2448 ha->mbx_count = MAILBOX_REGISTER_COUNT; qla2x00_probe_one() 2451 ha->max_loop_id = SNS_LAST_LOOP_ID_2300; qla2x00_probe_one() 2452 ha->init_cb_size = sizeof(struct mid_init_cb_81xx); qla2x00_probe_one() 2453 ha->gid_list_info_size = 8; qla2x00_probe_one() 2454 ha->optrom_size = OPTROM_SIZE_82XX; qla2x00_probe_one() 2455 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX; qla2x00_probe_one() 2456 ha->isp_ops = &qla82xx_isp_ops; qla2x00_probe_one() 2457 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF; qla2x00_probe_one() 2458 ha->flash_data_off = FARX_ACCESS_FLASH_DATA; qla2x00_probe_one() 2459 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF; qla2x00_probe_one() 2460 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA; qla2x00_probe_one() 2461 } else if (IS_QLA8044(ha)) { qla2x00_probe_one() 2462 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400; qla2x00_probe_one() 2463 ha->mbx_count = MAILBOX_REGISTER_COUNT; qla2x00_probe_one() 2466 ha->max_loop_id = SNS_LAST_LOOP_ID_2300; qla2x00_probe_one() 2467 ha->init_cb_size = sizeof(struct mid_init_cb_81xx); qla2x00_probe_one() 2468 ha->gid_list_info_size = 8; qla2x00_probe_one() 2469 ha->optrom_size = OPTROM_SIZE_83XX; qla2x00_probe_one() 2470 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX; qla2x00_probe_one() 2471 ha->isp_ops = &qla8044_isp_ops; qla2x00_probe_one() 2472 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF; qla2x00_probe_one() 2473 ha->flash_data_off = FARX_ACCESS_FLASH_DATA; qla2x00_probe_one() 2474 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF; qla2x00_probe_one() 2475 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA; qla2x00_probe_one() 2476 } else if (IS_QLA83XX(ha)) { qla2x00_probe_one() 2477 ha->portnum = PCI_FUNC(ha->pdev->devfn); qla2x00_probe_one() 2478 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400; qla2x00_probe_one() 2479 ha->mbx_count = MAILBOX_REGISTER_COUNT; qla2x00_probe_one() 2482 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX; qla2x00_probe_one() 2483 ha->max_loop_id = SNS_LAST_LOOP_ID_2300; qla2x00_probe_one() 2484 ha->init_cb_size = sizeof(struct mid_init_cb_81xx); qla2x00_probe_one() 2485 ha->gid_list_info_size = 8; qla2x00_probe_one() 2486 ha->optrom_size = OPTROM_SIZE_83XX; qla2x00_probe_one() 2487 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX; qla2x00_probe_one() 2488 ha->isp_ops = &qla83xx_isp_ops; qla2x00_probe_one() 2489 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX; qla2x00_probe_one() 2490 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX; qla2x00_probe_one() 2491 ha->nvram_conf_off = ~0; qla2x00_probe_one() 2492 ha->nvram_data_off = ~0; qla2x00_probe_one() 2493 } else if (IS_QLAFX00(ha)) { qla2x00_probe_one() 2494 ha->max_fibre_devices = MAX_FIBRE_DEVICES_FX00; qla2x00_probe_one() 2495 ha->mbx_count = MAILBOX_REGISTER_COUNT_FX00; qla2x00_probe_one() 2496 ha->aen_mbx_count = AEN_MAILBOX_REGISTER_COUNT_FX00; qla2x00_probe_one() 2499 ha->isp_ops = &qlafx00_isp_ops; qla2x00_probe_one() 2500 ha->port_down_retry_count = 30; /* default value */ qla2x00_probe_one() 2501 ha->mr.fw_hbt_cnt = QLAFX00_HEARTBEAT_INTERVAL; qla2x00_probe_one() 2502 ha->mr.fw_reset_timer_tick = QLAFX00_RESET_INTERVAL; qla2x00_probe_one() 2503 ha->mr.fw_critemp_timer_tick = QLAFX00_CRITEMP_INTERVAL; qla2x00_probe_one() 2504 ha->mr.fw_hbt_en = 1; qla2x00_probe_one() 2505 ha->mr.host_info_resend = false; qla2x00_probe_one() 2506 ha->mr.hinfo_resend_timer_tick = QLAFX00_HINFO_RESEND_INTERVAL; qla2x00_probe_one() 2507 } else if (IS_QLA27XX(ha)) { qla2x00_probe_one() 2508 ha->portnum = PCI_FUNC(ha->pdev->devfn); qla2x00_probe_one() 2509 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400; qla2x00_probe_one() 2510 ha->mbx_count = MAILBOX_REGISTER_COUNT; qla2x00_probe_one() 2513 ha->max_loop_id = SNS_LAST_LOOP_ID_2300; qla2x00_probe_one() 2514 ha->init_cb_size = sizeof(struct mid_init_cb_81xx); qla2x00_probe_one() 2515 ha->gid_list_info_size = 8; qla2x00_probe_one() 2516 ha->optrom_size = OPTROM_SIZE_83XX; qla2x00_probe_one() 2517 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX; qla2x00_probe_one() 2518 ha->isp_ops = &qla27xx_isp_ops; qla2x00_probe_one() 2519 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX; qla2x00_probe_one() 2520 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX; qla2x00_probe_one() 2521 ha->nvram_conf_off = ~0; qla2x00_probe_one() 2522 ha->nvram_data_off = ~0; qla2x00_probe_one() 2530 ha->mbx_count, req_length, rsp_length, ha->max_loop_id, qla2x00_probe_one() 2531 ha->init_cb_size, ha->gid_list_info_size, ha->optrom_size, qla2x00_probe_one() 2532 ha->nvram_npiv_size, ha->max_fibre_devices); qla2x00_probe_one() 2536 ha->isp_ops, ha->flash_conf_off, ha->flash_data_off, qla2x00_probe_one() 2537 ha->nvram_conf_off, ha->nvram_data_off); qla2x00_probe_one() 2540 ret = ha->isp_ops->iospace_config(ha); qla2x00_probe_one() 2546 pdev->device, pdev->irq, ha->iobase); qla2x00_probe_one() 2547 mutex_init(&ha->vport_lock); qla2x00_probe_one() 2548 init_completion(&ha->mbx_cmd_comp); qla2x00_probe_one() 2549 complete(&ha->mbx_cmd_comp); qla2x00_probe_one() 2550 init_completion(&ha->mbx_intr_comp); qla2x00_probe_one() 2551 init_completion(&ha->dcbx_comp); qla2x00_probe_one() 2552 init_completion(&ha->lb_portup_comp); qla2x00_probe_one() 2554 set_bit(0, (unsigned long *) ha->vp_idx_map); qla2x00_probe_one() 2556 qla2x00_config_dma_addressing(ha); qla2x00_probe_one() 2559 ha->flags.enable_64bit_addressing ? "enable" : qla2x00_probe_one() 2561 ret = qla2x00_mem_alloc(ha, req_length, rsp_length, &req, &rsp); qla2x00_probe_one() 2574 base_vha = qla2x00_create_host(sht, ha); qla2x00_probe_one() 2577 qla2x00_mem_free(ha); qla2x00_probe_one() 2578 qla2x00_free_req_que(ha, req); qla2x00_probe_one() 2579 qla2x00_free_rsp_que(ha, rsp); qla2x00_probe_one() 2588 if (IS_QLA2XXX_MIDTYPE(ha)) qla2x00_probe_one() 2595 ha->mr.fcport.vha = base_vha; qla2x00_probe_one() 2596 ha->mr.fcport.port_type = FCT_UNKNOWN; qla2x00_probe_one() 2597 ha->mr.fcport.loop_id = FC_NO_LOOP_ID; qla2x00_probe_one() 2598 qla2x00_set_fcport_state(&ha->mr.fcport, FCS_UNCONFIGURED); qla2x00_probe_one() 2599 ha->mr.fcport.supported_classes = FC_COS_UNSPECIFIED; qla2x00_probe_one() 2600 ha->mr.fcport.scan_state = 1; qla2x00_probe_one() 2603 if (!IS_FWI2_CAPABLE(ha)) { qla2x00_probe_one() 2604 if (IS_QLA2100(ha)) qla2x00_probe_one() 2607 if (!IS_QLA82XX(ha)) qla2x00_probe_one() 2610 host->max_id = ha->max_fibre_devices; qla2x00_probe_one() 2613 if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) qla2x00_probe_one() 2619 if (!IS_QLAFX00(ha) && !IS_FWI2_CAPABLE(ha) && qla2x00_probe_one() 2637 if (!qla2x00_alloc_queues(ha, req, rsp)) { qla2x00_probe_one() 2644 qlt_probe_one_stage1(base_vha, ha); qla2x00_probe_one() 2647 ret = qla2x00_request_irqs(ha, rsp); qla2x00_probe_one() 2657 if (IS_QLAFX00(ha)) { qla2x00_probe_one() 2658 ha->rsp_q_map[0] = rsp; qla2x00_probe_one() 2659 ha->req_q_map[0] = req; qla2x00_probe_one() 2660 set_bit(0, ha->req_qid_map); qla2x00_probe_one() 2661 set_bit(0, ha->rsp_qid_map); qla2x00_probe_one() 2665 req->req_q_in = &ha->iobase->isp24.req_q_in; qla2x00_probe_one() 2666 req->req_q_out = &ha->iobase->isp24.req_q_out; qla2x00_probe_one() 2667 rsp->rsp_q_in = &ha->iobase->isp24.rsp_q_in; qla2x00_probe_one() 2668 rsp->rsp_q_out = &ha->iobase->isp24.rsp_q_out; qla2x00_probe_one() 2669 if (ha->mqenable || IS_QLA83XX(ha) || IS_QLA27XX(ha)) { qla2x00_probe_one() 2670 req->req_q_in = &ha->mqiobase->isp25mq.req_q_in; qla2x00_probe_one() 2671 req->req_q_out = &ha->mqiobase->isp25mq.req_q_out; qla2x00_probe_one() 2672 rsp->rsp_q_in = &ha->mqiobase->isp25mq.rsp_q_in; qla2x00_probe_one() 2673 rsp->rsp_q_out = &ha->mqiobase->isp25mq.rsp_q_out; qla2x00_probe_one() 2676 if (IS_QLAFX00(ha)) { qla2x00_probe_one() 2677 req->req_q_in = &ha->iobase->ispfx00.req_q_in; qla2x00_probe_one() 2678 req->req_q_out = &ha->iobase->ispfx00.req_q_out; qla2x00_probe_one() 2679 rsp->rsp_q_in = &ha->iobase->ispfx00.rsp_q_in; qla2x00_probe_one() 2680 rsp->rsp_q_out = &ha->iobase->ispfx00.rsp_q_out; qla2x00_probe_one() 2683 if (IS_P3P_TYPE(ha)) { qla2x00_probe_one() 2684 req->req_q_out = &ha->iobase->isp82.req_q_out[0]; qla2x00_probe_one() 2685 rsp->rsp_q_in = &ha->iobase->isp82.rsp_q_in[0]; qla2x00_probe_one() 2686 rsp->rsp_q_out = &ha->iobase->isp82.rsp_q_out[0]; qla2x00_probe_one() 2691 ha->rsp_q_map, ha->req_q_map, rsp->req, req->rsp); qla2x00_probe_one() 2699 ha->rsp_q_map, ha->req_q_map, rsp->req, req->rsp); qla2x00_probe_one() 2704 if (ha->isp_ops->initialize_adapter(base_vha)) { qla2x00_probe_one() 2709 if (IS_QLA82XX(ha)) { qla2x00_probe_one() 2710 qla82xx_idc_lock(ha); qla2x00_probe_one() 2711 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE, qla2x00_probe_one() 2713 qla82xx_idc_unlock(ha); qla2x00_probe_one() 2716 } else if (IS_QLA8044(ha)) { qla2x00_probe_one() 2717 qla8044_idc_lock(ha); qla2x00_probe_one() 2721 qla8044_idc_unlock(ha); qla2x00_probe_one() 2730 if (IS_QLAFX00(ha)) qla2x00_probe_one() 2740 if (ha->mqenable) { qla2x00_probe_one() 2748 if (ha->flags.running_gold_fw) qla2x00_probe_one() 2754 ha->dpc_thread = kthread_create(qla2x00_do_dpc, ha, qla2x00_probe_one() 2756 if (IS_ERR(ha->dpc_thread)) { qla2x00_probe_one() 2759 ret = PTR_ERR(ha->dpc_thread); qla2x00_probe_one() 2773 INIT_WORK(&ha->board_disable, qla2x00_disable_board_on_pci_error); qla2x00_probe_one() 2775 if (IS_QLA8031(ha) || IS_MCTP_CAPABLE(ha)) { qla2x00_probe_one() 2777 ha->dpc_lp_wq = create_singlethread_workqueue(wq_name); qla2x00_probe_one() 2778 INIT_WORK(&ha->idc_aen, qla83xx_service_idc_aen); qla2x00_probe_one() 2781 ha->dpc_hp_wq = create_singlethread_workqueue(wq_name); qla2x00_probe_one() 2782 INIT_WORK(&ha->nic_core_reset, qla83xx_nic_core_reset_work); qla2x00_probe_one() 2783 INIT_WORK(&ha->idc_state_handler, qla2x00_probe_one() 2785 INIT_WORK(&ha->nic_core_unrecoverable, qla2x00_probe_one() 2790 list_add_tail(&base_vha->list, &ha->vp_list); qla2x00_probe_one() 2791 base_vha->host->irq = ha->pdev->irq; qla2x00_probe_one() 2800 ha); qla2x00_probe_one() 2802 if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) { qla2x00_probe_one() 2803 if (ha->fw_attributes & BIT_4) { qla2x00_probe_one() 2820 if (IS_PI_IPGUARD_CAPABLE(ha) && qla2x00_probe_one() 2821 (ql2xenabledif > 1 || IS_PI_DIFB_DIX0_CAPABLE(ha))) qla2x00_probe_one() 2829 ha->isp_ops->enable_intrs(ha); qla2x00_probe_one() 2831 if (IS_QLAFX00(ha)) { qla2x00_probe_one() 2834 host->sg_tablesize = (ha->mr.extended_io_enabled) ? qla2x00_probe_one() 2844 ha->prev_minidump_failed = 0; qla2x00_probe_one() 2857 if (IS_QLAFX00(ha)) { qla2x00_probe_one() 2871 "QLogic %s - %s.\n", ha->model_number, ha->model_desc); qla2x00_probe_one() 2874 pdev->device, ha->isp_ops->pci_info_str(base_vha, pci_info), qla2x00_probe_one() 2875 pci_name(pdev), ha->flags.enable_64bit_addressing ? '+' : '-', qla2x00_probe_one() 2877 ha->isp_ops->fw_version_str(base_vha, fw_str, sizeof(fw_str))); qla2x00_probe_one() 2879 qlt_add_target(ha, base_vha); qla2x00_probe_one() 2885 qla2x00_free_req_que(ha, req); qla2x00_probe_one() 2886 ha->req_q_map[0] = NULL; qla2x00_probe_one() 2887 clear_bit(0, ha->req_qid_map); qla2x00_probe_one() 2888 qla2x00_free_rsp_que(ha, rsp); qla2x00_probe_one() 2889 ha->rsp_q_map[0] = NULL; qla2x00_probe_one() 2890 clear_bit(0, ha->rsp_qid_map); qla2x00_probe_one() 2891 ha->max_req_queues = ha->max_rsp_queues = 0; qla2x00_probe_one() 2897 if (ha->dpc_thread) { qla2x00_probe_one() 2898 struct task_struct *t = ha->dpc_thread; qla2x00_probe_one() 2900 ha->dpc_thread = NULL; qla2x00_probe_one() 2909 qla2x00_clear_drv_active(ha); qla2x00_probe_one() 2912 if (IS_P3P_TYPE(ha)) { qla2x00_probe_one() 2913 if (!ha->nx_pcibase) qla2x00_probe_one() 2914 iounmap((device_reg_t *)ha->nx_pcibase); qla2x00_probe_one() 2916 iounmap((device_reg_t *)ha->nxdb_wr_ptr); qla2x00_probe_one() 2918 if (ha->iobase) qla2x00_probe_one() 2919 iounmap(ha->iobase); qla2x00_probe_one() 2920 if (ha->cregbase) qla2x00_probe_one() 2921 iounmap(ha->cregbase); qla2x00_probe_one() 2923 pci_release_selected_regions(ha->pdev, ha->bars); qla2x00_probe_one() 2924 kfree(ha); qla2x00_probe_one() 2925 ha = NULL; qla2x00_probe_one() 2936 struct qla_hw_data *ha; qla2x00_shutdown() local 2942 ha = vha->hw; qla2x00_shutdown() 2945 if (IS_QLAFX00(ha)) qla2x00_shutdown() 2949 if (ha->flags.fce_enabled) { qla2x00_shutdown() 2951 ha->flags.fce_enabled = 0; qla2x00_shutdown() 2955 if (ha->eft) qla2x00_shutdown() 2965 if (ha->interrupts_on) { qla2x00_shutdown() 2967 ha->isp_ops->disable_intrs(ha); qla2x00_shutdown() 2972 qla2x00_free_fw_dump(ha); qla2x00_shutdown() 2978 /* Deletes all the virtual ports for a given ha */ 2980 qla2x00_delete_all_vps(struct qla_hw_data *ha, scsi_qla_host_t *base_vha) qla2x00_delete_all_vps() argument 2986 mutex_lock(&ha->vport_lock); qla2x00_delete_all_vps() 2987 while (ha->cur_vport_count) { qla2x00_delete_all_vps() 2988 spin_lock_irqsave(&ha->vport_slock, flags); qla2x00_delete_all_vps() 2990 BUG_ON(base_vha->list.next == &ha->vp_list); qla2x00_delete_all_vps() 2991 /* This assumes first entry in ha->vp_list is always base vha */ qla2x00_delete_all_vps() 2995 spin_unlock_irqrestore(&ha->vport_slock, flags); qla2x00_delete_all_vps() 2996 mutex_unlock(&ha->vport_lock); qla2x00_delete_all_vps() 3001 mutex_lock(&ha->vport_lock); qla2x00_delete_all_vps() 3003 mutex_unlock(&ha->vport_lock); qla2x00_delete_all_vps() 3008 qla2x00_destroy_deferred_work(struct qla_hw_data *ha) qla2x00_destroy_deferred_work() argument 3011 if (ha->wq) { qla2x00_destroy_deferred_work() 3012 flush_workqueue(ha->wq); qla2x00_destroy_deferred_work() 3013 destroy_workqueue(ha->wq); qla2x00_destroy_deferred_work() 3014 ha->wq = NULL; qla2x00_destroy_deferred_work() 3018 if (ha->dpc_lp_wq) { qla2x00_destroy_deferred_work() 3019 cancel_work_sync(&ha->idc_aen); qla2x00_destroy_deferred_work() 3020 destroy_workqueue(ha->dpc_lp_wq); qla2x00_destroy_deferred_work() 3021 ha->dpc_lp_wq = NULL; qla2x00_destroy_deferred_work() 3024 if (ha->dpc_hp_wq) { qla2x00_destroy_deferred_work() 3025 cancel_work_sync(&ha->nic_core_reset); qla2x00_destroy_deferred_work() 3026 cancel_work_sync(&ha->idc_state_handler); qla2x00_destroy_deferred_work() 3027 cancel_work_sync(&ha->nic_core_unrecoverable); qla2x00_destroy_deferred_work() 3028 destroy_workqueue(ha->dpc_hp_wq); qla2x00_destroy_deferred_work() 3029 ha->dpc_hp_wq = NULL; qla2x00_destroy_deferred_work() 3033 if (ha->dpc_thread) { qla2x00_destroy_deferred_work() 3034 struct task_struct *t = ha->dpc_thread; qla2x00_destroy_deferred_work() 3040 ha->dpc_thread = NULL; qla2x00_destroy_deferred_work() 3046 qla2x00_unmap_iobases(struct qla_hw_data *ha) qla2x00_unmap_iobases() argument 3048 if (IS_QLA82XX(ha)) { qla2x00_unmap_iobases() 3050 iounmap((device_reg_t *)ha->nx_pcibase); qla2x00_unmap_iobases() 3052 iounmap((device_reg_t *)ha->nxdb_wr_ptr); qla2x00_unmap_iobases() 3054 if (ha->iobase) qla2x00_unmap_iobases() 3055 iounmap(ha->iobase); qla2x00_unmap_iobases() 3057 if (ha->cregbase) qla2x00_unmap_iobases() 3058 iounmap(ha->cregbase); qla2x00_unmap_iobases() 3060 if (ha->mqiobase) qla2x00_unmap_iobases() 3061 iounmap(ha->mqiobase); qla2x00_unmap_iobases() 3063 if ((IS_QLA83XX(ha) || IS_QLA27XX(ha)) && ha->msixbase) qla2x00_unmap_iobases() 3064 iounmap(ha->msixbase); qla2x00_unmap_iobases() 3069 qla2x00_clear_drv_active(struct qla_hw_data *ha) qla2x00_clear_drv_active() argument 3071 if (IS_QLA8044(ha)) { qla2x00_clear_drv_active() 3072 qla8044_idc_lock(ha); qla2x00_clear_drv_active() 3073 qla8044_clear_drv_active(ha); qla2x00_clear_drv_active() 3074 qla8044_idc_unlock(ha); qla2x00_clear_drv_active() 3075 } else if (IS_QLA82XX(ha)) { qla2x00_clear_drv_active() 3076 qla82xx_idc_lock(ha); qla2x00_clear_drv_active() 3077 qla82xx_clear_drv_active(ha); qla2x00_clear_drv_active() 3078 qla82xx_idc_unlock(ha); qla2x00_clear_drv_active() 3086 struct qla_hw_data *ha; qla2x00_remove_one() local 3089 ha = base_vha->hw; qla2x00_remove_one() 3094 cancel_work_sync(&ha->board_disable); qla2x00_remove_one() 3103 kfree(ha); qla2x00_remove_one() 3112 if (IS_QLAFX00(ha)) qla2x00_remove_one() 3115 qla2x00_delete_all_vps(ha, base_vha); qla2x00_remove_one() 3117 if (IS_QLA8031(ha)) { qla2x00_remove_one() 3132 if (IS_QLA2031(ha)) qla2x00_remove_one() 3141 qla2x00_destroy_deferred_work(ha); qla2x00_remove_one() 3143 qlt_remove_target(ha, base_vha); qla2x00_remove_one() 3153 qla2x00_clear_drv_active(ha); qla2x00_remove_one() 3157 qla2x00_unmap_iobases(ha); qla2x00_remove_one() 3159 pci_release_selected_regions(ha->pdev, ha->bars); qla2x00_remove_one() 3160 kfree(ha); qla2x00_remove_one() 3161 ha = NULL; qla2x00_remove_one() 3171 struct qla_hw_data *ha = vha->hw; qla2x00_free_device() local 3181 if (ha->flags.fce_enabled) qla2x00_free_device() 3184 if (ha->eft) qla2x00_free_device() 3193 if (ha->interrupts_on) { qla2x00_free_device() 3195 ha->isp_ops->disable_intrs(ha); qla2x00_free_device() 3202 qla2x00_mem_free(ha); qla2x00_free_device() 3206 qla2x00_free_queues(ha); qla2x00_free_device() 3252 * Input: ha = adapter block pointer. fcport = port structure pointer. 3297 * ha = adapter block pointer. 3339 qla2x00_mem_alloc(struct qla_hw_data *ha, uint16_t req_len, uint16_t rsp_len, qla2x00_mem_alloc() argument 3344 ha->init_cb = dma_alloc_coherent(&ha->pdev->dev, ha->init_cb_size, qla2x00_mem_alloc() 3345 &ha->init_cb_dma, GFP_KERNEL); qla2x00_mem_alloc() 3346 if (!ha->init_cb) qla2x00_mem_alloc() 3349 if (qlt_mem_alloc(ha) < 0) qla2x00_mem_alloc() 3352 ha->gid_list = dma_alloc_coherent(&ha->pdev->dev, qla2x00_mem_alloc() 3353 qla2x00_gid_list_size(ha), &ha->gid_list_dma, GFP_KERNEL); qla2x00_mem_alloc() 3354 if (!ha->gid_list) qla2x00_mem_alloc() 3357 ha->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep); qla2x00_mem_alloc() 3358 if (!ha->srb_mempool) qla2x00_mem_alloc() 3361 if (IS_P3P_TYPE(ha)) { qla2x00_mem_alloc() 3370 ha->ctx_mempool = mempool_create_slab_pool(SRB_MIN_REQ, qla2x00_mem_alloc() 3372 if (!ha->ctx_mempool) qla2x00_mem_alloc() 3374 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0021, qla2x00_mem_alloc() 3376 ctx_cachep, ha->ctx_mempool); qla2x00_mem_alloc() 3380 ha->nvram = kzalloc(MAX_NVRAM_SIZE, GFP_KERNEL); qla2x00_mem_alloc() 3381 if (!ha->nvram) qla2x00_mem_alloc() 3385 ha->pdev->device); qla2x00_mem_alloc() 3386 ha->s_dma_pool = dma_pool_create(name, &ha->pdev->dev, qla2x00_mem_alloc() 3388 if (!ha->s_dma_pool) qla2x00_mem_alloc() 3391 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0022, qla2x00_mem_alloc() 3393 ha->init_cb, ha->gid_list, ha->srb_mempool, ha->s_dma_pool); qla2x00_mem_alloc() 3395 if (IS_P3P_TYPE(ha) || ql2xenabledif) { qla2x00_mem_alloc() 3396 ha->dl_dma_pool = dma_pool_create(name, &ha->pdev->dev, qla2x00_mem_alloc() 3398 if (!ha->dl_dma_pool) { qla2x00_mem_alloc() 3399 ql_log_pci(ql_log_fatal, ha->pdev, 0x0023, qla2x00_mem_alloc() 3404 ha->fcp_cmnd_dma_pool = dma_pool_create(name, &ha->pdev->dev, qla2x00_mem_alloc() 3406 if (!ha->fcp_cmnd_dma_pool) { qla2x00_mem_alloc() 3407 ql_log_pci(ql_log_fatal, ha->pdev, 0x0024, qla2x00_mem_alloc() 3411 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0025, qla2x00_mem_alloc() 3413 ha->dl_dma_pool, ha->fcp_cmnd_dma_pool); qla2x00_mem_alloc() 3417 if (IS_QLA2100(ha) || IS_QLA2200(ha)) { qla2x00_mem_alloc() 3419 ha->sns_cmd = dma_alloc_coherent(&ha->pdev->dev, qla2x00_mem_alloc() 3420 sizeof(struct sns_cmd_pkt), &ha->sns_cmd_dma, GFP_KERNEL); qla2x00_mem_alloc() 3421 if (!ha->sns_cmd) qla2x00_mem_alloc() 3423 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0026, qla2x00_mem_alloc() 3424 "sns_cmd: %p.\n", ha->sns_cmd); qla2x00_mem_alloc() 3427 ha->ms_iocb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, qla2x00_mem_alloc() 3428 &ha->ms_iocb_dma); qla2x00_mem_alloc() 3429 if (!ha->ms_iocb) qla2x00_mem_alloc() 3432 ha->ct_sns = dma_alloc_coherent(&ha->pdev->dev, qla2x00_mem_alloc() 3433 sizeof(struct ct_sns_pkt), &ha->ct_sns_dma, GFP_KERNEL); qla2x00_mem_alloc() 3434 if (!ha->ct_sns) qla2x00_mem_alloc() 3436 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0027, qla2x00_mem_alloc() 3438 ha->ms_iocb, ha->ct_sns); qla2x00_mem_alloc() 3444 ql_log_pci(ql_log_fatal, ha->pdev, 0x0028, qla2x00_mem_alloc() 3449 (*req)->ring = dma_alloc_coherent(&ha->pdev->dev, qla2x00_mem_alloc() 3453 ql_log_pci(ql_log_fatal, ha->pdev, 0x0029, qla2x00_mem_alloc() 3460 ql_log_pci(ql_log_fatal, ha->pdev, 0x002a, qla2x00_mem_alloc() 3464 (*rsp)->hw = ha; qla2x00_mem_alloc() 3466 (*rsp)->ring = dma_alloc_coherent(&ha->pdev->dev, qla2x00_mem_alloc() 3470 ql_log_pci(ql_log_fatal, ha->pdev, 0x002b, qla2x00_mem_alloc() 3476 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002c, qla2x00_mem_alloc() 3482 if (ha->nvram_npiv_size) { qla2x00_mem_alloc() 3483 ha->npiv_info = kzalloc(sizeof(struct qla_npiv_entry) * qla2x00_mem_alloc() 3484 ha->nvram_npiv_size, GFP_KERNEL); qla2x00_mem_alloc() 3485 if (!ha->npiv_info) { qla2x00_mem_alloc() 3486 ql_log_pci(ql_log_fatal, ha->pdev, 0x002d, qla2x00_mem_alloc() 3491 ha->npiv_info = NULL; qla2x00_mem_alloc() 3494 if (IS_CNA_CAPABLE(ha) || IS_QLA2031(ha) || IS_QLA27XX(ha)) { qla2x00_mem_alloc() 3495 ha->ex_init_cb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, qla2x00_mem_alloc() 3496 &ha->ex_init_cb_dma); qla2x00_mem_alloc() 3497 if (!ha->ex_init_cb) qla2x00_mem_alloc() 3499 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002e, qla2x00_mem_alloc() 3500 "ex_init_cb=%p.\n", ha->ex_init_cb); qla2x00_mem_alloc() 3503 INIT_LIST_HEAD(&ha->gbl_dsd_list); qla2x00_mem_alloc() 3506 if (!IS_FWI2_CAPABLE(ha)) { qla2x00_mem_alloc() 3507 ha->async_pd = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, qla2x00_mem_alloc() 3508 &ha->async_pd_dma); qla2x00_mem_alloc() 3509 if (!ha->async_pd) qla2x00_mem_alloc() 3511 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002f, qla2x00_mem_alloc() 3512 "async_pd=%p.\n", ha->async_pd); qla2x00_mem_alloc() 3515 INIT_LIST_HEAD(&ha->vp_list); qla2x00_mem_alloc() 3518 ha->loop_id_map = kzalloc(BITS_TO_LONGS(LOOPID_MAP_SIZE) * sizeof(long), qla2x00_mem_alloc() 3520 if (!ha->loop_id_map) qla2x00_mem_alloc() 3523 qla2x00_set_reserved_loop_ids(ha); qla2x00_mem_alloc() 3524 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0123, qla2x00_mem_alloc() 3525 "loop_id_map=%p.\n", ha->loop_id_map); qla2x00_mem_alloc() 3531 dma_pool_free(ha->s_dma_pool, ha->ex_init_cb, ha->ex_init_cb_dma); qla2x00_mem_alloc() 3533 kfree(ha->npiv_info); qla2x00_mem_alloc() 3535 dma_free_coherent(&ha->pdev->dev, ((*rsp)->length + 1) * qla2x00_mem_alloc() 3542 dma_free_coherent(&ha->pdev->dev, ((*req)->length + 1) * qla2x00_mem_alloc() 3549 dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt), qla2x00_mem_alloc() 3550 ha->ct_sns, ha->ct_sns_dma); qla2x00_mem_alloc() 3551 ha->ct_sns = NULL; qla2x00_mem_alloc() 3552 ha->ct_sns_dma = 0; qla2x00_mem_alloc() 3554 dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma); qla2x00_mem_alloc() 3555 ha->ms_iocb = NULL; qla2x00_mem_alloc() 3556 ha->ms_iocb_dma = 0; qla2x00_mem_alloc() 3558 if (IS_QLA82XX(ha) || ql2xenabledif) { qla2x00_mem_alloc() 3559 dma_pool_destroy(ha->fcp_cmnd_dma_pool); qla2x00_mem_alloc() 3560 ha->fcp_cmnd_dma_pool = NULL; qla2x00_mem_alloc() 3563 if (IS_QLA82XX(ha) || ql2xenabledif) { qla2x00_mem_alloc() 3564 dma_pool_destroy(ha->dl_dma_pool); qla2x00_mem_alloc() 3565 ha->dl_dma_pool = NULL; qla2x00_mem_alloc() 3568 dma_pool_destroy(ha->s_dma_pool); qla2x00_mem_alloc() 3569 ha->s_dma_pool = NULL; qla2x00_mem_alloc() 3571 kfree(ha->nvram); qla2x00_mem_alloc() 3572 ha->nvram = NULL; qla2x00_mem_alloc() 3574 mempool_destroy(ha->ctx_mempool); qla2x00_mem_alloc() 3575 ha->ctx_mempool = NULL; qla2x00_mem_alloc() 3577 mempool_destroy(ha->srb_mempool); qla2x00_mem_alloc() 3578 ha->srb_mempool = NULL; qla2x00_mem_alloc() 3580 dma_free_coherent(&ha->pdev->dev, qla2x00_gid_list_size(ha), qla2x00_mem_alloc() 3581 ha->gid_list, qla2x00_mem_alloc() 3582 ha->gid_list_dma); qla2x00_mem_alloc() 3583 ha->gid_list = NULL; qla2x00_mem_alloc() 3584 ha->gid_list_dma = 0; qla2x00_mem_alloc() 3586 qlt_mem_free(ha); qla2x00_mem_alloc() 3588 dma_free_coherent(&ha->pdev->dev, ha->init_cb_size, ha->init_cb, qla2x00_mem_alloc() 3589 ha->init_cb_dma); qla2x00_mem_alloc() 3590 ha->init_cb = NULL; qla2x00_mem_alloc() 3591 ha->init_cb_dma = 0; qla2x00_mem_alloc() 3603 * ha = adapter block pointer 3606 qla2x00_free_fw_dump(struct qla_hw_data *ha) qla2x00_free_fw_dump() argument 3608 if (ha->fce) qla2x00_free_fw_dump() 3609 dma_free_coherent(&ha->pdev->dev, qla2x00_free_fw_dump() 3610 FCE_SIZE, ha->fce, ha->fce_dma); qla2x00_free_fw_dump() 3612 if (ha->eft) qla2x00_free_fw_dump() 3613 dma_free_coherent(&ha->pdev->dev, qla2x00_free_fw_dump() 3614 EFT_SIZE, ha->eft, ha->eft_dma); qla2x00_free_fw_dump() 3616 if (ha->fw_dump) qla2x00_free_fw_dump() 3617 vfree(ha->fw_dump); qla2x00_free_fw_dump() 3618 if (ha->fw_dump_template) qla2x00_free_fw_dump() 3619 vfree(ha->fw_dump_template); qla2x00_free_fw_dump() 3621 ha->fce = NULL; qla2x00_free_fw_dump() 3622 ha->fce_dma = 0; qla2x00_free_fw_dump() 3623 ha->eft = NULL; qla2x00_free_fw_dump() 3624 ha->eft_dma = 0; qla2x00_free_fw_dump() 3625 ha->fw_dumped = 0; qla2x00_free_fw_dump() 3626 ha->fw_dump_cap_flags = 0; qla2x00_free_fw_dump() 3627 ha->fw_dump_reading = 0; qla2x00_free_fw_dump() 3628 ha->fw_dump = NULL; qla2x00_free_fw_dump() 3629 ha->fw_dump_len = 0; qla2x00_free_fw_dump() 3630 ha->fw_dump_template = NULL; qla2x00_free_fw_dump() 3631 ha->fw_dump_template_len = 0; qla2x00_free_fw_dump() 3639 * ha = adapter block pointer. 3642 qla2x00_mem_free(struct qla_hw_data *ha) qla2x00_mem_free() argument 3644 qla2x00_free_fw_dump(ha); qla2x00_mem_free() 3646 if (ha->mctp_dump) qla2x00_mem_free() 3647 dma_free_coherent(&ha->pdev->dev, MCTP_DUMP_SIZE, ha->mctp_dump, qla2x00_mem_free() 3648 ha->mctp_dump_dma); qla2x00_mem_free() 3650 if (ha->srb_mempool) qla2x00_mem_free() 3651 mempool_destroy(ha->srb_mempool); qla2x00_mem_free() 3653 if (ha->dcbx_tlv) qla2x00_mem_free() 3654 dma_free_coherent(&ha->pdev->dev, DCBX_TLV_DATA_SIZE, qla2x00_mem_free() 3655 ha->dcbx_tlv, ha->dcbx_tlv_dma); qla2x00_mem_free() 3657 if (ha->xgmac_data) qla2x00_mem_free() 3658 dma_free_coherent(&ha->pdev->dev, XGMAC_DATA_SIZE, qla2x00_mem_free() 3659 ha->xgmac_data, ha->xgmac_data_dma); qla2x00_mem_free() 3661 if (ha->sns_cmd) qla2x00_mem_free() 3662 dma_free_coherent(&ha->pdev->dev, sizeof(struct sns_cmd_pkt), qla2x00_mem_free() 3663 ha->sns_cmd, ha->sns_cmd_dma); qla2x00_mem_free() 3665 if (ha->ct_sns) qla2x00_mem_free() 3666 dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt), qla2x00_mem_free() 3667 ha->ct_sns, ha->ct_sns_dma); qla2x00_mem_free() 3669 if (ha->sfp_data) qla2x00_mem_free() 3670 dma_pool_free(ha->s_dma_pool, ha->sfp_data, ha->sfp_data_dma); qla2x00_mem_free() 3672 if (ha->ms_iocb) qla2x00_mem_free() 3673 dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma); qla2x00_mem_free() 3675 if (ha->ex_init_cb) qla2x00_mem_free() 3676 dma_pool_free(ha->s_dma_pool, qla2x00_mem_free() 3677 ha->ex_init_cb, ha->ex_init_cb_dma); qla2x00_mem_free() 3679 if (ha->async_pd) qla2x00_mem_free() 3680 dma_pool_free(ha->s_dma_pool, ha->async_pd, ha->async_pd_dma); qla2x00_mem_free() 3682 if (ha->s_dma_pool) qla2x00_mem_free() 3683 dma_pool_destroy(ha->s_dma_pool); qla2x00_mem_free() 3685 if (ha->gid_list) qla2x00_mem_free() 3686 dma_free_coherent(&ha->pdev->dev, qla2x00_gid_list_size(ha), qla2x00_mem_free() 3687 ha->gid_list, ha->gid_list_dma); qla2x00_mem_free() 3689 if (IS_QLA82XX(ha)) { qla2x00_mem_free() 3690 if (!list_empty(&ha->gbl_dsd_list)) { qla2x00_mem_free() 3695 tdsd_ptr, &ha->gbl_dsd_list, list) { qla2x00_mem_free() 3696 dma_pool_free(ha->dl_dma_pool, qla2x00_mem_free() 3704 if (ha->dl_dma_pool) qla2x00_mem_free() 3705 dma_pool_destroy(ha->dl_dma_pool); qla2x00_mem_free() 3707 if (ha->fcp_cmnd_dma_pool) qla2x00_mem_free() 3708 dma_pool_destroy(ha->fcp_cmnd_dma_pool); qla2x00_mem_free() 3710 if (ha->ctx_mempool) qla2x00_mem_free() 3711 mempool_destroy(ha->ctx_mempool); qla2x00_mem_free() 3713 qlt_mem_free(ha); qla2x00_mem_free() 3715 if (ha->init_cb) qla2x00_mem_free() 3716 dma_free_coherent(&ha->pdev->dev, ha->init_cb_size, qla2x00_mem_free() 3717 ha->init_cb, ha->init_cb_dma); qla2x00_mem_free() 3718 vfree(ha->optrom_buffer); qla2x00_mem_free() 3719 kfree(ha->nvram); qla2x00_mem_free() 3720 kfree(ha->npiv_info); qla2x00_mem_free() 3721 kfree(ha->swl); qla2x00_mem_free() 3722 kfree(ha->loop_id_map); qla2x00_mem_free() 3724 ha->srb_mempool = NULL; qla2x00_mem_free() 3725 ha->ctx_mempool = NULL; qla2x00_mem_free() 3726 ha->sns_cmd = NULL; qla2x00_mem_free() 3727 ha->sns_cmd_dma = 0; qla2x00_mem_free() 3728 ha->ct_sns = NULL; qla2x00_mem_free() 3729 ha->ct_sns_dma = 0; qla2x00_mem_free() 3730 ha->ms_iocb = NULL; qla2x00_mem_free() 3731 ha->ms_iocb_dma = 0; qla2x00_mem_free() 3732 ha->init_cb = NULL; qla2x00_mem_free() 3733 ha->init_cb_dma = 0; qla2x00_mem_free() 3734 ha->ex_init_cb = NULL; qla2x00_mem_free() 3735 ha->ex_init_cb_dma = 0; qla2x00_mem_free() 3736 ha->async_pd = NULL; qla2x00_mem_free() 3737 ha->async_pd_dma = 0; qla2x00_mem_free() 3739 ha->s_dma_pool = NULL; qla2x00_mem_free() 3740 ha->dl_dma_pool = NULL; qla2x00_mem_free() 3741 ha->fcp_cmnd_dma_pool = NULL; qla2x00_mem_free() 3743 ha->gid_list = NULL; qla2x00_mem_free() 3744 ha->gid_list_dma = 0; qla2x00_mem_free() 3746 ha->tgt.atio_ring = NULL; qla2x00_mem_free() 3747 ha->tgt.atio_dma = 0; qla2x00_mem_free() 3748 ha->tgt.tgt_vp_map = NULL; qla2x00_mem_free() 3752 struct qla_hw_data *ha) qla2x00_create_host() 3759 ql_log_pci(ql_log_fatal, ha->pdev, 0x0107, qla2x00_create_host() 3770 vha->hw = ha; qla2x00_create_host() 3785 dev_name(&(ha->pdev->dev))); qla2x00_create_host() 3997 struct qla_hw_data *ha = vha->hw; qla2x00_relogin() local 4010 ha->isp_ops->fabric_logout(vha, qla2x00_relogin() 4018 ha->min_external_loopid; qla2x00_relogin() 4027 if (IS_ALOGIO_CAPABLE(ha)) { qla2x00_relogin() 4090 struct qla_hw_data *ha = base_vha->hw; qla83xx_schedule_work() local 4094 if (ha->dpc_lp_wq) qla83xx_schedule_work() 4095 queue_work(ha->dpc_lp_wq, &ha->idc_aen); qla83xx_schedule_work() 4099 if (!ha->flags.nic_core_reset_hdlr_active) { qla83xx_schedule_work() 4100 if (ha->dpc_hp_wq) qla83xx_schedule_work() 4101 queue_work(ha->dpc_hp_wq, &ha->nic_core_reset); qla83xx_schedule_work() 4108 if (ha->dpc_hp_wq) qla83xx_schedule_work() 4109 queue_work(ha->dpc_hp_wq, &ha->idc_state_handler); qla83xx_schedule_work() 4112 if (ha->dpc_hp_wq) qla83xx_schedule_work() 4113 queue_work(ha->dpc_hp_wq, &ha->nic_core_unrecoverable); qla83xx_schedule_work() 4127 struct qla_hw_data *ha = qla83xx_nic_core_unrecoverable_work() local 4129 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev); qla83xx_nic_core_unrecoverable_work() 4135 if (ha->flags.nic_core_reset_owner) { qla83xx_nic_core_unrecoverable_work() 4136 ha->flags.nic_core_reset_owner = 0; qla83xx_nic_core_unrecoverable_work() 4149 struct qla_hw_data *ha = qla83xx_idc_state_handler_work() local 4151 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev); qla83xx_idc_state_handler_work() 4195 struct qla_hw_data *ha = qla83xx_nic_core_reset_work() local 4197 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev); qla83xx_nic_core_reset_work() 4200 if (IS_QLA2031(ha)) { qla83xx_nic_core_reset_work() 4207 if (!ha->flags.nic_core_reset_hdlr_active) { qla83xx_nic_core_reset_work() 4220 ha->flags.nic_core_reset_hdlr_active = 1; qla83xx_nic_core_reset_work() 4226 ha->flags.nic_core_reset_hdlr_active = 0; qla83xx_nic_core_reset_work() 4234 struct qla_hw_data *ha = qla83xx_service_idc_aen() local 4236 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev); qla83xx_service_idc_aen() 4287 struct qla_hw_data *ha = base_vha->hw; qla83xx_force_lock_recovery() local 4298 data = (IDC_LOCK_RECOVERY_STAGE1) | (ha->portnum << 2); qla83xx_force_lock_recovery() 4311 if (((data & idc_lck_rcvry_owner_mask) >> 2) == ha->portnum) { qla83xx_force_lock_recovery() 4382 struct qla_hw_data *ha = base_vha->hw; qla83xx_idc_lock() local 4391 ha->portnum); qla83xx_idc_lock() 4435 struct qla_hw_data *ha = base_vha->hw; qla83xx_idc_unlock() local 4444 if (data == ha->portnum) { qla83xx_idc_unlock() 4490 struct qla_hw_data *ha = vha->hw; __qla83xx_set_drv_presence() local 4495 drv_presence |= (1 << ha->portnum); __qla83xx_set_drv_presence() 4519 struct qla_hw_data *ha = vha->hw; __qla83xx_clear_drv_presence() local 4524 drv_presence &= ~(1 << ha->portnum); __qla83xx_clear_drv_presence() 4547 struct qla_hw_data *ha = vha->hw; qla83xx_need_reset_handler() local 4552 ack_timeout = jiffies + (ha->fcoe_reset_timeout * HZ); qla83xx_need_reset_handler() 4620 struct qla_hw_data *ha = base_vha->hw; qla83xx_idc_state_handler() local 4626 dev_init_timeout = jiffies + (ha->fcoe_dev_init_timeout * HZ); qla83xx_idc_state_handler() 4645 if (ha->flags.nic_core_reset_owner) qla83xx_idc_state_handler() 4648 ha->flags.nic_core_reset_owner = 0; qla83xx_idc_state_handler() 4651 ha->portnum); qla83xx_idc_state_handler() 4654 if (ha->flags.nic_core_reset_owner) qla83xx_idc_state_handler() 4670 if (!ql2xdontresethba && ha->flags.nic_core_reset_owner) qla83xx_idc_state_handler() 4680 (ha->fcoe_dev_init_timeout * HZ); qla83xx_idc_state_handler() 4690 if (ha->flags.quiesce_owner) qla83xx_idc_state_handler() 4697 (ha->fcoe_dev_init_timeout * HZ); qla83xx_idc_state_handler() 4700 if (ha->flags.nic_core_reset_owner) qla83xx_idc_state_handler() 4703 ha->flags.nic_core_reset_owner = 0; qla83xx_idc_state_handler() 4733 struct qla_hw_data *ha = container_of(work, struct qla_hw_data, qla2x00_disable_board_on_pci_error() local 4735 struct pci_dev *pdev = ha->pdev; qla2x00_disable_board_on_pci_error() 4736 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev); qla2x00_disable_board_on_pci_error() 4743 qla2x00_delete_all_vps(ha, base_vha); qla2x00_disable_board_on_pci_error() 4756 qla2x00_destroy_deferred_work(ha); qla2x00_disable_board_on_pci_error() 4772 qla2x00_mem_free(ha); qla2x00_disable_board_on_pci_error() 4774 qla2x00_free_queues(ha); qla2x00_disable_board_on_pci_error() 4776 qla2x00_unmap_iobases(ha); qla2x00_disable_board_on_pci_error() 4778 pci_release_selected_regions(ha->pdev, ha->bars); qla2x00_disable_board_on_pci_error() 4805 struct qla_hw_data *ha; qla2x00_do_dpc() local 4807 ha = (struct qla_hw_data *)data; qla2x00_do_dpc() 4808 base_vha = pci_get_drvdata(ha->pdev); qla2x00_do_dpc() 4819 if (!base_vha->flags.init_done || ha->flags.mbox_busy) qla2x00_do_dpc() 4822 if (ha->flags.eeh_busy) { qla2x00_do_dpc() 4824 "eeh_busy=%d.\n", ha->flags.eeh_busy); qla2x00_do_dpc() 4828 ha->dpc_active = 1; qla2x00_do_dpc() 4836 if (IS_P3P_TYPE(ha)) { qla2x00_do_dpc() 4837 if (IS_QLA8044(ha)) { qla2x00_do_dpc() 4840 qla8044_idc_lock(ha); qla2x00_do_dpc() 4844 qla8044_idc_unlock(ha); qla2x00_do_dpc() 4854 qla82xx_idc_lock(ha); qla2x00_do_dpc() 4855 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE, qla2x00_do_dpc() 4857 qla82xx_idc_unlock(ha); qla2x00_do_dpc() 4886 } else if (IS_QLAFX00(ha)) { qla2x00_do_dpc() 4937 if (ha->isp_ops->abort_isp(base_vha)) { qla2x00_do_dpc() 4965 if (IS_QLAFX00(ha)) qla2x00_do_dpc() 4971 if (IS_P3P_TYPE(ha)) { qla2x00_do_dpc() 4972 if (IS_QLA82XX(ha)) qla2x00_do_dpc() 4974 if (IS_QLA8044(ha)) qla2x00_do_dpc() 4978 if (!ha->flags.quiesce_owner) { qla2x00_do_dpc() 4980 if (IS_QLA82XX(ha)) { qla2x00_do_dpc() 4981 qla82xx_idc_lock(ha); qla2x00_do_dpc() 4984 qla82xx_idc_unlock(ha); qla2x00_do_dpc() 4985 } else if (IS_QLA8044(ha)) { qla2x00_do_dpc() 4986 qla8044_idc_lock(ha); qla2x00_do_dpc() 4989 qla8044_idc_unlock(ha); qla2x00_do_dpc() 5045 if (IS_QLAFX00(ha)) qla2x00_do_dpc() 5055 if (!ha->interrupts_on) qla2x00_do_dpc() 5056 ha->isp_ops->enable_intrs(ha); qla2x00_do_dpc() 5060 if (ha->beacon_blink_led == 1) qla2x00_do_dpc() 5061 ha->isp_ops->beacon_blink(base_vha); qla2x00_do_dpc() 5064 if (!IS_QLAFX00(ha)) qla2x00_do_dpc() 5067 ha->dpc_active = 0; qla2x00_do_dpc() 5079 ha->dpc_active = 0; qla2x00_do_dpc() 5090 struct qla_hw_data *ha = vha->hw; qla2xxx_wake_dpc() local 5091 struct task_struct *t = ha->dpc_thread; qla2xxx_wake_dpc() 5102 * ha = adapter block pointer. 5139 struct qla_hw_data *ha = vha->hw; qla2x00_timer() local 5142 if (ha->flags.eeh_busy) { qla2x00_timer() 5145 ha->flags.eeh_busy); qla2x00_timer() 5154 if (!pci_channel_offline(ha->pdev)) { qla2x00_timer() 5155 pci_read_config_word(ha->pdev, PCI_VENDOR_ID, &w); qla2x00_timer() 5160 if (!vha->vp_idx && IS_P3P_TYPE(ha)) { qla2x00_timer() 5163 if (IS_QLA82XX(ha)) qla2x00_timer() 5165 else if (IS_QLA8044(ha)) qla2x00_timer() 5169 if (!vha->vp_idx && IS_QLAFX00(ha)) qla2x00_timer() 5184 if (!IS_QLA2100(ha) && vha->link_down_timeout) qla2x00_timer() 5193 spin_lock_irqsave(&ha->hardware_lock, qla2x00_timer() 5195 req = ha->req_q_map[0]; qla2x00_timer() 5210 if (IS_QLA82XX(ha)) qla2x00_timer() 5218 spin_unlock_irqrestore(&ha->hardware_lock, qla2x00_timer() 5230 if (IS_QLA82XX(ha)) qla2x00_timer() 5243 if (!vha->vp_idx && (ha->beacon_blink_led == 1)) { qla2x00_timer() 5245 if (!IS_P3P_TYPE(ha)) { qla2x00_timer() 5337 struct qla_hw_data *ha = vha->hw; qla2x00_request_firmware() local 5340 if (IS_QLA2100(ha)) { qla2x00_request_firmware() 5342 } else if (IS_QLA2200(ha)) { qla2x00_request_firmware() 5344 } else if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) { qla2x00_request_firmware() 5346 } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) { qla2x00_request_firmware() 5348 } else if (IS_QLA24XX_TYPE(ha)) { qla2x00_request_firmware() 5350 } else if (IS_QLA25XX(ha)) { qla2x00_request_firmware() 5352 } else if (IS_QLA81XX(ha)) { qla2x00_request_firmware() 5354 } else if (IS_QLA82XX(ha)) { qla2x00_request_firmware() 5356 } else if (IS_QLA2031(ha)) { qla2x00_request_firmware() 5358 } else if (IS_QLA8031(ha)) { qla2x00_request_firmware() 5360 } else if (IS_QLA27XX(ha)) { qla2x00_request_firmware() 5370 if (request_firmware(&blob->fw, blob->name, &ha->pdev->dev)) { qla2x00_request_firmware() 5398 struct qla_hw_data *ha = vha->hw; qla2xxx_pci_error_detected() local 5405 ha->flags.eeh_busy = 0; qla2xxx_pci_error_detected() 5408 ha->flags.eeh_busy = 1; qla2xxx_pci_error_detected() 5410 if (IS_QLA82XX(ha)) { qla2xxx_pci_error_detected() 5411 ha->flags.isp82xx_fw_hung = 1; qla2xxx_pci_error_detected() 5421 ha->flags.pci_channel_io_perm_failure = 1; qla2xxx_pci_error_detected() 5435 struct qla_hw_data *ha = base_vha->hw; qla2xxx_pci_mmio_enabled() local 5436 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; qla2xxx_pci_mmio_enabled() 5437 struct device_reg_24xx __iomem *reg24 = &ha->iobase->isp24; qla2xxx_pci_mmio_enabled() 5439 if (IS_QLA82XX(ha)) qla2xxx_pci_mmio_enabled() 5442 spin_lock_irqsave(&ha->hardware_lock, flags); qla2xxx_pci_mmio_enabled() 5443 if (IS_QLA2100(ha) || IS_QLA2200(ha)){ qla2xxx_pci_mmio_enabled() 5447 } else if (IS_QLA23XX(ha)) { qla2xxx_pci_mmio_enabled() 5451 } else if (IS_FWI2_CAPABLE(ha)) { qla2xxx_pci_mmio_enabled() 5456 spin_unlock_irqrestore(&ha->hardware_lock, flags); qla2xxx_pci_mmio_enabled() 5461 ha->isp_ops->fw_dump(base_vha, 0); qla2xxx_pci_mmio_enabled() 5473 struct qla_hw_data *ha = base_vha->hw; qla82xx_error_recovery() local 5489 fn = PCI_FUNC(ha->pdev->devfn); qla82xx_error_recovery() 5495 pci_get_domain_bus_and_slot(pci_domain_nr(ha->pdev->bus), qla82xx_error_recovery() 5496 ha->pdev->bus->number, PCI_DEVFN(PCI_SLOT(ha->pdev->devfn), qla82xx_error_recovery() 5515 ha->pdev->devfn); qla82xx_error_recovery() 5516 qla82xx_idc_lock(ha); qla82xx_error_recovery() 5518 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE, qla82xx_error_recovery() 5521 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_IDC_VERSION, qla82xx_error_recovery() 5524 drv_active = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_ACTIVE); qla82xx_error_recovery() 5528 qla82xx_idc_unlock(ha); qla82xx_error_recovery() 5536 qla82xx_idc_lock(ha); qla82xx_error_recovery() 5541 qla82xx_clear_drv_active(ha); qla82xx_error_recovery() 5542 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE, qla82xx_error_recovery() 5547 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE, qla82xx_error_recovery() 5549 qla82xx_idc_unlock(ha); qla82xx_error_recovery() 5550 ha->flags.isp82xx_fw_hung = 0; qla82xx_error_recovery() 5552 qla82xx_idc_lock(ha); qla82xx_error_recovery() 5554 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_STATE, 0); qla82xx_error_recovery() 5557 qla82xx_idc_unlock(ha); qla82xx_error_recovery() 5561 ha->pdev->devfn); qla82xx_error_recovery() 5562 if ((qla82xx_rd_32(ha, QLA82XX_CRB_DEV_STATE) == qla82xx_error_recovery() 5564 ha->flags.isp82xx_fw_hung = 0; qla82xx_error_recovery() 5566 qla82xx_idc_lock(ha); qla82xx_error_recovery() 5568 qla82xx_idc_unlock(ha); qla82xx_error_recovery() 5581 struct qla_hw_data *ha = base_vha->hw; qla2xxx_pci_slot_reset() local 5601 if (ha->mem_only) qla2xxx_pci_slot_reset() 5612 rsp = ha->rsp_q_map[0]; qla2xxx_pci_slot_reset() 5613 if (qla2x00_request_irqs(ha, rsp)) qla2xxx_pci_slot_reset() 5616 if (ha->isp_ops->pci_config(base_vha)) qla2xxx_pci_slot_reset() 5619 if (IS_QLA82XX(ha)) { qla2xxx_pci_slot_reset() 5627 while (ha->flags.mbox_busy && retries--) qla2xxx_pci_slot_reset() 5631 if (ha->isp_ops->abort_isp(base_vha) == QLA_SUCCESS) qla2xxx_pci_slot_reset() 5647 struct qla_hw_data *ha = base_vha->hw; qla2xxx_pci_resume() local 5661 ha->flags.eeh_busy = 0; qla2xxx_pci_resume() 5668 struct qla_hw_data *ha = vha->hw; qla83xx_disable_laser() local 5669 struct device_reg_24xx __iomem *isp_reg = &ha->iobase->isp24; qla83xx_disable_laser() 3751 qla2x00_create_host(struct scsi_host_template *sht, struct qla_hw_data *ha) qla2x00_create_host() argument
H A D	qla_sup.c	20 * @ha: HA context 23 qla2x00_lock_nvram_access(struct qla_hw_data *ha) qla2x00_lock_nvram_access() argument 26 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; qla2x00_lock_nvram_access() 28 if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha)) { qla2x00_lock_nvram_access() 53 * @ha: HA context 56 qla2x00_unlock_nvram_access(struct qla_hw_data *ha) qla2x00_unlock_nvram_access() argument 58 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; qla2x00_unlock_nvram_access() 60 if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha)) { qla2x00_unlock_nvram_access() 68 * @ha: HA context 72 qla2x00_nv_write(struct qla_hw_data *ha, uint16_t data) qla2x00_nv_write() argument 74 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; qla2x00_nv_write() 91 * @ha: HA context 104 qla2x00_nvram_request(struct qla_hw_data *ha, uint32_t nv_cmd) qla2x00_nvram_request() argument 107 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; qla2x00_nvram_request() 115 qla2x00_nv_write(ha, NVR_DATA_OUT); qla2x00_nvram_request() 117 qla2x00_nv_write(ha, 0); qla2x00_nvram_request() 147 * @ha: HA context 153 qla2x00_get_nvram_word(struct qla_hw_data *ha, uint32_t addr) qla2x00_get_nvram_word() argument 160 data = qla2x00_nvram_request(ha, nv_cmd); qla2x00_get_nvram_word() 167 * @ha: HA context 170 qla2x00_nv_deselect(struct qla_hw_data *ha) qla2x00_nv_deselect() argument 172 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; qla2x00_nv_deselect() 181 * @ha: HA context 186 qla2x00_write_nvram_word(struct qla_hw_data *ha, uint32_t addr, uint16_t data) qla2x00_write_nvram_word() argument 191 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; qla2x00_write_nvram_word() 192 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); qla2x00_write_nvram_word() 194 qla2x00_nv_write(ha, NVR_DATA_OUT); qla2x00_write_nvram_word() 195 qla2x00_nv_write(ha, 0); qla2x00_write_nvram_word() 196 qla2x00_nv_write(ha, 0); qla2x00_write_nvram_word() 199 qla2x00_nv_write(ha, NVR_DATA_OUT); qla2x00_write_nvram_word() 201 qla2x00_nv_deselect(ha); qla2x00_write_nvram_word() 209 qla2x00_nv_write(ha, NVR_DATA_OUT); qla2x00_write_nvram_word() 211 qla2x00_nv_write(ha, 0); qla2x00_write_nvram_word() 216 qla2x00_nv_deselect(ha); qla2x00_write_nvram_word() 232 qla2x00_nv_deselect(ha); qla2x00_write_nvram_word() 235 qla2x00_nv_write(ha, NVR_DATA_OUT); qla2x00_write_nvram_word() 237 qla2x00_nv_write(ha, 0); qla2x00_write_nvram_word() 239 qla2x00_nv_deselect(ha); qla2x00_write_nvram_word() 243 qla2x00_write_nvram_word_tmo(struct qla_hw_data *ha, uint32_t addr, qla2x00_write_nvram_word_tmo() argument 249 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; qla2x00_write_nvram_word_tmo() 253 qla2x00_nv_write(ha, NVR_DATA_OUT); qla2x00_write_nvram_word_tmo() 254 qla2x00_nv_write(ha, 0); qla2x00_write_nvram_word_tmo() 255 qla2x00_nv_write(ha, 0); qla2x00_write_nvram_word_tmo() 258 qla2x00_nv_write(ha, NVR_DATA_OUT); qla2x00_write_nvram_word_tmo() 260 qla2x00_nv_deselect(ha); qla2x00_write_nvram_word_tmo() 268 qla2x00_nv_write(ha, NVR_DATA_OUT); qla2x00_write_nvram_word_tmo() 270 qla2x00_nv_write(ha, 0); qla2x00_write_nvram_word_tmo() 275 qla2x00_nv_deselect(ha); qla2x00_write_nvram_word_tmo() 289 qla2x00_nv_deselect(ha); qla2x00_write_nvram_word_tmo() 292 qla2x00_nv_write(ha, NVR_DATA_OUT); qla2x00_write_nvram_word_tmo() 294 qla2x00_nv_write(ha, 0); qla2x00_write_nvram_word_tmo() 296 qla2x00_nv_deselect(ha); qla2x00_write_nvram_word_tmo() 303 * @ha: HA context 306 qla2x00_clear_nvram_protection(struct qla_hw_data *ha) qla2x00_clear_nvram_protection() argument 309 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; qla2x00_clear_nvram_protection() 312 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); qla2x00_clear_nvram_protection() 317 wprot_old = cpu_to_le16(qla2x00_get_nvram_word(ha, ha->nvram_base)); qla2x00_clear_nvram_protection() 318 stat = qla2x00_write_nvram_word_tmo(ha, ha->nvram_base, qla2x00_clear_nvram_protection() 320 wprot = cpu_to_le16(qla2x00_get_nvram_word(ha, ha->nvram_base)); qla2x00_clear_nvram_protection() 323 qla2x00_nv_write(ha, NVR_DATA_OUT); qla2x00_clear_nvram_protection() 324 qla2x00_nv_write(ha, 0); qla2x00_clear_nvram_protection() 325 qla2x00_nv_write(ha, 0); qla2x00_clear_nvram_protection() 327 qla2x00_nv_write(ha, NVR_DATA_OUT); qla2x00_clear_nvram_protection() 329 qla2x00_nv_deselect(ha); qla2x00_clear_nvram_protection() 332 qla2x00_nv_write(ha, NVR_PR_ENABLE | NVR_DATA_OUT); qla2x00_clear_nvram_protection() 333 qla2x00_nv_write(ha, NVR_PR_ENABLE); qla2x00_clear_nvram_protection() 334 qla2x00_nv_write(ha, NVR_PR_ENABLE); qla2x00_clear_nvram_protection() 336 qla2x00_nv_write(ha, NVR_DATA_OUT | NVR_PR_ENABLE); qla2x00_clear_nvram_protection() 338 qla2x00_nv_deselect(ha); qla2x00_clear_nvram_protection() 341 qla2x00_nv_write(ha, NVR_PR_ENABLE | NVR_DATA_OUT); qla2x00_clear_nvram_protection() 342 qla2x00_nv_write(ha, NVR_PR_ENABLE | NVR_DATA_OUT); qla2x00_clear_nvram_protection() 343 qla2x00_nv_write(ha, NVR_PR_ENABLE | NVR_DATA_OUT); qla2x00_clear_nvram_protection() 345 qla2x00_nv_write(ha, NVR_DATA_OUT | NVR_PR_ENABLE); qla2x00_clear_nvram_protection() 347 qla2x00_nv_deselect(ha); qla2x00_clear_nvram_protection() 366 qla2x00_write_nvram_word(ha, ha->nvram_base, wprot_old); qla2x00_clear_nvram_protection() 372 qla2x00_set_nvram_protection(struct qla_hw_data *ha, int stat) qla2x00_set_nvram_protection() argument 374 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; qla2x00_set_nvram_protection() 376 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); qla2x00_set_nvram_protection() 383 qla2x00_nv_write(ha, NVR_DATA_OUT); qla2x00_set_nvram_protection() 384 qla2x00_nv_write(ha, 0); qla2x00_set_nvram_protection() 385 qla2x00_nv_write(ha, 0); qla2x00_set_nvram_protection() 387 qla2x00_nv_write(ha, NVR_DATA_OUT); qla2x00_set_nvram_protection() 389 qla2x00_nv_deselect(ha); qla2x00_set_nvram_protection() 392 qla2x00_nv_write(ha, NVR_PR_ENABLE | NVR_DATA_OUT); qla2x00_set_nvram_protection() 393 qla2x00_nv_write(ha, NVR_PR_ENABLE); qla2x00_set_nvram_protection() 394 qla2x00_nv_write(ha, NVR_PR_ENABLE); qla2x00_set_nvram_protection() 396 qla2x00_nv_write(ha, NVR_DATA_OUT | NVR_PR_ENABLE); qla2x00_set_nvram_protection() 398 qla2x00_nv_deselect(ha); qla2x00_set_nvram_protection() 401 qla2x00_nv_write(ha, NVR_PR_ENABLE | NVR_DATA_OUT); qla2x00_set_nvram_protection() 402 qla2x00_nv_write(ha, NVR_PR_ENABLE); qla2x00_set_nvram_protection() 403 qla2x00_nv_write(ha, NVR_PR_ENABLE | NVR_DATA_OUT); qla2x00_set_nvram_protection() 405 qla2x00_nv_write(ha, NVR_PR_ENABLE); qla2x00_set_nvram_protection() 407 qla2x00_nv_deselect(ha); qla2x00_set_nvram_protection() 430 flash_conf_addr(struct qla_hw_data *ha, uint32_t faddr) flash_conf_addr() argument 432 return ha->flash_conf_off | faddr; flash_conf_addr() 436 flash_data_addr(struct qla_hw_data *ha, uint32_t faddr) flash_data_addr() argument 438 return ha->flash_data_off | faddr; flash_data_addr() 442 nvram_conf_addr(struct qla_hw_data *ha, uint32_t naddr) nvram_conf_addr() argument 444 return ha->nvram_conf_off | naddr; nvram_conf_addr() 448 nvram_data_addr(struct qla_hw_data *ha, uint32_t naddr) nvram_data_addr() argument 450 return ha->nvram_data_off | naddr; nvram_data_addr() 454 qla24xx_read_flash_dword(struct qla_hw_data *ha, uint32_t addr) qla24xx_read_flash_dword() argument 458 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; qla24xx_read_flash_dword() 486 struct qla_hw_data *ha = vha->hw; qla24xx_read_flash_data() local 490 dwptr[i] = cpu_to_le32(qla24xx_read_flash_dword(ha, qla24xx_read_flash_data() 491 flash_data_addr(ha, faddr))); qla24xx_read_flash_data() 497 qla24xx_write_flash_dword(struct qla_hw_data *ha, uint32_t addr, uint32_t data) qla24xx_write_flash_dword() argument 501 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; qla24xx_write_flash_dword() 520 qla24xx_get_flash_manufacturer(struct qla_hw_data *ha, uint8_t *man_id, qla24xx_get_flash_manufacturer() argument 525 ids = qla24xx_read_flash_dword(ha, flash_conf_addr(ha, 0x03ab)); qla24xx_get_flash_manufacturer() 537 ids = qla24xx_read_flash_dword(ha, flash_conf_addr(ha, 0x009f)); qla24xx_get_flash_manufacturer() 552 struct qla_hw_data *ha = vha->hw; qla2xxx_find_flt_start() local 553 struct req_que *req = ha->req_q_map[0]; qla2xxx_find_flt_start() 562 if (IS_QLA24XX_TYPE(ha)) qla2xxx_find_flt_start() 564 else if (IS_QLA25XX(ha)) qla2xxx_find_flt_start() 566 else if (IS_QLA81XX(ha)) qla2xxx_find_flt_start() 568 else if (IS_P3P_TYPE(ha)) { qla2xxx_find_flt_start() 571 } else if (IS_QLA83XX(ha) || IS_QLA27XX(ha)) { qla2xxx_find_flt_start() 673 struct qla_hw_data *ha = vha->hw; qla2xxx_get_flt_info() local 674 struct req_que *req = ha->req_q_map[0]; qla2xxx_get_flt_info() 677 if (IS_QLA25XX(ha)) qla2xxx_get_flt_info() 679 else if (IS_QLA81XX(ha)) qla2xxx_get_flt_info() 685 ha->flt_region_fcp_prio = (ha->port_no == 0) ? qla2xxx_get_flt_info() 688 ha->flt_region_flt = flt_addr; qla2xxx_get_flt_info() 692 ha->isp_ops->read_optrom(vha, (uint8_t *)req->ring, qla2xxx_get_flt_info() 728 if (!IS_QLA8031(ha)) qla2xxx_get_flt_info() 730 ha->flt_region_fw = start; qla2xxx_get_flt_info() 733 if (IS_QLA8031(ha)) qla2xxx_get_flt_info() 735 ha->flt_region_fw = start; qla2xxx_get_flt_info() 738 ha->flt_region_boot = start; qla2xxx_get_flt_info() 741 if (IS_QLA8031(ha)) qla2xxx_get_flt_info() 743 ha->flt_region_vpd_nvram = start; qla2xxx_get_flt_info() 744 if (IS_P3P_TYPE(ha)) qla2xxx_get_flt_info() 746 if (ha->port_no == 0) qla2xxx_get_flt_info() 747 ha->flt_region_vpd = start; qla2xxx_get_flt_info() 750 if (IS_P3P_TYPE(ha) || IS_QLA8031(ha)) qla2xxx_get_flt_info() 752 if (ha->port_no == 1) qla2xxx_get_flt_info() 753 ha->flt_region_vpd = start; qla2xxx_get_flt_info() 756 if (!IS_QLA27XX(ha)) qla2xxx_get_flt_info() 758 if (ha->port_no == 2) qla2xxx_get_flt_info() 759 ha->flt_region_vpd = start; qla2xxx_get_flt_info() 762 if (!IS_QLA27XX(ha)) qla2xxx_get_flt_info() 764 if (ha->port_no == 3) qla2xxx_get_flt_info() 765 ha->flt_region_vpd = start; qla2xxx_get_flt_info() 768 if (IS_QLA8031(ha)) qla2xxx_get_flt_info() 770 if (ha->port_no == 0) qla2xxx_get_flt_info() 771 ha->flt_region_nvram = start; qla2xxx_get_flt_info() 774 if (IS_QLA8031(ha)) qla2xxx_get_flt_info() 776 if (ha->port_no == 1) qla2xxx_get_flt_info() 777 ha->flt_region_nvram = start; qla2xxx_get_flt_info() 780 if (!IS_QLA27XX(ha)) qla2xxx_get_flt_info() 782 if (ha->port_no == 2) qla2xxx_get_flt_info() 783 ha->flt_region_nvram = start; qla2xxx_get_flt_info() 786 if (!IS_QLA27XX(ha)) qla2xxx_get_flt_info() 788 if (ha->port_no == 3) qla2xxx_get_flt_info() 789 ha->flt_region_nvram = start; qla2xxx_get_flt_info() 792 ha->flt_region_fdt = start; qla2xxx_get_flt_info() 795 if (ha->port_no == 0) qla2xxx_get_flt_info() 796 ha->flt_region_npiv_conf = start; qla2xxx_get_flt_info() 799 if (ha->port_no == 1) qla2xxx_get_flt_info() 800 ha->flt_region_npiv_conf = start; qla2xxx_get_flt_info() 803 ha->flt_region_gold_fw = start; qla2xxx_get_flt_info() 806 if (ha->port_no == 0) qla2xxx_get_flt_info() 807 ha->flt_region_fcp_prio = start; qla2xxx_get_flt_info() 810 if (ha->port_no == 1) qla2xxx_get_flt_info() 811 ha->flt_region_fcp_prio = start; qla2xxx_get_flt_info() 814 ha->flt_region_boot = start; qla2xxx_get_flt_info() 817 if (IS_QLA8044(ha)) qla2xxx_get_flt_info() 818 ha->flt_region_boot = start; qla2xxx_get_flt_info() 821 ha->flt_region_fw = start; qla2xxx_get_flt_info() 824 if (IS_CNA_CAPABLE(ha)) qla2xxx_get_flt_info() 825 ha->flt_region_fw = start; qla2xxx_get_flt_info() 828 ha->flt_region_gold_fw = start; qla2xxx_get_flt_info() 831 ha->flt_region_bootload = start; qla2xxx_get_flt_info() 834 if (IS_CNA_CAPABLE(ha)) qla2xxx_get_flt_info() 835 ha->flt_region_vpd = start; qla2xxx_get_flt_info() 838 if (!(IS_QLA8031(ha) || IS_QLA8044(ha))) qla2xxx_get_flt_info() 840 if (ha->port_no == 0) qla2xxx_get_flt_info() 841 ha->flt_region_nvram = start; qla2xxx_get_flt_info() 844 if (!(IS_QLA8031(ha) || IS_QLA8044(ha))) qla2xxx_get_flt_info() 846 if (ha->port_no == 1) qla2xxx_get_flt_info() 847 ha->flt_region_nvram = start; qla2xxx_get_flt_info() 856 ha->flt_region_fw = def_fw[def]; qla2xxx_get_flt_info() 857 ha->flt_region_boot = def_boot[def]; qla2xxx_get_flt_info() 858 ha->flt_region_vpd_nvram = def_vpd_nvram[def]; qla2xxx_get_flt_info() 859 ha->flt_region_vpd = (ha->port_no == 0) ? qla2xxx_get_flt_info() 861 ha->flt_region_nvram = (ha->port_no == 0) ? qla2xxx_get_flt_info() 863 ha->flt_region_fdt = def_fdt[def]; qla2xxx_get_flt_info() 864 ha->flt_region_npiv_conf = (ha->port_no == 0) ? qla2xxx_get_flt_info() 870 loc, ha->flt_region_boot, ha->flt_region_fw, qla2xxx_get_flt_info() 871 ha->flt_region_vpd_nvram, ha->flt_region_vpd, ha->flt_region_nvram, qla2xxx_get_flt_info() 872 ha->flt_region_fdt, ha->flt_region_flt, ha->flt_region_npiv_conf, qla2xxx_get_flt_info() 873 ha->flt_region_fcp_prio); qla2xxx_get_flt_info() 888 struct qla_hw_data *ha = vha->hw; qla2xxx_get_fdt_info() local 889 struct req_que *req = ha->req_q_map[0]; qla2xxx_get_fdt_info() 893 ha->isp_ops->read_optrom(vha, (uint8_t *)req->ring, qla2xxx_get_fdt_info() 894 ha->flt_region_fdt << 2, OPTROM_BURST_SIZE); qla2xxx_get_fdt_info() 917 ha->fdt_wrt_disable = fdt->wrt_disable_bits; qla2xxx_get_fdt_info() 918 ha->fdt_wrt_enable = fdt->wrt_enable_bits; qla2xxx_get_fdt_info() 919 ha->fdt_wrt_sts_reg_cmd = fdt->wrt_sts_reg_cmd; qla2xxx_get_fdt_info() 920 if (IS_QLA8044(ha)) qla2xxx_get_fdt_info() 921 ha->fdt_erase_cmd = fdt->erase_cmd; qla2xxx_get_fdt_info() 923 ha->fdt_erase_cmd = qla2xxx_get_fdt_info() 924 flash_conf_addr(ha, 0x0300 | fdt->erase_cmd); qla2xxx_get_fdt_info() 925 ha->fdt_block_size = le32_to_cpu(fdt->block_size); qla2xxx_get_fdt_info() 927 ha->fdt_unprotect_sec_cmd = flash_conf_addr(ha, 0x0300 | qla2xxx_get_fdt_info() 929 ha->fdt_protect_sec_cmd = fdt->protect_sec_cmd ? qla2xxx_get_fdt_info() 930 flash_conf_addr(ha, 0x0300 | fdt->protect_sec_cmd): qla2xxx_get_fdt_info() 931 flash_conf_addr(ha, 0x0336); qla2xxx_get_fdt_info() 936 if (IS_P3P_TYPE(ha)) { qla2xxx_get_fdt_info() 937 ha->fdt_block_size = FLASH_BLK_SIZE_64K; qla2xxx_get_fdt_info() 940 qla24xx_get_flash_manufacturer(ha, &man_id, &flash_id); qla2xxx_get_fdt_info() 943 ha->fdt_wrt_disable = 0x9c; qla2xxx_get_fdt_info() 944 ha->fdt_erase_cmd = flash_conf_addr(ha, 0x03d8); qla2xxx_get_fdt_info() 948 ha->fdt_block_size = FLASH_BLK_SIZE_64K; qla2xxx_get_fdt_info() 950 ha->fdt_block_size = FLASH_BLK_SIZE_32K; qla2xxx_get_fdt_info() 953 ha->fdt_erase_cmd = flash_conf_addr(ha, 0x0352); qla2xxx_get_fdt_info() 956 ha->fdt_block_size = FLASH_BLK_SIZE_64K; qla2xxx_get_fdt_info() 959 ha->fdt_block_size = FLASH_BLK_SIZE_4K; qla2xxx_get_fdt_info() 960 ha->fdt_erase_cmd = flash_conf_addr(ha, 0x0320); qla2xxx_get_fdt_info() 961 ha->fdt_unprotect_sec_cmd = flash_conf_addr(ha, 0x0339); qla2xxx_get_fdt_info() 962 ha->fdt_protect_sec_cmd = flash_conf_addr(ha, 0x0336); qla2xxx_get_fdt_info() 966 ha->fdt_block_size = FLASH_BLK_SIZE_64K; qla2xxx_get_fdt_info() 974 ha->fdt_erase_cmd, ha->fdt_protect_sec_cmd, qla2xxx_get_fdt_info() 975 ha->fdt_wrt_disable, ha->fdt_block_size); qla2xxx_get_fdt_info() 984 struct qla_hw_data *ha = vha->hw; qla2xxx_get_idc_param() local 985 struct req_que *req = ha->req_q_map[0]; qla2xxx_get_idc_param() 987 if (!(IS_P3P_TYPE(ha))) qla2xxx_get_idc_param() 991 ha->isp_ops->read_optrom(vha, (uint8_t *)req->ring, qla2xxx_get_idc_param() 995 ha->fcoe_dev_init_timeout = QLA82XX_ROM_DEV_INIT_TIMEOUT; qla2xxx_get_idc_param() 996 ha->fcoe_reset_timeout = QLA82XX_ROM_DRV_RESET_ACK_TIMEOUT; qla2xxx_get_idc_param() 998 ha->fcoe_dev_init_timeout = le32_to_cpu(*wptr++); qla2xxx_get_idc_param() 999 ha->fcoe_reset_timeout = le32_to_cpu(*wptr); qla2xxx_get_idc_param() 1003 "fcoe_reset_timeout=%d.\n", ha->fcoe_dev_init_timeout, qla2xxx_get_idc_param() 1004 ha->fcoe_reset_timeout); qla2xxx_get_idc_param() 1013 struct qla_hw_data *ha = vha->hw; qla2xxx_get_flash_info() local 1015 if (!IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha) && qla2xxx_get_flash_info() 1016 !IS_CNA_CAPABLE(ha) && !IS_QLA2031(ha) && !IS_QLA27XX(ha)) qla2xxx_get_flash_info() 1040 struct qla_hw_data *ha = vha->hw; qla2xxx_flash_npiv_conf() local 1042 if (!IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha) && qla2xxx_flash_npiv_conf() 1043 !IS_CNA_CAPABLE(ha) && !IS_QLA2031(ha)) qla2xxx_flash_npiv_conf() 1046 if (ha->flags.nic_core_reset_hdlr_active) qla2xxx_flash_npiv_conf() 1049 if (IS_QLA8044(ha)) qla2xxx_flash_npiv_conf() 1052 ha->isp_ops->read_optrom(vha, (uint8_t *)&hdr, qla2xxx_flash_npiv_conf() 1053 ha->flt_region_npiv_conf << 2, sizeof(struct qla_npiv_header)); qla2xxx_flash_npiv_conf() 1072 ha->isp_ops->read_optrom(vha, (uint8_t *)data, qla2xxx_flash_npiv_conf() 1073 ha->flt_region_npiv_conf << 2, NPIV_CONFIG_SIZE); qla2xxx_flash_npiv_conf() 1095 memcpy(&ha->npiv_info[i], entry, sizeof(struct qla_npiv_entry)); qla2xxx_flash_npiv_conf() 1135 struct qla_hw_data *ha = vha->hw; qla24xx_unprotect_flash() local 1136 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; qla24xx_unprotect_flash() 1138 if (ha->flags.fac_supported) qla24xx_unprotect_flash() 1146 if (!ha->fdt_wrt_disable) qla24xx_unprotect_flash() 1150 qla24xx_write_flash_dword(ha, flash_conf_addr(ha, 0x101), 0); qla24xx_unprotect_flash() 1152 qla24xx_write_flash_dword(ha, flash_conf_addr(ha, 0x101), 0); qla24xx_unprotect_flash() 1161 struct qla_hw_data *ha = vha->hw; qla24xx_protect_flash() local 1162 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; qla24xx_protect_flash() 1164 if (ha->flags.fac_supported) qla24xx_protect_flash() 1167 if (!ha->fdt_wrt_disable) qla24xx_protect_flash() 1171 qla24xx_write_flash_dword(ha, flash_conf_addr(ha, 0x101), qla24xx_protect_flash() 1172 ha->fdt_wrt_disable); qla24xx_protect_flash() 1174 qla24xx_read_flash_dword(ha, flash_conf_addr(ha, 0x005)) & BIT_0; qla24xx_protect_flash() 1191 struct qla_hw_data *ha = vha->hw; qla24xx_erase_sector() local 1194 if (ha->flags.fac_supported) { qla24xx_erase_sector() 1196 finish = start + (ha->fdt_block_size >> 2) - 1; qla24xx_erase_sector() 1197 return qla81xx_fac_erase_sector(vha, flash_data_addr(ha, qla24xx_erase_sector() 1198 start), flash_data_addr(ha, finish)); qla24xx_erase_sector() 1201 return qla24xx_write_flash_dword(ha, ha->fdt_erase_cmd, qla24xx_erase_sector() 1216 struct qla_hw_data *ha = vha->hw; qla24xx_write_flash_data() local 1219 if ((IS_QLA25XX(ha) || IS_QLA81XX(ha) || IS_QLA83XX(ha) || qla24xx_write_flash_data() 1220 IS_QLA27XX(ha)) && qla24xx_write_flash_data() 1222 optrom = dma_alloc_coherent(&ha->pdev->dev, OPTROM_BURST_SIZE, qla24xx_write_flash_data() 1232 rest_addr = (ha->fdt_block_size >> 2) - 1; qla24xx_write_flash_data() 1248 if (ha->fdt_unprotect_sec_cmd) qla24xx_write_flash_data() 1249 qla24xx_write_flash_dword(ha, qla24xx_write_flash_data() 1250 ha->fdt_unprotect_sec_cmd, qla24xx_write_flash_data() 1268 flash_data_addr(ha, faddr), qla24xx_write_flash_data() 1274 flash_data_addr(ha, faddr), qla24xx_write_flash_data() 1279 dma_free_coherent(&ha->pdev->dev, qla24xx_write_flash_data() 1290 ret = qla24xx_write_flash_dword(ha, qla24xx_write_flash_data() 1291 flash_data_addr(ha, faddr), cpu_to_le32(*dwptr)); qla24xx_write_flash_data() 1300 if (ha->fdt_unprotect_sec_cmd && qla24xx_write_flash_data() 1302 qla24xx_write_flash_dword(ha, qla24xx_write_flash_data() 1303 ha->fdt_protect_sec_cmd, qla24xx_write_flash_data() 1314 dma_free_coherent(&ha->pdev->dev, qla24xx_write_flash_data() 1326 struct qla_hw_data *ha = vha->hw; qla2x00_read_nvram_data() local 1330 qla2x00_lock_nvram_access(ha); qla2x00_read_nvram_data() 1332 wptr[i] = cpu_to_le16(qla2x00_get_nvram_word(ha, qla2x00_read_nvram_data() 1334 qla2x00_unlock_nvram_access(ha); qla2x00_read_nvram_data() 1345 struct qla_hw_data *ha = vha->hw; qla24xx_read_nvram_data() local 1347 if (IS_P3P_TYPE(ha)) qla24xx_read_nvram_data() 1353 dwptr[i] = cpu_to_le32(qla24xx_read_flash_dword(ha, qla24xx_read_nvram_data() 1354 nvram_data_addr(ha, naddr))); qla24xx_read_nvram_data() 1367 struct qla_hw_data *ha = vha->hw; qla2x00_write_nvram_data() local 1371 spin_lock_irqsave(&ha->hardware_lock, flags); qla2x00_write_nvram_data() 1372 qla2x00_lock_nvram_access(ha); qla2x00_write_nvram_data() 1375 stat = qla2x00_clear_nvram_protection(ha); qla2x00_write_nvram_data() 1379 qla2x00_write_nvram_word(ha, naddr, qla2x00_write_nvram_data() 1385 qla2x00_set_nvram_protection(ha, stat); qla2x00_write_nvram_data() 1387 qla2x00_unlock_nvram_access(ha); qla2x00_write_nvram_data() 1388 spin_unlock_irqrestore(&ha->hardware_lock, flags); qla2x00_write_nvram_data() 1400 struct qla_hw_data *ha = vha->hw; qla24xx_write_nvram_data() local 1401 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; qla24xx_write_nvram_data() 1405 if (IS_P3P_TYPE(ha)) qla24xx_write_nvram_data() 1414 qla24xx_write_flash_dword(ha, nvram_conf_addr(ha, 0x101), 0); qla24xx_write_nvram_data() 1415 qla24xx_write_flash_dword(ha, nvram_conf_addr(ha, 0x101), 0); qla24xx_write_nvram_data() 1420 ret = qla24xx_write_flash_dword(ha, qla24xx_write_nvram_data() 1421 nvram_data_addr(ha, naddr), cpu_to_le32(*dwptr)); qla24xx_write_nvram_data() 1431 qla24xx_write_flash_dword(ha, nvram_conf_addr(ha, 0x101), 0x8c); qla24xx_write_nvram_data() 1447 struct qla_hw_data *ha = vha->hw; qla25xx_read_nvram_data() local 1452 dwptr[i] = cpu_to_le32(qla24xx_read_flash_dword(ha, qla25xx_read_nvram_data() 1453 flash_data_addr(ha, ha->flt_region_vpd_nvram | naddr))); qla25xx_read_nvram_data() 1462 struct qla_hw_data *ha = vha->hw; qla25xx_write_nvram_data() local 1469 ha->isp_ops->read_optrom(vha, dbuf, ha->flt_region_vpd_nvram << 2, qla25xx_write_nvram_data() 1472 ha->isp_ops->write_optrom(vha, dbuf, ha->flt_region_vpd_nvram << 2, qla25xx_write_nvram_data() 1480 qla2x00_flip_colors(struct qla_hw_data *ha, uint16_t *pflags) qla2x00_flip_colors() argument 1482 if (IS_QLA2322(ha)) { qla2x00_flip_colors() 1484 if (ha->beacon_color_state == QLA_LED_ALL_ON) { qla2x00_flip_colors() 1486 ha->beacon_color_state = 0; qla2x00_flip_colors() 1490 ha->beacon_color_state = QLA_LED_ALL_ON; qla2x00_flip_colors() 1495 if (ha->beacon_color_state == QLA_LED_GRN_ON) { qla2x00_flip_colors() 1497 ha->beacon_color_state = 0; qla2x00_flip_colors() 1501 ha->beacon_color_state = QLA_LED_GRN_ON; qla2x00_flip_colors() 1516 struct qla_hw_data *ha = vha->hw; qla2x00_beacon_blink() local 1517 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; qla2x00_beacon_blink() 1519 if (IS_P3P_TYPE(ha)) qla2x00_beacon_blink() 1522 spin_lock_irqsave(&ha->hardware_lock, flags); qla2x00_beacon_blink() 1525 if (ha->pio_address) { qla2x00_beacon_blink() 1526 gpio_enable = RD_REG_WORD_PIO(PIO_REG(ha, gpioe)); qla2x00_beacon_blink() 1527 gpio_data = RD_REG_WORD_PIO(PIO_REG(ha, gpiod)); qla2x00_beacon_blink() 1536 if (ha->pio_address) { qla2x00_beacon_blink() 1537 WRT_REG_WORD_PIO(PIO_REG(ha, gpioe), gpio_enable); qla2x00_beacon_blink() 1543 qla2x00_flip_colors(ha, &led_color); qla2x00_beacon_blink() 1552 if (ha->pio_address) { qla2x00_beacon_blink() 1553 WRT_REG_WORD_PIO(PIO_REG(ha, gpiod), gpio_data); qla2x00_beacon_blink() 1559 spin_unlock_irqrestore(&ha->hardware_lock, flags); qla2x00_beacon_blink() 1568 struct qla_hw_data *ha = vha->hw; qla2x00_beacon_on() local 1569 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; qla2x00_beacon_on() 1571 ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING; qla2x00_beacon_on() 1572 ha->fw_options[1] |= FO1_DISABLE_GPIO6_7; qla2x00_beacon_on() 1574 if (qla2x00_set_fw_options(vha, ha->fw_options) != QLA_SUCCESS) { qla2x00_beacon_on() 1581 spin_lock_irqsave(&ha->hardware_lock, flags); qla2x00_beacon_on() 1582 if (ha->pio_address) { qla2x00_beacon_on() 1583 gpio_enable = RD_REG_WORD_PIO(PIO_REG(ha, gpioe)); qla2x00_beacon_on() 1584 gpio_data = RD_REG_WORD_PIO(PIO_REG(ha, gpiod)); qla2x00_beacon_on() 1592 if (ha->pio_address) { qla2x00_beacon_on() 1593 WRT_REG_WORD_PIO(PIO_REG(ha, gpioe), gpio_enable); qla2x00_beacon_on() 1601 if (ha->pio_address) { qla2x00_beacon_on() 1602 WRT_REG_WORD_PIO(PIO_REG(ha, gpiod), gpio_data); qla2x00_beacon_on() 1607 spin_unlock_irqrestore(&ha->hardware_lock, flags); qla2x00_beacon_on() 1613 ha->beacon_blink_led = 1; qla2x00_beacon_on() 1614 ha->beacon_color_state = 0; qla2x00_beacon_on() 1623 struct qla_hw_data *ha = vha->hw; qla2x00_beacon_off() local 1625 ha->beacon_blink_led = 0; qla2x00_beacon_off() 1628 if (IS_QLA2322(ha)) qla2x00_beacon_off() 1629 ha->beacon_color_state = QLA_LED_ALL_ON; qla2x00_beacon_off() 1631 ha->beacon_color_state = QLA_LED_GRN_ON; qla2x00_beacon_off() 1633 ha->isp_ops->beacon_blink(vha); /* This turns green LED off */ qla2x00_beacon_off() 1635 ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING; qla2x00_beacon_off() 1636 ha->fw_options[1] &= ~FO1_DISABLE_GPIO6_7; qla2x00_beacon_off() 1638 rval = qla2x00_set_fw_options(vha, ha->fw_options); qla2x00_beacon_off() 1647 qla24xx_flip_colors(struct qla_hw_data *ha, uint16_t *pflags) qla24xx_flip_colors() argument 1650 if (ha->beacon_color_state == QLA_LED_ALL_ON) { qla24xx_flip_colors() 1652 ha->beacon_color_state = 0; qla24xx_flip_colors() 1656 ha->beacon_color_state = QLA_LED_ALL_ON; qla24xx_flip_colors() 1667 struct qla_hw_data *ha = vha->hw; qla24xx_beacon_blink() local 1668 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; qla24xx_beacon_blink() 1671 spin_lock_irqsave(&ha->hardware_lock, flags); qla24xx_beacon_blink() 1681 qla24xx_flip_colors(ha, &led_color); qla24xx_beacon_blink() 1692 spin_unlock_irqrestore(&ha->hardware_lock, flags); qla24xx_beacon_blink() 1696 qla83xx_select_led_port(struct qla_hw_data *ha) qla83xx_select_led_port() argument 1700 if (!IS_QLA83XX(ha)) qla83xx_select_led_port() 1703 if (ha->port_no == 0) qla83xx_select_led_port() 1716 struct qla_hw_data *ha = vha->hw; qla83xx_beacon_blink() local 1721 if (!IS_QLA83XX(ha) && !IS_QLA81XX(ha) && !IS_QLA27XX(ha)) qla83xx_beacon_blink() 1724 if (!ha->beacon_blink_led) qla83xx_beacon_blink() 1727 if (IS_QLA27XX(ha)) { qla83xx_beacon_blink() 1730 } else if (IS_QLA2031(ha)) { qla83xx_beacon_blink() 1731 led_select_value = qla83xx_select_led_port(ha); qla83xx_beacon_blink() 1735 } else if (IS_QLA8031(ha)) { qla83xx_beacon_blink() 1736 led_select_value = qla83xx_select_led_port(ha); qla83xx_beacon_blink() 1746 } else if (IS_QLA81XX(ha)) { qla83xx_beacon_blink() 1753 if (IS_QLA81XX(ha)) { qla83xx_beacon_blink() 1770 if (IS_QLA81XX(ha)) { qla83xx_beacon_blink() 1794 struct qla_hw_data *ha = vha->hw; qla24xx_beacon_on() local 1795 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; qla24xx_beacon_on() 1797 if (IS_P3P_TYPE(ha)) qla24xx_beacon_on() 1800 if (IS_QLA8031(ha) || IS_QLA81XX(ha)) qla24xx_beacon_on() 1803 if (ha->beacon_blink_led == 0) { qla24xx_beacon_on() 1805 ha->fw_options[1] |= ADD_FO1_DISABLE_GPIO_LED_CTRL; qla24xx_beacon_on() 1807 if (qla2x00_set_fw_options(vha, ha->fw_options) != QLA_SUCCESS) qla24xx_beacon_on() 1810 if (qla2x00_get_fw_options(vha, ha->fw_options) != qla24xx_beacon_on() 1817 if (IS_QLA2031(ha) || IS_QLA27XX(ha)) qla24xx_beacon_on() 1820 spin_lock_irqsave(&ha->hardware_lock, flags); qla24xx_beacon_on() 1828 spin_unlock_irqrestore(&ha->hardware_lock, flags); qla24xx_beacon_on() 1832 ha->beacon_color_state = 0; qla24xx_beacon_on() 1836 ha->beacon_blink_led = 1; qla24xx_beacon_on() 1846 struct qla_hw_data *ha = vha->hw; qla24xx_beacon_off() local 1847 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; qla24xx_beacon_off() 1849 if (IS_P3P_TYPE(ha)) qla24xx_beacon_off() 1852 ha->beacon_blink_led = 0; qla24xx_beacon_off() 1854 if (IS_QLA2031(ha) || IS_QLA27XX(ha)) qla24xx_beacon_off() 1857 if (IS_QLA8031(ha) || IS_QLA81XX(ha)) qla24xx_beacon_off() 1860 ha->beacon_color_state = QLA_LED_ALL_ON; qla24xx_beacon_off() 1862 ha->isp_ops->beacon_blink(vha); /* Will flip to all off. */ qla24xx_beacon_off() 1865 spin_lock_irqsave(&ha->hardware_lock, flags); qla24xx_beacon_off() 1872 spin_unlock_irqrestore(&ha->hardware_lock, flags); qla24xx_beacon_off() 1875 ha->fw_options[1] &= ~ADD_FO1_DISABLE_GPIO_LED_CTRL; qla24xx_beacon_off() 1877 if (qla2x00_set_fw_options(vha, ha->fw_options) != QLA_SUCCESS) { qla24xx_beacon_off() 1883 if (qla2x00_get_fw_options(vha, ha->fw_options) != QLA_SUCCESS) { qla24xx_beacon_off() 1899 * @ha: HA context 1902 qla2x00_flash_enable(struct qla_hw_data *ha) qla2x00_flash_enable() argument 1905 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; qla2x00_flash_enable() 1915 * @ha: HA context 1918 qla2x00_flash_disable(struct qla_hw_data *ha) qla2x00_flash_disable() argument 1921 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; qla2x00_flash_disable() 1931 * @ha: HA context 1939 qla2x00_read_flash_byte(struct qla_hw_data *ha, uint32_t addr) qla2x00_read_flash_byte() argument 1943 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; qla2x00_read_flash_byte() 1947 if (IS_QLA2322(ha) || IS_QLA6322(ha)) { qla2x00_read_flash_byte() 1975 if (ha->pio_address) { qla2x00_read_flash_byte() 1978 WRT_REG_WORD_PIO(PIO_REG(ha, flash_address), (uint16_t)addr); qla2x00_read_flash_byte() 1980 data = RD_REG_WORD_PIO(PIO_REG(ha, flash_data)); qla2x00_read_flash_byte() 1983 data2 = RD_REG_WORD_PIO(PIO_REG(ha, flash_data)); qla2x00_read_flash_byte() 1995 * @ha: HA context 2000 qla2x00_write_flash_byte(struct qla_hw_data *ha, uint32_t addr, uint8_t data) qla2x00_write_flash_byte() argument 2003 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; qla2x00_write_flash_byte() 2006 if (IS_QLA2322(ha) || IS_QLA6322(ha)) { qla2x00_write_flash_byte() 2036 if (ha->pio_address) { qla2x00_write_flash_byte() 2037 WRT_REG_WORD_PIO(PIO_REG(ha, flash_address), (uint16_t)addr); qla2x00_write_flash_byte() 2038 WRT_REG_WORD_PIO(PIO_REG(ha, flash_data), (uint16_t)data); qla2x00_write_flash_byte() 2049 * @ha: HA context 2063 qla2x00_poll_flash(struct qla_hw_data *ha, uint32_t addr, uint8_t poll_data, qla2x00_poll_flash() argument 2075 flash_data = qla2x00_read_flash_byte(ha, addr); qla2x00_poll_flash() 2094 * @ha: HA context 2103 qla2x00_program_flash_address(struct qla_hw_data *ha, uint32_t addr, qla2x00_program_flash_address() argument 2107 if (IS_OEM_001(ha)) { qla2x00_program_flash_address() 2108 qla2x00_write_flash_byte(ha, 0xaaa, 0xaa); qla2x00_program_flash_address() 2109 qla2x00_write_flash_byte(ha, 0x555, 0x55); qla2x00_program_flash_address() 2110 qla2x00_write_flash_byte(ha, 0xaaa, 0xa0); qla2x00_program_flash_address() 2111 qla2x00_write_flash_byte(ha, addr, data); qla2x00_program_flash_address() 2114 qla2x00_write_flash_byte(ha, addr, data); qla2x00_program_flash_address() 2118 qla2x00_write_flash_byte(ha, 0x5555, 0xaa); qla2x00_program_flash_address() 2119 qla2x00_write_flash_byte(ha, 0x2aaa, 0x55); qla2x00_program_flash_address() 2120 qla2x00_write_flash_byte(ha, 0x5555, 0xa0); qla2x00_program_flash_address() 2121 qla2x00_write_flash_byte(ha, addr, data); qla2x00_program_flash_address() 2128 return qla2x00_poll_flash(ha, addr, data, man_id, flash_id); qla2x00_program_flash_address() 2133 * @ha: HA context 2140 qla2x00_erase_flash(struct qla_hw_data *ha, uint8_t man_id, uint8_t flash_id) qla2x00_erase_flash() argument 2143 if (IS_OEM_001(ha)) { qla2x00_erase_flash() 2144 qla2x00_write_flash_byte(ha, 0xaaa, 0xaa); qla2x00_erase_flash() 2145 qla2x00_write_flash_byte(ha, 0x555, 0x55); qla2x00_erase_flash() 2146 qla2x00_write_flash_byte(ha, 0xaaa, 0x80); qla2x00_erase_flash() 2147 qla2x00_write_flash_byte(ha, 0xaaa, 0xaa); qla2x00_erase_flash() 2148 qla2x00_write_flash_byte(ha, 0x555, 0x55); qla2x00_erase_flash() 2149 qla2x00_write_flash_byte(ha, 0xaaa, 0x10); qla2x00_erase_flash() 2151 qla2x00_write_flash_byte(ha, 0x5555, 0xaa); qla2x00_erase_flash() 2152 qla2x00_write_flash_byte(ha, 0x2aaa, 0x55); qla2x00_erase_flash() 2153 qla2x00_write_flash_byte(ha, 0x5555, 0x80); qla2x00_erase_flash() 2154 qla2x00_write_flash_byte(ha, 0x5555, 0xaa); qla2x00_erase_flash() 2155 qla2x00_write_flash_byte(ha, 0x2aaa, 0x55); qla2x00_erase_flash() 2156 qla2x00_write_flash_byte(ha, 0x5555, 0x10); qla2x00_erase_flash() 2162 return qla2x00_poll_flash(ha, 0x00, 0x80, man_id, flash_id); qla2x00_erase_flash() 2167 * @ha: HA context 2176 qla2x00_erase_flash_sector(struct qla_hw_data *ha, uint32_t addr, qla2x00_erase_flash_sector() argument 2180 qla2x00_write_flash_byte(ha, 0x5555, 0xaa); qla2x00_erase_flash_sector() 2181 qla2x00_write_flash_byte(ha, 0x2aaa, 0x55); qla2x00_erase_flash_sector() 2182 qla2x00_write_flash_byte(ha, 0x5555, 0x80); qla2x00_erase_flash_sector() 2183 qla2x00_write_flash_byte(ha, 0x5555, 0xaa); qla2x00_erase_flash_sector() 2184 qla2x00_write_flash_byte(ha, 0x2aaa, 0x55); qla2x00_erase_flash_sector() 2186 qla2x00_write_flash_byte(ha, addr & sec_mask, 0x10); qla2x00_erase_flash_sector() 2188 qla2x00_write_flash_byte(ha, addr & sec_mask, 0x30); qla2x00_erase_flash_sector() 2193 return qla2x00_poll_flash(ha, addr, 0x80, man_id, flash_id); qla2x00_erase_flash_sector() 2202 qla2x00_get_flash_manufacturer(struct qla_hw_data *ha, uint8_t *man_id, qla2x00_get_flash_manufacturer() argument 2205 qla2x00_write_flash_byte(ha, 0x5555, 0xaa); qla2x00_get_flash_manufacturer() 2206 qla2x00_write_flash_byte(ha, 0x2aaa, 0x55); qla2x00_get_flash_manufacturer() 2207 qla2x00_write_flash_byte(ha, 0x5555, 0x90); qla2x00_get_flash_manufacturer() 2208 *man_id = qla2x00_read_flash_byte(ha, 0x0000); qla2x00_get_flash_manufacturer() 2209 *flash_id = qla2x00_read_flash_byte(ha, 0x0001); qla2x00_get_flash_manufacturer() 2210 qla2x00_write_flash_byte(ha, 0x5555, 0xaa); qla2x00_get_flash_manufacturer() 2211 qla2x00_write_flash_byte(ha, 0x2aaa, 0x55); qla2x00_get_flash_manufacturer() 2212 qla2x00_write_flash_byte(ha, 0x5555, 0xf0); qla2x00_get_flash_manufacturer() 2216 qla2x00_read_flash_data(struct qla_hw_data *ha, uint8_t *tmp_buf, qla2x00_read_flash_data() argument 2219 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; qla2x00_read_flash_data() 2232 data = qla2x00_read_flash_byte(ha, saddr); qla2x00_read_flash_data() 2245 struct qla_hw_data *ha = vha->hw; qla2x00_suspend_hba() local 2246 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; qla2x00_suspend_hba() 2250 ha->isp_ops->disable_intrs(ha); qla2x00_suspend_hba() 2251 set_bit(MBX_UPDATE_FLASH_ACTIVE, &ha->mbx_cmd_flags); qla2x00_suspend_hba() 2254 spin_lock_irqsave(&ha->hardware_lock, flags); qla2x00_suspend_hba() 2257 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { qla2x00_suspend_hba() 2266 spin_unlock_irqrestore(&ha->hardware_lock, flags); qla2x00_suspend_hba() 2272 struct qla_hw_data *ha = vha->hw; qla2x00_resume_hba() local 2275 clear_bit(MBX_UPDATE_FLASH_ACTIVE, &ha->mbx_cmd_flags); qla2x00_resume_hba() 2288 struct qla_hw_data *ha = vha->hw; qla2x00_read_optrom_data() local 2289 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; qla2x00_read_optrom_data() 2295 midpoint = ha->optrom_size / 2; qla2x00_read_optrom_data() 2297 qla2x00_flash_enable(ha); qla2x00_read_optrom_data() 2306 *data = qla2x00_read_flash_byte(ha, addr); qla2x00_read_optrom_data() 2308 qla2x00_flash_disable(ha); qla2x00_read_optrom_data() 2325 struct qla_hw_data *ha = vha->hw; qla2x00_write_optrom_data() local 2326 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; qla2x00_write_optrom_data() 2336 pci_read_config_word(ha->pdev, PCI_COMMAND, &wd); qla2x00_write_optrom_data() 2339 qla2x00_flash_enable(ha); qla2x00_write_optrom_data() 2342 if (IS_OEM_001(ha)) { qla2x00_write_optrom_data() 2349 qla2x00_get_flash_manufacturer(ha, &man_id, &flash_id); qla2x00_write_optrom_data() 2441 if (IS_QLA2322(ha) || IS_QLA6322(ha)) { qla2x00_write_optrom_data() 2442 if (qla2x00_erase_flash(ha, man_id, flash_id)) { qla2x00_write_optrom_data() 2453 if (IS_QLA2322(ha) || IS_QLA6322(ha)) { qla2x00_write_optrom_data() 2482 } else if (addr == ha->optrom_size / 2) { qla2x00_write_optrom_data() 2488 qla2x00_write_flash_byte(ha, 0x5555, qla2x00_write_optrom_data() 2490 qla2x00_write_flash_byte(ha, 0x2aaa, qla2x00_write_optrom_data() 2492 qla2x00_write_flash_byte(ha, 0x5555, qla2x00_write_optrom_data() 2494 } else if (!IS_QLA2322(ha) && !IS_QLA6322(ha)) { qla2x00_write_optrom_data() 2496 if (qla2x00_erase_flash_sector(ha, qla2x00_write_optrom_data() 2518 if (qla2x00_program_flash_address(ha, addr, data, qla2x00_write_optrom_data() 2526 qla2x00_flash_disable(ha); qla2x00_write_optrom_data() 2538 struct qla_hw_data *ha = vha->hw; qla24xx_read_optrom_data() local 2542 set_bit(MBX_UPDATE_FLASH_ACTIVE, &ha->mbx_cmd_flags); qla24xx_read_optrom_data() 2548 clear_bit(MBX_UPDATE_FLASH_ACTIVE, &ha->mbx_cmd_flags); qla24xx_read_optrom_data() 2559 struct qla_hw_data *ha = vha->hw; qla24xx_write_optrom_data() local 2563 set_bit(MBX_UPDATE_FLASH_ACTIVE, &ha->mbx_cmd_flags); qla24xx_write_optrom_data() 2569 clear_bit(MBX_UPDATE_FLASH_ACTIVE, &ha->mbx_cmd_flags); qla24xx_write_optrom_data() 2584 struct qla_hw_data *ha = vha->hw; qla25xx_read_optrom_data() local 2586 if (IS_QLA25XX(ha) || IS_QLA81XX(ha) || IS_QLA83XX(ha) || qla25xx_read_optrom_data() 2587 IS_QLA27XX(ha)) qla25xx_read_optrom_data() 2595 optrom = dma_alloc_coherent(&ha->pdev->dev, OPTROM_BURST_SIZE, qla25xx_read_optrom_data() 2613 flash_data_addr(ha, faddr), burst); qla25xx_read_optrom_data() 2617 rval, flash_data_addr(ha, faddr), qla25xx_read_optrom_data() 2622 dma_free_coherent(&ha->pdev->dev, OPTROM_BURST_SIZE, qla25xx_read_optrom_data() 2634 dma_free_coherent(&ha->pdev->dev, OPTROM_BURST_SIZE, optrom, qla25xx_read_optrom_data() 2645 * @ha: HA context 2662 qla2x00_get_fcode_version(struct qla_hw_data *ha, uint32_t pcids) qla2x00_get_fcode_version() argument 2668 memset(ha->fcode_revision, 0, sizeof(ha->fcode_revision)); qla2x00_get_fcode_version() 2672 ((qla2x00_read_flash_byte(ha, pcids + 0x0B) << 8) | qla2x00_get_fcode_version() 2673 qla2x00_read_flash_byte(ha, pcids + 0x0A)); qla2x00_get_fcode_version() 2681 if (qla2x00_read_flash_byte(ha, iter) == '/') { qla2x00_get_fcode_version() 2682 if (qla2x00_read_flash_byte(ha, iter + 2) == qla2x00_get_fcode_version() 2685 else if (qla2x00_read_flash_byte(ha, qla2x00_get_fcode_version() 2697 if (qla2x00_read_flash_byte(ha, iter) == ' ') qla2x00_get_fcode_version() 2711 rbyte = qla2x00_read_flash_byte(ha, iter); qla2x00_get_fcode_version() 2721 ((vend - iter) < sizeof(ha->fcode_revision))) { qla2x00_get_fcode_version() 2722 vbyte = ha->fcode_revision; qla2x00_get_fcode_version() 2724 *vbyte++ = qla2x00_read_flash_byte(ha, iter); qla2x00_get_fcode_version() 2732 memset(ha->fcode_revision, 0, sizeof(ha->fcode_revision)); qla2x00_get_fcode_version() 2743 struct qla_hw_data *ha = vha->hw; qla2x00_get_flash_version() local 2745 if (!ha->pio_address || !mbuf) qla2x00_get_flash_version() 2748 memset(ha->bios_revision, 0, sizeof(ha->bios_revision)); qla2x00_get_flash_version() 2749 memset(ha->efi_revision, 0, sizeof(ha->efi_revision)); qla2x00_get_flash_version() 2750 memset(ha->fcode_revision, 0, sizeof(ha->fcode_revision)); qla2x00_get_flash_version() 2751 memset(ha->fw_revision, 0, sizeof(ha->fw_revision)); qla2x00_get_flash_version() 2753 qla2x00_flash_enable(ha); qla2x00_get_flash_version() 2760 if (qla2x00_read_flash_byte(ha, pcihdr) != 0x55 || qla2x00_get_flash_version() 2761 qla2x00_read_flash_byte(ha, pcihdr + 0x01) != 0xaa) { qla2x00_get_flash_version() 2771 ((qla2x00_read_flash_byte(ha, pcihdr + 0x19) << 8) | qla2x00_get_flash_version() 2772 qla2x00_read_flash_byte(ha, pcihdr + 0x18)); qla2x00_get_flash_version() 2775 if (qla2x00_read_flash_byte(ha, pcids) != 'P' || qla2x00_get_flash_version() 2776 qla2x00_read_flash_byte(ha, pcids + 0x1) != 'C' || qla2x00_get_flash_version() 2777 qla2x00_read_flash_byte(ha, pcids + 0x2) != 'I' || qla2x00_get_flash_version() 2778 qla2x00_read_flash_byte(ha, pcids + 0x3) != 'R') { qla2x00_get_flash_version() 2787 code_type = qla2x00_read_flash_byte(ha, pcids + 0x14); qla2x00_get_flash_version() 2791 ha->bios_revision[0] = qla2x00_get_flash_version() 2792 qla2x00_read_flash_byte(ha, pcids + 0x12); qla2x00_get_flash_version() 2793 ha->bios_revision[1] = qla2x00_get_flash_version() 2794 qla2x00_read_flash_byte(ha, pcids + 0x13); qla2x00_get_flash_version() 2797 ha->bios_revision[1], ha->bios_revision[0]); qla2x00_get_flash_version() 2802 qla2x00_get_fcode_version(ha, pcids); qla2x00_get_flash_version() 2806 ha->efi_revision[0] = qla2x00_get_flash_version() 2807 qla2x00_read_flash_byte(ha, pcids + 0x12); qla2x00_get_flash_version() 2808 ha->efi_revision[1] = qla2x00_get_flash_version() 2809 qla2x00_read_flash_byte(ha, pcids + 0x13); qla2x00_get_flash_version() 2812 ha->efi_revision[1], ha->efi_revision[0]); qla2x00_get_flash_version() 2821 last_image = qla2x00_read_flash_byte(ha, pcids + 0x15) & BIT_7; qla2x00_get_flash_version() 2824 pcihdr += ((qla2x00_read_flash_byte(ha, pcids + 0x11) << 8) | qla2x00_get_flash_version() 2825 qla2x00_read_flash_byte(ha, pcids + 0x10)) * 512; qla2x00_get_flash_version() 2828 if (IS_QLA2322(ha)) { qla2x00_get_flash_version() 2830 memset(ha->fw_revision, 0, sizeof(ha->fw_revision)); qla2x00_get_flash_version() 2835 qla2x00_read_flash_data(ha, dbyte, ha->flt_region_fw * 4 + 10, qla2x00_get_flash_version() 2849 ha->flt_region_fw * 4); qla2x00_get_flash_version() 2852 ha->fw_revision[0] = dbyte[0] << 16 | dbyte[1]; qla2x00_get_flash_version() 2853 ha->fw_revision[1] = dbyte[2] << 16 | dbyte[3]; qla2x00_get_flash_version() 2854 ha->fw_revision[2] = dbyte[4] << 16 | dbyte[5]; qla2x00_get_flash_version() 2857 "%d.%d.%d.\n", ha->fw_revision[0], qla2x00_get_flash_version() 2858 ha->fw_revision[1], ha->fw_revision[2]); qla2x00_get_flash_version() 2862 qla2x00_flash_disable(ha); qla2x00_get_flash_version() 2875 struct qla_hw_data *ha = vha->hw; qla82xx_get_flash_version() local 2880 memset(ha->bios_revision, 0, sizeof(ha->bios_revision)); qla82xx_get_flash_version() 2881 memset(ha->efi_revision, 0, sizeof(ha->efi_revision)); qla82xx_get_flash_version() 2882 memset(ha->fcode_revision, 0, sizeof(ha->fcode_revision)); qla82xx_get_flash_version() 2883 memset(ha->fw_revision, 0, sizeof(ha->fw_revision)); qla82xx_get_flash_version() 2888 pcihdr = ha->flt_region_boot << 2; qla82xx_get_flash_version() 2892 ha->isp_ops->read_optrom(vha, (uint8_t *)dcode, pcihdr, qla82xx_get_flash_version() 2906 ha->isp_ops->read_optrom(vha, (uint8_t *)dcode, pcids, qla82xx_get_flash_version() 2925 ha->bios_revision[0] = bcode[0x12]; qla82xx_get_flash_version() 2926 ha->bios_revision[1] = bcode[0x13]; qla82xx_get_flash_version() 2929 ha->bios_revision[1], ha->bios_revision[0]); qla82xx_get_flash_version() 2933 ha->fcode_revision[0] = bcode[0x12]; qla82xx_get_flash_version() 2934 ha->fcode_revision[1] = bcode[0x13]; qla82xx_get_flash_version() 2937 ha->fcode_revision[1], ha->fcode_revision[0]); qla82xx_get_flash_version() 2941 ha->efi_revision[0] = bcode[0x12]; qla82xx_get_flash_version() 2942 ha->efi_revision[1] = bcode[0x13]; qla82xx_get_flash_version() 2945 ha->efi_revision[1], ha->efi_revision[0]); qla82xx_get_flash_version() 2961 memset(ha->fw_revision, 0, sizeof(ha->fw_revision)); qla82xx_get_flash_version() 2963 ha->isp_ops->read_optrom(vha, (uint8_t *)dcode, ha->flt_region_fw << 2, qla82xx_get_flash_version() 2970 ha->fw_revision[0] = bcode[0x4]; qla82xx_get_flash_version() 2971 ha->fw_revision[1] = bcode[0x5]; qla82xx_get_flash_version() 2972 ha->fw_revision[2] = bcode[0x6]; qla82xx_get_flash_version() 2975 ha->fw_revision[0], ha->fw_revision[1], qla82xx_get_flash_version() 2976 ha->fw_revision[2]); qla82xx_get_flash_version() 2991 struct qla_hw_data *ha = vha->hw; qla24xx_get_flash_version() local 2993 if (IS_P3P_TYPE(ha)) qla24xx_get_flash_version() 2999 memset(ha->bios_revision, 0, sizeof(ha->bios_revision)); qla24xx_get_flash_version() 3000 memset(ha->efi_revision, 0, sizeof(ha->efi_revision)); qla24xx_get_flash_version() 3001 memset(ha->fcode_revision, 0, sizeof(ha->fcode_revision)); qla24xx_get_flash_version() 3002 memset(ha->fw_revision, 0, sizeof(ha->fw_revision)); qla24xx_get_flash_version() 3007 pcihdr = ha->flt_region_boot << 2; qla24xx_get_flash_version() 3042 ha->bios_revision[0] = bcode[0x12]; qla24xx_get_flash_version() 3043 ha->bios_revision[1] = bcode[0x13]; qla24xx_get_flash_version() 3046 ha->bios_revision[1], ha->bios_revision[0]); qla24xx_get_flash_version() 3050 ha->fcode_revision[0] = bcode[0x12]; qla24xx_get_flash_version() 3051 ha->fcode_revision[1] = bcode[0x13]; qla24xx_get_flash_version() 3054 ha->fcode_revision[1], ha->fcode_revision[0]); qla24xx_get_flash_version() 3058 ha->efi_revision[0] = bcode[0x12]; qla24xx_get_flash_version() 3059 ha->efi_revision[1] = bcode[0x13]; qla24xx_get_flash_version() 3062 ha->efi_revision[1], ha->efi_revision[0]); qla24xx_get_flash_version() 3078 memset(ha->fw_revision, 0, sizeof(ha->fw_revision)); qla24xx_get_flash_version() 3081 qla24xx_read_flash_data(vha, dcode, ha->flt_region_fw + 4, 4); qla24xx_get_flash_version() 3091 ha->flt_region_fw * 4); qla24xx_get_flash_version() 3093 ha->fw_revision[0] = dcode[0]; qla24xx_get_flash_version() 3094 ha->fw_revision[1] = dcode[1]; qla24xx_get_flash_version() 3095 ha->fw_revision[2] = dcode[2]; qla24xx_get_flash_version() 3096 ha->fw_revision[3] = dcode[3]; qla24xx_get_flash_version() 3099 ha->fw_revision[0], ha->fw_revision[1], qla24xx_get_flash_version() 3100 ha->fw_revision[2], ha->fw_revision[3]); qla24xx_get_flash_version() 3104 if (!IS_QLA81XX(ha)) { qla24xx_get_flash_version() 3109 memset(ha->gold_fw_version, 0, sizeof(ha->gold_fw_version)); qla24xx_get_flash_version() 3111 ha->isp_ops->read_optrom(vha, (uint8_t *)dcode, qla24xx_get_flash_version() 3112 ha->flt_region_gold_fw << 2, 32); qla24xx_get_flash_version() 3118 ha->flt_region_gold_fw * 4); qla24xx_get_flash_version() 3123 ha->gold_fw_version[i-4] = be32_to_cpu(dcode[i]); qla24xx_get_flash_version() 3148 struct qla_hw_data *ha = vha->hw; qla2xxx_get_vpd_field() local 3149 uint8_t *pos = ha->vpd; qla2xxx_get_vpd_field() 3150 uint8_t *end = pos + ha->vpd_size; qla2xxx_get_vpd_field() 3153 if (!IS_FWI2_CAPABLE(ha) || !qla2xxx_is_vpd_valid(pos, end)) qla2xxx_get_vpd_field() 3179 struct qla_hw_data *ha = vha->hw; qla24xx_read_fcp_prio_cfg() local 3181 if (!ha->fcp_prio_cfg) { qla24xx_read_fcp_prio_cfg() 3182 ha->fcp_prio_cfg = vmalloc(FCP_PRIO_CFG_SIZE); qla24xx_read_fcp_prio_cfg() 3183 if (!ha->fcp_prio_cfg) { qla24xx_read_fcp_prio_cfg() 3190 memset(ha->fcp_prio_cfg, 0, FCP_PRIO_CFG_SIZE); qla24xx_read_fcp_prio_cfg() 3192 fcp_prio_addr = ha->flt_region_fcp_prio; qla24xx_read_fcp_prio_cfg() 3195 ha->isp_ops->read_optrom(vha, (uint8_t *)ha->fcp_prio_cfg, qla24xx_read_fcp_prio_cfg() 3198 if (!qla24xx_fcp_prio_cfg_valid(vha, ha->fcp_prio_cfg, 0)) qla24xx_read_fcp_prio_cfg() 3203 len = ha->fcp_prio_cfg->num_entries * FCP_PRIO_CFG_ENTRY_SIZE; qla24xx_read_fcp_prio_cfg() 3206 ha->isp_ops->read_optrom(vha, (uint8_t *)&ha->fcp_prio_cfg->entry[0], qla24xx_read_fcp_prio_cfg() 3210 if (!qla24xx_fcp_prio_cfg_valid(vha, ha->fcp_prio_cfg, 1)) qla24xx_read_fcp_prio_cfg() 3213 ha->flags.fcp_prio_enabled = 1; qla24xx_read_fcp_prio_cfg() 3216 vfree(ha->fcp_prio_cfg); qla24xx_read_fcp_prio_cfg() 3217 ha->fcp_prio_cfg = NULL; qla24xx_read_fcp_prio_cfg()
H A D	qla_nx.c	355 qla82xx_pci_set_crbwindow_2M(struct qla_hw_data *ha, ulong *off) qla82xx_pci_set_crbwindow_2M() argument 358 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); qla82xx_pci_set_crbwindow_2M() 360 ha->crb_win = CRB_HI(*off); qla82xx_pci_set_crbwindow_2M() 361 writel(ha->crb_win, qla82xx_pci_set_crbwindow_2M() 362 (void __iomem *)(CRB_WINDOW_2M + ha->nx_pcibase)); qla82xx_pci_set_crbwindow_2M() 368 (CRB_WINDOW_2M + ha->nx_pcibase)); qla82xx_pci_set_crbwindow_2M() 369 if (win_read != ha->crb_win) { qla82xx_pci_set_crbwindow_2M() 373 __func__, ha->crb_win, win_read, *off); qla82xx_pci_set_crbwindow_2M() 375 *off = (*off & MASK(16)) + CRB_INDIRECT_2M + ha->nx_pcibase; qla82xx_pci_set_crbwindow_2M() 379 qla82xx_pci_set_crbwindow(struct qla_hw_data *ha, u64 off) qla82xx_pci_set_crbwindow() argument 381 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); qla82xx_pci_set_crbwindow() 392 if (ha->curr_window != 0) qla82xx_pci_set_crbwindow() 401 if (ha->curr_window != 1) qla82xx_pci_set_crbwindow() 420 qla82xx_pci_get_crb_addr_2M(struct qla_hw_data *ha, ulong *off) qla82xx_pci_get_crb_addr_2M() argument 429 QLA82XX_PCI_CAMQM_2M_BASE + ha->nx_pcibase; qla82xx_pci_get_crb_addr_2M() 442 *off = *off + m->start_2M - m->start_128M + ha->nx_pcibase; qla82xx_pci_get_crb_addr_2M() 450 static int qla82xx_crb_win_lock(struct qla_hw_data *ha) qla82xx_crb_win_lock() argument 456 done = qla82xx_rd_32(ha, QLA82XX_PCIE_REG(PCIE_SEM7_LOCK)); qla82xx_crb_win_lock() 463 qla82xx_wr_32(ha, QLA82XX_CRB_WIN_LOCK_ID, ha->portnum); qla82xx_crb_win_lock() 468 qla82xx_wr_32(struct qla_hw_data *ha, ulong off, u32 data) qla82xx_wr_32() argument 473 rv = qla82xx_pci_get_crb_addr_2M(ha, &off); qla82xx_wr_32() 478 write_lock_irqsave(&ha->hw_lock, flags); qla82xx_wr_32() 479 qla82xx_crb_win_lock(ha); qla82xx_wr_32() 480 qla82xx_pci_set_crbwindow_2M(ha, &off); qla82xx_wr_32() 486 qla82xx_rd_32(ha, QLA82XX_PCIE_REG(PCIE_SEM7_UNLOCK)); qla82xx_wr_32() 487 write_unlock_irqrestore(&ha->hw_lock, flags); qla82xx_wr_32() 493 qla82xx_rd_32(struct qla_hw_data *ha, ulong off) qla82xx_rd_32() argument 499 rv = qla82xx_pci_get_crb_addr_2M(ha, &off); qla82xx_rd_32() 504 write_lock_irqsave(&ha->hw_lock, flags); qla82xx_rd_32() 505 qla82xx_crb_win_lock(ha); qla82xx_rd_32() 506 qla82xx_pci_set_crbwindow_2M(ha, &off); qla82xx_rd_32() 511 qla82xx_rd_32(ha, QLA82XX_PCIE_REG(PCIE_SEM7_UNLOCK)); qla82xx_rd_32() 512 write_unlock_irqrestore(&ha->hw_lock, flags); qla82xx_rd_32() 518 int qla82xx_idc_lock(struct qla_hw_data *ha) qla82xx_idc_lock() argument 525 done = qla82xx_rd_32(ha, QLA82XX_PCIE_REG(PCIE_SEM5_LOCK)); qla82xx_idc_lock() 545 void qla82xx_idc_unlock(struct qla_hw_data *ha) qla82xx_idc_unlock() argument 547 qla82xx_rd_32(ha, QLA82XX_PCIE_REG(PCIE_SEM5_UNLOCK)); qla82xx_idc_unlock() 558 qla82xx_pci_mem_bound_check(struct qla_hw_data *ha, qla82xx_pci_mem_bound_check() argument 574 qla82xx_pci_set_window(struct qla_hw_data *ha, unsigned long long addr) qla82xx_pci_set_window() argument 578 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); qla82xx_pci_set_window() 584 ha->ddr_mn_window = window; qla82xx_pci_set_window() 585 qla82xx_wr_32(ha, qla82xx_pci_set_window() 586 ha->mn_win_crb | QLA82XX_PCI_CRBSPACE, window); qla82xx_pci_set_window() 587 win_read = qla82xx_rd_32(ha, qla82xx_pci_set_window() 588 ha->mn_win_crb | QLA82XX_PCI_CRBSPACE); qla82xx_pci_set_window() 604 ha->ddr_mn_window = window; qla82xx_pci_set_window() 605 qla82xx_wr_32(ha, qla82xx_pci_set_window() 606 ha->mn_win_crb | QLA82XX_PCI_CRBSPACE, window); qla82xx_pci_set_window() 607 win_read = qla82xx_rd_32(ha, qla82xx_pci_set_window() 608 ha->mn_win_crb | QLA82XX_PCI_CRBSPACE); qla82xx_pci_set_window() 622 ha->qdr_sn_window = window; qla82xx_pci_set_window() 623 qla82xx_wr_32(ha, qla82xx_pci_set_window() 624 ha->ms_win_crb | QLA82XX_PCI_CRBSPACE, window); qla82xx_pci_set_window() 625 win_read = qla82xx_rd_32(ha, qla82xx_pci_set_window() 626 ha->ms_win_crb | QLA82XX_PCI_CRBSPACE); qla82xx_pci_set_window() 650 static int qla82xx_pci_is_same_window(struct qla_hw_data *ha, qla82xx_pci_is_same_window() argument 671 if (ha->qdr_sn_window == window) qla82xx_pci_is_same_window() 677 static int qla82xx_pci_mem_read_direct(struct qla_hw_data *ha, qla82xx_pci_mem_read_direct() argument 687 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); qla82xx_pci_mem_read_direct() 689 write_lock_irqsave(&ha->hw_lock, flags); qla82xx_pci_mem_read_direct() 695 start = qla82xx_pci_set_window(ha, off); qla82xx_pci_mem_read_direct() 697 (qla82xx_pci_is_same_window(ha, off + size - 1) == 0)) { qla82xx_pci_mem_read_direct() 698 write_unlock_irqrestore(&ha->hw_lock, flags); qla82xx_pci_mem_read_direct() 706 write_unlock_irqrestore(&ha->hw_lock, flags); qla82xx_pci_mem_read_direct() 707 mem_base = pci_resource_start(ha->pdev, 0); qla82xx_pci_mem_read_direct() 722 write_lock_irqsave(&ha->hw_lock, flags); qla82xx_pci_mem_read_direct() 741 write_unlock_irqrestore(&ha->hw_lock, flags); qla82xx_pci_mem_read_direct() 749 qla82xx_pci_mem_write_direct(struct qla_hw_data *ha, qla82xx_pci_mem_write_direct() argument 759 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); qla82xx_pci_mem_write_direct() 761 write_lock_irqsave(&ha->hw_lock, flags); qla82xx_pci_mem_write_direct() 767 start = qla82xx_pci_set_window(ha, off); qla82xx_pci_mem_write_direct() 769 (qla82xx_pci_is_same_window(ha, off + size - 1) == 0)) { qla82xx_pci_mem_write_direct() 770 write_unlock_irqrestore(&ha->hw_lock, flags); qla82xx_pci_mem_write_direct() 778 write_unlock_irqrestore(&ha->hw_lock, flags); qla82xx_pci_mem_write_direct() 779 mem_base = pci_resource_start(ha->pdev, 0); qla82xx_pci_mem_write_direct() 793 write_lock_irqsave(&ha->hw_lock, flags); qla82xx_pci_mem_write_direct() 812 write_unlock_irqrestore(&ha->hw_lock, flags); qla82xx_pci_mem_write_direct() 847 qla82xx_rom_lock(struct qla_hw_data *ha) qla82xx_rom_lock() argument 851 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); qla82xx_rom_lock() 855 done = qla82xx_rd_32(ha, QLA82XX_PCIE_REG(PCIE_SEM2_LOCK)); qla82xx_rom_lock() 859 lock_owner = qla82xx_rd_32(ha, QLA82XX_ROM_LOCK_ID); qla82xx_rom_lock() 862 __func__, ha->portnum, lock_owner); qla82xx_rom_lock() 867 qla82xx_wr_32(ha, QLA82XX_ROM_LOCK_ID, ha->portnum); qla82xx_rom_lock() 872 qla82xx_rom_unlock(struct qla_hw_data *ha) qla82xx_rom_unlock() argument 874 qla82xx_wr_32(ha, QLA82XX_ROM_LOCK_ID, 0xffffffff); qla82xx_rom_unlock() 875 qla82xx_rd_32(ha, QLA82XX_PCIE_REG(PCIE_SEM2_UNLOCK)); qla82xx_rom_unlock() 879 qla82xx_wait_rom_busy(struct qla_hw_data *ha) qla82xx_wait_rom_busy() argument 883 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); qla82xx_wait_rom_busy() 886 done = qla82xx_rd_32(ha, QLA82XX_ROMUSB_GLB_STATUS); qla82xx_wait_rom_busy() 900 qla82xx_wait_rom_done(struct qla_hw_data *ha) qla82xx_wait_rom_done() argument 904 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); qla82xx_wait_rom_done() 907 done = qla82xx_rd_32(ha, QLA82XX_ROMUSB_GLB_STATUS); qla82xx_wait_rom_done() 921 qla82xx_md_rw_32(struct qla_hw_data *ha, uint32_t off, u32 data, uint8_t flag) qla82xx_md_rw_32() argument 925 WRT_REG_DWORD((void __iomem *)(CRB_WINDOW_2M + ha->nx_pcibase), qla82xx_md_rw_32() 929 RD_REG_DWORD((void __iomem *)(CRB_WINDOW_2M + ha->nx_pcibase)); qla82xx_md_rw_32() 934 (off_value + CRB_INDIRECT_2M + ha->nx_pcibase), qla82xx_md_rw_32() 938 (off_value + CRB_INDIRECT_2M + ha->nx_pcibase)); qla82xx_md_rw_32() 944 qla82xx_do_rom_fast_read(struct qla_hw_data *ha, int addr, int *valp) qla82xx_do_rom_fast_read() argument 947 qla82xx_md_rw_32(ha, MD_DIRECT_ROM_WINDOW, (addr & 0xFFFF0000), 1); qla82xx_do_rom_fast_read() 948 *valp = qla82xx_md_rw_32(ha, MD_DIRECT_ROM_READ_BASE + qla82xx_do_rom_fast_read() 955 qla82xx_rom_fast_read(struct qla_hw_data *ha, int addr, int *valp) qla82xx_rom_fast_read() argument 959 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); qla82xx_rom_fast_read() 961 while ((qla82xx_rom_lock(ha) != 0) && (loops < 50000)) { qla82xx_rom_fast_read() 967 lock_owner = qla82xx_rd_32(ha, QLA82XX_ROM_LOCK_ID); qla82xx_rom_fast_read() 973 ret = qla82xx_do_rom_fast_read(ha, addr, valp); qla82xx_rom_fast_read() 974 qla82xx_rom_unlock(ha); qla82xx_rom_fast_read() 979 qla82xx_read_status_reg(struct qla_hw_data *ha, uint32_t *val) qla82xx_read_status_reg() argument 981 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); qla82xx_read_status_reg() 982 qla82xx_wr_32(ha, QLA82XX_ROMUSB_ROM_INSTR_OPCODE, M25P_INSTR_RDSR); qla82xx_read_status_reg() 983 qla82xx_wait_rom_busy(ha); qla82xx_read_status_reg() 984 if (qla82xx_wait_rom_done(ha)) { qla82xx_read_status_reg() 989 *val = qla82xx_rd_32(ha, QLA82XX_ROMUSB_ROM_RDATA); qla82xx_read_status_reg() 994 qla82xx_flash_wait_write_finish(struct qla_hw_data *ha) qla82xx_flash_wait_write_finish() argument 1000 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); qla82xx_flash_wait_write_finish() 1002 qla82xx_wr_32(ha, QLA82XX_ROMUSB_ROM_ABYTE_CNT, 0); qla82xx_flash_wait_write_finish() 1004 ret = qla82xx_read_status_reg(ha, &val); qla82xx_flash_wait_write_finish() 1019 qla82xx_flash_set_write_enable(struct qla_hw_data *ha) qla82xx_flash_set_write_enable() argument 1022 qla82xx_wait_rom_busy(ha); qla82xx_flash_set_write_enable() 1023 qla82xx_wr_32(ha, QLA82XX_ROMUSB_ROM_ABYTE_CNT, 0); qla82xx_flash_set_write_enable() 1024 qla82xx_wr_32(ha, QLA82XX_ROMUSB_ROM_INSTR_OPCODE, M25P_INSTR_WREN); qla82xx_flash_set_write_enable() 1025 qla82xx_wait_rom_busy(ha); qla82xx_flash_set_write_enable() 1026 if (qla82xx_wait_rom_done(ha)) qla82xx_flash_set_write_enable() 1028 if (qla82xx_read_status_reg(ha, &val) != 0) qla82xx_flash_set_write_enable() 1036 qla82xx_write_status_reg(struct qla_hw_data *ha, uint32_t val) qla82xx_write_status_reg() argument 1038 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); qla82xx_write_status_reg() 1039 if (qla82xx_flash_set_write_enable(ha)) qla82xx_write_status_reg() 1041 qla82xx_wr_32(ha, QLA82XX_ROMUSB_ROM_WDATA, val); qla82xx_write_status_reg() 1042 qla82xx_wr_32(ha, QLA82XX_ROMUSB_ROM_INSTR_OPCODE, 0x1); qla82xx_write_status_reg() 1043 if (qla82xx_wait_rom_done(ha)) { qla82xx_write_status_reg() 1048 return qla82xx_flash_wait_write_finish(ha); qla82xx_write_status_reg() 1052 qla82xx_write_disable_flash(struct qla_hw_data *ha) qla82xx_write_disable_flash() argument 1054 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); qla82xx_write_disable_flash() 1055 qla82xx_wr_32(ha, QLA82XX_ROMUSB_ROM_INSTR_OPCODE, M25P_INSTR_WRDI); qla82xx_write_disable_flash() 1056 if (qla82xx_wait_rom_done(ha)) { qla82xx_write_disable_flash() 1065 ql82xx_rom_lock_d(struct qla_hw_data *ha) ql82xx_rom_lock_d() argument 1069 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); ql82xx_rom_lock_d() 1071 while ((qla82xx_rom_lock(ha) != 0) && (loops < 50000)) { ql82xx_rom_lock_d() 1077 lock_owner = qla82xx_rd_32(ha, QLA82XX_ROM_LOCK_ID); ql82xx_rom_lock_d() 1086 qla82xx_write_flash_dword(struct qla_hw_data *ha, uint32_t flashaddr, qla82xx_write_flash_dword() argument 1090 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); qla82xx_write_flash_dword() 1092 ret = ql82xx_rom_lock_d(ha); qla82xx_write_flash_dword() 1099 if (qla82xx_flash_set_write_enable(ha)) qla82xx_write_flash_dword() 1102 qla82xx_wr_32(ha, QLA82XX_ROMUSB_ROM_WDATA, data); qla82xx_write_flash_dword() 1103 qla82xx_wr_32(ha, QLA82XX_ROMUSB_ROM_ADDRESS, flashaddr); qla82xx_write_flash_dword() 1104 qla82xx_wr_32(ha, QLA82XX_ROMUSB_ROM_ABYTE_CNT, 3); qla82xx_write_flash_dword() 1105 qla82xx_wr_32(ha, QLA82XX_ROMUSB_ROM_INSTR_OPCODE, M25P_INSTR_PP); qla82xx_write_flash_dword() 1106 qla82xx_wait_rom_busy(ha); qla82xx_write_flash_dword() 1107 if (qla82xx_wait_rom_done(ha)) { qla82xx_write_flash_dword() 1114 ret = qla82xx_flash_wait_write_finish(ha); qla82xx_write_flash_dword() 1117 qla82xx_rom_unlock(ha); qla82xx_write_flash_dword() 1132 struct qla_hw_data *ha = vha->hw; qla82xx_pinit_from_rom() local 1140 qla82xx_rom_lock(ha); qla82xx_pinit_from_rom() 1143 qla82xx_wr_32(ha, QLA82XX_CRB_I2Q + 0x10, 0x0); qla82xx_pinit_from_rom() 1144 qla82xx_wr_32(ha, QLA82XX_CRB_I2Q + 0x14, 0x0); qla82xx_pinit_from_rom() 1145 qla82xx_wr_32(ha, QLA82XX_CRB_I2Q + 0x18, 0x0); qla82xx_pinit_from_rom() 1146 qla82xx_wr_32(ha, QLA82XX_CRB_I2Q + 0x1c, 0x0); qla82xx_pinit_from_rom() 1147 qla82xx_wr_32(ha, QLA82XX_CRB_I2Q + 0x20, 0x0); qla82xx_pinit_from_rom() 1148 qla82xx_wr_32(ha, QLA82XX_CRB_I2Q + 0x24, 0x0); qla82xx_pinit_from_rom() 1151 qla82xx_wr_32(ha, QLA82XX_CRB_NIU + 0x40, 0xff); qla82xx_pinit_from_rom() 1153 qla82xx_wr_32(ha, QLA82XX_CRB_NIU + 0x70000, 0x00); qla82xx_pinit_from_rom() 1155 qla82xx_wr_32(ha, QLA82XX_CRB_NIU + 0x80000, 0x00); qla82xx_pinit_from_rom() 1157 qla82xx_wr_32(ha, QLA82XX_CRB_NIU + 0x90000, 0x00); qla82xx_pinit_from_rom() 1159 qla82xx_wr_32(ha, QLA82XX_CRB_NIU + 0xa0000, 0x00); qla82xx_pinit_from_rom() 1161 qla82xx_wr_32(ha, QLA82XX_CRB_NIU + 0xb0000, 0x00); qla82xx_pinit_from_rom() 1164 val = qla82xx_rd_32(ha, QLA82XX_CRB_SRE + 0x1000); qla82xx_pinit_from_rom() 1165 qla82xx_wr_32(ha, QLA82XX_CRB_SRE + 0x1000, val & (~(0x1))); qla82xx_pinit_from_rom() 1168 qla82xx_wr_32(ha, QLA82XX_CRB_EPG + 0x1300, 0x1); qla82xx_pinit_from_rom() 1171 qla82xx_wr_32(ha, QLA82XX_CRB_TIMER + 0x0, 0x0); qla82xx_pinit_from_rom() 1172 qla82xx_wr_32(ha, QLA82XX_CRB_TIMER + 0x8, 0x0); qla82xx_pinit_from_rom() 1173 qla82xx_wr_32(ha, QLA82XX_CRB_TIMER + 0x10, 0x0); qla82xx_pinit_from_rom() 1174 qla82xx_wr_32(ha, QLA82XX_CRB_TIMER + 0x18, 0x0); qla82xx_pinit_from_rom() 1175 qla82xx_wr_32(ha, QLA82XX_CRB_TIMER + 0x100, 0x0); qla82xx_pinit_from_rom() 1176 qla82xx_wr_32(ha, QLA82XX_CRB_TIMER + 0x200, 0x0); qla82xx_pinit_from_rom() 1179 qla82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_0 + 0x3c, 1); qla82xx_pinit_from_rom() 1180 qla82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_1 + 0x3c, 1); qla82xx_pinit_from_rom() 1181 qla82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_2 + 0x3c, 1); qla82xx_pinit_from_rom() 1182 qla82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_3 + 0x3c, 1); qla82xx_pinit_from_rom() 1183 qla82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_4 + 0x3c, 1); qla82xx_pinit_from_rom() 1189 qla82xx_wr_32(ha, QLA82XX_ROMUSB_GLB_SW_RESET, 0xfeffffff); qla82xx_pinit_from_rom() 1191 qla82xx_wr_32(ha, QLA82XX_ROMUSB_GLB_SW_RESET, 0xffffffff); qla82xx_pinit_from_rom() 1192 qla82xx_rom_unlock(ha); qla82xx_pinit_from_rom() 1199 if (qla82xx_rom_fast_read(ha, 0, &n) != 0 || n != 0xcafecafeUL || qla82xx_pinit_from_rom() 1200 qla82xx_rom_fast_read(ha, 4, &n) != 0) { qla82xx_pinit_from_rom() 1230 if (qla82xx_rom_fast_read(ha, 8*i + 4*offset, &val) != 0 || qla82xx_pinit_from_rom() 1231 qla82xx_rom_fast_read(ha, 8*i + 4*offset + 4, &addr) != 0) { qla82xx_pinit_from_rom() 1281 qla82xx_wr_32(ha, off, buf[i].data); qla82xx_pinit_from_rom() 1298 qla82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_D+0xec, 0x1e); qla82xx_pinit_from_rom() 1299 qla82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_D+0x4c, 8); qla82xx_pinit_from_rom() 1300 qla82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_I+0x4c, 8); qla82xx_pinit_from_rom() 1303 qla82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_0+0x8, 0); qla82xx_pinit_from_rom() 1304 qla82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_0+0xc, 0); qla82xx_pinit_from_rom() 1305 qla82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_1+0x8, 0); qla82xx_pinit_from_rom() 1306 qla82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_1+0xc, 0); qla82xx_pinit_from_rom() 1307 qla82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_2+0x8, 0); qla82xx_pinit_from_rom() 1308 qla82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_2+0xc, 0); qla82xx_pinit_from_rom() 1309 qla82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_3+0x8, 0); qla82xx_pinit_from_rom() 1310 qla82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_3+0xc, 0); qla82xx_pinit_from_rom() 1315 qla82xx_pci_mem_write_2M(struct qla_hw_data *ha, qla82xx_pci_mem_write_2M() argument 1330 if (qla82xx_pci_mem_bound_check(ha, off, size) == 0) qla82xx_pci_mem_write_2M() 1331 return qla82xx_pci_mem_write_direct(ha, qla82xx_pci_mem_write_2M() 1346 if (qla82xx_pci_mem_read_2M(ha, off8 + qla82xx_pci_mem_write_2M() 1381 qla82xx_wr_32(ha, mem_crb+MIU_TEST_AGT_ADDR_LO, temp); qla82xx_pci_mem_write_2M() 1383 qla82xx_wr_32(ha, mem_crb+MIU_TEST_AGT_ADDR_HI, temp); qla82xx_pci_mem_write_2M() 1385 qla82xx_wr_32(ha, mem_crb+MIU_TEST_AGT_WRDATA_LO, temp); qla82xx_pci_mem_write_2M() 1387 qla82xx_wr_32(ha, mem_crb+MIU_TEST_AGT_WRDATA_HI, temp); qla82xx_pci_mem_write_2M() 1389 qla82xx_wr_32(ha, mem_crb + qla82xx_pci_mem_write_2M() 1392 qla82xx_wr_32(ha, mem_crb + qla82xx_pci_mem_write_2M() 1396 qla82xx_wr_32(ha, mem_crb + MIU_TEST_AGT_CTRL, temp); qla82xx_pci_mem_write_2M() 1398 qla82xx_wr_32(ha, mem_crb + MIU_TEST_AGT_CTRL, temp); qla82xx_pci_mem_write_2M() 1401 temp = qla82xx_rd_32(ha, mem_crb + MIU_TEST_AGT_CTRL); qla82xx_pci_mem_write_2M() 1408 dev_err(&ha->pdev->dev, qla82xx_pci_mem_write_2M() 1419 qla82xx_fw_load_from_flash(struct qla_hw_data *ha) qla82xx_fw_load_from_flash() argument 1423 long flashaddr = ha->flt_region_bootload << 2; qla82xx_fw_load_from_flash() 1430 if ((qla82xx_rom_fast_read(ha, flashaddr, (int *)&low)) || qla82xx_fw_load_from_flash() 1431 (qla82xx_rom_fast_read(ha, flashaddr + 4, (int *)&high))) { qla82xx_fw_load_from_flash() 1435 qla82xx_pci_mem_write_2M(ha, memaddr, &data, 8); qla82xx_fw_load_from_flash() 1443 read_lock(&ha->hw_lock); qla82xx_fw_load_from_flash() 1444 qla82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_0 + 0x18, 0x1020); qla82xx_fw_load_from_flash() 1445 qla82xx_wr_32(ha, QLA82XX_ROMUSB_GLB_SW_RESET, 0x80001e); qla82xx_fw_load_from_flash() 1446 read_unlock(&ha->hw_lock); qla82xx_fw_load_from_flash() 1451 qla82xx_pci_mem_read_2M(struct qla_hw_data *ha, qla82xx_pci_mem_read_2M() argument 1467 if (qla82xx_pci_mem_bound_check(ha, off, size) == 0) qla82xx_pci_mem_read_2M() 1468 return qla82xx_pci_mem_read_direct(ha, qla82xx_pci_mem_read_2M() 1482 qla82xx_wr_32(ha, mem_crb + MIU_TEST_AGT_ADDR_LO, temp); qla82xx_pci_mem_read_2M() 1484 qla82xx_wr_32(ha, mem_crb + MIU_TEST_AGT_ADDR_HI, temp); qla82xx_pci_mem_read_2M() 1486 qla82xx_wr_32(ha, mem_crb + MIU_TEST_AGT_CTRL, temp); qla82xx_pci_mem_read_2M() 1488 qla82xx_wr_32(ha, mem_crb + MIU_TEST_AGT_CTRL, temp); qla82xx_pci_mem_read_2M() 1491 temp = qla82xx_rd_32(ha, mem_crb + MIU_TEST_AGT_CTRL); qla82xx_pci_mem_read_2M() 1498 dev_err(&ha->pdev->dev, qla82xx_pci_mem_read_2M() 1506 temp = qla82xx_rd_32(ha, qla82xx_pci_mem_read_2M() 1563 qla82xx_get_data_desc(struct qla_hw_data *ha, qla82xx_get_data_desc() argument 1566 const u8 *unirom = ha->hablob->fw->data; qla82xx_get_data_desc() 1567 int idx = cpu_to_le32(*((int *)&unirom[ha->file_prd_off] + idx_offset)); qla82xx_get_data_desc() 1582 qla82xx_get_bootld_offset(struct qla_hw_data *ha) qla82xx_get_bootld_offset() argument 1587 if (ha->fw_type == QLA82XX_UNIFIED_ROMIMAGE) { qla82xx_get_bootld_offset() 1588 uri_desc = qla82xx_get_data_desc(ha, qla82xx_get_bootld_offset() 1594 return (u8 *)&ha->hablob->fw->data[offset]; qla82xx_get_bootld_offset() 1598 qla82xx_get_fw_size(struct qla_hw_data *ha) qla82xx_get_fw_size() argument 1602 if (ha->fw_type == QLA82XX_UNIFIED_ROMIMAGE) { qla82xx_get_fw_size() 1603 uri_desc = qla82xx_get_data_desc(ha, QLA82XX_URI_DIR_SECT_FW, qla82xx_get_fw_size() 1609 return cpu_to_le32(*(u32 *)&ha->hablob->fw->data[FW_SIZE_OFFSET]); qla82xx_get_fw_size() 1613 qla82xx_get_fw_offs(struct qla_hw_data *ha) qla82xx_get_fw_offs() argument 1618 if (ha->fw_type == QLA82XX_UNIFIED_ROMIMAGE) { qla82xx_get_fw_offs() 1619 uri_desc = qla82xx_get_data_desc(ha, QLA82XX_URI_DIR_SECT_FW, qla82xx_get_fw_offs() 1625 return (u8 *)&ha->hablob->fw->data[offset]; qla82xx_get_fw_offs() 1648 qla82xx_iospace_config(struct qla_hw_data *ha) qla82xx_iospace_config() argument 1652 if (pci_request_regions(ha->pdev, QLA2XXX_DRIVER_NAME)) { qla82xx_iospace_config() 1653 ql_log_pci(ql_log_fatal, ha->pdev, 0x000c, qla82xx_iospace_config() 1659 if (!(pci_resource_flags(ha->pdev, 0) & IORESOURCE_MEM)) { qla82xx_iospace_config() 1660 ql_log_pci(ql_log_fatal, ha->pdev, 0x000d, qla82xx_iospace_config() 1665 len = pci_resource_len(ha->pdev, 0); qla82xx_iospace_config() 1666 ha->nx_pcibase = qla82xx_iospace_config() 1667 (unsigned long)ioremap(pci_resource_start(ha->pdev, 0), len); qla82xx_iospace_config() 1668 if (!ha->nx_pcibase) { qla82xx_iospace_config() 1669 ql_log_pci(ql_log_fatal, ha->pdev, 0x000e, qla82xx_iospace_config() 1675 if (IS_QLA8044(ha)) { qla82xx_iospace_config() 1676 ha->iobase = qla82xx_iospace_config() 1677 (device_reg_t *)((uint8_t *)ha->nx_pcibase); qla82xx_iospace_config() 1678 } else if (IS_QLA82XX(ha)) { qla82xx_iospace_config() 1679 ha->iobase = qla82xx_iospace_config() 1680 (device_reg_t *)((uint8_t *)ha->nx_pcibase + qla82xx_iospace_config() 1681 0xbc000 + (ha->pdev->devfn << 11)); qla82xx_iospace_config() 1685 ha->nxdb_wr_ptr = qla82xx_iospace_config() 1686 (unsigned long)ioremap((pci_resource_start(ha->pdev, 4) + qla82xx_iospace_config() 1687 (ha->pdev->devfn << 12)), 4); qla82xx_iospace_config() 1688 if (!ha->nxdb_wr_ptr) { qla82xx_iospace_config() 1689 ql_log_pci(ql_log_fatal, ha->pdev, 0x000f, qla82xx_iospace_config() 1697 ha->nxdb_rd_ptr = (uint8_t *) ha->nx_pcibase + (512 * 1024) + qla82xx_iospace_config() 1698 (ha->pdev->devfn * 8); qla82xx_iospace_config() 1700 ha->nxdb_wr_ptr = (ha->pdev->devfn == 6 ? qla82xx_iospace_config() 1705 ha->max_req_queues = ha->max_rsp_queues = 1; qla82xx_iospace_config() 1706 ha->msix_count = ha->max_rsp_queues + 1; qla82xx_iospace_config() 1707 ql_dbg_pci(ql_dbg_multiq, ha->pdev, 0xc006, qla82xx_iospace_config() 1710 (void *)ha->nx_pcibase, ha->iobase, qla82xx_iospace_config() 1711 ha->max_req_queues, ha->msix_count); qla82xx_iospace_config() 1712 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0010, qla82xx_iospace_config() 1715 (void *)ha->nx_pcibase, ha->iobase, qla82xx_iospace_config() 1716 ha->max_req_queues, ha->msix_count); qla82xx_iospace_config() 1729 * @ha: HA context 1736 struct qla_hw_data *ha = vha->hw; qla82xx_pci_config() local 1739 pci_set_master(ha->pdev); qla82xx_pci_config() 1740 ret = pci_set_mwi(ha->pdev); qla82xx_pci_config() 1741 ha->chip_revision = ha->pdev->revision; qla82xx_pci_config() 1744 ha->chip_revision); qla82xx_pci_config() 1750 * @ha: HA context 1757 struct qla_hw_data *ha = vha->hw; qla82xx_reset_chip() local 1758 ha->isp_ops->disable_intrs(ha); qla82xx_reset_chip() 1763 struct qla_hw_data *ha = vha->hw; qla82xx_config_rings() local 1764 struct device_reg_82xx __iomem *reg = &ha->iobase->isp82; qla82xx_config_rings() 1766 struct req_que *req = ha->req_q_map[0]; qla82xx_config_rings() 1767 struct rsp_que *rsp = ha->rsp_q_map[0]; qla82xx_config_rings() 1770 icb = (struct init_cb_81xx *)ha->init_cb; qla82xx_config_rings() 1786 qla82xx_fw_load_from_blob(struct qla_hw_data *ha) qla82xx_fw_load_from_blob() argument 1794 ptr64 = (u64 *)qla82xx_get_bootld_offset(ha); qla82xx_fw_load_from_blob() 1799 if (qla82xx_pci_mem_write_2M(ha, flashaddr, &data, 8)) qla82xx_fw_load_from_blob() 1805 size = (__force u32)qla82xx_get_fw_size(ha) / 8; qla82xx_fw_load_from_blob() 1806 ptr64 = (u64 *)qla82xx_get_fw_offs(ha); qla82xx_fw_load_from_blob() 1811 if (qla82xx_pci_mem_write_2M(ha, flashaddr, &data, 8)) qla82xx_fw_load_from_blob() 1822 qla82xx_wr_32(ha, QLA82XX_CAM_RAM(0x1fc), QLA82XX_BDINFO_MAGIC); qla82xx_fw_load_from_blob() 1824 read_lock(&ha->hw_lock); qla82xx_fw_load_from_blob() 1825 qla82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_0 + 0x18, 0x1020); qla82xx_fw_load_from_blob() 1826 qla82xx_wr_32(ha, QLA82XX_ROMUSB_GLB_SW_RESET, 0x80001e); qla82xx_fw_load_from_blob() 1827 read_unlock(&ha->hw_lock); qla82xx_fw_load_from_blob() 1832 qla82xx_set_product_offset(struct qla_hw_data *ha) qla82xx_set_product_offset() argument 1835 const uint8_t *unirom = ha->hablob->fw->data; qla82xx_set_product_offset() 1839 uint8_t chiprev = ha->chip_revision; qla82xx_set_product_offset() 1862 ha->file_prd_off = offset; qla82xx_set_product_offset() 1874 struct qla_hw_data *ha = vha->hw; qla82xx_validate_firmware_blob() local 1875 const struct firmware *fw = ha->hablob->fw; qla82xx_validate_firmware_blob() 1877 ha->fw_type = fw_type; qla82xx_validate_firmware_blob() 1880 if (qla82xx_set_product_offset(ha)) qla82xx_validate_firmware_blob() 1898 qla82xx_check_cmdpeg_state(struct qla_hw_data *ha) qla82xx_check_cmdpeg_state() argument 1902 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); qla82xx_check_cmdpeg_state() 1905 read_lock(&ha->hw_lock); qla82xx_check_cmdpeg_state() 1906 val = qla82xx_rd_32(ha, CRB_CMDPEG_STATE); qla82xx_check_cmdpeg_state() 1907 read_unlock(&ha->hw_lock); qla82xx_check_cmdpeg_state() 1929 val = qla82xx_rd_32(ha, QLA82XX_ROMUSB_GLB_PEGTUNE_DONE); qla82xx_check_cmdpeg_state() 1930 read_lock(&ha->hw_lock); qla82xx_check_cmdpeg_state() 1931 qla82xx_wr_32(ha, CRB_CMDPEG_STATE, PHAN_INITIALIZE_FAILED); qla82xx_check_cmdpeg_state() 1932 read_unlock(&ha->hw_lock); qla82xx_check_cmdpeg_state() 1937 qla82xx_check_rcvpeg_state(struct qla_hw_data *ha) qla82xx_check_rcvpeg_state() argument 1941 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); qla82xx_check_rcvpeg_state() 1944 read_lock(&ha->hw_lock); qla82xx_check_rcvpeg_state() 1945 val = qla82xx_rd_32(ha, CRB_RCVPEG_STATE); qla82xx_check_rcvpeg_state() 1946 read_unlock(&ha->hw_lock); qla82xx_check_rcvpeg_state() 1967 read_lock(&ha->hw_lock); qla82xx_check_rcvpeg_state() 1968 qla82xx_wr_32(ha, CRB_RCVPEG_STATE, PHAN_INITIALIZE_FAILED); qla82xx_check_rcvpeg_state() 1969 read_unlock(&ha->hw_lock); qla82xx_check_rcvpeg_state() 1979 * @ha: SCSI driver HA context 1987 struct qla_hw_data *ha = vha->hw; qla82xx_mbx_completion() local 1988 struct device_reg_82xx __iomem *reg = &ha->iobase->isp82; qla82xx_mbx_completion() 1992 ha->flags.mbox_int = 1; qla82xx_mbx_completion() 1993 ha->mailbox_out[0] = mb0; qla82xx_mbx_completion() 1995 for (cnt = 1; cnt < ha->mbx_count; cnt++) { qla82xx_mbx_completion() 1996 ha->mailbox_out[cnt] = RD_REG_WORD(wptr); qla82xx_mbx_completion() 2000 if (!ha->mcp) qla82xx_mbx_completion() 2019 struct qla_hw_data *ha; qla82xx_intr_handler() local 2034 ha = rsp->hw; qla82xx_intr_handler() 2036 if (!ha->flags.msi_enabled) { qla82xx_intr_handler() 2037 status = qla82xx_rd_32(ha, ISR_INT_VECTOR); qla82xx_intr_handler() 2038 if (!(status & ha->nx_legacy_intr.int_vec_bit)) qla82xx_intr_handler() 2041 status1 = qla82xx_rd_32(ha, ISR_INT_STATE_REG); qla82xx_intr_handler() 2047 qla82xx_wr_32(ha, ha->nx_legacy_intr.tgt_status_reg, 0xffffffff); qla82xx_intr_handler() 2050 qla82xx_rd_32(ha, ISR_INT_VECTOR); qla82xx_intr_handler() 2051 qla82xx_rd_32(ha, ISR_INT_VECTOR); qla82xx_intr_handler() 2053 reg = &ha->iobase->isp82; qla82xx_intr_handler() 2055 spin_lock_irqsave(&ha->hardware_lock, flags); qla82xx_intr_handler() 2056 vha = pci_get_drvdata(ha->pdev); qla82xx_intr_handler() 2090 qla2x00_handle_mbx_completion(ha, status); qla82xx_intr_handler() 2091 spin_unlock_irqrestore(&ha->hardware_lock, flags); qla82xx_intr_handler() 2093 if (!ha->flags.msi_enabled) qla82xx_intr_handler() 2094 qla82xx_wr_32(ha, ha->nx_legacy_intr.tgt_mask_reg, 0xfbff); qla82xx_intr_handler() 2103 struct qla_hw_data *ha; qla82xx_msix_default() local 2118 ha = rsp->hw; qla82xx_msix_default() 2120 reg = &ha->iobase->isp82; qla82xx_msix_default() 2122 spin_lock_irqsave(&ha->hardware_lock, flags); qla82xx_msix_default() 2123 vha = pci_get_drvdata(ha->pdev); qla82xx_msix_default() 2159 qla2x00_handle_mbx_completion(ha, status); qla82xx_msix_default() 2160 spin_unlock_irqrestore(&ha->hardware_lock, flags); qla82xx_msix_default() 2169 struct qla_hw_data *ha; qla82xx_msix_rsp_q() local 2182 ha = rsp->hw; qla82xx_msix_rsp_q() 2183 reg = &ha->iobase->isp82; qla82xx_msix_rsp_q() 2184 spin_lock_irqsave(&ha->hardware_lock, flags); qla82xx_msix_rsp_q() 2185 vha = pci_get_drvdata(ha->pdev); qla82xx_msix_rsp_q() 2192 spin_unlock_irqrestore(&ha->hardware_lock, flags); qla82xx_msix_rsp_q() 2200 struct qla_hw_data *ha; qla82xx_poll() local 2215 ha = rsp->hw; qla82xx_poll() 2217 reg = &ha->iobase->isp82; qla82xx_poll() 2218 spin_lock_irqsave(&ha->hardware_lock, flags); qla82xx_poll() 2219 vha = pci_get_drvdata(ha->pdev); qla82xx_poll() 2253 spin_unlock_irqrestore(&ha->hardware_lock, flags); qla82xx_poll() 2257 qla82xx_enable_intrs(struct qla_hw_data *ha) qla82xx_enable_intrs() argument 2259 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); qla82xx_enable_intrs() 2261 spin_lock_irq(&ha->hardware_lock); qla82xx_enable_intrs() 2262 if (IS_QLA8044(ha)) qla82xx_enable_intrs() 2263 qla8044_wr_reg(ha, LEG_INTR_MASK_OFFSET, 0); qla82xx_enable_intrs() 2265 qla82xx_wr_32(ha, ha->nx_legacy_intr.tgt_mask_reg, 0xfbff); qla82xx_enable_intrs() 2266 spin_unlock_irq(&ha->hardware_lock); qla82xx_enable_intrs() 2267 ha->interrupts_on = 1; qla82xx_enable_intrs() 2271 qla82xx_disable_intrs(struct qla_hw_data *ha) qla82xx_disable_intrs() argument 2273 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); qla82xx_disable_intrs() 2275 spin_lock_irq(&ha->hardware_lock); qla82xx_disable_intrs() 2276 if (IS_QLA8044(ha)) qla82xx_disable_intrs() 2277 qla8044_wr_reg(ha, LEG_INTR_MASK_OFFSET, 1); qla82xx_disable_intrs() 2279 qla82xx_wr_32(ha, ha->nx_legacy_intr.tgt_mask_reg, 0x0400); qla82xx_disable_intrs() 2280 spin_unlock_irq(&ha->hardware_lock); qla82xx_disable_intrs() 2281 ha->interrupts_on = 0; qla82xx_disable_intrs() 2284 void qla82xx_init_flags(struct qla_hw_data *ha) qla82xx_init_flags() argument 2289 rwlock_init(&ha->hw_lock); qla82xx_init_flags() 2290 ha->qdr_sn_window = -1; qla82xx_init_flags() 2291 ha->ddr_mn_window = -1; qla82xx_init_flags() 2292 ha->curr_window = 255; qla82xx_init_flags() 2293 ha->portnum = PCI_FUNC(ha->pdev->devfn); qla82xx_init_flags() 2294 nx_legacy_intr = &legacy_intr[ha->portnum]; qla82xx_init_flags() 2295 ha->nx_legacy_intr.int_vec_bit = nx_legacy_intr->int_vec_bit; qla82xx_init_flags() 2296 ha->nx_legacy_intr.tgt_status_reg = nx_legacy_intr->tgt_status_reg; qla82xx_init_flags() 2297 ha->nx_legacy_intr.tgt_mask_reg = nx_legacy_intr->tgt_mask_reg; qla82xx_init_flags() 2298 ha->nx_legacy_intr.pci_int_reg = nx_legacy_intr->pci_int_reg; qla82xx_init_flags() 2306 struct qla_hw_data *ha = vha->hw; qla82xx_set_idc_version() local 2308 drv_active = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_ACTIVE); qla82xx_set_idc_version() 2309 if (drv_active == (QLA82XX_DRV_ACTIVE << (ha->portnum * 4))) { qla82xx_set_idc_version() 2310 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_IDC_VERSION, qla82xx_set_idc_version() 2315 idc_ver = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_IDC_VERSION); qla82xx_set_idc_version() 2328 struct qla_hw_data *ha = vha->hw; qla82xx_set_drv_active() local 2330 drv_active = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_ACTIVE); qla82xx_set_drv_active() 2334 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_ACTIVE, qla82xx_set_drv_active() 2336 drv_active = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_ACTIVE); qla82xx_set_drv_active() 2338 drv_active |= (QLA82XX_DRV_ACTIVE << (ha->portnum * 4)); qla82xx_set_drv_active() 2339 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_ACTIVE, drv_active); qla82xx_set_drv_active() 2343 qla82xx_clear_drv_active(struct qla_hw_data *ha) qla82xx_clear_drv_active() argument 2347 drv_active = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_ACTIVE); qla82xx_clear_drv_active() 2348 drv_active &= ~(QLA82XX_DRV_ACTIVE << (ha->portnum * 4)); qla82xx_clear_drv_active() 2349 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_ACTIVE, drv_active); qla82xx_clear_drv_active() 2353 qla82xx_need_reset(struct qla_hw_data *ha) qla82xx_need_reset() argument 2358 if (ha->flags.nic_core_reset_owner) qla82xx_need_reset() 2361 drv_state = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_STATE); qla82xx_need_reset() 2362 rval = drv_state & (QLA82XX_DRVST_RST_RDY << (ha->portnum * 4)); qla82xx_need_reset() 2368 qla82xx_set_rst_ready(struct qla_hw_data *ha) qla82xx_set_rst_ready() argument 2371 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); qla82xx_set_rst_ready() 2373 drv_state = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_STATE); qla82xx_set_rst_ready() 2377 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_STATE, QLA82XX_DRVST_NOT_RDY); qla82xx_set_rst_ready() 2378 drv_state = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_STATE); qla82xx_set_rst_ready() 2380 drv_state |= (QLA82XX_DRVST_RST_RDY << (ha->portnum * 4)); qla82xx_set_rst_ready() 2383 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_STATE, drv_state); qla82xx_set_rst_ready() 2387 qla82xx_clear_rst_ready(struct qla_hw_data *ha) qla82xx_clear_rst_ready() argument 2391 drv_state = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_STATE); qla82xx_clear_rst_ready() 2392 drv_state &= ~(QLA82XX_DRVST_RST_RDY << (ha->portnum * 4)); qla82xx_clear_rst_ready() 2393 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_STATE, drv_state); qla82xx_clear_rst_ready() 2397 qla82xx_set_qsnt_ready(struct qla_hw_data *ha) qla82xx_set_qsnt_ready() argument 2401 qsnt_state = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_STATE); qla82xx_set_qsnt_ready() 2402 qsnt_state |= (QLA82XX_DRVST_QSNT_RDY << (ha->portnum * 4)); qla82xx_set_qsnt_ready() 2403 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_STATE, qsnt_state); qla82xx_set_qsnt_ready() 2409 struct qla_hw_data *ha = vha->hw; qla82xx_clear_qsnt_ready() local 2412 qsnt_state = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_STATE); qla82xx_clear_qsnt_ready() 2413 qsnt_state &= ~(QLA82XX_DRVST_QSNT_RDY << (ha->portnum * 4)); qla82xx_clear_qsnt_ready() 2414 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_STATE, qsnt_state); qla82xx_clear_qsnt_ready() 2422 struct qla_hw_data *ha = vha->hw; qla82xx_load_fw() local 2432 rst = qla82xx_rd_32(ha, QLA82XX_ROMUSB_GLB_SW_RESET); qla82xx_load_fw() 2434 qla82xx_wr_32(ha, QLA82XX_ROMUSB_GLB_SW_RESET, rst); qla82xx_load_fw() 2447 if (qla82xx_fw_load_from_flash(ha) == QLA_SUCCESS) { qla82xx_load_fw() 2461 blob = ha->hablob = qla2x00_request_firmware(vha); qla82xx_load_fw() 2480 if (qla82xx_fw_load_from_blob(ha) == QLA_SUCCESS) { qla82xx_load_fw() 2501 struct qla_hw_data *ha = vha->hw; qla82xx_start_firmware() local 2504 qla82xx_wr_32(ha, CRB_DMA_SHIFT, QLA82XX_DMA_SHIFT_VALUE); qla82xx_start_firmware() 2509 qla82xx_wr_32(ha, CRB_CMDPEG_STATE, 0); qla82xx_start_firmware() 2510 qla82xx_wr_32(ha, CRB_RCVPEG_STATE, 0); qla82xx_start_firmware() 2513 qla82xx_wr_32(ha, QLA82XX_PEG_HALT_STATUS1, 0); qla82xx_start_firmware() 2514 qla82xx_wr_32(ha, QLA82XX_PEG_HALT_STATUS2, 0); qla82xx_start_firmware() 2523 if (qla82xx_check_cmdpeg_state(ha) != QLA_SUCCESS) { qla82xx_start_firmware() 2530 pcie_capability_read_word(ha->pdev, PCI_EXP_LNKSTA, &lnk); qla82xx_start_firmware() 2531 ha->link_width = (lnk >> 4) & 0x3f; qla82xx_start_firmware() 2534 return qla82xx_check_rcvpeg_state(ha); qla82xx_start_firmware() 2543 struct qla_hw_data *ha = vha->hw; qla82xx_read_flash_data() local 2547 if (qla82xx_rom_fast_read(ha, faddr, &val)) { qla82xx_read_flash_data() 2559 qla82xx_unprotect_flash(struct qla_hw_data *ha) qla82xx_unprotect_flash() argument 2563 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); qla82xx_unprotect_flash() 2565 ret = ql82xx_rom_lock_d(ha); qla82xx_unprotect_flash() 2572 ret = qla82xx_read_status_reg(ha, &val); qla82xx_unprotect_flash() 2577 ret = qla82xx_write_status_reg(ha, val); qla82xx_unprotect_flash() 2580 qla82xx_write_status_reg(ha, val); qla82xx_unprotect_flash() 2583 if (qla82xx_write_disable_flash(ha) != 0) qla82xx_unprotect_flash() 2588 qla82xx_rom_unlock(ha); qla82xx_unprotect_flash() 2593 qla82xx_protect_flash(struct qla_hw_data *ha) qla82xx_protect_flash() argument 2597 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); qla82xx_protect_flash() 2599 ret = ql82xx_rom_lock_d(ha); qla82xx_protect_flash() 2606 ret = qla82xx_read_status_reg(ha, &val); qla82xx_protect_flash() 2612 ret = qla82xx_write_status_reg(ha, val); qla82xx_protect_flash() 2617 if (qla82xx_write_disable_flash(ha) != 0) qla82xx_protect_flash() 2621 qla82xx_rom_unlock(ha); qla82xx_protect_flash() 2626 qla82xx_erase_sector(struct qla_hw_data *ha, int addr) qla82xx_erase_sector() argument 2629 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); qla82xx_erase_sector() 2631 ret = ql82xx_rom_lock_d(ha); qla82xx_erase_sector() 2638 qla82xx_flash_set_write_enable(ha); qla82xx_erase_sector() 2639 qla82xx_wr_32(ha, QLA82XX_ROMUSB_ROM_ADDRESS, addr); qla82xx_erase_sector() 2640 qla82xx_wr_32(ha, QLA82XX_ROMUSB_ROM_ABYTE_CNT, 3); qla82xx_erase_sector() 2641 qla82xx_wr_32(ha, QLA82XX_ROMUSB_ROM_INSTR_OPCODE, M25P_INSTR_SE); qla82xx_erase_sector() 2643 if (qla82xx_wait_rom_done(ha)) { qla82xx_erase_sector() 2649 ret = qla82xx_flash_wait_write_finish(ha); qla82xx_erase_sector() 2651 qla82xx_rom_unlock(ha); qla82xx_erase_sector() 2678 struct qla_hw_data *ha = vha->hw; qla82xx_write_flash_data() local 2685 optrom = dma_alloc_coherent(&ha->pdev->dev, OPTROM_BURST_SIZE, qla82xx_write_flash_data() 2695 rest_addr = ha->fdt_block_size - 1; qla82xx_write_flash_data() 2698 ret = qla82xx_unprotect_flash(ha); qla82xx_write_flash_data() 2709 ret = qla82xx_erase_sector(ha, faddr); qla82xx_write_flash_data() 2724 (ha->flash_data_off | faddr), qla82xx_write_flash_data() 2730 (ha->flash_data_off | faddr), qla82xx_write_flash_data() 2735 dma_free_coherent(&ha->pdev->dev, qla82xx_write_flash_data() 2746 ret = qla82xx_write_flash_dword(ha, faddr, qla82xx_write_flash_data() 2756 ret = qla82xx_protect_flash(ha); qla82xx_write_flash_data() 2762 dma_free_coherent(&ha->pdev->dev, qla82xx_write_flash_data() 2790 struct qla_hw_data *ha = vha->hw; qla82xx_start_iocbs() local 2791 struct req_que *req = ha->req_q_map[0]; qla82xx_start_iocbs() 2803 reg = &ha->iobase->isp82; qla82xx_start_iocbs() 2804 dbval = 0x04 | (ha->portnum << 5); qla82xx_start_iocbs() 2808 qla82xx_wr_32(ha, ha->nxdb_wr_ptr, dbval); qla82xx_start_iocbs() 2810 WRT_REG_DWORD((unsigned long __iomem *)ha->nxdb_wr_ptr, dbval); qla82xx_start_iocbs() 2812 while (RD_REG_DWORD((void __iomem *)ha->nxdb_rd_ptr) != dbval) { qla82xx_start_iocbs() 2813 WRT_REG_DWORD((unsigned long __iomem *)ha->nxdb_wr_ptr, qla82xx_start_iocbs() 2821 qla82xx_rom_lock_recovery(struct qla_hw_data *ha) qla82xx_rom_lock_recovery() argument 2823 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); qla82xx_rom_lock_recovery() 2826 if (qla82xx_rom_lock(ha)) { qla82xx_rom_lock_recovery() 2827 lock_owner = qla82xx_rd_32(ha, QLA82XX_ROM_LOCK_ID); qla82xx_rom_lock_recovery() 2837 qla82xx_rom_unlock(ha); qla82xx_rom_lock_recovery() 2857 struct qla_hw_data *ha = vha->hw; qla82xx_device_bootstrap() local 2860 need_reset = qla82xx_need_reset(ha); qla82xx_device_bootstrap() 2864 if (ha->flags.isp82xx_fw_hung) qla82xx_device_bootstrap() 2865 qla82xx_rom_lock_recovery(ha); qla82xx_device_bootstrap() 2867 old_count = qla82xx_rd_32(ha, QLA82XX_PEG_ALIVE_COUNTER); qla82xx_device_bootstrap() 2870 count = qla82xx_rd_32(ha, QLA82XX_PEG_ALIVE_COUNTER); qla82xx_device_bootstrap() 2876 qla82xx_rom_lock_recovery(ha); qla82xx_device_bootstrap() 2882 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE, QLA8XXX_DEV_INITIALIZING); qla82xx_device_bootstrap() 2884 qla82xx_idc_unlock(ha); qla82xx_device_bootstrap() 2886 qla82xx_idc_lock(ha); qla82xx_device_bootstrap() 2891 qla82xx_clear_drv_active(ha); qla82xx_device_bootstrap() 2892 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE, QLA8XXX_DEV_FAILED); qla82xx_device_bootstrap() 2899 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE, QLA8XXX_DEV_READY); qla82xx_device_bootstrap() 2917 struct qla_hw_data *ha = vha->hw; qla82xx_need_qsnt_handler() local 2927 qla82xx_set_qsnt_ready(ha); qla82xx_need_qsnt_handler() 2932 drv_state = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_STATE); qla82xx_need_qsnt_handler() 2933 drv_active = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_ACTIVE); qla82xx_need_qsnt_handler() 2947 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE, qla82xx_need_qsnt_handler() 2951 qla82xx_idc_unlock(ha); qla82xx_need_qsnt_handler() 2953 qla82xx_idc_lock(ha); qla82xx_need_qsnt_handler() 2959 qla82xx_idc_unlock(ha); qla82xx_need_qsnt_handler() 2961 qla82xx_idc_lock(ha); qla82xx_need_qsnt_handler() 2963 drv_state = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_STATE); qla82xx_need_qsnt_handler() 2964 drv_active = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_ACTIVE); qla82xx_need_qsnt_handler() 2967 dev_state = qla82xx_rd_32(ha, QLA82XX_CRB_DEV_STATE); qla82xx_need_qsnt_handler() 2972 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE, QLA8XXX_DEV_QUIESCENT); qla82xx_need_qsnt_handler() 2989 struct qla_hw_data *ha = vha->hw; qla82xx_wait_for_state_change() local 2994 qla82xx_idc_lock(ha); qla82xx_wait_for_state_change() 2995 dev_state = qla82xx_rd_32(ha, QLA82XX_CRB_DEV_STATE); qla82xx_wait_for_state_change() 2996 qla82xx_idc_unlock(ha); qla82xx_wait_for_state_change() 3005 struct qla_hw_data *ha = vha->hw; qla8xxx_dev_failed_handler() local 3011 if (IS_QLA82XX(ha)) { qla8xxx_dev_failed_handler() 3012 qla82xx_clear_drv_active(ha); qla8xxx_dev_failed_handler() 3013 qla82xx_idc_unlock(ha); qla8xxx_dev_failed_handler() 3014 } else if (IS_QLA8044(ha)) { qla8xxx_dev_failed_handler() 3015 qla8044_clear_drv_active(ha); qla8xxx_dev_failed_handler() 3016 qla8044_idc_unlock(ha); qla8xxx_dev_failed_handler() 3044 struct qla_hw_data *ha = vha->hw; qla82xx_need_reset_handler() local 3045 struct req_que *req = ha->req_q_map[0]; qla82xx_need_reset_handler() 3048 qla82xx_idc_unlock(ha); qla82xx_need_reset_handler() 3050 ha->isp_ops->get_flash_version(vha, req->ring); qla82xx_need_reset_handler() 3051 ha->isp_ops->nvram_config(vha); qla82xx_need_reset_handler() 3052 qla82xx_idc_lock(ha); qla82xx_need_reset_handler() 3055 drv_active = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_ACTIVE); qla82xx_need_reset_handler() 3056 if (!ha->flags.nic_core_reset_owner) { qla82xx_need_reset_handler() 3058 "reset_acknowledged by 0x%x\n", ha->portnum); qla82xx_need_reset_handler() 3059 qla82xx_set_rst_ready(ha); qla82xx_need_reset_handler() 3061 active_mask = ~(QLA82XX_DRV_ACTIVE << (ha->portnum * 4)); qla82xx_need_reset_handler() 3068 reset_timeout = jiffies + (ha->fcoe_reset_timeout * HZ); qla82xx_need_reset_handler() 3070 drv_state = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_STATE); qla82xx_need_reset_handler() 3071 drv_active = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_ACTIVE); qla82xx_need_reset_handler() 3072 dev_state = qla82xx_rd_32(ha, QLA82XX_CRB_DEV_STATE); qla82xx_need_reset_handler() 3086 qla82xx_idc_unlock(ha); qla82xx_need_reset_handler() 3088 qla82xx_idc_lock(ha); qla82xx_need_reset_handler() 3089 drv_state = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_STATE); qla82xx_need_reset_handler() 3090 drv_active = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_ACTIVE); qla82xx_need_reset_handler() 3091 if (ha->flags.nic_core_reset_owner) qla82xx_need_reset_handler() 3093 dev_state = qla82xx_rd_32(ha, QLA82XX_CRB_DEV_STATE); qla82xx_need_reset_handler() 3111 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE, QLA8XXX_DEV_COLD); qla82xx_need_reset_handler() 3112 qla82xx_set_rst_ready(ha); qla82xx_need_reset_handler() 3126 struct qla_hw_data *ha = vha->hw; qla82xx_check_md_needed() local 3130 fw_major_version = ha->fw_major_version; qla82xx_check_md_needed() 3131 fw_minor_version = ha->fw_minor_version; qla82xx_check_md_needed() 3132 fw_subminor_version = ha->fw_subminor_version; qla82xx_check_md_needed() 3139 if (!ha->fw_dumped) { qla82xx_check_md_needed() 3140 if ((fw_major_version != ha->fw_major_version || qla82xx_check_md_needed() 3141 fw_minor_version != ha->fw_minor_version || qla82xx_check_md_needed() 3142 fw_subminor_version != ha->fw_subminor_version) || qla82xx_check_md_needed() 3143 (ha->prev_minidump_failed)) { qla82xx_check_md_needed() 3148 ha->fw_major_version, qla82xx_check_md_needed() 3149 ha->fw_minor_version, qla82xx_check_md_needed() 3150 ha->fw_subminor_version, qla82xx_check_md_needed() 3151 ha->prev_minidump_failed); qla82xx_check_md_needed() 3214 struct qla_hw_data *ha = vha->hw; qla82xx_device_state_handler() local 3217 qla82xx_idc_lock(ha); qla82xx_device_state_handler() 3223 dev_state = qla82xx_rd_32(ha, QLA82XX_CRB_DEV_STATE); qla82xx_device_state_handler() 3231 dev_init_timeout = jiffies + (ha->fcoe_dev_init_timeout * HZ); qla82xx_device_state_handler() 3241 dev_state = qla82xx_rd_32(ha, QLA82XX_CRB_DEV_STATE); qla82xx_device_state_handler() 3256 ha->flags.nic_core_reset_owner = 0; qla82xx_device_state_handler() 3262 qla82xx_idc_unlock(ha); qla82xx_device_state_handler() 3264 qla82xx_idc_lock(ha); qla82xx_device_state_handler() 3270 qla82xx_idc_unlock(ha); qla82xx_device_state_handler() 3272 qla82xx_idc_lock(ha); qla82xx_device_state_handler() 3275 (ha->fcoe_dev_init_timeout * HZ); qla82xx_device_state_handler() 3280 dev_init_timeout = jiffies + (ha->fcoe_dev_init_timeout\ qla82xx_device_state_handler() 3287 if (ha->flags.quiesce_owner) qla82xx_device_state_handler() 3290 qla82xx_idc_unlock(ha); qla82xx_device_state_handler() 3292 qla82xx_idc_lock(ha); qla82xx_device_state_handler() 3295 dev_init_timeout = jiffies + (ha->fcoe_dev_init_timeout\ qla82xx_device_state_handler() 3303 qla82xx_idc_unlock(ha); qla82xx_device_state_handler() 3305 qla82xx_idc_lock(ha); qla82xx_device_state_handler() 3310 qla82xx_idc_unlock(ha); qla82xx_device_state_handler() 3318 struct qla_hw_data *ha = vha->hw; qla82xx_check_temp() local 3320 temp = qla82xx_rd_32(ha, CRB_TEMP_STATE); qla82xx_check_temp() 3349 struct qla_hw_data *ha = vha->hw; qla82xx_clear_pending_mbx() local 3351 if (ha->flags.mbox_busy) { qla82xx_clear_pending_mbx() 3352 ha->flags.mbox_int = 1; qla82xx_clear_pending_mbx() 3353 ha->flags.mbox_busy = 0; qla82xx_clear_pending_mbx() 3356 if (test_and_clear_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags)) qla82xx_clear_pending_mbx() 3357 complete(&ha->mbx_intr_comp); qla82xx_clear_pending_mbx() 3364 struct qla_hw_data *ha = vha->hw; qla82xx_watchdog() local 3367 if (!ha->flags.nic_core_reset_hdlr_active) { qla82xx_watchdog() 3368 dev_state = qla82xx_rd_32(ha, QLA82XX_CRB_DEV_STATE); qla82xx_watchdog() 3371 ha->flags.isp82xx_fw_hung = 1; qla82xx_watchdog() 3389 ha->flags.isp82xx_fw_hung = 1; qla82xx_watchdog() 3395 qla82xx_wr_32(ha, QLA82XX_CRB_NIU + 0x98, qla82xx_watchdog() 3397 halt_status = qla82xx_rd_32(ha, qla82xx_watchdog() 3405 qla82xx_rd_32(ha, QLA82XX_PEG_HALT_STATUS2), qla82xx_watchdog() 3406 qla82xx_rd_32(ha, qla82xx_watchdog() 3408 qla82xx_rd_32(ha, qla82xx_watchdog() 3410 qla82xx_rd_32(ha, qla82xx_watchdog() 3412 qla82xx_rd_32(ha, qla82xx_watchdog() 3414 qla82xx_rd_32(ha, qla82xx_watchdog() 3430 ha->flags.isp82xx_fw_hung = 1; qla82xx_watchdog() 3441 struct qla_hw_data *ha = vha->hw; qla82xx_load_risc() local 3443 if (IS_QLA82XX(ha)) qla82xx_load_risc() 3445 else if (IS_QLA8044(ha)) { qla82xx_load_risc() 3446 qla8044_idc_lock(ha); qla82xx_load_risc() 3449 qla8044_idc_unlock(ha); qla82xx_load_risc() 3458 struct qla_hw_data *ha = vha->hw; qla82xx_set_reset_owner() local 3461 if (IS_QLA82XX(ha)) qla82xx_set_reset_owner() 3462 dev_state = qla82xx_rd_32(ha, QLA82XX_CRB_DEV_STATE); qla82xx_set_reset_owner() 3463 else if (IS_QLA8044(ha)) qla82xx_set_reset_owner() 3469 if (IS_QLA82XX(ha)) { qla82xx_set_reset_owner() 3470 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE, qla82xx_set_reset_owner() 3472 ha->flags.nic_core_reset_owner = 1; qla82xx_set_reset_owner() 3474 "reset_owner is 0x%x\n", ha->portnum); qla82xx_set_reset_owner() 3475 } else if (IS_QLA8044(ha)) qla82xx_set_reset_owner() 3490 * ha = adapter block pointer. 3499 struct qla_hw_data *ha = vha->hw; qla82xx_abort_isp() local 3506 ha->flags.nic_core_reset_hdlr_active = 1; qla82xx_abort_isp() 3508 qla82xx_idc_lock(ha); qla82xx_abort_isp() 3510 qla82xx_idc_unlock(ha); qla82xx_abort_isp() 3512 if (IS_QLA82XX(ha)) qla82xx_abort_isp() 3514 else if (IS_QLA8044(ha)) { qla82xx_abort_isp() 3515 qla8044_idc_lock(ha); qla82xx_abort_isp() 3518 qla8044_idc_unlock(ha); qla82xx_abort_isp() 3522 qla82xx_idc_lock(ha); qla82xx_abort_isp() 3523 qla82xx_clear_rst_ready(ha); qla82xx_abort_isp() 3524 qla82xx_idc_unlock(ha); qla82xx_abort_isp() 3527 ha->flags.isp82xx_fw_hung = 0; qla82xx_abort_isp() 3528 ha->flags.nic_core_reset_hdlr_active = 0; qla82xx_abort_isp() 3535 if (ha->isp_abort_cnt == 0) { qla82xx_abort_isp() 3543 ha->isp_ops->reset_adapter(vha); qla82xx_abort_isp() 3549 ha->isp_abort_cnt--; qla82xx_abort_isp() 3552 ha->isp_abort_cnt); qla82xx_abort_isp() 3556 ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT; qla82xx_abort_isp() 3559 ha->isp_abort_cnt); qla82xx_abort_isp() 3574 * ha = adapter block pointer. 3642 struct qla_hw_data *ha = vha->hw; qla82xx_chip_reset_cleanup() local 3648 if (!ha->flags.isp82xx_fw_hung) { qla82xx_chip_reset_cleanup() 3651 if (IS_QLA82XX(ha)) qla82xx_chip_reset_cleanup() 3653 else if (IS_QLA8044(ha)) qla82xx_chip_reset_cleanup() 3656 ha->flags.isp82xx_fw_hung = 1; qla82xx_chip_reset_cleanup() 3664 __func__, ha->flags.isp82xx_fw_hung); qla82xx_chip_reset_cleanup() 3667 if (!ha->flags.isp82xx_fw_hung) { qla82xx_chip_reset_cleanup() 3672 spin_lock_irqsave(&ha->hardware_lock, flags); qla82xx_chip_reset_cleanup() 3673 for (que = 0; que < ha->max_req_queues; que++) { qla82xx_chip_reset_cleanup() 3674 req = ha->req_q_map[que]; qla82xx_chip_reset_cleanup() 3683 !ha->flags.isp82xx_fw_hung) { qla82xx_chip_reset_cleanup() 3685 &ha->hardware_lock, flags); qla82xx_chip_reset_cleanup() 3686 if (ha->isp_ops->abort_command(sp)) { qla82xx_chip_reset_cleanup() 3695 spin_lock_irqsave(&ha->hardware_lock, flags); qla82xx_chip_reset_cleanup() 3700 spin_unlock_irqrestore(&ha->hardware_lock, flags); qla82xx_chip_reset_cleanup() 3717 struct qla_hw_data *ha = vha->hw; qla82xx_minidump_process_control() local 3726 tmplt_hdr = (struct qla82xx_md_template_hdr *)ha->md_tmplt_hdr; qla82xx_minidump_process_control() 3733 qla82xx_md_rw_32(ha, crb_addr, qla82xx_minidump_process_control() 3739 read_value = qla82xx_md_rw_32(ha, crb_addr, 0, 0); qla82xx_minidump_process_control() 3740 qla82xx_md_rw_32(ha, crb_addr, read_value, 1); qla82xx_minidump_process_control() 3745 read_value = qla82xx_md_rw_32(ha, crb_addr, 0, 0); qla82xx_minidump_process_control() 3752 qla82xx_md_rw_32(ha, crb_addr, read_value, 1); qla82xx_minidump_process_control() 3756 read_value = qla82xx_md_rw_32(ha, crb_addr, 0, 0); qla82xx_minidump_process_control() 3758 qla82xx_md_rw_32(ha, crb_addr, read_value, 1); qla82xx_minidump_process_control() 3765 read_value = qla82xx_md_rw_32(ha, crb_addr, 0, 0); qla82xx_minidump_process_control() 3776 read_value = qla82xx_md_rw_32(ha, qla82xx_minidump_process_control() 3789 read_value = qla82xx_md_rw_32(ha, addr, 0, 0); qla82xx_minidump_process_control() 3809 qla82xx_md_rw_32(ha, addr, read_value, 1); qla82xx_minidump_process_control() 3834 struct qla_hw_data *ha = vha->hw; qla82xx_minidump_process_rdocm() local 3846 (r_addr + ha->nx_pcibase)); qla82xx_minidump_process_rdocm() 3857 struct qla_hw_data *ha = vha->hw; qla82xx_minidump_process_rdmux() local 3870 qla82xx_md_rw_32(ha, s_addr, s_value, 1); qla82xx_minidump_process_rdmux() 3871 r_value = qla82xx_md_rw_32(ha, r_addr, 0, 0); qla82xx_minidump_process_rdmux() 3883 struct qla_hw_data *ha = vha->hw; qla82xx_minidump_process_rdcrb() local 3894 r_value = qla82xx_md_rw_32(ha, r_addr, 0, 0); qla82xx_minidump_process_rdcrb() 3906 struct qla_hw_data *ha = vha->hw; qla82xx_minidump_process_l2tag() local 3928 qla82xx_md_rw_32(ha, t_r_addr, t_value, 1); qla82xx_minidump_process_l2tag() 3930 qla82xx_md_rw_32(ha, c_addr, c_value_w, 1); qla82xx_minidump_process_l2tag() 3935 c_value_r = qla82xx_md_rw_32(ha, c_addr, 0, 0); qla82xx_minidump_process_l2tag() 3951 r_value = qla82xx_md_rw_32(ha, addr, 0, 0); qla82xx_minidump_process_l2tag() 3965 struct qla_hw_data *ha = vha->hw; qla82xx_minidump_process_l1cache() local 3983 qla82xx_md_rw_32(ha, t_r_addr, t_value, 1); qla82xx_minidump_process_l1cache() 3984 qla82xx_md_rw_32(ha, c_addr, c_value_w, 1); qla82xx_minidump_process_l1cache() 3987 r_value = qla82xx_md_rw_32(ha, addr, 0, 0); qla82xx_minidump_process_l1cache() 4000 struct qla_hw_data *ha = vha->hw; qla82xx_minidump_process_queue() local 4014 qla82xx_md_rw_32(ha, s_addr, qid, 1); qla82xx_minidump_process_queue() 4017 r_value = qla82xx_md_rw_32(ha, r_addr, 0, 0); qla82xx_minidump_process_queue() 4030 struct qla_hw_data *ha = vha->hw; qla82xx_minidump_process_rdrom() local 4041 qla82xx_md_rw_32(ha, MD_DIRECT_ROM_WINDOW, qla82xx_minidump_process_rdrom() 4043 r_value = qla82xx_md_rw_32(ha, qla82xx_minidump_process_rdrom() 4056 struct qla_hw_data *ha = vha->hw; qla82xx_minidump_process_rdmem() local 4085 write_lock_irqsave(&ha->hw_lock, flags); qla82xx_minidump_process_rdmem() 4087 qla82xx_md_rw_32(ha, MD_MIU_TEST_AGT_ADDR_LO, r_addr, 1); qla82xx_minidump_process_rdmem() 4089 qla82xx_md_rw_32(ha, MD_MIU_TEST_AGT_ADDR_HI, r_value, 1); qla82xx_minidump_process_rdmem() 4091 qla82xx_md_rw_32(ha, MD_MIU_TEST_AGT_CTRL, r_value, 1); qla82xx_minidump_process_rdmem() 4093 qla82xx_md_rw_32(ha, MD_MIU_TEST_AGT_CTRL, r_value, 1); qla82xx_minidump_process_rdmem() 4096 r_value = qla82xx_md_rw_32(ha, qla82xx_minidump_process_rdmem() 4105 write_unlock_irqrestore(&ha->hw_lock, flags); qla82xx_minidump_process_rdmem() 4110 r_data = qla82xx_md_rw_32(ha, qla82xx_minidump_process_rdmem() 4116 write_unlock_irqrestore(&ha->hw_lock, flags); qla82xx_minidump_process_rdmem() 4124 struct qla_hw_data *ha = vha->hw; qla82xx_validate_template_chksum() local 4126 uint32_t *d_ptr = (uint32_t *)ha->md_tmplt_hdr; qla82xx_validate_template_chksum() 4127 int count = ha->md_template_size/sizeof(uint32_t); qla82xx_validate_template_chksum() 4151 struct qla_hw_data *ha = vha->hw; qla82xx_md_collect() local 4159 tmplt_hdr = (struct qla82xx_md_template_hdr *)ha->md_tmplt_hdr; qla82xx_md_collect() 4160 data_ptr = (uint32_t *)ha->md_dump; qla82xx_md_collect() 4162 if (ha->fw_dumped) { qla82xx_md_collect() 4165 "-- ignoring request.\n", ha->fw_dump); qla82xx_md_collect() 4169 ha->fw_dumped = 0; qla82xx_md_collect() 4171 if (!ha->md_tmplt_hdr || !ha->md_dump) { qla82xx_md_collect() 4177 if (ha->flags.isp82xx_no_md_cap) { qla82xx_md_collect() 4181 ha->flags.isp82xx_no_md_cap = 0; qla82xx_md_collect() 4214 total_data_size = ha->md_dump_size; qla82xx_md_collect() 4228 (((uint8_t *)ha->md_tmplt_hdr) + tmplt_hdr->first_entry_offset); qla82xx_md_collect() 4261 data_collected, (ha->md_dump_size - data_collected)); qla82xx_md_collect() 4332 (uint8_t *)ha->md_dump; qla82xx_md_collect() 4348 vha->host_no, ha->md_tmplt_hdr, vha->host_no, ha->md_dump); qla82xx_md_collect() 4349 ha->fw_dumped = 1; qla82xx_md_collect() 4359 struct qla_hw_data *ha = vha->hw; qla82xx_md_alloc() local 4363 tmplt_hdr = (struct qla82xx_md_template_hdr *)ha->md_tmplt_hdr; qla82xx_md_alloc() 4374 ha->md_dump_size += tmplt_hdr->capture_size_array[k]; qla82xx_md_alloc() 4377 if (ha->md_dump) { qla82xx_md_alloc() 4383 ha->md_dump = vmalloc(ha->md_dump_size); qla82xx_md_alloc() 4384 if (ha->md_dump == NULL) { qla82xx_md_alloc() 4387 "(0x%x).\n", ha->md_dump_size); qla82xx_md_alloc() 4396 struct qla_hw_data *ha = vha->hw; qla82xx_md_free() local 4399 if (ha->md_tmplt_hdr) { qla82xx_md_free() 4402 ha->md_tmplt_hdr, ha->md_template_size / 1024); qla82xx_md_free() 4403 dma_free_coherent(&ha->pdev->dev, ha->md_template_size, qla82xx_md_free() 4404 ha->md_tmplt_hdr, ha->md_tmplt_hdr_dma); qla82xx_md_free() 4405 ha->md_tmplt_hdr = NULL; qla82xx_md_free() 4409 if (ha->md_dump) { qla82xx_md_free() 4412 ha->md_dump, ha->md_dump_size / 1024); qla82xx_md_free() 4413 vfree(ha->md_dump); qla82xx_md_free() 4414 ha->md_dump_size = 0; qla82xx_md_free() 4415 ha->md_dump = NULL; qla82xx_md_free() 4422 struct qla_hw_data *ha = vha->hw; qla82xx_md_prep() local 4430 ha->md_template_size / 1024); qla82xx_md_prep() 4433 if (IS_QLA8044(ha)) qla82xx_md_prep() 4447 ha->md_dump_size / 1024); qla82xx_md_prep() 4451 ha->md_tmplt_hdr, qla82xx_md_prep() 4452 ha->md_template_size / 1024); qla82xx_md_prep() 4453 dma_free_coherent(&ha->pdev->dev, qla82xx_md_prep() 4454 ha->md_template_size, qla82xx_md_prep() 4455 ha->md_tmplt_hdr, ha->md_tmplt_hdr_dma); qla82xx_md_prep() 4456 ha->md_tmplt_hdr = NULL; qla82xx_md_prep() 4468 struct qla_hw_data *ha = vha->hw; qla82xx_beacon_on() local 4469 qla82xx_idc_lock(ha); qla82xx_beacon_on() 4477 ha->beacon_blink_led = 1; qla82xx_beacon_on() 4479 qla82xx_idc_unlock(ha); qla82xx_beacon_on() 4488 struct qla_hw_data *ha = vha->hw; qla82xx_beacon_off() local 4489 qla82xx_idc_lock(ha); qla82xx_beacon_off() 4497 ha->beacon_blink_led = 0; qla82xx_beacon_off() 4499 qla82xx_idc_unlock(ha); qla82xx_beacon_off() 4506 struct qla_hw_data *ha = vha->hw; qla82xx_fw_dump() local 4508 if (!ha->allow_cna_fw_dump) qla82xx_fw_dump() 4512 ha->flags.isp82xx_no_md_cap = 1; qla82xx_fw_dump() 4513 qla82xx_idc_lock(ha); qla82xx_fw_dump() 4515 qla82xx_idc_unlock(ha); qla82xx_fw_dump()
H A D	qla_mid.c	33 struct qla_hw_data *ha = vha->hw; qla24xx_allocate_vp_id() local 37 mutex_lock(&ha->vport_lock); qla24xx_allocate_vp_id() 38 vp_id = find_first_zero_bit(ha->vp_idx_map, ha->max_npiv_vports + 1); qla24xx_allocate_vp_id() 39 if (vp_id > ha->max_npiv_vports) { qla24xx_allocate_vp_id() 42 vp_id, ha->max_npiv_vports); qla24xx_allocate_vp_id() 43 mutex_unlock(&ha->vport_lock); qla24xx_allocate_vp_id() 47 set_bit(vp_id, ha->vp_idx_map); qla24xx_allocate_vp_id() 48 ha->num_vhosts++; qla24xx_allocate_vp_id() 51 spin_lock_irqsave(&ha->vport_slock, flags); qla24xx_allocate_vp_id() 52 list_add_tail(&vha->list, &ha->vp_list); qla24xx_allocate_vp_id() 56 spin_unlock_irqrestore(&ha->vport_slock, flags); qla24xx_allocate_vp_id() 58 mutex_unlock(&ha->vport_lock); qla24xx_allocate_vp_id() 66 struct qla_hw_data *ha = vha->hw; qla24xx_deallocate_vp_id() local 69 mutex_lock(&ha->vport_lock); qla24xx_deallocate_vp_id() 77 spin_lock_irqsave(&ha->vport_slock, flags); qla24xx_deallocate_vp_id() 79 spin_unlock_irqrestore(&ha->vport_slock, flags); qla24xx_deallocate_vp_id() 83 spin_lock_irqsave(&ha->vport_slock, flags); qla24xx_deallocate_vp_id() 87 spin_unlock_irqrestore(&ha->vport_slock, flags); qla24xx_deallocate_vp_id() 90 ha->num_vhosts--; qla24xx_deallocate_vp_id() 91 clear_bit(vp_id, ha->vp_idx_map); qla24xx_deallocate_vp_id() 93 mutex_unlock(&ha->vport_lock); qla24xx_deallocate_vp_id() 97 qla24xx_find_vhost_by_name(struct qla_hw_data *ha, uint8_t *port_name) qla24xx_find_vhost_by_name() argument 103 spin_lock_irqsave(&ha->vport_slock, flags); qla24xx_find_vhost_by_name() 105 list_for_each_entry_safe(vha, tvha, &ha->vp_list, list) { qla24xx_find_vhost_by_name() 107 spin_unlock_irqrestore(&ha->vport_slock, flags); qla24xx_find_vhost_by_name() 111 spin_unlock_irqrestore(&ha->vport_slock, flags); qla24xx_find_vhost_by_name() 120 * ha = adapter block pointer. 180 struct qla_hw_data *ha = vha->hw; qla24xx_enable_vp() local 181 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev); qla24xx_enable_vp() 183 /* Check if physical ha port is Up */ qla24xx_enable_vp() 186 !(ha->current_topology & ISP_CFG_F)) { qla24xx_enable_vp() 193 mutex_lock(&ha->vport_lock); qla24xx_enable_vp() 195 mutex_unlock(&ha->vport_lock); qla24xx_enable_vp() 244 struct qla_hw_data *ha = rsp->hw; qla2x00_alert_all_vps() local 248 spin_lock_irqsave(&ha->vport_slock, flags); qla2x00_alert_all_vps() 249 list_for_each_entry(vha, &ha->vp_list, list) { qla2x00_alert_all_vps() 252 spin_unlock_irqrestore(&ha->vport_slock, flags); qla2x00_alert_all_vps() 270 spin_lock_irqsave(&ha->vport_slock, flags); qla2x00_alert_all_vps() 275 spin_unlock_irqrestore(&ha->vport_slock, flags); qla2x00_alert_all_vps() 309 struct qla_hw_data *ha = vha->hw; qla2x00_do_dpc_vp() local 310 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev); qla2x00_do_dpc_vp() 375 struct qla_hw_data *ha = vha->hw; qla2x00_do_dpc_all_vps() local 381 if (list_empty(&ha->vp_list)) qla2x00_do_dpc_all_vps() 386 if (!(ha->current_topology & ISP_CFG_F)) qla2x00_do_dpc_all_vps() 389 spin_lock_irqsave(&ha->vport_slock, flags); qla2x00_do_dpc_all_vps() 390 list_for_each_entry(vp, &ha->vp_list, list) { qla2x00_do_dpc_all_vps() 393 spin_unlock_irqrestore(&ha->vport_slock, flags); qla2x00_do_dpc_all_vps() 397 spin_lock_irqsave(&ha->vport_slock, flags); qla2x00_do_dpc_all_vps() 401 spin_unlock_irqrestore(&ha->vport_slock, flags); qla2x00_do_dpc_all_vps() 408 struct qla_hw_data *ha = base_vha->hw; qla24xx_vport_create_req_sanity_check() local 416 if (!ha->flags.npiv_supported) qla24xx_vport_create_req_sanity_check() 420 if (!(ha->switch_cap & FLOGI_MID_SUPPORT)) qla24xx_vport_create_req_sanity_check() 427 vha = qla24xx_find_vhost_by_name(ha, port_name); qla24xx_vport_create_req_sanity_check() 432 if (ha->num_vhosts > ha->max_npiv_vports) { qla24xx_vport_create_req_sanity_check() 436 ha->num_vhosts, ha->max_npiv_vports); qla24xx_vport_create_req_sanity_check() 446 struct qla_hw_data *ha = base_vha->hw; qla24xx_create_vhost() local 451 vha = qla2x00_create_host(sht, ha); qla24xx_create_vhost() 467 if (vha->vp_idx > ha->max_npiv_vports) { qla24xx_create_vhost() 489 if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) qla24xx_create_vhost() 496 host->max_id = ha->max_fibre_devices; qla24xx_create_vhost() 505 mutex_lock(&ha->vport_lock); qla24xx_create_vhost() 506 set_bit(vha->vp_idx, ha->vp_idx_map); qla24xx_create_vhost() 507 ha->cur_vport_count++; qla24xx_create_vhost() 508 mutex_unlock(&ha->vport_lock); qla24xx_create_vhost() 519 struct qla_hw_data *ha = vha->hw; qla25xx_free_req_que() local 522 dma_free_coherent(&ha->pdev->dev, (req->length + 1) * qla25xx_free_req_que() 527 ha->req_q_map[que_id] = NULL; qla25xx_free_req_que() 528 mutex_lock(&ha->vport_lock); qla25xx_free_req_que() 529 clear_bit(que_id, ha->req_qid_map); qla25xx_free_req_que() 530 mutex_unlock(&ha->vport_lock); qla25xx_free_req_que() 540 struct qla_hw_data *ha = vha->hw; qla25xx_free_rsp_que() local 548 dma_free_coherent(&ha->pdev->dev, (rsp->length + 1) * qla25xx_free_rsp_que() 553 ha->rsp_q_map[que_id] = NULL; qla25xx_free_rsp_que() 554 mutex_lock(&ha->vport_lock); qla25xx_free_rsp_que() 555 clear_bit(que_id, ha->rsp_qid_map); qla25xx_free_rsp_que() 556 mutex_unlock(&ha->vport_lock); qla25xx_free_rsp_que() 599 struct qla_hw_data *ha = vha->hw; qla25xx_delete_queues() local 602 for (cnt = 1; cnt < ha->max_req_queues; cnt++) { qla25xx_delete_queues() 603 req = ha->req_q_map[cnt]; qla25xx_delete_queues() 604 if (req && test_bit(cnt, ha->req_qid_map)) { qla25xx_delete_queues() 616 for (cnt = 1; cnt < ha->max_rsp_queues; cnt++) { qla25xx_delete_queues() 617 rsp = ha->rsp_q_map[cnt]; qla25xx_delete_queues() 618 if (rsp && test_bit(cnt, ha->rsp_qid_map)) { qla25xx_delete_queues() 632 qla25xx_create_req_que(struct qla_hw_data *ha, uint16_t options, qla25xx_create_req_que() argument 637 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); qla25xx_create_req_que() 650 req->ring = dma_alloc_coherent(&ha->pdev->dev, qla25xx_create_req_que() 659 ret = qla2x00_alloc_outstanding_cmds(ha, req); qla25xx_create_req_que() 663 mutex_lock(&ha->vport_lock); qla25xx_create_req_que() 664 que_id = find_first_zero_bit(ha->req_qid_map, ha->max_req_queues); qla25xx_create_req_que() 665 if (que_id >= ha->max_req_queues) { qla25xx_create_req_que() 666 mutex_unlock(&ha->vport_lock); qla25xx_create_req_que() 671 set_bit(que_id, ha->req_qid_map); qla25xx_create_req_que() 672 ha->req_q_map[que_id] = req; qla25xx_create_req_que() 686 req->rsp = ha->rsp_q_map[rsp_que]; qla25xx_create_req_que() 707 reg = ISP_QUE_REG(ha, que_id); qla25xx_create_req_que() 710 req->max_q_depth = ha->req_q_map[0]->max_q_depth; qla25xx_create_req_que() 712 mutex_unlock(&ha->vport_lock); qla25xx_create_req_que() 728 mutex_lock(&ha->vport_lock); qla25xx_create_req_que() 729 clear_bit(que_id, ha->req_qid_map); qla25xx_create_req_que() 730 mutex_unlock(&ha->vport_lock); qla25xx_create_req_que() 747 struct qla_hw_data *ha = rsp->hw; qla_do_work() local 750 vha = pci_get_drvdata(ha->pdev); qla_do_work() 757 qla25xx_create_rsp_que(struct qla_hw_data *ha, uint16_t options, qla25xx_create_rsp_que() argument 762 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); qla25xx_create_rsp_que() 774 rsp->ring = dma_alloc_coherent(&ha->pdev->dev, qla25xx_create_rsp_que() 783 mutex_lock(&ha->vport_lock); qla25xx_create_rsp_que() 784 que_id = find_first_zero_bit(ha->rsp_qid_map, ha->max_rsp_queues); qla25xx_create_rsp_que() 785 if (que_id >= ha->max_rsp_queues) { qla25xx_create_rsp_que() 786 mutex_unlock(&ha->vport_lock); qla25xx_create_rsp_que() 791 set_bit(que_id, ha->rsp_qid_map); qla25xx_create_rsp_que() 793 if (ha->flags.msix_enabled) qla25xx_create_rsp_que() 794 rsp->msix = &ha->msix_entries[que_id + 1]; qla25xx_create_rsp_que() 799 ha->rsp_q_map[que_id] = rsp; qla25xx_create_rsp_que() 802 rsp->hw = ha; qla25xx_create_rsp_que() 813 if (!IS_MSIX_NACK_CAPABLE(ha)) qla25xx_create_rsp_que() 818 reg = ISP_QUE_REG(ha, que_id); qla25xx_create_rsp_que() 822 mutex_unlock(&ha->vport_lock); qla25xx_create_rsp_que() 840 mutex_lock(&ha->vport_lock); qla25xx_create_rsp_que() 841 clear_bit(que_id, ha->rsp_qid_map); qla25xx_create_rsp_que() 842 mutex_unlock(&ha->vport_lock); qla25xx_create_rsp_que() 846 rsp->req = ha->req_q_map[req]; qla25xx_create_rsp_que()
H A D	qla_init.c	51 struct qla_hw_data *ha = fcport->vha->hw; qla2x00_sp_timeout() local 55 spin_lock_irqsave(&ha->hardware_lock, flags); qla2x00_sp_timeout() 56 req = ha->req_q_map[0]; qla2x00_sp_timeout() 61 spin_unlock_irqrestore(&ha->hardware_lock, flags); qla2x00_sp_timeout() 81 struct qla_hw_data *ha = vha->hw; qla2x00_get_async_timeout() local 84 tmo = ha->r_a_tov / 10 * 2; qla2x00_get_async_timeout() 85 if (IS_QLAFX00(ha)) { qla2x00_get_async_timeout() 87 } else if (!IS_FWI2_CAPABLE(ha)) { qla2x00_get_async_timeout() 92 tmo = ha->login_timeout; qla2x00_get_async_timeout() 420 struct qla_hw_data *ha = vha->hw; qla24xx_async_abort_command() local 423 spin_lock_irqsave(&ha->hardware_lock, flags); qla24xx_async_abort_command() 428 spin_unlock_irqrestore(&ha->hardware_lock, flags); qla24xx_async_abort_command() 537 struct qla_hw_data *ha = vha->hw; qla83xx_nic_core_fw_load() local 546 ha->fcoe_dev_init_timeout = QLA83XX_IDC_INITIALIZATION_TIMEOUT; qla83xx_nic_core_fw_load() 547 ha->fcoe_reset_timeout = QLA83XX_IDC_RESET_ACK_TIMEOUT; qla83xx_nic_core_fw_load() 567 if (ha->flags.nic_core_reset_owner) { qla83xx_nic_core_fw_load() 588 idc_minor_ver |= (QLA83XX_SUPP_IDC_MINOR_VERSION << (ha->portnum * 2)); qla83xx_nic_core_fw_load() 591 if (ha->flags.nic_core_reset_owner) { qla83xx_nic_core_fw_load() 611 * ha = adapter block pointer. 620 struct qla_hw_data *ha = vha->hw; qla2x00_initialize_adapter() local 621 struct req_que *req = ha->req_q_map[0]; qla2x00_initialize_adapter() 625 ha->flags.chip_reset_done = 0; qla2x00_initialize_adapter() 627 ha->flags.pci_channel_io_perm_failure = 0; qla2x00_initialize_adapter() 628 ha->flags.eeh_busy = 0; qla2x00_initialize_adapter() 636 ha->isp_abort_cnt = 0; qla2x00_initialize_adapter() 637 ha->beacon_blink_led = 0; qla2x00_initialize_adapter() 639 set_bit(0, ha->req_qid_map); qla2x00_initialize_adapter() 640 set_bit(0, ha->rsp_qid_map); qla2x00_initialize_adapter() 644 rval = ha->isp_ops->pci_config(vha); qla2x00_initialize_adapter() 651 ha->isp_ops->reset_chip(vha); qla2x00_initialize_adapter() 660 if (IS_QLA8044(ha)) { qla2x00_initialize_adapter() 671 ha->isp_ops->get_flash_version(vha, req->ring); qla2x00_initialize_adapter() 675 ha->isp_ops->nvram_config(vha); qla2x00_initialize_adapter() 677 if (ha->flags.disable_serdes) { qla2x00_initialize_adapter() 688 rval = ha->isp_ops->chip_diag(vha); qla2x00_initialize_adapter() 696 if (IS_QLA84XX(ha)) { qla2x00_initialize_adapter() 697 ha->cs84xx = qla84xx_get_chip(vha); qla2x00_initialize_adapter() 698 if (!ha->cs84xx) { qla2x00_initialize_adapter() 708 ha->flags.chip_reset_done = 1; qla2x00_initialize_adapter() 710 if (rval == QLA_SUCCESS && IS_QLA84XX(ha)) { qla2x00_initialize_adapter() 721 if (IS_QLA8031(ha)) { qla2x00_initialize_adapter() 728 if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha)) qla2x00_initialize_adapter() 731 if (IS_P3P_TYPE(ha)) qla2x00_initialize_adapter() 741 * @ha: HA context 750 struct qla_hw_data *ha = vha->hw; qla2100_pci_config() local 751 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; qla2100_pci_config() 753 pci_set_master(ha->pdev); qla2100_pci_config() 754 pci_try_set_mwi(ha->pdev); qla2100_pci_config() 756 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); qla2100_pci_config() 758 pci_write_config_word(ha->pdev, PCI_COMMAND, w); qla2100_pci_config() 760 pci_disable_rom(ha->pdev); qla2100_pci_config() 763 spin_lock_irqsave(&ha->hardware_lock, flags); qla2100_pci_config() 764 ha->pci_attr = RD_REG_WORD(&reg->ctrl_status); qla2100_pci_config() 765 spin_unlock_irqrestore(&ha->hardware_lock, flags); qla2100_pci_config() 772 * @ha: HA context 782 struct qla_hw_data *ha = vha->hw; qla2300_pci_config() local 783 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; qla2300_pci_config() 785 pci_set_master(ha->pdev); qla2300_pci_config() 786 pci_try_set_mwi(ha->pdev); qla2300_pci_config() 788 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); qla2300_pci_config() 791 if (IS_QLA2322(ha) || IS_QLA6322(ha)) qla2300_pci_config() 793 pci_write_config_word(ha->pdev, PCI_COMMAND, w); qla2300_pci_config() 802 if (IS_QLA2300(ha)) { qla2300_pci_config() 803 spin_lock_irqsave(&ha->hardware_lock, flags); qla2300_pci_config() 819 ha->fb_rev = RD_FB_CMD_REG(ha, reg); qla2300_pci_config() 821 if (ha->fb_rev == FPM_2300) qla2300_pci_config() 822 pci_clear_mwi(ha->pdev); qla2300_pci_config() 837 spin_unlock_irqrestore(&ha->hardware_lock, flags); qla2300_pci_config() 840 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80); qla2300_pci_config() 842 pci_disable_rom(ha->pdev); qla2300_pci_config() 845 spin_lock_irqsave(&ha->hardware_lock, flags); qla2300_pci_config() 846 ha->pci_attr = RD_REG_WORD(&reg->ctrl_status); qla2300_pci_config() 847 spin_unlock_irqrestore(&ha->hardware_lock, flags); qla2300_pci_config() 854 * @ha: HA context 863 struct qla_hw_data *ha = vha->hw; qla24xx_pci_config() local 864 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; qla24xx_pci_config() 866 pci_set_master(ha->pdev); qla24xx_pci_config() 867 pci_try_set_mwi(ha->pdev); qla24xx_pci_config() 869 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); qla24xx_pci_config() 872 pci_write_config_word(ha->pdev, PCI_COMMAND, w); qla24xx_pci_config() 874 pci_write_config_byte(ha->pdev, PCI_LATENCY_TIMER, 0x80); qla24xx_pci_config() 877 if (pci_find_capability(ha->pdev, PCI_CAP_ID_PCIX)) qla24xx_pci_config() 878 pcix_set_mmrbc(ha->pdev, 2048); qla24xx_pci_config() 881 if (pci_is_pcie(ha->pdev)) qla24xx_pci_config() 882 pcie_set_readrq(ha->pdev, 4096); qla24xx_pci_config() 884 pci_disable_rom(ha->pdev); qla24xx_pci_config() 886 ha->chip_revision = ha->pdev->revision; qla24xx_pci_config() 889 spin_lock_irqsave(&ha->hardware_lock, flags); qla24xx_pci_config() 890 ha->pci_attr = RD_REG_DWORD(&reg->ctrl_status); qla24xx_pci_config() 891 spin_unlock_irqrestore(&ha->hardware_lock, flags); qla24xx_pci_config() 898 * @ha: HA context 906 struct qla_hw_data *ha = vha->hw; qla25xx_pci_config() local 908 pci_set_master(ha->pdev); qla25xx_pci_config() 909 pci_try_set_mwi(ha->pdev); qla25xx_pci_config() 911 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); qla25xx_pci_config() 914 pci_write_config_word(ha->pdev, PCI_COMMAND, w); qla25xx_pci_config() 917 if (pci_is_pcie(ha->pdev)) qla25xx_pci_config() 918 pcie_set_readrq(ha->pdev, 4096); qla25xx_pci_config() 920 pci_disable_rom(ha->pdev); qla25xx_pci_config() 922 ha->chip_revision = ha->pdev->revision; qla25xx_pci_config() 929 * @ha: HA context 939 struct qla_hw_data *ha = vha->hw; qla2x00_isp_firmware() local 944 if (ha->flags.disable_risc_code_load) { qla2x00_isp_firmware() 948 rval = qla2x00_verify_checksum(vha, ha->fw_srisc_address); qla2x00_isp_firmware() 965 * @ha: HA context 973 struct qla_hw_data *ha = vha->hw; qla2x00_reset_chip() local 974 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; qla2x00_reset_chip() 978 if (unlikely(pci_channel_offline(ha->pdev))) qla2x00_reset_chip() 981 ha->isp_ops->disable_intrs(ha); qla2x00_reset_chip() 983 spin_lock_irqsave(&ha->hardware_lock, flags); qla2x00_reset_chip() 987 pci_read_config_word(ha->pdev, PCI_COMMAND, &cmd); qla2x00_reset_chip() 989 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd); qla2x00_reset_chip() 991 if (!IS_QLA2100(ha)) { qla2x00_reset_chip() 994 if (IS_QLA2200(ha) || IS_QLA2300(ha)) { qla2x00_reset_chip() 1015 if (!IS_QLA2200(ha)) { qla2x00_reset_chip() 1025 if (IS_QLA2200(ha)) { qla2x00_reset_chip() 1026 WRT_FB_CMD_REG(ha, reg, 0xa000); qla2x00_reset_chip() 1027 RD_FB_CMD_REG(ha, reg); /* PCI Posting. */ qla2x00_reset_chip() 1029 WRT_FB_CMD_REG(ha, reg, 0x00fc); qla2x00_reset_chip() 1033 if ((RD_FB_CMD_REG(ha, reg) & 0xff) == 0) qla2x00_reset_chip() 1059 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { qla2x00_reset_chip() 1084 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { qla2x00_reset_chip() 1086 if (RD_MAILBOX_REG(ha, reg, 0) != MBS_BUSY) qla2x00_reset_chip() 1096 pci_write_config_word(ha->pdev, PCI_COMMAND, cmd); qla2x00_reset_chip() 1099 if (!IS_QLA2100(ha)) { qla2x00_reset_chip() 1104 spin_unlock_irqrestore(&ha->hardware_lock, flags); qla2x00_reset_chip() 1125 * @ha: HA context 1133 struct qla_hw_data *ha = vha->hw; qla24xx_reset_risc() local 1134 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; qla24xx_reset_risc() 1140 spin_lock_irqsave(&ha->hardware_lock, flags); qla24xx_reset_risc() 1152 set_bit(DMA_SHUTDOWN_CMPL, &ha->fw_dump_cap_flags); qla24xx_reset_risc() 1162 pci_read_config_word(ha->pdev, PCI_COMMAND, &wd); qla24xx_reset_risc() 1178 set_bit(ISP_MBX_RDY, &ha->fw_dump_cap_flags); qla24xx_reset_risc() 1196 set_bit(ISP_SOFT_RESET_CMPL, &ha->fw_dump_cap_flags); qla24xx_reset_risc() 1239 set_bit(RISC_RDY_AFT_RESET, &ha->fw_dump_cap_flags); qla24xx_reset_risc() 1246 spin_unlock_irqrestore(&ha->hardware_lock, flags); qla24xx_reset_risc() 1250 IS_NOPOLLING_TYPE(ha) ? "Interrupt" : "Polling"); qla24xx_reset_risc() 1252 if (IS_NOPOLLING_TYPE(ha)) qla24xx_reset_risc() 1253 ha->isp_ops->enable_intrs(ha); qla24xx_reset_risc() 1280 struct qla_hw_data *ha = vha->hw; qla25xx_manipulate_risc_semaphore() local 1287 if (!IS_QLA25XX(ha) && !IS_QLA2031(ha)) qla25xx_manipulate_risc_semaphore() 1337 * @ha: HA context 1344 struct qla_hw_data *ha = vha->hw; qla24xx_reset_chip() local 1346 if (pci_channel_offline(ha->pdev) && qla24xx_reset_chip() 1347 ha->flags.pci_channel_io_perm_failure) { qla24xx_reset_chip() 1351 ha->isp_ops->disable_intrs(ha); qla24xx_reset_chip() 1361 * @ha: HA context 1369 struct qla_hw_data *ha = vha->hw; qla2x00_chip_diag() local 1370 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; qla2x00_chip_diag() 1375 struct req_que *req = ha->req_q_map[0]; qla2x00_chip_diag() 1383 spin_lock_irqsave(&ha->hardware_lock, flags); qla2x00_chip_diag() 1411 if (IS_QLA2100(ha) || IS_QLA2200(ha) || IS_QLA2300(ha)) { qla2x00_chip_diag() 1412 data = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 0)); qla2x00_chip_diag() 1415 data = RD_MAILBOX_REG(ha, reg, 0); qla2x00_chip_diag() 1427 mb[1] = RD_MAILBOX_REG(ha, reg, 1); qla2x00_chip_diag() 1428 mb[2] = RD_MAILBOX_REG(ha, reg, 2); qla2x00_chip_diag() 1429 mb[3] = RD_MAILBOX_REG(ha, reg, 3); qla2x00_chip_diag() 1430 mb[4] = qla2x00_debounce_register(MAILBOX_REG(ha, reg, 4)); qla2x00_chip_diag() 1439 ha->product_id[0] = mb[1]; qla2x00_chip_diag() 1440 ha->product_id[1] = mb[2]; qla2x00_chip_diag() 1441 ha->product_id[2] = mb[3]; qla2x00_chip_diag() 1442 ha->product_id[3] = mb[4]; qla2x00_chip_diag() 1446 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * 1024; qla2x00_chip_diag() 1448 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * qla2x00_chip_diag() 1451 if (IS_QLA2200(ha) && qla2x00_chip_diag() 1452 RD_MAILBOX_REG(ha, reg, 7) == QLA2200A_RISC_ROM_VER) { qla2x00_chip_diag() 1456 ha->device_type |= DT_ISP2200A; qla2x00_chip_diag() 1457 ha->fw_transfer_size = 128; qla2x00_chip_diag() 1461 spin_unlock_irqrestore(&ha->hardware_lock, flags); qla2x00_chip_diag() 1471 spin_lock_irqsave(&ha->hardware_lock, flags); qla2x00_chip_diag() 1478 spin_unlock_irqrestore(&ha->hardware_lock, flags); qla2x00_chip_diag() 1485 * @ha: HA context 1493 struct qla_hw_data *ha = vha->hw; qla24xx_chip_diag() local 1494 struct req_que *req = ha->req_q_map[0]; qla24xx_chip_diag() 1496 if (IS_P3P_TYPE(ha)) qla24xx_chip_diag() 1499 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length; qla24xx_chip_diag() 1521 struct qla_hw_data *ha = vha->hw; qla2x00_alloc_fw_dump() local 1522 struct req_que *req = ha->req_q_map[0]; qla2x00_alloc_fw_dump() 1523 struct rsp_que *rsp = ha->rsp_q_map[0]; qla2x00_alloc_fw_dump() 1525 if (ha->fw_dump) { qla2x00_alloc_fw_dump() 1531 ha->fw_dumped = 0; qla2x00_alloc_fw_dump() 1532 ha->fw_dump_cap_flags = 0; qla2x00_alloc_fw_dump() 1536 if (IS_QLA27XX(ha)) qla2x00_alloc_fw_dump() 1539 if (IS_QLA2100(ha) || IS_QLA2200(ha)) { qla2x00_alloc_fw_dump() 1541 } else if (IS_QLA23XX(ha)) { qla2x00_alloc_fw_dump() 1543 mem_size = (ha->fw_memory_size - 0x11000 + 1) * qla2x00_alloc_fw_dump() 1545 } else if (IS_FWI2_CAPABLE(ha)) { qla2x00_alloc_fw_dump() 1546 if (IS_QLA83XX(ha)) qla2x00_alloc_fw_dump() 1548 else if (IS_QLA81XX(ha)) qla2x00_alloc_fw_dump() 1550 else if (IS_QLA25XX(ha)) qla2x00_alloc_fw_dump() 1555 mem_size = (ha->fw_memory_size - 0x100000 + 1) * qla2x00_alloc_fw_dump() 1557 if (ha->mqenable) { qla2x00_alloc_fw_dump() 1558 if (!IS_QLA83XX(ha)) qla2x00_alloc_fw_dump() 1564 mq_size += ha->max_req_queues * qla2x00_alloc_fw_dump() 1566 mq_size += ha->max_rsp_queues * qla2x00_alloc_fw_dump() 1569 if (ha->tgt.atio_ring) qla2x00_alloc_fw_dump() 1570 mq_size += ha->tgt.atio_q_length * sizeof(request_t); qla2x00_alloc_fw_dump() 1572 if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha) && qla2x00_alloc_fw_dump() 1573 !IS_QLA27XX(ha)) qla2x00_alloc_fw_dump() 1577 if (ha->fce) qla2x00_alloc_fw_dump() 1578 dma_free_coherent(&ha->pdev->dev, qla2x00_alloc_fw_dump() 1579 FCE_SIZE, ha->fce, ha->fce_dma); qla2x00_alloc_fw_dump() 1582 tc = dma_zalloc_coherent(&ha->pdev->dev, FCE_SIZE, &tc_dma, qla2x00_alloc_fw_dump() 1592 ha->fce_mb, &ha->fce_bufs); qla2x00_alloc_fw_dump() 1596 dma_free_coherent(&ha->pdev->dev, FCE_SIZE, tc, qla2x00_alloc_fw_dump() 1598 ha->flags.fce_enabled = 0; qla2x00_alloc_fw_dump() 1605 ha->flags.fce_enabled = 1; qla2x00_alloc_fw_dump() 1606 ha->fce_dma = tc_dma; qla2x00_alloc_fw_dump() 1607 ha->fce = tc; qla2x00_alloc_fw_dump() 1610 if (ha->eft) qla2x00_alloc_fw_dump() 1611 dma_free_coherent(&ha->pdev->dev, qla2x00_alloc_fw_dump() 1612 EFT_SIZE, ha->eft, ha->eft_dma); qla2x00_alloc_fw_dump() 1615 tc = dma_zalloc_coherent(&ha->pdev->dev, EFT_SIZE, &tc_dma, qla2x00_alloc_fw_dump() 1628 dma_free_coherent(&ha->pdev->dev, EFT_SIZE, tc, qla2x00_alloc_fw_dump() 1636 ha->eft_dma = tc_dma; qla2x00_alloc_fw_dump() 1637 ha->eft = tc; qla2x00_alloc_fw_dump() 1641 if (IS_QLA27XX(ha)) { qla2x00_alloc_fw_dump() 1642 if (!ha->fw_dump_template) { qla2x00_alloc_fw_dump() 1657 ha->chain_offset = dump_size; qla2x00_alloc_fw_dump() 1661 ha->fw_dump = vmalloc(dump_size); qla2x00_alloc_fw_dump() 1662 if (!ha->fw_dump) { qla2x00_alloc_fw_dump() 1667 if (ha->fce) { qla2x00_alloc_fw_dump() 1668 dma_free_coherent(&ha->pdev->dev, FCE_SIZE, ha->fce, qla2x00_alloc_fw_dump() 1669 ha->fce_dma); qla2x00_alloc_fw_dump() 1670 ha->fce = NULL; qla2x00_alloc_fw_dump() 1671 ha->fce_dma = 0; qla2x00_alloc_fw_dump() 1674 if (ha->eft) { qla2x00_alloc_fw_dump() 1675 dma_free_coherent(&ha->pdev->dev, eft_size, ha->eft, qla2x00_alloc_fw_dump() 1676 ha->eft_dma); qla2x00_alloc_fw_dump() 1677 ha->eft = NULL; qla2x00_alloc_fw_dump() 1678 ha->eft_dma = 0; qla2x00_alloc_fw_dump() 1682 ha->fw_dump_len = dump_size; qla2x00_alloc_fw_dump() 1686 if (IS_QLA27XX(ha)) qla2x00_alloc_fw_dump() 1689 ha->fw_dump->signature[0] = 'Q'; qla2x00_alloc_fw_dump() 1690 ha->fw_dump->signature[1] = 'L'; qla2x00_alloc_fw_dump() 1691 ha->fw_dump->signature[2] = 'G'; qla2x00_alloc_fw_dump() 1692 ha->fw_dump->signature[3] = 'C'; qla2x00_alloc_fw_dump() 1693 ha->fw_dump->version = __constant_htonl(1); qla2x00_alloc_fw_dump() 1695 ha->fw_dump->fixed_size = htonl(fixed_size); qla2x00_alloc_fw_dump() 1696 ha->fw_dump->mem_size = htonl(mem_size); qla2x00_alloc_fw_dump() 1697 ha->fw_dump->req_q_size = htonl(req_q_size); qla2x00_alloc_fw_dump() 1698 ha->fw_dump->rsp_q_size = htonl(rsp_q_size); qla2x00_alloc_fw_dump() 1700 ha->fw_dump->eft_size = htonl(eft_size); qla2x00_alloc_fw_dump() 1701 ha->fw_dump->eft_addr_l = htonl(LSD(ha->eft_dma)); qla2x00_alloc_fw_dump() 1702 ha->fw_dump->eft_addr_h = htonl(MSD(ha->eft_dma)); qla2x00_alloc_fw_dump() 1704 ha->fw_dump->header_size = qla2x00_alloc_fw_dump() 1756 qla2x00_alloc_outstanding_cmds(struct qla_hw_data *ha, struct req_que *req) qla2x00_alloc_outstanding_cmds() argument 1762 if (!IS_FWI2_CAPABLE(ha) || (ha->mqiobase && qla2x00_alloc_outstanding_cmds() 1766 if (ha->fw_xcb_count <= ha->fw_iocb_count) qla2x00_alloc_outstanding_cmds() 1767 req->num_outstanding_cmds = ha->fw_xcb_count; qla2x00_alloc_outstanding_cmds() 1769 req->num_outstanding_cmds = ha->fw_iocb_count; qla2x00_alloc_outstanding_cmds() 1798 * @ha: HA context 1807 struct qla_hw_data *ha = vha->hw; qla2x00_setup_chip() local 1808 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; qla2x00_setup_chip() 1812 if (IS_P3P_TYPE(ha)) { qla2x00_setup_chip() 1813 rval = ha->isp_ops->load_risc(vha, &srisc_address); qla2x00_setup_chip() 1821 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) { qla2x00_setup_chip() 1823 spin_lock_irqsave(&ha->hardware_lock, flags); qla2x00_setup_chip() 1826 spin_unlock_irqrestore(&ha->hardware_lock, flags); qla2x00_setup_chip() 1832 rval = ha->isp_ops->load_risc(vha, &srisc_address); qla2x00_setup_chip() 1847 fw_major_version = ha->fw_major_version; qla2x00_setup_chip() 1848 if (IS_P3P_TYPE(ha)) qla2x00_setup_chip() 1854 ha->flags.npiv_supported = 0; qla2x00_setup_chip() 1855 if (IS_QLA2XXX_MIDTYPE(ha) && qla2x00_setup_chip() 1856 (ha->fw_attributes & BIT_2)) { qla2x00_setup_chip() 1857 ha->flags.npiv_supported = 1; qla2x00_setup_chip() 1858 if ((!ha->max_npiv_vports) || qla2x00_setup_chip() 1859 ((ha->max_npiv_vports + 1) % qla2x00_setup_chip() 1861 ha->max_npiv_vports = qla2x00_setup_chip() 1865 &ha->fw_xcb_count, NULL, &ha->fw_iocb_count, qla2x00_setup_chip() 1866 &ha->max_npiv_vports, NULL); qla2x00_setup_chip() 1872 rval = qla2x00_alloc_outstanding_cmds(ha, qla2x00_setup_chip() 1878 && !(IS_P3P_TYPE(ha))) qla2x00_setup_chip() 1891 if (!IS_FWI2_CAPABLE(ha) && !IS_QLA2100(ha) && !IS_QLA2200(ha)) { qla2x00_setup_chip() 1893 spin_lock_irqsave(&ha->hardware_lock, flags); qla2x00_setup_chip() 1894 if (IS_QLA2300(ha)) qla2x00_setup_chip() 1901 spin_unlock_irqrestore(&ha->hardware_lock, flags); qla2x00_setup_chip() 1904 if (IS_QLA27XX(ha)) qla2x00_setup_chip() 1905 ha->flags.fac_supported = 1; qla2x00_setup_chip() 1906 else if (rval == QLA_SUCCESS && IS_FAC_REQUIRED(ha)) { qla2x00_setup_chip() 1911 ha->flags.fac_supported = 1; qla2x00_setup_chip() 1912 ha->fdt_block_size = size << 2; qla2x00_setup_chip() 1916 ha->fw_major_version, ha->fw_minor_version, qla2x00_setup_chip() 1917 ha->fw_subminor_version); qla2x00_setup_chip() 1919 if (IS_QLA83XX(ha) || IS_QLA27XX(ha)) { qla2x00_setup_chip() 1920 ha->flags.fac_supported = 0; qla2x00_setup_chip() 1936 * @ha: HA context 1961 * @ha: HA context 1969 struct qla_hw_data *ha = vha->hw; qla2x00_update_fw_options() local 1971 memset(ha->fw_options, 0, sizeof(ha->fw_options)); qla2x00_update_fw_options() 1972 qla2x00_get_fw_options(vha, ha->fw_options); qla2x00_update_fw_options() 1974 if (IS_QLA2100(ha) || IS_QLA2200(ha)) qla2x00_update_fw_options() 1981 (uint8_t *)&ha->fw_seriallink_options, qla2x00_update_fw_options() 1982 sizeof(ha->fw_seriallink_options)); qla2x00_update_fw_options() 1984 ha->fw_options[1] &= ~FO1_SET_EMPHASIS_SWING; qla2x00_update_fw_options() 1985 if (ha->fw_seriallink_options[3] & BIT_2) { qla2x00_update_fw_options() 1986 ha->fw_options[1] |= FO1_SET_EMPHASIS_SWING; qla2x00_update_fw_options() 1989 swing = ha->fw_seriallink_options[2] & (BIT_2 | BIT_1 | BIT_0); qla2x00_update_fw_options() 1990 emphasis = (ha->fw_seriallink_options[2] & qla2x00_update_fw_options() 1992 tx_sens = ha->fw_seriallink_options[0] & qla2x00_update_fw_options() 1994 rx_sens = (ha->fw_seriallink_options[0] & qla2x00_update_fw_options() 1996 ha->fw_options[10] = (emphasis << 14) | (swing << 8); qla2x00_update_fw_options() 1997 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) { qla2x00_update_fw_options() 2000 ha->fw_options[10] |= (tx_sens << 4) | rx_sens; qla2x00_update_fw_options() 2001 } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) qla2x00_update_fw_options() 2002 ha->fw_options[10] |= BIT_5 | qla2x00_update_fw_options() 2007 swing = (ha->fw_seriallink_options[2] & qla2x00_update_fw_options() 2009 emphasis = ha->fw_seriallink_options[3] & (BIT_1 | BIT_0); qla2x00_update_fw_options() 2010 tx_sens = ha->fw_seriallink_options[1] & qla2x00_update_fw_options() 2012 rx_sens = (ha->fw_seriallink_options[1] & qla2x00_update_fw_options() 2014 ha->fw_options[11] = (emphasis << 14) | (swing << 8); qla2x00_update_fw_options() 2015 if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) { qla2x00_update_fw_options() 2018 ha->fw_options[11] |= (tx_sens << 4) | rx_sens; qla2x00_update_fw_options() 2019 } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) qla2x00_update_fw_options() 2020 ha->fw_options[11] |= BIT_5 | qla2x00_update_fw_options() 2027 ha->fw_options[3] |= BIT_13; qla2x00_update_fw_options() 2030 if (ha->flags.enable_led_scheme) qla2x00_update_fw_options() 2031 ha->fw_options[2] |= BIT_12; qla2x00_update_fw_options() 2034 if (IS_QLA6312(ha)) qla2x00_update_fw_options() 2035 ha->fw_options[2] |= BIT_13; qla2x00_update_fw_options() 2038 qla2x00_set_fw_options(vha, ha->fw_options); qla2x00_update_fw_options() 2045 struct qla_hw_data *ha = vha->hw; qla24xx_update_fw_options() local 2047 if (IS_P3P_TYPE(ha)) qla24xx_update_fw_options() 2051 if ((le16_to_cpu(ha->fw_seriallink_options24[0]) & BIT_0) == 0) qla24xx_update_fw_options() 2055 le16_to_cpu(ha->fw_seriallink_options24[1]), qla24xx_update_fw_options() 2056 le16_to_cpu(ha->fw_seriallink_options24[2]), qla24xx_update_fw_options() 2057 le16_to_cpu(ha->fw_seriallink_options24[3])); qla24xx_update_fw_options() 2067 struct qla_hw_data *ha = vha->hw; qla2x00_config_rings() local 2068 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; qla2x00_config_rings() 2069 struct req_que *req = ha->req_q_map[0]; qla2x00_config_rings() 2070 struct rsp_que *rsp = ha->rsp_q_map[0]; qla2x00_config_rings() 2073 ha->init_cb->request_q_outpointer = __constant_cpu_to_le16(0); qla2x00_config_rings() 2074 ha->init_cb->response_q_inpointer = __constant_cpu_to_le16(0); qla2x00_config_rings() 2075 ha->init_cb->request_q_length = cpu_to_le16(req->length); qla2x00_config_rings() 2076 ha->init_cb->response_q_length = cpu_to_le16(rsp->length); qla2x00_config_rings() 2077 ha->init_cb->request_q_address[0] = cpu_to_le32(LSD(req->dma)); qla2x00_config_rings() 2078 ha->init_cb->request_q_address[1] = cpu_to_le32(MSD(req->dma)); qla2x00_config_rings() 2079 ha->init_cb->response_q_address[0] = cpu_to_le32(LSD(rsp->dma)); qla2x00_config_rings() 2080 ha->init_cb->response_q_address[1] = cpu_to_le32(MSD(rsp->dma)); qla2x00_config_rings() 2082 WRT_REG_WORD(ISP_REQ_Q_IN(ha, reg), 0); qla2x00_config_rings() 2083 WRT_REG_WORD(ISP_REQ_Q_OUT(ha, reg), 0); qla2x00_config_rings() 2084 WRT_REG_WORD(ISP_RSP_Q_IN(ha, reg), 0); qla2x00_config_rings() 2085 WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), 0); qla2x00_config_rings() 2086 RD_REG_WORD(ISP_RSP_Q_OUT(ha, reg)); /* PCI Posting. */ qla2x00_config_rings() 2092 struct qla_hw_data *ha = vha->hw; qla24xx_config_rings() local 2093 device_reg_t __iomem *reg = ISP_QUE_REG(ha, 0); qla24xx_config_rings() 2094 struct device_reg_2xxx __iomem *ioreg = &ha->iobase->isp; qla24xx_config_rings() 2098 struct req_que *req = ha->req_q_map[0]; qla24xx_config_rings() 2099 struct rsp_que *rsp = ha->rsp_q_map[0]; qla24xx_config_rings() 2102 icb = (struct init_cb_24xx *)ha->init_cb; qla24xx_config_rings() 2114 icb->atio_q_length = cpu_to_le16(ha->tgt.atio_q_length); qla24xx_config_rings() 2115 icb->atio_q_address[0] = cpu_to_le32(LSD(ha->tgt.atio_dma)); qla24xx_config_rings() 2116 icb->atio_q_address[1] = cpu_to_le32(MSD(ha->tgt.atio_dma)); qla24xx_config_rings() 2118 if (IS_SHADOW_REG_CAPABLE(ha)) qla24xx_config_rings() 2122 if (ha->mqenable || IS_QLA83XX(ha) || IS_QLA27XX(ha)) { qla24xx_config_rings() 2125 if (ha->flags.msix_enabled) { qla24xx_config_rings() 2126 msix = &ha->msix_entries[1]; qla24xx_config_rings() 2142 if ((ha->fw_attributes & BIT_6) && (IS_MSIX_NACK_CAPABLE(ha)) && qla24xx_config_rings() 2143 (ha->flags.msix_enabled)) { qla24xx_config_rings() 2146 ha->flags.disable_msix_handshake = 1; qla24xx_config_rings() 2173 * @ha: HA context 2186 struct qla_hw_data *ha = vha->hw; qla2x00_init_rings() local 2190 (struct mid_init_cb_24xx *) ha->init_cb; qla2x00_init_rings() 2192 spin_lock_irqsave(&ha->hardware_lock, flags); qla2x00_init_rings() 2195 for (que = 0; que < ha->max_req_queues; que++) { qla2x00_init_rings() 2196 req = ha->req_q_map[que]; qla2x00_init_rings() 2197 if (!req || !test_bit(que, ha->req_qid_map)) qla2x00_init_rings() 2212 for (que = 0; que < ha->max_rsp_queues; que++) { qla2x00_init_rings() 2213 rsp = ha->rsp_q_map[que]; qla2x00_init_rings() 2214 if (!rsp || !test_bit(que, ha->rsp_qid_map)) qla2x00_init_rings() 2219 if (IS_QLAFX00(ha)) qla2x00_init_rings() 2225 ha->tgt.atio_ring_ptr = ha->tgt.atio_ring; qla2x00_init_rings() 2226 ha->tgt.atio_ring_index = 0; qla2x00_init_rings() 2230 ha->isp_ops->config_rings(vha); qla2x00_init_rings() 2232 spin_unlock_irqrestore(&ha->hardware_lock, flags); qla2x00_init_rings() 2236 if (IS_QLAFX00(ha)) { qla2x00_init_rings() 2237 rval = qlafx00_init_firmware(vha, ha->init_cb_size); qla2x00_init_rings() 2242 ha->isp_ops->update_fw_options(vha); qla2x00_init_rings() 2244 if (ha->flags.npiv_supported) { qla2x00_init_rings() 2245 if (ha->operating_mode == LOOP && !IS_CNA_CAPABLE(ha)) qla2x00_init_rings() 2246 ha->max_npiv_vports = MIN_MULTI_ID_FABRIC - 1; qla2x00_init_rings() 2247 mid_init_cb->count = cpu_to_le16(ha->max_npiv_vports); qla2x00_init_rings() 2250 if (IS_FWI2_CAPABLE(ha)) { qla2x00_init_rings() 2253 cpu_to_le16(ha->fw_xcb_count); qla2x00_init_rings() 2255 if (IS_DPORT_CAPABLE(ha)) qla2x00_init_rings() 2259 ha->flags.fawwpn_enabled = qla2x00_init_rings() 2262 (ha->flags.fawwpn_enabled) ? "enabled" : "disabled"); qla2x00_init_rings() 2265 rval = qla2x00_init_firmware(vha, ha->init_cb_size); qla2x00_init_rings() 2280 * @ha: HA context 2292 struct qla_hw_data *ha = vha->hw; qla2x00_fw_ready() local 2300 if (IS_P3P_TYPE(ha)) qla2x00_fw_ready() 2309 if ((wait_time = (ha->retry_count*ha->login_timeout) + 5) < min_wait) { qla2x00_fw_ready() 2331 if (IS_QLA84XX(ha) && state[0] != FSTATE_READY) { qla2x00_fw_ready() 2362 qla2x00_get_retry_cnt(vha, &ha->retry_count, qla2x00_fw_ready() 2363 &ha->login_timeout, &ha->r_a_tov); qla2x00_fw_ready() 2387 ha->flags.isp82xx_fw_hung) qla2x00_fw_ready() 2415 * ha = adapter state pointer. 2434 struct qla_hw_data *ha = vha->hw; qla2x00_configure_hba() local 2436 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev); qla2x00_configure_hba() 2442 if (LOOP_TRANSITION(vha) || atomic_read(&ha->loop_down_timer) || qla2x00_configure_hba() 2443 IS_CNA_CAPABLE(ha) || qla2x00_configure_hba() 2450 if (IS_FWI2_CAPABLE(ha) && (vha == base_vha) && qla2x00_configure_hba() 2471 ha->min_external_loopid = SNS_FIRST_LOOP_ID; qla2x00_configure_hba() 2472 ha->operating_mode = LOOP; qla2x00_configure_hba() 2473 ha->switch_cap = 0; qla2x00_configure_hba() 2478 ha->current_topology = ISP_CFG_NL; qla2x00_configure_hba() 2484 ha->switch_cap = sw_cap; qla2x00_configure_hba() 2485 ha->current_topology = ISP_CFG_FL; qla2x00_configure_hba() 2491 ha->operating_mode = P2P; qla2x00_configure_hba() 2492 ha->current_topology = ISP_CFG_N; qla2x00_configure_hba() 2498 ha->switch_cap = sw_cap; qla2x00_configure_hba() 2499 ha->operating_mode = P2P; qla2x00_configure_hba() 2500 ha->current_topology = ISP_CFG_F; qla2x00_configure_hba() 2507 ha->current_topology = ISP_CFG_NL; qla2x00_configure_hba() 2518 spin_lock_irqsave(&ha->vport_slock, flags); qla2x00_configure_hba() 2520 spin_unlock_irqrestore(&ha->vport_slock, flags); qla2x00_configure_hba() 2536 struct qla_hw_data *ha = vha->hw; qla2x00_set_model_info() local 2537 int use_tbl = !IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha) && qla2x00_set_model_info() 2538 !IS_CNA_CAPABLE(ha) && !IS_QLA2031(ha); qla2x00_set_model_info() 2541 strncpy(ha->model_number, model, len); qla2x00_set_model_info() 2542 st = en = ha->model_number; qla2x00_set_model_info() 2550 index = (ha->pdev->subsystem_device & 0xff); qla2x00_set_model_info() 2552 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC && qla2x00_set_model_info() 2554 strncpy(ha->model_desc, qla2x00_set_model_info() 2556 sizeof(ha->model_desc) - 1); qla2x00_set_model_info() 2558 index = (ha->pdev->subsystem_device & 0xff); qla2x00_set_model_info() 2560 ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC && qla2x00_set_model_info() 2562 strcpy(ha->model_number, qla2x00_set_model_info() 2564 strncpy(ha->model_desc, qla2x00_set_model_info() 2566 sizeof(ha->model_desc) - 1); qla2x00_set_model_info() 2568 strcpy(ha->model_number, def); qla2x00_set_model_info() 2571 if (IS_FWI2_CAPABLE(ha)) qla2x00_set_model_info() 2572 qla2xxx_get_vpd_field(vha, "\x82", ha->model_desc, qla2x00_set_model_info() 2573 sizeof(ha->model_desc)); qla2x00_set_model_info() 2582 struct qla_hw_data *ha = vha->hw; qla2xxx_nvram_wwn_from_ofw() local 2583 struct pci_dev *pdev = ha->pdev; qla2xxx_nvram_wwn_from_ofw() 2602 * ha = adapter block pointer. 2618 struct qla_hw_data *ha = vha->hw; qla2x00_nvram_config() local 2619 init_cb_t *icb = ha->init_cb; qla2x00_nvram_config() 2620 nvram_t *nv = ha->nvram; qla2x00_nvram_config() 2621 uint8_t *ptr = ha->nvram; qla2x00_nvram_config() 2622 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; qla2x00_nvram_config() 2627 ha->nvram_size = sizeof(nvram_t); qla2x00_nvram_config() 2628 ha->nvram_base = 0; qla2x00_nvram_config() 2629 if (!IS_QLA2100(ha) && !IS_QLA2200(ha) && !IS_QLA2300(ha)) qla2x00_nvram_config() 2631 ha->nvram_base = 0x80; qla2x00_nvram_config() 2634 ha->isp_ops->read_nvram(vha, ptr, ha->nvram_base, ha->nvram_size); qla2x00_nvram_config() 2635 for (cnt = 0, chksum = 0; cnt < ha->nvram_size; cnt++) qla2x00_nvram_config() 2641 (uint8_t *)nv, ha->nvram_size); qla2x00_nvram_config() 2658 memset(nv, 0, ha->nvram_size); qla2x00_nvram_config() 2661 if (IS_QLA23XX(ha)) { qla2x00_nvram_config() 2668 } else if (IS_QLA2200(ha)) { qla2x00_nvram_config() 2674 } else if (IS_QLA2100(ha)) { qla2x00_nvram_config() 2714 if (IS_QLA23XX(ha)) qla2x00_nvram_config() 2720 memset(icb, 0, ha->init_cb_size); qla2x00_nvram_config() 2730 if (IS_QLA23XX(ha)) { qla2x00_nvram_config() 2736 if (IS_QLA2300(ha)) { qla2x00_nvram_config() 2737 if (ha->fb_rev == FPM_2310) { qla2x00_nvram_config() 2738 strcpy(ha->model_number, "QLA2310"); qla2x00_nvram_config() 2740 strcpy(ha->model_number, "QLA2300"); qla2x00_nvram_config() 2746 } else if (IS_QLA2200(ha)) { qla2x00_nvram_config() 2758 strcpy(ha->model_number, "QLA22xx"); qla2x00_nvram_config() 2759 } else /*if (IS_QLA2100(ha))*/ { qla2x00_nvram_config() 2760 strcpy(ha->model_number, "QLA2100"); qla2x00_nvram_config() 2804 ha->flags.disable_risc_code_load = ((nv->host_p[0] & BIT_4) ? 1 : 0); qla2x00_nvram_config() 2806 if (!IS_QLA2100(ha) && !IS_QLA2200(ha)) qla2x00_nvram_config() 2807 ha->flags.disable_risc_code_load = 0; qla2x00_nvram_config() 2808 ha->flags.enable_lip_reset = ((nv->host_p[1] & BIT_1) ? 1 : 0); qla2x00_nvram_config() 2809 ha->flags.enable_lip_full_login = ((nv->host_p[1] & BIT_2) ? 1 : 0); qla2x00_nvram_config() 2810 ha->flags.enable_target_reset = ((nv->host_p[1] & BIT_3) ? 1 : 0); qla2x00_nvram_config() 2811 ha->flags.enable_led_scheme = (nv->special_options[1] & BIT_4) ? 1 : 0; qla2x00_nvram_config() 2812 ha->flags.disable_serdes = 0; qla2x00_nvram_config() 2814 ha->operating_mode = qla2x00_nvram_config() 2817 memcpy(ha->fw_seriallink_options, nv->seriallink_options, qla2x00_nvram_config() 2818 sizeof(ha->fw_seriallink_options)); qla2x00_nvram_config() 2821 ha->serial0 = icb->port_name[5]; qla2x00_nvram_config() 2822 ha->serial1 = icb->port_name[6]; qla2x00_nvram_config() 2823 ha->serial2 = icb->port_name[7]; qla2x00_nvram_config() 2829 ha->retry_count = nv->retry_count; qla2x00_nvram_config() 2836 ha->login_timeout = nv->login_timeout; qla2x00_nvram_config() 2840 ha->r_a_tov = 100; qla2x00_nvram_config() 2842 ha->loop_reset_delay = nv->reset_delay; qla2x00_nvram_config() 2855 ha->loop_down_abort_time = qla2x00_nvram_config() 2858 ha->link_down_timeout = nv->link_down_timeout; qla2x00_nvram_config() 2859 ha->loop_down_abort_time = qla2x00_nvram_config() 2860 (LOOP_DOWN_TIME - ha->link_down_timeout); qla2x00_nvram_config() 2866 ha->port_down_retry_count = nv->port_down_retry_count; qla2x00_nvram_config() 2868 ha->port_down_retry_count = qlport_down_retry; qla2x00_nvram_config() 2870 ha->login_retry_count = nv->retry_count; qla2x00_nvram_config() 2871 if (ha->port_down_retry_count == nv->port_down_retry_count && qla2x00_nvram_config() 2872 ha->port_down_retry_count > 3) qla2x00_nvram_config() 2873 ha->login_retry_count = ha->port_down_retry_count; qla2x00_nvram_config() 2874 else if (ha->port_down_retry_count > (int)ha->login_retry_count) qla2x00_nvram_config() 2875 ha->login_retry_count = ha->port_down_retry_count; qla2x00_nvram_config() 2877 ha->login_retry_count = ql2xloginretrycount; qla2x00_nvram_config() 2884 if (IS_QLA2100(ha) || IS_QLA2200(ha)) { qla2x00_nvram_config() 2897 ha->zio_mode = icb->add_firmware_options[0] & qla2x00_nvram_config() 2899 ha->zio_timer = icb->interrupt_delay_timer ? qla2x00_nvram_config() 2905 if (ha->zio_mode != QLA_ZIO_DISABLED) { qla2x00_nvram_config() 2906 ha->zio_mode = QLA_ZIO_MODE_6; qla2x00_nvram_config() 2910 ha->zio_mode, ha->zio_timer * 100); qla2x00_nvram_config() 2912 icb->add_firmware_options[0] |= (uint8_t)ha->zio_mode; qla2x00_nvram_config() 2913 icb->interrupt_delay_timer = (uint8_t)ha->zio_timer; qla2x00_nvram_config() 2942 * @ha: HA context 2971 * ha = adapter block pointer. 2983 struct qla_hw_data *ha = vha->hw; qla2x00_configure_loop() local 3010 if (ha->current_topology == ISP_CFG_FL && qla2x00_configure_loop() 3015 } else if (ha->current_topology == ISP_CFG_F && qla2x00_configure_loop() 3021 } else if (ha->current_topology == ISP_CFG_N) { qla2x00_configure_loop() 3088 * ha = adapter block pointer. 3106 struct qla_hw_data *ha = vha->hw; qla2x00_configure_local_loop() local 3113 memset(ha->gid_list, 0, qla2x00_gid_list_size(ha)); qla2x00_configure_local_loop() 3114 rval = qla2x00_get_id_list(vha, ha->gid_list, ha->gid_list_dma, qla2x00_configure_local_loop() 3122 (uint8_t *)ha->gid_list, qla2x00_configure_local_loop() 3152 id_iter = (char *)ha->gid_list; qla2x00_configure_local_loop() 3157 if (IS_QLA2100(ha) || IS_QLA2200(ha)) qla2x00_configure_local_loop() 3163 id_iter += ha->gid_list_info_size; qla2x00_configure_local_loop() 3233 fcport->fp_speed = ha->link_data_rate; qla2x00_configure_local_loop() 3256 struct qla_hw_data *ha = vha->hw; qla2x00_iidma_fcport() local 3258 if (!IS_IIDMA_CAPABLE(ha)) qla2x00_iidma_fcport() 3265 fcport->fp_speed > ha->link_data_rate) qla2x00_iidma_fcport() 3277 qla2x00_get_link_speed_str(ha, fcport->fp_speed), qla2x00_iidma_fcport() 3326 * ha = adapter block pointer. 3360 * ha = adapter block pointer. 3375 struct qla_hw_data *ha = vha->hw; qla2x00_configure_fabric() local 3376 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); qla2x00_configure_fabric() 3380 if (IS_FWI2_CAPABLE(ha)) qla2x00_configure_fabric() 3401 if (IS_FWI2_CAPABLE(ha)) qla2x00_configure_fabric() 3405 rval = ha->isp_ops->fabric_login(vha, loop_id, 0xff, 0xff, qla2x00_configure_fabric() 3480 ha->isp_ops->fabric_logout(vha, qla2x00_configure_fabric() 3514 next_loopid = ha->min_external_loopid; qla2x00_configure_fabric() 3632 * ha = adapter block pointer. 3654 struct qla_hw_data *ha = vha->hw; qla2x00_find_all_fabric_devs() local 3655 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); qla2x00_find_all_fabric_devs() 3660 if (!ha->swl) qla2x00_find_all_fabric_devs() 3661 ha->swl = kcalloc(ha->max_fibre_devices, sizeof(sw_info_t), qla2x00_find_all_fabric_devs() 3663 swl = ha->swl; qla2x00_find_all_fabric_devs() 3669 memset(swl, 0, ha->max_fibre_devices * sizeof(sw_info_t)); qla2x00_find_all_fabric_devs() 3700 loop_id = ha->min_external_loopid; qla2x00_find_all_fabric_devs() 3701 for (; loop_id <= ha->max_loop_id; loop_id++) { qla2x00_find_all_fabric_devs() 3705 if (ha->current_topology == ISP_CFG_FL && qla2x00_find_all_fabric_devs() 3773 (vha->d_id.b24 & 0xffff00)) && ha->current_topology == 3852 ha->isp_ops->fabric_logout(vha, fcport->loop_id, 3889 * ha: adapter state pointer. 3902 struct qla_hw_data *ha = vha->hw; qla2x00_find_new_loop_id() local 3907 spin_lock_irqsave(&ha->vport_slock, flags); qla2x00_find_new_loop_id() 3909 dev->loop_id = find_first_zero_bit(ha->loop_id_map, qla2x00_find_new_loop_id() 3916 set_bit(dev->loop_id, ha->loop_id_map); qla2x00_find_new_loop_id() 3918 spin_unlock_irqrestore(&ha->vport_slock, flags); qla2x00_find_new_loop_id() 3937 * ha: adapter state pointer. 3955 struct qla_hw_data *ha = vha->hw; qla2x00_fabric_dev_login() local 3960 if (IS_ALOGIO_CAPABLE(ha)) { qla2x00_fabric_dev_login() 3978 ha->isp_ops->fabric_logout(vha, fcport->loop_id, qla2x00_fabric_dev_login() 3998 * ha = adapter block pointer. 4015 struct qla_hw_data *ha = vha->hw; qla2x00_fabric_login() local 4028 rval = ha->isp_ops->fabric_login(vha, fcport->loop_id, qla2x00_fabric_login() 4081 if (IS_FWI2_CAPABLE(ha)) { qla2x00_fabric_login() 4106 ha->isp_ops->fabric_logout(vha, fcport->loop_id, qla2x00_fabric_login() 4124 ha->isp_ops->fabric_logout(vha, fcport->loop_id, qla2x00_fabric_login() 4143 * ha = adapter block pointer. 4176 * ha = adapter block pointer. 4245 int qla2x00_perform_loop_resync(scsi_qla_host_t *ha) qla2x00_perform_loop_resync() argument 4249 if (!test_and_set_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags)) { qla2x00_perform_loop_resync() 4251 atomic_set(&ha->loop_down_timer, 0); qla2x00_perform_loop_resync() 4252 if (!(ha->device_flags & DFLG_NO_CABLE)) { qla2x00_perform_loop_resync() 4253 atomic_set(&ha->loop_state, LOOP_UP); qla2x00_perform_loop_resync() 4254 set_bit(LOCAL_LOOP_UPDATE, &ha->dpc_flags); qla2x00_perform_loop_resync() 4255 set_bit(REGISTER_FC4_NEEDED, &ha->dpc_flags); qla2x00_perform_loop_resync() 4256 set_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags); qla2x00_perform_loop_resync() 4258 rval = qla2x00_loop_resync(ha); qla2x00_perform_loop_resync() 4260 atomic_set(&ha->loop_state, LOOP_DEAD); qla2x00_perform_loop_resync() 4262 clear_bit(LOOP_RESYNC_ACTIVE, &ha->dpc_flags); qla2x00_perform_loop_resync() 4273 struct qla_hw_data *ha = base_vha->hw; qla2x00_update_fcports() local 4276 spin_lock_irqsave(&ha->vport_slock, flags); qla2x00_update_fcports() 4283 spin_unlock_irqrestore(&ha->vport_slock, flags); qla2x00_update_fcports() 4293 spin_lock_irqsave(&ha->vport_slock, flags); qla2x00_update_fcports() 4298 spin_unlock_irqrestore(&ha->vport_slock, flags); qla2x00_update_fcports() 4305 struct qla_hw_data *ha = vha->hw; qla83xx_reset_ownership() local 4311 if (IS_QLA8044(ha)) { qla83xx_reset_ownership() 4326 (i != ha->portnum)) { qla83xx_reset_ownership() 4336 ((i + 8) != ha->portnum)) { qla83xx_reset_ownership() 4346 drv_presence_mask = ~((1 << (ha->portnum)) | qla83xx_reset_ownership() 4354 (ha->portnum < fcoe_other_function)) { qla83xx_reset_ownership() 4357 ha->flags.nic_core_reset_owner = 1; qla83xx_reset_ownership() 4365 struct qla_hw_data *ha = vha->hw; __qla83xx_set_drv_ack() local 4370 drv_ack |= (1 << ha->portnum); __qla83xx_set_drv_ack() 4381 struct qla_hw_data *ha = vha->hw; __qla83xx_clear_drv_ack() local 4386 drv_ack &= ~(1 << ha->portnum); __qla83xx_clear_drv_ack() 4420 struct qla_hw_data *ha = vha->hw; qla83xx_idc_audit() local 4425 ha->idc_audit_ts = (jiffies_to_msecs(jiffies) / 1000); qla83xx_idc_audit() 4426 idc_audit_reg = (ha->portnum) | qla83xx_idc_audit() 4427 (IDC_AUDIT_TIMESTAMP << 7) | (ha->idc_audit_ts << 8); qla83xx_idc_audit() 4433 jiffies_to_msecs(ha->idc_audit_ts)) / 1000); qla83xx_idc_audit() 4434 idc_audit_reg = (ha->portnum) | qla83xx_idc_audit() 4450 struct qla_hw_data *ha = vha->hw; qla83xx_initiating_reset() local 4463 if (ha->flags.nic_core_reset_owner && dev_state == QLA8XXX_DEV_READY) { qla83xx_initiating_reset() 4504 struct qla_hw_data *ha = vha->hw; qla83xx_check_driver_presence() local 4507 if (drv_presence & (1 << ha->portnum)) qla83xx_check_driver_presence() 4517 struct qla_hw_data *ha = vha->hw; qla83xx_nic_core_reset() local 4533 ha->portnum); qla83xx_nic_core_reset() 4550 ha->flags.nic_core_hung = 0; qla83xx_nic_core_reset() 4565 struct qla_hw_data *ha = vha->hw; qla2xxx_mctp_dump() local 4568 if (!IS_MCTP_CAPABLE(ha)) { qla2xxx_mctp_dump() 4575 if (!ha->mctp_dump) { qla2xxx_mctp_dump() 4576 ha->mctp_dump = dma_alloc_coherent(&ha->pdev->dev, qla2xxx_mctp_dump() 4577 MCTP_DUMP_SIZE, &ha->mctp_dump_dma, GFP_KERNEL); qla2xxx_mctp_dump() 4579 if (!ha->mctp_dump) { qla2xxx_mctp_dump() 4587 rval = qla2x00_dump_mctp_data(vha, ha->mctp_dump_dma, qla2xxx_mctp_dump() 4595 vha->host_no, ha->mctp_dump); qla2xxx_mctp_dump() 4596 ha->mctp_dumped = 1; qla2xxx_mctp_dump() 4599 if (!ha->flags.nic_core_reset_hdlr_active && !ha->portnum) { qla2xxx_mctp_dump() 4600 ha->flags.nic_core_reset_hdlr_active = 1; qla2xxx_mctp_dump() 4609 ha->flags.nic_core_reset_hdlr_active = 0; qla2xxx_mctp_dump() 4627 struct qla_hw_data *ha = vha->hw; qla2x00_quiesce_io() local 4631 "Quiescing I/O - ha=%p.\n", ha); qla2x00_quiesce_io() 4633 atomic_set(&ha->loop_down_timer, LOOP_DOWN_TIME); qla2x00_quiesce_io() 4637 list_for_each_entry(vp, &ha->vp_list, list) qla2x00_quiesce_io() 4651 struct qla_hw_data *ha = vha->hw; qla2x00_abort_isp_cleanup() local 4659 if (!(IS_P3P_TYPE(ha))) qla2x00_abort_isp_cleanup() 4661 ha->flags.chip_reset_done = 0; qla2x00_abort_isp_cleanup() 4666 "Performing ISP error recovery - ha=%p.\n", ha); qla2x00_abort_isp_cleanup() 4672 if (!(IS_P3P_TYPE(ha))) qla2x00_abort_isp_cleanup() 4673 ha->isp_ops->reset_chip(vha); qla2x00_abort_isp_cleanup() 4680 spin_lock_irqsave(&ha->vport_slock, flags); qla2x00_abort_isp_cleanup() 4681 list_for_each_entry(vp, &ha->vp_list, list) { qla2x00_abort_isp_cleanup() 4683 spin_unlock_irqrestore(&ha->vport_slock, flags); qla2x00_abort_isp_cleanup() 4687 spin_lock_irqsave(&ha->vport_slock, flags); qla2x00_abort_isp_cleanup() 4690 spin_unlock_irqrestore(&ha->vport_slock, flags); qla2x00_abort_isp_cleanup() 4700 spin_lock_irqsave(&ha->vport_slock, flags); qla2x00_abort_isp_cleanup() 4701 list_for_each_entry(vp, &ha->vp_list, list) { qla2x00_abort_isp_cleanup() 4703 spin_unlock_irqrestore(&ha->vport_slock, flags); qla2x00_abort_isp_cleanup() 4708 spin_lock_irqsave(&ha->vport_slock, flags); qla2x00_abort_isp_cleanup() 4711 spin_unlock_irqrestore(&ha->vport_slock, flags); qla2x00_abort_isp_cleanup() 4713 if (!ha->flags.eeh_busy) { qla2x00_abort_isp_cleanup() 4715 if (IS_P3P_TYPE(ha)) { qla2x00_abort_isp_cleanup() 4730 ha->chip_reset++; qla2x00_abort_isp_cleanup() 4740 * ha = adapter block pointer. 4750 struct qla_hw_data *ha = vha->hw; qla2x00_abort_isp() local 4752 struct req_que *req = ha->req_q_map[0]; qla2x00_abort_isp() 4758 if (IS_QLA8031(ha)) { qla2x00_abort_isp() 4766 if (unlikely(pci_channel_offline(ha->pdev) && qla2x00_abort_isp() 4767 ha->flags.pci_channel_io_perm_failure)) { qla2x00_abort_isp() 4773 ha->isp_ops->get_flash_version(vha, req->ring); qla2x00_abort_isp() 4775 ha->isp_ops->nvram_config(vha); qla2x00_abort_isp() 4790 ha->isp_ops->enable_intrs(ha); qla2x00_abort_isp() 4792 ha->isp_abort_cnt = 0; qla2x00_abort_isp() 4795 if (IS_QLA81XX(ha) || IS_QLA8031(ha)) qla2x00_abort_isp() 4797 if (ha->fce) { qla2x00_abort_isp() 4798 ha->flags.fce_enabled = 1; qla2x00_abort_isp() 4799 memset(ha->fce, 0, qla2x00_abort_isp() 4800 fce_calc_size(ha->fce_bufs)); qla2x00_abort_isp() 4802 ha->fce_dma, ha->fce_bufs, ha->fce_mb, qla2x00_abort_isp() 4803 &ha->fce_bufs); qla2x00_abort_isp() 4808 ha->flags.fce_enabled = 0; qla2x00_abort_isp() 4812 if (ha->eft) { qla2x00_abort_isp() 4813 memset(ha->eft, 0, EFT_SIZE); qla2x00_abort_isp() 4815 ha->eft_dma, EFT_NUM_BUFFERS); qla2x00_abort_isp() 4825 if (ha->isp_abort_cnt == 0) { qla2x00_abort_isp() 4833 ha->isp_ops->reset_adapter(vha); qla2x00_abort_isp() 4839 ha->isp_abort_cnt--; qla2x00_abort_isp() 4842 ha->isp_abort_cnt); qla2x00_abort_isp() 4846 ha->isp_abort_cnt = MAX_RETRIES_OF_ISP_ABORT; qla2x00_abort_isp() 4849 "more times.\n", ha->isp_abort_cnt); qla2x00_abort_isp() 4860 spin_lock_irqsave(&ha->vport_slock, flags); qla2x00_abort_isp() 4861 list_for_each_entry(vp, &ha->vp_list, list) { qla2x00_abort_isp() 4864 spin_unlock_irqrestore(&ha->vport_slock, flags); qla2x00_abort_isp() 4868 spin_lock_irqsave(&ha->vport_slock, flags); qla2x00_abort_isp() 4872 spin_unlock_irqrestore(&ha->vport_slock, flags); qla2x00_abort_isp() 4874 if (IS_QLA8031(ha)) { qla2x00_abort_isp() 4894 * ha = adapter block pointer. 4903 struct qla_hw_data *ha = vha->hw; qla2x00_restart_isp() local 4904 struct req_que *req = ha->req_q_map[0]; qla2x00_restart_isp() 4905 struct rsp_que *rsp = ha->rsp_q_map[0]; qla2x00_restart_isp() 4911 status = ha->isp_ops->chip_diag(vha); qla2x00_restart_isp() 4918 ha->flags.chip_reset_done = 1; qla2x00_restart_isp() 4921 qla25xx_init_queues(ha); qla2x00_restart_isp() 4934 spin_lock_irqsave(&ha->hardware_lock, flags); qla2x00_restart_isp() 4937 spin_unlock_irqrestore(&ha->hardware_lock, flags); qla2x00_restart_isp() 4950 qla25xx_init_queues(struct qla_hw_data *ha) qla25xx_init_queues() argument 4954 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); qla25xx_init_queues() 4958 for (i = 1; i < ha->max_rsp_queues; i++) { qla25xx_init_queues() 4959 rsp = ha->rsp_q_map[i]; qla25xx_init_queues() 4960 if (rsp && test_bit(i, ha->rsp_qid_map)) { qla25xx_init_queues() 4973 for (i = 1; i < ha->max_req_queues; i++) { qla25xx_init_queues() 4974 req = ha->req_q_map[i]; qla25xx_init_queues() 4975 if (req && test_bit(i, ha->req_qid_map)) { qla25xx_init_queues() 4997 * ha = adapter block pointer. 5003 struct qla_hw_data *ha = vha->hw; qla2x00_reset_adapter() local 5004 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; qla2x00_reset_adapter() 5007 ha->isp_ops->disable_intrs(ha); qla2x00_reset_adapter() 5009 spin_lock_irqsave(&ha->hardware_lock, flags); qla2x00_reset_adapter() 5014 spin_unlock_irqrestore(&ha->hardware_lock, flags); qla2x00_reset_adapter() 5021 struct qla_hw_data *ha = vha->hw; qla24xx_reset_adapter() local 5022 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; qla24xx_reset_adapter() 5024 if (IS_P3P_TYPE(ha)) qla24xx_reset_adapter() 5028 ha->isp_ops->disable_intrs(ha); qla24xx_reset_adapter() 5030 spin_lock_irqsave(&ha->hardware_lock, flags); qla24xx_reset_adapter() 5035 spin_unlock_irqrestore(&ha->hardware_lock, flags); qla24xx_reset_adapter() 5037 if (IS_NOPOLLING_TYPE(ha)) qla24xx_reset_adapter() 5038 ha->isp_ops->enable_intrs(ha); qla24xx_reset_adapter() 5048 struct qla_hw_data *ha = vha->hw; qla24xx_nvram_wwn_from_ofw() local 5049 struct pci_dev *pdev = ha->pdev; qla24xx_nvram_wwn_from_ofw() 5074 struct qla_hw_data *ha = vha->hw; qla24xx_nvram_config() local 5077 icb = (struct init_cb_24xx *)ha->init_cb; qla24xx_nvram_config() 5078 nv = ha->nvram; qla24xx_nvram_config() 5081 if (ha->port_no == 0) { qla24xx_nvram_config() 5082 ha->nvram_base = FA_NVRAM_FUNC0_ADDR; qla24xx_nvram_config() 5083 ha->vpd_base = FA_NVRAM_VPD0_ADDR; qla24xx_nvram_config() 5085 ha->nvram_base = FA_NVRAM_FUNC1_ADDR; qla24xx_nvram_config() 5086 ha->vpd_base = FA_NVRAM_VPD1_ADDR; qla24xx_nvram_config() 5089 ha->nvram_size = sizeof(struct nvram_24xx); qla24xx_nvram_config() 5090 ha->vpd_size = FA_NVRAM_VPD_SIZE; qla24xx_nvram_config() 5093 ha->vpd = ha->nvram + VPD_OFFSET; qla24xx_nvram_config() 5094 ha->isp_ops->read_nvram(vha, (uint8_t *)ha->vpd, qla24xx_nvram_config() 5095 ha->nvram_base - FA_NVRAM_FUNC0_ADDR, FA_NVRAM_VPD_SIZE * 4); qla24xx_nvram_config() 5099 ha->isp_ops->read_nvram(vha, (uint8_t *)dptr, ha->nvram_base, qla24xx_nvram_config() 5100 ha->nvram_size); qla24xx_nvram_config() 5101 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++) qla24xx_nvram_config() 5107 (uint8_t *)nv, ha->nvram_size); qla24xx_nvram_config() 5124 memset(nv, 0, ha->nvram_size); qla24xx_nvram_config() 5132 nv->port_name[1] = 0x00 + ha->port_no + 1; qla24xx_nvram_config() 5176 memset(icb, 0, ha->init_cb_size); qla24xx_nvram_config() 5221 ha->flags.disable_risc_code_load = 0; qla24xx_nvram_config() 5222 ha->flags.enable_lip_reset = 0; qla24xx_nvram_config() 5223 ha->flags.enable_lip_full_login = qla24xx_nvram_config() 5225 ha->flags.enable_target_reset = qla24xx_nvram_config() 5227 ha->flags.enable_led_scheme = 0; qla24xx_nvram_config() 5228 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0; qla24xx_nvram_config() 5230 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) & qla24xx_nvram_config() 5233 memcpy(ha->fw_seriallink_options24, nv->seriallink_options, qla24xx_nvram_config() 5234 sizeof(ha->fw_seriallink_options24)); qla24xx_nvram_config() 5237 ha->serial0 = icb->port_name[5]; qla24xx_nvram_config() 5238 ha->serial1 = icb->port_name[6]; qla24xx_nvram_config() 5239 ha->serial2 = icb->port_name[7]; qla24xx_nvram_config() 5245 ha->retry_count = le16_to_cpu(nv->login_retry_count); qla24xx_nvram_config() 5252 ha->login_timeout = le16_to_cpu(nv->login_timeout); qla24xx_nvram_config() 5256 ha->r_a_tov = 100; qla24xx_nvram_config() 5258 ha->loop_reset_delay = nv->reset_delay; qla24xx_nvram_config() 5271 ha->loop_down_abort_time = qla24xx_nvram_config() 5274 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout); qla24xx_nvram_config() 5275 ha->loop_down_abort_time = qla24xx_nvram_config() 5276 (LOOP_DOWN_TIME - ha->link_down_timeout); qla24xx_nvram_config() 5280 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count); qla24xx_nvram_config() 5282 ha->port_down_retry_count = qlport_down_retry; qla24xx_nvram_config() 5285 ha->login_retry_count = le16_to_cpu(nv->login_retry_count); qla24xx_nvram_config() 5286 if (ha->port_down_retry_count == qla24xx_nvram_config() 5288 ha->port_down_retry_count > 3) qla24xx_nvram_config() 5289 ha->login_retry_count = ha->port_down_retry_count; qla24xx_nvram_config() 5290 else if (ha->port_down_retry_count > (int)ha->login_retry_count) qla24xx_nvram_config() 5291 ha->login_retry_count = ha->port_down_retry_count; qla24xx_nvram_config() 5293 ha->login_retry_count = ql2xloginretrycount; qla24xx_nvram_config() 5297 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) & qla24xx_nvram_config() 5299 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ? qla24xx_nvram_config() 5305 if (ha->zio_mode != QLA_ZIO_DISABLED) { qla24xx_nvram_config() 5306 ha->zio_mode = QLA_ZIO_MODE_6; qla24xx_nvram_config() 5310 ha->zio_mode, ha->zio_timer * 100); qla24xx_nvram_config() 5313 (uint32_t)ha->zio_mode); qla24xx_nvram_config() 5314 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer); qla24xx_nvram_config() 5335 struct qla_hw_data *ha = vha->hw; qla24xx_load_risc_flash() local 5336 struct req_que *req = ha->req_q_map[0]; qla24xx_load_risc_flash() 5375 dlen = (uint32_t)(ha->fw_transfer_size >> 2); qla24xx_load_risc_flash() 5407 if (!IS_QLA27XX(ha)) qla24xx_load_risc_flash() 5410 if (ha->fw_dump_template) qla24xx_load_risc_flash() 5411 vfree(ha->fw_dump_template); qla24xx_load_risc_flash() 5412 ha->fw_dump_template = NULL; qla24xx_load_risc_flash() 5413 ha->fw_dump_template_len = 0; qla24xx_load_risc_flash() 5427 ha->fw_dump_template = vmalloc(dlen); qla24xx_load_risc_flash() 5428 if (!ha->fw_dump_template) { qla24xx_load_risc_flash() 5436 dcode = ha->fw_dump_template; qla24xx_load_risc_flash() 5456 ha->fw_dump_template_len = dlen; qla24xx_load_risc_flash() 5461 if (ha->fw_dump_template) qla24xx_load_risc_flash() 5462 vfree(ha->fw_dump_template); qla24xx_load_risc_flash() 5463 ha->fw_dump_template = NULL; qla24xx_load_risc_flash() 5464 ha->fw_dump_template_len = 0; qla24xx_load_risc_flash() 5469 ha->fw_dump_template = vmalloc(dlen); qla24xx_load_risc_flash() 5470 if (!ha->fw_dump_template) { qla24xx_load_risc_flash() 5476 dcode = ha->fw_dump_template; qla24xx_load_risc_flash() 5482 if (!qla27xx_fwdt_template_valid(ha->fw_dump_template)) { qla24xx_load_risc_flash() 5488 dlen = qla27xx_fwdt_template_size(ha->fw_dump_template); qla24xx_load_risc_flash() 5491 ha->fw_dump_template_len = dlen; qla24xx_load_risc_flash() 5496 if (ha->fw_dump_template) qla24xx_load_risc_flash() 5497 vfree(ha->fw_dump_template); qla24xx_load_risc_flash() 5498 ha->fw_dump_template = NULL; qla24xx_load_risc_flash() 5499 ha->fw_dump_template_len = 0; qla24xx_load_risc_flash() 5513 struct qla_hw_data *ha = vha->hw; qla2x00_load_risc() local 5514 struct req_que *req = ha->req_q_map[0]; qla2x00_load_risc() 5570 wlen = (uint16_t)(ha->fw_transfer_size >> 1); qla2x00_load_risc() 5616 struct qla_hw_data *ha = vha->hw; qla24xx_load_risc_blob() local 5617 struct req_que *req = ha->req_q_map[0]; qla24xx_load_risc_blob() 5680 dlen = (uint32_t)(ha->fw_transfer_size >> 2); qla24xx_load_risc_blob() 5710 if (!IS_QLA27XX(ha)) qla24xx_load_risc_blob() 5713 if (ha->fw_dump_template) qla24xx_load_risc_blob() 5714 vfree(ha->fw_dump_template); qla24xx_load_risc_blob() 5715 ha->fw_dump_template = NULL; qla24xx_load_risc_blob() 5716 ha->fw_dump_template_len = 0; qla24xx_load_risc_blob() 5730 ha->fw_dump_template = vmalloc(dlen); qla24xx_load_risc_blob() 5731 if (!ha->fw_dump_template) { qla24xx_load_risc_blob() 5739 dcode = ha->fw_dump_template; qla24xx_load_risc_blob() 5758 ha->fw_dump_template_len = dlen; qla24xx_load_risc_blob() 5763 if (ha->fw_dump_template) qla24xx_load_risc_blob() 5764 vfree(ha->fw_dump_template); qla24xx_load_risc_blob() 5765 ha->fw_dump_template = NULL; qla24xx_load_risc_blob() 5766 ha->fw_dump_template_len = 0; qla24xx_load_risc_blob() 5771 ha->fw_dump_template = vmalloc(dlen); qla24xx_load_risc_blob() 5772 if (!ha->fw_dump_template) { qla24xx_load_risc_blob() 5778 dcode = ha->fw_dump_template; qla24xx_load_risc_blob() 5784 if (!qla27xx_fwdt_template_valid(ha->fw_dump_template)) { qla24xx_load_risc_blob() 5790 dlen = qla27xx_fwdt_template_size(ha->fw_dump_template); qla24xx_load_risc_blob() 5793 ha->fw_dump_template_len = dlen; qla24xx_load_risc_blob() 5798 if (ha->fw_dump_template) qla24xx_load_risc_blob() 5799 vfree(ha->fw_dump_template); qla24xx_load_risc_blob() 5800 ha->fw_dump_template = NULL; qla24xx_load_risc_blob() 5801 ha->fw_dump_template_len = 0; qla24xx_load_risc_blob() 5830 struct qla_hw_data *ha = vha->hw; qla81xx_load_risc() local 5841 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_fw); qla81xx_load_risc() 5847 if (rval == QLA_SUCCESS || !ha->flt_region_gold_fw) qla81xx_load_risc() 5852 rval = qla24xx_load_risc_flash(vha, srisc_addr, ha->flt_region_gold_fw); qla81xx_load_risc() 5857 ha->flags.running_gold_fw = 1; qla81xx_load_risc() 5865 struct qla_hw_data *ha = vha->hw; qla2x00_try_to_stop_firmware() local 5867 if (ha->flags.pci_channel_io_perm_failure) qla2x00_try_to_stop_firmware() 5869 if (!IS_FWI2_CAPABLE(ha)) qla2x00_try_to_stop_firmware() 5871 if (!ha->fw_major_version) qla2x00_try_to_stop_firmware() 5877 ha->isp_ops->reset_chip(vha); qla2x00_try_to_stop_firmware() 5878 if (ha->isp_ops->chip_diag(vha) != QLA_SUCCESS) qla2x00_try_to_stop_firmware() 5894 struct qla_hw_data *ha = vha->hw; qla24xx_configure_vhba() local 5895 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); qla24xx_configure_vhba() 5903 if (ha->flags.cpu_affinity_enabled) qla24xx_configure_vhba() 5904 req = ha->req_q_map[0]; qla24xx_configure_vhba() 5917 rval2 = ha->isp_ops->fabric_login(vha, NPH_SNS, 0xff, 0xff, 0xfc, mb, qla24xx_configure_vhba() 5950 struct qla_hw_data *ha = vha->hw; qla84xx_get_chip() local 5956 if (cs84xx->bus == ha->pdev->bus) { qla84xx_get_chip() 5969 cs84xx->bus = ha->pdev->bus; qla84xx_get_chip() 5992 struct qla_hw_data *ha = vha->hw; qla84xx_put_chip() local 5993 if (ha->cs84xx) qla84xx_put_chip() 5994 kref_put(&ha->cs84xx->kref, __qla84xx_chip_release); qla84xx_put_chip() 6002 struct qla_hw_data *ha = vha->hw; qla84xx_init_chip() local 6004 mutex_lock(&ha->cs84xx->fw_update_mutex); qla84xx_init_chip() 6008 mutex_unlock(&ha->cs84xx->fw_update_mutex); qla84xx_init_chip() 6026 struct qla_hw_data *ha = vha->hw; qla81xx_nvram_config() local 6029 icb = (struct init_cb_81xx *)ha->init_cb; qla81xx_nvram_config() 6030 nv = ha->nvram; qla81xx_nvram_config() 6033 ha->nvram_size = sizeof(struct nvram_81xx); qla81xx_nvram_config() 6034 ha->vpd_size = FA_NVRAM_VPD_SIZE; qla81xx_nvram_config() 6035 if (IS_P3P_TYPE(ha) || IS_QLA8031(ha)) qla81xx_nvram_config() 6036 ha->vpd_size = FA_VPD_SIZE_82XX; qla81xx_nvram_config() 6039 ha->vpd = ha->nvram + VPD_OFFSET; qla81xx_nvram_config() 6040 ha->isp_ops->read_optrom(vha, ha->vpd, ha->flt_region_vpd << 2, qla81xx_nvram_config() 6041 ha->vpd_size); qla81xx_nvram_config() 6044 ha->isp_ops->read_optrom(vha, ha->nvram, ha->flt_region_nvram << 2, qla81xx_nvram_config() 6045 ha->nvram_size); qla81xx_nvram_config() 6047 for (cnt = 0, chksum = 0; cnt < ha->nvram_size >> 2; cnt++) qla81xx_nvram_config() 6053 (uint8_t *)nv, ha->nvram_size); qla81xx_nvram_config() 6071 memset(nv, 0, ha->nvram_size); qla81xx_nvram_config() 6078 nv->port_name[1] = 0x00 + ha->port_no + 1; qla81xx_nvram_config() 6112 nv->enode_mac[5] = 0x06 + ha->port_no + 1; qla81xx_nvram_config() 6117 if (IS_T10_PI_CAPABLE(ha)) qla81xx_nvram_config() 6123 memset(icb, 0, ha->init_cb_size); qla81xx_nvram_config() 6150 icb->enode_mac[5] = 0x06 + ha->port_no + 1; qla81xx_nvram_config() 6154 memcpy(ha->ex_init_cb, &nv->ex_version, sizeof(*ha->ex_init_cb)); qla81xx_nvram_config() 6181 ha->flags.disable_risc_code_load = 0; qla81xx_nvram_config() 6182 ha->flags.enable_lip_reset = 0; qla81xx_nvram_config() 6183 ha->flags.enable_lip_full_login = qla81xx_nvram_config() 6185 ha->flags.enable_target_reset = qla81xx_nvram_config() 6187 ha->flags.enable_led_scheme = 0; qla81xx_nvram_config() 6188 ha->flags.disable_serdes = le32_to_cpu(nv->host_p) & BIT_5 ? 1: 0; qla81xx_nvram_config() 6190 ha->operating_mode = (le32_to_cpu(icb->firmware_options_2) & qla81xx_nvram_config() 6194 ha->serial0 = icb->port_name[5]; qla81xx_nvram_config() 6195 ha->serial1 = icb->port_name[6]; qla81xx_nvram_config() 6196 ha->serial2 = icb->port_name[7]; qla81xx_nvram_config() 6202 ha->retry_count = le16_to_cpu(nv->login_retry_count); qla81xx_nvram_config() 6209 ha->login_timeout = le16_to_cpu(nv->login_timeout); qla81xx_nvram_config() 6213 ha->r_a_tov = 100; qla81xx_nvram_config() 6215 ha->loop_reset_delay = nv->reset_delay; qla81xx_nvram_config() 6228 ha->loop_down_abort_time = qla81xx_nvram_config() 6231 ha->link_down_timeout = le16_to_cpu(nv->link_down_timeout); qla81xx_nvram_config() 6232 ha->loop_down_abort_time = qla81xx_nvram_config() 6233 (LOOP_DOWN_TIME - ha->link_down_timeout); qla81xx_nvram_config() 6237 ha->port_down_retry_count = le16_to_cpu(nv->port_down_retry_count); qla81xx_nvram_config() 6239 ha->port_down_retry_count = qlport_down_retry; qla81xx_nvram_config() 6242 ha->login_retry_count = le16_to_cpu(nv->login_retry_count); qla81xx_nvram_config() 6243 if (ha->port_down_retry_count == qla81xx_nvram_config() 6245 ha->port_down_retry_count > 3) qla81xx_nvram_config() 6246 ha->login_retry_count = ha->port_down_retry_count; qla81xx_nvram_config() 6247 else if (ha->port_down_retry_count > (int)ha->login_retry_count) qla81xx_nvram_config() 6248 ha->login_retry_count = ha->port_down_retry_count; qla81xx_nvram_config() 6250 ha->login_retry_count = ql2xloginretrycount; qla81xx_nvram_config() 6253 if (!vha->hw->flags.msix_enabled && (IS_QLA83XX(ha) || IS_QLA27XX(ha))) qla81xx_nvram_config() 6258 ha->zio_mode = le32_to_cpu(icb->firmware_options_2) & qla81xx_nvram_config() 6260 ha->zio_timer = le16_to_cpu(icb->interrupt_delay_timer) ? qla81xx_nvram_config() 6266 if (ha->zio_mode != QLA_ZIO_DISABLED) { qla81xx_nvram_config() 6267 ha->zio_mode = QLA_ZIO_MODE_6; qla81xx_nvram_config() 6271 ha->zio_mode, qla81xx_nvram_config() 6272 ha->zio_timer * 100); qla81xx_nvram_config() 6275 (uint32_t)ha->zio_mode); qla81xx_nvram_config() 6276 icb->interrupt_delay_timer = cpu_to_le16(ha->zio_timer); qla81xx_nvram_config() 6291 struct qla_hw_data *ha = vha->hw; qla82xx_restart_isp() local 6292 struct req_que *req = ha->req_q_map[0]; qla82xx_restart_isp() 6293 struct rsp_que *rsp = ha->rsp_q_map[0]; qla82xx_restart_isp() 6300 ha->flags.chip_reset_done = 1; qla82xx_restart_isp() 6326 ha->isp_ops->enable_intrs(ha); qla82xx_restart_isp() 6328 ha->isp_abort_cnt = 0; qla82xx_restart_isp() 6334 if (ha->fce) { qla82xx_restart_isp() 6335 ha->flags.fce_enabled = 1; qla82xx_restart_isp() 6336 memset(ha->fce, 0, qla82xx_restart_isp() 6337 fce_calc_size(ha->fce_bufs)); qla82xx_restart_isp() 6339 ha->fce_dma, ha->fce_bufs, ha->fce_mb, qla82xx_restart_isp() 6340 &ha->fce_bufs); qla82xx_restart_isp() 6345 ha->flags.fce_enabled = 0; qla82xx_restart_isp() 6349 if (ha->eft) { qla82xx_restart_isp() 6350 memset(ha->eft, 0, EFT_SIZE); qla82xx_restart_isp() 6352 ha->eft_dma, EFT_NUM_BUFFERS); qla82xx_restart_isp() 6365 spin_lock_irqsave(&ha->vport_slock, flags); qla82xx_restart_isp() 6366 list_for_each_entry(vp, &ha->vp_list, list) { qla82xx_restart_isp() 6369 spin_unlock_irqrestore(&ha->vport_slock, flags); qla82xx_restart_isp() 6373 spin_lock_irqsave(&ha->vport_slock, flags); qla82xx_restart_isp() 6377 spin_unlock_irqrestore(&ha->vport_slock, flags); qla82xx_restart_isp() 6390 struct qla_hw_data *ha = vha->hw; qla81xx_update_fw_options() local 6396 memset(ha->fw_options, 0, sizeof(ha->fw_options)); qla81xx_update_fw_options() 6397 ha->fw_options[2] |= BIT_9; qla81xx_update_fw_options() 6398 qla2x00_set_fw_options(vha, ha->fw_options); qla81xx_update_fw_options() 6428 struct qla_hw_data *ha = vha->hw; qla24xx_get_fcp_prio() local 6430 if (!ha->fcp_prio_cfg || !ha->flags.fcp_prio_enabled) qla24xx_get_fcp_prio() 6434 entries = ha->fcp_prio_cfg->num_entries; qla24xx_get_fcp_prio() 6435 pri_entry = &ha->fcp_prio_cfg->entry[0]; qla24xx_get_fcp_prio() 6555 * ha = adapter block pointer.
H A D	qla_attr.c	26 struct qla_hw_data *ha = vha->hw; qla2x00_sysfs_read_fw_dump() local 29 if (!(ha->fw_dump_reading || ha->mctp_dump_reading)) qla2x00_sysfs_read_fw_dump() 32 if (IS_P3P_TYPE(ha)) { qla2x00_sysfs_read_fw_dump() 33 if (off < ha->md_template_size) { qla2x00_sysfs_read_fw_dump() 35 &off, ha->md_tmplt_hdr, ha->md_template_size); qla2x00_sysfs_read_fw_dump() 38 off -= ha->md_template_size; qla2x00_sysfs_read_fw_dump() 40 &off, ha->md_dump, ha->md_dump_size); qla2x00_sysfs_read_fw_dump() 42 } else if (ha->mctp_dumped && ha->mctp_dump_reading) qla2x00_sysfs_read_fw_dump() 43 return memory_read_from_buffer(buf, count, &off, ha->mctp_dump, qla2x00_sysfs_read_fw_dump() 45 else if (ha->fw_dump_reading) qla2x00_sysfs_read_fw_dump() 46 return memory_read_from_buffer(buf, count, &off, ha->fw_dump, qla2x00_sysfs_read_fw_dump() 47 ha->fw_dump_len); qla2x00_sysfs_read_fw_dump() 59 struct qla_hw_data *ha = vha->hw; qla2x00_sysfs_write_fw_dump() local 68 if (!ha->fw_dump_reading) qla2x00_sysfs_write_fw_dump() 74 if (IS_P3P_TYPE(ha)) { qla2x00_sysfs_write_fw_dump() 78 ha->fw_dump_reading = 0; qla2x00_sysfs_write_fw_dump() 79 ha->fw_dumped = 0; qla2x00_sysfs_write_fw_dump() 82 if (ha->fw_dumped && !ha->fw_dump_reading) { qla2x00_sysfs_write_fw_dump() 83 ha->fw_dump_reading = 1; qla2x00_sysfs_write_fw_dump() 94 if (IS_QLA82XX(ha)) { qla2x00_sysfs_write_fw_dump() 95 qla82xx_idc_lock(ha); qla2x00_sysfs_write_fw_dump() 97 qla82xx_idc_unlock(ha); qla2x00_sysfs_write_fw_dump() 98 } else if (IS_QLA8044(ha)) { qla2x00_sysfs_write_fw_dump() 99 qla8044_idc_lock(ha); qla2x00_sysfs_write_fw_dump() 101 qla8044_idc_unlock(ha); qla2x00_sysfs_write_fw_dump() 106 if (IS_P3P_TYPE(ha)) { qla2x00_sysfs_write_fw_dump() 107 if (ha->md_tmplt_hdr) qla2x00_sysfs_write_fw_dump() 116 if (IS_P3P_TYPE(ha)) qla2x00_sysfs_write_fw_dump() 120 if (!ha->mctp_dump_reading) qla2x00_sysfs_write_fw_dump() 124 ha->mctp_dump_reading = 0; qla2x00_sysfs_write_fw_dump() 125 ha->mctp_dumped = 0; qla2x00_sysfs_write_fw_dump() 128 if (ha->mctp_dumped && !ha->mctp_dump_reading) { qla2x00_sysfs_write_fw_dump() 129 ha->mctp_dump_reading = 1; qla2x00_sysfs_write_fw_dump() 156 struct qla_hw_data *ha = vha->hw; qla2x00_sysfs_read_fw_dump_template() local 158 if (!ha->fw_dump_template || !ha->fw_dump_template_len) qla2x00_sysfs_read_fw_dump_template() 164 ha->fw_dump_template, ha->fw_dump_template_len); qla2x00_sysfs_read_fw_dump_template() 174 struct qla_hw_data *ha = vha->hw; qla2x00_sysfs_write_fw_dump_template() local 178 if (ha->fw_dump) qla2x00_sysfs_write_fw_dump_template() 179 vfree(ha->fw_dump); qla2x00_sysfs_write_fw_dump_template() 180 if (ha->fw_dump_template) qla2x00_sysfs_write_fw_dump_template() 181 vfree(ha->fw_dump_template); qla2x00_sysfs_write_fw_dump_template() 183 ha->fw_dump = NULL; qla2x00_sysfs_write_fw_dump_template() 184 ha->fw_dump_len = 0; qla2x00_sysfs_write_fw_dump_template() 185 ha->fw_dump_template = NULL; qla2x00_sysfs_write_fw_dump_template() 186 ha->fw_dump_template_len = 0; qla2x00_sysfs_write_fw_dump_template() 191 ha->fw_dump_template = vmalloc(size); qla2x00_sysfs_write_fw_dump_template() 192 if (!ha->fw_dump_template) { qla2x00_sysfs_write_fw_dump_template() 197 ha->fw_dump_template_len = size; qla2x00_sysfs_write_fw_dump_template() 200 if (off + count > ha->fw_dump_template_len) { qla2x00_sysfs_write_fw_dump_template() 201 count = ha->fw_dump_template_len - off; qla2x00_sysfs_write_fw_dump_template() 208 memcpy(ha->fw_dump_template + off, buf, count); qla2x00_sysfs_write_fw_dump_template() 210 if (off + count == ha->fw_dump_template_len) { qla2x00_sysfs_write_fw_dump_template() 214 ha->fw_dump = vmalloc(size); qla2x00_sysfs_write_fw_dump_template() 215 if (!ha->fw_dump) { qla2x00_sysfs_write_fw_dump_template() 220 ha->fw_dump_len = size; qla2x00_sysfs_write_fw_dump_template() 242 struct qla_hw_data *ha = vha->hw; qla2x00_sysfs_read_nvram() local 247 if (IS_NOCACHE_VPD_TYPE(ha)) qla2x00_sysfs_read_nvram() 248 ha->isp_ops->read_optrom(vha, ha->nvram, ha->flt_region_nvram << 2, qla2x00_sysfs_read_nvram() 249 ha->nvram_size); qla2x00_sysfs_read_nvram() 250 return memory_read_from_buffer(buf, count, &off, ha->nvram, qla2x00_sysfs_read_nvram() 251 ha->nvram_size); qla2x00_sysfs_read_nvram() 261 struct qla_hw_data *ha = vha->hw; qla2x00_sysfs_write_nvram() local 264 if (!capable(CAP_SYS_ADMIN) || off != 0 || count != ha->nvram_size || qla2x00_sysfs_write_nvram() 265 !ha->isp_ops->write_nvram) qla2x00_sysfs_write_nvram() 269 if (IS_FWI2_CAPABLE(ha)) { qla2x00_sysfs_write_nvram() 298 ha->isp_ops->write_nvram(vha, (uint8_t *)buf, ha->nvram_base, count); qla2x00_sysfs_write_nvram() 299 ha->isp_ops->read_nvram(vha, (uint8_t *)ha->nvram, ha->nvram_base, qla2x00_sysfs_write_nvram() 329 struct qla_hw_data *ha = vha->hw; qla2x00_sysfs_read_optrom() local 332 if (ha->optrom_state != QLA_SREADING) qla2x00_sysfs_read_optrom() 335 mutex_lock(&ha->optrom_mutex); qla2x00_sysfs_read_optrom() 336 rval = memory_read_from_buffer(buf, count, &off, ha->optrom_buffer, qla2x00_sysfs_read_optrom() 337 ha->optrom_region_size); qla2x00_sysfs_read_optrom() 338 mutex_unlock(&ha->optrom_mutex); qla2x00_sysfs_read_optrom() 350 struct qla_hw_data *ha = vha->hw; qla2x00_sysfs_write_optrom() local 352 if (ha->optrom_state != QLA_SWRITING) qla2x00_sysfs_write_optrom() 354 if (off > ha->optrom_region_size) qla2x00_sysfs_write_optrom() 356 if (off + count > ha->optrom_region_size) qla2x00_sysfs_write_optrom() 357 count = ha->optrom_region_size - off; qla2x00_sysfs_write_optrom() 359 mutex_lock(&ha->optrom_mutex); qla2x00_sysfs_write_optrom() 360 memcpy(&ha->optrom_buffer[off], buf, count); qla2x00_sysfs_write_optrom() 361 mutex_unlock(&ha->optrom_mutex); qla2x00_sysfs_write_optrom() 383 struct qla_hw_data *ha = vha->hw; qla2x00_sysfs_write_optrom_ctl() local 385 uint32_t size = ha->optrom_size; qla2x00_sysfs_write_optrom_ctl() 392 if (unlikely(pci_channel_offline(ha->pdev))) qla2x00_sysfs_write_optrom_ctl() 397 if (start > ha->optrom_size) qla2x00_sysfs_write_optrom_ctl() 400 mutex_lock(&ha->optrom_mutex); qla2x00_sysfs_write_optrom_ctl() 403 if (ha->optrom_state != QLA_SREADING && qla2x00_sysfs_write_optrom_ctl() 404 ha->optrom_state != QLA_SWRITING) { qla2x00_sysfs_write_optrom_ctl() 408 ha->optrom_state = QLA_SWAITING; qla2x00_sysfs_write_optrom_ctl() 412 ha->optrom_region_size); qla2x00_sysfs_write_optrom_ctl() 414 vfree(ha->optrom_buffer); qla2x00_sysfs_write_optrom_ctl() 415 ha->optrom_buffer = NULL; qla2x00_sysfs_write_optrom_ctl() 418 if (ha->optrom_state != QLA_SWAITING) { qla2x00_sysfs_write_optrom_ctl() 423 ha->optrom_region_start = start; qla2x00_sysfs_write_optrom_ctl() 424 ha->optrom_region_size = start + size > ha->optrom_size ? qla2x00_sysfs_write_optrom_ctl() 425 ha->optrom_size - start : size; qla2x00_sysfs_write_optrom_ctl() 427 ha->optrom_state = QLA_SREADING; qla2x00_sysfs_write_optrom_ctl() 428 ha->optrom_buffer = vmalloc(ha->optrom_region_size); qla2x00_sysfs_write_optrom_ctl() 429 if (ha->optrom_buffer == NULL) { qla2x00_sysfs_write_optrom_ctl() 432 "(%x).\n", ha->optrom_region_size); qla2x00_sysfs_write_optrom_ctl() 434 ha->optrom_state = QLA_SWAITING; qla2x00_sysfs_write_optrom_ctl() 448 ha->optrom_region_start, ha->optrom_region_size); qla2x00_sysfs_write_optrom_ctl() 450 memset(ha->optrom_buffer, 0, ha->optrom_region_size); qla2x00_sysfs_write_optrom_ctl() 451 ha->isp_ops->read_optrom(vha, ha->optrom_buffer, qla2x00_sysfs_write_optrom_ctl() 452 ha->optrom_region_start, ha->optrom_region_size); qla2x00_sysfs_write_optrom_ctl() 455 if (ha->optrom_state != QLA_SWAITING) { qla2x00_sysfs_write_optrom_ctl() 481 if (ha->optrom_size == OPTROM_SIZE_2300 && start == 0) qla2x00_sysfs_write_optrom_ctl() 483 else if (start == (ha->flt_region_boot * 4) || qla2x00_sysfs_write_optrom_ctl() 484 start == (ha->flt_region_fw * 4)) qla2x00_sysfs_write_optrom_ctl() 486 else if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha) qla2x00_sysfs_write_optrom_ctl() 487 || IS_CNA_CAPABLE(ha) || IS_QLA2031(ha) qla2x00_sysfs_write_optrom_ctl() 488 || IS_QLA27XX(ha)) qla2x00_sysfs_write_optrom_ctl() 497 ha->optrom_region_start = start; qla2x00_sysfs_write_optrom_ctl() 498 ha->optrom_region_size = start + size > ha->optrom_size ? qla2x00_sysfs_write_optrom_ctl() 499 ha->optrom_size - start : size; qla2x00_sysfs_write_optrom_ctl() 501 ha->optrom_state = QLA_SWRITING; qla2x00_sysfs_write_optrom_ctl() 502 ha->optrom_buffer = vmalloc(ha->optrom_region_size); qla2x00_sysfs_write_optrom_ctl() 503 if (ha->optrom_buffer == NULL) { qla2x00_sysfs_write_optrom_ctl() 506 "(%x)\n", ha->optrom_region_size); qla2x00_sysfs_write_optrom_ctl() 508 ha->optrom_state = QLA_SWAITING; qla2x00_sysfs_write_optrom_ctl() 515 ha->optrom_region_start, ha->optrom_region_size); qla2x00_sysfs_write_optrom_ctl() 517 memset(ha->optrom_buffer, 0, ha->optrom_region_size); qla2x00_sysfs_write_optrom_ctl() 520 if (ha->optrom_state != QLA_SWRITING) { qla2x00_sysfs_write_optrom_ctl() 534 ha->optrom_region_start, ha->optrom_region_size); qla2x00_sysfs_write_optrom_ctl() 536 ha->isp_ops->write_optrom(vha, ha->optrom_buffer, qla2x00_sysfs_write_optrom_ctl() 537 ha->optrom_region_start, ha->optrom_region_size); qla2x00_sysfs_write_optrom_ctl() 544 mutex_unlock(&ha->optrom_mutex); qla2x00_sysfs_write_optrom_ctl() 564 struct qla_hw_data *ha = vha->hw; qla2x00_sysfs_read_vpd() local 566 if (unlikely(pci_channel_offline(ha->pdev))) qla2x00_sysfs_read_vpd() 572 if (IS_NOCACHE_VPD_TYPE(ha)) qla2x00_sysfs_read_vpd() 573 ha->isp_ops->read_optrom(vha, ha->vpd, ha->flt_region_vpd << 2, qla2x00_sysfs_read_vpd() 574 ha->vpd_size); qla2x00_sysfs_read_vpd() 575 return memory_read_from_buffer(buf, count, &off, ha->vpd, ha->vpd_size); qla2x00_sysfs_read_vpd() 585 struct qla_hw_data *ha = vha->hw; qla2x00_sysfs_write_vpd() local 588 if (unlikely(pci_channel_offline(ha->pdev))) qla2x00_sysfs_write_vpd() 591 if (!capable(CAP_SYS_ADMIN) || off != 0 || count != ha->vpd_size || qla2x00_sysfs_write_vpd() 592 !ha->isp_ops->write_nvram) qla2x00_sysfs_write_vpd() 602 ha->isp_ops->write_nvram(vha, (uint8_t *)buf, ha->vpd_base, count); qla2x00_sysfs_write_vpd() 603 ha->isp_ops->read_nvram(vha, (uint8_t *)ha->vpd, ha->vpd_base, count); qla2x00_sysfs_write_vpd() 606 if (!IS_FWI2_CAPABLE(ha)) qla2x00_sysfs_write_vpd() 615 ha->isp_ops->get_flash_version(vha, tmp_data); qla2x00_sysfs_write_vpd() 638 struct qla_hw_data *ha = vha->hw; qla2x00_sysfs_read_sfp() local 645 if (ha->sfp_data) qla2x00_sysfs_read_sfp() 648 ha->sfp_data = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, qla2x00_sysfs_read_sfp() 649 &ha->sfp_data_dma); qla2x00_sysfs_read_sfp() 650 if (!ha->sfp_data) { qla2x00_sysfs_read_sfp() 657 memset(ha->sfp_data, 0, SFP_BLOCK_SIZE); qla2x00_sysfs_read_sfp() 667 rval = qla2x00_read_sfp(vha, ha->sfp_data_dma, ha->sfp_data, qla2x00_sysfs_read_sfp() 676 memcpy(buf, ha->sfp_data, SFP_BLOCK_SIZE); qla2x00_sysfs_read_sfp() 699 struct qla_hw_data *ha = vha->hw; qla2x00_sysfs_write_reset() local 700 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); qla2x00_sysfs_write_reset() 714 if (IS_QLA82XX(ha)) { qla2x00_sysfs_write_reset() 715 ha->flags.isp82xx_no_md_cap = 1; qla2x00_sysfs_write_reset() 716 qla82xx_idc_lock(ha); qla2x00_sysfs_write_reset() 718 qla82xx_idc_unlock(ha); qla2x00_sysfs_write_reset() 719 } else if (IS_QLA8044(ha)) { qla2x00_sysfs_write_reset() 720 qla8044_idc_lock(ha); qla2x00_sysfs_write_reset() 721 idc_control = qla8044_rd_reg(ha, qla2x00_sysfs_write_reset() 723 qla8044_wr_reg(ha, QLA8044_IDC_DRV_CTRL, qla2x00_sysfs_write_reset() 726 qla8044_idc_unlock(ha); qla2x00_sysfs_write_reset() 735 if (!IS_QLA81XX(ha) && !IS_QLA83XX(ha)) qla2x00_sysfs_write_reset() 741 if (IS_QLA83XX(ha)) { qla2x00_sysfs_write_reset() 766 if (!IS_P3P_TYPE(ha) || vha != base_vha) { qla2x00_sysfs_write_reset() 779 if (!IS_QLA8031(ha)) qla2x00_sysfs_write_reset() 790 if (!IS_QLA8031(ha)) qla2x00_sysfs_write_reset() 810 ha->isp_ops->get_flash_version(vha, tmp_data); qla2x00_sysfs_write_reset() 833 struct qla_hw_data *ha = vha->hw; qla2x00_sysfs_read_xgmac_stats() local 840 if (ha->xgmac_data) qla2x00_sysfs_read_xgmac_stats() 843 ha->xgmac_data = dma_alloc_coherent(&ha->pdev->dev, XGMAC_DATA_SIZE, qla2x00_sysfs_read_xgmac_stats() 844 &ha->xgmac_data_dma, GFP_KERNEL); qla2x00_sysfs_read_xgmac_stats() 845 if (!ha->xgmac_data) { qla2x00_sysfs_read_xgmac_stats() 853 memset(ha->xgmac_data, 0, XGMAC_DATA_SIZE); qla2x00_sysfs_read_xgmac_stats() 855 rval = qla2x00_get_xgmac_stats(vha, ha->xgmac_data_dma, qla2x00_sysfs_read_xgmac_stats() 864 memcpy(buf, ha->xgmac_data, count); qla2x00_sysfs_read_xgmac_stats() 885 struct qla_hw_data *ha = vha->hw; qla2x00_sysfs_read_dcbx_tlv() local 892 if (ha->dcbx_tlv) qla2x00_sysfs_read_dcbx_tlv() 895 ha->dcbx_tlv = dma_alloc_coherent(&ha->pdev->dev, DCBX_TLV_DATA_SIZE, qla2x00_sysfs_read_dcbx_tlv() 896 &ha->dcbx_tlv_dma, GFP_KERNEL); qla2x00_sysfs_read_dcbx_tlv() 897 if (!ha->dcbx_tlv) { qla2x00_sysfs_read_dcbx_tlv() 905 memset(ha->dcbx_tlv, 0, DCBX_TLV_DATA_SIZE); qla2x00_sysfs_read_dcbx_tlv() 907 rval = qla2x00_get_dcbx_params(vha, ha->dcbx_tlv_dma, qla2x00_sysfs_read_dcbx_tlv() 915 memcpy(buf, ha->dcbx_tlv, count); qla2x00_sysfs_read_dcbx_tlv() 982 struct qla_hw_data *ha = vha->hw; qla2x00_free_sysfs_attr() local 985 if (iter->is4GBp_only && !IS_FWI2_CAPABLE(ha)) qla2x00_free_sysfs_attr() 987 if (iter->is4GBp_only == 2 && !IS_QLA25XX(ha)) qla2x00_free_sysfs_attr() 998 if (stop_beacon && ha->beacon_blink_led == 1) qla2x00_free_sysfs_attr() 999 ha->isp_ops->beacon_off(vha); qla2x00_free_sysfs_attr() 1016 struct qla_hw_data *ha = vha->hw; qla2x00_fw_version_show() local 1020 ha->isp_ops->fw_version_str(vha, fw_str, sizeof(fw_str))); qla2x00_fw_version_show() 1028 struct qla_hw_data *ha = vha->hw; qla2x00_serial_num_show() local 1034 } else if (IS_FWI2_CAPABLE(ha)) { qla2x00_serial_num_show() 1039 sn = ((ha->serial0 & 0x1f) << 16) | (ha->serial2 << 8) | ha->serial1; qla2x00_serial_num_show() 1057 struct qla_hw_data *ha = vha->hw; qla2x00_isp_id_show() local 1064 ha->product_id[0], ha->product_id[1], ha->product_id[2], qla2x00_isp_id_show() 1065 ha->product_id[3]); qla2x00_isp_id_show() 1102 struct qla_hw_data *ha = vha->hw; qla2x00_link_state_show() local 1115 switch (ha->current_topology) { qla2x00_link_state_show() 1160 struct qla_hw_data *ha = vha->hw; qla2x00_zio_store() local 1164 if (!IS_ZIO_SUPPORTED(ha)) qla2x00_zio_store() 1176 if (zio_mode != QLA_ZIO_DISABLED || ha->zio_mode != QLA_ZIO_DISABLED) { qla2x00_zio_store() 1177 ha->zio_mode = zio_mode; qla2x00_zio_store() 1230 struct qla_hw_data *ha = vha->hw; qla2x00_beacon_store() local 1234 if (IS_QLA2100(ha) || IS_QLA2200(ha)) qla2x00_beacon_store() 1247 rval = ha->isp_ops->beacon_on(vha); qla2x00_beacon_store() 1249 rval = ha->isp_ops->beacon_off(vha); qla2x00_beacon_store() 1262 struct qla_hw_data *ha = vha->hw; qla2x00_optrom_bios_version_show() local 1263 return scnprintf(buf, PAGE_SIZE, "%d.%02d\n", ha->bios_revision[1], qla2x00_optrom_bios_version_show() 1264 ha->bios_revision[0]); qla2x00_optrom_bios_version_show() 1272 struct qla_hw_data *ha = vha->hw; qla2x00_optrom_efi_version_show() local 1273 return scnprintf(buf, PAGE_SIZE, "%d.%02d\n", ha->efi_revision[1], qla2x00_optrom_efi_version_show() 1274 ha->efi_revision[0]); qla2x00_optrom_efi_version_show() 1282 struct qla_hw_data *ha = vha->hw; qla2x00_optrom_fcode_version_show() local 1283 return scnprintf(buf, PAGE_SIZE, "%d.%02d\n", ha->fcode_revision[1], qla2x00_optrom_fcode_version_show() 1284 ha->fcode_revision[0]); qla2x00_optrom_fcode_version_show() 1292 struct qla_hw_data *ha = vha->hw; qla2x00_optrom_fw_version_show() local 1294 ha->fw_revision[0], ha->fw_revision[1], ha->fw_revision[2], qla2x00_optrom_fw_version_show() 1295 ha->fw_revision[3]); qla2x00_optrom_fw_version_show() 1303 struct qla_hw_data *ha = vha->hw; qla2x00_optrom_gold_fw_version_show() local 1305 if (!IS_QLA81XX(ha) && !IS_QLA83XX(ha) && !IS_QLA27XX(ha)) qla2x00_optrom_gold_fw_version_show() 1309 ha->gold_fw_version[0], ha->gold_fw_version[1], qla2x00_optrom_gold_fw_version_show() 1310 ha->gold_fw_version[2], ha->gold_fw_version[3]); qla2x00_optrom_gold_fw_version_show() 1329 struct qla_hw_data *ha = vha->hw; qla24xx_84xx_fw_version_show() local 1331 if (!IS_QLA84XX(ha)) qla24xx_84xx_fw_version_show() 1334 if (ha->cs84xx->op_fw_version == 0) qla24xx_84xx_fw_version_show() 1339 (uint32_t)ha->cs84xx->op_fw_version); qla24xx_84xx_fw_version_show() 1349 struct qla_hw_data *ha = vha->hw; qla2x00_mpi_version_show() local 1351 if (!IS_QLA81XX(ha) && !IS_QLA8031(ha) && !IS_QLA8044(ha)) qla2x00_mpi_version_show() 1355 ha->mpi_version[0], ha->mpi_version[1], ha->mpi_version[2], qla2x00_mpi_version_show() 1356 ha->mpi_capabilities); qla2x00_mpi_version_show() 1364 struct qla_hw_data *ha = vha->hw; qla2x00_phy_version_show() local 1366 if (!IS_QLA81XX(ha) && !IS_QLA8031(ha)) qla2x00_phy_version_show() 1370 ha->phy_version[0], ha->phy_version[1], ha->phy_version[2]); qla2x00_phy_version_show() 1378 struct qla_hw_data *ha = vha->hw; qla2x00_flash_block_size_show() local 1380 return scnprintf(buf, PAGE_SIZE, "0x%x\n", ha->fdt_block_size); qla2x00_flash_block_size_show() 1496 struct qla_hw_data *ha = vha->hw; qla2x00_fw_dump_size_show() local 1499 if (!ha->fw_dumped) qla2x00_fw_dump_size_show() 1501 else if (IS_P3P_TYPE(ha)) qla2x00_fw_dump_size_show() 1502 size = ha->md_template_size + ha->md_dump_size; qla2x00_fw_dump_size_show() 1504 size = ha->fw_dump_len; qla2x00_fw_dump_size_show() 1634 struct qla_hw_data *ha = ((struct scsi_qla_host *) qla2x00_get_host_speed() local 1638 if (IS_QLAFX00(ha)) { qla2x00_get_host_speed() 1643 switch (ha->link_data_rate) { qla2x00_get_host_speed() 1840 struct qla_hw_data *ha = vha->hw; qla2x00_get_fc_host_stats() local 1841 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); qla2x00_get_fc_host_stats() 1856 if (unlikely(pci_channel_offline(ha->pdev))) qla2x00_get_fc_host_stats() 1862 stats = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &stats_dma); qla2x00_get_fc_host_stats() 1871 if (IS_FWI2_CAPABLE(ha)) { qla2x00_get_fc_host_stats() 1874 !ha->dpc_active) { qla2x00_get_fc_host_stats() 1889 if (IS_FWI2_CAPABLE(ha)) { qla2x00_get_fc_host_stats() 1910 dma_pool_free(ha->s_dma_pool, stats, stats_dma); qla2x00_get_fc_host_stats() 1996 struct qla_hw_data *ha = base_vha->hw; qla24xx_vport_create() local 1999 struct req_que *req = ha->req_q_map[0]; qla24xx_vport_create() 2027 /* Check if physical ha port is Up */ qla24xx_vport_create() 2038 if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) { qla24xx_vport_create() 2039 if (ha->fw_attributes & BIT_4) { qla24xx_vport_create() 2056 if (IS_PI_IPGUARD_CAPABLE(ha) && qla24xx_vport_create() 2057 (ql2xenabledif > 1 || IS_PI_DIFB_DIX0_CAPABLE(ha))) qla24xx_vport_create() 2066 &ha->pdev->dev)) { qla24xx_vport_create() 2073 fc_host_dev_loss_tmo(vha->host) = ha->port_down_retry_count; qla24xx_vport_create() 2081 qlt_vport_create(vha, ha); qla24xx_vport_create() 2084 if (ha->flags.cpu_affinity_enabled) { qla24xx_vport_create() 2085 req = ha->req_q_map[1]; qla24xx_vport_create() 2089 req, vha->vp_idx, ha->flags.cpu_affinity_enabled); qla24xx_vport_create() 2091 } else if (ql2xmaxqueues == 1 || !ha->npiv_info) qla24xx_vport_create() 2094 for (cnt = 0; cnt < ha->nvram_npiv_size; cnt++) { qla24xx_vport_create() 2095 if (memcmp(ha->npiv_info[cnt].port_name, vha->port_name, 8) == 0 qla24xx_vport_create() 2096 && memcmp(ha->npiv_info[cnt].node_name, vha->node_name, qla24xx_vport_create() 2098 qos = ha->npiv_info[cnt].q_qos; qla24xx_vport_create() 2104 ret = qla25xx_create_req_que(ha, options, vha->vp_idx, 0, 0, qla24xx_vport_create() 2117 req = ha->req_q_map[ret]; qla24xx_vport_create() 2136 struct qla_hw_data *ha = vha->hw; qla24xx_vport_delete() local 2147 qlt_remove_target(ha, vha); qla24xx_vport_delete() 2166 mutex_lock(&ha->vport_lock); qla24xx_vport_delete() 2167 ha->cur_vport_count--; qla24xx_vport_delete() 2168 clear_bit(vha->vp_idx, ha->vp_idx_map); qla24xx_vport_delete() 2169 mutex_unlock(&ha->vport_lock); qla24xx_vport_delete() 2171 if (vha->req->id && !ha->flags.cpu_affinity_enabled) { qla24xx_vport_delete() 2290 struct qla_hw_data *ha = vha->hw; qla2x00_init_host_attr() local 2293 fc_host_dev_loss_tmo(vha->host) = ha->port_down_retry_count; qla2x00_init_host_attr() 2296 fc_host_supported_classes(vha->host) = ha->tgt.enable_class_2 ? qla2x00_init_host_attr() 2298 fc_host_max_npiv_vports(vha->host) = ha->max_npiv_vports; qla2x00_init_host_attr() 2299 fc_host_npiv_vports_inuse(vha->host) = ha->cur_vport_count; qla2x00_init_host_attr() 2301 if (IS_CNA_CAPABLE(ha)) qla2x00_init_host_attr() 2303 else if (IS_QLA2031(ha)) qla2x00_init_host_attr() 2306 else if (IS_QLA25XX(ha)) qla2x00_init_host_attr() 2309 else if (IS_QLA24XX_TYPE(ha)) qla2x00_init_host_attr() 2312 else if (IS_QLA23XX(ha)) qla2x00_init_host_attr() 2314 else if (IS_QLAFX00(ha)) qla2x00_init_host_attr() 2317 else if (IS_QLA27XX(ha)) qla2x00_init_host_attr()
H A D	qla_mr.c	23 * ha = adapter block pointer. 52 struct qla_hw_data *ha = vha->hw; qlafx00_mailbox_command() local 53 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev); qlafx00_mailbox_command() 55 if (ha->pdev->error_state > pci_channel_io_frozen) { qlafx00_mailbox_command() 68 reg = ha->iobase; qlafx00_mailbox_command() 74 if (ha->flags.pci_channel_io_perm_failure) { qlafx00_mailbox_command() 80 if (ha->flags.isp82xx_fw_hung) { qlafx00_mailbox_command() 84 "FW hung = %d.\n", ha->flags.isp82xx_fw_hung); qlafx00_mailbox_command() 94 if (!wait_for_completion_timeout(&ha->mbx_cmd_comp, mcp->tov * HZ)) { qlafx00_mailbox_command() 102 ha->flags.mbox_busy = 1; qlafx00_mailbox_command() 104 ha->mcp32 = mcp; qlafx00_mailbox_command() 109 spin_lock_irqsave(&ha->hardware_lock, flags); qlafx00_mailbox_command() 118 for (cnt = 0; cnt < ha->mbx_count; cnt++) { qlafx00_mailbox_command() 128 ha->flags.mbox_int = 0; qlafx00_mailbox_command() 129 clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags); qlafx00_mailbox_command() 144 if ((!abort_active && io_lock_on) || IS_NOPOLLING_TYPE(ha)) { qlafx00_mailbox_command() 145 set_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags); qlafx00_mailbox_command() 147 QLAFX00_SET_HST_INTR(ha, ha->mbx_intr_code); qlafx00_mailbox_command() 148 spin_unlock_irqrestore(&ha->hardware_lock, flags); qlafx00_mailbox_command() 150 wait_for_completion_timeout(&ha->mbx_intr_comp, mcp->tov * HZ); qlafx00_mailbox_command() 155 QLAFX00_SET_HST_INTR(ha, ha->mbx_intr_code); qlafx00_mailbox_command() 156 spin_unlock_irqrestore(&ha->hardware_lock, flags); qlafx00_mailbox_command() 159 while (!ha->flags.mbox_int) { qlafx00_mailbox_command() 164 qla2x00_poll(ha->rsp_q_map[0]); qlafx00_mailbox_command() 166 if (!ha->flags.mbox_int && qlafx00_mailbox_command() 167 !(IS_QLA2200(ha) && qlafx00_mailbox_command() 177 if (ha->flags.mbox_int) { qlafx00_mailbox_command() 184 ha->flags.mbox_int = 0; qlafx00_mailbox_command() 185 clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags); qlafx00_mailbox_command() 187 if (ha->mailbox_out32[0] != MBS_COMMAND_COMPLETE) qlafx00_mailbox_command() 192 iptr = (uint32_t *)&ha->mailbox_out32[0]; qlafx00_mailbox_command() 194 for (cnt = 0; cnt < ha->mbx_count; cnt++) { qlafx00_mailbox_command() 207 ha->flags.mbox_busy = 0; qlafx00_mailbox_command() 210 ha->mcp32 = NULL; qlafx00_mailbox_command() 212 if ((abort_active || !io_lock_on) && !IS_NOPOLLING_TYPE(ha)) { qlafx00_mailbox_command() 217 qla2x00_poll(ha->rsp_q_map[0]); qlafx00_mailbox_command() 223 ha->flags.eeh_busy) { qlafx00_mailbox_command() 236 ha->flags.eeh_busy); qlafx00_mailbox_command() 256 if (ha->isp_ops->abort_isp(vha)) { qlafx00_mailbox_command() 270 complete(&ha->mbx_cmd_comp); qlafx00_mailbox_command() 289 * ha = adapter block pointer. 333 * ha = adapter block pointer. 378 * ha = adapter block pointer. 396 struct qla_hw_data *ha = vha->hw; qlafx00_init_firmware() local 404 mcp->mb[2] = MSD(ha->init_cb_dma); qlafx00_init_firmware() 405 mcp->mb[3] = LSD(ha->init_cb_dma); qlafx00_init_firmware() 491 * @ha: HA context 499 struct qla_hw_data *ha = vha->hw; qlafx00_pci_config() local 501 pci_set_master(ha->pdev); qlafx00_pci_config() 502 pci_try_set_mwi(ha->pdev); qlafx00_pci_config() 504 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); qlafx00_pci_config() 507 pci_write_config_word(ha->pdev, PCI_COMMAND, w); qlafx00_pci_config() 510 if (pci_is_pcie(ha->pdev)) qlafx00_pci_config() 511 pcie_set_readrq(ha->pdev, 2048); qlafx00_pci_config() 513 ha->chip_revision = ha->pdev->revision; qlafx00_pci_config() 520 * @ha: HA context 527 struct qla_hw_data *ha = vha->hw; qlafx00_soc_cpu_reset() local 532 spin_lock_irqsave(&ha->hardware_lock, flags); qlafx00_soc_cpu_reset() 534 QLAFX00_SET_HBA_SOC_REG(ha, 0x80004, 0); qlafx00_soc_cpu_reset() 535 QLAFX00_SET_HBA_SOC_REG(ha, 0x82004, 0); qlafx00_soc_cpu_reset() 538 QLAFX00_SET_HBA_SOC_REG(ha, 0x60920, 0x02); qlafx00_soc_cpu_reset() 539 QLAFX00_SET_HBA_SOC_REG(ha, 0x60924, 0x02); qlafx00_soc_cpu_reset() 540 QLAFX00_SET_HBA_SOC_REG(ha, 0xf0920, 0x02); qlafx00_soc_cpu_reset() 541 QLAFX00_SET_HBA_SOC_REG(ha, 0xf0924, 0x02); qlafx00_soc_cpu_reset() 544 reg_val = QLAFX00_GET_HBA_SOC_REG(ha, 0x60840); qlafx00_soc_cpu_reset() 546 QLAFX00_SET_HBA_SOC_REG(ha, 0x60840, reg_val); qlafx00_soc_cpu_reset() 548 reg_val = QLAFX00_GET_HBA_SOC_REG(ha, 0x60844); qlafx00_soc_cpu_reset() 550 QLAFX00_SET_HBA_SOC_REG(ha, 0x60844, reg_val); qlafx00_soc_cpu_reset() 552 reg_val = QLAFX00_GET_HBA_SOC_REG(ha, 0x60848); qlafx00_soc_cpu_reset() 554 QLAFX00_SET_HBA_SOC_REG(ha, 0x60848, reg_val); qlafx00_soc_cpu_reset() 556 reg_val = QLAFX00_GET_HBA_SOC_REG(ha, 0x6084C); qlafx00_soc_cpu_reset() 558 QLAFX00_SET_HBA_SOC_REG(ha, 0x6084C, reg_val); qlafx00_soc_cpu_reset() 561 if ((QLAFX00_GET_HBA_SOC_REG(ha, 0xd0000) & 0x10000000) == 0 && qlafx00_soc_cpu_reset() 562 (QLAFX00_GET_HBA_SOC_REG(ha, 0x10600) & 0x1) == 0) qlafx00_soc_cpu_reset() 569 QLAFX00_SET_HBA_SOC_REG(ha, qlafx00_soc_cpu_reset() 571 QLAFX00_SET_HBA_SOC_REG(ha, qlafx00_soc_cpu_reset() 576 QLAFX00_SET_HBA_SOC_REG(ha, SOC_FABRIC_RST_CONTROL_REG, (0x011f0101)); qlafx00_soc_cpu_reset() 579 QLAFX00_SET_HBA_SOC_REG(ha, 0x10610, 1); qlafx00_soc_cpu_reset() 580 QLAFX00_SET_HBA_SOC_REG(ha, 0x10600, 0); qlafx00_soc_cpu_reset() 584 QLAFX00_SET_HBA_SOC_REG(ha, qlafx00_soc_cpu_reset() 590 QLAFX00_SET_HBA_SOC_REG(ha, qlafx00_soc_cpu_reset() 597 QLAFX00_SET_HBA_SOC_REG(ha, qlafx00_soc_cpu_reset() 602 QLAFX00_SET_HBA_SOC_REG(ha, qlafx00_soc_cpu_reset() 606 QLAFX00_SET_HBA_SOC_REG(ha, SOC_FABRIC_CONTROL_REG, (0x2)); qlafx00_soc_cpu_reset() 607 QLAFX00_SET_HBA_SOC_REG(ha, SOC_FABRIC_CONFIG_REG, (0x3)); qlafx00_soc_cpu_reset() 610 QLAFX00_SET_HBA_SOC_REG(ha, SOC_FABRIC_RST_CONTROL_REG, (0x0)); qlafx00_soc_cpu_reset() 613 QLAFX00_SET_HBA_SOC_REG(ha, SOC_SW_RST_CONTROL_REG_CORE0, (0xF00)); qlafx00_soc_cpu_reset() 615 spin_unlock_irqrestore(&ha->hardware_lock, flags); qlafx00_soc_cpu_reset() 626 * @ha: HA context 633 struct qla_hw_data *ha = vha->hw; qlafx00_soft_reset() local 635 if (unlikely(pci_channel_offline(ha->pdev) && qlafx00_soft_reset() 636 ha->flags.pci_channel_io_perm_failure)) qlafx00_soft_reset() 639 ha->isp_ops->disable_intrs(ha); qlafx00_soft_reset() 645 * @ha: HA context 653 struct qla_hw_data *ha = vha->hw; qlafx00_chip_diag() local 654 struct req_que *req = ha->req_q_map[0]; qlafx00_chip_diag() 656 ha->fw_transfer_size = REQUEST_ENTRY_SIZE * req->length; qlafx00_chip_diag() 672 struct qla_hw_data *ha = vha->hw; qlafx00_config_rings() local 673 struct device_reg_fx00 __iomem *reg = &ha->iobase->ispfx00; qlafx00_config_rings() 688 struct qla_hw_data *ha = vha->hw; qlafx00_pci_info_str() local 690 if (pci_is_pcie(ha->pdev)) { qlafx00_pci_info_str() 700 struct qla_hw_data *ha = vha->hw; qlafx00_fw_version_str() local 702 snprintf(str, size, "%s", ha->mr.fw_version); qlafx00_fw_version_str() 707 qlafx00_enable_intrs(struct qla_hw_data *ha) qlafx00_enable_intrs() argument 711 spin_lock_irqsave(&ha->hardware_lock, flags); qlafx00_enable_intrs() 712 ha->interrupts_on = 1; qlafx00_enable_intrs() 713 QLAFX00_ENABLE_ICNTRL_REG(ha); qlafx00_enable_intrs() 714 spin_unlock_irqrestore(&ha->hardware_lock, flags); qlafx00_enable_intrs() 718 qlafx00_disable_intrs(struct qla_hw_data *ha) qlafx00_disable_intrs() argument 722 spin_lock_irqsave(&ha->hardware_lock, flags); qlafx00_disable_intrs() 723 ha->interrupts_on = 0; qlafx00_disable_intrs() 724 QLAFX00_DISABLE_ICNTRL_REG(ha); qlafx00_disable_intrs() 725 spin_unlock_irqrestore(&ha->hardware_lock, flags); qlafx00_disable_intrs() 745 struct qla_hw_data *ha = vha->hw; qlafx00_loop_reset() local 752 ret = ha->isp_ops->target_reset(fcport, 0, 0); qlafx00_loop_reset() 764 qlafx00_iospace_config(struct qla_hw_data *ha) qlafx00_iospace_config() argument 766 if (pci_request_selected_regions(ha->pdev, ha->bars, qlafx00_iospace_config() 768 ql_log_pci(ql_log_fatal, ha->pdev, 0x014e, qlafx00_iospace_config() 770 pci_name(ha->pdev)); qlafx00_iospace_config() 775 if (!(pci_resource_flags(ha->pdev, 0) & IORESOURCE_MEM)) { qlafx00_iospace_config() 776 ql_log_pci(ql_log_warn, ha->pdev, 0x014f, qlafx00_iospace_config() 778 pci_name(ha->pdev)); qlafx00_iospace_config() 781 if (pci_resource_len(ha->pdev, 0) < BAR0_LEN_FX00) { qlafx00_iospace_config() 782 ql_log_pci(ql_log_warn, ha->pdev, 0x0127, qlafx00_iospace_config() 784 pci_name(ha->pdev)); qlafx00_iospace_config() 788 ha->cregbase = qlafx00_iospace_config() 789 ioremap_nocache(pci_resource_start(ha->pdev, 0), BAR0_LEN_FX00); qlafx00_iospace_config() 790 if (!ha->cregbase) { qlafx00_iospace_config() 791 ql_log_pci(ql_log_fatal, ha->pdev, 0x0128, qlafx00_iospace_config() 792 "cannot remap MMIO (%s), aborting\n", pci_name(ha->pdev)); qlafx00_iospace_config() 796 if (!(pci_resource_flags(ha->pdev, 2) & IORESOURCE_MEM)) { qlafx00_iospace_config() 797 ql_log_pci(ql_log_warn, ha->pdev, 0x0129, qlafx00_iospace_config() 799 pci_name(ha->pdev)); qlafx00_iospace_config() 802 if (pci_resource_len(ha->pdev, 2) < BAR2_LEN_FX00) { qlafx00_iospace_config() 803 ql_log_pci(ql_log_warn, ha->pdev, 0x012a, qlafx00_iospace_config() 805 pci_name(ha->pdev)); qlafx00_iospace_config() 809 ha->iobase = qlafx00_iospace_config() 810 ioremap_nocache(pci_resource_start(ha->pdev, 2), BAR2_LEN_FX00); qlafx00_iospace_config() 811 if (!ha->iobase) { qlafx00_iospace_config() 812 ql_log_pci(ql_log_fatal, ha->pdev, 0x012b, qlafx00_iospace_config() 813 "cannot remap MMIO (%s), aborting\n", pci_name(ha->pdev)); qlafx00_iospace_config() 818 ha->max_req_queues = ha->max_rsp_queues = 1; qlafx00_iospace_config() 820 ql_log_pci(ql_log_info, ha->pdev, 0x012c, qlafx00_iospace_config() 822 ha->bars, ha->cregbase, ha->iobase); qlafx00_iospace_config() 833 struct qla_hw_data *ha = vha->hw; qlafx00_save_queue_ptrs() local 834 struct req_que *req = ha->req_q_map[0]; qlafx00_save_queue_ptrs() 835 struct rsp_que *rsp = ha->rsp_q_map[0]; qlafx00_save_queue_ptrs() 859 struct qla_hw_data *ha = vha->hw; qlafx00_config_queues() local 860 struct req_que *req = ha->req_q_map[0]; qlafx00_config_queues() 861 struct rsp_que *rsp = ha->rsp_q_map[0]; qlafx00_config_queues() 862 dma_addr_t bar2_hdl = pci_resource_start(ha->pdev, 2); qlafx00_config_queues() 864 req->length = ha->req_que_len; qlafx00_config_queues() 865 req->ring = (void *)ha->iobase + ha->req_que_off; qlafx00_config_queues() 866 req->dma = bar2_hdl + ha->req_que_off; qlafx00_config_queues() 868 ql_log_pci(ql_log_info, ha->pdev, 0x012f, qlafx00_config_queues() 877 ha->req_que_off, (u64)req->dma); qlafx00_config_queues() 879 rsp->length = ha->rsp_que_len; qlafx00_config_queues() 880 rsp->ring = (void *)ha->iobase + ha->rsp_que_off; qlafx00_config_queues() 881 rsp->dma = bar2_hdl + ha->rsp_que_off; qlafx00_config_queues() 883 ql_log_pci(ql_log_info, ha->pdev, 0x0131, qlafx00_config_queues() 892 ha->rsp_que_off, (u64)rsp->dma); qlafx00_config_queues() 903 struct qla_hw_data *ha = vha->hw; qlafx00_init_fw_ready() local 904 struct device_reg_fx00 __iomem *reg = &ha->iobase->ispfx00; qlafx00_init_fw_ready() 916 ha->mbx_intr_code = MSW(aenmbx7); qlafx00_init_fw_ready() 917 ha->rqstq_intr_code = LSW(aenmbx7); qlafx00_init_fw_ready() 946 ha->mbx_intr_code = MSW(aenmbx7); qlafx00_init_fw_ready() 947 ha->rqstq_intr_code = LSW(aenmbx7); qlafx00_init_fw_ready() 948 ha->req_que_off = RD_REG_DWORD(&reg->aenmailbox1); qlafx00_init_fw_ready() 949 ha->rsp_que_off = RD_REG_DWORD(&reg->aenmailbox3); qlafx00_init_fw_ready() 950 ha->req_que_len = RD_REG_DWORD(&reg->aenmailbox5); qlafx00_init_fw_ready() 951 ha->rsp_que_len = RD_REG_DWORD(&reg->aenmailbox6); qlafx00_init_fw_ready() 957 ha->mbx_intr_code, ha->rqstq_intr_code); qlafx00_init_fw_ready() 958 QLAFX00_CLR_INTR_REG(ha, QLAFX00_HST_INT_STS_BITS); qlafx00_init_fw_ready() 984 ha->mbx_intr_code = MSW(aenmbx7); qlafx00_init_fw_ready() 985 ha->rqstq_intr_code = LSW(aenmbx7); qlafx00_init_fw_ready() 986 ha->req_que_off = RD_REG_DWORD(&reg->initval1); qlafx00_init_fw_ready() 987 ha->rsp_que_off = RD_REG_DWORD(&reg->initval3); qlafx00_init_fw_ready() 988 ha->req_que_len = RD_REG_DWORD(&reg->initval5); qlafx00_init_fw_ready() 989 ha->rsp_que_len = RD_REG_DWORD(&reg->initval6); qlafx00_init_fw_ready() 993 ha->mbx_intr_code, ha->rqstq_intr_code); qlafx00_init_fw_ready() 994 QLAFX00_CLR_INTR_REG(ha, QLAFX00_HST_INT_STS_BITS); qlafx00_init_fw_ready() 1057 * @ha: HA context 1123 struct qla_hw_data *ha = vha->hw; qlafx00_find_all_targets() local 1140 0x2089, (uint8_t *)ha->gid_list, 32); qlafx00_find_all_targets() 1147 for_each_set_bit(tgt_id, (void *)ha->gid_list, qlafx00_find_all_targets() 1239 * ha = adapter block pointer. 1309 * ha = adapter block pointer. 1353 struct qla_hw_data *ha = vha->hw; qlafx00_abort_isp_cleanup() local 1357 ha->mr.fw_hbt_en = 0; qlafx00_abort_isp_cleanup() 1360 ha->flags.chip_reset_done = 0; qlafx00_abort_isp_cleanup() 1364 "Performing ISP error recovery - ha = %p.\n", ha); qlafx00_abort_isp_cleanup() 1365 ha->isp_ops->reset_chip(vha); qlafx00_abort_isp_cleanup() 1385 if (!ha->flags.eeh_busy) { qlafx00_abort_isp_cleanup() 1401 QLAFX00_CLR_INTR_REG(ha, QLAFX00_HST_INT_STS_BITS); qlafx00_abort_isp_cleanup() 1404 "%s Done done - ha=%p.\n", __func__, ha); qlafx00_abort_isp_cleanup() 1409 * @ha: HA context 1438 struct qla_hw_data *ha = vha->hw; qlafx00_rescan_isp() local 1439 struct device_reg_fx00 __iomem *reg = &ha->iobase->ispfx00; qlafx00_rescan_isp() 1442 qla2x00_request_irqs(ha, ha->rsp_q_map[0]); qlafx00_rescan_isp() 1445 ha->mbx_intr_code = MSW(aenmbx7); qlafx00_rescan_isp() 1446 ha->rqstq_intr_code = LSW(aenmbx7); qlafx00_rescan_isp() 1447 ha->req_que_off = RD_REG_DWORD(&reg->aenmailbox1); qlafx00_rescan_isp() 1448 ha->rsp_que_off = RD_REG_DWORD(&reg->aenmailbox3); qlafx00_rescan_isp() 1449 ha->req_que_len = RD_REG_DWORD(&reg->aenmailbox5); qlafx00_rescan_isp() 1450 ha->rsp_que_len = RD_REG_DWORD(&reg->aenmailbox6); qlafx00_rescan_isp() 1455 ha->mbx_intr_code, ha->rqstq_intr_code, qlafx00_rescan_isp() 1456 ha->req_que_off, ha->rsp_que_len); qlafx00_rescan_isp() 1459 QLAFX00_CLR_INTR_REG(ha, QLAFX00_HST_INT_STS_BITS); qlafx00_rescan_isp() 1481 struct qla_hw_data *ha = vha->hw; qlafx00_timer_routine() local 1484 struct device_reg_fx00 __iomem *reg = &ha->iobase->ispfx00; qlafx00_timer_routine() 1488 if (ha->mr.fw_hbt_cnt) qlafx00_timer_routine() 1489 ha->mr.fw_hbt_cnt--; qlafx00_timer_routine() 1491 if ((!ha->flags.mr_reset_hdlr_active) && qlafx00_timer_routine() 1494 (ha->mr.fw_hbt_en)) { qlafx00_timer_routine() 1496 if (fw_heart_beat != ha->mr.old_fw_hbt_cnt) { qlafx00_timer_routine() 1497 ha->mr.old_fw_hbt_cnt = fw_heart_beat; qlafx00_timer_routine() 1498 ha->mr.fw_hbt_miss_cnt = 0; qlafx00_timer_routine() 1500 ha->mr.fw_hbt_miss_cnt++; qlafx00_timer_routine() 1501 if (ha->mr.fw_hbt_miss_cnt == qlafx00_timer_routine() 1506 ha->mr.fw_hbt_miss_cnt = 0; qlafx00_timer_routine() 1510 ha->mr.fw_hbt_cnt = QLAFX00_HEARTBEAT_INTERVAL; qlafx00_timer_routine() 1516 if (ha->mr.fw_reset_timer_exp) { qlafx00_timer_routine() 1519 ha->mr.fw_reset_timer_exp = 0; qlafx00_timer_routine() 1525 ha->mr.fw_reset_timer_tick = QLAFX00_RESET_INTERVAL; qlafx00_timer_routine() 1527 (!ha->mr.fw_hbt_en)) { qlafx00_timer_routine() 1528 ha->mr.fw_hbt_en = 1; qlafx00_timer_routine() 1529 } else if (!ha->mr.fw_reset_timer_tick) { qlafx00_timer_routine() 1530 if (aenmbx0 == ha->mr.old_aenmbx0_state) qlafx00_timer_routine() 1531 ha->mr.fw_reset_timer_exp = 1; qlafx00_timer_routine() 1532 ha->mr.fw_reset_timer_tick = QLAFX00_RESET_INTERVAL; qlafx00_timer_routine() 1536 data0 = QLAFX00_RD_REG(ha, qlafx00_timer_routine() 1538 data1 = QLAFX00_RD_REG(ha, qlafx00_timer_routine() 1544 QLAFX00_WR_REG(ha, qlafx00_timer_routine() 1548 ha->mr.fw_reset_timer_tick = qlafx00_timer_routine() 1551 ha->mr.fw_reset_timer_tick = qlafx00_timer_routine() 1554 if (ha->mr.old_aenmbx0_state != aenmbx0) { qlafx00_timer_routine() 1555 ha->mr.old_aenmbx0_state = aenmbx0; qlafx00_timer_routine() 1556 ha->mr.fw_reset_timer_tick = QLAFX00_RESET_INTERVAL; qlafx00_timer_routine() 1558 ha->mr.fw_reset_timer_tick--; qlafx00_timer_routine() 1565 if (ha->mr.fw_critemp_timer_tick == 0) { qlafx00_timer_routine() 1566 tempc = QLAFX00_GET_TEMPERATURE(ha); qlafx00_timer_routine() 1571 if (tempc < ha->mr.critical_temperature) { qlafx00_timer_routine() 1577 ha->mr.fw_critemp_timer_tick = qlafx00_timer_routine() 1580 ha->mr.fw_critemp_timer_tick--; qlafx00_timer_routine() 1583 if (ha->mr.host_info_resend) { qlafx00_timer_routine() 1588 if (ha->mr.hinfo_resend_timer_tick == 0) { qlafx00_timer_routine() 1589 ha->mr.host_info_resend = false; qlafx00_timer_routine() 1591 ha->mr.hinfo_resend_timer_tick = qlafx00_timer_routine() 1595 ha->mr.hinfo_resend_timer_tick--; qlafx00_timer_routine() 1606 * ha = adapter block pointer. 1614 struct qla_hw_data *ha = vha->hw; qlafx00_reset_initialize() local 1622 ha->flags.mr_reset_hdlr_active = 1; qlafx00_reset_initialize() 1631 ha->flags.mr_reset_hdlr_active = 0; qlafx00_reset_initialize() 1640 * ha = adapter block pointer. 1648 struct qla_hw_data *ha = vha->hw; qlafx00_abort_isp() local 1651 if (unlikely(pci_channel_offline(ha->pdev) && qlafx00_abort_isp() 1652 ha->flags.pci_channel_io_perm_failure)) { qlafx00_abort_isp() 1663 ha->isp_ops->reset_chip(vha); qlafx00_abort_isp() 1666 QLAFX00_CLR_INTR_REG(ha, QLAFX00_HST_INT_STS_BITS); qlafx00_abort_isp() 1811 struct qla_hw_data *ha = vha->hw; qlafx00_fx_disc() local 1861 fdisc->u.fxiocb.req_addr = dma_alloc_coherent(&ha->pdev->dev, qlafx00_fx_disc() 1878 ha->mr.host_info_resend = true; qlafx00_fx_disc() 1893 ha->pdev->device); qlafx00_fx_disc() 1916 fdisc->u.fxiocb.rsp_addr = dma_alloc_coherent(&ha->pdev->dev, qlafx00_fx_disc() 1957 ha->mr.extended_io_enabled = (pinfo->enabled_capabilities & qlafx00_fx_disc() 1994 dma_free_coherent(&ha->pdev->dev, fdisc->u.fxiocb.rsp_len, qlafx00_fx_disc() 1999 dma_free_coherent(&ha->pdev->dev, fdisc->u.fxiocb.req_len, qlafx00_fx_disc() 2012 * ha = adapter block pointer. 2021 struct qla_hw_data *ha = vha->hw; qlafx00_initialize_adapter() local 2026 ha->flags.chip_reset_done = 0; qlafx00_initialize_adapter() 2028 ha->flags.pci_channel_io_perm_failure = 0; qlafx00_initialize_adapter() 2029 ha->flags.eeh_busy = 0; qlafx00_initialize_adapter() 2035 ha->isp_abort_cnt = 0; qlafx00_initialize_adapter() 2036 ha->beacon_blink_led = 0; qlafx00_initialize_adapter() 2038 set_bit(0, ha->req_qid_map); qlafx00_initialize_adapter() 2039 set_bit(0, ha->rsp_qid_map); qlafx00_initialize_adapter() 2044 rval = ha->isp_ops->pci_config(vha); qlafx00_initialize_adapter() 2065 rval = qla2x00_alloc_outstanding_cmds(ha, vha->req); qlafx00_initialize_adapter() 2070 ha->flags.chip_reset_done = 1; qlafx00_initialize_adapter() 2072 tempc = QLAFX00_GET_TEMPERATURE(ha); qlafx00_initialize_adapter() 2103 struct qla_hw_data *ha = ((struct scsi_qla_host *) qlafx00_get_host_speed() local 2107 switch (ha->link_data_rate) { qlafx00_get_host_speed() 2270 * @ha: SCSI driver HA context 2288 struct qla_hw_data *ha = vha->hw; qlafx00_status_entry() local 2303 req = ha->req_q_map[que]; qlafx00_status_entry() 2414 if (IS_FWI2_CAPABLE(ha) || IS_QLAFX00(ha)) qlafx00_status_entry() 2420 if ((IS_FWI2_CAPABLE(ha) || IS_QLAFX00(ha)) qlafx00_status_entry() 2540 sp->done(ha, sp, res); qlafx00_status_entry() 2545 * @ha: SCSI driver HA context 2554 struct qla_hw_data *ha = rsp->hw; qlafx00_status_cont_entry() local 2555 struct scsi_qla_host *vha = pci_get_drvdata(ha->pdev); qlafx00_status_cont_entry() 2617 sp->done(ha, sp, cp->result); qlafx00_status_cont_entry() 2623 * @ha: SCSI driver HA context 2631 struct qla_hw_data *ha = vha->hw; qlafx00_multistatus_entry() local 2655 req = ha->req_q_map[que]; qlafx00_multistatus_entry() 2677 * @ha: SCSI driver HA context 2685 struct qla_hw_data *ha = vha->hw; qlafx00_error_entry() local 2694 req = ha->req_q_map[que]; qlafx00_error_entry() 2698 sp->done(ha, sp, res); qlafx00_error_entry() 2708 * @ha: SCSI driver HA context 2784 * @ha: SCSI driver HA context 2789 struct qla_hw_data *ha = vha->hw; qlafx00_async_event() local 2793 reg = &ha->iobase->ispfx00; qlafx00_async_event() 2795 switch (ha->aenmb[0]) { qlafx00_async_event() 2798 "ISP System Error - mbx1=%x\n", ha->aenmb[0]); qlafx00_async_event() 2810 ha->aenmb[1] = RD_REG_DWORD(&reg->aenmailbox1); qlafx00_async_event() 2811 ha->aenmb[2] = RD_REG_DWORD(&reg->aenmailbox2); qlafx00_async_event() 2812 ha->aenmb[3] = RD_REG_DWORD(&reg->aenmailbox3); qlafx00_async_event() 2816 ha->aenmb[0], ha->aenmb[1], ha->aenmb[2], ha->aenmb[3]); qlafx00_async_event() 2824 ha->aenmb[0]); qlafx00_async_event() 2831 ha->aenmb[0]); qlafx00_async_event() 2838 ha->aenmb[0]); qlafx00_async_event() 2842 ha->aenmb[1] = RD_REG_WORD(&reg->aenmailbox1); qlafx00_async_event() 2843 ha->aenmb[2] = RD_REG_WORD(&reg->aenmailbox2); qlafx00_async_event() 2844 ha->aenmb[3] = RD_REG_WORD(&reg->aenmailbox3); qlafx00_async_event() 2845 ha->aenmb[4] = RD_REG_WORD(&reg->aenmailbox4); qlafx00_async_event() 2846 ha->aenmb[5] = RD_REG_WORD(&reg->aenmailbox5); qlafx00_async_event() 2847 ha->aenmb[6] = RD_REG_WORD(&reg->aenmailbox6); qlafx00_async_event() 2848 ha->aenmb[7] = RD_REG_WORD(&reg->aenmailbox7); qlafx00_async_event() 2851 ha->aenmb[0], ha->aenmb[1], ha->aenmb[2], ha->aenmb[3], qlafx00_async_event() 2852 ha->aenmb[4], ha->aenmb[5], ha->aenmb[6], ha->aenmb[7]); qlafx00_async_event() 2855 qlafx00_post_aenfx_work(vha, ha->aenmb[0], qlafx00_async_event() 2856 (uint32_t *)ha->aenmb, data_size); qlafx00_async_event() 2862 * @ha: SCSI driver HA context 2870 struct qla_hw_data *ha = vha->hw; qlafx00_mbx_completion() local 2871 struct device_reg_fx00 __iomem *reg = &ha->iobase->ispfx00; qlafx00_mbx_completion() 2873 if (!ha->mcp32) qlafx00_mbx_completion() 2877 ha->flags.mbox_int = 1; qlafx00_mbx_completion() 2878 ha->mailbox_out32[0] = mb0; qlafx00_mbx_completion() 2881 for (cnt = 1; cnt < ha->mbx_count; cnt++) { qlafx00_mbx_completion() 2882 ha->mailbox_out32[cnt] = RD_REG_DWORD(wptr); qlafx00_mbx_completion() 2900 struct qla_hw_data *ha; qlafx00_intr_handler() local 2918 ha = rsp->hw; qlafx00_intr_handler() 2919 reg = &ha->iobase->ispfx00; qlafx00_intr_handler() 2922 if (unlikely(pci_channel_offline(ha->pdev))) qlafx00_intr_handler() 2925 spin_lock_irqsave(&ha->hardware_lock, flags); qlafx00_intr_handler() 2926 vha = pci_get_drvdata(ha->pdev); qlafx00_intr_handler() 2928 stat = QLAFX00_RD_INTR_REG(ha); qlafx00_intr_handler() 2942 ha->aenmb[0] = RD_REG_WORD(&reg->aenmailbox0); qlafx00_intr_handler() 2951 QLAFX00_CLR_INTR_REG(ha, clr_intr); qlafx00_intr_handler() 2952 QLAFX00_RD_INTR_REG(ha); qlafx00_intr_handler() 2955 qla2x00_handle_mbx_completion(ha, status); qlafx00_intr_handler() 2956 spin_unlock_irqrestore(&ha->hardware_lock, flags); qlafx00_intr_handler() 3085 struct qla_hw_data *ha = vha->hw; qlafx00_start_scsi() local 3093 rsp = ha->rsp_q_map[0]; qlafx00_start_scsi() 3100 spin_lock_irqsave(&ha->hardware_lock, flags); qlafx00_start_scsi() 3116 nseg = dma_map_sg(&ha->pdev->dev, scsi_sglist(cmd), qlafx00_start_scsi() 3192 QLAFX00_SET_HST_INTR(ha, ha->rqstq_intr_code); qlafx00_start_scsi() 3194 spin_unlock_irqrestore(&ha->hardware_lock, flags); qlafx00_start_scsi() 3201 spin_unlock_irqrestore(&ha->hardware_lock, flags); qlafx00_start_scsi()
H A D	qla_bsg.c	32 struct qla_hw_data *ha = vha->hw; qla2x00_bsg_sp_free() local 40 dma_unmap_sg(&ha->pdev->dev, qla2x00_bsg_sp_free() 45 dma_unmap_sg(&ha->pdev->dev, qla2x00_bsg_sp_free() 49 dma_unmap_sg(&ha->pdev->dev, bsg_job->request_payload.sg_list, qla2x00_bsg_sp_free() 52 dma_unmap_sg(&ha->pdev->dev, bsg_job->reply_payload.sg_list, qla2x00_bsg_sp_free() 123 struct qla_hw_data *ha = vha->hw; qla24xx_proc_fcp_prio_cfg_cmd() local 128 if (!(IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha) || IS_P3P_TYPE(ha))) { qla24xx_proc_fcp_prio_cfg_cmd() 137 if (!ha->fcp_prio_cfg && (oper != QLFC_FCP_PRIO_SET_CONFIG)) { qla24xx_proc_fcp_prio_cfg_cmd() 143 if (ha->flags.fcp_prio_enabled) { qla24xx_proc_fcp_prio_cfg_cmd() 144 ha->flags.fcp_prio_enabled = 0; qla24xx_proc_fcp_prio_cfg_cmd() 145 ha->fcp_prio_cfg->attributes &= qla24xx_proc_fcp_prio_cfg_cmd() 157 if (!ha->flags.fcp_prio_enabled) { qla24xx_proc_fcp_prio_cfg_cmd() 158 if (ha->fcp_prio_cfg) { qla24xx_proc_fcp_prio_cfg_cmd() 159 ha->flags.fcp_prio_enabled = 1; qla24xx_proc_fcp_prio_cfg_cmd() 160 ha->fcp_prio_cfg->attributes |= qla24xx_proc_fcp_prio_cfg_cmd() 184 bsg_job->reply_payload.sg_cnt, ha->fcp_prio_cfg, qla24xx_proc_fcp_prio_cfg_cmd() 197 if (!ha->fcp_prio_cfg) { qla24xx_proc_fcp_prio_cfg_cmd() 198 ha->fcp_prio_cfg = vmalloc(FCP_PRIO_CFG_SIZE); qla24xx_proc_fcp_prio_cfg_cmd() 199 if (!ha->fcp_prio_cfg) { qla24xx_proc_fcp_prio_cfg_cmd() 209 memset(ha->fcp_prio_cfg, 0, FCP_PRIO_CFG_SIZE); qla24xx_proc_fcp_prio_cfg_cmd() 211 bsg_job->request_payload.sg_cnt, ha->fcp_prio_cfg, qla24xx_proc_fcp_prio_cfg_cmd() 217 (struct qla_fcp_prio_cfg *) ha->fcp_prio_cfg, 1)) { qla24xx_proc_fcp_prio_cfg_cmd() 223 vfree(ha->fcp_prio_cfg); qla24xx_proc_fcp_prio_cfg_cmd() 224 ha->fcp_prio_cfg = NULL; qla24xx_proc_fcp_prio_cfg_cmd() 228 ha->flags.fcp_prio_enabled = 0; qla24xx_proc_fcp_prio_cfg_cmd() 229 if (ha->fcp_prio_cfg->attributes & FCP_PRIO_ATTR_ENABLE) qla24xx_proc_fcp_prio_cfg_cmd() 230 ha->flags.fcp_prio_enabled = 1; qla24xx_proc_fcp_prio_cfg_cmd() 251 struct qla_hw_data *ha; qla2x00_process_els() local 263 ha = vha->hw; qla2x00_process_els() 268 ha = vha->hw; qla2x00_process_els() 279 if (!IS_FWI2_CAPABLE(ha)) { qla2x00_process_els() 336 dma_map_sg(&ha->pdev->dev, bsg_job->request_payload.sg_list, qla2x00_process_els() 343 rsp_sg_cnt = dma_map_sg(&ha->pdev->dev, bsg_job->reply_payload.sg_list, qla2x00_process_els() 395 dma_unmap_sg(&ha->pdev->dev, bsg_job->request_payload.sg_list, qla2x00_process_els() 397 dma_unmap_sg(&ha->pdev->dev, bsg_job->reply_payload.sg_list, qla2x00_process_els() 428 struct qla_hw_data *ha = vha->hw; qla2x00_process_ct() local 436 dma_map_sg(&ha->pdev->dev, bsg_job->request_payload.sg_list, qla2x00_process_ct() 445 rsp_sg_cnt = dma_map_sg(&ha->pdev->dev, bsg_job->reply_payload.sg_list, qla2x00_process_ct() 544 dma_unmap_sg(&ha->pdev->dev, bsg_job->request_payload.sg_list, qla2x00_process_ct() 546 dma_unmap_sg(&ha->pdev->dev, bsg_job->reply_payload.sg_list, qla2x00_process_ct() 560 struct qla_hw_data *ha = vha->hw; qla81xx_reset_loopback_mode() local 562 if (!IS_QLA81XX(ha) && !IS_QLA8031(ha) && !IS_QLA8044(ha)) qla81xx_reset_loopback_mode() 575 ha->notify_dcbx_comp = wait; qla81xx_reset_loopback_mode() 576 ha->notify_lb_portup_comp = wait2; qla81xx_reset_loopback_mode() 582 ha->notify_dcbx_comp = 0; qla81xx_reset_loopback_mode() 583 ha->notify_lb_portup_comp = 0; qla81xx_reset_loopback_mode() 589 if (wait && !wait_for_completion_timeout(&ha->dcbx_comp, qla81xx_reset_loopback_mode() 593 ha->notify_dcbx_comp = 0; qla81xx_reset_loopback_mode() 594 ha->notify_lb_portup_comp = 0; qla81xx_reset_loopback_mode() 602 !wait_for_completion_timeout(&ha->lb_portup_comp, qla81xx_reset_loopback_mode() 606 ha->notify_lb_portup_comp = 0; qla81xx_reset_loopback_mode() 613 ha->notify_dcbx_comp = 0; qla81xx_reset_loopback_mode() 614 ha->notify_lb_portup_comp = 0; qla81xx_reset_loopback_mode() 631 struct qla_hw_data *ha = vha->hw; qla81xx_set_loopback_mode() local 633 if (!IS_QLA81XX(ha) && !IS_QLA8031(ha) && !IS_QLA8044(ha)) qla81xx_set_loopback_mode() 645 ha->notify_dcbx_comp = 1; qla81xx_set_loopback_mode() 650 ha->notify_dcbx_comp = 0; qla81xx_set_loopback_mode() 658 rem_tmo = wait_for_completion_timeout(&ha->dcbx_comp, qla81xx_set_loopback_mode() 660 if (!ha->idc_extend_tmo || rem_tmo) { qla81xx_set_loopback_mode() 661 ha->idc_extend_tmo = 0; qla81xx_set_loopback_mode() 664 current_tmo = ha->idc_extend_tmo * HZ; qla81xx_set_loopback_mode() 665 ha->idc_extend_tmo = 0; qla81xx_set_loopback_mode() 677 ha->isp_ops->fw_dump(vha, 0); qla81xx_set_loopback_mode() 682 if (ha->flags.idc_compl_status) { qla81xx_set_loopback_mode() 686 ha->flags.idc_compl_status = 0; qla81xx_set_loopback_mode() 692 ha->notify_dcbx_comp = 0; qla81xx_set_loopback_mode() 693 ha->idc_extend_tmo = 0; qla81xx_set_loopback_mode() 704 struct qla_hw_data *ha = vha->hw; qla2x00_process_loopback() local 724 elreq.req_sg_cnt = dma_map_sg(&ha->pdev->dev, qla2x00_process_loopback() 734 elreq.rsp_sg_cnt = dma_map_sg(&ha->pdev->dev, qla2x00_process_loopback() 757 req_data = dma_alloc_coherent(&ha->pdev->dev, req_data_len, qla2x00_process_loopback() 766 rsp_data = dma_alloc_coherent(&ha->pdev->dev, rsp_data_len, qla2x00_process_loopback() 788 (ha->current_topology == ISP_CFG_F || qla2x00_process_loopback() 789 ((IS_QLA81XX(ha) || IS_QLA8031(ha) || IS_QLA8044(ha)) && qla2x00_process_loopback() 799 if (IS_QLA81XX(ha) || IS_QLA8031(ha) || IS_QLA8044(ha)) { qla2x00_process_loopback() 822 if (IS_QLA8031(ha) || IS_QLA8044(ha)) qla2x00_process_loopback() 852 if (IS_QLA81XX(ha)) { qla2x00_process_loopback() 878 ha->isp_ops->fw_dump(vha, 0); qla2x00_process_loopback() 919 dma_free_coherent(&ha->pdev->dev, rsp_data_len, qla2x00_process_loopback() 922 dma_free_coherent(&ha->pdev->dev, req_data_len, qla2x00_process_loopback() 925 dma_unmap_sg(&ha->pdev->dev, qla2x00_process_loopback() 929 dma_unmap_sg(&ha->pdev->dev, qla2x00_process_loopback() 942 struct qla_hw_data *ha = vha->hw; qla84xx_reset() local 946 if (!IS_QLA84XX(ha)) { qla84xx_reset() 975 struct qla_hw_data *ha = vha->hw; qla84xx_updatefw() local 986 if (!IS_QLA84XX(ha)) { qla84xx_updatefw() 992 sg_cnt = dma_map_sg(&ha->pdev->dev, bsg_job->request_payload.sg_list, qla84xx_updatefw() 1010 fw_buf = dma_alloc_coherent(&ha->pdev->dev, data_len, qla84xx_updatefw() 1022 mn = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &mn_dma); qla84xx_updatefw() 1065 dma_pool_free(ha->s_dma_pool, mn, mn_dma); qla84xx_updatefw() 1068 dma_free_coherent(&ha->pdev->dev, data_len, fw_buf, fw_dma); qla84xx_updatefw() 1071 dma_unmap_sg(&ha->pdev->dev, bsg_job->request_payload.sg_list, qla84xx_updatefw() 1084 struct qla_hw_data *ha = vha->hw; qla84xx_mgmt_cmd() local 1094 if (!IS_QLA84XX(ha)) { qla84xx_mgmt_cmd() 1100 mn = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &mn_dma); qla84xx_mgmt_cmd() 1114 sg_cnt = dma_map_sg(&ha->pdev->dev, qla84xx_mgmt_cmd() 1137 mgmt_b = dma_alloc_coherent(&ha->pdev->dev, data_len, qla84xx_mgmt_cmd() 1164 sg_cnt = dma_map_sg(&ha->pdev->dev, qla84xx_mgmt_cmd() 1187 mgmt_b = dma_alloc_coherent(&ha->pdev->dev, data_len, qla84xx_mgmt_cmd() 1257 dma_free_coherent(&ha->pdev->dev, data_len, mgmt_b, mgmt_dma); qla84xx_mgmt_cmd() 1260 dma_unmap_sg(&ha->pdev->dev, bsg_job->request_payload.sg_list, qla84xx_mgmt_cmd() 1263 dma_unmap_sg(&ha->pdev->dev, bsg_job->reply_payload.sg_list, qla84xx_mgmt_cmd() 1267 dma_pool_free(ha->s_dma_pool, mn, mn_dma); qla84xx_mgmt_cmd() 1366 struct qla_hw_data *ha = vha->hw; qla2x00_optrom_setup() local 1368 if (unlikely(pci_channel_offline(ha->pdev))) qla2x00_optrom_setup() 1372 if (start > ha->optrom_size) { qla2x00_optrom_setup() 1374 "start %d > optrom_size %d.\n", start, ha->optrom_size); qla2x00_optrom_setup() 1378 if (ha->optrom_state != QLA_SWAITING) { qla2x00_optrom_setup() 1380 "optrom_state %d.\n", ha->optrom_state); qla2x00_optrom_setup() 1384 ha->optrom_region_start = start; qla2x00_optrom_setup() 1387 if (ha->optrom_size == OPTROM_SIZE_2300 && start == 0) qla2x00_optrom_setup() 1389 else if (start == (ha->flt_region_boot * 4) || qla2x00_optrom_setup() 1390 start == (ha->flt_region_fw * 4)) qla2x00_optrom_setup() 1392 else if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha) || qla2x00_optrom_setup() 1393 IS_CNA_CAPABLE(ha) || IS_QLA2031(ha) || IS_QLA27XX(ha)) qla2x00_optrom_setup() 1402 ha->optrom_region_size = start + qla2x00_optrom_setup() 1403 bsg_job->request_payload.payload_len > ha->optrom_size ? qla2x00_optrom_setup() 1404 ha->optrom_size - start : qla2x00_optrom_setup() 1406 ha->optrom_state = QLA_SWRITING; qla2x00_optrom_setup() 1408 ha->optrom_region_size = start + qla2x00_optrom_setup() 1409 bsg_job->reply_payload.payload_len > ha->optrom_size ? qla2x00_optrom_setup() 1410 ha->optrom_size - start : qla2x00_optrom_setup() 1412 ha->optrom_state = QLA_SREADING; qla2x00_optrom_setup() 1415 ha->optrom_buffer = vmalloc(ha->optrom_region_size); qla2x00_optrom_setup() 1416 if (!ha->optrom_buffer) { qla2x00_optrom_setup() 1419 "(%x)\n", ha->optrom_region_size); qla2x00_optrom_setup() 1421 ha->optrom_state = QLA_SWAITING; qla2x00_optrom_setup() 1425 memset(ha->optrom_buffer, 0, ha->optrom_region_size); qla2x00_optrom_setup() 1434 struct qla_hw_data *ha = vha->hw; qla2x00_read_optrom() local 1437 if (ha->flags.nic_core_reset_hdlr_active) qla2x00_read_optrom() 1440 mutex_lock(&ha->optrom_mutex); qla2x00_read_optrom() 1443 mutex_unlock(&ha->optrom_mutex); qla2x00_read_optrom() 1447 ha->isp_ops->read_optrom(vha, ha->optrom_buffer, qla2x00_read_optrom() 1448 ha->optrom_region_start, ha->optrom_region_size); qla2x00_read_optrom() 1451 bsg_job->reply_payload.sg_cnt, ha->optrom_buffer, qla2x00_read_optrom() 1452 ha->optrom_region_size); qla2x00_read_optrom() 1454 bsg_job->reply->reply_payload_rcv_len = ha->optrom_region_size; qla2x00_read_optrom() 1456 vfree(ha->optrom_buffer); qla2x00_read_optrom() 1457 ha->optrom_buffer = NULL; qla2x00_read_optrom() 1458 ha->optrom_state = QLA_SWAITING; qla2x00_read_optrom() 1459 mutex_unlock(&ha->optrom_mutex); qla2x00_read_optrom() 1469 struct qla_hw_data *ha = vha->hw; qla2x00_update_optrom() local 1472 mutex_lock(&ha->optrom_mutex); qla2x00_update_optrom() 1475 mutex_unlock(&ha->optrom_mutex); qla2x00_update_optrom() 1480 ha->flags.isp82xx_no_md_cap = 1; qla2x00_update_optrom() 1483 bsg_job->request_payload.sg_cnt, ha->optrom_buffer, qla2x00_update_optrom() 1484 ha->optrom_region_size); qla2x00_update_optrom() 1486 ha->isp_ops->write_optrom(vha, ha->optrom_buffer, qla2x00_update_optrom() 1487 ha->optrom_region_start, ha->optrom_region_size); qla2x00_update_optrom() 1490 vfree(ha->optrom_buffer); qla2x00_update_optrom() 1491 ha->optrom_buffer = NULL; qla2x00_update_optrom() 1492 ha->optrom_state = QLA_SWAITING; qla2x00_update_optrom() 1493 mutex_unlock(&ha->optrom_mutex); qla2x00_update_optrom() 1503 struct qla_hw_data *ha = vha->hw; qla2x00_update_fru_versions() local 1510 void *sfp = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &sfp_dma); qla2x00_update_fru_versions() 1538 dma_pool_free(ha->s_dma_pool, sfp, sfp_dma); qla2x00_update_fru_versions() 1553 struct qla_hw_data *ha = vha->hw; qla2x00_read_fru_status() local 1558 uint8_t *sfp = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &sfp_dma); qla2x00_read_fru_status() 1585 dma_pool_free(ha->s_dma_pool, sfp, sfp_dma); qla2x00_read_fru_status() 1601 struct qla_hw_data *ha = vha->hw; qla2x00_write_fru_status() local 1606 uint8_t *sfp = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &sfp_dma); qla2x00_write_fru_status() 1630 dma_pool_free(ha->s_dma_pool, sfp, sfp_dma); qla2x00_write_fru_status() 1645 struct qla_hw_data *ha = vha->hw; qla2x00_write_i2c() local 1650 uint8_t *sfp = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &sfp_dma); qla2x00_write_i2c() 1673 dma_pool_free(ha->s_dma_pool, sfp, sfp_dma); qla2x00_write_i2c() 1688 struct qla_hw_data *ha = vha->hw; qla2x00_read_i2c() local 1693 uint8_t *sfp = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &sfp_dma); qla2x00_read_i2c() 1719 dma_pool_free(ha->s_dma_pool, sfp, sfp_dma); qla2x00_read_i2c() 1735 struct qla_hw_data *ha = vha->hw; qla24xx_process_bidir_cmd() local 1747 if (!IS_BIDI_CAPABLE(ha)) { qla24xx_process_bidir_cmd() 1778 if (ha->current_topology != ISP_CFG_F) { qla24xx_process_bidir_cmd() 1786 if (ha->operating_mode != P2P) { qla24xx_process_bidir_cmd() 1795 mutex_lock(&ha->selflogin_lock); qla24xx_process_bidir_cmd() 1808 mutex_unlock(&ha->selflogin_lock); qla24xx_process_bidir_cmd() 1816 mutex_unlock(&ha->selflogin_lock); qla24xx_process_bidir_cmd() 1820 req_sg_cnt = dma_map_sg(&ha->pdev->dev, qla24xx_process_bidir_cmd() 1830 rsp_sg_cnt = dma_map_sg(&ha->pdev->dev, qla24xx_process_bidir_cmd() 1887 mempool_free(sp, ha->srb_mempool); qla24xx_process_bidir_cmd() 1889 dma_unmap_sg(&ha->pdev->dev, qla24xx_process_bidir_cmd() 1893 dma_unmap_sg(&ha->pdev->dev, qla24xx_process_bidir_cmd() 1915 struct qla_hw_data *ha = vha->hw; qlafx00_mgmt_cmd() local 1939 req_sg_cnt = dma_map_sg(&ha->pdev->dev, qlafx00_mgmt_cmd() 1951 rsp_sg_cnt = dma_map_sg(&ha->pdev->dev, qlafx00_mgmt_cmd() 2008 mempool_free(sp, ha->srb_mempool); qlafx00_mgmt_cmd() 2019 dma_unmap_sg(&ha->pdev->dev, qlafx00_mgmt_cmd() 2024 dma_unmap_sg(&ha->pdev->dev, qlafx00_mgmt_cmd() 2229 struct qla_hw_data *ha = vha->hw; qla24xx_bsg_timeout() local 2236 spin_lock_irqsave(&ha->hardware_lock, flags); qla24xx_bsg_timeout() 2237 for (que = 0; que < ha->max_req_queues; que++) { qla24xx_bsg_timeout() 2238 req = ha->req_q_map[que]; qla24xx_bsg_timeout() 2250 spin_unlock_irqrestore(&ha->hardware_lock, flags); qla24xx_bsg_timeout() 2251 if (ha->isp_ops->abort_command(sp)) { qla24xx_bsg_timeout() 2264 spin_lock_irqsave(&ha->hardware_lock, flags); qla24xx_bsg_timeout() 2270 spin_unlock_irqrestore(&ha->hardware_lock, flags); qla24xx_bsg_timeout() 2276 spin_unlock_irqrestore(&ha->hardware_lock, flags); qla24xx_bsg_timeout()
H A D	qla_isr.c	35 struct qla_hw_data *ha; qla2100_intr_handler() local 51 ha = rsp->hw; qla2100_intr_handler() 52 reg = &ha->iobase->isp; qla2100_intr_handler() 55 spin_lock_irqsave(&ha->hardware_lock, flags); qla2100_intr_handler() 56 vha = pci_get_drvdata(ha->pdev); qla2100_intr_handler() 62 if (pci_channel_offline(ha->pdev)) qla2100_intr_handler() 73 ha->isp_ops->fw_dump(vha, 1); qla2100_intr_handler() 84 mb[0] = RD_MAILBOX_REG(ha, reg, 0); qla2100_intr_handler() 89 mb[1] = RD_MAILBOX_REG(ha, reg, 1); qla2100_intr_handler() 90 mb[2] = RD_MAILBOX_REG(ha, reg, 2); qla2100_intr_handler() 91 mb[3] = RD_MAILBOX_REG(ha, reg, 3); qla2100_intr_handler() 109 qla2x00_handle_mbx_completion(ha, status); qla2100_intr_handler() 110 spin_unlock_irqrestore(&ha->hardware_lock, flags); qla2100_intr_handler() 161 struct qla_hw_data *ha; qla2300_intr_handler() local 171 ha = rsp->hw; qla2300_intr_handler() 172 reg = &ha->iobase->isp; qla2300_intr_handler() 175 spin_lock_irqsave(&ha->hardware_lock, flags); qla2300_intr_handler() 176 vha = pci_get_drvdata(ha->pdev); qla2300_intr_handler() 182 if (unlikely(pci_channel_offline(ha->pdev))) qla2300_intr_handler() 204 ha->isp_ops->fw_dump(vha, 1); qla2300_intr_handler() 223 mb[1] = RD_MAILBOX_REG(ha, reg, 1); qla2300_intr_handler() 224 mb[2] = RD_MAILBOX_REG(ha, reg, 2); qla2300_intr_handler() 225 mb[3] = RD_MAILBOX_REG(ha, reg, 3); qla2300_intr_handler() 239 mb[2] = RD_MAILBOX_REG(ha, reg, 2); qla2300_intr_handler() 250 qla2x00_handle_mbx_completion(ha, status); qla2300_intr_handler() 251 spin_unlock_irqrestore(&ha->hardware_lock, flags); qla2300_intr_handler() 258 * @ha: SCSI driver HA context 267 struct qla_hw_data *ha = vha->hw; qla2x00_mbx_completion() local 268 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; qla2x00_mbx_completion() 271 mboxes = (1 << ha->mbx_count) - 1; qla2x00_mbx_completion() 272 if (!ha->mcp) qla2x00_mbx_completion() 275 mboxes = ha->mcp->in_mb; qla2x00_mbx_completion() 278 ha->flags.mbox_int = 1; qla2x00_mbx_completion() 279 ha->mailbox_out[0] = mb0; qla2x00_mbx_completion() 281 wptr = (uint16_t __iomem *)MAILBOX_REG(ha, reg, 1); qla2x00_mbx_completion() 283 for (cnt = 1; cnt < ha->mbx_count; cnt++) { qla2x00_mbx_completion() 284 if (IS_QLA2200(ha) && cnt == 8) qla2x00_mbx_completion() 285 wptr = (uint16_t __iomem *)MAILBOX_REG(ha, reg, 8); qla2x00_mbx_completion() 287 ha->mailbox_out[cnt] = qla2x00_debounce_register(wptr); qla2x00_mbx_completion() 289 ha->mailbox_out[cnt] = RD_REG_WORD(wptr); qla2x00_mbx_completion() 359 qla2x00_get_link_speed_str(struct qla_hw_data *ha, uint16_t speed) qla2x00_get_link_speed_str() argument 366 if (IS_QLA2100(ha) || IS_QLA2200(ha)) qla2x00_get_link_speed_str() 379 struct qla_hw_data *ha = vha->hw; qla83xx_handle_8200_aen() local 401 ha->flags.nic_core_hung = 1; qla83xx_handle_8200_aen() 532 if (ha->flags.nic_core_reset_owner) qla83xx_handle_8200_aen() 541 struct qla_hw_data *ha = vha->hw; qla2x00_is_a_vp_did() local 547 if (!ha->num_vhosts) qla2x00_is_a_vp_did() 550 spin_lock_irqsave(&ha->vport_slock, flags); qla2x00_is_a_vp_did() 551 list_for_each_entry(vp, &ha->vp_list, list) { qla2x00_is_a_vp_did() 558 spin_unlock_irqrestore(&ha->vport_slock, flags); qla2x00_is_a_vp_did() 565 * @ha: SCSI driver HA context 574 struct qla_hw_data *ha = vha->hw; qla2x00_async_event() local 575 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; qla2x00_async_event() 576 struct device_reg_24xx __iomem *reg24 = &ha->iobase->isp24; qla2x00_async_event() 577 struct device_reg_82xx __iomem *reg82 = &ha->iobase->isp82; qla2x00_async_event() 584 if (IS_CNA_CAPABLE(ha)) qla2x00_async_event() 613 handles[3] = (uint32_t)RD_MAILBOX_REG(ha, reg, 6); qla2x00_async_event() 621 handles[3] = (uint32_t)RD_MAILBOX_REG(ha, reg, 6); qla2x00_async_event() 622 handles[4] = (uint32_t)RD_MAILBOX_REG(ha, reg, 7); qla2x00_async_event() 629 ((uint32_t)(RD_MAILBOX_REG(ha, reg, 7) << 16)) | qla2x00_async_event() 630 RD_MAILBOX_REG(ha, reg, 6)); qla2x00_async_event() 656 mbx = (IS_QLA81XX(ha) || IS_QLA83XX(ha) || IS_QLA27XX(ha)) ? qla2x00_async_event() 662 ha->isp_ops->fw_dump(vha, 1); qla2x00_async_event() 664 if (IS_FWI2_CAPABLE(ha)) { qla2x00_async_event() 673 if ((mbx & MBX_3) && (ha->port_no == 0)) qla2x00_async_event() 731 if (IS_QLA2100(ha) || IS_QLA2200(ha)) qla2x00_async_event() 732 ha->link_data_rate = PORT_SPEED_1GB; qla2x00_async_event() 734 ha->link_data_rate = mb[1]; qla2x00_async_event() 738 qla2x00_get_link_speed_str(ha, ha->link_data_rate)); qla2x00_async_event() 741 qla2x00_post_aen_work(vha, FCH_EVT_LINKUP, ha->link_data_rate); qla2x00_async_event() 745 mbx = (IS_QLA81XX(ha) || IS_QLA8031(ha)) qla2x00_async_event() 747 mbx = (IS_P3P_TYPE(ha)) ? RD_REG_WORD(&reg82->mailbox_out[4]) qla2x00_async_event() 762 if (ha->flags.fawwpn_enabled) { qla2x00_async_event() 763 void *wwpn = ha->init_cb->port_name; qla2x00_async_event() 786 ha->link_data_rate = PORT_SPEED_UNKNOWN; qla2x00_async_event() 807 ha->operating_mode = LOOP; qla2x00_async_event() 814 if (IS_QLA2100(ha)) qla2x00_async_event() 817 if (IS_CNA_CAPABLE(ha)) { qla2x00_async_event() 821 if (ha->notify_dcbx_comp && !vha->vp_idx) qla2x00_async_event() 822 complete(&ha->dcbx_comp); qla2x00_async_event() 851 ha->flags.gpsc_supported = 1; qla2x00_async_event() 856 if (IS_QLA2100(ha)) qla2x00_async_event() 895 if (IS_QLA2XXX_MIDTYPE(ha) && qla2x00_async_event() 924 ha->link_data_rate = PORT_SPEED_UNKNOWN; qla2x00_async_event() 970 if (ha->flags.npiv_supported && vha->vp_idx != (mb[3] & 0xff)) qla2x00_async_event() 1021 if (IS_FWI2_CAPABLE(ha)) qla2x00_async_event() 1043 spin_lock_irqsave(&ha->cs84xx->access_lock, flags); qla2x00_async_event() 1051 ha->cs84xx->op_fw_version = mb[3] << 16 | mb[2]; qla2x00_async_event() 1054 ha->cs84xx->op_fw_version); qla2x00_async_event() 1057 ha->cs84xx->diag_fw_version = mb[3] << 16 | mb[2]; qla2x00_async_event() 1060 ha->cs84xx->diag_fw_version); qla2x00_async_event() 1063 ha->cs84xx->diag_fw_version = mb[3] << 16 | mb[2]; qla2x00_async_event() 1064 ha->cs84xx->fw_update = 1; qla2x00_async_event() 1067 ha->cs84xx->gold_fw_version); qla2x00_async_event() 1074 spin_unlock_irqrestore(&ha->cs84xx->access_lock, flags); qla2x00_async_event() 1092 if (IS_QLA8031(vha->hw) || IS_QLA8044(ha)) { qla2x00_async_event() 1108 if (ha->notify_lb_portup_comp && !vha->vp_idx) qla2x00_async_event() 1109 complete(&ha->lb_portup_comp); qla2x00_async_event() 1113 IS_QLA8044(ha)) qla2x00_async_event() 1141 if (!vha->vp_idx && ha->num_vhosts) qla2x00_async_event() 1147 * @ha: SCSI driver HA context 1155 struct qla_hw_data *ha = vha->hw; qla2x00_process_completed_request() local 1162 if (IS_P3P_TYPE(ha)) qla2x00_process_completed_request() 1175 sp->done(ha, sp, DID_OK << 16); qla2x00_process_completed_request() 1179 if (IS_P3P_TYPE(ha)) qla2x00_process_completed_request() 1190 struct qla_hw_data *ha = vha->hw; qla2x00_get_sp_from_handle() local 1199 if (IS_P3P_TYPE(ha)) qla2x00_get_sp_from_handle() 1596 * @ha: SCSI driver HA context 1602 struct qla_hw_data *ha = rsp->hw; qla2x00_process_response_queue() local 1603 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; qla2x00_process_response_queue() 1608 vha = pci_get_drvdata(ha->pdev); qla2x00_process_response_queue() 1672 WRT_REG_WORD(ISP_RSP_Q_OUT(ha, reg), rsp->ring_index); qla2x00_process_response_queue() 1852 struct qla_hw_data *ha = vha->hw; qla25xx_process_bidir_status_iocb() local 1886 if (IS_FWI2_CAPABLE(ha)) { qla25xx_process_bidir_status_iocb() 1996 * @ha: SCSI driver HA context 2015 struct qla_hw_data *ha = vha->hw; qla2x00_status_entry() local 2026 if (IS_FWI2_CAPABLE(ha)) { qla2x00_status_entry() 2036 req = ha->req_q_map[que]; qla2x00_status_entry() 2040 que >= find_first_zero_bit(ha->req_qid_map, ha->max_req_queues)) { qla2x00_status_entry() 2058 if (IS_P3P_TYPE(ha)) qla2x00_status_entry() 2102 if (IS_FWI2_CAPABLE(ha)) { qla2x00_status_entry() 2133 if (IS_FWI2_CAPABLE(ha)) { qla2x00_status_entry() 2148 if (IS_FWI2_CAPABLE(ha) && comp_status == CS_COMPLETE && qla2x00_status_entry() 2207 resid = IS_FWI2_CAPABLE(ha) ? fw_resid_len : resid_len; qla2x00_status_entry() 2210 if (IS_FWI2_CAPABLE(ha) && fw_resid_len != resid_len) { qla2x00_status_entry() 2294 if (IS_FWI2_CAPABLE(ha)) qla2x00_status_entry() 2323 if (!IS_PI_SPLIT_DET_CAPABLE(ha)) qla2x00_status_entry() 2350 sp->done(ha, sp, res); qla2x00_status_entry() 2355 * @ha: SCSI driver HA context 2364 struct qla_hw_data *ha = rsp->hw; qla2x00_status_cont_entry() local 2365 struct scsi_qla_host *vha = pci_get_drvdata(ha->pdev); qla2x00_status_cont_entry() 2392 if (IS_FWI2_CAPABLE(ha)) qla2x00_status_cont_entry() 2407 sp->done(ha, sp, cp->result); qla2x00_status_cont_entry() 2413 * @ha: SCSI driver HA context 2420 struct qla_hw_data *ha = vha->hw; qla2x00_error_entry() local 2429 if (que >= ha->max_req_queues || !ha->req_q_map[que]) qla2x00_error_entry() 2432 req = ha->req_q_map[que]; qla2x00_error_entry() 2439 sp->done(ha, sp, res); qla2x00_error_entry() 2446 if (IS_P3P_TYPE(ha)) qla2x00_error_entry() 2455 * @ha: SCSI driver HA context 2464 struct qla_hw_data *ha = vha->hw; qla24xx_mbx_completion() local 2465 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; qla24xx_mbx_completion() 2468 mboxes = (1 << ha->mbx_count) - 1; qla24xx_mbx_completion() 2469 if (!ha->mcp) qla24xx_mbx_completion() 2472 mboxes = ha->mcp->in_mb; qla24xx_mbx_completion() 2475 ha->flags.mbox_int = 1; qla24xx_mbx_completion() 2476 ha->mailbox_out[0] = mb0; qla24xx_mbx_completion() 2480 for (cnt = 1; cnt < ha->mbx_count; cnt++) { qla24xx_mbx_completion() 2482 ha->mailbox_out[cnt] = RD_REG_WORD(wptr); qla24xx_mbx_completion() 2508 * @ha: SCSI driver HA context 2514 struct qla_hw_data *ha = vha->hw; qla24xx_process_response_queue() local 2594 if (IS_P3P_TYPE(ha)) { qla24xx_process_response_queue() 2595 struct device_reg_82xx __iomem *reg = &ha->iobase->isp82; qla24xx_process_response_queue() 2606 struct qla_hw_data *ha = vha->hw; qla2xxx_check_risc_status() local 2607 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; qla2xxx_check_risc_status() 2609 if (!IS_QLA25XX(ha) && !IS_QLA81XX(ha) && !IS_QLA83XX(ha) && qla2xxx_check_risc_status() 2610 !IS_QLA27XX(ha)) qla2xxx_check_risc_status() 2664 struct qla_hw_data *ha; qla24xx_intr_handler() local 2681 ha = rsp->hw; qla24xx_intr_handler() 2682 reg = &ha->iobase->isp24; qla24xx_intr_handler() 2685 if (unlikely(pci_channel_offline(ha->pdev))) qla24xx_intr_handler() 2688 spin_lock_irqsave(&ha->hardware_lock, flags); qla24xx_intr_handler() 2689 vha = pci_get_drvdata(ha->pdev); qla24xx_intr_handler() 2695 if (unlikely(pci_channel_offline(ha->pdev))) qla24xx_intr_handler() 2706 ha->isp_ops->fw_dump(vha, 1); qla24xx_intr_handler() 2746 if (unlikely(IS_QLA83XX(ha) && (ha->pdev->revision == 1))) qla24xx_intr_handler() 2749 qla2x00_handle_mbx_completion(ha, status); qla24xx_intr_handler() 2750 spin_unlock_irqrestore(&ha->hardware_lock, flags); qla24xx_intr_handler() 2758 struct qla_hw_data *ha; qla24xx_msix_rsp_q() local 2771 ha = rsp->hw; qla24xx_msix_rsp_q() 2772 reg = &ha->iobase->isp24; qla24xx_msix_rsp_q() 2774 spin_lock_irqsave(&ha->hardware_lock, flags); qla24xx_msix_rsp_q() 2776 vha = pci_get_drvdata(ha->pdev); qla24xx_msix_rsp_q() 2785 if (!ha->flags.disable_msix_handshake) { qla24xx_msix_rsp_q() 2790 spin_unlock_irqrestore(&ha->hardware_lock, flags); qla24xx_msix_rsp_q() 2798 struct qla_hw_data *ha; qla25xx_msix_rsp_q() local 2811 ha = rsp->hw; qla25xx_msix_rsp_q() 2812 vha = pci_get_drvdata(ha->pdev); qla25xx_msix_rsp_q() 2815 if (!ha->flags.disable_msix_handshake) { qla25xx_msix_rsp_q() 2816 reg = &ha->iobase->isp24; qla25xx_msix_rsp_q() 2817 spin_lock_irqsave(&ha->hardware_lock, flags); qla25xx_msix_rsp_q() 2820 spin_unlock_irqrestore(&ha->hardware_lock, flags); qla25xx_msix_rsp_q() 2824 queue_work_on((int) (rsp->id - 1), ha->wq, &rsp->q_work); qla25xx_msix_rsp_q() 2834 struct qla_hw_data *ha; qla24xx_msix_default() local 2849 ha = rsp->hw; qla24xx_msix_default() 2850 reg = &ha->iobase->isp24; qla24xx_msix_default() 2853 spin_lock_irqsave(&ha->hardware_lock, flags); qla24xx_msix_default() 2854 vha = pci_get_drvdata(ha->pdev); qla24xx_msix_default() 2860 if (unlikely(pci_channel_offline(ha->pdev))) qla24xx_msix_default() 2871 ha->isp_ops->fw_dump(vha, 1); qla24xx_msix_default() 2911 qla2x00_handle_mbx_completion(ha, status); qla24xx_msix_default() 2912 spin_unlock_irqrestore(&ha->hardware_lock, flags); qla24xx_msix_default() 2942 qla24xx_disable_msix(struct qla_hw_data *ha) qla24xx_disable_msix() argument 2946 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); qla24xx_disable_msix() 2948 for (i = 0; i < ha->msix_count; i++) { qla24xx_disable_msix() 2949 qentry = &ha->msix_entries[i]; qla24xx_disable_msix() 2953 pci_disable_msix(ha->pdev); qla24xx_disable_msix() 2954 kfree(ha->msix_entries); qla24xx_disable_msix() 2955 ha->msix_entries = NULL; qla24xx_disable_msix() 2956 ha->flags.msix_enabled = 0; qla24xx_disable_msix() 2962 qla24xx_enable_msix(struct qla_hw_data *ha, struct rsp_que *rsp) qla24xx_enable_msix() argument 2969 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); qla24xx_enable_msix() 2971 entries = kzalloc(sizeof(struct msix_entry) * ha->msix_count, qla24xx_enable_msix() 2979 for (i = 0; i < ha->msix_count; i++) qla24xx_enable_msix() 2982 ret = pci_enable_msix_range(ha->pdev, qla24xx_enable_msix() 2983 entries, MIN_MSIX_COUNT, ha->msix_count); qla24xx_enable_msix() 2988 ha->msix_count, ret); qla24xx_enable_msix() 2990 } else if (ret < ha->msix_count) { qla24xx_enable_msix() 2994 ha->msix_count, ret, ret); qla24xx_enable_msix() 2995 ha->msix_count = ret; qla24xx_enable_msix() 2996 ha->max_rsp_queues = ha->msix_count - 1; qla24xx_enable_msix() 2998 ha->msix_entries = kzalloc(sizeof(struct qla_msix_entry) * qla24xx_enable_msix() 2999 ha->msix_count, GFP_KERNEL); qla24xx_enable_msix() 3000 if (!ha->msix_entries) { qla24xx_enable_msix() 3002 "Failed to allocate memory for ha->msix_entries.\n"); qla24xx_enable_msix() 3006 ha->flags.msix_enabled = 1; qla24xx_enable_msix() 3008 for (i = 0; i < ha->msix_count; i++) { qla24xx_enable_msix() 3009 qentry = &ha->msix_entries[i]; qla24xx_enable_msix() 3018 qentry = &ha->msix_entries[i]; qla24xx_enable_msix() 3019 if (IS_P3P_TYPE(ha)) qla24xx_enable_msix() 3038 if (QLA_TGT_MODE_ENABLED() && IS_ATIO_MSIX_CAPABLE(ha)) { qla24xx_enable_msix() 3039 qentry = &ha->msix_entries[ATIO_VECTOR]; qla24xx_enable_msix() 3053 qla24xx_disable_msix(ha); qla24xx_enable_msix() 3054 ha->mqenable = 0; qla24xx_enable_msix() 3059 if (IS_QLA83XX(ha) || IS_QLA27XX(ha)) { qla24xx_enable_msix() 3060 if (ha->msixbase && ha->mqiobase && qla24xx_enable_msix() 3061 (ha->max_rsp_queues > 1 || ha->max_req_queues > 1)) qla24xx_enable_msix() 3062 ha->mqenable = 1; qla24xx_enable_msix() 3064 if (ha->mqiobase qla24xx_enable_msix() 3065 && (ha->max_rsp_queues > 1 || ha->max_req_queues > 1)) qla24xx_enable_msix() 3066 ha->mqenable = 1; qla24xx_enable_msix() 3069 ha->mqiobase, ha->max_rsp_queues, ha->max_req_queues); qla24xx_enable_msix() 3072 ha->mqiobase, ha->max_rsp_queues, ha->max_req_queues); qla24xx_enable_msix() 3080 qla2x00_request_irqs(struct qla_hw_data *ha, struct rsp_que *rsp) qla2x00_request_irqs() argument 3083 device_reg_t *reg = ha->iobase; qla2x00_request_irqs() 3084 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); qla2x00_request_irqs() 3087 if (!IS_QLA2432(ha) && !IS_QLA2532(ha) && !IS_QLA8432(ha) && qla2x00_request_irqs() 3088 !IS_CNA_CAPABLE(ha) && !IS_QLA2031(ha) && !IS_QLAFX00(ha) && qla2x00_request_irqs() 3089 !IS_QLA27XX(ha)) qla2x00_request_irqs() 3092 if (ha->pdev->subsystem_vendor == PCI_VENDOR_ID_HP && qla2x00_request_irqs() 3093 (ha->pdev->subsystem_device == 0x7040 || qla2x00_request_irqs() 3094 ha->pdev->subsystem_device == 0x7041 || qla2x00_request_irqs() 3095 ha->pdev->subsystem_device == 0x1705)) { qla2x00_request_irqs() 3098 ha->pdev->subsystem_vendor, qla2x00_request_irqs() 3099 ha->pdev->subsystem_device); qla2x00_request_irqs() 3103 if (IS_QLA2432(ha) && (ha->pdev->revision < QLA_MSIX_CHIP_REV_24XX)) { qla2x00_request_irqs() 3106 ha->pdev->revision, QLA_MSIX_CHIP_REV_24XX); qla2x00_request_irqs() 3110 ret = qla24xx_enable_msix(ha, rsp); qla2x00_request_irqs() 3114 ha->chip_revision, ha->fw_attributes); qla2x00_request_irqs() 3123 if (!IS_QLA24XX(ha) && !IS_QLA2532(ha) && !IS_QLA8432(ha) && qla2x00_request_irqs() 3124 !IS_QLA8001(ha) && !IS_P3P_TYPE(ha) && !IS_QLAFX00(ha) && qla2x00_request_irqs() 3125 !IS_QLA27XX(ha)) qla2x00_request_irqs() 3128 ret = pci_enable_msi(ha->pdev); qla2x00_request_irqs() 3132 ha->flags.msi_enabled = 1; qla2x00_request_irqs() 3139 if (!ha->flags.msi_enabled && IS_QLA82XX(ha)) qla2x00_request_irqs() 3142 ret = request_irq(ha->pdev->irq, ha->isp_ops->intr_handler, qla2x00_request_irqs() 3143 ha->flags.msi_enabled ? 0 : IRQF_SHARED, qla2x00_request_irqs() 3148 ha->pdev->irq); qla2x00_request_irqs() 3150 } else if (!ha->flags.msi_enabled) { qla2x00_request_irqs() 3153 ha->flags.mr_intr_valid = 1; qla2x00_request_irqs() 3157 if (IS_FWI2_CAPABLE(ha) || IS_QLAFX00(ha)) qla2x00_request_irqs() 3160 spin_lock_irq(&ha->hardware_lock); qla2x00_request_irqs() 3162 spin_unlock_irq(&ha->hardware_lock); qla2x00_request_irqs() 3171 struct qla_hw_data *ha = vha->hw; qla2x00_free_irqs() local 3175 * We need to check that ha->rsp_q_map is valid in case we are called qla2x00_free_irqs() 3178 if (!ha->rsp_q_map || !ha->rsp_q_map[0]) qla2x00_free_irqs() 3180 rsp = ha->rsp_q_map[0]; qla2x00_free_irqs() 3182 if (ha->flags.msix_enabled) qla2x00_free_irqs() 3183 qla24xx_disable_msix(ha); qla2x00_free_irqs() 3184 else if (ha->flags.msi_enabled) { qla2x00_free_irqs() 3185 free_irq(ha->pdev->irq, rsp); qla2x00_free_irqs() 3186 pci_disable_msi(ha->pdev); qla2x00_free_irqs() 3188 free_irq(ha->pdev->irq, rsp); qla2x00_free_irqs() 3194 struct qla_hw_data *ha = rsp->hw; qla25xx_request_irq() local 3197 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); qla25xx_request_irq()
H A D	qla_gs.c	20 * @ha: HA context 24 * Returns a pointer to the @ha's ms_iocb. 29 struct qla_hw_data *ha = vha->hw; qla2x00_prep_ms_iocb() local 32 ms_pkt = ha->ms_iocb; qla2x00_prep_ms_iocb() 37 SET_TARGET_ID(ha, ms_pkt->loop_id, SIMPLE_NAME_SERVER); qla2x00_prep_ms_iocb() 39 ms_pkt->timeout = cpu_to_le16(ha->r_a_tov / 10 * 2); qla2x00_prep_ms_iocb() 45 ms_pkt->dseg_req_address[0] = cpu_to_le32(LSD(ha->ct_sns_dma)); qla2x00_prep_ms_iocb() 46 ms_pkt->dseg_req_address[1] = cpu_to_le32(MSD(ha->ct_sns_dma)); qla2x00_prep_ms_iocb() 49 ms_pkt->dseg_rsp_address[0] = cpu_to_le32(LSD(ha->ct_sns_dma)); qla2x00_prep_ms_iocb() 50 ms_pkt->dseg_rsp_address[1] = cpu_to_le32(MSD(ha->ct_sns_dma)); qla2x00_prep_ms_iocb() 60 * @ha: HA context 64 * Returns a pointer to the @ha's ms_iocb. 69 struct qla_hw_data *ha = vha->hw; qla24xx_prep_ms_iocb() local 72 ct_pkt = (struct ct_entry_24xx *)ha->ms_iocb; qla24xx_prep_ms_iocb() 78 ct_pkt->timeout = cpu_to_le16(ha->r_a_tov / 10 * 2); qla24xx_prep_ms_iocb() 84 ct_pkt->dseg_0_address[0] = cpu_to_le32(LSD(ha->ct_sns_dma)); qla24xx_prep_ms_iocb() 85 ct_pkt->dseg_0_address[1] = cpu_to_le32(MSD(ha->ct_sns_dma)); qla24xx_prep_ms_iocb() 88 ct_pkt->dseg_1_address[0] = cpu_to_le32(LSD(ha->ct_sns_dma)); qla24xx_prep_ms_iocb() 89 ct_pkt->dseg_1_address[1] = cpu_to_le32(MSD(ha->ct_sns_dma)); qla24xx_prep_ms_iocb() 126 struct qla_hw_data *ha = vha->hw; qla2x00_chk_ms_status() local 135 if (IS_FWI2_CAPABLE(ha)) qla2x00_chk_ms_status() 172 * @ha: HA context 185 struct qla_hw_data *ha = vha->hw; qla2x00_ga_nxt() local 187 if (IS_QLA2100(ha) || IS_QLA2200(ha)) qla2x00_ga_nxt() 192 ms_pkt = ha->isp_ops->prep_ms_iocb(vha, GA_NXT_REQ_SIZE, qla2x00_ga_nxt() 196 ct_req = qla2x00_prep_ct_req(ha->ct_sns, GA_NXT_CMD, qla2x00_ga_nxt() 198 ct_rsp = &ha->ct_sns->p.rsp; qla2x00_ga_nxt() 206 rval = qla2x00_issue_iocb(vha, ha->ms_iocb, ha->ms_iocb_dma, qla2x00_ga_nxt() 252 * @ha: HA context 270 struct qla_hw_data *ha = vha->hw; qla2x00_gid_pt() local 273 if (IS_QLA2100(ha) || IS_QLA2200(ha)) qla2x00_gid_pt() 280 ms_pkt = ha->isp_ops->prep_ms_iocb(vha, GID_PT_REQ_SIZE, qla2x00_gid_pt() 284 ct_req = qla2x00_prep_ct_req(ha->ct_sns, GID_PT_CMD, gid_pt_rsp_size); qla2x00_gid_pt() 285 ct_rsp = &ha->ct_sns->p.rsp; qla2x00_gid_pt() 291 rval = qla2x00_issue_iocb(vha, ha->ms_iocb, ha->ms_iocb_dma, qla2x00_gid_pt() 302 for (i = 0; i < ha->max_fibre_devices; i++) { qla2x00_gid_pt() 323 if (i == ha->max_fibre_devices) qla2x00_gid_pt() 332 * @ha: HA context 346 struct qla_hw_data *ha = vha->hw; qla2x00_gpn_id() local 348 if (IS_QLA2100(ha) || IS_QLA2200(ha)) qla2x00_gpn_id() 351 for (i = 0; i < ha->max_fibre_devices; i++) { qla2x00_gpn_id() 354 ms_pkt = ha->isp_ops->prep_ms_iocb(vha, GPN_ID_REQ_SIZE, qla2x00_gpn_id() 358 ct_req = qla2x00_prep_ct_req(ha->ct_sns, GPN_ID_CMD, qla2x00_gpn_id() 360 ct_rsp = &ha->ct_sns->p.rsp; qla2x00_gpn_id() 368 rval = qla2x00_issue_iocb(vha, ha->ms_iocb, ha->ms_iocb_dma, qla2x00_gpn_id() 395 * @ha: HA context 405 struct qla_hw_data *ha = vha->hw; qla2x00_gnn_id() local 410 if (IS_QLA2100(ha) || IS_QLA2200(ha)) qla2x00_gnn_id() 413 for (i = 0; i < ha->max_fibre_devices; i++) { qla2x00_gnn_id() 416 ms_pkt = ha->isp_ops->prep_ms_iocb(vha, GNN_ID_REQ_SIZE, qla2x00_gnn_id() 420 ct_req = qla2x00_prep_ct_req(ha->ct_sns, GNN_ID_CMD, qla2x00_gnn_id() 422 ct_rsp = &ha->ct_sns->p.rsp; qla2x00_gnn_id() 430 rval = qla2x00_issue_iocb(vha, ha->ms_iocb, ha->ms_iocb_dma, qla2x00_gnn_id() 464 * @ha: HA context 472 struct qla_hw_data *ha = vha->hw; qla2x00_rft_id() local 477 if (IS_QLA2100(ha) || IS_QLA2200(ha)) qla2x00_rft_id() 482 ms_pkt = ha->isp_ops->prep_ms_iocb(vha, RFT_ID_REQ_SIZE, qla2x00_rft_id() 486 ct_req = qla2x00_prep_ct_req(ha->ct_sns, RFT_ID_CMD, qla2x00_rft_id() 488 ct_rsp = &ha->ct_sns->p.rsp; qla2x00_rft_id() 498 rval = qla2x00_issue_iocb(vha, ha->ms_iocb, ha->ms_iocb_dma, qla2x00_rft_id() 517 * @ha: HA context 525 struct qla_hw_data *ha = vha->hw; qla2x00_rff_id() local 530 if (IS_QLA2100(ha) || IS_QLA2200(ha)) { qla2x00_rff_id() 538 ms_pkt = ha->isp_ops->prep_ms_iocb(vha, RFF_ID_REQ_SIZE, qla2x00_rff_id() 542 ct_req = qla2x00_prep_ct_req(ha->ct_sns, RFF_ID_CMD, qla2x00_rff_id() 544 ct_rsp = &ha->ct_sns->p.rsp; qla2x00_rff_id() 556 rval = qla2x00_issue_iocb(vha, ha->ms_iocb, ha->ms_iocb_dma, qla2x00_rff_id() 575 * @ha: HA context 583 struct qla_hw_data *ha = vha->hw; qla2x00_rnn_id() local 588 if (IS_QLA2100(ha) || IS_QLA2200(ha)) qla2x00_rnn_id() 593 ms_pkt = ha->isp_ops->prep_ms_iocb(vha, RNN_ID_REQ_SIZE, qla2x00_rnn_id() 597 ct_req = qla2x00_prep_ct_req(ha->ct_sns, RNN_ID_CMD, RNN_ID_RSP_SIZE); qla2x00_rnn_id() 598 ct_rsp = &ha->ct_sns->p.rsp; qla2x00_rnn_id() 608 rval = qla2x00_issue_iocb(vha, ha->ms_iocb, ha->ms_iocb_dma, qla2x00_rnn_id() 628 struct qla_hw_data *ha = vha->hw; qla2x00_get_sym_node_name() local 630 if (IS_QLAFX00(ha)) qla2x00_get_sym_node_name() 631 snprintf(snn, size, "%s FW:v%s DVR:v%s", ha->model_number, qla2x00_get_sym_node_name() 632 ha->mr.fw_version, qla2x00_version_str); qla2x00_get_sym_node_name() 635 "%s FW:v%d.%02d.%02d DVR:v%s", ha->model_number, qla2x00_get_sym_node_name() 636 ha->fw_major_version, ha->fw_minor_version, qla2x00_get_sym_node_name() 637 ha->fw_subminor_version, qla2x00_version_str); qla2x00_get_sym_node_name() 642 * @ha: HA context 650 struct qla_hw_data *ha = vha->hw; qla2x00_rsnn_nn() local 655 if (IS_QLA2100(ha) || IS_QLA2200(ha)) { qla2x00_rsnn_nn() 664 ms_pkt = ha->isp_ops->prep_ms_iocb(vha, 0, RSNN_NN_RSP_SIZE); qla2x00_rsnn_nn() 667 ct_req = qla2x00_prep_ct_req(ha->ct_sns, RSNN_NN_CMD, qla2x00_rsnn_nn() 669 ct_rsp = &ha->ct_sns->p.rsp; qla2x00_rsnn_nn() 688 rval = qla2x00_issue_iocb(vha, ha->ms_iocb, ha->ms_iocb_dma, qla2x00_rsnn_nn() 707 * @ha: HA context 712 * Returns a pointer to the @ha's sns_cmd. 720 struct qla_hw_data *ha = vha->hw; qla2x00_prep_sns_cmd() local 722 sns_cmd = ha->sns_cmd; qla2x00_prep_sns_cmd() 726 sns_cmd->p.cmd.buffer_address[0] = cpu_to_le32(LSD(ha->sns_cmd_dma)); qla2x00_prep_sns_cmd() 727 sns_cmd->p.cmd.buffer_address[1] = cpu_to_le32(MSD(ha->sns_cmd_dma)); qla2x00_prep_sns_cmd() 740 * @ha: HA context 751 struct qla_hw_data *ha = vha->hw; qla2x00_sns_ga_nxt() local 765 rval = qla2x00_send_sns(vha, ha->sns_cmd_dma, GA_NXT_SNS_CMD_SIZE / 2, qla2x00_sns_ga_nxt() 804 * @ha: HA context 817 struct qla_hw_data *ha = vha->hw; qla2x00_sns_gid_pt() local 834 rval = qla2x00_send_sns(vha, ha->sns_cmd_dma, GID_PT_SNS_CMD_SIZE / 2, qla2x00_sns_gid_pt() 849 for (i = 0; i < ha->max_fibre_devices; i++) { qla2x00_sns_gid_pt() 868 if (i == ha->max_fibre_devices) qla2x00_sns_gid_pt() 877 * @ha: HA context 888 struct qla_hw_data *ha = vha->hw; qla2x00_sns_gpn_id() local 892 for (i = 0; i < ha->max_fibre_devices; i++) { qla2x00_sns_gpn_id() 904 rval = qla2x00_send_sns(vha, ha->sns_cmd_dma, qla2x00_sns_gpn_id() 933 * @ha: HA context 944 struct qla_hw_data *ha = vha->hw; qla2x00_sns_gnn_id() local 948 for (i = 0; i < ha->max_fibre_devices; i++) { qla2x00_sns_gnn_id() 960 rval = qla2x00_send_sns(vha, ha->sns_cmd_dma, qla2x00_sns_gnn_id() 996 * @ha: HA context 1006 struct qla_hw_data *ha = vha->hw; qla2x00_sns_rft_id() local 1022 rval = qla2x00_send_sns(vha, ha->sns_cmd_dma, RFT_ID_SNS_CMD_SIZE / 2, qla2x00_sns_rft_id() 1046 * @ha: HA context 1056 struct qla_hw_data *ha = vha->hw; qla2x00_sns_rnn_id() local 1079 rval = qla2x00_send_sns(vha, ha->sns_cmd_dma, RNN_ID_SNS_CMD_SIZE / 2, qla2x00_sns_rnn_id() 1102 * @ha: HA context 1111 struct qla_hw_data *ha = vha->hw; qla2x00_mgmt_svr_login() local 1116 rval = ha->isp_ops->fabric_login(vha, vha->mgmt_svr_loop_id, 0xff, 0xff, qla2x00_mgmt_svr_login() 1138 * @ha: HA context 1142 * Returns a pointer to the @ha's ms_iocb. 1149 struct qla_hw_data *ha = vha->hw; qla2x00_prep_ms_fdmi_iocb() local 1150 ms_pkt = ha->ms_iocb; qla2x00_prep_ms_fdmi_iocb() 1155 SET_TARGET_ID(ha, ms_pkt->loop_id, vha->mgmt_svr_loop_id); qla2x00_prep_ms_fdmi_iocb() 1157 ms_pkt->timeout = cpu_to_le16(ha->r_a_tov / 10 * 2); qla2x00_prep_ms_fdmi_iocb() 1163 ms_pkt->dseg_req_address[0] = cpu_to_le32(LSD(ha->ct_sns_dma)); qla2x00_prep_ms_fdmi_iocb() 1164 ms_pkt->dseg_req_address[1] = cpu_to_le32(MSD(ha->ct_sns_dma)); qla2x00_prep_ms_fdmi_iocb() 1167 ms_pkt->dseg_rsp_address[0] = cpu_to_le32(LSD(ha->ct_sns_dma)); qla2x00_prep_ms_fdmi_iocb() 1168 ms_pkt->dseg_rsp_address[1] = cpu_to_le32(MSD(ha->ct_sns_dma)); qla2x00_prep_ms_fdmi_iocb() 1176 * @ha: HA context 1180 * Returns a pointer to the @ha's ms_iocb. 1187 struct qla_hw_data *ha = vha->hw; qla24xx_prep_ms_fdmi_iocb() local 1189 ct_pkt = (struct ct_entry_24xx *)ha->ms_iocb; qla24xx_prep_ms_fdmi_iocb() 1195 ct_pkt->timeout = cpu_to_le16(ha->r_a_tov / 10 * 2); qla24xx_prep_ms_fdmi_iocb() 1201 ct_pkt->dseg_0_address[0] = cpu_to_le32(LSD(ha->ct_sns_dma)); qla24xx_prep_ms_fdmi_iocb() 1202 ct_pkt->dseg_0_address[1] = cpu_to_le32(MSD(ha->ct_sns_dma)); qla24xx_prep_ms_fdmi_iocb() 1205 ct_pkt->dseg_1_address[0] = cpu_to_le32(LSD(ha->ct_sns_dma)); qla24xx_prep_ms_fdmi_iocb() 1206 ct_pkt->dseg_1_address[1] = cpu_to_le32(MSD(ha->ct_sns_dma)); qla24xx_prep_ms_fdmi_iocb() 1216 struct qla_hw_data *ha = vha->hw; qla2x00_update_ms_fdmi_iocb() local 1217 ms_iocb_entry_t *ms_pkt = ha->ms_iocb; qla2x00_update_ms_fdmi_iocb() 1218 struct ct_entry_24xx *ct_pkt = (struct ct_entry_24xx *)ha->ms_iocb; qla2x00_update_ms_fdmi_iocb() 1220 if (IS_FWI2_CAPABLE(ha)) { qla2x00_update_ms_fdmi_iocb() 1256 * @ha: HA context 1271 struct qla_hw_data *ha = vha->hw; qla2x00_fdmi_rhba() local 1276 ms_pkt = ha->isp_ops->prep_ms_fdmi_iocb(vha, 0, RHBA_RSP_SIZE); qla2x00_fdmi_rhba() 1279 ct_req = qla2x00_prep_ct_fdmi_req(ha->ct_sns, RHBA_CMD, RHBA_RSP_SIZE); qla2x00_fdmi_rhba() 1280 ct_rsp = &ha->ct_sns->p.rsp; qla2x00_fdmi_rhba() 1319 if (IS_FWI2_CAPABLE(ha)) qla2x00_fdmi_rhba() 1323 sn = ((ha->serial0 & 0x1f) << 16) | qla2x00_fdmi_rhba() 1324 (ha->serial2 << 8) | ha->serial1; qla2x00_fdmi_rhba() 1340 "%s", ha->model_number); qla2x00_fdmi_rhba() 1353 "%s", ha->model_desc); qla2x00_fdmi_rhba() 1365 if (!IS_FWI2_CAPABLE(ha)) { qla2x00_fdmi_rhba() 1367 "HW:%s", ha->adapter_id); qla2x00_fdmi_rhba() 1376 "HW:%s", ha->adapter_id); qla2x00_fdmi_rhba() 1403 "%d.%02d", ha->bios_revision[1], ha->bios_revision[0]); qla2x00_fdmi_rhba() 1415 ha->isp_ops->fw_version_str(vha, eiter->a.fw_version, qla2x00_fdmi_rhba() 1435 rval = qla2x00_issue_iocb(vha, ha->ms_iocb, ha->ms_iocb_dma, qla2x00_fdmi_rhba() 1466 * @ha: HA context 1475 struct qla_hw_data *ha = vha->hw; qla2x00_fdmi_rpa() local 1481 struct init_cb_24xx *icb24 = (struct init_cb_24xx *)ha->init_cb; qla2x00_fdmi_rpa() 1487 ms_pkt = ha->isp_ops->prep_ms_fdmi_iocb(vha, 0, RPA_RSP_SIZE); qla2x00_fdmi_rpa() 1490 ct_req = qla2x00_prep_ct_fdmi_req(ha->ct_sns, RPA_CMD, qla2x00_fdmi_rpa() 1492 ct_rsp = &ha->ct_sns->p.rsp; qla2x00_fdmi_rpa() 1518 if (IS_CNA_CAPABLE(ha)) qla2x00_fdmi_rpa() 1521 else if (IS_QLA27XX(ha)) qla2x00_fdmi_rpa() 1526 else if (IS_QLA2031(ha)) qla2x00_fdmi_rpa() 1531 else if (IS_QLA25XX(ha)) qla2x00_fdmi_rpa() 1537 else if (IS_QLA24XX_TYPE(ha)) qla2x00_fdmi_rpa() 1542 else if (IS_QLA23XX(ha)) qla2x00_fdmi_rpa() 1558 switch (ha->link_data_rate) { qla2x00_fdmi_rpa() 1601 eiter->a.max_frame_size = IS_FWI2_CAPABLE(ha) ? qla2x00_fdmi_rpa() 1603 le16_to_cpu(ha->init_cb->frame_payload_size); qla2x00_fdmi_rpa() 1651 rval = qla2x00_issue_iocb(vha, ha->ms_iocb, ha->ms_iocb_dma, qla2x00_fdmi_rpa() 1678 * @ha: HA context 1692 struct qla_hw_data *ha = vha->hw; qla2x00_fdmiv2_rhba() local 1693 struct init_cb_24xx *icb24 = (struct init_cb_24xx *)ha->init_cb; qla2x00_fdmiv2_rhba() 1699 ms_pkt = ha->isp_ops->prep_ms_fdmi_iocb(vha, 0, RHBA_RSP_SIZE); qla2x00_fdmiv2_rhba() 1702 ct_req = qla2x00_prep_ct_fdmi_req(ha->ct_sns, RHBA_CMD, qla2x00_fdmiv2_rhba() 1704 ct_rsp = &ha->ct_sns->p.rsp; qla2x00_fdmiv2_rhba() 1743 if (IS_FWI2_CAPABLE(ha)) qla2x00_fdmiv2_rhba() 1747 sn = ((ha->serial0 & 0x1f) << 16) | qla2x00_fdmiv2_rhba() 1748 (ha->serial2 << 8) | ha->serial1; qla2x00_fdmiv2_rhba() 1764 "%s", ha->model_number); qla2x00_fdmiv2_rhba() 1777 "%s", ha->model_desc); qla2x00_fdmiv2_rhba() 1789 if (!IS_FWI2_CAPABLE(ha)) { qla2x00_fdmiv2_rhba() 1791 "HW:%s", ha->adapter_id); qla2x00_fdmiv2_rhba() 1800 "HW:%s", ha->adapter_id); qla2x00_fdmiv2_rhba() 1827 "%d.%02d", ha->bios_revision[1], ha->bios_revision[0]); qla2x00_fdmiv2_rhba() 1840 ha->isp_ops->fw_version_str(vha, eiter->a.fw_version, qla2x00_fdmiv2_rhba() 1873 eiter->a.max_ct_len = IS_FWI2_CAPABLE(ha) ? qla2x00_fdmiv2_rhba() 1875 le16_to_cpu(ha->init_cb->frame_payload_size); qla2x00_fdmiv2_rhba() 1930 "BIOS %d.%02d", ha->bios_revision[1], ha->bios_revision[0]); qla2x00_fdmiv2_rhba() 1962 rval = qla2x00_issue_iocb(vha, ha->ms_iocb, ha->ms_iocb_dma, qla2x00_fdmiv2_rhba() 1994 * @ha: HA context 2002 struct qla_hw_data *ha = vha->hw; qla2x00_fdmi_dhba() local 2009 ms_pkt = ha->isp_ops->prep_ms_fdmi_iocb(vha, DHBA_REQ_SIZE, qla2x00_fdmi_dhba() 2013 ct_req = qla2x00_prep_ct_fdmi_req(ha->ct_sns, DHBA_CMD, DHBA_RSP_SIZE); qla2x00_fdmi_dhba() 2014 ct_rsp = &ha->ct_sns->p.rsp; qla2x00_fdmi_dhba() 2023 rval = qla2x00_issue_iocb(vha, ha->ms_iocb, ha->ms_iocb_dma, qla2x00_fdmi_dhba() 2042 * @ha: HA context 2051 struct qla_hw_data *ha = vha->hw; qla2x00_fdmiv2_rpa() local 2057 struct init_cb_24xx *icb24 = (struct init_cb_24xx *)ha->init_cb; qla2x00_fdmiv2_rpa() 2063 ms_pkt = ha->isp_ops->prep_ms_fdmi_iocb(vha, 0, RPA_RSP_SIZE); qla2x00_fdmiv2_rpa() 2066 ct_req = qla2x00_prep_ct_fdmi_req(ha->ct_sns, RPA_CMD, RPA_RSP_SIZE); qla2x00_fdmiv2_rpa() 2067 ct_rsp = &ha->ct_sns->p.rsp; qla2x00_fdmiv2_rpa() 2093 if (IS_CNA_CAPABLE(ha)) qla2x00_fdmiv2_rpa() 2096 else if (IS_QLA27XX(ha)) qla2x00_fdmiv2_rpa() 2101 else if (IS_QLA2031(ha)) qla2x00_fdmiv2_rpa() 2106 else if (IS_QLA25XX(ha)) qla2x00_fdmiv2_rpa() 2112 else if (IS_QLA24XX_TYPE(ha)) qla2x00_fdmiv2_rpa() 2117 else if (IS_QLA23XX(ha)) qla2x00_fdmiv2_rpa() 2133 switch (ha->link_data_rate) { qla2x00_fdmiv2_rpa() 2168 eiter->a.max_frame_size = IS_FWI2_CAPABLE(ha) ? qla2x00_fdmiv2_rpa() 2170 le16_to_cpu(ha->init_cb->frame_payload_size); qla2x00_fdmiv2_rpa() 2325 rval = qla2x00_issue_iocb(vha, ha->ms_iocb, ha->ms_iocb_dma, qla2x00_fdmiv2_rpa() 2356 * @ha: HA context 2364 struct qla_hw_data *ha = vha->hw; qla2x00_fdmi_register() local 2366 if (IS_QLA2100(ha) || IS_QLA2200(ha) || qla2x00_fdmi_register() 2367 IS_QLAFX00(ha)) qla2x00_fdmi_register() 2414 * @ha: HA context 2424 struct qla_hw_data *ha = vha->hw; qla2x00_gfpn_id() local 2429 if (!IS_IIDMA_CAPABLE(ha)) qla2x00_gfpn_id() 2432 for (i = 0; i < ha->max_fibre_devices; i++) { qla2x00_gfpn_id() 2435 ms_pkt = ha->isp_ops->prep_ms_iocb(vha, GFPN_ID_REQ_SIZE, qla2x00_gfpn_id() 2439 ct_req = qla2x00_prep_ct_req(ha->ct_sns, GFPN_ID_CMD, qla2x00_gfpn_id() 2441 ct_rsp = &ha->ct_sns->p.rsp; qla2x00_gfpn_id() 2449 rval = qla2x00_issue_iocb(vha, ha->ms_iocb, ha->ms_iocb_dma, qla2x00_gfpn_id() 2479 struct qla_hw_data *ha = vha->hw; qla24xx_prep_ms_fm_iocb() local 2480 ct_pkt = (struct ct_entry_24xx *)ha->ms_iocb; qla24xx_prep_ms_fm_iocb() 2486 ct_pkt->timeout = cpu_to_le16(ha->r_a_tov / 10 * 2); qla24xx_prep_ms_fm_iocb() 2492 ct_pkt->dseg_0_address[0] = cpu_to_le32(LSD(ha->ct_sns_dma)); qla24xx_prep_ms_fm_iocb() 2493 ct_pkt->dseg_0_address[1] = cpu_to_le32(MSD(ha->ct_sns_dma)); qla24xx_prep_ms_fm_iocb() 2496 ct_pkt->dseg_1_address[0] = cpu_to_le32(LSD(ha->ct_sns_dma)); qla24xx_prep_ms_fm_iocb() 2497 ct_pkt->dseg_1_address[1] = cpu_to_le32(MSD(ha->ct_sns_dma)); qla24xx_prep_ms_fm_iocb() 2522 * @ha: HA context 2532 struct qla_hw_data *ha = vha->hw; qla2x00_gpsc() local 2537 if (!IS_IIDMA_CAPABLE(ha)) qla2x00_gpsc() 2539 if (!ha->flags.gpsc_supported) qla2x00_gpsc() 2546 for (i = 0; i < ha->max_fibre_devices; i++) { qla2x00_gpsc() 2553 ct_req = qla24xx_prep_ct_fm_req(ha->ct_sns, GPSC_CMD, qla2x00_gpsc() 2555 ct_rsp = &ha->ct_sns->p.rsp; qla2x00_gpsc() 2562 rval = qla2x00_issue_iocb(vha, ha->ms_iocb, ha->ms_iocb_dma, qla2x00_gpsc() 2579 ha->flags.gpsc_supported = 0; qla2x00_gpsc() 2629 * @ha: HA context 2642 struct qla_hw_data *ha = vha->hw; qla2x00_gff_id() local 2645 for (i = 0; i < ha->max_fibre_devices; i++) { qla2x00_gff_id() 2651 if (!IS_FWI2_CAPABLE(ha)) qla2x00_gff_id() 2655 ms_pkt = ha->isp_ops->prep_ms_iocb(vha, GFF_ID_REQ_SIZE, qla2x00_gff_id() 2659 ct_req = qla2x00_prep_ct_req(ha->ct_sns, GFF_ID_CMD, qla2x00_gff_id() 2661 ct_rsp = &ha->ct_sns->p.rsp; qla2x00_gff_id() 2669 rval = qla2x00_issue_iocb(vha, ha->ms_iocb, ha->ms_iocb_dma, qla2x00_gff_id()
H A D	qla_inline.h	61 struct qla_hw_data *ha = rsp->hw; qla2x00_poll() local 63 if (IS_P3P_TYPE(ha)) qla2x00_poll() 66 ha->isp_ops->intr_handler(0, rsp); qla2x00_poll() 95 qla2x00_set_reserved_loop_ids(struct qla_hw_data *ha) qla2x00_set_reserved_loop_ids() argument 99 if (IS_FWI2_CAPABLE(ha)) qla2x00_set_reserved_loop_ids() 103 set_bit(i, ha->loop_id_map); qla2x00_set_reserved_loop_ids() 104 set_bit(MANAGEMENT_SERVER, ha->loop_id_map); qla2x00_set_reserved_loop_ids() 105 set_bit(BROADCAST, ha->loop_id_map); qla2x00_set_reserved_loop_ids() 111 struct qla_hw_data *ha = vha->hw; qla2x00_is_reserved_id() local 112 if (IS_FWI2_CAPABLE(ha)) qla2x00_is_reserved_id() 115 return ((loop_id > ha->max_loop_id && loop_id < SNS_FIRST_LOOP_ID) || qla2x00_is_reserved_id() 121 struct qla_hw_data *ha = fcport->vha->hw; qla2x00_clear_loop_id() local 127 clear_bit(fcport->loop_id, ha->loop_id_map); qla2x00_clear_loop_id() 132 qla2x00_clean_dsd_pool(struct qla_hw_data *ha, srb_t *sp, qla2x00_clean_dsd_pool() argument 150 dma_pool_free(ha->dl_dma_pool, dsd_ptr->dsd_addr, list_for_each_entry_safe() 222 struct qla_hw_data *ha = vha->hw; qla2x00_get_sp() local 229 sp = mempool_alloc(ha->srb_mempool, flag); qla2x00_get_sp() 264 qla2x00_gid_list_size(struct qla_hw_data *ha) qla2x00_gid_list_size() argument 266 if (IS_QLAFX00(ha)) qla2x00_gid_list_size() 269 return sizeof(struct gid_list_info) * ha->max_fibre_devices; qla2x00_gid_list_size() 273 qla2x00_handle_mbx_completion(struct qla_hw_data *ha, int status) qla2x00_handle_mbx_completion() argument 275 if (test_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags) && qla2x00_handle_mbx_completion() 276 (status & MBX_INTERRUPT) && ha->flags.mbox_int) { qla2x00_handle_mbx_completion() 277 set_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags); qla2x00_handle_mbx_completion() 278 clear_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags); qla2x00_handle_mbx_completion() 279 complete(&ha->mbx_intr_comp); qla2x00_handle_mbx_completion()
H A D	qla_dbg.c	84 qla2xxx_prep_dump(struct qla_hw_data *ha, struct qla2xxx_fw_dump *fw_dump) qla2xxx_prep_dump() argument 86 fw_dump->fw_major_version = htonl(ha->fw_major_version); qla2xxx_prep_dump() 87 fw_dump->fw_minor_version = htonl(ha->fw_minor_version); qla2xxx_prep_dump() 88 fw_dump->fw_subminor_version = htonl(ha->fw_subminor_version); qla2xxx_prep_dump() 89 fw_dump->fw_attributes = htonl(ha->fw_attributes); qla2xxx_prep_dump() 91 fw_dump->vendor = htonl(ha->pdev->vendor); qla2xxx_prep_dump() 92 fw_dump->device = htonl(ha->pdev->device); qla2xxx_prep_dump() 93 fw_dump->subsystem_vendor = htonl(ha->pdev->subsystem_vendor); qla2xxx_prep_dump() 94 fw_dump->subsystem_device = htonl(ha->pdev->subsystem_device); qla2xxx_prep_dump() 98 qla2xxx_copy_queues(struct qla_hw_data *ha, void *ptr) qla2xxx_copy_queues() argument 100 struct req_que *req = ha->req_q_map[0]; qla2xxx_copy_queues() 101 struct rsp_que *rsp = ha->rsp_q_map[0]; qla2xxx_copy_queues() 115 qla27xx_dump_mpi_ram(struct qla_hw_data *ha, uint32_t addr, uint32_t *ram, qla27xx_dump_mpi_ram() argument 121 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; qla27xx_dump_mpi_ram() 122 dma_addr_t dump_dma = ha->gid_list_dma; qla27xx_dump_mpi_ram() 123 uint32_t *dump = (uint32_t *)ha->gid_list; qla27xx_dump_mpi_ram() 129 clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags); qla27xx_dump_mpi_ram() 131 dwords = qla2x00_gid_list_size(ha) / 4; qla27xx_dump_mpi_ram() 151 ha->flags.mbox_int = 0; qla27xx_dump_mpi_ram() 161 &ha->mbx_cmd_flags); qla27xx_dump_mpi_ram() 178 ha->flags.mbox_int = 1; qla27xx_dump_mpi_ram() 180 if (test_and_clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags)) { qla27xx_dump_mpi_ram() 183 ram[cnt + idx] = IS_QLA27XX(ha) ? qla27xx_dump_mpi_ram() 195 qla24xx_dump_ram(struct qla_hw_data *ha, uint32_t addr, uint32_t *ram, qla24xx_dump_ram() argument 201 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; qla24xx_dump_ram() 202 dma_addr_t dump_dma = ha->gid_list_dma; qla24xx_dump_ram() 203 uint32_t *dump = (uint32_t *)ha->gid_list; qla24xx_dump_ram() 209 clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags); qla24xx_dump_ram() 211 dwords = qla2x00_gid_list_size(ha) / 4; qla24xx_dump_ram() 229 ha->flags.mbox_int = 0; qla24xx_dump_ram() 239 &ha->mbx_cmd_flags); qla24xx_dump_ram() 255 ha->flags.mbox_int = 1; qla24xx_dump_ram() 257 if (test_and_clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags)) { qla24xx_dump_ram() 260 ram[cnt + idx] = IS_QLA27XX(ha) ? qla24xx_dump_ram() 272 qla24xx_dump_memory(struct qla_hw_data *ha, uint32_t *code_ram, qla24xx_dump_memory() argument 278 rval = qla24xx_dump_ram(ha, 0x20000, code_ram, cram_size / 4, nxt); qla24xx_dump_memory() 282 set_bit(RISC_SRAM_DUMP_CMPL, &ha->fw_dump_cap_flags); qla24xx_dump_memory() 285 rval = qla24xx_dump_ram(ha, 0x100000, *nxt, qla24xx_dump_memory() 286 ha->fw_memory_size - 0x100000 + 1, nxt); qla24xx_dump_memory() 288 set_bit(RISC_EXT_MEM_DUMP_CMPL, &ha->fw_dump_cap_flags); qla24xx_dump_memory() 308 qla24xx_pause_risc(struct device_reg_24xx __iomem *reg, struct qla_hw_data *ha) qla24xx_pause_risc() argument 315 set_bit(RISC_PAUSE_CMPL, &ha->fw_dump_cap_flags); qla24xx_pause_risc() 319 qla24xx_soft_reset(struct qla_hw_data *ha) qla24xx_soft_reset() argument 324 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; qla24xx_soft_reset() 339 set_bit(DMA_SHUTDOWN_CMPL, &ha->fw_dump_cap_flags); qla24xx_soft_reset() 343 pci_read_config_word(ha->pdev, PCI_COMMAND, &wd); qla24xx_soft_reset() 356 set_bit(ISP_RESET_CMPL, &ha->fw_dump_cap_flags); qla24xx_soft_reset() 369 set_bit(RISC_RDY_AFT_RESET, &ha->fw_dump_cap_flags); qla24xx_soft_reset() 375 qla2xxx_dump_ram(struct qla_hw_data *ha, uint32_t addr, uint16_t *ram, qla2xxx_dump_ram() argument 381 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; qla2xxx_dump_ram() 382 dma_addr_t dump_dma = ha->gid_list_dma; qla2xxx_dump_ram() 383 uint16_t *dump = (uint16_t *)ha->gid_list; qla2xxx_dump_ram() 388 WRT_MAILBOX_REG(ha, reg, 0, MBC_DUMP_RISC_RAM_EXTENDED); qla2xxx_dump_ram() 389 clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags); qla2xxx_dump_ram() 391 words = qla2x00_gid_list_size(ha) / 2; qla2xxx_dump_ram() 397 WRT_MAILBOX_REG(ha, reg, 1, LSW(addr)); qla2xxx_dump_ram() 398 WRT_MAILBOX_REG(ha, reg, 8, MSW(addr)); qla2xxx_dump_ram() 400 WRT_MAILBOX_REG(ha, reg, 2, MSW(dump_dma)); qla2xxx_dump_ram() 401 WRT_MAILBOX_REG(ha, reg, 3, LSW(dump_dma)); qla2xxx_dump_ram() 402 WRT_MAILBOX_REG(ha, reg, 6, MSW(MSD(dump_dma))); qla2xxx_dump_ram() 403 WRT_MAILBOX_REG(ha, reg, 7, LSW(MSD(dump_dma))); qla2xxx_dump_ram() 405 WRT_MAILBOX_REG(ha, reg, 4, words); qla2xxx_dump_ram() 416 &ha->mbx_cmd_flags); qla2xxx_dump_ram() 418 mb0 = RD_MAILBOX_REG(ha, reg, 0); qla2xxx_dump_ram() 428 &ha->mbx_cmd_flags); qla2xxx_dump_ram() 430 mb0 = RD_MAILBOX_REG(ha, reg, 0); qla2xxx_dump_ram() 445 if (test_and_clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags)) { qla2xxx_dump_ram() 469 qla24xx_copy_eft(struct qla_hw_data *ha, void *ptr) qla24xx_copy_eft() argument 471 if (!ha->eft) qla24xx_copy_eft() 474 memcpy(ptr, ha->eft, ntohl(ha->fw_dump->eft_size)); qla24xx_copy_eft() 475 return ptr + ntohl(ha->fw_dump->eft_size); qla24xx_copy_eft() 479 qla25xx_copy_fce(struct qla_hw_data *ha, void *ptr, uint32_t **last_chain) qla25xx_copy_fce() argument 485 if (!ha->fce) qla25xx_copy_fce() 491 fce_calc_size(ha->fce_bufs)); qla25xx_copy_fce() 492 fcec->size = htonl(fce_calc_size(ha->fce_bufs)); qla25xx_copy_fce() 493 fcec->addr_l = htonl(LSD(ha->fce_dma)); qla25xx_copy_fce() 494 fcec->addr_h = htonl(MSD(ha->fce_dma)); qla25xx_copy_fce() 498 *iter_reg++ = htonl(ha->fce_mb[cnt]); qla25xx_copy_fce() 500 memcpy(iter_reg, ha->fce, ntohl(fcec->size)); qla25xx_copy_fce() 506 qla2xxx_copy_atioqueues(struct qla_hw_data *ha, void *ptr, qla2xxx_copy_atioqueues() argument 518 if (!ha->tgt.atio_ring) qla2xxx_copy_atioqueues() 523 aqp->length = ha->tgt.atio_q_length; qla2xxx_copy_atioqueues() 524 aqp->ring = ha->tgt.atio_ring; qla2xxx_copy_atioqueues() 527 /* aqp = ha->atio_q_map[que]; */ qla2xxx_copy_atioqueues() 554 qla25xx_copy_mqueues(struct qla_hw_data *ha, void *ptr, uint32_t **last_chain) qla25xx_copy_mqueues() argument 562 if (!ha->mqenable) qla25xx_copy_mqueues() 566 for (que = 1; que < ha->max_req_queues; que++) { qla25xx_copy_mqueues() 567 req = ha->req_q_map[que]; qla25xx_copy_mqueues() 594 for (que = 1; que < ha->max_rsp_queues; que++) { qla25xx_copy_mqueues() 595 rsp = ha->rsp_q_map[que]; qla25xx_copy_mqueues() 625 qla25xx_copy_mq(struct qla_hw_data *ha, void *ptr, uint32_t **last_chain) qla25xx_copy_mq() argument 632 if (!ha->mqenable || IS_QLA83XX(ha) || IS_QLA27XX(ha)) qla25xx_copy_mq() 640 que_cnt = ha->max_req_queues > ha->max_rsp_queues ? qla25xx_copy_mq() 641 ha->max_req_queues : ha->max_rsp_queues; qla25xx_copy_mq() 644 reg = ISP_QUE_REG(ha, cnt); qla25xx_copy_mq() 662 struct qla_hw_data *ha = vha->hw; qla2xxx_dump_post_process() local 667 rval, ha->fw_dump_cap_flags); qla2xxx_dump_post_process() 668 ha->fw_dumped = 0; qla2xxx_dump_post_process() 672 vha->host_no, ha->fw_dump, ha->fw_dump_cap_flags); qla2xxx_dump_post_process() 673 ha->fw_dumped = 1; qla2xxx_dump_post_process() 680 * @ha: HA context 688 struct qla_hw_data *ha = vha->hw; qla2300_fw_dump() local 689 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; qla2300_fw_dump() 694 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); qla2300_fw_dump() 699 spin_lock_irqsave(&ha->hardware_lock, flags); qla2300_fw_dump() 701 if (!ha->fw_dump) { qla2300_fw_dump() 707 if (ha->fw_dumped) { qla2300_fw_dump() 711 ha->fw_dump); qla2300_fw_dump() 714 fw = &ha->fw_dump->isp.isp23; qla2300_fw_dump() 715 qla2xxx_prep_dump(ha, ha->fw_dump); qla2300_fw_dump() 722 if (IS_QLA2300(ha)) { qla2300_fw_dump() 804 if (!IS_QLA2300(ha)) { qla2300_fw_dump() 805 for (cnt = 30000; RD_MAILBOX_REG(ha, reg, 0) != 0 && qla2300_fw_dump() 816 rval = qla2xxx_dump_ram(ha, 0x800, fw->risc_ram, qla2300_fw_dump() 821 rval = qla2xxx_dump_ram(ha, 0x10000, fw->stack_ram, qla2300_fw_dump() 826 rval = qla2xxx_dump_ram(ha, 0x11000, fw->data_ram, qla2300_fw_dump() 827 ha->fw_memory_size - 0x11000 + 1, &nxt); qla2300_fw_dump() 830 qla2xxx_copy_queues(ha, nxt); qla2300_fw_dump() 836 spin_unlock_irqrestore(&ha->hardware_lock, flags); qla2300_fw_dump() 841 * @ha: HA context 851 struct qla_hw_data *ha = vha->hw; qla2100_fw_dump() local 852 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; qla2100_fw_dump() 856 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); qla2100_fw_dump() 863 spin_lock_irqsave(&ha->hardware_lock, flags); qla2100_fw_dump() 865 if (!ha->fw_dump) { qla2100_fw_dump() 871 if (ha->fw_dumped) { qla2100_fw_dump() 875 ha->fw_dump); qla2100_fw_dump() 878 fw = &ha->fw_dump->isp.isp21; qla2100_fw_dump() 879 qla2xxx_prep_dump(ha, ha->fw_dump); qla2100_fw_dump() 899 for (cnt = 0; cnt < ha->mbx_count; cnt++) { qla2100_fw_dump() 952 for (cnt = 30000; RD_MAILBOX_REG(ha, reg, 0) != 0 && qla2100_fw_dump() 961 if (rval == QLA_SUCCESS && (IS_QLA2200(ha) || (IS_QLA2100(ha) && qla2100_fw_dump() 975 if (IS_QLA2100(ha)) qla2100_fw_dump() 989 WRT_MAILBOX_REG(ha, reg, 0, MBC_READ_RAM_WORD); qla2100_fw_dump() 990 clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags); qla2100_fw_dump() 994 WRT_MAILBOX_REG(ha, reg, 1, risc_address); qla2100_fw_dump() 1002 &ha->mbx_cmd_flags); qla2100_fw_dump() 1004 mb0 = RD_MAILBOX_REG(ha, reg, 0); qla2100_fw_dump() 1005 mb2 = RD_MAILBOX_REG(ha, reg, 2); qla2100_fw_dump() 1019 if (test_and_clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags)) { qla2100_fw_dump() 1028 qla2xxx_copy_queues(ha, &fw->risc_ram[cnt]); qla2100_fw_dump() 1034 spin_unlock_irqrestore(&ha->hardware_lock, flags); qla2100_fw_dump() 1043 struct qla_hw_data *ha = vha->hw; qla24xx_fw_dump() local 1044 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; qla24xx_fw_dump() 1054 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); qla24xx_fw_dump() 1056 if (IS_P3P_TYPE(ha)) qla24xx_fw_dump() 1061 ha->fw_dump_cap_flags = 0; qla24xx_fw_dump() 1064 spin_lock_irqsave(&ha->hardware_lock, flags); qla24xx_fw_dump() 1066 if (!ha->fw_dump) { qla24xx_fw_dump() 1072 if (ha->fw_dumped) { qla24xx_fw_dump() 1076 ha->fw_dump); qla24xx_fw_dump() 1079 fw = &ha->fw_dump->isp.isp24; qla24xx_fw_dump() 1080 qla2xxx_prep_dump(ha, ha->fw_dump); qla24xx_fw_dump() 1088 qla24xx_pause_risc(reg, ha); qla24xx_fw_dump() 1261 rval = qla24xx_soft_reset(ha); qla24xx_fw_dump() 1265 rval = qla24xx_dump_memory(ha, fw->code_ram, sizeof(fw->code_ram), qla24xx_fw_dump() 1270 nxt = qla2xxx_copy_queues(ha, nxt); qla24xx_fw_dump() 1272 qla24xx_copy_eft(ha, nxt); qla24xx_fw_dump() 1274 nxt_chain = (void *)ha->fw_dump + ha->chain_offset; qla24xx_fw_dump() 1275 nxt_chain = qla2xxx_copy_atioqueues(ha, nxt_chain, &last_chain); qla24xx_fw_dump() 1277 ha->fw_dump->version |= __constant_htonl(DUMP_CHAIN_VARIANT); qla24xx_fw_dump() 1282 ha->fw_dump_len = (nxt_chain - (void *)ha->fw_dump); qla24xx_fw_dump() 1289 spin_unlock_irqrestore(&ha->hardware_lock, flags); qla24xx_fw_dump() 1298 struct qla_hw_data *ha = vha->hw; qla25xx_fw_dump() local 1299 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; qla25xx_fw_dump() 1308 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); qla25xx_fw_dump() 1312 ha->fw_dump_cap_flags = 0; qla25xx_fw_dump() 1315 spin_lock_irqsave(&ha->hardware_lock, flags); qla25xx_fw_dump() 1317 if (!ha->fw_dump) { qla25xx_fw_dump() 1323 if (ha->fw_dumped) { qla25xx_fw_dump() 1327 ha->fw_dump); qla25xx_fw_dump() 1330 fw = &ha->fw_dump->isp.isp25; qla25xx_fw_dump() 1331 qla2xxx_prep_dump(ha, ha->fw_dump); qla25xx_fw_dump() 1332 ha->fw_dump->version = __constant_htonl(2); qla25xx_fw_dump() 1340 qla24xx_pause_risc(reg, ha); qla25xx_fw_dump() 1575 nxt_chain = qla25xx_copy_mq(ha, (void *)ha->fw_dump + ha->chain_offset, qla25xx_fw_dump() 1578 rval = qla24xx_soft_reset(ha); qla25xx_fw_dump() 1582 rval = qla24xx_dump_memory(ha, fw->code_ram, sizeof(fw->code_ram), qla25xx_fw_dump() 1587 nxt = qla2xxx_copy_queues(ha, nxt); qla25xx_fw_dump() 1589 qla24xx_copy_eft(ha, nxt); qla25xx_fw_dump() 1592 nxt_chain = qla25xx_copy_fce(ha, nxt_chain, &last_chain); qla25xx_fw_dump() 1593 nxt_chain = qla25xx_copy_mqueues(ha, nxt_chain, &last_chain); qla25xx_fw_dump() 1594 nxt_chain = qla2xxx_copy_atioqueues(ha, nxt_chain, &last_chain); qla25xx_fw_dump() 1596 ha->fw_dump->version |= __constant_htonl(DUMP_CHAIN_VARIANT); qla25xx_fw_dump() 1601 ha->fw_dump_len = (nxt_chain - (void *)ha->fw_dump); qla25xx_fw_dump() 1608 spin_unlock_irqrestore(&ha->hardware_lock, flags); qla25xx_fw_dump() 1617 struct qla_hw_data *ha = vha->hw; qla81xx_fw_dump() local 1618 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; qla81xx_fw_dump() 1627 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); qla81xx_fw_dump() 1631 ha->fw_dump_cap_flags = 0; qla81xx_fw_dump() 1634 spin_lock_irqsave(&ha->hardware_lock, flags); qla81xx_fw_dump() 1636 if (!ha->fw_dump) { qla81xx_fw_dump() 1642 if (ha->fw_dumped) { qla81xx_fw_dump() 1646 ha->fw_dump); qla81xx_fw_dump() 1649 fw = &ha->fw_dump->isp.isp81; qla81xx_fw_dump() 1650 qla2xxx_prep_dump(ha, ha->fw_dump); qla81xx_fw_dump() 1658 qla24xx_pause_risc(reg, ha); qla81xx_fw_dump() 1896 nxt_chain = qla25xx_copy_mq(ha, (void *)ha->fw_dump + ha->chain_offset, qla81xx_fw_dump() 1899 rval = qla24xx_soft_reset(ha); qla81xx_fw_dump() 1903 rval = qla24xx_dump_memory(ha, fw->code_ram, sizeof(fw->code_ram), qla81xx_fw_dump() 1908 nxt = qla2xxx_copy_queues(ha, nxt); qla81xx_fw_dump() 1910 qla24xx_copy_eft(ha, nxt); qla81xx_fw_dump() 1913 nxt_chain = qla25xx_copy_fce(ha, nxt_chain, &last_chain); qla81xx_fw_dump() 1914 nxt_chain = qla25xx_copy_mqueues(ha, nxt_chain, &last_chain); qla81xx_fw_dump() 1915 nxt_chain = qla2xxx_copy_atioqueues(ha, nxt_chain, &last_chain); qla81xx_fw_dump() 1917 ha->fw_dump->version |= __constant_htonl(DUMP_CHAIN_VARIANT); qla81xx_fw_dump() 1922 ha->fw_dump_len = (nxt_chain - (void *)ha->fw_dump); qla81xx_fw_dump() 1929 spin_unlock_irqrestore(&ha->hardware_lock, flags); qla81xx_fw_dump() 1938 struct qla_hw_data *ha = vha->hw; qla83xx_fw_dump() local 1939 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; qla83xx_fw_dump() 1948 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); qla83xx_fw_dump() 1952 ha->fw_dump_cap_flags = 0; qla83xx_fw_dump() 1955 spin_lock_irqsave(&ha->hardware_lock, flags); qla83xx_fw_dump() 1957 if (!ha->fw_dump) { qla83xx_fw_dump() 1963 if (ha->fw_dumped) { qla83xx_fw_dump() 1966 "request...\n", ha->fw_dump); qla83xx_fw_dump() 1969 fw = &ha->fw_dump->isp.isp83; qla83xx_fw_dump() 1970 qla2xxx_prep_dump(ha, ha->fw_dump); qla83xx_fw_dump() 1978 qla24xx_pause_risc(reg, ha); qla83xx_fw_dump() 2373 nxt_chain = qla25xx_copy_mq(ha, (void *)ha->fw_dump + ha->chain_offset, qla83xx_fw_dump() 2376 rval = qla24xx_soft_reset(ha); qla83xx_fw_dump() 2399 nxt += (ha->fw_memory_size - 0x100000 + 1); qla83xx_fw_dump() 2402 set_bit(RISC_RDY_AFT_RESET, &ha->fw_dump_cap_flags); qla83xx_fw_dump() 2408 rval = qla24xx_dump_memory(ha, fw->code_ram, sizeof(fw->code_ram), qla83xx_fw_dump() 2414 nxt = qla2xxx_copy_queues(ha, nxt); qla83xx_fw_dump() 2416 qla24xx_copy_eft(ha, nxt); qla83xx_fw_dump() 2419 nxt_chain = qla25xx_copy_fce(ha, nxt_chain, &last_chain); qla83xx_fw_dump() 2420 nxt_chain = qla25xx_copy_mqueues(ha, nxt_chain, &last_chain); qla83xx_fw_dump() 2421 nxt_chain = qla2xxx_copy_atioqueues(ha, nxt_chain, &last_chain); qla83xx_fw_dump() 2423 ha->fw_dump->version |= __constant_htonl(DUMP_CHAIN_VARIANT); qla83xx_fw_dump() 2428 ha->fw_dump_len = (nxt_chain - (void *)ha->fw_dump); qla83xx_fw_dump() 2435 spin_unlock_irqrestore(&ha->hardware_lock, flags); qla83xx_fw_dump() 2646 struct qla_hw_data *ha = vha->hw; ql_dump_regs() local 2647 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; ql_dump_regs() 2648 struct device_reg_24xx __iomem *reg24 = &ha->iobase->isp24; ql_dump_regs() 2649 struct device_reg_82xx __iomem *reg82 = &ha->iobase->isp82; ql_dump_regs() 2655 if (IS_P3P_TYPE(ha)) ql_dump_regs() 2657 else if (IS_FWI2_CAPABLE(ha)) ql_dump_regs() 2660 mbx_reg = MAILBOX_REG(ha, reg, 0); ql_dump_regs()
H A D	qla_nx2.c	20 qla8044_rd_reg(struct qla_hw_data *ha, ulong addr) qla8044_rd_reg() argument 22 return readl((void __iomem *) (ha->nx_pcibase + addr)); qla8044_rd_reg() 26 qla8044_wr_reg(struct qla_hw_data *ha, ulong addr, uint32_t val) qla8044_wr_reg() argument 28 writel(val, (void __iomem *)((ha)->nx_pcibase + addr)); qla8044_wr_reg() 35 struct qla_hw_data *ha = vha->hw; qla8044_rd_direct() local 38 return qla8044_rd_reg(ha, qla8044_reg_tbl[crb_reg]); qla8044_rd_direct() 48 struct qla_hw_data *ha = vha->hw; qla8044_wr_direct() local 51 qla8044_wr_reg(ha, qla8044_reg_tbl[crb_reg], value); qla8044_wr_direct() 59 struct qla_hw_data *ha = vha->hw; qla8044_set_win_base() local 61 qla8044_wr_reg(ha, QLA8044_CRB_WIN_FUNC(ha->portnum), addr); qla8044_set_win_base() 62 val = qla8044_rd_reg(ha, QLA8044_CRB_WIN_FUNC(ha->portnum)); qla8044_set_win_base() 78 struct qla_hw_data *ha = vha->hw; qla8044_rd_reg_indirect() local 82 *data = qla8044_rd_reg(ha, QLA8044_WILDCARD); qla8044_rd_reg_indirect() 93 struct qla_hw_data *ha = vha->hw; qla8044_wr_reg_indirect() local 97 qla8044_wr_reg(ha, QLA8044_WILDCARD, data); qla8044_wr_reg_indirect() 108 * @ha : Pointer to adapter structure 245 struct qla_hw_data *ha = vha->hw; qla8044_set_qsnt_ready() local 248 qsnt_state |= (1 << ha->portnum); qla8044_set_qsnt_ready() 258 struct qla_hw_data *ha = vha->hw; qla8044_clear_qsnt_ready() local 261 qsnt_state &= ~(1 << ha->portnum); qla8044_clear_qsnt_ready() 270 * @ha : Pointer to adapter structure 297 struct qla_hw_data *ha = vha->hw; qla8044_lock_recovery() local 299 lockid = qla8044_rd_reg(ha, QLA8044_DRV_LOCKRECOVERY); qla8044_lock_recovery() 306 qla8044_wr_reg(ha, QLA8044_DRV_LOCKRECOVERY, qla8044_lock_recovery() 307 (ha->portnum << qla8044_lock_recovery() 312 lockid = qla8044_rd_reg(ha, QLA8044_DRV_LOCKRECOVERY); qla8044_lock_recovery() 313 if ((lockid & IDC_LOCK_RECOVERY_OWNER_MASK) != (ha->portnum << qla8044_lock_recovery() 318 , __func__, ha->portnum); qla8044_lock_recovery() 321 qla8044_wr_reg(ha, QLA8044_DRV_LOCKRECOVERY, qla8044_lock_recovery() 322 (ha->portnum << IDC_LOCK_RECOVERY_STATE_SHIFT_BITS) | qla8044_lock_recovery() 326 qla8044_wr_reg(ha, QLA8044_DRV_LOCK_ID, 0xFF); qla8044_lock_recovery() 327 qla8044_rd_reg(ha, QLA8044_DRV_UNLOCK); qla8044_lock_recovery() 330 qla8044_wr_reg(ha, QLA8044_DRV_LOCKRECOVERY, 0); qla8044_lock_recovery() 333 lock = qla8044_rd_reg(ha, QLA8044_DRV_LOCK); qla8044_lock_recovery() 335 lockid = qla8044_rd_reg(ha, QLA8044_DRV_LOCK_ID); qla8044_lock_recovery() 336 lockid = ((lockid + (1 << 8)) & ~0xFF) | ha->portnum; qla8044_lock_recovery() 337 qla8044_wr_reg(ha, QLA8044_DRV_LOCK_ID, lockid); qla8044_lock_recovery() 344 qla8044_idc_lock(struct qla_hw_data *ha) qla8044_idc_lock() argument 348 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); qla8044_idc_lock() 352 status = qla8044_rd_reg(ha, QLA8044_DRV_LOCK); qla8044_idc_lock() 357 lock_id = qla8044_rd_reg(ha, QLA8044_DRV_LOCK_ID); qla8044_idc_lock() 358 lock_id = ((lock_id + (1 << 8)) & ~0xFF) | ha->portnum; qla8044_idc_lock() 359 qla8044_wr_reg(ha, QLA8044_DRV_LOCK_ID, lock_id); qla8044_idc_lock() 364 first_owner = qla8044_rd_reg(ha, QLA8044_DRV_LOCK_ID); qla8044_idc_lock() 368 tmo_owner = qla8044_rd_reg(ha, QLA8044_DRV_LOCK_ID); qla8044_idc_lock() 374 __func__, ha->portnum, func_num, lock_cnt, qla8044_idc_lock() 383 __func__, ha->portnum); qla8044_idc_lock() 394 ha->portnum); qla8044_idc_lock() 403 ha->portnum); qla8044_idc_lock() 413 qla8044_idc_unlock(struct qla_hw_data *ha) qla8044_idc_unlock() argument 416 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); qla8044_idc_unlock() 418 id = qla8044_rd_reg(ha, QLA8044_DRV_LOCK_ID); qla8044_idc_unlock() 420 if ((id & 0xFF) != ha->portnum) { qla8044_idc_unlock() 423 __func__, ha->portnum, (id & 0xFF)); qla8044_idc_unlock() 427 /* Keep lock counter value, update the ha->func_num to 0xFF */ qla8044_idc_unlock() 428 qla8044_wr_reg(ha, QLA8044_DRV_LOCK_ID, (id | 0xFF)); qla8044_idc_unlock() 429 qla8044_rd_reg(ha, QLA8044_DRV_UNLOCK); qla8044_idc_unlock() 440 struct qla_hw_data *ha = vha->hw; qla8044_flash_lock() local 443 lock_status = qla8044_rd_reg(ha, QLA8044_FLASH_LOCK); qla8044_flash_lock() 448 lock_owner = qla8044_rd_reg(ha, qla8044_flash_lock() 452 __func__, ha->portnum, lock_owner); qla8044_flash_lock() 458 qla8044_wr_reg(ha, QLA8044_FLASH_LOCK_ID, ha->portnum); qla8044_flash_lock() 466 struct qla_hw_data *ha = vha->hw; qla8044_flash_unlock() local 469 qla8044_wr_reg(ha, QLA8044_FLASH_LOCK_ID, 0xFF); qla8044_flash_unlock() 470 ret_val = qla8044_rd_reg(ha, QLA8044_FLASH_UNLOCK); qla8044_flash_unlock() 569 struct qla_hw_data *ha = vha->hw; qla8044_need_reset() local 574 rval = drv_state & (1 << ha->portnum); qla8044_need_reset() 576 if (ha->flags.eeh_busy && drv_active) qla8044_need_reset() 638 * @ha : Pointer to adapter structure 695 * @ha : Pointer to adapter structure 923 * @ha : Pointer to adapter structure 1115 struct qla_hw_data *ha = vha->hw; qla8044_ms_mem_write_128b() local 1122 write_lock_irqsave(&ha->hw_lock, flags); qla8044_ms_mem_write_128b() 1195 write_unlock_irqrestore(&ha->hw_lock, flags); qla8044_ms_mem_write_128b() 1208 struct qla_hw_data *ha = vha->hw; qla8044_copy_bootloader() local 1211 dest = qla8044_rd_reg(ha, QLA8044_BOOTLOADER_ADDR); qla8044_copy_bootloader() 1212 size = qla8044_rd_reg(ha, QLA8044_BOOTLOADER_SIZE); qla8044_copy_bootloader() 1263 struct qla_hw_data *ha = vha->hw; qla8044_restart() local 1287 qla8044_wr_reg(ha, QLA8044_FW_IMAGE_VALID, QLA8044_BOOT_FROM_FLASH); qla8044_restart() 1299 * @ha : Pointer to adapter structure 1308 struct qla_hw_data *ha = vha->hw; qla8044_check_cmd_peg_status() local 1311 val = qla8044_rd_reg(ha, QLA8044_CMDPEG_STATE); qla8044_check_cmd_peg_status() 1352 qla8044_clear_drv_active(struct qla_hw_data *ha) qla8044_clear_drv_active() argument 1355 struct scsi_qla_host *vha = pci_get_drvdata(ha->pdev); qla8044_clear_drv_active() 1358 drv_active &= ~(1 << (ha->portnum)); qla8044_clear_drv_active() 1369 * @ha: pointer to adapter structure 1381 struct qla_hw_data *ha = vha->hw; qla8044_device_bootstrap() local 1402 if (ha->flags.isp82xx_fw_hung) qla8044_device_bootstrap() 1412 qla8044_idc_unlock(ha); qla8044_device_bootstrap() 1414 qla8044_idc_lock(ha); qla8044_device_bootstrap() 1419 qla8044_clear_drv_active(ha); qla8044_device_bootstrap() 1427 idc_ctrl = qla8044_rd_reg(ha, QLA8044_IDC_DRV_CTRL); qla8044_device_bootstrap() 1429 qla8044_wr_reg(ha, QLA8044_IDC_DRV_CTRL, qla8044_device_bootstrap() 1431 ha->fw_dumped = 0; qla8044_device_bootstrap() 1468 * @ha : Pointer to adapter structure 1497 * the template and store offsets of stop/start/init offsets in ha->reset_tmplt. 1499 * @ha : Pointer to adapter structure 1599 struct qla_hw_data *ha = vha->hw; qla8044_set_idc_dontreset() local 1601 idc_ctrl = qla8044_rd_reg(ha, QLA8044_IDC_DRV_CTRL); qla8044_set_idc_dontreset() 1605 qla8044_wr_reg(ha, QLA8044_IDC_DRV_CTRL, idc_ctrl); qla8044_set_idc_dontreset() 1612 struct qla_hw_data *ha = vha->hw; qla8044_set_rst_ready() local 1618 drv_state |= (1 << ha->portnum); qla8044_set_rst_ready() 1628 * @ha: pointer to adapter structure 1637 struct qla_hw_data *ha = vha->hw; qla8044_need_reset_handler() local 1643 qla8044_idc_unlock(ha); qla8044_need_reset_handler() 1645 ha->isp_ops->get_flash_version(vha, vha->req->ring); qla8044_need_reset_handler() 1646 ha->isp_ops->nvram_config(vha); qla8044_need_reset_handler() 1647 qla8044_idc_lock(ha); qla8044_need_reset_handler() 1664 reset_timeout = jiffies + (ha->fcoe_reset_timeout * HZ); qla8044_need_reset_handler() 1670 __func__, ha->portnum, drv_state, drv_active); qla8044_need_reset_handler() 1674 qla8044_idc_unlock(ha); qla8044_need_reset_handler() 1676 qla8044_idc_lock(ha); qla8044_need_reset_handler() 1691 __func__, vha->host_no, ha->portnum, qla8044_need_reset_handler() 1701 if ((ha->flags.nic_core_reset_owner) && qla8044_need_reset_handler() 1703 ha->flags.nic_core_reset_owner = 0; qla8044_need_reset_handler() 1710 if (!(drv_active & (1 << ha->portnum))) { qla8044_need_reset_handler() 1711 ha->flags.nic_core_reset_owner = 0; qla8044_need_reset_handler() 1719 if (ha->flags.nic_core_reset_owner || qla8044_need_reset_handler() 1721 ha->flags.nic_core_reset_owner = 0; qla8044_need_reset_handler() 1730 struct qla_hw_data *ha = vha->hw; qla8044_set_drv_active() local 1736 drv_active |= (1 << ha->portnum); qla8044_set_drv_active() 1748 struct qla_hw_data *ha = vha->hw; qla8044_check_drv_active() local 1751 if (drv_active & (1 << ha->portnum)) qla8044_check_drv_active() 1761 struct qla_hw_data *ha = vha->hw; qla8044_clear_idc_dontreset() local 1763 idc_ctrl = qla8044_rd_reg(ha, QLA8044_IDC_DRV_CTRL); qla8044_clear_idc_dontreset() 1768 qla8044_wr_reg(ha, QLA8044_IDC_DRV_CTRL, idc_ctrl); qla8044_clear_idc_dontreset() 1777 struct qla_hw_data *ha = vha->hw; qla8044_set_idc_ver() local 1780 if (drv_active == (1 << ha->portnum)) { qla8044_set_idc_ver() 1807 idc_ver = qla8044_rd_reg(ha, QLA8044_CRB_IDC_VER_MINOR); qla8044_set_idc_ver() 1808 idc_ver &= ~(0x03 << (ha->portnum * 2)); qla8044_set_idc_ver() 1809 idc_ver |= (QLA8044_IDC_VER_MIN_VALUE << (ha->portnum * 2)); qla8044_set_idc_ver() 1810 qla8044_wr_reg(ha, QLA8044_CRB_IDC_VER_MINOR, idc_ver); qla8044_set_idc_ver() 1821 struct qla_hw_data *ha = vha->hw; qla8044_update_idc_reg() local 1826 qla8044_idc_lock(ha); qla8044_update_idc_reg() 1834 if ((drv_active == (1 << ha->portnum)) && !ql2xdontresethba) qla8044_update_idc_reg() 1839 qla8044_clear_drv_active(ha); qla8044_update_idc_reg() 1840 qla8044_idc_unlock(ha); qla8044_update_idc_reg() 1848 * @ha: pointer to adapter structure 1855 struct qla_hw_data *ha = vha->hw; qla8044_need_qsnt_handler() local 1886 qla8044_idc_unlock(ha); qla8044_need_qsnt_handler() 1888 qla8044_idc_lock(ha); qla8044_need_qsnt_handler() 1910 * @ha: pointer to host adapter structure. 1920 struct qla_hw_data *ha = vha->hw; qla8044_device_state_handler() local 1933 dev_init_timeout = jiffies + (ha->fcoe_dev_init_timeout * HZ); qla8044_device_state_handler() 1935 qla8044_idc_lock(ha); qla8044_device_state_handler() 1960 ha->flags.nic_core_reset_owner = 0; qla8044_device_state_handler() 1966 qla8044_idc_unlock(ha); qla8044_device_state_handler() 1968 qla8044_idc_lock(ha); qla8044_device_state_handler() 1982 (ha->fcoe_reset_timeout * HZ); qla8044_device_state_handler() 1988 qla8044_idc_unlock(ha); qla8044_device_state_handler() 1990 qla8044_idc_lock(ha); qla8044_device_state_handler() 1994 (ha->fcoe_reset_timeout * HZ); qla8044_device_state_handler() 1997 ha->flags.nic_core_reset_owner = 0; qla8044_device_state_handler() 1998 qla8044_idc_unlock(ha); qla8044_device_state_handler() 2001 qla8044_idc_lock(ha); qla8044_device_state_handler() 2004 qla8044_idc_unlock(ha); qla8044_device_state_handler() 2007 qla8044_idc_lock(ha); qla8044_device_state_handler() 2012 qla8044_idc_unlock(ha); qla8044_device_state_handler() 2020 * @ha: adapter block pointer. 2060 * @ha: Pointer to host adapter structure. 2114 struct qla_hw_data *ha = vha->hw; qla8044_watchdog() local 2122 ha->flags.isp82xx_fw_hung = 1; qla8044_watchdog() 2130 ha->flags.isp82xx_fw_hung = 1; qla8044_watchdog() 2148 if (ha->flags.isp82xx_fw_hung) { qla8044_watchdog() 2203 struct qla_hw_data *ha = vha->hw; qla8044_minidump_process_control() local 2207 ha->md_tmplt_hdr; qla8044_minidump_process_control() 2346 struct qla_hw_data *ha = vha->hw; qla8044_minidump_process_rdmem() local 2375 write_lock_irqsave(&ha->hw_lock, flags); qla8044_minidump_process_rdmem() 2393 write_unlock_irqrestore(&ha->hw_lock, flags); qla8044_minidump_process_rdmem() 2405 write_unlock_irqrestore(&ha->hw_lock, flags); qla8044_minidump_process_rdmem() 2556 struct qla_hw_data *ha = vha->hw; qla8044_minidump_process_rdocm() local 2570 r_value = readl((void __iomem *)(r_addr + ha->nx_pcibase)); qla8044_minidump_process_rdocm() 2811 struct qla_hw_data *ha = vha->hw; qla8044_check_dma_engine_state() local 2817 tmplt_hdr = ha->md_tmplt_hdr; qla8044_check_dma_engine_state() 2841 struct qla_hw_data *ha = vha->hw; qla8044_start_pex_dma() local 2847 tmplt_hdr = ha->md_tmplt_hdr; qla8044_start_pex_dma() 2898 struct qla_hw_data *ha = vha->hw; qla8044_minidump_pex_dma_read() local 2916 rdmem_buffer = dma_alloc_coherent(&ha->pdev->dev, qla8044_minidump_pex_dma_read() 2934 ((PCI_FUNC(ha->pdev->devfn) & 0xf) << 0x4); qla8044_minidump_pex_dma_read() 2981 dma_free_coherent(&ha->pdev->dev, ISP8044_PEX_DMA_READ_SIZE, qla8044_minidump_pex_dma_read() 3215 * @ha: pointer to adapter structure 3228 struct qla_hw_data *ha = vha->hw; qla8044_collect_md_data() local 3230 if (!ha->md_dump) { qla8044_collect_md_data() 3237 if (ha->fw_dumped) { qla8044_collect_md_data() 3240 "-- ignoring request.\n", ha->fw_dump); qla8044_collect_md_data() 3244 ha->fw_dumped = 0; qla8044_collect_md_data() 3246 if (!ha->md_tmplt_hdr || !ha->md_dump) { qla8044_collect_md_data() 3252 qla8044_idc_lock(ha); qla8044_collect_md_data() 3253 idc_control = qla8044_rd_reg(ha, QLA8044_IDC_DRV_CTRL); qla8044_collect_md_data() 3258 qla8044_wr_reg(ha, QLA8044_IDC_DRV_CTRL, qla8044_collect_md_data() 3260 qla8044_idc_unlock(ha); qla8044_collect_md_data() 3264 qla8044_idc_unlock(ha); qla8044_collect_md_data() 3273 ha->md_tmplt_hdr; qla8044_collect_md_data() 3274 data_ptr = (uint32_t *)((uint8_t *)ha->md_dump); qla8044_collect_md_data() 3298 __func__, ha->md_dump_size, ha->md_dump_size); qla8044_collect_md_data() 3306 (((uint8_t *)ha->md_tmplt_hdr) + tmplt_hdr->first_entry_offset); qla8044_collect_md_data() 3308 tmplt_hdr->ocm_window_reg[ha->portnum]; qla8044_collect_md_data() 3312 if (data_collected > ha->md_dump_size) { qla8044_collect_md_data() 3316 data_collected, ha->md_dump_size); qla8044_collect_md_data() 3330 (ha->md_dump_size - data_collected)); qla8044_collect_md_data() 3444 (uint8_t *)((uint8_t *)ha->md_dump); qla8044_collect_md_data() 3453 if (data_collected != ha->md_dump_size) { qla8044_collect_md_data() 3457 data_collected, ha->md_dump_size); qla8044_collect_md_data() 3464 vha->host_no, ha->md_tmplt_hdr, vha->host_no, ha->md_dump); qla8044_collect_md_data() 3465 ha->fw_dumped = 1; qla8044_collect_md_data() 3479 struct qla_hw_data *ha = vha->hw; qla8044_get_minidump() local 3482 ha->fw_dumped = 1; qla8044_get_minidump() 3483 ha->prev_minidump_failed = 0; qla8044_get_minidump() 3488 ha->prev_minidump_failed = 1; qla8044_get_minidump() 3568 struct qla_hw_data *ha = vha->hw; qla8044_unprotect_flash() local 3570 ret_val = qla8044_write_flash_status_reg(vha, ha->fdt_wrt_enable); qla8044_unprotect_flash() 3585 struct qla_hw_data *ha = vha->hw; qla8044_protect_flash() local 3587 ret_val = qla8044_write_flash_status_reg(vha, ha->fdt_wrt_disable); qla8044_protect_flash() 3644 * @ha : Pointer to adapter structure 3883 struct qla_hw_data *ha; qla8044_intr_handler() local 3899 ha = rsp->hw; qla8044_intr_handler() 3900 vha = pci_get_drvdata(ha->pdev); qla8044_intr_handler() 3902 if (unlikely(pci_channel_offline(ha->pdev))) qla8044_intr_handler() 3905 leg_int_ptr = qla8044_rd_reg(ha, LEG_INTR_PTR_OFFSET); qla8044_intr_handler() 3915 pf_bit = ha->portnum << 16; qla8044_intr_handler() 3921 "ha->pf_bit = 0x%x\n", __func__, qla8044_intr_handler() 3930 qla8044_wr_reg(ha, LEG_INTR_TRIG_OFFSET, 0); qla8044_intr_handler() 3932 leg_int_ptr = qla8044_rd_reg(ha, LEG_INTR_PTR_OFFSET); qla8044_intr_handler() 3937 reg = &ha->iobase->isp82; qla8044_intr_handler() 3938 spin_lock_irqsave(&ha->hardware_lock, flags); qla8044_intr_handler() 3974 qla2x00_handle_mbx_completion(ha, status); qla8044_intr_handler() 3975 spin_unlock_irqrestore(&ha->hardware_lock, flags); qla8044_intr_handler() 3981 qla8044_idc_dontreset(struct qla_hw_data *ha) qla8044_idc_dontreset() argument 3985 idc_ctrl = qla8044_rd_reg(ha, QLA8044_IDC_DRV_CTRL); qla8044_idc_dontreset() 4013 struct qla_hw_data *ha = vha->hw; qla8044_abort_isp() local 4015 qla8044_idc_lock(ha); qla8044_abort_isp() 4030 if (qla8044_idc_dontreset(ha) == DONTRESET_BIT0) { qla8044_abort_isp() 4048 qla8044_idc_unlock(ha); qla8044_abort_isp() 4050 qla8044_idc_lock(ha); qla8044_abort_isp() 4054 qla8044_idc_unlock(ha); qla8044_abort_isp() 4056 ha->flags.isp82xx_fw_hung = 0; qla8044_abort_isp() 4057 ha->flags.nic_core_reset_hdlr_active = 0; qla8044_abort_isp() 4067 struct qla_hw_data *ha = vha->hw; qla8044_fw_dump() local 4069 if (!ha->allow_cna_fw_dump) qla8044_fw_dump() 4073 ha->flags.isp82xx_no_md_cap = 1; qla8044_fw_dump() 4074 qla8044_idc_lock(ha); qla8044_fw_dump() 4076 qla8044_idc_unlock(ha); qla8044_fw_dump()
H A D	qla_mbx.c	19 * ha = adapter block pointer. 48 struct qla_hw_data *ha = vha->hw; qla2x00_mailbox_command() local 49 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev); qla2x00_mailbox_command() 54 if (ha->pdev->error_state > pci_channel_io_frozen) { qla2x00_mailbox_command() 67 reg = ha->iobase; qla2x00_mailbox_command() 74 if (ha->flags.pci_channel_io_perm_failure) { qla2x00_mailbox_command() 80 if (IS_P3P_TYPE(ha) && ha->flags.isp82xx_fw_hung) { qla2x00_mailbox_command() 84 "FW hung = %d.\n", ha->flags.isp82xx_fw_hung); qla2x00_mailbox_command() 93 if (!wait_for_completion_timeout(&ha->mbx_cmd_comp, mcp->tov * HZ)) { qla2x00_mailbox_command() 101 ha->flags.mbox_busy = 1; qla2x00_mailbox_command() 103 ha->mcp = mcp; qla2x00_mailbox_command() 108 spin_lock_irqsave(&ha->hardware_lock, flags); qla2x00_mailbox_command() 111 if (IS_P3P_TYPE(ha)) qla2x00_mailbox_command() 113 else if (IS_FWI2_CAPABLE(ha) && !(IS_P3P_TYPE(ha))) qla2x00_mailbox_command() 116 optr = (uint16_t __iomem *)MAILBOX_REG(ha, &reg->isp, 0); qla2x00_mailbox_command() 124 for (cnt = 0; cnt < ha->mbx_count; cnt++) { qla2x00_mailbox_command() 125 if (IS_QLA2200(ha) && cnt == 8) qla2x00_mailbox_command() 127 (uint16_t __iomem *)MAILBOX_REG(ha, &reg->isp, 8); qla2x00_mailbox_command() 143 ha->flags.mbox_int = 0; qla2x00_mailbox_command() 144 clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags); qla2x00_mailbox_command() 153 if ((!abort_active && io_lock_on) || IS_NOPOLLING_TYPE(ha)) { qla2x00_mailbox_command() 154 set_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags); qla2x00_mailbox_command() 156 if (IS_P3P_TYPE(ha)) { qla2x00_mailbox_command() 159 spin_unlock_irqrestore(&ha->hardware_lock, qla2x00_mailbox_command() 161 ha->flags.mbox_busy = 0; qla2x00_mailbox_command() 168 } else if (IS_FWI2_CAPABLE(ha)) qla2x00_mailbox_command() 172 spin_unlock_irqrestore(&ha->hardware_lock, flags); qla2x00_mailbox_command() 174 if (!wait_for_completion_timeout(&ha->mbx_intr_comp, qla2x00_mailbox_command() 178 spin_lock_irqsave(&ha->hardware_lock, flags); qla2x00_mailbox_command() 179 clear_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags); qla2x00_mailbox_command() 180 spin_unlock_irqrestore(&ha->hardware_lock, flags); qla2x00_mailbox_command() 186 if (IS_P3P_TYPE(ha)) { qla2x00_mailbox_command() 189 spin_unlock_irqrestore(&ha->hardware_lock, qla2x00_mailbox_command() 191 ha->flags.mbox_busy = 0; qla2x00_mailbox_command() 198 } else if (IS_FWI2_CAPABLE(ha)) qla2x00_mailbox_command() 202 spin_unlock_irqrestore(&ha->hardware_lock, flags); qla2x00_mailbox_command() 205 while (!ha->flags.mbox_int) { qla2x00_mailbox_command() 210 qla2x00_poll(ha->rsp_q_map[0]); qla2x00_mailbox_command() 212 if (!ha->flags.mbox_int && qla2x00_mailbox_command() 213 !(IS_QLA2200(ha) && qla2x00_mailbox_command() 223 if (ha->flags.mbox_int) { qla2x00_mailbox_command() 230 ha->flags.mbox_int = 0; qla2x00_mailbox_command() 231 clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags); qla2x00_mailbox_command() 233 if (IS_P3P_TYPE(ha) && ha->flags.isp82xx_fw_hung) { qla2x00_mailbox_command() 234 ha->flags.mbox_busy = 0; qla2x00_mailbox_command() 237 ha->mcp = NULL; qla2x00_mailbox_command() 240 "FW hung = %d.\n", ha->flags.isp82xx_fw_hung); qla2x00_mailbox_command() 244 if (ha->mailbox_out[0] != MBS_COMMAND_COMPLETE) qla2x00_mailbox_command() 249 iptr = (uint16_t *)&ha->mailbox_out[0]; qla2x00_mailbox_command() 254 for (cnt = 0; cnt < ha->mbx_count; cnt++) { qla2x00_mailbox_command() 270 if (IS_FWI2_CAPABLE(ha)) { qla2x00_mailbox_command() 274 mb0 = RD_MAILBOX_REG(ha, &reg->isp, 0); qla2x00_mailbox_command() 288 ha->isp_ops->fw_dump(vha, 0); qla2x00_mailbox_command() 293 ha->flags.mbox_busy = 0; qla2x00_mailbox_command() 296 ha->mcp = NULL; qla2x00_mailbox_command() 298 if ((abort_active || !io_lock_on) && !IS_NOPOLLING_TYPE(ha)) { qla2x00_mailbox_command() 303 qla2x00_poll(ha->rsp_q_map[0]); qla2x00_mailbox_command() 309 ha->flags.eeh_busy) { qla2x00_mailbox_command() 317 if (IS_QLA82XX(ha)) { qla2x00_mailbox_command() 321 qla82xx_wr_32(ha, qla2x00_mailbox_command() 330 ha->flags.eeh_busy); qla2x00_mailbox_command() 342 if (IS_QLA82XX(ha)) { qla2x00_mailbox_command() 346 qla82xx_wr_32(ha, qla2x00_mailbox_command() 358 complete(&ha->mbx_cmd_comp); qla2x00_mailbox_command() 359 if (ha->isp_ops->abort_isp(vha)) { qla2x00_mailbox_command() 374 complete(&ha->mbx_cmd_comp); qla2x00_mailbox_command() 385 ha->fw_dump_cap_flags, qla2x00_mailbox_command() 405 struct qla_hw_data *ha = vha->hw; qla2x00_load_ram() local 412 if (MSW(risc_addr) || IS_FWI2_CAPABLE(ha)) { qla2x00_load_ram() 426 if (IS_FWI2_CAPABLE(ha)) { qla2x00_load_ram() 457 * ha = adapter block pointer. 471 struct qla_hw_data *ha = vha->hw; qla2x00_execute_fw() local 481 if (IS_FWI2_CAPABLE(ha)) { qla2x00_execute_fw() 485 if (IS_QLA25XX(ha) || IS_QLA81XX(ha) || IS_QLA83XX(ha) || qla2x00_execute_fw() 486 IS_QLA27XX(ha)) { qla2x00_execute_fw() 487 struct nvram_81xx *nv = ha->nvram; qla2x00_execute_fw() 497 if (IS_QLA2322(ha) || IS_QLA6322(ha)) { qla2x00_execute_fw() 511 if (IS_FWI2_CAPABLE(ha)) { qla2x00_execute_fw() 528 * ha: adapter state pointer. 545 struct qla_hw_data *ha = vha->hw; qla2x00_get_fw_version() local 553 if (IS_QLA81XX(vha->hw) || IS_QLA8031(ha) || IS_QLA8044(ha)) qla2x00_get_fw_version() 555 if (IS_FWI2_CAPABLE(ha)) qla2x00_get_fw_version() 557 if (IS_QLA27XX(ha)) qla2x00_get_fw_version() 566 ha->fw_major_version = mcp->mb[1]; qla2x00_get_fw_version() 567 ha->fw_minor_version = mcp->mb[2]; qla2x00_get_fw_version() 568 ha->fw_subminor_version = mcp->mb[3]; qla2x00_get_fw_version() 569 ha->fw_attributes = mcp->mb[6]; qla2x00_get_fw_version() 571 ha->fw_memory_size = 0x1FFFF; /* Defaults to 128KB. */ qla2x00_get_fw_version() 573 ha->fw_memory_size = (mcp->mb[5] << 16) | mcp->mb[4]; qla2x00_get_fw_version() 574 if (IS_QLA81XX(vha->hw) || IS_QLA8031(vha->hw) || IS_QLA8044(ha)) { qla2x00_get_fw_version() 575 ha->mpi_version[0] = mcp->mb[10] & 0xff; qla2x00_get_fw_version() 576 ha->mpi_version[1] = mcp->mb[11] >> 8; qla2x00_get_fw_version() 577 ha->mpi_version[2] = mcp->mb[11] & 0xff; qla2x00_get_fw_version() 578 ha->mpi_capabilities = (mcp->mb[12] << 16) | mcp->mb[13]; qla2x00_get_fw_version() 579 ha->phy_version[0] = mcp->mb[8] & 0xff; qla2x00_get_fw_version() 580 ha->phy_version[1] = mcp->mb[9] >> 8; qla2x00_get_fw_version() 581 ha->phy_version[2] = mcp->mb[9] & 0xff; qla2x00_get_fw_version() 583 if (IS_FWI2_CAPABLE(ha)) { qla2x00_get_fw_version() 584 ha->fw_attributes_h = mcp->mb[15]; qla2x00_get_fw_version() 585 ha->fw_attributes_ext[0] = mcp->mb[16]; qla2x00_get_fw_version() 586 ha->fw_attributes_ext[1] = mcp->mb[17]; qla2x00_get_fw_version() 594 if (IS_QLA27XX(ha)) { qla2x00_get_fw_version() 595 ha->fw_shared_ram_start = (mcp->mb[19] << 16) | mcp->mb[18]; qla2x00_get_fw_version() 596 ha->fw_shared_ram_end = (mcp->mb[21] << 16) | mcp->mb[20]; qla2x00_get_fw_version() 616 * ha = adapter block pointer. 664 * ha = adapter block pointer. 721 * ha = adapter block pointer. 781 * ha = adapter block pointer. 836 * ha = adapter state pointer. 901 * ha = adapter block pointer. 920 struct qla_hw_data *ha = vha->hw; qla2x00_abort_command() local 927 spin_lock_irqsave(&ha->hardware_lock, flags); qla2x00_abort_command() 932 spin_unlock_irqrestore(&ha->hardware_lock, flags); qla2x00_abort_command() 940 if (HAS_EXTENDED_IDS(ha)) qla2x00_abort_command() 1070 * ha = adapter block pointer. 1163 * ha = adapter block pointer. 1218 * ha = adapter block pointer. 1236 struct qla_hw_data *ha = vha->hw; qla2x00_init_firmware() local 1241 if (IS_P3P_TYPE(ha) && ql2xdbwr) qla2x00_init_firmware() 1242 qla82xx_wr_32(ha, ha->nxdb_wr_ptr, qla2x00_init_firmware() 1243 (0x04 | (ha->portnum << 5) | (0 << 8) | (0 << 16))); qla2x00_init_firmware() 1245 if (ha->flags.npiv_supported) qla2x00_init_firmware() 1251 mcp->mb[2] = MSW(ha->init_cb_dma); qla2x00_init_firmware() 1252 mcp->mb[3] = LSW(ha->init_cb_dma); qla2x00_init_firmware() 1253 mcp->mb[6] = MSW(MSD(ha->init_cb_dma)); qla2x00_init_firmware() 1254 mcp->mb[7] = LSW(MSD(ha->init_cb_dma)); qla2x00_init_firmware() 1256 if (ha->ex_init_cb && ha->ex_init_cb->ex_version) { qla2x00_init_firmware() 1258 mcp->mb[10] = MSW(ha->ex_init_cb_dma); qla2x00_init_firmware() 1259 mcp->mb[11] = LSW(ha->ex_init_cb_dma); qla2x00_init_firmware() 1260 mcp->mb[12] = MSW(MSD(ha->ex_init_cb_dma)); qla2x00_init_firmware() 1261 mcp->mb[13] = LSW(MSD(ha->ex_init_cb_dma)); qla2x00_init_firmware() 1262 mcp->mb[14] = sizeof(*ha->ex_init_cb); qla2x00_init_firmware() 1267 if (IS_QLA83XX(ha) || IS_QLA27XX(ha)) qla2x00_init_firmware() 1295 * ha = adapter state pointer. 1308 struct qla_hw_data *ha = vha->hw; qla2x00_get_node_name_list() local 1319 pmap = dma_alloc_coherent(&ha->pdev->dev, dma_size, qla2x00_get_node_name_list() 1364 dma_free_coherent(&ha->pdev->dev, dma_size, pmap, pmap_dma); qla2x00_get_node_name_list() 1374 dma_free_coherent(&ha->pdev->dev, dma_size, pmap, pmap_dma); qla2x00_get_node_name_list() 1384 * ha = adapter state pointer. 1403 struct qla_hw_data *ha = vha->hw; qla2x00_get_port_database() local 1409 pd = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &pd_dma); qla2x00_get_port_database() 1418 if (opt != 0 && !IS_FWI2_CAPABLE(ha)) qla2x00_get_port_database() 1427 if (IS_FWI2_CAPABLE(ha)) { qla2x00_get_port_database() 1432 } else if (HAS_EXTENDED_IDS(ha)) { qla2x00_get_port_database() 1440 mcp->buf_size = IS_FWI2_CAPABLE(ha) ? qla2x00_get_port_database() 1443 mcp->tov = (ha->login_timeout * 2) + (ha->login_timeout / 2); qla2x00_get_port_database() 1448 if (IS_FWI2_CAPABLE(ha)) { qla2x00_get_port_database() 1538 dma_pool_free(ha->s_dma_pool, pd, pd_dma); qla2x00_get_port_database() 1557 * ha = adapter block pointer. 1616 * ha = adapter block pointer. 1683 * ha = adapter block pointer. 1735 * ha = adapter block pointer. 1802 * ha = adapter block pointer. 1866 struct qla_hw_data *ha = vha->hw; qla24xx_login_fabric() local 1873 if (ha->flags.cpu_affinity_enabled) qla24xx_login_fabric() 1874 req = ha->req_q_map[0]; qla24xx_login_fabric() 1879 lg = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &lg_dma); qla24xx_login_fabric() 1901 (ha->r_a_tov / 10 * 2) + 2); qla24xx_login_fabric() 1970 dma_pool_free(ha->s_dma_pool, lg, lg_dma); qla24xx_login_fabric() 1980 * ha = adapter block pointer. 2003 struct qla_hw_data *ha = vha->hw; qla2x00_login_fabric() local 2010 if (HAS_EXTENDED_IDS(ha)) { qla2x00_login_fabric() 2021 mcp->tov = (ha->login_timeout * 2) + (ha->login_timeout / 2); qla2x00_login_fabric() 2066 * ha = adapter block pointer. 2084 struct qla_hw_data *ha = vha->hw; qla2x00_login_local_device() local 2089 if (IS_FWI2_CAPABLE(ha)) qla2x00_login_local_device() 2095 if (HAS_EXTENDED_IDS(ha)) qla2x00_login_local_device() 2102 mcp->tov = (ha->login_timeout * 2) + (ha->login_timeout / 2); qla2x00_login_local_device() 2143 struct qla_hw_data *ha = vha->hw; qla24xx_fabric_logout() local 2150 lg = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &lg_dma); qla24xx_fabric_logout() 2159 req = ha->req_q_map[0]; qla24xx_fabric_logout() 2175 (ha->r_a_tov / 10 * 2) + 2); qla24xx_fabric_logout() 2196 dma_pool_free(ha->s_dma_pool, lg, lg_dma); qla24xx_fabric_logout() 2206 * ha = adapter block pointer. 2261 * ha = adapter block pointer. 2307 * ha = adapter block pointer. 2368 * ha = adapter block pointer. 2430 * ha = adapter state pointer. 2447 struct qla_hw_data *ha = vha->hw; qla2x00_get_fcal_position_map() local 2452 pmap = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &pmap_dma); qla2x00_get_fcal_position_map() 2469 mcp->tov = (ha->login_timeout * 2) + (ha->login_timeout / 2); qla2x00_get_fcal_position_map() 2482 dma_pool_free(ha->s_dma_pool, pmap, pmap_dma); qla2x00_get_fcal_position_map() 2498 * ha = adapter block pointer. 2515 struct qla_hw_data *ha = vha->hw; qla2x00_get_link_status() local 2527 if (IS_FWI2_CAPABLE(ha)) { qla2x00_get_link_status() 2533 } else if (HAS_EXTENDED_IDS(ha)) { qla2x00_get_link_status() 2626 struct qla_hw_data *ha = vha->hw; qla24xx_abort_command() local 2635 spin_lock_irqsave(&ha->hardware_lock, flags); qla24xx_abort_command() 2640 spin_unlock_irqrestore(&ha->hardware_lock, flags); qla24xx_abort_command() 2646 abt = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &abt_dma); qla24xx_abort_command() 2688 dma_pool_free(ha->s_dma_pool, abt, abt_dma); qla24xx_abort_command() 2709 struct qla_hw_data *ha; __qla24xx_issue_tmf() local 2714 ha = vha->hw; __qla24xx_issue_tmf() 2720 if (ha->flags.cpu_affinity_enabled) __qla24xx_issue_tmf() 2721 rsp = ha->rsp_q_map[tag + 1]; __qla24xx_issue_tmf() 2724 tsk = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &tsk_dma); __qla24xx_issue_tmf() 2736 tsk->p.tsk.timeout = cpu_to_le16(ha->r_a_tov / 10 * 2); __qla24xx_issue_tmf() 2790 dma_pool_free(ha->s_dma_pool, tsk, tsk_dma); __qla24xx_issue_tmf() 2798 struct qla_hw_data *ha = fcport->vha->hw; qla24xx_abort_target() local 2800 if ((ql2xasynctmfenable) && IS_FWI2_CAPABLE(ha)) qla24xx_abort_target() 2809 struct qla_hw_data *ha = fcport->vha->hw; qla24xx_lun_reset() local 2811 if ((ql2xasynctmfenable) && IS_FWI2_CAPABLE(ha)) qla24xx_lun_reset() 2823 struct qla_hw_data *ha = vha->hw; qla2x00_system_error() local 2825 if (!IS_QLA23XX(ha) && !IS_FWI2_CAPABLE(ha)) qla2x00_system_error() 2998 * @ha: HA context 3342 struct qla_hw_data *ha = vha->hw; qla24xx_report_id_acquisition() local 3373 void *wwpn = ha->init_cb->port_name; qla24xx_report_id_acquisition() 3398 spin_lock_irqsave(&ha->vport_slock, flags); qla24xx_report_id_acquisition() 3399 list_for_each_entry(vp, &ha->vp_list, list) { qla24xx_report_id_acquisition() 3405 spin_unlock_irqrestore(&ha->vport_slock, flags); qla24xx_report_id_acquisition() 3447 struct qla_hw_data *ha = vha->hw; qla24xx_modify_vp_config() local 3448 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); qla24xx_modify_vp_config() 3455 vpmod = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &vpmod_dma); qla24xx_modify_vp_config() 3496 dma_pool_free(ha->s_dma_pool, vpmod, vpmod_dma); qla24xx_modify_vp_config() 3506 * ha = adapter block pointer. 3523 struct qla_hw_data *ha = vha->hw; qla24xx_control_vp() local 3525 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); qla24xx_control_vp() 3530 if (vp_index == 0 || vp_index >= ha->max_npiv_vports) qla24xx_control_vp() 3533 vce = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &vce_dma); qla24xx_control_vp() 3551 mutex_lock(&ha->vport_lock); qla24xx_control_vp() 3553 mutex_unlock(&ha->vport_lock); qla24xx_control_vp() 3574 dma_pool_free(ha->s_dma_pool, vce, vce_dma); qla24xx_control_vp() 3584 * ha = adapter block pointer 3696 struct qla_hw_data *ha = vha->hw; qla84xx_verify_chip() local 3701 mn = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &mn_dma); qla84xx_verify_chip() 3707 options = ha->cs84xx->fw_update ? VCO_FORCE_UPDATE : 0; qla84xx_verify_chip() 3759 spin_lock_irqsave(&ha->cs84xx->access_lock, flags); qla84xx_verify_chip() 3760 ha->cs84xx->op_fw_version = qla84xx_verify_chip() 3762 spin_unlock_irqrestore(&ha->cs84xx->access_lock, qla84xx_verify_chip() 3768 dma_pool_free(ha->s_dma_pool, mn, mn_dma); qla84xx_verify_chip() 3788 struct qla_hw_data *ha = vha->hw; qla25xx_init_req_que() local 3793 if (IS_SHADOW_REG_CAPABLE(ha)) qla25xx_init_req_que() 3808 if (IS_QLA83XX(ha) || IS_QLA27XX(ha)) qla25xx_init_req_que() 3822 if (IS_QLA81XX(ha) || IS_QLA83XX(ha) || IS_QLA27XX(ha)) qla25xx_init_req_que() 3824 if (IS_QLA83XX(ha) || IS_QLA27XX(ha)) { qla25xx_init_req_que() 3830 spin_lock_irqsave(&ha->hardware_lock, flags); qla25xx_init_req_que() 3833 if (!IS_QLA83XX(ha) && !IS_QLA27XX(ha)) qla25xx_init_req_que() 3836 spin_unlock_irqrestore(&ha->hardware_lock, flags); qla25xx_init_req_que() 3857 struct qla_hw_data *ha = vha->hw; qla25xx_init_rsp_que() local 3862 if (IS_SHADOW_REG_CAPABLE(ha)) qla25xx_init_rsp_que() 3874 if (IS_QLA83XX(ha) || IS_QLA27XX(ha)) qla25xx_init_rsp_que() 3888 if (IS_QLA81XX(ha)) { qla25xx_init_rsp_que() 3891 } else if (IS_QLA83XX(ha) || IS_QLA27XX(ha)) { qla25xx_init_rsp_que() 3898 spin_lock_irqsave(&ha->hardware_lock, flags); qla25xx_init_rsp_que() 3901 if (!IS_QLA83XX(ha)) qla25xx_init_rsp_que() 3905 spin_unlock_irqrestore(&ha->hardware_lock, flags); qla25xx_init_rsp_que() 4094 struct qla_hw_data *ha = vha->hw; qla82xx_set_driver_version() local 4096 if (!IS_P3P_TYPE(ha)) qla82xx_set_driver_version() 4142 struct qla_hw_data *ha = vha->hw; qla25xx_set_driver_version() local 4144 if (!IS_FWI2_CAPABLE(ha) || IS_QLA24XX_TYPE(ha) || IS_QLA81XX(ha) || qla25xx_set_driver_version() 4145 IS_P3P_TYPE(ha)) qla25xx_set_driver_version() 4151 str = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &str_dma); qla25xx_set_driver_version() 4186 dma_pool_free(ha->s_dma_pool, str, str_dma); qla25xx_set_driver_version() 4231 struct qla_hw_data *ha = vha->hw; qla2x00_read_sfp() local 4236 if (!IS_FWI2_CAPABLE(ha)) qla2x00_read_sfp() 4278 struct qla_hw_data *ha = vha->hw; qla2x00_write_sfp() local 4283 if (!IS_FWI2_CAPABLE(ha)) qla2x00_write_sfp() 4500 struct qla_hw_data *ha = vha->hw; qla2x00_echo_test() local 4508 if (IS_CNA_CAPABLE(ha)) { qla2x00_echo_test() 4526 if (IS_CNA_CAPABLE(ha)) qla2x00_echo_test() 4530 if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha) || qla2x00_echo_test() 4531 IS_CNA_CAPABLE(ha) || IS_QLA2031(ha)) qla2x00_echo_test() 4533 if (IS_CNA_CAPABLE(ha) || IS_QLA2031(ha)) qla2x00_echo_test() 4623 struct qla_hw_data *ha = vha->hw; qla81xx_write_mpi_register() local 4624 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; qla81xx_write_mpi_register() 4631 clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags); qla81xx_write_mpi_register() 4652 &ha->mbx_cmd_flags); qla81xx_write_mpi_register() 4663 if (test_and_clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags)) qla81xx_write_mpi_register() 4685 struct qla_hw_data *ha = vha->hw; qla2x00_get_data_rate() local 4690 if (!IS_FWI2_CAPABLE(ha)) qla2x00_get_data_rate() 4697 if (IS_QLA83XX(ha) || IS_QLA27XX(ha)) qla2x00_get_data_rate() 4709 ha->link_data_rate = mcp->mb[1]; qla2x00_get_data_rate() 4721 struct qla_hw_data *ha = vha->hw; qla81xx_get_port_config() local 4726 if (!IS_QLA81XX(ha) && !IS_QLA83XX(ha) && !IS_QLA8044(ha) && qla81xx_get_port_config() 4727 !IS_QLA27XX(ha)) qla81xx_get_port_config() 4787 struct qla_hw_data *ha = vha->hw; qla24xx_set_fcp_prio() local 4792 if (!IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha)) qla24xx_set_fcp_prio() 4797 if (ha->flags.fcp_prio_enabled) qla24xx_set_fcp_prio() 4829 struct qla_hw_data *ha = vha->hw; qla2x00_get_thermal_temp() local 4832 if (!IS_FWI2_CAPABLE(ha) || IS_QLA24XX_TYPE(ha) || IS_QLA81XX(ha)) { qla2x00_get_thermal_temp() 4838 if (IS_QLA25XX(ha)) { qla2x00_get_thermal_temp() 4839 if (ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC && qla2x00_get_thermal_temp() 4840 ha->pdev->subsystem_device == 0x0175) { qla2x00_get_thermal_temp() 4846 if (ha->pdev->subsystem_vendor == PCI_VENDOR_ID_HP && qla2x00_get_thermal_temp() 4847 ha->pdev->subsystem_device == 0x338e) { qla2x00_get_thermal_temp() 4858 if (IS_QLA82XX(ha)) { qla2x00_get_thermal_temp() 4862 } else if (IS_QLA8044(ha)) { qla2x00_get_thermal_temp() 4876 struct qla_hw_data *ha = vha->hw; qla82xx_mbx_intr_enable() local 4883 if (!IS_FWI2_CAPABLE(ha)) qla82xx_mbx_intr_enable() 4911 struct qla_hw_data *ha = vha->hw; qla82xx_mbx_intr_disable() local 4918 if (!IS_P3P_TYPE(ha)) qla82xx_mbx_intr_disable() 4945 struct qla_hw_data *ha = vha->hw; qla82xx_md_get_template_size() local 4976 ha->md_template_size = ((mcp->mb[3] << 16) | mcp->mb[2]); qla82xx_md_get_template_size() 4977 if (!ha->md_template_size) { qla82xx_md_get_template_size() 4989 struct qla_hw_data *ha = vha->hw; qla82xx_md_get_template() local 4997 ha->md_tmplt_hdr = dma_alloc_coherent(&ha->pdev->dev, qla82xx_md_get_template() 4998 ha->md_template_size, &ha->md_tmplt_hdr_dma, GFP_KERNEL); qla82xx_md_get_template() 4999 if (!ha->md_tmplt_hdr) { qla82xx_md_get_template() 5010 mcp->mb[4] = LSW(LSD(ha->md_tmplt_hdr_dma)); qla82xx_md_get_template() 5011 mcp->mb[5] = MSW(LSD(ha->md_tmplt_hdr_dma)); qla82xx_md_get_template() 5012 mcp->mb[6] = LSW(MSD(ha->md_tmplt_hdr_dma)); qla82xx_md_get_template() 5013 mcp->mb[7] = MSW(MSD(ha->md_tmplt_hdr_dma)); qla82xx_md_get_template() 5014 mcp->mb[8] = LSW(ha->md_template_size); qla82xx_md_get_template() 5015 mcp->mb[9] = MSW(ha->md_template_size); qla82xx_md_get_template() 5038 struct qla_hw_data *ha = vha->hw; qla8044_md_get_template() local 5046 ha->md_tmplt_hdr = dma_alloc_coherent(&ha->pdev->dev, qla8044_md_get_template() 5047 ha->md_template_size, &ha->md_tmplt_hdr_dma, GFP_KERNEL); qla8044_md_get_template() 5048 if (!ha->md_tmplt_hdr) { qla8044_md_get_template() 5055 while (offset < ha->md_template_size) { qla8044_md_get_template() 5060 mcp->mb[4] = LSW(LSD(ha->md_tmplt_hdr_dma + offset)); qla8044_md_get_template() 5061 mcp->mb[5] = MSW(LSD(ha->md_tmplt_hdr_dma + offset)); qla8044_md_get_template() 5062 mcp->mb[6] = LSW(MSD(ha->md_tmplt_hdr_dma + offset)); qla8044_md_get_template() 5063 mcp->mb[7] = MSW(MSD(ha->md_tmplt_hdr_dma + offset)); qla8044_md_get_template() 5093 struct qla_hw_data *ha = vha->hw; qla81xx_set_led_config() local 5097 if (!IS_QLA81XX(ha) && !IS_QLA8031(ha)) qla81xx_set_led_config() 5107 if (IS_QLA8031(ha)) { qla81xx_set_led_config() 5115 if (IS_QLA8031(ha)) qla81xx_set_led_config() 5137 struct qla_hw_data *ha = vha->hw; qla81xx_get_led_config() local 5141 if (!IS_QLA81XX(ha) && !IS_QLA8031(ha)) qla81xx_get_led_config() 5152 if (IS_QLA8031(ha)) qla81xx_get_led_config() 5164 if (IS_QLA8031(ha)) { qla81xx_get_led_config() 5181 struct qla_hw_data *ha = vha->hw; qla82xx_mbx_beacon_ctl() local 5185 if (!IS_P3P_TYPE(ha)) qla82xx_mbx_beacon_ctl() 5219 struct qla_hw_data *ha = vha->hw; qla83xx_wr_reg() local 5223 if (!IS_QLA83XX(ha) && !IS_QLA27XX(ha)) qla83xx_wr_reg() 5256 struct qla_hw_data *ha = vha->hw; qla2x00_port_logout() local 5260 if (IS_QLA2100(ha) || IS_QLA2200(ha)) { qla2x00_port_logout() 5295 struct qla_hw_data *ha = vha->hw; qla83xx_rd_reg() local 5298 if (!IS_QLA83XX(ha) && !IS_QLA27XX(ha)) qla83xx_rd_reg() 5346 struct qla_hw_data *ha = vha->hw; qla83xx_restart_nic_firmware() local 5348 if (!IS_QLA83XX(ha)) qla83xx_restart_nic_firmware() 5364 ha->isp_ops->fw_dump(vha, 0); qla83xx_restart_nic_firmware() 5380 struct qla_hw_data *ha = vha->hw; qla83xx_access_control() local 5382 if (!IS_QLA8031(ha)) qla83xx_access_control() 5409 ha->isp_ops->fw_dump(vha, 0); qla83xx_access_control()
H A D	qla_mr.h	362 #define QLAFX00_SET_HST_INTR(ha, value) \ 363 WRT_REG_DWORD((ha)->cregbase + QLAFX00_HST_TO_HBA_REG, \ 366 #define QLAFX00_CLR_HST_INTR(ha, value) \ 367 WRT_REG_DWORD((ha)->cregbase + QLAFX00_HBA_TO_HOST_REG, \ 370 #define QLAFX00_RD_INTR_REG(ha) \ 371 RD_REG_DWORD((ha)->cregbase + QLAFX00_HBA_TO_HOST_REG) 373 #define QLAFX00_CLR_INTR_REG(ha, value) \ 374 WRT_REG_DWORD((ha)->cregbase + QLAFX00_HBA_TO_HOST_REG, \ 377 #define QLAFX00_SET_HBA_SOC_REG(ha, off, val)\ 378 WRT_REG_DWORD((ha)->cregbase + off, val) 380 #define QLAFX00_GET_HBA_SOC_REG(ha, off)\ 381 RD_REG_DWORD((ha)->cregbase + off) 383 #define QLAFX00_HBA_RST_REG(ha, val)\ 384 WRT_REG_DWORD((ha)->cregbase + QLAFX00_HST_RST_REG, val) 386 #define QLAFX00_RD_ICNTRL_REG(ha) \ 387 RD_REG_DWORD((ha)->cregbase + QLAFX00_HBA_ICNTRL_REG) 389 #define QLAFX00_ENABLE_ICNTRL_REG(ha) \ 390 WRT_REG_DWORD((ha)->cregbase + QLAFX00_HBA_ICNTRL_REG, \ 391 (QLAFX00_GET_HBA_SOC_REG(ha, QLAFX00_HBA_ICNTRL_REG) | \ 394 #define QLAFX00_DISABLE_ICNTRL_REG(ha) \ 395 WRT_REG_DWORD((ha)->cregbase + QLAFX00_HBA_ICNTRL_REG, \ 396 (QLAFX00_GET_HBA_SOC_REG(ha, QLAFX00_HBA_ICNTRL_REG) & \ 399 #define QLAFX00_RD_REG(ha, off) \ 400 RD_REG_DWORD((ha)->cregbase + off) 402 #define QLAFX00_WR_REG(ha, off, val) \ 403 WRT_REG_DWORD((ha)->cregbase + off, val) 507 #define QLAFX00_GET_TEMPERATURE(ha) ((3153000 - (10000 * \ 508 ((QLAFX00_RD_REG(ha, QLAFX00_SOC_TEMP_REG) & 0x3FE) >> 1))) / 13825)
H A D	qla_target.c	102 static void qlt_24xx_atio_pkt(struct scsi_qla_host *ha, 104 static void qlt_response_pkt(struct scsi_qla_host *ha, response_t *pkt); 107 static void qlt_send_term_exchange(struct scsi_qla_host *ha, struct qla_tgt_cmd 109 static void qlt_reject_free_srr_imm(struct scsi_qla_host *ha, 140 /* ha->hardware_lock supposed to be held on entry (to protect tgt->sess_list) */ qlt_find_sess_by_port_name() 175 struct qla_hw_data *ha = vha->hw; qlt_find_host_by_d_id() local 184 BUG_ON(ha->tgt.tgt_vp_map == NULL); qlt_find_host_by_d_id() 185 vp_idx = ha->tgt.tgt_vp_map[d_id[2]].idx; qlt_find_host_by_d_id() 186 if (likely(test_bit(vp_idx, ha->vp_idx_map))) qlt_find_host_by_d_id() 187 return ha->tgt.tgt_vp_map[vp_idx].vha; qlt_find_host_by_d_id() 196 struct qla_hw_data *ha = vha->hw; qlt_find_host_by_vp_idx() local 201 BUG_ON(ha->tgt.tgt_vp_map == NULL); qlt_find_host_by_vp_idx() 202 if (likely(test_bit(vp_idx, ha->vp_idx_map))) qlt_find_host_by_vp_idx() 203 return ha->tgt.tgt_vp_map[vp_idx].vha; qlt_find_host_by_vp_idx() 398 struct qla_hw_data *ha = vha->hw; qlt_free_session_done() local 436 ha->tgt.tgt_ops->free_session(sess); qlt_free_session_done() 456 spin_lock_irqsave(&ha->hardware_lock, flags); qlt_free_session_done() 464 spin_unlock_irqrestore(&ha->hardware_lock, flags); qlt_free_session_done() 479 /* ha->hardware_lock supposed to be held on entry */ qlt_unreg_sess() 495 /* ha->hardware_lock supposed to be held on entry */ qlt_reset() 498 struct qla_hw_data *ha = vha->hw; qlt_reset() local 512 if (!list_empty(&ha->tgt.qla_tgt->sess_list)) { qlt_reset() 513 sess = list_entry(ha->tgt.qla_tgt->sess_list.next, qlt_reset() 537 sess = ha->tgt.tgt_ops->find_sess_by_loop_id(vha, loop_id); qlt_reset() 559 /* ha->hardware_lock supposed to be held on entry */ qlt_schedule_sess_for_deletion() 564 uint32_t dev_loss_tmo = tgt->ha->port_down_retry_count + 5; qlt_schedule_sess_for_deletion() 603 /* ha->hardware_lock supposed to be held on entry */ qlt_clear_tgt_db() 617 struct qla_hw_data *ha = vha->hw; qla24xx_get_loop_id() local 624 gid_list = dma_alloc_coherent(&ha->pdev->dev, qla2x00_gid_list_size(ha), qla24xx_get_loop_id() 629 vha->vp_idx, qla2x00_gid_list_size(ha)); qla24xx_get_loop_id() 654 id_iter += ha->gid_list_info_size; qla24xx_get_loop_id() 658 dma_free_coherent(&ha->pdev->dev, qla2x00_gid_list_size(ha), qla24xx_get_loop_id() 663 /* ha->hardware_lock supposed to be held on entry */ qlt_undelete_sess() 677 struct qla_hw_data *ha = vha->hw; qlt_del_sess_work_fn() local 681 spin_lock_irqsave(&ha->hardware_lock, flags); qlt_del_sess_work_fn() 694 ha->tgt.tgt_ops->shutdown_sess(sess); qlt_del_sess_work_fn() 695 ha->tgt.tgt_ops->put_sess(sess); qlt_del_sess_work_fn() 702 spin_unlock_irqrestore(&ha->hardware_lock, flags); qlt_del_sess_work_fn() 714 struct qla_hw_data *ha = vha->hw; qlt_create_sess() local 720 spin_lock_irqsave(&ha->hardware_lock, flags); qlt_create_sess() 735 spin_unlock_irqrestore(&ha->hardware_lock, qlt_create_sess() 744 ha->tgt.tgt_ops->update_sess(sess, fcport->d_id, fcport->loop_id, qlt_create_sess() 752 spin_unlock_irqrestore(&ha->hardware_lock, flags); qlt_create_sess() 757 spin_unlock_irqrestore(&ha->hardware_lock, flags); qlt_create_sess() 795 if (ha->tgt.tgt_ops->check_initiator_node_acl(vha, qlt_create_sess() 810 spin_lock_irqsave(&ha->hardware_lock, flags); qlt_create_sess() 814 spin_unlock_irqrestore(&ha->hardware_lock, flags); qlt_create_sess() 831 struct qla_hw_data *ha = vha->hw; qlt_fc_port_added() local 845 spin_lock_irqsave(&ha->hardware_lock, flags); qlt_fc_port_added() 847 spin_unlock_irqrestore(&ha->hardware_lock, flags); qlt_fc_port_added() 852 spin_unlock_irqrestore(&ha->hardware_lock, flags); qlt_fc_port_added() 858 spin_lock_irqsave(&ha->hardware_lock, flags); qlt_fc_port_added() 861 spin_unlock_irqrestore(&ha->hardware_lock, flags); qlt_fc_port_added() 878 ha->tgt.tgt_ops->update_sess(sess, fcport->d_id, fcport->loop_id, qlt_fc_port_added() 889 ha->tgt.tgt_ops->put_sess(sess); qlt_fc_port_added() 890 spin_unlock_irqrestore(&ha->hardware_lock, flags); qlt_fc_port_added() 934 struct qla_hw_data *ha = tgt->ha; test_tgt_sess_count() local 941 spin_lock_irqsave(&ha->hardware_lock, flags); test_tgt_sess_count() 946 spin_unlock_irqrestore(&ha->hardware_lock, flags); test_tgt_sess_count() 955 struct qla_hw_data *ha = tgt->ha; qlt_stop_phase1() local 987 spin_lock_irqsave(&ha->hardware_lock, flags); qlt_stop_phase1() 990 spin_unlock_irqrestore(&ha->hardware_lock, flags); qlt_stop_phase1() 1014 if (!ha->flags.host_shutting_down && qla_tgt_mode_enabled(vha)) qlt_stop_phase1() 1026 struct qla_hw_data *ha = tgt->ha; qlt_stop_phase2() local 1027 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); qlt_stop_phase2() 1042 spin_lock_irqsave(&ha->hardware_lock, flags); qlt_stop_phase2() 1044 spin_unlock_irqrestore(&ha->hardware_lock, flags); qlt_stop_phase2() 1046 spin_lock_irqsave(&ha->hardware_lock, flags); qlt_stop_phase2() 1050 spin_unlock_irqrestore(&ha->hardware_lock, flags); qlt_stop_phase2() 1074 /* ha->hardware_lock supposed to be held on entry */ qlt_sched_sess_work() 1107 * ha->hardware_lock supposed to be held on entry. Might drop it, then reaquire 1114 struct qla_hw_data *ha = vha->hw; qlt_send_notify_ack() local 1118 ql_dbg(ql_dbg_tgt, vha, 0xe004, "Sending NOTIFY_ACK (ha=%p)\n", ha); qlt_send_notify_ack() 1168 * ha->hardware_lock supposed to be held on entry. Might drop it, then reaquire 1174 struct qla_hw_data *ha = vha->hw; qlt_24xx_send_abts_resp() local 1180 "Sending task mgmt ABTS response (ha=%p, atio=%p, status=%x\n", qlt_24xx_send_abts_resp() 1181 ha, abts, status); qlt_24xx_send_abts_resp() 1247 * ha->hardware_lock supposed to be held on entry. Might drop it, then reaquire 1255 "Sending retry TERM EXCH CTIO7 (ha=%p)\n", vha->hw); qlt_24xx_retry_term_exchange() 1360 /* ha->hardware_lock supposed to be held on entry */ __qlt_24xx_handle_abts() 1364 struct qla_hw_data *ha = vha->hw; __qlt_24xx_handle_abts() local 1415 rc = ha->tgt.tgt_ops->handle_tmr(mcmd, lun, TMR_ABORT_TASK, __qlt_24xx_handle_abts() 1429 * ha->hardware_lock supposed to be held on entry. Might drop it, then reaquire 1434 struct qla_hw_data *ha = vha->hw; qlt_24xx_handle_abts() local 1466 sess = ha->tgt.tgt_ops->find_sess_by_s_id(vha, s_id); qlt_24xx_handle_abts() 1496 * ha->hardware_lock supposed to be held on entry. Might drop it, then reaquire 1498 static void qlt_24xx_send_task_mgmt_ctio(struct scsi_qla_host *ha, qlt_24xx_send_task_mgmt_ctio() argument 1505 ql_dbg(ql_dbg_tgt, ha, 0xe008, qlt_24xx_send_task_mgmt_ctio() 1506 "Sending task mgmt CTIO7 (ha=%p, atio=%p, resp_code=%x\n", qlt_24xx_send_task_mgmt_ctio() 1507 ha, atio, resp_code); qlt_24xx_send_task_mgmt_ctio() 1510 if (qlt_issue_marker(ha, 1) != QLA_SUCCESS) qlt_24xx_send_task_mgmt_ctio() 1513 ctio = (struct ctio7_to_24xx *)qla2x00_alloc_iocbs(ha, NULL); qlt_24xx_send_task_mgmt_ctio() 1515 ql_dbg(ql_dbg_tgt, ha, 0xe04c, qlt_24xx_send_task_mgmt_ctio() 1517 "request packet\n", ha->vp_idx, __func__); qlt_24xx_send_task_mgmt_ctio() 1526 ctio->vp_index = ha->vp_idx; qlt_24xx_send_task_mgmt_ctio() 1543 qla2x00_start_iocbs(ha, ha->req); qlt_24xx_send_task_mgmt_ctio() 1556 struct qla_hw_data *ha = vha->hw; qlt_xmit_tm_rsp() local 1563 spin_lock_irqsave(&ha->hardware_lock, flags); qlt_xmit_tm_rsp() 1565 if (qla2x00_reset_active(vha) || mcmd->reset_count != ha->chip_reset) { qlt_xmit_tm_rsp() 1573 ha->chip_reset); qlt_xmit_tm_rsp() 1574 ha->tgt.tgt_ops->free_mcmd(mcmd); qlt_xmit_tm_rsp() 1575 spin_unlock_irqrestore(&ha->hardware_lock, flags); qlt_xmit_tm_rsp() 1598 ha->tgt.tgt_ops->free_mcmd(mcmd); qlt_xmit_tm_rsp() 1599 spin_unlock_irqrestore(&ha->hardware_lock, flags); qlt_xmit_tm_rsp() 1611 prm->seg_cnt = pci_map_sg(prm->tgt->ha->pdev, cmd->sg, qlt_pci_map_calc_cnt() 1638 prm->prot_seg_cnt = pci_map_sg(prm->tgt->ha->pdev, qlt_pci_map_calc_cnt() 1666 struct qla_hw_data *ha = vha->hw; qlt_unmap_sg() local 1671 pci_unmap_sg(ha->pdev, cmd->sg, cmd->sg_cnt, cmd->dma_data_direction); qlt_unmap_sg() 1675 pci_unmap_sg(ha->pdev, cmd->prot_sg, cmd->prot_sg_cnt, qlt_unmap_sg() 1679 qla2x00_clean_dsd_pool(ha, NULL, cmd); qlt_unmap_sg() 1682 dma_pool_free(ha->dl_dma_pool, cmd->ctx, cmd->ctx->crc_ctx_dma); qlt_unmap_sg() 1714 * ha->hardware_lock supposed to be held on entry. Might drop it, then reaquire 1729 /* ha->hardware_lock supposed to be held on entry */ qlt_make_handle() 1732 struct qla_hw_data *ha = vha->hw; qlt_make_handle() local 1735 h = ha->tgt.current_handle; qlt_make_handle() 1741 if (h == ha->tgt.current_handle) { qlt_make_handle() 1744 "empty cmd slots in ha %p\n", vha->vp_idx, ha); qlt_make_handle() 1750 (ha->tgt.cmds[h-1] != NULL)); qlt_make_handle() 1753 ha->tgt.current_handle = h; qlt_make_handle() 1758 /* ha->hardware_lock supposed to be held on entry */ qlt_24xx_build_ctio_pkt() 1764 struct qla_hw_data *ha = vha->hw; qlt_24xx_build_ctio_pkt() local 1785 ha->tgt.cmds[h-1] = prm->cmd; qlt_24xx_build_ctio_pkt() 1803 * ha->hardware_lock supposed to be held on entry. We have already made sure 1862 * ha->hardware_lock supposed to be held on entry. We have already made sure 1916 * Called without ha->hardware_lock held 1924 struct qla_hw_data *ha = vha->hw; qlt_pre_xmit_response() local 1973 (IS_FWI2_CAPABLE(ha) && qlt_pre_xmit_response() 1984 static inline int qlt_need_explicit_conf(struct qla_hw_data *ha, qlt_need_explicit_conf() argument 1987 if (ha->tgt.enable_class_2) qlt_need_explicit_conf() 1993 return ha->tgt.enable_explicit_conf && qlt_need_explicit_conf() 2093 if (qlt_need_explicit_conf(prm->tgt->ha, prm->cmd, 0)) { qlt_24xx_init_ctio_to_isp() 2103 if (qlt_need_explicit_conf(prm->tgt->ha, prm->cmd, 1)) { qlt_24xx_init_ctio_to_isp() 2133 "lost", prm->tgt->ha->vp_idx, qlt_24xx_init_ctio_to_isp() 2272 struct qla_hw_data *ha; qlt_build_ctio_crc2_pkt() local 2283 ha = vha->hw; qlt_build_ctio_crc2_pkt() 2324 else if (IS_PI_UNINIT_CAPABLE(ha)) { qlt_build_ctio_crc2_pkt() 2367 ha->tgt.cmds[h-1] = prm->cmd; qlt_build_ctio_crc2_pkt() 2402 dma_pool_alloc(ha->dl_dma_pool, GFP_ATOMIC, &crc_ctx_dma); qlt_build_ctio_crc2_pkt() 2449 if (qla24xx_walk_and_build_sglist_no_difb(ha, NULL, cur_dsd, qlt_build_ctio_crc2_pkt() 2452 } else if (qla24xx_walk_and_build_sglist(ha, NULL, cur_dsd, qlt_build_ctio_crc2_pkt() 2461 if (qla24xx_walk_and_build_prot_sglist(ha, NULL, cur_dsd, qlt_build_ctio_crc2_pkt() 2482 struct qla_hw_data *ha = vha->hw; qlt_xmit_response() local 2489 spin_lock_irqsave(&ha->hardware_lock, flags); qlt_xmit_response() 2497 spin_unlock_irqrestore(&ha->hardware_lock, flags); qlt_xmit_response() 2500 spin_unlock_irqrestore(&ha->hardware_lock, flags); qlt_xmit_response() 2517 spin_lock_irqsave(&ha->hardware_lock, flags); qlt_xmit_response() 2519 if (qla2x00_reset_active(vha) || cmd->reset_count != ha->chip_reset) { qlt_xmit_response() 2529 ha->chip_reset); qlt_xmit_response() 2530 spin_unlock_irqrestore(&ha->hardware_lock, flags); qlt_xmit_response() 2566 if (qlt_need_explicit_conf(ha, cmd, 0)) { qlt_xmit_response() 2622 spin_unlock_irqrestore(&ha->hardware_lock, flags); qlt_xmit_response() 2628 spin_unlock_irqrestore(&ha->hardware_lock, flags); qlt_xmit_response() 2638 struct qla_hw_data *ha = vha->hw; qlt_rdy_to_xfer() local 2658 spin_lock_irqsave(&ha->hardware_lock, flags); qlt_rdy_to_xfer() 2660 if (qla2x00_reset_active(vha) || (cmd->reset_count != ha->chip_reset) || qlt_rdy_to_xfer() 2671 ha->chip_reset); qlt_rdy_to_xfer() 2672 spin_unlock_irqrestore(&ha->hardware_lock, flags); qlt_rdy_to_xfer() 2703 spin_unlock_irqrestore(&ha->hardware_lock, flags); qlt_rdy_to_xfer() 2709 spin_unlock_irqrestore(&ha->hardware_lock, flags); qlt_rdy_to_xfer() 2858 struct qla_hw_data *ha = vha->hw; __qlt_send_term_imm_notif() local 2863 "Sending TERM ELS CTIO (ha=%p)\n", ha); __qlt_send_term_imm_notif() 2942 struct qla_hw_data *ha = vha->hw; __qlt_send_term_exchange() local 2947 ql_dbg(ql_dbg_tgt, vha, 0xe01c, "Sending TERM EXCH CTIO (ha=%p)\n", ha); __qlt_send_term_exchange() 3125 /* ha->hardware_lock supposed to be held on entry */ qlt_prepare_srr_ctio() 3210 * ha->hardware_lock supposed to be held on entry. Might drop it, then reaquire 3230 /* ha->hardware_lock supposed to be held on entry */ qlt_get_cmd() 3234 struct qla_hw_data *ha = vha->hw; qlt_get_cmd() local 3237 if (ha->tgt.cmds[handle] != NULL) { qlt_get_cmd() 3238 struct qla_tgt_cmd *cmd = ha->tgt.cmds[handle]; qlt_get_cmd() 3239 ha->tgt.cmds[handle] = NULL; qlt_get_cmd() 3245 /* ha->hardware_lock supposed to be held on entry */ qlt_ctio_to_cmd() 3289 struct qla_hw_data *ha = vha->hw; qlt_abort_cmd_on_host_reset() local 3308 ha->tgt.tgt_ops->handle_data(cmd); qlt_abort_cmd_on_host_reset() 3321 ha->tgt.tgt_ops->free_cmd(cmd); qlt_abort_cmd_on_host_reset() 3325 qlt_host_reset_handler(struct qla_hw_data *ha) qlt_host_reset_handler() argument 3329 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev); qlt_host_reset_handler() 3347 spin_lock_irqsave(&ha->hardware_lock, flags); qlt_host_reset_handler() 3352 /* ha->tgt.cmds entry is cleared by qlt_get_cmd. */ qlt_host_reset_handler() 3356 spin_unlock_irqrestore(&ha->hardware_lock, flags); qlt_host_reset_handler() 3361 * ha->hardware_lock supposed to be held on entry. Might drop it, then reaquire 3366 struct qla_hw_data *ha = vha->hw; qlt_do_ctio_completion() local 3446 ha->tgt.tgt_ops->handle_dif_err(cmd); qlt_do_ctio_completion() 3493 ha->tgt.tgt_ops->handle_data(cmd); qlt_do_ctio_completion() 3511 ha->tgt.tgt_ops->free_cmd(cmd); qlt_do_ctio_completion() 3554 struct qla_hw_data *ha = vha->hw; __qlt_do_work() local 3597 ret = ha->tgt.tgt_ops->handle_cmd(vha, cmd, cdb, data_length, __qlt_do_work() 3604 spin_lock_irqsave(&ha->hardware_lock, flags); __qlt_do_work() 3605 ha->tgt.tgt_ops->put_sess(sess); __qlt_do_work() 3606 spin_unlock_irqrestore(&ha->hardware_lock, flags); __qlt_do_work() 3616 spin_lock_irqsave(&ha->hardware_lock, flags); __qlt_do_work() 3621 ha->tgt.tgt_ops->put_sess(sess); __qlt_do_work() 3622 spin_unlock_irqrestore(&ha->hardware_lock, flags); __qlt_do_work() 3679 struct qla_hw_data *ha = vha->hw; qlt_create_sess_from_atio() local 3721 spin_lock_irqsave(&ha->hardware_lock, flags); qlt_create_sess_from_atio() 3723 ha->tgt.tgt_ops->put_sess(sess); qlt_create_sess_from_atio() 3724 spin_unlock_irqrestore(&ha->hardware_lock, flags); qlt_create_sess_from_atio() 3729 * __qlt_do_work() will call ha->tgt.tgt_ops->put_sess() to release qlt_create_sess_from_atio() 3737 spin_lock_irqsave(&ha->hardware_lock, flags); qlt_create_sess_from_atio() 3739 spin_unlock_irqrestore(&ha->hardware_lock, flags); qlt_create_sess_from_atio() 3744 /* ha->hardware_lock supposed to be held on entry */ qlt_handle_cmd_for_atio() 3748 struct qla_hw_data *ha = vha->hw; qlt_handle_cmd_for_atio() local 3759 sess = ha->tgt.tgt_ops->find_sess_by_s_id(vha, atio->u.isp24.fcp_hdr.s_id); qlt_handle_cmd_for_atio() 3796 ha->tgt.tgt_ops->put_sess(sess); qlt_handle_cmd_for_atio() 3813 /* ha->hardware_lock supposed to be held on entry */ qlt_issue_task_mgmt() 3818 struct qla_hw_data *ha = vha->hw; qlt_issue_task_mgmt() local 3911 res = ha->tgt.tgt_ops->handle_tmr(mcmd, lun, tmr_func, 0); qlt_issue_task_mgmt() 3923 /* ha->hardware_lock supposed to be held on entry */ qlt_handle_task_mgmt() 3927 struct qla_hw_data *ha = vha->hw; qlt_handle_task_mgmt() local 3938 sess = ha->tgt.tgt_ops->find_sess_by_s_id(vha, qlt_handle_task_mgmt() 3956 /* ha->hardware_lock supposed to be held on entry */ __qlt_abort_task() 3961 struct qla_hw_data *ha = vha->hw; __qlt_abort_task() local 3983 rc = ha->tgt.tgt_ops->handle_tmr(mcmd, unpacked_lun, TMR_ABORT_TASK, __qlt_abort_task() 3996 /* ha->hardware_lock supposed to be held on entry */ qlt_abort_task() 4000 struct qla_hw_data *ha = vha->hw; qlt_abort_task() local 4004 loop_id = GET_TARGET_ID(ha, (struct atio_from_isp *)iocb); qlt_abort_task() 4006 sess = ha->tgt.tgt_ops->find_sess_by_loop_id(vha, loop_id); qlt_abort_task() 4048 * ha->hardware_lock supposed to be held on entry (to protect tgt->sess_list) 4145 * ha->hardware_lock supposed to be held on entry. Might drop it, then reaquire 4151 struct qla_hw_data *ha = vha->hw; qlt_24xx_handle_els() local 4281 if (ha->current_topology != ISP_CFG_F) { qlt_24xx_handle_els() 4453 struct qla_hw_data *ha = vha->hw; qlt_handle_srr() local 4469 spin_lock_irqsave(&ha->hardware_lock, flags); qlt_handle_srr() 4472 spin_unlock_irqrestore(&ha->hardware_lock, flags); qlt_handle_srr() 4495 spin_lock_irqsave(&ha->hardware_lock, flags); qlt_handle_srr() 4498 spin_unlock_irqrestore(&ha->hardware_lock, flags); qlt_handle_srr() 4528 spin_lock_irqsave(&ha->hardware_lock, flags); qlt_handle_srr() 4531 spin_unlock_irqrestore(&ha->hardware_lock, flags); qlt_handle_srr() 4561 spin_lock_irqsave(&ha->hardware_lock, flags); qlt_handle_srr() 4573 spin_unlock_irqrestore(&ha->hardware_lock, flags); qlt_handle_srr() 4579 struct qla_hw_data *ha = vha->hw; qlt_reject_free_srr_imm() local 4583 spin_lock_irqsave(&ha->hardware_lock, flags); qlt_reject_free_srr_imm() 4591 spin_unlock_irqrestore(&ha->hardware_lock, flags); qlt_reject_free_srr_imm() 4676 /* ha->hardware_lock supposed to be held on entry */ qlt_prepare_srr_imm() 4765 * ha->hardware_lock supposed to be held on entry. Might drop it, then reaquire 4770 struct qla_hw_data *ha = vha->hw; qlt_handle_imm_notify() local 4861 GET_TARGET_ID(ha, (struct atio_from_isp *)iocb), qlt_handle_imm_notify() 4903 * ha->hardware_lock supposed to be held on entry. Might drop it, then reaquire 4910 struct qla_hw_data *ha = vha->hw; __qlt_send_busy() local 4914 sess = ha->tgt.tgt_ops->find_sess_by_s_id(vha, __qlt_send_busy() 4968 struct qla_hw_data *ha = vha->hw; qlt_alloc_qfull_cmd() local 4996 sess = ha->tgt.tgt_ops->find_sess_by_s_id qlt_alloc_qfull_cmd() 5053 struct qla_hw_data *ha = vha->hw; qlt_free_qfull_cmds() local 5059 if (list_empty(&ha->tgt.q_full_list)) qlt_free_qfull_cmds() 5066 if (list_empty(&ha->tgt.q_full_list)) { qlt_free_qfull_cmds() 5071 list_for_each_entry_safe(cmd, tcmd, &ha->tgt.q_full_list, cmd_list) { qlt_free_qfull_cmds() 5129 struct qla_hw_data *ha = vha->hw; qlt_chk_qfull_thresh_hold() local 5132 if (ha->tgt.num_pend_cmds < Q_FULL_THRESH_HOLD(ha)) qlt_chk_qfull_thresh_hold() 5140 /* ha->hardware_lock supposed to be held on entry */ 5145 struct qla_hw_data *ha = vha->hw; qlt_24xx_atio_pkt() local 5151 "ATIO pkt, but no tgt (ha %p)", ha); qlt_24xx_atio_pkt() 5234 /* ha->hardware_lock supposed to be held on entry */ 5238 struct qla_hw_data *ha = vha->hw; qlt_response_pkt() local 5244 "tgt (ha %p)\n", vha->vp_idx, pkt->entry_type, ha); qlt_response_pkt() 5419 * ha->hardware_lock supposed to be held on entry. Might drop it, then reaquire 5424 struct qla_hw_data *ha = vha->hw; qlt_async_event() local 5428 if (!ha->tgt.tgt_ops) qlt_async_event() 5433 "ASYNC EVENT %#x, but no tgt (ha %p)\n", code, ha); qlt_async_event() 5438 IS_QLA2100(ha)) qlt_async_event() 5597 struct qla_hw_data *ha = vha->hw; qlt_abort_work() local 5604 spin_lock_irqsave(&ha->hardware_lock, flags); qlt_abort_work() 5613 sess = ha->tgt.tgt_ops->find_sess_by_s_id(vha, qlt_abort_work() 5616 spin_unlock_irqrestore(&ha->hardware_lock, flags); qlt_abort_work() 5623 spin_lock_irqsave(&ha->hardware_lock, flags); qlt_abort_work() 5642 ha->tgt.tgt_ops->put_sess(sess); qlt_abort_work() 5643 spin_unlock_irqrestore(&ha->hardware_lock, flags); qlt_abort_work() 5649 ha->tgt.tgt_ops->put_sess(sess); qlt_abort_work() 5650 spin_unlock_irqrestore(&ha->hardware_lock, flags); qlt_abort_work() 5658 struct qla_hw_data *ha = vha->hw; qlt_tmr_work() local 5667 spin_lock_irqsave(&ha->hardware_lock, flags); qlt_tmr_work() 5673 sess = ha->tgt.tgt_ops->find_sess_by_s_id(vha, s_id); qlt_tmr_work() 5675 spin_unlock_irqrestore(&ha->hardware_lock, flags); qlt_tmr_work() 5682 spin_lock_irqsave(&ha->hardware_lock, flags); qlt_tmr_work() 5704 ha->tgt.tgt_ops->put_sess(sess); qlt_tmr_work() 5705 spin_unlock_irqrestore(&ha->hardware_lock, flags); qlt_tmr_work() 5711 ha->tgt.tgt_ops->put_sess(sess); qlt_tmr_work() 5712 spin_unlock_irqrestore(&ha->hardware_lock, flags); qlt_tmr_work() 5757 int qlt_add_target(struct qla_hw_data *ha, struct scsi_qla_host *base_vha) qlt_add_target() argument 5764 if (!IS_TGT_MODE_CAPABLE(ha)) { qlt_add_target() 5771 "Registering target for host %ld(%p).\n", base_vha->host_no, ha); qlt_add_target() 5785 tgt->ha = ha; qlt_add_target() 5823 int qlt_remove_target(struct qla_hw_data *ha, struct scsi_qla_host *vha) qlt_remove_target() argument 5841 vha->host_no, ha); qlt_remove_target() 5882 struct qla_hw_data *ha; qlt_lport_register() local 5891 ha = vha->hw; qlt_lport_register() 5900 spin_lock_irqsave(&ha->hardware_lock, flags); qlt_lport_register() 5904 spin_unlock_irqrestore(&ha->hardware_lock, flags); qlt_lport_register() 5910 spin_unlock_irqrestore(&ha->hardware_lock, flags); qlt_lport_register() 5913 spin_unlock_irqrestore(&ha->hardware_lock, flags); qlt_lport_register() 5947 struct qla_hw_data *ha = vha->hw; qlt_lport_deregister() local 5953 ha->tgt.tgt_ops = NULL; qlt_lport_deregister() 5964 struct qla_hw_data *ha = vha->hw; qlt_set_mode() local 5978 if (ha->tgt.ini_mode_force_reverse) qlt_set_mode() 5985 struct qla_hw_data *ha = vha->hw; qlt_clear_mode() local 6001 if (ha->tgt.ini_mode_force_reverse) qlt_clear_mode() 6013 struct qla_hw_data *ha = vha->hw; qlt_enable_vha() local 6016 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev); qlt_enable_vha() 6026 spin_lock_irqsave(&ha->hardware_lock, flags); qlt_enable_vha() 6029 spin_unlock_irqrestore(&ha->hardware_lock, flags); qlt_enable_vha() 6049 struct qla_hw_data *ha = vha->hw; qlt_disable_vha() local 6061 spin_lock_irqsave(&ha->hardware_lock, flags); qlt_disable_vha() 6063 spin_unlock_irqrestore(&ha->hardware_lock, flags); qlt_disable_vha() 6076 qlt_vport_create(struct scsi_qla_host *vha, struct qla_hw_data *ha) qlt_vport_create() argument 6094 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX; qlt_vport_create() 6096 qlt_add_target(ha, vha); qlt_vport_create() 6117 * @ha: HA context 6127 struct qla_hw_data *ha = vha->hw; qlt_init_atio_q_entries() local 6129 struct atio_from_isp *pkt = (struct atio_from_isp *)ha->tgt.atio_ring; qlt_init_atio_q_entries() 6134 for (cnt = 0; cnt < ha->tgt.atio_q_length; cnt++) { qlt_init_atio_q_entries() 6143 * @ha: SCSI driver HA context 6148 struct qla_hw_data *ha = vha->hw; qlt_24xx_process_atio_queue() local 6155 while (ha->tgt.atio_ring_ptr->signature != ATIO_PROCESSED) { qlt_24xx_process_atio_queue() 6156 pkt = (struct atio_from_isp *)ha->tgt.atio_ring_ptr; qlt_24xx_process_atio_queue() 6162 ha->tgt.atio_ring_index++; qlt_24xx_process_atio_queue() 6163 if (ha->tgt.atio_ring_index == ha->tgt.atio_q_length) { qlt_24xx_process_atio_queue() 6164 ha->tgt.atio_ring_index = 0; qlt_24xx_process_atio_queue() 6165 ha->tgt.atio_ring_ptr = ha->tgt.atio_ring; qlt_24xx_process_atio_queue() 6167 ha->tgt.atio_ring_ptr++; qlt_24xx_process_atio_queue() 6170 pkt = (struct atio_from_isp *)ha->tgt.atio_ring_ptr; qlt_24xx_process_atio_queue() 6176 WRT_REG_DWORD(ISP_ATIO_Q_OUT(vha), ha->tgt.atio_ring_index); qlt_24xx_process_atio_queue() 6182 struct qla_hw_data *ha = vha->hw; qlt_24xx_config_rings() local 6190 if (IS_ATIO_MSIX_CAPABLE(ha)) { qlt_24xx_config_rings() 6191 struct qla_msix_entry *msix = &ha->msix_entries[2]; qlt_24xx_config_rings() 6192 struct init_cb_24xx *icb = (struct init_cb_24xx *)ha->init_cb; qlt_24xx_config_rings() 6204 struct qla_hw_data *ha = vha->hw; qlt_24xx_config_nvram_stage1() local 6207 if (!ha->tgt.saved_set) { qlt_24xx_config_nvram_stage1() 6209 ha->tgt.saved_exchange_count = nv->exchange_count; qlt_24xx_config_nvram_stage1() 6210 ha->tgt.saved_firmware_options_1 = qlt_24xx_config_nvram_stage1() 6212 ha->tgt.saved_firmware_options_2 = qlt_24xx_config_nvram_stage1() 6214 ha->tgt.saved_firmware_options_3 = qlt_24xx_config_nvram_stage1() 6216 ha->tgt.saved_set = 1; qlt_24xx_config_nvram_stage1() 6244 if (ha->tgt.saved_set) { qlt_24xx_config_nvram_stage1() 6245 nv->exchange_count = ha->tgt.saved_exchange_count; qlt_24xx_config_nvram_stage1() 6247 ha->tgt.saved_firmware_options_1; qlt_24xx_config_nvram_stage1() 6249 ha->tgt.saved_firmware_options_2; qlt_24xx_config_nvram_stage1() 6251 ha->tgt.saved_firmware_options_3; qlt_24xx_config_nvram_stage1() 6259 if (ha->tgt.enable_class_2) { qlt_24xx_config_nvram_stage1() 6277 struct qla_hw_data *ha = vha->hw; qlt_24xx_config_nvram_stage2() local 6279 if (ha->tgt.node_name_set) { qlt_24xx_config_nvram_stage2() 6280 memcpy(icb->node_name, ha->tgt.tgt_node_name, WWN_SIZE); qlt_24xx_config_nvram_stage2() 6288 struct qla_hw_data *ha = vha->hw; qlt_81xx_config_nvram_stage1() local 6294 if (!ha->tgt.saved_set) { qlt_81xx_config_nvram_stage1() 6296 ha->tgt.saved_exchange_count = nv->exchange_count; qlt_81xx_config_nvram_stage1() 6297 ha->tgt.saved_firmware_options_1 = qlt_81xx_config_nvram_stage1() 6299 ha->tgt.saved_firmware_options_2 = qlt_81xx_config_nvram_stage1() 6301 ha->tgt.saved_firmware_options_3 = qlt_81xx_config_nvram_stage1() 6303 ha->tgt.saved_set = 1; qlt_81xx_config_nvram_stage1() 6332 if (ha->tgt.saved_set) { qlt_81xx_config_nvram_stage1() 6333 nv->exchange_count = ha->tgt.saved_exchange_count; qlt_81xx_config_nvram_stage1() 6335 ha->tgt.saved_firmware_options_1; qlt_81xx_config_nvram_stage1() 6337 ha->tgt.saved_firmware_options_2; qlt_81xx_config_nvram_stage1() 6339 ha->tgt.saved_firmware_options_3; qlt_81xx_config_nvram_stage1() 6347 if (ha->tgt.enable_class_2) { qlt_81xx_config_nvram_stage1() 6365 struct qla_hw_data *ha = vha->hw; qlt_81xx_config_nvram_stage2() local 6370 if (ha->tgt.node_name_set) { qlt_81xx_config_nvram_stage2() 6371 memcpy(icb->node_name, ha->tgt.tgt_node_name, WWN_SIZE); qlt_81xx_config_nvram_stage2() 6377 qlt_83xx_iospace_config(struct qla_hw_data *ha) qlt_83xx_iospace_config() argument 6382 ha->msix_count += 1; /* For ATIO Q */ qlt_83xx_iospace_config() 6413 qlt_probe_one_stage1(struct scsi_qla_host *base_vha, struct qla_hw_data *ha) qlt_probe_one_stage1() argument 6418 if (ha->mqenable || IS_QLA83XX(ha)) { qlt_probe_one_stage1() 6419 ISP_ATIO_Q_IN(base_vha) = &ha->mqiobase->isp25mq.atio_q_in; qlt_probe_one_stage1() 6420 ISP_ATIO_Q_OUT(base_vha) = &ha->mqiobase->isp25mq.atio_q_out; qlt_probe_one_stage1() 6422 ISP_ATIO_Q_IN(base_vha) = &ha->iobase->isp24.atio_q_in; qlt_probe_one_stage1() 6423 ISP_ATIO_Q_OUT(base_vha) = &ha->iobase->isp24.atio_q_out; qlt_probe_one_stage1() 6436 struct qla_hw_data *ha; qla83xx_msix_atio_q() local 6440 ha = rsp->hw; qla83xx_msix_atio_q() 6441 vha = pci_get_drvdata(ha->pdev); qla83xx_msix_atio_q() 6443 spin_lock_irqsave(&ha->hardware_lock, flags); qla83xx_msix_atio_q() 6448 spin_unlock_irqrestore(&ha->hardware_lock, flags); qla83xx_msix_atio_q() 6454 qlt_mem_alloc(struct qla_hw_data *ha) qlt_mem_alloc() argument 6459 ha->tgt.tgt_vp_map = kzalloc(sizeof(struct qla_tgt_vp_map) * qlt_mem_alloc() 6461 if (!ha->tgt.tgt_vp_map) qlt_mem_alloc() 6464 ha->tgt.atio_ring = dma_alloc_coherent(&ha->pdev->dev, qlt_mem_alloc() 6465 (ha->tgt.atio_q_length + 1) * sizeof(struct atio_from_isp), qlt_mem_alloc() 6466 &ha->tgt.atio_dma, GFP_KERNEL); qlt_mem_alloc() 6467 if (!ha->tgt.atio_ring) { qlt_mem_alloc() 6468 kfree(ha->tgt.tgt_vp_map); qlt_mem_alloc() 6475 qlt_mem_free(struct qla_hw_data *ha) qlt_mem_free() argument 6480 if (ha->tgt.atio_ring) { qlt_mem_free() 6481 dma_free_coherent(&ha->pdev->dev, (ha->tgt.atio_q_length + 1) * qlt_mem_free() 6482 sizeof(struct atio_from_isp), ha->tgt.atio_ring, qlt_mem_free() 6483 ha->tgt.atio_dma); qlt_mem_free() 6485 kfree(ha->tgt.tgt_vp_map); qlt_mem_free()
H A D	qla_def.h	215 #define LOOPID_MAP_SIZE (ha->max_fibre_devices) 666 #define ISP_REQ_Q_IN(ha, reg) \ 667 (IS_QLA2100(ha) || IS_QLA2200(ha) ? \ 670 #define ISP_REQ_Q_OUT(ha, reg) \ 671 (IS_QLA2100(ha) || IS_QLA2200(ha) ? \ 674 #define ISP_RSP_Q_IN(ha, reg) \ 675 (IS_QLA2100(ha) || IS_QLA2200(ha) ? \ 678 #define ISP_RSP_Q_OUT(ha, reg) \ 679 (IS_QLA2100(ha) || IS_QLA2200(ha) ? \ 686 #define MAILBOX_REG(ha, reg, num) \ 687 (IS_QLA2100(ha) || IS_QLA2200(ha) ? \ 692 #define RD_MAILBOX_REG(ha, reg, num) \ 693 RD_REG_WORD(MAILBOX_REG(ha, reg, num)) 694 #define WRT_MAILBOX_REG(ha, reg, num, data) \ 695 WRT_REG_WORD(MAILBOX_REG(ha, reg, num), data) 697 #define FB_CMD_REG(ha, reg) \ 698 (IS_QLA2100(ha) || IS_QLA2200(ha) ? \ 701 #define RD_FB_CMD_REG(ha, reg) \ 702 RD_REG_WORD(FB_CMD_REG(ha, reg)) 703 #define WRT_FB_CMD_REG(ha, reg, data) \ 704 WRT_REG_WORD(FB_CMD_REG(ha, reg), data) 1526 #define SET_TARGET_ID(ha, to, from) \ 1528 if (HAS_EXTENDED_IDS(ha)) \ 2796 #define ISP_QUE_REG(ha, id) \ 2797 ((ha->mqenable || IS_QLA83XX(ha) || IS_QLA27XX(ha)) ? \ 2798 ((void __iomem *)ha->mqiobase + (QLA_QUE_PAGE * id)) :\ 2799 ((void __iomem *)ha->iobase)) 2917 #define Q_FULL_THRESH_HOLD(ha) \ 2918 ((ha->fw_xcb_count/100) * Q_FULL_THRESH_HOLD_PERCENT) 3096 #define DT_MASK(ha) ((ha)->device_type & (DT_ISP_LAST - 1)) 3097 #define IS_QLA2100(ha) (DT_MASK(ha) & DT_ISP2100) 3098 #define IS_QLA2200(ha) (DT_MASK(ha) & DT_ISP2200) 3099 #define IS_QLA2300(ha) (DT_MASK(ha) & DT_ISP2300) 3100 #define IS_QLA2312(ha) (DT_MASK(ha) & DT_ISP2312) 3101 #define IS_QLA2322(ha) (DT_MASK(ha) & DT_ISP2322) 3102 #define IS_QLA6312(ha) (DT_MASK(ha) & DT_ISP6312) 3103 #define IS_QLA6322(ha) (DT_MASK(ha) & DT_ISP6322) 3104 #define IS_QLA2422(ha) (DT_MASK(ha) & DT_ISP2422) 3105 #define IS_QLA2432(ha) (DT_MASK(ha) & DT_ISP2432) 3106 #define IS_QLA5422(ha) (DT_MASK(ha) & DT_ISP5422) 3107 #define IS_QLA5432(ha) (DT_MASK(ha) & DT_ISP5432) 3108 #define IS_QLA2532(ha) (DT_MASK(ha) & DT_ISP2532) 3109 #define IS_QLA8432(ha) (DT_MASK(ha) & DT_ISP8432) 3110 #define IS_QLA8001(ha) (DT_MASK(ha) & DT_ISP8001) 3111 #define IS_QLA81XX(ha) (IS_QLA8001(ha)) 3112 #define IS_QLA82XX(ha) (DT_MASK(ha) & DT_ISP8021) 3113 #define IS_QLA8044(ha) (DT_MASK(ha) & DT_ISP8044) 3114 #define IS_QLA2031(ha) (DT_MASK(ha) & DT_ISP2031) 3115 #define IS_QLA8031(ha) (DT_MASK(ha) & DT_ISP8031) 3116 #define IS_QLAFX00(ha) (DT_MASK(ha) & DT_ISPFX00) 3117 #define IS_QLA2071(ha) (DT_MASK(ha) & DT_ISP2071) 3118 #define IS_QLA2271(ha) (DT_MASK(ha) & DT_ISP2271) 3120 #define IS_QLA23XX(ha) (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA2322(ha) || \ 3121 IS_QLA6312(ha) || IS_QLA6322(ha)) 3122 #define IS_QLA24XX(ha) (IS_QLA2422(ha) || IS_QLA2432(ha)) 3123 #define IS_QLA54XX(ha) (IS_QLA5422(ha) || IS_QLA5432(ha)) 3124 #define IS_QLA25XX(ha) (IS_QLA2532(ha)) 3125 #define IS_QLA83XX(ha) (IS_QLA2031(ha) || IS_QLA8031(ha)) 3126 #define IS_QLA84XX(ha) (IS_QLA8432(ha)) 3127 #define IS_QLA27XX(ha) (IS_QLA2071(ha) || IS_QLA2271(ha)) 3128 #define IS_QLA24XX_TYPE(ha) (IS_QLA24XX(ha) || IS_QLA54XX(ha) || \ 3129 IS_QLA84XX(ha)) 3130 #define IS_CNA_CAPABLE(ha) (IS_QLA81XX(ha) || IS_QLA82XX(ha) || \ 3131 IS_QLA8031(ha) || IS_QLA8044(ha)) 3132 #define IS_P3P_TYPE(ha) (IS_QLA82XX(ha) || IS_QLA8044(ha)) 3133 #define IS_QLA2XXX_MIDTYPE(ha) (IS_QLA24XX(ha) || IS_QLA84XX(ha) || \ 3134 IS_QLA25XX(ha) || IS_QLA81XX(ha) || \ 3135 IS_QLA82XX(ha) || IS_QLA83XX(ha) || \ 3136 IS_QLA8044(ha) || IS_QLA27XX(ha)) 3137 #define IS_MSIX_NACK_CAPABLE(ha) (IS_QLA81XX(ha) || IS_QLA83XX(ha) || \ 3138 IS_QLA27XX(ha)) 3139 #define IS_NOPOLLING_TYPE(ha) (IS_QLA81XX(ha) && (ha)->flags.msix_enabled) 3140 #define IS_FAC_REQUIRED(ha) (IS_QLA81XX(ha) || IS_QLA83XX(ha) || \ 3141 IS_QLA27XX(ha)) 3142 #define IS_NOCACHE_VPD_TYPE(ha) (IS_QLA81XX(ha) || IS_QLA83XX(ha) || \ 3143 IS_QLA27XX(ha)) 3144 #define IS_ALOGIO_CAPABLE(ha) (IS_QLA23XX(ha) || IS_FWI2_CAPABLE(ha)) 3146 #define IS_T10_PI_CAPABLE(ha) ((ha)->device_type & DT_T10_PI) 3147 #define IS_IIDMA_CAPABLE(ha) ((ha)->device_type & DT_IIDMA) 3148 #define IS_FWI2_CAPABLE(ha) ((ha)->device_type & DT_FWI2) 3149 #define IS_ZIO_SUPPORTED(ha) ((ha)->device_type & DT_ZIO_SUPPORTED) 3150 #define IS_OEM_001(ha) ((ha)->device_type & DT_OEM_001) 3151 #define HAS_EXTENDED_IDS(ha) ((ha)->device_type & DT_EXTENDED_IDS) 3152 #define IS_CT6_SUPPORTED(ha) ((ha)->device_type & DT_CT6_SUPPORTED) 3153 #define IS_MQUE_CAPABLE(ha) ((ha)->mqenable || IS_QLA83XX(ha) || \ 3154 IS_QLA27XX(ha)) 3155 #define IS_BIDI_CAPABLE(ha) ((IS_QLA25XX(ha) || IS_QLA2031(ha))) 3157 #define IS_MCTP_CAPABLE(ha) (IS_QLA2031(ha) && \ 3158 ((ha)->fw_attributes_ext[0] & BIT_0)) 3159 #define IS_PI_UNINIT_CAPABLE(ha) (IS_QLA83XX(ha)) 3160 #define IS_PI_IPGUARD_CAPABLE(ha) (IS_QLA83XX(ha)) 3161 #define IS_PI_DIFB_DIX0_CAPABLE(ha) (0) 3162 #define IS_PI_SPLIT_DET_CAPABLE_HBA(ha) (IS_QLA83XX(ha)) 3163 #define IS_PI_SPLIT_DET_CAPABLE(ha) (IS_PI_SPLIT_DET_CAPABLE_HBA(ha) && \ 3164 (((ha)->fw_attributes_h << 16 | (ha)->fw_attributes) & BIT_22)) 3165 #define IS_ATIO_MSIX_CAPABLE(ha) (IS_QLA83XX(ha)) 3166 #define IS_TGT_MODE_CAPABLE(ha) (ha->tgt.atio_q_length) 3167 #define IS_SHADOW_REG_CAPABLE(ha) (IS_QLA27XX(ha)) 3168 #define IS_DPORT_CAPABLE(ha) (IS_QLA83XX(ha) || IS_QLA27XX(ha)) 3644 #define LOOP_TRANSITION(ha) \ 3645 (test_bit(ISP_ABORT_NEEDED, &ha->dpc_flags) || \ 3646 test_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags) || \ 3647 atomic_read(&ha->loop_state) == LOOP_DOWN) 3649 #define STATE_TRANSITION(ha) \ 3650 (test_bit(ISP_ABORT_NEEDED, &ha->dpc_flags) || \ 3651 test_bit(LOOP_RESYNC_NEEDED, &ha->dpc_flags))
H A D	qla_iocb.c	90 * @ha: HA context 119 * @ha: HA context 325 struct qla_hw_data *ha; qla2x00_start_scsi() local 332 ha = vha->hw; qla2x00_start_scsi() 333 reg = &ha->iobase->isp; qla2x00_start_scsi() 335 req = ha->req_q_map[0]; qla2x00_start_scsi() 336 rsp = ha->rsp_q_map[0]; qla2x00_start_scsi() 350 spin_lock_irqsave(&ha->hardware_lock, flags); qla2x00_start_scsi() 366 nseg = dma_map_sg(&ha->pdev->dev, scsi_sglist(cmd), qla2x00_start_scsi() 376 req_cnt = ha->isp_ops->calc_req_entries(tot_dsds); qla2x00_start_scsi() 378 cnt = RD_REG_WORD_RELAXED(ISP_REQ_Q_OUT(ha, reg)); qla2x00_start_scsi() 404 SET_TARGET_ID(ha, cmd_pkt->target, sp->fcport->loop_id); qla2x00_start_scsi() 413 ha->isp_ops->build_iocbs(sp, cmd_pkt, tot_dsds); qla2x00_start_scsi() 430 WRT_REG_WORD(ISP_REQ_Q_IN(ha, reg), req->ring_index); qla2x00_start_scsi() 431 RD_REG_WORD_RELAXED(ISP_REQ_Q_IN(ha, reg)); /* PCI Posting. */ qla2x00_start_scsi() 438 spin_unlock_irqrestore(&ha->hardware_lock, flags); qla2x00_start_scsi() 445 spin_unlock_irqrestore(&ha->hardware_lock, flags); qla2x00_start_scsi() 456 struct qla_hw_data *ha = vha->hw; qla2x00_start_iocbs() local 457 device_reg_t __iomem *reg = ISP_QUE_REG(ha, req->id); qla2x00_start_iocbs() 459 if (IS_P3P_TYPE(ha)) { qla2x00_start_iocbs() 471 if (ha->mqenable || IS_QLA83XX(ha) || IS_QLA27XX(ha)) { qla2x00_start_iocbs() 473 RD_REG_DWORD_RELAXED(&ha->iobase->isp24.hccr); qla2x00_start_iocbs() 474 } else if (IS_QLAFX00(ha)) { qla2x00_start_iocbs() 477 QLAFX00_SET_HST_INTR(ha, ha->rqstq_intr_code); qla2x00_start_iocbs() 478 } else if (IS_FWI2_CAPABLE(ha)) { qla2x00_start_iocbs() 482 WRT_REG_WORD(ISP_REQ_Q_IN(ha, &reg->isp), qla2x00_start_iocbs() 484 RD_REG_WORD_RELAXED(ISP_REQ_Q_IN(ha, &reg->isp)); qla2x00_start_iocbs() 491 * @ha: HA context 508 struct qla_hw_data *ha = vha->hw; __qla2x00_marker() local 509 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev); __qla2x00_marker() 511 req = ha->req_q_map[0]; __qla2x00_marker() 523 if (IS_FWI2_CAPABLE(ha)) { __qla2x00_marker() 531 SET_TARGET_ID(ha, mrk->target, loop_id); __qla2x00_marker() 586 struct qla_hw_data *ha; qla24xx_build_scsi_type_6_iocbs() local 610 ha = vha->hw; qla24xx_build_scsi_type_6_iocbs() 634 dsd_ptr = list_first_entry(&ha->gbl_dsd_list, qla24xx_build_scsi_type_6_iocbs() 638 ha->gbl_dsd_avail--; qla24xx_build_scsi_type_6_iocbs() 641 ha->gbl_dsd_inuse++; qla24xx_build_scsi_type_6_iocbs() 919 qla24xx_walk_and_build_sglist_no_difb(struct qla_hw_data *ha, srb_t *sp, qla24xx_walk_and_build_sglist_no_difb() argument 979 dma_pool_alloc(ha->dl_dma_pool, GFP_ATOMIC, qla24xx_walk_and_build_sglist_no_difb() 1038 qla24xx_walk_and_build_sglist(struct qla_hw_data *ha, srb_t *sp, uint32_t *dsd, qla24xx_walk_and_build_sglist() argument 1082 dma_pool_alloc(ha->dl_dma_pool, GFP_ATOMIC, for_each_sg() 1128 qla24xx_walk_and_build_prot_sglist(struct qla_hw_data *ha, srb_t *sp, qla24xx_walk_and_build_prot_sglist() argument 1174 dma_pool_alloc(ha->dl_dma_pool, GFP_ATOMIC, for_each_sg() 1242 struct qla_hw_data *ha; qla24xx_build_scsi_crc_2_iocbs() local 1256 ha = vha->hw; qla24xx_build_scsi_crc_2_iocbs() 1284 dma_pool_alloc(ha->dl_dma_pool, GFP_ATOMIC, &crc_ctx_dma); qla24xx_build_scsi_crc_2_iocbs() 1367 else if (IS_PI_UNINIT_CAPABLE(ha)) { qla24xx_build_scsi_crc_2_iocbs() 1412 if (qla24xx_walk_and_build_sglist_no_difb(ha, sp, qla24xx_build_scsi_crc_2_iocbs() 1415 } else if (qla24xx_walk_and_build_sglist(ha, sp, cur_dsd, qla24xx_build_scsi_crc_2_iocbs() 1424 if (qla24xx_walk_and_build_prot_sglist(ha, sp, cur_dsd, qla24xx_build_scsi_crc_2_iocbs() 1458 struct qla_hw_data *ha = vha->hw; qla24xx_start_scsi() local 1478 spin_lock_irqsave(&ha->hardware_lock, flags); qla24xx_start_scsi() 1494 nseg = dma_map_sg(&ha->pdev->dev, scsi_sglist(cmd), qla24xx_start_scsi() 1504 cnt = IS_SHADOW_REG_CAPABLE(ha) ? *req->out_ptr : qla24xx_start_scsi() 1569 RD_REG_DWORD_RELAXED(&ha->iobase->isp24.hccr); qla24xx_start_scsi() 1576 spin_unlock_irqrestore(&ha->hardware_lock, flags); qla24xx_start_scsi() 1583 spin_unlock_irqrestore(&ha->hardware_lock, flags); qla24xx_start_scsi() 1611 struct qla_hw_data *ha = vha->hw; qla24xx_dif_start_scsi() local 1640 spin_lock_irqsave(&ha->hardware_lock, flags); qla24xx_dif_start_scsi() 1658 nseg = dma_map_sg(&ha->pdev->dev, scsi_sglist(cmd), qla24xx_dif_start_scsi() 1688 nseg = dma_map_sg(&ha->pdev->dev, scsi_prot_sglist(cmd), qla24xx_dif_start_scsi() 1708 cnt = IS_SHADOW_REG_CAPABLE(ha) ? *req->out_ptr : qla24xx_dif_start_scsi() 1769 RD_REG_DWORD_RELAXED(&ha->iobase->isp24.hccr); qla24xx_dif_start_scsi() 1776 spin_unlock_irqrestore(&ha->hardware_lock, flags); qla24xx_dif_start_scsi() 1787 spin_unlock_irqrestore(&ha->hardware_lock, flags); qla24xx_dif_start_scsi() 1795 struct qla_hw_data *ha = sp->fcport->vha->hw; qla25xx_set_que() local 1798 if (ha->flags.cpu_affinity_enabled && affinity >= 0 && qla25xx_set_que() 1799 affinity < ha->max_rsp_queues - 1) qla25xx_set_que() 1800 *rsp = ha->rsp_q_map[affinity + 1]; qla25xx_set_que() 1802 *rsp = ha->rsp_q_map[0]; qla25xx_set_que() 1820 struct qla_hw_data *ha = vha->hw; qla2x00_alloc_iocbs() local 1821 struct req_que *req = ha->req_q_map[0]; qla2x00_alloc_iocbs() 1822 device_reg_t __iomem *reg = ISP_QUE_REG(ha, req->id); qla2x00_alloc_iocbs() 1861 if (ha->mqenable || IS_QLA83XX(ha) || IS_QLA27XX(ha)) qla2x00_alloc_iocbs() 1863 else if (IS_P3P_TYPE(ha)) qla2x00_alloc_iocbs() 1865 else if (IS_FWI2_CAPABLE(ha)) qla2x00_alloc_iocbs() 1867 else if (IS_QLAFX00(ha)) qla2x00_alloc_iocbs() 1871 ISP_REQ_Q_OUT(ha, &reg->isp)); qla2x00_alloc_iocbs() 1886 if (IS_QLAFX00(ha)) { qla2x00_alloc_iocbs() 1919 struct qla_hw_data *ha = sp->fcport->vha->hw; qla2x00_login_iocb() local 1924 SET_TARGET_ID(ha, mbx->loop_id, sp->fcport->loop_id); qla2x00_login_iocb() 1928 if (HAS_EXTENDED_IDS(ha)) { qla2x00_login_iocb() 1959 struct qla_hw_data *ha = sp->fcport->vha->hw; qla2x00_logout_iocb() local 1962 SET_TARGET_ID(ha, mbx->loop_id, sp->fcport->loop_id); qla2x00_logout_iocb() 1964 mbx->mb1 = HAS_EXTENDED_IDS(ha) ? qla2x00_logout_iocb() 1986 struct qla_hw_data *ha = sp->fcport->vha->hw; qla2x00_adisc_iocb() local 1989 SET_TARGET_ID(ha, mbx->loop_id, sp->fcport->loop_id); qla2x00_adisc_iocb() 1991 if (HAS_EXTENDED_IDS(ha)) { qla2x00_adisc_iocb() 1997 mbx->mb2 = cpu_to_le16(MSW(ha->async_pd_dma)); qla2x00_adisc_iocb() 1998 mbx->mb3 = cpu_to_le16(LSW(ha->async_pd_dma)); qla2x00_adisc_iocb() 1999 mbx->mb6 = cpu_to_le16(MSW(MSD(ha->async_pd_dma))); qla2x00_adisc_iocb() 2000 mbx->mb7 = cpu_to_le16(LSW(MSD(ha->async_pd_dma))); qla2x00_adisc_iocb() 2011 struct qla_hw_data *ha = vha->hw; qla24xx_tm_iocb() local 2022 tsk->timeout = cpu_to_le16(ha->r_a_tov / 10 * 2); qla24xx_tm_iocb() 2091 struct qla_hw_data *ha = vha->hw; qla2x00_ct_iocb() local 2101 SET_TARGET_ID(ha, ct_iocb->loop_id, sp->fcport->loop_id); qla2x00_ct_iocb() 2170 struct qla_hw_data *ha = vha->hw; qla24xx_ct_iocb() local 2217 ha->req_q_map[0]); qla24xx_ct_iocb() 2258 struct qla_hw_data *ha = vha->hw; qla82xx_start_scsi() local 2264 reg = &ha->iobase->isp82; qla82xx_start_scsi() 2267 rsp = ha->rsp_q_map[0]; qla82xx_start_scsi() 2272 dbval = 0x04 | (ha->portnum << 5); qla82xx_start_scsi() 2286 spin_lock_irqsave(&ha->hardware_lock, flags); qla82xx_start_scsi() 2302 nseg = dma_map_sg(&ha->pdev->dev, scsi_sglist(cmd), qla82xx_start_scsi() 2318 if ((more_dsd_lists + ha->gbl_dsd_inuse) >= NUM_DSD_CHAIN) { qla82xx_start_scsi() 2321 more_dsd_lists + ha->gbl_dsd_inuse, NUM_DSD_CHAIN, qla82xx_start_scsi() 2326 if (more_dsd_lists <= ha->gbl_dsd_avail) qla82xx_start_scsi() 2329 more_dsd_lists -= ha->gbl_dsd_avail; qla82xx_start_scsi() 2340 dsd_ptr->dsd_addr = dma_pool_alloc(ha->dl_dma_pool, qla82xx_start_scsi() 2349 list_add_tail(&dsd_ptr->list, &ha->gbl_dsd_list); qla82xx_start_scsi() 2350 ha->gbl_dsd_avail++; qla82xx_start_scsi() 2369 mempool_alloc(ha->ctx_mempool, GFP_ATOMIC); qla82xx_start_scsi() 2377 ctx->fcp_cmnd = dma_pool_alloc(ha->fcp_cmnd_dma_pool, qla82xx_start_scsi() 2440 if (ha->flags.fcp_prio_enabled) qla82xx_start_scsi() 2500 if (ha->flags.fcp_prio_enabled) qla82xx_start_scsi() 2542 qla82xx_wr_32(ha, ha->nxdb_wr_ptr, dbval); qla82xx_start_scsi() 2545 (unsigned long __iomem *)ha->nxdb_wr_ptr, qla82xx_start_scsi() 2548 while (RD_REG_DWORD((void __iomem *)ha->nxdb_rd_ptr) != dbval) { qla82xx_start_scsi() 2550 (unsigned long __iomem *)ha->nxdb_wr_ptr, qla82xx_start_scsi() 2561 spin_unlock_irqrestore(&ha->hardware_lock, flags); qla82xx_start_scsi() 2565 dma_pool_free(ha->fcp_cmnd_dma_pool, ctx->fcp_cmnd, ctx->fcp_cmnd_dma); qla82xx_start_scsi() 2571 mempool_free(sp->u.scmd.ctx, ha->ctx_mempool); qla82xx_start_scsi() 2574 spin_unlock_irqrestore(&ha->hardware_lock, flags); qla82xx_start_scsi() 2606 struct qla_hw_data *ha = sp->fcport->vha->hw; qla2x00_start_sp() local 2611 spin_lock_irqsave(&ha->hardware_lock, flags); qla2x00_start_sp() 2622 IS_FWI2_CAPABLE(ha) ? qla2x00_start_sp() 2627 IS_FWI2_CAPABLE(ha) ? qla2x00_start_sp() 2636 IS_FWI2_CAPABLE(ha) ? qla2x00_start_sp() 2641 IS_FWI2_CAPABLE(ha) ? qla2x00_start_sp() 2646 IS_QLAFX00(ha) ? qla2x00_start_sp() 2655 IS_QLAFX00(ha) ? qla2x00_start_sp() 2664 qla2x00_start_iocbs(sp->fcport->vha, ha->req_q_map[0]); qla2x00_start_sp() 2666 spin_unlock_irqrestore(&ha->hardware_lock, flags); qla2x00_start_sp() 2771 struct qla_hw_data *ha = vha->hw; qla2x00_start_bidir() local 2785 rsp = ha->rsp_q_map[0]; qla2x00_start_bidir() 2797 spin_lock_irqsave(&ha->hardware_lock, flags); qla2x00_start_bidir() 2819 cnt = IS_SHADOW_REG_CAPABLE(ha) ? *req->out_ptr : qla2x00_start_bidir() 2858 spin_unlock_irqrestore(&ha->hardware_lock, flags); qla2x00_start_bidir()
H A D	qla_gbl.h	320 qla2x00_full_login_lip(scsi_qla_host_t *ha); 330 qla2x00_get_fcal_position_map(scsi_qla_host_t *ha, char *pos_map); 746 extern int qla8044_idc_lock(struct qla_hw_data *ha); 747 extern void qla8044_idc_unlock(struct qla_hw_data *ha); 748 extern uint32_t qla8044_rd_reg(struct qla_hw_data *ha, ulong addr); 749 extern void qla8044_wr_reg(struct qla_hw_data *ha, ulong addr, uint32_t val); 750 extern void qla8044_read_reset_template(struct scsi_qla_host *ha); 751 extern void qla8044_set_idc_dontreset(struct scsi_qla_host *ha); 768 extern void qlt_host_reset_handler(struct qla_hw_data *ha);
H A D	qla_target.h	117 #define GET_TARGET_ID(ha, iocb) ((HAS_EXTENDED_IDS(ha)) \ 830 struct qla_hw_data *ha; member in struct:qla_tgt 1088 * is not set. Right now, ha value is ignored. 1093 static inline bool qla_tgt_mode_enabled(struct scsi_qla_host *ha) qla_tgt_mode_enabled() argument 1095 return ha->host->active_mode & MODE_TARGET; qla_tgt_mode_enabled() 1098 static inline bool qla_ini_mode_enabled(struct scsi_qla_host *ha) qla_ini_mode_enabled() argument 1100 return ha->host->active_mode & MODE_INITIATOR; qla_ini_mode_enabled() 1103 static inline void qla_reverse_ini_mode(struct scsi_qla_host *ha) qla_reverse_ini_mode() argument 1105 if (ha->host->active_mode & MODE_INITIATOR) qla_reverse_ini_mode() 1106 ha->host->active_mode &= ~MODE_INITIATOR; qla_reverse_ini_mode() 1108 ha->host->active_mode |= MODE_INITIATOR; qla_reverse_ini_mode()
H A D	tcm_qla2xxx.c	823 struct qla_hw_data *ha = sess->vha->hw; tcm_qla2xxx_put_session() local 826 spin_lock_irqsave(&ha->hardware_lock, flags); tcm_qla2xxx_put_session() 828 spin_unlock_irqrestore(&ha->hardware_lock, flags); tcm_qla2xxx_put_session() 1528 struct qla_hw_data *ha = tgt->ha; tcm_qla2xxx_free_session() local 1529 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); tcm_qla2xxx_free_session() 1559 * Called via qlt_create_sess():ha->qla2x_tmpl->check_initiator_node_acl() 1569 struct qla_hw_data *ha = vha->hw; tcm_qla2xxx_check_initiator_node_acl() local 1579 int num_tags = (ha->fw_xcb_count) ? ha->fw_xcb_count : tcm_qla2xxx_check_initiator_node_acl() 1627 spin_lock_irqsave(&ha->hardware_lock, flags); tcm_qla2xxx_check_initiator_node_acl() 1632 spin_unlock_irqrestore(&ha->hardware_lock, flags); tcm_qla2xxx_check_initiator_node_acl() 1645 struct qla_hw_data *ha = tgt->ha; tcm_qla2xxx_update_sess() local 1646 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); tcm_qla2xxx_update_sess() 1763 struct qla_hw_data *ha = vha->hw; tcm_qla2xxx_lport_register_cb() local 1769 ha->tgt.tgt_ops = &tcm_qla2xxx_template; tcm_qla2xxx_lport_register_cb() 1948 struct qla_hw_data *ha = npiv_vha->hw; tcm_qla2xxx_npiv_drop_lport() local 1949 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev); tcm_qla2xxx_npiv_drop_lport()
/linux-4.1.27/drivers/scsi/qla4xxx/
H A D	ql4_nvram.c	13 static inline void eeprom_cmd(uint32_t cmd, struct scsi_qla_host *ha) eeprom_cmd() argument 15 writel(cmd, isp_nvram(ha)); eeprom_cmd() 16 readl(isp_nvram(ha)); eeprom_cmd() 20 static inline int eeprom_size(struct scsi_qla_host *ha) eeprom_size() argument 22 return is_qla4010(ha) ? FM93C66A_SIZE_16 : FM93C86A_SIZE_16; eeprom_size() 25 static inline int eeprom_no_addr_bits(struct scsi_qla_host *ha) eeprom_no_addr_bits() argument 27 return is_qla4010(ha) ? FM93C56A_NO_ADDR_BITS_16 : eeprom_no_addr_bits() 31 static inline int eeprom_no_data_bits(struct scsi_qla_host *ha) eeprom_no_data_bits() argument 36 static int fm93c56a_select(struct scsi_qla_host * ha) fm93c56a_select() argument 40 ha->eeprom_cmd_data = AUBURN_EEPROM_CS_1 | 0x000f0000; fm93c56a_select() 41 eeprom_cmd(ha->eeprom_cmd_data, ha); fm93c56a_select() 45 static int fm93c56a_cmd(struct scsi_qla_host * ha, int cmd, int addr) fm93c56a_cmd() argument 53 eeprom_cmd(ha->eeprom_cmd_data | AUBURN_EEPROM_DO_1, ha); fm93c56a_cmd() 55 eeprom_cmd(ha->eeprom_cmd_data | AUBURN_EEPROM_DO_1 | fm93c56a_cmd() 56 AUBURN_EEPROM_CLK_RISE, ha); fm93c56a_cmd() 57 eeprom_cmd(ha->eeprom_cmd_data | AUBURN_EEPROM_DO_1 | fm93c56a_cmd() 58 AUBURN_EEPROM_CLK_FALL, ha); fm93c56a_cmd() 73 eeprom_cmd(ha->eeprom_cmd_data | dataBit, ha); fm93c56a_cmd() 76 eeprom_cmd(ha->eeprom_cmd_data | dataBit | fm93c56a_cmd() 77 AUBURN_EEPROM_CLK_RISE, ha); fm93c56a_cmd() 78 eeprom_cmd(ha->eeprom_cmd_data | dataBit | fm93c56a_cmd() 79 AUBURN_EEPROM_CLK_FALL, ha); fm93c56a_cmd() 83 mask = 1 << (eeprom_no_addr_bits(ha) - 1); fm93c56a_cmd() 87 for (i = 0; i < eeprom_no_addr_bits(ha); i++) { fm93c56a_cmd() 95 eeprom_cmd(ha->eeprom_cmd_data | dataBit, ha); fm93c56a_cmd() 99 eeprom_cmd(ha->eeprom_cmd_data | dataBit | fm93c56a_cmd() 100 AUBURN_EEPROM_CLK_RISE, ha); fm93c56a_cmd() 101 eeprom_cmd(ha->eeprom_cmd_data | dataBit | fm93c56a_cmd() 102 AUBURN_EEPROM_CLK_FALL, ha); fm93c56a_cmd() 109 static int fm93c56a_deselect(struct scsi_qla_host * ha) fm93c56a_deselect() argument 111 ha->eeprom_cmd_data = AUBURN_EEPROM_CS_0 | 0x000f0000; fm93c56a_deselect() 112 eeprom_cmd(ha->eeprom_cmd_data, ha); fm93c56a_deselect() 116 static int fm93c56a_datain(struct scsi_qla_host * ha, unsigned short *value) fm93c56a_datain() argument 124 for (i = 0; i < eeprom_no_data_bits(ha); i++) { fm93c56a_datain() 125 eeprom_cmd(ha->eeprom_cmd_data | fm93c56a_datain() 126 AUBURN_EEPROM_CLK_RISE, ha); fm93c56a_datain() 127 eeprom_cmd(ha->eeprom_cmd_data | fm93c56a_datain() 128 AUBURN_EEPROM_CLK_FALL, ha); fm93c56a_datain() 130 dataBit = (readw(isp_nvram(ha)) & AUBURN_EEPROM_DI_1) ? 1 : 0; fm93c56a_datain() 140 struct scsi_qla_host * ha) eeprom_readword() 142 fm93c56a_select(ha); eeprom_readword() 143 fm93c56a_cmd(ha, FM93C56A_READ, eepromAddr); eeprom_readword() 144 fm93c56a_datain(ha, value); eeprom_readword() 145 fm93c56a_deselect(ha); eeprom_readword() 150 u16 rd_nvram_word(struct scsi_qla_host * ha, int offset) rd_nvram_word() argument 155 eeprom_readword(offset, &val, ha); rd_nvram_word() 159 u8 rd_nvram_byte(struct scsi_qla_host *ha, int offset) rd_nvram_byte() argument 170 val = le16_to_cpu(rd_nvram_word(ha, index)); rd_nvram_byte() 180 int qla4xxx_is_nvram_configuration_valid(struct scsi_qla_host * ha) qla4xxx_is_nvram_configuration_valid() argument 187 spin_lock_irqsave(&ha->hardware_lock, flags); qla4xxx_is_nvram_configuration_valid() 188 for (index = 0; index < eeprom_size(ha); index++) qla4xxx_is_nvram_configuration_valid() 189 checksum += rd_nvram_word(ha, index); qla4xxx_is_nvram_configuration_valid() 190 spin_unlock_irqrestore(&ha->hardware_lock, flags); qla4xxx_is_nvram_configuration_valid() 203 int ql4xxx_sem_spinlock(struct scsi_qla_host * ha, u32 sem_mask, u32 sem_bits) ql4xxx_sem_spinlock() argument 210 "0x%x\n", ha->host_no, sem_mask, sem_bits)); ql4xxx_sem_spinlock() 212 spin_lock_irqsave(&ha->hardware_lock, flags); ql4xxx_sem_spinlock() 213 writel((sem_mask | sem_bits), isp_semaphore(ha)); ql4xxx_sem_spinlock() 214 value = readw(isp_semaphore(ha)); ql4xxx_sem_spinlock() 215 spin_unlock_irqrestore(&ha->hardware_lock, flags); ql4xxx_sem_spinlock() 218 "code = 0x%x\n", ha->host_no, ql4xxx_sem_spinlock() 227 void ql4xxx_sem_unlock(struct scsi_qla_host * ha, u32 sem_mask) ql4xxx_sem_unlock() argument 231 spin_lock_irqsave(&ha->hardware_lock, flags); ql4xxx_sem_unlock() 232 writel(sem_mask, isp_semaphore(ha)); ql4xxx_sem_unlock() 233 readl(isp_semaphore(ha)); ql4xxx_sem_unlock() 234 spin_unlock_irqrestore(&ha->hardware_lock, flags); ql4xxx_sem_unlock() 236 DEBUG2(printk("scsi%ld : UNLOCK SEM - mask= 0x%x\n", ha->host_no, ql4xxx_sem_unlock() 240 int ql4xxx_sem_lock(struct scsi_qla_host * ha, u32 sem_mask, u32 sem_bits) ql4xxx_sem_lock() argument 245 spin_lock_irqsave(&ha->hardware_lock, flags); ql4xxx_sem_lock() 246 writel((sem_mask | sem_bits), isp_semaphore(ha)); ql4xxx_sem_lock() 247 value = readw(isp_semaphore(ha)); ql4xxx_sem_lock() 248 spin_unlock_irqrestore(&ha->hardware_lock, flags); ql4xxx_sem_lock() 251 "0x%x, sema code=0x%x\n", ha->host_no, ql4xxx_sem_lock() 139 eeprom_readword(int eepromAddr, u16 * value, struct scsi_qla_host * ha) eeprom_readword() argument
H A D	ql4_inline.h	15 * ha - Pointer to host adapter structure. 22 qla4xxx_lookup_ddb_by_fw_index(struct scsi_qla_host *ha, uint32_t fw_ddb_index) qla4xxx_lookup_ddb_by_fw_index() argument 27 (ha->fw_ddb_index_map[fw_ddb_index] != qla4xxx_lookup_ddb_by_fw_index() 29 ddb_entry = ha->fw_ddb_index_map[fw_ddb_index]; qla4xxx_lookup_ddb_by_fw_index() 33 ha->host_no, __func__, fw_ddb_index, ddb_entry)); qla4xxx_lookup_ddb_by_fw_index() 39 __qla4xxx_enable_intrs(struct scsi_qla_host *ha) __qla4xxx_enable_intrs() argument 41 if (is_qla4022(ha) | is_qla4032(ha)) { __qla4xxx_enable_intrs() 43 &ha->reg->u1.isp4022.intr_mask); __qla4xxx_enable_intrs() 44 readl(&ha->reg->u1.isp4022.intr_mask); __qla4xxx_enable_intrs() 46 writel(set_rmask(CSR_SCSI_INTR_ENABLE), &ha->reg->ctrl_status); __qla4xxx_enable_intrs() 47 readl(&ha->reg->ctrl_status); __qla4xxx_enable_intrs() 49 set_bit(AF_INTERRUPTS_ON, &ha->flags); __qla4xxx_enable_intrs() 53 __qla4xxx_disable_intrs(struct scsi_qla_host *ha) __qla4xxx_disable_intrs() argument 55 if (is_qla4022(ha) | is_qla4032(ha)) { __qla4xxx_disable_intrs() 57 &ha->reg->u1.isp4022.intr_mask); __qla4xxx_disable_intrs() 58 readl(&ha->reg->u1.isp4022.intr_mask); __qla4xxx_disable_intrs() 60 writel(clr_rmask(CSR_SCSI_INTR_ENABLE), &ha->reg->ctrl_status); __qla4xxx_disable_intrs() 61 readl(&ha->reg->ctrl_status); __qla4xxx_disable_intrs() 63 clear_bit(AF_INTERRUPTS_ON, &ha->flags); __qla4xxx_disable_intrs() 67 qla4xxx_enable_intrs(struct scsi_qla_host *ha) qla4xxx_enable_intrs() argument 71 spin_lock_irqsave(&ha->hardware_lock, flags); qla4xxx_enable_intrs() 72 __qla4xxx_enable_intrs(ha); qla4xxx_enable_intrs() 73 spin_unlock_irqrestore(&ha->hardware_lock, flags); qla4xxx_enable_intrs() 77 qla4xxx_disable_intrs(struct scsi_qla_host *ha) qla4xxx_disable_intrs() argument 81 spin_lock_irqsave(&ha->hardware_lock, flags); qla4xxx_disable_intrs() 82 __qla4xxx_disable_intrs(ha); qla4xxx_disable_intrs() 83 spin_unlock_irqrestore(&ha->hardware_lock, flags); qla4xxx_disable_intrs()
H A D	ql4_83xx.c	16 uint32_t qla4_83xx_rd_reg(struct scsi_qla_host *ha, ulong addr) qla4_83xx_rd_reg() argument 18 return readl((void __iomem *)(ha->nx_pcibase + addr)); qla4_83xx_rd_reg() 21 void qla4_83xx_wr_reg(struct scsi_qla_host *ha, ulong addr, uint32_t val) qla4_83xx_wr_reg() argument 23 writel(val, (void __iomem *)(ha->nx_pcibase + addr)); qla4_83xx_wr_reg() 26 static int qla4_83xx_set_win_base(struct scsi_qla_host *ha, uint32_t addr) qla4_83xx_set_win_base() argument 31 qla4_83xx_wr_reg(ha, QLA83XX_CRB_WIN_FUNC(ha->func_num), addr); qla4_83xx_set_win_base() 32 val = qla4_83xx_rd_reg(ha, QLA83XX_CRB_WIN_FUNC(ha->func_num)); qla4_83xx_set_win_base() 34 ql4_printk(KERN_ERR, ha, "%s: Failed to set register window : addr written 0x%x, read 0x%x!\n", qla4_83xx_set_win_base() 42 int qla4_83xx_rd_reg_indirect(struct scsi_qla_host *ha, uint32_t addr, qla4_83xx_rd_reg_indirect() argument 47 ret_val = qla4_83xx_set_win_base(ha, addr); qla4_83xx_rd_reg_indirect() 50 *data = qla4_83xx_rd_reg(ha, QLA83XX_WILDCARD); qla4_83xx_rd_reg_indirect() 52 ql4_printk(KERN_ERR, ha, "%s: failed read of addr 0x%x!\n", qla4_83xx_rd_reg_indirect() 58 int qla4_83xx_wr_reg_indirect(struct scsi_qla_host *ha, uint32_t addr, qla4_83xx_wr_reg_indirect() argument 63 ret_val = qla4_83xx_set_win_base(ha, addr); qla4_83xx_wr_reg_indirect() 66 qla4_83xx_wr_reg(ha, QLA83XX_WILDCARD, data); qla4_83xx_wr_reg_indirect() 68 ql4_printk(KERN_ERR, ha, "%s: failed wrt to addr 0x%x, data 0x%x\n", qla4_83xx_wr_reg_indirect() 74 static int qla4_83xx_flash_lock(struct scsi_qla_host *ha) qla4_83xx_flash_lock() argument 82 lock_status = qla4_83xx_rd_reg(ha, QLA83XX_FLASH_LOCK); qla4_83xx_flash_lock() 87 lock_owner = qla4_83xx_rd_reg(ha, qla4_83xx_flash_lock() 89 ql4_printk(KERN_ERR, ha, "%s: flash lock by func %d failed, held by func %d\n", qla4_83xx_flash_lock() 90 __func__, ha->func_num, lock_owner); qla4_83xx_flash_lock() 97 qla4_83xx_wr_reg(ha, QLA83XX_FLASH_LOCK_ID, ha->func_num); qla4_83xx_flash_lock() 101 static void qla4_83xx_flash_unlock(struct scsi_qla_host *ha) qla4_83xx_flash_unlock() argument 104 qla4_83xx_wr_reg(ha, QLA83XX_FLASH_LOCK_ID, 0xFF); qla4_83xx_flash_unlock() 105 qla4_83xx_rd_reg(ha, QLA83XX_FLASH_UNLOCK); qla4_83xx_flash_unlock() 108 int qla4_83xx_flash_read_u32(struct scsi_qla_host *ha, uint32_t flash_addr, qla4_83xx_flash_read_u32() argument 116 ret_val = qla4_83xx_flash_lock(ha); qla4_83xx_flash_read_u32() 121 ql4_printk(KERN_ERR, ha, "%s: Illegal addr = 0x%x\n", qla4_83xx_flash_read_u32() 128 ret_val = qla4_83xx_wr_reg_indirect(ha, qla4_83xx_flash_read_u32() 132 ql4_printk(KERN_ERR, ha, "%s: failed to write addr 0x%x to FLASH_DIRECT_WINDOW\n!", qla4_83xx_flash_read_u32() 137 ret_val = qla4_83xx_rd_reg_indirect(ha, qla4_83xx_flash_read_u32() 141 ql4_printk(KERN_ERR, ha, "%s: failed to read addr 0x%x!\n", qla4_83xx_flash_read_u32() 152 qla4_83xx_flash_unlock(ha); qla4_83xx_flash_read_u32() 158 int qla4_83xx_lockless_flash_read_u32(struct scsi_qla_host *ha, qla4_83xx_lockless_flash_read_u32() argument 171 ql4_printk(KERN_ERR, ha, "%s: Illegal addr = 0x%x\n", qla4_83xx_lockless_flash_read_u32() 177 ret_val = qla4_83xx_wr_reg_indirect(ha, QLA83XX_FLASH_DIRECT_WINDOW, qla4_83xx_lockless_flash_read_u32() 180 ql4_printk(KERN_ERR, ha, "%s: failed to write addr 0x%x to FLASH_DIRECT_WINDOW!\n", qla4_83xx_lockless_flash_read_u32() 191 ret_val = qla4_83xx_rd_reg_indirect(ha, qla4_83xx_lockless_flash_read_u32() 195 ql4_printk(KERN_ERR, ha, "%s: failed to read addr 0x%x!\n", qla4_83xx_lockless_flash_read_u32() 207 ret_val = qla4_83xx_wr_reg_indirect(ha, qla4_83xx_lockless_flash_read_u32() 211 ql4_printk(KERN_ERR, ha, "%s: failed to write addr 0x%x to FLASH_DIRECT_WINDOW!\n", qla4_83xx_lockless_flash_read_u32() 221 ret_val = qla4_83xx_rd_reg_indirect(ha, qla4_83xx_lockless_flash_read_u32() 225 ql4_printk(KERN_ERR, ha, "%s: failed to read addr 0x%x!\n", qla4_83xx_lockless_flash_read_u32() 240 void qla4_83xx_rom_lock_recovery(struct scsi_qla_host *ha) qla4_83xx_rom_lock_recovery() argument 242 if (qla4_83xx_flash_lock(ha)) qla4_83xx_rom_lock_recovery() 243 ql4_printk(KERN_INFO, ha, "%s: Resetting rom lock\n", __func__); qla4_83xx_rom_lock_recovery() 249 qla4_83xx_flash_unlock(ha); qla4_83xx_rom_lock_recovery() 255 static int qla4_83xx_lock_recovery(struct scsi_qla_host *ha) qla4_83xx_lock_recovery() argument 261 lockid = ha->isp_ops->rd_reg_direct(ha, QLA83XX_DRV_LOCKRECOVERY); qla4_83xx_lock_recovery() 268 ha->isp_ops->wr_reg_direct(ha, QLA83XX_DRV_LOCKRECOVERY, qla4_83xx_lock_recovery() 269 (ha->func_num << 2) | INTENT_TO_RECOVER); qla4_83xx_lock_recovery() 274 lockid = ha->isp_ops->rd_reg_direct(ha, QLA83XX_DRV_LOCKRECOVERY); qla4_83xx_lock_recovery() 275 if ((lockid & 0x3C) != (ha->func_num << 2)) qla4_83xx_lock_recovery() 278 ql4_printk(KERN_INFO, ha, "%s: IDC Lock recovery initiated for func %d\n", qla4_83xx_lock_recovery() 279 __func__, ha->func_num); qla4_83xx_lock_recovery() 282 ha->isp_ops->wr_reg_direct(ha, QLA83XX_DRV_LOCKRECOVERY, qla4_83xx_lock_recovery() 283 (ha->func_num << 2) | PROCEED_TO_RECOVER); qla4_83xx_lock_recovery() 286 ha->isp_ops->wr_reg_direct(ha, QLA83XX_DRV_LOCK_ID, 0xFF); qla4_83xx_lock_recovery() 287 ha->isp_ops->rd_reg_direct(ha, QLA83XX_DRV_UNLOCK); qla4_83xx_lock_recovery() 290 ha->isp_ops->wr_reg_direct(ha, QLA83XX_DRV_LOCKRECOVERY, 0); qla4_83xx_lock_recovery() 293 lock = ha->isp_ops->rd_reg_direct(ha, QLA83XX_DRV_LOCK); qla4_83xx_lock_recovery() 295 lockid = ha->isp_ops->rd_reg_direct(ha, QLA83XX_DRV_LOCK_ID); qla4_83xx_lock_recovery() 296 lockid = ((lockid + (1 << 8)) & ~0xFF) | ha->func_num; qla4_83xx_lock_recovery() 297 ha->isp_ops->wr_reg_direct(ha, QLA83XX_DRV_LOCK_ID, lockid); qla4_83xx_lock_recovery() 307 int qla4_83xx_drv_lock(struct scsi_qla_host *ha) qla4_83xx_drv_lock() argument 319 status = qla4_83xx_rd_reg(ha, QLA83XX_DRV_LOCK); qla4_83xx_drv_lock() 323 lock_id = qla4_83xx_rd_reg(ha, QLA83XX_DRV_LOCK_ID); qla4_83xx_drv_lock() 324 lock_id = ((lock_id + (1 << 8)) & ~0xFF) | ha->func_num; qla4_83xx_drv_lock() 325 qla4_83xx_wr_reg(ha, QLA83XX_DRV_LOCK_ID, lock_id); qla4_83xx_drv_lock() 332 first_owner = ha->isp_ops->rd_reg_direct(ha, qla4_83xx_drv_lock() 337 tmo_owner = qla4_83xx_rd_reg(ha, QLA83XX_DRV_LOCK_ID); qla4_83xx_drv_lock() 340 ql4_printk(KERN_INFO, ha, "%s: Lock by func %d failed after 2s, lock held by func %d, lock count %d, first_owner %d\n", qla4_83xx_drv_lock() 341 __func__, ha->func_num, func_num, lock_cnt, qla4_83xx_drv_lock() 349 ql4_printk(KERN_INFO, ha, "%s: IDC lock failed for func %d\n", qla4_83xx_drv_lock() 350 __func__, ha->func_num); qla4_83xx_drv_lock() 355 ret_val = qla4_83xx_lock_recovery(ha); qla4_83xx_drv_lock() 358 ql4_printk(KERN_INFO, ha, "%s: IDC lock Recovery by %d successful\n", qla4_83xx_drv_lock() 359 __func__, ha->func_num); qla4_83xx_drv_lock() 364 ql4_printk(KERN_INFO, ha, "%s: IDC lock Recovery by %d failed, Retrying timeout\n", qla4_83xx_drv_lock() 365 __func__, ha->func_num); qla4_83xx_drv_lock() 375 void qla4_83xx_drv_unlock(struct scsi_qla_host *ha) qla4_83xx_drv_unlock() argument 379 id = qla4_83xx_rd_reg(ha, QLA83XX_DRV_LOCK_ID); qla4_83xx_drv_unlock() 381 if ((id & 0xFF) != ha->func_num) { qla4_83xx_drv_unlock() 382 ql4_printk(KERN_ERR, ha, "%s: IDC Unlock by %d failed, lock owner is %d\n", qla4_83xx_drv_unlock() 383 __func__, ha->func_num, (id & 0xFF)); qla4_83xx_drv_unlock() 387 /* Keep lock counter value, update the ha->func_num to 0xFF */ qla4_83xx_drv_unlock() 388 qla4_83xx_wr_reg(ha, QLA83XX_DRV_LOCK_ID, (id | 0xFF)); qla4_83xx_drv_unlock() 389 qla4_83xx_rd_reg(ha, QLA83XX_DRV_UNLOCK); qla4_83xx_drv_unlock() 392 void qla4_83xx_set_idc_dontreset(struct scsi_qla_host *ha) qla4_83xx_set_idc_dontreset() argument 396 idc_ctrl = qla4_83xx_rd_reg(ha, QLA83XX_IDC_DRV_CTRL); qla4_83xx_set_idc_dontreset() 398 qla4_83xx_wr_reg(ha, QLA83XX_IDC_DRV_CTRL, idc_ctrl); qla4_83xx_set_idc_dontreset() 399 DEBUG2(ql4_printk(KERN_INFO, ha, "%s: idc_ctrl = %d\n", __func__, qla4_83xx_set_idc_dontreset() 403 void qla4_83xx_clear_idc_dontreset(struct scsi_qla_host *ha) qla4_83xx_clear_idc_dontreset() argument 407 idc_ctrl = qla4_83xx_rd_reg(ha, QLA83XX_IDC_DRV_CTRL); qla4_83xx_clear_idc_dontreset() 409 qla4_83xx_wr_reg(ha, QLA83XX_IDC_DRV_CTRL, idc_ctrl); qla4_83xx_clear_idc_dontreset() 410 DEBUG2(ql4_printk(KERN_INFO, ha, "%s: idc_ctrl = %d\n", __func__, qla4_83xx_clear_idc_dontreset() 414 int qla4_83xx_idc_dontreset(struct scsi_qla_host *ha) qla4_83xx_idc_dontreset() argument 418 idc_ctrl = qla4_83xx_rd_reg(ha, QLA83XX_IDC_DRV_CTRL); qla4_83xx_idc_dontreset() 437 int qla4_83xx_can_perform_reset(struct scsi_qla_host *ha) qla4_83xx_can_perform_reset() argument 451 dev_part1 = qla4_83xx_rd_reg(ha, qla4_83xx_can_perform_reset() 452 ha->reg_tbl[QLA8XXX_CRB_DEV_PART_INFO]); qla4_83xx_can_perform_reset() 453 dev_part2 = qla4_83xx_rd_reg(ha, QLA83XX_CRB_DEV_PART_INFO2); qla4_83xx_can_perform_reset() 454 drv_active = qla4_83xx_rd_reg(ha, ha->reg_tbl[QLA8XXX_CRB_DRV_ACTIVE]); qla4_83xx_can_perform_reset() 492 if (!nic_present && (ha->func_num == iscsi_func_low)) { qla4_83xx_can_perform_reset() 493 DEBUG2(ql4_printk(KERN_INFO, ha, qla4_83xx_can_perform_reset() 495 __func__, ha->func_num)); qla4_83xx_can_perform_reset() 504 * @ha: pointer to adapter structure 508 void qla4_83xx_need_reset_handler(struct scsi_qla_host *ha) qla4_83xx_need_reset_handler() argument 513 ql4_printk(KERN_INFO, ha, "%s: Performing ISP error recovery\n", qla4_83xx_need_reset_handler() 516 if (!test_bit(AF_8XXX_RST_OWNER, &ha->flags)) { qla4_83xx_need_reset_handler() 517 DEBUG2(ql4_printk(KERN_INFO, ha, "%s: reset acknowledged\n", qla4_83xx_need_reset_handler() 519 qla4_8xxx_set_rst_ready(ha); qla4_83xx_need_reset_handler() 523 dev_init_timeout = jiffies + (ha->nx_dev_init_timeout * HZ); qla4_83xx_need_reset_handler() 527 ql4_printk(KERN_INFO, ha, "%s: Non Reset owner dev init timeout\n", qla4_83xx_need_reset_handler() 532 ha->isp_ops->idc_unlock(ha); qla4_83xx_need_reset_handler() 534 ha->isp_ops->idc_lock(ha); qla4_83xx_need_reset_handler() 536 dev_state = qla4_8xxx_rd_direct(ha, qla4_83xx_need_reset_handler() 540 qla4_8xxx_set_rst_ready(ha); qla4_83xx_need_reset_handler() 541 reset_timeout = jiffies + (ha->nx_reset_timeout * HZ); qla4_83xx_need_reset_handler() 542 drv_state = qla4_8xxx_rd_direct(ha, QLA8XXX_CRB_DRV_STATE); qla4_83xx_need_reset_handler() 543 drv_active = qla4_8xxx_rd_direct(ha, QLA8XXX_CRB_DRV_ACTIVE); qla4_83xx_need_reset_handler() 545 ql4_printk(KERN_INFO, ha, "%s: drv_state = 0x%x, drv_active = 0x%x\n", qla4_83xx_need_reset_handler() 550 ql4_printk(KERN_INFO, ha, "%s: %s: RESET TIMEOUT! drv_state: 0x%08x, drv_active: 0x%08x\n", qla4_83xx_need_reset_handler() 556 ha->isp_ops->idc_unlock(ha); qla4_83xx_need_reset_handler() 558 ha->isp_ops->idc_lock(ha); qla4_83xx_need_reset_handler() 560 drv_state = qla4_8xxx_rd_direct(ha, qla4_83xx_need_reset_handler() 562 drv_active = qla4_8xxx_rd_direct(ha, qla4_83xx_need_reset_handler() 567 ql4_printk(KERN_INFO, ha, "%s: Reset_owner turning off drv_active of non-acking function 0x%x\n", qla4_83xx_need_reset_handler() 570 qla4_8xxx_wr_direct(ha, QLA8XXX_CRB_DRV_ACTIVE, qla4_83xx_need_reset_handler() 574 clear_bit(AF_8XXX_RST_OWNER, &ha->flags); qla4_83xx_need_reset_handler() 576 qla4_8xxx_device_bootstrap(ha); qla4_83xx_need_reset_handler() 580 void qla4_83xx_get_idc_param(struct scsi_qla_host *ha) qla4_83xx_get_idc_param() argument 584 ret_val = qla4_83xx_flash_read_u32(ha, QLA83XX_IDC_PARAM_ADDR, qla4_83xx_get_idc_param() 587 ha->nx_dev_init_timeout = idc_params & 0xFFFF; qla4_83xx_get_idc_param() 588 ha->nx_reset_timeout = (idc_params >> 16) & 0xFFFF; qla4_83xx_get_idc_param() 590 ha->nx_dev_init_timeout = ROM_DEV_INIT_TIMEOUT; qla4_83xx_get_idc_param() 591 ha->nx_reset_timeout = ROM_DRV_RESET_ACK_TIMEOUT; qla4_83xx_get_idc_param() 594 DEBUG2(ql4_printk(KERN_DEBUG, ha, qla4_83xx_get_idc_param() 595 "%s: ha->nx_dev_init_timeout = %d, ha->nx_reset_timeout = %d\n", qla4_83xx_get_idc_param() 596 __func__, ha->nx_dev_init_timeout, qla4_83xx_get_idc_param() 597 ha->nx_reset_timeout)); qla4_83xx_get_idc_param() 602 static void qla4_83xx_dump_reset_seq_hdr(struct scsi_qla_host *ha) qla4_83xx_dump_reset_seq_hdr() argument 606 if (!ha->reset_tmplt.buff) { qla4_83xx_dump_reset_seq_hdr() 607 ql4_printk(KERN_ERR, ha, "%s: Error: Invalid reset_seq_template\n", qla4_83xx_dump_reset_seq_hdr() 612 phdr = ha->reset_tmplt.buff; qla4_83xx_dump_reset_seq_hdr() 614 DEBUG2(ql4_printk(KERN_INFO, ha, qla4_83xx_dump_reset_seq_hdr() 622 static int qla4_83xx_copy_bootloader(struct scsi_qla_host *ha) qla4_83xx_copy_bootloader() argument 630 dest = qla4_83xx_rd_reg(ha, QLA83XX_BOOTLOADER_ADDR); qla4_83xx_copy_bootloader() 631 size = qla4_83xx_rd_reg(ha, QLA83XX_BOOTLOADER_SIZE); qla4_83xx_copy_bootloader() 642 ql4_printk(KERN_ERR, ha, "%s: Failed to allocate memory for boot loader cache\n", qla4_83xx_copy_bootloader() 648 ret_val = qla4_83xx_lockless_flash_read_u32(ha, src, p_cache, qla4_83xx_copy_bootloader() 651 ql4_printk(KERN_ERR, ha, "%s: Error reading firmware from flash\n", qla4_83xx_copy_bootloader() 655 DEBUG2(ql4_printk(KERN_INFO, ha, "%s: Read firmware from flash\n", qla4_83xx_copy_bootloader() 659 ret_val = qla4_8xxx_ms_mem_write_128b(ha, dest, (uint32_t *)p_cache, qla4_83xx_copy_bootloader() 662 ql4_printk(KERN_ERR, ha, "%s: Error writing firmware to MS\n", qla4_83xx_copy_bootloader() 667 DEBUG2(ql4_printk(KERN_INFO, ha, "%s: Wrote firmware size %d to MS\n", qla4_83xx_copy_bootloader() 677 static int qla4_83xx_check_cmd_peg_status(struct scsi_qla_host *ha) qla4_83xx_check_cmd_peg_status() argument 683 val = qla4_83xx_rd_reg(ha, QLA83XX_CMDPEG_STATE); qla4_83xx_check_cmd_peg_status() 685 DEBUG2(ql4_printk(KERN_INFO, ha, qla4_83xx_check_cmd_peg_status() 701 * @ha : Pointer to adapter structure 707 static int qla4_83xx_poll_reg(struct scsi_qla_host *ha, uint32_t addr, qla4_83xx_poll_reg() argument 715 ret_val = qla4_83xx_rd_reg_indirect(ha, addr, &value); qla4_83xx_poll_reg() 723 ret_val = qla4_83xx_rd_reg_indirect(ha, addr, &value); qla4_83xx_poll_reg() 736 ha->reset_tmplt.seq_error++; qla4_83xx_poll_reg() 737 ql4_printk(KERN_ERR, ha, "%s: Poll Failed: 0x%08x 0x%08x 0x%08x\n", qla4_83xx_poll_reg() 744 static int qla4_83xx_reset_seq_checksum_test(struct scsi_qla_host *ha) qla4_83xx_reset_seq_checksum_test() argument 747 uint16_t *buff = (uint16_t *)ha->reset_tmplt.buff; qla4_83xx_reset_seq_checksum_test() 748 int u16_count = ha->reset_tmplt.hdr->size / sizeof(uint16_t); qla4_83xx_reset_seq_checksum_test() 761 ql4_printk(KERN_ERR, ha, "%s: Reset seq checksum failed\n", qla4_83xx_reset_seq_checksum_test() 771 * @ha: Pointer to adapter structure 773 void qla4_83xx_read_reset_template(struct scsi_qla_host *ha) qla4_83xx_read_reset_template() argument 779 ha->reset_tmplt.seq_error = 0; qla4_83xx_read_reset_template() 780 ha->reset_tmplt.buff = vmalloc(QLA83XX_RESTART_TEMPLATE_SIZE); qla4_83xx_read_reset_template() 781 if (ha->reset_tmplt.buff == NULL) { qla4_83xx_read_reset_template() 782 ql4_printk(KERN_ERR, ha, "%s: Failed to allocate reset template resources\n", qla4_83xx_read_reset_template() 787 p_buff = ha->reset_tmplt.buff; qla4_83xx_read_reset_template() 793 DEBUG2(ql4_printk(KERN_INFO, ha, qla4_83xx_read_reset_template() 798 ret_val = qla4_83xx_flash_read_u32(ha, addr, p_buff, qla4_83xx_read_reset_template() 801 ql4_printk(KERN_ERR, ha, "%s: Failed to read reset template\n", qla4_83xx_read_reset_template() 806 ha->reset_tmplt.hdr = qla4_83xx_read_reset_template() 807 (struct qla4_83xx_reset_template_hdr *)ha->reset_tmplt.buff; qla4_83xx_read_reset_template() 810 tmplt_hdr_size = ha->reset_tmplt.hdr->hdr_size/sizeof(uint32_t); qla4_83xx_read_reset_template() 812 (ha->reset_tmplt.hdr->signature != RESET_TMPLT_HDR_SIGNATURE)) { qla4_83xx_read_reset_template() 813 ql4_printk(KERN_ERR, ha, "%s: Template Header size %d is invalid, tmplt_hdr_def_size %d\n", qla4_83xx_read_reset_template() 818 addr = QLA83XX_RESET_TEMPLATE_ADDR + ha->reset_tmplt.hdr->hdr_size; qla4_83xx_read_reset_template() 819 p_buff = ha->reset_tmplt.buff + ha->reset_tmplt.hdr->hdr_size; qla4_83xx_read_reset_template() 820 tmplt_hdr_def_size = (ha->reset_tmplt.hdr->size - qla4_83xx_read_reset_template() 821 ha->reset_tmplt.hdr->hdr_size) / sizeof(uint32_t); qla4_83xx_read_reset_template() 823 DEBUG2(ql4_printk(KERN_INFO, ha, qla4_83xx_read_reset_template() 825 __func__, ha->reset_tmplt.hdr->size)); qla4_83xx_read_reset_template() 828 ret_val = qla4_83xx_flash_read_u32(ha, addr, p_buff, qla4_83xx_read_reset_template() 831 ql4_printk(KERN_ERR, ha, "%s: Failed to read reset tempelate\n", qla4_83xx_read_reset_template() 837 if (qla4_83xx_reset_seq_checksum_test(ha)) { qla4_83xx_read_reset_template() 838 ql4_printk(KERN_ERR, ha, "%s: Reset Seq checksum failed!\n", qla4_83xx_read_reset_template() 842 DEBUG2(ql4_printk(KERN_INFO, ha, qla4_83xx_read_reset_template() 847 ha->reset_tmplt.init_offset = ha->reset_tmplt.buff + qla4_83xx_read_reset_template() 848 ha->reset_tmplt.hdr->init_seq_offset; qla4_83xx_read_reset_template() 849 ha->reset_tmplt.start_offset = ha->reset_tmplt.buff + qla4_83xx_read_reset_template() 850 ha->reset_tmplt.hdr->start_seq_offset; qla4_83xx_read_reset_template() 851 ha->reset_tmplt.stop_offset = ha->reset_tmplt.buff + qla4_83xx_read_reset_template() 852 ha->reset_tmplt.hdr->hdr_size; qla4_83xx_read_reset_template() 853 qla4_83xx_dump_reset_seq_hdr(ha); qla4_83xx_read_reset_template() 858 vfree(ha->reset_tmplt.buff); qla4_83xx_read_reset_template() 867 * @ha : Pointer to adapter structure 871 static void qla4_83xx_read_write_crb_reg(struct scsi_qla_host *ha, qla4_83xx_read_write_crb_reg() argument 876 qla4_83xx_rd_reg_indirect(ha, raddr, &value); qla4_83xx_read_write_crb_reg() 877 qla4_83xx_wr_reg_indirect(ha, waddr, value); qla4_83xx_read_write_crb_reg() 886 * @ha : Pointer to adapter structure 891 static void qla4_83xx_rmw_crb_reg(struct scsi_qla_host *ha, uint32_t raddr, qla4_83xx_rmw_crb_reg() argument 898 value = ha->reset_tmplt.array[p_rmw_hdr->index_a]; qla4_83xx_rmw_crb_reg() 900 qla4_83xx_rd_reg_indirect(ha, raddr, &value); qla4_83xx_rmw_crb_reg() 908 qla4_83xx_wr_reg_indirect(ha, waddr, value); qla4_83xx_rmw_crb_reg() 913 static void qla4_83xx_write_list(struct scsi_qla_host *ha, qla4_83xx_write_list() argument 923 qla4_83xx_wr_reg_indirect(ha, p_entry->arg1, p_entry->arg2); qla4_83xx_write_list() 929 static void qla4_83xx_read_write_list(struct scsi_qla_host *ha, qla4_83xx_read_write_list() argument 939 qla4_83xx_read_write_crb_reg(ha, p_entry->arg1, p_entry->arg2); qla4_83xx_read_write_list() 945 static void qla4_83xx_poll_list(struct scsi_qla_host *ha, qla4_83xx_poll_list() argument 965 qla4_83xx_poll_reg(ha, p_entry->arg1, delay, qla4_83xx_poll_list() 971 if (qla4_83xx_poll_reg(ha, p_entry->arg1, delay, qla4_83xx_poll_list() 974 qla4_83xx_rd_reg_indirect(ha, p_entry->arg1, qla4_83xx_poll_list() 976 qla4_83xx_rd_reg_indirect(ha, p_entry->arg2, qla4_83xx_poll_list() 983 static void qla4_83xx_poll_write_list(struct scsi_qla_host *ha, qla4_83xx_poll_write_list() argument 998 qla4_83xx_wr_reg_indirect(ha, p_entry->dr_addr, qla4_83xx_poll_write_list() 1000 qla4_83xx_wr_reg_indirect(ha, p_entry->ar_addr, qla4_83xx_poll_write_list() 1003 if (qla4_83xx_poll_reg(ha, p_entry->ar_addr, delay, qla4_83xx_poll_write_list() 1006 DEBUG2(ql4_printk(KERN_INFO, ha, qla4_83xx_poll_write_list() 1009 ha->reset_tmplt.seq_index)); qla4_83xx_poll_write_list() 1015 static void qla4_83xx_read_modify_write(struct scsi_qla_host *ha, qla4_83xx_read_modify_write() argument 1028 qla4_83xx_rmw_crb_reg(ha, p_entry->arg1, p_entry->arg2, qla4_83xx_read_modify_write() 1035 static void qla4_83xx_pause(struct scsi_qla_host *ha, qla4_83xx_pause() argument 1042 static void qla4_83xx_poll_read_list(struct scsi_qla_host *ha, qla4_83xx_poll_read_list() argument 1059 qla4_83xx_wr_reg_indirect(ha, p_entry->ar_addr, qla4_83xx_poll_read_list() 1062 if (qla4_83xx_poll_reg(ha, p_entry->ar_addr, delay, qla4_83xx_poll_read_list() 1065 DEBUG2(ql4_printk(KERN_INFO, ha, qla4_83xx_poll_read_list() 1068 ha->reset_tmplt.seq_index)); qla4_83xx_poll_read_list() 1070 index = ha->reset_tmplt.array_index; qla4_83xx_poll_read_list() 1071 qla4_83xx_rd_reg_indirect(ha, p_entry->dr_addr, qla4_83xx_poll_read_list() 1073 ha->reset_tmplt.array[index++] = value; qla4_83xx_poll_read_list() 1076 ha->reset_tmplt.array_index = 1; qla4_83xx_poll_read_list() 1082 static void qla4_83xx_seq_end(struct scsi_qla_host *ha, qla4_83xx_seq_end() argument 1085 ha->reset_tmplt.seq_end = 1; qla4_83xx_seq_end() 1088 static void qla4_83xx_template_end(struct scsi_qla_host *ha, qla4_83xx_template_end() argument 1091 ha->reset_tmplt.template_end = 1; qla4_83xx_template_end() 1093 if (ha->reset_tmplt.seq_error == 0) { qla4_83xx_template_end() 1094 DEBUG2(ql4_printk(KERN_INFO, ha, qla4_83xx_template_end() 1098 ql4_printk(KERN_ERR, ha, "%s: Reset sequence completed with some timeout errors.\n", qla4_83xx_template_end() 1111 * @ha : Pointer to adapter structure 1114 static void qla4_83xx_process_reset_template(struct scsi_qla_host *ha, qla4_83xx_process_reset_template() argument 1121 ha->reset_tmplt.seq_end = 0; qla4_83xx_process_reset_template() 1122 ha->reset_tmplt.template_end = 0; qla4_83xx_process_reset_template() 1123 entries = ha->reset_tmplt.hdr->entries; qla4_83xx_process_reset_template() 1124 index = ha->reset_tmplt.seq_index; qla4_83xx_process_reset_template() 1126 for (; (!ha->reset_tmplt.seq_end) && (index < entries); index++) { qla4_83xx_process_reset_template() 1133 qla4_83xx_write_list(ha, p_hdr); qla4_83xx_process_reset_template() 1136 qla4_83xx_read_write_list(ha, p_hdr); qla4_83xx_process_reset_template() 1139 qla4_83xx_poll_list(ha, p_hdr); qla4_83xx_process_reset_template() 1142 qla4_83xx_poll_write_list(ha, p_hdr); qla4_83xx_process_reset_template() 1145 qla4_83xx_read_modify_write(ha, p_hdr); qla4_83xx_process_reset_template() 1148 qla4_83xx_pause(ha, p_hdr); qla4_83xx_process_reset_template() 1151 qla4_83xx_seq_end(ha, p_hdr); qla4_83xx_process_reset_template() 1154 qla4_83xx_template_end(ha, p_hdr); qla4_83xx_process_reset_template() 1157 qla4_83xx_poll_read_list(ha, p_hdr); qla4_83xx_process_reset_template() 1160 ql4_printk(KERN_ERR, ha, "%s: Unknown command ==> 0x%04x on entry = %d\n", qla4_83xx_process_reset_template() 1169 ha->reset_tmplt.seq_index = index; qla4_83xx_process_reset_template() 1172 static void qla4_83xx_process_stop_seq(struct scsi_qla_host *ha) qla4_83xx_process_stop_seq() argument 1174 ha->reset_tmplt.seq_index = 0; qla4_83xx_process_stop_seq() 1175 qla4_83xx_process_reset_template(ha, ha->reset_tmplt.stop_offset); qla4_83xx_process_stop_seq() 1177 if (ha->reset_tmplt.seq_end != 1) qla4_83xx_process_stop_seq() 1178 ql4_printk(KERN_ERR, ha, "%s: Abrupt STOP Sub-Sequence end.\n", qla4_83xx_process_stop_seq() 1182 static void qla4_83xx_process_start_seq(struct scsi_qla_host *ha) qla4_83xx_process_start_seq() argument 1184 qla4_83xx_process_reset_template(ha, ha->reset_tmplt.start_offset); qla4_83xx_process_start_seq() 1186 if (ha->reset_tmplt.template_end != 1) qla4_83xx_process_start_seq() 1187 ql4_printk(KERN_ERR, ha, "%s: Abrupt START Sub-Sequence end.\n", qla4_83xx_process_start_seq() 1191 static void qla4_83xx_process_init_seq(struct scsi_qla_host *ha) qla4_83xx_process_init_seq() argument 1193 qla4_83xx_process_reset_template(ha, ha->reset_tmplt.init_offset); qla4_83xx_process_init_seq() 1195 if (ha->reset_tmplt.seq_end != 1) qla4_83xx_process_init_seq() 1196 ql4_printk(KERN_ERR, ha, "%s: Abrupt INIT Sub-Sequence end.\n", qla4_83xx_process_init_seq() 1200 static int qla4_83xx_restart(struct scsi_qla_host *ha) qla4_83xx_restart() argument 1205 qla4_83xx_process_stop_seq(ha); qla4_83xx_restart() 1212 idc_ctrl = qla4_83xx_rd_reg(ha, QLA83XX_IDC_DRV_CTRL); qla4_83xx_restart() 1214 qla4_83xx_wr_reg(ha, QLA83XX_IDC_DRV_CTRL, qla4_83xx_restart() 1216 ql4_printk(KERN_INFO, ha, "%s: Graceful RESET: Not collecting minidump\n", qla4_83xx_restart() 1219 qla4_8xxx_get_minidump(ha); qla4_83xx_restart() 1222 qla4_83xx_process_init_seq(ha); qla4_83xx_restart() 1224 if (qla4_83xx_copy_bootloader(ha)) { qla4_83xx_restart() 1225 ql4_printk(KERN_ERR, ha, "%s: Copy bootloader, firmware restart failed!\n", qla4_83xx_restart() 1231 qla4_83xx_wr_reg(ha, QLA83XX_FW_IMAGE_VALID, QLA83XX_BOOT_FROM_FLASH); qla4_83xx_restart() 1232 qla4_83xx_process_start_seq(ha); qla4_83xx_restart() 1238 int qla4_83xx_start_firmware(struct scsi_qla_host *ha) qla4_83xx_start_firmware() argument 1242 ret_val = qla4_83xx_restart(ha); qla4_83xx_start_firmware() 1244 ql4_printk(KERN_ERR, ha, "%s: Restart error\n", __func__); qla4_83xx_start_firmware() 1247 DEBUG2(ql4_printk(KERN_INFO, ha, "%s: Restart done\n", qla4_83xx_start_firmware() 1251 ret_val = qla4_83xx_check_cmd_peg_status(ha); qla4_83xx_start_firmware() 1253 ql4_printk(KERN_ERR, ha, "%s: Peg not initialized\n", qla4_83xx_start_firmware() 1262 static void qla4_83xx_disable_iocb_intrs(struct scsi_qla_host *ha) qla4_83xx_disable_iocb_intrs() argument 1264 if (test_and_clear_bit(AF_83XX_IOCB_INTR_ON, &ha->flags)) qla4_83xx_disable_iocb_intrs() 1265 qla4_8xxx_intr_disable(ha); qla4_83xx_disable_iocb_intrs() 1268 static void qla4_83xx_disable_mbox_intrs(struct scsi_qla_host *ha) qla4_83xx_disable_mbox_intrs() argument 1272 if (test_and_clear_bit(AF_83XX_MBOX_INTR_ON, &ha->flags)) { qla4_83xx_disable_mbox_intrs() 1273 ret = readl(&ha->qla4_83xx_reg->mbox_int); qla4_83xx_disable_mbox_intrs() 1275 writel(mb_int, &ha->qla4_83xx_reg->mbox_int); qla4_83xx_disable_mbox_intrs() 1276 writel(1, &ha->qla4_83xx_reg->leg_int_mask); qla4_83xx_disable_mbox_intrs() 1280 void qla4_83xx_disable_intrs(struct scsi_qla_host *ha) qla4_83xx_disable_intrs() argument 1282 qla4_83xx_disable_mbox_intrs(ha); qla4_83xx_disable_intrs() 1283 qla4_83xx_disable_iocb_intrs(ha); qla4_83xx_disable_intrs() 1286 static void qla4_83xx_enable_iocb_intrs(struct scsi_qla_host *ha) qla4_83xx_enable_iocb_intrs() argument 1288 if (!test_bit(AF_83XX_IOCB_INTR_ON, &ha->flags)) { qla4_83xx_enable_iocb_intrs() 1289 qla4_8xxx_intr_enable(ha); qla4_83xx_enable_iocb_intrs() 1290 set_bit(AF_83XX_IOCB_INTR_ON, &ha->flags); qla4_83xx_enable_iocb_intrs() 1294 void qla4_83xx_enable_mbox_intrs(struct scsi_qla_host *ha) qla4_83xx_enable_mbox_intrs() argument 1298 if (!test_bit(AF_83XX_MBOX_INTR_ON, &ha->flags)) { qla4_83xx_enable_mbox_intrs() 1300 writel(mb_int, &ha->qla4_83xx_reg->mbox_int); qla4_83xx_enable_mbox_intrs() 1301 writel(0, &ha->qla4_83xx_reg->leg_int_mask); qla4_83xx_enable_mbox_intrs() 1302 set_bit(AF_83XX_MBOX_INTR_ON, &ha->flags); qla4_83xx_enable_mbox_intrs() 1307 void qla4_83xx_enable_intrs(struct scsi_qla_host *ha) qla4_83xx_enable_intrs() argument 1309 qla4_83xx_enable_mbox_intrs(ha); qla4_83xx_enable_intrs() 1310 qla4_83xx_enable_iocb_intrs(ha); qla4_83xx_enable_intrs() 1314 void qla4_83xx_queue_mbox_cmd(struct scsi_qla_host *ha, uint32_t *mbx_cmd, qla4_83xx_queue_mbox_cmd() argument 1321 writel(mbx_cmd[i], &ha->qla4_83xx_reg->mailbox_in[i]); qla4_83xx_queue_mbox_cmd() 1323 writel(mbx_cmd[0], &ha->qla4_83xx_reg->mailbox_in[0]); qla4_83xx_queue_mbox_cmd() 1328 writel(HINT_MBX_INT_PENDING, &ha->qla4_83xx_reg->host_intr); qla4_83xx_queue_mbox_cmd() 1331 void qla4_83xx_process_mbox_intr(struct scsi_qla_host *ha, int outcount) qla4_83xx_process_mbox_intr() argument 1335 intr_status = readl(&ha->qla4_83xx_reg->risc_intr); qla4_83xx_process_mbox_intr() 1337 ha->mbox_status_count = outcount; qla4_83xx_process_mbox_intr() 1338 ha->isp_ops->interrupt_service_routine(ha, intr_status); qla4_83xx_process_mbox_intr() 1344 * @ha: pointer to host adapter structure. 1346 int qla4_83xx_isp_reset(struct scsi_qla_host *ha) qla4_83xx_isp_reset() argument 1351 ha->isp_ops->idc_lock(ha); qla4_83xx_isp_reset() 1352 dev_state = qla4_8xxx_rd_direct(ha, QLA8XXX_CRB_DEV_STATE); qla4_83xx_isp_reset() 1355 qla4_83xx_set_idc_dontreset(ha); qla4_83xx_isp_reset() 1360 if (qla4_83xx_idc_dontreset(ha) == DONTRESET_BIT0) { qla4_83xx_isp_reset() 1361 ql4_printk(KERN_ERR, ha, "%s: Reset recovery disabled\n", qla4_83xx_isp_reset() 1367 DEBUG2(ql4_printk(KERN_INFO, ha, "%s: HW State: NEED RESET\n", qla4_83xx_isp_reset() 1369 qla4_8xxx_wr_direct(ha, QLA8XXX_CRB_DEV_STATE, qla4_83xx_isp_reset() 1379 DEBUG2(ql4_printk(KERN_INFO, ha, qla4_83xx_isp_reset() 1387 if (qla4_83xx_can_perform_reset(ha)) qla4_83xx_isp_reset() 1388 set_bit(AF_8XXX_RST_OWNER, &ha->flags); qla4_83xx_isp_reset() 1390 ha->isp_ops->idc_unlock(ha); qla4_83xx_isp_reset() 1391 rval = qla4_8xxx_device_state_handler(ha); qla4_83xx_isp_reset() 1393 ha->isp_ops->idc_lock(ha); qla4_83xx_isp_reset() 1394 qla4_8xxx_clear_rst_ready(ha); qla4_83xx_isp_reset() 1396 ha->isp_ops->idc_unlock(ha); qla4_83xx_isp_reset() 1399 clear_bit(AF_FW_RECOVERY, &ha->flags); qla4_83xx_isp_reset() 1404 static void qla4_83xx_dump_pause_control_regs(struct scsi_qla_host *ha) qla4_83xx_dump_pause_control_regs() argument 1409 status = qla4_83xx_rd_reg_indirect(ha, QLA83XX_SRE_SHIM_CONTROL, &val); qla4_83xx_dump_pause_control_regs() 1410 DEBUG2(ql4_printk(KERN_INFO, ha, "SRE-Shim Ctrl:0x%x\n", val)); qla4_83xx_dump_pause_control_regs() 1413 DEBUG2(ql4_printk(KERN_INFO, ha, qla4_83xx_dump_pause_control_regs() 1416 status = qla4_83xx_rd_reg_indirect(ha, qla4_83xx_dump_pause_control_regs() 1424 DEBUG2(ql4_printk(KERN_INFO, ha, qla4_83xx_dump_pause_control_regs() 1427 status = qla4_83xx_rd_reg_indirect(ha, qla4_83xx_dump_pause_control_regs() 1435 DEBUG2(ql4_printk(KERN_INFO, ha, qla4_83xx_dump_pause_control_regs() 1438 status = qla4_83xx_rd_reg_indirect(ha, qla4_83xx_dump_pause_control_regs() 1446 DEBUG2(ql4_printk(KERN_INFO, ha, qla4_83xx_dump_pause_control_regs() 1449 status = qla4_83xx_rd_reg_indirect(ha, qla4_83xx_dump_pause_control_regs() 1457 DEBUG2(ql4_printk(KERN_INFO, ha, qla4_83xx_dump_pause_control_regs() 1460 status = qla4_83xx_rd_reg_indirect(ha, qla4_83xx_dump_pause_control_regs() 1464 qla4_83xx_wr_reg_indirect(ha, QLA83XX_PORT0_RXB_TC_STATS, qla4_83xx_dump_pause_control_regs() 1466 status = qla4_83xx_rd_reg_indirect(ha, qla4_83xx_dump_pause_control_regs() 1475 DEBUG2(ql4_printk(KERN_INFO, ha, qla4_83xx_dump_pause_control_regs() 1478 status = qla4_83xx_rd_reg_indirect(ha, qla4_83xx_dump_pause_control_regs() 1482 qla4_83xx_wr_reg_indirect(ha, QLA83XX_PORT1_RXB_TC_STATS, qla4_83xx_dump_pause_control_regs() 1484 status = qla4_83xx_rd_reg_indirect(ha, qla4_83xx_dump_pause_control_regs() 1492 status = qla4_83xx_rd_reg_indirect(ha, QLA83XX_PORT2_IFB_PAUSE_THRS, qla4_83xx_dump_pause_control_regs() 1494 status = qla4_83xx_rd_reg_indirect(ha, QLA83XX_PORT3_IFB_PAUSE_THRS, qla4_83xx_dump_pause_control_regs() 1497 DEBUG2(ql4_printk(KERN_INFO, ha, qla4_83xx_dump_pause_control_regs() 1502 static void __qla4_83xx_disable_pause(struct scsi_qla_host *ha) __qla4_83xx_disable_pause() argument 1507 qla4_83xx_wr_reg_indirect(ha, QLA83XX_SRE_SHIM_CONTROL, __qla4_83xx_disable_pause() 1512 qla4_83xx_wr_reg_indirect(ha, __qla4_83xx_disable_pause() 1516 qla4_83xx_wr_reg_indirect(ha, __qla4_83xx_disable_pause() 1523 qla4_83xx_wr_reg_indirect(ha, __qla4_83xx_disable_pause() 1527 qla4_83xx_wr_reg_indirect(ha, __qla4_83xx_disable_pause() 1532 qla4_83xx_wr_reg_indirect(ha, QLA83XX_PORT2_IFB_PAUSE_THRS, __qla4_83xx_disable_pause() 1534 qla4_83xx_wr_reg_indirect(ha, QLA83XX_PORT3_IFB_PAUSE_THRS, __qla4_83xx_disable_pause() 1537 ql4_printk(KERN_INFO, ha, "Disabled pause frames successfully.\n"); __qla4_83xx_disable_pause() 1542 * @ha: Pointer to host adapter structure. 1548 static void qla4_83xx_eport_init(struct scsi_qla_host *ha) qla4_83xx_eport_init() argument 1551 qla4_83xx_wr_reg_indirect(ha, QLA83XX_RESET_REG, 0x0); qla4_83xx_eport_init() 1552 qla4_83xx_wr_reg_indirect(ha, QLA83XX_RESET_PORT0, 0x0); qla4_83xx_eport_init() 1553 qla4_83xx_wr_reg_indirect(ha, QLA83XX_RESET_PORT1, 0x0); qla4_83xx_eport_init() 1554 qla4_83xx_wr_reg_indirect(ha, QLA83XX_RESET_PORT2, 0x0); qla4_83xx_eport_init() 1555 qla4_83xx_wr_reg_indirect(ha, QLA83XX_RESET_PORT3, 0x0); qla4_83xx_eport_init() 1556 qla4_83xx_wr_reg_indirect(ha, QLA83XX_RESET_SRE_SHIM, 0x0); qla4_83xx_eport_init() 1557 qla4_83xx_wr_reg_indirect(ha, QLA83XX_RESET_EPG_SHIM, 0x0); qla4_83xx_eport_init() 1558 qla4_83xx_wr_reg_indirect(ha, QLA83XX_RESET_ETHER_PCS, 0x0); qla4_83xx_eport_init() 1561 qla4_83xx_wr_reg_indirect(ha, QLA83XX_RESET_CONTROL, 0xFF); qla4_83xx_eport_init() 1563 ql4_printk(KERN_INFO, ha, "EPORT is out of reset.\n"); qla4_83xx_eport_init() 1566 void qla4_83xx_disable_pause(struct scsi_qla_host *ha) qla4_83xx_disable_pause() argument 1568 ha->isp_ops->idc_lock(ha); qla4_83xx_disable_pause() 1570 qla4_83xx_eport_init(ha); qla4_83xx_disable_pause() 1571 qla4_83xx_dump_pause_control_regs(ha); qla4_83xx_disable_pause() 1572 __qla4_83xx_disable_pause(ha); qla4_83xx_disable_pause() 1573 ha->isp_ops->idc_unlock(ha); qla4_83xx_disable_pause() 1578 * @ha: Pointer to host adapter structure. 1580 int qla4_83xx_is_detached(struct scsi_qla_host *ha) qla4_83xx_is_detached() argument 1584 drv_active = qla4_8xxx_rd_direct(ha, QLA8XXX_CRB_DRV_ACTIVE); qla4_83xx_is_detached() 1586 if (test_bit(AF_INIT_DONE, &ha->flags) && qla4_83xx_is_detached() 1587 !(drv_active & (1 << ha->func_num))) { qla4_83xx_is_detached() 1588 DEBUG2(ql4_printk(KERN_INFO, ha, "%s: drv_active = 0x%X\n", qla4_83xx_is_detached()
H A D	ql4_nx.c	39 qla4_8xxx_pci_base_offsetfset(struct scsi_qla_host *ha, unsigned long off) qla4_8xxx_pci_base_offsetfset() argument 41 if ((off < ha->first_page_group_end) && qla4_8xxx_pci_base_offsetfset() 42 (off >= ha->first_page_group_start)) qla4_8xxx_pci_base_offsetfset() 43 return (void __iomem *)(ha->nx_pcibase + off); qla4_8xxx_pci_base_offsetfset() 358 qla4_82xx_pci_set_crbwindow_2M(struct scsi_qla_host *ha, ulong *off) qla4_82xx_pci_set_crbwindow_2M() argument 362 ha->crb_win = CRB_HI(*off); qla4_82xx_pci_set_crbwindow_2M() 363 writel(ha->crb_win, qla4_82xx_pci_set_crbwindow_2M() 364 (void __iomem *)(CRB_WINDOW_2M + ha->nx_pcibase)); qla4_82xx_pci_set_crbwindow_2M() 368 win_read = readl((void __iomem *)(CRB_WINDOW_2M + ha->nx_pcibase)); qla4_82xx_pci_set_crbwindow_2M() 369 if (win_read != ha->crb_win) { qla4_82xx_pci_set_crbwindow_2M() 370 DEBUG2(ql4_printk(KERN_INFO, ha, qla4_82xx_pci_set_crbwindow_2M() 372 " off=0x%lx\n", __func__, ha->crb_win, win_read, *off)); qla4_82xx_pci_set_crbwindow_2M() 374 *off = (*off & MASK(16)) + CRB_INDIRECT_2M + ha->nx_pcibase; qla4_82xx_pci_set_crbwindow_2M() 378 qla4_82xx_wr_32(struct scsi_qla_host *ha, ulong off, u32 data) qla4_82xx_wr_32() argument 383 rv = qla4_82xx_pci_get_crb_addr_2M(ha, &off); qla4_82xx_wr_32() 388 write_lock_irqsave(&ha->hw_lock, flags); qla4_82xx_wr_32() 389 qla4_82xx_crb_win_lock(ha); qla4_82xx_wr_32() 390 qla4_82xx_pci_set_crbwindow_2M(ha, &off); qla4_82xx_wr_32() 396 qla4_82xx_crb_win_unlock(ha); qla4_82xx_wr_32() 397 write_unlock_irqrestore(&ha->hw_lock, flags); qla4_82xx_wr_32() 401 uint32_t qla4_82xx_rd_32(struct scsi_qla_host *ha, ulong off) qla4_82xx_rd_32() argument 407 rv = qla4_82xx_pci_get_crb_addr_2M(ha, &off); qla4_82xx_rd_32() 412 write_lock_irqsave(&ha->hw_lock, flags); qla4_82xx_rd_32() 413 qla4_82xx_crb_win_lock(ha); qla4_82xx_rd_32() 414 qla4_82xx_pci_set_crbwindow_2M(ha, &off); qla4_82xx_rd_32() 419 qla4_82xx_crb_win_unlock(ha); qla4_82xx_rd_32() 420 write_unlock_irqrestore(&ha->hw_lock, flags); qla4_82xx_rd_32() 426 int qla4_82xx_md_rd_32(struct scsi_qla_host *ha, uint32_t off, uint32_t *data) qla4_82xx_md_rd_32() argument 432 writel(off_value, (void __iomem *)(CRB_WINDOW_2M + ha->nx_pcibase)); qla4_82xx_md_rd_32() 438 win_read = readl((void __iomem *)(CRB_WINDOW_2M + ha->nx_pcibase)); qla4_82xx_md_rd_32() 440 DEBUG2(ql4_printk(KERN_INFO, ha, qla4_82xx_md_rd_32() 447 ha->nx_pcibase)); qla4_82xx_md_rd_32() 452 int qla4_82xx_md_wr_32(struct scsi_qla_host *ha, uint32_t off, uint32_t data) qla4_82xx_md_wr_32() argument 458 writel(off_value, (void __iomem *)(CRB_WINDOW_2M + ha->nx_pcibase)); qla4_82xx_md_wr_32() 463 win_read = readl((void __iomem *)(CRB_WINDOW_2M + ha->nx_pcibase)); qla4_82xx_md_wr_32() 465 DEBUG2(ql4_printk(KERN_INFO, ha, qla4_82xx_md_wr_32() 472 ha->nx_pcibase)); qla4_82xx_md_wr_32() 479 int qla4_82xx_crb_win_lock(struct scsi_qla_host *ha) qla4_82xx_crb_win_lock() argument 486 done = qla4_82xx_rd_32(ha, QLA82XX_PCIE_REG(PCIE_SEM7_LOCK)); qla4_82xx_crb_win_lock() 502 qla4_82xx_wr_32(ha, QLA82XX_CRB_WIN_LOCK_ID, ha->func_num); qla4_82xx_crb_win_lock() 506 void qla4_82xx_crb_win_unlock(struct scsi_qla_host *ha) qla4_82xx_crb_win_unlock() argument 508 qla4_82xx_rd_32(ha, QLA82XX_PCIE_REG(PCIE_SEM7_UNLOCK)); qla4_82xx_crb_win_unlock() 515 * @ha: pointer to adapter structure 520 int qla4_82xx_idc_lock(struct scsi_qla_host *ha) qla4_82xx_idc_lock() argument 527 done = qla4_82xx_rd_32(ha, QLA82XX_PCIE_REG(PCIE_SEM5_LOCK)); qla4_82xx_idc_lock() 546 void qla4_82xx_idc_unlock(struct scsi_qla_host *ha) qla4_82xx_idc_unlock() argument 548 qla4_82xx_rd_32(ha, QLA82XX_PCIE_REG(PCIE_SEM5_UNLOCK)); qla4_82xx_idc_unlock() 552 qla4_82xx_pci_get_crb_addr_2M(struct scsi_qla_host *ha, ulong *off) qla4_82xx_pci_get_crb_addr_2M() argument 561 QLA82XX_PCI_CAMQM_2M_BASE + ha->nx_pcibase; qla4_82xx_pci_get_crb_addr_2M() 576 *off = *off + m->start_2M - m->start_128M + ha->nx_pcibase; qla4_82xx_pci_get_crb_addr_2M() 591 qla4_82xx_pci_mem_bound_check(struct scsi_qla_host *ha, qla4_82xx_pci_mem_bound_check() argument 607 qla4_82xx_pci_set_window(struct scsi_qla_host *ha, unsigned long long addr) qla4_82xx_pci_set_window() argument 616 ha->ddr_mn_window = window; qla4_82xx_pci_set_window() 617 qla4_82xx_wr_32(ha, ha->mn_win_crb | qla4_82xx_pci_set_window() 619 win_read = qla4_82xx_rd_32(ha, ha->mn_win_crb | qla4_82xx_pci_set_window() 622 ql4_printk(KERN_WARNING, ha, qla4_82xx_pci_set_window() 637 ha->ddr_mn_window = window; qla4_82xx_pci_set_window() 638 qla4_82xx_wr_32(ha, ha->mn_win_crb | qla4_82xx_pci_set_window() 640 win_read = qla4_82xx_rd_32(ha, ha->mn_win_crb | qla4_82xx_pci_set_window() 654 ha->qdr_sn_window = window; qla4_82xx_pci_set_window() 655 qla4_82xx_wr_32(ha, ha->ms_win_crb | qla4_82xx_pci_set_window() 657 win_read = qla4_82xx_rd_32(ha, qla4_82xx_pci_set_window() 658 ha->ms_win_crb | QLA82XX_PCI_CRBSPACE); qla4_82xx_pci_set_window() 681 static int qla4_82xx_pci_is_same_window(struct scsi_qla_host *ha, qla4_82xx_pci_is_same_window() argument 703 if (ha->qdr_sn_window == window) qla4_82xx_pci_is_same_window() 710 static int qla4_82xx_pci_mem_read_direct(struct scsi_qla_host *ha, qla4_82xx_pci_mem_read_direct() argument 721 write_lock_irqsave(&ha->hw_lock, flags); qla4_82xx_pci_mem_read_direct() 727 start = qla4_82xx_pci_set_window(ha, off); qla4_82xx_pci_mem_read_direct() 729 (qla4_82xx_pci_is_same_window(ha, off + size - 1) == 0)) { qla4_82xx_pci_mem_read_direct() 730 write_unlock_irqrestore(&ha->hw_lock, flags); qla4_82xx_pci_mem_read_direct() 736 addr = qla4_8xxx_pci_base_offsetfset(ha, start); qla4_82xx_pci_mem_read_direct() 738 write_unlock_irqrestore(&ha->hw_lock, flags); qla4_82xx_pci_mem_read_direct() 739 mem_base = pci_resource_start(ha->pdev, 0); qla4_82xx_pci_mem_read_direct() 755 write_lock_irqsave(&ha->hw_lock, flags); qla4_82xx_pci_mem_read_direct() 775 write_unlock_irqrestore(&ha->hw_lock, flags); qla4_82xx_pci_mem_read_direct() 783 qla4_82xx_pci_mem_write_direct(struct scsi_qla_host *ha, u64 off, qla4_82xx_pci_mem_write_direct() argument 794 write_lock_irqsave(&ha->hw_lock, flags); qla4_82xx_pci_mem_write_direct() 800 start = qla4_82xx_pci_set_window(ha, off); qla4_82xx_pci_mem_write_direct() 802 (qla4_82xx_pci_is_same_window(ha, off + size - 1) == 0)) { qla4_82xx_pci_mem_write_direct() 803 write_unlock_irqrestore(&ha->hw_lock, flags); qla4_82xx_pci_mem_write_direct() 809 addr = qla4_8xxx_pci_base_offsetfset(ha, start); qla4_82xx_pci_mem_write_direct() 811 write_unlock_irqrestore(&ha->hw_lock, flags); qla4_82xx_pci_mem_write_direct() 812 mem_base = pci_resource_start(ha->pdev, 0); qla4_82xx_pci_mem_write_direct() 826 write_lock_irqsave(&ha->hw_lock, flags); qla4_82xx_pci_mem_write_direct() 846 write_unlock_irqrestore(&ha->hw_lock, flags); qla4_82xx_pci_mem_write_direct() 883 qla4_82xx_rom_lock(struct scsi_qla_host *ha) qla4_82xx_rom_lock() argument 891 done = qla4_82xx_rd_32(ha, QLA82XX_PCIE_REG(PCIE_SEM2_LOCK)); qla4_82xx_rom_lock() 907 qla4_82xx_wr_32(ha, QLA82XX_ROM_LOCK_ID, ROM_LOCK_DRIVER); qla4_82xx_rom_lock() 912 qla4_82xx_rom_unlock(struct scsi_qla_host *ha) qla4_82xx_rom_unlock() argument 914 qla4_82xx_rd_32(ha, QLA82XX_PCIE_REG(PCIE_SEM2_UNLOCK)); qla4_82xx_rom_unlock() 918 qla4_82xx_wait_rom_done(struct scsi_qla_host *ha) qla4_82xx_wait_rom_done() argument 924 done = qla4_82xx_rd_32(ha, QLA82XX_ROMUSB_GLB_STATUS); qla4_82xx_wait_rom_done() 937 qla4_82xx_do_rom_fast_read(struct scsi_qla_host *ha, int addr, int *valp) qla4_82xx_do_rom_fast_read() argument 939 qla4_82xx_wr_32(ha, QLA82XX_ROMUSB_ROM_ADDRESS, addr); qla4_82xx_do_rom_fast_read() 940 qla4_82xx_wr_32(ha, QLA82XX_ROMUSB_ROM_DUMMY_BYTE_CNT, 0); qla4_82xx_do_rom_fast_read() 941 qla4_82xx_wr_32(ha, QLA82XX_ROMUSB_ROM_ABYTE_CNT, 3); qla4_82xx_do_rom_fast_read() 942 qla4_82xx_wr_32(ha, QLA82XX_ROMUSB_ROM_INSTR_OPCODE, 0xb); qla4_82xx_do_rom_fast_read() 943 if (qla4_82xx_wait_rom_done(ha)) { qla4_82xx_do_rom_fast_read() 948 qla4_82xx_wr_32(ha, QLA82XX_ROMUSB_ROM_DUMMY_BYTE_CNT, 0); qla4_82xx_do_rom_fast_read() 950 qla4_82xx_wr_32(ha, QLA82XX_ROMUSB_ROM_ABYTE_CNT, 0); qla4_82xx_do_rom_fast_read() 952 *valp = qla4_82xx_rd_32(ha, QLA82XX_ROMUSB_ROM_RDATA); qla4_82xx_do_rom_fast_read() 957 qla4_82xx_rom_fast_read(struct scsi_qla_host *ha, int addr, int *valp) qla4_82xx_rom_fast_read() argument 961 while ((qla4_82xx_rom_lock(ha) != 0) && (loops < 50000)) { qla4_82xx_rom_fast_read() 966 ql4_printk(KERN_WARNING, ha, "%s: qla4_82xx_rom_lock failed\n", qla4_82xx_rom_fast_read() 970 ret = qla4_82xx_do_rom_fast_read(ha, addr, valp); qla4_82xx_rom_fast_read() 971 qla4_82xx_rom_unlock(ha); qla4_82xx_rom_fast_read() 980 qla4_82xx_pinit_from_rom(struct scsi_qla_host *ha, int verbose) qla4_82xx_pinit_from_rom() argument 994 qla4_82xx_rom_lock(ha); qla4_82xx_pinit_from_rom() 997 qla4_82xx_wr_32(ha, QLA82XX_CRB_I2Q + 0x10, 0x0); qla4_82xx_pinit_from_rom() 998 qla4_82xx_wr_32(ha, QLA82XX_CRB_I2Q + 0x14, 0x0); qla4_82xx_pinit_from_rom() 999 qla4_82xx_wr_32(ha, QLA82XX_CRB_I2Q + 0x18, 0x0); qla4_82xx_pinit_from_rom() 1000 qla4_82xx_wr_32(ha, QLA82XX_CRB_I2Q + 0x1c, 0x0); qla4_82xx_pinit_from_rom() 1001 qla4_82xx_wr_32(ha, QLA82XX_CRB_I2Q + 0x20, 0x0); qla4_82xx_pinit_from_rom() 1002 qla4_82xx_wr_32(ha, QLA82XX_CRB_I2Q + 0x24, 0x0); qla4_82xx_pinit_from_rom() 1005 qla4_82xx_wr_32(ha, QLA82XX_CRB_NIU + 0x40, 0xff); qla4_82xx_pinit_from_rom() 1007 qla4_82xx_wr_32(ha, QLA82XX_CRB_NIU + 0x70000, 0x00); qla4_82xx_pinit_from_rom() 1009 qla4_82xx_wr_32(ha, QLA82XX_CRB_NIU + 0x80000, 0x00); qla4_82xx_pinit_from_rom() 1011 qla4_82xx_wr_32(ha, QLA82XX_CRB_NIU + 0x90000, 0x00); qla4_82xx_pinit_from_rom() 1013 qla4_82xx_wr_32(ha, QLA82XX_CRB_NIU + 0xa0000, 0x00); qla4_82xx_pinit_from_rom() 1015 qla4_82xx_wr_32(ha, QLA82XX_CRB_NIU + 0xb0000, 0x00); qla4_82xx_pinit_from_rom() 1018 val = qla4_82xx_rd_32(ha, QLA82XX_CRB_SRE + 0x1000); qla4_82xx_pinit_from_rom() 1019 qla4_82xx_wr_32(ha, QLA82XX_CRB_SRE + 0x1000, val & (~(0x1))); qla4_82xx_pinit_from_rom() 1022 qla4_82xx_wr_32(ha, QLA82XX_CRB_EPG + 0x1300, 0x1); qla4_82xx_pinit_from_rom() 1025 qla4_82xx_wr_32(ha, QLA82XX_CRB_TIMER + 0x0, 0x0); qla4_82xx_pinit_from_rom() 1026 qla4_82xx_wr_32(ha, QLA82XX_CRB_TIMER + 0x8, 0x0); qla4_82xx_pinit_from_rom() 1027 qla4_82xx_wr_32(ha, QLA82XX_CRB_TIMER + 0x10, 0x0); qla4_82xx_pinit_from_rom() 1028 qla4_82xx_wr_32(ha, QLA82XX_CRB_TIMER + 0x18, 0x0); qla4_82xx_pinit_from_rom() 1029 qla4_82xx_wr_32(ha, QLA82XX_CRB_TIMER + 0x100, 0x0); qla4_82xx_pinit_from_rom() 1030 qla4_82xx_wr_32(ha, QLA82XX_CRB_TIMER + 0x200, 0x0); qla4_82xx_pinit_from_rom() 1033 qla4_82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_0 + 0x3c, 1); qla4_82xx_pinit_from_rom() 1034 qla4_82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_1 + 0x3c, 1); qla4_82xx_pinit_from_rom() 1035 qla4_82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_2 + 0x3c, 1); qla4_82xx_pinit_from_rom() 1036 qla4_82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_3 + 0x3c, 1); qla4_82xx_pinit_from_rom() 1037 qla4_82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_4 + 0x3c, 1); qla4_82xx_pinit_from_rom() 1041 if (test_bit(DPC_RESET_HA, &ha->dpc_flags)) qla4_82xx_pinit_from_rom() 1043 qla4_82xx_wr_32(ha, QLA82XX_ROMUSB_GLB_SW_RESET, 0xfeffffff); qla4_82xx_pinit_from_rom() 1045 qla4_82xx_wr_32(ha, QLA82XX_ROMUSB_GLB_SW_RESET, 0xffffffff); qla4_82xx_pinit_from_rom() 1047 qla4_82xx_rom_unlock(ha); qla4_82xx_pinit_from_rom() 1054 if (qla4_82xx_rom_fast_read(ha, 0, &n) != 0 || n != 0xcafecafeUL || qla4_82xx_pinit_from_rom() 1055 qla4_82xx_rom_fast_read(ha, 4, &n) != 0) { qla4_82xx_pinit_from_rom() 1056 ql4_printk(KERN_WARNING, ha, qla4_82xx_pinit_from_rom() 1069 ql4_printk(KERN_WARNING, ha, qla4_82xx_pinit_from_rom() 1075 ql4_printk(KERN_INFO, ha, qla4_82xx_pinit_from_rom() 1080 ql4_printk(KERN_WARNING, ha, qla4_82xx_pinit_from_rom() 1086 if (qla4_82xx_rom_fast_read(ha, 8*i + 4*offset, &val) != 0 || qla4_82xx_pinit_from_rom() 1087 qla4_82xx_rom_fast_read(ha, 8*i + 4*offset + 4, &addr) != qla4_82xx_pinit_from_rom() 1109 DEBUG2(ql4_printk(KERN_WARNING, ha, qla4_82xx_pinit_from_rom() 1140 ql4_printk(KERN_WARNING, ha, qla4_82xx_pinit_from_rom() 1146 qla4_82xx_wr_32(ha, off, buf[i].data); qla4_82xx_pinit_from_rom() 1163 qla4_82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_D+0xec, 0x1e); qla4_82xx_pinit_from_rom() 1164 qla4_82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_D+0x4c, 8); qla4_82xx_pinit_from_rom() 1165 qla4_82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_I+0x4c, 8); qla4_82xx_pinit_from_rom() 1168 qla4_82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_0+0x8, 0); qla4_82xx_pinit_from_rom() 1169 qla4_82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_0+0xc, 0); qla4_82xx_pinit_from_rom() 1170 qla4_82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_1+0x8, 0); qla4_82xx_pinit_from_rom() 1171 qla4_82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_1+0xc, 0); qla4_82xx_pinit_from_rom() 1172 qla4_82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_2+0x8, 0); qla4_82xx_pinit_from_rom() 1173 qla4_82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_2+0xc, 0); qla4_82xx_pinit_from_rom() 1174 qla4_82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_3+0x8, 0); qla4_82xx_pinit_from_rom() 1175 qla4_82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_3+0xc, 0); qla4_82xx_pinit_from_rom() 1182 * @ha: Pointer to adapter structure 1190 int qla4_8xxx_ms_mem_write_128b(struct scsi_qla_host *ha, uint64_t addr, qla4_8xxx_ms_mem_write_128b() argument 1204 write_lock_irqsave(&ha->hw_lock, flags); qla4_8xxx_ms_mem_write_128b() 1207 ret_val = ha->isp_ops->wr_reg_indirect(ha, MD_MIU_TEST_AGT_ADDR_HI, 0); qla4_8xxx_ms_mem_write_128b() 1209 ql4_printk(KERN_ERR, ha, "%s: write to AGT_ADDR_HI failed\n", qla4_8xxx_ms_mem_write_128b() 1223 ret_val = ha->isp_ops->wr_reg_indirect(ha, qla4_8xxx_ms_mem_write_128b() 1227 ret_val |= ha->isp_ops->wr_reg_indirect(ha, qla4_8xxx_ms_mem_write_128b() 1230 ret_val |= ha->isp_ops->wr_reg_indirect(ha, qla4_8xxx_ms_mem_write_128b() 1233 ret_val |= ha->isp_ops->wr_reg_indirect(ha, qla4_8xxx_ms_mem_write_128b() 1236 ret_val |= ha->isp_ops->wr_reg_indirect(ha, qla4_8xxx_ms_mem_write_128b() 1240 ql4_printk(KERN_ERR, ha, "%s: write to AGT_WRDATA failed\n", qla4_8xxx_ms_mem_write_128b() 1246 ret_val = ha->isp_ops->wr_reg_indirect(ha, MD_MIU_TEST_AGT_CTRL, qla4_8xxx_ms_mem_write_128b() 1248 ret_val |= ha->isp_ops->wr_reg_indirect(ha, qla4_8xxx_ms_mem_write_128b() 1252 ql4_printk(KERN_ERR, ha, "%s: write to AGT_CTRL failed\n", qla4_8xxx_ms_mem_write_128b() 1258 ret_val = ha->isp_ops->rd_reg_indirect(ha, qla4_8xxx_ms_mem_write_128b() 1262 ql4_printk(KERN_ERR, ha, "%s: failed to read MD_MIU_TEST_AGT_CTRL\n", qla4_8xxx_ms_mem_write_128b() 1280 write_unlock_irqrestore(&ha->hw_lock, flags); qla4_8xxx_ms_mem_write_128b() 1287 qla4_82xx_load_from_flash(struct scsi_qla_host *ha, uint32_t image_start) qla4_82xx_load_from_flash() argument 1295 flashaddr = memaddr = ha->hw.flt_region_bootload; qla4_82xx_load_from_flash() 1299 ha->host_no, __func__, flashaddr, image_start)); qla4_82xx_load_from_flash() 1302 if ((qla4_82xx_rom_fast_read(ha, flashaddr, (int *)&low)) || qla4_82xx_load_from_flash() 1303 (qla4_82xx_rom_fast_read(ha, flashaddr + 4, qla4_82xx_load_from_flash() 1309 rval = qla4_82xx_pci_mem_write_2M(ha, memaddr, &data, 8); qla4_82xx_load_from_flash() 1323 read_lock(&ha->hw_lock); qla4_82xx_load_from_flash() 1324 qla4_82xx_wr_32(ha, QLA82XX_CRB_PEG_NET_0 + 0x18, 0x1020); qla4_82xx_load_from_flash() 1325 qla4_82xx_wr_32(ha, QLA82XX_ROMUSB_GLB_SW_RESET, 0x80001e); qla4_82xx_load_from_flash() 1326 read_unlock(&ha->hw_lock); qla4_82xx_load_from_flash() 1332 static int qla4_82xx_load_fw(struct scsi_qla_host *ha, uint32_t image_start) qla4_82xx_load_fw() argument 1336 qla4_82xx_wr_32(ha, CRB_CMDPEG_STATE, 0); qla4_82xx_load_fw() 1337 if (qla4_82xx_pinit_from_rom(ha, 0) != QLA_SUCCESS) { qla4_82xx_load_fw() 1350 rst = qla4_82xx_rd_32(ha, QLA82XX_ROMUSB_GLB_SW_RESET); qla4_82xx_load_fw() 1353 qla4_82xx_wr_32(ha, QLA82XX_ROMUSB_GLB_SW_RESET, rst); qla4_82xx_load_fw() 1355 if (qla4_82xx_load_from_flash(ha, image_start)) { qla4_82xx_load_fw() 1364 qla4_82xx_pci_mem_read_2M(struct scsi_qla_host *ha, qla4_82xx_pci_mem_read_2M() argument 1380 if (qla4_82xx_pci_mem_bound_check(ha, off, size) == 0) qla4_82xx_pci_mem_read_2M() 1381 return qla4_82xx_pci_mem_read_direct(ha, qla4_82xx_pci_mem_read_2M() 1397 qla4_82xx_wr_32(ha, mem_crb + MIU_TEST_AGT_ADDR_LO, temp); qla4_82xx_pci_mem_read_2M() 1399 qla4_82xx_wr_32(ha, mem_crb + MIU_TEST_AGT_ADDR_HI, temp); qla4_82xx_pci_mem_read_2M() 1401 qla4_82xx_wr_32(ha, mem_crb + MIU_TEST_AGT_CTRL, temp); qla4_82xx_pci_mem_read_2M() 1403 qla4_82xx_wr_32(ha, mem_crb + MIU_TEST_AGT_CTRL, temp); qla4_82xx_pci_mem_read_2M() 1406 temp = qla4_82xx_rd_32(ha, mem_crb + MIU_TEST_AGT_CTRL); qla4_82xx_pci_mem_read_2M() 1421 temp = qla4_82xx_rd_32(ha, qla4_82xx_pci_mem_read_2M() 1455 qla4_82xx_pci_mem_write_2M(struct scsi_qla_host *ha, qla4_82xx_pci_mem_write_2M() argument 1470 if (qla4_82xx_pci_mem_bound_check(ha, off, size) == 0) qla4_82xx_pci_mem_write_2M() 1471 return qla4_82xx_pci_mem_write_direct(ha, qla4_82xx_pci_mem_write_2M() 1486 if (qla4_82xx_pci_mem_read_2M(ha, off8 + qla4_82xx_pci_mem_write_2M() 1522 qla4_82xx_wr_32(ha, mem_crb+MIU_TEST_AGT_ADDR_LO, temp); qla4_82xx_pci_mem_write_2M() 1524 qla4_82xx_wr_32(ha, mem_crb+MIU_TEST_AGT_ADDR_HI, temp); qla4_82xx_pci_mem_write_2M() 1526 qla4_82xx_wr_32(ha, mem_crb+MIU_TEST_AGT_WRDATA_LO, temp); qla4_82xx_pci_mem_write_2M() 1528 qla4_82xx_wr_32(ha, mem_crb+MIU_TEST_AGT_WRDATA_HI, temp); qla4_82xx_pci_mem_write_2M() 1530 qla4_82xx_wr_32(ha, mem_crb + MIU_TEST_AGT_WRDATA_UPPER_LO, qla4_82xx_pci_mem_write_2M() 1533 qla4_82xx_wr_32(ha, mem_crb + MIU_TEST_AGT_WRDATA_UPPER_HI, qla4_82xx_pci_mem_write_2M() 1537 qla4_82xx_wr_32(ha, mem_crb+MIU_TEST_AGT_CTRL, temp); qla4_82xx_pci_mem_write_2M() 1539 qla4_82xx_wr_32(ha, mem_crb+MIU_TEST_AGT_CTRL, temp); qla4_82xx_pci_mem_write_2M() 1542 temp = qla4_82xx_rd_32(ha, mem_crb + MIU_TEST_AGT_CTRL); qla4_82xx_pci_mem_write_2M() 1549 ql4_printk(KERN_ERR, ha, qla4_82xx_pci_mem_write_2M() 1560 static int qla4_82xx_cmdpeg_ready(struct scsi_qla_host *ha, int pegtune_val) qla4_82xx_cmdpeg_ready() argument 1567 val = qla4_82xx_rd_32(ha, CRB_CMDPEG_STATE); qla4_82xx_cmdpeg_ready() 1577 pegtune_val = qla4_82xx_rd_32(ha, qla4_82xx_cmdpeg_ready() 1587 static int qla4_82xx_rcvpeg_ready(struct scsi_qla_host *ha) qla4_82xx_rcvpeg_ready() argument 1593 read_lock(&ha->hw_lock); qla4_82xx_rcvpeg_ready() 1594 state = qla4_82xx_rd_32(ha, CRB_RCVPEG_STATE); qla4_82xx_rcvpeg_ready() 1595 read_unlock(&ha->hw_lock); qla4_82xx_rcvpeg_ready() 1600 read_lock(&ha->hw_lock); qla4_82xx_rcvpeg_ready() 1601 state = qla4_82xx_rd_32(ha, CRB_RCVPEG_STATE); qla4_82xx_rcvpeg_ready() 1602 read_unlock(&ha->hw_lock); qla4_82xx_rcvpeg_ready() 1608 DEBUG2(ql4_printk(KERN_INFO, ha, qla4_82xx_rcvpeg_ready() 1617 qla4_8xxx_set_drv_active(struct scsi_qla_host *ha) qla4_8xxx_set_drv_active() argument 1621 drv_active = qla4_8xxx_rd_direct(ha, QLA8XXX_CRB_DRV_ACTIVE); qla4_8xxx_set_drv_active() 1628 if (is_qla8032(ha) || is_qla8042(ha)) qla4_8xxx_set_drv_active() 1629 drv_active |= (1 << ha->func_num); qla4_8xxx_set_drv_active() 1631 drv_active |= (1 << (ha->func_num * 4)); qla4_8xxx_set_drv_active() 1633 ql4_printk(KERN_INFO, ha, "%s(%ld): drv_active: 0x%08x\n", qla4_8xxx_set_drv_active() 1634 __func__, ha->host_no, drv_active); qla4_8xxx_set_drv_active() 1635 qla4_8xxx_wr_direct(ha, QLA8XXX_CRB_DRV_ACTIVE, drv_active); qla4_8xxx_set_drv_active() 1639 qla4_8xxx_clear_drv_active(struct scsi_qla_host *ha) qla4_8xxx_clear_drv_active() argument 1643 drv_active = qla4_8xxx_rd_direct(ha, QLA8XXX_CRB_DRV_ACTIVE); qla4_8xxx_clear_drv_active() 1650 if (is_qla8032(ha) || is_qla8042(ha)) qla4_8xxx_clear_drv_active() 1651 drv_active &= ~(1 << (ha->func_num)); qla4_8xxx_clear_drv_active() 1653 drv_active &= ~(1 << (ha->func_num * 4)); qla4_8xxx_clear_drv_active() 1655 ql4_printk(KERN_INFO, ha, "%s(%ld): drv_active: 0x%08x\n", qla4_8xxx_clear_drv_active() 1656 __func__, ha->host_no, drv_active); qla4_8xxx_clear_drv_active() 1657 qla4_8xxx_wr_direct(ha, QLA8XXX_CRB_DRV_ACTIVE, drv_active); qla4_8xxx_clear_drv_active() 1660 inline int qla4_8xxx_need_reset(struct scsi_qla_host *ha) qla4_8xxx_need_reset() argument 1665 drv_active = qla4_8xxx_rd_direct(ha, QLA8XXX_CRB_DRV_ACTIVE); qla4_8xxx_need_reset() 1666 drv_state = qla4_8xxx_rd_direct(ha, QLA8XXX_CRB_DRV_STATE); qla4_8xxx_need_reset() 1673 if (is_qla8032(ha) || is_qla8042(ha)) qla4_8xxx_need_reset() 1674 rval = drv_state & (1 << ha->func_num); qla4_8xxx_need_reset() 1676 rval = drv_state & (1 << (ha->func_num * 4)); qla4_8xxx_need_reset() 1678 if ((test_bit(AF_EEH_BUSY, &ha->flags)) && drv_active) qla4_8xxx_need_reset() 1684 void qla4_8xxx_set_rst_ready(struct scsi_qla_host *ha) qla4_8xxx_set_rst_ready() argument 1688 drv_state = qla4_8xxx_rd_direct(ha, QLA8XXX_CRB_DRV_STATE); qla4_8xxx_set_rst_ready() 1695 if (is_qla8032(ha) || is_qla8042(ha)) qla4_8xxx_set_rst_ready() 1696 drv_state |= (1 << ha->func_num); qla4_8xxx_set_rst_ready() 1698 drv_state |= (1 << (ha->func_num * 4)); qla4_8xxx_set_rst_ready() 1700 ql4_printk(KERN_INFO, ha, "%s(%ld): drv_state: 0x%08x\n", qla4_8xxx_set_rst_ready() 1701 __func__, ha->host_no, drv_state); qla4_8xxx_set_rst_ready() 1702 qla4_8xxx_wr_direct(ha, QLA8XXX_CRB_DRV_STATE, drv_state); qla4_8xxx_set_rst_ready() 1705 void qla4_8xxx_clear_rst_ready(struct scsi_qla_host *ha) qla4_8xxx_clear_rst_ready() argument 1709 drv_state = qla4_8xxx_rd_direct(ha, QLA8XXX_CRB_DRV_STATE); qla4_8xxx_clear_rst_ready() 1716 if (is_qla8032(ha) || is_qla8042(ha)) qla4_8xxx_clear_rst_ready() 1717 drv_state &= ~(1 << ha->func_num); qla4_8xxx_clear_rst_ready() 1719 drv_state &= ~(1 << (ha->func_num * 4)); qla4_8xxx_clear_rst_ready() 1721 ql4_printk(KERN_INFO, ha, "%s(%ld): drv_state: 0x%08x\n", qla4_8xxx_clear_rst_ready() 1722 __func__, ha->host_no, drv_state); qla4_8xxx_clear_rst_ready() 1723 qla4_8xxx_wr_direct(ha, QLA8XXX_CRB_DRV_STATE, drv_state); qla4_8xxx_clear_rst_ready() 1727 qla4_8xxx_set_qsnt_ready(struct scsi_qla_host *ha) qla4_8xxx_set_qsnt_ready() argument 1731 qsnt_state = qla4_8xxx_rd_direct(ha, QLA8XXX_CRB_DRV_STATE); qla4_8xxx_set_qsnt_ready() 1738 if (is_qla8032(ha) || is_qla8042(ha)) qla4_8xxx_set_qsnt_ready() 1739 qsnt_state |= (1 << ha->func_num); qla4_8xxx_set_qsnt_ready() 1741 qsnt_state |= (2 << (ha->func_num * 4)); qla4_8xxx_set_qsnt_ready() 1743 qla4_8xxx_wr_direct(ha, QLA8XXX_CRB_DRV_STATE, qsnt_state); qla4_8xxx_set_qsnt_ready() 1748 qla4_82xx_start_firmware(struct scsi_qla_host *ha, uint32_t image_start) qla4_82xx_start_firmware() argument 1753 qla4_82xx_wr_32(ha, CRB_DMA_SHIFT, 0x55555555); qla4_82xx_start_firmware() 1756 qla4_82xx_wr_32(ha, CRB_CMDPEG_STATE, 0); qla4_82xx_start_firmware() 1757 qla4_82xx_wr_32(ha, CRB_RCVPEG_STATE, 0); qla4_82xx_start_firmware() 1758 qla4_82xx_wr_32(ha, QLA82XX_PEG_HALT_STATUS1, 0); qla4_82xx_start_firmware() 1759 qla4_82xx_wr_32(ha, QLA82XX_PEG_HALT_STATUS2, 0); qla4_82xx_start_firmware() 1761 if (qla4_82xx_load_fw(ha, image_start) != QLA_SUCCESS) { qla4_82xx_start_firmware() 1767 if (qla4_82xx_cmdpeg_ready(ha, 0) != QLA_SUCCESS) { qla4_82xx_start_firmware() 1773 pcie_capability_read_word(ha->pdev, PCI_EXP_LNKSTA, &lnk); qla4_82xx_start_firmware() 1774 ha->link_width = (lnk >> 4) & 0x3f; qla4_82xx_start_firmware() 1777 return qla4_82xx_rcvpeg_ready(ha); qla4_82xx_start_firmware() 1780 int qla4_82xx_try_start_fw(struct scsi_qla_host *ha) qla4_82xx_try_start_fw() argument 1790 ql4_printk(KERN_INFO, ha, qla4_82xx_try_start_fw() 1792 rval = qla4_8xxx_get_flash_info(ha); qla4_82xx_try_start_fw() 1796 ql4_printk(KERN_INFO, ha, qla4_82xx_try_start_fw() 1798 rval = qla4_82xx_start_firmware(ha, ha->hw.flt_region_fw); qla4_82xx_try_start_fw() 1801 ql4_printk(KERN_ERR, ha, "FW: Load firmware from flash" qla4_82xx_try_start_fw() 1809 void qla4_82xx_rom_lock_recovery(struct scsi_qla_host *ha) qla4_82xx_rom_lock_recovery() argument 1811 if (qla4_82xx_rom_lock(ha)) { qla4_82xx_rom_lock_recovery() 1813 dev_info(&ha->pdev->dev, "Resetting rom_lock\n"); qla4_82xx_rom_lock_recovery() 1821 qla4_82xx_rom_unlock(ha); qla4_82xx_rom_lock_recovery() 1824 static uint32_t ql4_84xx_poll_wait_for_ready(struct scsi_qla_host *ha, ql4_84xx_poll_wait_for_ready() argument 1833 ha->isp_ops->rd_reg_indirect(ha, addr1, &temp); ql4_84xx_poll_wait_for_ready() 1838 ql4_printk(KERN_INFO, ha, "Error in processing rdmdio entry\n"); ql4_84xx_poll_wait_for_ready() 1846 uint32_t ql4_84xx_ipmdio_rd_reg(struct scsi_qla_host *ha, uint32_t addr1, ql4_84xx_ipmdio_rd_reg() argument 1854 rval = ql4_84xx_poll_wait_for_ready(ha, addr1, mask); ql4_84xx_ipmdio_rd_reg() 1859 ha->isp_ops->wr_reg_indirect(ha, addr1, temp); ql4_84xx_ipmdio_rd_reg() 1861 rval = ql4_84xx_poll_wait_for_ready(ha, addr1, mask); ql4_84xx_ipmdio_rd_reg() 1865 ha->isp_ops->rd_reg_indirect(ha, addr3, &data); ql4_84xx_ipmdio_rd_reg() 1873 static uint32_t ql4_84xx_poll_wait_ipmdio_bus_idle(struct scsi_qla_host *ha, ql4_84xx_poll_wait_ipmdio_bus_idle() argument 1885 ql4_84xx_ipmdio_rd_reg(ha, addr1, addr3, mask, addr2, &temp); ql4_84xx_poll_wait_ipmdio_bus_idle() 1889 ql4_printk(KERN_INFO, ha, "Error in processing mdiobus idle\n"); ql4_84xx_poll_wait_ipmdio_bus_idle() 1897 static int ql4_84xx_ipmdio_wr_reg(struct scsi_qla_host *ha, ql4_84xx_ipmdio_wr_reg() argument 1904 rval = ql4_84xx_poll_wait_for_ready(ha, addr1, mask); ql4_84xx_ipmdio_wr_reg() 1908 ha->isp_ops->wr_reg_indirect(ha, addr3, value); ql4_84xx_ipmdio_wr_reg() 1909 ha->isp_ops->wr_reg_indirect(ha, addr1, addr); ql4_84xx_ipmdio_wr_reg() 1911 rval = ql4_84xx_poll_wait_for_ready(ha, addr1, mask); ql4_84xx_ipmdio_wr_reg() 1919 static void qla4_8xxx_minidump_process_rdcrb(struct scsi_qla_host *ha, qla4_8xxx_minidump_process_rdcrb() argument 1927 DEBUG2(ql4_printk(KERN_INFO, ha, "Entering fn: %s\n", __func__)); qla4_8xxx_minidump_process_rdcrb() 1934 ha->isp_ops->rd_reg_indirect(ha, r_addr, &r_value); qla4_8xxx_minidump_process_rdcrb() 1942 static int qla4_83xx_check_dma_engine_state(struct scsi_qla_host *ha) qla4_83xx_check_dma_engine_state() argument 1950 ha->fw_dump_tmplt_hdr; qla4_83xx_check_dma_engine_state() 1957 rval = ha->isp_ops->rd_reg_indirect(ha, qla4_83xx_check_dma_engine_state() 1971 static int qla4_83xx_start_pex_dma(struct scsi_qla_host *ha, qla4_83xx_start_pex_dma() argument 1980 ha->fw_dump_tmplt_hdr; qla4_83xx_start_pex_dma() 1986 rval = ha->isp_ops->wr_reg_indirect(ha, qla4_83xx_start_pex_dma() 1992 rval = ha->isp_ops->wr_reg_indirect(ha, qla4_83xx_start_pex_dma() 1997 rval = ha->isp_ops->wr_reg_indirect(ha, qla4_83xx_start_pex_dma() 2005 rval = ha->isp_ops->rd_reg_indirect(ha, qla4_83xx_start_pex_dma() 2027 static int qla4_8xxx_minidump_pex_dma_read(struct scsi_qla_host *ha, qla4_8xxx_minidump_pex_dma_read() argument 2039 DEBUG2(ql4_printk(KERN_INFO, ha, "Entering fn: %s\n", __func__)); qla4_8xxx_minidump_pex_dma_read() 2041 rval = qla4_83xx_check_dma_engine_state(ha); qla4_8xxx_minidump_pex_dma_read() 2043 DEBUG2(ql4_printk(KERN_INFO, ha, qla4_8xxx_minidump_pex_dma_read() 2050 rdmem_buffer = dma_alloc_coherent(&ha->pdev->dev, qla4_8xxx_minidump_pex_dma_read() 2054 DEBUG2(ql4_printk(KERN_INFO, ha, qla4_8xxx_minidump_pex_dma_read() 2067 dma_desc.cmd.dma_desc_cmd |= ((PCI_FUNC(ha->pdev->devfn) & 0xf) << 0x4); qla4_8xxx_minidump_pex_dma_read() 2084 dma_free_coherent(&ha->pdev->dev, qla4_8xxx_minidump_pex_dma_read() 2088 rdmem_buffer = dma_alloc_coherent(&ha->pdev->dev, size, qla4_8xxx_minidump_pex_dma_read() 2092 DEBUG2(ql4_printk(KERN_INFO, ha, qla4_8xxx_minidump_pex_dma_read() 2104 rval = qla4_8xxx_ms_mem_write_128b(ha, qla4_8xxx_minidump_pex_dma_read() 2109 ql4_printk(KERN_INFO, ha, qla4_8xxx_minidump_pex_dma_read() 2115 DEBUG2(ql4_printk(KERN_INFO, ha, qla4_8xxx_minidump_pex_dma_read() 2119 rval = qla4_83xx_start_pex_dma(ha, m_hdr); qla4_8xxx_minidump_pex_dma_read() 2121 DEBUG2(ql4_printk(KERN_INFO, ha, qla4_8xxx_minidump_pex_dma_read() 2123 ha->host_no, rval)); qla4_8xxx_minidump_pex_dma_read() 2132 DEBUG2(ql4_printk(KERN_INFO, ha, "Leaving fn: %s\n", __func__)); qla4_8xxx_minidump_pex_dma_read() 2138 dma_free_coherent(&ha->pdev->dev, size, rdmem_buffer, qla4_8xxx_minidump_pex_dma_read() 2144 static int qla4_8xxx_minidump_process_l2tag(struct scsi_qla_host *ha, qla4_8xxx_minidump_process_l2tag() argument 2156 DEBUG2(ql4_printk(KERN_INFO, ha, "Entering fn: %s\n", __func__)); qla4_8xxx_minidump_process_l2tag() 2171 ha->isp_ops->wr_reg_indirect(ha, t_r_addr, t_value); qla4_8xxx_minidump_process_l2tag() 2174 ha->isp_ops->wr_reg_indirect(ha, c_addr, c_value_w); qla4_8xxx_minidump_process_l2tag() 2179 ha->isp_ops->rd_reg_indirect(ha, c_addr, qla4_8xxx_minidump_process_l2tag() 2192 ha->isp_ops->rd_reg_indirect(ha, addr, &r_value); qla4_8xxx_minidump_process_l2tag() 2203 static int qla4_8xxx_minidump_process_control(struct scsi_qla_host *ha, qla4_8xxx_minidump_process_control() argument 2213 DEBUG2(ql4_printk(KERN_INFO, ha, "Entering fn: %s\n", __func__)); qla4_8xxx_minidump_process_control() 2215 ha->fw_dump_tmplt_hdr; qla4_8xxx_minidump_process_control() 2222 ha->isp_ops->wr_reg_indirect(ha, crb_addr, qla4_8xxx_minidump_process_control() 2227 ha->isp_ops->rd_reg_indirect(ha, crb_addr, &read_value); qla4_8xxx_minidump_process_control() 2228 ha->isp_ops->wr_reg_indirect(ha, crb_addr, read_value); qla4_8xxx_minidump_process_control() 2232 ha->isp_ops->rd_reg_indirect(ha, crb_addr, &read_value); qla4_8xxx_minidump_process_control() 2239 ha->isp_ops->wr_reg_indirect(ha, crb_addr, read_value); qla4_8xxx_minidump_process_control() 2242 ha->isp_ops->rd_reg_indirect(ha, crb_addr, &read_value); qla4_8xxx_minidump_process_control() 2244 ha->isp_ops->wr_reg_indirect(ha, crb_addr, read_value); qla4_8xxx_minidump_process_control() 2250 ha->isp_ops->rd_reg_indirect(ha, crb_addr, &read_value); qla4_8xxx_minidump_process_control() 2261 ha->isp_ops->rd_reg_indirect(ha, qla4_8xxx_minidump_process_control() 2276 ha->isp_ops->rd_reg_indirect(ha, addr, &read_value); qla4_8xxx_minidump_process_control() 2298 ha->isp_ops->wr_reg_indirect(ha, addr, read_value); qla4_8xxx_minidump_process_control() 2316 DEBUG2(ql4_printk(KERN_INFO, ha, "Leaving fn: %s\n", __func__)); qla4_8xxx_minidump_process_control() 2320 static void qla4_8xxx_minidump_process_rdocm(struct scsi_qla_host *ha, qla4_8xxx_minidump_process_rdocm() argument 2328 DEBUG2(ql4_printk(KERN_INFO, ha, "Entering fn: %s\n", __func__)); qla4_8xxx_minidump_process_rdocm() 2334 DEBUG2(ql4_printk(KERN_INFO, ha, qla4_8xxx_minidump_process_rdocm() 2339 r_value = readl((void __iomem *)(r_addr + ha->nx_pcibase)); qla4_8xxx_minidump_process_rdocm() 2343 DEBUG2(ql4_printk(KERN_INFO, ha, "Leaving fn: %s datacount: 0x%lx\n", qla4_8xxx_minidump_process_rdocm() 2348 static void qla4_8xxx_minidump_process_rdmux(struct scsi_qla_host *ha, qla4_8xxx_minidump_process_rdmux() argument 2356 DEBUG2(ql4_printk(KERN_INFO, ha, "Entering fn: %s\n", __func__)); qla4_8xxx_minidump_process_rdmux() 2365 ha->isp_ops->wr_reg_indirect(ha, s_addr, s_value); qla4_8xxx_minidump_process_rdmux() 2366 ha->isp_ops->rd_reg_indirect(ha, r_addr, &r_value); qla4_8xxx_minidump_process_rdmux() 2374 static void qla4_8xxx_minidump_process_l1cache(struct scsi_qla_host *ha, qla4_8xxx_minidump_process_l1cache() argument 2395 ha->isp_ops->wr_reg_indirect(ha, t_r_addr, t_value); qla4_8xxx_minidump_process_l1cache() 2396 ha->isp_ops->wr_reg_indirect(ha, c_addr, c_value_w); qla4_8xxx_minidump_process_l1cache() 2399 ha->isp_ops->rd_reg_indirect(ha, addr, &r_value); qla4_8xxx_minidump_process_l1cache() 2408 static void qla4_8xxx_minidump_process_queue(struct scsi_qla_host *ha, qla4_8xxx_minidump_process_queue() argument 2418 DEBUG2(ql4_printk(KERN_INFO, ha, "Entering fn: %s\n", __func__)); qla4_8xxx_minidump_process_queue() 2426 ha->isp_ops->wr_reg_indirect(ha, s_addr, qid); qla4_8xxx_minidump_process_queue() 2429 ha->isp_ops->rd_reg_indirect(ha, r_addr, &r_value); qla4_8xxx_minidump_process_queue() 2441 static void qla4_82xx_minidump_process_rdrom(struct scsi_qla_host *ha, qla4_82xx_minidump_process_rdrom() argument 2450 DEBUG2(ql4_printk(KERN_INFO, ha, "Entering fn: %s\n", __func__)); qla4_82xx_minidump_process_rdrom() 2455 DEBUG2(ql4_printk(KERN_INFO, ha, qla4_82xx_minidump_process_rdrom() 2460 ha->isp_ops->wr_reg_indirect(ha, MD_DIRECT_ROM_WINDOW, qla4_82xx_minidump_process_rdrom() 2462 ha->isp_ops->rd_reg_indirect(ha, qla4_82xx_minidump_process_rdrom() 2475 static int __qla4_8xxx_minidump_process_rdmem(struct scsi_qla_host *ha, __qla4_8xxx_minidump_process_rdmem() argument 2485 DEBUG2(ql4_printk(KERN_INFO, ha, "Entering fn: %s\n", __func__)); __qla4_8xxx_minidump_process_rdmem() 2490 DEBUG2(ql4_printk(KERN_INFO, ha, __qla4_8xxx_minidump_process_rdmem() 2495 DEBUG2(ql4_printk(KERN_INFO, ha, __qla4_8xxx_minidump_process_rdmem() 2502 DEBUG2(ql4_printk(KERN_INFO, ha, __qla4_8xxx_minidump_process_rdmem() 2508 DEBUG2(ql4_printk(KERN_INFO, ha, __qla4_8xxx_minidump_process_rdmem() 2512 write_lock_irqsave(&ha->hw_lock, flags); __qla4_8xxx_minidump_process_rdmem() 2514 ha->isp_ops->wr_reg_indirect(ha, MD_MIU_TEST_AGT_ADDR_LO, __qla4_8xxx_minidump_process_rdmem() 2517 ha->isp_ops->wr_reg_indirect(ha, MD_MIU_TEST_AGT_ADDR_HI, __qla4_8xxx_minidump_process_rdmem() 2520 ha->isp_ops->wr_reg_indirect(ha, MD_MIU_TEST_AGT_CTRL, r_value); __qla4_8xxx_minidump_process_rdmem() 2522 ha->isp_ops->wr_reg_indirect(ha, MD_MIU_TEST_AGT_CTRL, r_value); __qla4_8xxx_minidump_process_rdmem() 2525 ha->isp_ops->rd_reg_indirect(ha, MD_MIU_TEST_AGT_CTRL, __qla4_8xxx_minidump_process_rdmem() 2535 write_unlock_irqrestore(&ha->hw_lock, flags); __qla4_8xxx_minidump_process_rdmem() 2540 ha->isp_ops->rd_reg_indirect(ha, __qla4_8xxx_minidump_process_rdmem() 2548 write_unlock_irqrestore(&ha->hw_lock, flags); __qla4_8xxx_minidump_process_rdmem() 2550 DEBUG2(ql4_printk(KERN_INFO, ha, "Leaving fn: %s datacount: 0x%x\n", __qla4_8xxx_minidump_process_rdmem() 2557 static int qla4_8xxx_minidump_process_rdmem(struct scsi_qla_host *ha, qla4_8xxx_minidump_process_rdmem() argument 2564 rval = qla4_8xxx_minidump_pex_dma_read(ha, entry_hdr, &data_ptr); qla4_8xxx_minidump_process_rdmem() 2566 rval = __qla4_8xxx_minidump_process_rdmem(ha, entry_hdr, qla4_8xxx_minidump_process_rdmem() 2572 static void qla4_8xxx_mark_entry_skipped(struct scsi_qla_host *ha, qla4_8xxx_mark_entry_skipped() argument 2577 DEBUG2(ql4_printk(KERN_INFO, ha, qla4_8xxx_mark_entry_skipped() 2579 ha->host_no, index, entry_hdr->entry_type, qla4_8xxx_mark_entry_skipped() 2585 ha->fw_dump_skip_size += entry_hdr->entry_capture_size; qla4_8xxx_mark_entry_skipped() 2589 static uint32_t qla83xx_minidump_process_pollrd(struct scsi_qla_host *ha, qla83xx_minidump_process_pollrd() argument 2609 ha->isp_ops->wr_reg_indirect(ha, s_addr, s_value); qla83xx_minidump_process_pollrd() 2612 ha->isp_ops->rd_reg_indirect(ha, s_addr, &r_value); qla83xx_minidump_process_pollrd() 2619 ql4_printk(KERN_ERR, ha, "%s: TIMEOUT\n", qla83xx_minidump_process_pollrd() 2626 ha->isp_ops->rd_reg_indirect(ha, r_addr, &r_value); qla83xx_minidump_process_pollrd() 2638 static uint32_t qla4_84xx_minidump_process_rddfe(struct scsi_qla_host *ha, qla4_84xx_minidump_process_rddfe() argument 2667 ha->isp_ops->wr_reg_indirect(ha, addr1, (0x40000000 | value)); qla4_84xx_minidump_process_rddfe() 2671 ha->isp_ops->rd_reg_indirect(ha, addr1, &temp); qla4_84xx_minidump_process_rddfe() 2678 ql4_printk(KERN_ERR, ha, "%s: TIMEOUT\n", __func__); qla4_84xx_minidump_process_rddfe() 2682 ha->isp_ops->rd_reg_indirect(ha, addr2, &temp); qla4_84xx_minidump_process_rddfe() 2687 ha->isp_ops->wr_reg_indirect(ha, addr2, wrval); qla4_84xx_minidump_process_rddfe() 2688 ha->isp_ops->wr_reg_indirect(ha, addr1, value); qla4_84xx_minidump_process_rddfe() 2692 ha->isp_ops->rd_reg_indirect(ha, addr1, &temp); qla4_84xx_minidump_process_rddfe() 2698 ql4_printk(KERN_ERR, ha, "%s: TIMEOUT\n", qla4_84xx_minidump_process_rddfe() 2704 ha->isp_ops->wr_reg_indirect(ha, addr1, qla4_84xx_minidump_process_rddfe() 2709 ha->isp_ops->rd_reg_indirect(ha, addr1, &temp); qla4_84xx_minidump_process_rddfe() 2716 ql4_printk(KERN_ERR, ha, "%s: TIMEOUT\n", qla4_84xx_minidump_process_rddfe() 2722 ha->isp_ops->rd_reg_indirect(ha, addr2, &data); qla4_84xx_minidump_process_rddfe() 2734 static uint32_t qla4_84xx_minidump_process_rdmdio(struct scsi_qla_host *ha, qla4_84xx_minidump_process_rdmdio() argument 2762 rval = ql4_84xx_poll_wait_ipmdio_bus_idle(ha, addr1, addr2, qla4_84xx_minidump_process_rdmdio() 2768 rval = ql4_84xx_ipmdio_wr_reg(ha, addr1, addr3, mask, addr4, qla4_84xx_minidump_process_rdmdio() 2774 rval = ql4_84xx_ipmdio_wr_reg(ha, addr1, addr3, mask, addr5, qla4_84xx_minidump_process_rdmdio() 2780 rval = ql4_84xx_ipmdio_wr_reg(ha, addr1, addr3, mask, qla4_84xx_minidump_process_rdmdio() 2785 rval = ql4_84xx_poll_wait_ipmdio_bus_idle(ha, addr1, addr2, qla4_84xx_minidump_process_rdmdio() 2791 rval = ql4_84xx_ipmdio_rd_reg(ha, addr1, addr3, qla4_84xx_minidump_process_rdmdio() 2810 static uint32_t qla4_84xx_minidump_process_pollwr(struct scsi_qla_host *ha, qla4_84xx_minidump_process_pollwr() argument 2829 ha->isp_ops->rd_reg_indirect(ha, addr1, &r_value); qla4_84xx_minidump_process_pollwr() 2838 ql4_printk(KERN_ERR, ha, "%s: TIMEOUT\n", __func__); qla4_84xx_minidump_process_pollwr() 2843 ha->isp_ops->wr_reg_indirect(ha, addr2, value2); qla4_84xx_minidump_process_pollwr() 2844 ha->isp_ops->wr_reg_indirect(ha, addr1, value1); qla4_84xx_minidump_process_pollwr() 2848 ha->isp_ops->rd_reg_indirect(ha, addr1, &r_value); qla4_84xx_minidump_process_pollwr() 2859 static void qla83xx_minidump_process_rdmux2(struct scsi_qla_host *ha, qla83xx_minidump_process_rdmux2() argument 2877 ha->isp_ops->wr_reg_indirect(ha, sel_addr1, sel_val1); qla83xx_minidump_process_rdmux2() 2881 ha->isp_ops->wr_reg_indirect(ha, sel_addr2, t_sel_val); qla83xx_minidump_process_rdmux2() 2882 ha->isp_ops->rd_reg_indirect(ha, read_addr, &data); qla83xx_minidump_process_rdmux2() 2886 ha->isp_ops->wr_reg_indirect(ha, sel_addr1, sel_val2); qla83xx_minidump_process_rdmux2() 2890 ha->isp_ops->wr_reg_indirect(ha, sel_addr2, t_sel_val); qla83xx_minidump_process_rdmux2() 2891 ha->isp_ops->rd_reg_indirect(ha, read_addr, &data); qla83xx_minidump_process_rdmux2() 2902 static uint32_t qla83xx_minidump_process_pollrdmwr(struct scsi_qla_host *ha, qla83xx_minidump_process_pollrdmwr() argument 2919 ha->isp_ops->wr_reg_indirect(ha, addr_1, value_1); qla83xx_minidump_process_pollrdmwr() 2923 ha->isp_ops->rd_reg_indirect(ha, addr_1, &r_value); qla83xx_minidump_process_pollrdmwr() 2930 ql4_printk(KERN_ERR, ha, "%s: TIMEOUT_1\n", qla83xx_minidump_process_pollrdmwr() 2938 ha->isp_ops->rd_reg_indirect(ha, addr_2, &data); qla83xx_minidump_process_pollrdmwr() 2940 ha->isp_ops->wr_reg_indirect(ha, addr_2, data); qla83xx_minidump_process_pollrdmwr() 2941 ha->isp_ops->wr_reg_indirect(ha, addr_1, value_2); qla83xx_minidump_process_pollrdmwr() 2945 ha->isp_ops->rd_reg_indirect(ha, addr_1, &r_value); qla83xx_minidump_process_pollrdmwr() 2952 ql4_printk(KERN_ERR, ha, "%s: TIMEOUT_2\n", qla83xx_minidump_process_pollrdmwr() 2968 static uint32_t qla4_83xx_minidump_process_rdrom(struct scsi_qla_host *ha, qla4_83xx_minidump_process_rdrom() argument 2980 DEBUG2(ql4_printk(KERN_INFO, ha, "[%s]: fl_addr: 0x%x, count: 0x%x\n", qla4_83xx_minidump_process_rdrom() 2983 rval = qla4_83xx_lockless_flash_read_u32(ha, fl_addr, qla4_83xx_minidump_process_rdrom() 2987 ql4_printk(KERN_ERR, ha, "%s: Flash Read Error,Count=%d\n", qla4_83xx_minidump_process_rdrom() 3001 * @ha: pointer to adapter structure 3003 static int qla4_8xxx_collect_md_data(struct scsi_qla_host *ha) qla4_8xxx_collect_md_data() argument 3014 ha->fw_dump_skip_size = 0; qla4_8xxx_collect_md_data() 3015 if (!ha->fw_dump) { qla4_8xxx_collect_md_data() 3016 ql4_printk(KERN_INFO, ha, "%s(%ld) No buffer to dump\n", qla4_8xxx_collect_md_data() 3017 __func__, ha->host_no); qla4_8xxx_collect_md_data() 3022 ha->fw_dump_tmplt_hdr; qla4_8xxx_collect_md_data() 3023 data_ptr = (uint32_t *)((uint8_t *)ha->fw_dump + qla4_8xxx_collect_md_data() 3024 ha->fw_dump_tmplt_size); qla4_8xxx_collect_md_data() 3025 data_collected += ha->fw_dump_tmplt_size; qla4_8xxx_collect_md_data() 3028 ql4_printk(KERN_INFO, ha, "[%s]: starting data ptr: %p\n", qla4_8xxx_collect_md_data() 3030 ql4_printk(KERN_INFO, ha, qla4_8xxx_collect_md_data() 3033 ql4_printk(KERN_INFO, ha, "[%s]: Capture Mask obtained: 0x%x\n", qla4_8xxx_collect_md_data() 3034 __func__, ha->fw_dump_capture_mask); qla4_8xxx_collect_md_data() 3035 ql4_printk(KERN_INFO, ha, "[%s]: Total_data_size 0x%x, %d obtained\n", qla4_8xxx_collect_md_data() 3036 __func__, ha->fw_dump_size, ha->fw_dump_size); qla4_8xxx_collect_md_data() 3044 (((uint8_t *)ha->fw_dump_tmplt_hdr) + qla4_8xxx_collect_md_data() 3047 if (is_qla8032(ha) || is_qla8042(ha)) qla4_8xxx_collect_md_data() 3049 tmplt_hdr->ocm_window_reg[ha->func_num]; qla4_8xxx_collect_md_data() 3053 if (data_collected > ha->fw_dump_size) { qla4_8xxx_collect_md_data() 3054 ql4_printk(KERN_INFO, ha, qla4_8xxx_collect_md_data() 3056 data_collected, ha->fw_dump_size); qla4_8xxx_collect_md_data() 3061 ha->fw_dump_capture_mask)) { qla4_8xxx_collect_md_data() 3067 DEBUG2(ql4_printk(KERN_INFO, ha, qla4_8xxx_collect_md_data() 3070 (ha->fw_dump_size - data_collected))); qla4_8xxx_collect_md_data() 3077 qla4_8xxx_mark_entry_skipped(ha, entry_hdr, i); qla4_8xxx_collect_md_data() 3080 rval = qla4_8xxx_minidump_process_control(ha, qla4_8xxx_collect_md_data() 3083 qla4_8xxx_mark_entry_skipped(ha, entry_hdr, i); qla4_8xxx_collect_md_data() 3088 qla4_8xxx_minidump_process_rdcrb(ha, entry_hdr, qla4_8xxx_collect_md_data() 3092 rval = qla4_8xxx_minidump_process_rdmem(ha, entry_hdr, qla4_8xxx_collect_md_data() 3095 qla4_8xxx_mark_entry_skipped(ha, entry_hdr, i); qla4_8xxx_collect_md_data() 3101 if (is_qla8022(ha)) { qla4_8xxx_collect_md_data() 3102 qla4_82xx_minidump_process_rdrom(ha, entry_hdr, qla4_8xxx_collect_md_data() 3104 } else if (is_qla8032(ha) || is_qla8042(ha)) { qla4_8xxx_collect_md_data() 3105 rval = qla4_83xx_minidump_process_rdrom(ha, qla4_8xxx_collect_md_data() 3109 qla4_8xxx_mark_entry_skipped(ha, qla4_8xxx_collect_md_data() 3118 rval = qla4_8xxx_minidump_process_l2tag(ha, entry_hdr, qla4_8xxx_collect_md_data() 3121 qla4_8xxx_mark_entry_skipped(ha, entry_hdr, i); qla4_8xxx_collect_md_data() 3129 qla4_8xxx_minidump_process_l1cache(ha, entry_hdr, qla4_8xxx_collect_md_data() 3133 qla4_8xxx_minidump_process_rdocm(ha, entry_hdr, qla4_8xxx_collect_md_data() 3137 qla4_8xxx_minidump_process_rdmux(ha, entry_hdr, qla4_8xxx_collect_md_data() 3141 qla4_8xxx_minidump_process_queue(ha, entry_hdr, qla4_8xxx_collect_md_data() 3145 if (is_qla8022(ha)) { qla4_8xxx_collect_md_data() 3146 qla4_8xxx_mark_entry_skipped(ha, entry_hdr, i); qla4_8xxx_collect_md_data() 3149 rval = qla83xx_minidump_process_pollrd(ha, entry_hdr, qla4_8xxx_collect_md_data() 3152 qla4_8xxx_mark_entry_skipped(ha, entry_hdr, i); qla4_8xxx_collect_md_data() 3155 if (is_qla8022(ha)) { qla4_8xxx_collect_md_data() 3156 qla4_8xxx_mark_entry_skipped(ha, entry_hdr, i); qla4_8xxx_collect_md_data() 3159 qla83xx_minidump_process_rdmux2(ha, entry_hdr, qla4_8xxx_collect_md_data() 3163 if (is_qla8022(ha)) { qla4_8xxx_collect_md_data() 3164 qla4_8xxx_mark_entry_skipped(ha, entry_hdr, i); qla4_8xxx_collect_md_data() 3167 rval = qla83xx_minidump_process_pollrdmwr(ha, entry_hdr, qla4_8xxx_collect_md_data() 3170 qla4_8xxx_mark_entry_skipped(ha, entry_hdr, i); qla4_8xxx_collect_md_data() 3173 rval = qla4_84xx_minidump_process_rddfe(ha, entry_hdr, qla4_8xxx_collect_md_data() 3176 qla4_8xxx_mark_entry_skipped(ha, entry_hdr, i); qla4_8xxx_collect_md_data() 3179 rval = qla4_84xx_minidump_process_rdmdio(ha, entry_hdr, qla4_8xxx_collect_md_data() 3182 qla4_8xxx_mark_entry_skipped(ha, entry_hdr, i); qla4_8xxx_collect_md_data() 3185 rval = qla4_84xx_minidump_process_pollwr(ha, entry_hdr, qla4_8xxx_collect_md_data() 3188 qla4_8xxx_mark_entry_skipped(ha, entry_hdr, i); qla4_8xxx_collect_md_data() 3192 qla4_8xxx_mark_entry_skipped(ha, entry_hdr, i); qla4_8xxx_collect_md_data() 3196 data_collected = (uint8_t *)data_ptr - (uint8_t *)ha->fw_dump; qla4_8xxx_collect_md_data() 3204 if ((data_collected + ha->fw_dump_skip_size) != ha->fw_dump_size) { qla4_8xxx_collect_md_data() 3205 ql4_printk(KERN_INFO, ha, qla4_8xxx_collect_md_data() 3207 data_collected, ha->fw_dump_size); qla4_8xxx_collect_md_data() 3212 DEBUG2(ql4_printk(KERN_INFO, ha, "Leaving fn: %s Last entry: 0x%x\n", qla4_8xxx_collect_md_data() 3220 * @ha: pointer to adapter structure 3222 static void qla4_8xxx_uevent_emit(struct scsi_qla_host *ha, u32 code) qla4_8xxx_uevent_emit() argument 3230 ha->host_no); qla4_8xxx_uevent_emit() 3237 kobject_uevent_env(&(&ha->pdev->dev)->kobj, KOBJ_CHANGE, envp); qla4_8xxx_uevent_emit() 3240 void qla4_8xxx_get_minidump(struct scsi_qla_host *ha) qla4_8xxx_get_minidump() argument 3242 if (ql4xenablemd && test_bit(AF_FW_RECOVERY, &ha->flags) && qla4_8xxx_get_minidump() 3243 !test_bit(AF_82XX_FW_DUMPED, &ha->flags)) { qla4_8xxx_get_minidump() 3244 if (!qla4_8xxx_collect_md_data(ha)) { qla4_8xxx_get_minidump() 3245 qla4_8xxx_uevent_emit(ha, QL4_UEVENT_CODE_FW_DUMP); qla4_8xxx_get_minidump() 3246 set_bit(AF_82XX_FW_DUMPED, &ha->flags); qla4_8xxx_get_minidump() 3248 ql4_printk(KERN_INFO, ha, "%s: Unable to collect minidump\n", qla4_8xxx_get_minidump() 3256 * @ha: pointer to adapter structure 3260 int qla4_8xxx_device_bootstrap(struct scsi_qla_host *ha) qla4_8xxx_device_bootstrap() argument 3267 need_reset = ha->isp_ops->need_reset(ha); qla4_8xxx_device_bootstrap() 3271 if (test_bit(AF_FW_RECOVERY, &ha->flags)) qla4_8xxx_device_bootstrap() 3272 ha->isp_ops->rom_lock_recovery(ha); qla4_8xxx_device_bootstrap() 3274 old_count = qla4_8xxx_rd_direct(ha, QLA8XXX_PEG_ALIVE_COUNTER); qla4_8xxx_device_bootstrap() 3277 count = qla4_8xxx_rd_direct(ha, qla4_8xxx_device_bootstrap() 3284 ha->isp_ops->rom_lock_recovery(ha); qla4_8xxx_device_bootstrap() 3288 ql4_printk(KERN_INFO, ha, "HW State: INITIALIZING\n"); qla4_8xxx_device_bootstrap() 3289 qla4_8xxx_wr_direct(ha, QLA8XXX_CRB_DEV_STATE, qla4_8xxx_device_bootstrap() 3292 ha->isp_ops->idc_unlock(ha); qla4_8xxx_device_bootstrap() 3294 if (is_qla8022(ha)) qla4_8xxx_device_bootstrap() 3295 qla4_8xxx_get_minidump(ha); qla4_8xxx_device_bootstrap() 3297 rval = ha->isp_ops->restart_firmware(ha); qla4_8xxx_device_bootstrap() 3298 ha->isp_ops->idc_lock(ha); qla4_8xxx_device_bootstrap() 3301 ql4_printk(KERN_INFO, ha, "HW State: FAILED\n"); qla4_8xxx_device_bootstrap() 3302 qla4_8xxx_clear_drv_active(ha); qla4_8xxx_device_bootstrap() 3303 qla4_8xxx_wr_direct(ha, QLA8XXX_CRB_DEV_STATE, qla4_8xxx_device_bootstrap() 3309 ql4_printk(KERN_INFO, ha, "HW State: READY\n"); qla4_8xxx_device_bootstrap() 3310 qla4_8xxx_wr_direct(ha, QLA8XXX_CRB_DEV_STATE, QLA8XXX_DEV_READY); qla4_8xxx_device_bootstrap() 3317 * @ha: pointer to adapter structure 3322 qla4_82xx_need_reset_handler(struct scsi_qla_host *ha) qla4_82xx_need_reset_handler() argument 3328 ql4_printk(KERN_INFO, ha, qla4_82xx_need_reset_handler() 3331 if (test_and_clear_bit(AF_ONLINE, &ha->flags)) { qla4_82xx_need_reset_handler() 3332 qla4_82xx_idc_unlock(ha); qla4_82xx_need_reset_handler() 3333 ha->isp_ops->disable_intrs(ha); qla4_82xx_need_reset_handler() 3334 qla4_82xx_idc_lock(ha); qla4_82xx_need_reset_handler() 3337 if (!test_bit(AF_8XXX_RST_OWNER, &ha->flags)) { qla4_82xx_need_reset_handler() 3338 DEBUG2(ql4_printk(KERN_INFO, ha, qla4_82xx_need_reset_handler() 3340 __func__, ha->host_no)); qla4_82xx_need_reset_handler() 3341 qla4_8xxx_set_rst_ready(ha); qla4_82xx_need_reset_handler() 3343 active_mask = (~(1 << (ha->func_num * 4))); qla4_82xx_need_reset_handler() 3347 reset_timeout = jiffies + (ha->nx_reset_timeout * HZ); qla4_82xx_need_reset_handler() 3349 drv_state = qla4_82xx_rd_32(ha, QLA82XX_CRB_DRV_STATE); qla4_82xx_need_reset_handler() 3350 drv_active = qla4_82xx_rd_32(ha, QLA82XX_CRB_DRV_ACTIVE); qla4_82xx_need_reset_handler() 3352 ql4_printk(KERN_INFO, ha, qla4_82xx_need_reset_handler() 3354 __func__, ha->host_no, drv_state, drv_active); qla4_82xx_need_reset_handler() 3358 ql4_printk(KERN_INFO, ha, qla4_82xx_need_reset_handler() 3368 if (test_bit(AF_8XXX_RST_OWNER, &ha->flags)) { qla4_82xx_need_reset_handler() 3369 ql4_printk(KERN_INFO, ha, qla4_82xx_need_reset_handler() 3371 __func__, ha->host_no, drv_state, qla4_82xx_need_reset_handler() 3374 qla4_82xx_idc_unlock(ha); qla4_82xx_need_reset_handler() 3376 qla4_82xx_idc_lock(ha); qla4_82xx_need_reset_handler() 3378 drv_state = qla4_82xx_rd_32(ha, QLA82XX_CRB_DRV_STATE); qla4_82xx_need_reset_handler() 3379 drv_active = qla4_82xx_rd_32(ha, QLA82XX_CRB_DRV_ACTIVE); qla4_82xx_need_reset_handler() 3383 clear_bit(AF_8XXX_RST_OWNER, &ha->flags); qla4_82xx_need_reset_handler() 3385 dev_state = qla4_82xx_rd_32(ha, QLA82XX_CRB_DEV_STATE); qla4_82xx_need_reset_handler() 3386 ql4_printk(KERN_INFO, ha, "Device state is 0x%x = %s\n", dev_state, qla4_82xx_need_reset_handler() 3391 ql4_printk(KERN_INFO, ha, "HW State: COLD/RE-INIT\n"); qla4_82xx_need_reset_handler() 3392 qla4_82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE, QLA8XXX_DEV_COLD); qla4_82xx_need_reset_handler() 3393 qla4_8xxx_set_rst_ready(ha); qla4_82xx_need_reset_handler() 3399 * @ha: pointer to adapter structure 3402 qla4_8xxx_need_qsnt_handler(struct scsi_qla_host *ha) qla4_8xxx_need_qsnt_handler() argument 3404 ha->isp_ops->idc_lock(ha); qla4_8xxx_need_qsnt_handler() 3405 qla4_8xxx_set_qsnt_ready(ha); qla4_8xxx_need_qsnt_handler() 3406 ha->isp_ops->idc_unlock(ha); qla4_8xxx_need_qsnt_handler() 3409 static void qla4_82xx_set_idc_ver(struct scsi_qla_host *ha) qla4_82xx_set_idc_ver() argument 3414 drv_active = qla4_8xxx_rd_direct(ha, QLA8XXX_CRB_DRV_ACTIVE); qla4_82xx_set_idc_ver() 3415 if (drv_active == (1 << (ha->func_num * 4))) { qla4_82xx_set_idc_ver() 3416 qla4_8xxx_wr_direct(ha, QLA8XXX_CRB_DRV_IDC_VERSION, qla4_82xx_set_idc_ver() 3418 ql4_printk(KERN_INFO, ha, qla4_82xx_set_idc_ver() 3422 idc_ver = qla4_8xxx_rd_direct(ha, QLA8XXX_CRB_DRV_IDC_VERSION); qla4_82xx_set_idc_ver() 3424 ql4_printk(KERN_INFO, ha, qla4_82xx_set_idc_ver() 3431 static int qla4_83xx_set_idc_ver(struct scsi_qla_host *ha) qla4_83xx_set_idc_ver() argument 3437 drv_active = qla4_8xxx_rd_direct(ha, QLA8XXX_CRB_DRV_ACTIVE); qla4_83xx_set_idc_ver() 3438 if (drv_active == (1 << ha->func_num)) { qla4_83xx_set_idc_ver() 3439 idc_ver = qla4_8xxx_rd_direct(ha, QLA8XXX_CRB_DRV_IDC_VERSION); qla4_83xx_set_idc_ver() 3442 qla4_8xxx_wr_direct(ha, QLA8XXX_CRB_DRV_IDC_VERSION, idc_ver); qla4_83xx_set_idc_ver() 3443 ql4_printk(KERN_INFO, ha, qla4_83xx_set_idc_ver() 3447 idc_ver = qla4_8xxx_rd_direct(ha, QLA8XXX_CRB_DRV_IDC_VERSION); qla4_83xx_set_idc_ver() 3450 ql4_printk(KERN_INFO, ha, qla4_83xx_set_idc_ver() 3460 idc_ver = qla4_83xx_rd_reg(ha, QLA83XX_CRB_IDC_VER_MINOR); qla4_83xx_set_idc_ver() 3461 idc_ver &= ~(0x03 << (ha->func_num * 2)); qla4_83xx_set_idc_ver() 3462 idc_ver |= (QLA83XX_IDC_VER_MIN_VALUE << (ha->func_num * 2)); qla4_83xx_set_idc_ver() 3463 qla4_83xx_wr_reg(ha, QLA83XX_CRB_IDC_VER_MINOR, idc_ver); qla4_83xx_set_idc_ver() 3469 int qla4_8xxx_update_idc_reg(struct scsi_qla_host *ha) qla4_8xxx_update_idc_reg() argument 3474 if (test_bit(AF_INIT_DONE, &ha->flags)) qla4_8xxx_update_idc_reg() 3477 ha->isp_ops->idc_lock(ha); qla4_8xxx_update_idc_reg() 3478 qla4_8xxx_set_drv_active(ha); qla4_8xxx_update_idc_reg() 3484 if (is_qla8032(ha) || is_qla8042(ha)) { qla4_8xxx_update_idc_reg() 3485 drv_active = qla4_8xxx_rd_direct(ha, QLA8XXX_CRB_DRV_ACTIVE); qla4_8xxx_update_idc_reg() 3486 if ((drv_active == (1 << ha->func_num)) && !ql4xdontresethba) qla4_8xxx_update_idc_reg() 3487 qla4_83xx_clear_idc_dontreset(ha); qla4_8xxx_update_idc_reg() 3490 if (is_qla8022(ha)) { qla4_8xxx_update_idc_reg() 3491 qla4_82xx_set_idc_ver(ha); qla4_8xxx_update_idc_reg() 3492 } else if (is_qla8032(ha) || is_qla8042(ha)) { qla4_8xxx_update_idc_reg() 3493 rval = qla4_83xx_set_idc_ver(ha); qla4_8xxx_update_idc_reg() 3495 qla4_8xxx_clear_drv_active(ha); qla4_8xxx_update_idc_reg() 3498 ha->isp_ops->idc_unlock(ha); qla4_8xxx_update_idc_reg() 3506 * @ha: pointer to host adapter structure. 3510 int qla4_8xxx_device_state_handler(struct scsi_qla_host *ha) qla4_8xxx_device_state_handler() argument 3516 rval = qla4_8xxx_update_idc_reg(ha); qla4_8xxx_device_state_handler() 3520 dev_state = qla4_8xxx_rd_direct(ha, QLA8XXX_CRB_DEV_STATE); qla4_8xxx_device_state_handler() 3521 DEBUG2(ql4_printk(KERN_INFO, ha, "Device state is 0x%x = %s\n", qla4_8xxx_device_state_handler() 3526 dev_init_timeout = jiffies + (ha->nx_dev_init_timeout * HZ); qla4_8xxx_device_state_handler() 3528 ha->isp_ops->idc_lock(ha); qla4_8xxx_device_state_handler() 3532 ql4_printk(KERN_WARNING, ha, qla4_8xxx_device_state_handler() 3537 qla4_8xxx_wr_direct(ha, QLA8XXX_CRB_DEV_STATE, qla4_8xxx_device_state_handler() 3541 dev_state = qla4_8xxx_rd_direct(ha, QLA8XXX_CRB_DEV_STATE); qla4_8xxx_device_state_handler() 3542 ql4_printk(KERN_INFO, ha, "Device state is 0x%x = %s\n", qla4_8xxx_device_state_handler() 3551 rval = qla4_8xxx_device_bootstrap(ha); qla4_8xxx_device_state_handler() 3554 ha->isp_ops->idc_unlock(ha); qla4_8xxx_device_state_handler() 3556 ha->isp_ops->idc_lock(ha); qla4_8xxx_device_state_handler() 3564 if (is_qla8032(ha) || is_qla8042(ha)) { qla4_8xxx_device_state_handler() 3565 qla4_83xx_need_reset_handler(ha); qla4_8xxx_device_state_handler() 3566 } else if (is_qla8022(ha)) { qla4_8xxx_device_state_handler() 3568 qla4_82xx_need_reset_handler(ha); qla4_8xxx_device_state_handler() 3572 (ha->nx_dev_init_timeout * HZ); qla4_8xxx_device_state_handler() 3574 ha->isp_ops->idc_unlock(ha); qla4_8xxx_device_state_handler() 3576 ha->isp_ops->idc_lock(ha); qla4_8xxx_device_state_handler() 3582 qla4_8xxx_need_qsnt_handler(ha); qla4_8xxx_device_state_handler() 3585 ha->isp_ops->idc_unlock(ha); qla4_8xxx_device_state_handler() 3587 ha->isp_ops->idc_lock(ha); qla4_8xxx_device_state_handler() 3590 ha->isp_ops->idc_unlock(ha); qla4_8xxx_device_state_handler() 3591 qla4xxx_dead_adapter_cleanup(ha); qla4_8xxx_device_state_handler() 3593 ha->isp_ops->idc_lock(ha); qla4_8xxx_device_state_handler() 3596 ha->isp_ops->idc_unlock(ha); qla4_8xxx_device_state_handler() 3597 qla4xxx_dead_adapter_cleanup(ha); qla4_8xxx_device_state_handler() 3599 ha->isp_ops->idc_lock(ha); qla4_8xxx_device_state_handler() 3604 ha->isp_ops->idc_unlock(ha); qla4_8xxx_device_state_handler() 3609 int qla4_8xxx_load_risc(struct scsi_qla_host *ha) qla4_8xxx_load_risc() argument 3614 if (is_qla8032(ha) || is_qla8042(ha)) { qla4_8xxx_load_risc() 3615 writel(0, &ha->qla4_83xx_reg->risc_intr); qla4_8xxx_load_risc() 3616 readl(&ha->qla4_83xx_reg->risc_intr); qla4_8xxx_load_risc() 3617 } else if (is_qla8022(ha)) { qla4_8xxx_load_risc() 3618 writel(0, &ha->qla4_82xx_reg->host_int); qla4_8xxx_load_risc() 3619 readl(&ha->qla4_82xx_reg->host_int); qla4_8xxx_load_risc() 3622 retval = qla4_8xxx_device_state_handler(ha); qla4_8xxx_load_risc() 3626 qla4xxx_init_rings(ha); qla4_8xxx_load_risc() 3628 if (retval == QLA_SUCCESS && !test_bit(AF_IRQ_ATTACHED, &ha->flags)) qla4_8xxx_load_risc() 3629 retval = qla4xxx_request_irqs(ha); qla4_8xxx_load_risc() 3658 qla4_82xx_read_flash_data(struct scsi_qla_host *ha, uint32_t *dwptr, qla4_82xx_read_flash_data() argument 3664 while ((qla4_82xx_rom_lock(ha) != 0) && (loops < 50000)) { qla4_82xx_read_flash_data() 3670 ql4_printk(KERN_WARNING, ha, "ROM lock failed\n"); qla4_82xx_read_flash_data() 3676 if (qla4_82xx_do_rom_fast_read(ha, faddr, &val)) { qla4_82xx_read_flash_data() 3677 ql4_printk(KERN_WARNING, ha, qla4_82xx_read_flash_data() 3685 qla4_82xx_rom_unlock(ha); qla4_82xx_read_flash_data() 3693 qla4_82xx_read_optrom_data(struct scsi_qla_host *ha, uint8_t *buf, qla4_82xx_read_optrom_data() argument 3696 qla4_82xx_read_flash_data(ha, (uint32_t *)buf, offset, length); qla4_82xx_read_optrom_data() 3701 qla4_8xxx_find_flt_start(struct scsi_qla_host *ha, uint32_t *start) qla4_8xxx_find_flt_start() argument 3713 DEBUG2(ql4_printk(KERN_INFO, ha, "FLTL[%s] = 0x%x.\n", loc, *start)); qla4_8xxx_find_flt_start() 3718 qla4_8xxx_get_flt_info(struct scsi_qla_host *ha, uint32_t flt_addr) qla4_8xxx_get_flt_info() argument 3726 struct ql82xx_hw_data *hw = &ha->hw; qla4_8xxx_get_flt_info() 3729 wptr = (uint16_t *)ha->request_ring; qla4_8xxx_get_flt_info() 3730 flt = (struct qla_flt_header *)ha->request_ring; qla4_8xxx_get_flt_info() 3733 if (is_qla8022(ha)) { qla4_8xxx_get_flt_info() 3734 qla4_82xx_read_optrom_data(ha, (uint8_t *)ha->request_ring, qla4_8xxx_get_flt_info() 3736 } else if (is_qla8032(ha) || is_qla8042(ha)) { qla4_8xxx_get_flt_info() 3737 status = qla4_83xx_flash_read_u32(ha, flt_addr << 2, qla4_8xxx_get_flt_info() 3738 (uint8_t *)ha->request_ring, qla4_8xxx_get_flt_info() 3747 DEBUG2(ql4_printk(KERN_INFO, ha, "Unsupported FLT detected: " qla4_8xxx_get_flt_info() 3758 DEBUG2(ql4_printk(KERN_INFO, ha, "Inconsistent FLT detected: " qla4_8xxx_get_flt_info() 3771 DEBUG3(ql4_printk(KERN_DEBUG, ha, "FLT[%02x]: start=0x%x " qla4_8xxx_get_flt_info() 3818 DEBUG2(ql4_printk(KERN_INFO, ha, qla4_8xxx_get_flt_info() 3828 qla4_82xx_get_fdt_info(struct scsi_qla_host *ha) qla4_82xx_get_fdt_info() argument 3839 struct ql82xx_hw_data *hw = &ha->hw; qla4_82xx_get_fdt_info() 3844 wptr = (uint16_t *)ha->request_ring; qla4_82xx_get_fdt_info() 3845 fdt = (struct qla_fdt_layout *)ha->request_ring; qla4_82xx_get_fdt_info() 3846 qla4_82xx_read_optrom_data(ha, (uint8_t *)ha->request_ring, qla4_82xx_get_fdt_info() 3861 DEBUG2(ql4_printk(KERN_INFO, ha, "Inconsistent FDT detected: " qla4_82xx_get_fdt_info() 3887 DEBUG2(ql4_printk(KERN_INFO, ha, "FDT[%s]: (0x%x/0x%x) erase=0x%x " qla4_82xx_get_fdt_info() 3895 qla4_82xx_get_idc_param(struct scsi_qla_host *ha) qla4_82xx_get_idc_param() argument 3900 if (!is_qla8022(ha)) qla4_82xx_get_idc_param() 3902 wptr = (uint32_t *)ha->request_ring; qla4_82xx_get_idc_param() 3903 qla4_82xx_read_optrom_data(ha, (uint8_t *)ha->request_ring, qla4_82xx_get_idc_param() 3907 ha->nx_dev_init_timeout = ROM_DEV_INIT_TIMEOUT; qla4_82xx_get_idc_param() 3908 ha->nx_reset_timeout = ROM_DRV_RESET_ACK_TIMEOUT; qla4_82xx_get_idc_param() 3910 ha->nx_dev_init_timeout = le32_to_cpu(*wptr++); qla4_82xx_get_idc_param() 3911 ha->nx_reset_timeout = le32_to_cpu(*wptr); qla4_82xx_get_idc_param() 3914 DEBUG2(ql4_printk(KERN_DEBUG, ha, qla4_82xx_get_idc_param() 3915 "ha->nx_dev_init_timeout = %d\n", ha->nx_dev_init_timeout)); qla4_82xx_get_idc_param() 3916 DEBUG2(ql4_printk(KERN_DEBUG, ha, qla4_82xx_get_idc_param() 3917 "ha->nx_reset_timeout = %d\n", ha->nx_reset_timeout)); qla4_82xx_get_idc_param() 3921 void qla4_82xx_queue_mbox_cmd(struct scsi_qla_host *ha, uint32_t *mbx_cmd, qla4_82xx_queue_mbox_cmd() argument 3928 writel(mbx_cmd[i], &ha->qla4_82xx_reg->mailbox_in[i]); qla4_82xx_queue_mbox_cmd() 3931 writel(mbx_cmd[0], &ha->qla4_82xx_reg->mailbox_in[0]); qla4_82xx_queue_mbox_cmd() 3932 readl(&ha->qla4_82xx_reg->mailbox_in[0]); qla4_82xx_queue_mbox_cmd() 3933 writel(HINT_MBX_INT_PENDING, &ha->qla4_82xx_reg->hint); qla4_82xx_queue_mbox_cmd() 3934 readl(&ha->qla4_82xx_reg->hint); qla4_82xx_queue_mbox_cmd() 3937 void qla4_82xx_process_mbox_intr(struct scsi_qla_host *ha, int out_count) qla4_82xx_process_mbox_intr() argument 3941 intr_status = readl(&ha->qla4_82xx_reg->host_int); qla4_82xx_process_mbox_intr() 3943 ha->mbox_status_count = out_count; qla4_82xx_process_mbox_intr() 3944 intr_status = readl(&ha->qla4_82xx_reg->host_status); qla4_82xx_process_mbox_intr() 3945 ha->isp_ops->interrupt_service_routine(ha, intr_status); qla4_82xx_process_mbox_intr() 3947 if (test_bit(AF_INTERRUPTS_ON, &ha->flags) && qla4_82xx_process_mbox_intr() 3948 test_bit(AF_INTx_ENABLED, &ha->flags)) qla4_82xx_process_mbox_intr() 3949 qla4_82xx_wr_32(ha, ha->nx_legacy_intr.tgt_mask_reg, qla4_82xx_process_mbox_intr() 3955 qla4_8xxx_get_flash_info(struct scsi_qla_host *ha) qla4_8xxx_get_flash_info() argument 3960 ret = qla4_8xxx_find_flt_start(ha, &flt_addr); qla4_8xxx_get_flash_info() 3964 qla4_8xxx_get_flt_info(ha, flt_addr); qla4_8xxx_get_flash_info() 3965 if (is_qla8022(ha)) { qla4_8xxx_get_flash_info() 3966 qla4_82xx_get_fdt_info(ha); qla4_8xxx_get_flash_info() 3967 qla4_82xx_get_idc_param(ha); qla4_8xxx_get_flash_info() 3968 } else if (is_qla8032(ha) || is_qla8042(ha)) { qla4_8xxx_get_flash_info() 3969 qla4_83xx_get_idc_param(ha); qla4_8xxx_get_flash_info() 3977 * @ha: pointer to host adapter structure. 3985 qla4_8xxx_stop_firmware(struct scsi_qla_host *ha) qla4_8xxx_stop_firmware() argument 3995 status = qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 1, qla4_8xxx_stop_firmware() 3998 DEBUG2(printk("scsi%ld: %s: status = %d\n", ha->host_no, qla4_8xxx_stop_firmware() 4005 * @ha: pointer to host adapter structure. 4008 qla4_82xx_isp_reset(struct scsi_qla_host *ha) qla4_82xx_isp_reset() argument 4013 qla4_82xx_idc_lock(ha); qla4_82xx_isp_reset() 4014 dev_state = qla4_82xx_rd_32(ha, QLA82XX_CRB_DEV_STATE); qla4_82xx_isp_reset() 4017 ql4_printk(KERN_INFO, ha, "HW State: NEED RESET\n"); qla4_82xx_isp_reset() 4018 qla4_82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE, qla4_82xx_isp_reset() 4020 set_bit(AF_8XXX_RST_OWNER, &ha->flags); qla4_82xx_isp_reset() 4022 ql4_printk(KERN_INFO, ha, "HW State: DEVICE INITIALIZING\n"); qla4_82xx_isp_reset() 4024 qla4_82xx_idc_unlock(ha); qla4_82xx_isp_reset() 4026 rval = qla4_8xxx_device_state_handler(ha); qla4_82xx_isp_reset() 4028 qla4_82xx_idc_lock(ha); qla4_82xx_isp_reset() 4029 qla4_8xxx_clear_rst_ready(ha); qla4_82xx_isp_reset() 4030 qla4_82xx_idc_unlock(ha); qla4_82xx_isp_reset() 4033 ql4_printk(KERN_INFO, ha, "Clearing AF_RECOVERY in qla4_82xx_isp_reset\n"); qla4_82xx_isp_reset() 4034 clear_bit(AF_FW_RECOVERY, &ha->flags); qla4_82xx_isp_reset() 4042 * @ha: pointer to host adapter structure. 4045 int qla4_8xxx_get_sys_info(struct scsi_qla_host *ha) qla4_8xxx_get_sys_info() argument 4053 sys_info = dma_alloc_coherent(&ha->pdev->dev, sizeof(*sys_info), qla4_8xxx_get_sys_info() 4057 ha->host_no, __func__)); qla4_8xxx_get_sys_info() 4070 if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 6, &mbox_cmd[0], qla4_8xxx_get_sys_info() 4073 ha->host_no, __func__)); qla4_8xxx_get_sys_info() 4078 if (((is_qla8032(ha) || is_qla8042(ha)) ? mbox_sts[3] : mbox_sts[4]) < qla4_8xxx_get_sys_info() 4081 " error (%x)\n", ha->host_no, __func__, mbox_sts[4])); qla4_8xxx_get_sys_info() 4086 ha->port_num = sys_info->port_num; qla4_8xxx_get_sys_info() 4087 memcpy(ha->my_mac, &sys_info->mac_addr[0], qla4_8xxx_get_sys_info() 4088 min(sizeof(ha->my_mac), sizeof(sys_info->mac_addr))); qla4_8xxx_get_sys_info() 4089 memcpy(ha->serial_number, &sys_info->serial_number, qla4_8xxx_get_sys_info() 4090 min(sizeof(ha->serial_number), sizeof(sys_info->serial_number))); qla4_8xxx_get_sys_info() 4091 memcpy(ha->model_name, &sys_info->board_id_str, qla4_8xxx_get_sys_info() 4092 min(sizeof(ha->model_name), sizeof(sys_info->board_id_str))); qla4_8xxx_get_sys_info() 4093 ha->phy_port_cnt = sys_info->phys_port_cnt; qla4_8xxx_get_sys_info() 4094 ha->phy_port_num = sys_info->port_num; qla4_8xxx_get_sys_info() 4095 ha->iscsi_pci_func_cnt = sys_info->iscsi_pci_func_cnt; qla4_8xxx_get_sys_info() 4099 "serial %s\n", ha->host_no, __func__, qla4_8xxx_get_sys_info() 4100 ha->my_mac[0], ha->my_mac[1], ha->my_mac[2], qla4_8xxx_get_sys_info() 4101 ha->my_mac[3], ha->my_mac[4], ha->my_mac[5], qla4_8xxx_get_sys_info() 4102 ha->serial_number)); qla4_8xxx_get_sys_info() 4107 dma_free_coherent(&ha->pdev->dev, sizeof(*sys_info), sys_info, qla4_8xxx_get_sys_info() 4114 int qla4_8xxx_intr_enable(struct scsi_qla_host *ha) qla4_8xxx_intr_enable() argument 4119 DEBUG2(ql4_printk(KERN_INFO, ha, "%s\n", __func__)); qla4_8xxx_intr_enable() 4125 if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 1, &mbox_cmd[0], qla4_8xxx_intr_enable() 4127 DEBUG2(ql4_printk(KERN_INFO, ha, qla4_8xxx_intr_enable() 4135 int qla4_8xxx_intr_disable(struct scsi_qla_host *ha) qla4_8xxx_intr_disable() argument 4140 DEBUG2(ql4_printk(KERN_INFO, ha, "%s\n", __func__)); qla4_8xxx_intr_disable() 4146 if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 1, &mbox_cmd[0], qla4_8xxx_intr_disable() 4148 DEBUG2(ql4_printk(KERN_INFO, ha, qla4_8xxx_intr_disable() 4158 qla4_82xx_enable_intrs(struct scsi_qla_host *ha) qla4_82xx_enable_intrs() argument 4160 qla4_8xxx_intr_enable(ha); qla4_82xx_enable_intrs() 4162 spin_lock_irq(&ha->hardware_lock); qla4_82xx_enable_intrs() 4164 qla4_82xx_wr_32(ha, ha->nx_legacy_intr.tgt_mask_reg, 0xfbff); qla4_82xx_enable_intrs() 4165 spin_unlock_irq(&ha->hardware_lock); qla4_82xx_enable_intrs() 4166 set_bit(AF_INTERRUPTS_ON, &ha->flags); qla4_82xx_enable_intrs() 4170 qla4_82xx_disable_intrs(struct scsi_qla_host *ha) qla4_82xx_disable_intrs() argument 4172 if (test_and_clear_bit(AF_INTERRUPTS_ON, &ha->flags)) qla4_82xx_disable_intrs() 4173 qla4_8xxx_intr_disable(ha); qla4_82xx_disable_intrs() 4175 spin_lock_irq(&ha->hardware_lock); qla4_82xx_disable_intrs() 4177 qla4_82xx_wr_32(ha, ha->nx_legacy_intr.tgt_mask_reg, 0x0400); qla4_82xx_disable_intrs() 4178 spin_unlock_irq(&ha->hardware_lock); qla4_82xx_disable_intrs() 4197 qla4_8xxx_disable_msix(struct scsi_qla_host *ha) qla4_8xxx_disable_msix() argument 4203 qentry = &ha->msix_entries[qla4_8xxx_msix_entries[i].index]; qla4_8xxx_disable_msix() 4205 free_irq(qentry->msix_vector, ha); qla4_8xxx_disable_msix() 4206 DEBUG2(ql4_printk(KERN_INFO, ha, "%s: %s\n", qla4_8xxx_disable_msix() 4210 pci_disable_msix(ha->pdev); qla4_8xxx_disable_msix() 4211 clear_bit(AF_MSIX_ENABLED, &ha->flags); qla4_8xxx_disable_msix() 4215 qla4_8xxx_enable_msix(struct scsi_qla_host *ha) qla4_8xxx_enable_msix() argument 4224 ret = pci_enable_msix_exact(ha->pdev, entries, ARRAY_SIZE(entries)); qla4_8xxx_enable_msix() 4226 ql4_printk(KERN_WARNING, ha, qla4_8xxx_enable_msix() 4231 set_bit(AF_MSIX_ENABLED, &ha->flags); qla4_8xxx_enable_msix() 4234 qentry = &ha->msix_entries[qla4_8xxx_msix_entries[i].index]; qla4_8xxx_enable_msix() 4240 qla4_8xxx_msix_entries[i].name, ha); qla4_8xxx_enable_msix() 4242 ql4_printk(KERN_WARNING, ha, qla4_8xxx_enable_msix() 4245 qla4_8xxx_disable_msix(ha); qla4_8xxx_enable_msix() 4249 DEBUG2(ql4_printk(KERN_INFO, ha, "%s: %s\n", qla4_8xxx_enable_msix() 4256 int qla4_8xxx_check_init_adapter_retry(struct scsi_qla_host *ha) qla4_8xxx_check_init_adapter_retry() argument 4261 if (!test_bit(AF_IRQ_ATTACHED, &ha->flags)) { qla4_8xxx_check_init_adapter_retry() 4262 ql4_printk(KERN_WARNING, ha, "%s: Skipping retry of adapter initialization as IRQs are not attached\n", qla4_8xxx_check_init_adapter_retry() 4271 qla4xxx_free_irqs(ha); qla4_8xxx_check_init_adapter_retry()
H A D	ql4_glbl.h	13 int qla4xxx_hw_reset(struct scsi_qla_host *ha); 15 int qla4xxx_send_command_to_isp(struct scsi_qla_host *ha, struct srb *srb); 16 int qla4xxx_initialize_adapter(struct scsi_qla_host *ha, int is_reset); 17 int qla4xxx_soft_reset(struct scsi_qla_host *ha); 20 void qla4xxx_free_ddb(struct scsi_qla_host *ha, struct ddb_entry *ddb_entry); 21 void qla4xxx_process_aen(struct scsi_qla_host *ha, uint8_t process_aen); 23 int qla4xxx_get_dhcp_ip_address(struct scsi_qla_host *ha); 24 int qla4xxx_abort_task(struct scsi_qla_host *ha, struct srb *srb); 25 int qla4xxx_reset_lun(struct scsi_qla_host *ha, struct ddb_entry *ddb_entry, 27 int qla4xxx_reset_target(struct scsi_qla_host *ha, 29 int qla4xxx_get_flash(struct scsi_qla_host *ha, dma_addr_t dma_addr, 31 int qla4xxx_get_firmware_status(struct scsi_qla_host *ha); 32 int qla4xxx_get_firmware_state(struct scsi_qla_host *ha); 33 int qla4xxx_initialize_fw_cb(struct scsi_qla_host *ha); 37 int qla4xxx_get_fwddb_entry(struct scsi_qla_host *ha, 48 int qla4xxx_set_ddb_entry(struct scsi_qla_host * ha, uint16_t fw_ddb_index, 50 uint8_t qla4xxx_get_ifcb(struct scsi_qla_host *ha, uint32_t *mbox_cmd, 52 int qla4xxx_conn_close_sess_logout(struct scsi_qla_host *ha, 56 int qla4xxx_disable_acb(struct scsi_qla_host *ha); 57 int qla4xxx_set_acb(struct scsi_qla_host *ha, uint32_t *mbox_cmd, 59 int qla4xxx_get_acb(struct scsi_qla_host *ha, dma_addr_t acb_dma, 61 int qla4xxx_get_ip_state(struct scsi_qla_host *ha, uint32_t acb_idx, 64 u16 rd_nvram_word(struct scsi_qla_host *ha, int offset); 65 u8 rd_nvram_byte(struct scsi_qla_host *ha, int offset); 66 void qla4xxx_get_crash_record(struct scsi_qla_host *ha); 67 int qla4xxx_is_nvram_configuration_valid(struct scsi_qla_host *ha); 68 int qla4xxx_about_firmware(struct scsi_qla_host *ha); 69 void qla4xxx_interrupt_service_routine(struct scsi_qla_host *ha, 71 int qla4xxx_init_rings(struct scsi_qla_host *ha); 73 struct srb *qla4xxx_del_from_active_array(struct scsi_qla_host *ha, 75 int qla4xxx_process_ddb_changed(struct scsi_qla_host *ha, uint32_t fw_ddb_index, 78 int qla4xxx_send_marker_iocb(struct scsi_qla_host *ha, 80 int qla4xxx_set_flash(struct scsi_qla_host *ha, dma_addr_t dma_addr, 82 int qla4xxx_mailbox_command(struct scsi_qla_host *ha, uint8_t inCount, 84 int qla4xxx_get_chap_index(struct scsi_qla_host *ha, char *username, 86 int qla4xxx_set_chap(struct scsi_qla_host *ha, char *username, char *password, 89 void qla4xxx_queue_iocb(struct scsi_qla_host *ha); 90 void qla4xxx_complete_iocb(struct scsi_qla_host *ha); 91 int qla4xxx_get_sys_info(struct scsi_qla_host *ha); 92 int qla4xxx_iospace_config(struct scsi_qla_host *ha); 93 void qla4xxx_pci_config(struct scsi_qla_host *ha); 94 int qla4xxx_start_firmware(struct scsi_qla_host *ha); 96 uint16_t qla4xxx_rd_shdw_req_q_out(struct scsi_qla_host *ha); 97 uint16_t qla4xxx_rd_shdw_rsp_q_in(struct scsi_qla_host *ha); 98 int qla4xxx_request_irqs(struct scsi_qla_host *ha); 99 void qla4xxx_free_irqs(struct scsi_qla_host *ha); 100 void qla4xxx_process_response_queue(struct scsi_qla_host *ha); 101 void qla4xxx_wake_dpc(struct scsi_qla_host *ha); 102 void qla4xxx_get_conn_event_log(struct scsi_qla_host *ha); 103 void qla4xxx_mailbox_premature_completion(struct scsi_qla_host *ha); 104 void qla4xxx_dump_registers(struct scsi_qla_host *ha); 105 uint8_t qla4xxx_update_local_ifcb(struct scsi_qla_host *ha, 112 int qla4_8xxx_iospace_config(struct scsi_qla_host *ha); 115 void qla4_82xx_queue_iocb(struct scsi_qla_host *ha); 116 void qla4_82xx_complete_iocb(struct scsi_qla_host *ha); 124 int qla4_82xx_pci_mem_write_2M(struct scsi_qla_host *ha, u64, void *, int); 125 int qla4_82xx_isp_reset(struct scsi_qla_host *ha); 126 void qla4_82xx_interrupt_service_routine(struct scsi_qla_host *ha, 128 uint16_t qla4_82xx_rd_shdw_req_q_out(struct scsi_qla_host *ha); 129 uint16_t qla4_82xx_rd_shdw_rsp_q_in(struct scsi_qla_host *ha); 130 int qla4_8xxx_get_sys_info(struct scsi_qla_host *ha); 131 void qla4_8xxx_watchdog(struct scsi_qla_host *ha); 132 int qla4_8xxx_stop_firmware(struct scsi_qla_host *ha); 133 int qla4_8xxx_get_flash_info(struct scsi_qla_host *ha); 134 void qla4_82xx_enable_intrs(struct scsi_qla_host *ha); 135 void qla4_82xx_disable_intrs(struct scsi_qla_host *ha); 136 int qla4_8xxx_enable_msix(struct scsi_qla_host *ha); 137 void qla4_8xxx_disable_msix(struct scsi_qla_host *ha); 141 void qla4xxx_mark_all_devices_missing(struct scsi_qla_host *ha); 142 void qla4xxx_dead_adapter_cleanup(struct scsi_qla_host *ha); 143 int qla4_82xx_idc_lock(struct scsi_qla_host *ha); 144 void qla4_82xx_idc_unlock(struct scsi_qla_host *ha); 145 int qla4_8xxx_device_state_handler(struct scsi_qla_host *ha); 146 void qla4_8xxx_need_qsnt_handler(struct scsi_qla_host *ha); 147 void qla4_8xxx_clear_drv_active(struct scsi_qla_host *ha); 148 void qla4_8xxx_set_drv_active(struct scsi_qla_host *ha); 149 int qla4xxx_conn_open(struct scsi_qla_host *ha, uint16_t fw_ddb_index); 150 int qla4xxx_set_param_ddbentry(struct scsi_qla_host *ha, 154 int qla4xxx_session_logout_ddb(struct scsi_qla_host *ha, 156 int qla4xxx_req_ddb_entry(struct scsi_qla_host *ha, uint32_t fw_ddb_index, 158 int qla4xxx_clear_ddb_entry(struct scsi_qla_host *ha, uint32_t fw_ddb_index); 160 void qla4xxx_free_ddb_index(struct scsi_qla_host *ha); 161 int qla4xxx_get_mgmt_data(struct scsi_qla_host *ha, uint16_t fw_ddb_index, 163 void qla4xxx_update_session_conn_param(struct scsi_qla_host *ha, 165 void qla4xxx_update_session_conn_fwddb_param(struct scsi_qla_host *ha, 167 int qla4xxx_bootdb_by_index(struct scsi_qla_host *ha, 170 int qla4xxx_get_chap(struct scsi_qla_host *ha, char *username, 172 int qla4xxx_get_nvram(struct scsi_qla_host *ha, dma_addr_t nvram_dma, 174 int qla4xxx_set_nvram(struct scsi_qla_host *ha, dma_addr_t nvram_dma, 176 int qla4xxx_restore_factory_defaults(struct scsi_qla_host *ha, 179 int qla4xxx_get_ddb_index(struct scsi_qla_host *ha, uint16_t *ddb_index); 183 int qla4xxx_flash_ddb_change(struct scsi_qla_host *ha, uint32_t fw_ddb_index, 185 int qla4xxx_ddb_change(struct scsi_qla_host *ha, uint32_t fw_ddb_index, 187 void qla4xxx_build_ddb_list(struct scsi_qla_host *ha, int is_reset); 188 int qla4xxx_post_aen_work(struct scsi_qla_host *ha, 191 int qla4xxx_ping_iocb(struct scsi_qla_host *ha, uint32_t options, 193 int qla4xxx_post_ping_evt_work(struct scsi_qla_host *ha, 196 int qla4xxx_flashdb_by_index(struct scsi_qla_host *ha, 205 int qla4xxx_get_minidump_template(struct scsi_qla_host *ha, 207 int qla4xxx_req_template_size(struct scsi_qla_host *ha); 208 void qla4_8xxx_alloc_sysfs_attr(struct scsi_qla_host *ha); 209 void qla4_8xxx_free_sysfs_attr(struct scsi_qla_host *ha); 210 void qla4xxx_alloc_fw_dump(struct scsi_qla_host *ha); 211 int qla4_82xx_try_start_fw(struct scsi_qla_host *ha); 212 int qla4_8xxx_need_reset(struct scsi_qla_host *ha); 213 int qla4_82xx_md_rd_32(struct scsi_qla_host *ha, uint32_t off, uint32_t *data); 214 int qla4_82xx_md_wr_32(struct scsi_qla_host *ha, uint32_t off, uint32_t data); 215 void qla4_82xx_rom_lock_recovery(struct scsi_qla_host *ha); 216 void qla4_82xx_queue_mbox_cmd(struct scsi_qla_host *ha, uint32_t *mbx_cmd, 218 void qla4_82xx_process_mbox_intr(struct scsi_qla_host *ha, int outcount); 219 void qla4xxx_queue_mbox_cmd(struct scsi_qla_host *ha, uint32_t *mbx_cmd, 221 void qla4xxx_process_mbox_intr(struct scsi_qla_host *ha, int outcount); 222 void qla4_8xxx_dump_peg_reg(struct scsi_qla_host *ha); 223 void qla4_83xx_disable_intrs(struct scsi_qla_host *ha); 224 void qla4_83xx_enable_intrs(struct scsi_qla_host *ha); 225 int qla4_83xx_start_firmware(struct scsi_qla_host *ha); 227 void qla4_83xx_interrupt_service_routine(struct scsi_qla_host *ha, 229 int qla4_83xx_isp_reset(struct scsi_qla_host *ha); 230 void qla4_83xx_queue_iocb(struct scsi_qla_host *ha); 231 void qla4_83xx_complete_iocb(struct scsi_qla_host *ha); 232 uint32_t qla4_83xx_rd_reg(struct scsi_qla_host *ha, ulong addr); 233 void qla4_83xx_wr_reg(struct scsi_qla_host *ha, ulong addr, uint32_t val); 234 int qla4_83xx_rd_reg_indirect(struct scsi_qla_host *ha, uint32_t addr, 236 int qla4_83xx_wr_reg_indirect(struct scsi_qla_host *ha, uint32_t addr, 238 int qla4_83xx_drv_lock(struct scsi_qla_host *ha); 239 void qla4_83xx_drv_unlock(struct scsi_qla_host *ha); 240 void qla4_83xx_rom_lock_recovery(struct scsi_qla_host *ha); 241 void qla4_83xx_queue_mbox_cmd(struct scsi_qla_host *ha, uint32_t *mbx_cmd, 243 void qla4_83xx_process_mbox_intr(struct scsi_qla_host *ha, int outcount); 244 void qla4_83xx_read_reset_template(struct scsi_qla_host *ha); 245 void qla4_83xx_set_idc_dontreset(struct scsi_qla_host *ha); 246 int qla4_83xx_idc_dontreset(struct scsi_qla_host *ha); 247 int qla4_83xx_lockless_flash_read_u32(struct scsi_qla_host *ha, 250 void qla4_83xx_clear_idc_dontreset(struct scsi_qla_host *ha); 251 void qla4_83xx_need_reset_handler(struct scsi_qla_host *ha); 252 int qla4_83xx_flash_read_u32(struct scsi_qla_host *ha, uint32_t flash_addr, 254 void qla4_83xx_get_idc_param(struct scsi_qla_host *ha); 255 void qla4_8xxx_set_rst_ready(struct scsi_qla_host *ha); 256 void qla4_8xxx_clear_rst_ready(struct scsi_qla_host *ha); 257 int qla4_8xxx_device_bootstrap(struct scsi_qla_host *ha); 258 void qla4_8xxx_get_minidump(struct scsi_qla_host *ha); 259 int qla4_8xxx_intr_disable(struct scsi_qla_host *ha); 260 int qla4_8xxx_intr_enable(struct scsi_qla_host *ha); 261 int qla4_8xxx_set_param(struct scsi_qla_host *ha, int param); 262 int qla4_8xxx_update_idc_reg(struct scsi_qla_host *ha); 263 int qla4_83xx_post_idc_ack(struct scsi_qla_host *ha); 264 void qla4_83xx_disable_pause(struct scsi_qla_host *ha); 265 void qla4_83xx_enable_mbox_intrs(struct scsi_qla_host *ha); 266 int qla4_83xx_can_perform_reset(struct scsi_qla_host *ha); 267 int qla4xxx_get_default_ddb(struct scsi_qla_host *ha, uint32_t options, 269 int qla4xxx_get_uni_chap_at_index(struct scsi_qla_host *ha, char *username, 271 int qla4xxx_disable_acb(struct scsi_qla_host *ha); 272 int qla4xxx_set_acb(struct scsi_qla_host *ha, uint32_t *mbox_cmd, 274 int qla4xxx_get_acb(struct scsi_qla_host *ha, dma_addr_t acb_dma, 276 int qla4_84xx_config_acb(struct scsi_qla_host *ha, int acb_config); 277 int qla4_8xxx_ms_mem_write_128b(struct scsi_qla_host *ha, 280 int qla4_83xx_get_port_config(struct scsi_qla_host *ha, uint32_t *config); 281 int qla4_83xx_set_port_config(struct scsi_qla_host *ha, uint32_t *config); 282 int qla4_8xxx_check_init_adapter_retry(struct scsi_qla_host *ha); 283 int qla4_83xx_is_detached(struct scsi_qla_host *ha); 284 int qla4xxx_sysfs_ddb_export(struct scsi_qla_host *ha);
H A D	ql4_init.c	14 static void ql4xxx_set_mac_number(struct scsi_qla_host *ha) ql4xxx_set_mac_number() argument 21 spin_lock_irqsave(&ha->hardware_lock, flags); ql4xxx_set_mac_number() 22 value = readw(&ha->reg->ctrl_status); ql4xxx_set_mac_number() 23 spin_unlock_irqrestore(&ha->hardware_lock, flags); ql4xxx_set_mac_number() 28 ha->mac_index = 1; ql4xxx_set_mac_number() 31 ha->mac_index = 3; ql4xxx_set_mac_number() 35 "ispControlStatus = 0x%x\n", ha->host_no, ql4xxx_set_mac_number() 39 DEBUG2(printk("scsi%ld: %s: mac_index %d.\n", ha->host_no, __func__, ql4xxx_set_mac_number() 40 ha->mac_index)); ql4xxx_set_mac_number() 45 * @ha: pointer to host adapter structure. 50 void qla4xxx_free_ddb(struct scsi_qla_host *ha, qla4xxx_free_ddb() argument 54 ha->fw_ddb_index_map[ddb_entry->fw_ddb_index] = qla4xxx_free_ddb() 56 ha->tot_ddbs--; qla4xxx_free_ddb() 61 * @ha: HA context 66 static void qla4xxx_init_response_q_entries(struct scsi_qla_host *ha) qla4xxx_init_response_q_entries() argument 71 pkt = (struct response *)ha->response_ptr; qla4xxx_init_response_q_entries() 80 * @ha: pointer to host adapter structure. 86 int qla4xxx_init_rings(struct scsi_qla_host *ha) qla4xxx_init_rings() argument 92 spin_lock_irqsave(&ha->hardware_lock, flags); qla4xxx_init_rings() 93 ha->request_out = 0; qla4xxx_init_rings() 94 ha->request_in = 0; qla4xxx_init_rings() 95 ha->request_ptr = &ha->request_ring[ha->request_in]; qla4xxx_init_rings() 96 ha->req_q_count = REQUEST_QUEUE_DEPTH; qla4xxx_init_rings() 99 ha->response_in = 0; qla4xxx_init_rings() 100 ha->response_out = 0; qla4xxx_init_rings() 101 ha->response_ptr = &ha->response_ring[ha->response_out]; qla4xxx_init_rings() 103 if (is_qla8022(ha)) { qla4xxx_init_rings() 105 (unsigned long __iomem *)&ha->qla4_82xx_reg->req_q_out); qla4xxx_init_rings() 107 (unsigned long __iomem *)&ha->qla4_82xx_reg->rsp_q_in); qla4xxx_init_rings() 109 (unsigned long __iomem *)&ha->qla4_82xx_reg->rsp_q_out); qla4xxx_init_rings() 110 } else if (is_qla8032(ha) || is_qla8042(ha)) { qla4xxx_init_rings() 112 (unsigned long __iomem *)&ha->qla4_83xx_reg->req_q_in); qla4xxx_init_rings() 114 (unsigned long __iomem *)&ha->qla4_83xx_reg->rsp_q_in); qla4xxx_init_rings() 116 (unsigned long __iomem *)&ha->qla4_83xx_reg->rsp_q_out); qla4xxx_init_rings() 125 ha->shadow_regs->req_q_out = __constant_cpu_to_le32(0); qla4xxx_init_rings() 126 ha->shadow_regs->rsp_q_in = __constant_cpu_to_le32(0); qla4xxx_init_rings() 129 writel(0, &ha->reg->req_q_in); qla4xxx_init_rings() 130 writel(0, &ha->reg->rsp_q_out); qla4xxx_init_rings() 131 readl(&ha->reg->rsp_q_out); qla4xxx_init_rings() 134 qla4xxx_init_response_q_entries(ha); qla4xxx_init_rings() 138 ha->active_mrb_array[i] = NULL; qla4xxx_init_rings() 140 spin_unlock_irqrestore(&ha->hardware_lock, flags); qla4xxx_init_rings() 147 * @ha: pointer to host adapter structure. 150 int qla4xxx_get_sys_info(struct scsi_qla_host *ha) qla4xxx_get_sys_info() argument 156 sys_info = dma_alloc_coherent(&ha->pdev->dev, sizeof(*sys_info), qla4xxx_get_sys_info() 160 ha->host_no, __func__)); qla4xxx_get_sys_info() 167 if (qla4xxx_get_flash(ha, sys_info_dma, FLASH_OFFSET_SYS_INFO, qla4xxx_get_sys_info() 170 "failed\n", ha->host_no, __func__)); qla4xxx_get_sys_info() 176 memcpy(ha->my_mac, &sys_info->physAddr[0].address[0], qla4xxx_get_sys_info() 177 min(sizeof(ha->my_mac), qla4xxx_get_sys_info() 179 memcpy(ha->serial_number, &sys_info->acSerialNumber, qla4xxx_get_sys_info() 180 min(sizeof(ha->serial_number), qla4xxx_get_sys_info() 186 dma_free_coherent(&ha->pdev->dev, sizeof(*sys_info), sys_info, qla4xxx_get_sys_info() 195 * @ha: pointer to host adapter structure. 198 static void qla4xxx_init_local_data(struct scsi_qla_host *ha) qla4xxx_init_local_data() argument 201 ha->aen_q_count = MAX_AEN_ENTRIES; qla4xxx_init_local_data() 205 qla4xxx_wait_for_ip_config(struct scsi_qla_host *ha) qla4xxx_wait_for_ip_config() argument 214 if (is_ipv4_enabled(ha) && is_ipv6_enabled(ha)) { qla4xxx_wait_for_ip_config() 215 if (((ha->addl_fw_state & FW_ADDSTATE_DHCPv4_ENABLED) != 0) && qla4xxx_wait_for_ip_config() 216 ((ha->addl_fw_state & qla4xxx_wait_for_ip_config() 220 if (((ha->ip_config.ipv6_addl_options & qla4xxx_wait_for_ip_config() 222 ((ha->ip_config.ipv6_link_local_state == qla4xxx_wait_for_ip_config() 224 (ha->ip_config.ipv6_addr0_state == qla4xxx_wait_for_ip_config() 226 (ha->ip_config.ipv6_addr1_state == qla4xxx_wait_for_ip_config() 231 if ((ha->ip_config.ipv6_link_local_state == qla4xxx_wait_for_ip_config() 233 (ha->ip_config.ipv6_addr0_state == qla4xxx_wait_for_ip_config() 235 (ha->ip_config.ipv6_addr1_state == qla4xxx_wait_for_ip_config() 239 " Don't wait!\n", ha->host_no, qla4xxx_wait_for_ip_config() 243 if (memcmp(&ha->ip_config.ipv6_default_router_addr, qla4xxx_wait_for_ip_config() 247 "Don't wait!\n", ha->host_no, qla4xxx_wait_for_ip_config() 251 if ((ha->ip_config.ipv6_default_router_state == qla4xxx_wait_for_ip_config() 253 (ha->ip_config.ipv6_link_local_state == qla4xxx_wait_for_ip_config() 255 (memcmp(&ha->ip_config.ipv6_link_local_addr, qla4xxx_wait_for_ip_config() 256 &ha->ip_config.ipv6_default_router_addr, 4) == qla4xxx_wait_for_ip_config() 260 ha->host_no, __func__)); qla4xxx_wait_for_ip_config() 266 "IP(s) \"", ha->host_no, __func__)); qla4xxx_wait_for_ip_config() 269 if (ha->ip_config.ipv6_link_local_state == qla4xxx_wait_for_ip_config() 272 if (ha->ip_config.ipv6_addr0_state == qla4xxx_wait_for_ip_config() 275 if (ha->ip_config.ipv6_addr1_state == qla4xxx_wait_for_ip_config() 285 static int qla4_80xx_is_minidump_dma_capable(struct scsi_qla_host *ha, qla4_80xx_is_minidump_dma_capable() argument 288 int offset = (is_qla8022(ha)) ? QLA8022_TEMPLATE_CAP_OFFSET : qla4_80xx_is_minidump_dma_capable() 296 ql4_printk(KERN_INFO, ha, "PEX DMA Not supported %d\n", qla4_80xx_is_minidump_dma_capable() 306 * @ha: pointer to host adapter structure. 308 void qla4xxx_alloc_fw_dump(struct scsi_qla_host *ha) qla4xxx_alloc_fw_dump() argument 318 if (ha->fw_dump) { qla4xxx_alloc_fw_dump() 319 ql4_printk(KERN_WARNING, ha, qla4xxx_alloc_fw_dump() 324 status = qla4xxx_req_template_size(ha); qla4xxx_alloc_fw_dump() 326 ql4_printk(KERN_INFO, ha, qla4xxx_alloc_fw_dump() 328 ha->host_no); qla4xxx_alloc_fw_dump() 332 clear_bit(AF_82XX_FW_DUMPED, &ha->flags); qla4xxx_alloc_fw_dump() 335 md_tmp = dma_alloc_coherent(&ha->pdev->dev, ha->fw_dump_tmplt_size, qla4xxx_alloc_fw_dump() 338 ql4_printk(KERN_INFO, ha, qla4xxx_alloc_fw_dump() 340 ha->host_no); qla4xxx_alloc_fw_dump() 345 status = qla4xxx_get_minidump_template(ha, md_tmp_dma); qla4xxx_alloc_fw_dump() 347 ql4_printk(KERN_INFO, ha, qla4xxx_alloc_fw_dump() 349 ha->host_no); qla4xxx_alloc_fw_dump() 355 dma_capable = qla4_80xx_is_minidump_dma_capable(ha, md_hdr); qla4xxx_alloc_fw_dump() 362 ha->fw_dump_capture_mask = ql4xmdcapmask; qla4xxx_alloc_fw_dump() 365 ql4_printk(KERN_INFO, ha, "Falling back to default capture mask, as PEX DMA is not supported\n"); qla4xxx_alloc_fw_dump() 366 ha->fw_dump_capture_mask = capture_debug_level; qla4xxx_alloc_fw_dump() 369 md_hdr->driver_capture_mask = ha->fw_dump_capture_mask; qla4xxx_alloc_fw_dump() 371 DEBUG2(ql4_printk(KERN_INFO, ha, "Minimum num of entries = %d\n", qla4xxx_alloc_fw_dump() 373 DEBUG2(ql4_printk(KERN_INFO, ha, "Dump template size = %d\n", qla4xxx_alloc_fw_dump() 374 ha->fw_dump_tmplt_size)); qla4xxx_alloc_fw_dump() 375 DEBUG2(ql4_printk(KERN_INFO, ha, "Selected Capture mask =0x%x\n", qla4xxx_alloc_fw_dump() 376 ha->fw_dump_capture_mask)); qla4xxx_alloc_fw_dump() 381 if (hdr_entry_bit & ha->fw_dump_capture_mask) qla4xxx_alloc_fw_dump() 382 ha->fw_dump_size += md_hdr->capture_size_array[k]; qla4xxx_alloc_fw_dump() 386 ha->fw_dump_size += ha->fw_dump_tmplt_size; qla4xxx_alloc_fw_dump() 387 ha->fw_dump = vmalloc(ha->fw_dump_size); qla4xxx_alloc_fw_dump() 388 if (!ha->fw_dump) qla4xxx_alloc_fw_dump() 391 DEBUG2(ql4_printk(KERN_INFO, ha, qla4xxx_alloc_fw_dump() 393 ha->fw_dump_tmplt_size)); qla4xxx_alloc_fw_dump() 394 DEBUG2(ql4_printk(KERN_INFO, ha, qla4xxx_alloc_fw_dump() 395 "Total Minidump size = 0x%x KB\n", ha->fw_dump_size)); qla4xxx_alloc_fw_dump() 397 memcpy(ha->fw_dump, md_tmp, ha->fw_dump_tmplt_size); qla4xxx_alloc_fw_dump() 398 ha->fw_dump_tmplt_hdr = ha->fw_dump; qla4xxx_alloc_fw_dump() 401 dma_free_coherent(&ha->pdev->dev, ha->fw_dump_tmplt_size, qla4xxx_alloc_fw_dump() 405 static int qla4xxx_fw_ready(struct scsi_qla_host *ha) qla4xxx_fw_ready() argument 410 DEBUG2(ql4_printk(KERN_INFO, ha, "Waiting for Firmware Ready..\n")); qla4xxx_fw_ready() 413 if (test_and_clear_bit(DPC_GET_DHCP_IP_ADDR, &ha->dpc_flags)) qla4xxx_fw_ready() 414 qla4xxx_get_dhcp_ip_address(ha); qla4xxx_fw_ready() 417 if (qla4xxx_get_firmware_state(ha) != QLA_SUCCESS) { qla4xxx_fw_ready() 419 "state\n", ha->host_no, __func__)); qla4xxx_fw_ready() 423 if (ha->firmware_state & FW_STATE_ERROR) { qla4xxx_fw_ready() 425 " occurred\n", ha->host_no, __func__)); qla4xxx_fw_ready() 429 if (ha->firmware_state & FW_STATE_CONFIG_WAIT) { qla4xxx_fw_ready() 434 if (qla4xxx_initialize_fw_cb(ha) == QLA_ERROR) qla4xxx_fw_ready() 441 if (ha->firmware_state & FW_STATE_WAIT_AUTOCONNECT) { qla4xxx_fw_ready() 444 ha->host_no, __func__)); qla4xxx_fw_ready() 447 if (ha->firmware_state & FW_STATE_CONFIGURING_IP) { qla4xxx_fw_ready() 450 ha->host_no, __func__)); qla4xxx_fw_ready() 459 if (ha->addl_fw_state & FW_ADDSTATE_LINK_UP) { qla4xxx_fw_ready() 462 ha->host_no, __func__)); qla4xxx_fw_ready() 463 } else if (ha->firmware_state & qla4xxx_fw_ready() 468 ha->host_no, __func__)); qla4xxx_fw_ready() 469 ha->firmware_state = FW_STATE_READY; qla4xxx_fw_ready() 474 if (ha->firmware_state == FW_STATE_READY) { qla4xxx_fw_ready() 477 &ha->dpc_flags)) qla4xxx_fw_ready() 478 qla4xxx_get_dhcp_ip_address(ha); qla4xxx_fw_ready() 480 if (!qla4xxx_wait_for_ip_config(ha) || qla4xxx_fw_ready() 482 DEBUG2(ql4_printk(KERN_INFO, ha, qla4xxx_fw_ready() 486 DEBUG2(ql4_printk(KERN_INFO, ha, qla4xxx_fw_ready() 488 " - %s\n", ha->host_no, qla4xxx_fw_ready() 489 __func__, (ha->addl_fw_state & qla4xxx_fw_ready() 492 DEBUG2(ql4_printk(KERN_INFO, ha, qla4xxx_fw_ready() 494 " Enabled %s\n", ha->host_no, qla4xxx_fw_ready() 495 __func__, (ha->addl_fw_state & qla4xxx_fw_ready() 498 DEBUG2(ql4_printk(KERN_INFO, ha, qla4xxx_fw_ready() 500 ha->host_no, __func__, qla4xxx_fw_ready() 501 (ha->addl_fw_state & qla4xxx_fw_ready() 504 DEBUG2(ql4_printk(KERN_INFO, ha, qla4xxx_fw_ready() 507 ha->host_no, __func__, qla4xxx_fw_ready() 508 (ha->addl_fw_state & qla4xxx_fw_ready() 517 "seconds expired= %d\n", ha->host_no, __func__, qla4xxx_fw_ready() 518 ha->firmware_state, ha->addl_fw_state, qla4xxx_fw_ready() 520 if (is_qla4032(ha) && qla4xxx_fw_ready() 521 !(ha->addl_fw_state & FW_ADDSTATE_LINK_UP) && qla4xxx_fw_ready() 531 ha->host_no, __func__)); qla4xxx_fw_ready() 533 if (ha->firmware_state & FW_STATE_CONFIGURING_IP) { qla4xxx_fw_ready() 536 ha->host_no, __func__)); qla4xxx_fw_ready() 538 } else if (ha->firmware_state & FW_STATE_WAIT_AUTOCONNECT) { qla4xxx_fw_ready() 541 ha->host_no, __func__)); qla4xxx_fw_ready() 550 * @ha: pointer to host adapter structure. 553 static int qla4xxx_init_firmware(struct scsi_qla_host *ha) qla4xxx_init_firmware() argument 557 if (is_aer_supported(ha) && qla4xxx_init_firmware() 558 test_bit(AF_PCI_CHANNEL_IO_PERM_FAILURE, &ha->flags)) qla4xxx_init_firmware() 564 if (is_qla80XX(ha)) qla4xxx_init_firmware() 565 qla4_8xxx_stop_firmware(ha); qla4xxx_init_firmware() 567 ql4_printk(KERN_INFO, ha, "Initializing firmware..\n"); qla4xxx_init_firmware() 568 if (qla4xxx_initialize_fw_cb(ha) == QLA_ERROR) { qla4xxx_init_firmware() 570 "control block\n", ha->host_no, __func__)); qla4xxx_init_firmware() 574 if (!qla4xxx_fw_ready(ha)) qla4xxx_init_firmware() 577 if (is_qla80XX(ha) && !test_bit(AF_INIT_DONE, &ha->flags)) qla4xxx_init_firmware() 578 qla4xxx_alloc_fw_dump(ha); qla4xxx_init_firmware() 580 return qla4xxx_get_firmware_status(ha); qla4xxx_init_firmware() 583 static void qla4xxx_set_model_info(struct scsi_qla_host *ha) qla4xxx_set_model_info() argument 587 int size = sizeof(ha->nvram->isp4022.boardIdStr); qla4xxx_set_model_info() 591 board_id_string[i] = rd_nvram_word(ha, offset); qla4xxx_set_model_info() 595 memcpy(ha->model_name, board_id_string, size); qla4xxx_set_model_info() 598 static int qla4xxx_config_nvram(struct scsi_qla_host *ha) qla4xxx_config_nvram() argument 603 DEBUG2(printk("scsi%ld: %s: Get EEProm parameters \n", ha->host_no, qla4xxx_config_nvram() 605 if (ql4xxx_lock_flash(ha) != QLA_SUCCESS) qla4xxx_config_nvram() 607 if (ql4xxx_lock_nvram(ha) != QLA_SUCCESS) { qla4xxx_config_nvram() 608 ql4xxx_unlock_flash(ha); qla4xxx_config_nvram() 613 ql4_printk(KERN_INFO, ha, "Configuring NVRAM ...\n"); qla4xxx_config_nvram() 614 if (qla4xxx_is_nvram_configuration_valid(ha) == QLA_SUCCESS) { qla4xxx_config_nvram() 615 spin_lock_irqsave(&ha->hardware_lock, flags); qla4xxx_config_nvram() 617 rd_nvram_word(ha, eeprom_ext_hw_conf_offset(ha)); qla4xxx_config_nvram() 618 spin_unlock_irqrestore(&ha->hardware_lock, flags); qla4xxx_config_nvram() 620 ql4_printk(KERN_WARNING, ha, qla4xxx_config_nvram() 622 "Please update your EEPROM\n", ha->host_no, qla4xxx_config_nvram() 626 if (is_qla4010(ha)) qla4xxx_config_nvram() 628 else if (is_qla4022(ha) | is_qla4032(ha)) qla4xxx_config_nvram() 634 if (is_qla4022(ha) || is_qla4032(ha)) qla4xxx_config_nvram() 635 qla4xxx_set_model_info(ha); qla4xxx_config_nvram() 637 strcpy(ha->model_name, "QLA4010"); qla4xxx_config_nvram() 640 ha->host_no, __func__, extHwConfig.Asuint32_t)); qla4xxx_config_nvram() 642 spin_lock_irqsave(&ha->hardware_lock, flags); qla4xxx_config_nvram() 643 writel((0xFFFF << 16) | extHwConfig.Asuint32_t, isp_ext_hw_conf(ha)); qla4xxx_config_nvram() 644 readl(isp_ext_hw_conf(ha)); qla4xxx_config_nvram() 645 spin_unlock_irqrestore(&ha->hardware_lock, flags); qla4xxx_config_nvram() 647 ql4xxx_unlock_nvram(ha); qla4xxx_config_nvram() 648 ql4xxx_unlock_flash(ha); qla4xxx_config_nvram() 655 * @ha: HA context 657 void qla4_8xxx_pci_config(struct scsi_qla_host *ha) qla4_8xxx_pci_config() argument 659 pci_set_master(ha->pdev); qla4_8xxx_pci_config() 662 void qla4xxx_pci_config(struct scsi_qla_host *ha) qla4xxx_pci_config() argument 667 ql4_printk(KERN_INFO, ha, "Configuring PCI space...\n"); qla4xxx_pci_config() 669 pci_set_master(ha->pdev); qla4xxx_pci_config() 670 status = pci_set_mwi(ha->pdev); qla4xxx_pci_config() 676 pci_read_config_word(ha->pdev, PCI_COMMAND, &w); qla4xxx_pci_config() 679 pci_write_config_word(ha->pdev, PCI_COMMAND, w); qla4xxx_pci_config() 682 static int qla4xxx_start_firmware_from_flash(struct scsi_qla_host *ha) qla4xxx_start_firmware_from_flash() argument 689 ql4_printk(KERN_INFO, ha, "Starting firmware ...\n"); qla4xxx_start_firmware_from_flash() 701 ha->host_no, __func__)); qla4xxx_start_firmware_from_flash() 703 spin_lock_irqsave(&ha->hardware_lock, flags); qla4xxx_start_firmware_from_flash() 704 writel(jiffies, &ha->reg->mailbox[7]); qla4xxx_start_firmware_from_flash() 705 if (is_qla4022(ha) | is_qla4032(ha)) qla4xxx_start_firmware_from_flash() 707 &ha->reg->u1.isp4022.nvram); qla4xxx_start_firmware_from_flash() 709 writel(2, &ha->reg->mailbox[6]); qla4xxx_start_firmware_from_flash() 710 readl(&ha->reg->mailbox[6]); qla4xxx_start_firmware_from_flash() 712 writel(set_rmask(CSR_BOOT_ENABLE), &ha->reg->ctrl_status); qla4xxx_start_firmware_from_flash() 713 readl(&ha->reg->ctrl_status); qla4xxx_start_firmware_from_flash() 714 spin_unlock_irqrestore(&ha->hardware_lock, flags); qla4xxx_start_firmware_from_flash() 719 ha->host_no, __func__, FIRMWARE_UP_TOV)); qla4xxx_start_firmware_from_flash() 724 spin_lock_irqsave(&ha->hardware_lock, flags); qla4xxx_start_firmware_from_flash() 725 ctrl_status = readw(&ha->reg->ctrl_status); qla4xxx_start_firmware_from_flash() 726 mbox_status = readw(&ha->reg->mailbox[0]); qla4xxx_start_firmware_from_flash() 727 spin_unlock_irqrestore(&ha->hardware_lock, flags); qla4xxx_start_firmware_from_flash() 736 ha->host_no, __func__, ctrl_status, max_wait_time)); qla4xxx_start_firmware_from_flash() 743 ha->host_no, __func__)); qla4xxx_start_firmware_from_flash() 745 spin_lock_irqsave(&ha->hardware_lock, flags); qla4xxx_start_firmware_from_flash() 747 &ha->reg->ctrl_status); qla4xxx_start_firmware_from_flash() 748 readl(&ha->reg->ctrl_status); qla4xxx_start_firmware_from_flash() 749 spin_unlock_irqrestore(&ha->hardware_lock, flags); qla4xxx_start_firmware_from_flash() 754 "- mbox status 0x%x\n", ha->host_no, __func__, qla4xxx_start_firmware_from_flash() 788 * @ha: Pointer to host adapter structure. 793 int qla4xxx_start_firmware(struct scsi_qla_host *ha) qla4xxx_start_firmware() argument 801 if (is_qla4022(ha) | is_qla4032(ha)) qla4xxx_start_firmware() 802 ql4xxx_set_mac_number(ha); qla4xxx_start_firmware() 804 if (ql4xxx_lock_drvr_wait(ha) != QLA_SUCCESS) qla4xxx_start_firmware() 807 spin_lock_irqsave(&ha->hardware_lock, flags); qla4xxx_start_firmware() 809 DEBUG2(printk("scsi%ld: %s: port_ctrl = 0x%08X\n", ha->host_no, qla4xxx_start_firmware() 810 __func__, readw(isp_port_ctrl(ha)))); qla4xxx_start_firmware() 811 DEBUG(printk("scsi%ld: %s: port_status = 0x%08X\n", ha->host_no, qla4xxx_start_firmware() 812 __func__, readw(isp_port_status(ha)))); qla4xxx_start_firmware() 815 if ((readw(isp_port_ctrl(ha)) & 0x8000) != 0) { qla4xxx_start_firmware() 817 "initialized\n", ha->host_no, __func__)); qla4xxx_start_firmware() 820 mbox_status = readw(&ha->reg->mailbox[0]); qla4xxx_start_firmware() 823 "0x%x\n", ha->host_no, __func__, mbox_status)); qla4xxx_start_firmware() 832 &ha->reg->ctrl_status); qla4xxx_start_firmware() 833 readl(&ha->reg->ctrl_status); qla4xxx_start_firmware() 835 &ha->reg->ctrl_status); qla4xxx_start_firmware() 836 readl(&ha->reg->ctrl_status); qla4xxx_start_firmware() 837 spin_unlock_irqrestore(&ha->hardware_lock, flags); qla4xxx_start_firmware() 838 if (qla4xxx_get_firmware_state(ha) == QLA_SUCCESS) { qla4xxx_start_firmware() 841 ha->host_no, qla4xxx_start_firmware() 842 __func__, ha->firmware_state)); qla4xxx_start_firmware() 844 if (ha->firmware_state & qla4xxx_start_firmware() 850 ha->host_no, __func__, qla4xxx_start_firmware() 851 ha->firmware_state)); qla4xxx_start_firmware() 859 "0x%x\n", ha->host_no, __func__, qla4xxx_start_firmware() 860 ha->firmware_state)); qla4xxx_start_firmware() 862 spin_lock_irqsave(&ha->hardware_lock, flags); qla4xxx_start_firmware() 866 "started - resetting\n", ha->host_no, __func__)); qla4xxx_start_firmware() 868 spin_unlock_irqrestore(&ha->hardware_lock, flags); qla4xxx_start_firmware() 871 ha->host_no, __func__, soft_reset, config_chip)); qla4xxx_start_firmware() 873 DEBUG(printk("scsi%ld: %s: Issue Soft Reset\n", ha->host_no, qla4xxx_start_firmware() 875 status = qla4xxx_soft_reset(ha); /* NOTE: acquires drvr qla4xxx_start_firmware() 879 ha->host_no, __func__)); qla4xxx_start_firmware() 880 ql4xxx_unlock_drvr(ha); qla4xxx_start_firmware() 886 if (ql4xxx_lock_drvr_wait(ha) != QLA_SUCCESS) qla4xxx_start_firmware() 891 if ((status = qla4xxx_config_nvram(ha)) == QLA_SUCCESS) qla4xxx_start_firmware() 892 status = qla4xxx_start_firmware_from_flash(ha); qla4xxx_start_firmware() 895 ql4xxx_unlock_drvr(ha); qla4xxx_start_firmware() 897 if (test_and_clear_bit(AF_GET_CRASH_RECORD, &ha->flags)) qla4xxx_start_firmware() 898 qla4xxx_get_crash_record(ha); qla4xxx_start_firmware() 900 qla4xxx_init_rings(ha); qla4xxx_start_firmware() 903 ha->host_no, __func__)); qla4xxx_start_firmware() 909 * @ha: pointer to adapter structure 915 void qla4xxx_free_ddb_index(struct scsi_qla_host *ha) qla4xxx_free_ddb_index() argument 922 max_ddbs = is_qla40XX(ha) ? MAX_DEV_DB_ENTRIES_40XX : qla4xxx_free_ddb_index() 926 ret = qla4xxx_get_fwddb_entry(ha, idx, NULL, 0, NULL, qla4xxx_free_ddb_index() 935 DEBUG2(ql4_printk(KERN_INFO, ha, qla4xxx_free_ddb_index() 937 ret = qla4xxx_clear_ddb_entry(ha, idx); qla4xxx_free_ddb_index() 939 ql4_printk(KERN_ERR, ha, qla4xxx_free_ddb_index() 950 * @ha: Pointer to host adapter structure. 955 int qla4xxx_initialize_adapter(struct scsi_qla_host *ha, int is_reset) qla4xxx_initialize_adapter() argument 959 ha->eeprom_cmd_data = 0; qla4xxx_initialize_adapter() 961 ql4_printk(KERN_INFO, ha, "Configuring PCI space...\n"); qla4xxx_initialize_adapter() 962 ha->isp_ops->pci_config(ha); qla4xxx_initialize_adapter() 964 ha->isp_ops->disable_intrs(ha); qla4xxx_initialize_adapter() 967 if (ha->isp_ops->start_firmware(ha) == QLA_ERROR) qla4xxx_initialize_adapter() 977 if (is_qla8032(ha) || is_qla8042(ha)) qla4xxx_initialize_adapter() 978 qla4_83xx_enable_mbox_intrs(ha); qla4xxx_initialize_adapter() 980 if (qla4xxx_about_firmware(ha) == QLA_ERROR) qla4xxx_initialize_adapter() 983 if (ha->isp_ops->get_sys_info(ha) == QLA_ERROR) qla4xxx_initialize_adapter() 986 qla4xxx_init_local_data(ha); qla4xxx_initialize_adapter() 988 status = qla4xxx_init_firmware(ha); qla4xxx_initialize_adapter() 993 qla4xxx_build_ddb_list(ha, is_reset); qla4xxx_initialize_adapter() 995 set_bit(AF_ONLINE, &ha->flags); qla4xxx_initialize_adapter() 998 DEBUG2(printk("scsi%ld: initialize adapter: %s\n", ha->host_no, qla4xxx_initialize_adapter() 1003 int qla4xxx_ddb_change(struct scsi_qla_host *ha, uint32_t fw_ddb_index, qla4xxx_ddb_change() argument 1010 DEBUG2(ql4_printk(KERN_INFO, ha, qla4xxx_ddb_change() 1022 qla4xxx_update_session_conn_param(ha, ddb_entry); qla4xxx_ddb_change() 1048 clear_bit(fw_ddb_index, ha->ddb_idx_map); qla4xxx_ddb_change() 1058 qla4xxx_update_session_conn_param(ha, ddb_entry); qla4xxx_ddb_change() 1069 DEBUG2(ql4_printk(KERN_INFO, ha, "%s: Unknown Event\n", qla4xxx_ddb_change() 1097 int qla4xxx_flash_ddb_change(struct scsi_qla_host *ha, uint32_t fw_ddb_index, qla4xxx_flash_ddb_change() argument 1104 DEBUG2(ql4_printk(KERN_INFO, ha, qla4xxx_flash_ddb_change() 1117 qla4xxx_update_session_conn_fwddb_param(ha, ddb_entry); qla4xxx_flash_ddb_change() 1142 qla4xxx_update_session_conn_fwddb_param(ha, ddb_entry); qla4xxx_flash_ddb_change() 1153 DEBUG2(ql4_printk(KERN_INFO, ha, "%s: Unknown Event\n", qla4xxx_flash_ddb_change() 1162 * @ha - Pointer to host adapter structure. 1168 int qla4xxx_process_ddb_changed(struct scsi_qla_host *ha, qla4xxx_process_ddb_changed() argument 1180 ddb_entry = qla4xxx_lookup_ddb_by_fw_index(ha, fw_ddb_index); qla4xxx_process_ddb_changed() 1183 ql4_printk(KERN_ERR, ha, "%s: No ddb_entry at FW index [%d]\n", qla4xxx_process_ddb_changed() 1187 clear_bit(fw_ddb_index, ha->ddb_idx_map); qla4xxx_process_ddb_changed() 1192 ddb_entry->ddb_change(ha, fw_ddb_index, ddb_entry, state); qla4xxx_process_ddb_changed() 1209 struct scsi_qla_host *ha; qla4xxx_login_flash_ddb() local 1217 ha = ddb_entry->ha; qla4xxx_login_flash_ddb() 1219 if (!test_bit(AF_LINK_UP, &ha->flags)) qla4xxx_login_flash_ddb() 1223 DEBUG2(ql4_printk(KERN_INFO, ha, qla4xxx_login_flash_ddb() 1228 fw_ddb_entry = dma_pool_alloc(ha->fw_ddb_dma_pool, GFP_KERNEL, qla4xxx_login_flash_ddb() 1231 DEBUG2(ql4_printk(KERN_ERR, ha, "Out of memory\n")); qla4xxx_login_flash_ddb() 1236 ret = qla4xxx_get_ddb_index(ha, &ddb_entry->fw_ddb_index); qla4xxx_login_flash_ddb() 1240 ha->fw_ddb_index_map[ddb_entry->fw_ddb_index] = ddb_entry; qla4xxx_login_flash_ddb() 1241 ha->tot_ddbs++; qla4xxx_login_flash_ddb() 1248 ret = qla4xxx_set_ddb_entry(ha, ddb_entry->fw_ddb_index, qla4xxx_login_flash_ddb() 1251 DEBUG2(ql4_printk(KERN_ERR, ha, "Set DDB failed\n")); qla4xxx_login_flash_ddb() 1256 ret = qla4xxx_conn_open(ha, ddb_entry->fw_ddb_index); qla4xxx_login_flash_ddb() 1258 ql4_printk(KERN_ERR, ha, "%s: Login failed: %s\n", __func__, qla4xxx_login_flash_ddb() 1265 dma_pool_free(ha->fw_ddb_dma_pool, fw_ddb_entry, fw_ddb_dma); qla4xxx_login_flash_ddb()
H A D	ql4_attr.c	17 struct scsi_qla_host *ha = to_qla_host(dev_to_shost(container_of(kobj, qla4_8xxx_sysfs_read_fw_dump() local 20 if (is_qla40XX(ha)) qla4_8xxx_sysfs_read_fw_dump() 23 if (!test_bit(AF_82XX_DUMP_READING, &ha->flags)) qla4_8xxx_sysfs_read_fw_dump() 26 return memory_read_from_buffer(buf, count, &off, ha->fw_dump, qla4_8xxx_sysfs_read_fw_dump() 27 ha->fw_dump_size); qla4_8xxx_sysfs_read_fw_dump() 35 struct scsi_qla_host *ha = to_qla_host(dev_to_shost(container_of(kobj, qla4_8xxx_sysfs_write_fw_dump() local 41 if (is_qla40XX(ha)) qla4_8xxx_sysfs_write_fw_dump() 50 ql4_printk(KERN_ERR, ha, "%s: Invalid input. Return err %d\n", qla4_8xxx_sysfs_write_fw_dump() 58 if (test_and_clear_bit(AF_82XX_DUMP_READING, &ha->flags)) { qla4_8xxx_sysfs_write_fw_dump() 59 clear_bit(AF_82XX_FW_DUMPED, &ha->flags); qla4_8xxx_sysfs_write_fw_dump() 61 qla4xxx_alloc_fw_dump(ha); qla4_8xxx_sysfs_write_fw_dump() 62 DEBUG2(ql4_printk(KERN_INFO, ha, qla4_8xxx_sysfs_write_fw_dump() 68 if (test_bit(AF_82XX_FW_DUMPED, &ha->flags) && qla4_8xxx_sysfs_write_fw_dump() 69 !test_bit(AF_82XX_DUMP_READING, &ha->flags)) { qla4_8xxx_sysfs_write_fw_dump() 70 set_bit(AF_82XX_DUMP_READING, &ha->flags); qla4_8xxx_sysfs_write_fw_dump() 71 DEBUG2(ql4_printk(KERN_INFO, ha, qla4_8xxx_sysfs_write_fw_dump() 73 ha->host_no)); qla4_8xxx_sysfs_write_fw_dump() 78 ha->isp_ops->idc_lock(ha); qla4_8xxx_sysfs_write_fw_dump() 79 dev_state = qla4_8xxx_rd_direct(ha, QLA8XXX_CRB_DEV_STATE); qla4_8xxx_sysfs_write_fw_dump() 81 ql4_printk(KERN_INFO, ha, "%s: Setting Need reset\n", qla4_8xxx_sysfs_write_fw_dump() 83 qla4_8xxx_wr_direct(ha, QLA8XXX_CRB_DEV_STATE, qla4_8xxx_sysfs_write_fw_dump() 85 if (is_qla8022(ha) || qla4_8xxx_sysfs_write_fw_dump() 86 ((is_qla8032(ha) || is_qla8042(ha)) && qla4_8xxx_sysfs_write_fw_dump() 87 qla4_83xx_can_perform_reset(ha))) { qla4_8xxx_sysfs_write_fw_dump() 88 set_bit(AF_8XXX_RST_OWNER, &ha->flags); qla4_8xxx_sysfs_write_fw_dump() 89 set_bit(AF_FW_RECOVERY, &ha->flags); qla4_8xxx_sysfs_write_fw_dump() 90 ql4_printk(KERN_INFO, ha, "%s: Reset owner is 0x%x\n", qla4_8xxx_sysfs_write_fw_dump() 91 __func__, ha->func_num); qla4_8xxx_sysfs_write_fw_dump() 94 ql4_printk(KERN_INFO, ha, qla4_8xxx_sysfs_write_fw_dump() 98 ha->isp_ops->idc_unlock(ha); qla4_8xxx_sysfs_write_fw_dump() 126 void qla4_8xxx_alloc_sysfs_attr(struct scsi_qla_host *ha) qla4_8xxx_alloc_sysfs_attr() argument 128 struct Scsi_Host *host = ha->host; qla4_8xxx_alloc_sysfs_attr() 136 ql4_printk(KERN_ERR, ha, qla4_8xxx_alloc_sysfs_attr() 142 void qla4_8xxx_free_sysfs_attr(struct scsi_qla_host *ha) qla4_8xxx_free_sysfs_attr() argument 144 struct Scsi_Host *host = ha->host; qla4_8xxx_free_sysfs_attr() 157 struct scsi_qla_host *ha = to_qla_host(class_to_shost(dev)); qla4xxx_fw_version_show() local 159 if (is_qla80XX(ha)) qla4xxx_fw_version_show() 161 ha->fw_info.fw_major, ha->fw_info.fw_minor, qla4xxx_fw_version_show() 162 ha->fw_info.fw_patch, ha->fw_info.fw_build); qla4xxx_fw_version_show() 165 ha->fw_info.fw_major, ha->fw_info.fw_minor, qla4xxx_fw_version_show() 166 ha->fw_info.fw_patch, ha->fw_info.fw_build); qla4xxx_fw_version_show() 173 struct scsi_qla_host *ha = to_qla_host(class_to_shost(dev)); qla4xxx_serial_num_show() local 174 return snprintf(buf, PAGE_SIZE, "%s\n", ha->serial_number); qla4xxx_serial_num_show() 181 struct scsi_qla_host *ha = to_qla_host(class_to_shost(dev)); qla4xxx_iscsi_version_show() local 182 return snprintf(buf, PAGE_SIZE, "%d.%02d\n", ha->fw_info.iscsi_major, qla4xxx_iscsi_version_show() 183 ha->fw_info.iscsi_minor); qla4xxx_iscsi_version_show() 190 struct scsi_qla_host *ha = to_qla_host(class_to_shost(dev)); qla4xxx_optrom_version_show() local 192 ha->fw_info.bootload_major, ha->fw_info.bootload_minor, qla4xxx_optrom_version_show() 193 ha->fw_info.bootload_patch, ha->fw_info.bootload_build); qla4xxx_optrom_version_show() 200 struct scsi_qla_host *ha = to_qla_host(class_to_shost(dev)); qla4xxx_board_id_show() local 201 return snprintf(buf, PAGE_SIZE, "0x%08X\n", ha->board_id); qla4xxx_board_id_show() 208 struct scsi_qla_host *ha = to_qla_host(class_to_shost(dev)); qla4xxx_fw_state_show() local 210 qla4xxx_get_firmware_state(ha); qla4xxx_fw_state_show() 211 return snprintf(buf, PAGE_SIZE, "0x%08X%8X\n", ha->firmware_state, qla4xxx_fw_state_show() 212 ha->addl_fw_state); qla4xxx_fw_state_show() 219 struct scsi_qla_host *ha = to_qla_host(class_to_shost(dev)); qla4xxx_phy_port_cnt_show() local 221 if (is_qla40XX(ha)) qla4xxx_phy_port_cnt_show() 224 return snprintf(buf, PAGE_SIZE, "0x%04X\n", ha->phy_port_cnt); qla4xxx_phy_port_cnt_show() 231 struct scsi_qla_host *ha = to_qla_host(class_to_shost(dev)); qla4xxx_phy_port_num_show() local 233 if (is_qla40XX(ha)) qla4xxx_phy_port_num_show() 236 return snprintf(buf, PAGE_SIZE, "0x%04X\n", ha->phy_port_num); qla4xxx_phy_port_num_show() 243 struct scsi_qla_host *ha = to_qla_host(class_to_shost(dev)); qla4xxx_iscsi_func_cnt_show() local 245 if (is_qla40XX(ha)) qla4xxx_iscsi_func_cnt_show() 248 return snprintf(buf, PAGE_SIZE, "0x%04X\n", ha->iscsi_pci_func_cnt); qla4xxx_iscsi_func_cnt_show() 255 struct scsi_qla_host *ha = to_qla_host(class_to_shost(dev)); qla4xxx_hba_model_show() local 257 return snprintf(buf, PAGE_SIZE, "%s\n", ha->model_name); qla4xxx_hba_model_show() 264 struct scsi_qla_host *ha = to_qla_host(class_to_shost(dev)); qla4xxx_fw_timestamp_show() local 265 return snprintf(buf, PAGE_SIZE, "%s %s\n", ha->fw_info.fw_build_date, qla4xxx_fw_timestamp_show() 266 ha->fw_info.fw_build_time); qla4xxx_fw_timestamp_show() 273 struct scsi_qla_host *ha = to_qla_host(class_to_shost(dev)); qla4xxx_fw_build_user_show() local 274 return snprintf(buf, PAGE_SIZE, "%s\n", ha->fw_info.fw_build_user); qla4xxx_fw_build_user_show() 281 struct scsi_qla_host *ha = to_qla_host(class_to_shost(dev)); qla4xxx_fw_ext_timestamp_show() local 282 return snprintf(buf, PAGE_SIZE, "%s\n", ha->fw_info.extended_timestamp); qla4xxx_fw_ext_timestamp_show() 289 struct scsi_qla_host *ha = to_qla_host(class_to_shost(dev)); qla4xxx_fw_load_src_show() local 292 switch (ha->fw_info.fw_load_source) { qla4xxx_fw_load_src_show() 311 struct scsi_qla_host *ha = to_qla_host(class_to_shost(dev)); qla4xxx_fw_uptime_show() local 312 qla4xxx_about_firmware(ha); qla4xxx_fw_uptime_show() 313 return snprintf(buf, PAGE_SIZE, "%u.%u secs\n", ha->fw_uptime_secs, qla4xxx_fw_uptime_show() 314 ha->fw_uptime_msecs); qla4xxx_fw_uptime_show()
H A D	ql4_isr.c	15 * @ha: Pointer to host adapter structure. 19 static void qla4xxx_copy_sense(struct scsi_qla_host *ha, qla4xxx_copy_sense() argument 29 DEBUG2(ql4_printk(KERN_INFO, ha, "scsi%ld:%d:%d:%llu: %s:" qla4xxx_copy_sense() 30 " sense len 0\n", ha->host_no, qla4xxx_copy_sense() 33 ha->status_srb = NULL; qla4xxx_copy_sense() 47 "ASL= %02x, ASC/ASCQ = %02x/%02x\n", ha->host_no, qla4xxx_copy_sense() 62 ha->status_srb = srb; qla4xxx_copy_sense() 64 ha->status_srb = NULL; qla4xxx_copy_sense() 69 * @ha: SCSI driver HA context 75 qla4xxx_status_cont_entry(struct scsi_qla_host *ha, qla4xxx_status_cont_entry() argument 78 struct srb *srb = ha->status_srb; qla4xxx_status_cont_entry() 88 "back to OS srb=%p srb->state:%d\n", ha->host_no, qla4xxx_status_cont_entry() 90 ha->status_srb = NULL; qla4xxx_status_cont_entry() 106 ha->status_srb = NULL; qla4xxx_status_cont_entry() 112 * @ha: Pointer to host adapter structure. 115 static void qla4xxx_status_entry(struct scsi_qla_host *ha, qla4xxx_status_entry() argument 124 srb = qla4xxx_del_from_active_array(ha, le32_to_cpu(sts_entry->handle)); qla4xxx_status_entry() 126 ql4_printk(KERN_WARNING, ha, "%s invalid status entry: " qla4xxx_status_entry() 129 if (is_qla80XX(ha)) qla4xxx_status_entry() 130 set_bit(DPC_RESET_HA_FW_CONTEXT, &ha->dpc_flags); qla4xxx_status_entry() 132 set_bit(DPC_RESET_HA, &ha->dpc_flags); qla4xxx_status_entry() 140 ha->host_no, __func__, sts_entry->handle, qla4xxx_status_entry() 142 ql4_printk(KERN_WARNING, ha, "Command is NULL:" qla4xxx_status_entry() 175 "residual = 0x%x\n", ha->host_no, qla4xxx_status_entry() 190 qla4xxx_copy_sense(ha, sts_entry, srb); qla4xxx_status_entry() 201 ha->host_no, cmd->device->channel, qla4xxx_status_entry() 209 ha->host_no, cmd->device->channel, qla4xxx_status_entry() 217 ha->host_no, cmd->device->channel, qla4xxx_status_entry() 236 ha->host_no, qla4xxx_status_entry() 261 DEBUG2(ql4_printk(KERN_INFO, ha, qla4xxx_status_entry() 263 ha->host_no, qla4xxx_status_entry() 293 DEBUG2(ql4_printk(KERN_INFO, ha, qla4xxx_status_entry() 295 ha->host_no, qla4xxx_status_entry() 310 qla4xxx_copy_sense(ha, sts_entry, srb); qla4xxx_status_entry() 317 "state: 0x%x\n", ha->host_no, qla4xxx_status_entry() 338 " iResp=%02x\n", ha->host_no, cmd->device->id, qla4xxx_status_entry() 355 if (ha->status_srb == NULL) qla4xxx_status_entry() 361 * @ha: Pointer to host adapter structure. 364 static void qla4xxx_passthru_status_entry(struct scsi_qla_host *ha, qla4xxx_passthru_status_entry() argument 378 ddb_entry = qla4xxx_lookup_ddb_by_fw_index(ha, fw_ddb_index); qla4xxx_passthru_status_entry() 381 ql4_printk(KERN_ERR, ha, "%s: Invalid target index = 0x%x\n", qla4xxx_passthru_status_entry() 393 ql4_printk(KERN_ERR, ha, "%s: Task is NULL\n", __func__); qla4xxx_passthru_status_entry() 399 ha->iocb_cnt -= task_data->iocb_req_cnt; qla4xxx_passthru_status_entry() 400 queue_work(ha->task_wq, &task_data->task_work); qla4xxx_passthru_status_entry() 403 static struct mrb *qla4xxx_del_mrb_from_active_array(struct scsi_qla_host *ha, qla4xxx_del_mrb_from_active_array() argument 412 mrb = ha->active_mrb_array[index]; qla4xxx_del_mrb_from_active_array() 413 ha->active_mrb_array[index] = NULL; qla4xxx_del_mrb_from_active_array() 418 ha->iocb_cnt -= mrb->iocb_cnt; qla4xxx_del_mrb_from_active_array() 423 static void qla4xxx_mbox_status_entry(struct scsi_qla_host *ha, qla4xxx_mbox_status_entry() argument 430 mrb = qla4xxx_del_mrb_from_active_array(ha, qla4xxx_mbox_status_entry() 434 ql4_printk(KERN_WARNING, ha, "%s: mrb[%d] is null\n", __func__, qla4xxx_mbox_status_entry() 441 DEBUG2(ql4_printk(KERN_INFO, ha, "%s: mbox_cmd = 0x%x, " qla4xxx_mbox_status_entry() 454 qla4xxx_post_ping_evt_work(ha, status, mrb->pid, data_size, qla4xxx_mbox_status_entry() 459 DEBUG2(ql4_printk(KERN_WARNING, ha, "%s: invalid mbox_cmd = " qla4xxx_mbox_status_entry() 469 * @ha: Pointer to host adapter structure. 474 void qla4xxx_process_response_queue(struct scsi_qla_host *ha) qla4xxx_process_response_queue() argument 481 while ((ha->response_ptr->signature != RESPONSE_PROCESSED)) { qla4xxx_process_response_queue() 482 sts_entry = (struct status_entry *) ha->response_ptr; qla4xxx_process_response_queue() 486 if (ha->response_out == (RESPONSE_QUEUE_DEPTH - 1)) { qla4xxx_process_response_queue() 487 ha->response_out = 0; qla4xxx_process_response_queue() 488 ha->response_ptr = ha->response_ring; qla4xxx_process_response_queue() 490 ha->response_out++; qla4xxx_process_response_queue() 491 ha->response_ptr++; qla4xxx_process_response_queue() 498 qla4xxx_status_entry(ha, sts_entry); qla4xxx_process_response_queue() 503 qla4xxx_passthru_status_entry(ha, qla4xxx_process_response_queue() 506 ql4_printk(KERN_ERR, ha, qla4xxx_process_response_queue() 513 qla4xxx_status_cont_entry(ha, qla4xxx_process_response_queue() 522 srb = qla4xxx_del_from_active_array(ha, qla4xxx_process_response_queue() 529 "srb %p\n", ha->host_no, __func__, srb)); qla4xxx_process_response_queue() 540 "ignoring\n", ha->host_no, __func__)); qla4xxx_process_response_queue() 544 DEBUG2(ql4_printk(KERN_INFO, ha, qla4xxx_process_response_queue() 546 qla4xxx_mbox_status_entry(ha, qla4xxx_process_response_queue() 556 "response queue \n", ha->host_no, qla4xxx_process_response_queue() 568 ha->isp_ops->complete_iocb(ha); qla4xxx_process_response_queue() 574 ha->host_no, __func__, srb, sts_entry->hdr.entryType, qla4xxx_process_response_queue() 578 ha->isp_ops->complete_iocb(ha); qla4xxx_process_response_queue() 579 set_bit(DPC_RESET_HA, &ha->dpc_flags); qla4xxx_process_response_queue() 584 * @ha: Pointer to host adapter structure. 587 static int qla4_83xx_loopback_in_progress(struct scsi_qla_host *ha) qla4_83xx_loopback_in_progress() argument 591 if (is_qla8032(ha) || is_qla8042(ha)) { qla4_83xx_loopback_in_progress() 592 if ((ha->idc_info.info2 & ENABLE_INTERNAL_LOOPBACK) || qla4_83xx_loopback_in_progress() 593 (ha->idc_info.info2 & ENABLE_EXTERNAL_LOOPBACK)) { qla4_83xx_loopback_in_progress() 594 DEBUG2(ql4_printk(KERN_INFO, ha, qla4_83xx_loopback_in_progress() 599 DEBUG2(ql4_printk(KERN_INFO, ha, qla4_83xx_loopback_in_progress() 609 static void qla4xxx_update_ipaddr_state(struct scsi_qla_host *ha, qla4xxx_update_ipaddr_state() argument 621 ha->ip_config.ipv4_addr_state = ipaddr_state; qla4xxx_update_ipaddr_state() 624 ha->ip_config.ipv6_link_local_state = ipaddr_state; qla4xxx_update_ipaddr_state() 627 ha->ip_config.ipv6_addr0_state = ipaddr_state; qla4xxx_update_ipaddr_state() 630 ha->ip_config.ipv6_addr1_state = ipaddr_state; qla4xxx_update_ipaddr_state() 633 ql4_printk(KERN_INFO, ha, "%s: Invalid IPADDR index %d\n", qla4xxx_update_ipaddr_state() 638 static void qla4xxx_default_router_changed(struct scsi_qla_host *ha, qla4xxx_default_router_changed() argument 641 memcpy(&ha->ip_config.ipv6_default_router_addr.s6_addr32[0], qla4xxx_default_router_changed() 643 memcpy(&ha->ip_config.ipv6_default_router_addr.s6_addr32[1], qla4xxx_default_router_changed() 645 memcpy(&ha->ip_config.ipv6_default_router_addr.s6_addr32[2], qla4xxx_default_router_changed() 647 memcpy(&ha->ip_config.ipv6_default_router_addr.s6_addr32[3], qla4xxx_default_router_changed() 653 * @ha: Pointer to host adapter structure. 659 static void qla4xxx_isr_decode_mailbox(struct scsi_qla_host * ha, qla4xxx_isr_decode_mailbox() argument 667 if (is_qla8032(ha) || is_qla8042(ha)) qla4xxx_isr_decode_mailbox() 668 mailbox_out = &ha->qla4_83xx_reg->mailbox_out[0]; qla4xxx_isr_decode_mailbox() 669 else if (is_qla8022(ha)) qla4xxx_isr_decode_mailbox() 670 mailbox_out = &ha->qla4_82xx_reg->mailbox_out[0]; qla4xxx_isr_decode_mailbox() 672 mailbox_out = &ha->reg->mailbox[0]; qla4xxx_isr_decode_mailbox() 677 ha->mbox_status[0] = mbox_status; qla4xxx_isr_decode_mailbox() 679 if (test_bit(AF_MBOX_COMMAND, &ha->flags)) { qla4xxx_isr_decode_mailbox() 684 for (i = 0; i < ha->mbox_status_count; i++) qla4xxx_isr_decode_mailbox() 685 ha->mbox_status[i] = readl(&mailbox_out[i]); qla4xxx_isr_decode_mailbox() 687 set_bit(AF_MBOX_COMMAND_DONE, &ha->flags); qla4xxx_isr_decode_mailbox() 689 if (test_bit(AF_MBOX_COMMAND_NOPOLL, &ha->flags)) qla4xxx_isr_decode_mailbox() 690 complete(&ha->mbx_intr_comp); qla4xxx_isr_decode_mailbox() 698 if (ha->aen_log.count < MAX_AEN_ENTRIES) { qla4xxx_isr_decode_mailbox() 700 ha->aen_log.entry[ha->aen_log.count].mbox_sts[i] = qla4xxx_isr_decode_mailbox() 702 ha->aen_log.count++; qla4xxx_isr_decode_mailbox() 707 ql4_printk(KERN_INFO, ha, "%s: System Err\n", __func__); qla4xxx_isr_decode_mailbox() 708 qla4xxx_dump_registers(ha); qla4xxx_isr_decode_mailbox() 710 if ((is_qla8022(ha) && ql4xdontresethba) || qla4xxx_isr_decode_mailbox() 711 ((is_qla8032(ha) || is_qla8042(ha)) && qla4xxx_isr_decode_mailbox() 712 qla4_83xx_idc_dontreset(ha))) { qla4xxx_isr_decode_mailbox() 714 ha->host_no, __func__)); qla4xxx_isr_decode_mailbox() 716 set_bit(AF_GET_CRASH_RECORD, &ha->flags); qla4xxx_isr_decode_mailbox() 717 set_bit(DPC_RESET_HA, &ha->dpc_flags); qla4xxx_isr_decode_mailbox() 727 "Reset HA\n", ha->host_no, mbox_status)); qla4xxx_isr_decode_mailbox() 728 if (is_qla80XX(ha)) qla4xxx_isr_decode_mailbox() 730 &ha->dpc_flags); qla4xxx_isr_decode_mailbox() 732 set_bit(DPC_RESET_HA, &ha->dpc_flags); qla4xxx_isr_decode_mailbox() 736 set_bit(AF_LINK_UP, &ha->flags); qla4xxx_isr_decode_mailbox() 737 if (test_bit(AF_INIT_DONE, &ha->flags)) qla4xxx_isr_decode_mailbox() 738 set_bit(DPC_LINK_CHANGED, &ha->dpc_flags); qla4xxx_isr_decode_mailbox() 740 ql4_printk(KERN_INFO, ha, "%s: LINK UP\n", __func__); qla4xxx_isr_decode_mailbox() 741 qla4xxx_post_aen_work(ha, ISCSI_EVENT_LINKUP, qla4xxx_isr_decode_mailbox() 745 if ((is_qla8032(ha) || is_qla8042(ha)) && qla4xxx_isr_decode_mailbox() 746 ha->notify_link_up_comp) qla4xxx_isr_decode_mailbox() 747 complete(&ha->link_up_comp); qla4xxx_isr_decode_mailbox() 752 clear_bit(AF_LINK_UP, &ha->flags); qla4xxx_isr_decode_mailbox() 753 if (test_bit(AF_INIT_DONE, &ha->flags)) { qla4xxx_isr_decode_mailbox() 754 set_bit(DPC_LINK_CHANGED, &ha->dpc_flags); qla4xxx_isr_decode_mailbox() 755 qla4xxx_wake_dpc(ha); qla4xxx_isr_decode_mailbox() 758 ql4_printk(KERN_INFO, ha, "%s: LINK DOWN\n", __func__); qla4xxx_isr_decode_mailbox() 759 qla4xxx_post_aen_work(ha, ISCSI_EVENT_LINKDOWN, qla4xxx_isr_decode_mailbox() 765 ha->seconds_since_last_heartbeat = 0; qla4xxx_isr_decode_mailbox() 770 "ACQUIRED\n", ha->host_no, mbox_status)); qla4xxx_isr_decode_mailbox() 771 set_bit(DPC_GET_DHCP_IP_ADDR, &ha->dpc_flags); qla4xxx_isr_decode_mailbox() 783 DEBUG2(printk("scsi%ld: AEN %04x\n", ha->host_no, qla4xxx_isr_decode_mailbox() 789 "mbox_sts[3]=%04x\n", ha->host_no, mbox_sts[0], qla4xxx_isr_decode_mailbox() 792 qla4xxx_update_ipaddr_state(ha, mbox_sts[5], qla4xxx_isr_decode_mailbox() 799 set_bit(DPC_GET_DHCP_IP_ADDR, &ha->dpc_flags); qla4xxx_isr_decode_mailbox() 802 if (is_qla80XX(ha)) qla4xxx_isr_decode_mailbox() 804 &ha->dpc_flags); qla4xxx_isr_decode_mailbox() 806 set_bit(DPC_RESET_HA, &ha->dpc_flags); qla4xxx_isr_decode_mailbox() 808 ql4_printk(KERN_INFO, ha, "scsi%ld: %s: ACB in disabling state\n", qla4xxx_isr_decode_mailbox() 809 ha->host_no, __func__); qla4xxx_isr_decode_mailbox() 811 complete(&ha->disable_acb_comp); qla4xxx_isr_decode_mailbox() 812 ql4_printk(KERN_INFO, ha, "scsi%ld: %s: ACB state unconfigured\n", qla4xxx_isr_decode_mailbox() 813 ha->host_no, __func__); qla4xxx_isr_decode_mailbox() 821 DEBUG2(ql4_printk(KERN_INFO, ha, "scsi%ld: AEN %04x\n", qla4xxx_isr_decode_mailbox() 822 ha->host_no, mbox_status)); qla4xxx_isr_decode_mailbox() 826 DEBUG2(ql4_printk(KERN_INFO, ha, qla4xxx_isr_decode_mailbox() 829 ha->host_no, mbox_sts[0], mbox_sts[1], qla4xxx_isr_decode_mailbox() 839 ha->host_no, mbox_sts[0], qla4xxx_isr_decode_mailbox() 848 ha->host_no, mbox_sts[0], mbox_sts[1], qla4xxx_isr_decode_mailbox() 855 if (ha->aen_q_count > 0) { qla4xxx_isr_decode_mailbox() 858 ha->aen_q_count--; qla4xxx_isr_decode_mailbox() 861 ha->aen_q[ha->aen_in].mbox_sts[i] = qla4xxx_isr_decode_mailbox() 868 ha->host_no, ha->aen_in, qla4xxx_isr_decode_mailbox() 874 ha->aen_in++; qla4xxx_isr_decode_mailbox() 875 if (ha->aen_in == MAX_AEN_ENTRIES) qla4xxx_isr_decode_mailbox() 876 ha->aen_in = 0; qla4xxx_isr_decode_mailbox() 879 set_bit(DPC_AEN, &ha->dpc_flags); qla4xxx_isr_decode_mailbox() 883 ha->host_no, __func__, qla4xxx_isr_decode_mailbox() 887 ha->host_no)); qla4xxx_isr_decode_mailbox() 901 " inserted\n", ha->host_no, mbox_sts[0])); qla4xxx_isr_decode_mailbox() 907 " removed\n", ha->host_no, mbox_sts[0])); qla4xxx_isr_decode_mailbox() 911 if (is_qla8032(ha) || is_qla8042(ha)) { qla4xxx_isr_decode_mailbox() 912 DEBUG2(ql4_printk(KERN_INFO, ha, qla4xxx_isr_decode_mailbox() 914 ha->host_no, mbox_sts[0], qla4xxx_isr_decode_mailbox() 921 &ha->dpc_flags); qla4xxx_isr_decode_mailbox() 922 ha->idc_info.request_desc = mbox_sts[1]; qla4xxx_isr_decode_mailbox() 923 ha->idc_info.info1 = mbox_sts[2]; qla4xxx_isr_decode_mailbox() 924 ha->idc_info.info2 = mbox_sts[3]; qla4xxx_isr_decode_mailbox() 925 ha->idc_info.info3 = mbox_sts[4]; qla4xxx_isr_decode_mailbox() 926 qla4xxx_wake_dpc(ha); qla4xxx_isr_decode_mailbox() 932 if (is_qla8032(ha) || is_qla8042(ha)) { qla4xxx_isr_decode_mailbox() 933 DEBUG2(ql4_printk(KERN_INFO, ha, qla4xxx_isr_decode_mailbox() 935 ha->host_no, mbox_sts[0], qla4xxx_isr_decode_mailbox() 938 DEBUG2(ql4_printk(KERN_INFO, ha, qla4xxx_isr_decode_mailbox() 940 ha->host_no, mbox_sts[0])); qla4xxx_isr_decode_mailbox() 943 if (ha->notify_idc_comp) qla4xxx_isr_decode_mailbox() 944 complete(&ha->idc_comp); qla4xxx_isr_decode_mailbox() 948 ha->idc_info.info2 = mbox_sts[3]; qla4xxx_isr_decode_mailbox() 950 if (qla4_83xx_loopback_in_progress(ha)) { qla4xxx_isr_decode_mailbox() 951 set_bit(AF_LOOPBACK, &ha->flags); qla4xxx_isr_decode_mailbox() 953 clear_bit(AF_LOOPBACK, &ha->flags); qla4xxx_isr_decode_mailbox() 954 if (ha->saved_acb) qla4xxx_isr_decode_mailbox() 956 &ha->dpc_flags); qla4xxx_isr_decode_mailbox() 958 qla4xxx_wake_dpc(ha); qla4xxx_isr_decode_mailbox() 963 DEBUG2(ql4_printk(KERN_INFO, ha, qla4xxx_isr_decode_mailbox() 965 ha->host_no, mbox_sts[0], mbox_sts[1], qla4xxx_isr_decode_mailbox() 968 DEBUG2(ql4_printk(KERN_INFO, ha, qla4xxx_isr_decode_mailbox() 970 ha->host_no, mbox_sts[0])); qla4xxx_isr_decode_mailbox() 971 qla4xxx_default_router_changed(ha, mbox_sts); qla4xxx_isr_decode_mailbox() 975 DEBUG2(ql4_printk(KERN_INFO, ha, qla4xxx_isr_decode_mailbox() 977 ha->host_no, mbox_sts[0], mbox_sts[1], qla4xxx_isr_decode_mailbox() 980 DEBUG2(ql4_printk(KERN_INFO, ha, qla4xxx_isr_decode_mailbox() 982 ha->host_no, mbox_sts[0])); qla4xxx_isr_decode_mailbox() 984 ha->idc_extend_tmo = mbox_sts[1]; qla4xxx_isr_decode_mailbox() 988 DEBUG2(ql4_printk(KERN_INFO, ha, qla4xxx_isr_decode_mailbox() 990 ha->host_no, mbox_sts[0], qla4xxx_isr_decode_mailbox() 995 DEBUG2(ql4_printk(KERN_WARNING, ha, qla4xxx_isr_decode_mailbox() 997 ha->host_no, mbox_sts[0], mbox_sts[1], qla4xxx_isr_decode_mailbox() 1003 DEBUG2(ql4_printk(KERN_INFO, ha, qla4xxx_isr_decode_mailbox() 1005 ha->host_no, mbox_sts[0], mbox_sts[1], qla4xxx_isr_decode_mailbox() 1008 DEBUG2(ql4_printk(KERN_INFO, ha, qla4xxx_isr_decode_mailbox() 1010 ha->host_no, mbox_sts[0])); qla4xxx_isr_decode_mailbox() 1016 ha->host_no, mbox_sts[0])); qla4xxx_isr_decode_mailbox() 1021 ha->host_no, mbox_status)); qla4xxx_isr_decode_mailbox() 1023 ha->mbox_status[0] = mbox_status; qla4xxx_isr_decode_mailbox() 1027 void qla4_83xx_interrupt_service_routine(struct scsi_qla_host *ha, qla4_83xx_interrupt_service_routine() argument 1032 qla4xxx_isr_decode_mailbox(ha, qla4_83xx_interrupt_service_routine() 1033 readl(&ha->qla4_83xx_reg->mailbox_out[0])); qla4_83xx_interrupt_service_routine() 1035 writel(0, &ha->qla4_83xx_reg->risc_intr); qla4_83xx_interrupt_service_routine() 1037 qla4xxx_process_response_queue(ha); qla4_83xx_interrupt_service_routine() 1041 writel(0, &ha->qla4_83xx_reg->mb_int_mask); qla4_83xx_interrupt_service_routine() 1046 * @ha: pointer to host adapter structure. 1051 void qla4_82xx_interrupt_service_routine(struct scsi_qla_host *ha, qla4_82xx_interrupt_service_routine() argument 1056 test_bit(AF_INIT_DONE, &ha->flags)) qla4_82xx_interrupt_service_routine() 1057 qla4xxx_process_response_queue(ha); qla4_82xx_interrupt_service_routine() 1061 qla4xxx_isr_decode_mailbox(ha, qla4_82xx_interrupt_service_routine() 1062 readl(&ha->qla4_82xx_reg->mailbox_out[0])); qla4_82xx_interrupt_service_routine() 1065 writel(0, &ha->qla4_82xx_reg->host_int); qla4_82xx_interrupt_service_routine() 1066 readl(&ha->qla4_82xx_reg->host_int); qla4_82xx_interrupt_service_routine() 1071 * @ha: pointer to host adapter structure. 1076 void qla4xxx_interrupt_service_routine(struct scsi_qla_host * ha, qla4xxx_interrupt_service_routine() argument 1081 qla4xxx_process_response_queue(ha); qla4xxx_interrupt_service_routine() 1085 qla4xxx_isr_decode_mailbox(ha, qla4xxx_interrupt_service_routine() 1086 readl(&ha->reg->mailbox[0])); qla4xxx_interrupt_service_routine() 1090 &ha->reg->ctrl_status); qla4xxx_interrupt_service_routine() 1091 readl(&ha->reg->ctrl_status); qla4xxx_interrupt_service_routine() 1097 * @ha: pointer to host adapter structure. 1101 static void qla4_82xx_spurious_interrupt(struct scsi_qla_host *ha, qla4_82xx_spurious_interrupt() argument 1107 DEBUG2(ql4_printk(KERN_INFO, ha, "Spurious Interrupt\n")); qla4_82xx_spurious_interrupt() 1108 if (is_qla8022(ha)) { qla4_82xx_spurious_interrupt() 1109 writel(0, &ha->qla4_82xx_reg->host_int); qla4_82xx_spurious_interrupt() 1110 if (test_bit(AF_INTx_ENABLED, &ha->flags)) qla4_82xx_spurious_interrupt() 1111 qla4_82xx_wr_32(ha, ha->nx_legacy_intr.tgt_mask_reg, qla4_82xx_spurious_interrupt() 1114 ha->spurious_int_count++; qla4_82xx_spurious_interrupt() 1124 struct scsi_qla_host *ha; qla4xxx_intr_handler() local 1129 ha = (struct scsi_qla_host *) dev_id; qla4xxx_intr_handler() 1130 if (!ha) { qla4xxx_intr_handler() 1136 spin_lock_irqsave(&ha->hardware_lock, flags); qla4xxx_intr_handler() 1138 ha->isr_count++; qla4xxx_intr_handler() 1147 if (ha->isp_ops->rd_shdw_rsp_q_in(ha) != qla4xxx_intr_handler() 1148 ha->response_out) qla4xxx_intr_handler() 1151 intr_status = readl(&ha->reg->ctrl_status); qla4xxx_intr_handler() 1156 ha->spurious_int_count++; qla4xxx_intr_handler() 1162 "Status 0x%04x\n", ha->host_no, qla4xxx_intr_handler() 1163 readl(isp_port_error_status (ha)))); qla4xxx_intr_handler() 1172 if ((readl(&ha->reg->ctrl_status) & qla4xxx_intr_handler() 1175 &ha->reg->ctrl_status); qla4xxx_intr_handler() 1176 readl(&ha->reg->ctrl_status); qla4xxx_intr_handler() 1180 &ha->reg->ctrl_status); qla4xxx_intr_handler() 1181 readl(&ha->reg->ctrl_status); qla4xxx_intr_handler() 1183 __qla4xxx_disable_intrs(ha); qla4xxx_intr_handler() 1185 set_bit(DPC_RESET_HA, &ha->dpc_flags); qla4xxx_intr_handler() 1189 clear_bit(AF_ONLINE, &ha->flags); qla4xxx_intr_handler() 1190 __qla4xxx_disable_intrs(ha); qla4xxx_intr_handler() 1193 &ha->reg->ctrl_status); qla4xxx_intr_handler() 1194 readl(&ha->reg->ctrl_status); qla4xxx_intr_handler() 1196 if (!test_bit(AF_HA_REMOVAL, &ha->flags)) qla4xxx_intr_handler() 1197 set_bit(DPC_RESET_HA_INTR, &ha->dpc_flags); qla4xxx_intr_handler() 1201 ha->isp_ops->interrupt_service_routine(ha, intr_status); qla4xxx_intr_handler() 1202 ha->total_io_count++; qla4xxx_intr_handler() 1208 spin_unlock_irqrestore(&ha->hardware_lock, flags); qla4xxx_intr_handler() 1220 struct scsi_qla_host *ha = dev_id; qla4_82xx_intr_handler() local 1226 if (unlikely(pci_channel_offline(ha->pdev))) qla4_82xx_intr_handler() 1229 ha->isr_count++; qla4_82xx_intr_handler() 1230 status = qla4_82xx_rd_32(ha, ISR_INT_VECTOR); qla4_82xx_intr_handler() 1231 if (!(status & ha->nx_legacy_intr.int_vec_bit)) qla4_82xx_intr_handler() 1234 status = qla4_82xx_rd_32(ha, ISR_INT_STATE_REG); qla4_82xx_intr_handler() 1236 DEBUG7(ql4_printk(KERN_INFO, ha, qla4_82xx_intr_handler() 1242 qla4_82xx_wr_32(ha, ha->nx_legacy_intr.tgt_status_reg, 0xffffffff); qla4_82xx_intr_handler() 1245 qla4_82xx_rd_32(ha, ISR_INT_VECTOR); qla4_82xx_intr_handler() 1246 qla4_82xx_rd_32(ha, ISR_INT_VECTOR); qla4_82xx_intr_handler() 1248 spin_lock_irqsave(&ha->hardware_lock, flags); qla4_82xx_intr_handler() 1250 if (!(readl(&ha->qla4_82xx_reg->host_int) & qla4_82xx_intr_handler() 1252 qla4_82xx_spurious_interrupt(ha, reqs_count); qla4_82xx_intr_handler() 1255 intr_status = readl(&ha->qla4_82xx_reg->host_status); qla4_82xx_intr_handler() 1258 qla4_82xx_spurious_interrupt(ha, reqs_count); qla4_82xx_intr_handler() 1262 ha->isp_ops->interrupt_service_routine(ha, intr_status); qla4_82xx_intr_handler() 1265 qla4_82xx_wr_32(ha, ha->nx_legacy_intr.tgt_mask_reg, 0xfbff); qla4_82xx_intr_handler() 1271 spin_unlock_irqrestore(&ha->hardware_lock, flags); qla4_82xx_intr_handler() 1286 struct scsi_qla_host *ha = dev_id; qla4_83xx_intr_handler() local 1290 ha->isr_count++; qla4_83xx_intr_handler() 1291 leg_int_ptr = readl(&ha->qla4_83xx_reg->leg_int_ptr); qla4_83xx_intr_handler() 1295 DEBUG7(ql4_printk(KERN_ERR, ha, qla4_83xx_intr_handler() 1302 if ((leg_int_ptr & PF_BITS_MASK) != ha->pf_bit) { qla4_83xx_intr_handler() 1303 DEBUG7(ql4_printk(KERN_ERR, ha, qla4_83xx_intr_handler() 1304 "%s: Incorrect function ID 0x%x in legacy interrupt register, ha->pf_bit = 0x%x\n", qla4_83xx_intr_handler() 1306 ha->pf_bit)); qla4_83xx_intr_handler() 1314 writel(0, &ha->qla4_83xx_reg->leg_int_trig); qla4_83xx_intr_handler() 1316 leg_int_ptr = readl(&ha->qla4_83xx_reg->leg_int_ptr); qla4_83xx_intr_handler() 1317 if ((leg_int_ptr & PF_BITS_MASK) != ha->pf_bit) qla4_83xx_intr_handler() 1321 spin_lock_irqsave(&ha->hardware_lock, flags); qla4_83xx_intr_handler() 1322 leg_int_ptr = readl(&ha->qla4_83xx_reg->risc_intr); qla4_83xx_intr_handler() 1323 ha->isp_ops->interrupt_service_routine(ha, leg_int_ptr); qla4_83xx_intr_handler() 1324 spin_unlock_irqrestore(&ha->hardware_lock, flags); qla4_83xx_intr_handler() 1332 struct scsi_qla_host *ha; qla4_8xxx_msi_handler() local 1334 ha = (struct scsi_qla_host *) dev_id; qla4_8xxx_msi_handler() 1335 if (!ha) { qla4_8xxx_msi_handler() 1341 ha->isr_count++; qla4_8xxx_msi_handler() 1343 qla4_82xx_wr_32(ha, ha->nx_legacy_intr.tgt_status_reg, 0xffffffff); qla4_8xxx_msi_handler() 1346 qla4_82xx_rd_32(ha, ISR_INT_VECTOR); qla4_8xxx_msi_handler() 1347 qla4_82xx_rd_32(ha, ISR_INT_VECTOR); qla4_8xxx_msi_handler() 1354 struct scsi_qla_host *ha = dev_id; qla4_83xx_mailbox_intr_handler() local 1358 spin_lock_irqsave(&ha->hardware_lock, flags); qla4_83xx_mailbox_intr_handler() 1360 ival = readl(&ha->qla4_83xx_reg->risc_intr); qla4_83xx_mailbox_intr_handler() 1362 ql4_printk(KERN_INFO, ha, qla4_83xx_mailbox_intr_handler() 1365 ival = readl(&ha->qla4_83xx_reg->mb_int_mask); qla4_83xx_mailbox_intr_handler() 1367 writel(ival, &ha->qla4_83xx_reg->mb_int_mask); qla4_83xx_mailbox_intr_handler() 1371 qla4xxx_isr_decode_mailbox(ha, qla4_83xx_mailbox_intr_handler() 1372 readl(&ha->qla4_83xx_reg->mailbox_out[0])); qla4_83xx_mailbox_intr_handler() 1373 writel(0, &ha->qla4_83xx_reg->risc_intr); qla4_83xx_mailbox_intr_handler() 1374 ival = readl(&ha->qla4_83xx_reg->mb_int_mask); qla4_83xx_mailbox_intr_handler() 1376 writel(ival, &ha->qla4_83xx_reg->mb_int_mask); qla4_83xx_mailbox_intr_handler() 1377 ha->isr_count++; qla4_83xx_mailbox_intr_handler() 1379 spin_unlock_irqrestore(&ha->hardware_lock, flags); qla4_83xx_mailbox_intr_handler() 1394 struct scsi_qla_host *ha = dev_id; qla4_8xxx_default_intr_handler() local 1399 if (is_qla8032(ha) || is_qla8042(ha)) { qla4_8xxx_default_intr_handler() 1402 spin_lock_irqsave(&ha->hardware_lock, flags); qla4_8xxx_default_intr_handler() 1404 if (!(readl(&ha->qla4_82xx_reg->host_int) & qla4_8xxx_default_intr_handler() 1406 qla4_82xx_spurious_interrupt(ha, reqs_count); qla4_8xxx_default_intr_handler() 1410 intr_status = readl(&ha->qla4_82xx_reg->host_status); qla4_8xxx_default_intr_handler() 1413 qla4_82xx_spurious_interrupt(ha, reqs_count); qla4_8xxx_default_intr_handler() 1417 ha->isp_ops->interrupt_service_routine(ha, intr_status); qla4_8xxx_default_intr_handler() 1422 ha->isr_count++; qla4_8xxx_default_intr_handler() 1423 spin_unlock_irqrestore(&ha->hardware_lock, flags); qla4_8xxx_default_intr_handler() 1431 struct scsi_qla_host *ha = dev_id; qla4_8xxx_msix_rsp_q() local 1436 spin_lock_irqsave(&ha->hardware_lock, flags); qla4_8xxx_msix_rsp_q() 1437 if (is_qla8032(ha) || is_qla8042(ha)) { qla4_8xxx_msix_rsp_q() 1438 ival = readl(&ha->qla4_83xx_reg->iocb_int_mask); qla4_8xxx_msix_rsp_q() 1440 ql4_printk(KERN_INFO, ha, "%s: It is a spurious iocb interrupt!\n", qla4_8xxx_msix_rsp_q() 1444 qla4xxx_process_response_queue(ha); qla4_8xxx_msix_rsp_q() 1445 writel(0, &ha->qla4_83xx_reg->iocb_int_mask); qla4_8xxx_msix_rsp_q() 1447 intr_status = readl(&ha->qla4_82xx_reg->host_status); qla4_8xxx_msix_rsp_q() 1449 qla4xxx_process_response_queue(ha); qla4_8xxx_msix_rsp_q() 1450 writel(0, &ha->qla4_82xx_reg->host_int); qla4_8xxx_msix_rsp_q() 1452 ql4_printk(KERN_INFO, ha, "%s: spurious iocb interrupt...\n", qla4_8xxx_msix_rsp_q() 1457 ha->isr_count++; qla4_8xxx_msix_rsp_q() 1459 spin_unlock_irqrestore(&ha->hardware_lock, flags); qla4_8xxx_msix_rsp_q() 1465 * @ha: pointer to host adapter structure. 1474 void qla4xxx_process_aen(struct scsi_qla_host * ha, uint8_t process_aen) qla4xxx_process_aen() argument 1481 spin_lock_irqsave(&ha->hardware_lock, flags); qla4xxx_process_aen() 1482 while (ha->aen_out != ha->aen_in) { qla4xxx_process_aen() 1483 aen = &ha->aen_q[ha->aen_out]; qla4xxx_process_aen() 1488 ha->aen_q_count++; qla4xxx_process_aen() 1489 ha->aen_out++; qla4xxx_process_aen() 1491 if (ha->aen_out == MAX_AEN_ENTRIES) qla4xxx_process_aen() 1492 ha->aen_out = 0; qla4xxx_process_aen() 1494 spin_unlock_irqrestore(&ha->hardware_lock, flags); qla4xxx_process_aen() 1497 " mbx3=0x%08x mbx4=0x%08x\n", ha->host_no, qla4xxx_process_aen() 1498 (ha->aen_out ? (ha->aen_out-1): (MAX_AEN_ENTRIES-1)), qla4xxx_process_aen() 1508 ha->host_no, ha->aen_out, qla4xxx_process_aen() 1516 qla4xxx_process_ddb_changed(ha, qla4xxx_process_aen() 1522 spin_lock_irqsave(&ha->hardware_lock, flags); qla4xxx_process_aen() 1524 spin_unlock_irqrestore(&ha->hardware_lock, flags); qla4xxx_process_aen() 1527 int qla4xxx_request_irqs(struct scsi_qla_host *ha) qla4xxx_request_irqs() argument 1532 if (is_qla40XX(ha)) qla4xxx_request_irqs() 1537 if (is_qla8032(ha) || is_qla8042(ha)) { qla4xxx_request_irqs() 1538 ql4_printk(KERN_INFO, ha, "%s: MSI Interrupts not supported for ISP%04x, Falling back-to INTx mode\n", qla4xxx_request_irqs() 1539 __func__, ha->pdev->device); qla4xxx_request_irqs() 1549 ret = qla4_8xxx_enable_msix(ha); qla4xxx_request_irqs() 1551 DEBUG2(ql4_printk(KERN_INFO, ha, qla4xxx_request_irqs() 1552 "MSI-X: Enabled (0x%X).\n", ha->revision_id)); qla4xxx_request_irqs() 1555 if (is_qla8032(ha) || is_qla8042(ha)) { qla4xxx_request_irqs() 1556 ql4_printk(KERN_INFO, ha, "%s: ISP%04x: MSI-X: Falling back-to INTx mode. ret = %d\n", qla4xxx_request_irqs() 1557 __func__, ha->pdev->device, ret); qla4xxx_request_irqs() 1562 ql4_printk(KERN_WARNING, ha, qla4xxx_request_irqs() 1567 ret = pci_enable_msi(ha->pdev); qla4xxx_request_irqs() 1569 ret = request_irq(ha->pdev->irq, qla4_8xxx_msi_handler, qla4xxx_request_irqs() 1570 0, DRIVER_NAME, ha); qla4xxx_request_irqs() 1572 DEBUG2(ql4_printk(KERN_INFO, ha, "MSI: Enabled.\n")); qla4xxx_request_irqs() 1573 set_bit(AF_MSI_ENABLED, &ha->flags); qla4xxx_request_irqs() 1576 ql4_printk(KERN_WARNING, ha, qla4xxx_request_irqs() 1578 "already in use.\n", ha->pdev->irq); qla4xxx_request_irqs() 1579 pci_disable_msi(ha->pdev); qla4xxx_request_irqs() 1584 if (is_qla8022(ha)) { qla4xxx_request_irqs() 1585 ql4_printk(KERN_WARNING, ha, "%s: ISP82xx Legacy interrupt not supported\n", qla4xxx_request_irqs() 1591 ret = request_irq(ha->pdev->irq, ha->isp_ops->intr_handler, qla4xxx_request_irqs() 1592 IRQF_SHARED, DRIVER_NAME, ha); qla4xxx_request_irqs() 1594 DEBUG2(ql4_printk(KERN_INFO, ha, "INTx: Enabled.\n")); qla4xxx_request_irqs() 1595 set_bit(AF_INTx_ENABLED, &ha->flags); qla4xxx_request_irqs() 1599 ql4_printk(KERN_WARNING, ha, qla4xxx_request_irqs() 1601 " use.\n", ha->pdev->irq); qla4xxx_request_irqs() 1606 set_bit(AF_IRQ_ATTACHED, &ha->flags); qla4xxx_request_irqs() 1607 ha->host->irq = ha->pdev->irq; qla4xxx_request_irqs() 1608 ql4_printk(KERN_INFO, ha, "%s: irq %d attached\n", qla4xxx_request_irqs() 1609 __func__, ha->pdev->irq); qla4xxx_request_irqs() 1615 void qla4xxx_free_irqs(struct scsi_qla_host *ha) qla4xxx_free_irqs() argument 1617 if (test_and_clear_bit(AF_IRQ_ATTACHED, &ha->flags)) { qla4xxx_free_irqs() 1618 if (test_bit(AF_MSIX_ENABLED, &ha->flags)) { qla4xxx_free_irqs() 1619 qla4_8xxx_disable_msix(ha); qla4xxx_free_irqs() 1620 } else if (test_and_clear_bit(AF_MSI_ENABLED, &ha->flags)) { qla4xxx_free_irqs() 1621 free_irq(ha->pdev->irq, ha); qla4xxx_free_irqs() 1622 pci_disable_msi(ha->pdev); qla4xxx_free_irqs() 1623 } else if (test_and_clear_bit(AF_INTx_ENABLED, &ha->flags)) { qla4xxx_free_irqs() 1624 free_irq(ha->pdev->irq, ha); qla4xxx_free_irqs()
H A D	ql4_dbg.c	33 void qla4xxx_dump_registers(struct scsi_qla_host *ha) qla4xxx_dump_registers() argument 37 if (is_qla8022(ha)) { qla4xxx_dump_registers() 40 i, readl(&ha->qla4_82xx_reg->mailbox_in[i])); qla4xxx_dump_registers() 47 readw(&ha->reg->mailbox[i])); qla4xxx_dump_registers() 52 readw(&ha->reg->flash_address)); qla4xxx_dump_registers() 55 readw(&ha->reg->flash_data)); qla4xxx_dump_registers() 58 readw(&ha->reg->ctrl_status)); qla4xxx_dump_registers() 60 if (is_qla4010(ha)) { qla4xxx_dump_registers() 63 readw(&ha->reg->u1.isp4010.nvram)); qla4xxx_dump_registers() 64 } else if (is_qla4022(ha) | is_qla4032(ha)) { qla4xxx_dump_registers() 67 readw(&ha->reg->u1.isp4022.intr_mask)); qla4xxx_dump_registers() 70 readw(&ha->reg->u1.isp4022.nvram)); qla4xxx_dump_registers() 73 readw(&ha->reg->u1.isp4022.semaphore)); qla4xxx_dump_registers() 77 readw(&ha->reg->req_q_in)); qla4xxx_dump_registers() 80 readw(&ha->reg->rsp_q_out)); qla4xxx_dump_registers() 82 if (is_qla4010(ha)) { qla4xxx_dump_registers() 85 readw(&ha->reg->u2.isp4010.ext_hw_conf)); qla4xxx_dump_registers() 88 readw(&ha->reg->u2.isp4010.port_ctrl)); qla4xxx_dump_registers() 91 readw(&ha->reg->u2.isp4010.port_status)); qla4xxx_dump_registers() 94 readw(&ha->reg->u2.isp4010.req_q_out)); qla4xxx_dump_registers() 97 readw(&ha->reg->u2.isp4010.gp_out)); qla4xxx_dump_registers() 100 readw(&ha->reg->u2.isp4010.gp_in)); qla4xxx_dump_registers() 103 readw(&ha->reg->u2.isp4010.port_err_status)); qla4xxx_dump_registers() 104 } else if (is_qla4022(ha) | is_qla4032(ha)) { qla4xxx_dump_registers() 108 readw(&ha->reg->u2.isp4022.p0.ext_hw_conf)); qla4xxx_dump_registers() 111 readw(&ha->reg->u2.isp4022.p0.port_ctrl)); qla4xxx_dump_registers() 114 readw(&ha->reg->u2.isp4022.p0.port_status)); qla4xxx_dump_registers() 117 readw(&ha->reg->u2.isp4022.p0.gp_out)); qla4xxx_dump_registers() 120 readw(&ha->reg->u2.isp4022.p0.gp_in)); qla4xxx_dump_registers() 123 readw(&ha->reg->u2.isp4022.p0.port_err_status)); qla4xxx_dump_registers() 126 &ha->reg->ctrl_status); qla4xxx_dump_registers() 129 readw(&ha->reg->u2.isp4022.p1.req_q_out)); qla4xxx_dump_registers() 131 &ha->reg->ctrl_status); qla4xxx_dump_registers() 135 void qla4_8xxx_dump_peg_reg(struct scsi_qla_host *ha) qla4_8xxx_dump_peg_reg() argument 139 halt_status1 = qla4_8xxx_rd_direct(ha, QLA8XXX_PEG_HALT_STATUS1); qla4_8xxx_dump_peg_reg() 140 halt_status2 = qla4_8xxx_rd_direct(ha, QLA8XXX_PEG_HALT_STATUS2); qla4_8xxx_dump_peg_reg() 142 if (is_qla8022(ha)) { qla4_8xxx_dump_peg_reg() 143 ql4_printk(KERN_INFO, ha, qla4_8xxx_dump_peg_reg() 148 " PEG_NET_4_PC: 0x%x\n", ha->host_no, __func__, qla4_8xxx_dump_peg_reg() 149 ha->pdev->device, halt_status1, halt_status2, qla4_8xxx_dump_peg_reg() 150 qla4_82xx_rd_32(ha, QLA82XX_CRB_PEG_NET_0 + 0x3c), qla4_8xxx_dump_peg_reg() 151 qla4_82xx_rd_32(ha, QLA82XX_CRB_PEG_NET_1 + 0x3c), qla4_8xxx_dump_peg_reg() 152 qla4_82xx_rd_32(ha, QLA82XX_CRB_PEG_NET_2 + 0x3c), qla4_8xxx_dump_peg_reg() 153 qla4_82xx_rd_32(ha, QLA82XX_CRB_PEG_NET_3 + 0x3c), qla4_8xxx_dump_peg_reg() 154 qla4_82xx_rd_32(ha, QLA82XX_CRB_PEG_NET_4 + 0x3c)); qla4_8xxx_dump_peg_reg() 155 } else if (is_qla8032(ha) || is_qla8042(ha)) { qla4_8xxx_dump_peg_reg() 156 ql4_printk(KERN_INFO, ha, qla4_8xxx_dump_peg_reg() 159 ha->host_no, __func__, ha->pdev->device, qla4_8xxx_dump_peg_reg()
H A D	ql4_mbx.c	15 void qla4xxx_queue_mbox_cmd(struct scsi_qla_host *ha, uint32_t *mbx_cmd, qla4xxx_queue_mbox_cmd() argument 22 writel(mbx_cmd[i], &ha->reg->mailbox[i]); qla4xxx_queue_mbox_cmd() 25 writel(mbx_cmd[0], &ha->reg->mailbox[0]); qla4xxx_queue_mbox_cmd() 26 readl(&ha->reg->mailbox[0]); qla4xxx_queue_mbox_cmd() 27 writel(set_rmask(CSR_INTR_RISC), &ha->reg->ctrl_status); qla4xxx_queue_mbox_cmd() 28 readl(&ha->reg->ctrl_status); qla4xxx_queue_mbox_cmd() 31 void qla4xxx_process_mbox_intr(struct scsi_qla_host *ha, int out_count) qla4xxx_process_mbox_intr() argument 35 intr_status = readl(&ha->reg->ctrl_status); qla4xxx_process_mbox_intr() 42 ha->mbox_status_count = out_count; qla4xxx_process_mbox_intr() 43 ha->isp_ops->interrupt_service_routine(ha, intr_status); qla4xxx_process_mbox_intr() 49 * @ha: Pointer to host adapter structure. 52 static int qla4xxx_is_intr_poll_mode(struct scsi_qla_host *ha) qla4xxx_is_intr_poll_mode() argument 56 if (is_qla8032(ha) || is_qla8042(ha)) { qla4xxx_is_intr_poll_mode() 57 if (test_bit(AF_IRQ_ATTACHED, &ha->flags) && qla4xxx_is_intr_poll_mode() 58 test_bit(AF_83XX_MBOX_INTR_ON, &ha->flags)) qla4xxx_is_intr_poll_mode() 61 if (test_bit(AF_IRQ_ATTACHED, &ha->flags) && qla4xxx_is_intr_poll_mode() 62 test_bit(AF_INTERRUPTS_ON, &ha->flags) && qla4xxx_is_intr_poll_mode() 63 test_bit(AF_ONLINE, &ha->flags) && qla4xxx_is_intr_poll_mode() 64 !test_bit(AF_HA_REMOVAL, &ha->flags)) qla4xxx_is_intr_poll_mode() 73 * @ha: Pointer to host adapter structure. 83 int qla4xxx_mailbox_command(struct scsi_qla_host *ha, uint8_t inCount, qla4xxx_mailbox_command() argument 96 "pointer\n", ha->host_no, __func__)); qla4xxx_mailbox_command() 100 if (is_qla40XX(ha)) { qla4xxx_mailbox_command() 101 if (test_bit(AF_HA_REMOVAL, &ha->flags)) { qla4xxx_mailbox_command() 102 DEBUG2(ql4_printk(KERN_WARNING, ha, "scsi%ld: %s: " qla4xxx_mailbox_command() 105 ha->host_no, __func__)); qla4xxx_mailbox_command() 110 if ((is_aer_supported(ha)) && qla4xxx_mailbox_command() 111 (test_bit(AF_PCI_CHANNEL_IO_PERM_FAILURE, &ha->flags))) { qla4xxx_mailbox_command() 113 "timeout MBX Exiting.\n", ha->host_no, __func__)); qla4xxx_mailbox_command() 121 mutex_lock(&ha->mbox_sem); qla4xxx_mailbox_command() 122 if (!test_bit(AF_MBOX_COMMAND, &ha->flags)) { qla4xxx_mailbox_command() 123 set_bit(AF_MBOX_COMMAND, &ha->flags); qla4xxx_mailbox_command() 124 mutex_unlock(&ha->mbox_sem); qla4xxx_mailbox_command() 127 mutex_unlock(&ha->mbox_sem); qla4xxx_mailbox_command() 130 ha->host_no, __func__)); qla4xxx_mailbox_command() 136 if (is_qla80XX(ha)) { qla4xxx_mailbox_command() 137 if (test_bit(AF_FW_RECOVERY, &ha->flags)) { qla4xxx_mailbox_command() 138 DEBUG2(ql4_printk(KERN_WARNING, ha, qla4xxx_mailbox_command() 140 ha->host_no, __func__)); qla4xxx_mailbox_command() 144 ha->isp_ops->idc_lock(ha); qla4xxx_mailbox_command() 145 dev_state = qla4_8xxx_rd_direct(ha, QLA8XXX_CRB_DEV_STATE); qla4xxx_mailbox_command() 146 ha->isp_ops->idc_unlock(ha); qla4xxx_mailbox_command() 148 ql4_printk(KERN_WARNING, ha, qla4xxx_mailbox_command() 150 ha->host_no, __func__); qla4xxx_mailbox_command() 155 spin_lock_irqsave(&ha->hardware_lock, flags); qla4xxx_mailbox_command() 157 ha->mbox_status_count = outCount; qla4xxx_mailbox_command() 159 ha->mbox_status[i] = 0; qla4xxx_mailbox_command() 162 ha->isp_ops->queue_mailbox_command(ha, mbx_cmd, inCount); qla4xxx_mailbox_command() 164 spin_unlock_irqrestore(&ha->hardware_lock, flags); qla4xxx_mailbox_command() 181 if (qla4xxx_is_intr_poll_mode(ha)) { qla4xxx_mailbox_command() 184 while (test_bit(AF_MBOX_COMMAND_DONE, &ha->flags) == 0) { qla4xxx_mailbox_command() 193 spin_lock_irqsave(&ha->hardware_lock, flags); qla4xxx_mailbox_command() 194 ha->isp_ops->process_mailbox_interrupt(ha, outCount); qla4xxx_mailbox_command() 195 spin_unlock_irqrestore(&ha->hardware_lock, flags); qla4xxx_mailbox_command() 200 set_bit(AF_MBOX_COMMAND_NOPOLL, &ha->flags); qla4xxx_mailbox_command() 201 wait_for_completion_timeout(&ha->mbx_intr_comp, MBOX_TOV * HZ); qla4xxx_mailbox_command() 202 clear_bit(AF_MBOX_COMMAND_NOPOLL, &ha->flags); qla4xxx_mailbox_command() 206 if (!test_bit(AF_MBOX_COMMAND_DONE, &ha->flags)) { qla4xxx_mailbox_command() 207 if (is_qla80XX(ha) && qla4xxx_mailbox_command() 208 test_bit(AF_FW_RECOVERY, &ha->flags)) { qla4xxx_mailbox_command() 209 DEBUG2(ql4_printk(KERN_INFO, ha, qla4xxx_mailbox_command() 212 ha->host_no, __func__)); qla4xxx_mailbox_command() 215 ql4_printk(KERN_WARNING, ha, "scsi%ld: Mailbox Cmd 0x%08X timed out, Scheduling Adapter Reset\n", qla4xxx_mailbox_command() 216 ha->host_no, mbx_cmd[0]); qla4xxx_mailbox_command() 217 ha->mailbox_timeout_count++; qla4xxx_mailbox_command() 219 set_bit(DPC_RESET_HA, &ha->dpc_flags); qla4xxx_mailbox_command() 220 if (is_qla8022(ha)) { qla4xxx_mailbox_command() 221 ql4_printk(KERN_INFO, ha, qla4xxx_mailbox_command() 223 qla4_82xx_wr_32(ha, QLA82XX_CRB_NIU + 0x98, qla4xxx_mailbox_command() 226 } else if (is_qla8032(ha) || is_qla8042(ha)) { qla4xxx_mailbox_command() 227 ql4_printk(KERN_INFO, ha, " %s: disabling pause transmit on port 0 & 1.\n", qla4xxx_mailbox_command() 229 qla4_83xx_disable_pause(ha); qla4xxx_mailbox_command() 238 spin_lock_irqsave(&ha->hardware_lock, flags); qla4xxx_mailbox_command() 240 mbx_sts[i] = ha->mbox_status[i]; qla4xxx_mailbox_command() 243 switch (ha->mbox_status[0]) { qla4xxx_mailbox_command() 253 ql4_printk(KERN_WARNING, ha, "scsi%ld: %s: Cmd = %08X, ISP BUSY\n", qla4xxx_mailbox_command() 254 ha->host_no, __func__, mbx_cmd[0]); qla4xxx_mailbox_command() 255 ha->mailbox_timeout_count++; qla4xxx_mailbox_command() 259 ql4_printk(KERN_WARNING, ha, "scsi%ld: %s: FAILED, MBOX CMD = %08X, MBOX STS = %08X %08X %08X %08X %08X %08X %08X %08X\n", qla4xxx_mailbox_command() 260 ha->host_no, __func__, mbx_cmd[0], mbx_sts[0], qla4xxx_mailbox_command() 265 spin_unlock_irqrestore(&ha->hardware_lock, flags); qla4xxx_mailbox_command() 268 mutex_lock(&ha->mbox_sem); qla4xxx_mailbox_command() 269 clear_bit(AF_MBOX_COMMAND, &ha->flags); qla4xxx_mailbox_command() 270 mutex_unlock(&ha->mbox_sem); qla4xxx_mailbox_command() 271 clear_bit(AF_MBOX_COMMAND_DONE, &ha->flags); qla4xxx_mailbox_command() 278 * @ha: Pointer to host adapter structure. 284 int qla4xxx_get_minidump_template(struct scsi_qla_host *ha, qla4xxx_get_minidump_template() argument 298 mbox_cmd[4] = ha->fw_dump_tmplt_size; qla4xxx_get_minidump_template() 301 status = qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 2, &mbox_cmd[0], qla4xxx_get_minidump_template() 304 DEBUG2(ql4_printk(KERN_INFO, ha, qla4xxx_get_minidump_template() 306 ha->host_no, __func__, mbox_cmd[0], qla4xxx_get_minidump_template() 314 * @ha: Pointer to host adapter structure. 316 int qla4xxx_req_template_size(struct scsi_qla_host *ha) qla4xxx_req_template_size() argument 328 status = qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 8, &mbox_cmd[0], qla4xxx_req_template_size() 331 ha->fw_dump_tmplt_size = mbox_sts[1]; qla4xxx_req_template_size() 332 DEBUG2(ql4_printk(KERN_INFO, ha, qla4xxx_req_template_size() 337 if (ha->fw_dump_tmplt_size == 0) qla4xxx_req_template_size() 340 ql4_printk(KERN_WARNING, ha, qla4xxx_req_template_size() 349 void qla4xxx_mailbox_premature_completion(struct scsi_qla_host *ha) qla4xxx_mailbox_premature_completion() argument 351 set_bit(AF_FW_RECOVERY, &ha->flags); qla4xxx_mailbox_premature_completion() 352 ql4_printk(KERN_INFO, ha, "scsi%ld: %s: set FW RECOVERY!\n", qla4xxx_mailbox_premature_completion() 353 ha->host_no, __func__); qla4xxx_mailbox_premature_completion() 355 if (test_bit(AF_MBOX_COMMAND, &ha->flags)) { qla4xxx_mailbox_premature_completion() 356 if (test_bit(AF_MBOX_COMMAND_NOPOLL, &ha->flags)) { qla4xxx_mailbox_premature_completion() 357 complete(&ha->mbx_intr_comp); qla4xxx_mailbox_premature_completion() 358 ql4_printk(KERN_INFO, ha, "scsi%ld: %s: Due to fw " qla4xxx_mailbox_premature_completion() 360 "mbx cmd\n", ha->host_no, __func__); qla4xxx_mailbox_premature_completion() 363 set_bit(AF_MBOX_COMMAND_DONE, &ha->flags); qla4xxx_mailbox_premature_completion() 364 ql4_printk(KERN_INFO, ha, "scsi%ld: %s: Due to fw " qla4xxx_mailbox_premature_completion() 366 "polling mbx cmd\n", ha->host_no, __func__); qla4xxx_mailbox_premature_completion() 372 qla4xxx_set_ifcb(struct scsi_qla_host *ha, uint32_t *mbox_cmd, qla4xxx_set_ifcb() argument 378 if (is_qla8022(ha)) qla4xxx_set_ifcb() 379 qla4_82xx_wr_32(ha, ha->nx_db_wr_ptr, 0); qla4xxx_set_ifcb() 387 if (qla4xxx_mailbox_command(ha, 6, 6, mbox_cmd, mbox_sts) != qla4xxx_set_ifcb() 392 ha->host_no, __func__, mbox_sts[0])); qla4xxx_set_ifcb() 399 qla4xxx_get_ifcb(struct scsi_qla_host *ha, uint32_t *mbox_cmd, qla4xxx_get_ifcb() argument 409 if (qla4xxx_mailbox_command(ha, 5, 5, mbox_cmd, mbox_sts) != qla4xxx_get_ifcb() 414 ha->host_no, __func__, mbox_sts[0])); qla4xxx_get_ifcb() 453 qla4xxx_update_local_ip(struct scsi_qla_host *ha, qla4xxx_update_local_ip() argument 456 ha->ip_config.tcp_options = le16_to_cpu(init_fw_cb->ipv4_tcp_opts); qla4xxx_update_local_ip() 457 ha->ip_config.ipv4_options = le16_to_cpu(init_fw_cb->ipv4_ip_opts); qla4xxx_update_local_ip() 458 ha->ip_config.ipv4_addr_state = qla4xxx_update_local_ip() 460 ha->ip_config.eth_mtu_size = qla4xxx_update_local_ip() 462 ha->ip_config.ipv4_port = le16_to_cpu(init_fw_cb->ipv4_port); qla4xxx_update_local_ip() 464 if (ha->acb_version == ACB_SUPPORTED) { qla4xxx_update_local_ip() 465 ha->ip_config.ipv6_options = le16_to_cpu(init_fw_cb->ipv6_opts); qla4xxx_update_local_ip() 466 ha->ip_config.ipv6_addl_options = qla4xxx_update_local_ip() 468 ha->ip_config.ipv6_tcp_options = qla4xxx_update_local_ip() 473 memcpy(ha->ip_config.ip_address, init_fw_cb->ipv4_addr, qla4xxx_update_local_ip() 474 min(sizeof(ha->ip_config.ip_address), qla4xxx_update_local_ip() 476 memcpy(ha->ip_config.subnet_mask, init_fw_cb->ipv4_subnet, qla4xxx_update_local_ip() 477 min(sizeof(ha->ip_config.subnet_mask), qla4xxx_update_local_ip() 479 memcpy(ha->ip_config.gateway, init_fw_cb->ipv4_gw_addr, qla4xxx_update_local_ip() 480 min(sizeof(ha->ip_config.gateway), qla4xxx_update_local_ip() 483 ha->ip_config.ipv4_vlan_tag = be16_to_cpu(init_fw_cb->ipv4_vlan_tag); qla4xxx_update_local_ip() 484 ha->ip_config.control = init_fw_cb->control; qla4xxx_update_local_ip() 485 ha->ip_config.tcp_wsf = init_fw_cb->ipv4_tcp_wsf; qla4xxx_update_local_ip() 486 ha->ip_config.ipv4_tos = init_fw_cb->ipv4_tos; qla4xxx_update_local_ip() 487 ha->ip_config.ipv4_cache_id = init_fw_cb->ipv4_cacheid; qla4xxx_update_local_ip() 488 ha->ip_config.ipv4_alt_cid_len = init_fw_cb->ipv4_dhcp_alt_cid_len; qla4xxx_update_local_ip() 489 memcpy(ha->ip_config.ipv4_alt_cid, init_fw_cb->ipv4_dhcp_alt_cid, qla4xxx_update_local_ip() 490 min(sizeof(ha->ip_config.ipv4_alt_cid), qla4xxx_update_local_ip() 492 ha->ip_config.ipv4_vid_len = init_fw_cb->ipv4_dhcp_vid_len; qla4xxx_update_local_ip() 493 memcpy(ha->ip_config.ipv4_vid, init_fw_cb->ipv4_dhcp_vid, qla4xxx_update_local_ip() 494 min(sizeof(ha->ip_config.ipv4_vid), qla4xxx_update_local_ip() 496 ha->ip_config.ipv4_ttl = init_fw_cb->ipv4_ttl; qla4xxx_update_local_ip() 497 ha->ip_config.def_timeout = le16_to_cpu(init_fw_cb->def_timeout); qla4xxx_update_local_ip() 498 ha->ip_config.abort_timer = init_fw_cb->abort_timer; qla4xxx_update_local_ip() 499 ha->ip_config.iscsi_options = le16_to_cpu(init_fw_cb->iscsi_opts); qla4xxx_update_local_ip() 500 ha->ip_config.iscsi_max_pdu_size = qla4xxx_update_local_ip() 502 ha->ip_config.iscsi_first_burst_len = qla4xxx_update_local_ip() 504 ha->ip_config.iscsi_max_outstnd_r2t = qla4xxx_update_local_ip() 506 ha->ip_config.iscsi_max_burst_len = qla4xxx_update_local_ip() 508 memcpy(ha->ip_config.iscsi_name, init_fw_cb->iscsi_name, qla4xxx_update_local_ip() 509 min(sizeof(ha->ip_config.iscsi_name), qla4xxx_update_local_ip() 512 if (is_ipv6_enabled(ha)) { qla4xxx_update_local_ip() 514 ha->ip_config.ipv6_link_local_state = qla4xxx_update_local_ip() 516 ha->ip_config.ipv6_addr0_state = qla4xxx_update_local_ip() 518 ha->ip_config.ipv6_addr1_state = qla4xxx_update_local_ip() 523 ha->ip_config.ipv6_default_router_state = qla4xxx_update_local_ip() 527 ha->ip_config.ipv6_default_router_state = qla4xxx_update_local_ip() 531 ha->ip_config.ipv6_default_router_state = qla4xxx_update_local_ip() 535 ha->ip_config.ipv6_default_router_state = qla4xxx_update_local_ip() 539 ha->ip_config.ipv6_default_router_state = qla4xxx_update_local_ip() 543 ha->ip_config.ipv6_link_local_addr.in6_u.u6_addr8[0] = 0xFE; qla4xxx_update_local_ip() 544 ha->ip_config.ipv6_link_local_addr.in6_u.u6_addr8[1] = 0x80; qla4xxx_update_local_ip() 546 memcpy(&ha->ip_config.ipv6_link_local_addr.in6_u.u6_addr8[8], qla4xxx_update_local_ip() 548 min(sizeof(ha->ip_config.ipv6_link_local_addr)/2, qla4xxx_update_local_ip() 550 memcpy(&ha->ip_config.ipv6_addr0, init_fw_cb->ipv6_addr0, qla4xxx_update_local_ip() 551 min(sizeof(ha->ip_config.ipv6_addr0), qla4xxx_update_local_ip() 553 memcpy(&ha->ip_config.ipv6_addr1, init_fw_cb->ipv6_addr1, qla4xxx_update_local_ip() 554 min(sizeof(ha->ip_config.ipv6_addr1), qla4xxx_update_local_ip() 556 memcpy(&ha->ip_config.ipv6_default_router_addr, qla4xxx_update_local_ip() 558 min(sizeof(ha->ip_config.ipv6_default_router_addr), qla4xxx_update_local_ip() 560 ha->ip_config.ipv6_vlan_tag = qla4xxx_update_local_ip() 562 ha->ip_config.ipv6_port = le16_to_cpu(init_fw_cb->ipv6_port); qla4xxx_update_local_ip() 563 ha->ip_config.ipv6_cache_id = init_fw_cb->ipv6_cache_id; qla4xxx_update_local_ip() 564 ha->ip_config.ipv6_flow_lbl = qla4xxx_update_local_ip() 566 ha->ip_config.ipv6_traffic_class = qla4xxx_update_local_ip() 568 ha->ip_config.ipv6_hop_limit = init_fw_cb->ipv6_hop_limit; qla4xxx_update_local_ip() 569 ha->ip_config.ipv6_nd_reach_time = qla4xxx_update_local_ip() 571 ha->ip_config.ipv6_nd_rexmit_timer = qla4xxx_update_local_ip() 573 ha->ip_config.ipv6_nd_stale_timeout = qla4xxx_update_local_ip() 575 ha->ip_config.ipv6_dup_addr_detect_count = qla4xxx_update_local_ip() 577 ha->ip_config.ipv6_gw_advrt_mtu = qla4xxx_update_local_ip() 579 ha->ip_config.ipv6_tcp_wsf = init_fw_cb->ipv6_tcp_wsf; qla4xxx_update_local_ip() 584 qla4xxx_update_local_ifcb(struct scsi_qla_host *ha, qla4xxx_update_local_ifcb() argument 590 if (qla4xxx_get_ifcb(ha, mbox_cmd, mbox_sts, init_fw_cb_dma) qla4xxx_update_local_ifcb() 594 ha->host_no, __func__)); qla4xxx_update_local_ifcb() 601 ha->acb_version = init_fw_cb->acb_version; qla4xxx_update_local_ifcb() 602 ha->firmware_options = le16_to_cpu(init_fw_cb->fw_options); qla4xxx_update_local_ifcb() 603 ha->heartbeat_interval = init_fw_cb->hb_interval; qla4xxx_update_local_ifcb() 604 memcpy(ha->name_string, init_fw_cb->iscsi_name, qla4xxx_update_local_ifcb() 605 min(sizeof(ha->name_string), qla4xxx_update_local_ifcb() 607 ha->def_timeout = le16_to_cpu(init_fw_cb->def_timeout); qla4xxx_update_local_ifcb() 608 /*memcpy(ha->alias, init_fw_cb->Alias, qla4xxx_update_local_ifcb() 609 min(sizeof(ha->alias), sizeof(init_fw_cb->Alias)));*/ qla4xxx_update_local_ifcb() 611 qla4xxx_update_local_ip(ha, init_fw_cb); qla4xxx_update_local_ifcb() 618 * @ha: Pointer to host adapter structure. 620 int qla4xxx_initialize_fw_cb(struct scsi_qla_host * ha) qla4xxx_initialize_fw_cb() argument 628 init_fw_cb = dma_alloc_coherent(&ha->pdev->dev, qla4xxx_initialize_fw_cb() 633 ha->host_no, __func__)); qla4xxx_initialize_fw_cb() 642 if (qla4xxx_get_ifcb(ha, &mbox_cmd[0], &mbox_sts[0], init_fw_cb_dma) != qla4xxx_initialize_fw_cb() 644 dma_free_coherent(&ha->pdev->dev, qla4xxx_initialize_fw_cb() 651 init_fw_cb->rqq_consumer_idx = cpu_to_le16(ha->request_out); qla4xxx_initialize_fw_cb() 652 init_fw_cb->compq_producer_idx = cpu_to_le16(ha->response_in); qla4xxx_initialize_fw_cb() 655 init_fw_cb->rqq_addr_lo = cpu_to_le32(LSDW(ha->request_dma)); qla4xxx_initialize_fw_cb() 656 init_fw_cb->rqq_addr_hi = cpu_to_le32(MSDW(ha->request_dma)); qla4xxx_initialize_fw_cb() 657 init_fw_cb->compq_addr_lo = cpu_to_le32(LSDW(ha->response_dma)); qla4xxx_initialize_fw_cb() 658 init_fw_cb->compq_addr_hi = cpu_to_le32(MSDW(ha->response_dma)); qla4xxx_initialize_fw_cb() 659 init_fw_cb->shdwreg_addr_lo = cpu_to_le32(LSDW(ha->shadow_regs_dma)); qla4xxx_initialize_fw_cb() 660 init_fw_cb->shdwreg_addr_hi = cpu_to_le32(MSDW(ha->shadow_regs_dma)); qla4xxx_initialize_fw_cb() 667 if (is_qla80XX(ha)) qla4xxx_initialize_fw_cb() 679 if (qla4xxx_set_ifcb(ha, &mbox_cmd[0], &mbox_sts[0], init_fw_cb_dma) qla4xxx_initialize_fw_cb() 683 ha->host_no, __func__)); qla4xxx_initialize_fw_cb() 687 if (qla4xxx_update_local_ifcb(ha, &mbox_cmd[0], &mbox_sts[0], qla4xxx_initialize_fw_cb() 690 ha->host_no, __func__)); qla4xxx_initialize_fw_cb() 696 dma_free_coherent(&ha->pdev->dev, sizeof(struct addr_ctrl_blk), qla4xxx_initialize_fw_cb() 704 * @ha: Pointer to host adapter structure. 706 int qla4xxx_get_dhcp_ip_address(struct scsi_qla_host * ha) qla4xxx_get_dhcp_ip_address() argument 713 init_fw_cb = dma_alloc_coherent(&ha->pdev->dev, qla4xxx_get_dhcp_ip_address() 717 printk("scsi%ld: %s: Unable to alloc init_cb\n", ha->host_no, qla4xxx_get_dhcp_ip_address() 724 if (qla4xxx_get_ifcb(ha, &mbox_cmd[0], &mbox_sts[0], init_fw_cb_dma) != qla4xxx_get_dhcp_ip_address() 727 ha->host_no, __func__)); qla4xxx_get_dhcp_ip_address() 728 dma_free_coherent(&ha->pdev->dev, qla4xxx_get_dhcp_ip_address() 735 qla4xxx_update_local_ip(ha, init_fw_cb); qla4xxx_get_dhcp_ip_address() 736 dma_free_coherent(&ha->pdev->dev, sizeof(struct addr_ctrl_blk), qla4xxx_get_dhcp_ip_address() 744 * @ha: Pointer to host adapter structure. 746 int qla4xxx_get_firmware_state(struct scsi_qla_host * ha) qla4xxx_get_firmware_state() argument 757 if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 4, &mbox_cmd[0], &mbox_sts[0]) != qla4xxx_get_firmware_state() 760 "status %04X\n", ha->host_no, __func__, qla4xxx_get_firmware_state() 764 ha->firmware_state = mbox_sts[1]; qla4xxx_get_firmware_state() 765 ha->board_id = mbox_sts[2]; qla4xxx_get_firmware_state() 766 ha->addl_fw_state = mbox_sts[3]; qla4xxx_get_firmware_state() 768 ha->host_no, __func__, ha->firmware_state);) qla4xxx_get_firmware_state() 775 * @ha: Pointer to host adapter structure. 777 int qla4xxx_get_firmware_status(struct scsi_qla_host * ha) qla4xxx_get_firmware_status() argument 788 if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 3, &mbox_cmd[0], &mbox_sts[0]) != qla4xxx_get_firmware_status() 791 "status %04X\n", ha->host_no, __func__, qla4xxx_get_firmware_status() 797 ha->iocb_hiwat = mbox_sts[2]; qla4xxx_get_firmware_status() 798 DEBUG2(ql4_printk(KERN_INFO, ha, qla4xxx_get_firmware_status() 800 ha->iocb_hiwat)); qla4xxx_get_firmware_status() 802 if (ha->iocb_hiwat > IOCB_HIWAT_CUSHION) qla4xxx_get_firmware_status() 803 ha->iocb_hiwat -= IOCB_HIWAT_CUSHION; qla4xxx_get_firmware_status() 808 if (ha->iocb_hiwat == 0) { qla4xxx_get_firmware_status() 809 ha->iocb_hiwat = REQUEST_QUEUE_DEPTH / 4; qla4xxx_get_firmware_status() 810 DEBUG2(ql4_printk(KERN_WARNING, ha, qla4xxx_get_firmware_status() 812 ha->iocb_hiwat)); qla4xxx_get_firmware_status() 820 * @ha: Pointer to host adapter structure. 827 int qla4xxx_get_fwddb_entry(struct scsi_qla_host *ha, qla4xxx_get_fwddb_entry() argument 846 ha->host_no, __func__, fw_ddb_index)); qla4xxx_get_fwddb_entry() 860 if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 7, &mbox_cmd[0], &mbox_sts[0]) == qla4xxx_get_fwddb_entry() 863 " with status 0x%04X\n", ha->host_no, __func__, qla4xxx_get_fwddb_entry() 869 ha->host_no, __func__, fw_ddb_index, qla4xxx_get_fwddb_entry() 876 ql4_printk(KERN_INFO, ha, "%s: DDB[%d] MB0 %04x Tot %d " qla4xxx_get_fwddb_entry() 885 ql4_printk(KERN_INFO, ha, "%s: DDB[%d] MB0 %04x Tot %d " qla4xxx_get_fwddb_entry() 921 int qla4xxx_conn_open(struct scsi_qla_host *ha, uint16_t fw_ddb_index) qla4xxx_conn_open() argument 933 status = qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 2, &mbox_cmd[0], qla4xxx_conn_open() 935 DEBUG2(ql4_printk(KERN_INFO, ha, qla4xxx_conn_open() 943 * @ha: Pointer to host adapter structure. 951 int qla4xxx_set_ddb_entry(struct scsi_qla_host * ha, uint16_t fw_ddb_index, qla4xxx_set_ddb_entry() argument 970 status = qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 5, &mbox_cmd[0], qla4xxx_set_ddb_entry() 975 ha->host_no, __func__, status, mbox_sts[0], mbox_sts[4]);) qla4xxx_set_ddb_entry() 980 int qla4xxx_session_logout_ddb(struct scsi_qla_host *ha, qla4xxx_session_logout_ddb() argument 994 status = qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 2, &mbox_cmd[0], qla4xxx_session_logout_ddb() 997 DEBUG2(ql4_printk(KERN_INFO, ha, qla4xxx_session_logout_ddb() 1012 * @ha: Pointer to host adapter structure. 1016 void qla4xxx_get_crash_record(struct scsi_qla_host * ha) qla4xxx_get_crash_record() argument 1030 if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 5, &mbox_cmd[0], &mbox_sts[0]) != qla4xxx_get_crash_record() 1033 ha->host_no, __func__)); qla4xxx_get_crash_record() 1039 ha->host_no, __func__)); qla4xxx_get_crash_record() 1044 crash_record = dma_alloc_coherent(&ha->pdev->dev, crash_record_size, qla4xxx_get_crash_record() 1058 if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 5, &mbox_cmd[0], &mbox_sts[0]) != qla4xxx_get_crash_record() 1066 dma_free_coherent(&ha->pdev->dev, crash_record_size, qla4xxx_get_crash_record() 1072 * @ha: Pointer to host adapter structure. 1074 void qla4xxx_get_conn_event_log(struct scsi_qla_host * ha) qla4xxx_get_conn_event_log() argument 1092 if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 5, &mbox_cmd[0], &mbox_sts[0]) != qla4xxx_get_conn_event_log() 1101 event_log = dma_alloc_coherent(&ha->pdev->dev, event_log_size, qla4xxx_get_conn_event_log() 1114 if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 5, &mbox_cmd[0], &mbox_sts[0]) != qla4xxx_get_conn_event_log() 1117 "log!\n", ha->host_no, __func__)); qla4xxx_get_conn_event_log() 1131 ha->host_no, num_valid_entries)); qla4xxx_get_conn_event_log() 1160 dma_free_coherent(&ha->pdev->dev, event_log_size, event_log, qla4xxx_get_conn_event_log() 1166 * @ha: Pointer to host adapter structure. 1173 int qla4xxx_abort_task(struct scsi_qla_host *ha, struct srb *srb) qla4xxx_abort_task() argument 1189 spin_lock_irqsave(&ha->hardware_lock, flags); qla4xxx_abort_task() 1191 spin_unlock_irqrestore(&ha->hardware_lock, flags); qla4xxx_abort_task() 1203 qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 5, &mbox_cmd[0], qla4xxx_abort_task() 1210 ha->host_no, cmd->device->id, cmd->device->lun, mbox_sts[0], qla4xxx_abort_task() 1219 * @ha: Pointer to host adapter structure. 1227 int qla4xxx_reset_lun(struct scsi_qla_host * ha, struct ddb_entry * ddb_entry, qla4xxx_reset_lun() argument 1235 DEBUG2(printk("scsi%ld:%d:%llu: lun reset issued\n", ha->host_no, qla4xxx_reset_lun() 1256 qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 1, &mbox_cmd[0], &mbox_sts[0]); qla4xxx_reset_lun() 1266 * @ha: Pointer to host adapter structure. 1274 int qla4xxx_reset_target(struct scsi_qla_host *ha, qla4xxx_reset_target() argument 1281 DEBUG2(printk("scsi%ld:%d: target reset issued\n", ha->host_no, qla4xxx_reset_target() 1295 qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 1, &mbox_cmd[0], qla4xxx_reset_target() 1304 int qla4xxx_get_flash(struct scsi_qla_host * ha, dma_addr_t dma_addr, qla4xxx_get_flash() argument 1319 if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 2, &mbox_cmd[0], &mbox_sts[0]) != qla4xxx_get_flash() 1322 "status %04X %04X, offset %08x, len %08x\n", ha->host_no, qla4xxx_get_flash() 1331 * @ha: Pointer to host adapter structure. 1337 int qla4xxx_about_firmware(struct scsi_qla_host *ha) qla4xxx_about_firmware() argument 1345 about_fw = dma_alloc_coherent(&ha->pdev->dev, qla4xxx_about_firmware() 1349 DEBUG2(ql4_printk(KERN_ERR, ha, "%s: Unable to alloc memory " qla4xxx_about_firmware() 1363 status = qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, MBOX_REG_COUNT, qla4xxx_about_firmware() 1366 DEBUG2(ql4_printk(KERN_WARNING, ha, "%s: MBOX_CMD_ABOUT_FW " qla4xxx_about_firmware() 1373 ha->fw_info.fw_major = le16_to_cpu(about_fw->fw_major); qla4xxx_about_firmware() 1374 ha->fw_info.fw_minor = le16_to_cpu(about_fw->fw_minor); qla4xxx_about_firmware() 1375 ha->fw_info.fw_patch = le16_to_cpu(about_fw->fw_patch); qla4xxx_about_firmware() 1376 ha->fw_info.fw_build = le16_to_cpu(about_fw->fw_build); qla4xxx_about_firmware() 1377 memcpy(ha->fw_info.fw_build_date, about_fw->fw_build_date, qla4xxx_about_firmware() 1379 memcpy(ha->fw_info.fw_build_time, about_fw->fw_build_time, qla4xxx_about_firmware() 1381 strcpy((char *)ha->fw_info.fw_build_user, qla4xxx_about_firmware() 1383 ha->fw_info.fw_load_source = le16_to_cpu(about_fw->fw_load_source); qla4xxx_about_firmware() 1384 ha->fw_info.iscsi_major = le16_to_cpu(about_fw->iscsi_major); qla4xxx_about_firmware() 1385 ha->fw_info.iscsi_minor = le16_to_cpu(about_fw->iscsi_minor); qla4xxx_about_firmware() 1386 ha->fw_info.bootload_major = le16_to_cpu(about_fw->bootload_major); qla4xxx_about_firmware() 1387 ha->fw_info.bootload_minor = le16_to_cpu(about_fw->bootload_minor); qla4xxx_about_firmware() 1388 ha->fw_info.bootload_patch = le16_to_cpu(about_fw->bootload_patch); qla4xxx_about_firmware() 1389 ha->fw_info.bootload_build = le16_to_cpu(about_fw->bootload_build); qla4xxx_about_firmware() 1390 strcpy((char *)ha->fw_info.extended_timestamp, qla4xxx_about_firmware() 1393 ha->fw_uptime_secs = le32_to_cpu(mbox_sts[5]); qla4xxx_about_firmware() 1394 ha->fw_uptime_msecs = le32_to_cpu(mbox_sts[6]); qla4xxx_about_firmware() 1398 dma_free_coherent(&ha->pdev->dev, sizeof(struct about_fw_info), qla4xxx_about_firmware() 1403 int qla4xxx_get_default_ddb(struct scsi_qla_host *ha, uint32_t options, qla4xxx_get_default_ddb() argument 1417 if (qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 1, &mbox_cmd[0], &mbox_sts[0]) != qla4xxx_get_default_ddb() 1420 ha->host_no, __func__, mbox_sts[0])); qla4xxx_get_default_ddb() 1426 int qla4xxx_req_ddb_entry(struct scsi_qla_host *ha, uint32_t ddb_index, qla4xxx_req_ddb_entry() argument 1439 status = qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 1, &mbox_cmd[0], qla4xxx_req_ddb_entry() 1442 DEBUG2(ql4_printk(KERN_ERR, ha, "%s: failed status %04X\n", qla4xxx_req_ddb_entry() 1450 int qla4xxx_clear_ddb_entry(struct scsi_qla_host *ha, uint32_t ddb_index) qla4xxx_clear_ddb_entry() argument 1462 status = qla4xxx_mailbox_command(ha, 2, 1, &mbox_cmd[0], qla4xxx_clear_ddb_entry() 1465 DEBUG2(ql4_printk(KERN_ERR, ha, "%s: failed status %04X\n", qla4xxx_clear_ddb_entry() 1472 int qla4xxx_set_flash(struct scsi_qla_host *ha, dma_addr_t dma_addr, qla4xxx_set_flash() argument 1489 status = qla4xxx_mailbox_command(ha, 6, 2, &mbox_cmd[0], &mbox_sts[0]); qla4xxx_set_flash() 1491 DEBUG2(ql4_printk(KERN_WARNING, ha, "%s: MBOX_CMD_WRITE_FLASH " qla4xxx_set_flash() 1498 int qla4xxx_bootdb_by_index(struct scsi_qla_host *ha, qla4xxx_bootdb_by_index() argument 1512 DEBUG2(ql4_printk(KERN_ERR, ha, qla4xxx_bootdb_by_index() 1518 if (qla4xxx_get_flash(ha, fw_ddb_entry_dma, dev_db_start_offset, qla4xxx_bootdb_by_index() 1520 ql4_printk(KERN_ERR, ha, "scsi%ld: %s: Get Flash" qla4xxx_bootdb_by_index() 1521 "failed\n", ha->host_no, __func__); qla4xxx_bootdb_by_index() 1532 int qla4xxx_flashdb_by_index(struct scsi_qla_host *ha, qla4xxx_flashdb_by_index() argument 1542 if (is_qla40XX(ha)) { qla4xxx_flashdb_by_index() 1547 (ha->hw.flt_region_ddb << 2); qla4xxx_flashdb_by_index() 1551 if (ha->port_num == 1) qla4xxx_flashdb_by_index() 1552 dev_db_start_offset += (ha->hw.flt_ddb_size / 2); qla4xxx_flashdb_by_index() 1555 (ha->hw.flt_ddb_size / 2); qla4xxx_flashdb_by_index() 1561 DEBUG2(ql4_printk(KERN_ERR, ha, qla4xxx_flashdb_by_index() 1567 if (qla4xxx_get_flash(ha, fw_ddb_entry_dma, dev_db_start_offset, qla4xxx_flashdb_by_index() 1569 ql4_printk(KERN_ERR, ha, "scsi%ld: %s: Get Flash failed\n", qla4xxx_flashdb_by_index() 1570 ha->host_no, __func__); qla4xxx_flashdb_by_index() 1581 int qla4xxx_get_chap(struct scsi_qla_host *ha, char *username, char *password, qla4xxx_get_chap() argument 1590 chap_table = dma_pool_alloc(ha->chap_dma_pool, GFP_KERNEL, &chap_dma); qla4xxx_get_chap() 1597 if (is_qla40XX(ha)) qla4xxx_get_chap() 1600 offset = FLASH_RAW_ACCESS_ADDR + (ha->hw.flt_region_chap << 2); qla4xxx_get_chap() 1604 if (ha->port_num == 1) qla4xxx_get_chap() 1605 offset += (ha->hw.flt_chap_size / 2); qla4xxx_get_chap() 1609 rval = qla4xxx_get_flash(ha, chap_dma, offset, chap_size); qla4xxx_get_chap() 1615 DEBUG2(ql4_printk(KERN_INFO, ha, "Chap Cookie: x%x\n", qla4xxx_get_chap() 1619 ql4_printk(KERN_ERR, ha, "No valid chap entry found\n"); qla4xxx_get_chap() 1628 dma_pool_free(ha->chap_dma_pool, chap_table, chap_dma); qla4xxx_get_chap() 1634 * @ha: pointer to adapter structure 1644 int qla4xxx_set_chap(struct scsi_qla_host *ha, char *username, char *password, qla4xxx_set_chap() argument 1654 chap_table = dma_pool_alloc(ha->chap_dma_pool, GFP_KERNEL, &chap_dma); qla4xxx_set_chap() 1670 if (is_qla40XX(ha)) { qla4xxx_set_chap() 1676 chap_size = ha->hw.flt_chap_size / 2; qla4xxx_set_chap() 1677 offset = FLASH_RAW_ACCESS_ADDR + (ha->hw.flt_region_chap << 2); qla4xxx_set_chap() 1678 if (ha->port_num == 1) qla4xxx_set_chap() 1683 rval = qla4xxx_set_flash(ha, chap_dma, offset, qla4xxx_set_chap() 1687 if (rval == QLA_SUCCESS && ha->chap_list) { qla4xxx_set_chap() 1688 /* Update ha chap_list cache */ qla4xxx_set_chap() 1689 memcpy((struct ql4_chap_table *)ha->chap_list + idx, qla4xxx_set_chap() 1692 dma_pool_free(ha->chap_dma_pool, chap_table, chap_dma); qla4xxx_set_chap() 1701 int qla4xxx_get_uni_chap_at_index(struct scsi_qla_host *ha, char *username, qla4xxx_get_uni_chap_at_index() argument 1708 if (!ha->chap_list) { qla4xxx_get_uni_chap_at_index() 1709 ql4_printk(KERN_ERR, ha, "Do not have CHAP table cache\n"); qla4xxx_get_uni_chap_at_index() 1715 ql4_printk(KERN_ERR, ha, "No memory for username & secret\n"); qla4xxx_get_uni_chap_at_index() 1720 if (is_qla80XX(ha)) qla4xxx_get_uni_chap_at_index() 1721 max_chap_entries = (ha->hw.flt_chap_size / 2) / qla4xxx_get_uni_chap_at_index() 1727 ql4_printk(KERN_ERR, ha, "Invalid Chap index\n"); qla4xxx_get_uni_chap_at_index() 1732 mutex_lock(&ha->chap_sem); qla4xxx_get_uni_chap_at_index() 1733 chap_table = (struct ql4_chap_table *)ha->chap_list + chap_index; qla4xxx_get_uni_chap_at_index() 1740 ql4_printk(KERN_ERR, ha, "Unidirectional entry not set\n"); qla4xxx_get_uni_chap_at_index() 1751 mutex_unlock(&ha->chap_sem); qla4xxx_get_uni_chap_at_index() 1758 * @ha: pointer to adapter structure 1768 int qla4xxx_get_chap_index(struct scsi_qla_host *ha, char *username, qla4xxx_get_chap_index() argument 1777 if (is_qla80XX(ha)) qla4xxx_get_chap_index() 1778 max_chap_entries = (ha->hw.flt_chap_size / 2) / qla4xxx_get_chap_index() 1783 if (!ha->chap_list) { qla4xxx_get_chap_index() 1784 ql4_printk(KERN_ERR, ha, "Do not have CHAP table cache\n"); qla4xxx_get_chap_index() 1789 ql4_printk(KERN_ERR, ha, "Do not have username and psw\n"); qla4xxx_get_chap_index() 1793 mutex_lock(&ha->chap_sem); qla4xxx_get_chap_index() 1795 chap_table = (struct ql4_chap_table *)ha->chap_list + i; qla4xxx_get_chap_index() 1823 rval = qla4xxx_set_chap(ha, username, password, qla4xxx_get_chap_index() 1831 mutex_unlock(&ha->chap_sem); qla4xxx_get_chap_index() 1838 int qla4xxx_conn_close_sess_logout(struct scsi_qla_host *ha, qla4xxx_conn_close_sess_logout() argument 1855 status = qla4xxx_mailbox_command(ha, 4, 2, &mbox_cmd[0], &mbox_sts[0]); qla4xxx_conn_close_sess_logout() 1857 DEBUG2(ql4_printk(KERN_WARNING, ha, "%s: MBOX_CMD_CONN_CLOSE " qla4xxx_conn_close_sess_logout() 1866 * @ha: Pointer to host adapter structure. 1871 static int qla4_84xx_extend_idc_tmo(struct scsi_qla_host *ha, uint32_t ext_tmo) qla4_84xx_extend_idc_tmo() argument 1882 mbox_cmd[1] = ((ha->idc_info.request_desc & 0xfffff0ff) | qla4_84xx_extend_idc_tmo() 1884 mbox_cmd[2] = ha->idc_info.info1; qla4_84xx_extend_idc_tmo() 1885 mbox_cmd[3] = ha->idc_info.info2; qla4_84xx_extend_idc_tmo() 1886 mbox_cmd[4] = ha->idc_info.info3; qla4_84xx_extend_idc_tmo() 1888 status = qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, MBOX_REG_COUNT, qla4_84xx_extend_idc_tmo() 1891 DEBUG2(ql4_printk(KERN_INFO, ha, qla4_84xx_extend_idc_tmo() 1893 ha->host_no, __func__, mbox_sts[0])); qla4_84xx_extend_idc_tmo() 1896 ql4_printk(KERN_INFO, ha, "%s: IDC timeout extended by %d secs\n", qla4_84xx_extend_idc_tmo() 1903 int qla4xxx_disable_acb(struct scsi_qla_host *ha) qla4xxx_disable_acb() argument 1914 status = qla4xxx_mailbox_command(ha, 8, 5, &mbox_cmd[0], &mbox_sts[0]); qla4xxx_disable_acb() 1916 DEBUG2(ql4_printk(KERN_WARNING, ha, "%s: MBOX_CMD_DISABLE_ACB " qla4xxx_disable_acb() 1920 if (is_qla8042(ha) && qla4xxx_disable_acb() 1921 test_bit(DPC_POST_IDC_ACK, &ha->dpc_flags) && qla4xxx_disable_acb() 1930 qla4_84xx_extend_idc_tmo(ha, IDC_EXTEND_TOV); qla4xxx_disable_acb() 1931 if (!wait_for_completion_timeout(&ha->disable_acb_comp, qla4xxx_disable_acb() 1933 ql4_printk(KERN_WARNING, ha, "%s: Disable ACB Completion not received\n", qla4xxx_disable_acb() 1941 int qla4xxx_get_acb(struct scsi_qla_host *ha, dma_addr_t acb_dma, qla4xxx_get_acb() argument 1957 status = qla4xxx_mailbox_command(ha, 5, 5, &mbox_cmd[0], &mbox_sts[0]); qla4xxx_get_acb() 1959 DEBUG2(ql4_printk(KERN_WARNING, ha, "%s: MBOX_CMD_GET_ACB " qla4xxx_get_acb() 1966 int qla4xxx_set_acb(struct scsi_qla_host *ha, uint32_t *mbox_cmd, qla4xxx_set_acb() argument 1979 status = qla4xxx_mailbox_command(ha, 5, 5, &mbox_cmd[0], &mbox_sts[0]); qla4xxx_set_acb() 1981 DEBUG2(ql4_printk(KERN_WARNING, ha, "%s: MBOX_CMD_SET_ACB " qla4xxx_set_acb() 1988 int qla4xxx_set_param_ddbentry(struct scsi_qla_host *ha, qla4xxx_set_param_ddbentry() argument 2008 fw_ddb_entry = dma_alloc_coherent(&ha->pdev->dev, sizeof(*fw_ddb_entry), qla4xxx_set_param_ddbentry() 2011 DEBUG2(ql4_printk(KERN_ERR, ha, qla4xxx_set_param_ddbentry() 2026 status = qla4xxx_get_default_ddb(ha, options, fw_ddb_entry_dma); qla4xxx_set_param_ddbentry() 2035 DEBUG2(ql4_printk(KERN_INFO, ha, "ISID [%02x%02x%02x%02x%02x%02x]\n", qla4xxx_set_param_ddbentry() 2061 DEBUG2(ql4_printk(KERN_INFO, ha, qla4xxx_set_param_ddbentry() 2071 DEBUG2(ql4_printk(KERN_INFO, ha, qla4xxx_set_param_ddbentry() 2076 ql4_printk(KERN_ERR, ha, qla4xxx_set_param_ddbentry() 2088 rval = qla4xxx_get_chap_index(ha, sess->username, qla4xxx_set_param_ddbentry() 2103 rval = qla4xxx_get_chap_index(ha, sess->username_in, qla4xxx_set_param_ddbentry() 2142 status = qla4xxx_set_ddb_entry(ha, ddb_entry->fw_ddb_index, qla4xxx_set_param_ddbentry() 2148 dma_free_coherent(&ha->pdev->dev, sizeof(*fw_ddb_entry), qla4xxx_set_param_ddbentry() 2154 int qla4xxx_get_mgmt_data(struct scsi_qla_host *ha, uint16_t fw_ddb_index, qla4xxx_get_mgmt_data() argument 2169 status = qla4xxx_mailbox_command(ha, 5, 1, &mbox_cmd[0], &mbox_sts[0]); qla4xxx_get_mgmt_data() 2171 DEBUG2(ql4_printk(KERN_WARNING, ha, qla4xxx_get_mgmt_data() 2179 int qla4xxx_get_ip_state(struct scsi_qla_host *ha, uint32_t acb_idx, qla4xxx_get_ip_state() argument 2192 status = qla4xxx_mailbox_command(ha, 3, 8, &mbox_cmd[0], &mbox_sts[0]); qla4xxx_get_ip_state() 2194 DEBUG2(ql4_printk(KERN_WARNING, ha, "%s: " qla4xxx_get_ip_state() 2202 int qla4xxx_get_nvram(struct scsi_qla_host *ha, dma_addr_t nvram_dma, qla4xxx_get_nvram() argument 2218 status = qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 1, &mbox_cmd[0], qla4xxx_get_nvram() 2221 DEBUG2(ql4_printk(KERN_ERR, ha, "scsi%ld: %s: failed " qla4xxx_get_nvram() 2222 "status %04X\n", ha->host_no, __func__, qla4xxx_get_nvram() 2228 int qla4xxx_set_nvram(struct scsi_qla_host *ha, dma_addr_t nvram_dma, qla4xxx_set_nvram() argument 2244 status = qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 1, &mbox_cmd[0], qla4xxx_set_nvram() 2247 DEBUG2(ql4_printk(KERN_ERR, ha, "scsi%ld: %s: failed " qla4xxx_set_nvram() 2248 "status %04X\n", ha->host_no, __func__, qla4xxx_set_nvram() 2254 int qla4xxx_restore_factory_defaults(struct scsi_qla_host *ha, qla4xxx_restore_factory_defaults() argument 2270 status = qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 3, &mbox_cmd[0], qla4xxx_restore_factory_defaults() 2273 DEBUG2(ql4_printk(KERN_ERR, ha, "scsi%ld: %s: failed " qla4xxx_restore_factory_defaults() 2274 "status %04X\n", ha->host_no, __func__, qla4xxx_restore_factory_defaults() 2282 * @ha: Pointer to host adapter structure. 2285 int qla4_8xxx_set_param(struct scsi_qla_host *ha, int param) qla4_8xxx_set_param() argument 2300 ql4_printk(KERN_ERR, ha, "%s: invalid parameter 0x%x\n", qla4_8xxx_set_param() 2306 status = qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 2, mbox_cmd, qla4_8xxx_set_param() 2309 ql4_printk(KERN_ERR, ha, "%s: failed status %04X\n", qla4_8xxx_set_param() 2318 * @ha: Pointer to host adapter structure. 2322 int qla4_83xx_post_idc_ack(struct scsi_qla_host *ha) qla4_83xx_post_idc_ack() argument 2332 mbox_cmd[1] = ha->idc_info.request_desc; qla4_83xx_post_idc_ack() 2333 mbox_cmd[2] = ha->idc_info.info1; qla4_83xx_post_idc_ack() 2334 mbox_cmd[3] = ha->idc_info.info2; qla4_83xx_post_idc_ack() 2335 mbox_cmd[4] = ha->idc_info.info3; qla4_83xx_post_idc_ack() 2337 status = qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, MBOX_REG_COUNT, qla4_83xx_post_idc_ack() 2340 ql4_printk(KERN_ERR, ha, "%s: failed status %04X\n", __func__, qla4_83xx_post_idc_ack() 2343 ql4_printk(KERN_INFO, ha, "%s: IDC ACK posted\n", __func__); qla4_83xx_post_idc_ack() 2348 int qla4_84xx_config_acb(struct scsi_qla_host *ha, int acb_config) qla4_84xx_config_acb() argument 2357 acb = dma_alloc_coherent(&ha->pdev->dev, qla4_84xx_config_acb() 2361 ql4_printk(KERN_ERR, ha, "%s: Unable to alloc acb\n", __func__); qla4_84xx_config_acb() 2369 rval = qla4xxx_get_acb(ha, acb_dma, 0, acb_len); qla4_84xx_config_acb() 2373 rval = qla4xxx_disable_acb(ha); qla4_84xx_config_acb() 2377 if (!ha->saved_acb) qla4_84xx_config_acb() 2378 ha->saved_acb = kzalloc(acb_len, GFP_KERNEL); qla4_84xx_config_acb() 2380 if (!ha->saved_acb) { qla4_84xx_config_acb() 2381 ql4_printk(KERN_ERR, ha, "%s: Unable to alloc acb\n", qla4_84xx_config_acb() 2386 memcpy(ha->saved_acb, acb, acb_len); qla4_84xx_config_acb() 2390 if (!ha->saved_acb) { qla4_84xx_config_acb() 2391 ql4_printk(KERN_ERR, ha, "%s: Can't set ACB, Saved ACB not available\n", qla4_84xx_config_acb() 2397 memcpy(acb, ha->saved_acb, acb_len); qla4_84xx_config_acb() 2399 rval = qla4xxx_set_acb(ha, &mbox_cmd[0], &mbox_sts[0], acb_dma); qla4_84xx_config_acb() 2405 ql4_printk(KERN_ERR, ha, "%s: Invalid ACB Configuration\n", qla4_84xx_config_acb() 2410 dma_free_coherent(&ha->pdev->dev, sizeof(struct addr_ctrl_blk), acb, qla4_84xx_config_acb() 2413 if ((acb_config == ACB_CONFIG_SET) && ha->saved_acb) { qla4_84xx_config_acb() 2414 kfree(ha->saved_acb); qla4_84xx_config_acb() 2415 ha->saved_acb = NULL; qla4_84xx_config_acb() 2417 DEBUG2(ql4_printk(KERN_INFO, ha, qla4_84xx_config_acb() 2423 int qla4_83xx_get_port_config(struct scsi_qla_host *ha, uint32_t *config) qla4_83xx_get_port_config() argument 2434 status = qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, MBOX_REG_COUNT, qla4_83xx_get_port_config() 2439 ql4_printk(KERN_ERR, ha, "%s: failed status %04X\n", __func__, qla4_83xx_get_port_config() 2445 int qla4_83xx_set_port_config(struct scsi_qla_host *ha, uint32_t *config) qla4_83xx_set_port_config() argument 2457 status = qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, MBOX_REG_COUNT, qla4_83xx_set_port_config() 2460 ql4_printk(KERN_ERR, ha, "%s: failed status %04X\n", __func__, qla4_83xx_set_port_config()
H A D	ql4_iocb.c	16 qla4xxx_space_in_req_ring(struct scsi_qla_host *ha, uint16_t req_cnt) qla4xxx_space_in_req_ring() argument 21 if ((req_cnt + 2) >= ha->req_q_count) { qla4xxx_space_in_req_ring() 22 cnt = (uint16_t) ha->isp_ops->rd_shdw_req_q_out(ha); qla4xxx_space_in_req_ring() 23 if (ha->request_in < cnt) qla4xxx_space_in_req_ring() 24 ha->req_q_count = cnt - ha->request_in; qla4xxx_space_in_req_ring() 26 ha->req_q_count = REQUEST_QUEUE_DEPTH - qla4xxx_space_in_req_ring() 27 (ha->request_in - cnt); qla4xxx_space_in_req_ring() 31 if ((req_cnt + 2) < ha->req_q_count) qla4xxx_space_in_req_ring() 37 static void qla4xxx_advance_req_ring_ptr(struct scsi_qla_host *ha) qla4xxx_advance_req_ring_ptr() argument 40 if (ha->request_in == (REQUEST_QUEUE_DEPTH - 1)) { qla4xxx_advance_req_ring_ptr() 41 ha->request_in = 0; qla4xxx_advance_req_ring_ptr() 42 ha->request_ptr = ha->request_ring; qla4xxx_advance_req_ring_ptr() 44 ha->request_in++; qla4xxx_advance_req_ring_ptr() 45 ha->request_ptr++; qla4xxx_advance_req_ring_ptr() 51 * @ha: Pointer to host adapter structure. 59 static int qla4xxx_get_req_pkt(struct scsi_qla_host *ha, qla4xxx_get_req_pkt() argument 64 if (qla4xxx_space_in_req_ring(ha, req_cnt)) { qla4xxx_get_req_pkt() 65 *queue_entry = ha->request_ptr; qla4xxx_get_req_pkt() 68 qla4xxx_advance_req_ring_ptr(ha); qla4xxx_get_req_pkt() 69 ha->req_q_count -= req_cnt; qla4xxx_get_req_pkt() 78 * @ha: Pointer to host adapter structure. 85 int qla4xxx_send_marker_iocb(struct scsi_qla_host *ha, qla4xxx_send_marker_iocb() argument 93 spin_lock_irqsave(&ha->hardware_lock, flags); qla4xxx_send_marker_iocb() 96 if (qla4xxx_get_req_pkt(ha, (struct queue_entry **) &marker_entry) != qla4xxx_send_marker_iocb() 111 ha->isp_ops->queue_iocb(ha); qla4xxx_send_marker_iocb() 114 spin_unlock_irqrestore(&ha->hardware_lock, flags); qla4xxx_send_marker_iocb() 119 qla4xxx_alloc_cont_entry(struct scsi_qla_host *ha) qla4xxx_alloc_cont_entry() argument 123 cont_entry = (struct continuation_t1_entry *)ha->request_ptr; qla4xxx_alloc_cont_entry() 125 qla4xxx_advance_req_ring_ptr(ha); qla4xxx_alloc_cont_entry() 130 cont_entry->hdr.systemDefined = (uint8_t) cpu_to_le16(ha->request_in); qla4xxx_alloc_cont_entry() 152 struct scsi_qla_host *ha; qla4xxx_build_scsi_iocbs() local 160 ha = srb->ha; qla4xxx_build_scsi_iocbs() 178 cont_entry = qla4xxx_alloc_cont_entry(ha); scsi_for_each_sg() 195 void qla4_83xx_queue_iocb(struct scsi_qla_host *ha) qla4_83xx_queue_iocb() argument 197 writel(ha->request_in, &ha->qla4_83xx_reg->req_q_in); qla4_83xx_queue_iocb() 198 readl(&ha->qla4_83xx_reg->req_q_in); qla4_83xx_queue_iocb() 201 void qla4_83xx_complete_iocb(struct scsi_qla_host *ha) qla4_83xx_complete_iocb() argument 203 writel(ha->response_out, &ha->qla4_83xx_reg->rsp_q_out); qla4_83xx_complete_iocb() 204 readl(&ha->qla4_83xx_reg->rsp_q_out); qla4_83xx_complete_iocb() 209 * @ha: pointer to host adapter structure. 214 void qla4_82xx_queue_iocb(struct scsi_qla_host *ha) qla4_82xx_queue_iocb() argument 218 dbval = 0x14 | (ha->func_num << 5); qla4_82xx_queue_iocb() 219 dbval = dbval | (0 << 8) | (ha->request_in << 16); qla4_82xx_queue_iocb() 221 qla4_82xx_wr_32(ha, ha->nx_db_wr_ptr, ha->request_in); qla4_82xx_queue_iocb() 226 * @ha: pointer to host adapter structure. 232 void qla4_82xx_complete_iocb(struct scsi_qla_host *ha) qla4_82xx_complete_iocb() argument 234 writel(ha->response_out, &ha->qla4_82xx_reg->rsp_q_out); qla4_82xx_complete_iocb() 235 readl(&ha->qla4_82xx_reg->rsp_q_out); qla4_82xx_complete_iocb() 240 * @ha: pointer to host adapter structure. 245 void qla4xxx_queue_iocb(struct scsi_qla_host *ha) qla4xxx_queue_iocb() argument 247 writel(ha->request_in, &ha->reg->req_q_in); qla4xxx_queue_iocb() 248 readl(&ha->reg->req_q_in); qla4xxx_queue_iocb() 253 * @ha: pointer to host adapter structure. 259 void qla4xxx_complete_iocb(struct scsi_qla_host *ha) qla4xxx_complete_iocb() argument 261 writel(ha->response_out, &ha->reg->rsp_q_out); qla4xxx_complete_iocb() 262 readl(&ha->reg->rsp_q_out); qla4xxx_complete_iocb() 267 * @ha: pointer to host adapter structure. 273 int qla4xxx_send_command_to_isp(struct scsi_qla_host *ha, struct srb * srb) qla4xxx_send_command_to_isp() argument 290 spin_lock_irqsave(&ha->hardware_lock, flags); qla4xxx_send_command_to_isp() 300 if (!test_bit(AF_ONLINE, &ha->flags)) { qla4xxx_send_command_to_isp() 303 ha->host_no, __func__)); qla4xxx_send_command_to_isp() 314 if (!qla4xxx_space_in_req_ring(ha, req_cnt)) qla4xxx_send_command_to_isp() 318 if ((ha->iocb_cnt + req_cnt) >= ha->iocb_hiwat) qla4xxx_send_command_to_isp() 322 cmd_entry = (struct command_t3_entry *) ha->request_ptr; qla4xxx_send_command_to_isp() 345 ha->bytes_xfered += scsi_bufflen(cmd); qla4xxx_send_command_to_isp() 346 if (ha->bytes_xfered & ~0xFFFFF){ qla4xxx_send_command_to_isp() 347 ha->total_mbytes_xferred += ha->bytes_xfered >> 20; qla4xxx_send_command_to_isp() 348 ha->bytes_xfered &= 0xFFFFF; qla4xxx_send_command_to_isp() 355 qla4xxx_advance_req_ring_ptr(ha); qla4xxx_send_command_to_isp() 366 ha->iocb_cnt += req_cnt; qla4xxx_send_command_to_isp() 368 ha->req_q_count -= req_cnt; qla4xxx_send_command_to_isp() 370 ha->isp_ops->queue_iocb(ha); qla4xxx_send_command_to_isp() 371 spin_unlock_irqrestore(&ha->hardware_lock, flags); qla4xxx_send_command_to_isp() 379 spin_unlock_irqrestore(&ha->hardware_lock, flags); qla4xxx_send_command_to_isp() 389 struct scsi_qla_host *ha = ddb_entry->ha; qla4xxx_send_passthru0() local 395 spin_lock_irqsave(&ha->hardware_lock, flags); qla4xxx_send_passthru0() 398 if (!qla4xxx_space_in_req_ring(ha, task_data->iocb_req_cnt)) qla4xxx_send_passthru0() 401 passthru_iocb = (struct passthru0 *) ha->request_ptr; qla4xxx_send_passthru0() 437 qla4xxx_advance_req_ring_ptr(ha); qla4xxx_send_passthru0() 441 ha->iocb_cnt += task_data->iocb_req_cnt; qla4xxx_send_passthru0() 442 ha->req_q_count -= task_data->iocb_req_cnt; qla4xxx_send_passthru0() 443 ha->isp_ops->queue_iocb(ha); qla4xxx_send_passthru0() 447 spin_unlock_irqrestore(&ha->hardware_lock, flags); qla4xxx_send_passthru0() 451 static struct mrb *qla4xxx_get_new_mrb(struct scsi_qla_host *ha) qla4xxx_get_new_mrb() argument 459 mrb->ha = ha; qla4xxx_get_new_mrb() 463 static int qla4xxx_send_mbox_iocb(struct scsi_qla_host *ha, struct mrb *mrb, qla4xxx_send_mbox_iocb() argument 472 spin_lock_irqsave(&ha->hardware_lock, flags); qla4xxx_send_mbox_iocb() 475 rval = qla4xxx_get_req_pkt(ha, (struct queue_entry **) &(mrb->mbox)); qla4xxx_send_mbox_iocb() 479 index = ha->mrb_index; qla4xxx_send_mbox_iocb() 485 if (ha->active_mrb_array[index] == NULL) { qla4xxx_send_mbox_iocb() 486 ha->mrb_index = index; qla4xxx_send_mbox_iocb() 492 ha->active_mrb_array[index] = mrb; qla4xxx_send_mbox_iocb() 500 ha->iocb_cnt += mrb->iocb_cnt; qla4xxx_send_mbox_iocb() 501 ha->isp_ops->queue_iocb(ha); qla4xxx_send_mbox_iocb() 503 spin_unlock_irqrestore(&ha->hardware_lock, flags); qla4xxx_send_mbox_iocb() 507 int qla4xxx_ping_iocb(struct scsi_qla_host *ha, uint32_t options, qla4xxx_ping_iocb() argument 516 mrb = qla4xxx_get_new_mrb(ha); qla4xxx_ping_iocb() 518 DEBUG2(ql4_printk(KERN_WARNING, ha, "%s: fail to get new mrb\n", qla4xxx_ping_iocb() 533 rval = qla4xxx_send_mbox_iocb(ha, mrb, in_mbox); qla4xxx_ping_iocb()
H A D	ql4_bsg.c	16 struct scsi_qla_host *ha = to_qla_host(host); qla4xxx_read_flash() local 27 if (unlikely(pci_channel_offline(ha->pdev))) qla4xxx_read_flash() 30 if (ql4xxx_reset_active(ha)) { qla4xxx_read_flash() 31 ql4_printk(KERN_ERR, ha, "%s: reset active\n", __func__); qla4xxx_read_flash() 36 if (ha->flash_state != QLFLASH_WAITING) { qla4xxx_read_flash() 37 ql4_printk(KERN_ERR, ha, "%s: another flash operation " qla4xxx_read_flash() 43 ha->flash_state = QLFLASH_READING; qla4xxx_read_flash() 47 flash = dma_alloc_coherent(&ha->pdev->dev, length, &flash_dma, qla4xxx_read_flash() 50 ql4_printk(KERN_ERR, ha, "%s: dma alloc failed for flash " qla4xxx_read_flash() 56 rval = qla4xxx_get_flash(ha, flash_dma, offset, length); qla4xxx_read_flash() 58 ql4_printk(KERN_ERR, ha, "%s: get flash failed\n", __func__); qla4xxx_read_flash() 71 dma_free_coherent(&ha->pdev->dev, length, flash, flash_dma); qla4xxx_read_flash() 73 ha->flash_state = QLFLASH_WAITING; qla4xxx_read_flash() 81 struct scsi_qla_host *ha = to_qla_host(host); qla4xxx_update_flash() local 93 if (unlikely(pci_channel_offline(ha->pdev))) qla4xxx_update_flash() 96 if (ql4xxx_reset_active(ha)) { qla4xxx_update_flash() 97 ql4_printk(KERN_ERR, ha, "%s: reset active\n", __func__); qla4xxx_update_flash() 102 if (ha->flash_state != QLFLASH_WAITING) { qla4xxx_update_flash() 103 ql4_printk(KERN_ERR, ha, "%s: another flash operation " qla4xxx_update_flash() 109 ha->flash_state = QLFLASH_WRITING; qla4xxx_update_flash() 114 flash = dma_alloc_coherent(&ha->pdev->dev, length, &flash_dma, qla4xxx_update_flash() 117 ql4_printk(KERN_ERR, ha, "%s: dma alloc failed for flash " qla4xxx_update_flash() 126 rval = qla4xxx_set_flash(ha, flash_dma, offset, length, options); qla4xxx_update_flash() 128 ql4_printk(KERN_ERR, ha, "%s: set flash failed\n", __func__); qla4xxx_update_flash() 136 dma_free_coherent(&ha->pdev->dev, length, flash, flash_dma); qla4xxx_update_flash() 138 ha->flash_state = QLFLASH_WAITING; qla4xxx_update_flash() 146 struct scsi_qla_host *ha = to_qla_host(host); qla4xxx_get_acb_state() local 156 if (unlikely(pci_channel_offline(ha->pdev))) qla4xxx_get_acb_state() 160 if (is_qla4010(ha)) qla4xxx_get_acb_state() 163 if (ql4xxx_reset_active(ha)) { qla4xxx_get_acb_state() 164 ql4_printk(KERN_ERR, ha, "%s: reset active\n", __func__); qla4xxx_get_acb_state() 170 ql4_printk(KERN_ERR, ha, "%s: invalid payload len %d\n", qla4xxx_get_acb_state() 179 rval = qla4xxx_get_ip_state(ha, acb_idx, ip_idx, status); qla4xxx_get_acb_state() 181 ql4_printk(KERN_ERR, ha, "%s: get ip state failed\n", qla4xxx_get_acb_state() 203 struct scsi_qla_host *ha = to_qla_host(host); qla4xxx_read_nvram() local 215 if (unlikely(pci_channel_offline(ha->pdev))) qla4xxx_read_nvram() 219 if (!(is_qla4010(ha) || is_qla4022(ha) || is_qla4032(ha))) qla4xxx_read_nvram() 222 if (ql4xxx_reset_active(ha)) { qla4xxx_read_nvram() 223 ql4_printk(KERN_ERR, ha, "%s: reset active\n", __func__); qla4xxx_read_nvram() 233 if ((is_qla4010(ha) && total_len > QL4010_NVRAM_SIZE) || qla4xxx_read_nvram() 234 ((is_qla4022(ha) || is_qla4032(ha)) && qla4xxx_read_nvram() 236 ql4_printk(KERN_ERR, ha, "%s: offset+len greater than max" qla4xxx_read_nvram() 242 nvram = dma_alloc_coherent(&ha->pdev->dev, len, &nvram_dma, qla4xxx_read_nvram() 245 ql4_printk(KERN_ERR, ha, "%s: dma alloc failed for nvram " qla4xxx_read_nvram() 251 rval = qla4xxx_get_nvram(ha, nvram_dma, offset, len); qla4xxx_read_nvram() 253 ql4_printk(KERN_ERR, ha, "%s: get nvram failed\n", __func__); qla4xxx_read_nvram() 266 dma_free_coherent(&ha->pdev->dev, len, nvram, nvram_dma); qla4xxx_read_nvram() 275 struct scsi_qla_host *ha = to_qla_host(host); qla4xxx_update_nvram() local 287 if (unlikely(pci_channel_offline(ha->pdev))) qla4xxx_update_nvram() 290 if (!(is_qla4010(ha) || is_qla4022(ha) || is_qla4032(ha))) qla4xxx_update_nvram() 293 if (ql4xxx_reset_active(ha)) { qla4xxx_update_nvram() 294 ql4_printk(KERN_ERR, ha, "%s: reset active\n", __func__); qla4xxx_update_nvram() 304 if ((is_qla4010(ha) && total_len > QL4010_NVRAM_SIZE) || qla4xxx_update_nvram() 305 ((is_qla4022(ha) || is_qla4032(ha)) && qla4xxx_update_nvram() 307 ql4_printk(KERN_ERR, ha, "%s: offset+len greater than max" qla4xxx_update_nvram() 313 nvram = dma_alloc_coherent(&ha->pdev->dev, len, &nvram_dma, qla4xxx_update_nvram() 316 ql4_printk(KERN_ERR, ha, "%s: dma alloc failed for flash " qla4xxx_update_nvram() 325 rval = qla4xxx_set_nvram(ha, nvram_dma, offset, len); qla4xxx_update_nvram() 327 ql4_printk(KERN_ERR, ha, "%s: set nvram failed\n", __func__); qla4xxx_update_nvram() 335 dma_free_coherent(&ha->pdev->dev, len, nvram, nvram_dma); qla4xxx_update_nvram() 344 struct scsi_qla_host *ha = to_qla_host(host); qla4xxx_restore_defaults() local 354 if (unlikely(pci_channel_offline(ha->pdev))) qla4xxx_restore_defaults() 357 if (is_qla4010(ha)) qla4xxx_restore_defaults() 360 if (ql4xxx_reset_active(ha)) { qla4xxx_restore_defaults() 361 ql4_printk(KERN_ERR, ha, "%s: reset active\n", __func__); qla4xxx_restore_defaults() 370 rval = qla4xxx_restore_factory_defaults(ha, region, field0, field1); qla4xxx_restore_defaults() 372 ql4_printk(KERN_ERR, ha, "%s: set nvram failed\n", __func__); qla4xxx_restore_defaults() 388 struct scsi_qla_host *ha = to_qla_host(host); qla4xxx_bsg_get_acb() local 399 if (unlikely(pci_channel_offline(ha->pdev))) qla4xxx_bsg_get_acb() 403 if (is_qla4010(ha)) qla4xxx_bsg_get_acb() 406 if (ql4xxx_reset_active(ha)) { qla4xxx_bsg_get_acb() 407 ql4_printk(KERN_ERR, ha, "%s: reset active\n", __func__); qla4xxx_bsg_get_acb() 415 ql4_printk(KERN_ERR, ha, "%s: invalid acb len %d\n", qla4xxx_bsg_get_acb() 421 acb = dma_alloc_coherent(&ha->pdev->dev, len, &acb_dma, GFP_KERNEL); qla4xxx_bsg_get_acb() 423 ql4_printk(KERN_ERR, ha, "%s: dma alloc failed for acb " qla4xxx_bsg_get_acb() 429 rval = qla4xxx_get_acb(ha, acb_dma, acb_type, len); qla4xxx_bsg_get_acb() 431 ql4_printk(KERN_ERR, ha, "%s: get acb failed\n", __func__); qla4xxx_bsg_get_acb() 444 dma_free_coherent(&ha->pdev->dev, len, acb, acb_dma); qla4xxx_bsg_get_acb() 452 struct scsi_qla_host *ha = to_qla_host(host); ql4xxx_execute_diag_cmd() local 460 DEBUG2(ql4_printk(KERN_INFO, ha, "%s: in\n", __func__)); ql4xxx_execute_diag_cmd() 462 if (test_bit(DPC_RESET_HA, &ha->dpc_flags)) { ql4xxx_execute_diag_cmd() 463 ql4_printk(KERN_INFO, ha, "%s: Adapter reset in progress. Invalid Request\n", ql4xxx_execute_diag_cmd() 473 DEBUG2(ql4_printk(KERN_INFO, ha, ql4xxx_execute_diag_cmd() 479 status = qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 8, &mbox_cmd[0], ql4xxx_execute_diag_cmd() 482 DEBUG2(ql4_printk(KERN_INFO, ha, ql4xxx_execute_diag_cmd() 499 DEBUG2(ql4_printk(KERN_INFO, ha, ql4xxx_execute_diag_cmd() 507 static int qla4_83xx_wait_for_loopback_config_comp(struct scsi_qla_host *ha, qla4_83xx_wait_for_loopback_config_comp() argument 512 if (!wait_for_completion_timeout(&ha->idc_comp, (IDC_COMP_TOV * HZ))) { qla4_83xx_wait_for_loopback_config_comp() 513 ql4_printk(KERN_INFO, ha, "%s: IDC Complete notification not received, Waiting for another %d timeout", qla4_83xx_wait_for_loopback_config_comp() 514 __func__, ha->idc_extend_tmo); qla4_83xx_wait_for_loopback_config_comp() 515 if (ha->idc_extend_tmo) { qla4_83xx_wait_for_loopback_config_comp() 516 if (!wait_for_completion_timeout(&ha->idc_comp, qla4_83xx_wait_for_loopback_config_comp() 517 (ha->idc_extend_tmo * HZ))) { qla4_83xx_wait_for_loopback_config_comp() 518 ha->notify_idc_comp = 0; qla4_83xx_wait_for_loopback_config_comp() 519 ha->notify_link_up_comp = 0; qla4_83xx_wait_for_loopback_config_comp() 520 ql4_printk(KERN_WARNING, ha, "%s: Aborting: IDC Complete notification not received", qla4_83xx_wait_for_loopback_config_comp() 525 DEBUG2(ql4_printk(KERN_INFO, ha, qla4_83xx_wait_for_loopback_config_comp() 531 DEBUG2(ql4_printk(KERN_INFO, ha, qla4_83xx_wait_for_loopback_config_comp() 535 ha->notify_idc_comp = 0; qla4_83xx_wait_for_loopback_config_comp() 538 if (!wait_for_completion_timeout(&ha->link_up_comp, qla4_83xx_wait_for_loopback_config_comp() 540 ha->notify_link_up_comp = 0; qla4_83xx_wait_for_loopback_config_comp() 541 ql4_printk(KERN_WARNING, ha, "%s: Aborting: LINK UP notification not received", qla4_83xx_wait_for_loopback_config_comp() 546 DEBUG2(ql4_printk(KERN_INFO, ha, qla4_83xx_wait_for_loopback_config_comp() 550 ha->notify_link_up_comp = 0; qla4_83xx_wait_for_loopback_config_comp() 557 static int qla4_83xx_pre_loopback_config(struct scsi_qla_host *ha, qla4_83xx_pre_loopback_config() argument 563 DEBUG2(ql4_printk(KERN_INFO, ha, "%s: in\n", __func__)); qla4_83xx_pre_loopback_config() 565 status = qla4_83xx_get_port_config(ha, &config); qla4_83xx_pre_loopback_config() 569 DEBUG2(ql4_printk(KERN_INFO, ha, "%s: Default port config=%08X\n", qla4_83xx_pre_loopback_config() 574 ql4_printk(KERN_INFO, ha, "%s: Loopback diagnostics already in progress. Invalid requiest\n", qla4_83xx_pre_loopback_config() 587 DEBUG2(ql4_printk(KERN_INFO, ha, "%s: New port config=%08X\n", qla4_83xx_pre_loopback_config() 590 ha->notify_idc_comp = 1; qla4_83xx_pre_loopback_config() 591 ha->notify_link_up_comp = 1; qla4_83xx_pre_loopback_config() 594 qla4xxx_get_firmware_state(ha); qla4_83xx_pre_loopback_config() 596 status = qla4_83xx_set_port_config(ha, &config); qla4_83xx_pre_loopback_config() 598 ha->notify_idc_comp = 0; qla4_83xx_pre_loopback_config() 599 ha->notify_link_up_comp = 0; qla4_83xx_pre_loopback_config() 603 DEBUG2(ql4_printk(KERN_INFO, ha, "%s: status = %s\n", __func__, qla4_83xx_pre_loopback_config() 608 static int qla4_83xx_post_loopback_config(struct scsi_qla_host *ha, qla4_83xx_post_loopback_config() argument 614 DEBUG2(ql4_printk(KERN_INFO, ha, "%s: in\n", __func__)); qla4_83xx_post_loopback_config() 616 status = qla4_83xx_get_port_config(ha, &config); qla4_83xx_post_loopback_config() 620 DEBUG2(ql4_printk(KERN_INFO, ha, "%s: port config=%08X\n", __func__, qla4_83xx_post_loopback_config() 630 DEBUG2(ql4_printk(KERN_INFO, ha, qla4_83xx_post_loopback_config() 634 ha->notify_idc_comp = 1; qla4_83xx_post_loopback_config() 635 if (ha->addl_fw_state & FW_ADDSTATE_LINK_UP) qla4_83xx_post_loopback_config() 636 ha->notify_link_up_comp = 1; qla4_83xx_post_loopback_config() 638 status = qla4_83xx_set_port_config(ha, &config); qla4_83xx_post_loopback_config() 640 ql4_printk(KERN_INFO, ha, "%s: Scheduling adapter reset\n", qla4_83xx_post_loopback_config() 642 set_bit(DPC_RESET_HA, &ha->dpc_flags); qla4_83xx_post_loopback_config() 643 clear_bit(AF_LOOPBACK, &ha->flags); qla4_83xx_post_loopback_config() 648 DEBUG2(ql4_printk(KERN_INFO, ha, "%s: status = %s\n", __func__, qla4_83xx_post_loopback_config() 656 struct scsi_qla_host *ha = to_qla_host(host); qla4xxx_execute_diag_loopback_cmd() local 665 DEBUG2(ql4_printk(KERN_INFO, ha, "%s: in\n", __func__)); qla4xxx_execute_diag_loopback_cmd() 669 if (test_bit(AF_LOOPBACK, &ha->flags)) { qla4xxx_execute_diag_loopback_cmd() 670 ql4_printk(KERN_INFO, ha, "%s: Loopback Diagnostics already in progress. Invalid Request\n", qla4xxx_execute_diag_loopback_cmd() 676 if (test_bit(DPC_RESET_HA, &ha->dpc_flags)) { qla4xxx_execute_diag_loopback_cmd() 677 ql4_printk(KERN_INFO, ha, "%s: Adapter reset in progress. Invalid Request\n", qla4xxx_execute_diag_loopback_cmd() 686 if (is_qla8032(ha) || is_qla8042(ha)) { qla4xxx_execute_diag_loopback_cmd() 687 status = qla4_83xx_pre_loopback_config(ha, mbox_cmd); qla4xxx_execute_diag_loopback_cmd() 693 status = qla4_83xx_wait_for_loopback_config_comp(ha, qla4xxx_execute_diag_loopback_cmd() 701 DEBUG2(ql4_printk(KERN_INFO, ha, qla4xxx_execute_diag_loopback_cmd() 707 status = qla4xxx_mailbox_command(ha, MBOX_REG_COUNT, 8, &mbox_cmd[0], qla4xxx_execute_diag_loopback_cmd() 715 DEBUG2(ql4_printk(KERN_INFO, ha, qla4xxx_execute_diag_loopback_cmd() 726 if (is_qla8032(ha) || is_qla8042(ha)) { qla4xxx_execute_diag_loopback_cmd() 727 status = qla4_83xx_post_loopback_config(ha, mbox_cmd); qla4xxx_execute_diag_loopback_cmd() 735 if (!(ha->addl_fw_state & FW_ADDSTATE_LINK_UP)) qla4xxx_execute_diag_loopback_cmd() 738 status = qla4_83xx_wait_for_loopback_config_comp(ha, qla4xxx_execute_diag_loopback_cmd() 746 DEBUG2(ql4_printk(KERN_INFO, ha, qla4xxx_execute_diag_loopback_cmd() 756 struct scsi_qla_host *ha = to_qla_host(host); qla4xxx_execute_diag_test() local 761 DEBUG2(ql4_printk(KERN_INFO, ha, "%s: in\n", __func__)); qla4xxx_execute_diag_test() 790 ql4_printk(KERN_ERR, ha, "%s: Invalid diag test: 0x%x\n", qla4xxx_execute_diag_test() 799 ql4_printk(KERN_ERR, ha, "%s: Invalid diag cmd: 0x%x\n", qla4xxx_execute_diag_test() 815 struct scsi_qla_host *ha = to_qla_host(host); qla4xxx_process_vendor_specific() local 843 ql4_printk(KERN_ERR, ha, "%s: invalid BSG vendor command: " qla4xxx_process_vendor_specific() 861 struct scsi_qla_host *ha = to_qla_host(host); qla4xxx_bsg_request() local 868 ql4_printk(KERN_ERR, ha, "%s: invalid BSG command: 0x%x\n", qla4xxx_bsg_request()
H A D	ql4_os.c	100 static int qla4xxx_wait_for_hba_online(struct scsi_qla_host *ha); 104 static void qla4xxx_config_dma_addressing(struct scsi_qla_host *ha); 270 struct scsi_qla_host *ha = to_qla_host(shost); qla4xxx_send_ping() local 283 DEBUG2(ql4_printk(KERN_INFO, ha, "%s: IPv4 Ping src: %pI4 " qla4xxx_send_ping() 285 &ha->ip_config.ip_address, ipaddr)); qla4xxx_send_ping() 286 rval = qla4xxx_ping_iocb(ha, options, payload_size, pid, qla4xxx_send_ping() 300 DEBUG2(ql4_printk(KERN_INFO, ha, "%s: LinkLocal Ping " qla4xxx_send_ping() 302 &ha->ip_config.ipv6_link_local_addr, qla4xxx_send_ping() 305 rval = qla4xxx_ping_iocb(ha, options, payload_size, qla4xxx_send_ping() 308 ql4_printk(KERN_WARNING, ha, "%s: iface num = %d " qla4xxx_send_ping() 322 DEBUG2(ql4_printk(KERN_INFO, ha, "%s: IPv6 " qla4xxx_send_ping() 325 &ha->ip_config.ipv6_addr0, qla4xxx_send_ping() 329 DEBUG2(ql4_printk(KERN_INFO, ha, "%s: IPv6 " qla4xxx_send_ping() 332 &ha->ip_config.ipv6_addr1, qla4xxx_send_ping() 335 rval = qla4xxx_ping_iocb(ha, options, payload_size, qla4xxx_send_ping() 573 * @ha: pointer to adapter structure 581 static void qla4xxx_create_chap_list(struct scsi_qla_host *ha) qla4xxx_create_chap_list() argument 589 if (is_qla40XX(ha)) qla4xxx_create_chap_list() 595 chap_size = ha->hw.flt_chap_size / 2; qla4xxx_create_chap_list() 597 chap_flash_data = dma_alloc_coherent(&ha->pdev->dev, chap_size, qla4xxx_create_chap_list() 600 ql4_printk(KERN_ERR, ha, "No memory for chap_flash_data\n"); qla4xxx_create_chap_list() 604 if (is_qla40XX(ha)) { qla4xxx_create_chap_list() 607 offset = FLASH_RAW_ACCESS_ADDR + (ha->hw.flt_region_chap << 2); qla4xxx_create_chap_list() 608 if (ha->port_num == 1) qla4xxx_create_chap_list() 612 rval = qla4xxx_get_flash(ha, chap_dma, offset, chap_size); qla4xxx_create_chap_list() 616 if (ha->chap_list == NULL) qla4xxx_create_chap_list() 617 ha->chap_list = vmalloc(chap_size); qla4xxx_create_chap_list() 618 if (ha->chap_list == NULL) { qla4xxx_create_chap_list() 619 ql4_printk(KERN_ERR, ha, "No memory for ha->chap_list\n"); qla4xxx_create_chap_list() 623 memset(ha->chap_list, 0, chap_size); qla4xxx_create_chap_list() 624 memcpy(ha->chap_list, chap_flash_data, chap_size); qla4xxx_create_chap_list() 627 dma_free_coherent(&ha->pdev->dev, chap_size, chap_flash_data, chap_dma); qla4xxx_create_chap_list() 630 static int qla4xxx_get_chap_by_index(struct scsi_qla_host *ha, qla4xxx_get_chap_by_index() argument 637 if (!ha->chap_list) { qla4xxx_get_chap_by_index() 638 ql4_printk(KERN_ERR, ha, "CHAP table cache is empty!\n"); qla4xxx_get_chap_by_index() 643 if (is_qla80XX(ha)) qla4xxx_get_chap_by_index() 644 max_chap_entries = (ha->hw.flt_chap_size / 2) / qla4xxx_get_chap_by_index() 650 ql4_printk(KERN_ERR, ha, "Invalid Chap index\n"); qla4xxx_get_chap_by_index() 655 *chap_entry = (struct ql4_chap_table *)ha->chap_list + chap_index; qla4xxx_get_chap_by_index() 670 * @ha: pointer to adapter structure 677 static int qla4xxx_find_free_chap_index(struct scsi_qla_host *ha, qla4xxx_find_free_chap_index() argument 685 if (is_qla80XX(ha)) qla4xxx_find_free_chap_index() 686 max_chap_entries = (ha->hw.flt_chap_size / 2) / qla4xxx_find_free_chap_index() 691 if (!ha->chap_list) { qla4xxx_find_free_chap_index() 692 ql4_printk(KERN_ERR, ha, "CHAP table cache is empty!\n"); qla4xxx_find_free_chap_index() 698 chap_table = (struct ql4_chap_table *)ha->chap_list + i; qla4xxx_find_free_chap_index() 722 struct scsi_qla_host *ha = to_qla_host(shost); qla4xxx_get_chap_list() local 729 if (is_qla80XX(ha)) qla4xxx_get_chap_list() 730 max_chap_entries = (ha->hw.flt_chap_size / 2) / qla4xxx_get_chap_list() 735 ql4_printk(KERN_INFO, ha, "%s: num_entries = %d, CHAP idx = %d\n", qla4xxx_get_chap_list() 743 qla4xxx_create_chap_list(ha); qla4xxx_get_chap_list() 746 mutex_lock(&ha->chap_sem); qla4xxx_get_chap_list() 748 chap_table = (struct ql4_chap_table *)ha->chap_list + i; qla4xxx_get_chap_list() 774 mutex_unlock(&ha->chap_sem); qla4xxx_get_chap_list() 777 ql4_printk(KERN_INFO, ha, "%s: Valid CHAP Entries = %d\n", qla4xxx_get_chap_list() 821 struct scsi_qla_host *ha = to_qla_host(shost); qla4xxx_delete_chap() local 829 chap_table = dma_pool_alloc(ha->chap_dma_pool, GFP_KERNEL, &chap_dma); qla4xxx_delete_chap() 835 if (is_qla80XX(ha)) qla4xxx_delete_chap() 836 max_chap_entries = (ha->hw.flt_chap_size / 2) / qla4xxx_delete_chap() 850 ql4_printk(KERN_INFO, ha, "CHAP entry %d is in use, cannot " qla4xxx_delete_chap() 857 if (is_qla40XX(ha)) qla4xxx_delete_chap() 860 offset = FLASH_RAW_ACCESS_ADDR + (ha->hw.flt_region_chap << 2); qla4xxx_delete_chap() 864 if (ha->port_num == 1) qla4xxx_delete_chap() 865 offset += (ha->hw.flt_chap_size / 2); qla4xxx_delete_chap() 869 ret = qla4xxx_get_flash(ha, chap_dma, offset, chap_size); qla4xxx_delete_chap() 875 DEBUG2(ql4_printk(KERN_INFO, ha, "Chap Cookie: x%x\n", qla4xxx_delete_chap() 879 ql4_printk(KERN_ERR, ha, "No valid chap entry found\n"); qla4xxx_delete_chap() 887 ret = qla4xxx_set_flash(ha, chap_dma, offset, chap_size, qla4xxx_delete_chap() 889 if (ret == QLA_SUCCESS && ha->chap_list) { qla4xxx_delete_chap() 890 mutex_lock(&ha->chap_sem); qla4xxx_delete_chap() 891 /* Update ha chap_list cache */ qla4xxx_delete_chap() 892 memcpy((struct ql4_chap_table *)ha->chap_list + chap_tbl_idx, qla4xxx_delete_chap() 894 mutex_unlock(&ha->chap_sem); qla4xxx_delete_chap() 900 dma_pool_free(ha->chap_dma_pool, chap_table, chap_dma); qla4xxx_delete_chap() 914 struct scsi_qla_host *ha = to_qla_host(shost); qla4xxx_set_chap_entry() local 951 ql4_printk(KERN_ERR, ha, nla_for_each_attr() 963 if (is_qla80XX(ha)) 964 max_chap_entries = (ha->hw.flt_chap_size / 2) / 969 mutex_lock(&ha->chap_sem); 971 rc = qla4xxx_get_chap_by_index(ha, chap_rec.chap_tbl_idx, 975 ql4_printk(KERN_INFO, ha, 986 ql4_printk(KERN_INFO, ha, 994 rc = qla4xxx_find_free_chap_index(ha, &chap_rec.chap_tbl_idx); 996 ql4_printk(KERN_INFO, ha, "CHAP entry not available\n"); 1002 rc = qla4xxx_set_chap(ha, chap_rec.username, chap_rec.password, 1006 mutex_unlock(&ha->chap_sem); 1015 struct scsi_qla_host *ha = to_qla_host(shost); qla4xxx_get_host_stats() local 1024 DEBUG2(ql4_printk(KERN_INFO, ha, "Func: %s\n", __func__)); qla4xxx_get_host_stats() 1029 ql4_printk(KERN_INFO, ha, "%s: host_stats size mismatch expected = %d, is = %d\n", qla4xxx_get_host_stats() 1043 ql_iscsi_stats = dma_alloc_coherent(&ha->pdev->dev, stats_size, qla4xxx_get_host_stats() 1046 ql4_printk(KERN_ERR, ha, qla4xxx_get_host_stats() 1052 ret = qla4xxx_get_mgmt_data(ha, ddb_idx, stats_size, qla4xxx_get_host_stats() 1055 ql4_printk(KERN_ERR, ha, qla4xxx_get_host_stats() 1209 dma_free_coherent(&ha->pdev->dev, host_stats_size, qla4xxx_get_host_stats() 1212 ql4_printk(KERN_INFO, ha, "%s: Get host stats done\n", qla4xxx_get_host_stats() 1222 struct scsi_qla_host *ha = to_qla_host(shost); qla4xxx_get_iface_param() local 1230 len = sprintf(buf, "%pI4\n", &ha->ip_config.ip_address); qla4xxx_get_iface_param() 1234 &ha->ip_config.subnet_mask); qla4xxx_get_iface_param() 1237 len = sprintf(buf, "%pI4\n", &ha->ip_config.gateway); qla4xxx_get_iface_param() 1241 OP_STATE(ha->ip_config.ipv4_options, qla4xxx_get_iface_param() 1244 OP_STATE(ha->ip_config.ipv6_options, qla4xxx_get_iface_param() 1252 (ha->ip_config.tcp_options & qla4xxx_get_iface_param() 1259 &ha->ip_config.ipv6_addr0); qla4xxx_get_iface_param() 1262 &ha->ip_config.ipv6_addr1); qla4xxx_get_iface_param() 1266 &ha->ip_config.ipv6_link_local_addr); qla4xxx_get_iface_param() 1270 &ha->ip_config.ipv6_default_router_addr); qla4xxx_get_iface_param() 1273 pval = (ha->ip_config.ipv6_addl_options & qla4xxx_get_iface_param() 1280 pval = (ha->ip_config.ipv6_addl_options & qla4xxx_get_iface_param() 1288 ival = ha->ip_config.ipv4_vlan_tag & qla4xxx_get_iface_param() 1291 ival = ha->ip_config.ipv6_vlan_tag & qla4xxx_get_iface_param() 1298 ival = (ha->ip_config.ipv4_vlan_tag >> 13) & qla4xxx_get_iface_param() 1301 ival = (ha->ip_config.ipv6_vlan_tag >> 13) & qla4xxx_get_iface_param() 1308 OP_STATE(ha->ip_config.ipv4_options, qla4xxx_get_iface_param() 1311 OP_STATE(ha->ip_config.ipv6_options, qla4xxx_get_iface_param() 1317 len = sprintf(buf, "%d\n", ha->ip_config.eth_mtu_size); qla4xxx_get_iface_param() 1322 ha->ip_config.ipv4_port); qla4xxx_get_iface_param() 1325 ha->ip_config.ipv6_port); qla4xxx_get_iface_param() 1330 ha->ip_config.ipv4_addr_state); qla4xxx_get_iface_param() 1334 ha->ip_config.ipv6_addr0_state); qla4xxx_get_iface_param() 1337 ha->ip_config.ipv6_addr1_state); qla4xxx_get_iface_param() 1344 ha->ip_config.ipv6_link_local_state); qla4xxx_get_iface_param() 1349 ha->ip_config.ipv6_default_router_state); qla4xxx_get_iface_param() 1354 OP_STATE(~ha->ip_config.tcp_options, qla4xxx_get_iface_param() 1357 OP_STATE(~ha->ip_config.ipv6_tcp_options, qla4xxx_get_iface_param() 1364 OP_STATE(~ha->ip_config.tcp_options, qla4xxx_get_iface_param() 1367 OP_STATE(~ha->ip_config.ipv6_tcp_options, qla4xxx_get_iface_param() 1374 OP_STATE(~ha->ip_config.tcp_options, qla4xxx_get_iface_param() 1377 OP_STATE(~ha->ip_config.ipv6_tcp_options, qla4xxx_get_iface_param() 1386 ha->ip_config.tcp_wsf); qla4xxx_get_iface_param() 1389 ha->ip_config.ipv6_tcp_wsf); qla4xxx_get_iface_param() 1393 ival = (ha->ip_config.tcp_options & qla4xxx_get_iface_param() 1396 ival = (ha->ip_config.ipv6_tcp_options & qla4xxx_get_iface_param() 1403 OP_STATE(ha->ip_config.tcp_options, qla4xxx_get_iface_param() 1406 OP_STATE(ha->ip_config.ipv6_tcp_options, qla4xxx_get_iface_param() 1414 ha->ip_config.ipv4_cache_id); qla4xxx_get_iface_param() 1417 ha->ip_config.ipv6_cache_id); qla4xxx_get_iface_param() 1420 OP_STATE(ha->ip_config.tcp_options, qla4xxx_get_iface_param() 1426 OP_STATE(ha->ip_config.tcp_options, qla4xxx_get_iface_param() 1432 OP_STATE(ha->ip_config.ipv4_options, qla4xxx_get_iface_param() 1438 len = sprintf(buf, "%d\n", ha->ip_config.ipv4_tos); qla4xxx_get_iface_param() 1441 OP_STATE(ha->ip_config.ipv4_options, qla4xxx_get_iface_param() 1447 OP_STATE(ha->ip_config.ipv4_options, IPOPT_ALT_CID_EN, qla4xxx_get_iface_param() 1453 pval = (ha->ip_config.ipv4_alt_cid_len) ? qla4xxx_get_iface_param() 1454 (char *)ha->ip_config.ipv4_alt_cid : ""; qla4xxx_get_iface_param() 1459 OP_STATE(ha->ip_config.ipv4_options, qla4xxx_get_iface_param() 1465 OP_STATE(ha->ip_config.ipv4_options, qla4xxx_get_iface_param() 1471 pval = (ha->ip_config.ipv4_vid_len) ? qla4xxx_get_iface_param() 1472 (char *)ha->ip_config.ipv4_vid : ""; qla4xxx_get_iface_param() 1477 OP_STATE(ha->ip_config.ipv4_options, qla4xxx_get_iface_param() 1483 OP_STATE(~ha->ip_config.ipv4_options, qla4xxx_get_iface_param() 1489 OP_STATE(ha->ip_config.ipv4_options, qla4xxx_get_iface_param() 1496 OP_STATE(ha->ip_config.ipv4_options, qla4xxx_get_iface_param() 1499 OP_STATE(ha->ip_config.ipv6_options, qla4xxx_get_iface_param() 1505 len = sprintf(buf, "%d\n", ha->ip_config.ipv4_ttl); qla4xxx_get_iface_param() 1508 OP_STATE(ha->ip_config.ipv6_options, qla4xxx_get_iface_param() 1514 OP_STATE(ha->ip_config.ipv6_addl_options, qla4xxx_get_iface_param() 1520 len = sprintf(buf, "%u\n", ha->ip_config.ipv6_flow_lbl); qla4xxx_get_iface_param() 1524 ha->ip_config.ipv6_traffic_class); qla4xxx_get_iface_param() 1528 ha->ip_config.ipv6_hop_limit); qla4xxx_get_iface_param() 1532 ha->ip_config.ipv6_nd_reach_time); qla4xxx_get_iface_param() 1536 ha->ip_config.ipv6_nd_rexmit_timer); qla4xxx_get_iface_param() 1540 ha->ip_config.ipv6_nd_stale_timeout); qla4xxx_get_iface_param() 1544 ha->ip_config.ipv6_dup_addr_detect_count); qla4xxx_get_iface_param() 1548 ha->ip_config.ipv6_gw_advrt_mtu); qla4xxx_get_iface_param() 1556 len = sprintf(buf, "%d\n", ha->ip_config.def_timeout); qla4xxx_get_iface_param() 1559 OP_STATE(ha->ip_config.iscsi_options, qla4xxx_get_iface_param() 1565 OP_STATE(ha->ip_config.iscsi_options, qla4xxx_get_iface_param() 1571 OP_STATE(ha->ip_config.iscsi_options, qla4xxx_get_iface_param() 1577 OP_STATE(ha->ip_config.iscsi_options, qla4xxx_get_iface_param() 1583 OP_STATE(ha->ip_config.iscsi_options, qla4xxx_get_iface_param() 1589 OP_STATE(ha->ip_config.iscsi_options, qla4xxx_get_iface_param() 1596 (ha->ip_config.iscsi_options & qla4xxx_get_iface_param() 1601 ha->ip_config.iscsi_max_pdu_size * qla4xxx_get_iface_param() 1606 ha->ip_config.iscsi_first_burst_len * qla4xxx_get_iface_param() 1611 ha->ip_config.iscsi_max_outstnd_r2t); qla4xxx_get_iface_param() 1615 ha->ip_config.iscsi_max_burst_len * qla4xxx_get_iface_param() 1619 OP_STATE(ha->ip_config.iscsi_options, qla4xxx_get_iface_param() 1625 OP_STATE(ha->ip_config.iscsi_options, qla4xxx_get_iface_param() 1631 OP_STATE(ha->ip_config.iscsi_options, qla4xxx_get_iface_param() 1637 OP_STATE(ha->ip_config.iscsi_options, qla4xxx_get_iface_param() 1643 OP_STATE(ha->ip_config.iscsi_options, qla4xxx_get_iface_param() 1649 len = sprintf(buf, "%s\n", ha->ip_config.iscsi_name); qla4xxx_get_iface_param() 1666 struct scsi_qla_host *ha; qla4xxx_ep_connect() local 1676 ha = iscsi_host_priv(shost); qla4xxx_ep_connect() 1688 DEBUG2(ql4_printk(KERN_INFO, ha, "%s: %pI4\n", __func__, qla4xxx_ep_connect() 1694 DEBUG2(ql4_printk(KERN_INFO, ha, "%s: %pI6\n", __func__, qla4xxx_ep_connect() 1697 ql4_printk(KERN_WARNING, ha, "%s: Invalid endpoint\n", qla4xxx_ep_connect() 1709 struct scsi_qla_host *ha; qla4xxx_ep_poll() local 1713 ha = to_qla_host(qla_ep->host); qla4xxx_ep_poll() 1714 DEBUG2(pr_info_ratelimited("%s: host: %ld\n", __func__, ha->host_no)); qla4xxx_ep_poll() 1716 if (adapter_up(ha) && !test_bit(AF_BUILD_DDB_LIST, &ha->flags)) qla4xxx_ep_poll() 1725 struct scsi_qla_host *ha; qla4xxx_ep_disconnect() local 1728 ha = to_qla_host(qla_ep->host); qla4xxx_ep_disconnect() 1729 DEBUG2(ql4_printk(KERN_INFO, ha, "%s: host: %ld\n", __func__, qla4xxx_ep_disconnect() 1730 ha->host_no)); qla4xxx_ep_disconnect() 1740 struct scsi_qla_host *ha; qla4xxx_get_ep_param() local 1745 ha = to_qla_host(qla_ep->host); qla4xxx_get_ep_param() 1746 DEBUG2(ql4_printk(KERN_INFO, ha, "%s: host: %ld\n", __func__, qla4xxx_get_ep_param() 1747 ha->host_no)); qla4xxx_get_ep_param() 1769 struct scsi_qla_host *ha; qla4xxx_conn_get_stats() local 1778 ha = ddb_entry->ha; qla4xxx_conn_get_stats() 1780 DEBUG2(ql4_printk(KERN_INFO, ha, "%s: host: %ld\n", __func__, qla4xxx_conn_get_stats() 1781 ha->host_no)); qla4xxx_conn_get_stats() 1784 ql_iscsi_stats = dma_alloc_coherent(&ha->pdev->dev, stats_size, qla4xxx_conn_get_stats() 1787 ql4_printk(KERN_ERR, ha, qla4xxx_conn_get_stats() 1792 ret = qla4xxx_get_mgmt_data(ha, ddb_entry->fw_ddb_index, stats_size, qla4xxx_conn_get_stats() 1795 ql4_printk(KERN_ERR, ha, qla4xxx_conn_get_stats() 1825 dma_free_coherent(&ha->pdev->dev, stats_size, ql_iscsi_stats, qla4xxx_conn_get_stats() 1851 struct scsi_qla_host *ha = to_qla_host(shost); qla4xxx_set_port_speed() local 1855 qla4xxx_get_firmware_state(ha); qla4xxx_set_port_speed() 1857 switch (ha->addl_fw_state & 0x0F00) { qla4xxx_set_port_speed() 1876 struct scsi_qla_host *ha = to_qla_host(shost); qla4xxx_set_port_state() local 1880 if (test_bit(AF_LINK_UP, &ha->flags)) qla4xxx_set_port_state() 1889 struct scsi_qla_host *ha = to_qla_host(shost); qla4xxx_host_get_param() local 1894 len = sysfs_format_mac(buf, ha->my_mac, MAC_ADDR_LEN); qla4xxx_host_get_param() 1897 len = sprintf(buf, "%pI4\n", &ha->ip_config.ip_address); qla4xxx_host_get_param() 1900 len = sprintf(buf, "%s\n", ha->name_string); qla4xxx_host_get_param() 1917 static void qla4xxx_create_ipv4_iface(struct scsi_qla_host *ha) qla4xxx_create_ipv4_iface() argument 1919 if (ha->iface_ipv4) qla4xxx_create_ipv4_iface() 1923 ha->iface_ipv4 = iscsi_create_iface(ha->host, qla4xxx_create_ipv4_iface() 1926 if (!ha->iface_ipv4) qla4xxx_create_ipv4_iface() 1927 ql4_printk(KERN_ERR, ha, "Could not create IPv4 iSCSI " qla4xxx_create_ipv4_iface() 1931 static void qla4xxx_create_ipv6_iface(struct scsi_qla_host *ha) qla4xxx_create_ipv6_iface() argument 1933 if (!ha->iface_ipv6_0) qla4xxx_create_ipv6_iface() 1935 ha->iface_ipv6_0 = iscsi_create_iface(ha->host, qla4xxx_create_ipv6_iface() 1939 if (!ha->iface_ipv6_0) qla4xxx_create_ipv6_iface() 1940 ql4_printk(KERN_ERR, ha, "Could not create IPv6 iSCSI " qla4xxx_create_ipv6_iface() 1943 if (!ha->iface_ipv6_1) qla4xxx_create_ipv6_iface() 1945 ha->iface_ipv6_1 = iscsi_create_iface(ha->host, qla4xxx_create_ipv6_iface() 1949 if (!ha->iface_ipv6_1) qla4xxx_create_ipv6_iface() 1950 ql4_printk(KERN_ERR, ha, "Could not create IPv6 iSCSI " qla4xxx_create_ipv6_iface() 1954 static void qla4xxx_create_ifaces(struct scsi_qla_host *ha) qla4xxx_create_ifaces() argument 1956 if (ha->ip_config.ipv4_options & IPOPT_IPV4_PROTOCOL_ENABLE) qla4xxx_create_ifaces() 1957 qla4xxx_create_ipv4_iface(ha); qla4xxx_create_ifaces() 1959 if (ha->ip_config.ipv6_options & IPV6_OPT_IPV6_PROTOCOL_ENABLE) qla4xxx_create_ifaces() 1960 qla4xxx_create_ipv6_iface(ha); qla4xxx_create_ifaces() 1963 static void qla4xxx_destroy_ipv4_iface(struct scsi_qla_host *ha) qla4xxx_destroy_ipv4_iface() argument 1965 if (ha->iface_ipv4) { qla4xxx_destroy_ipv4_iface() 1966 iscsi_destroy_iface(ha->iface_ipv4); qla4xxx_destroy_ipv4_iface() 1967 ha->iface_ipv4 = NULL; qla4xxx_destroy_ipv4_iface() 1971 static void qla4xxx_destroy_ipv6_iface(struct scsi_qla_host *ha) qla4xxx_destroy_ipv6_iface() argument 1973 if (ha->iface_ipv6_0) { qla4xxx_destroy_ipv6_iface() 1974 iscsi_destroy_iface(ha->iface_ipv6_0); qla4xxx_destroy_ipv6_iface() 1975 ha->iface_ipv6_0 = NULL; qla4xxx_destroy_ipv6_iface() 1977 if (ha->iface_ipv6_1) { qla4xxx_destroy_ipv6_iface() 1978 iscsi_destroy_iface(ha->iface_ipv6_1); qla4xxx_destroy_ipv6_iface() 1979 ha->iface_ipv6_1 = NULL; qla4xxx_destroy_ipv6_iface() 1983 static void qla4xxx_destroy_ifaces(struct scsi_qla_host *ha) qla4xxx_destroy_ifaces() argument 1985 qla4xxx_destroy_ipv4_iface(ha); qla4xxx_destroy_ifaces() 1986 qla4xxx_destroy_ipv6_iface(ha); qla4xxx_destroy_ifaces() 1989 static void qla4xxx_set_ipv6(struct scsi_qla_host *ha, qla4xxx_set_ipv6() argument 2034 ql4_printk(KERN_ERR, ha, qla4xxx_set_ipv6() 2051 ql4_printk(KERN_ERR, ha, qla4xxx_set_ipv6() 2067 qla4xxx_create_ipv6_iface(ha); qla4xxx_set_ipv6() 2072 qla4xxx_destroy_ipv6_iface(ha); qla4xxx_set_ipv6() 2232 ql4_printk(KERN_ERR, ha, "Unknown IPv6 param = %d\n", qla4xxx_set_ipv6() 2238 static void qla4xxx_set_ipv4(struct scsi_qla_host *ha, qla4xxx_set_ipv4() argument 2263 ql4_printk(KERN_ERR, ha, "Invalid IPv4 bootproto\n"); qla4xxx_set_ipv4() 2269 qla4xxx_create_ipv4_iface(ha); qla4xxx_set_ipv4() 2274 qla4xxx_destroy_ipv4_iface(ha); qla4xxx_set_ipv4() 2490 ql4_printk(KERN_ERR, ha, "Unknown IPv4 param = %d\n", qla4xxx_set_ipv4() 2496 static void qla4xxx_set_iscsi_param(struct scsi_qla_host *ha, qla4xxx_set_iscsi_param() argument 2652 ql4_printk(KERN_ERR, ha, "Unknown iscsi param = %d\n", qla4xxx_set_iscsi_param() 2683 struct scsi_qla_host *ha = to_qla_host(shost); qla4xxx_iface_set_param() local 2693 init_fw_cb = dma_alloc_coherent(&ha->pdev->dev, qla4xxx_iface_set_param() 2697 ql4_printk(KERN_ERR, ha, "%s: Unable to alloc init_cb\n", qla4xxx_iface_set_param() 2706 if (qla4xxx_get_ifcb(ha, &mbox_cmd[0], &mbox_sts[0], init_fw_cb_dma)) { qla4xxx_iface_set_param() 2707 ql4_printk(KERN_ERR, ha, "%s: get ifcb failed\n", __func__); qla4xxx_iface_set_param() 2720 qla4xxx_set_ipv4(ha, iface_param, nla_for_each_attr() 2725 ql4_printk(KERN_ERR, ha, nla_for_each_attr() 2735 qla4xxx_set_ipv6(ha, iface_param, nla_for_each_attr() 2740 ql4_printk(KERN_ERR, ha, nla_for_each_attr() 2747 ql4_printk(KERN_ERR, ha, nla_for_each_attr() 2752 qla4xxx_set_iscsi_param(ha, iface_param, nla_for_each_attr() 2761 rval = qla4xxx_set_flash(ha, init_fw_cb_dma, FLASH_SEGMENT_IFCB, 2765 ql4_printk(KERN_ERR, ha, "%s: set flash mbx failed\n", 2771 rval = qla4xxx_disable_acb(ha); 2773 ql4_printk(KERN_ERR, ha, "%s: disable acb mbx failed\n", 2779 wait_for_completion_timeout(&ha->disable_acb_comp, 2784 rval = qla4xxx_set_acb(ha, &mbox_cmd[0], &mbox_sts[0], init_fw_cb_dma); 2786 ql4_printk(KERN_ERR, ha, "%s: set acb mbx failed\n", 2793 qla4xxx_update_local_ifcb(ha, &mbox_cmd[0], &mbox_sts[0], init_fw_cb, 2797 dma_free_coherent(&ha->pdev->dev, sizeof(struct addr_ctrl_blk), 2808 struct scsi_qla_host *ha = ddb_entry->ha; qla4xxx_session_get_param() local 2817 rval = qla4xxx_get_chap_index(ha, sess->username_in, qla4xxx_session_get_param() 2834 rval = qla4xxx_get_chap_index(ha, sess->username, qla4xxx_session_get_param() 2853 rval = qla4xxx_get_uni_chap_at_index(ha, chap_tbl.name, qla4xxx_session_get_param() 2894 int qla4xxx_get_ddb_index(struct scsi_qla_host *ha, uint16_t *ddb_index) qla4xxx_get_ddb_index() argument 2901 tmp_ddb_index = find_first_zero_bit(ha->ddb_idx_map, MAX_DDB_ENTRIES); qla4xxx_get_ddb_index() 2904 DEBUG2(ql4_printk(KERN_INFO, ha, qla4xxx_get_ddb_index() 2910 if (test_and_set_bit(tmp_ddb_index, ha->ddb_idx_map)) qla4xxx_get_ddb_index() 2913 DEBUG2(ql4_printk(KERN_INFO, ha, qla4xxx_get_ddb_index() 2915 ret = qla4xxx_req_ddb_entry(ha, tmp_ddb_index, &mbx_sts); qla4xxx_get_ddb_index() 2918 ql4_printk(KERN_INFO, ha, qla4xxx_get_ddb_index() 2923 DEBUG2(ql4_printk(KERN_INFO, ha, qla4xxx_get_ddb_index() 2933 static int qla4xxx_match_ipaddress(struct scsi_qla_host *ha, qla4xxx_match_ipaddress() argument 2967 static int qla4xxx_match_fwdb_session(struct scsi_qla_host *ha, qla4xxx_match_fwdb_session() argument 2984 max_ddbs = is_qla40XX(ha) ? MAX_DEV_DB_ENTRIES_40XX : qla4xxx_match_fwdb_session() 2988 ddb_entry = qla4xxx_lookup_ddb_by_fw_index(ha, idx); qla4xxx_match_fwdb_session() 3003 DEBUG2(ql4_printk(KERN_INFO, ha, qla4xxx_match_fwdb_session() 3008 DEBUG2(ql4_printk(KERN_INFO, ha, qla4xxx_match_fwdb_session() 3013 DEBUG2(ql4_printk(KERN_INFO, ha, qla4xxx_match_fwdb_session() 3020 rval = qla4xxx_match_ipaddress(ha, ddb_entry, qla4xxx_match_fwdb_session() 3033 DEBUG2(ql4_printk(KERN_INFO, ha, qla4xxx_match_fwdb_session() 3044 struct scsi_qla_host *ha; qla4xxx_session_create() local 3059 ha = to_qla_host(qla_ep->host); qla4xxx_session_create() 3060 DEBUG2(ql4_printk(KERN_INFO, ha, "%s: host: %ld\n", __func__, qla4xxx_session_create() 3061 ha->host_no)); qla4xxx_session_create() 3063 ret = qla4xxx_get_ddb_index(ha, &ddb_index); qla4xxx_session_create() 3078 ddb_entry->ha = ha; qla4xxx_session_create() 3084 ha->fw_ddb_index_map[ddb_entry->fw_ddb_index] = ddb_entry; qla4xxx_session_create() 3085 ha->tot_ddbs++; qla4xxx_session_create() 3094 struct scsi_qla_host *ha; qla4xxx_session_destroy() local 3103 ha = ddb_entry->ha; qla4xxx_session_destroy() 3104 DEBUG2(ql4_printk(KERN_INFO, ha, "%s: host: %ld\n", __func__, qla4xxx_session_destroy() 3105 ha->host_no)); qla4xxx_session_destroy() 3107 fw_ddb_entry = dma_alloc_coherent(&ha->pdev->dev, sizeof(*fw_ddb_entry), qla4xxx_session_destroy() 3110 ql4_printk(KERN_ERR, ha, qla4xxx_session_destroy() 3117 ret = qla4xxx_get_fwddb_entry(ha, ddb_entry->fw_ddb_index, qla4xxx_session_destroy() 3132 qla4xxx_clear_ddb_entry(ha, ddb_entry->fw_ddb_index); qla4xxx_session_destroy() 3134 clear_bit(ddb_entry->fw_ddb_index, ha->ddb_idx_map); qla4xxx_session_destroy() 3135 spin_lock_irqsave(&ha->hardware_lock, flags); qla4xxx_session_destroy() 3136 qla4xxx_free_ddb(ha, ddb_entry); qla4xxx_session_destroy() 3137 spin_unlock_irqrestore(&ha->hardware_lock, flags); qla4xxx_session_destroy() 3142 dma_free_coherent(&ha->pdev->dev, sizeof(*fw_ddb_entry), qla4xxx_session_destroy() 3152 struct scsi_qla_host *ha; qla4xxx_conn_create() local 3166 ha = ddb_entry->ha; qla4xxx_conn_create() 3167 DEBUG2(ql4_printk(KERN_INFO, ha, "%s: conn_idx = %u\n", __func__, qla4xxx_conn_create() 3180 struct scsi_qla_host *ha; qla4xxx_conn_bind() local 3185 ha = ddb_entry->ha; qla4xxx_conn_bind() 3187 DEBUG2(ql4_printk(KERN_INFO, ha, "%s: sid = %d, cid = %d\n", __func__, qla4xxx_conn_bind() 3204 struct scsi_qla_host *ha; qla4xxx_conn_start() local 3213 ha = ddb_entry->ha; qla4xxx_conn_start() 3214 DEBUG2(ql4_printk(KERN_INFO, ha, "%s: sid = %d, cid = %d\n", __func__, qla4xxx_conn_start() 3221 ret = qla4xxx_match_fwdb_session(ha, cls_conn); qla4xxx_conn_start() 3223 ql4_printk(KERN_INFO, ha, qla4xxx_conn_start() 3229 fw_ddb_entry = dma_alloc_coherent(&ha->pdev->dev, sizeof(*fw_ddb_entry), qla4xxx_conn_start() 3232 ql4_printk(KERN_ERR, ha, qla4xxx_conn_start() 3238 ret = qla4xxx_set_param_ddbentry(ha, ddb_entry, cls_conn, &mbx_sts); qla4xxx_conn_start() 3252 ql4_printk(KERN_ERR, ha, "%s: Failed set param for index[%d]\n", qla4xxx_conn_start() 3257 status = qla4xxx_conn_open(ha, ddb_entry->fw_ddb_index); qla4xxx_conn_start() 3259 ql4_printk(KERN_ERR, ha, "%s: Login failed: %s\n", __func__, qla4xxx_conn_start() 3276 dma_free_coherent(&ha->pdev->dev, sizeof(*fw_ddb_entry), qla4xxx_conn_start() 3285 struct scsi_qla_host *ha; qla4xxx_conn_destroy() local 3291 ha = ddb_entry->ha; qla4xxx_conn_destroy() 3292 DEBUG2(ql4_printk(KERN_INFO, ha, "%s: cid = %d\n", __func__, qla4xxx_conn_destroy() 3296 if (qla4xxx_session_logout_ddb(ha, ddb_entry, options) == QLA_ERROR) qla4xxx_conn_destroy() 3297 ql4_printk(KERN_ERR, ha, "%s: Logout failed\n", __func__); qla4xxx_conn_destroy() 3303 struct scsi_qla_host *ha; qla4xxx_task_work() local 3314 ha = task_data->ha; qla4xxx_task_work() 3337 ql4_printk(KERN_ERR, ha, "Passthru failed status = 0x%x\n", qla4xxx_task_work() 3349 struct scsi_qla_host *ha; qla4xxx_alloc_pdu() local 3354 ha = ddb_entry->ha; qla4xxx_alloc_pdu() 3359 ql4_printk(KERN_INFO, ha, qla4xxx_alloc_pdu() 3365 task_data->ha = ha; qla4xxx_alloc_pdu() 3369 task_data->data_dma = dma_map_single(&ha->pdev->dev, task->data, qla4xxx_alloc_pdu() 3374 DEBUG2(ql4_printk(KERN_INFO, ha, "%s: MaxRecvLen %u, iscsi hrd %d\n", qla4xxx_alloc_pdu() 3378 task_data->resp_buffer = dma_alloc_coherent(&ha->pdev->dev, qla4xxx_alloc_pdu() 3386 task_data->req_buffer = dma_alloc_coherent(&ha->pdev->dev, qla4xxx_alloc_pdu() 3401 dma_free_coherent(&ha->pdev->dev, task_data->resp_len, qla4xxx_alloc_pdu() 3405 dma_free_coherent(&ha->pdev->dev, task_data->req_len, qla4xxx_alloc_pdu() 3415 struct scsi_qla_host *ha; qla4xxx_task_cleanup() local 3421 ha = ddb_entry->ha; qla4xxx_task_cleanup() 3425 dma_unmap_single(&ha->pdev->dev, task_data->data_dma, qla4xxx_task_cleanup() 3429 DEBUG2(ql4_printk(KERN_INFO, ha, "%s: MaxRecvLen %u, iscsi hrd %d\n", qla4xxx_task_cleanup() 3432 dma_free_coherent(&ha->pdev->dev, task_data->resp_len, qla4xxx_task_cleanup() 3434 dma_free_coherent(&ha->pdev->dev, task_data->req_len, qla4xxx_task_cleanup() 3444 struct scsi_qla_host *ha = ddb_entry->ha; qla4xxx_task_xmit() local 3449 ql4_printk(KERN_INFO, ha, "%s: scsi cmd xmit not implemented\n", qla4xxx_task_xmit() 3802 static void qla4xxx_copy_fwddb_param(struct scsi_qla_host *ha, qla4xxx_copy_fwddb_param() argument 3844 (char *)ha->name_string, buflen); qla4xxx_copy_fwddb_param() 3847 if (!qla4xxx_get_uni_chap_at_index(ha, chap_tbl.name, qla4xxx_copy_fwddb_param() 3860 void qla4xxx_update_session_conn_fwddb_param(struct scsi_qla_host *ha, qla4xxx_update_session_conn_fwddb_param() argument 3869 fw_ddb_entry = dma_alloc_coherent(&ha->pdev->dev, sizeof(*fw_ddb_entry), qla4xxx_update_session_conn_fwddb_param() 3872 ql4_printk(KERN_ERR, ha, qla4xxx_update_session_conn_fwddb_param() 3877 if (qla4xxx_get_fwddb_entry(ha, ddb_entry->fw_ddb_index, fw_ddb_entry, qla4xxx_update_session_conn_fwddb_param() 3880 DEBUG2(ql4_printk(KERN_ERR, ha, "scsi%ld: %s: failed " qla4xxx_update_session_conn_fwddb_param() 3882 ha->host_no, __func__, qla4xxx_update_session_conn_fwddb_param() 3892 qla4xxx_copy_fwddb_param(ha, fw_ddb_entry, cls_sess, cls_conn); qla4xxx_update_session_conn_fwddb_param() 3896 dma_free_coherent(&ha->pdev->dev, sizeof(*fw_ddb_entry), qla4xxx_update_session_conn_fwddb_param() 3900 void qla4xxx_update_session_conn_param(struct scsi_qla_host *ha, qla4xxx_update_session_conn_param() argument 3911 fw_ddb_entry = dma_alloc_coherent(&ha->pdev->dev, sizeof(*fw_ddb_entry), qla4xxx_update_session_conn_param() 3914 ql4_printk(KERN_ERR, ha, qla4xxx_update_session_conn_param() 3919 if (qla4xxx_get_fwddb_entry(ha, ddb_entry->fw_ddb_index, fw_ddb_entry, qla4xxx_update_session_conn_param() 3922 DEBUG2(ql4_printk(KERN_ERR, ha, "scsi%ld: %s: failed " qla4xxx_update_session_conn_param() 3924 ha->host_no, __func__, qla4xxx_update_session_conn_param() 3947 memcpy(sess->initiatorname, ha->name_string, qla4xxx_update_session_conn_param() 3948 min(sizeof(ha->name_string), sizeof(sess->initiatorname))); qla4xxx_update_session_conn_param() 3952 dma_free_coherent(&ha->pdev->dev, sizeof(*fw_ddb_entry), qla4xxx_update_session_conn_param() 3960 static void qla4xxx_start_timer(struct scsi_qla_host *ha, void *func, qla4xxx_start_timer() argument 3964 __func__, ha->host->host_no)); qla4xxx_start_timer() 3965 init_timer(&ha->timer); qla4xxx_start_timer() 3966 ha->timer.expires = jiffies + interval * HZ; qla4xxx_start_timer() 3967 ha->timer.data = (unsigned long)ha; qla4xxx_start_timer() 3968 ha->timer.function = (void (*)(unsigned long))func; qla4xxx_start_timer() 3969 add_timer(&ha->timer); qla4xxx_start_timer() 3970 ha->timer_active = 1; qla4xxx_start_timer() 3973 static void qla4xxx_stop_timer(struct scsi_qla_host *ha) qla4xxx_stop_timer() argument 3975 del_timer_sync(&ha->timer); qla4xxx_stop_timer() 3976 ha->timer_active = 0; qla4xxx_stop_timer() 3993 * @ha: Pointer to host adapter structure. 3997 void qla4xxx_mark_all_devices_missing(struct scsi_qla_host *ha) qla4xxx_mark_all_devices_missing() argument 3999 iscsi_host_for_each_session(ha->host, qla4xxx_mark_device_missing); qla4xxx_mark_all_devices_missing() 4002 static struct srb* qla4xxx_get_new_srb(struct scsi_qla_host *ha, qla4xxx_get_new_srb() argument 4008 srb = mempool_alloc(ha->srb_mempool, GFP_ATOMIC); qla4xxx_get_new_srb() 4013 srb->ha = ha; qla4xxx_get_new_srb() 4022 static void qla4xxx_srb_free_dma(struct scsi_qla_host *ha, struct srb *srb) qla4xxx_srb_free_dma() argument 4037 struct scsi_qla_host *ha = srb->ha; qla4xxx_srb_compl() local 4039 qla4xxx_srb_free_dma(ha, srb); qla4xxx_srb_compl() 4041 mempool_free(srb, ha->srb_mempool); qla4xxx_srb_compl() 4061 struct scsi_qla_host *ha = to_qla_host(host); qla4xxx_queuecommand() local 4067 if (test_bit(AF_EEH_BUSY, &ha->flags)) { qla4xxx_queuecommand() 4068 if (test_bit(AF_PCI_CHANNEL_IO_PERM_FAILURE, &ha->flags)) qla4xxx_queuecommand() 4086 if (test_bit(DPC_RESET_HA_INTR, &ha->dpc_flags) || qla4xxx_queuecommand() 4087 test_bit(DPC_RESET_ACTIVE, &ha->dpc_flags) || qla4xxx_queuecommand() 4088 test_bit(DPC_RESET_HA, &ha->dpc_flags) || qla4xxx_queuecommand() 4089 test_bit(DPC_HA_UNRECOVERABLE, &ha->dpc_flags) || qla4xxx_queuecommand() 4090 test_bit(DPC_HA_NEED_QUIESCENT, &ha->dpc_flags) || qla4xxx_queuecommand() 4091 !test_bit(AF_ONLINE, &ha->flags) || qla4xxx_queuecommand() 4092 !test_bit(AF_LINK_UP, &ha->flags) || qla4xxx_queuecommand() 4093 test_bit(AF_LOOPBACK, &ha->flags) || qla4xxx_queuecommand() 4094 test_bit(DPC_POST_IDC_ACK, &ha->dpc_flags) || qla4xxx_queuecommand() 4095 test_bit(DPC_RESTORE_ACB, &ha->dpc_flags) || qla4xxx_queuecommand() 4096 test_bit(DPC_RESET_HA_FW_CONTEXT, &ha->dpc_flags)) qla4xxx_queuecommand() 4099 srb = qla4xxx_get_new_srb(ha, ddb_entry, cmd); qla4xxx_queuecommand() 4103 rval = qla4xxx_send_command_to_isp(ha, srb); qla4xxx_queuecommand() 4110 qla4xxx_srb_free_dma(ha, srb); qla4xxx_queuecommand() 4111 mempool_free(srb, ha->srb_mempool); qla4xxx_queuecommand() 4124 * @ha: Pointer to host adapter structure. 4128 static void qla4xxx_mem_free(struct scsi_qla_host *ha) qla4xxx_mem_free() argument 4130 if (ha->queues) qla4xxx_mem_free() 4131 dma_free_coherent(&ha->pdev->dev, ha->queues_len, ha->queues, qla4xxx_mem_free() 4132 ha->queues_dma); qla4xxx_mem_free() 4134 if (ha->fw_dump) qla4xxx_mem_free() 4135 vfree(ha->fw_dump); qla4xxx_mem_free() 4137 ha->queues_len = 0; qla4xxx_mem_free() 4138 ha->queues = NULL; qla4xxx_mem_free() 4139 ha->queues_dma = 0; qla4xxx_mem_free() 4140 ha->request_ring = NULL; qla4xxx_mem_free() 4141 ha->request_dma = 0; qla4xxx_mem_free() 4142 ha->response_ring = NULL; qla4xxx_mem_free() 4143 ha->response_dma = 0; qla4xxx_mem_free() 4144 ha->shadow_regs = NULL; qla4xxx_mem_free() 4145 ha->shadow_regs_dma = 0; qla4xxx_mem_free() 4146 ha->fw_dump = NULL; qla4xxx_mem_free() 4147 ha->fw_dump_size = 0; qla4xxx_mem_free() 4150 if (ha->srb_mempool) qla4xxx_mem_free() 4151 mempool_destroy(ha->srb_mempool); qla4xxx_mem_free() 4153 ha->srb_mempool = NULL; qla4xxx_mem_free() 4155 if (ha->chap_dma_pool) qla4xxx_mem_free() 4156 dma_pool_destroy(ha->chap_dma_pool); qla4xxx_mem_free() 4158 if (ha->chap_list) qla4xxx_mem_free() 4159 vfree(ha->chap_list); qla4xxx_mem_free() 4160 ha->chap_list = NULL; qla4xxx_mem_free() 4162 if (ha->fw_ddb_dma_pool) qla4xxx_mem_free() 4163 dma_pool_destroy(ha->fw_ddb_dma_pool); qla4xxx_mem_free() 4166 if (is_qla8022(ha)) { qla4xxx_mem_free() 4167 if (ha->nx_pcibase) qla4xxx_mem_free() 4169 (struct device_reg_82xx __iomem *)ha->nx_pcibase); qla4xxx_mem_free() 4170 } else if (is_qla8032(ha) || is_qla8042(ha)) { qla4xxx_mem_free() 4171 if (ha->nx_pcibase) qla4xxx_mem_free() 4173 (struct device_reg_83xx __iomem *)ha->nx_pcibase); qla4xxx_mem_free() 4174 } else if (ha->reg) { qla4xxx_mem_free() 4175 iounmap(ha->reg); qla4xxx_mem_free() 4178 if (ha->reset_tmplt.buff) qla4xxx_mem_free() 4179 vfree(ha->reset_tmplt.buff); qla4xxx_mem_free() 4181 pci_release_regions(ha->pdev); qla4xxx_mem_free() 4186 * @ha: Pointer to host adapter structure 4191 static int qla4xxx_mem_alloc(struct scsi_qla_host *ha) qla4xxx_mem_alloc() argument 4196 ha->queues_len = ((REQUEST_QUEUE_DEPTH * QUEUE_SIZE) + qla4xxx_mem_alloc() 4201 ha->queues = dma_alloc_coherent(&ha->pdev->dev, ha->queues_len, qla4xxx_mem_alloc() 4202 &ha->queues_dma, GFP_KERNEL); qla4xxx_mem_alloc() 4203 if (ha->queues == NULL) { qla4xxx_mem_alloc() 4204 ql4_printk(KERN_WARNING, ha, qla4xxx_mem_alloc() 4209 memset(ha->queues, 0, ha->queues_len); qla4xxx_mem_alloc() 4216 if ((unsigned long)ha->queues_dma & (MEM_ALIGN_VALUE - 1)) qla4xxx_mem_alloc() 4217 align = MEM_ALIGN_VALUE - ((unsigned long)ha->queues_dma & qla4xxx_mem_alloc() 4221 ha->request_dma = ha->queues_dma + align; qla4xxx_mem_alloc() 4222 ha->request_ring = (struct queue_entry *) (ha->queues + align); qla4xxx_mem_alloc() 4223 ha->response_dma = ha->queues_dma + align + qla4xxx_mem_alloc() 4225 ha->response_ring = (struct queue_entry *) (ha->queues + align + qla4xxx_mem_alloc() 4228 ha->shadow_regs_dma = ha->queues_dma + align + qla4xxx_mem_alloc() 4231 ha->shadow_regs = (struct shadow_regs *) (ha->queues + align + qla4xxx_mem_alloc() 4238 ha->srb_mempool = mempool_create(SRB_MIN_REQ, mempool_alloc_slab, qla4xxx_mem_alloc() 4240 if (ha->srb_mempool == NULL) { qla4xxx_mem_alloc() 4241 ql4_printk(KERN_WARNING, ha, qla4xxx_mem_alloc() 4247 ha->chap_dma_pool = dma_pool_create("ql4_chap", &ha->pdev->dev, qla4xxx_mem_alloc() 4250 if (ha->chap_dma_pool == NULL) { qla4xxx_mem_alloc() 4251 ql4_printk(KERN_WARNING, ha, qla4xxx_mem_alloc() 4256 ha->fw_ddb_dma_pool = dma_pool_create("ql4_fw_ddb", &ha->pdev->dev, qla4xxx_mem_alloc() 4259 if (ha->fw_ddb_dma_pool == NULL) { qla4xxx_mem_alloc() 4260 ql4_printk(KERN_WARNING, ha, qla4xxx_mem_alloc() 4269 qla4xxx_mem_free(ha); qla4xxx_mem_alloc() 4275 * @ha: adapter block pointer. 4279 static int qla4_8xxx_check_temp(struct scsi_qla_host *ha) qla4_8xxx_check_temp() argument 4284 temp = qla4_8xxx_rd_direct(ha, QLA8XXX_CRB_TEMP_STATE); qla4_8xxx_check_temp() 4290 ql4_printk(KERN_WARNING, ha, "Device temperature %d degrees C" qla4_8xxx_check_temp() 4295 if (ha->temperature == QLA82XX_TEMP_NORMAL) qla4_8xxx_check_temp() 4296 ql4_printk(KERN_WARNING, ha, "Device temperature %d" qla4_8xxx_check_temp() 4300 if (ha->temperature == QLA82XX_TEMP_WARN) qla4_8xxx_check_temp() 4301 ql4_printk(KERN_INFO, ha, "Device temperature is" qla4_8xxx_check_temp() 4305 ha->temperature = temp_state; qla4_8xxx_check_temp() 4311 * @ha: Pointer to host adapter structure. 4315 static int qla4_8xxx_check_fw_alive(struct scsi_qla_host *ha) qla4_8xxx_check_fw_alive() argument 4320 fw_heartbeat_counter = qla4_8xxx_rd_direct(ha, qla4_8xxx_check_fw_alive() 4326 ha->host_no, __func__)); qla4_8xxx_check_fw_alive() 4330 if (ha->fw_heartbeat_counter == fw_heartbeat_counter) { qla4_8xxx_check_fw_alive() 4331 ha->seconds_since_last_heartbeat++; qla4_8xxx_check_fw_alive() 4333 if (ha->seconds_since_last_heartbeat == 2) { qla4_8xxx_check_fw_alive() 4334 ha->seconds_since_last_heartbeat = 0; qla4_8xxx_check_fw_alive() 4335 qla4_8xxx_dump_peg_reg(ha); qla4_8xxx_check_fw_alive() 4339 ha->seconds_since_last_heartbeat = 0; qla4_8xxx_check_fw_alive() 4341 ha->fw_heartbeat_counter = fw_heartbeat_counter; qla4_8xxx_check_fw_alive() 4345 static void qla4_8xxx_process_fw_error(struct scsi_qla_host *ha) qla4_8xxx_process_fw_error() argument 4350 halt_status = qla4_8xxx_rd_direct(ha, QLA8XXX_PEG_HALT_STATUS1); qla4_8xxx_process_fw_error() 4352 if (is_qla8022(ha)) { qla4_8xxx_process_fw_error() 4353 ql4_printk(KERN_INFO, ha, "%s: disabling pause transmit on port 0 & 1.\n", qla4_8xxx_process_fw_error() 4355 qla4_82xx_wr_32(ha, QLA82XX_CRB_NIU + 0x98, qla4_8xxx_process_fw_error() 4360 ql4_printk(KERN_ERR, ha, "%s: Firmware aborted with error code 0x00006700. Device is being reset\n", qla4_8xxx_process_fw_error() 4364 } else if (is_qla8032(ha) || is_qla8042(ha)) { qla4_8xxx_process_fw_error() 4366 ql4_printk(KERN_ERR, ha, "%s: Firmware error detected device is being reset\n", qla4_8xxx_process_fw_error() 4377 set_bit(DPC_HA_UNRECOVERABLE, &ha->dpc_flags); qla4_8xxx_process_fw_error() 4379 ql4_printk(KERN_INFO, ha, "%s: detect abort needed!\n", qla4_8xxx_process_fw_error() 4381 set_bit(DPC_RESET_HA, &ha->dpc_flags); qla4_8xxx_process_fw_error() 4383 qla4xxx_mailbox_premature_completion(ha); qla4_8xxx_process_fw_error() 4384 qla4xxx_wake_dpc(ha); qla4_8xxx_process_fw_error() 4389 * @ha: Pointer to host adapter structure. 4393 void qla4_8xxx_watchdog(struct scsi_qla_host *ha) qla4_8xxx_watchdog() argument 4398 if (is_qla8032(ha) && qla4_8xxx_watchdog() 4399 (qla4_83xx_is_detached(ha) == QLA_SUCCESS)) qla4_8xxx_watchdog() 4401 __func__, ha->func_num); qla4_8xxx_watchdog() 4404 if (!(test_bit(DPC_RESET_ACTIVE, &ha->dpc_flags) || qla4_8xxx_watchdog() 4405 test_bit(DPC_RESET_HA, &ha->dpc_flags) || qla4_8xxx_watchdog() 4406 test_bit(DPC_RETRY_RESET_HA, &ha->dpc_flags))) { qla4_8xxx_watchdog() 4407 dev_state = qla4_8xxx_rd_direct(ha, QLA8XXX_CRB_DEV_STATE); qla4_8xxx_watchdog() 4409 if (qla4_8xxx_check_temp(ha)) { qla4_8xxx_watchdog() 4410 if (is_qla8022(ha)) { qla4_8xxx_watchdog() 4411 ql4_printk(KERN_INFO, ha, "disabling pause transmit on port 0 & 1.\n"); qla4_8xxx_watchdog() 4412 qla4_82xx_wr_32(ha, QLA82XX_CRB_NIU + 0x98, qla4_8xxx_watchdog() 4416 set_bit(DPC_HA_UNRECOVERABLE, &ha->dpc_flags); qla4_8xxx_watchdog() 4417 qla4xxx_wake_dpc(ha); qla4_8xxx_watchdog() 4419 !test_bit(DPC_RESET_HA, &ha->dpc_flags)) { qla4_8xxx_watchdog() 4421 ql4_printk(KERN_INFO, ha, "%s: HW State: NEED RESET!\n", qla4_8xxx_watchdog() 4424 if (is_qla8032(ha) || is_qla8042(ha)) { qla4_8xxx_watchdog() 4425 idc_ctrl = qla4_83xx_rd_reg(ha, qla4_8xxx_watchdog() 4428 ql4_printk(KERN_INFO, ha, "%s: Graceful reset bit is not set\n", qla4_8xxx_watchdog() 4431 ha); qla4_8xxx_watchdog() 4435 if ((is_qla8032(ha) || is_qla8042(ha)) || qla4_8xxx_watchdog() 4436 (is_qla8022(ha) && !ql4xdontresethba)) { qla4_8xxx_watchdog() 4437 set_bit(DPC_RESET_HA, &ha->dpc_flags); qla4_8xxx_watchdog() 4438 qla4xxx_wake_dpc(ha); qla4_8xxx_watchdog() 4441 !test_bit(DPC_HA_NEED_QUIESCENT, &ha->dpc_flags)) { qla4_8xxx_watchdog() 4442 ql4_printk(KERN_INFO, ha, "%s: HW State: NEED QUIES!\n", qla4_8xxx_watchdog() 4444 set_bit(DPC_HA_NEED_QUIESCENT, &ha->dpc_flags); qla4_8xxx_watchdog() 4445 qla4xxx_wake_dpc(ha); qla4_8xxx_watchdog() 4448 if (qla4_8xxx_check_fw_alive(ha)) qla4_8xxx_watchdog() 4449 qla4_8xxx_process_fw_error(ha); qla4_8xxx_watchdog() 4458 struct scsi_qla_host *ha; qla4xxx_check_relogin_flash_ddb() local 4462 ha = ddb_entry->ha; qla4xxx_check_relogin_flash_ddb() 4467 if (adapter_up(ha) && !test_bit(DF_RELOGIN, &ddb_entry->flags) && qla4xxx_check_relogin_flash_ddb() 4475 set_bit(DPC_RELOGIN_DEVICE, &ha->dpc_flags); qla4xxx_check_relogin_flash_ddb() 4477 DEBUG2(ql4_printk(KERN_INFO, ha, qla4xxx_check_relogin_flash_ddb() 4495 DEBUG2(ql4_printk(KERN_INFO, ha, qla4xxx_check_relogin_flash_ddb() 4501 set_bit(DPC_RELOGIN_DEVICE, &ha->dpc_flags); qla4xxx_check_relogin_flash_ddb() 4510 * @ha: Pointer to host adapter structure. 4512 static void qla4xxx_timer(struct scsi_qla_host *ha) qla4xxx_timer() argument 4517 iscsi_host_for_each_session(ha->host, qla4xxx_check_relogin_flash_ddb); qla4xxx_timer() 4522 if (test_bit(AF_EEH_BUSY, &ha->flags)) { qla4xxx_timer() 4523 mod_timer(&ha->timer, jiffies + HZ); qla4xxx_timer() 4528 if (!pci_channel_offline(ha->pdev)) qla4xxx_timer() 4529 pci_read_config_word(ha->pdev, PCI_VENDOR_ID, &w); qla4xxx_timer() 4531 if (is_qla80XX(ha)) qla4xxx_timer() 4532 qla4_8xxx_watchdog(ha); qla4xxx_timer() 4534 if (is_qla40XX(ha)) { qla4xxx_timer() 4536 if (ha->firmware_options & FWOPT_HEARTBEAT_ENABLE && qla4xxx_timer() 4537 ha->heartbeat_interval != 0) { qla4xxx_timer() 4538 ha->seconds_since_last_heartbeat++; qla4xxx_timer() 4539 if (ha->seconds_since_last_heartbeat > qla4xxx_timer() 4540 ha->heartbeat_interval + 2) qla4xxx_timer() 4541 set_bit(DPC_RESET_HA, &ha->dpc_flags); qla4xxx_timer() 4546 if (!list_empty(&ha->work_list)) qla4xxx_timer() 4551 test_bit(DPC_RESET_HA, &ha->dpc_flags) || qla4xxx_timer() 4552 test_bit(DPC_RETRY_RESET_HA, &ha->dpc_flags) || qla4xxx_timer() 4553 test_bit(DPC_RELOGIN_DEVICE, &ha->dpc_flags) || qla4xxx_timer() 4554 test_bit(DPC_RESET_HA_FW_CONTEXT, &ha->dpc_flags) || qla4xxx_timer() 4555 test_bit(DPC_RESET_HA_INTR, &ha->dpc_flags) || qla4xxx_timer() 4556 test_bit(DPC_GET_DHCP_IP_ADDR, &ha->dpc_flags) || qla4xxx_timer() 4557 test_bit(DPC_LINK_CHANGED, &ha->dpc_flags) || qla4xxx_timer() 4558 test_bit(DPC_HA_UNRECOVERABLE, &ha->dpc_flags) || qla4xxx_timer() 4559 test_bit(DPC_HA_NEED_QUIESCENT, &ha->dpc_flags) || qla4xxx_timer() 4560 test_bit(DPC_SYSFS_DDB_EXPORT, &ha->dpc_flags) || qla4xxx_timer() 4561 test_bit(DPC_AEN, &ha->dpc_flags)) { qla4xxx_timer() 4564 ha->host_no, __func__, ha->dpc_flags)); qla4xxx_timer() 4565 qla4xxx_wake_dpc(ha); qla4xxx_timer() 4569 mod_timer(&ha->timer, jiffies + HZ); qla4xxx_timer() 4571 DEBUG2(ha->seconds_since_last_intr++); qla4xxx_timer() 4576 * @ha: Pointer to host adapter structure. 4581 static int qla4xxx_cmd_wait(struct scsi_qla_host *ha) qla4xxx_cmd_wait() argument 4589 if (is_qla40XX(ha)) qla4xxx_cmd_wait() 4592 wtmo = ha->nx_reset_timeout / 2; qla4xxx_cmd_wait() 4596 DEBUG2(ql4_printk(KERN_INFO, ha, qla4xxx_cmd_wait() 4601 spin_lock_irqsave(&ha->hardware_lock, flags); qla4xxx_cmd_wait() 4603 for (index = 0; index < ha->host->can_queue; index++) { qla4xxx_cmd_wait() 4604 cmd = scsi_host_find_tag(ha->host, index); qla4xxx_cmd_wait() 4614 spin_unlock_irqrestore(&ha->hardware_lock, flags); qla4xxx_cmd_wait() 4617 if (index == ha->host->can_queue) qla4xxx_cmd_wait() 4627 int qla4xxx_hw_reset(struct scsi_qla_host *ha) qla4xxx_hw_reset() argument 4632 DEBUG2(printk(KERN_ERR "scsi%ld: %s\n", ha->host_no, __func__)); qla4xxx_hw_reset() 4634 if (ql4xxx_lock_drvr_wait(ha) != QLA_SUCCESS) qla4xxx_hw_reset() 4637 spin_lock_irqsave(&ha->hardware_lock, flags); qla4xxx_hw_reset() 4643 ctrl_status = readw(&ha->reg->ctrl_status); qla4xxx_hw_reset() 4645 writel(set_rmask(CSR_SCSI_RESET_INTR), &ha->reg->ctrl_status); qla4xxx_hw_reset() 4648 writel(set_rmask(CSR_SOFT_RESET), &ha->reg->ctrl_status); qla4xxx_hw_reset() 4649 readl(&ha->reg->ctrl_status); qla4xxx_hw_reset() 4651 spin_unlock_irqrestore(&ha->hardware_lock, flags); qla4xxx_hw_reset() 4657 * @ha: Pointer to host adapter structure. 4659 int qla4xxx_soft_reset(struct scsi_qla_host *ha) qla4xxx_soft_reset() argument 4666 status = qla4xxx_hw_reset(ha); qla4xxx_soft_reset() 4674 spin_lock_irqsave(&ha->hardware_lock, flags); qla4xxx_soft_reset() 4675 ctrl_status = readw(&ha->reg->ctrl_status); qla4xxx_soft_reset() 4676 spin_unlock_irqrestore(&ha->hardware_lock, flags); qla4xxx_soft_reset() 4688 ha->host_no)); qla4xxx_soft_reset() 4689 spin_lock_irqsave(&ha->hardware_lock, flags); qla4xxx_soft_reset() 4690 writel(set_rmask(CSR_NET_RESET_INTR), &ha->reg->ctrl_status); qla4xxx_soft_reset() 4691 readl(&ha->reg->ctrl_status); qla4xxx_soft_reset() 4692 spin_unlock_irqrestore(&ha->hardware_lock, flags); qla4xxx_soft_reset() 4698 spin_lock_irqsave(&ha->hardware_lock, flags); qla4xxx_soft_reset() 4699 ctrl_status = readw(&ha->reg->ctrl_status); qla4xxx_soft_reset() 4700 spin_unlock_irqrestore(&ha->hardware_lock, flags); qla4xxx_soft_reset() 4714 spin_lock_irqsave(&ha->hardware_lock, flags); qla4xxx_soft_reset() 4715 ctrl_status = readw(&ha->reg->ctrl_status); qla4xxx_soft_reset() 4717 writel(set_rmask(CSR_SCSI_RESET_INTR), &ha->reg->ctrl_status); qla4xxx_soft_reset() 4718 readl(&ha->reg->ctrl_status); qla4xxx_soft_reset() 4720 spin_unlock_irqrestore(&ha->hardware_lock, flags); qla4xxx_soft_reset() 4730 spin_lock_irqsave(&ha->hardware_lock, flags); qla4xxx_soft_reset() 4731 writel(set_rmask(CSR_FORCE_SOFT_RESET), &ha->reg->ctrl_status); qla4xxx_soft_reset() 4732 readl(&ha->reg->ctrl_status); qla4xxx_soft_reset() 4733 spin_unlock_irqrestore(&ha->hardware_lock, flags); qla4xxx_soft_reset() 4737 spin_lock_irqsave(&ha->hardware_lock, flags); qla4xxx_soft_reset() 4738 ctrl_status = readw(&ha->reg->ctrl_status); qla4xxx_soft_reset() 4739 spin_unlock_irqrestore(&ha->hardware_lock, flags); qla4xxx_soft_reset() 4755 * @ha: Pointer to host adapter structure. 4763 static void qla4xxx_abort_active_cmds(struct scsi_qla_host *ha, int res) qla4xxx_abort_active_cmds() argument 4769 spin_lock_irqsave(&ha->hardware_lock, flags); qla4xxx_abort_active_cmds() 4770 for (i = 0; i < ha->host->can_queue; i++) { qla4xxx_abort_active_cmds() 4771 srb = qla4xxx_del_from_active_array(ha, i); qla4xxx_abort_active_cmds() 4777 spin_unlock_irqrestore(&ha->hardware_lock, flags); qla4xxx_abort_active_cmds() 4780 void qla4xxx_dead_adapter_cleanup(struct scsi_qla_host *ha) qla4xxx_dead_adapter_cleanup() argument 4782 clear_bit(AF_ONLINE, &ha->flags); qla4xxx_dead_adapter_cleanup() 4785 ql4_printk(KERN_INFO, ha, "Disabling the board\n"); qla4xxx_dead_adapter_cleanup() 4787 qla4xxx_abort_active_cmds(ha, DID_NO_CONNECT << 16); qla4xxx_dead_adapter_cleanup() 4788 qla4xxx_mark_all_devices_missing(ha); qla4xxx_dead_adapter_cleanup() 4789 clear_bit(AF_INIT_DONE, &ha->flags); qla4xxx_dead_adapter_cleanup() 4810 * @ha: Pointer to host adapter structure. 4812 static int qla4xxx_recover_adapter(struct scsi_qla_host *ha) qla4xxx_recover_adapter() argument 4820 scsi_block_requests(ha->host); qla4xxx_recover_adapter() 4821 clear_bit(AF_ONLINE, &ha->flags); qla4xxx_recover_adapter() 4822 clear_bit(AF_LINK_UP, &ha->flags); qla4xxx_recover_adapter() 4824 DEBUG2(ql4_printk(KERN_INFO, ha, "%s: adapter OFFLINE\n", __func__)); qla4xxx_recover_adapter() 4826 set_bit(DPC_RESET_ACTIVE, &ha->dpc_flags); qla4xxx_recover_adapter() 4828 if ((is_qla8032(ha) || is_qla8042(ha)) && qla4xxx_recover_adapter() 4829 !test_bit(DPC_RESET_HA_FW_CONTEXT, &ha->dpc_flags)) { qla4xxx_recover_adapter() 4830 ql4_printk(KERN_INFO, ha, "%s: disabling pause transmit on port 0 & 1.\n", qla4xxx_recover_adapter() 4833 qla4_83xx_disable_pause(ha); qla4xxx_recover_adapter() 4836 iscsi_host_for_each_session(ha->host, qla4xxx_fail_session); qla4xxx_recover_adapter() 4838 if (test_bit(DPC_RESET_HA, &ha->dpc_flags)) qla4xxx_recover_adapter() 4843 if (test_bit(DPC_RESET_HA_INTR, &ha->dpc_flags)) { qla4xxx_recover_adapter() 4850 if (is_qla80XX(ha) && !reset_chip && qla4xxx_recover_adapter() 4851 test_bit(DPC_RESET_HA_FW_CONTEXT, &ha->dpc_flags)) { qla4xxx_recover_adapter() 4853 DEBUG2(ql4_printk(KERN_INFO, ha, qla4xxx_recover_adapter() 4855 ha->host_no, __func__)); qla4xxx_recover_adapter() 4856 status = ha->isp_ops->reset_firmware(ha); qla4xxx_recover_adapter() 4858 ha->isp_ops->disable_intrs(ha); qla4xxx_recover_adapter() 4859 qla4xxx_process_aen(ha, FLUSH_DDB_CHANGED_AENS); qla4xxx_recover_adapter() 4860 qla4xxx_abort_active_cmds(ha, DID_RESET << 16); qla4xxx_recover_adapter() 4865 clear_bit(DPC_RESET_HA_FW_CONTEXT, &ha->dpc_flags); qla4xxx_recover_adapter() 4866 set_bit(DPC_RESET_HA, &ha->dpc_flags); qla4xxx_recover_adapter() 4873 if (is_qla40XX(ha) || reset_chip) { qla4xxx_recover_adapter() 4874 if (is_qla40XX(ha)) qla4xxx_recover_adapter() 4880 if (test_bit(AF_FW_RECOVERY, &ha->flags)) qla4xxx_recover_adapter() 4885 if (qla4_8xxx_check_fw_alive(ha)) { qla4xxx_recover_adapter() 4886 qla4xxx_mailbox_premature_completion(ha); qla4xxx_recover_adapter() 4894 if (!test_bit(AF_FW_RECOVERY, &ha->flags)) qla4xxx_recover_adapter() 4895 qla4xxx_cmd_wait(ha); qla4xxx_recover_adapter() 4897 qla4xxx_process_aen(ha, FLUSH_DDB_CHANGED_AENS); qla4xxx_recover_adapter() 4898 DEBUG2(ql4_printk(KERN_INFO, ha, qla4xxx_recover_adapter() 4900 ha->host_no, __func__)); qla4xxx_recover_adapter() 4901 status = ha->isp_ops->reset_chip(ha); qla4xxx_recover_adapter() 4902 qla4xxx_abort_active_cmds(ha, DID_RESET << 16); qla4xxx_recover_adapter() 4906 qla4xxx_process_aen(ha, FLUSH_DDB_CHANGED_AENS); qla4xxx_recover_adapter() 4914 if (is_qla40XX(ha) && (ha->mac_index == 3)) qla4xxx_recover_adapter() 4919 status = qla4xxx_initialize_adapter(ha, RESET_ADAPTER); qla4xxx_recover_adapter() 4920 if (is_qla80XX(ha) && (status == QLA_ERROR)) { qla4xxx_recover_adapter() 4921 status = qla4_8xxx_check_init_adapter_retry(ha); qla4xxx_recover_adapter() 4923 ql4_printk(KERN_INFO, ha, "scsi%ld: %s: Don't retry recover adapter\n", qla4xxx_recover_adapter() 4924 ha->host_no, __func__); qla4xxx_recover_adapter() 4925 qla4xxx_dead_adapter_cleanup(ha); qla4xxx_recover_adapter() 4926 clear_bit(DPC_RETRY_RESET_HA, &ha->dpc_flags); qla4xxx_recover_adapter() 4927 clear_bit(DPC_RESET_HA, &ha->dpc_flags); qla4xxx_recover_adapter() 4929 &ha->dpc_flags); qla4xxx_recover_adapter() 4938 if (!test_bit(AF_ONLINE, &ha->flags) && qla4xxx_recover_adapter() 4939 !test_bit(DPC_RESET_HA_INTR, &ha->dpc_flags)) { qla4xxx_recover_adapter() 4941 * resetting the ha. qla4xxx_recover_adapter() 4945 if (is_qla80XX(ha)) { qla4xxx_recover_adapter() 4946 ha->isp_ops->idc_lock(ha); qla4xxx_recover_adapter() 4947 dev_state = qla4_8xxx_rd_direct(ha, qla4xxx_recover_adapter() 4949 ha->isp_ops->idc_unlock(ha); qla4xxx_recover_adapter() 4951 ql4_printk(KERN_INFO, ha, "%s: don't retry " qla4xxx_recover_adapter() 4954 qla4xxx_dead_adapter_cleanup(ha); qla4xxx_recover_adapter() 4955 clear_bit(DPC_RETRY_RESET_HA, &ha->dpc_flags); qla4xxx_recover_adapter() 4956 clear_bit(DPC_RESET_HA, &ha->dpc_flags); qla4xxx_recover_adapter() 4958 &ha->dpc_flags); qla4xxx_recover_adapter() 4965 if (!test_bit(DPC_RETRY_RESET_HA, &ha->dpc_flags)) { qla4xxx_recover_adapter() 4966 ha->retry_reset_ha_cnt = MAX_RESET_HA_RETRIES; qla4xxx_recover_adapter() 4968 "(%d) more times\n", ha->host_no, qla4xxx_recover_adapter() 4969 ha->retry_reset_ha_cnt)); qla4xxx_recover_adapter() 4970 set_bit(DPC_RETRY_RESET_HA, &ha->dpc_flags); qla4xxx_recover_adapter() 4973 if (ha->retry_reset_ha_cnt > 0) { qla4xxx_recover_adapter() 4975 ha->retry_reset_ha_cnt--; qla4xxx_recover_adapter() 4978 ha->host_no, qla4xxx_recover_adapter() 4979 ha->retry_reset_ha_cnt)); qla4xxx_recover_adapter() 4983 if (ha->retry_reset_ha_cnt == 0) { qla4xxx_recover_adapter() 4988 ha->host_no)); qla4xxx_recover_adapter() 4989 qla4xxx_dead_adapter_cleanup(ha); qla4xxx_recover_adapter() 4990 clear_bit(DPC_RETRY_RESET_HA, &ha->dpc_flags); qla4xxx_recover_adapter() 4991 clear_bit(DPC_RESET_HA, &ha->dpc_flags); qla4xxx_recover_adapter() 4993 &ha->dpc_flags); qla4xxx_recover_adapter() 4998 clear_bit(DPC_RESET_HA, &ha->dpc_flags); qla4xxx_recover_adapter() 4999 clear_bit(DPC_RESET_HA_FW_CONTEXT, &ha->dpc_flags); qla4xxx_recover_adapter() 5000 clear_bit(DPC_RETRY_RESET_HA, &ha->dpc_flags); qla4xxx_recover_adapter() 5004 ha->adapter_error_count++; qla4xxx_recover_adapter() 5006 if (test_bit(AF_ONLINE, &ha->flags)) qla4xxx_recover_adapter() 5007 ha->isp_ops->enable_intrs(ha); qla4xxx_recover_adapter() 5009 scsi_unblock_requests(ha->host); qla4xxx_recover_adapter() 5011 clear_bit(DPC_RESET_ACTIVE, &ha->dpc_flags); qla4xxx_recover_adapter() 5012 DEBUG2(printk("scsi%ld: recover adapter: %s\n", ha->host_no, qla4xxx_recover_adapter() 5022 struct scsi_qla_host *ha; qla4xxx_relogin_devices() local 5026 ha = ddb_entry->ha; qla4xxx_relogin_devices() 5029 ql4_printk(KERN_INFO, ha, "scsi%ld: %s: ddb[%d]" qla4xxx_relogin_devices() 5030 " unblock session\n", ha->host_no, __func__, qla4xxx_relogin_devices() 5051 struct scsi_qla_host *ha; qla4xxx_unblock_flash_ddb() local 5055 ha = ddb_entry->ha; qla4xxx_unblock_flash_ddb() 5056 ql4_printk(KERN_INFO, ha, "scsi%ld: %s: ddb[%d]" qla4xxx_unblock_flash_ddb() 5057 " unblock session\n", ha->host_no, __func__, qla4xxx_unblock_flash_ddb() 5063 if (test_bit(AF_ONLINE, &ha->flags)) { qla4xxx_unblock_flash_ddb() 5064 ql4_printk(KERN_INFO, ha, "scsi%ld: %s: ddb[%d]" qla4xxx_unblock_flash_ddb() 5065 " start scan\n", ha->host_no, __func__, qla4xxx_unblock_flash_ddb() 5067 scsi_queue_work(ha->host, &ddb_entry->sess->scan_work); qla4xxx_unblock_flash_ddb() 5076 struct scsi_qla_host *ha; qla4xxx_unblock_ddb() local 5081 ha = ddb_entry->ha; qla4xxx_unblock_ddb() 5082 ql4_printk(KERN_INFO, ha, "scsi%ld: %s: ddb[%d]" qla4xxx_unblock_ddb() 5083 " unblock user space session\n", ha->host_no, __func__, qla4xxx_unblock_ddb() 5091 ql4_printk(KERN_INFO, ha, qla4xxx_unblock_ddb() 5093 ha->host_no, __func__, ddb_entry->fw_ddb_index, qla4xxx_unblock_ddb() 5101 static void qla4xxx_relogin_all_devices(struct scsi_qla_host *ha) qla4xxx_relogin_all_devices() argument 5103 iscsi_host_for_each_session(ha->host, qla4xxx_relogin_devices); qla4xxx_relogin_all_devices() 5111 struct scsi_qla_host *ha; qla4xxx_relogin_flash_ddb() local 5115 ha = ddb_entry->ha; qla4xxx_relogin_flash_ddb() 5121 DEBUG2(ql4_printk(KERN_INFO, ha, qla4xxx_relogin_flash_ddb() 5122 "scsi%ld: Relogin index [%d]. TOV=%d\n", ha->host_no, qla4xxx_relogin_flash_ddb() 5132 struct scsi_qla_host *ha; qla4xxx_dpc_relogin() local 5136 ha = ddb_entry->ha; qla4xxx_dpc_relogin() 5146 DEBUG2(ql4_printk(KERN_INFO, ha, qla4xxx_dpc_relogin() 5152 void qla4xxx_wake_dpc(struct scsi_qla_host *ha) qla4xxx_wake_dpc() argument 5154 if (ha->dpc_thread) qla4xxx_wake_dpc() 5155 queue_work(ha->dpc_thread, &ha->dpc_work); qla4xxx_wake_dpc() 5159 qla4xxx_alloc_work(struct scsi_qla_host *ha, uint32_t data_size, qla4xxx_alloc_work() argument 5174 static void qla4xxx_post_work(struct scsi_qla_host *ha, qla4xxx_post_work() argument 5179 spin_lock_irqsave(&ha->work_lock, flags); qla4xxx_post_work() 5180 list_add_tail(&e->list, &ha->work_list); qla4xxx_post_work() 5181 spin_unlock_irqrestore(&ha->work_lock, flags); qla4xxx_post_work() 5182 qla4xxx_wake_dpc(ha); qla4xxx_post_work() 5185 int qla4xxx_post_aen_work(struct scsi_qla_host *ha, qla4xxx_post_aen_work() argument 5191 e = qla4xxx_alloc_work(ha, data_size, QLA4_EVENT_AEN); qla4xxx_post_aen_work() 5199 qla4xxx_post_work(ha, e); qla4xxx_post_aen_work() 5204 int qla4xxx_post_ping_evt_work(struct scsi_qla_host *ha, qla4xxx_post_ping_evt_work() argument 5210 e = qla4xxx_alloc_work(ha, data_size, QLA4_EVENT_PING_STATUS); qla4xxx_post_ping_evt_work() 5219 qla4xxx_post_work(ha, e); qla4xxx_post_ping_evt_work() 5224 static void qla4xxx_do_work(struct scsi_qla_host *ha) qla4xxx_do_work() argument 5230 spin_lock_irqsave(&ha->work_lock, flags); qla4xxx_do_work() 5231 list_splice_init(&ha->work_list, &work); qla4xxx_do_work() 5232 spin_unlock_irqrestore(&ha->work_lock, flags); qla4xxx_do_work() 5239 iscsi_post_host_event(ha->host_no, qla4xxx_do_work() 5246 iscsi_ping_comp_event(ha->host_no, qla4xxx_do_work() 5254 ql4_printk(KERN_WARNING, ha, "event type: 0x%x not " qla4xxx_do_work() 5274 struct scsi_qla_host *ha = qla4xxx_do_dpc() local 5278 DEBUG2(ql4_printk(KERN_INFO, ha, qla4xxx_do_dpc() 5280 ha->host_no, __func__, ha->flags, ha->dpc_flags)); qla4xxx_do_dpc() 5283 if (!test_bit(AF_INIT_DONE, &ha->flags)) qla4xxx_do_dpc() 5286 if (test_bit(AF_EEH_BUSY, &ha->flags)) { qla4xxx_do_dpc() 5288 ha->host_no, __func__, ha->flags)); qla4xxx_do_dpc() 5293 qla4xxx_do_work(ha); qla4xxx_do_dpc() 5295 if (is_qla80XX(ha)) { qla4xxx_do_dpc() 5296 if (test_bit(DPC_HA_UNRECOVERABLE, &ha->dpc_flags)) { qla4xxx_do_dpc() 5297 if (is_qla8032(ha) || is_qla8042(ha)) { qla4xxx_do_dpc() 5298 ql4_printk(KERN_INFO, ha, "%s: disabling pause transmit on port 0 & 1.\n", qla4xxx_do_dpc() 5301 qla4_83xx_disable_pause(ha); qla4xxx_do_dpc() 5304 ha->isp_ops->idc_lock(ha); qla4xxx_do_dpc() 5305 qla4_8xxx_wr_direct(ha, QLA8XXX_CRB_DEV_STATE, qla4xxx_do_dpc() 5307 ha->isp_ops->idc_unlock(ha); qla4xxx_do_dpc() 5308 ql4_printk(KERN_INFO, ha, "HW State: FAILED\n"); qla4xxx_do_dpc() 5309 qla4_8xxx_device_state_handler(ha); qla4xxx_do_dpc() 5312 if (test_bit(DPC_POST_IDC_ACK, &ha->dpc_flags)) { qla4xxx_do_dpc() 5313 if (is_qla8042(ha)) { qla4xxx_do_dpc() 5314 if (ha->idc_info.info2 & qla4xxx_do_dpc() 5316 ql4_printk(KERN_INFO, ha, "%s: Disabling ACB\n", qla4xxx_do_dpc() 5318 status = qla4_84xx_config_acb(ha, qla4xxx_do_dpc() 5321 ql4_printk(KERN_INFO, ha, "%s: ACB config failed\n", qla4xxx_do_dpc() 5326 qla4_83xx_post_idc_ack(ha); qla4xxx_do_dpc() 5327 clear_bit(DPC_POST_IDC_ACK, &ha->dpc_flags); qla4xxx_do_dpc() 5330 if (is_qla8042(ha) && qla4xxx_do_dpc() 5331 test_bit(DPC_RESTORE_ACB, &ha->dpc_flags)) { qla4xxx_do_dpc() 5332 ql4_printk(KERN_INFO, ha, "%s: Restoring ACB\n", qla4xxx_do_dpc() 5334 if (qla4_84xx_config_acb(ha, ACB_CONFIG_SET) != qla4xxx_do_dpc() 5336 ql4_printk(KERN_INFO, ha, "%s: ACB config failed ", qla4xxx_do_dpc() 5339 clear_bit(DPC_RESTORE_ACB, &ha->dpc_flags); qla4xxx_do_dpc() 5342 if (test_and_clear_bit(DPC_HA_NEED_QUIESCENT, &ha->dpc_flags)) { qla4xxx_do_dpc() 5343 qla4_8xxx_need_qsnt_handler(ha); qla4xxx_do_dpc() 5347 if (!test_bit(DPC_RESET_ACTIVE, &ha->dpc_flags) && qla4xxx_do_dpc() 5348 (test_bit(DPC_RESET_HA, &ha->dpc_flags) || qla4xxx_do_dpc() 5349 test_bit(DPC_RESET_HA_INTR, &ha->dpc_flags) || qla4xxx_do_dpc() 5350 test_bit(DPC_RESET_HA_FW_CONTEXT, &ha->dpc_flags))) { qla4xxx_do_dpc() 5351 if ((is_qla8022(ha) && ql4xdontresethba) || qla4xxx_do_dpc() 5352 ((is_qla8032(ha) || is_qla8042(ha)) && qla4xxx_do_dpc() 5353 qla4_83xx_idc_dontreset(ha))) { qla4xxx_do_dpc() 5355 ha->host_no, __func__)); qla4xxx_do_dpc() 5356 clear_bit(DPC_RESET_HA, &ha->dpc_flags); qla4xxx_do_dpc() 5357 clear_bit(DPC_RESET_HA_INTR, &ha->dpc_flags); qla4xxx_do_dpc() 5358 clear_bit(DPC_RESET_HA_FW_CONTEXT, &ha->dpc_flags); qla4xxx_do_dpc() 5361 if (test_bit(DPC_RESET_HA_FW_CONTEXT, &ha->dpc_flags) || qla4xxx_do_dpc() 5362 test_bit(DPC_RESET_HA, &ha->dpc_flags)) qla4xxx_do_dpc() 5363 qla4xxx_recover_adapter(ha); qla4xxx_do_dpc() 5365 if (test_bit(DPC_RESET_HA_INTR, &ha->dpc_flags)) { qla4xxx_do_dpc() 5368 while ((readw(&ha->reg->ctrl_status) & qla4xxx_do_dpc() 5377 ha->host_no, __func__)); qla4xxx_do_dpc() 5378 qla4xxx_abort_active_cmds(ha, DID_RESET << 16); qla4xxx_do_dpc() 5379 if (ql4xxx_lock_drvr_wait(ha) == QLA_SUCCESS) { qla4xxx_do_dpc() 5380 qla4xxx_process_aen(ha, FLUSH_DDB_CHANGED_AENS); qla4xxx_do_dpc() 5381 status = qla4xxx_recover_adapter(ha); qla4xxx_do_dpc() 5383 clear_bit(DPC_RESET_HA_INTR, &ha->dpc_flags); qla4xxx_do_dpc() 5385 ha->isp_ops->enable_intrs(ha); qla4xxx_do_dpc() 5391 if (test_and_clear_bit(DPC_AEN, &ha->dpc_flags)) qla4xxx_do_dpc() 5392 qla4xxx_process_aen(ha, PROCESS_ALL_AENS); qla4xxx_do_dpc() 5395 if (test_and_clear_bit(DPC_GET_DHCP_IP_ADDR, &ha->dpc_flags)) qla4xxx_do_dpc() 5396 qla4xxx_get_dhcp_ip_address(ha); qla4xxx_do_dpc() 5399 if (adapter_up(ha) && qla4xxx_do_dpc() 5400 test_and_clear_bit(DPC_RELOGIN_DEVICE, &ha->dpc_flags)) { qla4xxx_do_dpc() 5401 iscsi_host_for_each_session(ha->host, qla4xxx_dpc_relogin); qla4xxx_do_dpc() 5405 if (!test_bit(AF_LOOPBACK, &ha->flags) && qla4xxx_do_dpc() 5406 test_and_clear_bit(DPC_LINK_CHANGED, &ha->dpc_flags)) { qla4xxx_do_dpc() 5407 if (!test_bit(AF_LINK_UP, &ha->flags)) { qla4xxx_do_dpc() 5409 qla4xxx_mark_all_devices_missing(ha); qla4xxx_do_dpc() 5417 if (test_and_clear_bit(AF_BUILD_DDB_LIST, &ha->flags)) { qla4xxx_do_dpc() 5418 qla4xxx_build_ddb_list(ha, ha->is_reset); qla4xxx_do_dpc() 5419 iscsi_host_for_each_session(ha->host, qla4xxx_do_dpc() 5422 qla4xxx_relogin_all_devices(ha); qla4xxx_do_dpc() 5425 if (test_and_clear_bit(DPC_SYSFS_DDB_EXPORT, &ha->dpc_flags)) { qla4xxx_do_dpc() 5426 if (qla4xxx_sysfs_ddb_export(ha)) qla4xxx_do_dpc() 5427 ql4_printk(KERN_ERR, ha, "%s: Error exporting ddb to sysfs\n", qla4xxx_do_dpc() 5434 * @ha: pointer to adapter structure 5436 static void qla4xxx_free_adapter(struct scsi_qla_host *ha) qla4xxx_free_adapter() argument 5438 qla4xxx_abort_active_cmds(ha, DID_NO_CONNECT << 16); qla4xxx_free_adapter() 5441 ha->isp_ops->disable_intrs(ha); qla4xxx_free_adapter() 5443 if (is_qla40XX(ha)) { qla4xxx_free_adapter() 5445 &ha->reg->ctrl_status); qla4xxx_free_adapter() 5446 readl(&ha->reg->ctrl_status); qla4xxx_free_adapter() 5447 } else if (is_qla8022(ha)) { qla4xxx_free_adapter() 5448 writel(0, &ha->qla4_82xx_reg->host_int); qla4xxx_free_adapter() 5449 readl(&ha->qla4_82xx_reg->host_int); qla4xxx_free_adapter() 5450 } else if (is_qla8032(ha) || is_qla8042(ha)) { qla4xxx_free_adapter() 5451 writel(0, &ha->qla4_83xx_reg->risc_intr); qla4xxx_free_adapter() 5452 readl(&ha->qla4_83xx_reg->risc_intr); qla4xxx_free_adapter() 5456 if (ha->timer_active) qla4xxx_free_adapter() 5457 qla4xxx_stop_timer(ha); qla4xxx_free_adapter() 5460 if (ha->dpc_thread) qla4xxx_free_adapter() 5461 destroy_workqueue(ha->dpc_thread); qla4xxx_free_adapter() 5464 if (ha->task_wq) qla4xxx_free_adapter() 5465 destroy_workqueue(ha->task_wq); qla4xxx_free_adapter() 5468 ha->isp_ops->reset_firmware(ha); qla4xxx_free_adapter() 5470 if (is_qla80XX(ha)) { qla4xxx_free_adapter() 5471 ha->isp_ops->idc_lock(ha); qla4xxx_free_adapter() 5472 qla4_8xxx_clear_drv_active(ha); qla4xxx_free_adapter() 5473 ha->isp_ops->idc_unlock(ha); qla4xxx_free_adapter() 5477 qla4xxx_free_irqs(ha); qla4xxx_free_adapter() 5480 qla4xxx_mem_free(ha); qla4xxx_free_adapter() 5483 int qla4_8xxx_iospace_config(struct scsi_qla_host *ha) qla4_8xxx_iospace_config() argument 5487 struct pci_dev *pdev = ha->pdev; qla4_8xxx_iospace_config() 5493 "status=%d\n", ha->host_no, pci_name(pdev), status); qla4_8xxx_iospace_config() 5499 ha->revision_id = pdev->revision; qla4_8xxx_iospace_config() 5508 ha->nx_pcibase = (unsigned long)ioremap(mem_base, mem_len); qla4_8xxx_iospace_config() 5509 if (!ha->nx_pcibase) { qla4_8xxx_iospace_config() 5512 pci_release_regions(ha->pdev); qla4_8xxx_iospace_config() 5519 if (is_qla8022(ha)) { qla4_8xxx_iospace_config() 5520 ha->qla4_82xx_reg = (struct device_reg_82xx __iomem *) qla4_8xxx_iospace_config() 5521 ((uint8_t *)ha->nx_pcibase + 0xbc000 + qla4_8xxx_iospace_config() 5522 (ha->pdev->devfn << 11)); qla4_8xxx_iospace_config() 5523 ha->nx_db_wr_ptr = (ha->pdev->devfn == 4 ? QLA82XX_CAM_RAM_DB1 : qla4_8xxx_iospace_config() 5525 } else if (is_qla8032(ha) || is_qla8042(ha)) { qla4_8xxx_iospace_config() 5526 ha->qla4_83xx_reg = (struct device_reg_83xx __iomem *) qla4_8xxx_iospace_config() 5527 ((uint8_t *)ha->nx_pcibase); qla4_8xxx_iospace_config() 5540 * @ha: pointer to adapter structure 5545 int qla4xxx_iospace_config(struct scsi_qla_host *ha) qla4xxx_iospace_config() argument 5550 pio = pci_resource_start(ha->pdev, 0); qla4xxx_iospace_config() 5551 pio_len = pci_resource_len(ha->pdev, 0); qla4xxx_iospace_config() 5552 pio_flags = pci_resource_flags(ha->pdev, 0); qla4xxx_iospace_config() 5555 ql4_printk(KERN_WARNING, ha, qla4xxx_iospace_config() 5560 ql4_printk(KERN_WARNING, ha, "region #0 not a PIO resource\n"); qla4xxx_iospace_config() 5565 mmio = pci_resource_start(ha->pdev, 1); qla4xxx_iospace_config() 5566 mmio_len = pci_resource_len(ha->pdev, 1); qla4xxx_iospace_config() 5567 mmio_flags = pci_resource_flags(ha->pdev, 1); qla4xxx_iospace_config() 5570 ql4_printk(KERN_ERR, ha, qla4xxx_iospace_config() 5577 ql4_printk(KERN_ERR, ha, qla4xxx_iospace_config() 5582 if (pci_request_regions(ha->pdev, DRIVER_NAME)) { qla4xxx_iospace_config() 5583 ql4_printk(KERN_WARNING, ha, qla4xxx_iospace_config() 5589 ha->pio_address = pio; qla4xxx_iospace_config() 5590 ha->pio_length = pio_len; qla4xxx_iospace_config() 5591 ha->reg = ioremap(mmio, MIN_IOBASE_LEN); qla4xxx_iospace_config() 5592 if (!ha->reg) { qla4xxx_iospace_config() 5593 ql4_printk(KERN_ERR, ha, qla4xxx_iospace_config() 5680 uint16_t qla4xxx_rd_shdw_req_q_out(struct scsi_qla_host *ha) qla4xxx_rd_shdw_req_q_out() argument 5682 return (uint16_t)le32_to_cpu(ha->shadow_regs->req_q_out); qla4xxx_rd_shdw_req_q_out() 5685 uint16_t qla4_82xx_rd_shdw_req_q_out(struct scsi_qla_host *ha) qla4_82xx_rd_shdw_req_q_out() argument 5687 return (uint16_t)le32_to_cpu(readl(&ha->qla4_82xx_reg->req_q_out)); qla4_82xx_rd_shdw_req_q_out() 5690 uint16_t qla4xxx_rd_shdw_rsp_q_in(struct scsi_qla_host *ha) qla4xxx_rd_shdw_rsp_q_in() argument 5692 return (uint16_t)le32_to_cpu(ha->shadow_regs->rsp_q_in); qla4xxx_rd_shdw_rsp_q_in() 5695 uint16_t qla4_82xx_rd_shdw_rsp_q_in(struct scsi_qla_host *ha) qla4_82xx_rd_shdw_rsp_q_in() argument 5697 return (uint16_t)le32_to_cpu(readl(&ha->qla4_82xx_reg->rsp_q_in)); qla4_82xx_rd_shdw_rsp_q_in() 5702 struct scsi_qla_host *ha = data; qla4xxx_show_boot_eth_info() local 5714 rc = sysfs_format_mac(str, ha->my_mac, qla4xxx_show_boot_eth_info() 5743 struct scsi_qla_host *ha = data; qla4xxx_show_boot_ini_info() local 5749 rc = sprintf(str, "%s\n", ha->name_string); qla4xxx_show_boot_ini_info() 5831 struct scsi_qla_host *ha = data; qla4xxx_show_boot_tgt_pri_info() local 5832 struct ql4_boot_session_info *boot_sess = &(ha->boot_tgt.boot_pri_sess); qla4xxx_show_boot_tgt_pri_info() 5839 struct scsi_qla_host *ha = data; qla4xxx_show_boot_tgt_sec_info() local 5840 struct ql4_boot_session_info *boot_sess = &(ha->boot_tgt.boot_sec_sess); qla4xxx_show_boot_tgt_sec_info() 5870 struct scsi_qla_host *ha = data; qla4xxx_boot_release() local 5872 scsi_host_put(ha->host); qla4xxx_boot_release() 5875 static int get_fw_boot_info(struct scsi_qla_host *ha, uint16_t ddb_index[]) get_fw_boot_info() argument 5886 func_num = PCI_FUNC(ha->pdev->devfn); get_fw_boot_info() 5888 ql4_printk(KERN_INFO, ha, "%s: Get FW boot info for 0x%x func %d\n", get_fw_boot_info() 5889 __func__, ha->pdev->device, func_num); get_fw_boot_info() 5891 if (is_qla40XX(ha)) { get_fw_boot_info() 5906 val = rd_nvram_byte(ha, addr); get_fw_boot_info() 5908 DEBUG2(ql4_printk(KERN_INFO, ha, "%s: Adapter boot " get_fw_boot_info() 5915 val = rd_nvram_byte(ha, pri_addr); get_fw_boot_info() 5920 val = rd_nvram_byte(ha, sec_addr); get_fw_boot_info() 5924 } else if (is_qla80XX(ha)) { get_fw_boot_info() 5925 buf = dma_alloc_coherent(&ha->pdev->dev, size, get_fw_boot_info() 5928 DEBUG2(ql4_printk(KERN_ERR, ha, get_fw_boot_info() 5935 if (ha->port_num == 0) get_fw_boot_info() 5937 else if (ha->port_num == 1) get_fw_boot_info() 5943 addr = FLASH_RAW_ACCESS_ADDR + (ha->hw.flt_iscsi_param * 4) + get_fw_boot_info() 5945 if (qla4xxx_get_flash(ha, buf_dma, addr, get_fw_boot_info() 5947 DEBUG2(ql4_printk(KERN_ERR, ha, "scsi%ld: %s: Get Flash" get_fw_boot_info() 5948 " failed\n", ha->host_no, __func__)); get_fw_boot_info() 5954 DEBUG2(ql4_printk(KERN_INFO, ha, "Firmware boot options" get_fw_boot_info() 5972 DEBUG2(ql4_printk(KERN_INFO, ha, "%s: Primary target ID %d, Secondary" get_fw_boot_info() 5977 dma_free_coherent(&ha->pdev->dev, size, buf, buf_dma); get_fw_boot_info() 5979 ha->pri_ddb_idx = ddb_index[0]; get_fw_boot_info() 5980 ha->sec_ddb_idx = ddb_index[1]; get_fw_boot_info() 5986 * @ha: pointer to adapter structure 5995 static int qla4xxx_get_bidi_chap(struct scsi_qla_host *ha, char *username, qla4xxx_get_bidi_chap() argument 6002 if (is_qla80XX(ha)) qla4xxx_get_bidi_chap() 6003 max_chap_entries = (ha->hw.flt_chap_size / 2) / qla4xxx_get_bidi_chap() 6008 if (!ha->chap_list) { qla4xxx_get_bidi_chap() 6009 ql4_printk(KERN_ERR, ha, "Do not have CHAP table cache\n"); qla4xxx_get_bidi_chap() 6013 mutex_lock(&ha->chap_sem); qla4xxx_get_bidi_chap() 6015 chap_table = (struct ql4_chap_table *)ha->chap_list + i; qla4xxx_get_bidi_chap() 6032 mutex_unlock(&ha->chap_sem); qla4xxx_get_bidi_chap() 6038 static int qla4xxx_get_boot_target(struct scsi_qla_host *ha, qla4xxx_get_boot_target() argument 6049 fw_ddb_entry = dma_alloc_coherent(&ha->pdev->dev, sizeof(*fw_ddb_entry), qla4xxx_get_boot_target() 6052 DEBUG2(ql4_printk(KERN_ERR, ha, qla4xxx_get_boot_target() 6059 if (qla4xxx_bootdb_by_index(ha, fw_ddb_entry, qla4xxx_get_boot_target() 6061 DEBUG2(ql4_printk(KERN_INFO, ha, "%s: No Flash DDB found at " qla4xxx_get_boot_target() 6089 DEBUG2(ql4_printk(KERN_INFO, ha, "Setting chap\n")); qla4xxx_get_boot_target() 6091 ret = qla4xxx_get_chap(ha, (char *)&boot_conn->chap. qla4xxx_get_boot_target() 6096 ql4_printk(KERN_ERR, ha, "Failed to set chap\n"); qla4xxx_get_boot_target() 6107 DEBUG2(ql4_printk(KERN_INFO, ha, "Setting BIDI chap\n")); qla4xxx_get_boot_target() 6109 ret = qla4xxx_get_bidi_chap(ha, qla4xxx_get_boot_target() 6114 ql4_printk(KERN_ERR, ha, "Failed to set BIDI chap\n"); qla4xxx_get_boot_target() 6124 dma_free_coherent(&ha->pdev->dev, sizeof(*fw_ddb_entry), qla4xxx_get_boot_target() 6129 static int qla4xxx_get_boot_info(struct scsi_qla_host *ha) qla4xxx_get_boot_info() argument 6138 ret = get_fw_boot_info(ha, ddb_index); qla4xxx_get_boot_info() 6140 DEBUG2(ql4_printk(KERN_INFO, ha, qla4xxx_get_boot_info() 6151 rval = qla4xxx_get_boot_target(ha, &(ha->boot_tgt.boot_pri_sess), qla4xxx_get_boot_info() 6154 DEBUG2(ql4_printk(KERN_INFO, ha, "%s: Primary boot target not " qla4xxx_get_boot_info() 6163 rval = qla4xxx_get_boot_target(ha, &(ha->boot_tgt.boot_sec_sess), qla4xxx_get_boot_info() 6166 DEBUG2(ql4_printk(KERN_INFO, ha, "%s: Secondary boot target not" qla4xxx_get_boot_info() 6175 static int qla4xxx_setup_boot_info(struct scsi_qla_host *ha) qla4xxx_setup_boot_info() argument 6179 if (qla4xxx_get_boot_info(ha) != QLA_SUCCESS) qla4xxx_setup_boot_info() 6183 ql4_printk(KERN_INFO, ha, qla4xxx_setup_boot_info() 6190 ha->boot_kset = iscsi_boot_create_host_kset(ha->host->host_no); qla4xxx_setup_boot_info() 6191 if (!ha->boot_kset) qla4xxx_setup_boot_info() 6194 if (!scsi_host_get(ha->host)) qla4xxx_setup_boot_info() 6196 boot_kobj = iscsi_boot_create_target(ha->boot_kset, 0, ha, qla4xxx_setup_boot_info() 6203 if (!scsi_host_get(ha->host)) qla4xxx_setup_boot_info() 6205 boot_kobj = iscsi_boot_create_target(ha->boot_kset, 1, ha, qla4xxx_setup_boot_info() 6212 if (!scsi_host_get(ha->host)) qla4xxx_setup_boot_info() 6214 boot_kobj = iscsi_boot_create_initiator(ha->boot_kset, 0, ha, qla4xxx_setup_boot_info() 6221 if (!scsi_host_get(ha->host)) qla4xxx_setup_boot_info() 6223 boot_kobj = iscsi_boot_create_ethernet(ha->boot_kset, 0, ha, qla4xxx_setup_boot_info() 6233 scsi_host_put(ha->host); qla4xxx_setup_boot_info() 6235 iscsi_boot_destroy_kset(ha->boot_kset); qla4xxx_setup_boot_info() 6243 struct scsi_qla_host *ha; qla4xxx_get_param_ddb() local 6250 ha = ddb_entry->ha; qla4xxx_get_param_ddb() 6287 static int qla4xxx_compare_tuple_ddb(struct scsi_qla_host *ha, qla4xxx_compare_tuple_ddb() argument 6308 DEBUG2(ql4_printk(KERN_INFO, ha, "%s: old ISID [%02x%02x%02x" qla4xxx_compare_tuple_ddb() 6321 DEBUG2(ql4_printk(KERN_INFO, ha, qla4xxx_compare_tuple_ddb() 6330 static int qla4xxx_is_session_exists(struct scsi_qla_host *ha, qla4xxx_is_session_exists() argument 6342 DEBUG2(ql4_printk(KERN_WARNING, ha, qla4xxx_is_session_exists() 6350 DEBUG2(ql4_printk(KERN_WARNING, ha, qla4xxx_is_session_exists() 6359 ddb_entry = qla4xxx_lookup_ddb_by_fw_index(ha, idx); qla4xxx_is_session_exists() 6364 if (!qla4xxx_compare_tuple_ddb(ha, fw_tddb, tmp_tddb, false)) { qla4xxx_is_session_exists() 6406 * @ha: Pointer to host adapter structure. 6414 static int qla4xxx_update_isid(struct scsi_qla_host *ha, qla4xxx_update_isid() argument 6435 * @ha: Pointer to host adapter structure. 6442 static int qla4xxx_should_update_isid(struct scsi_qla_host *ha, qla4xxx_should_update_isid() argument 6466 * @ha: Pointer to host adapter structure. 6476 static int qla4xxx_is_flash_ddb_exists(struct scsi_qla_host *ha, qla4xxx_is_flash_ddb_exists() argument 6487 DEBUG2(ql4_printk(KERN_WARNING, ha, qla4xxx_is_flash_ddb_exists() 6495 DEBUG2(ql4_printk(KERN_WARNING, ha, qla4xxx_is_flash_ddb_exists() 6506 ret = qla4xxx_compare_tuple_ddb(ha, fw_tddb, tmp_tddb, true); list_for_each_entry_safe() 6515 ret = qla4xxx_should_update_isid(ha, tmp_tddb, fw_tddb); list_for_each_entry_safe() 6517 rval = qla4xxx_update_isid(ha, list_nt, fw_ddb_entry); list_for_each_entry_safe() 6545 static struct iscsi_endpoint *qla4xxx_get_ep_fwdb(struct scsi_qla_host *ha, qla4xxx_get_ep_fwdb() argument 6577 ep = qla4xxx_ep_connect(ha->host, (struct sockaddr *)dst_addr, 0); qla4xxx_get_ep_fwdb() 6582 static int qla4xxx_verify_boot_idx(struct scsi_qla_host *ha, uint16_t idx) qla4xxx_verify_boot_idx() argument 6586 if (idx == ha->pri_ddb_idx || idx == ha->sec_ddb_idx) qla4xxx_verify_boot_idx() 6591 static void qla4xxx_setup_flash_ddb_entry(struct scsi_qla_host *ha, qla4xxx_setup_flash_ddb_entry() argument 6600 ddb_entry->ha = ha; qla4xxx_setup_flash_ddb_entry() 6616 (idx == ha->pri_ddb_idx || idx == ha->sec_ddb_idx)) qla4xxx_setup_flash_ddb_entry() 6620 static void qla4xxx_wait_for_ip_configuration(struct scsi_qla_host *ha) qla4xxx_wait_for_ip_configuration() argument 6635 ret = qla4xxx_get_ip_state(ha, 0, ip_idx[idx], sts); qla4xxx_wait_for_ip_configuration() 6644 DEBUG2(ql4_printk(KERN_INFO, ha, qla4xxx_wait_for_ip_configuration() 6689 static int qla4xxx_find_flash_st_idx(struct scsi_qla_host *ha, qla4xxx_find_flash_st_idx() argument 6699 max_ddbs = is_qla40XX(ha) ? MAX_DEV_DB_ENTRIES_40XX : qla4xxx_find_flash_st_idx() 6702 flash_ddb_entry = dma_pool_alloc(ha->fw_ddb_dma_pool, GFP_KERNEL, qla4xxx_find_flash_st_idx() 6705 ql4_printk(KERN_ERR, ha, "Out of memory\n"); qla4xxx_find_flash_st_idx() 6709 status = qla4xxx_flashdb_by_index(ha, flash_ddb_entry, qla4xxx_find_flash_st_idx() 6721 status = qla4xxx_flashdb_by_index(ha, flash_ddb_entry, qla4xxx_find_flash_st_idx() 6735 ql4_printk(KERN_ERR, ha, "Failed to find ST [%d] in flash\n", qla4xxx_find_flash_st_idx() 6740 dma_pool_free(ha->fw_ddb_dma_pool, flash_ddb_entry, qla4xxx_find_flash_st_idx() 6746 static void qla4xxx_build_st_list(struct scsi_qla_host *ha, qla4xxx_build_st_list() argument 6760 fw_ddb_entry = dma_pool_alloc(ha->fw_ddb_dma_pool, GFP_KERNEL, qla4xxx_build_st_list() 6763 DEBUG2(ql4_printk(KERN_ERR, ha, "Out of memory\n")); qla4xxx_build_st_list() 6767 max_ddbs = is_qla40XX(ha) ? MAX_DEV_DB_ENTRIES_40XX : qla4xxx_build_st_list() 6772 ret = qla4xxx_get_fwddb_entry(ha, idx, fw_ddb_entry, fw_ddb_dma, qla4xxx_build_st_list() 6790 ret = qla4xxx_find_flash_st_idx(ha, fw_ddb_entry, idx, qla4xxx_build_st_list() 6793 ql4_printk(KERN_ERR, ha, qla4xxx_build_st_list() 6797 ql4_printk(KERN_INFO, ha, qla4xxx_build_st_list() 6813 dma_pool_free(ha->fw_ddb_dma_pool, fw_ddb_entry, fw_ddb_dma); qla4xxx_build_st_list() 6818 * @ha: pointer to adapter structure 6824 static void qla4xxx_remove_failed_ddb(struct scsi_qla_host *ha, qla4xxx_remove_failed_ddb() argument 6833 ret = qla4xxx_get_fwddb_entry(ha, ddb_idx->fw_ddb_idx, list_for_each_entry_safe() 6847 static void qla4xxx_update_sess_disc_idx(struct scsi_qla_host *ha, qla4xxx_update_sess_disc_idx() argument 6856 max_ddbs = is_qla40XX(ha) ? MAX_DEV_DB_ENTRIES_40XX : qla4xxx_update_sess_disc_idx() 6869 static int qla4xxx_sess_conn_setup(struct scsi_qla_host *ha, qla4xxx_sess_conn_setup() argument 6887 cls_sess = iscsi_session_setup(&qla4xxx_iscsi_transport, ha->host, qla4xxx_sess_conn_setup() 6909 qla4xxx_setup_flash_ddb_entry(ha, ddb_entry, idx); qla4xxx_sess_conn_setup() 6921 ep = qla4xxx_get_ep_fwdb(ha, fw_ddb_entry); qla4xxx_sess_conn_setup() 6926 DEBUG2(ql4_printk(KERN_ERR, ha, "Unable to get ep\n")); qla4xxx_sess_conn_setup() 6932 qla4xxx_copy_fwddb_param(ha, fw_ddb_entry, cls_sess, cls_conn); qla4xxx_sess_conn_setup() 6933 qla4xxx_update_sess_disc_idx(ha, ddb_entry, fw_ddb_entry); qla4xxx_sess_conn_setup() 6942 set_bit(DPC_RELOGIN_DEVICE, &ha->dpc_flags); qla4xxx_sess_conn_setup() 6950 static void qla4xxx_update_fw_ddb_link(struct scsi_qla_host *ha, qla4xxx_update_fw_ddb_link() argument 6961 DEBUG2(ql4_printk(KERN_INFO, ha, list_for_each_entry_safe() 6971 static void qla4xxx_build_nt_list(struct scsi_qla_host *ha, qla4xxx_build_nt_list() argument 6989 fw_ddb_entry = dma_pool_alloc(ha->fw_ddb_dma_pool, GFP_KERNEL, qla4xxx_build_nt_list() 6992 DEBUG2(ql4_printk(KERN_ERR, ha, "Out of memory\n")); qla4xxx_build_nt_list() 6995 max_ddbs = is_qla40XX(ha) ? MAX_DEV_DB_ENTRIES_40XX : qla4xxx_build_nt_list() 7000 ret = qla4xxx_get_fwddb_entry(ha, idx, fw_ddb_entry, fw_ddb_dma, qla4xxx_build_nt_list() 7006 if (qla4xxx_verify_boot_idx(ha, idx) != QLA_SUCCESS) qla4xxx_build_nt_list() 7015 qla4xxx_update_fw_ddb_link(ha, list_st, fw_ddb_entry); qla4xxx_build_nt_list() 7022 DEBUG2(ql4_printk(KERN_INFO, ha, qla4xxx_build_nt_list() 7040 ret = qla4xxx_is_flash_ddb_exists(ha, list_nt, qla4xxx_build_nt_list() 7054 ret = qla4xxx_is_session_exists(ha, fw_ddb_entry, qla4xxx_build_nt_list() 7057 ddb_entry = qla4xxx_lookup_ddb_by_fw_index(ha, qla4xxx_build_nt_list() 7060 qla4xxx_update_sess_disc_idx(ha, qla4xxx_build_nt_list() 7067 ret = qla4xxx_sess_conn_setup(ha, fw_ddb_entry, is_reset, idx); qla4xxx_build_nt_list() 7078 dma_pool_free(ha->fw_ddb_dma_pool, fw_ddb_entry, fw_ddb_dma); qla4xxx_build_nt_list() 7081 static void qla4xxx_build_new_nt_list(struct scsi_qla_host *ha, qla4xxx_build_new_nt_list() argument 7095 fw_ddb_entry = dma_pool_alloc(ha->fw_ddb_dma_pool, GFP_KERNEL, qla4xxx_build_new_nt_list() 7098 DEBUG2(ql4_printk(KERN_ERR, ha, "Out of memory\n")); qla4xxx_build_new_nt_list() 7101 max_ddbs = is_qla40XX(ha) ? MAX_DEV_DB_ENTRIES_40XX : qla4xxx_build_new_nt_list() 7106 ret = qla4xxx_get_fwddb_entry(ha, idx, fw_ddb_entry, fw_ddb_dma, qla4xxx_build_new_nt_list() 7119 DEBUG2(ql4_printk(KERN_INFO, ha, qla4xxx_build_new_nt_list() 7128 ret = qla4xxx_is_session_exists(ha, fw_ddb_entry, NULL); qla4xxx_build_new_nt_list() 7140 ret = qla4xxx_sess_conn_setup(ha, fw_ddb_entry, RESET_ADAPTER, qla4xxx_build_new_nt_list() 7152 dma_pool_free(ha->fw_ddb_dma_pool, fw_ddb_entry, fw_ddb_dma); qla4xxx_build_new_nt_list() 7178 * @ha: pointer to host 7192 static int qla4xxx_sysfs_ddb_tgt_create(struct scsi_qla_host *ha, qla4xxx_sysfs_ddb_tgt_create() argument 7200 fnode_sess = iscsi_create_flashnode_sess(ha->host, *idx, qla4xxx_sysfs_ddb_tgt_create() 7203 ql4_printk(KERN_ERR, ha, qla4xxx_sysfs_ddb_tgt_create() 7205 __func__, *idx, ha->host_no); qla4xxx_sysfs_ddb_tgt_create() 7209 fnode_conn = iscsi_create_flashnode_conn(ha->host, fnode_sess, qla4xxx_sysfs_ddb_tgt_create() 7212 ql4_printk(KERN_ERR, ha, qla4xxx_sysfs_ddb_tgt_create() 7214 __func__, *idx, ha->host_no); qla4xxx_sysfs_ddb_tgt_create() 7223 if (*idx == ha->pri_ddb_idx || *idx == ha->sec_ddb_idx) qla4xxx_sysfs_ddb_tgt_create() 7232 ql4_printk(KERN_INFO, ha, "%s: sysfs entry %s created\n", qla4xxx_sysfs_ddb_tgt_create() 7235 ql4_printk(KERN_INFO, ha, "%s: sysfs entry %s created\n", qla4xxx_sysfs_ddb_tgt_create() 7259 struct scsi_qla_host *ha = to_qla_host(shost); qla4xxx_sysfs_ddb_add() local 7270 DEBUG2(ql4_printk(KERN_ERR, ha, "%s: Invalid portal type\n", qla4xxx_sysfs_ddb_add() 7275 max_ddbs = is_qla40XX(ha) ? MAX_PRST_DEV_DB_ENTRIES : qla4xxx_sysfs_ddb_add() 7278 fw_ddb_entry = dma_alloc_coherent(&ha->pdev->dev, sizeof(*fw_ddb_entry), qla4xxx_sysfs_ddb_add() 7281 DEBUG2(ql4_printk(KERN_ERR, ha, qla4xxx_sysfs_ddb_add() 7287 dev = iscsi_find_flashnode_sess(ha->host, NULL, qla4xxx_sysfs_ddb_add() 7290 ql4_printk(KERN_ERR, ha, qla4xxx_sysfs_ddb_add() 7299 if (qla4xxx_flashdb_by_index(ha, fw_ddb_entry, qla4xxx_sysfs_ddb_add() 7310 rval = qla4xxx_get_default_ddb(ha, options, fw_ddb_entry_dma); qla4xxx_sysfs_ddb_add() 7314 rval = qla4xxx_sysfs_ddb_tgt_create(ha, fw_ddb_entry, &idx, 1); qla4xxx_sysfs_ddb_add() 7318 dma_free_coherent(&ha->pdev->dev, sizeof(*fw_ddb_entry), qla4xxx_sysfs_ddb_add() 7338 struct scsi_qla_host *ha = to_qla_host(shost); qla4xxx_sysfs_ddb_apply() local 7345 fw_ddb_entry = dma_alloc_coherent(&ha->pdev->dev, sizeof(*fw_ddb_entry), qla4xxx_sysfs_ddb_apply() 7348 DEBUG2(ql4_printk(KERN_ERR, ha, qla4xxx_sysfs_ddb_apply() 7358 rval = qla4xxx_get_default_ddb(ha, options, fw_ddb_entry_dma); qla4xxx_sysfs_ddb_apply() 7368 rval = qla4xxx_set_flash(ha, fw_ddb_entry_dma, dev_db_start_offset, qla4xxx_sysfs_ddb_apply() 7373 ql4_printk(KERN_INFO, ha, qla4xxx_sysfs_ddb_apply() 7375 __func__, fnode_sess->target_id, ha->host_no); qla4xxx_sysfs_ddb_apply() 7378 ql4_printk(KERN_ERR, ha, qla4xxx_sysfs_ddb_apply() 7380 __func__, fnode_sess->target_id, ha->host_no); qla4xxx_sysfs_ddb_apply() 7385 dma_free_coherent(&ha->pdev->dev, sizeof(*fw_ddb_entry), qla4xxx_sysfs_ddb_apply() 7390 static ssize_t qla4xxx_sysfs_ddb_conn_open(struct scsi_qla_host *ha, qla4xxx_sysfs_ddb_conn_open() argument 7402 ddb_entry = dma_alloc_coherent(&ha->pdev->dev, sizeof(*ddb_entry), qla4xxx_sysfs_ddb_conn_open() 7405 DEBUG2(ql4_printk(KERN_ERR, ha, qla4xxx_sysfs_ddb_conn_open() 7413 ret = qla4xxx_set_ddb_entry(ha, idx, ddb_entry_dma, &mbx_sts); qla4xxx_sysfs_ddb_conn_open() 7415 DEBUG2(ql4_printk(KERN_ERR, ha, qla4xxx_sysfs_ddb_conn_open() 7421 qla4xxx_conn_open(ha, idx); qla4xxx_sysfs_ddb_conn_open() 7424 tmo = ((ha->def_timeout > LOGIN_TOV) && qla4xxx_sysfs_ddb_conn_open() 7425 (ha->def_timeout < LOGIN_TOV * 10) ? qla4xxx_sysfs_ddb_conn_open() 7426 ha->def_timeout : LOGIN_TOV); qla4xxx_sysfs_ddb_conn_open() 7428 DEBUG2(ql4_printk(KERN_INFO, ha, qla4xxx_sysfs_ddb_conn_open() 7433 ret = qla4xxx_get_fwddb_entry(ha, idx, NULL, 0, NULL, qla4xxx_sysfs_ddb_conn_open() 7448 dma_free_coherent(&ha->pdev->dev, sizeof(*ddb_entry), qla4xxx_sysfs_ddb_conn_open() 7453 static int qla4xxx_ddb_login_st(struct scsi_qla_host *ha, qla4xxx_ddb_login_st() argument 7462 if (test_bit(AF_ST_DISCOVERY_IN_PROGRESS, &ha->flags)) { qla4xxx_ddb_login_st() 7463 ql4_printk(KERN_WARNING, ha, qla4xxx_ddb_login_st() 7470 set_bit(AF_ST_DISCOVERY_IN_PROGRESS, &ha->flags); qla4xxx_ddb_login_st() 7472 ret = qla4xxx_get_ddb_index(ha, &ddb_index); qla4xxx_ddb_login_st() 7476 ret = qla4xxx_sysfs_ddb_conn_open(ha, fw_ddb_entry, ddb_index); qla4xxx_ddb_login_st() 7480 qla4xxx_build_new_nt_list(ha, &list_nt, target_id); qla4xxx_ddb_login_st() 7484 qla4xxx_clear_ddb_entry(ha, ddb_idx->fw_ddb_idx); qla4xxx_ddb_login_st() 7489 if (qla4xxx_clear_ddb_entry(ha, ddb_index) == QLA_ERROR) { qla4xxx_ddb_login_st() 7490 ql4_printk(KERN_ERR, ha, qla4xxx_ddb_login_st() 7494 clear_bit(ddb_index, ha->ddb_idx_map); qla4xxx_ddb_login_st() 7497 clear_bit(AF_ST_DISCOVERY_IN_PROGRESS, &ha->flags); qla4xxx_ddb_login_st() 7501 static int qla4xxx_ddb_login_nt(struct scsi_qla_host *ha, qla4xxx_ddb_login_nt() argument 7507 ret = qla4xxx_is_session_exists(ha, fw_ddb_entry, NULL); qla4xxx_ddb_login_nt() 7509 ret = qla4xxx_sess_conn_setup(ha, fw_ddb_entry, RESET_ADAPTER, qla4xxx_ddb_login_nt() 7528 struct scsi_qla_host *ha = to_qla_host(shost); qla4xxx_sysfs_ddb_login() local 7535 ql4_printk(KERN_ERR, ha, qla4xxx_sysfs_ddb_login() 7541 fw_ddb_entry = dma_alloc_coherent(&ha->pdev->dev, sizeof(*fw_ddb_entry), qla4xxx_sysfs_ddb_login() 7544 DEBUG2(ql4_printk(KERN_ERR, ha, qla4xxx_sysfs_ddb_login() 7554 ret = qla4xxx_get_default_ddb(ha, options, fw_ddb_entry_dma); qla4xxx_sysfs_ddb_login() 7562 ret = qla4xxx_ddb_login_st(ha, fw_ddb_entry, qla4xxx_sysfs_ddb_login() 7565 ret = qla4xxx_ddb_login_nt(ha, fw_ddb_entry, qla4xxx_sysfs_ddb_login() 7573 dma_free_coherent(&ha->pdev->dev, sizeof(*fw_ddb_entry), qla4xxx_sysfs_ddb_login() 7588 struct scsi_qla_host *ha; qla4xxx_sysfs_ddb_logout_sid() local 7599 ha = ddb_entry->ha; qla4xxx_sysfs_ddb_logout_sid() 7602 ql4_printk(KERN_ERR, ha, "%s: Not a flash node session\n", qla4xxx_sysfs_ddb_logout_sid() 7609 ql4_printk(KERN_ERR, ha, qla4xxx_sysfs_ddb_logout_sid() 7616 fw_ddb_entry = dma_alloc_coherent(&ha->pdev->dev, sizeof(*fw_ddb_entry), qla4xxx_sysfs_ddb_logout_sid() 7619 ql4_printk(KERN_ERR, ha, qla4xxx_sysfs_ddb_logout_sid() 7628 ret = qla4xxx_get_fwddb_entry(ha, ddb_entry->fw_ddb_index, qla4xxx_sysfs_ddb_logout_sid() 7654 qla4xxx_session_logout_ddb(ha, ddb_entry, options); qla4xxx_sysfs_ddb_logout_sid() 7659 ret = qla4xxx_get_fwddb_entry(ha, ddb_entry->fw_ddb_index, qla4xxx_sysfs_ddb_logout_sid() 7674 qla4xxx_clear_ddb_entry(ha, ddb_entry->fw_ddb_index); qla4xxx_sysfs_ddb_logout_sid() 7684 spin_lock_irqsave(&ha->hardware_lock, flags); qla4xxx_sysfs_ddb_logout_sid() 7685 qla4xxx_free_ddb(ha, ddb_entry); qla4xxx_sysfs_ddb_logout_sid() 7686 clear_bit(ddb_entry->fw_ddb_index, ha->ddb_idx_map); qla4xxx_sysfs_ddb_logout_sid() 7687 spin_unlock_irqrestore(&ha->hardware_lock, flags); qla4xxx_sysfs_ddb_logout_sid() 7696 dma_free_coherent(&ha->pdev->dev, sizeof(*fw_ddb_entry), qla4xxx_sysfs_ddb_logout_sid() 7712 struct scsi_qla_host *ha = to_qla_host(shost); qla4xxx_sysfs_ddb_logout() local 7724 fw_ddb_entry = dma_pool_alloc(ha->fw_ddb_dma_pool, GFP_KERNEL, qla4xxx_sysfs_ddb_logout() 7727 ql4_printk(KERN_ERR, ha, "%s:Out of memory\n", __func__); qla4xxx_sysfs_ddb_logout() 7734 ql4_printk(KERN_WARNING, ha, qla4xxx_sysfs_ddb_logout() 7742 ql4_printk(KERN_WARNING, ha, qla4xxx_sysfs_ddb_logout() 7749 ql4_printk(KERN_ERR, ha, qla4xxx_sysfs_ddb_logout() 7757 ql4_printk(KERN_ERR, ha, qla4xxx_sysfs_ddb_logout() 7778 ddb_entry = qla4xxx_lookup_ddb_by_fw_index(ha, idx); qla4xxx_sysfs_ddb_logout() 7786 status = qla4xxx_get_fwddb_entry(ha, index, fw_ddb_entry, qla4xxx_sysfs_ddb_logout() 7797 status = qla4xxx_compare_tuple_ddb(ha, flash_tddb, tmp_tddb, qla4xxx_sysfs_ddb_logout() 7814 dma_pool_free(ha->fw_ddb_dma_pool, fw_ddb_entry, fw_ddb_dma); qla4xxx_sysfs_ddb_logout() 7824 struct scsi_qla_host *ha = to_qla_host(shost); qla4xxx_sysfs_ddb_get_param() local 8029 qla4xxx_get_uni_chap_at_index(ha, qla4xxx_sysfs_ddb_get_param() 8040 qla4xxx_get_uni_chap_at_index(ha, qla4xxx_sysfs_ddb_get_param() 8082 struct scsi_qla_host *ha = to_qla_host(shost); qla4xxx_sysfs_ddb_set_param() local 8276 if (!qla4xxx_get_uni_chap_at_index(ha, nla_for_each_attr() 8286 ql4_printk(KERN_ERR, ha, nla_for_each_attr() 8308 struct scsi_qla_host *ha = to_qla_host(shost); qla4xxx_sysfs_ddb_delete() local 8321 DEBUG2(ql4_printk(KERN_ERR, ha, qla4xxx_sysfs_ddb_delete() 8330 if (is_qla40XX(ha)) { qla4xxx_sysfs_ddb_delete() 8338 (ha->hw.flt_region_ddb << 2); qla4xxx_sysfs_ddb_delete() 8342 if (ha->port_num == 1) qla4xxx_sysfs_ddb_delete() 8343 dev_db_start_offset += (ha->hw.flt_ddb_size / 2); qla4xxx_sysfs_ddb_delete() 8346 (ha->hw.flt_ddb_size / 2); qla4xxx_sysfs_ddb_delete() 8355 DEBUG2(ql4_printk(KERN_ERR, ha, "%s: start offset=%u, end offset=%u\n", qla4xxx_sysfs_ddb_delete() 8360 DEBUG2(ql4_printk(KERN_ERR, ha, "%s:Invalid DDB index %u\n", qla4xxx_sysfs_ddb_delete() 8365 pddb = dma_alloc_coherent(&ha->pdev->dev, ddb_size, qla4xxx_sysfs_ddb_delete() 8369 DEBUG2(ql4_printk(KERN_ERR, ha, qla4xxx_sysfs_ddb_delete() 8375 if (is_qla40XX(ha)) { qla4xxx_sysfs_ddb_delete() 8385 qla4xxx_set_flash(ha, fw_ddb_entry_dma, dev_db_start_offset, qla4xxx_sysfs_ddb_delete() 8391 ql4_printk(KERN_INFO, ha, qla4xxx_sysfs_ddb_delete() 8393 __func__, target_id, ha->host_no); qla4xxx_sysfs_ddb_delete() 8396 dma_free_coherent(&ha->pdev->dev, ddb_size, pddb, qla4xxx_sysfs_ddb_delete() 8403 * @ha: pointer to adapter structure 8407 int qla4xxx_sysfs_ddb_export(struct scsi_qla_host *ha) qla4xxx_sysfs_ddb_export() argument 8415 fw_ddb_entry = dma_alloc_coherent(&ha->pdev->dev, qla4xxx_sysfs_ddb_export() 8419 DEBUG2(ql4_printk(KERN_ERR, ha, qla4xxx_sysfs_ddb_export() 8425 max_ddbs = is_qla40XX(ha) ? MAX_PRST_DEV_DB_ENTRIES : qla4xxx_sysfs_ddb_export() 8429 if (qla4xxx_flashdb_by_index(ha, fw_ddb_entry, fw_ddb_entry_dma, qla4xxx_sysfs_ddb_export() 8433 ret = qla4xxx_sysfs_ddb_tgt_create(ha, fw_ddb_entry, &idx, 0); qla4xxx_sysfs_ddb_export() 8440 dma_free_coherent(&ha->pdev->dev, sizeof(*fw_ddb_entry), fw_ddb_entry, qla4xxx_sysfs_ddb_export() 8446 static void qla4xxx_sysfs_ddb_remove(struct scsi_qla_host *ha) qla4xxx_sysfs_ddb_remove() argument 8448 iscsi_destroy_all_flashnode(ha->host); qla4xxx_sysfs_ddb_remove() 8453 * @ha: pointer to adapter structure 8461 void qla4xxx_build_ddb_list(struct scsi_qla_host *ha, int is_reset) qla4xxx_build_ddb_list() argument 8468 if (!test_bit(AF_LINK_UP, &ha->flags)) { qla4xxx_build_ddb_list() 8469 set_bit(AF_BUILD_DDB_LIST, &ha->flags); qla4xxx_build_ddb_list() 8470 ha->is_reset = is_reset; qla4xxx_build_ddb_list() 8477 qla4xxx_build_st_list(ha, &list_st); qla4xxx_build_ddb_list() 8482 qla4xxx_wait_for_ip_configuration(ha); qla4xxx_build_ddb_list() 8486 qla4xxx_conn_open(ha, st_ddb_idx->fw_ddb_idx); qla4xxx_build_ddb_list() 8490 tmo = ((ha->def_timeout > LOGIN_TOV) && qla4xxx_build_ddb_list() 8491 (ha->def_timeout < LOGIN_TOV * 10) ? qla4xxx_build_ddb_list() 8492 ha->def_timeout : LOGIN_TOV); qla4xxx_build_ddb_list() 8494 DEBUG2(ql4_printk(KERN_INFO, ha, qla4xxx_build_ddb_list() 8502 qla4xxx_remove_failed_ddb(ha, &list_st); qla4xxx_build_ddb_list() 8507 qla4xxx_build_nt_list(ha, &list_nt, &list_st, is_reset); qla4xxx_build_ddb_list() 8512 qla4xxx_free_ddb_index(ha); qla4xxx_build_ddb_list() 8518 * @ha: pointer to adapter structure 8524 static void qla4xxx_wait_login_resp_boot_tgt(struct scsi_qla_host *ha) qla4xxx_wait_login_resp_boot_tgt() argument 8533 max_ddbs = is_qla40XX(ha) ? MAX_DEV_DB_ENTRIES_40XX : qla4xxx_wait_login_resp_boot_tgt() 8536 fw_ddb_entry = dma_alloc_coherent(&ha->pdev->dev, sizeof(*fw_ddb_entry), qla4xxx_wait_login_resp_boot_tgt() 8539 ql4_printk(KERN_ERR, ha, qla4xxx_wait_login_resp_boot_tgt() 8547 ddb_entry = qla4xxx_lookup_ddb_by_fw_index(ha, idx); qla4xxx_wait_login_resp_boot_tgt() 8552 DEBUG2(ql4_printk(KERN_INFO, ha, qla4xxx_wait_login_resp_boot_tgt() 8556 ret = qla4xxx_get_fwddb_entry(ha, qla4xxx_wait_login_resp_boot_tgt() 8573 DEBUG2(ql4_printk(KERN_INFO, ha, qla4xxx_wait_login_resp_boot_tgt() 8583 dma_free_coherent(&ha->pdev->dev, sizeof(*fw_ddb_entry), qla4xxx_wait_login_resp_boot_tgt() 8601 struct scsi_qla_host *ha; qla4xxx_probe_adapter() local 8610 host = iscsi_host_alloc(&qla4xxx_driver_template, sizeof(*ha), 0); qla4xxx_probe_adapter() 8618 ha = to_qla_host(host); qla4xxx_probe_adapter() 8619 memset(ha, 0, sizeof(*ha)); qla4xxx_probe_adapter() 8622 ha->pdev = pdev; qla4xxx_probe_adapter() 8623 ha->host = host; qla4xxx_probe_adapter() 8624 ha->host_no = host->host_no; qla4xxx_probe_adapter() 8625 ha->func_num = PCI_FUNC(ha->pdev->devfn); qla4xxx_probe_adapter() 8630 if (is_qla8022(ha)) { qla4xxx_probe_adapter() 8631 ha->isp_ops = &qla4_82xx_isp_ops; qla4xxx_probe_adapter() 8632 ha->reg_tbl = (uint32_t *) qla4_82xx_reg_tbl; qla4xxx_probe_adapter() 8633 ha->qdr_sn_window = -1; qla4xxx_probe_adapter() 8634 ha->ddr_mn_window = -1; qla4xxx_probe_adapter() 8635 ha->curr_window = 255; qla4xxx_probe_adapter() 8636 nx_legacy_intr = &legacy_intr[ha->func_num]; qla4xxx_probe_adapter() 8637 ha->nx_legacy_intr.int_vec_bit = nx_legacy_intr->int_vec_bit; qla4xxx_probe_adapter() 8638 ha->nx_legacy_intr.tgt_status_reg = qla4xxx_probe_adapter() 8640 ha->nx_legacy_intr.tgt_mask_reg = nx_legacy_intr->tgt_mask_reg; qla4xxx_probe_adapter() 8641 ha->nx_legacy_intr.pci_int_reg = nx_legacy_intr->pci_int_reg; qla4xxx_probe_adapter() 8642 } else if (is_qla8032(ha) || is_qla8042(ha)) { qla4xxx_probe_adapter() 8643 ha->isp_ops = &qla4_83xx_isp_ops; qla4xxx_probe_adapter() 8644 ha->reg_tbl = (uint32_t *)qla4_83xx_reg_tbl; qla4xxx_probe_adapter() 8646 ha->isp_ops = &qla4xxx_isp_ops; qla4xxx_probe_adapter() 8649 if (is_qla80XX(ha)) { qla4xxx_probe_adapter() 8650 rwlock_init(&ha->hw_lock); qla4xxx_probe_adapter() 8651 ha->pf_bit = ha->func_num << 16; qla4xxx_probe_adapter() 8657 ret = ha->isp_ops->iospace_config(ha); qla4xxx_probe_adapter() 8661 ql4_printk(KERN_INFO, ha, "Found an ISP%04x, irq %d, iobase 0x%p\n", qla4xxx_probe_adapter() 8662 pdev->device, pdev->irq, ha->reg); qla4xxx_probe_adapter() 8664 qla4xxx_config_dma_addressing(ha); qla4xxx_probe_adapter() 8667 INIT_LIST_HEAD(&ha->free_srb_q); qla4xxx_probe_adapter() 8669 mutex_init(&ha->mbox_sem); qla4xxx_probe_adapter() 8670 mutex_init(&ha->chap_sem); qla4xxx_probe_adapter() 8671 init_completion(&ha->mbx_intr_comp); qla4xxx_probe_adapter() 8672 init_completion(&ha->disable_acb_comp); qla4xxx_probe_adapter() 8673 init_completion(&ha->idc_comp); qla4xxx_probe_adapter() 8674 init_completion(&ha->link_up_comp); qla4xxx_probe_adapter() 8675 init_completion(&ha->disable_acb_comp); qla4xxx_probe_adapter() 8677 spin_lock_init(&ha->hardware_lock); qla4xxx_probe_adapter() 8678 spin_lock_init(&ha->work_lock); qla4xxx_probe_adapter() 8681 INIT_LIST_HEAD(&ha->work_list); qla4xxx_probe_adapter() 8684 if (qla4xxx_mem_alloc(ha)) { qla4xxx_probe_adapter() 8685 ql4_printk(KERN_WARNING, ha, qla4xxx_probe_adapter() 8702 ql4_printk(KERN_WARNING, ha, qla4xxx_probe_adapter() 8707 pci_set_drvdata(pdev, ha); qla4xxx_probe_adapter() 8713 if (is_qla80XX(ha)) qla4xxx_probe_adapter() 8714 qla4_8xxx_get_flash_info(ha); qla4xxx_probe_adapter() 8716 if (is_qla8032(ha) || is_qla8042(ha)) { qla4xxx_probe_adapter() 8717 qla4_83xx_read_reset_template(ha); qla4xxx_probe_adapter() 8725 qla4_83xx_set_idc_dontreset(ha); qla4xxx_probe_adapter() 8733 status = qla4xxx_initialize_adapter(ha, INIT_ADAPTER); qla4xxx_probe_adapter() 8736 if (is_qla80XX(ha) && (status == QLA_ERROR)) qla4xxx_probe_adapter() 8739 while ((!test_bit(AF_ONLINE, &ha->flags)) && qla4xxx_probe_adapter() 8742 if (is_qla80XX(ha)) { qla4xxx_probe_adapter() 8743 ha->isp_ops->idc_lock(ha); qla4xxx_probe_adapter() 8744 dev_state = qla4_8xxx_rd_direct(ha, qla4xxx_probe_adapter() 8746 ha->isp_ops->idc_unlock(ha); qla4xxx_probe_adapter() 8748 ql4_printk(KERN_WARNING, ha, "%s: don't retry " qla4xxx_probe_adapter() 8757 if (ha->isp_ops->reset_chip(ha) == QLA_ERROR) qla4xxx_probe_adapter() 8760 status = qla4xxx_initialize_adapter(ha, INIT_ADAPTER); qla4xxx_probe_adapter() 8761 if (is_qla80XX(ha) && (status == QLA_ERROR)) { qla4xxx_probe_adapter() 8762 if (qla4_8xxx_check_init_adapter_retry(ha) == QLA_ERROR) qla4xxx_probe_adapter() 8768 if (!test_bit(AF_ONLINE, &ha->flags)) { qla4xxx_probe_adapter() 8769 ql4_printk(KERN_WARNING, ha, "Failed to initialize adapter\n"); qla4xxx_probe_adapter() 8771 if ((is_qla8022(ha) && ql4xdontresethba) || qla4xxx_probe_adapter() 8772 ((is_qla8032(ha) || is_qla8042(ha)) && qla4xxx_probe_adapter() 8773 qla4_83xx_idc_dontreset(ha))) { qla4xxx_probe_adapter() 8776 ha->isp_ops->idc_lock(ha); qla4xxx_probe_adapter() 8777 qla4_8xxx_wr_direct(ha, QLA8XXX_CRB_DEV_STATE, qla4xxx_probe_adapter() 8779 ha->isp_ops->idc_unlock(ha); qla4xxx_probe_adapter() 8788 sprintf(buf, "qla4xxx_%lu_dpc", ha->host_no); qla4xxx_probe_adapter() 8789 ha->dpc_thread = create_singlethread_workqueue(buf); qla4xxx_probe_adapter() 8790 if (!ha->dpc_thread) { qla4xxx_probe_adapter() 8791 ql4_printk(KERN_WARNING, ha, "Unable to start DPC thread!\n"); qla4xxx_probe_adapter() 8795 INIT_WORK(&ha->dpc_work, qla4xxx_do_dpc); qla4xxx_probe_adapter() 8797 ha->task_wq = alloc_workqueue("qla4xxx_%lu_task", WQ_MEM_RECLAIM, 1, qla4xxx_probe_adapter() 8798 ha->host_no); qla4xxx_probe_adapter() 8799 if (!ha->task_wq) { qla4xxx_probe_adapter() 8800 ql4_printk(KERN_WARNING, ha, "Unable to start task thread!\n"); qla4xxx_probe_adapter() 8811 if (is_qla40XX(ha)) { qla4xxx_probe_adapter() 8812 ret = qla4xxx_request_irqs(ha); qla4xxx_probe_adapter() 8814 ql4_printk(KERN_WARNING, ha, "Failed to reserve " qla4xxx_probe_adapter() 8820 pci_save_state(ha->pdev); qla4xxx_probe_adapter() 8821 ha->isp_ops->enable_intrs(ha); qla4xxx_probe_adapter() 8824 qla4xxx_start_timer(ha, qla4xxx_timer, 1); qla4xxx_probe_adapter() 8826 set_bit(AF_INIT_DONE, &ha->flags); qla4xxx_probe_adapter() 8828 qla4_8xxx_alloc_sysfs_attr(ha); qla4xxx_probe_adapter() 8833 qla4xxx_version_str, ha->pdev->device, pci_name(ha->pdev), qla4xxx_probe_adapter() 8834 ha->host_no, ha->fw_info.fw_major, ha->fw_info.fw_minor, qla4xxx_probe_adapter() 8835 ha->fw_info.fw_patch, ha->fw_info.fw_build); qla4xxx_probe_adapter() 8838 if (is_qla80XX(ha)) qla4xxx_probe_adapter() 8839 qla4_8xxx_set_param(ha, SET_DRVR_VERSION); qla4xxx_probe_adapter() 8841 if (qla4xxx_setup_boot_info(ha)) qla4xxx_probe_adapter() 8842 ql4_printk(KERN_ERR, ha, qla4xxx_probe_adapter() 8845 set_bit(DPC_SYSFS_DDB_EXPORT, &ha->dpc_flags); qla4xxx_probe_adapter() 8847 qla4xxx_build_ddb_list(ha, INIT_ADAPTER); qla4xxx_probe_adapter() 8848 iscsi_host_for_each_session(ha->host, qla4xxx_login_flash_ddb); qla4xxx_probe_adapter() 8849 qla4xxx_wait_login_resp_boot_tgt(ha); qla4xxx_probe_adapter() 8851 qla4xxx_create_chap_list(ha); qla4xxx_probe_adapter() 8853 qla4xxx_create_ifaces(ha); qla4xxx_probe_adapter() 8857 scsi_remove_host(ha->host); qla4xxx_probe_adapter() 8860 qla4xxx_free_adapter(ha); qla4xxx_probe_adapter() 8864 scsi_host_put(ha->host); qla4xxx_probe_adapter() 8874 * @ha: pointer to adapter structure 8878 * removing the ha due to driver unload or hba hotplug. 8880 static void qla4xxx_prevent_other_port_reinit(struct scsi_qla_host *ha) qla4xxx_prevent_other_port_reinit() argument 8887 if (PCI_FUNC(ha->pdev->devfn) & BIT_1) qla4xxx_prevent_other_port_reinit() 8891 pci_get_domain_bus_and_slot(pci_domain_nr(ha->pdev->bus), qla4xxx_prevent_other_port_reinit() 8892 ha->pdev->bus->number, PCI_DEVFN(PCI_SLOT(ha->pdev->devfn), qla4xxx_prevent_other_port_reinit() 8901 DEBUG2(ql4_printk(KERN_INFO, ha, "%s: " qla4xxx_prevent_other_port_reinit() 8910 static void qla4xxx_destroy_ddb(struct scsi_qla_host *ha, qla4xxx_destroy_ddb() argument 8921 if (qla4xxx_session_logout_ddb(ha, ddb_entry, options) == QLA_ERROR) { qla4xxx_destroy_ddb() 8922 ql4_printk(KERN_ERR, ha, "%s: Logout failed\n", __func__); qla4xxx_destroy_ddb() 8926 fw_ddb_entry = dma_alloc_coherent(&ha->pdev->dev, sizeof(*fw_ddb_entry), qla4xxx_destroy_ddb() 8929 ql4_printk(KERN_ERR, ha, qla4xxx_destroy_ddb() 8936 status = qla4xxx_get_fwddb_entry(ha, ddb_entry->fw_ddb_index, qla4xxx_destroy_ddb() 8951 dma_free_coherent(&ha->pdev->dev, sizeof(*fw_ddb_entry), qla4xxx_destroy_ddb() 8954 qla4xxx_clear_ddb_entry(ha, ddb_entry->fw_ddb_index); qla4xxx_destroy_ddb() 8957 static void qla4xxx_destroy_fw_ddb_session(struct scsi_qla_host *ha) qla4xxx_destroy_fw_ddb_session() argument 8964 ddb_entry = qla4xxx_lookup_ddb_by_fw_index(ha, idx); qla4xxx_destroy_fw_ddb_session() 8968 qla4xxx_destroy_ddb(ha, ddb_entry); qla4xxx_destroy_fw_ddb_session() 8977 qla4xxx_free_ddb(ha, ddb_entry); qla4xxx_destroy_fw_ddb_session() 8988 struct scsi_qla_host *ha; qla4xxx_remove_adapter() local 8997 ha = pci_get_drvdata(pdev); qla4xxx_remove_adapter() 8999 if (is_qla40XX(ha)) qla4xxx_remove_adapter() 9000 qla4xxx_prevent_other_port_reinit(ha); qla4xxx_remove_adapter() 9003 qla4xxx_destroy_ifaces(ha); qla4xxx_remove_adapter() 9005 if ((!ql4xdisablesysfsboot) && ha->boot_kset) qla4xxx_remove_adapter() 9006 iscsi_boot_destroy_kset(ha->boot_kset); qla4xxx_remove_adapter() 9008 qla4xxx_destroy_fw_ddb_session(ha); qla4xxx_remove_adapter() 9009 qla4_8xxx_free_sysfs_attr(ha); qla4xxx_remove_adapter() 9011 qla4xxx_sysfs_ddb_remove(ha); qla4xxx_remove_adapter() 9012 scsi_remove_host(ha->host); qla4xxx_remove_adapter() 9014 qla4xxx_free_adapter(ha); qla4xxx_remove_adapter() 9016 scsi_host_put(ha->host); qla4xxx_remove_adapter() 9024 * @ha: HA context 9026 * At exit, the @ha's flags.enable_64bit_addressing set to indicated 9029 static void qla4xxx_config_dma_addressing(struct scsi_qla_host *ha) qla4xxx_config_dma_addressing() argument 9034 if (pci_set_dma_mask(ha->pdev, DMA_BIT_MASK(64)) == 0) { qla4xxx_config_dma_addressing() 9035 if (pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(64))) { qla4xxx_config_dma_addressing() 9036 dev_dbg(&ha->pdev->dev, qla4xxx_config_dma_addressing() 9039 retval = pci_set_consistent_dma_mask(ha->pdev, qla4xxx_config_dma_addressing() 9043 retval = pci_set_dma_mask(ha->pdev, DMA_BIT_MASK(32)); qla4xxx_config_dma_addressing() 9068 * @ha: Pointer to host adapter structure. 9073 struct srb *qla4xxx_del_from_active_array(struct scsi_qla_host *ha, qla4xxx_del_from_active_array() argument 9079 cmd = scsi_host_find_tag(ha->host, index); qla4xxx_del_from_active_array() 9089 ha->iocb_cnt -= srb->iocb_cnt; qla4xxx_del_from_active_array() 9099 * @ha: Pointer to host adapter structure. 9105 static int qla4xxx_eh_wait_on_command(struct scsi_qla_host *ha, qla4xxx_eh_wait_on_command() argument 9116 if (unlikely(pci_channel_offline(ha->pdev)) || qla4xxx_eh_wait_on_command() 9117 (test_bit(AF_EEH_BUSY, &ha->flags))) { qla4xxx_eh_wait_on_command() 9118 ql4_printk(KERN_WARNING, ha, "scsi%ld: Return from %s\n", qla4xxx_eh_wait_on_command() 9119 ha->host_no, __func__); qla4xxx_eh_wait_on_command() 9139 * @ha: Pointer to host adapter structure 9141 static int qla4xxx_wait_for_hba_online(struct scsi_qla_host *ha) qla4xxx_wait_for_hba_online() argument 9148 if (adapter_up(ha)) qla4xxx_wait_for_hba_online() 9159 * @ha: pointer to HBA 9166 static int qla4xxx_eh_wait_for_commands(struct scsi_qla_host *ha, qla4xxx_eh_wait_for_commands() argument 9178 for (cnt = 0; cnt < ha->host->can_queue; cnt++) { qla4xxx_eh_wait_for_commands() 9179 cmd = scsi_host_find_tag(ha->host, cnt); qla4xxx_eh_wait_for_commands() 9182 if (!qla4xxx_eh_wait_on_command(ha, cmd)) { qla4xxx_eh_wait_for_commands() 9200 struct scsi_qla_host *ha = to_qla_host(cmd->device->host); qla4xxx_eh_abort() local 9208 ql4_printk(KERN_INFO, ha, "scsi%ld:%d:%llu: Abort command issued cmd=%p, cdb=0x%x\n", qla4xxx_eh_abort() 9209 ha->host_no, id, lun, cmd, cmd->cmnd[0]); qla4xxx_eh_abort() 9211 spin_lock_irqsave(&ha->hardware_lock, flags); qla4xxx_eh_abort() 9214 spin_unlock_irqrestore(&ha->hardware_lock, flags); qla4xxx_eh_abort() 9215 ql4_printk(KERN_INFO, ha, "scsi%ld:%d:%llu: Specified command has already completed.\n", qla4xxx_eh_abort() 9216 ha->host_no, id, lun); qla4xxx_eh_abort() 9220 spin_unlock_irqrestore(&ha->hardware_lock, flags); qla4xxx_eh_abort() 9222 if (qla4xxx_abort_task(ha, srb) != QLA_SUCCESS) { qla4xxx_eh_abort() 9224 ha->host_no, id, lun)); qla4xxx_eh_abort() 9228 ha->host_no, id, lun)); qla4xxx_eh_abort() 9236 if (!qla4xxx_eh_wait_on_command(ha, cmd)) { qla4xxx_eh_abort() 9238 ha->host_no, id, lun)); qla4xxx_eh_abort() 9243 ql4_printk(KERN_INFO, ha, qla4xxx_eh_abort() 9245 ha->host_no, id, lun, (ret == SUCCESS) ? "succeeded" : "failed"); qla4xxx_eh_abort() 9259 struct scsi_qla_host *ha = to_qla_host(cmd->device->host); qla4xxx_eh_device_reset() local 9271 ql4_printk(KERN_INFO, ha, qla4xxx_eh_device_reset() 9272 "scsi%ld:%d:%d:%llu: DEVICE RESET ISSUED.\n", ha->host_no, qla4xxx_eh_device_reset() 9277 "dpc_flags=%lx, status=%x allowed=%d\n", ha->host_no, qla4xxx_eh_device_reset() 9279 ha->dpc_flags, cmd->result, cmd->allowed)); qla4xxx_eh_device_reset() 9282 stat = qla4xxx_reset_lun(ha, ddb_entry, cmd->device->lun); qla4xxx_eh_device_reset() 9284 ql4_printk(KERN_INFO, ha, "DEVICE RESET FAILED. %d\n", stat); qla4xxx_eh_device_reset() 9288 if (qla4xxx_eh_wait_for_commands(ha, scsi_target(cmd->device), qla4xxx_eh_device_reset() 9290 ql4_printk(KERN_INFO, ha, qla4xxx_eh_device_reset() 9297 if (qla4xxx_send_marker_iocb(ha, ddb_entry, cmd->device->lun, qla4xxx_eh_device_reset() 9301 ql4_printk(KERN_INFO, ha, qla4xxx_eh_device_reset() 9303 ha->host_no, cmd->device->channel, cmd->device->id, qla4xxx_eh_device_reset() 9321 struct scsi_qla_host *ha = to_qla_host(cmd->device->host); qla4xxx_eh_target_reset() local 9338 ha->host_no, cmd, jiffies, cmd->request->timeout / HZ, qla4xxx_eh_target_reset() 9339 ha->dpc_flags, cmd->result, cmd->allowed)); qla4xxx_eh_target_reset() 9341 stat = qla4xxx_reset_target(ha, ddb_entry); qla4xxx_eh_target_reset() 9348 if (qla4xxx_eh_wait_for_commands(ha, scsi_target(cmd->device), qla4xxx_eh_target_reset() 9357 if (qla4xxx_send_marker_iocb(ha, ddb_entry, cmd->device->lun, qla4xxx_eh_target_reset() 9394 struct scsi_qla_host *ha; qla4xxx_eh_host_reset() local 9396 ha = to_qla_host(cmd->device->host); qla4xxx_eh_host_reset() 9398 if ((is_qla8032(ha) || is_qla8042(ha)) && ql4xdontresethba) qla4xxx_eh_host_reset() 9399 qla4_83xx_set_idc_dontreset(ha); qla4xxx_eh_host_reset() 9406 ((is_qla8032(ha) || is_qla8042(ha)) && qla4xxx_eh_host_reset() 9407 qla4_83xx_idc_dontreset(ha))) { qla4xxx_eh_host_reset() 9409 ha->host_no, __func__)); qla4xxx_eh_host_reset() 9413 qla4xxx_abort_active_cmds(ha, DID_ABORT << 16); qla4xxx_eh_host_reset() 9418 ql4_printk(KERN_INFO, ha, qla4xxx_eh_host_reset() 9419 "scsi(%ld:%d:%d:%llu): HOST RESET ISSUED.\n", ha->host_no, qla4xxx_eh_host_reset() 9422 if (qla4xxx_wait_for_hba_online(ha) != QLA_SUCCESS) { qla4xxx_eh_host_reset() 9424 "DEAD.\n", ha->host_no, cmd->device->channel, qla4xxx_eh_host_reset() 9430 if (!test_bit(DPC_RESET_HA, &ha->dpc_flags)) { qla4xxx_eh_host_reset() 9431 if (is_qla80XX(ha)) qla4xxx_eh_host_reset() 9432 set_bit(DPC_RESET_HA_FW_CONTEXT, &ha->dpc_flags); qla4xxx_eh_host_reset() 9434 set_bit(DPC_RESET_HA, &ha->dpc_flags); qla4xxx_eh_host_reset() 9437 if (qla4xxx_recover_adapter(ha) == QLA_SUCCESS) qla4xxx_eh_host_reset() 9440 ql4_printk(KERN_INFO, ha, "HOST RESET %s.\n", qla4xxx_eh_host_reset() 9446 static int qla4xxx_context_reset(struct scsi_qla_host *ha) qla4xxx_context_reset() argument 9455 acb = dma_alloc_coherent(&ha->pdev->dev, qla4xxx_context_reset() 9459 ql4_printk(KERN_ERR, ha, "%s: Unable to alloc acb\n", qla4xxx_context_reset() 9467 rval = qla4xxx_get_acb(ha, acb_dma, PRIMARI_ACB, acb_len); qla4xxx_context_reset() 9473 rval = qla4xxx_disable_acb(ha); qla4xxx_context_reset() 9479 wait_for_completion_timeout(&ha->disable_acb_comp, qla4xxx_context_reset() 9482 rval = qla4xxx_set_acb(ha, &mbox_cmd[0], &mbox_sts[0], acb_dma); qla4xxx_context_reset() 9489 dma_free_coherent(&ha->pdev->dev, sizeof(struct addr_ctrl_blk_def), qla4xxx_context_reset() 9492 DEBUG2(ql4_printk(KERN_INFO, ha, "%s %s\n", __func__, qla4xxx_context_reset() 9499 struct scsi_qla_host *ha = to_qla_host(shost); qla4xxx_host_reset() local 9504 DEBUG2(ql4_printk(KERN_INFO, ha, "%s: Don't Reset HBA\n", qla4xxx_host_reset() 9510 if (test_bit(DPC_RESET_HA, &ha->dpc_flags)) qla4xxx_host_reset() 9515 set_bit(DPC_RESET_HA, &ha->dpc_flags); qla4xxx_host_reset() 9518 if (!test_bit(DPC_RESET_HA, &ha->dpc_flags)) { qla4xxx_host_reset() 9519 if (is_qla80XX(ha)) qla4xxx_host_reset() 9522 &ha->dpc_flags); qla4xxx_host_reset() 9524 rval = qla4xxx_context_reset(ha); qla4xxx_host_reset() 9534 if ((is_qla8032(ha) || is_qla8042(ha)) && qla4xxx_host_reset() 9535 test_bit(DPC_RESET_HA, &ha->dpc_flags)) { qla4xxx_host_reset() 9536 idc_ctrl = qla4_83xx_rd_reg(ha, QLA83XX_IDC_DRV_CTRL); qla4xxx_host_reset() 9537 qla4_83xx_wr_reg(ha, QLA83XX_IDC_DRV_CTRL, qla4xxx_host_reset() 9541 rval = qla4xxx_recover_adapter(ha); qla4xxx_host_reset() 9543 DEBUG2(ql4_printk(KERN_INFO, ha, "%s: recover adapter fail\n", qla4xxx_host_reset() 9570 struct scsi_qla_host *ha = pci_get_drvdata(pdev); qla4xxx_pci_error_detected() local 9572 ql4_printk(KERN_WARNING, ha, "scsi%ld: %s: error detected:state %x\n", qla4xxx_pci_error_detected() 9573 ha->host_no, __func__, state); qla4xxx_pci_error_detected() 9575 if (!is_aer_supported(ha)) qla4xxx_pci_error_detected() 9580 clear_bit(AF_EEH_BUSY, &ha->flags); qla4xxx_pci_error_detected() 9583 set_bit(AF_EEH_BUSY, &ha->flags); qla4xxx_pci_error_detected() 9584 qla4xxx_mailbox_premature_completion(ha); qla4xxx_pci_error_detected() 9585 qla4xxx_free_irqs(ha); qla4xxx_pci_error_detected() 9588 qla4xxx_abort_active_cmds(ha, DID_RESET << 16); qla4xxx_pci_error_detected() 9591 set_bit(AF_EEH_BUSY, &ha->flags); qla4xxx_pci_error_detected() 9592 set_bit(AF_PCI_CHANNEL_IO_PERM_FAILURE, &ha->flags); qla4xxx_pci_error_detected() 9593 qla4xxx_abort_active_cmds(ha, DID_NO_CONNECT << 16); qla4xxx_pci_error_detected() 9607 struct scsi_qla_host *ha = pci_get_drvdata(pdev); qla4xxx_pci_mmio_enabled() local 9609 if (!is_aer_supported(ha)) qla4xxx_pci_mmio_enabled() 9615 static uint32_t qla4_8xxx_error_recovery(struct scsi_qla_host *ha) qla4_8xxx_error_recovery() argument 9621 ql4_printk(KERN_WARNING, ha, "scsi%ld: In %s\n", ha->host_no, __func__); qla4_8xxx_error_recovery() 9623 set_bit(DPC_RESET_ACTIVE, &ha->dpc_flags); qla4_8xxx_error_recovery() 9625 if (test_bit(AF_ONLINE, &ha->flags)) { qla4_8xxx_error_recovery() 9626 clear_bit(AF_ONLINE, &ha->flags); qla4_8xxx_error_recovery() 9627 clear_bit(AF_LINK_UP, &ha->flags); qla4_8xxx_error_recovery() 9628 iscsi_host_for_each_session(ha->host, qla4xxx_fail_session); qla4_8xxx_error_recovery() 9629 qla4xxx_process_aen(ha, FLUSH_DDB_CHANGED_AENS); qla4_8xxx_error_recovery() 9632 fn = PCI_FUNC(ha->pdev->devfn); qla4_8xxx_error_recovery() 9633 if (is_qla8022(ha)) { qla4_8xxx_error_recovery() 9636 ql4_printk(KERN_INFO, ha, "scsi%ld: %s: Finding PCI device at func %x\n", qla4_8xxx_error_recovery() 9637 ha->host_no, __func__, fn); qla4_8xxx_error_recovery() 9641 pci_domain_nr(ha->pdev->bus), qla4_8xxx_error_recovery() 9642 ha->pdev->bus->number, qla4_8xxx_error_recovery() 9643 PCI_DEVFN(PCI_SLOT(ha->pdev->devfn), qla4_8xxx_error_recovery() 9650 ql4_printk(KERN_INFO, ha, "scsi%ld: %s: Found PCI func in enabled state%x\n", qla4_8xxx_error_recovery() 9651 ha->host_no, __func__, fn); qla4_8xxx_error_recovery() 9659 if (qla4_83xx_can_perform_reset(ha)) { qla4_8xxx_error_recovery() 9670 ql4_printk(KERN_INFO, ha, "scsi%ld: %s: devfn being reset " qla4_8xxx_error_recovery() 9671 "0x%x is the owner\n", ha->host_no, __func__, qla4_8xxx_error_recovery() 9672 ha->pdev->devfn); qla4_8xxx_error_recovery() 9674 ha->isp_ops->idc_lock(ha); qla4_8xxx_error_recovery() 9675 qla4_8xxx_wr_direct(ha, QLA8XXX_CRB_DEV_STATE, qla4_8xxx_error_recovery() 9677 ha->isp_ops->idc_unlock(ha); qla4_8xxx_error_recovery() 9679 rval = qla4_8xxx_update_idc_reg(ha); qla4_8xxx_error_recovery() 9681 ql4_printk(KERN_INFO, ha, "scsi%ld: %s: HW State: FAILED\n", qla4_8xxx_error_recovery() 9682 ha->host_no, __func__); qla4_8xxx_error_recovery() 9683 ha->isp_ops->idc_lock(ha); qla4_8xxx_error_recovery() 9684 qla4_8xxx_wr_direct(ha, QLA8XXX_CRB_DEV_STATE, qla4_8xxx_error_recovery() 9686 ha->isp_ops->idc_unlock(ha); qla4_8xxx_error_recovery() 9690 clear_bit(AF_FW_RECOVERY, &ha->flags); qla4_8xxx_error_recovery() 9691 rval = qla4xxx_initialize_adapter(ha, RESET_ADAPTER); qla4_8xxx_error_recovery() 9694 ql4_printk(KERN_INFO, ha, "scsi%ld: %s: HW State: " qla4_8xxx_error_recovery() 9695 "FAILED\n", ha->host_no, __func__); qla4_8xxx_error_recovery() 9696 qla4xxx_free_irqs(ha); qla4_8xxx_error_recovery() 9697 ha->isp_ops->idc_lock(ha); qla4_8xxx_error_recovery() 9698 qla4_8xxx_clear_drv_active(ha); qla4_8xxx_error_recovery() 9699 qla4_8xxx_wr_direct(ha, QLA8XXX_CRB_DEV_STATE, qla4_8xxx_error_recovery() 9701 ha->isp_ops->idc_unlock(ha); qla4_8xxx_error_recovery() 9703 ql4_printk(KERN_INFO, ha, "scsi%ld: %s: HW State: " qla4_8xxx_error_recovery() 9704 "READY\n", ha->host_no, __func__); qla4_8xxx_error_recovery() 9705 ha->isp_ops->idc_lock(ha); qla4_8xxx_error_recovery() 9706 qla4_8xxx_wr_direct(ha, QLA8XXX_CRB_DEV_STATE, qla4_8xxx_error_recovery() 9709 qla4_8xxx_wr_direct(ha, QLA8XXX_CRB_DRV_STATE, 0); qla4_8xxx_error_recovery() 9710 qla4_8xxx_set_drv_active(ha); qla4_8xxx_error_recovery() 9711 ha->isp_ops->idc_unlock(ha); qla4_8xxx_error_recovery() 9712 ha->isp_ops->enable_intrs(ha); qla4_8xxx_error_recovery() 9715 ql4_printk(KERN_INFO, ha, "scsi%ld: %s: devfn 0x%x is not " qla4_8xxx_error_recovery() 9716 "the reset owner\n", ha->host_no, __func__, qla4_8xxx_error_recovery() 9717 ha->pdev->devfn); qla4_8xxx_error_recovery() 9718 if ((qla4_8xxx_rd_direct(ha, QLA8XXX_CRB_DEV_STATE) == qla4_8xxx_error_recovery() 9720 clear_bit(AF_FW_RECOVERY, &ha->flags); qla4_8xxx_error_recovery() 9721 rval = qla4xxx_initialize_adapter(ha, RESET_ADAPTER); qla4_8xxx_error_recovery() 9723 ha->isp_ops->enable_intrs(ha); qla4_8xxx_error_recovery() 9725 qla4xxx_free_irqs(ha); qla4_8xxx_error_recovery() 9727 ha->isp_ops->idc_lock(ha); qla4_8xxx_error_recovery() 9728 qla4_8xxx_set_drv_active(ha); qla4_8xxx_error_recovery() 9729 ha->isp_ops->idc_unlock(ha); qla4_8xxx_error_recovery() 9733 clear_bit(DPC_RESET_ACTIVE, &ha->dpc_flags); qla4_8xxx_error_recovery() 9741 struct scsi_qla_host *ha = pci_get_drvdata(pdev); qla4xxx_pci_slot_reset() local 9744 ql4_printk(KERN_WARNING, ha, "scsi%ld: %s: slot_reset\n", qla4xxx_pci_slot_reset() 9745 ha->host_no, __func__); qla4xxx_pci_slot_reset() 9747 if (!is_aer_supported(ha)) qla4xxx_pci_slot_reset() 9764 ql4_printk(KERN_WARNING, ha, "scsi%ld: %s: Can't re-enable " qla4xxx_pci_slot_reset() 9765 "device after reset\n", ha->host_no, __func__); qla4xxx_pci_slot_reset() 9769 ha->isp_ops->disable_intrs(ha); qla4xxx_pci_slot_reset() 9771 if (is_qla80XX(ha)) { qla4xxx_pci_slot_reset() 9772 if (qla4_8xxx_error_recovery(ha) == QLA_SUCCESS) { qla4xxx_pci_slot_reset() 9780 ql4_printk(KERN_WARNING, ha, "scsi%ld: %s: Return=%x\n" qla4xxx_pci_slot_reset() 9781 "device after reset\n", ha->host_no, __func__, ret); qla4xxx_pci_slot_reset() 9788 struct scsi_qla_host *ha = pci_get_drvdata(pdev); qla4xxx_pci_resume() local 9791 ql4_printk(KERN_WARNING, ha, "scsi%ld: %s: pci_resume\n", qla4xxx_pci_resume() 9792 ha->host_no, __func__); qla4xxx_pci_resume() 9794 ret = qla4xxx_wait_for_hba_online(ha); qla4xxx_pci_resume() 9796 ql4_printk(KERN_ERR, ha, "scsi%ld: %s: the device failed to " qla4xxx_pci_resume() 9797 "resume I/O from slot/link_reset\n", ha->host_no, qla4xxx_pci_resume() 9802 clear_bit(AF_EEH_BUSY, &ha->flags); qla4xxx_pci_resume()
H A D	ql4_def.h	117 #define ql4_printk(level, ha, format, arg...) \ 118 dev_printk(level , &((ha)->pdev->dev) , format , ## arg) 225 struct scsi_qla_host *ha; /* HA the SP is queued on */ member in struct:srb 261 struct scsi_qla_host *ha; member in struct:mrb 284 struct scsi_qla_host *ha; member in struct:ddb_entry 295 int (*ddb_change)(struct scsi_qla_host *ha, uint32_t fw_ddb_index, 428 int (*iospace_config) (struct scsi_qla_host *ha); 839 struct scsi_qla_host *ha; member in struct:ql4_task_data 862 static inline int is_ipv4_enabled(struct scsi_qla_host *ha) is_ipv4_enabled() argument 864 return ((ha->ip_config.ipv4_options & IPOPT_IPV4_PROTOCOL_ENABLE) != 0); is_ipv4_enabled() 867 static inline int is_ipv6_enabled(struct scsi_qla_host *ha) is_ipv6_enabled() argument 869 return ((ha->ip_config.ipv6_options & is_ipv6_enabled() 873 static inline int is_qla4010(struct scsi_qla_host *ha) is_qla4010() argument 875 return ha->pdev->device == PCI_DEVICE_ID_QLOGIC_ISP4010; is_qla4010() 878 static inline int is_qla4022(struct scsi_qla_host *ha) is_qla4022() argument 880 return ha->pdev->device == PCI_DEVICE_ID_QLOGIC_ISP4022; is_qla4022() 883 static inline int is_qla4032(struct scsi_qla_host *ha) is_qla4032() argument 885 return ha->pdev->device == PCI_DEVICE_ID_QLOGIC_ISP4032; is_qla4032() 888 static inline int is_qla40XX(struct scsi_qla_host *ha) is_qla40XX() argument 890 return is_qla4032(ha) || is_qla4022(ha) || is_qla4010(ha); is_qla40XX() 893 static inline int is_qla8022(struct scsi_qla_host *ha) is_qla8022() argument 895 return ha->pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8022; is_qla8022() 898 static inline int is_qla8032(struct scsi_qla_host *ha) is_qla8032() argument 900 return ha->pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8324; is_qla8032() 903 static inline int is_qla8042(struct scsi_qla_host *ha) is_qla8042() argument 905 return ha->pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8042; is_qla8042() 908 static inline int is_qla80XX(struct scsi_qla_host *ha) is_qla80XX() argument 910 return is_qla8022(ha) || is_qla8032(ha) || is_qla8042(ha); is_qla80XX() 913 static inline int is_aer_supported(struct scsi_qla_host *ha) is_aer_supported() argument 915 return ((ha->pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8022) || is_aer_supported() 916 (ha->pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8324) || is_aer_supported() 917 (ha->pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8042)); is_aer_supported() 920 static inline int adapter_up(struct scsi_qla_host *ha) adapter_up() argument 922 return (test_bit(AF_ONLINE, &ha->flags) != 0) && adapter_up() 923 (test_bit(AF_LINK_UP, &ha->flags) != 0) && adapter_up() 924 (!test_bit(AF_LOOPBACK, &ha->flags)); adapter_up() 932 static inline void __iomem* isp_semaphore(struct scsi_qla_host *ha) isp_semaphore() argument 934 return (is_qla4010(ha) ? isp_semaphore() 935 &ha->reg->u1.isp4010.nvram : isp_semaphore() 936 &ha->reg->u1.isp4022.semaphore); isp_semaphore() 939 static inline void __iomem* isp_nvram(struct scsi_qla_host *ha) isp_nvram() argument 941 return (is_qla4010(ha) ? isp_nvram() 942 &ha->reg->u1.isp4010.nvram : isp_nvram() 943 &ha->reg->u1.isp4022.nvram); isp_nvram() 946 static inline void __iomem* isp_ext_hw_conf(struct scsi_qla_host *ha) isp_ext_hw_conf() argument 948 return (is_qla4010(ha) ? isp_ext_hw_conf() 949 &ha->reg->u2.isp4010.ext_hw_conf : isp_ext_hw_conf() 950 &ha->reg->u2.isp4022.p0.ext_hw_conf); isp_ext_hw_conf() 953 static inline void __iomem* isp_port_status(struct scsi_qla_host *ha) isp_port_status() argument 955 return (is_qla4010(ha) ? isp_port_status() 956 &ha->reg->u2.isp4010.port_status : isp_port_status() 957 &ha->reg->u2.isp4022.p0.port_status); isp_port_status() 960 static inline void __iomem* isp_port_ctrl(struct scsi_qla_host *ha) isp_port_ctrl() argument 962 return (is_qla4010(ha) ? isp_port_ctrl() 963 &ha->reg->u2.isp4010.port_ctrl : isp_port_ctrl() 964 &ha->reg->u2.isp4022.p0.port_ctrl); isp_port_ctrl() 967 static inline void __iomem* isp_port_error_status(struct scsi_qla_host *ha) isp_port_error_status() argument 969 return (is_qla4010(ha) ? isp_port_error_status() 970 &ha->reg->u2.isp4010.port_err_status : isp_port_error_status() 971 &ha->reg->u2.isp4022.p0.port_err_status); isp_port_error_status() 974 static inline void __iomem * isp_gp_out(struct scsi_qla_host *ha) isp_gp_out() argument 976 return (is_qla4010(ha) ? isp_gp_out() 977 &ha->reg->u2.isp4010.gp_out : isp_gp_out() 978 &ha->reg->u2.isp4022.p0.gp_out); isp_gp_out() 981 static inline int eeprom_ext_hw_conf_offset(struct scsi_qla_host *ha) eeprom_ext_hw_conf_offset() argument 983 return (is_qla4010(ha) ? eeprom_ext_hw_conf_offset() 988 int ql4xxx_sem_spinlock(struct scsi_qla_host * ha, u32 sem_mask, u32 sem_bits); 989 void ql4xxx_sem_unlock(struct scsi_qla_host * ha, u32 sem_mask); 990 int ql4xxx_sem_lock(struct scsi_qla_host * ha, u32 sem_mask, u32 sem_bits); 1049 static inline int ql4xxx_reset_active(struct scsi_qla_host *ha) ql4xxx_reset_active() argument 1051 return test_bit(DPC_RESET_ACTIVE, &ha->dpc_flags) || ql4xxx_reset_active() 1052 test_bit(DPC_RESET_HA, &ha->dpc_flags) || ql4xxx_reset_active() 1053 test_bit(DPC_RETRY_RESET_HA, &ha->dpc_flags) || ql4xxx_reset_active() 1054 test_bit(DPC_RESET_HA_INTR, &ha->dpc_flags) || ql4xxx_reset_active() 1055 test_bit(DPC_RESET_HA_FW_CONTEXT, &ha->dpc_flags) || ql4xxx_reset_active() 1056 test_bit(DPC_HA_UNRECOVERABLE, &ha->dpc_flags); ql4xxx_reset_active() 1060 static inline int qla4_8xxx_rd_direct(struct scsi_qla_host *ha, qla4_8xxx_rd_direct() argument 1063 return ha->isp_ops->rd_reg_direct(ha, ha->reg_tbl[crb_reg]); qla4_8xxx_rd_direct() 1066 static inline void qla4_8xxx_wr_direct(struct scsi_qla_host *ha, qla4_8xxx_wr_direct() argument 1070 ha->isp_ops->wr_reg_direct(ha, ha->reg_tbl[crb_reg], value); qla4_8xxx_wr_direct()
/linux-4.1.27/drivers/scsi/
H A D	gdth.c	146 static irqreturn_t __gdth_interrupt(gdth_ha_str *ha, 148 static int gdth_sync_event(gdth_ha_str *ha, int service, u8 index, 150 static int gdth_async_event(gdth_ha_str *ha); 153 static void gdth_putq(gdth_ha_str *ha, Scsi_Cmnd *scp, u8 priority); 154 static void gdth_next(gdth_ha_str *ha); 155 static int gdth_fill_raw_cmd(gdth_ha_str *ha, Scsi_Cmnd *scp, u8 b); 156 static int gdth_special_cmd(gdth_ha_str *ha, Scsi_Cmnd *scp); 157 static gdth_evt_str *gdth_store_event(gdth_ha_str *ha, u16 source, 159 static int gdth_read_event(gdth_ha_str *ha, int handle, gdth_evt_str *estr); 160 static void gdth_readapp_event(gdth_ha_str *ha, u8 application, 164 static void gdth_copy_internal_data(gdth_ha_str *ha, Scsi_Cmnd *scp, 166 static int gdth_internal_cache_cmd(gdth_ha_str *ha, Scsi_Cmnd *scp); 167 static int gdth_fill_cache_cmd(gdth_ha_str *ha, Scsi_Cmnd *scp, u16 hdrive); 169 static void gdth_enable_int(gdth_ha_str *ha); 170 static int gdth_test_busy(gdth_ha_str *ha); 171 static int gdth_get_cmd_index(gdth_ha_str *ha); 172 static void gdth_release_event(gdth_ha_str *ha); 173 static int gdth_wait(gdth_ha_str *ha, int index,u32 time); 174 static int gdth_internal_cmd(gdth_ha_str *ha, u8 service, u16 opcode, 176 static int gdth_search_drives(gdth_ha_str *ha); 177 static int gdth_analyse_hdrive(gdth_ha_str *ha, u16 hdrive); 179 static const char *gdth_ctr_name(gdth_ha_str *ha); 186 static void gdth_flush(gdth_ha_str *ha); 188 static int __gdth_queuecommand(gdth_ha_str *ha, struct scsi_cmnd *scp, 383 gdth_ha_str *ha; gdth_find_ha() local 385 list_for_each_entry(ha, &gdth_instances, list) gdth_find_ha() 386 if (hanum == ha->hanum) gdth_find_ha() 387 return ha; gdth_find_ha() 392 static struct gdth_cmndinfo *gdth_get_cmndinfo(gdth_ha_str *ha) gdth_get_cmndinfo() argument 398 spin_lock_irqsave(&ha->smp_lock, flags); gdth_get_cmndinfo() 401 if (ha->cmndinfo[i].index == 0) { gdth_get_cmndinfo() 402 priv = &ha->cmndinfo[i]; gdth_get_cmndinfo() 409 spin_unlock_irqrestore(&ha->smp_lock, flags); gdth_get_cmndinfo() 448 gdth_ha_str *ha = shost_priv(sdev->host); __gdth_execute() local 476 __gdth_queuecommand(ha, scp, &cmndinfo); __gdth_execute() 573 static void gdth_remove_one(gdth_ha_str *ha); 595 gdth_ha_str *ha = pci_get_drvdata(pdev); gdth_pci_remove_one() local 597 list_del(&ha->list); gdth_pci_remove_one() 598 gdth_remove_one(ha); gdth_pci_remove_one() 611 gdth_ha_str *ha = NULL; gdth_pci_init_one() local 652 rc = gdth_pci_probe_one(&gdth_pcistr, &ha); gdth_pci_init_one() 661 static int __init gdth_init_eisa(u16 eisa_adr,gdth_ha_str *ha) gdth_init_eisa() argument 690 ha->bmic = eisa_adr; gdth_init_eisa() 691 ha->brd_phys = (u32)eisa_adr >> 12; gdth_init_eisa() 700 ha->oem_id = OEM_ID_ICP; gdth_init_eisa() 701 ha->type = GDT_EISA; gdth_init_eisa() 702 ha->stype = id; gdth_init_eisa() 714 ha->irq = inb(eisa_adr+MAILBOXREG); gdth_init_eisa() 716 TRACE2(("GDT3000/3020: IRQ=%d\n",ha->irq)); gdth_init_eisa() 718 if (ha->irq == 0) { gdth_init_eisa() 728 ha->irq = irq[i]; gdth_init_eisa() 732 ha->irq); gdth_init_eisa() 743 ha->irq = gdth_irq_tab[eisacf]; gdth_init_eisa() 744 ha->oem_id = OEM_ID_ICP; gdth_init_eisa() 745 ha->type = GDT_EISA; gdth_init_eisa() 746 ha->stype = id; gdth_init_eisa() 749 ha->dma64_support = 0; gdth_init_eisa() 755 static int __init gdth_init_isa(u32 bios_adr,gdth_ha_str *ha) gdth_init_isa() argument 764 ha->brd = ioremap(bios_adr, sizeof(gdt2_dpram_str)); gdth_init_isa() 765 if (ha->brd == NULL) { gdth_init_isa() 769 dp2_ptr = ha->brd; gdth_init_isa() 775 iounmap(ha->brd); gdth_init_isa() 791 ha->drq = gdth_drq_tab[i]; gdth_init_isa() 799 ha->irq = gdth_irq_tab[i]; gdth_init_isa() 810 iounmap(ha->brd); gdth_init_isa() 820 iounmap(ha->brd); gdth_init_isa() 824 ha->oem_id = OEM_ID_ICP; gdth_init_isa() 825 ha->type = GDT_ISA; gdth_init_isa() 826 ha->ic_all_size = sizeof(dp2_ptr->u); gdth_init_isa() 827 ha->stype= GDT2_ID; gdth_init_isa() 828 ha->brd_phys = bios_adr >> 4; gdth_init_isa() 842 iounmap(ha->brd); gdth_init_isa() 850 ha->dma64_support = 0; gdth_init_isa() 857 gdth_ha_str *ha) gdth_init_pci() 870 ha->oem_id = OEM_ID_INTEL; gdth_init_pci() 872 ha->oem_id = OEM_ID_ICP; gdth_init_pci() 873 ha->brd_phys = (pdev->bus->number << 8) | (pdev->devfn & 0xf8); gdth_init_pci() 874 ha->stype = (u32)pdev->device; gdth_init_pci() 875 ha->irq = pdev->irq; gdth_init_pci() 876 ha->pdev = pdev; gdth_init_pci() 878 if (ha->pdev->device <= PCI_DEVICE_ID_VORTEX_GDT6000B) { /* GDT6000/B */ gdth_init_pci() 879 TRACE2(("init_pci() dpmem %lx irq %d\n",pcistr->dpmem,ha->irq)); gdth_init_pci() 880 ha->brd = ioremap(pcistr->dpmem, sizeof(gdt6_dpram_str)); gdth_init_pci() 881 if (ha->brd == NULL) { gdth_init_pci() 886 dp6_ptr = ha->brd; gdth_init_pci() 893 iounmap(ha->brd); gdth_init_pci() 894 ha->brd = ioremap(i, sizeof(u16)); gdth_init_pci() 895 if (ha->brd == NULL) { gdth_init_pci() 899 if (readw(ha->brd) != 0xffff) { gdth_init_pci() 903 iounmap(ha->brd); gdth_init_pci() 905 ha->brd = ioremap(i, sizeof(gdt6_dpram_str)); gdth_init_pci() 906 if (ha->brd == NULL) { gdth_init_pci() 910 dp6_ptr = ha->brd; gdth_init_pci() 920 iounmap(ha->brd); gdth_init_pci() 927 iounmap(ha->brd); gdth_init_pci() 945 iounmap(ha->brd); gdth_init_pci() 955 iounmap(ha->brd); gdth_init_pci() 959 ha->type = GDT_PCI; gdth_init_pci() 960 ha->ic_all_size = sizeof(dp6_ptr->u); gdth_init_pci() 974 iounmap(ha->brd); gdth_init_pci() 982 ha->dma64_support = 0; gdth_init_pci() 984 } else if (ha->pdev->device <= PCI_DEVICE_ID_VORTEX_GDT6555) { /* GDT6110, ... */ gdth_init_pci() 985 ha->plx = (gdt6c_plx_regs *)pcistr->io; gdth_init_pci() 987 pcistr->dpmem,ha->irq)); gdth_init_pci() 988 ha->brd = ioremap(pcistr->dpmem, sizeof(gdt6c_dpram_str)); gdth_init_pci() 989 if (ha->brd == NULL) { gdth_init_pci() 991 iounmap(ha->brd); gdth_init_pci() 995 dp6c_ptr = ha->brd; gdth_init_pci() 1002 iounmap(ha->brd); gdth_init_pci() 1003 ha->brd = ioremap(i, sizeof(u16)); gdth_init_pci() 1004 if (ha->brd == NULL) { gdth_init_pci() 1008 if (readw(ha->brd) != 0xffff) { gdth_init_pci() 1012 iounmap(ha->brd); gdth_init_pci() 1014 ha->brd = ioremap(i, sizeof(gdt6c_dpram_str)); gdth_init_pci() 1015 if (ha->brd == NULL) { gdth_init_pci() 1019 dp6c_ptr = ha->brd; gdth_init_pci() 1029 iounmap(ha->brd); gdth_init_pci() 1036 iounmap(ha->brd); gdth_init_pci() 1041 outb(0x00,PTR2USHORT(&ha->plx->control1)); gdth_init_pci() 1042 outb(0xff,PTR2USHORT(&ha->plx->edoor_reg)); gdth_init_pci() 1050 outb(1,PTR2USHORT(&ha->plx->ldoor_reg)); gdth_init_pci() 1057 iounmap(ha->brd); gdth_init_pci() 1066 iounmap(ha->brd); gdth_init_pci() 1070 ha->type = GDT_PCINEW; gdth_init_pci() 1071 ha->ic_all_size = sizeof(dp6c_ptr->u); gdth_init_pci() 1080 outb(1,PTR2USHORT(&ha->plx->ldoor_reg)); gdth_init_pci() 1087 iounmap(ha->brd); gdth_init_pci() 1094 ha->dma64_support = 0; gdth_init_pci() 1097 TRACE2(("init_pci_mpr() dpmem %lx irq %d\n",pcistr->dpmem,ha->irq)); gdth_init_pci() 1098 ha->brd = ioremap(pcistr->dpmem, sizeof(gdt6m_dpram_str)); gdth_init_pci() 1099 if (ha->brd == NULL) { gdth_init_pci() 1110 dp6m_ptr = ha->brd; gdth_init_pci() 1124 iounmap(ha->brd); gdth_init_pci() 1125 ha->brd = ioremap(i, sizeof(u16)); gdth_init_pci() 1126 if (ha->brd == NULL) { gdth_init_pci() 1130 if (readw(ha->brd) != 0xffff) { gdth_init_pci() 1134 iounmap(ha->brd); gdth_init_pci() 1136 ha->brd = ioremap(i, sizeof(gdt6m_dpram_str)); gdth_init_pci() 1137 if (ha->brd == NULL) { gdth_init_pci() 1141 dp6m_ptr = ha->brd; gdth_init_pci() 1151 iounmap(ha->brd); gdth_init_pci() 1172 iounmap(ha->brd); gdth_init_pci() 1181 iounmap(ha->brd); gdth_init_pci() 1185 ha->type = GDT_PCIMPR; gdth_init_pci() 1186 ha->ic_all_size = sizeof(dp6m_ptr->u); gdth_init_pci() 1200 iounmap(ha->brd); gdth_init_pci() 1215 iounmap(ha->brd); gdth_init_pci() 1223 ha->dma64_support = 0; gdth_init_pci() 1225 ha->dma64_support = 1; gdth_init_pci() 1234 static void gdth_enable_int(gdth_ha_str *ha) gdth_enable_int() argument 1241 TRACE(("gdth_enable_int() hanum %d\n",ha->hanum)); gdth_enable_int() 1242 spin_lock_irqsave(&ha->smp_lock, flags); gdth_enable_int() 1244 if (ha->type == GDT_EISA) { gdth_enable_int() 1245 outb(0xff, ha->bmic + EDOORREG); gdth_enable_int() 1246 outb(0xff, ha->bmic + EDENABREG); gdth_enable_int() 1247 outb(0x01, ha->bmic + EINTENABREG); gdth_enable_int() 1248 } else if (ha->type == GDT_ISA) { gdth_enable_int() 1249 dp2_ptr = ha->brd; gdth_enable_int() 1253 } else if (ha->type == GDT_PCI) { gdth_enable_int() 1254 dp6_ptr = ha->brd; gdth_enable_int() 1258 } else if (ha->type == GDT_PCINEW) { gdth_enable_int() 1259 outb(0xff, PTR2USHORT(&ha->plx->edoor_reg)); gdth_enable_int() 1260 outb(0x03, PTR2USHORT(&ha->plx->control1)); gdth_enable_int() 1261 } else if (ha->type == GDT_PCIMPR) { gdth_enable_int() 1262 dp6m_ptr = ha->brd; gdth_enable_int() 1267 spin_unlock_irqrestore(&ha->smp_lock, flags); gdth_enable_int() 1271 static u8 gdth_get_status(gdth_ha_str *ha) gdth_get_status() argument 1275 TRACE(("gdth_get_status() irq %d ctr_count %d\n", ha->irq, gdth_ctr_count)); gdth_get_status() 1277 if (ha->type == GDT_EISA) gdth_get_status() 1278 IStatus = inb((u16)ha->bmic + EDOORREG); gdth_get_status() 1279 else if (ha->type == GDT_ISA) gdth_get_status() 1281 readb(&((gdt2_dpram_str __iomem *)ha->brd)->u.ic.Cmd_Index); gdth_get_status() 1282 else if (ha->type == GDT_PCI) gdth_get_status() 1284 readb(&((gdt6_dpram_str __iomem *)ha->brd)->u.ic.Cmd_Index); gdth_get_status() 1285 else if (ha->type == GDT_PCINEW) gdth_get_status() 1286 IStatus = inb(PTR2USHORT(&ha->plx->edoor_reg)); gdth_get_status() 1287 else if (ha->type == GDT_PCIMPR) gdth_get_status() 1289 readb(&((gdt6m_dpram_str __iomem *)ha->brd)->i960r.edoor_reg); gdth_get_status() 1294 static int gdth_test_busy(gdth_ha_str *ha) gdth_test_busy() argument 1298 TRACE(("gdth_test_busy() hanum %d\n", ha->hanum)); gdth_test_busy() 1300 if (ha->type == GDT_EISA) gdth_test_busy() 1301 gdtsema0 = (int)inb(ha->bmic + SEMA0REG); gdth_test_busy() 1302 else if (ha->type == GDT_ISA) gdth_test_busy() 1303 gdtsema0 = (int)readb(&((gdt2_dpram_str __iomem *)ha->brd)->u.ic.Sema0); gdth_test_busy() 1304 else if (ha->type == GDT_PCI) gdth_test_busy() 1305 gdtsema0 = (int)readb(&((gdt6_dpram_str __iomem *)ha->brd)->u.ic.Sema0); gdth_test_busy() 1306 else if (ha->type == GDT_PCINEW) gdth_test_busy() 1307 gdtsema0 = (int)inb(PTR2USHORT(&ha->plx->sema0_reg)); gdth_test_busy() 1308 else if (ha->type == GDT_PCIMPR) gdth_test_busy() 1310 (int)readb(&((gdt6m_dpram_str __iomem *)ha->brd)->i960r.sema0_reg); gdth_test_busy() 1316 static int gdth_get_cmd_index(gdth_ha_str *ha) gdth_get_cmd_index() argument 1320 TRACE(("gdth_get_cmd_index() hanum %d\n", ha->hanum)); gdth_get_cmd_index() 1323 if (ha->cmd_tab[i].cmnd == UNUSED_CMND) { gdth_get_cmd_index() 1324 ha->cmd_tab[i].cmnd = ha->pccb->RequestBuffer; gdth_get_cmd_index() 1325 ha->cmd_tab[i].service = ha->pccb->Service; gdth_get_cmd_index() 1326 ha->pccb->CommandIndex = (u32)i+2; gdth_get_cmd_index() 1334 static void gdth_set_sema0(gdth_ha_str *ha) gdth_set_sema0() argument 1336 TRACE(("gdth_set_sema0() hanum %d\n", ha->hanum)); gdth_set_sema0() 1338 if (ha->type == GDT_EISA) { gdth_set_sema0() 1339 outb(1, ha->bmic + SEMA0REG); gdth_set_sema0() 1340 } else if (ha->type == GDT_ISA) { gdth_set_sema0() 1341 writeb(1, &((gdt2_dpram_str __iomem *)ha->brd)->u.ic.Sema0); gdth_set_sema0() 1342 } else if (ha->type == GDT_PCI) { gdth_set_sema0() 1343 writeb(1, &((gdt6_dpram_str __iomem *)ha->brd)->u.ic.Sema0); gdth_set_sema0() 1344 } else if (ha->type == GDT_PCINEW) { gdth_set_sema0() 1345 outb(1, PTR2USHORT(&ha->plx->sema0_reg)); gdth_set_sema0() 1346 } else if (ha->type == GDT_PCIMPR) { gdth_set_sema0() 1347 writeb(1, &((gdt6m_dpram_str __iomem *)ha->brd)->i960r.sema0_reg); gdth_set_sema0() 1352 static void gdth_copy_command(gdth_ha_str *ha) gdth_copy_command() argument 1361 TRACE(("gdth_copy_command() hanum %d\n", ha->hanum)); gdth_copy_command() 1363 cp_count = ha->cmd_len; gdth_copy_command() 1364 dp_offset= ha->cmd_offs_dpmem; gdth_copy_command() 1365 cmd_no = ha->cmd_cnt; gdth_copy_command() 1366 cmd_ptr = ha->pccb; gdth_copy_command() 1368 ++ha->cmd_cnt; gdth_copy_command() 1369 if (ha->type == GDT_EISA) gdth_copy_command() 1376 ha->cmd_offs_dpmem += cp_count; gdth_copy_command() 1379 if (ha->type == GDT_ISA) { gdth_copy_command() 1380 dp2_ptr = ha->brd; gdth_copy_command() 1386 } else if (ha->type == GDT_PCI) { gdth_copy_command() 1387 dp6_ptr = ha->brd; gdth_copy_command() 1393 } else if (ha->type == GDT_PCINEW) { gdth_copy_command() 1394 dp6c_ptr = ha->brd; gdth_copy_command() 1400 } else if (ha->type == GDT_PCIMPR) { gdth_copy_command() 1401 dp6m_ptr = ha->brd; gdth_copy_command() 1411 static void gdth_release_event(gdth_ha_str *ha) gdth_release_event() argument 1413 TRACE(("gdth_release_event() hanum %d\n", ha->hanum)); gdth_release_event() 1419 if (ha->cmd_tab[j].cmnd != UNUSED_CMND) gdth_release_event() 1429 if (ha->pccb->OpCode == GDT_INIT) gdth_release_event() 1430 ha->pccb->Service |= 0x80; gdth_release_event() 1432 if (ha->type == GDT_EISA) { gdth_release_event() 1433 if (ha->pccb->OpCode == GDT_INIT) /* store DMA buffer */ gdth_release_event() 1434 outl(ha->ccb_phys, ha->bmic + MAILBOXREG); gdth_release_event() 1435 outb(ha->pccb->Service, ha->bmic + LDOORREG); gdth_release_event() 1436 } else if (ha->type == GDT_ISA) { gdth_release_event() 1437 writeb(0, &((gdt2_dpram_str __iomem *)ha->brd)->io.event); gdth_release_event() 1438 } else if (ha->type == GDT_PCI) { gdth_release_event() 1439 writeb(0, &((gdt6_dpram_str __iomem *)ha->brd)->io.event); gdth_release_event() 1440 } else if (ha->type == GDT_PCINEW) { gdth_release_event() 1441 outb(1, PTR2USHORT(&ha->plx->ldoor_reg)); gdth_release_event() 1442 } else if (ha->type == GDT_PCIMPR) { gdth_release_event() 1443 writeb(1, &((gdt6m_dpram_str __iomem *)ha->brd)->i960r.ldoor_reg); gdth_release_event() 1447 static int gdth_wait(gdth_ha_str *ha, int index, u32 time) gdth_wait() argument 1452 TRACE(("gdth_wait() hanum %d index %d time %d\n", ha->hanum, index, time)); gdth_wait() 1458 __gdth_interrupt(ha, true, &wait_index); gdth_wait() 1466 while (gdth_test_busy(ha)) gdth_wait() 1473 static int gdth_internal_cmd(gdth_ha_str *ha, u8 service, u16 opcode, gdth_internal_cmd() argument 1481 cmd_ptr = ha->pccb; gdth_internal_cmd() 1488 if (!(index=gdth_get_cmd_index(ha))) { gdth_internal_cmd() 1492 gdth_set_sema0(ha); gdth_internal_cmd() 1500 cmd_ptr->u.ioctl.p_param = ha->scratch_phys; gdth_internal_cmd() 1502 if (ha->cache_feat & GDT_64BIT) { gdth_internal_cmd() 1511 if (ha->raw_feat & GDT_64BIT) { gdth_internal_cmd() 1529 ha->cmd_len = sizeof(gdth_cmd_str); gdth_internal_cmd() 1530 ha->cmd_offs_dpmem = 0; gdth_internal_cmd() 1531 ha->cmd_cnt = 0; gdth_internal_cmd() 1532 gdth_copy_command(ha); gdth_internal_cmd() 1533 gdth_release_event(ha); gdth_internal_cmd() 1535 if (!gdth_wait(ha, index, INIT_TIMEOUT)) { gdth_internal_cmd() 1539 if (ha->status != S_BSY || --retries == 0) gdth_internal_cmd() 1544 return (ha->status != S_OK ? 0:1); gdth_internal_cmd() 1550 static int gdth_search_drives(gdth_ha_str *ha) gdth_search_drives() argument 1571 TRACE(("gdth_search_drives() hanum %d\n", ha->hanum)); gdth_search_drives() 1575 ha->screen_feat = 0; gdth_search_drives() 1577 ok = gdth_internal_cmd(ha, SCREENSERVICE, GDT_X_INIT_SCR, 0, 0, 0); gdth_search_drives() 1579 ha->screen_feat = GDT_64BIT; gdth_search_drives() 1581 if (force_dma32 || (!ok && ha->status == (u16)S_NOFUNC)) gdth_search_drives() 1582 ok = gdth_internal_cmd(ha, SCREENSERVICE, GDT_INIT, 0, 0, 0); gdth_search_drives() 1585 ha->hanum, ha->status); gdth_search_drives() 1609 gdth_internal_cmd(ha, SCREENSERVICE, GDT_REALTIME, *(u32 *)&rtc[0], gdth_search_drives() 1614 gdth_internal_cmd(ha, CACHESERVICE, GDT_UNFREEZE_IO, 0, 0, 0); gdth_search_drives() 1617 ha->cache_feat = 0; gdth_search_drives() 1619 ok = gdth_internal_cmd(ha, CACHESERVICE, GDT_X_INIT_HOST, LINUX_OS, gdth_search_drives() 1622 ha->cache_feat = GDT_64BIT; gdth_search_drives() 1624 if (force_dma32 || (!ok && ha->status == (u16)S_NOFUNC)) gdth_search_drives() 1625 ok = gdth_internal_cmd(ha, CACHESERVICE, GDT_INIT, LINUX_OS, 0, 0); gdth_search_drives() 1628 ha->hanum, ha->status); gdth_search_drives() 1632 cdev_cnt = (u16)ha->info; gdth_search_drives() 1633 ha->fw_vers = ha->service; gdth_search_drives() 1636 if (ha->type == GDT_PCIMPR) { gdth_search_drives() 1638 pmod = (gdth_perf_modes *)ha->pscratch; gdth_search_drives() 1641 *((u64 *)&pmod->st_buff_addr1) = ha->coal_stat_phys; gdth_search_drives() 1657 if (gdth_internal_cmd(ha, CACHESERVICE, GDT_IOCTL, SET_PERF_MODES, gdth_search_drives() 1659 printk("GDT-HA %d: Interrupt coalescing activated\n", ha->hanum); gdth_search_drives() 1665 iocr = (gdth_raw_iochan_str *)ha->pscratch; gdth_search_drives() 1671 if (gdth_internal_cmd(ha, CACHESERVICE, GDT_IOCTL, IOCHAN_RAW_DESC, gdth_search_drives() 1674 ha->bus_cnt = iocr->hdr.chan_count; gdth_search_drives() 1675 for (bus_no = 0; bus_no < ha->bus_cnt; ++bus_no) { gdth_search_drives() 1677 ha->bus_id[bus_no] = iocr->list[bus_no].proc_id; gdth_search_drives() 1679 ha->bus_id[bus_no] = 0xff; gdth_search_drives() 1683 chn = (gdth_getch_str *)ha->pscratch; gdth_search_drives() 1686 if (!gdth_internal_cmd(ha, CACHESERVICE, GDT_IOCTL, gdth_search_drives() 1692 ha->hanum, ha->status); gdth_search_drives() 1698 ha->bus_id[bus_no] = chn->siop_id; gdth_search_drives() 1700 ha->bus_id[bus_no] = 0xff; gdth_search_drives() 1702 ha->bus_cnt = (u8)bus_no; gdth_search_drives() 1704 TRACE2(("gdth_search_drives() %d channels\n",ha->bus_cnt)); gdth_search_drives() 1707 if (!gdth_internal_cmd(ha, CACHESERVICE, GDT_IOCTL, CACHE_INFO, gdth_search_drives() 1710 ha->hanum, ha->status); gdth_search_drives() 1713 ha->cpar = ((gdth_cinfo_str *)ha->pscratch)->cpar; gdth_search_drives() 1715 ha->cpar.version,ha->cpar.state,ha->cpar.strategy, gdth_search_drives() 1716 ha->cpar.write_back,ha->cpar.block_size)); gdth_search_drives() 1719 ha->more_proc = FALSE; gdth_search_drives() 1720 if (gdth_internal_cmd(ha, CACHESERVICE, GDT_IOCTL, BOARD_INFO, gdth_search_drives() 1722 memcpy(&ha->binfo, (gdth_binfo_str *)ha->pscratch, gdth_search_drives() 1724 if (gdth_internal_cmd(ha, CACHESERVICE, GDT_IOCTL, BOARD_FEATURES, gdth_search_drives() 1727 ha->bfeat = *(gdth_bfeat_str *)ha->pscratch; gdth_search_drives() 1728 ha->more_proc = TRUE; gdth_search_drives() 1732 strcpy(ha->binfo.type_string, gdth_ctr_name(ha)); gdth_search_drives() 1734 TRACE2(("Controller name: %s\n",ha->binfo.type_string)); gdth_search_drives() 1737 if (ha->more_proc) { gdth_search_drives() 1739 ioc = (gdth_iochan_str *)ha->pscratch; gdth_search_drives() 1745 if (gdth_internal_cmd(ha, CACHESERVICE, GDT_IOCTL, IOCHAN_DESC, gdth_search_drives() 1747 for (bus_no = 0; bus_no < ha->bus_cnt; ++bus_no) { gdth_search_drives() 1748 ha->raw[bus_no].address = ioc->list[bus_no].address; gdth_search_drives() 1749 ha->raw[bus_no].local_no = ioc->list[bus_no].local_no; gdth_search_drives() 1752 for (bus_no = 0; bus_no < ha->bus_cnt; ++bus_no) { gdth_search_drives() 1753 ha->raw[bus_no].address = IO_CHANNEL; gdth_search_drives() 1754 ha->raw[bus_no].local_no = bus_no; gdth_search_drives() 1757 for (bus_no = 0; bus_no < ha->bus_cnt; ++bus_no) { gdth_search_drives() 1758 chn = (gdth_getch_str *)ha->pscratch; gdth_search_drives() 1759 chn->channel_no = ha->raw[bus_no].local_no; gdth_search_drives() 1760 if (gdth_internal_cmd(ha, CACHESERVICE, GDT_IOCTL, gdth_search_drives() 1762 ha->raw[bus_no].address | INVALID_CHANNEL, gdth_search_drives() 1764 ha->raw[bus_no].pdev_cnt = chn->drive_cnt; gdth_search_drives() 1768 if (ha->raw[bus_no].pdev_cnt > 0) { gdth_search_drives() 1769 drl = (gdth_drlist_str *)ha->pscratch; gdth_search_drives() 1770 drl->sc_no = ha->raw[bus_no].local_no; gdth_search_drives() 1771 drl->sc_cnt = ha->raw[bus_no].pdev_cnt; gdth_search_drives() 1772 if (gdth_internal_cmd(ha, CACHESERVICE, GDT_IOCTL, gdth_search_drives() 1774 ha->raw[bus_no].address | INVALID_CHANNEL, gdth_search_drives() 1776 for (j = 0; j < ha->raw[bus_no].pdev_cnt; ++j) gdth_search_drives() 1777 ha->raw[bus_no].id_list[j] = drl->sc_list[j]; gdth_search_drives() 1779 ha->raw[bus_no].pdev_cnt = 0; gdth_search_drives() 1785 if (gdth_internal_cmd(ha, CACHESERVICE, GDT_IOCTL, CACHE_DRV_CNT, gdth_search_drives() 1787 drv_cnt = *(u32 *)ha->pscratch; gdth_search_drives() 1788 if (gdth_internal_cmd(ha, CACHESERVICE, GDT_IOCTL, CACHE_DRV_LIST, gdth_search_drives() 1791 drv_no = ((u32 *)ha->pscratch)[j]; gdth_search_drives() 1793 ha->hdr[drv_no].is_logdrv = TRUE; gdth_search_drives() 1798 alst = (gdth_arcdl_str *)ha->pscratch; gdth_search_drives() 1802 if (gdth_internal_cmd(ha, CACHESERVICE, GDT_IOCTL, gdth_search_drives() 1807 ha->hdr[j].is_arraydrv = alst->list[j].is_arrayd; gdth_search_drives() 1808 ha->hdr[j].is_master = alst->list[j].is_master; gdth_search_drives() 1809 ha->hdr[j].is_parity = alst->list[j].is_parity; gdth_search_drives() 1810 ha->hdr[j].is_hotfix = alst->list[j].is_hotfix; gdth_search_drives() 1811 ha->hdr[j].master_no = alst->list[j].cd_handle; gdth_search_drives() 1813 } else if (gdth_internal_cmd(ha, CACHESERVICE, GDT_IOCTL, gdth_search_drives() 1817 alst2 = &((gdth_alist_str *)ha->pscratch)[j]; gdth_search_drives() 1818 ha->hdr[j].is_arraydrv = alst2->is_arrayd; gdth_search_drives() 1819 ha->hdr[j].is_master = alst2->is_master; gdth_search_drives() 1820 ha->hdr[j].is_parity = alst2->is_parity; gdth_search_drives() 1821 ha->hdr[j].is_hotfix = alst2->is_hotfix; gdth_search_drives() 1822 ha->hdr[j].master_no = alst2->cd_handle; gdth_search_drives() 1829 ha->raw_feat = 0; gdth_search_drives() 1831 ok = gdth_internal_cmd(ha, SCSIRAWSERVICE, GDT_X_INIT_RAW, 0, 0, 0); gdth_search_drives() 1833 ha->raw_feat = GDT_64BIT; gdth_search_drives() 1835 if (force_dma32 || (!ok && ha->status == (u16)S_NOFUNC)) gdth_search_drives() 1836 ok = gdth_internal_cmd(ha, SCSIRAWSERVICE, GDT_INIT, 0, 0, 0); gdth_search_drives() 1839 ha->hanum, ha->status); gdth_search_drives() 1845 if (gdth_internal_cmd(ha, SCSIRAWSERVICE, GDT_SET_FEAT, SCATTER_GATHER, gdth_search_drives() 1848 if (gdth_internal_cmd(ha, SCSIRAWSERVICE, GDT_GET_FEAT, 0, 0, 0)) { gdth_search_drives() 1850 ha->info)); gdth_search_drives() 1851 ha->raw_feat |= (u16)ha->info; gdth_search_drives() 1856 if (gdth_internal_cmd(ha, CACHESERVICE, GDT_SET_FEAT, 0, gdth_search_drives() 1859 if (gdth_internal_cmd(ha, CACHESERVICE, GDT_GET_FEAT, 0, 0, 0)) { gdth_search_drives() 1861 ha->info)); gdth_search_drives() 1862 ha->cache_feat |= (u16)ha->info; gdth_search_drives() 1868 gdth_internal_cmd(ha, SCSIRAWSERVICE, GDT_RESERVE_ALL, gdth_search_drives() 1871 ha->status)); gdth_search_drives() 1874 if (reserve_list[i] == ha->hanum && reserve_list[i+1] < ha->bus_cnt && gdth_search_drives() 1875 reserve_list[i+2] < ha->tid_cnt && reserve_list[i+3] < MAXLUN) { gdth_search_drives() 1876 TRACE2(("gdth_search_drives(): reserve ha %d bus %d id %d lun %d\n", gdth_search_drives() 1879 if (!gdth_internal_cmd(ha, SCSIRAWSERVICE, GDT_RESERVE, 0, gdth_search_drives() 1883 ha->hanum, ha->status); gdth_search_drives() 1889 oemstr = (gdth_oem_str_ioctl *)ha->pscratch; gdth_search_drives() 1892 if (gdth_internal_cmd(ha, CACHESERVICE, GDT_IOCTL, gdth_search_drives() 1897 ha->hanum, oemstr->text.oem_company_name, ha->binfo.type_string); gdth_search_drives() 1899 strlcpy(ha->oem_name,oemstr->text.scsi_host_drive_inquiry_vendor_id, gdth_search_drives() 1900 sizeof(ha->oem_name)); gdth_search_drives() 1905 ha->hanum, ha->binfo.type_string); gdth_search_drives() 1906 if (ha->oem_id == OEM_ID_INTEL) gdth_search_drives() 1907 strlcpy(ha->oem_name,"Intel ", sizeof(ha->oem_name)); gdth_search_drives() 1909 strlcpy(ha->oem_name,"ICP ", sizeof(ha->oem_name)); gdth_search_drives() 1914 gdth_analyse_hdrive(ha, i); gdth_search_drives() 1920 static int gdth_analyse_hdrive(gdth_ha_str *ha, u16 hdrive) gdth_analyse_hdrive() argument 1925 TRACE(("gdth_analyse_hdrive() hanum %d drive %d\n", ha->hanum, hdrive)); gdth_analyse_hdrive() 1929 if (!gdth_internal_cmd(ha, CACHESERVICE, GDT_INFO, hdrive, 0, 0)) gdth_analyse_hdrive() 1931 ha->hdr[hdrive].present = TRUE; gdth_analyse_hdrive() 1932 ha->hdr[hdrive].size = ha->info; gdth_analyse_hdrive() 1935 ha->hdr[hdrive].size &= ~SECS32; gdth_analyse_hdrive() 1936 if (ha->info2 == 0) { gdth_analyse_hdrive() 1937 gdth_eval_mapping(ha->hdr[hdrive].size,&drv_cyls,&drv_hds,&drv_secs); gdth_analyse_hdrive() 1939 drv_hds = ha->info2 & 0xff; gdth_analyse_hdrive() 1940 drv_secs = (ha->info2 >> 8) & 0xff; gdth_analyse_hdrive() 1941 drv_cyls = (u32)ha->hdr[hdrive].size / drv_hds / drv_secs; gdth_analyse_hdrive() 1943 ha->hdr[hdrive].heads = (u8)drv_hds; gdth_analyse_hdrive() 1944 ha->hdr[hdrive].secs = (u8)drv_secs; gdth_analyse_hdrive() 1946 ha->hdr[hdrive].size = drv_cyls * drv_hds * drv_secs; gdth_analyse_hdrive() 1948 if (ha->cache_feat & GDT_64BIT) { gdth_analyse_hdrive() 1949 if (gdth_internal_cmd(ha, CACHESERVICE, GDT_X_INFO, hdrive, 0, 0) gdth_analyse_hdrive() 1950 && ha->info2 != 0) { gdth_analyse_hdrive() 1951 ha->hdr[hdrive].size = ((u64)ha->info2 << 32) | ha->info; gdth_analyse_hdrive() 1955 hdrive,ha->hdr[hdrive].size,drv_hds,drv_secs)); gdth_analyse_hdrive() 1958 if (gdth_internal_cmd(ha, CACHESERVICE, GDT_DEVTYPE, hdrive, 0, 0)) { gdth_analyse_hdrive() 1960 hdrive,ha->info)); gdth_analyse_hdrive() 1961 ha->hdr[hdrive].devtype = (u16)ha->info; gdth_analyse_hdrive() 1965 if (gdth_internal_cmd(ha, CACHESERVICE, GDT_CLUST_INFO, hdrive, 0, 0)) { gdth_analyse_hdrive() 1967 hdrive,ha->info)); gdth_analyse_hdrive() 1969 ha->hdr[hdrive].cluster_type = (u8)ha->info; gdth_analyse_hdrive() 1973 if (gdth_internal_cmd(ha, CACHESERVICE, GDT_RW_ATTRIBS, hdrive, 0, 0)) { gdth_analyse_hdrive() 1975 hdrive,ha->info)); gdth_analyse_hdrive() 1976 ha->hdr[hdrive].rw_attribs = (u8)ha->info; gdth_analyse_hdrive() 1985 static void gdth_putq(gdth_ha_str *ha, Scsi_Cmnd *scp, u8 priority) gdth_putq() argument 1993 spin_lock_irqsave(&ha->smp_lock, flags); gdth_putq() 1998 if (ha->req_first==NULL) { gdth_putq() 1999 ha->req_first = scp; /* queue was empty */ gdth_putq() 2002 pscp = ha->req_first; gdth_putq() 2012 spin_unlock_irqrestore(&ha->smp_lock, flags); gdth_putq() 2016 for (nscp=ha->req_first; nscp; nscp=(Scsi_Cmnd*)nscp->SCp.ptr) gdth_putq() 2025 static void gdth_next(gdth_ha_str *ha) gdth_next() argument 2034 TRACE(("gdth_next() hanum %d\n", ha->hanum)); gdth_next() 2036 spin_lock_irqsave(&ha->smp_lock, flags); gdth_next() 2038 ha->cmd_cnt = ha->cmd_offs_dpmem = 0; gdth_next() 2043 for (nscp = pscp = ha->req_first; nscp; nscp = (Scsi_Cmnd *)nscp->SCp.ptr) { gdth_next() 2052 if ((b != ha->virt_bus && ha->raw[BUS_L2P(ha,b)].lock) || gdth_next() 2053 (b == ha->virt_bus && t < MAX_HDRIVES && ha->hdr[t].lock)) gdth_next() 2060 if (gdth_test_busy(ha)) { /* controller busy ? */ gdth_next() 2061 TRACE(("gdth_next() controller %d busy !\n", ha->hanum)); gdth_next() 2063 spin_unlock_irqrestore(&ha->smp_lock, flags); gdth_next() 2066 while (gdth_test_busy(ha)) gdth_next() 2079 if ((ha->scan_mode & 0x0f) == 0) { gdth_next() 2081 ha->scan_mode |= 1; gdth_next() 2082 TRACE2(("Scan mode: 0x%x\n", ha->scan_mode)); gdth_next() 2084 } else if ((ha->scan_mode & 0x0f) == 1) { gdth_next() 2088 nscp_cmndinfo->phase = ((ha->scan_mode & 0x10 ? 1:0) << 8) gdth_next() 2090 ha->scan_mode = 0x12; gdth_next() 2092 ha->scan_mode)); gdth_next() 2094 ha->scan_mode &= 0x10; gdth_next() 2095 TRACE2(("Scan mode: 0x%x\n", ha->scan_mode)); gdth_next() 2097 } else if (ha->scan_mode == 0x12) { gdth_next() 2098 if (b == ha->bus_cnt && t == ha->tid_cnt-1) { gdth_next() 2101 ha->scan_mode &= 0x10; gdth_next() 2103 ha->scan_mode)); gdth_next() 2107 if (b == ha->virt_bus && nscp->cmnd[0] != INQUIRY && gdth_next() 2109 (ha->hdr[t].cluster_type & CLUSTER_DRIVE)) { gdth_next() 2118 if (!(cmd_index=gdth_fill_cache_cmd(ha, nscp, t))) gdth_next() 2122 if (!(cmd_index=gdth_fill_raw_cmd(ha, nscp, BUS_L2P(ha, b)))) gdth_next() 2136 if (!(cmd_index=gdth_special_cmd(ha, nscp))) gdth_next() 2139 } else if (b != ha->virt_bus) { gdth_next() 2140 if (ha->raw[BUS_L2P(ha,b)].io_cnt[t] >= GDTH_MAX_RAW || gdth_next() 2141 !(cmd_index=gdth_fill_raw_cmd(ha, nscp, BUS_L2P(ha, b)))) gdth_next() 2144 ha->raw[BUS_L2P(ha,b)].io_cnt[t]++; gdth_next() 2145 } else if (t >= MAX_HDRIVES || !ha->hdr[t].present || l != 0) { gdth_next() 2166 if (ha->hdr[t].media_changed && nscp->cmnd[0] != INQUIRY) { gdth_next() 2170 ha->hdr[t].media_changed = FALSE; gdth_next() 2179 } else if (gdth_internal_cache_cmd(ha, nscp)) gdth_next() 2187 if ( (nscp->cmnd[4]&1) && !(ha->hdr[t].devtype&1) ) { gdth_next() 2196 nscp->cmnd[3] = (ha->hdr[t].devtype&1) ? 1:0; gdth_next() 2199 if (!(cmd_index=gdth_fill_cache_cmd(ha, nscp, t))) gdth_next() 2208 if (!(cmd_index=gdth_fill_cache_cmd(ha, nscp, t))) gdth_next() 2218 if (ha->hdr[t].media_changed) { gdth_next() 2222 ha->hdr[t].media_changed = FALSE; gdth_next() 2231 } else if (!(cmd_index=gdth_fill_cache_cmd(ha, nscp, t))) gdth_next() 2240 ha->hanum, nscp->cmnd[0]); gdth_next() 2252 if (nscp == ha->req_first) gdth_next() 2253 ha->req_first = pscp = (Scsi_Cmnd *)nscp->SCp.ptr; gdth_next() 2260 if (ha->cmd_cnt > 0) { gdth_next() 2261 gdth_release_event(ha); gdth_next() 2265 spin_unlock_irqrestore(&ha->smp_lock, flags); gdth_next() 2267 if (gdth_polling && ha->cmd_cnt > 0) { gdth_next() 2268 if (!gdth_wait(ha, cmd_index, POLL_TIMEOUT)) gdth_next() 2270 ha->hanum, cmd_index); gdth_next() 2278 static void gdth_copy_internal_data(gdth_ha_str *ha, Scsi_Cmnd *scp, gdth_copy_internal_data() argument 2300 ha->hanum); scsi_for_each_sg() 2315 ha->hanum); 2320 static int gdth_internal_cache_cmd(gdth_ha_str *ha, Scsi_Cmnd *scp) gdth_internal_cache_cmd() argument 2345 t,ha->hdr[t].devtype)); gdth_internal_cache_cmd() 2346 inq.type_qual = (ha->hdr[t].devtype&4) ? TYPE_ROM:TYPE_DISK; gdth_internal_cache_cmd() 2350 if ((ha->hdr[t].devtype & 1) || gdth_internal_cache_cmd() 2351 (ha->hdr[t].cluster_type & CLUSTER_DRIVE)) gdth_internal_cache_cmd() 2356 strcpy(inq.vendor,ha->oem_name); gdth_internal_cache_cmd() 2359 gdth_copy_internal_data(ha, scp, (char*)&inq, sizeof(gdth_inq_data)); gdth_internal_cache_cmd() 2369 gdth_copy_internal_data(ha, scp, (char*)&sd, sizeof(gdth_sense_data)); gdth_internal_cache_cmd() 2376 mpd.hd.dev_par = (ha->hdr[t].devtype&2) ? 0x80:0; gdth_internal_cache_cmd() 2381 gdth_copy_internal_data(ha, scp, (char*)&mpd, sizeof(gdth_modep_data)); gdth_internal_cache_cmd() 2386 if (ha->hdr[t].size > (u64)0xffffffff) gdth_internal_cache_cmd() 2389 rdc.last_block_no = cpu_to_be32(ha->hdr[t].size-1); gdth_internal_cache_cmd() 2391 gdth_copy_internal_data(ha, scp, (char*)&rdc, sizeof(gdth_rdcap_data)); gdth_internal_cache_cmd() 2396 (ha->cache_feat & GDT_64BIT)) { gdth_internal_cache_cmd() 2400 rdc16.last_block_no = cpu_to_be64(ha->hdr[t].size-1); gdth_internal_cache_cmd() 2402 gdth_copy_internal_data(ha, scp, (char*)&rdc16, gdth_internal_cache_cmd() 2422 static int gdth_fill_cache_cmd(gdth_ha_str *ha, Scsi_Cmnd *scp, u16 hdrive) gdth_fill_cache_cmd() argument 2430 cmdp = ha->pccb; gdth_fill_cache_cmd() 2434 if (ha->type==GDT_EISA && ha->cmd_cnt>0) gdth_fill_cache_cmd() 2437 mode64 = (ha->cache_feat & GDT_64BIT) ? TRUE : FALSE; gdth_fill_cache_cmd() 2445 if (!(cmd_index=gdth_get_cmd_index(ha))) { gdth_fill_cache_cmd() 2450 if (ha->cmd_cnt == 0) gdth_fill_cache_cmd() 2451 gdth_set_sema0(ha); gdth_fill_cache_cmd() 2472 if (gdth_write_through || ((ha->hdr[hdrive].rw_attribs & 1) && gdth_fill_cache_cmd() 2473 (ha->cache_feat & GDT_WR_THROUGH))) gdth_fill_cache_cmd() 2520 sgcnt = pci_map_sg(ha->pdev, scsi_sglist(scp), scsi_sg_count(scp), gdth_fill_cache_cmd() 2531 ha->dma64_cnt++; scsi_for_each_sg() 2533 ha->dma32_cnt++; scsi_for_each_sg() 2545 ha->dma32_cnt++; scsi_for_each_sg() 2568 ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.cache64.sg_lst) + 2577 ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.cache.sg_lst) + 2580 if (ha->cmd_len & 3) 2581 ha->cmd_len += (4 - (ha->cmd_len & 3)); 2583 if (ha->cmd_cnt > 0) { 2584 if ((ha->cmd_offs_dpmem + ha->cmd_len + DPMEM_COMMAND_OFFSET) > 2585 ha->ic_all_size) { 2587 ha->cmd_tab[cmd_index-2].cmnd = UNUSED_CMND; 2593 gdth_copy_command(ha); 2597 static int gdth_fill_raw_cmd(gdth_ha_str *ha, Scsi_Cmnd *scp, u8 b) gdth_fill_raw_cmd() argument 2610 cmdp = ha->pccb; gdth_fill_raw_cmd() 2614 if (ha->type==GDT_EISA && ha->cmd_cnt>0) gdth_fill_raw_cmd() 2617 mode64 = (ha->raw_feat & GDT_64BIT) ? TRUE : FALSE; gdth_fill_raw_cmd() 2622 if (!(cmd_index=gdth_get_cmd_index(ha))) { gdth_fill_raw_cmd() 2627 if (ha->cmd_cnt == 0) gdth_fill_raw_cmd() 2628 gdth_set_sema0(ha); gdth_fill_raw_cmd() 2640 ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.raw64.sg_lst); gdth_fill_raw_cmd() 2646 ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.raw.sg_lst); gdth_fill_raw_cmd() 2652 sense_paddr = pci_map_page(ha->pdev,page,offset, gdth_fill_raw_cmd() 2695 sgcnt = pci_map_sg(ha->pdev, scsi_sglist(scp), scsi_sg_count(scp), gdth_fill_raw_cmd() 2706 ha->dma64_cnt++; scsi_for_each_sg() 2708 ha->dma32_cnt++; scsi_for_each_sg() 2720 ha->dma32_cnt++; scsi_for_each_sg() 2740 ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.raw64.sg_lst) + 2748 ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.raw.sg_lst) + 2753 if (ha->cmd_len & 3) 2754 ha->cmd_len += (4 - (ha->cmd_len & 3)); 2756 if (ha->cmd_cnt > 0) { 2757 if ((ha->cmd_offs_dpmem + ha->cmd_len + DPMEM_COMMAND_OFFSET) > 2758 ha->ic_all_size) { 2760 ha->cmd_tab[cmd_index-2].cmnd = UNUSED_CMND; 2766 gdth_copy_command(ha); 2770 static int gdth_special_cmd(gdth_ha_str *ha, Scsi_Cmnd *scp) gdth_special_cmd() argument 2776 cmdp= ha->pccb; gdth_special_cmd() 2779 if (ha->type==GDT_EISA && ha->cmd_cnt>0) gdth_special_cmd() 2786 if (!(cmd_index=gdth_get_cmd_index(ha))) { gdth_special_cmd() 2792 if (ha->cmd_cnt == 0) gdth_special_cmd() 2793 gdth_set_sema0(ha); gdth_special_cmd() 2798 ha->cmd_len = gdth_special_cmd() 2802 if (ha->cache_feat & GDT_64BIT) gdth_special_cmd() 2803 ha->cmd_len = gdth_special_cmd() 2806 ha->cmd_len = gdth_special_cmd() 2810 if (ha->raw_feat & GDT_64BIT) gdth_special_cmd() 2811 ha->cmd_len = gdth_special_cmd() 2814 ha->cmd_len = gdth_special_cmd() 2818 if (ha->cmd_len & 3) gdth_special_cmd() 2819 ha->cmd_len += (4 - (ha->cmd_len & 3)); gdth_special_cmd() 2821 if (ha->cmd_cnt > 0) { gdth_special_cmd() 2822 if ((ha->cmd_offs_dpmem + ha->cmd_len + DPMEM_COMMAND_OFFSET) > gdth_special_cmd() 2823 ha->ic_all_size) { gdth_special_cmd() 2825 ha->cmd_tab[cmd_index-2].cmnd = UNUSED_CMND; gdth_special_cmd() 2831 gdth_copy_command(ha); gdth_special_cmd() 2837 static gdth_evt_str *gdth_store_event(gdth_ha_str *ha, u16 source, gdth_store_event() argument 2883 static int gdth_read_event(gdth_ha_str *ha, int handle, gdth_evt_str *estr) gdth_read_event() argument 2890 spin_lock_irqsave(&ha->smp_lock, flags); gdth_read_event() 2898 spin_unlock_irqrestore(&ha->smp_lock, flags); gdth_read_event() 2911 spin_unlock_irqrestore(&ha->smp_lock, flags); gdth_read_event() 2915 static void gdth_readapp_event(gdth_ha_str *ha, gdth_readapp_event() argument 2924 spin_lock_irqsave(&ha->smp_lock, flags); gdth_readapp_event() 2944 spin_unlock_irqrestore(&ha->smp_lock, flags); gdth_readapp_event() 2958 static irqreturn_t __gdth_interrupt(gdth_ha_str *ha, __gdth_interrupt() argument 2976 TRACE(("gdth_interrupt() IRQ %d\n", ha->irq)); __gdth_interrupt() 2986 spin_lock_irqsave(&ha->smp_lock, flags); __gdth_interrupt() 2989 IStatus = gdth_get_status(ha); __gdth_interrupt() 2993 spin_unlock_irqrestore(&ha->smp_lock, flags); __gdth_interrupt() 3006 pcs = ha->coal_stat; __gdth_interrupt() 3019 if (ha->type == GDT_EISA) { __gdth_interrupt() 3022 ha->status = inw(ha->bmic + MAILBOXREG+8); __gdth_interrupt() 3023 TRACE2(("gdth_interrupt() error %d/%d\n",IStatus,ha->status)); __gdth_interrupt() 3025 ha->status = S_OK; __gdth_interrupt() 3026 ha->info = inl(ha->bmic + MAILBOXREG+12); __gdth_interrupt() 3027 ha->service = inw(ha->bmic + MAILBOXREG+10); __gdth_interrupt() 3028 ha->info2 = inl(ha->bmic + MAILBOXREG+4); __gdth_interrupt() 3030 outb(0xff, ha->bmic + EDOORREG); /* acknowledge interrupt */ __gdth_interrupt() 3031 outb(0x00, ha->bmic + SEMA1REG); /* reset status semaphore */ __gdth_interrupt() 3032 } else if (ha->type == GDT_ISA) { __gdth_interrupt() 3033 dp2_ptr = ha->brd; __gdth_interrupt() 3036 ha->status = readw(&dp2_ptr->u.ic.Status); __gdth_interrupt() 3037 TRACE2(("gdth_interrupt() error %d/%d\n",IStatus,ha->status)); __gdth_interrupt() 3039 ha->status = S_OK; __gdth_interrupt() 3040 ha->info = readl(&dp2_ptr->u.ic.Info[0]); __gdth_interrupt() 3041 ha->service = readw(&dp2_ptr->u.ic.Service); __gdth_interrupt() 3042 ha->info2 = readl(&dp2_ptr->u.ic.Info[1]); __gdth_interrupt() 3047 } else if (ha->type == GDT_PCI) { __gdth_interrupt() 3048 dp6_ptr = ha->brd; __gdth_interrupt() 3051 ha->status = readw(&dp6_ptr->u.ic.Status); __gdth_interrupt() 3052 TRACE2(("gdth_interrupt() error %d/%d\n",IStatus,ha->status)); __gdth_interrupt() 3054 ha->status = S_OK; __gdth_interrupt() 3055 ha->info = readl(&dp6_ptr->u.ic.Info[0]); __gdth_interrupt() 3056 ha->service = readw(&dp6_ptr->u.ic.Service); __gdth_interrupt() 3057 ha->info2 = readl(&dp6_ptr->u.ic.Info[1]); __gdth_interrupt() 3062 } else if (ha->type == GDT_PCINEW) { __gdth_interrupt() 3065 ha->status = inw(PTR2USHORT(&ha->plx->status)); __gdth_interrupt() 3066 TRACE2(("gdth_interrupt() error %d/%d\n",IStatus,ha->status)); __gdth_interrupt() 3068 ha->status = S_OK; __gdth_interrupt() 3069 ha->info = inl(PTR2USHORT(&ha->plx->info[0])); __gdth_interrupt() 3070 ha->service = inw(PTR2USHORT(&ha->plx->service)); __gdth_interrupt() 3071 ha->info2 = inl(PTR2USHORT(&ha->plx->info[1])); __gdth_interrupt() 3073 outb(0xff, PTR2USHORT(&ha->plx->edoor_reg)); __gdth_interrupt() 3074 outb(0x00, PTR2USHORT(&ha->plx->sema1_reg)); __gdth_interrupt() 3075 } else if (ha->type == GDT_PCIMPR) { __gdth_interrupt() 3076 dp6m_ptr = ha->brd; __gdth_interrupt() 3081 ha->status = pcs->ext_status & 0xffff; __gdth_interrupt() 3084 ha->status = readw(&dp6m_ptr->i960r.status); __gdth_interrupt() 3085 TRACE2(("gdth_interrupt() error %d/%d\n",IStatus,ha->status)); __gdth_interrupt() 3087 ha->status = S_OK; __gdth_interrupt() 3091 ha->info = pcs->info0; __gdth_interrupt() 3092 ha->info2 = pcs->info1; __gdth_interrupt() 3093 ha->service = (pcs->ext_status >> 16) & 0xffff; __gdth_interrupt() 3097 ha->info = readl(&dp6m_ptr->i960r.info[0]); __gdth_interrupt() 3098 ha->service = readw(&dp6m_ptr->i960r.service); __gdth_interrupt() 3099 ha->info2 = readl(&dp6m_ptr->i960r.info[1]); __gdth_interrupt() 3103 if (ha->service != SCREENSERVICE && __gdth_interrupt() 3104 (ha->fw_vers & 0xff) >= 0x1a) { __gdth_interrupt() 3105 ha->dvr.severity = readb __gdth_interrupt() 3106 (&((gdt6m_dpram_str __iomem *)ha->brd)->i960r.severity); __gdth_interrupt() 3108 ha->dvr.event_string[i] = readb __gdth_interrupt() 3109 (&((gdt6m_dpram_str __iomem *)ha->brd)->i960r.evt_str[i]); __gdth_interrupt() 3110 if (ha->dvr.event_string[i] == 0) __gdth_interrupt() 3127 spin_unlock_irqrestore(&ha->smp_lock, flags); __gdth_interrupt() 3132 IStatus,ha->status,ha->info)); __gdth_interrupt() 3140 gdth_async_event(ha); __gdth_interrupt() 3142 spin_unlock_irqrestore(&ha->smp_lock, flags); __gdth_interrupt() 3143 gdth_next(ha); __gdth_interrupt() 3149 ha->dvr.size = sizeof(ha->dvr.eu.driver); __gdth_interrupt() 3150 ha->dvr.eu.driver.ionode = ha->hanum; __gdth_interrupt() 3151 gdth_store_event(ha, ES_DRIVER, 4, &ha->dvr); __gdth_interrupt() 3153 spin_unlock_irqrestore(&ha->smp_lock, flags); __gdth_interrupt() 3156 scp = ha->cmd_tab[IStatus-2].cmnd; __gdth_interrupt() 3157 Service = ha->cmd_tab[IStatus-2].service; __gdth_interrupt() 3158 ha->cmd_tab[IStatus-2].cmnd = UNUSED_CMND; __gdth_interrupt() 3161 ha->dvr.size = sizeof(ha->dvr.eu.driver); __gdth_interrupt() 3162 ha->dvr.eu.driver.ionode = ha->hanum; __gdth_interrupt() 3163 ha->dvr.eu.driver.index = IStatus; __gdth_interrupt() 3164 gdth_store_event(ha, ES_DRIVER, 1, &ha->dvr); __gdth_interrupt() 3166 spin_unlock_irqrestore(&ha->smp_lock, flags); __gdth_interrupt() 3172 spin_unlock_irqrestore(&ha->smp_lock, flags); __gdth_interrupt() 3177 rval = gdth_sync_event(ha,Service,IStatus,scp); __gdth_interrupt() 3179 spin_unlock_irqrestore(&ha->smp_lock, flags); __gdth_interrupt() 3181 gdth_putq(ha, scp, gdth_cmnd_priv(scp)->priority); __gdth_interrupt() 3205 if (ha->type == GDT_PCIMPR && coalesced) { __gdth_interrupt() 3211 gdth_next(ha); __gdth_interrupt() 3217 gdth_ha_str *ha = dev_id; gdth_interrupt() local 3219 return __gdth_interrupt(ha, false, NULL); gdth_interrupt() 3222 static int gdth_sync_event(gdth_ha_str *ha, int service, u8 index, gdth_sync_event() argument 3230 cmdp = ha->pccb; gdth_sync_event() 3232 service,ha->status)); gdth_sync_event() 3235 msg = ha->pmsg; gdth_sync_event() 3247 while (gdth_test_busy(ha)) gdth_sync_event() 3251 gdth_get_cmd_index(ha); gdth_sync_event() 3252 gdth_set_sema0(ha); gdth_sync_event() 3257 cmdp->u.screen.su.msg.msg_addr = ha->msg_phys; gdth_sync_event() 3258 ha->cmd_offs_dpmem = 0; gdth_sync_event() 3259 ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.screen.su.msg.msg_addr) gdth_sync_event() 3261 ha->cmd_cnt = 0; gdth_sync_event() 3262 gdth_copy_command(ha); gdth_sync_event() 3263 gdth_release_event(ha); gdth_sync_event() 3281 while (gdth_test_busy(ha)) gdth_sync_event() 3285 gdth_get_cmd_index(ha); gdth_sync_event() 3286 gdth_set_sema0(ha); gdth_sync_event() 3291 cmdp->u.screen.su.msg.msg_addr = ha->msg_phys; gdth_sync_event() 3292 ha->cmd_offs_dpmem = 0; gdth_sync_event() 3293 ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.screen.su.msg.msg_addr) gdth_sync_event() 3295 ha->cmd_cnt = 0; gdth_sync_event() 3296 gdth_copy_command(ha); gdth_sync_event() 3297 gdth_release_event(ha); gdth_sync_event() 3305 if (cmndinfo->OpCode == -1 && b != ha->virt_bus) { gdth_sync_event() 3306 ha->raw[BUS_L2P(ha,b)].io_cnt[t]--; gdth_sync_event() 3309 if (ha->status == S_BSY) { gdth_sync_event() 3317 pci_unmap_sg(ha->pdev, scsi_sglist(scp), scsi_sg_count(scp), gdth_sync_event() 3321 pci_unmap_page(ha->pdev, cmndinfo->sense_paddr, 16, gdth_sync_event() 3324 if (ha->status == S_OK) { gdth_sync_event() 3326 cmndinfo->info = ha->info; gdth_sync_event() 3332 ha->hdr[t].cluster_type = (u8)ha->info; gdth_sync_event() 3333 if (!(ha->hdr[t].cluster_type & gdth_sync_event() 3337 if (ha->hdr[t].cluster_type & gdth_sync_event() 3347 ha->hdr[t].cluster_type |= CLUSTER_MOUNTED; gdth_sync_event() 3348 ha->hdr[t].media_changed = TRUE; gdth_sync_event() 3350 ha->hdr[t].cluster_type &= ~CLUSTER_MOUNTED; gdth_sync_event() 3351 ha->hdr[t].media_changed = TRUE; gdth_sync_event() 3361 ha->hdr[t].cluster_type |= CLUSTER_RESERVED; gdth_sync_event() 3363 ha->hdr[t].cluster_type &= ~CLUSTER_RESERVED; gdth_sync_event() 3369 cmndinfo->status = ha->status; gdth_sync_event() 3370 cmndinfo->info = ha->info; gdth_sync_event() 3374 cmndinfo->OpCode, ha->status)); gdth_sync_event() 3387 if (ha->status == S_CACHE_UNKNOWN && gdth_sync_event() 3388 (ha->hdr[t].cluster_type & gdth_sync_event() 3391 ha->hdr[t].cluster_type &= ~CLUSTER_RESERVED; gdth_sync_event() 3394 if (ha->status == (u16)S_CACHE_RESERV) { gdth_sync_event() 3402 ha->dvr.size = sizeof(ha->dvr.eu.sync); gdth_sync_event() 3403 ha->dvr.eu.sync.ionode = ha->hanum; gdth_sync_event() 3404 ha->dvr.eu.sync.service = service; gdth_sync_event() 3405 ha->dvr.eu.sync.status = ha->status; gdth_sync_event() 3406 ha->dvr.eu.sync.info = ha->info; gdth_sync_event() 3407 ha->dvr.eu.sync.hostdrive = t; gdth_sync_event() 3408 if (ha->status >= 0x8000) gdth_sync_event() 3409 gdth_store_event(ha, ES_SYNC, 0, &ha->dvr); gdth_sync_event() 3411 gdth_store_event(ha, ES_SYNC, service, &ha->dvr); gdth_sync_event() 3415 if (ha->status != S_RAW_SCSI || ha->info >= 0x100) { gdth_sync_event() 3418 scp->result = (DID_OK << 16) | ha->info; gdth_sync_event() 3587 static int gdth_async_event(gdth_ha_str *ha) gdth_async_event() argument 3592 cmdp= ha->pccb; gdth_async_event() 3593 TRACE2(("gdth_async_event() ha %d serv %d\n", gdth_async_event() 3594 ha->hanum, ha->service)); gdth_async_event() 3596 if (ha->service == SCREENSERVICE) { gdth_async_event() 3597 if (ha->status == MSG_REQUEST) { gdth_async_event() 3598 while (gdth_test_busy(ha)) gdth_async_event() 3602 cmd_index = gdth_get_cmd_index(ha); gdth_async_event() 3603 gdth_set_sema0(ha); gdth_async_event() 3608 cmdp->u.screen.su.msg.msg_addr = ha->msg_phys; gdth_async_event() 3609 ha->cmd_offs_dpmem = 0; gdth_async_event() 3610 ha->cmd_len = GDTOFFSOF(gdth_cmd_str,u.screen.su.msg.msg_addr) gdth_async_event() 3612 ha->cmd_cnt = 0; gdth_async_event() 3613 gdth_copy_command(ha); gdth_async_event() 3614 if (ha->type == GDT_EISA) gdth_async_event() 3615 printk("[EISA slot %d] ",(u16)ha->brd_phys); gdth_async_event() 3616 else if (ha->type == GDT_ISA) gdth_async_event() 3617 printk("[DPMEM 0x%4X] ",(u16)ha->brd_phys); gdth_async_event() 3619 printk("[PCI %d/%d] ",(u16)(ha->brd_phys>>8), gdth_async_event() 3620 (u16)((ha->brd_phys>>3)&0x1f)); gdth_async_event() 3621 gdth_release_event(ha); gdth_async_event() 3625 if (ha->type == GDT_PCIMPR && gdth_async_event() 3626 (ha->fw_vers & 0xff) >= 0x1a) { gdth_async_event() 3627 ha->dvr.size = 0; gdth_async_event() 3628 ha->dvr.eu.async.ionode = ha->hanum; gdth_async_event() 3629 ha->dvr.eu.async.status = ha->status; gdth_async_event() 3632 ha->dvr.size = sizeof(ha->dvr.eu.async); gdth_async_event() 3633 ha->dvr.eu.async.ionode = ha->hanum; gdth_async_event() 3634 ha->dvr.eu.async.service = ha->service; gdth_async_event() 3635 ha->dvr.eu.async.status = ha->status; gdth_async_event() 3636 ha->dvr.eu.async.info = ha->info; gdth_async_event() 3637 *(u32 *)ha->dvr.eu.async.scsi_coord = ha->info2; gdth_async_event() 3639 gdth_store_event( ha, ES_ASYNC, ha->service, &ha->dvr ); gdth_async_event() 3640 gdth_log_event( &ha->dvr, NULL ); gdth_async_event() 3643 if (ha->service == CACHESERVICE && ha->status == 56) { gdth_async_event() 3645 (u16)ha->info)); gdth_async_event() 3646 /* gdth_analyse_hdrive(hanum, (u16)ha->info); */ gdth_async_event() 3715 gdth_ha_str *ha; gdth_timeout() local 3723 ha = list_first_entry(&gdth_instances, gdth_ha_str, list); gdth_timeout() 3724 spin_lock_irqsave(&ha->smp_lock, flags); gdth_timeout() 3727 if (ha->cmd_tab[i].cmnd != UNUSED_CMND) gdth_timeout() 3730 for (act_rq=0,nscp=ha->req_first; nscp; nscp=(Scsi_Cmnd*)nscp->SCp.ptr) gdth_timeout() 3739 spin_unlock_irqrestore(&ha->smp_lock, flags); gdth_timeout() 3848 static const char *gdth_ctr_name(gdth_ha_str *ha) gdth_ctr_name() argument 3852 if (ha->type == GDT_EISA) { gdth_ctr_name() 3853 switch (ha->stype) { gdth_ctr_name() 3861 } else if (ha->type == GDT_ISA) { gdth_ctr_name() 3863 } else if (ha->type == GDT_PCI) { gdth_ctr_name() 3864 switch (ha->pdev->device) { gdth_ctr_name() 3878 gdth_ha_str *ha = shost_priv(shp); gdth_info() local 3881 return ((const char *)ha->binfo.type_string); gdth_info() 3886 gdth_ha_str *ha = shost_priv(scp->device->host); gdth_timed_out() local 3905 spin_lock_irqsave(&ha->smp_lock, flags); gdth_timed_out() 3906 if ((b != ha->virt_bus && ha->raw[BUS_L2P(ha, b)].lock) || gdth_timed_out() 3907 (b == ha->virt_bus && t < MAX_HDRIVES && ha->hdr[t].lock)) { gdth_timed_out() 3911 spin_unlock_irqrestore(&ha->smp_lock, flags); gdth_timed_out() 3919 gdth_ha_str *ha = shost_priv(scp->device->host); gdth_eh_bus_reset() local 3930 spin_lock_irqsave(&ha->smp_lock, flags); gdth_eh_bus_reset() 3932 cmnd = ha->cmd_tab[i].cmnd; gdth_eh_bus_reset() 3934 ha->cmd_tab[i].cmnd = UNUSED_CMND; gdth_eh_bus_reset() 3936 spin_unlock_irqrestore(&ha->smp_lock, flags); gdth_eh_bus_reset() 3938 if (b == ha->virt_bus) { gdth_eh_bus_reset() 3941 if (ha->hdr[i].present) { gdth_eh_bus_reset() 3942 spin_lock_irqsave(&ha->smp_lock, flags); gdth_eh_bus_reset() 3944 while (gdth_test_busy(ha)) gdth_eh_bus_reset() 3946 if (gdth_internal_cmd(ha, CACHESERVICE, gdth_eh_bus_reset() 3948 ha->hdr[i].cluster_type &= ~CLUSTER_RESERVED; gdth_eh_bus_reset() 3950 spin_unlock_irqrestore(&ha->smp_lock, flags); gdth_eh_bus_reset() 3955 spin_lock_irqsave(&ha->smp_lock, flags); gdth_eh_bus_reset() 3957 ha->raw[BUS_L2P(ha,b)].io_cnt[i] = 0; gdth_eh_bus_reset() 3959 while (gdth_test_busy(ha)) gdth_eh_bus_reset() 3961 gdth_internal_cmd(ha, SCSIRAWSERVICE, GDT_RESET_BUS, gdth_eh_bus_reset() 3962 BUS_L2P(ha,b), 0, 0); gdth_eh_bus_reset() 3964 spin_unlock_irqrestore(&ha->smp_lock, flags); gdth_eh_bus_reset() 3972 gdth_ha_str *ha = shost_priv(sdev->host); gdth_bios_param() local 3980 TRACE2(("gdth_bios_param() ha %d bus %d target %d\n", ha->hanum, b, t)); gdth_bios_param() 3982 if (b != ha->virt_bus || ha->hdr[t].heads == 0) { gdth_bios_param() 3987 ip[0] = ha->hdr[t].heads; gdth_bios_param() 3988 ip[1] = ha->hdr[t].secs; gdth_bios_param() 4001 gdth_ha_str *ha = shost_priv(scp->device->host); gdth_queuecommand_lck() local 4006 cmndinfo = gdth_get_cmndinfo(ha); gdth_queuecommand_lck() 4013 return __gdth_queuecommand(ha, scp, cmndinfo); gdth_queuecommand_lck() 4018 static int __gdth_queuecommand(gdth_ha_str *ha, struct scsi_cmnd *scp, __gdth_queuecommand() argument 4030 gdth_putq(ha, scp, cmndinfo->priority); __gdth_queuecommand() 4031 gdth_next(ha); __gdth_queuecommand() 4038 gdth_ha_str *ha; gdth_open() local 4041 list_for_each_entry(ha, &gdth_instances, list) { gdth_open() 4042 if (!ha->sdev) gdth_open() 4043 ha->sdev = scsi_get_host_dev(ha->shost); gdth_open() 4060 gdth_ha_str *ha; ioc_event() local 4065 ha = gdth_find_ha(evt.ionode); ioc_event() 4066 if (!ha) ioc_event() 4078 spin_lock_irqsave(&ha->smp_lock, flags); ioc_event() 4079 gdth_store_event(ha, evt.event.event_source, evt.event.event_idx, ioc_event() 4081 spin_unlock_irqrestore(&ha->smp_lock, flags); ioc_event() 4085 evt.handle = gdth_read_event(ha, evt.handle, &evt.event); ioc_event() 4087 gdth_readapp_event(ha, evt.erase, &evt.event); ioc_event() 4099 gdth_ha_str *ha; ioc_lockdrv() local 4103 ha = gdth_find_ha(ldrv.ionode); ioc_lockdrv() 4104 if (!ha) ioc_lockdrv() 4109 if (j >= MAX_HDRIVES || !ha->hdr[j].present) ioc_lockdrv() 4112 spin_lock_irqsave(&ha->smp_lock, flags); ioc_lockdrv() 4113 ha->hdr[j].lock = 1; ioc_lockdrv() 4114 spin_unlock_irqrestore(&ha->smp_lock, flags); ioc_lockdrv() 4115 gdth_wait_completion(ha, ha->bus_cnt, j); ioc_lockdrv() 4117 spin_lock_irqsave(&ha->smp_lock, flags); ioc_lockdrv() 4118 ha->hdr[j].lock = 0; ioc_lockdrv() 4119 spin_unlock_irqrestore(&ha->smp_lock, flags); ioc_lockdrv() 4120 gdth_next(ha); ioc_lockdrv() 4130 gdth_ha_str *ha; ioc_resetdrv() local 4136 ha = gdth_find_ha(res.ionode); ioc_resetdrv() 4137 if (!ha) ioc_resetdrv() 4140 if (!ha->hdr[res.number].present) ioc_resetdrv() 4145 if (ha->cache_feat & GDT_64BIT) ioc_resetdrv() 4150 rval = __gdth_execute(ha->sdev, &cmd, cmnd, 30, NULL); ioc_resetdrv() 4165 gdth_ha_str *ha; ioc_general() local 4170 ha = gdth_find_ha(gen.ionode); ioc_general() 4171 if (!ha) ioc_general() 4182 if (!(buf = gdth_ioctl_alloc(ha, gen.data_len + gen.sense_len, ioc_general() 4187 gdth_ioctl_free(ha, gen.data_len+gen.sense_len, buf, paddr); ioc_general() 4194 if (ha->cache_feat & GDT_64BIT) { ioc_general() 4200 if (ha->cache_feat & SCATTER_GATHER) { ioc_general() 4211 if (ha->cache_feat & SCATTER_GATHER) { ioc_general() 4223 if (ha->raw_feat & GDT_64BIT) { ioc_general() 4236 if (ha->raw_feat & SCATTER_GATHER) { ioc_general() 4248 if (ha->raw_feat & SCATTER_GATHER) { ioc_general() 4261 gdth_ioctl_free(ha, gen.data_len+gen.sense_len, buf, paddr); ioc_general() 4266 rval = __gdth_execute(ha->sdev, &gen.command, cmnd, gen.timeout, &gen.info); ioc_general() 4268 gdth_ioctl_free(ha, gen.data_len+gen.sense_len, buf, paddr); ioc_general() 4275 gdth_ioctl_free(ha, gen.data_len+gen.sense_len, buf, paddr); ioc_general() 4280 gdth_ioctl_free(ha, gen.data_len+gen.sense_len, buf, paddr); ioc_general() 4283 gdth_ioctl_free(ha, gen.data_len+gen.sense_len, buf, paddr); ioc_general() 4291 gdth_ha_str *ha; ioc_hdrlist() local 4302 (NULL == (ha = gdth_find_ha(rsc->ionode)))) { ioc_hdrlist() 4309 if (!ha->hdr[i].present) { ioc_hdrlist() 4313 rsc->hdr_list[i].bus = ha->virt_bus; ioc_hdrlist() 4316 rsc->hdr_list[i].cluster_type = ha->hdr[i].cluster_type; ioc_hdrlist() 4317 if (ha->hdr[i].cluster_type & CLUSTER_DRIVE) { ioc_hdrlist() 4320 if (ha->cache_feat & GDT_64BIT) ioc_hdrlist() 4324 if (__gdth_execute(ha->sdev, cmd, cmnd, 30, &cluster_type) == S_OK) ioc_hdrlist() 4349 gdth_ha_str *ha; ioc_rescan() local 4357 (NULL == (ha = gdth_find_ha(rsc->ionode)))) { ioc_rescan() 4366 if (ha->cache_feat & GDT_64BIT) { ioc_rescan() 4374 status = __gdth_execute(ha->sdev, cmd, cmnd, 30, &info); ioc_rescan() 4385 if (ha->cache_feat & GDT_64BIT) ioc_rescan() 4390 status = __gdth_execute(ha->sdev, cmd, cmnd, 30, &info); ioc_rescan() 4392 spin_lock_irqsave(&ha->smp_lock, flags); ioc_rescan() 4393 rsc->hdr_list[i].bus = ha->virt_bus; ioc_rescan() 4397 ha->hdr[i].present = FALSE; ioc_rescan() 4399 ha->hdr[i].present = TRUE; ioc_rescan() 4400 ha->hdr[i].size = info; ioc_rescan() 4402 ha->hdr[i].size &= ~SECS32; ioc_rescan() 4403 gdth_eval_mapping(ha->hdr[i].size,&cyls,&hds,&secs); ioc_rescan() 4404 ha->hdr[i].heads = hds; ioc_rescan() 4405 ha->hdr[i].secs = secs; ioc_rescan() 4407 ha->hdr[i].size = cyls * hds * secs; ioc_rescan() 4409 spin_unlock_irqrestore(&ha->smp_lock, flags); ioc_rescan() 4414 /* but we need ha->info2, not yet stored in scp->SCp */ ioc_rescan() 4419 if (ha->cache_feat & GDT_64BIT) ioc_rescan() 4424 status = __gdth_execute(ha->sdev, cmd, cmnd, 30, &info); ioc_rescan() 4426 spin_lock_irqsave(&ha->smp_lock, flags); ioc_rescan() 4427 ha->hdr[i].devtype = (status == S_OK ? (u16)info : 0); ioc_rescan() 4428 spin_unlock_irqrestore(&ha->smp_lock, flags); ioc_rescan() 4432 if (ha->cache_feat & GDT_64BIT) ioc_rescan() 4437 status = __gdth_execute(ha->sdev, cmd, cmnd, 30, &info); ioc_rescan() 4439 spin_lock_irqsave(&ha->smp_lock, flags); ioc_rescan() 4440 ha->hdr[i].cluster_type = ioc_rescan() 4442 spin_unlock_irqrestore(&ha->smp_lock, flags); ioc_rescan() 4443 rsc->hdr_list[i].cluster_type = ha->hdr[i].cluster_type; ioc_rescan() 4447 if (ha->cache_feat & GDT_64BIT) ioc_rescan() 4452 status = __gdth_execute(ha->sdev, cmd, cmnd, 30, &info); ioc_rescan() 4454 spin_lock_irqsave(&ha->smp_lock, flags); ioc_rescan() 4455 ha->hdr[i].rw_attribs = (status == S_OK ? (u16)info : 0); ioc_rescan() 4456 spin_unlock_irqrestore(&ha->smp_lock, flags); ioc_rescan() 4472 gdth_ha_str *ha; gdth_ioctl() local 4516 (NULL == (ha = gdth_find_ha(ctrt.ionode)))) gdth_ioctl() 4519 if (ha->type == GDT_ISA || ha->type == GDT_EISA) { gdth_ioctl() 4520 ctrt.type = (u8)((ha->stype>>20) - 0x10); gdth_ioctl() 4522 if (ha->type != GDT_PCIMPR) { gdth_ioctl() 4523 ctrt.type = (u8)((ha->stype<<4) + 6); gdth_ioctl() 4526 (ha->oem_id == OEM_ID_INTEL ? 0xfd : 0xfe); gdth_ioctl() 4527 if (ha->stype >= 0x300) gdth_ioctl() 4528 ctrt.ext_type = 0x6000 | ha->pdev->subsystem_device; gdth_ioctl() 4530 ctrt.ext_type = 0x6000 | ha->stype; gdth_ioctl() 4532 ctrt.device_id = ha->pdev->device; gdth_ioctl() 4533 ctrt.sub_device_id = ha->pdev->subsystem_device; gdth_ioctl() 4535 ctrt.info = ha->brd_phys; gdth_ioctl() 4536 ctrt.oem_id = ha->oem_id; gdth_ioctl() 4557 (NULL == (ha = gdth_find_ha(lchn.ionode)))) gdth_ioctl() 4561 if (i < ha->bus_cnt) { gdth_ioctl() 4563 spin_lock_irqsave(&ha->smp_lock, flags); gdth_ioctl() 4564 ha->raw[i].lock = 1; gdth_ioctl() 4565 spin_unlock_irqrestore(&ha->smp_lock, flags); gdth_ioctl() 4566 for (j = 0; j < ha->tid_cnt; ++j) gdth_ioctl() 4567 gdth_wait_completion(ha, i, j); gdth_ioctl() 4569 spin_lock_irqsave(&ha->smp_lock, flags); gdth_ioctl() 4570 ha->raw[i].lock = 0; gdth_ioctl() 4571 spin_unlock_irqrestore(&ha->smp_lock, flags); gdth_ioctl() 4572 for (j = 0; j < ha->tid_cnt; ++j) gdth_ioctl() 4573 gdth_next(ha); gdth_ioctl() 4591 (NULL == (ha = gdth_find_ha(res.ionode)))) gdth_ioctl() 4597 scp->device = ha->sdev; gdth_ioctl() 4631 static void gdth_flush(gdth_ha_str *ha) gdth_flush() argument 4638 TRACE2(("gdth_flush() hanum %d\n", ha->hanum)); gdth_flush() 4641 if (ha->hdr[i].present) { gdth_flush() 4645 if (ha->cache_feat & GDT_64BIT) { gdth_flush() 4654 TRACE2(("gdth_flush(): flush ha %d drive %d\n", ha->hanum, i)); gdth_flush() 4656 gdth_execute(ha->shost, &gdtcmd, cmnd, 30, NULL); gdth_flush() 4693 gdth_ha_str *ha; gdth_isa_probe_one() local 4703 ha = shost_priv(shp); gdth_isa_probe_one() 4706 if (!gdth_init_isa(isa_bios,ha)) gdth_isa_probe_one() 4711 isa_bios, ha->irq, ha->drq); gdth_isa_probe_one() 4713 error = request_irq(ha->irq, gdth_interrupt, 0, "gdth", ha); gdth_isa_probe_one() 4719 error = request_dma(ha->drq, "gdth"); gdth_isa_probe_one() 4725 set_dma_mode(ha->drq,DMA_MODE_CASCADE); gdth_isa_probe_one() 4726 enable_dma(ha->drq); gdth_isa_probe_one() 4728 shp->irq = ha->irq; gdth_isa_probe_one() 4729 shp->dma_channel = ha->drq; gdth_isa_probe_one() 4731 ha->hanum = gdth_ctr_count++; gdth_isa_probe_one() 4732 ha->shost = shp; gdth_isa_probe_one() 4734 ha->pccb = &ha->cmdext; gdth_isa_probe_one() 4735 ha->ccb_phys = 0L; gdth_isa_probe_one() 4736 ha->pdev = NULL; gdth_isa_probe_one() 4740 ha->pscratch = pci_alloc_consistent(ha->pdev, GDTH_SCRATCH, gdth_isa_probe_one() 4742 if (!ha->pscratch) gdth_isa_probe_one() 4744 ha->scratch_phys = scratch_dma_handle; gdth_isa_probe_one() 4746 ha->pmsg = pci_alloc_consistent(ha->pdev, sizeof(gdth_msg_str), gdth_isa_probe_one() 4748 if (!ha->pmsg) gdth_isa_probe_one() 4750 ha->msg_phys = scratch_dma_handle; gdth_isa_probe_one() 4753 ha->coal_stat = pci_alloc_consistent(ha->pdev, gdth_isa_probe_one() 4756 if (!ha->coal_stat) gdth_isa_probe_one() 4758 ha->coal_stat_phys = scratch_dma_handle; gdth_isa_probe_one() 4761 ha->scratch_busy = FALSE; gdth_isa_probe_one() 4762 ha->req_first = NULL; gdth_isa_probe_one() 4763 ha->tid_cnt = MAX_HDRIVES; gdth_isa_probe_one() 4764 if (max_ids > 0 && max_ids < ha->tid_cnt) gdth_isa_probe_one() 4765 ha->tid_cnt = max_ids; gdth_isa_probe_one() 4767 ha->cmd_tab[i].cmnd = UNUSED_CMND; gdth_isa_probe_one() 4768 ha->scan_mode = rescan ? 0x10 : 0; gdth_isa_probe_one() 4771 if (!gdth_search_drives(ha)) { gdth_isa_probe_one() 4776 if (hdr_channel < 0 || hdr_channel > ha->bus_cnt) gdth_isa_probe_one() 4777 hdr_channel = ha->bus_cnt; gdth_isa_probe_one() 4778 ha->virt_bus = hdr_channel; gdth_isa_probe_one() 4780 if (ha->cache_feat & ha->raw_feat & ha->screen_feat & GDT_64BIT) gdth_isa_probe_one() 4783 shp->max_id = ha->tid_cnt; gdth_isa_probe_one() 4785 shp->max_channel = ha->bus_cnt; gdth_isa_probe_one() 4787 spin_lock_init(&ha->smp_lock); gdth_isa_probe_one() 4788 gdth_enable_int(ha); gdth_isa_probe_one() 4793 list_add_tail(&ha->list, &gdth_instances); gdth_isa_probe_one() 4802 pci_free_consistent(ha->pdev, sizeof(gdth_coal_status) * MAXOFFSETS, gdth_isa_probe_one() 4803 ha->coal_stat, ha->coal_stat_phys); gdth_isa_probe_one() 4806 pci_free_consistent(ha->pdev, sizeof(gdth_msg_str), gdth_isa_probe_one() 4807 ha->pmsg, ha->msg_phys); gdth_isa_probe_one() 4809 pci_free_consistent(ha->pdev, GDTH_SCRATCH, gdth_isa_probe_one() 4810 ha->pscratch, ha->scratch_phys); gdth_isa_probe_one() 4814 free_irq(ha->irq, ha); gdth_isa_probe_one() 4825 gdth_ha_str *ha; gdth_eisa_probe_one() local 4835 ha = shost_priv(shp); gdth_eisa_probe_one() 4838 if (!gdth_init_eisa(eisa_slot,ha)) gdth_eisa_probe_one() 4843 eisa_slot >> 12, ha->irq); gdth_eisa_probe_one() 4845 error = request_irq(ha->irq, gdth_interrupt, 0, "gdth", ha); gdth_eisa_probe_one() 4852 shp->irq = ha->irq; gdth_eisa_probe_one() 4855 ha->hanum = gdth_ctr_count++; gdth_eisa_probe_one() 4856 ha->shost = shp; gdth_eisa_probe_one() 4858 TRACE2(("EISA detect Bus 0: hanum %d\n", ha->hanum)); gdth_eisa_probe_one() 4860 ha->pccb = &ha->cmdext; gdth_eisa_probe_one() 4861 ha->ccb_phys = 0L; gdth_eisa_probe_one() 4865 ha->pdev = NULL; gdth_eisa_probe_one() 4866 ha->pscratch = pci_alloc_consistent(ha->pdev, GDTH_SCRATCH, gdth_eisa_probe_one() 4868 if (!ha->pscratch) gdth_eisa_probe_one() 4870 ha->scratch_phys = scratch_dma_handle; gdth_eisa_probe_one() 4872 ha->pmsg = pci_alloc_consistent(ha->pdev, sizeof(gdth_msg_str), gdth_eisa_probe_one() 4874 if (!ha->pmsg) gdth_eisa_probe_one() 4876 ha->msg_phys = scratch_dma_handle; gdth_eisa_probe_one() 4879 ha->coal_stat = pci_alloc_consistent(ha->pdev, gdth_eisa_probe_one() 4882 if (!ha->coal_stat) gdth_eisa_probe_one() 4884 ha->coal_stat_phys = scratch_dma_handle; gdth_eisa_probe_one() 4887 ha->ccb_phys = pci_map_single(ha->pdev,ha->pccb, gdth_eisa_probe_one() 4889 if (!ha->ccb_phys) gdth_eisa_probe_one() 4892 ha->scratch_busy = FALSE; gdth_eisa_probe_one() 4893 ha->req_first = NULL; gdth_eisa_probe_one() 4894 ha->tid_cnt = MAX_HDRIVES; gdth_eisa_probe_one() 4895 if (max_ids > 0 && max_ids < ha->tid_cnt) gdth_eisa_probe_one() 4896 ha->tid_cnt = max_ids; gdth_eisa_probe_one() 4898 ha->cmd_tab[i].cmnd = UNUSED_CMND; gdth_eisa_probe_one() 4899 ha->scan_mode = rescan ? 0x10 : 0; gdth_eisa_probe_one() 4901 if (!gdth_search_drives(ha)) { gdth_eisa_probe_one() 4907 if (hdr_channel < 0 || hdr_channel > ha->bus_cnt) gdth_eisa_probe_one() 4908 hdr_channel = ha->bus_cnt; gdth_eisa_probe_one() 4909 ha->virt_bus = hdr_channel; gdth_eisa_probe_one() 4911 if (ha->cache_feat & ha->raw_feat & ha->screen_feat & GDT_64BIT) gdth_eisa_probe_one() 4914 shp->max_id = ha->tid_cnt; gdth_eisa_probe_one() 4916 shp->max_channel = ha->bus_cnt; gdth_eisa_probe_one() 4918 spin_lock_init(&ha->smp_lock); gdth_eisa_probe_one() 4919 gdth_enable_int(ha); gdth_eisa_probe_one() 4924 list_add_tail(&ha->list, &gdth_instances); gdth_eisa_probe_one() 4932 pci_unmap_single(ha->pdev,ha->ccb_phys, sizeof(gdth_cmd_str), gdth_eisa_probe_one() 4936 pci_free_consistent(ha->pdev, sizeof(gdth_coal_status) * MAXOFFSETS, gdth_eisa_probe_one() 4937 ha->coal_stat, ha->coal_stat_phys); gdth_eisa_probe_one() 4940 pci_free_consistent(ha->pdev, sizeof(gdth_msg_str), gdth_eisa_probe_one() 4941 ha->pmsg, ha->msg_phys); gdth_eisa_probe_one() 4943 pci_free_consistent(ha->pdev, GDTH_SCRATCH, gdth_eisa_probe_one() 4944 ha->pscratch, ha->scratch_phys); gdth_eisa_probe_one() 4946 free_irq(ha->irq, ha); gdth_eisa_probe_one() 4958 gdth_ha_str *ha; gdth_pci_probe_one() local 4968 ha = shost_priv(shp); gdth_pci_probe_one() 4971 if (!gdth_init_pci(pdev, pcistr, ha)) gdth_pci_probe_one() 4978 ha->irq); gdth_pci_probe_one() 4980 error = request_irq(ha->irq, gdth_interrupt, gdth_pci_probe_one() 4981 IRQF_SHARED, "gdth", ha); gdth_pci_probe_one() 4988 shp->irq = ha->irq; gdth_pci_probe_one() 4991 ha->hanum = gdth_ctr_count++; gdth_pci_probe_one() 4992 ha->shost = shp; gdth_pci_probe_one() 4994 ha->pccb = &ha->cmdext; gdth_pci_probe_one() 4995 ha->ccb_phys = 0L; gdth_pci_probe_one() 4999 ha->pscratch = pci_alloc_consistent(ha->pdev, GDTH_SCRATCH, gdth_pci_probe_one() 5001 if (!ha->pscratch) gdth_pci_probe_one() 5003 ha->scratch_phys = scratch_dma_handle; gdth_pci_probe_one() 5005 ha->pmsg = pci_alloc_consistent(ha->pdev, sizeof(gdth_msg_str), gdth_pci_probe_one() 5007 if (!ha->pmsg) gdth_pci_probe_one() 5009 ha->msg_phys = scratch_dma_handle; gdth_pci_probe_one() 5012 ha->coal_stat = pci_alloc_consistent(ha->pdev, gdth_pci_probe_one() 5015 if (!ha->coal_stat) gdth_pci_probe_one() 5017 ha->coal_stat_phys = scratch_dma_handle; gdth_pci_probe_one() 5020 ha->scratch_busy = FALSE; gdth_pci_probe_one() 5021 ha->req_first = NULL; gdth_pci_probe_one() 5022 ha->tid_cnt = pdev->device >= 0x200 ? MAXID : MAX_HDRIVES; gdth_pci_probe_one() 5023 if (max_ids > 0 && max_ids < ha->tid_cnt) gdth_pci_probe_one() 5024 ha->tid_cnt = max_ids; gdth_pci_probe_one() 5026 ha->cmd_tab[i].cmnd = UNUSED_CMND; gdth_pci_probe_one() 5027 ha->scan_mode = rescan ? 0x10 : 0; gdth_pci_probe_one() 5030 if (!gdth_search_drives(ha)) { gdth_pci_probe_one() 5031 printk("GDT-PCI %d: Error during device scan\n", ha->hanum); gdth_pci_probe_one() 5035 if (hdr_channel < 0 || hdr_channel > ha->bus_cnt) gdth_pci_probe_one() 5036 hdr_channel = ha->bus_cnt; gdth_pci_probe_one() 5037 ha->virt_bus = hdr_channel; gdth_pci_probe_one() 5040 if (!(ha->cache_feat & ha->raw_feat & ha->screen_feat & GDT_64BIT) || gdth_pci_probe_one() 5041 !ha->dma64_support) { gdth_pci_probe_one() 5044 "Unable to set 32-bit DMA\n", ha->hanum); gdth_pci_probe_one() 5050 printk("GDT-PCI %d: 64-bit DMA enabled\n", ha->hanum); gdth_pci_probe_one() 5053 "Unable to set 64/32-bit DMA\n", ha->hanum); gdth_pci_probe_one() 5058 shp->max_id = ha->tid_cnt; gdth_pci_probe_one() 5060 shp->max_channel = ha->bus_cnt; gdth_pci_probe_one() 5062 spin_lock_init(&ha->smp_lock); gdth_pci_probe_one() 5063 gdth_enable_int(ha); gdth_pci_probe_one() 5068 list_add_tail(&ha->list, &gdth_instances); gdth_pci_probe_one() 5070 pci_set_drvdata(ha->pdev, ha); gdth_pci_probe_one() 5075 *ha_out = ha; gdth_pci_probe_one() 5081 pci_free_consistent(ha->pdev, sizeof(gdth_coal_status) * MAXOFFSETS, gdth_pci_probe_one() 5082 ha->coal_stat, ha->coal_stat_phys); gdth_pci_probe_one() 5085 pci_free_consistent(ha->pdev, sizeof(gdth_msg_str), gdth_pci_probe_one() 5086 ha->pmsg, ha->msg_phys); gdth_pci_probe_one() 5088 pci_free_consistent(ha->pdev, GDTH_SCRATCH, gdth_pci_probe_one() 5089 ha->pscratch, ha->scratch_phys); gdth_pci_probe_one() 5091 free_irq(ha->irq, ha); gdth_pci_probe_one() 5099 static void gdth_remove_one(gdth_ha_str *ha) gdth_remove_one() argument 5101 struct Scsi_Host *shp = ha->shost; gdth_remove_one() 5107 gdth_flush(ha); gdth_remove_one() 5109 if (ha->sdev) { gdth_remove_one() 5110 scsi_free_host_dev(ha->sdev); gdth_remove_one() 5111 ha->sdev = NULL; gdth_remove_one() 5115 free_irq(shp->irq,ha); gdth_remove_one() 5122 if (ha->coal_stat) gdth_remove_one() 5123 pci_free_consistent(ha->pdev, sizeof(gdth_coal_status) * gdth_remove_one() 5124 MAXOFFSETS, ha->coal_stat, ha->coal_stat_phys); gdth_remove_one() 5126 if (ha->pscratch) gdth_remove_one() 5127 pci_free_consistent(ha->pdev, GDTH_SCRATCH, gdth_remove_one() 5128 ha->pscratch, ha->scratch_phys); gdth_remove_one() 5129 if (ha->pmsg) gdth_remove_one() 5130 pci_free_consistent(ha->pdev, sizeof(gdth_msg_str), gdth_remove_one() 5131 ha->pmsg, ha->msg_phys); gdth_remove_one() 5132 if (ha->ccb_phys) gdth_remove_one() 5133 pci_unmap_single(ha->pdev,ha->ccb_phys, gdth_remove_one() 5141 gdth_ha_str *ha; gdth_halt() local 5147 list_for_each_entry(ha, &gdth_instances, list) gdth_halt() 5148 gdth_flush(ha); gdth_halt() 5195 gdth_ha_str *ha; gdth_init() local 5197 list_for_each_entry(ha, &gdth_instances, list) gdth_init() 5198 gdth_remove_one(ha); gdth_init() 5213 gdth_ha_str *ha; gdth_exit() local 5226 list_for_each_entry(ha, &gdth_instances, list) gdth_exit() 5227 gdth_remove_one(ha); gdth_exit() 856 gdth_init_pci(struct pci_dev *pdev, gdth_pci_str *pcistr, gdth_ha_str *ha) gdth_init_pci() argument
H A D	ips.c	281 static void ips_free_flash_copperhead(ips_ha_t * ha); 332 static int ips_abort_init(ips_ha_t * ha, int index); 338 static int ips_poll_for_flush_complete(ips_ha_t * ha); 339 static void ips_flush_and_reset(ips_ha_t *ha); 587 ips_setup_funclist(ips_ha_t * ha) ips_setup_funclist() argument 593 if (IPS_IS_MORPHEUS(ha) || IPS_IS_MARCO(ha)) { ips_setup_funclist() 595 ha->func.isintr = ips_isintr_morpheus; ips_setup_funclist() 596 ha->func.isinit = ips_isinit_morpheus; ips_setup_funclist() 597 ha->func.issue = ips_issue_i2o_memio; ips_setup_funclist() 598 ha->func.init = ips_init_morpheus; ips_setup_funclist() 599 ha->func.statupd = ips_statupd_morpheus; ips_setup_funclist() 600 ha->func.reset = ips_reset_morpheus; ips_setup_funclist() 601 ha->func.intr = ips_intr_morpheus; ips_setup_funclist() 602 ha->func.enableint = ips_enable_int_morpheus; ips_setup_funclist() 603 } else if (IPS_USE_MEMIO(ha)) { ips_setup_funclist() 605 ha->func.isintr = ips_isintr_copperhead_memio; ips_setup_funclist() 606 ha->func.isinit = ips_isinit_copperhead_memio; ips_setup_funclist() 607 ha->func.init = ips_init_copperhead_memio; ips_setup_funclist() 608 ha->func.statupd = ips_statupd_copperhead_memio; ips_setup_funclist() 609 ha->func.statinit = ips_statinit_memio; ips_setup_funclist() 610 ha->func.reset = ips_reset_copperhead_memio; ips_setup_funclist() 611 ha->func.intr = ips_intr_copperhead; ips_setup_funclist() 612 ha->func.erasebios = ips_erase_bios_memio; ips_setup_funclist() 613 ha->func.programbios = ips_program_bios_memio; ips_setup_funclist() 614 ha->func.verifybios = ips_verify_bios_memio; ips_setup_funclist() 615 ha->func.enableint = ips_enable_int_copperhead_memio; ips_setup_funclist() 616 if (IPS_USE_I2O_DELIVER(ha)) ips_setup_funclist() 617 ha->func.issue = ips_issue_i2o_memio; ips_setup_funclist() 619 ha->func.issue = ips_issue_copperhead_memio; ips_setup_funclist() 622 ha->func.isintr = ips_isintr_copperhead; ips_setup_funclist() 623 ha->func.isinit = ips_isinit_copperhead; ips_setup_funclist() 624 ha->func.init = ips_init_copperhead; ips_setup_funclist() 625 ha->func.statupd = ips_statupd_copperhead; ips_setup_funclist() 626 ha->func.statinit = ips_statinit; ips_setup_funclist() 627 ha->func.reset = ips_reset_copperhead; ips_setup_funclist() 628 ha->func.intr = ips_intr_copperhead; ips_setup_funclist() 629 ha->func.erasebios = ips_erase_bios; ips_setup_funclist() 630 ha->func.programbios = ips_program_bios; ips_setup_funclist() 631 ha->func.verifybios = ips_verify_bios; ips_setup_funclist() 632 ha->func.enableint = ips_enable_int_copperhead; ips_setup_funclist() 634 if (IPS_USE_I2O_DELIVER(ha)) ips_setup_funclist() 635 ha->func.issue = ips_issue_i2o; ips_setup_funclist() 637 ha->func.issue = ips_issue_copperhead; ips_setup_funclist() 654 ips_ha_t *ha; ips_release() local 670 ha = IPS_HA(sh); ips_release() 672 if (!ha) ips_release() 676 scb = &ha->scbs[ha->max_cmds - 1]; ips_release() 678 ips_init_scb(ha, scb); ips_release() 684 scb->cmd.flush_cache.command_id = IPS_COMMAND_ID(ha, scb); ips_release() 691 IPS_PRINTK(KERN_WARNING, ha->pcidev, "Flushing Cache.\n"); ips_release() 694 if (ips_send_wait(ha, scb, ips_cmd_timeout, IPS_INTR_ON) == IPS_FAILURE) ips_release() 695 IPS_PRINTK(KERN_WARNING, ha->pcidev, "Incomplete Flush.\n"); ips_release() 697 IPS_PRINTK(KERN_WARNING, ha->pcidev, "Flushing Complete.\n"); ips_release() 703 ips_free(ha); ips_release() 706 free_irq(ha->pcidev->irq, ha); ips_release() 728 ips_ha_t *ha; ips_halt() local 736 ha = (ips_ha_t *) ips_ha[i]; ips_halt() 738 if (!ha) ips_halt() 741 if (!ha->active) ips_halt() 745 scb = &ha->scbs[ha->max_cmds - 1]; ips_halt() 747 ips_init_scb(ha, scb); ips_halt() 753 scb->cmd.flush_cache.command_id = IPS_COMMAND_ID(ha, scb); ips_halt() 760 IPS_PRINTK(KERN_WARNING, ha->pcidev, "Flushing Cache.\n"); ips_halt() 763 if (ips_send_wait(ha, scb, ips_cmd_timeout, IPS_INTR_ON) == ips_halt() 765 IPS_PRINTK(KERN_WARNING, ha->pcidev, ips_halt() 768 IPS_PRINTK(KERN_WARNING, ha->pcidev, ips_halt() 786 ips_ha_t *ha; ips_eh_abort() local 797 ha = (ips_ha_t *) SC->device->host->hostdata; ips_eh_abort() 799 if (!ha) ips_eh_abort() 802 if (!ha->active) ips_eh_abort() 808 item = ha->copp_waitlist.head; ips_eh_abort() 814 ips_removeq_copp(&ha->copp_waitlist, item); ips_eh_abort() 818 } else if (ips_removeq_wait(&ha->scb_waitlist, SC)) { ips_eh_abort() 845 ips_ha_t *ha; __ips_eh_reset() local 861 ha = (ips_ha_t *) SC->device->host->hostdata; __ips_eh_reset() 863 if (!ha) { __ips_eh_reset() 864 DEBUG(1, "Reset called with NULL ha struct"); __ips_eh_reset() 869 if (!ha->active) __ips_eh_reset() 873 item = ha->copp_waitlist.head; __ips_eh_reset() 879 ips_removeq_copp(&ha->copp_waitlist, item); __ips_eh_reset() 884 if (ips_removeq_wait(&ha->scb_waitlist, SC)) { __ips_eh_reset() 899 if (ha->ioctl_reset == 0) { /* IF Not an IOCTL Requested Reset */ __ips_eh_reset() 900 scb = &ha->scbs[ha->max_cmds - 1]; __ips_eh_reset() 902 ips_init_scb(ha, scb); __ips_eh_reset() 908 scb->cmd.flush_cache.command_id = IPS_COMMAND_ID(ha, scb); __ips_eh_reset() 916 ret = ips_send_wait(ha, scb, ips_cmd_timeout, IPS_INTR_IORL); __ips_eh_reset() 918 IPS_PRINTK(KERN_NOTICE, ha->pcidev, __ips_eh_reset() 927 ha->ioctl_reset = 0; /* Reset the IOCTL Requested Reset Flag */ __ips_eh_reset() 933 IPS_PRINTK(KERN_NOTICE, ha->pcidev, "Resetting controller.\n"); __ips_eh_reset() 934 ret = (*ha->func.reset) (ha); __ips_eh_reset() 939 IPS_PRINTK(KERN_NOTICE, ha->pcidev, __ips_eh_reset() 944 ips_name, ha->host_num); __ips_eh_reset() 946 while ((scb = ips_removeq_scb_head(&ha->scb_activelist))) { __ips_eh_reset() 949 ips_freescb(ha, scb); __ips_eh_reset() 954 ips_name, ha->host_num); __ips_eh_reset() 956 while ((scsi_cmd = ips_removeq_wait_head(&ha->scb_waitlist))) { __ips_eh_reset() 961 ha->active = FALSE; __ips_eh_reset() 965 if (!ips_clear_adapter(ha, IPS_INTR_IORL)) { __ips_eh_reset() 968 IPS_PRINTK(KERN_NOTICE, ha->pcidev, __ips_eh_reset() 973 ips_name, ha->host_num); __ips_eh_reset() 975 while ((scb = ips_removeq_scb_head(&ha->scb_activelist))) { __ips_eh_reset() 978 ips_freescb(ha, scb); __ips_eh_reset() 983 ips_name, ha->host_num); __ips_eh_reset() 985 while ((scsi_cmd = ips_removeq_wait_head(&ha->scb_waitlist))) { __ips_eh_reset() 990 ha->active = FALSE; __ips_eh_reset() 995 if (le32_to_cpu(ha->subsys->param[3]) & 0x300000) { __ips_eh_reset() 999 ha->last_ffdc = tv.tv_sec; __ips_eh_reset() 1000 ha->reset_count++; __ips_eh_reset() 1001 ips_ffdc_reset(ha, IPS_INTR_IORL); __ips_eh_reset() 1005 DEBUG_VAR(1, "(%s%d) Failing active commands", ips_name, ha->host_num); __ips_eh_reset() 1007 while ((scb = ips_removeq_scb_head(&ha->scb_activelist))) { __ips_eh_reset() 1010 ips_freescb(ha, scb); __ips_eh_reset() 1014 for (i = 1; i < ha->nbus; i++) __ips_eh_reset() 1015 ha->dcdb_active[i - 1] = 0; __ips_eh_reset() 1018 ha->num_ioctl = 0; __ips_eh_reset() 1020 ips_next(ha, IPS_INTR_IORL); __ips_eh_reset() 1052 ips_ha_t *ha; ips_queue_lck() local 1057 ha = (ips_ha_t *) SC->device->host->hostdata; ips_queue_lck() 1059 if (!ha) ips_queue_lck() 1062 if (!ha->active) ips_queue_lck() 1066 if (ha->copp_waitlist.count == IPS_MAX_IOCTL_QUEUE) { ips_queue_lck() 1072 } else if (ha->scb_waitlist.count == IPS_MAX_QUEUE) { ips_queue_lck() 1083 ha->host_num, ips_queue_lck() 1089 && (scmd_id(SC) == ha->ha_id[scmd_channel(SC)])) { ips_queue_lck() 1106 if (ha->scb_activelist.count != 0) { ips_queue_lck() 1111 ha->ioctl_reset = 1; /* This reset request is from an IOCTL */ ips_queue_lck() 1131 ips_putq_copp_tail(&ha->copp_waitlist, scratch); ips_queue_lck() 1133 ips_putq_wait_tail(&ha->scb_waitlist, SC); ips_queue_lck() 1136 ips_next(ha, IPS_INTR_IORL); ips_queue_lck() 1155 ips_ha_t *ha = (ips_ha_t *) sdev->host->hostdata; ips_biosparam() local 1162 if (!ha) ips_biosparam() 1166 if (!ha->active) ips_biosparam() 1169 if (!ips_read_adapter_status(ha, IPS_INTR_ON)) ips_biosparam() 1173 if ((capacity > 0x400000) && ((ha->enq->ucMiscFlag & 0x8) == 0)) { ips_biosparam() 1205 ips_ha_t *ha; ips_slave_configure() local 1208 ha = IPS_HA(SDptr->host); ips_slave_configure() 1210 min = ha->max_cmds / 2; ips_slave_configure() 1211 if (ha->enq->ucLogDriveCount <= 2) ips_slave_configure() 1212 min = ha->max_cmds - 1; ips_slave_configure() 1233 ips_ha_t *ha; do_ipsintr() local 1239 ha = (ips_ha_t *) dev_id; do_ipsintr() 1240 if (!ha) do_ipsintr() 1242 host = ips_sh[ha->host_num]; do_ipsintr() 1245 (*ha->func.intr) (ha); do_ipsintr() 1251 if (!ha->active) { do_ipsintr() 1256 irqstatus = (*ha->func.intr) (ha); do_ipsintr() 1261 ips_next(ha, IPS_INTR_ON); do_ipsintr() 1277 ips_intr_copperhead(ips_ha_t * ha) ips_intr_copperhead() argument 1286 if (!ha) ips_intr_copperhead() 1289 if (!ha->active) ips_intr_copperhead() 1292 intrstatus = (*ha->func.isintr) (ha); ips_intr_copperhead() 1303 sp = &ha->sp; ips_intr_copperhead() 1305 intrstatus = (*ha->func.isintr) (ha); ips_intr_copperhead() 1310 cstatus.value = (*ha->func.statupd) (ha); ips_intr_copperhead() 1317 ips_chkstatus(ha, &cstatus); ips_intr_copperhead() 1324 (*scb->callback) (ha, scb); ips_intr_copperhead() 1341 ips_intr_morpheus(ips_ha_t * ha) ips_intr_morpheus() argument 1350 if (!ha) ips_intr_morpheus() 1353 if (!ha->active) ips_intr_morpheus() 1356 intrstatus = (*ha->func.isintr) (ha); ips_intr_morpheus() 1367 sp = &ha->sp; ips_intr_morpheus() 1369 intrstatus = (*ha->func.isintr) (ha); ips_intr_morpheus() 1374 cstatus.value = (*ha->func.statupd) (ha); ips_intr_morpheus() 1381 IPS_PRINTK(KERN_WARNING, ha->pcidev, ips_intr_morpheus() 1387 ips_chkstatus(ha, &cstatus); ips_intr_morpheus() 1394 (*scb->callback) (ha, scb); ips_intr_morpheus() 1413 ips_ha_t *ha; ips_info() local 1417 ha = IPS_HA(SH); ips_info() 1419 if (!ha) ips_info() 1428 if (ha->ad_type > 0 && ha->ad_type <= MAX_ADAPTER_NAME) { ips_info() 1430 strcat(bp, ips_adapter_name[ha->ad_type - 1]); ips_info() 1441 ips_ha_t *ha = NULL; ips_write_info() local 1447 ha = (ips_ha_t *) ips_sh[i]->hostdata; ips_write_info() 1453 if (!ha) ips_write_info() 1463 ips_ha_t *ha = NULL; ips_show_info() local 1469 ha = (ips_ha_t *) ips_sh[i]->hostdata; ips_show_info() 1475 if (!ha) ips_show_info() 1478 return ips_host_info(ha, m); ips_show_info() 1535 ips_alloc_passthru_buffer(ips_ha_t * ha, int length) ips_alloc_passthru_buffer() argument 1540 if (ha->ioctl_data && length <= ha->ioctl_len) ips_alloc_passthru_buffer() 1543 bigger_buf = pci_alloc_consistent(ha->pcidev, length, &dma_busaddr); ips_alloc_passthru_buffer() 1546 pci_free_consistent(ha->pcidev, ha->ioctl_len, ha->ioctl_data, ips_alloc_passthru_buffer() 1547 ha->ioctl_busaddr); ips_alloc_passthru_buffer() 1549 ha->ioctl_data = (char *) bigger_buf; ips_alloc_passthru_buffer() 1550 ha->ioctl_len = length; ips_alloc_passthru_buffer() 1551 ha->ioctl_busaddr = dma_busaddr; ips_alloc_passthru_buffer() 1568 ips_make_passthru(ips_ha_t *ha, struct scsi_cmnd *SC, ips_scb_t *scb, int intr) ips_make_passthru() argument 1583 ips_name, ha->host_num); ips_make_passthru() 1586 if (ips_alloc_passthru_buffer(ha, length)) { ips_make_passthru() 1587 /* allocation failure! If ha->ioctl_data exists, use it to return ips_make_passthru() 1589 if (ha->ioctl_data) { ips_make_passthru() 1590 pt = (ips_passthru_t *) ha->ioctl_data; ips_make_passthru() 1598 ha->ioctl_datasize = length; ips_make_passthru() 1600 ips_scmd_buf_read(SC, ha->ioctl_data, ha->ioctl_datasize); ips_make_passthru() 1601 pt = (ips_passthru_t *) ha->ioctl_data; ips_make_passthru() 1615 memcpy(ha->ioctl_data + sizeof (ips_passthru_t), ips_make_passthru() 1617 ips_scmd_buf_write(SC, ha->ioctl_data, ips_make_passthru() 1630 ips_name, ha->host_num); ips_make_passthru() 1635 if (ha->pcidev->device == IPS_DEVICEID_COPPERHEAD && ips_make_passthru() 1638 ret = ips_flash_copperhead(ha, pt, scb); ips_make_passthru() 1639 ips_scmd_buf_write(SC, ha->ioctl_data, ips_make_passthru() 1643 if (ips_usrcmd(ha, pt, scb)) ips_make_passthru() 1662 ips_flash_copperhead(ips_ha_t * ha, ips_passthru_t * pt, ips_scb_t * scb) ips_flash_copperhead() argument 1668 if (IPS_IS_TROMBONE(ha) && pt->CoppCP.cmd.flashfw.type == IPS_FW_IMAGE) { ips_flash_copperhead() 1669 if (ips_usrcmd(ha, pt, scb)) ips_flash_copperhead() 1682 return ips_flash_bios(ha, pt, scb); ips_flash_copperhead() 1685 ha->flash_data = ips_FlashData; ips_flash_copperhead() 1686 ha->flash_busaddr = ips_flashbusaddr; ips_flash_copperhead() 1687 ha->flash_len = PAGE_SIZE << 7; ips_flash_copperhead() 1688 ha->flash_datasize = 0; ips_flash_copperhead() 1689 } else if (!ha->flash_data) { ips_flash_copperhead() 1692 ha->flash_data = pci_alloc_consistent(ha->pcidev, ips_flash_copperhead() 1694 &ha->flash_busaddr); ips_flash_copperhead() 1695 if (!ha->flash_data){ ips_flash_copperhead() 1699 ha->flash_datasize = 0; ips_flash_copperhead() 1700 ha->flash_len = datasize; ips_flash_copperhead() 1704 if (pt->CoppCP.cmd.flashfw.count + ha->flash_datasize > ips_flash_copperhead() 1705 ha->flash_len) { ips_flash_copperhead() 1706 ips_free_flash_copperhead(ha); ips_flash_copperhead() 1707 IPS_PRINTK(KERN_WARNING, ha->pcidev, ips_flash_copperhead() 1712 if (!ha->flash_data) ips_flash_copperhead() 1715 memcpy(&ha->flash_data[ha->flash_datasize], pt + 1, ips_flash_copperhead() 1717 ha->flash_datasize += pt->CoppCP.cmd.flashfw.count; ips_flash_copperhead() 1721 return ips_flash_bios(ha, pt, scb); ips_flash_copperhead() 1723 return ips_flash_firmware(ha, pt, scb); ips_flash_copperhead() 1734 ips_flash_bios(ips_ha_t * ha, ips_passthru_t * pt, ips_scb_t * scb) ips_flash_bios() argument 1739 if ((!ha->func.programbios) || (!ha->func.erasebios) || ips_flash_bios() 1740 (!ha->func.verifybios)) ips_flash_bios() 1742 if ((*ha->func.erasebios) (ha)) { ips_flash_bios() 1745 ips_name, ha->host_num); ips_flash_bios() 1748 if ((*ha->func.programbios) (ha, ips_flash_bios() 1749 ha->flash_data + ips_flash_bios() 1751 ha->flash_datasize - ips_flash_bios() 1755 ips_name, ha->host_num); ips_flash_bios() 1758 if ((*ha->func.verifybios) (ha, ips_flash_bios() 1759 ha->flash_data + ips_flash_bios() 1761 ha->flash_datasize - ips_flash_bios() 1765 ips_name, ha->host_num); ips_flash_bios() 1768 ips_free_flash_copperhead(ha); ips_flash_bios() 1772 if (!ha->func.erasebios) ips_flash_bios() 1774 if ((*ha->func.erasebios) (ha)) { ips_flash_bios() 1777 ips_name, ha->host_num); ips_flash_bios() 1785 ips_free_flash_copperhead(ha); ips_flash_bios() 1798 ips_fill_scb_sg_single(ips_ha_t * ha, dma_addr_t busaddr, ips_fill_scb_sg_single() argument 1804 if ((scb->data_len + e_len) > ha->max_xfer) { ips_fill_scb_sg_single() 1805 e_len = ha->max_xfer - scb->data_len; ips_fill_scb_sg_single() 1813 if (IPS_USE_ENH_SGLIST(ha)) { ips_fill_scb_sg_single() 1836 ips_flash_firmware(ips_ha_t * ha, ips_passthru_t * pt, ips_scb_t * scb) ips_flash_firmware() argument 1845 pt->CoppCP.cmd.flashfw.count = cpu_to_le32(ha->flash_datasize); ips_flash_firmware() 1849 ips_free_flash_copperhead(ha); ips_flash_firmware() 1870 scb->data_len = ha->flash_datasize; ips_flash_firmware() 1872 pci_map_single(ha->pcidev, ha->flash_data, scb->data_len, ips_flash_firmware() 1875 scb->cmd.flashfw.command_id = IPS_COMMAND_ID(ha, scb); ips_flash_firmware() 1889 ips_free_flash_copperhead(ips_ha_t * ha) ips_free_flash_copperhead() argument 1891 if (ha->flash_data == ips_FlashData) ips_free_flash_copperhead() 1893 else if (ha->flash_data) ips_free_flash_copperhead() 1894 pci_free_consistent(ha->pcidev, ha->flash_len, ha->flash_data, ips_free_flash_copperhead() 1895 ha->flash_busaddr); ips_free_flash_copperhead() 1896 ha->flash_data = NULL; ips_free_flash_copperhead() 1909 ips_usrcmd(ips_ha_t * ha, ips_passthru_t * pt, ips_scb_t * scb) ips_usrcmd() argument 1916 if ((!scb) || (!pt) || (!ha)) ips_usrcmd() 1938 scb->cmd.basic_io.command_id = IPS_COMMAND_ID(ha, scb); ips_usrcmd() 1948 scb->data_busaddr = ha->ioctl_busaddr + sizeof (ips_passthru_t); ips_usrcmd() 1997 ips_cleanup_passthru(ips_ha_t * ha, ips_scb_t * scb) ips_cleanup_passthru() argument 2005 ips_name, ha->host_num); ips_cleanup_passthru() 2009 pt = (ips_passthru_t *) ha->ioctl_data; ips_cleanup_passthru() 2017 pt->AdapterType = ha->ad_type; ips_cleanup_passthru() 2019 if (ha->pcidev->device == IPS_DEVICEID_COPPERHEAD && ips_cleanup_passthru() 2022 ips_free_flash_copperhead(ha); ips_cleanup_passthru() 2024 ips_scmd_buf_write(scb->scsi_cmd, ha->ioctl_data, ha->ioctl_datasize); ips_cleanup_passthru() 2037 ips_host_info(ips_ha_t *ha, struct seq_file *m) ips_host_info() argument 2043 if ((le32_to_cpu(ha->nvram->signature) == IPS_NVRAM_P5_SIG) && ips_host_info() 2044 (le16_to_cpu(ha->nvram->adapter_type) != 0)) ips_host_info() 2046 ips_adapter_name[ha->ad_type - 1]); ips_host_info() 2050 if (ha->io_addr) ips_host_info() 2053 ha->io_addr, ha->io_len); ips_host_info() 2055 if (ha->mem_addr) { ips_host_info() 2058 ha->mem_addr, ha->mem_len); ips_host_info() 2061 (unsigned long)ha->mem_ptr); ips_host_info() 2064 seq_printf(m, "\tIRQ number : %d\n", ha->pcidev->irq); ips_host_info() 2069 if (le32_to_cpu(ha->nvram->signature) == IPS_NVRAM_P5_SIG) { ips_host_info() 2070 if (ha->nvram->bios_low[3] == 0) { ips_host_info() 2073 ha->nvram->bios_high[0], ha->nvram->bios_high[1], ips_host_info() 2074 ha->nvram->bios_high[2], ha->nvram->bios_high[3], ips_host_info() 2075 ha->nvram->bios_low[0], ha->nvram->bios_low[1], ips_host_info() 2076 ha->nvram->bios_low[2]); ips_host_info() 2081 ha->nvram->bios_high[0], ha->nvram->bios_high[1], ips_host_info() 2082 ha->nvram->bios_high[2], ha->nvram->bios_high[3], ips_host_info() 2083 ha->nvram->bios_low[0], ha->nvram->bios_low[1], ips_host_info() 2084 ha->nvram->bios_low[2], ha->nvram->bios_low[3]); ips_host_info() 2089 if (ha->enq->CodeBlkVersion[7] == 0) { ips_host_info() 2092 ha->enq->CodeBlkVersion[0], ha->enq->CodeBlkVersion[1], ips_host_info() 2093 ha->enq->CodeBlkVersion[2], ha->enq->CodeBlkVersion[3], ips_host_info() 2094 ha->enq->CodeBlkVersion[4], ha->enq->CodeBlkVersion[5], ips_host_info() 2095 ha->enq->CodeBlkVersion[6]); ips_host_info() 2099 ha->enq->CodeBlkVersion[0], ha->enq->CodeBlkVersion[1], ips_host_info() 2100 ha->enq->CodeBlkVersion[2], ha->enq->CodeBlkVersion[3], ips_host_info() 2101 ha->enq->CodeBlkVersion[4], ha->enq->CodeBlkVersion[5], ips_host_info() 2102 ha->enq->CodeBlkVersion[6], ha->enq->CodeBlkVersion[7]); ips_host_info() 2105 if (ha->enq->BootBlkVersion[7] == 0) { ips_host_info() 2108 ha->enq->BootBlkVersion[0], ha->enq->BootBlkVersion[1], ips_host_info() 2109 ha->enq->BootBlkVersion[2], ha->enq->BootBlkVersion[3], ips_host_info() 2110 ha->enq->BootBlkVersion[4], ha->enq->BootBlkVersion[5], ips_host_info() 2111 ha->enq->BootBlkVersion[6]); ips_host_info() 2115 ha->enq->BootBlkVersion[0], ha->enq->BootBlkVersion[1], ips_host_info() 2116 ha->enq->BootBlkVersion[2], ha->enq->BootBlkVersion[3], ips_host_info() 2117 ha->enq->BootBlkVersion[4], ha->enq->BootBlkVersion[5], ips_host_info() 2118 ha->enq->BootBlkVersion[6], ha->enq->BootBlkVersion[7]); ips_host_info() 2128 ha->enq->ucMaxPhysicalDevices); ips_host_info() 2130 ha->max_cmds); ips_host_info() 2132 ha->scb_waitlist.count); ips_host_info() 2134 ha->scb_activelist.count - ha->num_ioctl); ips_host_info() 2136 ha->copp_waitlist.count); ips_host_info() 2138 ha->num_ioctl); ips_host_info() 2155 ips_identify_controller(ips_ha_t * ha) ips_identify_controller() argument 2159 switch (ha->pcidev->device) { ips_identify_controller() 2161 if (ha->pcidev->revision <= IPS_REVID_SERVERAID) { ips_identify_controller() 2162 ha->ad_type = IPS_ADTYPE_SERVERAID; ips_identify_controller() 2163 } else if (ha->pcidev->revision == IPS_REVID_SERVERAID2) { ips_identify_controller() 2164 ha->ad_type = IPS_ADTYPE_SERVERAID2; ips_identify_controller() 2165 } else if (ha->pcidev->revision == IPS_REVID_NAVAJO) { ips_identify_controller() 2166 ha->ad_type = IPS_ADTYPE_NAVAJO; ips_identify_controller() 2167 } else if ((ha->pcidev->revision == IPS_REVID_SERVERAID2) ips_identify_controller() 2168 && (ha->slot_num == 0)) { ips_identify_controller() 2169 ha->ad_type = IPS_ADTYPE_KIOWA; ips_identify_controller() 2170 } else if ((ha->pcidev->revision >= IPS_REVID_CLARINETP1) && ips_identify_controller() 2171 (ha->pcidev->revision <= IPS_REVID_CLARINETP3)) { ips_identify_controller() 2172 if (ha->enq->ucMaxPhysicalDevices == 15) ips_identify_controller() 2173 ha->ad_type = IPS_ADTYPE_SERVERAID3L; ips_identify_controller() 2175 ha->ad_type = IPS_ADTYPE_SERVERAID3; ips_identify_controller() 2176 } else if ((ha->pcidev->revision >= IPS_REVID_TROMBONE32) && ips_identify_controller() 2177 (ha->pcidev->revision <= IPS_REVID_TROMBONE64)) { ips_identify_controller() 2178 ha->ad_type = IPS_ADTYPE_SERVERAID4H; ips_identify_controller() 2183 switch (ha->pcidev->subsystem_device) { ips_identify_controller() 2185 ha->ad_type = IPS_ADTYPE_SERVERAID4L; ips_identify_controller() 2189 ha->ad_type = IPS_ADTYPE_SERVERAID4M; ips_identify_controller() 2193 ha->ad_type = IPS_ADTYPE_SERVERAID4MX; ips_identify_controller() 2197 ha->ad_type = IPS_ADTYPE_SERVERAID4LX; ips_identify_controller() 2201 ha->ad_type = IPS_ADTYPE_SERVERAID5I2; ips_identify_controller() 2205 ha->ad_type = IPS_ADTYPE_SERVERAID5I1; ips_identify_controller() 2212 switch (ha->pcidev->subsystem_device) { ips_identify_controller() 2214 ha->ad_type = IPS_ADTYPE_SERVERAID6M; ips_identify_controller() 2217 ha->ad_type = IPS_ADTYPE_SERVERAID6I; ips_identify_controller() 2220 ha->ad_type = IPS_ADTYPE_SERVERAID7k; ips_identify_controller() 2223 ha->ad_type = IPS_ADTYPE_SERVERAID7M; ips_identify_controller() 2240 ips_get_bios_version(ips_ha_t * ha, int intr) ips_get_bios_version() argument 2257 strncpy(ha->bios_version, " ?", 8); ips_get_bios_version() 2259 if (ha->pcidev->device == IPS_DEVICEID_COPPERHEAD) { ips_get_bios_version() 2260 if (IPS_USE_MEMIO(ha)) { ips_get_bios_version() 2264 writel(0, ha->mem_ptr + IPS_REG_FLAP); ips_get_bios_version() 2265 if (ha->pcidev->revision == IPS_REVID_TROMBONE64) ips_get_bios_version() 2268 if (readb(ha->mem_ptr + IPS_REG_FLDP) != 0x55) ips_get_bios_version() 2271 writel(1, ha->mem_ptr + IPS_REG_FLAP); ips_get_bios_version() 2272 if (ha->pcidev->revision == IPS_REVID_TROMBONE64) ips_get_bios_version() 2275 if (readb(ha->mem_ptr + IPS_REG_FLDP) != 0xAA) ips_get_bios_version() 2279 writel(0x1FF, ha->mem_ptr + IPS_REG_FLAP); ips_get_bios_version() 2280 if (ha->pcidev->revision == IPS_REVID_TROMBONE64) ips_get_bios_version() 2283 major = readb(ha->mem_ptr + IPS_REG_FLDP); ips_get_bios_version() 2286 writel(0x1FE, ha->mem_ptr + IPS_REG_FLAP); ips_get_bios_version() 2287 if (ha->pcidev->revision == IPS_REVID_TROMBONE64) ips_get_bios_version() 2289 minor = readb(ha->mem_ptr + IPS_REG_FLDP); ips_get_bios_version() 2292 writel(0x1FD, ha->mem_ptr + IPS_REG_FLAP); ips_get_bios_version() 2293 if (ha->pcidev->revision == IPS_REVID_TROMBONE64) ips_get_bios_version() 2295 subminor = readb(ha->mem_ptr + IPS_REG_FLDP); ips_get_bios_version() 2301 outl(0, ha->io_addr + IPS_REG_FLAP); ips_get_bios_version() 2302 if (ha->pcidev->revision == IPS_REVID_TROMBONE64) ips_get_bios_version() 2305 if (inb(ha->io_addr + IPS_REG_FLDP) != 0x55) ips_get_bios_version() 2308 outl(1, ha->io_addr + IPS_REG_FLAP); ips_get_bios_version() 2309 if (ha->pcidev->revision == IPS_REVID_TROMBONE64) ips_get_bios_version() 2312 if (inb(ha->io_addr + IPS_REG_FLDP) != 0xAA) ips_get_bios_version() 2316 outl(0x1FF, ha->io_addr + IPS_REG_FLAP); ips_get_bios_version() 2317 if (ha->pcidev->revision == IPS_REVID_TROMBONE64) ips_get_bios_version() 2320 major = inb(ha->io_addr + IPS_REG_FLDP); ips_get_bios_version() 2323 outl(0x1FE, ha->io_addr + IPS_REG_FLAP); ips_get_bios_version() 2324 if (ha->pcidev->revision == IPS_REVID_TROMBONE64) ips_get_bios_version() 2327 minor = inb(ha->io_addr + IPS_REG_FLDP); ips_get_bios_version() 2330 outl(0x1FD, ha->io_addr + IPS_REG_FLAP); ips_get_bios_version() 2331 if (ha->pcidev->revision == IPS_REVID_TROMBONE64) ips_get_bios_version() 2334 subminor = inb(ha->io_addr + IPS_REG_FLDP); ips_get_bios_version() 2340 buffer = ha->ioctl_data; ips_get_bios_version() 2344 scb = &ha->scbs[ha->max_cmds - 1]; ips_get_bios_version() 2346 ips_init_scb(ha, scb); ips_get_bios_version() 2352 scb->cmd.flashfw.command_id = IPS_COMMAND_ID(ha, scb); ips_get_bios_version() 2359 scb->cmd.flashfw.buffer_addr = ha->ioctl_busaddr; ips_get_bios_version() 2363 ips_send_wait(ha, scb, ips_cmd_timeout, ips_get_bios_version() 2381 ha->bios_version[0] = hexDigits[(major & 0xF0) >> 4]; ips_get_bios_version() 2382 ha->bios_version[1] = '.'; ips_get_bios_version() 2383 ha->bios_version[2] = hexDigits[major & 0x0F]; ips_get_bios_version() 2384 ha->bios_version[3] = hexDigits[subminor]; ips_get_bios_version() 2385 ha->bios_version[4] = '.'; ips_get_bios_version() 2386 ha->bios_version[5] = hexDigits[(minor & 0xF0) >> 4]; ips_get_bios_version() 2387 ha->bios_version[6] = hexDigits[minor & 0x0F]; ips_get_bios_version() 2388 ha->bios_version[7] = 0; ips_get_bios_version() 2403 ips_hainit(ips_ha_t * ha) ips_hainit() argument 2410 if (!ha) ips_hainit() 2413 if (ha->func.statinit) ips_hainit() 2414 (*ha->func.statinit) (ha); ips_hainit() 2416 if (ha->func.enableint) ips_hainit() 2417 (*ha->func.enableint) (ha); ips_hainit() 2420 ha->reset_count = 1; ips_hainit() 2422 ha->last_ffdc = tv.tv_sec; ips_hainit() 2423 ips_ffdc_reset(ha, IPS_INTR_IORL); ips_hainit() 2425 if (!ips_read_config(ha, IPS_INTR_IORL)) { ips_hainit() 2426 IPS_PRINTK(KERN_WARNING, ha->pcidev, ips_hainit() 2432 if (!ips_read_adapter_status(ha, IPS_INTR_IORL)) { ips_hainit() 2433 IPS_PRINTK(KERN_WARNING, ha->pcidev, ips_hainit() 2440 ips_identify_controller(ha); ips_hainit() 2442 if (!ips_read_subsystem_parameters(ha, IPS_INTR_IORL)) { ips_hainit() 2443 IPS_PRINTK(KERN_WARNING, ha->pcidev, ips_hainit() 2450 if (!ips_write_driver_status(ha, IPS_INTR_IORL)) { ips_hainit() 2451 IPS_PRINTK(KERN_WARNING, ha->pcidev, ips_hainit() 2458 if ((ha->conf->ucLogDriveCount > 0) && (ha->requires_esl == 1)) ips_hainit() 2459 ips_clear_adapter(ha, IPS_INTR_IORL); ips_hainit() 2462 ha->ntargets = IPS_MAX_TARGETS + 1; ips_hainit() 2463 ha->nlun = 1; ips_hainit() 2464 ha->nbus = (ha->enq->ucMaxPhysicalDevices / IPS_MAX_TARGETS) + 1; ips_hainit() 2466 switch (ha->conf->logical_drive[0].ucStripeSize) { ips_hainit() 2468 ha->max_xfer = 0x10000; ips_hainit() 2472 ha->max_xfer = 0x20000; ips_hainit() 2476 ha->max_xfer = 0x40000; ips_hainit() 2481 ha->max_xfer = 0x80000; ips_hainit() 2486 if (le32_to_cpu(ha->subsys->param[4]) & 0x1) { ips_hainit() 2488 ha->max_cmds = ha->enq->ucConcurrentCmdCount; ips_hainit() 2491 switch (ha->conf->logical_drive[0].ucStripeSize) { ips_hainit() 2493 ha->max_cmds = 32; ips_hainit() 2497 ha->max_cmds = 16; ips_hainit() 2501 ha->max_cmds = 8; ips_hainit() 2506 ha->max_cmds = 4; ips_hainit() 2512 if ((ha->ad_type == IPS_ADTYPE_SERVERAID3L) || ips_hainit() 2513 (ha->ad_type == IPS_ADTYPE_SERVERAID4L) || ips_hainit() 2514 (ha->ad_type == IPS_ADTYPE_SERVERAID4LX)) { ips_hainit() 2515 if ((ha->max_cmds > MaxLiteCmds) && (MaxLiteCmds)) ips_hainit() 2516 ha->max_cmds = MaxLiteCmds; ips_hainit() 2520 ha->ha_id[0] = IPS_ADAPTER_ID; ips_hainit() 2521 for (i = 1; i < ha->nbus; i++) { ips_hainit() 2522 ha->ha_id[i] = ha->conf->init_id[i - 1] & 0x1f; ips_hainit() 2523 ha->dcdb_active[i - 1] = 0; ips_hainit() 2539 ips_next(ips_ha_t * ha, int intr) ips_next() argument 2550 if (!ha) ips_next() 2552 host = ips_sh[ha->host_num]; ips_next() 2560 if ((ha->subsys->param[3] & 0x300000) ips_next() 2561 && (ha->scb_activelist.count == 0)) { ips_next() 2566 if (tv.tv_sec - ha->last_ffdc > IPS_SECS_8HOURS) { ips_next() 2567 ha->last_ffdc = tv.tv_sec; ips_next() 2568 ips_ffdc_time(ha); ips_next() 2579 while ((ha->num_ioctl < IPS_MAX_IOCTL) && ips_next() 2580 (ha->copp_waitlist.head) && (scb = ips_getscb(ha))) { ips_next() 2582 item = ips_removeq_copp_head(&ha->copp_waitlist); ips_next() 2583 ha->num_ioctl++; ips_next() 2589 ret = ips_make_passthru(ha, scb->scsi_cmd, scb, intr); ips_next() 2600 ips_freescb(ha, scb); ips_next() 2608 ips_freescb(ha, scb); ips_next() 2615 ha->num_ioctl--; ips_next() 2619 ret = ips_send_cmd(ha, scb); ips_next() 2622 ips_putq_scb_head(&ha->scb_activelist, scb); ips_next() 2624 ha->num_ioctl--; ips_next() 2632 ips_freescb(ha, scb); ips_next() 2635 ips_freescb(ha, scb); ips_next() 2647 p = ha->scb_waitlist.head; ips_next() 2648 while ((p) && (scb = ips_getscb(ha))) { ips_next() 2650 && (ha-> ips_next() 2653 ips_freescb(ha, scb); ips_next() 2659 SC = ips_removeq_wait(&ha->scb_waitlist, q); ips_next() 2690 (ha, sg_dma_address(sg), scb, i, ips_next() 2721 ret = ips_send_cmd(ha, scb); ips_next() 2725 ips_putq_scb_head(&ha->scb_activelist, scb); ips_next() 2734 ha->dcdb_active[scb->bus - 1] &= ips_next() 2737 ips_freescb(ha, scb); ips_next() 2744 ha->dcdb_active[scb->bus - 1] &= ips_next() 2747 ips_freescb(ha, scb); ips_next() 3104 ipsintr_blocking(ips_ha_t * ha, ips_scb_t * scb) ipsintr_blocking() argument 3108 ips_freescb(ha, scb); ipsintr_blocking() 3109 if ((ha->waitflag == TRUE) && (ha->cmd_in_progress == scb->cdb[0])) { ipsintr_blocking() 3110 ha->waitflag = FALSE; ipsintr_blocking() 3126 ipsintr_done(ips_ha_t * ha, ips_scb_t * scb) ipsintr_done() argument 3131 IPS_PRINTK(KERN_WARNING, ha->pcidev, ipsintr_done() 3139 IPS_PRINTK(KERN_WARNING, ha->pcidev, ipsintr_done() 3145 ips_done(ha, scb); ipsintr_done() 3158 ips_done(ips_ha_t * ha, ips_scb_t * scb) ips_done() argument 3168 ips_cleanup_passthru(ha, scb); ips_done() 3169 ha->num_ioctl--; ips_done() 3191 ips_fill_scb_sg_single(ha, ips_done() 3199 (ha, ips_done() 3218 ret = ips_send_cmd(ha, scb); ips_done() 3227 ips_freescb(ha, scb); ips_done() 3235 ips_freescb(ha, scb); ips_done() 3246 ha->dcdb_active[scb->bus - 1] &= ~(1 << scb->target_id); ips_done() 3251 ips_freescb(ha, scb); ips_done() 3264 ips_map_status(ips_ha_t * ha, ips_scb_t * scb, ips_stat_t * sp) ips_map_status() argument 3277 ips_name, ha->host_num, ips_map_status() 3401 ips_send_wait(ips_ha_t * ha, ips_scb_t * scb, int timeout, int intr) ips_send_wait() argument 3408 ha->waitflag = TRUE; ips_send_wait() 3409 ha->cmd_in_progress = scb->cdb[0]; ips_send_wait() 3412 ret = ips_send_cmd(ha, scb); ips_send_wait() 3418 ret = ips_wait(ha, timeout, intr); ips_send_wait() 3467 ips_send_cmd(ips_ha_t * ha, ips_scb_t * scb) ips_send_cmd() argument 3485 if ((ha->waitflag == TRUE) && ips_send_cmd() 3486 (ha->cmd_in_progress == scb->cdb[0])) { ips_send_cmd() 3487 ha->waitflag = FALSE; ips_send_cmd() 3552 scb->cmd.logical_info.command_id = IPS_COMMAND_ID(ha, scb); ips_send_cmd() 3556 scb->data_busaddr = ha->logical_drive_info_dma_addr; ips_send_cmd() 3565 ips_reqsen(ha, scb); ips_send_cmd() 3584 IPS_USE_ENH_SGLIST(ha) ? 0xFF : 0; ips_send_cmd() 3590 scb->cmd.basic_io.command_id = IPS_COMMAND_ID(ha, scb); ips_send_cmd() 3630 IPS_USE_ENH_SGLIST(ha) ? 0xFF : 0; ips_send_cmd() 3636 scb->cmd.basic_io.command_id = IPS_COMMAND_ID(ha, scb); ips_send_cmd() 3675 scb->cmd.basic_io.command_id = IPS_COMMAND_ID(ha, scb); ips_send_cmd() 3678 scb->data_len = sizeof (*ha->enq); ips_send_cmd() 3679 scb->cmd.basic_io.sg_addr = ha->enq_busaddr; ips_send_cmd() 3685 scb->cmd.logical_info.command_id = IPS_COMMAND_ID(ha, scb); ips_send_cmd() 3690 scb->data_busaddr = ha->logical_drive_info_dma_addr; ips_send_cmd() 3733 if (ha->conf->dev[scb->bus - 1][scb->target_id].ucState == 0) { ips_send_cmd() 3738 ha->dcdb_active[scb->bus - 1] |= (1 << scb->target_id); ips_send_cmd() 3739 scb->cmd.dcdb.command_id = IPS_COMMAND_ID(ha, scb); ips_send_cmd() 3752 if (ha->subsys->param[4] & 0x00100000) { /* If NEW Tape DCDB is Supported */ ips_send_cmd() 3759 IPS_USE_ENH_SGLIST(ha) ? 0xFF : 0; ips_send_cmd() 3798 IPS_USE_ENH_SGLIST(ha) ? 0xFF : 0; ips_send_cmd() 3836 return ((*ha->func.issue) (ha, scb)); ips_send_cmd() 3849 ips_chkstatus(ips_ha_t * ha, IPS_STATUS * pstatus) ips_chkstatus() argument 3860 scb = &ha->scbs[pstatus->fields.command_id]; ips_chkstatus() 3865 sp = &ha->sp; ips_chkstatus() 3870 ips_removeq_scb(&ha->scb_activelist, scb); ips_chkstatus() 3878 ha->host_num, ips_chkstatus() 3897 ips_name, ha->host_num, ips_chkstatus() 3915 if (!ips_online(ha, scb)) { ips_chkstatus() 3921 if (ips_online(ha, scb)) { ips_chkstatus() 3922 ips_inquiry(ha, scb); ips_chkstatus() 3929 ips_reqsen(ha, scb); ips_chkstatus() 3941 if (!ips_online(ha, scb) ips_chkstatus() 3942 || !ips_msense(ha, scb)) { ips_chkstatus() 3948 if (ips_online(ha, scb)) ips_chkstatus() 3949 ips_rdcap(ha, scb); ips_chkstatus() 3988 ips_name, ha->host_num, ips_chkstatus() 3993 ips_map_status(ha, scb, sp); ips_chkstatus() 4007 ips_online(ips_ha_t * ha, ips_scb_t * scb) ips_online() argument 4015 memset(ha->logical_drive_info, 0, sizeof (IPS_LD_INFO)); ips_online() 4019 if (ha->logical_drive_info->drive_info[scb->target_id].state != ips_online() 4021 && ha->logical_drive_info->drive_info[scb->target_id].state != ips_online() 4023 && ha->logical_drive_info->drive_info[scb->target_id].state != ips_online() 4025 && ha->logical_drive_info->drive_info[scb->target_id].state != ips_online() 4042 ips_inquiry(ips_ha_t * ha, ips_scb_t * scb) ips_inquiry() argument 4077 ips_rdcap(ips_ha_t * ha, ips_scb_t * scb) ips_rdcap() argument 4088 (ha->logical_drive_info-> ips_rdcap() 4107 ips_msense(ips_ha_t * ha, ips_scb_t * scb) ips_msense() argument 4116 if (le32_to_cpu(ha->enq->ulDriveSize[scb->target_id]) > 0x400000 && ips_msense() 4117 (ha->enq->ucMiscFlag & 0x8) == 0) { ips_msense() 4126 (le32_to_cpu(ha->enq->ulDriveSize[scb->target_id]) - ips_msense() 4198 ips_reqsen(ips_ha_t * ha, ips_scb_t * scb) ips_reqsen() argument 4227 ips_free(ips_ha_t * ha) ips_free() argument 4232 if (ha) { ips_free() 4233 if (ha->enq) { ips_free() 4234 pci_free_consistent(ha->pcidev, sizeof(IPS_ENQ), ips_free() 4235 ha->enq, ha->enq_busaddr); ips_free() 4236 ha->enq = NULL; ips_free() 4239 kfree(ha->conf); ips_free() 4240 ha->conf = NULL; ips_free() 4242 if (ha->adapt) { ips_free() 4243 pci_free_consistent(ha->pcidev, ips_free() 4245 sizeof (IPS_IO_CMD), ha->adapt, ips_free() 4246 ha->adapt->hw_status_start); ips_free() 4247 ha->adapt = NULL; ips_free() 4250 if (ha->logical_drive_info) { ips_free() 4251 pci_free_consistent(ha->pcidev, ips_free() 4253 ha->logical_drive_info, ips_free() 4254 ha->logical_drive_info_dma_addr); ips_free() 4255 ha->logical_drive_info = NULL; ips_free() 4258 kfree(ha->nvram); ips_free() 4259 ha->nvram = NULL; ips_free() 4261 kfree(ha->subsys); ips_free() 4262 ha->subsys = NULL; ips_free() 4264 if (ha->ioctl_data) { ips_free() 4265 pci_free_consistent(ha->pcidev, ha->ioctl_len, ips_free() 4266 ha->ioctl_data, ha->ioctl_busaddr); ips_free() 4267 ha->ioctl_data = NULL; ips_free() 4268 ha->ioctl_datasize = 0; ips_free() 4269 ha->ioctl_len = 0; ips_free() 4271 ips_deallocatescbs(ha, ha->max_cmds); ips_free() 4274 if (ha->mem_ptr) { ips_free() 4275 iounmap(ha->ioremap_ptr); ips_free() 4276 ha->ioremap_ptr = NULL; ips_free() 4277 ha->mem_ptr = NULL; ips_free() 4280 ha->mem_addr = 0; ips_free() 4295 ips_deallocatescbs(ips_ha_t * ha, int cmds) ips_deallocatescbs() argument 4297 if (ha->scbs) { ips_deallocatescbs() 4298 pci_free_consistent(ha->pcidev, ips_deallocatescbs() 4299 IPS_SGLIST_SIZE(ha) * IPS_MAX_SG * cmds, ips_deallocatescbs() 4300 ha->scbs->sg_list.list, ips_deallocatescbs() 4301 ha->scbs->sg_busaddr); ips_deallocatescbs() 4302 pci_free_consistent(ha->pcidev, sizeof (ips_scb_t) * cmds, ips_deallocatescbs() 4303 ha->scbs, ha->scbs->scb_busaddr); ips_deallocatescbs() 4304 ha->scbs = NULL; ips_deallocatescbs() 4319 ips_allocatescbs(ips_ha_t * ha) ips_allocatescbs() argument 4329 ha->scbs = ips_allocatescbs() 4330 pci_alloc_consistent(ha->pcidev, ha->max_cmds * sizeof (ips_scb_t), ips_allocatescbs() 4332 if (ha->scbs == NULL) ips_allocatescbs() 4335 pci_alloc_consistent(ha->pcidev, ips_allocatescbs() 4336 IPS_SGLIST_SIZE(ha) * IPS_MAX_SG * ips_allocatescbs() 4337 ha->max_cmds, &sg_dma); ips_allocatescbs() 4339 pci_free_consistent(ha->pcidev, ips_allocatescbs() 4340 ha->max_cmds * sizeof (ips_scb_t), ha->scbs, ips_allocatescbs() 4345 memset(ha->scbs, 0, ha->max_cmds * sizeof (ips_scb_t)); ips_allocatescbs() 4347 for (i = 0; i < ha->max_cmds; i++) { ips_allocatescbs() 4348 scb_p = &ha->scbs[i]; ips_allocatescbs() 4351 if (IPS_USE_ENH_SGLIST(ha)) { ips_allocatescbs() 4355 sg_dma + IPS_SGLIST_SIZE(ha) * IPS_MAX_SG * i; ips_allocatescbs() 4360 sg_dma + IPS_SGLIST_SIZE(ha) * IPS_MAX_SG * i; ips_allocatescbs() 4364 if (i < ha->max_cmds - 1) { ips_allocatescbs() 4365 scb_p->q_next = ha->scb_freelist; ips_allocatescbs() 4366 ha->scb_freelist = scb_p; ips_allocatescbs() 4384 ips_init_scb(ips_ha_t * ha, ips_scb_t * scb) ips_init_scb() argument 4398 memset(ha->dummy, 0, sizeof (IPS_IO_CMD)); ips_init_scb() 4401 ha->dummy->op_code = 0xFF; ips_init_scb() 4402 ha->dummy->ccsar = cpu_to_le32(ha->adapt->hw_status_start ips_init_scb() 4404 ha->dummy->command_id = IPS_MAX_CMDS; ips_init_scb() 4413 scb->cmd.basic_io.ccsar = cpu_to_le32(ha->adapt->hw_status_start ips_init_scb() 4429 ips_getscb(ips_ha_t * ha) ips_getscb() argument 4435 if ((scb = ha->scb_freelist) == NULL) { ips_getscb() 4440 ha->scb_freelist = scb->q_next; ips_getscb() 4444 ips_init_scb(ha, scb); ips_getscb() 4461 ips_freescb(ips_ha_t * ha, ips_scb_t * scb) ips_freescb() argument 4468 pci_unmap_single(ha->pcidev, scb->data_busaddr, scb->data_len, ips_freescb() 4472 if (IPS_COMMAND_ID(ha, scb) < (ha->max_cmds - 1)) { ips_freescb() 4473 scb->q_next = ha->scb_freelist; ips_freescb() 4474 ha->scb_freelist = scb; ips_freescb() 4488 ips_isinit_copperhead(ips_ha_t * ha) ips_isinit_copperhead() argument 4495 isr = inb(ha->io_addr + IPS_REG_HISR); ips_isinit_copperhead() 4496 scpr = inb(ha->io_addr + IPS_REG_SCPR); ips_isinit_copperhead() 4514 ips_isinit_copperhead_memio(ips_ha_t * ha) ips_isinit_copperhead_memio() argument 4521 isr = readb(ha->mem_ptr + IPS_REG_HISR); ips_isinit_copperhead_memio() 4522 scpr = readb(ha->mem_ptr + IPS_REG_SCPR); ips_isinit_copperhead_memio() 4540 ips_isinit_morpheus(ips_ha_t * ha) ips_isinit_morpheus() argument 4547 if (ips_isintr_morpheus(ha)) ips_isinit_morpheus() 4548 ips_flush_and_reset(ha); ips_isinit_morpheus() 4550 post = readl(ha->mem_ptr + IPS_REG_I960_MSG0); ips_isinit_morpheus() 4551 bits = readl(ha->mem_ptr + IPS_REG_I2O_HIR); ips_isinit_morpheus() 4572 ips_flush_and_reset(ips_ha_t *ha) ips_flush_and_reset() argument 4581 scb = pci_alloc_consistent(ha->pcidev, sizeof(ips_scb_t), &command_dma); ips_flush_and_reset() 4584 ips_init_scb(ha, scb); ips_flush_and_reset() 4598 ret = ips_send_cmd(ha, scb); /* Send the Flush Command */ ips_flush_and_reset() 4605 done = ips_poll_for_flush_complete(ha); ips_flush_and_reset() 4614 (*ha->func.reset) (ha); ips_flush_and_reset() 4616 pci_free_consistent(ha->pcidev, sizeof(ips_scb_t), scb, command_dma); ips_flush_and_reset() 4631 ips_poll_for_flush_complete(ips_ha_t * ha) ips_poll_for_flush_complete() argument 4636 cstatus.value = (*ha->func.statupd) (ha); ips_poll_for_flush_complete() 4658 ips_enable_int_copperhead(ips_ha_t * ha) ips_enable_int_copperhead() argument 4662 outb(ha->io_addr + IPS_REG_HISR, IPS_BIT_EI); ips_enable_int_copperhead() 4663 inb(ha->io_addr + IPS_REG_HISR); /*Ensure PCI Posting Completes*/ ips_enable_int_copperhead() 4675 ips_enable_int_copperhead_memio(ips_ha_t * ha) ips_enable_int_copperhead_memio() argument 4679 writeb(IPS_BIT_EI, ha->mem_ptr + IPS_REG_HISR); ips_enable_int_copperhead_memio() 4680 readb(ha->mem_ptr + IPS_REG_HISR); /*Ensure PCI Posting Completes*/ ips_enable_int_copperhead_memio() 4692 ips_enable_int_morpheus(ips_ha_t * ha) ips_enable_int_morpheus() argument 4698 Oimr = readl(ha->mem_ptr + IPS_REG_I960_OIMR); ips_enable_int_morpheus() 4700 writel(Oimr, ha->mem_ptr + IPS_REG_I960_OIMR); ips_enable_int_morpheus() 4701 readl(ha->mem_ptr + IPS_REG_I960_OIMR); /*Ensure PCI Posting Completes*/ ips_enable_int_morpheus() 4714 ips_init_copperhead(ips_ha_t * ha) ips_init_copperhead() argument 4726 Isr = inb(ha->io_addr + IPS_REG_HISR); ips_init_copperhead() 4738 PostByte[i] = inb(ha->io_addr + IPS_REG_ISPR); ips_init_copperhead() 4739 outb(Isr, ha->io_addr + IPS_REG_HISR); ips_init_copperhead() 4743 IPS_PRINTK(KERN_WARNING, ha->pcidev, ips_init_copperhead() 4752 Isr = inb(ha->io_addr + IPS_REG_HISR); ips_init_copperhead() 4764 ConfigByte[i] = inb(ha->io_addr + IPS_REG_ISPR); ips_init_copperhead() 4765 outb(Isr, ha->io_addr + IPS_REG_HISR); ips_init_copperhead() 4769 Cbsp = inb(ha->io_addr + IPS_REG_CBSP); ips_init_copperhead() 4783 outl(0x1010, ha->io_addr + IPS_REG_CCCR); ips_init_copperhead() 4786 outb(IPS_BIT_EBM, ha->io_addr + IPS_REG_SCPR); ips_init_copperhead() 4788 if (ha->pcidev->revision == IPS_REVID_TROMBONE64) ips_init_copperhead() 4790 outl(0, ha->io_addr + IPS_REG_NDAE); ips_init_copperhead() 4793 outb(IPS_BIT_EI, ha->io_addr + IPS_REG_HISR); ips_init_copperhead() 4808 ips_init_copperhead_memio(ips_ha_t * ha) ips_init_copperhead_memio() argument 4820 Isr = readb(ha->mem_ptr + IPS_REG_HISR); ips_init_copperhead_memio() 4832 PostByte[i] = readb(ha->mem_ptr + IPS_REG_ISPR); ips_init_copperhead_memio() 4833 writeb(Isr, ha->mem_ptr + IPS_REG_HISR); ips_init_copperhead_memio() 4837 IPS_PRINTK(KERN_WARNING, ha->pcidev, ips_init_copperhead_memio() 4846 Isr = readb(ha->mem_ptr + IPS_REG_HISR); ips_init_copperhead_memio() 4858 ConfigByte[i] = readb(ha->mem_ptr + IPS_REG_ISPR); ips_init_copperhead_memio() 4859 writeb(Isr, ha->mem_ptr + IPS_REG_HISR); ips_init_copperhead_memio() 4863 Cbsp = readb(ha->mem_ptr + IPS_REG_CBSP); ips_init_copperhead_memio() 4877 writel(0x1010, ha->mem_ptr + IPS_REG_CCCR); ips_init_copperhead_memio() 4880 writeb(IPS_BIT_EBM, ha->mem_ptr + IPS_REG_SCPR); ips_init_copperhead_memio() 4882 if (ha->pcidev->revision == IPS_REVID_TROMBONE64) ips_init_copperhead_memio() 4884 writel(0, ha->mem_ptr + IPS_REG_NDAE); ips_init_copperhead_memio() 4887 writeb(IPS_BIT_EI, ha->mem_ptr + IPS_REG_HISR); ips_init_copperhead_memio() 4903 ips_init_morpheus(ips_ha_t * ha) ips_init_morpheus() argument 4915 Isr = readl(ha->mem_ptr + IPS_REG_I2O_HIR); ips_init_morpheus() 4926 IPS_PRINTK(KERN_WARNING, ha->pcidev, ips_init_morpheus() 4932 Post = readl(ha->mem_ptr + IPS_REG_I960_MSG0); ips_init_morpheus() 4935 IPS_PRINTK(KERN_WARNING, ha->pcidev, ips_init_morpheus() 4940 writel(Isr, ha->mem_ptr + IPS_REG_I2O_HIR); ips_init_morpheus() 4943 Post = readl(ha->mem_ptr + IPS_REG_I960_MSG0); ips_init_morpheus() 4951 IPS_PRINTK(KERN_WARNING, ha->pcidev, ips_init_morpheus() 4960 writel(Isr, ha->mem_ptr + IPS_REG_I2O_HIR); ips_init_morpheus() 4963 IPS_PRINTK(KERN_WARNING, ha->pcidev, ips_init_morpheus() 4971 Isr = readl(ha->mem_ptr + IPS_REG_I2O_HIR); ips_init_morpheus() 4982 IPS_PRINTK(KERN_WARNING, ha->pcidev, ips_init_morpheus() 4988 Config = readl(ha->mem_ptr + IPS_REG_I960_MSG1); ips_init_morpheus() 4992 writel(Isr, ha->mem_ptr + IPS_REG_I2O_HIR); ips_init_morpheus() 4995 Oimr = readl(ha->mem_ptr + IPS_REG_I960_OIMR); ips_init_morpheus() 4997 writel(Oimr, ha->mem_ptr + IPS_REG_I960_OIMR); ips_init_morpheus() 5004 ha->requires_esl = 1; ips_init_morpheus() 5020 ips_reset_copperhead(ips_ha_t * ha) ips_reset_copperhead() argument 5027 ips_name, ha->host_num, ha->io_addr, ha->pcidev->irq); ips_reset_copperhead() 5034 outb(IPS_BIT_RST, ha->io_addr + IPS_REG_SCPR); ips_reset_copperhead() 5039 outb(0, ha->io_addr + IPS_REG_SCPR); ips_reset_copperhead() 5044 if ((*ha->func.init) (ha)) ips_reset_copperhead() 5065 ips_reset_copperhead_memio(ips_ha_t * ha) ips_reset_copperhead_memio() argument 5072 ips_name, ha->host_num, ha->mem_addr, ha->pcidev->irq); ips_reset_copperhead_memio() 5079 writeb(IPS_BIT_RST, ha->mem_ptr + IPS_REG_SCPR); ips_reset_copperhead_memio() 5084 writeb(0, ha->mem_ptr + IPS_REG_SCPR); ips_reset_copperhead_memio() 5089 if ((*ha->func.init) (ha)) ips_reset_copperhead_memio() 5110 ips_reset_morpheus(ips_ha_t * ha) ips_reset_morpheus() argument 5118 ips_name, ha->host_num, ha->mem_addr, ha->pcidev->irq); ips_reset_morpheus() 5125 writel(0x80000000, ha->mem_ptr + IPS_REG_I960_IDR); ips_reset_morpheus() 5131 pci_read_config_byte(ha->pcidev, 4, &junk); ips_reset_morpheus() 5133 if ((*ha->func.init) (ha)) ips_reset_morpheus() 5154 ips_statinit(ips_ha_t * ha) ips_statinit() argument 5160 ha->adapt->p_status_start = ha->adapt->status; ips_statinit() 5161 ha->adapt->p_status_end = ha->adapt->status + IPS_MAX_CMDS; ips_statinit() 5162 ha->adapt->p_status_tail = ha->adapt->status; ips_statinit() 5164 phys_status_start = ha->adapt->hw_status_start; ips_statinit() 5165 outl(phys_status_start, ha->io_addr + IPS_REG_SQSR); ips_statinit() 5167 ha->io_addr + IPS_REG_SQER); ips_statinit() 5169 ha->io_addr + IPS_REG_SQHR); ips_statinit() 5170 outl(phys_status_start, ha->io_addr + IPS_REG_SQTR); ips_statinit() 5172 ha->adapt->hw_status_tail = phys_status_start; ips_statinit() 5185 ips_statinit_memio(ips_ha_t * ha) ips_statinit_memio() argument 5191 ha->adapt->p_status_start = ha->adapt->status; ips_statinit_memio() 5192 ha->adapt->p_status_end = ha->adapt->status + IPS_MAX_CMDS; ips_statinit_memio() 5193 ha->adapt->p_status_tail = ha->adapt->status; ips_statinit_memio() 5195 phys_status_start = ha->adapt->hw_status_start; ips_statinit_memio() 5196 writel(phys_status_start, ha->mem_ptr + IPS_REG_SQSR); ips_statinit_memio() 5198 ha->mem_ptr + IPS_REG_SQER); ips_statinit_memio() 5199 writel(phys_status_start + IPS_STATUS_SIZE, ha->mem_ptr + IPS_REG_SQHR); ips_statinit_memio() 5200 writel(phys_status_start, ha->mem_ptr + IPS_REG_SQTR); ips_statinit_memio() 5202 ha->adapt->hw_status_tail = phys_status_start; ips_statinit_memio() 5215 ips_statupd_copperhead(ips_ha_t * ha) ips_statupd_copperhead() argument 5219 if (ha->adapt->p_status_tail != ha->adapt->p_status_end) { ips_statupd_copperhead() 5220 ha->adapt->p_status_tail++; ips_statupd_copperhead() 5221 ha->adapt->hw_status_tail += sizeof (IPS_STATUS); ips_statupd_copperhead() 5223 ha->adapt->p_status_tail = ha->adapt->p_status_start; ips_statupd_copperhead() 5224 ha->adapt->hw_status_tail = ha->adapt->hw_status_start; ips_statupd_copperhead() 5227 outl(ha->adapt->hw_status_tail, ips_statupd_copperhead() 5228 ha->io_addr + IPS_REG_SQTR); ips_statupd_copperhead() 5230 return (ha->adapt->p_status_tail->value); ips_statupd_copperhead() 5243 ips_statupd_copperhead_memio(ips_ha_t * ha) ips_statupd_copperhead_memio() argument 5247 if (ha->adapt->p_status_tail != ha->adapt->p_status_end) { ips_statupd_copperhead_memio() 5248 ha->adapt->p_status_tail++; ips_statupd_copperhead_memio() 5249 ha->adapt->hw_status_tail += sizeof (IPS_STATUS); ips_statupd_copperhead_memio() 5251 ha->adapt->p_status_tail = ha->adapt->p_status_start; ips_statupd_copperhead_memio() 5252 ha->adapt->hw_status_tail = ha->adapt->hw_status_start; ips_statupd_copperhead_memio() 5255 writel(ha->adapt->hw_status_tail, ha->mem_ptr + IPS_REG_SQTR); ips_statupd_copperhead_memio() 5257 return (ha->adapt->p_status_tail->value); ips_statupd_copperhead_memio() 5270 ips_statupd_morpheus(ips_ha_t * ha) ips_statupd_morpheus() argument 5276 val = readl(ha->mem_ptr + IPS_REG_I2O_OUTMSGQ); ips_statupd_morpheus() 5291 ips_issue_copperhead(ips_ha_t * ha, ips_scb_t * scb) ips_issue_copperhead() argument 5301 ha->host_num, ips_issue_copperhead() 5307 ips_name, ha->host_num, scb->cmd.basic_io.command_id); ips_issue_copperhead() 5313 le32_to_cpu(inl(ha->io_addr + IPS_REG_CCCR))) & IPS_BIT_SEM) { ips_issue_copperhead() 5320 IPS_PRINTK(KERN_WARNING, ha->pcidev, ips_issue_copperhead() 5322 IPS_PRINTK(KERN_WARNING, ha->pcidev, ips_issue_copperhead() 5329 outl(scb->scb_busaddr, ha->io_addr + IPS_REG_CCSAR); ips_issue_copperhead() 5330 outw(IPS_BIT_START_CMD, ha->io_addr + IPS_REG_CCCR); ips_issue_copperhead() 5345 ips_issue_copperhead_memio(ips_ha_t * ha, ips_scb_t * scb) ips_issue_copperhead_memio() argument 5355 ha->host_num, ips_issue_copperhead_memio() 5361 ips_name, ha->host_num, scb->cmd.basic_io.command_id); ips_issue_copperhead_memio() 5366 while ((val = readl(ha->mem_ptr + IPS_REG_CCCR)) & IPS_BIT_SEM) { ips_issue_copperhead_memio() 5373 IPS_PRINTK(KERN_WARNING, ha->pcidev, ips_issue_copperhead_memio() 5375 IPS_PRINTK(KERN_WARNING, ha->pcidev, ips_issue_copperhead_memio() 5382 writel(scb->scb_busaddr, ha->mem_ptr + IPS_REG_CCSAR); ips_issue_copperhead_memio() 5383 writel(IPS_BIT_START_CMD, ha->mem_ptr + IPS_REG_CCCR); ips_issue_copperhead_memio() 5398 ips_issue_i2o(ips_ha_t * ha, ips_scb_t * scb) ips_issue_i2o() argument 5406 ha->host_num, ips_issue_i2o() 5412 ips_name, ha->host_num, scb->cmd.basic_io.command_id); ips_issue_i2o() 5415 outl(scb->scb_busaddr, ha->io_addr + IPS_REG_I2O_INMSGQ); ips_issue_i2o() 5430 ips_issue_i2o_memio(ips_ha_t * ha, ips_scb_t * scb) ips_issue_i2o_memio() argument 5438 ha->host_num, ips_issue_i2o_memio() 5444 ips_name, ha->host_num, scb->cmd.basic_io.command_id); ips_issue_i2o_memio() 5447 writel(scb->scb_busaddr, ha->mem_ptr + IPS_REG_I2O_INMSGQ); ips_issue_i2o_memio() 5462 ips_isintr_copperhead(ips_ha_t * ha) ips_isintr_copperhead() argument 5468 Isr = inb(ha->io_addr + IPS_REG_HISR); ips_isintr_copperhead() 5479 outb(Isr, ha->io_addr + IPS_REG_HISR); ips_isintr_copperhead() 5495 ips_isintr_copperhead_memio(ips_ha_t * ha) ips_isintr_copperhead_memio() argument 5501 Isr = readb(ha->mem_ptr + IPS_REG_HISR); ips_isintr_copperhead_memio() 5512 writeb(Isr, ha->mem_ptr + IPS_REG_HISR); ips_isintr_copperhead_memio() 5528 ips_isintr_morpheus(ips_ha_t * ha) ips_isintr_morpheus() argument 5534 Isr = readl(ha->mem_ptr + IPS_REG_I2O_HIR); ips_isintr_morpheus() 5552 ips_wait(ips_ha_t * ha, int time, int intr) ips_wait() argument 5566 if (ha->waitflag == FALSE) { ips_wait() 5572 if (ha->waitflag == FALSE) { ips_wait() 5589 (*ha->func.intr) (ha); ips_wait() 5610 ips_write_driver_status(ips_ha_t * ha, int intr) ips_write_driver_status() argument 5614 if (!ips_readwrite_page5(ha, FALSE, intr)) { ips_write_driver_status() 5615 IPS_PRINTK(KERN_WARNING, ha->pcidev, ips_write_driver_status() 5623 if (le32_to_cpu(ha->nvram->signature) != IPS_NVRAM_P5_SIG) { ips_write_driver_status() 5626 ips_name, ha->host_num, ha->nvram->signature); ips_write_driver_status() 5627 ha->nvram->signature = IPS_NVRAM_P5_SIG; ips_write_driver_status() 5632 ips_name, ha->host_num, le16_to_cpu(ha->nvram->adapter_type), ips_write_driver_status() 5633 ha->nvram->adapter_slot, ha->nvram->bios_high[0], ips_write_driver_status() 5634 ha->nvram->bios_high[1], ha->nvram->bios_high[2], ips_write_driver_status() 5635 ha->nvram->bios_high[3], ha->nvram->bios_low[0], ips_write_driver_status() 5636 ha->nvram->bios_low[1], ha->nvram->bios_low[2], ips_write_driver_status() 5637 ha->nvram->bios_low[3]); ips_write_driver_status() 5639 ips_get_bios_version(ha, intr); ips_write_driver_status() 5642 ha->nvram->operating_system = IPS_OS_LINUX; ips_write_driver_status() 5643 ha->nvram->adapter_type = ha->ad_type; ips_write_driver_status() 5644 strncpy((char *) ha->nvram->driver_high, IPS_VERSION_HIGH, 4); ips_write_driver_status() 5645 strncpy((char *) ha->nvram->driver_low, IPS_VERSION_LOW, 4); ips_write_driver_status() 5646 strncpy((char *) ha->nvram->bios_high, ha->bios_version, 4); ips_write_driver_status() 5647 strncpy((char *) ha->nvram->bios_low, ha->bios_version + 4, 4); ips_write_driver_status() 5649 ha->nvram->versioning = 0; /* Indicate the Driver Does Not Support Versioning */ ips_write_driver_status() 5652 if (!ips_readwrite_page5(ha, TRUE, intr)) { ips_write_driver_status() 5653 IPS_PRINTK(KERN_WARNING, ha->pcidev, ips_write_driver_status() 5660 ha->slot_num = ha->nvram->adapter_slot; ips_write_driver_status() 5675 ips_read_adapter_status(ips_ha_t * ha, int intr) ips_read_adapter_status() argument 5682 scb = &ha->scbs[ha->max_cmds - 1]; ips_read_adapter_status() 5684 ips_init_scb(ha, scb); ips_read_adapter_status() 5690 scb->cmd.basic_io.command_id = IPS_COMMAND_ID(ha, scb); ips_read_adapter_status() 5695 scb->data_len = sizeof (*ha->enq); ips_read_adapter_status() 5696 scb->cmd.basic_io.sg_addr = ha->enq_busaddr; ips_read_adapter_status() 5700 ips_send_wait(ha, scb, ips_cmd_timeout, intr)) == IPS_FAILURE) ips_read_adapter_status() 5718 ips_read_subsystem_parameters(ips_ha_t * ha, int intr) ips_read_subsystem_parameters() argument 5725 scb = &ha->scbs[ha->max_cmds - 1]; ips_read_subsystem_parameters() 5727 ips_init_scb(ha, scb); ips_read_subsystem_parameters() 5733 scb->cmd.basic_io.command_id = IPS_COMMAND_ID(ha, scb); ips_read_subsystem_parameters() 5738 scb->data_len = sizeof (*ha->subsys); ips_read_subsystem_parameters() 5739 scb->cmd.basic_io.sg_addr = ha->ioctl_busaddr; ips_read_subsystem_parameters() 5743 ips_send_wait(ha, scb, ips_cmd_timeout, intr)) == IPS_FAILURE) ips_read_subsystem_parameters() 5748 memcpy(ha->subsys, ha->ioctl_data, sizeof(*ha->subsys)); ips_read_subsystem_parameters() 5762 ips_read_config(ips_ha_t * ha, int intr) ips_read_config() argument 5772 ha->conf->init_id[i] = 7; ips_read_config() 5774 scb = &ha->scbs[ha->max_cmds - 1]; ips_read_config() 5776 ips_init_scb(ha, scb); ips_read_config() 5782 scb->cmd.basic_io.command_id = IPS_COMMAND_ID(ha, scb); ips_read_config() 5783 scb->data_len = sizeof (*ha->conf); ips_read_config() 5784 scb->cmd.basic_io.sg_addr = ha->ioctl_busaddr; ips_read_config() 5788 ips_send_wait(ha, scb, ips_cmd_timeout, intr)) == IPS_FAILURE) ips_read_config() 5792 memset(ha->conf, 0, sizeof (IPS_CONF)); ips_read_config() 5796 ha->conf->init_id[i] = 7; ips_read_config() 5806 memcpy(ha->conf, ha->ioctl_data, sizeof(*ha->conf)); ips_read_config() 5820 ips_readwrite_page5(ips_ha_t * ha, int write, int intr) ips_readwrite_page5() argument 5827 scb = &ha->scbs[ha->max_cmds - 1]; ips_readwrite_page5() 5829 ips_init_scb(ha, scb); ips_readwrite_page5() 5835 scb->cmd.nvram.command_id = IPS_COMMAND_ID(ha, scb); ips_readwrite_page5() 5840 scb->data_len = sizeof (*ha->nvram); ips_readwrite_page5() 5841 scb->cmd.nvram.buffer_addr = ha->ioctl_busaddr; ips_readwrite_page5() 5843 memcpy(ha->ioctl_data, ha->nvram, sizeof(*ha->nvram)); ips_readwrite_page5() 5847 ips_send_wait(ha, scb, ips_cmd_timeout, intr)) == IPS_FAILURE) ips_readwrite_page5() 5851 memset(ha->nvram, 0, sizeof (IPS_NVRAM_P5)); ips_readwrite_page5() 5856 memcpy(ha->nvram, ha->ioctl_data, sizeof(*ha->nvram)); ips_readwrite_page5() 5870 ips_clear_adapter(ips_ha_t * ha, int intr) ips_clear_adapter() argument 5877 scb = &ha->scbs[ha->max_cmds - 1]; ips_clear_adapter() 5879 ips_init_scb(ha, scb); ips_clear_adapter() 5885 scb->cmd.config_sync.command_id = IPS_COMMAND_ID(ha, scb); ips_clear_adapter() 5894 ips_send_wait(ha, scb, ips_reset_timeout, intr)) == IPS_FAILURE) ips_clear_adapter() 5900 ips_init_scb(ha, scb); ips_clear_adapter() 5906 scb->cmd.unlock_stripe.command_id = IPS_COMMAND_ID(ha, scb); ips_clear_adapter() 5915 ips_send_wait(ha, scb, ips_cmd_timeout, intr)) == IPS_FAILURE) ips_clear_adapter() 5933 ips_ffdc_reset(ips_ha_t * ha, int intr) ips_ffdc_reset() argument 5939 scb = &ha->scbs[ha->max_cmds - 1]; ips_ffdc_reset() 5941 ips_init_scb(ha, scb); ips_ffdc_reset() 5946 scb->cmd.ffdc.command_id = IPS_COMMAND_ID(ha, scb); ips_ffdc_reset() 5947 scb->cmd.ffdc.reset_count = ha->reset_count; ips_ffdc_reset() 5951 ips_fix_ffdc_time(ha, scb, ha->last_ffdc); ips_ffdc_reset() 5954 ips_send_wait(ha, scb, ips_cmd_timeout, intr); ips_ffdc_reset() 5967 ips_ffdc_time(ips_ha_t * ha) ips_ffdc_time() argument 5973 DEBUG_VAR(1, "(%s%d) Sending time update.", ips_name, ha->host_num); ips_ffdc_time() 5975 scb = &ha->scbs[ha->max_cmds - 1]; ips_ffdc_time() 5977 ips_init_scb(ha, scb); ips_ffdc_time() 5982 scb->cmd.ffdc.command_id = IPS_COMMAND_ID(ha, scb); ips_ffdc_time() 5987 ips_fix_ffdc_time(ha, scb, ha->last_ffdc); ips_ffdc_time() 5990 ips_send_wait(ha, scb, ips_cmd_timeout, IPS_FFDC); ips_ffdc_time() 6002 ips_fix_ffdc_time(ips_ha_t * ha, ips_scb_t * scb, time_t current_time) ips_fix_ffdc_time() argument 6070 ips_erase_bios(ips_ha_t * ha) ips_erase_bios() argument 6080 outl(0, ha->io_addr + IPS_REG_FLAP); ips_erase_bios() 6081 if (ha->pcidev->revision == IPS_REVID_TROMBONE64) ips_erase_bios() 6084 outb(0x50, ha->io_addr + IPS_REG_FLDP); ips_erase_bios() 6085 if (ha->pcidev->revision == IPS_REVID_TROMBONE64) ips_erase_bios() 6089 outb(0x20, ha->io_addr + IPS_REG_FLDP); ips_erase_bios() 6090 if (ha->pcidev->revision == IPS_REVID_TROMBONE64) ips_erase_bios() 6094 outb(0xD0, ha->io_addr + IPS_REG_FLDP); ips_erase_bios() 6095 if (ha->pcidev->revision == IPS_REVID_TROMBONE64) ips_erase_bios() 6099 outb(0x70, ha->io_addr + IPS_REG_FLDP); ips_erase_bios() 6100 if (ha->pcidev->revision == IPS_REVID_TROMBONE64) ips_erase_bios() 6106 if (ha->pcidev->revision == IPS_REVID_TROMBONE64) { ips_erase_bios() 6107 outl(0, ha->io_addr + IPS_REG_FLAP); ips_erase_bios() 6111 status = inb(ha->io_addr + IPS_REG_FLDP); ips_erase_bios() 6125 outb(0xB0, ha->io_addr + IPS_REG_FLDP); ips_erase_bios() 6126 if (ha->pcidev->revision == IPS_REVID_TROMBONE64) ips_erase_bios() 6132 if (ha->pcidev->revision == IPS_REVID_TROMBONE64) { ips_erase_bios() 6133 outl(0, ha->io_addr + IPS_REG_FLAP); ips_erase_bios() 6137 status = inb(ha->io_addr + IPS_REG_FLDP); ips_erase_bios() 6161 outb(0x50, ha->io_addr + IPS_REG_FLDP); ips_erase_bios() 6162 if (ha->pcidev->revision == IPS_REVID_TROMBONE64) ips_erase_bios() 6166 outb(0xFF, ha->io_addr + IPS_REG_FLDP); ips_erase_bios() 6167 if (ha->pcidev->revision == IPS_REVID_TROMBONE64) ips_erase_bios() 6182 ips_erase_bios_memio(ips_ha_t * ha) ips_erase_bios_memio() argument 6192 writel(0, ha->mem_ptr + IPS_REG_FLAP); ips_erase_bios_memio() 6193 if (ha->pcidev->revision == IPS_REVID_TROMBONE64) ips_erase_bios_memio() 6196 writeb(0x50, ha->mem_ptr + IPS_REG_FLDP); ips_erase_bios_memio() 6197 if (ha->pcidev->revision == IPS_REVID_TROMBONE64) ips_erase_bios_memio() 6201 writeb(0x20, ha->mem_ptr + IPS_REG_FLDP); ips_erase_bios_memio() 6202 if (ha->pcidev->revision == IPS_REVID_TROMBONE64) ips_erase_bios_memio() 6206 writeb(0xD0, ha->mem_ptr + IPS_REG_FLDP); ips_erase_bios_memio() 6207 if (ha->pcidev->revision == IPS_REVID_TROMBONE64) ips_erase_bios_memio() 6211 writeb(0x70, ha->mem_ptr + IPS_REG_FLDP); ips_erase_bios_memio() 6212 if (ha->pcidev->revision == IPS_REVID_TROMBONE64) ips_erase_bios_memio() 6218 if (ha->pcidev->revision == IPS_REVID_TROMBONE64) { ips_erase_bios_memio() 6219 writel(0, ha->mem_ptr + IPS_REG_FLAP); ips_erase_bios_memio() 6223 status = readb(ha->mem_ptr + IPS_REG_FLDP); ips_erase_bios_memio() 6237 writeb(0xB0, ha->mem_ptr + IPS_REG_FLDP); ips_erase_bios_memio() 6238 if (ha->pcidev->revision == IPS_REVID_TROMBONE64) ips_erase_bios_memio() 6244 if (ha->pcidev->revision == IPS_REVID_TROMBONE64) { ips_erase_bios_memio() 6245 writel(0, ha->mem_ptr + IPS_REG_FLAP); ips_erase_bios_memio() 6249 status = readb(ha->mem_ptr + IPS_REG_FLDP); ips_erase_bios_memio() 6273 writeb(0x50, ha->mem_ptr + IPS_REG_FLDP); ips_erase_bios_memio() 6274 if (ha->pcidev->revision == IPS_REVID_TROMBONE64) ips_erase_bios_memio() 6278 writeb(0xFF, ha->mem_ptr + IPS_REG_FLDP); ips_erase_bios_memio() 6279 if (ha->pcidev->revision == IPS_REVID_TROMBONE64) ips_erase_bios_memio() 6294 ips_program_bios(ips_ha_t * ha, char *buffer, uint32_t buffersize, ips_program_bios() argument 6307 outl(i + offset, ha->io_addr + IPS_REG_FLAP); ips_program_bios() 6308 if (ha->pcidev->revision == IPS_REVID_TROMBONE64) ips_program_bios() 6311 outb(0x40, ha->io_addr + IPS_REG_FLDP); ips_program_bios() 6312 if (ha->pcidev->revision == IPS_REVID_TROMBONE64) ips_program_bios() 6315 outb(buffer[i], ha->io_addr + IPS_REG_FLDP); ips_program_bios() 6316 if (ha->pcidev->revision == IPS_REVID_TROMBONE64) ips_program_bios() 6322 if (ha->pcidev->revision == IPS_REVID_TROMBONE64) { ips_program_bios() 6323 outl(0, ha->io_addr + IPS_REG_FLAP); ips_program_bios() 6327 status = inb(ha->io_addr + IPS_REG_FLDP); ips_program_bios() 6338 outl(0, ha->io_addr + IPS_REG_FLAP); ips_program_bios() 6339 if (ha->pcidev->revision == IPS_REVID_TROMBONE64) ips_program_bios() 6342 outb(0xFF, ha->io_addr + IPS_REG_FLDP); ips_program_bios() 6343 if (ha->pcidev->revision == IPS_REVID_TROMBONE64) ips_program_bios() 6352 outl(0, ha->io_addr + IPS_REG_FLAP); ips_program_bios() 6353 if (ha->pcidev->revision == IPS_REVID_TROMBONE64) ips_program_bios() 6356 outb(0xFF, ha->io_addr + IPS_REG_FLDP); ips_program_bios() 6357 if (ha->pcidev->revision == IPS_REVID_TROMBONE64) ips_program_bios() 6365 outl(0, ha->io_addr + IPS_REG_FLAP); ips_program_bios() 6366 if (ha->pcidev->revision == IPS_REVID_TROMBONE64) ips_program_bios() 6369 outb(0xFF, ha->io_addr + IPS_REG_FLDP); ips_program_bios() 6370 if (ha->pcidev->revision == IPS_REVID_TROMBONE64) ips_program_bios() 6385 ips_program_bios_memio(ips_ha_t * ha, char *buffer, uint32_t buffersize, ips_program_bios_memio() argument 6398 writel(i + offset, ha->mem_ptr + IPS_REG_FLAP); ips_program_bios_memio() 6399 if (ha->pcidev->revision == IPS_REVID_TROMBONE64) ips_program_bios_memio() 6402 writeb(0x40, ha->mem_ptr + IPS_REG_FLDP); ips_program_bios_memio() 6403 if (ha->pcidev->revision == IPS_REVID_TROMBONE64) ips_program_bios_memio() 6406 writeb(buffer[i], ha->mem_ptr + IPS_REG_FLDP); ips_program_bios_memio() 6407 if (ha->pcidev->revision == IPS_REVID_TROMBONE64) ips_program_bios_memio() 6413 if (ha->pcidev->revision == IPS_REVID_TROMBONE64) { ips_program_bios_memio() 6414 writel(0, ha->mem_ptr + IPS_REG_FLAP); ips_program_bios_memio() 6418 status = readb(ha->mem_ptr + IPS_REG_FLDP); ips_program_bios_memio() 6429 writel(0, ha->mem_ptr + IPS_REG_FLAP); ips_program_bios_memio() 6430 if (ha->pcidev->revision == IPS_REVID_TROMBONE64) ips_program_bios_memio() 6433 writeb(0xFF, ha->mem_ptr + IPS_REG_FLDP); ips_program_bios_memio() 6434 if (ha->pcidev->revision == IPS_REVID_TROMBONE64) ips_program_bios_memio() 6443 writel(0, ha->mem_ptr + IPS_REG_FLAP); ips_program_bios_memio() 6444 if (ha->pcidev->revision == IPS_REVID_TROMBONE64) ips_program_bios_memio() 6447 writeb(0xFF, ha->mem_ptr + IPS_REG_FLDP); ips_program_bios_memio() 6448 if (ha->pcidev->revision == IPS_REVID_TROMBONE64) ips_program_bios_memio() 6456 writel(0, ha->mem_ptr + IPS_REG_FLAP); ips_program_bios_memio() 6457 if (ha->pcidev->revision == IPS_REVID_TROMBONE64) ips_program_bios_memio() 6460 writeb(0xFF, ha->mem_ptr + IPS_REG_FLDP); ips_program_bios_memio() 6461 if (ha->pcidev->revision == IPS_REVID_TROMBONE64) ips_program_bios_memio() 6476 ips_verify_bios(ips_ha_t * ha, char *buffer, uint32_t buffersize, ips_verify_bios() argument 6485 outl(0, ha->io_addr + IPS_REG_FLAP); ips_verify_bios() 6486 if (ha->pcidev->revision == IPS_REVID_TROMBONE64) ips_verify_bios() 6489 if (inb(ha->io_addr + IPS_REG_FLDP) != 0x55) ips_verify_bios() 6492 outl(1, ha->io_addr + IPS_REG_FLAP); ips_verify_bios() 6493 if (ha->pcidev->revision == IPS_REVID_TROMBONE64) ips_verify_bios() 6495 if (inb(ha->io_addr + IPS_REG_FLDP) != 0xAA) ips_verify_bios() 6501 outl(i + offset, ha->io_addr + IPS_REG_FLAP); ips_verify_bios() 6502 if (ha->pcidev->revision == IPS_REVID_TROMBONE64) ips_verify_bios() 6505 checksum = (uint8_t) checksum + inb(ha->io_addr + IPS_REG_FLDP); ips_verify_bios() 6525 ips_verify_bios_memio(ips_ha_t * ha, char *buffer, uint32_t buffersize, ips_verify_bios_memio() argument 6534 writel(0, ha->mem_ptr + IPS_REG_FLAP); ips_verify_bios_memio() 6535 if (ha->pcidev->revision == IPS_REVID_TROMBONE64) ips_verify_bios_memio() 6538 if (readb(ha->mem_ptr + IPS_REG_FLDP) != 0x55) ips_verify_bios_memio() 6541 writel(1, ha->mem_ptr + IPS_REG_FLAP); ips_verify_bios_memio() 6542 if (ha->pcidev->revision == IPS_REVID_TROMBONE64) ips_verify_bios_memio() 6544 if (readb(ha->mem_ptr + IPS_REG_FLDP) != 0xAA) ips_verify_bios_memio() 6550 writel(i + offset, ha->mem_ptr + IPS_REG_FLAP); ips_verify_bios_memio() 6551 if (ha->pcidev->revision == IPS_REVID_TROMBONE64) ips_verify_bios_memio() 6555 (uint8_t) checksum + readb(ha->mem_ptr + IPS_REG_FLDP); ips_verify_bios_memio() 6574 ips_abort_init(ips_ha_t * ha, int index) ips_abort_init() argument 6576 ha->active = 0; ips_abort_init() 6577 ips_free(ha); ips_abort_init() 6713 ips_ha_t *ha, *oldha = ips_ha[index]; ips_register_scsi() local 6720 ha = IPS_HA(sh); ips_register_scsi() 6721 memcpy(ha, oldha, sizeof (ips_ha_t)); ips_register_scsi() 6723 /* Install the interrupt handler with the new ha */ ips_register_scsi() 6724 if (request_irq(ha->pcidev->irq, do_ipsintr, IRQF_SHARED, ips_name, ha)) { ips_register_scsi() 6725 IPS_PRINTK(KERN_WARNING, ha->pcidev, ips_register_scsi() 6733 sh->unique_id = (ha->io_addr) ? ha->io_addr : ha->mem_addr; ips_register_scsi() 6740 sh->max_id = ha->ntargets; ips_register_scsi() 6741 sh->max_lun = ha->nlun; ips_register_scsi() 6742 sh->max_channel = ha->nbus - 1; ips_register_scsi() 6743 sh->can_queue = ha->max_cmds - 1; ips_register_scsi() 6745 if (scsi_add_host(sh, &ha->pcidev->dev)) ips_register_scsi() 6749 ips_ha[index] = ha; ips_register_scsi() 6756 free_irq(ha->pcidev->irq, ha); ips_register_scsi() 6886 ips_ha_t *ha; ips_init_phase1() local 6952 ha = kzalloc(sizeof (ips_ha_t), GFP_KERNEL); ips_init_phase1() 6953 if (ha == NULL) { ips_init_phase1() 6955 "Unable to allocate temporary ha struct\n"); ips_init_phase1() 6960 ips_ha[index] = ha; ips_init_phase1() 6961 ha->active = 1; ips_init_phase1() 6964 ha->io_addr = io_addr; ips_init_phase1() 6965 ha->io_len = io_len; ips_init_phase1() 6966 ha->mem_addr = mem_addr; ips_init_phase1() 6967 ha->mem_len = mem_len; ips_init_phase1() 6968 ha->mem_ptr = mem_ptr; ips_init_phase1() 6969 ha->ioremap_ptr = ioremap_ptr; ips_init_phase1() 6970 ha->host_num = (uint32_t) index; ips_init_phase1() 6971 ha->slot_num = PCI_SLOT(pci_dev->devfn); ips_init_phase1() 6972 ha->pcidev = pci_dev; ips_init_phase1() 6980 if (IPS_ENABLE_DMA64 && IPS_HAS_ENH_SGLIST(ha) && ips_init_phase1() 6981 !pci_set_dma_mask(ha->pcidev, DMA_BIT_MASK(64))) { ips_init_phase1() 6982 (ha)->flags |= IPS_HA_ENH_SG; ips_init_phase1() 6984 if (pci_set_dma_mask(ha->pcidev, DMA_BIT_MASK(32)) != 0) { ips_init_phase1() 6986 return ips_abort_init(ha, index); ips_init_phase1() 6994 ha->enq = pci_alloc_consistent(pci_dev, sizeof (IPS_ENQ), ips_init_phase1() 6995 &ha->enq_busaddr); ips_init_phase1() 6996 if (!ha->enq) { ips_init_phase1() 6999 return ips_abort_init(ha, index); ips_init_phase1() 7002 ha->adapt = pci_alloc_consistent(pci_dev, sizeof (IPS_ADAPTER) + ips_init_phase1() 7004 if (!ha->adapt) { ips_init_phase1() 7007 return ips_abort_init(ha, index); ips_init_phase1() 7009 ha->adapt->hw_status_start = dma_address; ips_init_phase1() 7010 ha->dummy = (void *) (ha->adapt + 1); ips_init_phase1() 7014 ha->logical_drive_info = pci_alloc_consistent(pci_dev, sizeof (IPS_LD_INFO), &dma_address); ips_init_phase1() 7015 if (!ha->logical_drive_info) { ips_init_phase1() 7018 return ips_abort_init(ha, index); ips_init_phase1() 7020 ha->logical_drive_info_dma_addr = dma_address; ips_init_phase1() 7023 ha->conf = kmalloc(sizeof (IPS_CONF), GFP_KERNEL); ips_init_phase1() 7025 if (!ha->conf) { ips_init_phase1() 7028 return ips_abort_init(ha, index); ips_init_phase1() 7031 ha->nvram = kmalloc(sizeof (IPS_NVRAM_P5), GFP_KERNEL); ips_init_phase1() 7033 if (!ha->nvram) { ips_init_phase1() 7036 return ips_abort_init(ha, index); ips_init_phase1() 7039 ha->subsys = kmalloc(sizeof (IPS_SUBSYS), GFP_KERNEL); ips_init_phase1() 7041 if (!ha->subsys) { ips_init_phase1() 7044 return ips_abort_init(ha, index); ips_init_phase1() 7052 ha->ioctl_data = pci_alloc_consistent(pci_dev, ips_ioctlsize, ips_init_phase1() 7053 &ha->ioctl_busaddr); ips_init_phase1() 7054 ha->ioctl_len = ips_ioctlsize; ips_init_phase1() 7055 if (!ha->ioctl_data) { ips_init_phase1() 7058 return ips_abort_init(ha, index); ips_init_phase1() 7064 ips_setup_funclist(ha); ips_init_phase1() 7066 if ((IPS_IS_MORPHEUS(ha)) || (IPS_IS_MARCO(ha))) { ips_init_phase1() 7068 IsDead = readl(ha->mem_ptr + IPS_REG_I960_MSG1); ips_init_phase1() 7070 ips_reset_morpheus(ha); ips_init_phase1() 7078 if (!(*ha->func.isinit) (ha)) { ips_init_phase1() 7079 if (!(*ha->func.init) (ha)) { ips_init_phase1() 7085 return ips_abort_init(ha, index); ips_init_phase1() 7105 ips_ha_t *ha; ips_init_phase2() local 7107 ha = ips_ha[index]; ips_init_phase2() 7110 if (!ha->active) { ips_init_phase2() 7116 if (request_irq(ha->pcidev->irq, do_ipsintr, IRQF_SHARED, ips_name, ha)) { ips_init_phase2() 7117 IPS_PRINTK(KERN_WARNING, ha->pcidev, ips_init_phase2() 7119 return ips_abort_init(ha, index); ips_init_phase2() 7125 ha->max_cmds = 1; ips_init_phase2() 7126 if (!ips_allocatescbs(ha)) { ips_init_phase2() 7127 IPS_PRINTK(KERN_WARNING, ha->pcidev, ips_init_phase2() 7129 free_irq(ha->pcidev->irq, ha); ips_init_phase2() 7130 return ips_abort_init(ha, index); ips_init_phase2() 7133 if (!ips_hainit(ha)) { ips_init_phase2() 7134 IPS_PRINTK(KERN_WARNING, ha->pcidev, ips_init_phase2() 7136 free_irq(ha->pcidev->irq, ha); ips_init_phase2() 7137 return ips_abort_init(ha, index); ips_init_phase2() 7140 ips_deallocatescbs(ha, 1); ips_init_phase2() 7143 if (!ips_allocatescbs(ha)) { ips_init_phase2() 7144 IPS_PRINTK(KERN_WARNING, ha->pcidev, ips_init_phase2() 7146 free_irq(ha->pcidev->irq, ha); ips_init_phase2() 7147 return ips_abort_init(ha, index); ips_init_phase2()
H A D	gdth_proc.c	10 gdth_ha_str *ha = shost_priv(host); gdth_set_info() local 13 TRACE2(("gdth_set_info() ha %d\n",ha->hanum,)); gdth_set_info() 19 ret_val = gdth_set_asc_info(host, buffer, length, ha); gdth_set_info() 27 int length, gdth_ha_str *ha) gdth_set_asc_info() 39 TRACE2(("gdth_set_asc_info() ha %d\n",ha->hanum)); gdth_set_asc_info() 60 if (ha->hdr[i].present) { gdth_set_asc_info() 66 if (ha->cache_feat & GDT_64BIT) { gdth_set_asc_info() 98 if (ha->cache_feat & GDT_WR_THROUGH) { gdth_set_asc_info() 115 if (!gdth_ioctl_alloc(ha, sizeof(gdth_cpar_str), TRUE, &paddr)) gdth_set_asc_info() 117 pcpar = (gdth_cpar_str *)ha->pscratch; gdth_set_asc_info() 118 memcpy( pcpar, &ha->cpar, sizeof(gdth_cpar_str) ); gdth_set_asc_info() 129 gdth_ioctl_free(ha, GDTH_SCRATCH, ha->pscratch, paddr); gdth_set_asc_info() 140 gdth_ha_str *ha = shost_priv(host); gdth_show_info() local 170 TRACE2(("gdth_get_info() ha %d\n",ha->hanum)); gdth_show_info() 198 ha->hanum, ha->binfo.type_string); gdth_show_info() 203 if (ha->more_proc) gdth_show_info() 205 (u8)(ha->binfo.upd_fw_ver>>24), gdth_show_info() 206 (u8)(ha->binfo.upd_fw_ver>>16), gdth_show_info() 207 (u8)(ha->binfo.upd_fw_ver), gdth_show_info() 208 ha->bfeat.raid ? 'R':'N', gdth_show_info() 209 ha->binfo.upd_revision); gdth_show_info() 211 seq_printf(m, "%d.%02d\n", (u8)(ha->cpar.version>>8), gdth_show_info() 212 (u8)(ha->cpar.version)); gdth_show_info() 214 if (ha->more_proc) gdth_show_info() 218 ha->binfo.ser_no, ha->binfo.memsize / 1024); gdth_show_info() 225 ha->dma32_cnt, ha->dma64_cnt); gdth_show_info() 228 if (ha->more_proc) { gdth_show_info() 233 buf = gdth_ioctl_alloc(ha, GDTH_SCRATCH, FALSE, &paddr); gdth_show_info() 236 for (i = 0; i < ha->bus_cnt; ++i) { gdth_show_info() 245 gdtcmd->u.ioctl.channel = ha->raw[i].address | INVALID_CHANNEL; gdth_show_info() 246 pds->bid = ha->raw[i].local_no; gdth_show_info() 248 pds->entries = ha->raw[i].pdev_cnt; gdth_show_info() 258 for (j = 0; j < ha->raw[i].pdev_cnt; ++j) { gdth_show_info() 261 i, ha->raw[i].id_list[j])); gdth_show_info() 269 ha->raw[i].address | ha->raw[i].id_list[j]; gdth_show_info() 307 i, ha->raw[i].id_list[j])); gdth_show_info() 315 ha->raw[i].address | ha->raw[i].id_list[j]; gdth_show_info() 326 gdth_ioctl_free(ha, GDTH_SCRATCH, buf, paddr); gdth_show_info() 335 buf = gdth_ioctl_alloc(ha, GDTH_SCRATCH, FALSE, &paddr); gdth_show_info() 339 if (!ha->hdr[i].is_logdrv) gdth_show_info() 404 if (!ha->hdr[i].is_arraydrv) gdth_show_info() 407 sprintf(hrec, "%d", ha->hdr[i].master_no); gdth_show_info() 411 gdth_ioctl_free(ha, GDTH_SCRATCH, buf, paddr); gdth_show_info() 420 buf = gdth_ioctl_alloc(ha, GDTH_SCRATCH, FALSE, &paddr); gdth_show_info() 424 if (!(ha->hdr[i].is_arraydrv && ha->hdr[i].is_master)) gdth_show_info() 471 gdth_ioctl_free(ha, GDTH_SCRATCH, buf, paddr); gdth_show_info() 480 buf = gdth_ioctl_alloc(ha, sizeof(gdth_hget_str), FALSE, &paddr); gdth_show_info() 484 if (!ha->hdr[i].is_logdrv || gdth_show_info() 485 (ha->hdr[i].is_arraydrv && !ha->hdr[i].is_master)) gdth_show_info() 499 ha->hdr[i].ldr_no = i; gdth_show_info() 500 ha->hdr[i].rw_attribs = 0; gdth_show_info() 501 ha->hdr[i].start_sec = 0; gdth_show_info() 507 ha->hdr[k].ldr_no = phg->entry[j].log_drive; gdth_show_info() 508 ha->hdr[k].rw_attribs = phg->entry[j].rw_attribs; gdth_show_info() 509 ha->hdr[k].start_sec = phg->entry[j].start_sec; gdth_show_info() 513 gdth_ioctl_free(ha, sizeof(gdth_hget_str), buf, paddr); gdth_show_info() 516 if (!(ha->hdr[i].present)) gdth_show_info() 521 i, ha->hdr[i].ldr_no); gdth_show_info() 526 (u32)(ha->hdr[i].size/2048), ha->hdr[i].start_sec); gdth_show_info() 537 id = gdth_read_event(ha, id, estr); gdth_show_info() 540 if (estr->event_data.eu.driver.ionode == ha->hanum && gdth_show_info() 560 static char *gdth_ioctl_alloc(gdth_ha_str *ha, int size, int scratch, gdth_ioctl_alloc() argument 569 spin_lock_irqsave(&ha->smp_lock, flags); gdth_ioctl_alloc() 571 if (!ha->scratch_busy && size <= GDTH_SCRATCH) { gdth_ioctl_alloc() 572 ha->scratch_busy = TRUE; gdth_ioctl_alloc() 573 ret_val = ha->pscratch; gdth_ioctl_alloc() 574 *paddr = ha->scratch_phys; gdth_ioctl_alloc() 580 ret_val = pci_alloc_consistent(ha->pdev, size, &dma_addr); gdth_ioctl_alloc() 584 spin_unlock_irqrestore(&ha->smp_lock, flags); gdth_ioctl_alloc() 588 static void gdth_ioctl_free(gdth_ha_str *ha, int size, char *buf, u64 paddr) gdth_ioctl_free() argument 592 if (buf == ha->pscratch) { gdth_ioctl_free() 593 spin_lock_irqsave(&ha->smp_lock, flags); gdth_ioctl_free() 594 ha->scratch_busy = FALSE; gdth_ioctl_free() 595 spin_unlock_irqrestore(&ha->smp_lock, flags); gdth_ioctl_free() 597 pci_free_consistent(ha->pdev, size, buf, paddr); gdth_ioctl_free() 602 static int gdth_ioctl_check_bin(gdth_ha_str *ha, u16 size) gdth_ioctl_check_bin() argument 607 spin_lock_irqsave(&ha->smp_lock, flags); gdth_ioctl_check_bin() 610 if (ha->scratch_busy) { gdth_ioctl_check_bin() 611 if (((gdth_iord_str *)ha->pscratch)->size == (u32)size) gdth_ioctl_check_bin() 614 spin_unlock_irqrestore(&ha->smp_lock, flags); gdth_ioctl_check_bin() 619 static void gdth_wait_completion(gdth_ha_str *ha, int busnum, int id) gdth_wait_completion() argument 627 spin_lock_irqsave(&ha->smp_lock, flags); gdth_wait_completion() 630 scp = ha->cmd_tab[i].cmnd; gdth_wait_completion() 638 spin_unlock_irqrestore(&ha->smp_lock, flags); gdth_wait_completion() 641 spin_lock_irqsave(&ha->smp_lock, flags); gdth_wait_completion() 644 spin_unlock_irqrestore(&ha->smp_lock, flags); gdth_wait_completion() 26 gdth_set_asc_info(struct Scsi_Host *host, char *buffer, int length, gdth_ha_str *ha) gdth_set_asc_info() argument
H A D	gdth_proc.h	12 int length, gdth_ha_str *ha); 14 static char *gdth_ioctl_alloc(gdth_ha_str *ha, int size, int scratch, 16 static void gdth_ioctl_free(gdth_ha_str *ha, int size, char *buf, u64 paddr); 17 static void gdth_wait_completion(gdth_ha_str *ha, int busnum, int id);
H A D	qla1280.c	264 DMA addresses that are kept in each ha 407 #define IS_ISP1040(ha) (ha->pdev->device == PCI_DEVICE_ID_QLOGIC_ISP1020) 408 #define IS_ISP1x40(ha) (ha->pdev->device == PCI_DEVICE_ID_QLOGIC_ISP1020 || \ 409 ha->pdev->device == PCI_DEVICE_ID_QLOGIC_ISP1240) 410 #define IS_ISP1x160(ha) (ha->pdev->device == PCI_DEVICE_ID_QLOGIC_ISP10160 || \ 411 ha->pdev->device == PCI_DEVICE_ID_QLOGIC_ISP12160) 606 static int qla1280_read_nvram(struct scsi_qla_host *ha) qla1280_read_nvram() argument 618 printk(KERN_INFO "scsi(%ld): Reading NVRAM\n", ha->host_no); qla1280_read_nvram() 620 wptr = (uint16_t *)&ha->nvram; qla1280_read_nvram() 621 nv = &ha->nvram; qla1280_read_nvram() 624 *wptr = qla1280_get_nvram_word(ha, cnt); qla1280_read_nvram() 636 *wptr = qla1280_get_nvram_word(ha, cnt); qla1280_read_nvram() 652 "settings\n", ha->host_no); qla1280_read_nvram() 653 ha->nvram_valid = 0; qla1280_read_nvram() 655 ha->nvram_valid = 1; qla1280_read_nvram() 694 struct scsi_qla_host *ha; qla1280_info() local 698 ha = (struct scsi_qla_host *)host->hostdata; qla1280_info() 699 bdp = &ql1280_board_tbl[ha->devnum]; qla1280_info() 705 &bdp->name[0], ha->fwver1, ha->fwver2, ha->fwver3, qla1280_info() 725 struct scsi_qla_host *ha = (struct scsi_qla_host *)host->hostdata; qla1280_queuecommand_lck() local 744 status = qla1280_64bit_start_scsi(ha, sp); qla1280_queuecommand_lck() 746 status = qla1280_32bit_start_scsi(ha, sp); qla1280_queuecommand_lck() 763 struct scsi_qla_host *ha = (struct scsi_qla_host *)__data; qla1280_mailbox_timeout() local 765 reg = ha->iobase; qla1280_mailbox_timeout() 767 ha->mailbox_out[0] = RD_REG_WORD(&reg->mailbox0); qla1280_mailbox_timeout() 769 "ictrl %04x, istatus %04x\n", ha->host_no, ha->mailbox_out[0], qla1280_mailbox_timeout() 771 complete(ha->mailbox_wait); qla1280_mailbox_timeout() 775 _qla1280_wait_for_single_command(struct scsi_qla_host *ha, struct srb *sp, _qla1280_wait_for_single_command() argument 781 spin_unlock_irq(ha->host->host_lock); _qla1280_wait_for_single_command() 783 spin_lock_irq(ha->host->host_lock); _qla1280_wait_for_single_command() 793 qla1280_wait_for_single_command(struct scsi_qla_host *ha, struct srb *sp) qla1280_wait_for_single_command() argument 798 return _qla1280_wait_for_single_command(ha, sp, &wait); qla1280_wait_for_single_command() 802 qla1280_wait_for_pending_commands(struct scsi_qla_host *ha, int bus, int target) qla1280_wait_for_pending_commands() argument 816 sp = ha->outstanding_cmds[cnt]; qla1280_wait_for_pending_commands() 825 status = qla1280_wait_for_single_command(ha, sp); qla1280_wait_for_pending_commands() 850 struct scsi_qla_host *ha; qla1280_error_action() local 861 ha = (struct scsi_qla_host *)(CMD_HOST(cmd)->hostdata); qla1280_error_action() 868 RD_REG_WORD(&ha->iobase->istatus)); qla1280_error_action() 871 RD_REG_WORD(&ha->iobase->host_cmd), qla1280_error_action() 872 RD_REG_WORD(&ha->iobase->ictrl), jiffies); qla1280_error_action() 877 ha->host_no, cmd, CMD_HANDLE(cmd), action); qla1280_error_action() 887 if (sp == ha->outstanding_cmds[i]) { qla1280_error_action() 899 "already completed.\n", ha->host_no, bus, qla1280_error_action() 914 qla1280_abort_command(ha, sp, found); qla1280_error_action() 921 "command.\n", ha->host_no, bus, target, lun); qla1280_error_action() 922 if (qla1280_device_reset(ha, bus, target) == 0) { qla1280_error_action() 932 "reset.\n", ha->host_no, bus); qla1280_error_action() 933 if (qla1280_bus_reset(ha, bus) == 0) { qla1280_error_action() 944 ha->host_no); qla1280_error_action() 946 "continue automatically\n", ha->host_no); qla1280_error_action() 948 ha->flags.reset_active = 1; qla1280_error_action() 950 if (qla1280_abort_isp(ha) != 0) { /* it's dead */ qla1280_error_action() 954 ha->flags.reset_active = 0; qla1280_error_action() 967 result = _qla1280_wait_for_single_command(ha, sp, &wait); qla1280_error_action() 973 ha->host_no, bus, target, lun); qla1280_error_action() 987 result = qla1280_wait_for_pending_commands(ha, qla1280_error_action() 1088 qla1280_disable_intrs(struct scsi_qla_host *ha) qla1280_disable_intrs() argument 1090 WRT_REG_WORD(&ha->iobase->ictrl, 0); qla1280_disable_intrs() 1091 RD_REG_WORD(&ha->iobase->ictrl); /* PCI Posted Write flush */ qla1280_disable_intrs() 1096 qla1280_enable_intrs(struct scsi_qla_host *ha) qla1280_enable_intrs() argument 1098 WRT_REG_WORD(&ha->iobase->ictrl, (ISP_EN_INT | ISP_EN_RISC)); qla1280_enable_intrs() 1099 RD_REG_WORD(&ha->iobase->ictrl); /* PCI Posted Write flush */ qla1280_enable_intrs() 1109 struct scsi_qla_host *ha; qla1280_intr_handler() local 1115 ha = (struct scsi_qla_host *)dev_id; qla1280_intr_handler() 1117 spin_lock(ha->host->host_lock); qla1280_intr_handler() 1119 ha->isr_count++; qla1280_intr_handler() 1120 reg = ha->iobase; qla1280_intr_handler() 1122 qla1280_disable_intrs(ha); qla1280_intr_handler() 1127 qla1280_isr(ha, &ha->done_q); qla1280_intr_handler() 1130 if (!list_empty(&ha->done_q)) qla1280_intr_handler() 1131 qla1280_done(ha); qla1280_intr_handler() 1133 spin_unlock(ha->host->host_lock); qla1280_intr_handler() 1135 qla1280_enable_intrs(ha); qla1280_intr_handler() 1143 qla1280_set_target_parameters(struct scsi_qla_host *ha, int bus, int target) qla1280_set_target_parameters() argument 1150 nv = &ha->nvram; qla1280_set_target_parameters() 1166 if (IS_ISP1x160(ha)) { qla1280_set_target_parameters() 1177 status = qla1280_mailbox_command(ha, mr, mb); qla1280_set_target_parameters() 1186 status |= qla1280_mailbox_command(ha, 0x0f, mb); qla1280_set_target_parameters() 1192 ha->host_no, bus, target); qla1280_set_target_parameters() 1211 struct scsi_qla_host *ha; qla1280_slave_configure() local 1219 ha = (struct scsi_qla_host *)device->host->hostdata; qla1280_slave_configure() 1220 nv = &ha->nvram; qla1280_slave_configure() 1222 if (qla1280_check_for_dead_scsi_bus(ha, bus)) qla1280_slave_configure() 1226 (ha->bus_settings[bus].qtag_enables & (BIT_0 << target))) { qla1280_slave_configure() 1227 scsi_change_queue_depth(device, ha->bus_settings[bus].hiwat); qla1280_slave_configure() 1244 if (IS_ISP1x160(ha)) { qla1280_slave_configure() 1251 spin_lock_irqsave(ha->host->host_lock, flags); qla1280_slave_configure() 1253 status = qla1280_set_target_parameters(ha, bus, target); qla1280_slave_configure() 1254 qla1280_get_target_parameters(ha, device); qla1280_slave_configure() 1255 spin_unlock_irqrestore(ha->host->host_lock, flags); qla1280_slave_configure() 1265 * ha = adapter block pointer. 1268 qla1280_done(struct scsi_qla_host *ha) qla1280_done() argument 1277 done_q = &ha->done_q; qla1280_done() 1292 if (!ha->flags.abort_isp_active) qla1280_done() 1293 qla1280_marker(ha, bus, target, 0, MK_SYNC_ID); qla1280_done() 1307 ha->actthreads--; qla1280_done() 1428 * ha = adapter block pointer. 1434 qla1280_initialize_adapter(struct scsi_qla_host *ha) qla1280_initialize_adapter() argument 1444 ha->flags.online = 0; qla1280_initialize_adapter() 1445 ha->flags.disable_host_adapter = 0; qla1280_initialize_adapter() 1446 ha->flags.reset_active = 0; qla1280_initialize_adapter() 1447 ha->flags.abort_isp_active = 0; qla1280_initialize_adapter() 1452 "dual channel lockup workaround\n", ha->host_no); qla1280_initialize_adapter() 1453 ha->flags.use_pci_vchannel = 1; qla1280_initialize_adapter() 1459 if (IS_ISP1040(ha)) qla1280_initialize_adapter() 1464 reg = ha->iobase; qla1280_initialize_adapter() 1472 if (qla1280_read_nvram(ha)) { qla1280_initialize_adapter() 1482 spin_lock_irqsave(ha->host->host_lock, flags); qla1280_initialize_adapter() 1484 status = qla1280_load_firmware(ha); qla1280_initialize_adapter() 1487 ha->host_no); qla1280_initialize_adapter() 1492 dprintk(1, "scsi(%ld): Configure NVRAM parameters\n", ha->host_no); qla1280_initialize_adapter() 1493 qla1280_nvram_config(ha); qla1280_initialize_adapter() 1495 if (ha->flags.disable_host_adapter) { qla1280_initialize_adapter() 1500 status = qla1280_init_rings(ha); qla1280_initialize_adapter() 1505 for (bus = 0; bus < ha->ports; bus++) { qla1280_initialize_adapter() 1506 if (!ha->bus_settings[bus].disable_scsi_reset && qla1280_initialize_adapter() 1507 qla1280_bus_reset(ha, bus) && qla1280_initialize_adapter() 1508 qla1280_bus_reset(ha, bus)) qla1280_initialize_adapter() 1509 ha->bus_settings[bus].scsi_bus_dead = 1; qla1280_initialize_adapter() 1512 ha->flags.online = 1; qla1280_initialize_adapter() 1514 spin_unlock_irqrestore(ha->host->host_lock, flags); qla1280_initialize_adapter() 1529 * ha = adapter block pointer. 1536 qla1280_request_firmware(struct scsi_qla_host *ha) qla1280_request_firmware() argument 1543 spin_unlock_irq(ha->host->host_lock); qla1280_request_firmware() 1546 index = ql1280_board_tbl[ha->devnum].fw_index; qla1280_request_firmware() 1552 err = request_firmware(&fw, fwname, &ha->pdev->dev); qla1280_request_firmware() 1571 ha->fwver1 = fw->data[0]; qla1280_request_firmware() 1572 ha->fwver2 = fw->data[1]; qla1280_request_firmware() 1573 ha->fwver3 = fw->data[2]; qla1280_request_firmware() 1576 spin_lock_irq(ha->host->host_lock); qla1280_request_firmware() 1585 * ha = adapter block pointer. 1591 qla1280_chip_diag(struct scsi_qla_host *ha) qla1280_chip_diag() argument 1594 struct device_reg __iomem *reg = ha->iobase; qla1280_chip_diag() 1600 dprintk(1, "scsi(%ld): Verifying chip\n", ha->host_no); qla1280_chip_diag() 1669 qla1280_enable_intrs(ha); qla1280_chip_diag() 1682 status = qla1280_mailbox_command(ha, 0xff, mb); qla1280_chip_diag() 1701 qla1280_load_firmware_pio(struct scsi_qla_host *ha) qla1280_load_firmware_pio() argument 1711 fw = qla1280_request_firmware(ha); qla1280_load_firmware_pio() 1716 ha->fwstart = __le16_to_cpu(fw_data[2]); qla1280_load_firmware_pio() 1719 risc_address = ha->fwstart; qla1280_load_firmware_pio() 1728 err = qla1280_mailbox_command(ha, BIT_0 | BIT_1 | BIT_2, mb); qla1280_load_firmware_pio() 1731 ha->host_no); qla1280_load_firmware_pio() 1741 qla1280_load_firmware_dma(struct scsi_qla_host *ha) qla1280_load_firmware_dma() argument 1753 tbuf = pci_alloc_consistent(ha->pdev, 8000, &p_tbuf); qla1280_load_firmware_dma() 1758 fw = qla1280_request_firmware(ha); qla1280_load_firmware_dma() 1763 ha->fwstart = __le16_to_cpu(fw_data[2]); qla1280_load_firmware_dma() 1766 risc_address = ha->fwstart; qla1280_load_firmware_dma() 1786 ((__le16 *)ha->request_ring)[i] = fw_data[i]; qla1280_load_firmware_dma() 1791 mb[3] = ha->request_dma & 0xffff; qla1280_load_firmware_dma() 1792 mb[2] = (ha->request_dma >> 16) & 0xffff; qla1280_load_firmware_dma() 1793 mb[7] = pci_dma_hi32(ha->request_dma) & 0xffff; qla1280_load_firmware_dma() 1794 mb[6] = pci_dma_hi32(ha->request_dma) >> 16; qla1280_load_firmware_dma() 1797 (void *)(long)ha->request_dma, qla1280_load_firmware_dma() 1799 err = qla1280_mailbox_command(ha, BIT_4 | BIT_3 | BIT_2 | qla1280_load_firmware_dma() 1803 "segment of f\n", ha->host_no); qla1280_load_firmware_dma() 1816 err = qla1280_mailbox_command(ha, BIT_4 | BIT_3 | BIT_2 | qla1280_load_firmware_dma() 1823 sp = (uint8_t *)ha->request_ring; qla1280_load_firmware_dma() 1844 pci_free_consistent(ha->pdev, 8000, tbuf, p_tbuf); qla1280_load_firmware_dma() 1850 qla1280_start_firmware(struct scsi_qla_host *ha) qla1280_start_firmware() argument 1861 mb[1] = ha->fwstart; qla1280_start_firmware() 1862 err = qla1280_mailbox_command(ha, BIT_1 | BIT_0, mb); qla1280_start_firmware() 1864 printk(KERN_ERR "scsi(%li): RISC checksum failed.\n", ha->host_no); qla1280_start_firmware() 1871 mb[1] = ha->fwstart; qla1280_start_firmware() 1872 err = qla1280_mailbox_command(ha, BIT_1 | BIT_0, &mb[0]); qla1280_start_firmware() 1875 ha->host_no); qla1280_start_firmware() 1882 qla1280_load_firmware(struct scsi_qla_host *ha) qla1280_load_firmware() argument 1887 err = qla1280_chip_diag(ha); qla1280_load_firmware() 1890 if (IS_ISP1040(ha)) qla1280_load_firmware() 1891 err = qla1280_load_firmware_pio(ha); qla1280_load_firmware() 1893 err = qla1280_load_firmware_dma(ha); qla1280_load_firmware() 1896 err = qla1280_start_firmware(ha); qla1280_load_firmware() 1905 * ha = adapter block pointer. 1906 * ha->request_ring = request ring virtual address 1907 * ha->response_ring = response ring virtual address 1908 * ha->request_dma = request ring physical address 1909 * ha->response_dma = response ring physical address 1915 qla1280_init_rings(struct scsi_qla_host *ha) qla1280_init_rings() argument 1923 memset(ha->outstanding_cmds, 0, qla1280_init_rings() 1927 ha->request_ring_ptr = ha->request_ring; qla1280_init_rings() 1928 ha->req_ring_index = 0; qla1280_init_rings() 1929 ha->req_q_cnt = REQUEST_ENTRY_CNT; qla1280_init_rings() 1933 mb[3] = ha->request_dma & 0xffff; qla1280_init_rings() 1934 mb[2] = (ha->request_dma >> 16) & 0xffff; qla1280_init_rings() 1936 mb[7] = pci_dma_hi32(ha->request_dma) & 0xffff; qla1280_init_rings() 1937 mb[6] = pci_dma_hi32(ha->request_dma) >> 16; qla1280_init_rings() 1938 if (!(status = qla1280_mailbox_command(ha, BIT_7 | BIT_6 | BIT_4 | qla1280_init_rings() 1942 ha->response_ring_ptr = ha->response_ring; qla1280_init_rings() 1943 ha->rsp_ring_index = 0; qla1280_init_rings() 1947 mb[3] = ha->response_dma & 0xffff; qla1280_init_rings() 1948 mb[2] = (ha->response_dma >> 16) & 0xffff; qla1280_init_rings() 1950 mb[7] = pci_dma_hi32(ha->response_dma) & 0xffff; qla1280_init_rings() 1951 mb[6] = pci_dma_hi32(ha->response_dma) >> 16; qla1280_init_rings() 1952 status = qla1280_mailbox_command(ha, BIT_7 | BIT_6 | BIT_5 | qla1280_init_rings() 2015 qla1280_set_target_defaults(struct scsi_qla_host *ha, int bus, int target) qla1280_set_target_defaults() argument 2017 struct nvram *nv = &ha->nvram; qla1280_set_target_defaults() 2031 if (IS_ISP1x160(ha)) { qla1280_set_target_defaults() 2046 qla1280_set_defaults(struct scsi_qla_host *ha) qla1280_set_defaults() argument 2048 struct nvram *nv = &ha->nvram; qla1280_set_defaults() 2070 if (IS_ISP1040(ha)) qla1280_set_defaults() 2075 if (IS_ISP1x160(ha)) qla1280_set_defaults() 2085 if (IS_ISP1040(ha)) { qla1280_set_defaults() 2095 qla1280_set_target_defaults(ha, bus, target); qla1280_set_defaults() 2100 qla1280_config_target(struct scsi_qla_host *ha, int bus, int target) qla1280_config_target() argument 2102 struct nvram *nv = &ha->nvram; qla1280_config_target() 2119 if (IS_ISP1x160(ha)) qla1280_config_target() 2124 status = qla1280_mailbox_command(ha, 0x0f, mb); qla1280_config_target() 2129 ha->bus_settings[bus].qtag_enables |= flag; qla1280_config_target() 2132 if (IS_ISP1x160(ha)) { qla1280_config_target() 2134 ha->bus_settings[bus].device_enables |= flag; qla1280_config_target() 2135 ha->bus_settings[bus].lun_disables |= 0; qla1280_config_target() 2138 ha->bus_settings[bus].device_enables |= flag; qla1280_config_target() 2141 ha->bus_settings[bus].lun_disables |= flag; qla1280_config_target() 2151 status |= qla1280_mailbox_command(ha, 0x0f, mb); qla1280_config_target() 2158 qla1280_config_bus(struct scsi_qla_host *ha, int bus) qla1280_config_bus() argument 2160 struct nvram *nv = &ha->nvram; qla1280_config_bus() 2165 ha->bus_settings[bus].disable_scsi_reset = qla1280_config_bus() 2169 ha->bus_settings[bus].id = nv->bus[bus].config_1.initiator_id; qla1280_config_bus() 2171 mb[1] = bus ? ha->bus_settings[bus].id | BIT_7 : qla1280_config_bus() 2172 ha->bus_settings[bus].id; qla1280_config_bus() 2173 status = qla1280_mailbox_command(ha, BIT_1 | BIT_0, &mb[0]); qla1280_config_bus() 2176 ha->bus_settings[bus].bus_reset_delay = qla1280_config_bus() 2180 ha->bus_settings[bus].hiwat = nv->bus[bus].max_queue_depth - 1; qla1280_config_bus() 2184 status |= qla1280_config_target(ha, bus, target); qla1280_config_bus() 2190 qla1280_nvram_config(struct scsi_qla_host *ha) qla1280_nvram_config() argument 2192 struct device_reg __iomem *reg = ha->iobase; qla1280_nvram_config() 2193 struct nvram *nv = &ha->nvram; qla1280_nvram_config() 2199 if (ha->nvram_valid) { qla1280_nvram_config() 2207 qla1280_set_defaults(ha); qla1280_nvram_config() 2213 ha->flags.disable_risc_code_load = qla1280_nvram_config() 2216 if (IS_ISP1040(ha)) { qla1280_nvram_config() 2241 if (ha->ports > 1) qla1280_nvram_config() 2259 status |= qla1280_mailbox_command(ha, BIT_1 | BIT_0, &mb[0]); qla1280_nvram_config() 2261 if (IS_ISP1x40(ha)) { qla1280_nvram_config() 2265 status |= qla1280_mailbox_command(ha, BIT_1 | BIT_0, mb); qla1280_nvram_config() 2276 "workaround\n", ha->host_no); qla1280_nvram_config() 2280 status |= qla1280_mailbox_command(ha, BIT_1 | BIT_0, mb); qla1280_nvram_config() 2288 status |= qla1280_mailbox_command(ha, BIT_7 | BIT_6 | BIT_2 | qla1280_nvram_config() 2295 status |= qla1280_mailbox_command(ha, BIT_2 | BIT_1 | BIT_0, &mb[0]); qla1280_nvram_config() 2309 status |= qla1280_mailbox_command(ha, BIT_2 | BIT_1 | BIT_0, mb); qla1280_nvram_config() 2313 status |= qla1280_mailbox_command(ha, BIT_1 | BIT_0, mb); qla1280_nvram_config() 2319 status |= qla1280_mailbox_command(ha, BIT_2 | BIT_1 | BIT_0, mb); qla1280_nvram_config() 2323 status |= qla1280_mailbox_command(ha, BIT_1 | BIT_0, mb); qla1280_nvram_config() 2329 status |= qla1280_mailbox_command(ha, BIT_2 | BIT_1 | BIT_0, mb); qla1280_nvram_config() 2331 for (bus = 0; bus < ha->ports; bus++) qla1280_nvram_config() 2332 status |= qla1280_config_bus(ha, bus); qla1280_nvram_config() 2347 * ha = adapter block pointer. 2354 qla1280_get_nvram_word(struct scsi_qla_host *ha, uint32_t address) qla1280_get_nvram_word() argument 2362 data = le16_to_cpu(qla1280_nvram_request(ha, nv_cmd)); qla1280_get_nvram_word() 2375 * ha = adapter block pointer. 2385 qla1280_nvram_request(struct scsi_qla_host *ha, uint32_t nv_cmd) qla1280_nvram_request() argument 2387 struct device_reg __iomem *reg = ha->iobase; qla1280_nvram_request() 2397 qla1280_nv_write(ha, NV_DATA_OUT); qla1280_nvram_request() 2399 qla1280_nv_write(ha, 0); qla1280_nvram_request() 2428 qla1280_nv_write(struct scsi_qla_host *ha, uint16_t data) qla1280_nv_write() argument 2430 struct device_reg __iomem *reg = ha->iobase; qla1280_nv_write() 2448 * ha = adapter block pointer. 2459 qla1280_mailbox_command(struct scsi_qla_host *ha, uint8_t mr, uint16_t *mb) qla1280_mailbox_command() argument 2461 struct device_reg __iomem *reg = ha->iobase; qla1280_mailbox_command() 2472 if (ha->mailbox_wait) { qla1280_mailbox_command() 2475 ha->mailbox_wait = &wait; qla1280_mailbox_command() 2499 timer.data = (unsigned long)ha; qla1280_mailbox_command() 2503 spin_unlock_irq(ha->host->host_lock); qla1280_mailbox_command() 2510 spin_lock_irq(ha->host->host_lock); qla1280_mailbox_command() 2512 ha->mailbox_wait = NULL; qla1280_mailbox_command() 2515 if (ha->mailbox_out[0] != MBS_CMD_CMP) { qla1280_mailbox_command() 2519 mb[0], ha->mailbox_out[0], RD_REG_WORD(&reg->istatus)); qla1280_mailbox_command() 2531 iptr = (uint16_t *) &ha->mailbox_out[0]; qla1280_mailbox_command() 2535 if (ha->flags.reset_marker) qla1280_mailbox_command() 2536 qla1280_rst_aen(ha); qla1280_mailbox_command() 2551 * ha = adapter block pointer. 2554 qla1280_poll(struct scsi_qla_host *ha) qla1280_poll() argument 2556 struct device_reg __iomem *reg = ha->iobase; qla1280_poll() 2565 qla1280_isr(ha, &done_q); qla1280_poll() 2567 if (!ha->mailbox_wait) { qla1280_poll() 2568 if (ha->flags.reset_marker) qla1280_poll() 2569 qla1280_rst_aen(ha); qla1280_poll() 2573 qla1280_done(ha); qla1280_poll() 2583 * ha = adapter block pointer. 2590 qla1280_bus_reset(struct scsi_qla_host *ha, int bus) qla1280_bus_reset() argument 2600 ha->host_no, bus); qla1280_bus_reset() 2602 reset_delay = ha->bus_settings[bus].bus_reset_delay; qla1280_bus_reset() 2606 status = qla1280_mailbox_command(ha, BIT_2 | BIT_1 | BIT_0, &mb[0]); qla1280_bus_reset() 2609 if (ha->bus_settings[bus].failed_reset_count > 2) qla1280_bus_reset() 2610 ha->bus_settings[bus].scsi_bus_dead = 1; qla1280_bus_reset() 2611 ha->bus_settings[bus].failed_reset_count++; qla1280_bus_reset() 2613 spin_unlock_irq(ha->host->host_lock); qla1280_bus_reset() 2615 spin_lock_irq(ha->host->host_lock); qla1280_bus_reset() 2617 ha->bus_settings[bus].scsi_bus_dead = 0; qla1280_bus_reset() 2618 ha->bus_settings[bus].failed_reset_count = 0; qla1280_bus_reset() 2619 ha->bus_settings[bus].reset_marker = 0; qla1280_bus_reset() 2621 qla1280_marker(ha, bus, 0, 0, MK_SYNC_ALL); qla1280_bus_reset() 2642 * ha = adapter block pointer. 2650 qla1280_device_reset(struct scsi_qla_host *ha, int bus, int target) qla1280_device_reset() argument 2660 status = qla1280_mailbox_command(ha, BIT_2 | BIT_1 | BIT_0, &mb[0]); qla1280_device_reset() 2663 qla1280_marker(ha, bus, target, 0, MK_SYNC_ID); qla1280_device_reset() 2677 * ha = adapter block pointer. 2684 qla1280_abort_command(struct scsi_qla_host *ha, struct srb * sp, int handle) qla1280_abort_command() argument 2702 status = qla1280_mailbox_command(ha, 0x0f, &mb[0]); qla1280_abort_command() 2719 * ha = adapter block pointer. 2722 qla1280_reset_adapter(struct scsi_qla_host *ha) qla1280_reset_adapter() argument 2724 struct device_reg __iomem *reg = ha->iobase; qla1280_reset_adapter() 2729 ha->flags.online = 0; qla1280_reset_adapter() 2743 * ha = adapter block pointer. 2750 qla1280_marker(struct scsi_qla_host *ha, int bus, int id, int lun, u8 type) qla1280_marker() argument 2757 if ((pkt = (struct mrk_entry *) qla1280_req_pkt(ha))) { qla1280_marker() 2765 qla1280_isp_cmd(ha); qla1280_marker() 2778 * ha = adapter block pointer. 2786 qla1280_64bit_start_scsi(struct scsi_qla_host *ha, struct srb * sp) qla1280_64bit_start_scsi() argument 2788 struct device_reg __iomem *reg = ha->iobase; qla1280_64bit_start_scsi() 2815 if ((req_cnt + 2) >= ha->req_q_cnt) { qla1280_64bit_start_scsi() 2818 if (ha->req_ring_index < cnt) qla1280_64bit_start_scsi() 2819 ha->req_q_cnt = cnt - ha->req_ring_index; qla1280_64bit_start_scsi() 2821 ha->req_q_cnt = qla1280_64bit_start_scsi() 2822 REQUEST_ENTRY_CNT - (ha->req_ring_index - cnt); qla1280_64bit_start_scsi() 2826 ha->req_q_cnt, seg_cnt); qla1280_64bit_start_scsi() 2829 if ((req_cnt + 2) >= ha->req_q_cnt) { qla1280_64bit_start_scsi() 2832 "0x%xreq_cnt=0x%x", ha->req_ring_index, ha->req_q_cnt, qla1280_64bit_start_scsi() 2839 ha->outstanding_cmds[cnt] != NULL; cnt++); qla1280_64bit_start_scsi() 2844 "OUTSTANDING ARRAY, req_q_cnt=0x%x", ha->req_q_cnt); qla1280_64bit_start_scsi() 2848 ha->outstanding_cmds[cnt] = sp; qla1280_64bit_start_scsi() 2849 ha->req_q_cnt -= req_cnt; qla1280_64bit_start_scsi() 2861 pkt = (cmd_a64_entry_t *) ha->request_ring_ptr; qla1280_64bit_start_scsi() 2865 pkt->sys_define = (uint8_t) ha->req_ring_index; qla1280_64bit_start_scsi() 2915 if (ha->flags.use_pci_vchannel) for_each_sg() 2916 sn_pci_set_vchan(ha->pdev, for_each_sg() 2948 ha->req_ring_index++; 2949 if (ha->req_ring_index == REQUEST_ENTRY_CNT) { 2950 ha->req_ring_index = 0; 2951 ha->request_ring_ptr = 2952 ha->request_ring; 2954 ha->request_ring_ptr++; 2956 pkt = (cmd_a64_entry_t *)ha->request_ring_ptr; 2966 (uint8_t)ha->req_ring_index; 2977 if (ha->flags.use_pci_vchannel) for_each_sg() 2978 sn_pci_set_vchan(ha->pdev, for_each_sg() 3008 ha->req_ring_index++; 3009 if (ha->req_ring_index == REQUEST_ENTRY_CNT) { 3010 ha->req_ring_index = 0; 3011 ha->request_ring_ptr = ha->request_ring; 3013 ha->request_ring_ptr++; 3019 ha->actthreads++; 3020 WRT_REG_WORD(&reg->mailbox4, ha->req_ring_index); 3047 * ha = adapter block pointer. 3054 qla1280_32bit_start_scsi(struct scsi_qla_host *ha, struct srb * sp) qla1280_32bit_start_scsi() argument 3056 struct device_reg __iomem *reg = ha->iobase; qla1280_32bit_start_scsi() 3091 if ((req_cnt + 2) >= ha->req_q_cnt) { qla1280_32bit_start_scsi() 3094 if (ha->req_ring_index < cnt) qla1280_32bit_start_scsi() 3095 ha->req_q_cnt = cnt - ha->req_ring_index; qla1280_32bit_start_scsi() 3097 ha->req_q_cnt = qla1280_32bit_start_scsi() 3098 REQUEST_ENTRY_CNT - (ha->req_ring_index - cnt); qla1280_32bit_start_scsi() 3102 ha->req_q_cnt, seg_cnt); qla1280_32bit_start_scsi() 3104 if ((req_cnt + 2) >= ha->req_q_cnt) { qla1280_32bit_start_scsi() 3107 "req_q_cnt=0x%x, req_cnt=0x%x", ha->req_ring_index, qla1280_32bit_start_scsi() 3108 ha->req_q_cnt, req_cnt); qla1280_32bit_start_scsi() 3114 (ha->outstanding_cmds[cnt] != 0); cnt++) ; qla1280_32bit_start_scsi() 3119 "ARRAY, req_q_cnt=0x%x\n", ha->req_q_cnt); qla1280_32bit_start_scsi() 3124 ha->outstanding_cmds[cnt] = sp; qla1280_32bit_start_scsi() 3125 ha->req_q_cnt -= req_cnt; qla1280_32bit_start_scsi() 3130 pkt = (struct cmd_entry *) ha->request_ring_ptr; qla1280_32bit_start_scsi() 3134 pkt->sys_define = (uint8_t) ha->req_ring_index; qla1280_32bit_start_scsi() 3201 ha->req_ring_index++; 3202 if (ha->req_ring_index == REQUEST_ENTRY_CNT) { 3203 ha->req_ring_index = 0; 3204 ha->request_ring_ptr = 3205 ha->request_ring; 3207 ha->request_ring_ptr++; 3209 pkt = (struct cmd_entry *)ha->request_ring_ptr; 3220 (uint8_t) ha->req_ring_index; 3254 qla1280_dump_buffer(5, (char *)ha->request_ring_ptr, 3258 ha->req_ring_index++; 3259 if (ha->req_ring_index == REQUEST_ENTRY_CNT) { 3260 ha->req_ring_index = 0; 3261 ha->request_ring_ptr = ha->request_ring; 3263 ha->request_ring_ptr++; 3269 ha->actthreads++; 3270 WRT_REG_WORD(&reg->mailbox4, ha->req_ring_index); 3290 * ha = adapter block pointer. 3296 qla1280_req_pkt(struct scsi_qla_host *ha) qla1280_req_pkt() argument 3298 struct device_reg __iomem *reg = ha->iobase; qla1280_req_pkt() 3310 if (ha->req_q_cnt > 0) { qla1280_req_pkt() 3313 if (ha->req_ring_index < cnt) qla1280_req_pkt() 3314 ha->req_q_cnt = cnt - ha->req_ring_index; qla1280_req_pkt() 3316 ha->req_q_cnt = qla1280_req_pkt() 3317 REQUEST_ENTRY_CNT - (ha->req_ring_index - cnt); qla1280_req_pkt() 3321 if (ha->req_q_cnt > 0) { qla1280_req_pkt() 3322 ha->req_q_cnt--; qla1280_req_pkt() 3323 pkt = ha->request_ring_ptr; qla1280_req_pkt() 3333 pkt->sys_define = (uint8_t) ha->req_ring_index; qla1280_req_pkt() 3344 qla1280_poll(ha); qla1280_req_pkt() 3361 * ha = adapter block pointer. 3364 qla1280_isp_cmd(struct scsi_qla_host *ha) qla1280_isp_cmd() argument 3366 struct device_reg __iomem *reg = ha->iobase; qla1280_isp_cmd() 3371 qla1280_dump_buffer(5, (char *)ha->request_ring_ptr, qla1280_isp_cmd() 3375 ha->req_ring_index++; qla1280_isp_cmd() 3376 if (ha->req_ring_index == REQUEST_ENTRY_CNT) { qla1280_isp_cmd() 3377 ha->req_ring_index = 0; qla1280_isp_cmd() 3378 ha->request_ring_ptr = ha->request_ring; qla1280_isp_cmd() 3380 ha->request_ring_ptr++; qla1280_isp_cmd() 3395 WRT_REG_WORD(&reg->mailbox4, ha->req_ring_index); qla1280_isp_cmd() 3410 * ha = adapter block pointer. 3414 qla1280_isr(struct scsi_qla_host *ha, struct list_head *done_q) qla1280_isr() argument 3416 struct device_reg __iomem *reg = ha->iobase; qla1280_isr() 3468 if (ha->flags.online) { qla1280_isr() 3474 sp = ha->outstanding_cmds[index]; qla1280_isr() 3480 ha->outstanding_cmds[index] = NULL; qla1280_isr() 3499 ha->flags.reset_marker = 1; qla1280_isr() 3501 ha->bus_settings[index].reset_marker = 1; qla1280_isr() 3537 ha->flags.reset_marker = 1; qla1280_isr() 3539 ha->bus_settings[index].reset_marker = 1; qla1280_isr() 3551 memcpy((uint16_t *) ha->mailbox_out, wptr, qla1280_isr() 3555 if(ha->mailbox_wait != NULL) qla1280_isr() 3556 complete(ha->mailbox_wait); qla1280_isr() 3568 if (!(ha->flags.online && !ha->mailbox_wait)) { qla1280_isr() 3576 while (ha->rsp_ring_index != mailbox[5]) { qla1280_isr() 3577 pkt = ha->response_ring_ptr; qla1280_isr() 3579 dprintk(5, "qla1280_isr: ha->rsp_ring_index = 0x%x, mailbox[5]" qla1280_isr() 3580 " = 0x%x\n", ha->rsp_ring_index, mailbox[5]); qla1280_isr() 3587 dprintk(2, "qla1280_isr: ha->rsp_ring_index = " qla1280_isr() 3590 ha->rsp_ring_index, mailbox[5], qla1280_isr() 3595 dprintk(2, "qla1280_isr: ha->rsp_ring_index = " qla1280_isr() 3597 ha->rsp_ring_index, mailbox[5]); qla1280_isr() 3605 ha->outstanding_cmds[pkt->handle]->cmd, qla1280_isr() 3608 qla1280_status_entry(ha, pkt, done_q); qla1280_isr() 3610 qla1280_error_entry(ha, pkt, done_q); qla1280_isr() 3612 ha->rsp_ring_index++; qla1280_isr() 3613 if (ha->rsp_ring_index == RESPONSE_ENTRY_CNT) { qla1280_isr() 3614 ha->rsp_ring_index = 0; qla1280_isr() 3615 ha->response_ring_ptr = ha->response_ring; qla1280_isr() 3617 ha->response_ring_ptr++; qla1280_isr() 3618 WRT_REG_WORD(&reg->mailbox5, ha->rsp_ring_index); qla1280_isr() 3631 * ha = adapter block pointer. 3634 qla1280_rst_aen(struct scsi_qla_host *ha) qla1280_rst_aen() argument 3640 if (ha->flags.online && !ha->flags.reset_active && qla1280_rst_aen() 3641 !ha->flags.abort_isp_active) { qla1280_rst_aen() 3642 ha->flags.reset_active = 1; qla1280_rst_aen() 3643 while (ha->flags.reset_marker) { qla1280_rst_aen() 3645 ha->flags.reset_marker = 0; qla1280_rst_aen() 3646 for (bus = 0; bus < ha->ports && qla1280_rst_aen() 3647 !ha->flags.reset_marker; bus++) { qla1280_rst_aen() 3648 if (ha->bus_settings[bus].reset_marker) { qla1280_rst_aen() 3649 ha->bus_settings[bus].reset_marker = 0; qla1280_rst_aen() 3650 qla1280_marker(ha, bus, 0, 0, qla1280_rst_aen() 3666 * ha = adapter block pointer. 3671 qla1280_status_entry(struct scsi_qla_host *ha, struct response *pkt, qla1280_status_entry() argument 3686 sp = ha->outstanding_cmds[handle]; qla1280_status_entry() 3696 ha->outstanding_cmds[handle] = NULL; qla1280_status_entry() 3764 * ha = adapter block pointer. 3769 qla1280_error_entry(struct scsi_qla_host *ha, struct response *pkt, qla1280_error_entry() argument 3788 sp = ha->outstanding_cmds[handle]; qla1280_error_entry() 3794 ha->outstanding_cmds[handle] = NULL; qla1280_error_entry() 3827 * ha = adapter block pointer. 3833 qla1280_abort_isp(struct scsi_qla_host *ha) qla1280_abort_isp() argument 3835 struct device_reg __iomem *reg = ha->iobase; qla1280_abort_isp() 3843 if (ha->flags.abort_isp_active || !ha->flags.online) qla1280_abort_isp() 3846 ha->flags.abort_isp_active = 1; qla1280_abort_isp() 3849 qla1280_disable_intrs(ha); qla1280_abort_isp() 3854 ha->host_no); qla1280_abort_isp() 3858 sp = ha->outstanding_cmds[cnt]; qla1280_abort_isp() 3863 ha->outstanding_cmds[cnt] = NULL; qla1280_abort_isp() 3864 list_add_tail(&sp->list, &ha->done_q); qla1280_abort_isp() 3868 qla1280_done(ha); qla1280_abort_isp() 3870 status = qla1280_load_firmware(ha); qla1280_abort_isp() 3875 qla1280_nvram_config (ha); qla1280_abort_isp() 3877 status = qla1280_init_rings(ha); qla1280_abort_isp() 3882 for (bus = 0; bus < ha->ports; bus++) qla1280_abort_isp() 3883 qla1280_bus_reset(ha, bus); qla1280_abort_isp() 3885 ha->flags.abort_isp_active = 0; qla1280_abort_isp() 3890 qla1280_reset_adapter(ha); qla1280_abort_isp() 3939 qla1280_check_for_dead_scsi_bus(struct scsi_qla_host *ha, unsigned int bus) qla1280_check_for_dead_scsi_bus() argument 3942 struct device_reg __iomem *reg = ha->iobase; qla1280_check_for_dead_scsi_bus() 3944 if (ha->bus_settings[bus].scsi_bus_dead) { qla1280_check_for_dead_scsi_bus() 3953 ha->bus_settings[bus].scsi_bus_dead = 1; qla1280_check_for_dead_scsi_bus() 3956 ha->bus_settings[bus].scsi_bus_dead = 0; qla1280_check_for_dead_scsi_bus() 3957 ha->bus_settings[bus].failed_reset_count = 0; qla1280_check_for_dead_scsi_bus() 3964 qla1280_get_target_parameters(struct scsi_qla_host *ha, qla1280_get_target_parameters() argument 3978 qla1280_mailbox_command(ha, BIT_6 | BIT_3 | BIT_2 | BIT_1 | BIT_0, qla1280_get_target_parameters() 3981 printk(KERN_INFO "scsi(%li:%d:%d:%d):", ha->host_no, bus, target, lun); qla1280_get_target_parameters() 4032 struct scsi_qla_host *ha; __qla1280_print_scsi_cmd() local 4038 ha = (struct scsi_qla_host *)host->hostdata; __qla1280_print_scsi_cmd() 4070 ql1280_dump_device(struct scsi_qla_host *ha) ql1280_dump_device() argument 4080 if ((sp = ha->outstanding_cmds[i]) == NULL) ql1280_dump_device() 4231 struct scsi_qla_host *ha; qla1280_probe_one() local 4253 host = scsi_host_alloc(&qla1280_driver_template, sizeof(*ha)); qla1280_probe_one() 4260 ha = (struct scsi_qla_host *)host->hostdata; qla1280_probe_one() 4261 memset(ha, 0, sizeof(struct scsi_qla_host)); qla1280_probe_one() 4263 ha->pdev = pdev; qla1280_probe_one() 4264 ha->devnum = devnum; /* specifies microcode load address */ qla1280_probe_one() 4267 if (pci_set_dma_mask(ha->pdev, DMA_BIT_MASK(64))) { qla1280_probe_one() 4268 if (pci_set_dma_mask(ha->pdev, DMA_BIT_MASK(32))) { qla1280_probe_one() 4270 "suitable DMA mask - aborting\n", ha->host_no); qla1280_probe_one() 4276 ha->host_no); qla1280_probe_one() 4278 if (pci_set_dma_mask(ha->pdev, DMA_BIT_MASK(32))) { qla1280_probe_one() 4280 "suitable DMA mask - aborting\n", ha->host_no); qla1280_probe_one() 4286 ha->request_ring = pci_alloc_consistent(ha->pdev, qla1280_probe_one() 4288 &ha->request_dma); qla1280_probe_one() 4289 if (!ha->request_ring) { qla1280_probe_one() 4294 ha->response_ring = pci_alloc_consistent(ha->pdev, qla1280_probe_one() 4296 &ha->response_dma); qla1280_probe_one() 4297 if (!ha->response_ring) { qla1280_probe_one() 4302 ha->ports = bdp->numPorts; qla1280_probe_one() 4304 ha->host = host; qla1280_probe_one() 4305 ha->host_no = host->host_no; qla1280_probe_one() 4317 ha->mmpbase = pci_ioremap_bar(ha->pdev, 1); qla1280_probe_one() 4318 if (!ha->mmpbase) { qla1280_probe_one() 4323 host->base = (unsigned long)ha->mmpbase; qla1280_probe_one() 4324 ha->iobase = (struct device_reg __iomem *)ha->mmpbase; qla1280_probe_one() 4326 host->io_port = pci_resource_start(ha->pdev, 0); qla1280_probe_one() 4334 ha->iobase = (struct device_reg *)host->io_port; qla1280_probe_one() 4337 INIT_LIST_HEAD(&ha->done_q); qla1280_probe_one() 4340 qla1280_disable_intrs(ha); qla1280_probe_one() 4343 "qla1280", ha)) { qla1280_probe_one() 4350 if (qla1280_initialize_adapter(ha)) { qla1280_probe_one() 4356 host->this_id = ha->bus_settings[0].id; qla1280_probe_one() 4368 qla1280_disable_intrs(ha); qla1280_probe_one() 4370 free_irq(pdev->irq, ha); qla1280_probe_one() 4373 iounmap(ha->mmpbase); qla1280_probe_one() 4378 pci_free_consistent(ha->pdev, qla1280_probe_one() 4380 ha->response_ring, ha->response_dma); qla1280_probe_one() 4382 pci_free_consistent(ha->pdev, qla1280_probe_one() 4384 ha->request_ring, ha->request_dma); qla1280_probe_one() 4398 struct scsi_qla_host *ha = (struct scsi_qla_host *)host->hostdata; qla1280_remove_one() local 4402 qla1280_disable_intrs(ha); qla1280_remove_one() 4404 free_irq(pdev->irq, ha); qla1280_remove_one() 4407 iounmap(ha->mmpbase); qla1280_remove_one() 4412 pci_free_consistent(ha->pdev, qla1280_remove_one() 4414 ha->request_ring, ha->request_dma); qla1280_remove_one() 4415 pci_free_consistent(ha->pdev, qla1280_remove_one() 4417 ha->response_ring, ha->response_dma); qla1280_remove_one()
H A D	eata.c	1084 struct hostdata *ha; port_detect() local 1278 ha = (struct hostdata *)shost->hostdata; port_detect() 1280 memset(ha, 0, sizeof(struct hostdata)); port_detect() 1281 ha->subversion = subversion; port_detect() 1282 ha->protocol_rev = protocol_rev; port_detect() 1283 ha->is_pci = is_pci; port_detect() 1284 ha->pdev = pdev; port_detect() 1285 ha->board_number = j; port_detect() 1287 if (ha->subversion == ESA) port_detect() 1302 strcpy(ha->board_name, name); port_detect() 1307 ha->board_name, shost->sg_tablesize); port_detect() 1314 ha->board_name, shost->can_queue); port_detect() 1340 ha->cp[i].cp_dma_addr = pci_map_single(ha->pdev, port_detect() 1341 &ha->cp[i], port_detect() 1348 ha->cp[i].sglist = kmalloc(sz, gfp_mask); port_detect() 1349 if (!ha->cp[i].sglist) { port_detect() 1352 ha->board_name, i); port_detect() 1357 if (!(ha->sp_cpu_addr = pci_alloc_consistent(ha->pdev, port_detect() 1359 &ha->sp_dma_addr))) { port_detect() 1360 printk("%s: pci_alloc_consistent failed, detaching.\n", ha->board_name); port_detect() 1385 ha->board_name, ha->protocol_rev, bus_type, port_detect() 1392 ha->board_name, shost->max_id, shost->max_lun); port_detect() 1396 ha->board_name, i, info.host_addr[3 - i]); port_detect() 1416 if (ha->pdev) { port_detect() 1417 pci_set_master(ha->pdev); port_detect() 1418 if (pci_set_dma_mask(ha->pdev, DMA_BIT_MASK(32))) port_detect() 1420 ha->board_name); port_detect() 1598 static void map_dma(unsigned int i, struct hostdata *ha) map_dma() argument 1606 cpp = &ha->cp[i]; map_dma() 1612 H2DEV(pci_map_single(ha->pdev, SCpnt->sense_buffer, map_dma() 1622 count = pci_map_sg(ha->pdev, scsi_sglist(SCpnt), scsi_sg_count(SCpnt), map_dma() 1632 cpp->data_address = H2DEV(pci_map_single(ha->pdev, cpp->sglist, 1639 static void unmap_dma(unsigned int i, struct hostdata *ha) unmap_dma() argument 1645 cpp = &ha->cp[i]; unmap_dma() 1650 pci_unmap_single(ha->pdev, DEV2H(cpp->sense_addr), unmap_dma() 1654 pci_unmap_sg(ha->pdev, scsi_sglist(SCpnt), scsi_sg_count(SCpnt), unmap_dma() 1661 pci_unmap_single(ha->pdev, DEV2H(cpp->data_address), unmap_dma() 1665 static void sync_dma(unsigned int i, struct hostdata *ha) sync_dma() argument 1671 cpp = &ha->cp[i]; sync_dma() 1676 pci_dma_sync_single_for_cpu(ha->pdev, DEV2H(cpp->sense_addr), sync_dma() 1681 pci_dma_sync_sg_for_cpu(ha->pdev, scsi_sglist(SCpnt), sync_dma() 1688 pci_dma_sync_single_for_cpu(ha->pdev, sync_dma() 1693 static void scsi_to_dev_dir(unsigned int i, struct hostdata *ha) scsi_to_dev_dir() argument 1712 cpp = &ha->cp[i]; scsi_to_dev_dir() 1731 ha->board_name); scsi_to_dev_dir() 1752 struct hostdata *ha = (struct hostdata *)shost->hostdata; eata2x_queuecommand_lck() local 1758 ha->board_name, SCpnt); eata2x_queuecommand_lck() 1762 i = ha->last_cp_used + 1; eata2x_queuecommand_lck() 1767 if (ha->cp_stat[i] == FREE) { eata2x_queuecommand_lck() 1768 ha->last_cp_used = i; eata2x_queuecommand_lck() 1774 printk("%s: qcomm, no free mailbox.\n", ha->board_name); eata2x_queuecommand_lck() 1779 cpp = &ha->cp[i]; eata2x_queuecommand_lck() 1784 cpp->sp_dma_addr = H2DEV(ha->sp_dma_addr); eata2x_queuecommand_lck() 1808 scsi_to_dev_dir(i, ha); eata2x_queuecommand_lck() 1811 map_dma(i, ha); eata2x_queuecommand_lck() 1815 ha->cp_stat[i] = READY; eata2x_queuecommand_lck() 1816 flush_dev(SCpnt->device, blk_rq_pos(SCpnt->request), ha, 0); eata2x_queuecommand_lck() 1822 unmap_dma(i, ha); eata2x_queuecommand_lck() 1828 ha->cp_stat[i] = IN_USE; eata2x_queuecommand_lck() 1837 struct hostdata *ha = (struct hostdata *)shost->hostdata; eata2x_eh_abort() local 1849 panic("%s: abort, invalid SCarg->host_scribble.\n", ha->board_name); eata2x_eh_abort() 1852 printk("%s: abort, timeout error.\n", ha->board_name); eata2x_eh_abort() 1856 if (ha->cp_stat[i] == FREE) { eata2x_eh_abort() 1857 printk("%s: abort, mbox %d is free.\n", ha->board_name, i); eata2x_eh_abort() 1861 if (ha->cp_stat[i] == IN_USE) { eata2x_eh_abort() 1862 printk("%s: abort, mbox %d is in use.\n", ha->board_name, i); eata2x_eh_abort() 1864 if (SCarg != ha->cp[i].SCpnt) eata2x_eh_abort() 1866 ha->board_name, i, SCarg, ha->cp[i].SCpnt); eata2x_eh_abort() 1870 ha->board_name, i); eata2x_eh_abort() 1875 if (ha->cp_stat[i] == IN_RESET) { eata2x_eh_abort() 1876 printk("%s: abort, mbox %d is in reset.\n", ha->board_name, i); eata2x_eh_abort() 1880 if (ha->cp_stat[i] == LOCKED) { eata2x_eh_abort() 1881 printk("%s: abort, mbox %d is locked.\n", ha->board_name, i); eata2x_eh_abort() 1885 if (ha->cp_stat[i] == READY || ha->cp_stat[i] == ABORTING) { eata2x_eh_abort() 1886 unmap_dma(i, ha); eata2x_eh_abort() 1889 ha->cp_stat[i] = FREE; eata2x_eh_abort() 1891 ha->board_name, i); eata2x_eh_abort() 1896 panic("%s: abort, mbox %d, invalid cp_stat.\n", ha->board_name, i); eata2x_eh_abort() 1905 struct hostdata *ha = (struct hostdata *)shost->hostdata; eata2x_eh_host_reset() local 1912 printk("%s: reset, inactive.\n", ha->board_name); eata2x_eh_host_reset() 1914 if (ha->in_reset) { eata2x_eh_host_reset() 1915 printk("%s: reset, exit, already in reset.\n", ha->board_name); eata2x_eh_host_reset() 1921 printk("%s: reset, exit, timeout error.\n", ha->board_name); eata2x_eh_host_reset() 1926 ha->retries = 0; eata2x_eh_host_reset() 1930 ha->target_redo[k][c] = 1; eata2x_eh_host_reset() 1931 ha->target_to[k][c] = 0; eata2x_eh_host_reset() 1936 if (ha->cp_stat[i] == FREE) eata2x_eh_host_reset() 1939 if (ha->cp_stat[i] == LOCKED) { eata2x_eh_host_reset() 1940 ha->cp_stat[i] = FREE; eata2x_eh_host_reset() 1942 ha->board_name, i); eata2x_eh_host_reset() 1946 if (!(SCpnt = ha->cp[i].SCpnt)) eata2x_eh_host_reset() 1947 panic("%s: reset, mbox %d, SCpnt == NULL.\n", ha->board_name, i); eata2x_eh_host_reset() 1949 if (ha->cp_stat[i] == READY || ha->cp_stat[i] == ABORTING) { eata2x_eh_host_reset() 1950 ha->cp_stat[i] = ABORTING; eata2x_eh_host_reset() 1952 ha->board_name, i); eata2x_eh_host_reset() 1956 ha->cp_stat[i] = IN_RESET; eata2x_eh_host_reset() 1958 ha->board_name, i); eata2x_eh_host_reset() 1962 panic("%s: reset, mbox %d, garbled SCpnt.\n", ha->board_name, i); eata2x_eh_host_reset() 1965 panic("%s: reset, mbox %d, index mismatch.\n", ha->board_name, i); eata2x_eh_host_reset() 1969 ha->board_name, i); eata2x_eh_host_reset() 1976 printk("%s: reset, cannot reset, timeout error.\n", ha->board_name); eata2x_eh_host_reset() 1981 printk("%s: reset, board reset done, enabling interrupts.\n", ha->board_name); eata2x_eh_host_reset() 1987 ha->in_reset = 1; eata2x_eh_host_reset() 1998 printk("%s: reset, interrupts disabled, loops %d.\n", ha->board_name, limit); eata2x_eh_host_reset() 2002 if (ha->cp_stat[i] == IN_RESET) { eata2x_eh_host_reset() 2003 SCpnt = ha->cp[i].SCpnt; eata2x_eh_host_reset() 2004 unmap_dma(i, ha); eata2x_eh_host_reset() 2009 ha->cp_stat[i] = LOCKED; eata2x_eh_host_reset() 2013 ha->board_name, i); eata2x_eh_host_reset() 2016 else if (ha->cp_stat[i] == ABORTING) { eata2x_eh_host_reset() 2017 SCpnt = ha->cp[i].SCpnt; eata2x_eh_host_reset() 2018 unmap_dma(i, ha); eata2x_eh_host_reset() 2023 ha->cp_stat[i] = FREE; eata2x_eh_host_reset() 2027 ha->board_name, i); eata2x_eh_host_reset() 2037 ha->in_reset = 0; eata2x_eh_host_reset() 2041 printk("%s: reset, exit, done.\n", ha->board_name); eata2x_eh_host_reset() 2043 printk("%s: reset, exit.\n", ha->board_name); eata2x_eh_host_reset() 2098 static int reorder(struct hostdata *ha, unsigned long cursec, reorder() argument 2127 cpp = &ha->cp[k]; reorder() 2177 cpp = &ha->cp[k]; reorder() 2222 cpp = &ha->cp[k]; reorder() 2239 struct hostdata *ha, unsigned int ihdlr) flush_dev() 2247 if (ha->cp_stat[k] != READY && ha->cp_stat[k] != IN_USE) flush_dev() 2250 cpp = &ha->cp[k]; flush_dev() 2256 if (ha->cp_stat[k] == IN_USE) flush_dev() 2262 if (reorder(ha, cursec, ihdlr, il, n_ready)) flush_dev() 2267 cpp = &ha->cp[k]; flush_dev() 2276 ha->cp_stat[k] = ABORTING; flush_dev() 2280 ha->cp_stat[k] = IN_USE; flush_dev() 2290 struct hostdata *ha = (struct hostdata *)shost->hostdata; ihdlr() local 2297 ha->iocount++; ihdlr() 2300 printk("%s: ihdlr, enter, irq %d, count %d.\n", ha->board_name, irq, ihdlr() 2301 ha->iocount); ihdlr() 2308 ha->board_name, irq, reg, ha->iocount); ihdlr() 2312 spp = &ha->sp; ihdlr() 2315 memcpy(spp, ha->sp_cpu_addr, sizeof(struct mssp)); ihdlr() 2318 memset(ha->sp_cpu_addr, 0, sizeof(struct mssp)); ihdlr() 2328 if (ha->iocount < 200) { ihdlr() 2338 if (spp->eoc == 0 && ha->iocount > 1) ihdlr() 2341 ha->board_name, irq, reg, ha->iocount); ihdlr() 2345 ha->board_name, spp->cpp_index, irq, reg, ha->iocount); ihdlr() 2353 cpp = &(ha->cp[i]); ihdlr() 2356 if ((ha->iocount > 500) && ((ha->iocount % 500) < 3)) ihdlr() 2360 if (ha->cp_stat[i] == IGNORE) { ihdlr() 2361 ha->cp_stat[i] = FREE; ihdlr() 2363 } else if (ha->cp_stat[i] == LOCKED) { ihdlr() 2364 ha->cp_stat[i] = FREE; ihdlr() 2365 printk("%s: ihdlr, mbox %d unlocked, count %d.\n", ha->board_name, i, ihdlr() 2366 ha->iocount); ihdlr() 2368 } else if (ha->cp_stat[i] == FREE) { ihdlr() 2369 printk("%s: ihdlr, mbox %d is free, count %d.\n", ha->board_name, i, ihdlr() 2370 ha->iocount); ihdlr() 2372 } else if (ha->cp_stat[i] == IN_RESET) ihdlr() 2373 printk("%s: ihdlr, mbox %d is in reset.\n", ha->board_name, i); ihdlr() 2374 else if (ha->cp_stat[i] != IN_USE) ihdlr() 2376 ha->board_name, i, ha->cp_stat[i]); ihdlr() 2378 ha->cp_stat[i] = FREE; ihdlr() 2382 panic("%s: ihdlr, mbox %d, SCpnt == NULL.\n", ha->board_name, i); ihdlr() 2385 panic("%s: ihdlr, mbox %d, SCpnt %p garbled.\n", ha->board_name, ihdlr() 2390 ha->board_name, i, ihdlr() 2393 sync_dma(i, ha); ihdlr() 2397 flush_dev(SCpnt->device, blk_rq_pos(SCpnt->request), ha, 1); ihdlr() 2402 if ((ha->iocount > 500) && ((ha->iocount % 200) < 2)) ihdlr() 2415 && ha->target_redo[SCpnt->device->id][SCpnt-> ihdlr() 2430 ha->target_redo[SCpnt->device->id][SCpnt->device-> ihdlr() 2434 (!(tstatus == CHECK_CONDITION && ha->iocount <= 1000 && ihdlr() 2438 ha->board_name, ihdlr() 2443 ha->target_to[SCpnt->device->id][SCpnt->device->channel] = 0; ihdlr() 2445 if (ha->last_retried_pid == SCpnt->serial_number) ihdlr() 2446 ha->retries = 0; ihdlr() 2452 if (ha->target_to[SCpnt->device->id][SCpnt->device->channel] > 1) ihdlr() 2456 ha->target_to[SCpnt->device->id][SCpnt->device-> ihdlr() 2468 ha->target_redo[k][c] = 1; ihdlr() 2471 && ha->retries < MAX_INTERNAL_RETRIES) { ihdlr() 2479 ha->retries++; ihdlr() 2480 ha->last_retried_pid = SCpnt->serial_number; ihdlr() 2503 if ((spp->adapter_status != ASOK && ha->iocount > 1000) || ihdlr() 2505 spp->adapter_status != ASST && ha->iocount <= 1000) || ihdlr() 2511 reg, ha->iocount); ihdlr() 2513 unmap_dma(i, ha); ihdlr() 2521 printk("%s: ihdlr, exit, irq %d, count %d.\n", ha->board_name, ihdlr() 2522 irq, ha->iocount); ihdlr() 2550 struct hostdata *ha = (struct hostdata *)shost->hostdata; eata2x_release() local 2554 kfree((&ha->cp[i])->sglist); eata2x_release() 2557 pci_unmap_single(ha->pdev, ha->cp[i].cp_dma_addr, eata2x_release() 2560 if (ha->sp_cpu_addr) eata2x_release() 2561 pci_free_consistent(ha->pdev, sizeof(struct mssp), eata2x_release() 2562 ha->sp_cpu_addr, ha->sp_dma_addr); eata2x_release() 2564 free_irq(shost->irq, &sha[ha->board_number]); eata2x_release() 2238 flush_dev(struct scsi_device *dev, unsigned long cursec, struct hostdata *ha, unsigned int ihdlr) flush_dev() argument
H A D	ips.h	61 #define IPS_COMMAND_ID(ha, scb) (int) (scb - ha->scbs) 62 #define IPS_IS_TROMBONE(ha) (((ha->pcidev->device == IPS_DEVICEID_COPPERHEAD) && \ 63 (ha->pcidev->revision >= IPS_REVID_TROMBONE32) && \ 64 (ha->pcidev->revision <= IPS_REVID_TROMBONE64)) ? 1 : 0) 65 #define IPS_IS_CLARINET(ha) (((ha->pcidev->device == IPS_DEVICEID_COPPERHEAD) && \ 66 (ha->pcidev->revision >= IPS_REVID_CLARINETP1) && \ 67 (ha->pcidev->revision <= IPS_REVID_CLARINETP3)) ? 1 : 0) 68 #define IPS_IS_MORPHEUS(ha) (ha->pcidev->device == IPS_DEVICEID_MORPHEUS) 69 #define IPS_IS_MARCO(ha) (ha->pcidev->device == IPS_DEVICEID_MARCO) 70 #define IPS_USE_I2O_DELIVER(ha) ((IPS_IS_MORPHEUS(ha) || \ 71 (IPS_IS_TROMBONE(ha) && \ 73 #define IPS_USE_MEMIO(ha) ((IPS_IS_MORPHEUS(ha) || \ 74 ((IPS_IS_TROMBONE(ha) || IPS_IS_CLARINET(ha)) && \ 77 #define IPS_HAS_ENH_SGLIST(ha) (IPS_IS_MORPHEUS(ha) || IPS_IS_MARCO(ha)) 78 #define IPS_USE_ENH_SGLIST(ha) ((ha)->flags & IPS_HA_ENH_SG) 79 #define IPS_SGLIST_SIZE(ha) (IPS_USE_ENH_SGLIST(ha) ? \
/linux-4.1.27/drivers/scsi/libsas/
H A D	sas_event.c	30 void sas_queue_work(struct sas_ha_struct *ha, struct sas_work *sw) sas_queue_work() argument 32 if (!test_bit(SAS_HA_REGISTERED, &ha->state)) sas_queue_work() 35 if (test_bit(SAS_HA_DRAINING, &ha->state)) { sas_queue_work() 38 list_add(&sw->drain_node, &ha->defer_q); sas_queue_work() 40 scsi_queue_work(ha->core.shost, &sw->work); sas_queue_work() 45 struct sas_ha_struct *ha) sas_queue_event() 50 spin_lock_irqsave(&ha->lock, flags); sas_queue_event() 51 sas_queue_work(ha, work); sas_queue_event() 52 spin_unlock_irqrestore(&ha->lock, flags); sas_queue_event() 57 void __sas_drain_work(struct sas_ha_struct *ha) __sas_drain_work() argument 59 struct workqueue_struct *wq = ha->core.shost->work_q; __sas_drain_work() 62 set_bit(SAS_HA_DRAINING, &ha->state); __sas_drain_work() 64 spin_lock_irq(&ha->lock); __sas_drain_work() 65 spin_unlock_irq(&ha->lock); __sas_drain_work() 69 spin_lock_irq(&ha->lock); __sas_drain_work() 70 clear_bit(SAS_HA_DRAINING, &ha->state); __sas_drain_work() 71 list_for_each_entry_safe(sw, _sw, &ha->defer_q, drain_node) { __sas_drain_work() 73 sas_queue_work(ha, sw); __sas_drain_work() 75 spin_unlock_irq(&ha->lock); __sas_drain_work() 78 int sas_drain_work(struct sas_ha_struct *ha) sas_drain_work() argument 82 err = mutex_lock_interruptible(&ha->drain_mutex); sas_drain_work() 85 if (test_bit(SAS_HA_REGISTERED, &ha->state)) sas_drain_work() 86 __sas_drain_work(ha); sas_drain_work() 87 mutex_unlock(&ha->drain_mutex); sas_drain_work() 93 void sas_disable_revalidation(struct sas_ha_struct *ha) sas_disable_revalidation() argument 95 mutex_lock(&ha->disco_mutex); sas_disable_revalidation() 96 set_bit(SAS_HA_ATA_EH_ACTIVE, &ha->state); sas_disable_revalidation() 97 mutex_unlock(&ha->disco_mutex); sas_disable_revalidation() 100 void sas_enable_revalidation(struct sas_ha_struct *ha) sas_enable_revalidation() argument 104 mutex_lock(&ha->disco_mutex); sas_enable_revalidation() 105 clear_bit(SAS_HA_ATA_EH_ACTIVE, &ha->state); sas_enable_revalidation() 106 for (i = 0; i < ha->num_phys; i++) { sas_enable_revalidation() 107 struct asd_sas_port *port = ha->sas_port[i]; sas_enable_revalidation() 114 sas_queue_event(ev, &d->pending, &d->disc_work[ev].work, ha); sas_enable_revalidation() 116 mutex_unlock(&ha->disco_mutex); sas_enable_revalidation() 129 struct sas_ha_struct *ha = phy->ha; notify_port_event() local 134 &phy->port_events[event].work, ha); notify_port_event() 139 struct sas_ha_struct *ha = phy->ha; sas_notify_phy_event() local 144 &phy->phy_events[event].work, ha); sas_notify_phy_event() 157 sas_ha->ha_events[i].ha = sas_ha; sas_init_events() 43 sas_queue_event(int event, unsigned long *pending, struct sas_work *work, struct sas_ha_struct *ha) sas_queue_event() argument
H A D	sas_init.c	115 struct sas_ha_struct *ha = ev->ha; sas_hae_reset() local 117 clear_bit(HAE_RESET, &ha->pending); sas_hae_reset() 367 void sas_prep_resume_ha(struct sas_ha_struct *ha) sas_prep_resume_ha() argument 371 set_bit(SAS_HA_REGISTERED, &ha->state); sas_prep_resume_ha() 374 for (i = 0; i < ha->num_phys; i++) { sas_prep_resume_ha() 375 struct asd_sas_phy *phy = ha->sas_phy[i]; sas_prep_resume_ha() 385 static int phys_suspended(struct sas_ha_struct *ha) phys_suspended() argument 389 for (i = 0; i < ha->num_phys; i++) { phys_suspended() 390 struct asd_sas_phy *phy = ha->sas_phy[i]; phys_suspended() 399 void sas_resume_ha(struct sas_ha_struct *ha) sas_resume_ha() argument 410 i = phys_suspended(ha); sas_resume_ha() 412 dev_info(ha->dev, "waiting up to 25 seconds for %d phy%s to resume\n", sas_resume_ha() 414 wait_event_timeout(ha->eh_wait_q, phys_suspended(ha) == 0, tmo); sas_resume_ha() 415 for (i = 0; i < ha->num_phys; i++) { sas_resume_ha() 416 struct asd_sas_phy *phy = ha->sas_phy[i]; sas_resume_ha() 427 scsi_unblock_requests(ha->core.shost); sas_resume_ha() 428 sas_drain_work(ha); sas_resume_ha() 432 void sas_suspend_ha(struct sas_ha_struct *ha) sas_suspend_ha() argument 436 sas_disable_events(ha); sas_suspend_ha() 437 scsi_block_requests(ha->core.shost); sas_suspend_ha() 438 for (i = 0; i < ha->num_phys; i++) { sas_suspend_ha() 439 struct asd_sas_port *port = ha->sas_port[i]; sas_suspend_ha() 445 mutex_lock(&ha->drain_mutex); sas_suspend_ha() 446 __sas_drain_work(ha); sas_suspend_ha() 447 mutex_unlock(&ha->drain_mutex); sas_suspend_ha() 490 struct sas_ha_struct *ha = SHOST_TO_SAS_HA(shost); queue_phy_reset() local 502 spin_lock_irq(&ha->lock); queue_phy_reset() 503 sas_queue_work(ha, &d->reset_work); queue_phy_reset() 504 spin_unlock_irq(&ha->lock); queue_phy_reset() 506 rc = sas_drain_work(ha); queue_phy_reset() 517 struct sas_ha_struct *ha = SHOST_TO_SAS_HA(shost); queue_phy_enable() local 529 spin_lock_irq(&ha->lock); queue_phy_enable() 530 sas_queue_work(ha, &d->enable_work); queue_phy_enable() 531 spin_unlock_irq(&ha->lock); queue_phy_enable() 533 rc = sas_drain_work(ha); queue_phy_enable()
H A D	sas_scsi_host.c	97 task->dev->port->ha->sas_ha_name); sas_end_task() 122 struct sas_ha_struct *ha = dev->port->ha; sas_scsi_task_done() local 126 if (test_bit(SAS_HA_FROZEN, &ha->state)) sas_scsi_task_done() 243 struct sas_ha_struct *ha = dev->port->ha; sas_eh_defer_cmd() local 253 list_move_tail(&cmd->eh_entry, &ha->eh_ata_q); sas_eh_defer_cmd() 307 to_sas_internal(task->dev->port->ha->core.shost->transportt); sas_scsi_find_task() 355 to_sas_internal(dev->port->ha->core.shost->transportt); sas_recover_lu() 383 to_sas_internal(dev->port->ha->core.shost->transportt); sas_recover_I_T() 397 struct sas_ha_struct *ha = dev->port->ha; sas_get_local_phy() local 406 spin_lock_irqsave(&ha->phy_port_lock, flags); sas_get_local_phy() 409 spin_unlock_irqrestore(&ha->phy_port_lock, flags); sas_get_local_phy() 417 struct sas_ha_struct *ha = dev->port->ha; sas_wait_eh() local 425 spin_lock_irq(&ha->lock); sas_wait_eh() 428 prepare_to_wait(&ha->eh_wait_q, &wait, TASK_UNINTERRUPTIBLE); sas_wait_eh() 429 spin_unlock_irq(&ha->lock); sas_wait_eh() 431 spin_lock_irq(&ha->lock); sas_wait_eh() 433 finish_wait(&ha->eh_wait_q, &wait); sas_wait_eh() 435 spin_unlock_irq(&ha->lock); sas_wait_eh() 438 if (scsi_host_in_recovery(ha->core.shost)) { sas_wait_eh() 448 struct sas_ha_struct *ha = dev->port->ha; sas_queue_reset() local 460 spin_lock_irq(&ha->lock); sas_queue_reset() 464 ha->eh_active++; sas_queue_reset() 465 list_add_tail(&dev->ssp_dev.eh_list_node, &ha->eh_dev_q); sas_queue_reset() 469 scsi_schedule_eh(ha->core.shost); sas_queue_reset() 471 spin_unlock_irq(&ha->lock); sas_queue_reset() 580 struct sas_ha_struct *ha = SHOST_TO_SAS_HA(shost); sas_eh_handle_sas_errors() local 677 SAS_DPRINTK("clear nexus ha\n"); list_for_each_entry_safe() 678 res = i->dft->lldd_clear_nexus_ha(ha); list_for_each_entry_safe() 680 SAS_DPRINTK("clear nexus ha " list_for_each_entry_safe() 701 list_splice_tail_init(&ha->eh_ata_q, work_q); 713 struct sas_ha_struct *ha = SHOST_TO_SAS_HA(shost); sas_eh_handle_resets() local 717 spin_lock_irq(&ha->lock); sas_eh_handle_resets() 718 while (!list_empty(&ha->eh_dev_q)) { sas_eh_handle_resets() 722 ssp = list_entry(ha->eh_dev_q.next, typeof(*ssp), eh_list_node); sas_eh_handle_resets() 728 spin_unlock_irq(&ha->lock); sas_eh_handle_resets() 737 spin_lock_irq(&ha->lock); sas_eh_handle_resets() 739 ha->eh_active--; sas_eh_handle_resets() 741 spin_unlock_irq(&ha->lock); sas_eh_handle_resets() 747 struct sas_ha_struct *ha = SHOST_TO_SAS_HA(shost); sas_scsi_recover_host() local 766 set_bit(SAS_HA_FROZEN, &ha->state); sas_scsi_recover_host() 768 clear_bit(SAS_HA_FROZEN, &ha->state); sas_scsi_recover_host() 778 sas_ata_eh(shost, &eh_work_q, &ha->eh_done_q); sas_scsi_recover_host() 779 if (!scsi_eh_get_sense(&eh_work_q, &ha->eh_done_q)) sas_scsi_recover_host() 780 scsi_eh_ready_devs(shost, &eh_work_q, &ha->eh_done_q); sas_scsi_recover_host() 788 scsi_eh_flush_done_q(&ha->eh_done_q); sas_scsi_recover_host() 791 spin_lock_irq(&ha->lock); sas_scsi_recover_host() 792 if (ha->eh_active == 0) { sas_scsi_recover_host() 796 spin_unlock_irq(&ha->lock); sas_scsi_recover_host() 826 struct sas_ha_struct *ha = SHOST_TO_SAS_HA(shost); sas_find_dev_by_rphy() local 831 spin_lock_irqsave(&ha->phy_port_lock, flags); sas_find_dev_by_rphy() 832 for (i = 0; i < ha->num_phys; i++) { sas_find_dev_by_rphy() 833 struct asd_sas_port *port = ha->sas_port[i]; sas_find_dev_by_rphy() 847 spin_unlock_irqrestore(&ha->phy_port_lock, flags); sas_find_dev_by_rphy() 879 sas_ha = dev->port->ha; sas_slave_configure()
H A D	sas_discover.c	180 struct sas_ha_struct *sas_ha = dev->port->ha; sas_notify_lldd_dev_found() 202 struct sas_ha_struct *sas_ha = dev->port->ha; sas_notify_lldd_dev_gone() 249 struct Scsi_Host *shost = port->ha->core.shost; sas_suspend_devices() 331 struct sas_ha_struct *ha = port->ha; sas_unregister_common_dev() local 345 spin_lock_irq(&ha->lock); sas_unregister_common_dev() 349 ha->eh_active--; sas_unregister_common_dev() 351 spin_unlock_irq(&ha->lock); sas_unregister_common_dev() 410 struct sas_ha_struct *ha; sas_device_set_phy() local 416 ha = dev->port->ha; sas_device_set_phy() 420 spin_lock_irq(&ha->phy_port_lock); sas_device_set_phy() 425 spin_unlock_irq(&ha->phy_port_lock); sas_device_set_phy() 502 struct sas_ha_struct *ha = port->ha; sas_revalidate_domain() local 506 mutex_lock(&ha->disco_mutex); sas_revalidate_domain() 507 if (test_bit(SAS_HA_ATA_EH_ACTIVE, &ha->state)) { sas_revalidate_domain() 525 mutex_unlock(&ha->disco_mutex); sas_revalidate_domain() 530 static void sas_chain_work(struct sas_ha_struct *ha, struct sas_work *sw) sas_chain_work() argument 537 scsi_queue_work(ha->core.shost, &sw->work); sas_chain_work() 542 struct sas_ha_struct *ha) sas_chain_event() 547 spin_lock_irqsave(&ha->lock, flags); sas_chain_event() 548 sas_chain_work(ha, sw); sas_chain_event() 549 spin_unlock_irqrestore(&ha->lock, flags); sas_chain_event() 563 sas_chain_event(ev, &disc->pending, &disc->disc_work[ev].work, port->ha); sas_discover_event() 540 sas_chain_event(int event, unsigned long *pending, struct sas_work *sw, struct sas_ha_struct *ha) sas_chain_event() argument
H A D	sas_ata.c	101 struct sas_ha_struct *sas_ha = dev->port->ha; sas_ata_task_done() 186 struct sas_ha_struct *sas_ha = dev->port->ha; sas_ata_qc_issue() 272 return to_sas_internal(dev->port->ha->core.shost->transportt); dev_to_sas_internal() 510 struct sas_ha_struct *ha = dev->port->ha; sas_ata_sched_eh() local 513 spin_lock_irqsave(&ha->lock, flags); sas_ata_sched_eh() 515 ha->eh_active++; sas_ata_sched_eh() 517 spin_unlock_irqrestore(&ha->lock, flags); sas_ata_sched_eh() 523 struct sas_ha_struct *ha = dev->port->ha; sas_ata_end_eh() local 526 spin_lock_irqsave(&ha->lock, flags); sas_ata_end_eh() 528 ha->eh_active--; sas_ata_end_eh() 529 spin_unlock_irqrestore(&ha->lock, flags); sas_ata_end_eh() 560 struct sas_ha_struct *ha = found_dev->port->ha; sas_ata_init() local 561 struct Scsi_Host *shost = ha->core.shost; sas_ata_init() 565 ata_host_init(&found_dev->sata_dev.ata_host, ha->dev, &sas_sata_ops); sas_ata_init() 629 mutex_lock(&port->ha->disco_mutex); sas_probe_sata() 636 mutex_unlock(&port->ha->disco_mutex); sas_probe_sata() 673 mutex_lock(&port->ha->disco_mutex); sas_suspend_sata() 686 mutex_unlock(&port->ha->disco_mutex); sas_suspend_sata() 695 mutex_lock(&port->ha->disco_mutex); sas_resume_sata() 708 mutex_unlock(&port->ha->disco_mutex); sas_resume_sata() 743 struct sas_ha_struct *ha = dev->port->ha; async_sas_ata_eh() local 746 ata_scsi_port_error_handler(ha->core.shost, ap); async_sas_ata_eh()
H A D	sas_port.c	33 struct sas_ha_struct *sas_ha = phy->ha; phy_is_wideport_member() 46 struct sas_ha_struct *sas_ha = phy->ha; sas_resume_port() 95 struct sas_ha_struct *sas_ha = phy->ha; sas_form_port() 206 struct sas_ha_struct *sas_ha = phy->ha; sas_deform_port() 328 port->ha = sas_ha; sas_init_port()
H A D	sas_phy.c	56 struct sas_ha_struct *sas_ha = phy->ha; sas_phye_oob_error() 87 struct sas_ha_struct *sas_ha = phy->ha; sas_phye_spinup_hold() 157 phy->ha = sas_ha; sas_register_phys()
H A D	sas_internal.h	70 void sas_disable_revalidation(struct sas_ha_struct *ha); 71 void sas_enable_revalidation(struct sas_ha_struct *ha); 72 void __sas_drain_work(struct sas_ha_struct *ha); 81 void sas_queue_work(struct sas_ha_struct *ha, struct sas_work *sw);
H A D	sas_dump.c	58 SAS_DPRINTK("ha %s: %s event\n", dev_name(sas_ha->dev), sas_dprint_hae()
H A D	sas_expander.c	73 to_sas_internal(dev->port->ha->core.shost->transportt); smp_execute_task() 205 struct sas_ha_struct *ha = dev->port->ha; sas_set_ex_phy() local 213 if (WARN_ON_ONCE(test_bit(SAS_HA_ATA_EH_ACTIVE, &ha->state))) sas_set_ex_phy() 242 if (!test_bit(SAS_HA_ATA_EH_ACTIVE, &ha->state)) { sas_set_ex_phy() 250 if (test_bit(SAS_HA_ATA_EH_ACTIVE, &ha->state)) sas_set_ex_phy() 336 if (test_bit(SAS_HA_ATA_EH_ACTIVE, &ha->state)) sas_set_ex_phy() 340 test_bit(SAS_HA_ATA_EH_ACTIVE, &ha->state) ? "ata: " : "", sas_set_ex_phy()
/linux-4.1.27/net/core/
H A D	dev_addr_lists.c	28 struct netdev_hw_addr *ha; __hw_addr_create_ex() local 31 alloc_size = sizeof(*ha); __hw_addr_create_ex() 34 ha = kmalloc(alloc_size, GFP_ATOMIC); __hw_addr_create_ex() 35 if (!ha) __hw_addr_create_ex() 37 memcpy(ha->addr, addr, addr_len); __hw_addr_create_ex() 38 ha->type = addr_type; __hw_addr_create_ex() 39 ha->refcount = 1; __hw_addr_create_ex() 40 ha->global_use = global; __hw_addr_create_ex() 41 ha->synced = sync ? 1 : 0; __hw_addr_create_ex() 42 ha->sync_cnt = 0; __hw_addr_create_ex() 43 list_add_tail_rcu(&ha->list, &list->list); __hw_addr_create_ex() 54 struct netdev_hw_addr *ha; __hw_addr_add_ex() local 59 list_for_each_entry(ha, &list->list, list) { __hw_addr_add_ex() 60 if (!memcmp(ha->addr, addr, addr_len) && __hw_addr_add_ex() 61 ha->type == addr_type) { __hw_addr_add_ex() 64 if (ha->global_use) __hw_addr_add_ex() 67 ha->global_use = true; __hw_addr_add_ex() 70 if (ha->synced && sync_count) __hw_addr_add_ex() 73 ha->synced++; __hw_addr_add_ex() 75 ha->refcount++; __hw_addr_add_ex() 93 struct netdev_hw_addr *ha, bool global, __hw_addr_del_entry() 96 if (global && !ha->global_use) __hw_addr_del_entry() 99 if (sync && !ha->synced) __hw_addr_del_entry() 103 ha->global_use = false; __hw_addr_del_entry() 106 ha->synced--; __hw_addr_del_entry() 108 if (--ha->refcount) __hw_addr_del_entry() 110 list_del_rcu(&ha->list); __hw_addr_del_entry() 111 kfree_rcu(ha, rcu_head); __hw_addr_del_entry() 120 struct netdev_hw_addr *ha; __hw_addr_del_ex() local 122 list_for_each_entry(ha, &list->list, list) { __hw_addr_del_ex() 123 if (!memcmp(ha->addr, addr, addr_len) && __hw_addr_del_ex() 124 (ha->type == addr_type || !addr_type)) __hw_addr_del_ex() 125 return __hw_addr_del_entry(list, ha, global, sync); __hw_addr_del_ex() 138 struct netdev_hw_addr *ha, __hw_addr_sync_one() 143 err = __hw_addr_add_ex(to_list, ha->addr, addr_len, ha->type, __hw_addr_sync_one() 144 false, true, ha->sync_cnt); __hw_addr_sync_one() 149 ha->sync_cnt++; __hw_addr_sync_one() 150 ha->refcount++; __hw_addr_sync_one() 158 struct netdev_hw_addr *ha, __hw_addr_unsync_one() 163 err = __hw_addr_del_ex(to_list, ha->addr, addr_len, ha->type, __hw_addr_unsync_one() 167 ha->sync_cnt--; __hw_addr_unsync_one() 169 __hw_addr_del_entry(from_list, ha, false, false); __hw_addr_unsync_one() 177 struct netdev_hw_addr *ha, *tmp; __hw_addr_sync_multiple() local 179 list_for_each_entry_safe(ha, tmp, &from_list->list, list) { __hw_addr_sync_multiple() 180 if (ha->sync_cnt == ha->refcount) { __hw_addr_sync_multiple() 181 __hw_addr_unsync_one(to_list, from_list, ha, addr_len); __hw_addr_sync_multiple() 183 err = __hw_addr_sync_one(to_list, ha, addr_len); __hw_addr_sync_multiple() 201 struct netdev_hw_addr *ha, *tmp; __hw_addr_sync() local 203 list_for_each_entry_safe(ha, tmp, &from_list->list, list) { __hw_addr_sync() 204 if (!ha->sync_cnt) { __hw_addr_sync() 205 err = __hw_addr_sync_one(to_list, ha, addr_len); __hw_addr_sync() 208 } else if (ha->refcount == 1) __hw_addr_sync() 209 __hw_addr_unsync_one(to_list, from_list, ha, addr_len); __hw_addr_sync() 219 struct netdev_hw_addr *ha, *tmp; __hw_addr_unsync() local 221 list_for_each_entry_safe(ha, tmp, &from_list->list, list) { __hw_addr_unsync() 222 if (ha->sync_cnt) __hw_addr_unsync() 223 __hw_addr_unsync_one(to_list, from_list, ha, addr_len); __hw_addr_unsync() 247 struct netdev_hw_addr *ha, *tmp; __hw_addr_sync_dev() local 251 list_for_each_entry_safe(ha, tmp, &list->list, list) { __hw_addr_sync_dev() 252 if (!ha->sync_cnt || ha->refcount != 1) __hw_addr_sync_dev() 256 if (unsync && unsync(dev, ha->addr)) __hw_addr_sync_dev() 259 ha->sync_cnt--; __hw_addr_sync_dev() 260 __hw_addr_del_entry(list, ha, false, false); __hw_addr_sync_dev() 264 list_for_each_entry_safe(ha, tmp, &list->list, list) { __hw_addr_sync_dev() 265 if (ha->sync_cnt) __hw_addr_sync_dev() 268 err = sync(dev, ha->addr); __hw_addr_sync_dev() 272 ha->sync_cnt++; __hw_addr_sync_dev() 273 ha->refcount++; __hw_addr_sync_dev() 297 struct netdev_hw_addr *ha, *tmp; __hw_addr_unsync_dev() local 299 list_for_each_entry_safe(ha, tmp, &list->list, list) { __hw_addr_unsync_dev() 300 if (!ha->sync_cnt) __hw_addr_unsync_dev() 304 if (unsync && unsync(dev, ha->addr)) __hw_addr_unsync_dev() 307 ha->sync_cnt--; __hw_addr_unsync_dev() 308 __hw_addr_del_entry(list, ha, false, false); __hw_addr_unsync_dev() 315 struct netdev_hw_addr *ha, *tmp; __hw_addr_flush() local 317 list_for_each_entry_safe(ha, tmp, &list->list, list) { __hw_addr_flush() 318 list_del_rcu(&ha->list); __hw_addr_flush() 319 kfree_rcu(ha, rcu_head); __hw_addr_flush() 364 struct netdev_hw_addr *ha; dev_addr_init() local 378 ha = list_first_entry(&dev->dev_addrs.list, dev_addr_init() 380 dev->dev_addr = ha->addr; dev_addr_init() 426 struct netdev_hw_addr *ha; dev_addr_del() local 434 ha = list_first_entry(&dev->dev_addrs.list, dev_addr_del() 436 if (!memcmp(ha->addr, addr, dev->addr_len) && dev_addr_del() 437 ha->type == addr_type && ha->refcount == 1) dev_addr_del() 459 struct netdev_hw_addr *ha; dev_uc_add_excl() local 463 list_for_each_entry(ha, &dev->uc.list, list) { dev_uc_add_excl() 464 if (!memcmp(ha->addr, addr, dev->addr_len) && dev_uc_add_excl() 465 ha->type == NETDEV_HW_ADDR_T_UNICAST) { dev_uc_add_excl() 643 struct netdev_hw_addr *ha; dev_mc_add_excl() local 647 list_for_each_entry(ha, &dev->mc.list, list) { dev_mc_add_excl() 648 if (!memcmp(ha->addr, addr, dev->addr_len) && dev_mc_add_excl() 649 ha->type == NETDEV_HW_ADDR_T_MULTICAST) { dev_mc_add_excl() 92 __hw_addr_del_entry(struct netdev_hw_addr_list *list, struct netdev_hw_addr *ha, bool global, bool sync) __hw_addr_del_entry() argument 137 __hw_addr_sync_one(struct netdev_hw_addr_list *to_list, struct netdev_hw_addr *ha, int addr_len) __hw_addr_sync_one() argument 156 __hw_addr_unsync_one(struct netdev_hw_addr_list *to_list, struct netdev_hw_addr_list *from_list, struct netdev_hw_addr *ha, int addr_len) __hw_addr_unsync_one() argument
H A D	net-procfs.c	357 struct netdev_hw_addr *ha; dev_mc_seq_show() local 364 netdev_for_each_mc_addr(ha, dev) { netdev_for_each_mc_addr() 368 dev->name, ha->refcount, ha->global_use); netdev_for_each_mc_addr() 371 seq_printf(seq, "%02x", ha->addr[i]); netdev_for_each_mc_addr()
H A D	neighbour.c	1041 update(hh, neigh->dev, neigh->ha); neigh_update_hhs() 1109 lladdr = neigh->ha; neigh_update() 1117 !memcmp(lladdr, neigh->ha, dev->addr_len)) neigh_update() 1118 lladdr = neigh->ha; neigh_update() 1126 lladdr = neigh->ha; neigh_update() 1139 if (lladdr != neigh->ha && !(flags & NEIGH_UPDATE_F_OVERRIDE)) { neigh_update() 1143 lladdr = neigh->ha; neigh_update() 1148 if (lladdr == neigh->ha && new == NUD_STALE && neigh_update() 1167 if (lladdr != neigh->ha) { neigh_update() 1169 memcpy(&neigh->ha, lladdr, dev->addr_len); neigh_update() 1300 neigh->ha, NULL, skb->len); neigh_resolve_output() 1329 neigh->ha, NULL, skb->len); neigh_connected_output()
/linux-4.1.27/arch/powerpc/include/uapi/asm/
H A D	elf.h	64 #define R_PPC_TPREL16_HA 72 /* half16 (sym+add)@tprel@ha */ 69 #define R_PPC_DTPREL16_HA 77 /* half16 (sym+add)@dtprel@ha */ 74 #define R_PPC_GOT_TLSGD16_HA 82 /* half16 (sym+add)@got@tlsgd@ha */ 78 #define R_PPC_GOT_TLSLD16_HA 86 /* half16 (sym+add)@got@tlsld@ha */ 82 #define R_PPC_GOT_TPREL16_HA 90 /* half16 (sym+add)@got@tprel@ha */ 86 #define R_PPC_GOT_DTPREL16_HA 94 /* half16* (sym+add)@got@dtprel@ha */ 234 #define R_PPC64_TOC16_HA 50 /* half16 #ha(S + A - .TOC.). */ 239 #define R_PPC64_PLTGOT16_HA 55 /* half16 #ha(M + A). */ 259 #define R_PPC64_TPREL16_HA 72 /* half16 (sym+add)@tprel@ha */ 264 #define R_PPC64_DTPREL16_HA 77 /* half16 (sym+add)@dtprel@ha */ 269 #define R_PPC64_GOT_TLSGD16_HA 82 /* half16 (sym+add)@got@tlsgd@ha */ 273 #define R_PPC64_GOT_TLSLD16_HA 86 /* half16 (sym+add)@got@tlsld@ha */ 277 #define R_PPC64_GOT_TPREL16_HA 90 /* half16 (sym+add)@got@tprel@ha */ 281 #define R_PPC64_GOT_DTPREL16_HA 94 /* half16 (sym+add)@got@dtprel@ha */
/linux-4.1.27/drivers/staging/lustre/lustre/include/
H A D	lustre_ha.h	40 /** \defgroup ha ha 62 /** @} ha */
/linux-4.1.27/arch/powerpc/kernel/
H A D	idle_6xx.S	45 addis r6,r5, nap_save_msscr0@ha 50 addis r6,r5,nap_save_hid1@ha 71 lis r4,cur_cpu_spec@ha 77 lis r4,powersave_nap@ha 112 lis r4,powersave_lowspeed@ha 168 * and load r11 (@ha part + CPU offset) only once 174 addis r9,r11,(nap_save_msscr0-KERNELBASE)@ha 182 addis r9,r11,(nap_save_hid1-KERNELBASE)@ha
H A D	entry_32.S	162 lis r11,global_dbcr0@ha 281 lis r1,init_thread_union@ha 284 lis r9,StackOverflow@ha 389 lis r4,icache_44x_need_flush@ha 694 1: lis r3,exc_exit_restart_end@ha 698 lis r4,exc_exit_restart@ha 702 lis r3,fee_restarts@ha 846 lis r4,icache_44x_need_flush@ha 1067 lis r10,saved_ksp_limit@ha; 1071 lis r9,crit_srr0@ha; 1073 lis r10,crit_srr1@ha; 1127 lis r11,global_dbcr0@ha 1200 lis r10,exc_exit_restart_end@ha 1204 lis r11,exc_exit_restart@ha 1208 lis r10,ee_restarts@ha 1251 lis r6,1f@ha /* physical return address for rtas */
H A D	idle_e500.S	48 lis r4,powersave_nap@ha
H A D	reloc_64.S	45 2: addis r6,r6,(-RELACOUNT)@ha
H A D	head_booke.h	22 addis reg,reg,val@ha; \ 66 lis r10, STACK_FRAME_REGS_MARKER@ha;/* exception frame marker */ \ 102 addis r8,r8,level##_STACK_BASE@ha; \ 107 lis r8,level##_STACK_BASE@ha; \
H A D	head_32.S	120 addis r8,r8,(_stext - 0b)@ha 287 lis r10,STACK_FRAME_REGS_MARKER@ha; /* exception frame marker */ \ 506 lis r2,swapper_pg_dir@ha /* if kernel address, use */ 580 lis r2,swapper_pg_dir@ha /* if kernel address, use */ 664 lis r2,swapper_pg_dir@ha /* if kernel address, use */ 766 addis r9,r26,klimit@ha /* fetch klimit */ 847 lis r1,secondary_ti@ha 908 lis r6,_SDR1@ha 926 lis r3,BATS@ha 958 lis r1,init_thread_union@ha 1178 addis r8,r3,disp_BAT@ha
H A D	head_fsl_booke.S	86 addis r3,r8,(is_second_reloc - 0b)@ha 104 addis r4,r8,(kernstart_addr - 0b)@ha 108 addis r6,r8,(memstart_addr - 0b)@ha 262 lis r3,kernstart_addr@ha 817 lis r13, tlbcam_index@ha 866 lis r3,last_task_used_spe@ha 1040 lis r4,last_task_used_spe@ha 1188 lis r1,secondary_ti@ha
H A D	misc_32.S	114 lis r4,1b@ha 127 lis r7,__got2_start@ha 129 lis r8,__got2_end@ha 137 lis r4,1b@ha 158 addis r4,r3,cur_cpu_spec@ha 203 addis r6,r6,nap_save_hid1@ha
H A D	head_44x.S	77 addis r21,r21,(_stext - 0b)@ha 126 lis r3,kernstart_addr@ha 169 lis r3,virt_phys_offset@ha 184 lis r3,kernstart_addr@ha 372 lis r10,tlb_44x_index@ha 468 lis r10,tlb_44x_index@ha 1023 lis r1,secondary_ti@ha
H A D	head_8xx.S	325 lis r11, (swapper_pg_dir-PAGE_OFFSET)@ha 378 lis r11, (swapper_pg_dir-PAGE_OFFSET)@ha 509 lis r11, (swapper_pg_dir-PAGE_OFFSET)@ha 642 lis r1,init_thread_union@ha 667 lis r6, swapper_pg_dir@ha
H A D	head_64.S	359 addis r26,r26,(_stext - 0b)@ha 486 lis r5,(copy_to_here - _stext)@ha 492 addis r8,r3,(4f - _stext)@ha /* Jump to the copy of this code */ 501 addis r5,r26,(p_end - _stext)@ha
H A D	module_32.c	203 entry->jump[0] = 0x3d800000+((val+0x8000)>>16); /* lis r12,sym@ha */ do_plt_call()
/linux-4.1.27/drivers/scsi/aic94xx/
H A D	aic94xx_dev.c	84 struct asd_ha_struct *asd_ha = dev->port->ha->lldd_ha; asd_set_ddb_type() 97 struct asd_ha_struct *asd_ha = dev->port->ha->lldd_ha; asd_init_sata_tag_ddb() 114 struct asd_ha_struct *asd_ha = dev->port->ha->lldd_ha; asd_set_dmamode() 139 struct asd_ha_struct *asd_ha = dev->port->ha->lldd_ha; asd_init_sata() 157 struct asd_ha_struct *asd_ha = dev->port->ha->lldd_ha; asd_init_target_ddb() 237 struct asd_ha_struct *asd_ha = dev->port->ha->lldd_ha; asd_init_sata_pm_table_ddb() 267 struct asd_ha_struct *asd_ha = dev->port->ha->lldd_ha; asd_init_sata_pm_port_ddb() 317 asd_free_ddb(dev->port->ha->lldd_ha, asd_init_sata_pm_ddb() 327 struct asd_ha_struct *asd_ha = dev->port->ha->lldd_ha; asd_dev_found() 352 struct asd_ha_struct *asd_ha = dev->port->ha->lldd_ha; asd_dev_gone()
H A D	aic94xx_task.c	59 struct asd_ha_struct *asd_ha = ascb->ha; asd_map_scatterlist() 136 struct asd_ha_struct *asd_ha = ascb->ha; asd_unmap_scatterlist() 145 pci_unmap_single(ascb->ha->pcidev, dma, task->total_xfer_len, asd_unmap_scatterlist() 161 struct asd_ha_struct *asd_ha = ascb->ha; asd_get_response_tasklet() 220 asd_can_dequeue(ascb->ha, 1); asd_task_tasklet_complete() 435 struct asd_ha_struct *asd_ha = ascb->ha; asd_build_smp_ascb() 474 pci_unmap_sg(a->ha->pcidev, &task->smp_task.smp_req, 1, asd_unbuild_smp_ascb() 476 pci_unmap_sg(a->ha->pcidev, &task->smp_task.smp_resp, 1, asd_unbuild_smp_ascb() 500 dev->port->ha->hashed_sas_addr, HASHED_SAS_ADDR_SIZE); asd_build_ssp_ascb() 552 struct asd_ha_struct *asd_ha = task->dev->port->ha->lldd_ha; asd_execute_task()
H A D	aic94xx_scb.c	88 struct asd_ha_struct *asd_ha = ascb->ha; asd_phy_event_tasklet() 158 struct asd_ha_struct *asd_ha = phy->sas_phy.ha->lldd_ha; asd_get_attached_sas_addr() 241 struct asd_dma_tok *edb = ascb->ha->seq.edb_arr[edb_el]; asd_bytes_dmaed_tasklet() 242 struct asd_phy *phy = &ascb->ha->phys[phy_id]; asd_bytes_dmaed_tasklet() 243 struct sas_ha_struct *sas_ha = phy->sas_phy.ha; asd_bytes_dmaed_tasklet() 254 asd_form_port(ascb->ha, phy); asd_bytes_dmaed_tasklet() 262 struct asd_ha_struct *asd_ha = ascb->ha; asd_link_reset_err_tasklet() 295 struct asd_ascb *cp = asd_ascb_alloc_list(ascb->ha, &num, asd_link_reset_err_tasklet() 304 if (asd_post_ascb_list(ascb->ha, cp, 1) != 0) asd_link_reset_err_tasklet() 316 struct sas_ha_struct *sas_ha = &ascb->ha->sas_ha; asd_primitive_rcvd_tasklet() 318 struct asd_ha_struct *asd_ha = ascb->ha; asd_primitive_rcvd_tasklet() 384 struct asd_seq_data *seq = &ascb->ha->seq; asd_invalidate_edb() 409 i = asd_post_escb_list(ascb->ha, ascb, 1); asd_invalidate_edb() 418 struct asd_ha_struct *asd_ha = ascb->ha; escb_tasklet_complete() 645 struct asd_ha_struct *asd_ha = ascb->ha; control_phy_tasklet_complete() 649 struct asd_phy *phy = &ascb->ha->phys[phy_id]; control_phy_tasklet_complete() 778 struct asd_phy *phy = &ascb->ha->phys[phy_id]; asd_build_control_phy() 875 struct asd_seq_data *seq = &ascb->ha->seq; asd_ascb_timedout() 901 struct asd_ha_struct *asd_ha = phy->ha->lldd_ha; asd_control_phy()
H A D	aic94xx_hwi.h	132 struct asd_ha_struct *ha; member in struct:asd_ascb 293 ascb->ha = asd_ha; asd_init_ascb() 341 struct asd_ha_struct *asd_ha = ascb->ha; asd_ascb_free() 345 spin_lock_irqsave(&ascb->ha->seq.tc_index_lock, flags); asd_ascb_free() 346 asd_tc_index_release(&ascb->ha->seq, ascb->tc_index); asd_ascb_free() 347 spin_unlock_irqrestore(&ascb->ha->seq.tc_index_lock, flags); asd_ascb_free()
H A D	aic94xx_tmf.c	51 res = asd_post_ascb_list(ascb->ha, ascb, 1); asd_enqueue_internal() 145 struct asd_ha_struct *asd_ha = port->ha->lldd_ha; asd_clear_nexus_port() 162 struct asd_ha_struct *asd_ha = dev->port->ha->lldd_ha; asd_clear_nexus_I_T() 222 struct asd_ha_struct *asd_ha = dev->port->ha->lldd_ha; asd_clear_nexus_I_T_L() 235 struct asd_ha_struct *asd_ha = task->dev->port->ha->lldd_ha; asd_clear_nexus_tag() 250 struct asd_ha_struct *asd_ha = task->dev->port->ha->lldd_ha; asd_clear_nexus_index() 277 struct asd_ha_struct *asd_ha = ascb->ha; asd_get_tmf_resp_tasklet() 408 struct asd_ha_struct *asd_ha = tascb->ha; asd_abort_task() 458 task->dev->port->ha->hashed_sas_addr, asd_abort_task() 578 struct asd_ha_struct *asd_ha = dev->port->ha->lldd_ha; asd_initiate_ssp_tmf() 608 dev->port->ha->hashed_sas_addr, HASHED_SAS_ADDR_SIZE); asd_initiate_ssp_tmf()
/linux-4.1.27/drivers/staging/ste_rmi4/
H A D	synaptics_i2c_rmi4.h	6 * Author: Js HA <js.ha@stericsson.com> for ST-Ericsson
/linux-4.1.27/net/bluetooth/bnep/
H A D	netdev.c	82 struct netdev_hw_addr *ha; bnep_net_set_mc_list() local 93 netdev_for_each_mc_addr(ha, dev) { netdev_for_each_mc_addr() 96 memcpy(__skb_put(skb, ETH_ALEN), ha->addr, ETH_ALEN); netdev_for_each_mc_addr() 97 memcpy(__skb_put(skb, ETH_ALEN), ha->addr, ETH_ALEN); netdev_for_each_mc_addr()
/linux-4.1.27/arch/powerpc/boot/
H A D	util.S	66 lis r5,0b@ha 69 addis r5,r5,timebase_period_ns@ha
H A D	crt0.S	61 addis r11,r10,(_GLOBAL_OFFSET_TABLE_-p_base)@ha 67 addis r12,r10,(__dynamic_start-p_base)@ha 82 11: addis r8,r8,(-RELACOUNT)@ha 167 10: addis r12,r12,(-RELACOUNT)@ha
H A D	ps3-head.S	70 lis r4, _zimage_start@ha
/linux-4.1.27/sound/soc/omap/
H A D	omap-hdmi-audio.c	309 struct omap_hdmi_audio_pdata *ha = pdev->dev.platform_data; omap_hdmi_audio_probe() local 316 if (!ha) { omap_hdmi_audio_probe() 324 ad->dssdev = ha->dev; omap_hdmi_audio_probe() 325 ad->ops = ha->ops; omap_hdmi_audio_probe() 326 ad->dma_data.addr = ha->audio_dma_addr; omap_hdmi_audio_probe() 331 switch (ha->dss_version) { omap_hdmi_audio_probe()
/linux-4.1.27/drivers/net/ethernet/stmicro/stmmac/
H A D	dwmac100_core.c	119 struct netdev_hw_addr *ha; dwmac100_set_filter() local 129 netdev_for_each_mc_addr(ha, dev) { netdev_for_each_mc_addr() 133 int bit_nr = ether_crc(ETH_ALEN, ha->addr) >> 26; netdev_for_each_mc_addr()
H A D	dwmac1000_core.c	150 struct netdev_hw_addr *ha; dwmac1000_set_filter() local 155 netdev_for_each_mc_addr(ha, dev) { netdev_for_each_mc_addr() 161 int bit_nr = bitrev32(~crc32_le(~0, ha->addr, netdev_for_each_mc_addr() 182 struct netdev_hw_addr *ha; local 184 netdev_for_each_uc_addr(ha, dev) { netdev_for_each_uc_addr() 185 stmmac_set_mac_addr(ioaddr, ha->addr, netdev_for_each_uc_addr()
/linux-4.1.27/arch/powerpc/platforms/powermac/
H A D	sleep.S	141 lis r5,grackle_wake_up@ha 148 lis r6,MAGIC@ha 153 lis r3,core99_wake_up@ha 161 lis r3,sleep_storage@ha 240 lis r3,sleep_storage@ha
/linux-4.1.27/drivers/firewire/
H A D	net.c	63 static bool fwnet_hwaddr_is_multicast(u8 *ha) fwnet_hwaddr_is_multicast() argument 65 return !!(*ha & 1); fwnet_hwaddr_is_multicast() 206 static __u64 fwnet_hwaddr_fifo(union fwnet_hwaddr *ha) fwnet_hwaddr_fifo() argument 208 return (u64)get_unaligned_be16(&ha->uc.fifo_hi) << 32 fwnet_hwaddr_fifo() 209 | get_unaligned_be32(&ha->uc.fifo_lo); fwnet_hwaddr_fifo() 251 memcpy(h->h_dest, neigh->ha, net->addr_len); fwnet_header_cache() 1278 union fwnet_hwaddr *ha = (union fwnet_hwaddr *)hdr_buf.h_dest; fwnet_tx() local 1279 __be64 guid = get_unaligned(&ha->uc.uniq_id); fwnet_tx() 1291 ptask->fifo_addr = fwnet_hwaddr_fifo(ha); fwnet_tx() 1440 union fwnet_hwaddr *ha; fwnet_probe() local 1486 ha = (union fwnet_hwaddr *)net->dev_addr; fwnet_probe() 1487 put_unaligned_be64(card->guid, &ha->uc.uniq_id); fwnet_probe() 1488 ha->uc.max_rec = dev->card->max_receive; fwnet_probe() 1489 ha->uc.sspd = dev->card->link_speed; fwnet_probe() 1490 put_unaligned_be16(dev->local_fifo >> 32, &ha->uc.fifo_hi); fwnet_probe() 1491 put_unaligned_be32(dev->local_fifo & 0xffffffff, &ha->uc.fifo_lo); fwnet_probe()
/linux-4.1.27/drivers/net/ethernet/atheros/atlx/
H A D	atlx.c	130 struct netdev_hw_addr *ha; atlx_set_multi() local 151 netdev_for_each_mc_addr(ha, netdev) { netdev_for_each_mc_addr() 152 hash_value = atlx_hash_mc_addr(hw, ha->addr); netdev_for_each_mc_addr()
/linux-4.1.27/net/decnet/
H A D	dn_neigh.c	139 memcpy(neigh->ha, dev->broadcast, dev->addr_len); dn_neigh_construct() 141 dn_dn2eth(neigh->ha, dn->addr); dn_neigh_construct() 185 neigh->ha, mac_addr, skb->len); dn_neigh_output() 403 memcpy(neigh->ha, &eth_hdr(skb)->h_source, ETH_ALEN); dn_neigh_router_hello() 462 memcpy(neigh->ha, &eth_hdr(skb)->h_source, ETH_ALEN); dn_neigh_endnode_hello()
/linux-4.1.27/arch/powerpc/kvm/
H A D	book3s_32_sr.S	113 lis r9, BATS@ha
/linux-4.1.27/arch/powerpc/mm/
H A D	hash_low_32.S	75 lis r5,swapper_pg_dir@ha /* if kernel address, use */ 145 addis r8,r7,mmu_hash_lock@ha 161 addis r8,r7,mmu_hash_lock@ha 212 addis r6,r7,mmu_hash_lock@ha 258 addis r6,r7,mmu_hash_lock@ha 355 addis r4,r7,htab_hash_searches@ha 390 addis r4,r7,primary_pteg_full@ha 427 1: addis r4,r7,next_slot@ha /* get next evict slot */ 546 addis r9,r7,mmu_hash_lock@ha
H A D	slb_low.S	69 addis r9,r9,(MAX_USER_CONTEXT - 0xc + 1)@ha 108 addis r9,r9,(MAX_USER_CONTEXT - 0xc + 1)@ha
H A D	tlb_nohash_low.S	132 lis r4,tlb_44x_hwater@ha
/linux-4.1.27/drivers/net/ethernet/ti/
H A D	cpmac.c	323 struct netdev_hw_addr *ha; cpmac_set_multicast_list() local 342 netdev_for_each_mc_addr(ha, dev) { netdev_for_each_mc_addr() 344 tmp = ha->addr[0]; netdev_for_each_mc_addr() 346 tmp = ha->addr[1]; netdev_for_each_mc_addr() 348 tmp = ha->addr[2]; netdev_for_each_mc_addr() 350 tmp = ha->addr[3]; netdev_for_each_mc_addr() 352 tmp = ha->addr[4]; netdev_for_each_mc_addr() 354 tmp = ha->addr[5]; netdev_for_each_mc_addr()
/linux-4.1.27/drivers/net/ethernet/xilinx/
H A D	ll_temac_main.c	374 struct netdev_hw_addr *ha; temac_set_multicast_list() local 377 netdev_for_each_mc_addr(ha, ndev) { netdev_for_each_mc_addr() 380 multi_addr_msw = ((ha->addr[3] << 24) | netdev_for_each_mc_addr() 381 (ha->addr[2] << 16) | netdev_for_each_mc_addr() 382 (ha->addr[1] << 8) | netdev_for_each_mc_addr() 383 (ha->addr[0])); netdev_for_each_mc_addr() 386 multi_addr_lsw = ((ha->addr[5] << 8) | netdev_for_each_mc_addr() 387 (ha->addr[4]) | (i << 16)); netdev_for_each_mc_addr()
H A D	xilinx_axienet_main.c	364 struct netdev_hw_addr *ha; axienet_set_multicast_list() local 367 netdev_for_each_mc_addr(ha, ndev) { netdev_for_each_mc_addr() 371 af0reg = (ha->addr[0]); netdev_for_each_mc_addr() 372 af0reg |= (ha->addr[1] << 8); netdev_for_each_mc_addr() 373 af0reg |= (ha->addr[2] << 16); netdev_for_each_mc_addr() 374 af0reg |= (ha->addr[3] << 24); netdev_for_each_mc_addr() 376 af1reg = (ha->addr[4]); netdev_for_each_mc_addr() 377 af1reg |= (ha->addr[5] << 8); netdev_for_each_mc_addr()
/linux-4.1.27/drivers/crypto/amcc/
H A D	crypto4xx_alg.c	182 unsigned char ha, crypto4xx_hash_alg_init() 217 SA_NO_HEADER_PROC, ha, SA_CIPHER_ALG_NULL, crypto4xx_hash_alg_init() 180 crypto4xx_hash_alg_init(struct crypto_tfm *tfm, unsigned int sa_len, unsigned char ha, unsigned char hm) crypto4xx_hash_alg_init() argument
/linux-4.1.27/net/bridge/
H A D	br_input.c	110 f = __br_fdb_get(br, n->ha, vid); br_do_proxy_arp() 114 sha, n->ha, sha); br_do_proxy_arp()
/linux-4.1.27/drivers/net/wireless/ath/ath5k/
H A D	mac80211-ops.c	325 struct netdev_hw_addr *ha; ath5k_prepare_multicast() local 330 netdev_hw_addr_list_for_each(ha, mc_list) { netdev_hw_addr_list_for_each() 332 val = get_unaligned_le32(ha->addr + 0); netdev_hw_addr_list_for_each() 334 val = get_unaligned_le32(ha->addr + 3); netdev_hw_addr_list_for_each() 342 * ha->addr[5]); */ netdev_hw_addr_list_for_each()
/linux-4.1.27/drivers/net/ethernet/amd/xgbe/
H A D	xgbe-dev.c	734 struct netdev_hw_addr *ha, unsigned int *mac_reg) xgbe_set_mac_reg() 742 if (ha) { xgbe_set_mac_reg() 744 mac_addr[0] = ha->addr[0]; xgbe_set_mac_reg() 745 mac_addr[1] = ha->addr[1]; xgbe_set_mac_reg() 746 mac_addr[2] = ha->addr[2]; xgbe_set_mac_reg() 747 mac_addr[3] = ha->addr[3]; xgbe_set_mac_reg() 749 mac_addr[0] = ha->addr[4]; xgbe_set_mac_reg() 750 mac_addr[1] = ha->addr[5]; xgbe_set_mac_reg() 752 DBGPR(" adding mac address %pM at 0x%04x\n", ha->addr, xgbe_set_mac_reg() 767 struct netdev_hw_addr *ha; xgbe_set_mac_addn_addrs() local 777 netdev_for_each_uc_addr(ha, netdev) { netdev_for_each_uc_addr() 778 xgbe_set_mac_reg(pdata, ha, &mac_reg); netdev_for_each_uc_addr() 785 netdev_for_each_mc_addr(ha, netdev) { netdev_for_each_mc_addr() 786 xgbe_set_mac_reg(pdata, ha, &mac_reg); netdev_for_each_mc_addr() 800 struct netdev_hw_addr *ha; xgbe_set_mac_hash_table() local 812 netdev_for_each_uc_addr(ha, netdev) { netdev_for_each_uc_addr() 813 crc = bitrev32(~crc32_le(~0, ha->addr, ETH_ALEN)); netdev_for_each_uc_addr() 818 netdev_for_each_mc_addr(ha, netdev) { netdev_for_each_mc_addr() 819 crc = bitrev32(~crc32_le(~0, ha->addr, ETH_ALEN)); netdev_for_each_mc_addr() 733 xgbe_set_mac_reg(struct xgbe_prv_data *pdata, struct netdev_hw_addr *ha, unsigned int *mac_reg) xgbe_set_mac_reg() argument
/linux-4.1.27/drivers/scsi/bnx2fc/
H A D	bnx2fc_fcoe.c	1173 struct netdev_hw_addr *ha; bnx2fc_interface_setup() local 1178 for_each_dev_addr(physdev, ha) { for_each_dev_addr() 1179 BNX2FC_MISC_DBG("net_config: ha->type = %d, fip_mac = ", for_each_dev_addr() 1180 ha->type); for_each_dev_addr() 1181 printk(KERN_INFO "%2x:%2x:%2x:%2x:%2x:%2x\n", ha->addr[0], for_each_dev_addr() 1182 ha->addr[1], ha->addr[2], ha->addr[3], for_each_dev_addr() 1183 ha->addr[4], ha->addr[5]); for_each_dev_addr() 1185 if ((ha->type == NETDEV_HW_ADDR_T_SAN) && for_each_dev_addr() 1186 (is_valid_ether_addr(ha->addr))) { for_each_dev_addr() 1187 memcpy(ctlr->ctl_src_addr, ha->addr, for_each_dev_addr()
/linux-4.1.27/drivers/scsi/pm8001/
H A D	pm8001_init.c	136 sas_phy->ha = (struct sas_ha_struct *)pm8001_ha->shost->hostdata; pm8001_phy_init() 447 * pm8001_pci_alloc - initialize our ha card structure 537 * @chip_info: our ha struct. 583 * @chip_info: our ha struct. 608 * @chip_info: our ha struct. 726 * @chip_info: our ha struct. 785 * @chip_info: our ha struct.
H A D	pm8001_sas.c	140 struct sas_ha_struct *sha = dev->port->ha; pm8001_find_ha_by_dev() 162 pm8001_ha = sas_phy->ha->lldd_ha; pm8001_phy_control() 256 struct sas_ha_struct *ha = SHOST_TO_SAS_HA(shost); pm8001_scan_finished() local 263 sas_drain_work(ha); pm8001_scan_finished() 888 /* retry commands by ha, by task and/or by device */ pm8001_open_reject_retry()
/linux-4.1.27/net/ipv4/
H A D	arp.c	265 arp_mc_map(addr, neigh->ha, dev, 1); arp_constructor() 268 memcpy(neigh->ha, dev->dev_addr, dev->addr_len); arp_constructor() 272 memcpy(neigh->ha, dev->broadcast, dev->addr_len); arp_constructor() 1021 memcpy(r->arp_ha.sa_data, neigh->ha, dev->addr_len); arp_req_get() 1264 ax2asc2((ax25_address *)n->ha, hbuffer); arp_format_neigh_entry() 1268 hbuffer[k++] = hex_asc_hi(n->ha[j]); arp_format_neigh_entry() 1269 hbuffer[k++] = hex_asc_lo(n->ha[j]); arp_format_neigh_entry()
/linux-4.1.27/drivers/net/ethernet/chelsio/cxgb3/
H A D	l2t.c	105 memcpy(e->dmac, e->neigh->ha, sizeof(e->dmac)); setup_l2e_send_pending() 291 if (memcmp(e->dmac, neigh->ha, sizeof(e->dmac)) || reuse_entry() 432 if (!ether_addr_equal(e->dmac, neigh->ha)) t3_l2t_update()
H A D	xgmac.c	314 struct netdev_hw_addr *ha; t3_mac_set_rx_mode() local 318 netdev_for_each_mc_addr(ha, dev) netdev_for_each_mc_addr() 321 ha->addr); netdev_for_each_mc_addr() 323 int hash = hash_hw_addr(ha->addr); netdev_for_each_mc_addr()
/linux-4.1.27/drivers/net/ethernet/dec/tulip/
H A D	tulip_core.c	1017 struct netdev_hw_addr *ha; build_setup_frame_hash() local 1024 netdev_for_each_mc_addr(ha, dev) { netdev_for_each_mc_addr() 1025 int index = ether_crc_le(ETH_ALEN, ha->addr) & 0x1ff; netdev_for_each_mc_addr() 1045 struct netdev_hw_addr *ha; build_setup_frame_perfect() local 1050 netdev_for_each_mc_addr(ha, dev) { netdev_for_each_mc_addr() 1051 eaddrs = (u16 *) ha->addr; netdev_for_each_mc_addr() 1088 struct netdev_hw_addr *ha; set_rx_mode() local 1096 netdev_for_each_mc_addr(ha, dev) { netdev_for_each_mc_addr() 1099 ha->addr); netdev_for_each_mc_addr() 1102 ha->addr) >> 26; netdev_for_each_mc_addr() 1108 ha->addr, netdev_for_each_mc_addr() 1109 ether_crc(ETH_ALEN, ha->addr), netdev_for_each_mc_addr()
H A D	de2104x.c	668 struct netdev_hw_addr *ha; build_setup_frame_hash() local 675 netdev_for_each_mc_addr(ha, dev) { netdev_for_each_mc_addr() 676 int index = ether_crc_le(ETH_ALEN, ha->addr) & 0x1ff; netdev_for_each_mc_addr() 697 struct netdev_hw_addr *ha; build_setup_frame_perfect() local 702 netdev_for_each_mc_addr(ha, dev) { netdev_for_each_mc_addr() 703 eaddrs = (u16 *) ha->addr; netdev_for_each_mc_addr()
H A D	dmfe.c	1462 struct netdev_hw_addr *ha; dm9132_id_table() local 1478 netdev_for_each_mc_addr(ha, dev) { netdev_for_each_mc_addr() 1479 u32 hash_val = cal_CRC((char *)ha->addr, 6, 0) & 0x3f; netdev_for_each_mc_addr() 1498 struct netdev_hw_addr *ha; send_filter_frame() local 1521 netdev_for_each_mc_addr(ha, dev) { netdev_for_each_mc_addr() 1522 addrptr = (u16 *) ha->addr; netdev_for_each_mc_addr()
/linux-4.1.27/drivers/net/ethernet/freescale/fs_enet/
H A D	mac-fec.c	237 struct netdev_hw_addr *ha; set_multicast_list() local 241 netdev_for_each_mc_addr(ha, dev) set_multicast_list() 242 set_multicast_one(dev, ha->addr); set_multicast_list()
H A D	mac-scc.c	228 struct netdev_hw_addr *ha; set_multicast_list() local 232 netdev_for_each_mc_addr(ha, dev) set_multicast_list() 233 set_multicast_one(dev, ha->addr); set_multicast_list()
H A D	mac-fcc.c	237 struct netdev_hw_addr *ha; set_multicast_list() local 241 netdev_for_each_mc_addr(ha, dev) set_multicast_list() 242 set_multicast_one(dev, ha->addr); set_multicast_list()
/linux-4.1.27/drivers/net/ethernet/moxa/
H A D	moxart_ether.c	384 struct netdev_hw_addr *ha; moxart_mac_setmulticast() local 387 netdev_for_each_mc_addr(ha, ndev) { netdev_for_each_mc_addr() 388 crc_val = crc32_le(~0, ha->addr, ETH_ALEN); netdev_for_each_mc_addr()
/linux-4.1.27/drivers/net/usb/
H A D	asix_common.c	344 struct netdev_hw_addr *ha; asix_set_multicast() local 350 netdev_for_each_mc_addr(ha, net) { netdev_for_each_mc_addr() 351 crc_bits = ether_crc(ETH_ALEN, ha->addr) >> 26; netdev_for_each_mc_addr()
H A D	dm9601.c	307 struct netdev_hw_addr *ha; dm9601_set_multicast() local 309 netdev_for_each_mc_addr(ha, net) { netdev_for_each_mc_addr() 310 u32 crc = ether_crc(ETH_ALEN, ha->addr) >> 26; netdev_for_each_mc_addr()
H A D	mcs7830.c	383 struct netdev_hw_addr *ha; mcs7830_data_set_multicast() local 387 netdev_for_each_mc_addr(ha, net) { netdev_for_each_mc_addr() 388 crc_bits = ether_crc(ETH_ALEN, ha->addr) >> 26; netdev_for_each_mc_addr()
H A D	sr9700.c	276 struct netdev_hw_addr *ha; sr9700_set_multicast() local 278 netdev_for_each_mc_addr(ha, netdev) { netdev_for_each_mc_addr() 279 u32 crc = ether_crc(ETH_ALEN, ha->addr) >> 26; netdev_for_each_mc_addr()
H A D	catc.c	640 struct netdev_hw_addr *ha; catc_set_multicast_list() local 658 netdev_for_each_mc_addr(ha, netdev) { netdev_for_each_mc_addr() 659 u32 crc = ether_crc_le(6, ha->addr); netdev_for_each_mc_addr()
H A D	sr9800.c	315 struct netdev_hw_addr *ha; sr_set_multicast() local 321 netdev_for_each_mc_addr(ha, net) { netdev_for_each_mc_addr() 322 crc_bits = ether_crc(ETH_ALEN, ha->addr) >> 26; netdev_for_each_mc_addr()
H A D	asix_devices.c	151 struct netdev_hw_addr *ha; ax88172_set_multicast() local 157 netdev_for_each_mc_addr(ha, net) { netdev_for_each_mc_addr() 158 crc_bits = ether_crc(ETH_ALEN, ha->addr) >> 26; netdev_for_each_mc_addr()
/linux-4.1.27/drivers/net/wireless/libertas_tf/
H A D	main.c	428 struct netdev_hw_addr *ha; lbtf_op_prepare_multicast() local 436 netdev_hw_addr_list_for_each(ha, mc_list) lbtf_op_prepare_multicast() 437 memcpy(&priv->multicastlist[i++], ha->addr, ETH_ALEN); lbtf_op_prepare_multicast()
/linux-4.1.27/include/net/
H A D	bonding.h	614 struct netdev_hw_addr *ha; bond_slave_has_mac_rx() local 623 netdev_for_each_uc_addr(ha, bond->dev) bond_slave_has_mac_rx() 624 if (ether_addr_equal_64bits(mac, ha->addr)) bond_slave_has_mac_rx()
H A D	neighbour.h	150 unsigned char ha[ALIGN(MAX_ADDR_LEN, sizeof(unsigned long))]; member in struct:neighbour 510 memcpy(dst, n->ha, dev->addr_len); neigh_ha_snapshot()
/linux-4.1.27/include/linux/
H A D	etherdevice.h	347 struct netdev_hw_addr *ha; is_etherdev_addr() local 351 for_each_dev_addr(dev, ha) { for_each_dev_addr() 352 res = ether_addr_equal_64bits(addr, ha->addr); for_each_dev_addr()
/linux-4.1.27/drivers/net/ethernet/mellanox/mlx4/
H A D	en_netdev.c	793 struct netdev_hw_addr *ha; mlx4_en_cache_mclist() local 797 netdev_for_each_mc_addr(ha, dev) { netdev_for_each_mc_addr() 803 memcpy(tmp->addr, ha->addr, ETH_ALEN); netdev_for_each_mc_addr() 1109 struct netdev_hw_addr *ha; mlx4_en_do_uc_filter() local 1129 netdev_for_each_uc_addr(ha, dev) { netdev_for_each_uc_addr() 1131 ha->addr)) { netdev_for_each_uc_addr() 1168 netdev_for_each_uc_addr(ha, dev) { netdev_for_each_uc_addr() 1170 bucket = &priv->mac_hash[ha->addr[MLX4_EN_MAC_HASH_IDX]]; hlist_for_each_entry() 1172 if (ether_addr_equal_64bits(entry->mac, ha->addr)) { hlist_for_each_entry() 1182 ha->addr, priv->port); 1186 mac = mlx4_mac_to_u64(ha->addr); 1187 memcpy(entry->mac, ha->addr, ETH_ALEN); 1191 ha->addr, priv->port, err); 1196 err = mlx4_en_uc_steer_add(priv, ha->addr, 1201 ha->addr, priv->port, err); 1209 ha->addr, priv->port); 1210 mac_hash = ha->addr[MLX4_EN_MAC_HASH_IDX];
/linux-4.1.27/drivers/net/ethernet/intel/ixgbevf/
H A D	vf.c	436 struct netdev_hw_addr *ha; ixgbevf_update_mc_addr_list_vf() local 457 netdev_for_each_mc_addr(ha, netdev) { netdev_for_each_mc_addr() 460 if (is_link_local_ether_addr(ha->addr)) netdev_for_each_mc_addr() 463 vector_list[i++] = ixgbevf_mta_vector(hw, ha->addr); netdev_for_each_mc_addr()
/linux-4.1.27/drivers/infiniband/ulp/ipoib/
H A D	ipoib.h	557 #define IPOIB_CM_SUPPORTED(ha) (ha[0] & (IPOIB_FLAGS_RC)) 776 #define IPOIB_QPN(ha) (be32_to_cpup((__be32 *) ha) & 0xffffff)
H A D	ipoib_multicast.c	809 struct netdev_hw_addr *ha; ipoib_mcast_restart_task() local 839 netdev_for_each_mc_addr(ha, dev) { netdev_for_each_mc_addr() 842 if (!ipoib_mcast_addr_is_valid(ha->addr, dev->broadcast)) netdev_for_each_mc_addr() 845 memcpy(mgid.raw, ha->addr + 4, sizeof mgid); netdev_for_each_mc_addr()
/linux-4.1.27/include/scsi/
H A D	libsas.h	293 struct sas_ha_struct *ha; member in struct:asd_sas_port 355 struct sas_ha_struct *ha; /* may be set; the class sets it anyway */ member in struct:asd_sas_phy 367 struct sas_ha_struct *ha; member in struct:sas_ha_event 723 extern int sas_drain_work(struct sas_ha_struct *ha);
/linux-4.1.27/include/uapi/linux/
H A D	if_arp.h	129 #define ATF_COM 0x02 /* completed entry (ha valid) */
/linux-4.1.27/arch/powerpc/include/asm/
H A D	ppc_asm.h	216 0: addis r2,r12,(.TOC.-0b)@ha; \ 323 addis reg,reg,(name - 0b)@ha; \ 351 lis reg,(expr)@ha; \ 356 #define LOAD_REG_ADDRBASE(reg, name) lis reg,name@ha
/linux-4.1.27/drivers/net/ethernet/micrel/
H A D	ks8695net.c	336 struct netdev_hw_addr *ha; ks8695_init_partial_multicast() local 339 netdev_for_each_mc_addr(ha, ndev) { netdev_for_each_mc_addr() 343 low = (ha->addr[2] << 24) | (ha->addr[3] << 16) | netdev_for_each_mc_addr() 344 (ha->addr[4] << 8) | (ha->addr[5]); netdev_for_each_mc_addr() 345 high = (ha->addr[0] << 8) | (ha->addr[1]); netdev_for_each_mc_addr()
/linux-4.1.27/drivers/scsi/megaraid/
H A D	mega_common.h	133 * @ha : is high availability present - clustering 189 uint8_t ha; member in struct:__anon9273
/linux-4.1.27/net/ipv6/
H A D	ndisc.c	330 ndisc_mc_map(addr, neigh->ha, dev, 1); ndisc_constructor() 333 memcpy(neigh->ha, dev->dev_addr, dev->addr_len); ndisc_constructor() 338 memcpy(neigh->ha, dev->broadcast, dev->addr_len); ndisc_constructor() 1472 u8 ha_buf[MAX_ADDR_LEN], *ha = NULL; ndisc_send_redirect() local 1524 memcpy(ha_buf, neigh->ha, dev->addr_len); ndisc_send_redirect() 1526 ha = ha_buf; ndisc_send_redirect() 1557 if (ha) ndisc_send_redirect() 1558 ndisc_fill_addr_option(buff, ND_OPT_TARGET_LL_ADDR, ha); ndisc_send_redirect()
/linux-4.1.27/drivers/net/wireless/ath/ath6kl/
H A D	main.c	1160 struct netdev_hw_addr *ha; ath6kl_set_multicast_list() local 1210 netdev_for_each_mc_addr(ha, ndev) { netdev_for_each_mc_addr() 1211 if (memcmp(ha->addr, mc_filter->hw_addr, netdev_for_each_mc_addr() 1242 netdev_for_each_mc_addr(ha, ndev) { netdev_for_each_mc_addr() 1245 if (memcmp(ha->addr, mc_filter->hw_addr, netdev_for_each_mc_addr() 1260 memcpy(mc_filter->hw_addr, ha->addr, netdev_for_each_mc_addr()
/linux-4.1.27/drivers/net/wireless/libertas/
H A D	main.c	343 struct netdev_hw_addr *ha; lbs_add_mcast_addrs() local 351 netdev_for_each_mc_addr(ha, dev) { netdev_for_each_mc_addr() 352 if (mac_in_list(cmd->maclist, nr_addrs, ha->addr)) { netdev_for_each_mc_addr() 354 ha->addr); netdev_for_each_mc_addr() 361 memcpy(&cmd->maclist[6*i], ha->addr, ETH_ALEN); netdev_for_each_mc_addr() 363 ha->addr); netdev_for_each_mc_addr()
/linux-4.1.27/drivers/net/ethernet/octeon/
H A D	octeon_mgmt.c	568 struct netdev_hw_addr *ha; octeon_mgmt_set_rx_filtering() local 594 netdev_for_each_uc_addr(ha, netdev) octeon_mgmt_set_rx_filtering() 595 octeon_mgmt_cam_state_add(&cam_state, ha->addr); octeon_mgmt_set_rx_filtering() 598 netdev_for_each_mc_addr(ha, netdev) octeon_mgmt_set_rx_filtering() 599 octeon_mgmt_cam_state_add(&cam_state, ha->addr); octeon_mgmt_set_rx_filtering()
/linux-4.1.27/drivers/net/ethernet/qlogic/qlcnic/
H A D	qlcnic_hw.c	544 struct netdev_hw_addr *ha; __qlcnic_set_multi() local 565 netdev_for_each_mc_addr(ha, netdev) __qlcnic_set_multi() 566 qlcnic_nic_add_mac(adapter, ha->addr, vlan, __qlcnic_set_multi() 576 netdev_for_each_uc_addr(ha, netdev) __qlcnic_set_multi() 577 qlcnic_nic_add_mac(adapter, ha->addr, vlan, __qlcnic_set_multi()
H A D	qlcnic_sriov_common.c	1541 struct netdev_hw_addr *ha; qlcnic_sriov_vf_set_multi() local 1557 netdev_for_each_mc_addr(ha, netdev) qlcnic_sriov_vf_set_multi() 1558 qlcnic_vf_add_mc_list(netdev, ha->addr, qlcnic_sriov_vf_set_multi() 1569 netdev_for_each_uc_addr(ha, netdev) qlcnic_sriov_vf_set_multi() 1570 qlcnic_vf_add_mc_list(netdev, ha->addr, qlcnic_sriov_vf_set_multi()
/linux-4.1.27/drivers/net/ethernet/rdc/
H A D	r6040.c	863 struct netdev_hw_addr *ha; r6040_multicast_list() local 901 netdev_for_each_mc_addr(ha, dev) { netdev_for_each_mc_addr() 902 u16 *adrp = (u16 *) ha->addr; netdev_for_each_mc_addr() 928 netdev_for_each_mc_addr(ha, dev) { netdev_for_each_mc_addr() 929 u8 *addrs = ha->addr; netdev_for_each_mc_addr()
/linux-4.1.27/drivers/net/ethernet/broadcom/
H A D	cnic.c	396 memcpy(csk->ha, path_resp->mac_addr, ETH_ALEN); cnic_iscsi_nl_msg_recv() 404 if (is_valid_ether_addr(csk->ha)) { cnic_iscsi_nl_msg_recv() 2150 conn_addr->remote_addr_0 = csk->ha[0]; cnic_bnx2x_connect() 2151 conn_addr->remote_addr_1 = csk->ha[1]; cnic_bnx2x_connect() 2152 conn_addr->remote_addr_2 = csk->ha[2]; cnic_bnx2x_connect() 2153 conn_addr->remote_addr_3 = csk->ha[3]; cnic_bnx2x_connect() 2154 conn_addr->remote_addr_4 = csk->ha[4]; cnic_bnx2x_connect() 2155 conn_addr->remote_addr_5 = csk->ha[5]; cnic_bnx2x_connect() 3382 l4kwqe->da0 = csk->ha[0]; cnic_cm_offload_pg() 3383 l4kwqe->da1 = csk->ha[1]; cnic_cm_offload_pg() 3384 l4kwqe->da2 = csk->ha[2]; cnic_cm_offload_pg() 3385 l4kwqe->da3 = csk->ha[3]; cnic_cm_offload_pg() 3386 l4kwqe->da4 = csk->ha[4]; cnic_cm_offload_pg() 3387 l4kwqe->da5 = csk->ha[5]; cnic_cm_offload_pg() 3424 l4kwqe->da0 = csk->ha[0]; cnic_cm_update_pg() 3425 l4kwqe->da1 = csk->ha[1]; cnic_cm_update_pg() 3426 l4kwqe->da2 = csk->ha[2]; cnic_cm_update_pg() 3427 l4kwqe->da3 = csk->ha[3]; cnic_cm_update_pg() 3428 l4kwqe->da4 = csk->ha[4]; cnic_cm_update_pg() 3429 l4kwqe->da5 = csk->ha[5]; cnic_cm_update_pg()
H A D	cnic_if.h	253 unsigned char ha[ETH_ALEN]; member in struct:cnic_sock
/linux-4.1.27/drivers/net/ethernet/amd/
H A D	7990.c	600 struct netdev_hw_addr *ha; lance_load_multicast() local 614 netdev_for_each_mc_addr(ha, dev) { netdev_for_each_mc_addr() 615 crc = ether_crc_le(6, ha->addr); netdev_for_each_mc_addr()
H A D	a2065.c	589 struct netdev_hw_addr *ha; lance_load_multicast() local 603 netdev_for_each_mc_addr(ha, dev) { netdev_for_each_mc_addr() 604 crc = ether_crc_le(6, ha->addr); netdev_for_each_mc_addr()
H A D	am79c961a.c	222 struct netdev_hw_addr *ha; am79c961_get_rx_mode() local 226 netdev_for_each_mc_addr(ha, dev) am79c961_get_rx_mode() 227 am79c961_mc_hash(ha->addr, hash); am79c961_get_rx_mode()
H A D	au1000_eth.c	1101 struct netdev_hw_addr *ha; au1000_multicast_list() local 1105 netdev_for_each_mc_addr(ha, dev) au1000_multicast_list() 1106 set_bit(ether_crc(ETH_ALEN, ha->addr)>>26, au1000_multicast_list()
H A D	declance.c	945 struct netdev_hw_addr *ha; lance_load_multicast() local 963 netdev_for_each_mc_addr(ha, dev) { netdev_for_each_mc_addr() 964 crc = ether_crc_le(ETH_ALEN, ha->addr); netdev_for_each_mc_addr()
H A D	amd8111e.c	1358 struct netdev_hw_addr *ha; amd8111e_set_multicast_list() local 1389 netdev_for_each_mc_addr(ha, dev) { netdev_for_each_mc_addr() 1390 bit_num = (ether_crc_le(ETH_ALEN, ha->addr) >> 26) & 0x3f; netdev_for_each_mc_addr()
H A D	nmclan_cs.c	1423 struct netdev_hw_addr *ha; set_multicast_list() local 1443 netdev_for_each_mc_addr(ha, dev) { netdev_for_each_mc_addr() 1444 memcpy(adr, ha->addr, ETH_ALEN); netdev_for_each_mc_addr()
/linux-4.1.27/drivers/net/ethernet/chelsio/cxgb4/
H A D	l2t.c	159 memcpy(e->dmac, e->neigh->ha, sizeof(e->dmac)); write_l2e() 351 if (memcmp(e->dmac, neigh->ha, sizeof(e->dmac)) || reuse_entry() 515 if (memcmp(e->dmac, neigh->ha, sizeof(e->dmac))) t4_l2t_update()
/linux-4.1.27/drivers/net/ethernet/natsemi/
H A D	sonic.c	531 struct netdev_hw_addr *ha; sonic_multicast_list() local 550 netdev_for_each_mc_addr(ha, dev) { netdev_for_each_mc_addr() 551 addr = ha->addr; netdev_for_each_mc_addr()
/linux-4.1.27/drivers/net/ethernet/sgi/
H A D	meth.c	795 struct netdev_hw_addr *ha; meth_set_rx_mode() local 798 netdev_for_each_mc_addr(ha, dev) meth_set_rx_mode() 799 set_bit((ether_crc(ETH_ALEN, ha->addr) >> 26), meth_set_rx_mode()
/linux-4.1.27/drivers/net/ipvlan/
H A D	ipvlan_main.c	234 struct netdev_hw_addr *ha; ipvlan_set_multicast_mac_filter() local 238 netdev_for_each_mc_addr(ha, dev) ipvlan_set_multicast_mac_filter() 239 __set_bit(ipvlan_mac_hash(ha->addr), mc_filters); ipvlan_set_multicast_mac_filter()
/linux-4.1.27/drivers/net/wireless/mwifiex/
H A D	debugfs.c	80 struct netdev_hw_addr *ha; mwifiex_info_read() local 123 netdev_for_each_mc_addr(ha, netdev) mwifiex_info_read() 125 i++, ha->addr); mwifiex_info_read()
H A D	sta_ioctl.c	43 struct netdev_hw_addr *ha; mwifiex_copy_mcast_addr() local 45 netdev_for_each_mc_addr(ha, dev) mwifiex_copy_mcast_addr() 46 memcpy(&mlist->mac_list[i++], ha->addr, ETH_ALEN); mwifiex_copy_mcast_addr()
/linux-4.1.27/drivers/net/wireless/p54/
H A D	main.c	370 struct netdev_hw_addr *ha; p54_prepare_multicast() local 381 netdev_hw_addr_list_for_each(ha, mc_list) { netdev_hw_addr_list_for_each() 382 memcpy(&priv->mc_maclist[i], ha->addr, ETH_ALEN); netdev_hw_addr_list_for_each()
/linux-4.1.27/drivers/staging/vt6656/
H A D	main_usb.c	766 struct netdev_hw_addr *ha; vnt_prepare_multicast() local 770 netdev_hw_addr_list_for_each(ha, mc_list) { netdev_hw_addr_list_for_each() 771 bit_nr = ether_crc(ETH_ALEN, ha->addr) >> 26; netdev_hw_addr_list_for_each()
/linux-4.1.27/drivers/net/ethernet/apple/
H A D	macmace.c	501 struct netdev_hw_addr *ha; mace_set_multicast() local 510 netdev_for_each_mc_addr(ha, dev) { netdev_for_each_mc_addr() 511 crc = ether_crc_le(6, ha->addr); netdev_for_each_mc_addr()
H A D	bmac.c	974 struct netdev_hw_addr *ha; bmac_set_multicast() local 1003 netdev_for_each_mc_addr(ha, dev) bmac_set_multicast() 1004 bmac_addhash(bp, ha->addr); bmac_set_multicast() 1018 struct netdev_hw_addr *ha; bmac_set_multicast() local 1038 netdev_for_each_mc_addr(ha, dev) { netdev_for_each_mc_addr() 1039 crc = ether_crc_le(6, ha->addr); netdev_for_each_mc_addr()
H A D	mace.c	600 struct netdev_hw_addr *ha; mace_set_multicast() local 608 netdev_for_each_mc_addr(ha, dev) { netdev_for_each_mc_addr() 609 crc = ether_crc_le(6, ha->addr); netdev_for_each_mc_addr()
/linux-4.1.27/drivers/net/ethernet/arc/
H A D	emac_main.c	501 struct netdev_hw_addr *ha; arc_emac_set_rx_mode() local 505 netdev_for_each_mc_addr(ha, ndev) { netdev_for_each_mc_addr() 506 bit = ether_crc_le(ETH_ALEN, ha->addr) >> 26; netdev_for_each_mc_addr()
/linux-4.1.27/drivers/net/ethernet/chelsio/cxgb/
H A D	pm3393.c	379 struct netdev_hw_addr *ha; pm3393_set_rx_mode() local 383 netdev_for_each_mc_addr(ha, t1_get_netdev(rm)) { netdev_for_each_mc_addr() 385 bit = (ether_crc(ETH_ALEN, ha->addr) >> 23) & 0x3f; netdev_for_each_mc_addr()
/linux-4.1.27/drivers/net/ethernet/packetengines/
H A D	yellowfin.c	1296 struct netdev_hw_addr *ha; set_rx_mode() local 1301 netdev_for_each_mc_addr(ha, dev) { netdev_for_each_mc_addr() 1307 bit = (ether_crc_le(3, ha->addr) >> 3) & 0x3f; netdev_for_each_mc_addr() 1309 bit = (ether_crc_le(4, ha->addr) >> 3) & 0x3f; netdev_for_each_mc_addr() 1311 bit = (ether_crc_le(5, ha->addr) >> 3) & 0x3f; netdev_for_each_mc_addr() 1314 bit = (ether_crc_le(6, ha->addr) >> 3) & 0x3f; netdev_for_each_mc_addr()
/linux-4.1.27/arch/powerpc/platforms/83xx/
H A D	suspend-asm.S	50 lis r4, immrbase@ha 226 lis r4, immrbase@ha
/linux-4.1.27/drivers/net/ethernet/xscale/
H A D	ixp4xx_eth.c	936 struct netdev_hw_addr *ha; eth_set_mcast_list() local 960 netdev_for_each_mc_addr(ha, dev) { netdev_for_each_mc_addr() 962 addr = ha->addr; /* first MAC address */ netdev_for_each_mc_addr() 964 diffs[i] |= addr[i] ^ ha->addr[i]; netdev_for_each_mc_addr()
/linux-4.1.27/drivers/scsi/isci/
H A D	task.h	162 struct sas_ha_struct *ha);
/linux-4.1.27/drivers/pcmcia/
H A D	cistpl.c	1028 u_int len, ca, ha; parse_mem() local 1041 len = ca = ha = 0; parse_mem() 1056 ha += *p << (j*8); parse_mem() 1060 mem->win[i].host_addr = ha << 8; parse_mem()
/linux-4.1.27/arch/powerpc/kernel/vdso32/
H A D	gettimeofday.S	46 lis r7,1000000@ha /* load up USEC_PER_SEC */
/linux-4.1.27/tools/testing/selftests/powerpc/pmu/ebb/
H A D	ebb_handler.S	89 0: addis r2,r12,(.TOC.-0b)@ha; \
/linux-4.1.27/drivers/net/ethernet/calxeda/
H A D	xgmac.c	1287 struct netdev_hw_addr *ha; xgmac_set_rx_mode() local 1302 netdev_for_each_uc_addr(ha, dev) { netdev_for_each_uc_addr() 1304 u32 bit_nr = ~ether_crc(ETH_ALEN, ha->addr) >> 23; netdev_for_each_uc_addr() 1311 xgmac_set_mac_addr(ioaddr, ha->addr, reg); netdev_for_each_uc_addr() 1327 netdev_for_each_mc_addr(ha, dev) { netdev_for_each_mc_addr() 1329 u32 bit_nr = ~ether_crc(ETH_ALEN, ha->addr) >> 23; netdev_for_each_mc_addr() 1336 xgmac_set_mac_addr(ioaddr, ha->addr, reg); netdev_for_each_mc_addr()
/linux-4.1.27/drivers/s390/net/
H A D	qeth_l2_main.c	689 struct netdev_hw_addr *ha; qeth_l2_set_multicast_list() local 700 netdev_for_each_mc_addr(ha, dev) qeth_l2_set_multicast_list() 701 qeth_l2_add_mc(card, ha->addr, 0); qeth_l2_set_multicast_list() 703 netdev_for_each_uc_addr(ha, dev) qeth_l2_set_multicast_list() 704 qeth_l2_add_mc(card, ha->addr, 1); qeth_l2_set_multicast_list()
/linux-4.1.27/drivers/net/ethernet/qlogic/netxen/
H A D	netxen_nic_hw.c	536 struct netdev_hw_addr *ha; netxen_p2_nic_set_multi() local 570 netdev_for_each_mc_addr(ha, netdev) netxen_p2_nic_set_multi() 571 netxen_nic_set_mcast_addr(adapter, i++, ha->addr); netxen_p2_nic_set_multi() 683 struct netdev_hw_addr *ha; netxen_p3_nic_set_multi() local 712 netdev_for_each_mc_addr(ha, netdev) netxen_p3_nic_set_multi() 713 nx_p3_nic_add_mac(adapter, ha->addr, &del_list); netxen_p3_nic_set_multi()
/linux-4.1.27/drivers/net/wireless/cw1200/
H A D	sta.c	545 struct netdev_hw_addr *ha; cw1200_prepare_multicast() local 556 netdev_hw_addr_list_for_each(ha, mc_list) { netdev_hw_addr_list_for_each() 557 pr_debug("[STA] multicast: %pM\n", ha->addr); netdev_hw_addr_list_for_each() 559 ha->addr, ETH_ALEN); netdev_hw_addr_list_for_each() 560 if (!ether_addr_equal(ha->addr, broadcast_ipv4) && netdev_hw_addr_list_for_each() 561 !ether_addr_equal(ha->addr, broadcast_ipv6)) netdev_hw_addr_list_for_each()
/linux-4.1.27/drivers/net/ethernet/marvell/
H A D	mv643xx_eth.c	1765 struct netdev_hw_addr *ha; uc_addr_filter_mask() local 1772 netdev_for_each_uc_addr(ha, dev) { netdev_for_each_uc_addr() 1773 if (memcmp(dev->dev_addr, ha->addr, 5)) netdev_for_each_uc_addr() 1775 if ((dev->dev_addr[5] ^ ha->addr[5]) & 0xf0) netdev_for_each_uc_addr() 1778 nibbles |= 1 << (ha->addr[5] & 0x0f); netdev_for_each_uc_addr() 1845 struct netdev_hw_addr *ha; mv643xx_eth_program_multicast_filter() local 1870 netdev_for_each_mc_addr(ha, dev) { netdev_for_each_mc_addr() 1871 u8 *a = ha->addr; netdev_for_each_mc_addr()
/linux-4.1.27/arch/arm/boot/dts/
H A D	Makefile	376 omap3-ha.dtb \ 377 omap3-ha-lcd.dtb \
/linux-4.1.27/drivers/staging/lustre/lustre/libcfs/
H A D	debug.c	233 return "ha"; libcfs_debug_dbg2str()
/linux-4.1.27/drivers/net/wireless/zd1211rw/
H A D	zd_mac.c	1220 struct netdev_hw_addr *ha; zd_op_prepare_multicast() local 1224 netdev_hw_addr_list_for_each(ha, mc_list) { netdev_hw_addr_list_for_each() 1225 dev_dbg_f(zd_mac_dev(mac), "mc addr %pM\n", ha->addr); netdev_hw_addr_list_for_each() 1226 zd_mc_add_addr(&hash, ha->addr); netdev_hw_addr_list_for_each()
/linux-4.1.27/drivers/net/ethernet/aeroflex/
H A D	greth.c	1046 struct netdev_hw_addr *ha; greth_set_hash_filter() local 1054 netdev_for_each_mc_addr(ha, dev) { netdev_for_each_mc_addr() 1055 bitnr = greth_hash_get_index(ha->addr); netdev_for_each_mc_addr()
/linux-4.1.27/drivers/net/ethernet/
H A D	ethoc.c	797 struct netdev_hw_addr *ha; ethoc_set_multicast_list() local 825 netdev_for_each_mc_addr(ha, dev) { netdev_for_each_mc_addr() 826 u32 crc = ether_crc(ETH_ALEN, ha->addr); netdev_for_each_mc_addr()
H A D	korina.c	483 struct netdev_hw_addr *ha; korina_multicast_list() local 499 netdev_for_each_mc_addr(ha, dev) { netdev_for_each_mc_addr() 500 crc = ether_crc_le(6, ha->addr); netdev_for_each_mc_addr()
/linux-4.1.27/drivers/net/ethernet/freescale/
H A D	fec_mpc52xx.c	568 struct netdev_hw_addr *ha; mpc52xx_fec_set_multicast_list() local 572 netdev_for_each_mc_addr(ha, dev) { netdev_for_each_mc_addr() 573 crc = ether_crc_le(6, ha->addr) >> 26; netdev_for_each_mc_addr()
/linux-4.1.27/drivers/net/ethernet/fujitsu/
H A D	fmvj18x_cs.c	1151 struct netdev_hw_addr *ha; set_rx_mode() local 1154 netdev_for_each_mc_addr(ha, dev) { netdev_for_each_mc_addr() 1155 unsigned int bit = ether_crc_le(ETH_ALEN, ha->addr) >> 26; netdev_for_each_mc_addr()
/linux-4.1.27/drivers/net/ethernet/i825xx/
H A D	sun3_82586.c	413 struct netdev_hw_addr *ha; init586() local 537 netdev_for_each_mc_addr(ha, dev) init586() 539 ha->addr, ETH_ALEN); init586()
/linux-4.1.27/drivers/net/ethernet/nxp/
H A D	lpc_eth.c	1157 struct netdev_hw_addr *ha; lpc_eth_set_multicast_list() local 1185 netdev_hw_addr_list_for_each(ha, mcptr) { netdev_hw_addr_list_for_each() 1186 hash_val = (ether_crc(6, ha->addr) >> 23) & 0x3F; netdev_hw_addr_list_for_each()
/linux-4.1.27/drivers/net/ethernet/silan/
H A D	sc92031.c	429 struct netdev_hw_addr *ha; _sc92031_set_mar() local 431 netdev_for_each_mc_addr(ha, dev) { netdev_for_each_mc_addr() 435 crc = ~ether_crc(ETH_ALEN, ha->addr); netdev_for_each_mc_addr()
/linux-4.1.27/drivers/net/ethernet/sun/
H A D	sunbmac.c	996 struct netdev_hw_addr *ha; bigmac_set_multicast() local 1020 netdev_for_each_mc_addr(ha, dev) { netdev_for_each_mc_addr() 1021 crc = ether_crc_le(6, ha->addr); netdev_for_each_mc_addr()
H A D	sunqe.c	625 struct netdev_hw_addr *ha; qe_set_multicast() local 648 netdev_for_each_mc_addr(ha, dev) { netdev_for_each_mc_addr() 649 crc = ether_crc_le(6, ha->addr); netdev_for_each_mc_addr()
H A D	sunhme.c	1530 struct netdev_hw_addr *ha; happy_meal_init() local 1534 netdev_for_each_mc_addr(ha, hp->dev) { happy_meal_init() 1535 crc = ether_crc_le(6, ha->addr); happy_meal_init() 2405 struct netdev_hw_addr *ha; happy_meal_set_multicast() local 2422 netdev_for_each_mc_addr(ha, dev) { netdev_for_each_mc_addr() 2423 crc = ether_crc_le(6, ha->addr); netdev_for_each_mc_addr()
/linux-4.1.27/drivers/net/
H A D	macvlan.c	724 struct netdev_hw_addr *ha; macvlan_set_mac_lists() local 728 netdev_for_each_mc_addr(ha, dev) { netdev_for_each_mc_addr() 729 __set_bit(mc_hash(vlan, ha->addr), filter); netdev_for_each_mc_addr()
H A D	virtio_net.c	1156 struct netdev_hw_addr *ha; virtnet_set_rx_mode() local 1197 netdev_for_each_uc_addr(ha, dev) virtnet_set_rx_mode() 1198 memcpy(&mac_data->macs[i++][0], ha->addr, ETH_ALEN); virtnet_set_rx_mode() 1208 netdev_for_each_mc_addr(ha, dev) virtnet_set_rx_mode() 1209 memcpy(&mac_data->macs[i++][0], ha->addr, ETH_ALEN); virtnet_set_rx_mode()
H A D	vxlan.c	1384 f = vxlan_find_mac(vxlan, n->ha); arp_reduce() 1392 n->ha, sha); arp_reduce() 1460 ether_addr_copy(eth_hdr(reply)->h_source, n->ha); vxlan_na_create() 1491 ether_addr_copy(&na->opt[2], n->ha); vxlan_na_create() 1545 f = vxlan_find_mac(vxlan, n->ha); neigh_reduce() 1637 diff = !ether_addr_equal(eth_hdr(skb)->h_dest, n->ha); route_shortcircuit() 1641 memcpy(eth_hdr(skb)->h_dest, n->ha, dev->addr_len); route_shortcircuit()
/linux-4.1.27/drivers/net/wireless/orinoco/
H A D	hw.c	1089 struct netdev_hw_addr *ha; __orinoco_hw_set_multicast_list() local 1093 netdev_for_each_mc_addr(ha, dev) { netdev_for_each_mc_addr() 1096 memcpy(mclist.addr[i++], ha->addr, ETH_ALEN); netdev_for_each_mc_addr()
/linux-4.1.27/drivers/net/wireless/ti/wl1251/
H A D	main.c	738 struct netdev_hw_addr *ha; wl1251_op_prepare_multicast() local 756 netdev_hw_addr_list_for_each(ha, mc_list) { netdev_hw_addr_list_for_each() 758 ha->addr, ETH_ALEN); netdev_hw_addr_list_for_each()
/linux-4.1.27/drivers/net/wireless/brcm80211/brcmfmac/
H A D	core.c	90 struct netdev_hw_addr *ha; _brcmf_set_multicast_list() local 118 netdev_for_each_mc_addr(ha, ndev) { netdev_for_each_mc_addr() 121 memcpy(bufp, ha->addr, ETH_ALEN); netdev_for_each_mc_addr()
/linux-4.1.27/drivers/net/ethernet/atheros/alx/
H A D	main.c	466 struct netdev_hw_addr *ha; __alx_set_rx_mode() local 470 netdev_for_each_mc_addr(ha, netdev) __alx_set_rx_mode() 471 alx_add_mc_addr(hw, ha->addr, mc_hash); __alx_set_rx_mode()
/linux-4.1.27/drivers/net/ethernet/adaptec/
H A D	starfire.c	1744 struct netdev_hw_addr *ha; set_rx_mode() local 1761 netdev_for_each_mc_addr(ha, dev) { netdev_for_each_mc_addr() 1762 eaddrs = (__be16 *) ha->addr; netdev_for_each_mc_addr() 1782 netdev_for_each_mc_addr(ha, dev) { netdev_for_each_mc_addr() 1785 int bit_nr = ether_crc_le(ETH_ALEN, ha->addr) >> 23; netdev_for_each_mc_addr()
/linux-4.1.27/drivers/net/ethernet/samsung/sxgbe/
H A D	sxgbe_main.c	1882 struct netdev_hw_addr *ha; sxgbe_set_rx_mode() local 1902 netdev_for_each_mc_addr(ha, dev) { netdev_for_each_mc_addr() 1906 int bit_nr = bitrev32(~crc32_le(~0, ha->addr, 6)) >> 26; netdev_for_each_mc_addr() 1925 netdev_for_each_uc_addr(ha, dev) { netdev_for_each_uc_addr() 1926 sxgbe_set_umac_addr(ioaddr, ha->addr, reg); netdev_for_each_uc_addr()
/linux-4.1.27/drivers/net/ethernet/chelsio/cxgb4vf/
H A D	cxgb4vf_main.c	874 const struct netdev_hw_addr *ha; collect_netdev_uc_list_addrs() local 876 for_each_dev_addr(dev, ha) for_each_dev_addr() 878 addr[naddr++] = ha->addr; for_each_dev_addr() 897 const struct netdev_hw_addr *ha; collect_netdev_mc_list_addrs() local 899 netdev_for_each_mc_addr(ha, dev) netdev_for_each_mc_addr() 901 addr[naddr++] = ha->addr; netdev_for_each_mc_addr()
/linux-4.1.27/drivers/net/cris/
H A D	eth_v10.c	1591 struct netdev_hw_addr *ha; set_multicast_list() local 1596 netdev_for_each_mc_addr(ha, dev) { netdev_for_each_mc_addr() 1600 baddr = ha->addr; netdev_for_each_mc_addr()
/linux-4.1.27/drivers/net/ethernet/8390/
H A D	lib8390.c	877 struct netdev_hw_addr *ha; make_mc_bits() local 879 netdev_for_each_mc_addr(ha, dev) { netdev_for_each_mc_addr() 880 u32 crc = ether_crc(ETH_ALEN, ha->addr); netdev_for_each_mc_addr()
/linux-4.1.27/drivers/net/ethernet/adi/
H A D	bfin_mac.c	1453 struct netdev_hw_addr *ha; bfin_mac_multicast_hash() local 1458 netdev_for_each_mc_addr(ha, dev) { netdev_for_each_mc_addr() 1459 crc = ether_crc(ETH_ALEN, ha->addr); netdev_for_each_mc_addr()
/linux-4.1.27/drivers/net/ethernet/altera/
H A D	altera_tse_main.c	1033 struct netdev_hw_addr *ha; altera_tse_set_mcfilter() local 1039 netdev_for_each_mc_addr(ha, dev) { netdev_for_each_mc_addr() 1045 unsigned char octet = ha->addr[mac_octet]; netdev_for_each_mc_addr()

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