Lines Matching refs:ha
84 qla2xxx_prep_dump(struct qla_hw_data *ha, struct qla2xxx_fw_dump *fw_dump) in qla2xxx_prep_dump() argument
86 fw_dump->fw_major_version = htonl(ha->fw_major_version); in qla2xxx_prep_dump()
87 fw_dump->fw_minor_version = htonl(ha->fw_minor_version); in qla2xxx_prep_dump()
88 fw_dump->fw_subminor_version = htonl(ha->fw_subminor_version); in qla2xxx_prep_dump()
89 fw_dump->fw_attributes = htonl(ha->fw_attributes); in qla2xxx_prep_dump()
91 fw_dump->vendor = htonl(ha->pdev->vendor); in qla2xxx_prep_dump()
92 fw_dump->device = htonl(ha->pdev->device); in qla2xxx_prep_dump()
93 fw_dump->subsystem_vendor = htonl(ha->pdev->subsystem_vendor); in qla2xxx_prep_dump()
94 fw_dump->subsystem_device = htonl(ha->pdev->subsystem_device); in qla2xxx_prep_dump()
98 qla2xxx_copy_queues(struct qla_hw_data *ha, void *ptr) in qla2xxx_copy_queues() argument
100 struct req_que *req = ha->req_q_map[0]; in qla2xxx_copy_queues()
101 struct rsp_que *rsp = ha->rsp_q_map[0]; in qla2xxx_copy_queues()
115 qla27xx_dump_mpi_ram(struct qla_hw_data *ha, uint32_t addr, uint32_t *ram, in qla27xx_dump_mpi_ram() argument
121 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; in qla27xx_dump_mpi_ram()
122 dma_addr_t dump_dma = ha->gid_list_dma; in qla27xx_dump_mpi_ram()
123 uint32_t *dump = (uint32_t *)ha->gid_list; in qla27xx_dump_mpi_ram()
129 clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags); in qla27xx_dump_mpi_ram()
131 dwords = qla2x00_gid_list_size(ha) / 4; in qla27xx_dump_mpi_ram()
151 ha->flags.mbox_int = 0; in qla27xx_dump_mpi_ram()
161 &ha->mbx_cmd_flags); in qla27xx_dump_mpi_ram()
178 ha->flags.mbox_int = 1; in qla27xx_dump_mpi_ram()
180 if (test_and_clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags)) { in qla27xx_dump_mpi_ram()
183 ram[cnt + idx] = IS_QLA27XX(ha) ? in qla27xx_dump_mpi_ram()
195 qla24xx_dump_ram(struct qla_hw_data *ha, uint32_t addr, uint32_t *ram, in qla24xx_dump_ram() argument
201 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; in qla24xx_dump_ram()
202 dma_addr_t dump_dma = ha->gid_list_dma; in qla24xx_dump_ram()
203 uint32_t *dump = (uint32_t *)ha->gid_list; in qla24xx_dump_ram()
209 clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags); in qla24xx_dump_ram()
211 dwords = qla2x00_gid_list_size(ha) / 4; in qla24xx_dump_ram()
229 ha->flags.mbox_int = 0; in qla24xx_dump_ram()
239 &ha->mbx_cmd_flags); in qla24xx_dump_ram()
255 ha->flags.mbox_int = 1; in qla24xx_dump_ram()
257 if (test_and_clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags)) { in qla24xx_dump_ram()
260 ram[cnt + idx] = IS_QLA27XX(ha) ? in qla24xx_dump_ram()
272 qla24xx_dump_memory(struct qla_hw_data *ha, uint32_t *code_ram, in qla24xx_dump_memory() argument
278 rval = qla24xx_dump_ram(ha, 0x20000, code_ram, cram_size / 4, nxt); in qla24xx_dump_memory()
282 set_bit(RISC_SRAM_DUMP_CMPL, &ha->fw_dump_cap_flags); in qla24xx_dump_memory()
285 rval = qla24xx_dump_ram(ha, 0x100000, *nxt, in qla24xx_dump_memory()
286 ha->fw_memory_size - 0x100000 + 1, nxt); in qla24xx_dump_memory()
288 set_bit(RISC_EXT_MEM_DUMP_CMPL, &ha->fw_dump_cap_flags); in qla24xx_dump_memory()
308 qla24xx_pause_risc(struct device_reg_24xx __iomem *reg, struct qla_hw_data *ha) in qla24xx_pause_risc() argument
315 set_bit(RISC_PAUSE_CMPL, &ha->fw_dump_cap_flags); in qla24xx_pause_risc()
319 qla24xx_soft_reset(struct qla_hw_data *ha) in qla24xx_soft_reset() argument
324 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; in qla24xx_soft_reset()
339 set_bit(DMA_SHUTDOWN_CMPL, &ha->fw_dump_cap_flags); in qla24xx_soft_reset()
343 pci_read_config_word(ha->pdev, PCI_COMMAND, &wd); in qla24xx_soft_reset()
356 set_bit(ISP_RESET_CMPL, &ha->fw_dump_cap_flags); in qla24xx_soft_reset()
369 set_bit(RISC_RDY_AFT_RESET, &ha->fw_dump_cap_flags); in qla24xx_soft_reset()
375 qla2xxx_dump_ram(struct qla_hw_data *ha, uint32_t addr, uint16_t *ram, in qla2xxx_dump_ram() argument
381 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; in qla2xxx_dump_ram()
382 dma_addr_t dump_dma = ha->gid_list_dma; in qla2xxx_dump_ram()
383 uint16_t *dump = (uint16_t *)ha->gid_list; in qla2xxx_dump_ram()
388 WRT_MAILBOX_REG(ha, reg, 0, MBC_DUMP_RISC_RAM_EXTENDED); in qla2xxx_dump_ram()
389 clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags); in qla2xxx_dump_ram()
391 words = qla2x00_gid_list_size(ha) / 2; in qla2xxx_dump_ram()
397 WRT_MAILBOX_REG(ha, reg, 1, LSW(addr)); in qla2xxx_dump_ram()
398 WRT_MAILBOX_REG(ha, reg, 8, MSW(addr)); in qla2xxx_dump_ram()
400 WRT_MAILBOX_REG(ha, reg, 2, MSW(dump_dma)); in qla2xxx_dump_ram()
401 WRT_MAILBOX_REG(ha, reg, 3, LSW(dump_dma)); in qla2xxx_dump_ram()
402 WRT_MAILBOX_REG(ha, reg, 6, MSW(MSD(dump_dma))); in qla2xxx_dump_ram()
403 WRT_MAILBOX_REG(ha, reg, 7, LSW(MSD(dump_dma))); in qla2xxx_dump_ram()
405 WRT_MAILBOX_REG(ha, reg, 4, words); in qla2xxx_dump_ram()
416 &ha->mbx_cmd_flags); in qla2xxx_dump_ram()
418 mb0 = RD_MAILBOX_REG(ha, reg, 0); in qla2xxx_dump_ram()
428 &ha->mbx_cmd_flags); in qla2xxx_dump_ram()
430 mb0 = RD_MAILBOX_REG(ha, reg, 0); in qla2xxx_dump_ram()
445 if (test_and_clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags)) { in qla2xxx_dump_ram()
469 qla24xx_copy_eft(struct qla_hw_data *ha, void *ptr) in qla24xx_copy_eft() argument
471 if (!ha->eft) in qla24xx_copy_eft()
474 memcpy(ptr, ha->eft, ntohl(ha->fw_dump->eft_size)); in qla24xx_copy_eft()
475 return ptr + ntohl(ha->fw_dump->eft_size); in qla24xx_copy_eft()
479 qla25xx_copy_fce(struct qla_hw_data *ha, void *ptr, uint32_t **last_chain) in qla25xx_copy_fce() argument
485 if (!ha->fce) in qla25xx_copy_fce()
491 fce_calc_size(ha->fce_bufs)); in qla25xx_copy_fce()
492 fcec->size = htonl(fce_calc_size(ha->fce_bufs)); in qla25xx_copy_fce()
493 fcec->addr_l = htonl(LSD(ha->fce_dma)); in qla25xx_copy_fce()
494 fcec->addr_h = htonl(MSD(ha->fce_dma)); in qla25xx_copy_fce()
498 *iter_reg++ = htonl(ha->fce_mb[cnt]); in qla25xx_copy_fce()
500 memcpy(iter_reg, ha->fce, ntohl(fcec->size)); in qla25xx_copy_fce()
506 qla2xxx_copy_atioqueues(struct qla_hw_data *ha, void *ptr, in qla2xxx_copy_atioqueues() argument
518 if (!ha->tgt.atio_ring) in qla2xxx_copy_atioqueues()
523 aqp->length = ha->tgt.atio_q_length; in qla2xxx_copy_atioqueues()
524 aqp->ring = ha->tgt.atio_ring; in qla2xxx_copy_atioqueues()
554 qla25xx_copy_mqueues(struct qla_hw_data *ha, void *ptr, uint32_t **last_chain) in qla25xx_copy_mqueues() argument
562 if (!ha->mqenable) in qla25xx_copy_mqueues()
566 for (que = 1; que < ha->max_req_queues; que++) { in qla25xx_copy_mqueues()
567 req = ha->req_q_map[que]; in qla25xx_copy_mqueues()
594 for (que = 1; que < ha->max_rsp_queues; que++) { in qla25xx_copy_mqueues()
595 rsp = ha->rsp_q_map[que]; in qla25xx_copy_mqueues()
625 qla25xx_copy_mq(struct qla_hw_data *ha, void *ptr, uint32_t **last_chain) in qla25xx_copy_mq() argument
632 if (!ha->mqenable || IS_QLA83XX(ha) || IS_QLA27XX(ha)) in qla25xx_copy_mq()
640 que_cnt = ha->max_req_queues > ha->max_rsp_queues ? in qla25xx_copy_mq()
641 ha->max_req_queues : ha->max_rsp_queues; in qla25xx_copy_mq()
644 reg = ISP_QUE_REG(ha, cnt); in qla25xx_copy_mq()
662 struct qla_hw_data *ha = vha->hw; in qla2xxx_dump_post_process() local
667 rval, ha->fw_dump_cap_flags); in qla2xxx_dump_post_process()
668 ha->fw_dumped = 0; in qla2xxx_dump_post_process()
672 vha->host_no, ha->fw_dump, ha->fw_dump_cap_flags); in qla2xxx_dump_post_process()
673 ha->fw_dumped = 1; in qla2xxx_dump_post_process()
688 struct qla_hw_data *ha = vha->hw; in qla2300_fw_dump() local
689 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; in qla2300_fw_dump()
694 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); in qla2300_fw_dump()
699 spin_lock_irqsave(&ha->hardware_lock, flags); in qla2300_fw_dump()
701 if (!ha->fw_dump) { in qla2300_fw_dump()
707 if (ha->fw_dumped) { in qla2300_fw_dump()
711 ha->fw_dump); in qla2300_fw_dump()
714 fw = &ha->fw_dump->isp.isp23; in qla2300_fw_dump()
715 qla2xxx_prep_dump(ha, ha->fw_dump); in qla2300_fw_dump()
722 if (IS_QLA2300(ha)) { in qla2300_fw_dump()
804 if (!IS_QLA2300(ha)) { in qla2300_fw_dump()
805 for (cnt = 30000; RD_MAILBOX_REG(ha, reg, 0) != 0 && in qla2300_fw_dump()
816 rval = qla2xxx_dump_ram(ha, 0x800, fw->risc_ram, in qla2300_fw_dump()
821 rval = qla2xxx_dump_ram(ha, 0x10000, fw->stack_ram, in qla2300_fw_dump()
826 rval = qla2xxx_dump_ram(ha, 0x11000, fw->data_ram, in qla2300_fw_dump()
827 ha->fw_memory_size - 0x11000 + 1, &nxt); in qla2300_fw_dump()
830 qla2xxx_copy_queues(ha, nxt); in qla2300_fw_dump()
836 spin_unlock_irqrestore(&ha->hardware_lock, flags); in qla2300_fw_dump()
851 struct qla_hw_data *ha = vha->hw; in qla2100_fw_dump() local
852 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; in qla2100_fw_dump()
856 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); in qla2100_fw_dump()
863 spin_lock_irqsave(&ha->hardware_lock, flags); in qla2100_fw_dump()
865 if (!ha->fw_dump) { in qla2100_fw_dump()
871 if (ha->fw_dumped) { in qla2100_fw_dump()
875 ha->fw_dump); in qla2100_fw_dump()
878 fw = &ha->fw_dump->isp.isp21; in qla2100_fw_dump()
879 qla2xxx_prep_dump(ha, ha->fw_dump); in qla2100_fw_dump()
899 for (cnt = 0; cnt < ha->mbx_count; cnt++) { in qla2100_fw_dump()
952 for (cnt = 30000; RD_MAILBOX_REG(ha, reg, 0) != 0 && in qla2100_fw_dump()
961 if (rval == QLA_SUCCESS && (IS_QLA2200(ha) || (IS_QLA2100(ha) && in qla2100_fw_dump()
975 if (IS_QLA2100(ha)) in qla2100_fw_dump()
989 WRT_MAILBOX_REG(ha, reg, 0, MBC_READ_RAM_WORD); in qla2100_fw_dump()
990 clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags); in qla2100_fw_dump()
994 WRT_MAILBOX_REG(ha, reg, 1, risc_address); in qla2100_fw_dump()
1002 &ha->mbx_cmd_flags); in qla2100_fw_dump()
1004 mb0 = RD_MAILBOX_REG(ha, reg, 0); in qla2100_fw_dump()
1005 mb2 = RD_MAILBOX_REG(ha, reg, 2); in qla2100_fw_dump()
1019 if (test_and_clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags)) { in qla2100_fw_dump()
1028 qla2xxx_copy_queues(ha, &fw->risc_ram[cnt]); in qla2100_fw_dump()
1034 spin_unlock_irqrestore(&ha->hardware_lock, flags); in qla2100_fw_dump()
1043 struct qla_hw_data *ha = vha->hw; in qla24xx_fw_dump() local
1044 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; in qla24xx_fw_dump()
1054 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); in qla24xx_fw_dump()
1056 if (IS_P3P_TYPE(ha)) in qla24xx_fw_dump()
1061 ha->fw_dump_cap_flags = 0; in qla24xx_fw_dump()
1064 spin_lock_irqsave(&ha->hardware_lock, flags); in qla24xx_fw_dump()
1066 if (!ha->fw_dump) { in qla24xx_fw_dump()
1072 if (ha->fw_dumped) { in qla24xx_fw_dump()
1076 ha->fw_dump); in qla24xx_fw_dump()
1079 fw = &ha->fw_dump->isp.isp24; in qla24xx_fw_dump()
1080 qla2xxx_prep_dump(ha, ha->fw_dump); in qla24xx_fw_dump()
1088 qla24xx_pause_risc(reg, ha); in qla24xx_fw_dump()
1261 rval = qla24xx_soft_reset(ha); in qla24xx_fw_dump()
1265 rval = qla24xx_dump_memory(ha, fw->code_ram, sizeof(fw->code_ram), in qla24xx_fw_dump()
1270 nxt = qla2xxx_copy_queues(ha, nxt); in qla24xx_fw_dump()
1272 qla24xx_copy_eft(ha, nxt); in qla24xx_fw_dump()
1274 nxt_chain = (void *)ha->fw_dump + ha->chain_offset; in qla24xx_fw_dump()
1275 nxt_chain = qla2xxx_copy_atioqueues(ha, nxt_chain, &last_chain); in qla24xx_fw_dump()
1277 ha->fw_dump->version |= __constant_htonl(DUMP_CHAIN_VARIANT); in qla24xx_fw_dump()
1282 ha->fw_dump_len = (nxt_chain - (void *)ha->fw_dump); in qla24xx_fw_dump()
1289 spin_unlock_irqrestore(&ha->hardware_lock, flags); in qla24xx_fw_dump()
1298 struct qla_hw_data *ha = vha->hw; in qla25xx_fw_dump() local
1299 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; in qla25xx_fw_dump()
1308 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); in qla25xx_fw_dump()
1312 ha->fw_dump_cap_flags = 0; in qla25xx_fw_dump()
1315 spin_lock_irqsave(&ha->hardware_lock, flags); in qla25xx_fw_dump()
1317 if (!ha->fw_dump) { in qla25xx_fw_dump()
1323 if (ha->fw_dumped) { in qla25xx_fw_dump()
1327 ha->fw_dump); in qla25xx_fw_dump()
1330 fw = &ha->fw_dump->isp.isp25; in qla25xx_fw_dump()
1331 qla2xxx_prep_dump(ha, ha->fw_dump); in qla25xx_fw_dump()
1332 ha->fw_dump->version = __constant_htonl(2); in qla25xx_fw_dump()
1340 qla24xx_pause_risc(reg, ha); in qla25xx_fw_dump()
1575 nxt_chain = qla25xx_copy_mq(ha, (void *)ha->fw_dump + ha->chain_offset, in qla25xx_fw_dump()
1578 rval = qla24xx_soft_reset(ha); in qla25xx_fw_dump()
1582 rval = qla24xx_dump_memory(ha, fw->code_ram, sizeof(fw->code_ram), in qla25xx_fw_dump()
1587 nxt = qla2xxx_copy_queues(ha, nxt); in qla25xx_fw_dump()
1589 qla24xx_copy_eft(ha, nxt); in qla25xx_fw_dump()
1592 nxt_chain = qla25xx_copy_fce(ha, nxt_chain, &last_chain); in qla25xx_fw_dump()
1593 nxt_chain = qla25xx_copy_mqueues(ha, nxt_chain, &last_chain); in qla25xx_fw_dump()
1594 nxt_chain = qla2xxx_copy_atioqueues(ha, nxt_chain, &last_chain); in qla25xx_fw_dump()
1596 ha->fw_dump->version |= __constant_htonl(DUMP_CHAIN_VARIANT); in qla25xx_fw_dump()
1601 ha->fw_dump_len = (nxt_chain - (void *)ha->fw_dump); in qla25xx_fw_dump()
1608 spin_unlock_irqrestore(&ha->hardware_lock, flags); in qla25xx_fw_dump()
1617 struct qla_hw_data *ha = vha->hw; in qla81xx_fw_dump() local
1618 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; in qla81xx_fw_dump()
1627 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); in qla81xx_fw_dump()
1631 ha->fw_dump_cap_flags = 0; in qla81xx_fw_dump()
1634 spin_lock_irqsave(&ha->hardware_lock, flags); in qla81xx_fw_dump()
1636 if (!ha->fw_dump) { in qla81xx_fw_dump()
1642 if (ha->fw_dumped) { in qla81xx_fw_dump()
1646 ha->fw_dump); in qla81xx_fw_dump()
1649 fw = &ha->fw_dump->isp.isp81; in qla81xx_fw_dump()
1650 qla2xxx_prep_dump(ha, ha->fw_dump); in qla81xx_fw_dump()
1658 qla24xx_pause_risc(reg, ha); in qla81xx_fw_dump()
1896 nxt_chain = qla25xx_copy_mq(ha, (void *)ha->fw_dump + ha->chain_offset, in qla81xx_fw_dump()
1899 rval = qla24xx_soft_reset(ha); in qla81xx_fw_dump()
1903 rval = qla24xx_dump_memory(ha, fw->code_ram, sizeof(fw->code_ram), in qla81xx_fw_dump()
1908 nxt = qla2xxx_copy_queues(ha, nxt); in qla81xx_fw_dump()
1910 qla24xx_copy_eft(ha, nxt); in qla81xx_fw_dump()
1913 nxt_chain = qla25xx_copy_fce(ha, nxt_chain, &last_chain); in qla81xx_fw_dump()
1914 nxt_chain = qla25xx_copy_mqueues(ha, nxt_chain, &last_chain); in qla81xx_fw_dump()
1915 nxt_chain = qla2xxx_copy_atioqueues(ha, nxt_chain, &last_chain); in qla81xx_fw_dump()
1917 ha->fw_dump->version |= __constant_htonl(DUMP_CHAIN_VARIANT); in qla81xx_fw_dump()
1922 ha->fw_dump_len = (nxt_chain - (void *)ha->fw_dump); in qla81xx_fw_dump()
1929 spin_unlock_irqrestore(&ha->hardware_lock, flags); in qla81xx_fw_dump()
1938 struct qla_hw_data *ha = vha->hw; in qla83xx_fw_dump() local
1939 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; in qla83xx_fw_dump()
1948 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); in qla83xx_fw_dump()
1952 ha->fw_dump_cap_flags = 0; in qla83xx_fw_dump()
1955 spin_lock_irqsave(&ha->hardware_lock, flags); in qla83xx_fw_dump()
1957 if (!ha->fw_dump) { in qla83xx_fw_dump()
1963 if (ha->fw_dumped) { in qla83xx_fw_dump()
1966 "request...\n", ha->fw_dump); in qla83xx_fw_dump()
1969 fw = &ha->fw_dump->isp.isp83; in qla83xx_fw_dump()
1970 qla2xxx_prep_dump(ha, ha->fw_dump); in qla83xx_fw_dump()
1978 qla24xx_pause_risc(reg, ha); in qla83xx_fw_dump()
2373 nxt_chain = qla25xx_copy_mq(ha, (void *)ha->fw_dump + ha->chain_offset, in qla83xx_fw_dump()
2376 rval = qla24xx_soft_reset(ha); in qla83xx_fw_dump()
2399 nxt += (ha->fw_memory_size - 0x100000 + 1); in qla83xx_fw_dump()
2402 set_bit(RISC_RDY_AFT_RESET, &ha->fw_dump_cap_flags); in qla83xx_fw_dump()
2408 rval = qla24xx_dump_memory(ha, fw->code_ram, sizeof(fw->code_ram), in qla83xx_fw_dump()
2414 nxt = qla2xxx_copy_queues(ha, nxt); in qla83xx_fw_dump()
2416 qla24xx_copy_eft(ha, nxt); in qla83xx_fw_dump()
2419 nxt_chain = qla25xx_copy_fce(ha, nxt_chain, &last_chain); in qla83xx_fw_dump()
2420 nxt_chain = qla25xx_copy_mqueues(ha, nxt_chain, &last_chain); in qla83xx_fw_dump()
2421 nxt_chain = qla2xxx_copy_atioqueues(ha, nxt_chain, &last_chain); in qla83xx_fw_dump()
2423 ha->fw_dump->version |= __constant_htonl(DUMP_CHAIN_VARIANT); in qla83xx_fw_dump()
2428 ha->fw_dump_len = (nxt_chain - (void *)ha->fw_dump); in qla83xx_fw_dump()
2435 spin_unlock_irqrestore(&ha->hardware_lock, flags); in qla83xx_fw_dump()
2646 struct qla_hw_data *ha = vha->hw; in ql_dump_regs() local
2647 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; in ql_dump_regs()
2648 struct device_reg_24xx __iomem *reg24 = &ha->iobase->isp24; in ql_dump_regs()
2649 struct device_reg_82xx __iomem *reg82 = &ha->iobase->isp82; in ql_dump_regs()
2655 if (IS_P3P_TYPE(ha)) in ql_dump_regs()
2657 else if (IS_FWI2_CAPABLE(ha)) in ql_dump_regs()
2660 mbx_reg = MAILBOX_REG(ha, reg, 0); in ql_dump_regs()