Lines Matching refs:ha
323 static int qla2x00_alloc_queues(struct qla_hw_data *ha, struct req_que *req, in qla2x00_alloc_queues() argument
326 scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev); in qla2x00_alloc_queues()
327 ha->req_q_map = kzalloc(sizeof(struct req_que *) * ha->max_req_queues, in qla2x00_alloc_queues()
329 if (!ha->req_q_map) { in qla2x00_alloc_queues()
335 ha->rsp_q_map = kzalloc(sizeof(struct rsp_que *) * ha->max_rsp_queues, in qla2x00_alloc_queues()
337 if (!ha->rsp_q_map) { in qla2x00_alloc_queues()
346 ha->rsp_q_map[0] = rsp; in qla2x00_alloc_queues()
347 ha->req_q_map[0] = req; in qla2x00_alloc_queues()
348 set_bit(0, ha->rsp_qid_map); in qla2x00_alloc_queues()
349 set_bit(0, ha->req_qid_map); in qla2x00_alloc_queues()
353 kfree(ha->req_q_map); in qla2x00_alloc_queues()
354 ha->req_q_map = NULL; in qla2x00_alloc_queues()
359 static void qla2x00_free_req_que(struct qla_hw_data *ha, struct req_que *req) in qla2x00_free_req_que() argument
361 if (IS_QLAFX00(ha)) { in qla2x00_free_req_que()
363 dma_free_coherent(&ha->pdev->dev, in qla2x00_free_req_que()
367 dma_free_coherent(&ha->pdev->dev, in qla2x00_free_req_que()
378 static void qla2x00_free_rsp_que(struct qla_hw_data *ha, struct rsp_que *rsp) in qla2x00_free_rsp_que() argument
380 if (IS_QLAFX00(ha)) { in qla2x00_free_rsp_que()
382 dma_free_coherent(&ha->pdev->dev, in qla2x00_free_rsp_que()
386 dma_free_coherent(&ha->pdev->dev, in qla2x00_free_rsp_que()
394 static void qla2x00_free_queues(struct qla_hw_data *ha) in qla2x00_free_queues() argument
400 for (cnt = 0; cnt < ha->max_req_queues; cnt++) { in qla2x00_free_queues()
401 if (!test_bit(cnt, ha->req_qid_map)) in qla2x00_free_queues()
404 req = ha->req_q_map[cnt]; in qla2x00_free_queues()
405 qla2x00_free_req_que(ha, req); in qla2x00_free_queues()
407 kfree(ha->req_q_map); in qla2x00_free_queues()
408 ha->req_q_map = NULL; in qla2x00_free_queues()
410 for (cnt = 0; cnt < ha->max_rsp_queues; cnt++) { in qla2x00_free_queues()
411 if (!test_bit(cnt, ha->rsp_qid_map)) in qla2x00_free_queues()
414 rsp = ha->rsp_q_map[cnt]; in qla2x00_free_queues()
415 qla2x00_free_rsp_que(ha, rsp); in qla2x00_free_queues()
417 kfree(ha->rsp_q_map); in qla2x00_free_queues()
418 ha->rsp_q_map = NULL; in qla2x00_free_queues()
425 struct qla_hw_data *ha = vha->hw; in qla25xx_setup_mode() local
427 if (!(ha->fw_attributes & BIT_6)) { in qla25xx_setup_mode()
435 req = qla25xx_create_req_que(ha, options, 0, 0, -1, in qla25xx_setup_mode()
442 ha->wq = alloc_workqueue("qla2xxx_wq", WQ_MEM_RECLAIM, 1); in qla25xx_setup_mode()
443 vha->req = ha->req_q_map[req]; in qla25xx_setup_mode()
445 for (ques = 1; ques < ha->max_rsp_queues; ques++) { in qla25xx_setup_mode()
446 ret = qla25xx_create_rsp_que(ha, options, 0, 0, req); in qla25xx_setup_mode()
453 ha->flags.cpu_affinity_enabled = 1; in qla25xx_setup_mode()
457 ha->max_rsp_queues, ha->max_req_queues); in qla25xx_setup_mode()
461 ha->max_rsp_queues, ha->max_req_queues); in qla25xx_setup_mode()
466 destroy_workqueue(ha->wq); in qla25xx_setup_mode()
467 ha->wq = NULL; in qla25xx_setup_mode()
468 vha->req = ha->req_q_map[0]; in qla25xx_setup_mode()
470 ha->mqenable = 0; in qla25xx_setup_mode()
471 kfree(ha->req_q_map); in qla25xx_setup_mode()
472 kfree(ha->rsp_q_map); in qla25xx_setup_mode()
473 ha->max_req_queues = ha->max_rsp_queues = 1; in qla25xx_setup_mode()
480 struct qla_hw_data *ha = vha->hw; in qla2x00_pci_info_str() local
487 pci_bus = (ha->pci_attr & (BIT_9 | BIT_10)) >> 9; in qla2x00_pci_info_str()
492 pci_bus = (ha->pci_attr & BIT_8) >> 8; in qla2x00_pci_info_str()
505 struct qla_hw_data *ha = vha->hw; in qla24xx_pci_info_str() local
508 if (pci_is_pcie(ha->pdev)) { in qla24xx_pci_info_str()
512 pcie_capability_read_dword(ha->pdev, PCI_EXP_LNKCAP, &lstat); in qla24xx_pci_info_str()
538 pci_bus = (ha->pci_attr & CSRX_PCIX_BUS_MODE_MASK) >> 8; in qla24xx_pci_info_str()
560 struct qla_hw_data *ha = vha->hw; in qla2x00_fw_version_str() local
562 snprintf(str, size, "%d.%02d.%02d ", ha->fw_major_version, in qla2x00_fw_version_str()
563 ha->fw_minor_version, ha->fw_subminor_version); in qla2x00_fw_version_str()
565 if (ha->fw_attributes & BIT_9) { in qla2x00_fw_version_str()
570 switch (ha->fw_attributes & 0xFF) { in qla2x00_fw_version_str()
584 sprintf(un_str, "(%x)", ha->fw_attributes); in qla2x00_fw_version_str()
588 if (ha->fw_attributes & 0x100) in qla2x00_fw_version_str()
597 struct qla_hw_data *ha = vha->hw; in qla24xx_fw_version_str() local
599 snprintf(str, size, "%d.%02d.%02d (%x)", ha->fw_major_version, in qla24xx_fw_version_str()
600 ha->fw_minor_version, ha->fw_subminor_version, ha->fw_attributes); in qla24xx_fw_version_str()
609 struct qla_hw_data *ha = sp->fcport->vha->hw; in qla2x00_sp_free_dma() local
618 dma_unmap_sg(&ha->pdev->dev, scsi_prot_sglist(cmd), in qla2x00_sp_free_dma()
625 qla2x00_clean_dsd_pool(ha, sp, NULL); in qla2x00_sp_free_dma()
630 dma_pool_free(ha->dl_dma_pool, ctx, in qla2x00_sp_free_dma()
638 dma_pool_free(ha->fcp_cmnd_dma_pool, ctx1->fcp_cmnd, in qla2x00_sp_free_dma()
640 list_splice(&ctx1->dsd_list, &ha->gbl_dsd_list); in qla2x00_sp_free_dma()
641 ha->gbl_dsd_inuse -= ctx1->dsd_use_cnt; in qla2x00_sp_free_dma()
642 ha->gbl_dsd_avail += ctx1->dsd_use_cnt; in qla2x00_sp_free_dma()
643 mempool_free(ctx1, ha->ctx_mempool); in qla2x00_sp_free_dma()
654 struct qla_hw_data *ha = (struct qla_hw_data *)data; in qla2x00_sp_compl() local
671 qla2x00_sp_free_dma(ha, sp); in qla2x00_sp_compl()
684 struct qla_hw_data *ha = vha->hw; in qla2xxx_queuecommand() local
685 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); in qla2xxx_queuecommand()
689 if (ha->flags.eeh_busy) { in qla2xxx_queuecommand()
690 if (ha->flags.pci_channel_io_perm_failure) { in qla2xxx_queuecommand()
761 rval = ha->isp_ops->start_scsi(sp); in qla2xxx_queuecommand()
771 qla2x00_sp_free_dma(ha, sp); in qla2xxx_queuecommand()
804 struct qla_hw_data *ha = vha->hw; in qla2x00_eh_wait_on_command() local
807 if (unlikely(pci_channel_offline(ha->pdev)) || ha->flags.eeh_busy) { in qla2x00_eh_wait_on_command()
844 struct qla_hw_data *ha = vha->hw; in qla2x00_wait_for_hba_online() local
845 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev); in qla2x00_wait_for_hba_online()
851 ha->dpc_active) && time_before(jiffies, wait_online)) { in qla2x00_wait_for_hba_online()
878 struct qla_hw_data *ha = vha->hw; in qla2x00_wait_for_hba_ready() local
880 while (((qla2x00_reset_active(vha)) || ha->dpc_active || in qla2x00_wait_for_hba_ready()
881 ha->flags.mbox_busy) || in qla2x00_wait_for_hba_ready()
892 struct qla_hw_data *ha = vha->hw; in qla2x00_wait_for_chip_reset() local
893 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev); in qla2x00_wait_for_chip_reset()
899 ha->dpc_active) && time_before(jiffies, wait_reset)) { in qla2x00_wait_for_chip_reset()
904 ha->flags.chip_reset_done) in qla2x00_wait_for_chip_reset()
907 if (ha->flags.chip_reset_done) in qla2x00_wait_for_chip_reset()
946 struct qla_hw_data *ha = vha->hw; in qla2xxx_eh_abort() local
959 spin_lock_irqsave(&ha->hardware_lock, flags); in qla2xxx_eh_abort()
962 spin_unlock_irqrestore(&ha->hardware_lock, flags); in qla2xxx_eh_abort()
973 spin_unlock_irqrestore(&ha->hardware_lock, flags); in qla2xxx_eh_abort()
974 rval = ha->isp_ops->abort_command(sp); in qla2xxx_eh_abort()
994 spin_lock_irqsave(&ha->hardware_lock, flags); in qla2xxx_eh_abort()
1001 sp->done(ha, sp, 0); in qla2xxx_eh_abort()
1002 spin_unlock_irqrestore(&ha->hardware_lock, flags); in qla2xxx_eh_abort()
1030 struct qla_hw_data *ha = vha->hw; in qla2x00_eh_wait_for_pending_commands() local
1037 spin_lock_irqsave(&ha->hardware_lock, flags); in qla2x00_eh_wait_for_pending_commands()
1065 spin_unlock_irqrestore(&ha->hardware_lock, flags); in qla2x00_eh_wait_for_pending_commands()
1067 spin_lock_irqsave(&ha->hardware_lock, flags); in qla2x00_eh_wait_for_pending_commands()
1069 spin_unlock_irqrestore(&ha->hardware_lock, flags); in qla2x00_eh_wait_for_pending_commands()
1140 struct qla_hw_data *ha = vha->hw; in qla2xxx_eh_device_reset() local
1143 ha->isp_ops->lun_reset); in qla2xxx_eh_device_reset()
1150 struct qla_hw_data *ha = vha->hw; in qla2xxx_eh_target_reset() local
1153 ha->isp_ops->target_reset); in qla2xxx_eh_target_reset()
1242 struct qla_hw_data *ha = vha->hw; in qla2xxx_eh_host_reset() local
1246 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev); in qla2xxx_eh_host_reset()
1258 if (qla2x00_reset_active(vha) || ha->optrom_state != QLA_SWAITING) in qla2xxx_eh_host_reset()
1273 if (ha->wq) in qla2xxx_eh_host_reset()
1274 flush_workqueue(ha->wq); in qla2xxx_eh_host_reset()
1277 if (ha->isp_ops->abort_isp(base_vha)) { in qla2xxx_eh_host_reset()
1319 struct qla_hw_data *ha = vha->hw; in qla2x00_loop_reset() local
1321 if (IS_QLAFX00(ha)) { in qla2x00_loop_reset()
1325 if (ql2xtargetreset == 1 && ha->flags.enable_target_reset) { in qla2x00_loop_reset()
1330 ret = ha->isp_ops->target_reset(fcport, 0, 0); in qla2x00_loop_reset()
1340 if (ha->flags.enable_lip_full_login && !IS_CNA_CAPABLE(ha)) { in qla2x00_loop_reset()
1351 if (ha->flags.enable_lip_reset) { in qla2x00_loop_reset()
1370 struct qla_hw_data *ha = vha->hw; in qla2x00_abort_all_cmds() local
1373 qlt_host_reset_handler(ha); in qla2x00_abort_all_cmds()
1375 spin_lock_irqsave(&ha->hardware_lock, flags); in qla2x00_abort_all_cmds()
1376 for (que = 0; que < ha->max_req_queues; que++) { in qla2x00_abort_all_cmds()
1377 req = ha->req_q_map[que]; in qla2x00_abort_all_cmds()
1390 spin_unlock_irqrestore(&ha->hardware_lock, flags); in qla2x00_abort_all_cmds()
1433 qla2x00_config_dma_addressing(struct qla_hw_data *ha) in qla2x00_config_dma_addressing() argument
1436 ha->flags.enable_64bit_addressing = 0; in qla2x00_config_dma_addressing()
1438 if (!dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(64))) { in qla2x00_config_dma_addressing()
1440 if (MSD(dma_get_required_mask(&ha->pdev->dev)) && in qla2x00_config_dma_addressing()
1441 !pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(64))) { in qla2x00_config_dma_addressing()
1443 ha->flags.enable_64bit_addressing = 1; in qla2x00_config_dma_addressing()
1444 ha->isp_ops->calc_req_entries = qla2x00_calc_iocbs_64; in qla2x00_config_dma_addressing()
1445 ha->isp_ops->build_iocbs = qla2x00_build_scsi_iocbs_64; in qla2x00_config_dma_addressing()
1450 dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(32)); in qla2x00_config_dma_addressing()
1451 pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(32)); in qla2x00_config_dma_addressing()
1455 qla2x00_enable_intrs(struct qla_hw_data *ha) in qla2x00_enable_intrs() argument
1458 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; in qla2x00_enable_intrs()
1460 spin_lock_irqsave(&ha->hardware_lock, flags); in qla2x00_enable_intrs()
1461 ha->interrupts_on = 1; in qla2x00_enable_intrs()
1465 spin_unlock_irqrestore(&ha->hardware_lock, flags); in qla2x00_enable_intrs()
1470 qla2x00_disable_intrs(struct qla_hw_data *ha) in qla2x00_disable_intrs() argument
1473 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; in qla2x00_disable_intrs()
1475 spin_lock_irqsave(&ha->hardware_lock, flags); in qla2x00_disable_intrs()
1476 ha->interrupts_on = 0; in qla2x00_disable_intrs()
1480 spin_unlock_irqrestore(&ha->hardware_lock, flags); in qla2x00_disable_intrs()
1484 qla24xx_enable_intrs(struct qla_hw_data *ha) in qla24xx_enable_intrs() argument
1487 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; in qla24xx_enable_intrs()
1489 spin_lock_irqsave(&ha->hardware_lock, flags); in qla24xx_enable_intrs()
1490 ha->interrupts_on = 1; in qla24xx_enable_intrs()
1493 spin_unlock_irqrestore(&ha->hardware_lock, flags); in qla24xx_enable_intrs()
1497 qla24xx_disable_intrs(struct qla_hw_data *ha) in qla24xx_disable_intrs() argument
1500 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; in qla24xx_disable_intrs()
1502 if (IS_NOPOLLING_TYPE(ha)) in qla24xx_disable_intrs()
1504 spin_lock_irqsave(&ha->hardware_lock, flags); in qla24xx_disable_intrs()
1505 ha->interrupts_on = 0; in qla24xx_disable_intrs()
1508 spin_unlock_irqrestore(&ha->hardware_lock, flags); in qla24xx_disable_intrs()
1512 qla2x00_iospace_config(struct qla_hw_data *ha) in qla2x00_iospace_config() argument
1518 if (pci_request_selected_regions(ha->pdev, ha->bars, in qla2x00_iospace_config()
1520 ql_log_pci(ql_log_fatal, ha->pdev, 0x0011, in qla2x00_iospace_config()
1522 pci_name(ha->pdev)); in qla2x00_iospace_config()
1525 if (!(ha->bars & 1)) in qla2x00_iospace_config()
1529 pio = pci_resource_start(ha->pdev, 0); in qla2x00_iospace_config()
1530 if (pci_resource_flags(ha->pdev, 0) & IORESOURCE_IO) { in qla2x00_iospace_config()
1531 if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) { in qla2x00_iospace_config()
1532 ql_log_pci(ql_log_warn, ha->pdev, 0x0012, in qla2x00_iospace_config()
1534 pci_name(ha->pdev)); in qla2x00_iospace_config()
1538 ql_log_pci(ql_log_warn, ha->pdev, 0x0013, in qla2x00_iospace_config()
1540 pci_name(ha->pdev)); in qla2x00_iospace_config()
1543 ha->pio_address = pio; in qla2x00_iospace_config()
1544 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0014, in qla2x00_iospace_config()
1546 (unsigned long long)ha->pio_address); in qla2x00_iospace_config()
1550 if (!(pci_resource_flags(ha->pdev, 1) & IORESOURCE_MEM)) { in qla2x00_iospace_config()
1551 ql_log_pci(ql_log_fatal, ha->pdev, 0x0015, in qla2x00_iospace_config()
1553 pci_name(ha->pdev)); in qla2x00_iospace_config()
1556 if (pci_resource_len(ha->pdev, 1) < MIN_IOBASE_LEN) { in qla2x00_iospace_config()
1557 ql_log_pci(ql_log_fatal, ha->pdev, 0x0016, in qla2x00_iospace_config()
1559 pci_name(ha->pdev)); in qla2x00_iospace_config()
1563 ha->iobase = ioremap(pci_resource_start(ha->pdev, 1), MIN_IOBASE_LEN); in qla2x00_iospace_config()
1564 if (!ha->iobase) { in qla2x00_iospace_config()
1565 ql_log_pci(ql_log_fatal, ha->pdev, 0x0017, in qla2x00_iospace_config()
1567 pci_name(ha->pdev)); in qla2x00_iospace_config()
1572 ha->max_req_queues = ha->max_rsp_queues = 1; in qla2x00_iospace_config()
1575 (!IS_QLA25XX(ha) && !IS_QLA81XX(ha))) in qla2x00_iospace_config()
1578 ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 3), in qla2x00_iospace_config()
1579 pci_resource_len(ha->pdev, 3)); in qla2x00_iospace_config()
1580 if (ha->mqiobase) { in qla2x00_iospace_config()
1581 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0018, in qla2x00_iospace_config()
1582 "MQIO Base=%p.\n", ha->mqiobase); in qla2x00_iospace_config()
1584 pci_read_config_word(ha->pdev, QLA_PCI_MSIX_CONTROL, &msix); in qla2x00_iospace_config()
1585 ha->msix_count = msix; in qla2x00_iospace_config()
1590 ha->max_rsp_queues = (ha->msix_count - 1 > cpus) ? in qla2x00_iospace_config()
1591 (cpus + 1) : (ha->msix_count - 1); in qla2x00_iospace_config()
1592 ha->max_req_queues = 2; in qla2x00_iospace_config()
1594 ha->max_req_queues = ql2xmaxqueues > QLA_MQ_SIZE ? in qla2x00_iospace_config()
1596 ql_dbg_pci(ql_dbg_multiq, ha->pdev, 0xc008, in qla2x00_iospace_config()
1598 ha->max_req_queues); in qla2x00_iospace_config()
1599 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0019, in qla2x00_iospace_config()
1601 ha->max_req_queues); in qla2x00_iospace_config()
1603 ql_log_pci(ql_log_info, ha->pdev, 0x001a, in qla2x00_iospace_config()
1606 ql_log_pci(ql_log_info, ha->pdev, 0x001b, in qla2x00_iospace_config()
1610 ha->msix_count = ha->max_rsp_queues + 1; in qla2x00_iospace_config()
1611 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x001c, in qla2x00_iospace_config()
1612 "MSIX Count:%d.\n", ha->msix_count); in qla2x00_iospace_config()
1621 qla83xx_iospace_config(struct qla_hw_data *ha) in qla83xx_iospace_config() argument
1626 if (pci_request_selected_regions(ha->pdev, ha->bars, in qla83xx_iospace_config()
1628 ql_log_pci(ql_log_fatal, ha->pdev, 0x0117, in qla83xx_iospace_config()
1630 pci_name(ha->pdev)); in qla83xx_iospace_config()
1636 if (!(pci_resource_flags(ha->pdev, 0) & IORESOURCE_MEM)) { in qla83xx_iospace_config()
1637 ql_log_pci(ql_log_warn, ha->pdev, 0x0118, in qla83xx_iospace_config()
1639 pci_name(ha->pdev)); in qla83xx_iospace_config()
1642 if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) { in qla83xx_iospace_config()
1643 ql_log_pci(ql_log_warn, ha->pdev, 0x0119, in qla83xx_iospace_config()
1645 pci_name(ha->pdev)); in qla83xx_iospace_config()
1649 ha->iobase = ioremap(pci_resource_start(ha->pdev, 0), MIN_IOBASE_LEN); in qla83xx_iospace_config()
1650 if (!ha->iobase) { in qla83xx_iospace_config()
1651 ql_log_pci(ql_log_fatal, ha->pdev, 0x011a, in qla83xx_iospace_config()
1653 pci_name(ha->pdev)); in qla83xx_iospace_config()
1660 ha->max_req_queues = ha->max_rsp_queues = 1; in qla83xx_iospace_config()
1661 ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 4), in qla83xx_iospace_config()
1662 pci_resource_len(ha->pdev, 4)); in qla83xx_iospace_config()
1664 if (!ha->mqiobase) { in qla83xx_iospace_config()
1665 ql_log_pci(ql_log_fatal, ha->pdev, 0x011d, in qla83xx_iospace_config()
1670 ha->msixbase = ioremap(pci_resource_start(ha->pdev, 2), in qla83xx_iospace_config()
1671 pci_resource_len(ha->pdev, 2)); in qla83xx_iospace_config()
1672 if (ha->msixbase) { in qla83xx_iospace_config()
1674 pci_read_config_word(ha->pdev, in qla83xx_iospace_config()
1676 ha->msix_count = msix; in qla83xx_iospace_config()
1681 ha->max_rsp_queues = (ha->msix_count - 1 > cpus) ? in qla83xx_iospace_config()
1682 (cpus + 1) : (ha->msix_count - 1); in qla83xx_iospace_config()
1683 ha->max_req_queues = 2; in qla83xx_iospace_config()
1685 ha->max_req_queues = ql2xmaxqueues > QLA_MQ_SIZE ? in qla83xx_iospace_config()
1687 ql_dbg_pci(ql_dbg_multiq, ha->pdev, 0xc00c, in qla83xx_iospace_config()
1689 ha->max_req_queues); in qla83xx_iospace_config()
1690 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011b, in qla83xx_iospace_config()
1692 ha->max_req_queues); in qla83xx_iospace_config()
1694 ql_log_pci(ql_log_info, ha->pdev, 0x011c, in qla83xx_iospace_config()
1697 ql_log_pci(ql_log_info, ha->pdev, 0x011e, in qla83xx_iospace_config()
1701 ha->msix_count = ha->max_rsp_queues + 1; in qla83xx_iospace_config()
1703 qlt_83xx_iospace_config(ha); in qla83xx_iospace_config()
1705 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011f, in qla83xx_iospace_config()
1706 "MSIX Count:%d.\n", ha->msix_count); in qla83xx_iospace_config()
2094 qla2x00_set_isp_flags(struct qla_hw_data *ha) in qla2x00_set_isp_flags() argument
2096 ha->device_type = DT_EXTENDED_IDS; in qla2x00_set_isp_flags()
2097 switch (ha->pdev->device) { in qla2x00_set_isp_flags()
2099 ha->device_type |= DT_ISP2100; in qla2x00_set_isp_flags()
2100 ha->device_type &= ~DT_EXTENDED_IDS; in qla2x00_set_isp_flags()
2101 ha->fw_srisc_address = RISC_START_ADDRESS_2100; in qla2x00_set_isp_flags()
2104 ha->device_type |= DT_ISP2200; in qla2x00_set_isp_flags()
2105 ha->device_type &= ~DT_EXTENDED_IDS; in qla2x00_set_isp_flags()
2106 ha->fw_srisc_address = RISC_START_ADDRESS_2100; in qla2x00_set_isp_flags()
2109 ha->device_type |= DT_ISP2300; in qla2x00_set_isp_flags()
2110 ha->device_type |= DT_ZIO_SUPPORTED; in qla2x00_set_isp_flags()
2111 ha->fw_srisc_address = RISC_START_ADDRESS_2300; in qla2x00_set_isp_flags()
2114 ha->device_type |= DT_ISP2312; in qla2x00_set_isp_flags()
2115 ha->device_type |= DT_ZIO_SUPPORTED; in qla2x00_set_isp_flags()
2116 ha->fw_srisc_address = RISC_START_ADDRESS_2300; in qla2x00_set_isp_flags()
2119 ha->device_type |= DT_ISP2322; in qla2x00_set_isp_flags()
2120 ha->device_type |= DT_ZIO_SUPPORTED; in qla2x00_set_isp_flags()
2121 if (ha->pdev->subsystem_vendor == 0x1028 && in qla2x00_set_isp_flags()
2122 ha->pdev->subsystem_device == 0x0170) in qla2x00_set_isp_flags()
2123 ha->device_type |= DT_OEM_001; in qla2x00_set_isp_flags()
2124 ha->fw_srisc_address = RISC_START_ADDRESS_2300; in qla2x00_set_isp_flags()
2127 ha->device_type |= DT_ISP6312; in qla2x00_set_isp_flags()
2128 ha->fw_srisc_address = RISC_START_ADDRESS_2300; in qla2x00_set_isp_flags()
2131 ha->device_type |= DT_ISP6322; in qla2x00_set_isp_flags()
2132 ha->fw_srisc_address = RISC_START_ADDRESS_2300; in qla2x00_set_isp_flags()
2135 ha->device_type |= DT_ISP2422; in qla2x00_set_isp_flags()
2136 ha->device_type |= DT_ZIO_SUPPORTED; in qla2x00_set_isp_flags()
2137 ha->device_type |= DT_FWI2; in qla2x00_set_isp_flags()
2138 ha->device_type |= DT_IIDMA; in qla2x00_set_isp_flags()
2139 ha->fw_srisc_address = RISC_START_ADDRESS_2400; in qla2x00_set_isp_flags()
2142 ha->device_type |= DT_ISP2432; in qla2x00_set_isp_flags()
2143 ha->device_type |= DT_ZIO_SUPPORTED; in qla2x00_set_isp_flags()
2144 ha->device_type |= DT_FWI2; in qla2x00_set_isp_flags()
2145 ha->device_type |= DT_IIDMA; in qla2x00_set_isp_flags()
2146 ha->fw_srisc_address = RISC_START_ADDRESS_2400; in qla2x00_set_isp_flags()
2149 ha->device_type |= DT_ISP8432; in qla2x00_set_isp_flags()
2150 ha->device_type |= DT_ZIO_SUPPORTED; in qla2x00_set_isp_flags()
2151 ha->device_type |= DT_FWI2; in qla2x00_set_isp_flags()
2152 ha->device_type |= DT_IIDMA; in qla2x00_set_isp_flags()
2153 ha->fw_srisc_address = RISC_START_ADDRESS_2400; in qla2x00_set_isp_flags()
2156 ha->device_type |= DT_ISP5422; in qla2x00_set_isp_flags()
2157 ha->device_type |= DT_FWI2; in qla2x00_set_isp_flags()
2158 ha->fw_srisc_address = RISC_START_ADDRESS_2400; in qla2x00_set_isp_flags()
2161 ha->device_type |= DT_ISP5432; in qla2x00_set_isp_flags()
2162 ha->device_type |= DT_FWI2; in qla2x00_set_isp_flags()
2163 ha->fw_srisc_address = RISC_START_ADDRESS_2400; in qla2x00_set_isp_flags()
2166 ha->device_type |= DT_ISP2532; in qla2x00_set_isp_flags()
2167 ha->device_type |= DT_ZIO_SUPPORTED; in qla2x00_set_isp_flags()
2168 ha->device_type |= DT_FWI2; in qla2x00_set_isp_flags()
2169 ha->device_type |= DT_IIDMA; in qla2x00_set_isp_flags()
2170 ha->fw_srisc_address = RISC_START_ADDRESS_2400; in qla2x00_set_isp_flags()
2173 ha->device_type |= DT_ISP8001; in qla2x00_set_isp_flags()
2174 ha->device_type |= DT_ZIO_SUPPORTED; in qla2x00_set_isp_flags()
2175 ha->device_type |= DT_FWI2; in qla2x00_set_isp_flags()
2176 ha->device_type |= DT_IIDMA; in qla2x00_set_isp_flags()
2177 ha->fw_srisc_address = RISC_START_ADDRESS_2400; in qla2x00_set_isp_flags()
2180 ha->device_type |= DT_ISP8021; in qla2x00_set_isp_flags()
2181 ha->device_type |= DT_ZIO_SUPPORTED; in qla2x00_set_isp_flags()
2182 ha->device_type |= DT_FWI2; in qla2x00_set_isp_flags()
2183 ha->fw_srisc_address = RISC_START_ADDRESS_2400; in qla2x00_set_isp_flags()
2185 qla82xx_init_flags(ha); in qla2x00_set_isp_flags()
2188 ha->device_type |= DT_ISP8044; in qla2x00_set_isp_flags()
2189 ha->device_type |= DT_ZIO_SUPPORTED; in qla2x00_set_isp_flags()
2190 ha->device_type |= DT_FWI2; in qla2x00_set_isp_flags()
2191 ha->fw_srisc_address = RISC_START_ADDRESS_2400; in qla2x00_set_isp_flags()
2193 qla82xx_init_flags(ha); in qla2x00_set_isp_flags()
2196 ha->device_type |= DT_ISP2031; in qla2x00_set_isp_flags()
2197 ha->device_type |= DT_ZIO_SUPPORTED; in qla2x00_set_isp_flags()
2198 ha->device_type |= DT_FWI2; in qla2x00_set_isp_flags()
2199 ha->device_type |= DT_IIDMA; in qla2x00_set_isp_flags()
2200 ha->device_type |= DT_T10_PI; in qla2x00_set_isp_flags()
2201 ha->fw_srisc_address = RISC_START_ADDRESS_2400; in qla2x00_set_isp_flags()
2204 ha->device_type |= DT_ISP8031; in qla2x00_set_isp_flags()
2205 ha->device_type |= DT_ZIO_SUPPORTED; in qla2x00_set_isp_flags()
2206 ha->device_type |= DT_FWI2; in qla2x00_set_isp_flags()
2207 ha->device_type |= DT_IIDMA; in qla2x00_set_isp_flags()
2208 ha->device_type |= DT_T10_PI; in qla2x00_set_isp_flags()
2209 ha->fw_srisc_address = RISC_START_ADDRESS_2400; in qla2x00_set_isp_flags()
2212 ha->device_type |= DT_ISPFX00; in qla2x00_set_isp_flags()
2215 ha->device_type |= DT_ISP2071; in qla2x00_set_isp_flags()
2216 ha->device_type |= DT_ZIO_SUPPORTED; in qla2x00_set_isp_flags()
2217 ha->device_type |= DT_FWI2; in qla2x00_set_isp_flags()
2218 ha->device_type |= DT_IIDMA; in qla2x00_set_isp_flags()
2219 ha->fw_srisc_address = RISC_START_ADDRESS_2400; in qla2x00_set_isp_flags()
2222 ha->device_type |= DT_ISP2271; in qla2x00_set_isp_flags()
2223 ha->device_type |= DT_ZIO_SUPPORTED; in qla2x00_set_isp_flags()
2224 ha->device_type |= DT_FWI2; in qla2x00_set_isp_flags()
2225 ha->device_type |= DT_IIDMA; in qla2x00_set_isp_flags()
2226 ha->fw_srisc_address = RISC_START_ADDRESS_2400; in qla2x00_set_isp_flags()
2230 if (IS_QLA82XX(ha)) in qla2x00_set_isp_flags()
2231 ha->port_no = ha->portnum & 1; in qla2x00_set_isp_flags()
2234 pci_read_config_byte(ha->pdev, PCI_INTERRUPT_PIN, &ha->port_no); in qla2x00_set_isp_flags()
2235 if (IS_QLA27XX(ha)) in qla2x00_set_isp_flags()
2236 ha->port_no--; in qla2x00_set_isp_flags()
2238 ha->port_no = !(ha->port_no & 1); in qla2x00_set_isp_flags()
2241 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x000b, in qla2x00_set_isp_flags()
2243 ha->device_type, ha->port_no, ha->fw_srisc_address); in qla2x00_set_isp_flags()
2282 struct qla_hw_data *ha; in qla2x00_probe_one() local
2325 ha = kzalloc(sizeof(struct qla_hw_data), GFP_KERNEL); in qla2x00_probe_one()
2326 if (!ha) { in qla2x00_probe_one()
2332 "Memory allocated for ha=%p.\n", ha); in qla2x00_probe_one()
2333 ha->pdev = pdev; in qla2x00_probe_one()
2334 ha->tgt.enable_class_2 = ql2xenableclass2; in qla2x00_probe_one()
2335 INIT_LIST_HEAD(&ha->tgt.q_full_list); in qla2x00_probe_one()
2336 spin_lock_init(&ha->tgt.q_full_lock); in qla2x00_probe_one()
2339 ha->bars = bars; in qla2x00_probe_one()
2340 ha->mem_only = mem_only; in qla2x00_probe_one()
2341 spin_lock_init(&ha->hardware_lock); in qla2x00_probe_one()
2342 spin_lock_init(&ha->vport_slock); in qla2x00_probe_one()
2343 mutex_init(&ha->selflogin_lock); in qla2x00_probe_one()
2344 mutex_init(&ha->optrom_mutex); in qla2x00_probe_one()
2347 qla2x00_set_isp_flags(ha); in qla2x00_probe_one()
2350 if (IS_QLA24XX(ha) || IS_QLA25XX(ha) || IS_QLA81XX(ha) || in qla2x00_probe_one()
2351 IS_QLA83XX(ha) || IS_QLA27XX(ha)) in qla2x00_probe_one()
2354 ha->prev_topology = 0; in qla2x00_probe_one()
2355 ha->init_cb_size = sizeof(init_cb_t); in qla2x00_probe_one()
2356 ha->link_data_rate = PORT_SPEED_UNKNOWN; in qla2x00_probe_one()
2357 ha->optrom_size = OPTROM_SIZE_2300; in qla2x00_probe_one()
2360 if (IS_QLA2100(ha)) { in qla2x00_probe_one()
2361 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100; in qla2x00_probe_one()
2362 ha->mbx_count = MAILBOX_REGISTER_COUNT_2100; in qla2x00_probe_one()
2365 ha->max_loop_id = SNS_LAST_LOOP_ID_2100; in qla2x00_probe_one()
2366 ha->gid_list_info_size = 4; in qla2x00_probe_one()
2367 ha->flash_conf_off = ~0; in qla2x00_probe_one()
2368 ha->flash_data_off = ~0; in qla2x00_probe_one()
2369 ha->nvram_conf_off = ~0; in qla2x00_probe_one()
2370 ha->nvram_data_off = ~0; in qla2x00_probe_one()
2371 ha->isp_ops = &qla2100_isp_ops; in qla2x00_probe_one()
2372 } else if (IS_QLA2200(ha)) { in qla2x00_probe_one()
2373 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100; in qla2x00_probe_one()
2374 ha->mbx_count = MAILBOX_REGISTER_COUNT_2200; in qla2x00_probe_one()
2377 ha->max_loop_id = SNS_LAST_LOOP_ID_2100; in qla2x00_probe_one()
2378 ha->gid_list_info_size = 4; in qla2x00_probe_one()
2379 ha->flash_conf_off = ~0; in qla2x00_probe_one()
2380 ha->flash_data_off = ~0; in qla2x00_probe_one()
2381 ha->nvram_conf_off = ~0; in qla2x00_probe_one()
2382 ha->nvram_data_off = ~0; in qla2x00_probe_one()
2383 ha->isp_ops = &qla2100_isp_ops; in qla2x00_probe_one()
2384 } else if (IS_QLA23XX(ha)) { in qla2x00_probe_one()
2385 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100; in qla2x00_probe_one()
2386 ha->mbx_count = MAILBOX_REGISTER_COUNT; in qla2x00_probe_one()
2389 ha->max_loop_id = SNS_LAST_LOOP_ID_2300; in qla2x00_probe_one()
2390 ha->gid_list_info_size = 6; in qla2x00_probe_one()
2391 if (IS_QLA2322(ha) || IS_QLA6322(ha)) in qla2x00_probe_one()
2392 ha->optrom_size = OPTROM_SIZE_2322; in qla2x00_probe_one()
2393 ha->flash_conf_off = ~0; in qla2x00_probe_one()
2394 ha->flash_data_off = ~0; in qla2x00_probe_one()
2395 ha->nvram_conf_off = ~0; in qla2x00_probe_one()
2396 ha->nvram_data_off = ~0; in qla2x00_probe_one()
2397 ha->isp_ops = &qla2300_isp_ops; in qla2x00_probe_one()
2398 } else if (IS_QLA24XX_TYPE(ha)) { in qla2x00_probe_one()
2399 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400; in qla2x00_probe_one()
2400 ha->mbx_count = MAILBOX_REGISTER_COUNT; in qla2x00_probe_one()
2403 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX; in qla2x00_probe_one()
2404 ha->max_loop_id = SNS_LAST_LOOP_ID_2300; in qla2x00_probe_one()
2405 ha->init_cb_size = sizeof(struct mid_init_cb_24xx); in qla2x00_probe_one()
2406 ha->gid_list_info_size = 8; in qla2x00_probe_one()
2407 ha->optrom_size = OPTROM_SIZE_24XX; in qla2x00_probe_one()
2408 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA24XX; in qla2x00_probe_one()
2409 ha->isp_ops = &qla24xx_isp_ops; in qla2x00_probe_one()
2410 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF; in qla2x00_probe_one()
2411 ha->flash_data_off = FARX_ACCESS_FLASH_DATA; in qla2x00_probe_one()
2412 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF; in qla2x00_probe_one()
2413 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA; in qla2x00_probe_one()
2414 } else if (IS_QLA25XX(ha)) { in qla2x00_probe_one()
2415 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400; in qla2x00_probe_one()
2416 ha->mbx_count = MAILBOX_REGISTER_COUNT; in qla2x00_probe_one()
2419 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX; in qla2x00_probe_one()
2420 ha->max_loop_id = SNS_LAST_LOOP_ID_2300; in qla2x00_probe_one()
2421 ha->init_cb_size = sizeof(struct mid_init_cb_24xx); in qla2x00_probe_one()
2422 ha->gid_list_info_size = 8; in qla2x00_probe_one()
2423 ha->optrom_size = OPTROM_SIZE_25XX; in qla2x00_probe_one()
2424 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX; in qla2x00_probe_one()
2425 ha->isp_ops = &qla25xx_isp_ops; in qla2x00_probe_one()
2426 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF; in qla2x00_probe_one()
2427 ha->flash_data_off = FARX_ACCESS_FLASH_DATA; in qla2x00_probe_one()
2428 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF; in qla2x00_probe_one()
2429 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA; in qla2x00_probe_one()
2430 } else if (IS_QLA81XX(ha)) { in qla2x00_probe_one()
2431 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400; in qla2x00_probe_one()
2432 ha->mbx_count = MAILBOX_REGISTER_COUNT; in qla2x00_probe_one()
2435 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX; in qla2x00_probe_one()
2436 ha->max_loop_id = SNS_LAST_LOOP_ID_2300; in qla2x00_probe_one()
2437 ha->init_cb_size = sizeof(struct mid_init_cb_81xx); in qla2x00_probe_one()
2438 ha->gid_list_info_size = 8; in qla2x00_probe_one()
2439 ha->optrom_size = OPTROM_SIZE_81XX; in qla2x00_probe_one()
2440 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX; in qla2x00_probe_one()
2441 ha->isp_ops = &qla81xx_isp_ops; in qla2x00_probe_one()
2442 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX; in qla2x00_probe_one()
2443 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX; in qla2x00_probe_one()
2444 ha->nvram_conf_off = ~0; in qla2x00_probe_one()
2445 ha->nvram_data_off = ~0; in qla2x00_probe_one()
2446 } else if (IS_QLA82XX(ha)) { in qla2x00_probe_one()
2447 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400; in qla2x00_probe_one()
2448 ha->mbx_count = MAILBOX_REGISTER_COUNT; in qla2x00_probe_one()
2451 ha->max_loop_id = SNS_LAST_LOOP_ID_2300; in qla2x00_probe_one()
2452 ha->init_cb_size = sizeof(struct mid_init_cb_81xx); in qla2x00_probe_one()
2453 ha->gid_list_info_size = 8; in qla2x00_probe_one()
2454 ha->optrom_size = OPTROM_SIZE_82XX; in qla2x00_probe_one()
2455 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX; in qla2x00_probe_one()
2456 ha->isp_ops = &qla82xx_isp_ops; in qla2x00_probe_one()
2457 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF; in qla2x00_probe_one()
2458 ha->flash_data_off = FARX_ACCESS_FLASH_DATA; in qla2x00_probe_one()
2459 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF; in qla2x00_probe_one()
2460 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA; in qla2x00_probe_one()
2461 } else if (IS_QLA8044(ha)) { in qla2x00_probe_one()
2462 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400; in qla2x00_probe_one()
2463 ha->mbx_count = MAILBOX_REGISTER_COUNT; in qla2x00_probe_one()
2466 ha->max_loop_id = SNS_LAST_LOOP_ID_2300; in qla2x00_probe_one()
2467 ha->init_cb_size = sizeof(struct mid_init_cb_81xx); in qla2x00_probe_one()
2468 ha->gid_list_info_size = 8; in qla2x00_probe_one()
2469 ha->optrom_size = OPTROM_SIZE_83XX; in qla2x00_probe_one()
2470 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX; in qla2x00_probe_one()
2471 ha->isp_ops = &qla8044_isp_ops; in qla2x00_probe_one()
2472 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF; in qla2x00_probe_one()
2473 ha->flash_data_off = FARX_ACCESS_FLASH_DATA; in qla2x00_probe_one()
2474 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF; in qla2x00_probe_one()
2475 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA; in qla2x00_probe_one()
2476 } else if (IS_QLA83XX(ha)) { in qla2x00_probe_one()
2477 ha->portnum = PCI_FUNC(ha->pdev->devfn); in qla2x00_probe_one()
2478 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400; in qla2x00_probe_one()
2479 ha->mbx_count = MAILBOX_REGISTER_COUNT; in qla2x00_probe_one()
2482 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX; in qla2x00_probe_one()
2483 ha->max_loop_id = SNS_LAST_LOOP_ID_2300; in qla2x00_probe_one()
2484 ha->init_cb_size = sizeof(struct mid_init_cb_81xx); in qla2x00_probe_one()
2485 ha->gid_list_info_size = 8; in qla2x00_probe_one()
2486 ha->optrom_size = OPTROM_SIZE_83XX; in qla2x00_probe_one()
2487 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX; in qla2x00_probe_one()
2488 ha->isp_ops = &qla83xx_isp_ops; in qla2x00_probe_one()
2489 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX; in qla2x00_probe_one()
2490 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX; in qla2x00_probe_one()
2491 ha->nvram_conf_off = ~0; in qla2x00_probe_one()
2492 ha->nvram_data_off = ~0; in qla2x00_probe_one()
2493 } else if (IS_QLAFX00(ha)) { in qla2x00_probe_one()
2494 ha->max_fibre_devices = MAX_FIBRE_DEVICES_FX00; in qla2x00_probe_one()
2495 ha->mbx_count = MAILBOX_REGISTER_COUNT_FX00; in qla2x00_probe_one()
2496 ha->aen_mbx_count = AEN_MAILBOX_REGISTER_COUNT_FX00; in qla2x00_probe_one()
2499 ha->isp_ops = &qlafx00_isp_ops; in qla2x00_probe_one()
2500 ha->port_down_retry_count = 30; /* default value */ in qla2x00_probe_one()
2501 ha->mr.fw_hbt_cnt = QLAFX00_HEARTBEAT_INTERVAL; in qla2x00_probe_one()
2502 ha->mr.fw_reset_timer_tick = QLAFX00_RESET_INTERVAL; in qla2x00_probe_one()
2503 ha->mr.fw_critemp_timer_tick = QLAFX00_CRITEMP_INTERVAL; in qla2x00_probe_one()
2504 ha->mr.fw_hbt_en = 1; in qla2x00_probe_one()
2505 ha->mr.host_info_resend = false; in qla2x00_probe_one()
2506 ha->mr.hinfo_resend_timer_tick = QLAFX00_HINFO_RESEND_INTERVAL; in qla2x00_probe_one()
2507 } else if (IS_QLA27XX(ha)) { in qla2x00_probe_one()
2508 ha->portnum = PCI_FUNC(ha->pdev->devfn); in qla2x00_probe_one()
2509 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400; in qla2x00_probe_one()
2510 ha->mbx_count = MAILBOX_REGISTER_COUNT; in qla2x00_probe_one()
2513 ha->max_loop_id = SNS_LAST_LOOP_ID_2300; in qla2x00_probe_one()
2514 ha->init_cb_size = sizeof(struct mid_init_cb_81xx); in qla2x00_probe_one()
2515 ha->gid_list_info_size = 8; in qla2x00_probe_one()
2516 ha->optrom_size = OPTROM_SIZE_83XX; in qla2x00_probe_one()
2517 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX; in qla2x00_probe_one()
2518 ha->isp_ops = &qla27xx_isp_ops; in qla2x00_probe_one()
2519 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX; in qla2x00_probe_one()
2520 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX; in qla2x00_probe_one()
2521 ha->nvram_conf_off = ~0; in qla2x00_probe_one()
2522 ha->nvram_data_off = ~0; in qla2x00_probe_one()
2530 ha->mbx_count, req_length, rsp_length, ha->max_loop_id, in qla2x00_probe_one()
2531 ha->init_cb_size, ha->gid_list_info_size, ha->optrom_size, in qla2x00_probe_one()
2532 ha->nvram_npiv_size, ha->max_fibre_devices); in qla2x00_probe_one()
2536 ha->isp_ops, ha->flash_conf_off, ha->flash_data_off, in qla2x00_probe_one()
2537 ha->nvram_conf_off, ha->nvram_data_off); in qla2x00_probe_one()
2540 ret = ha->isp_ops->iospace_config(ha); in qla2x00_probe_one()
2546 pdev->device, pdev->irq, ha->iobase); in qla2x00_probe_one()
2547 mutex_init(&ha->vport_lock); in qla2x00_probe_one()
2548 init_completion(&ha->mbx_cmd_comp); in qla2x00_probe_one()
2549 complete(&ha->mbx_cmd_comp); in qla2x00_probe_one()
2550 init_completion(&ha->mbx_intr_comp); in qla2x00_probe_one()
2551 init_completion(&ha->dcbx_comp); in qla2x00_probe_one()
2552 init_completion(&ha->lb_portup_comp); in qla2x00_probe_one()
2554 set_bit(0, (unsigned long *) ha->vp_idx_map); in qla2x00_probe_one()
2556 qla2x00_config_dma_addressing(ha); in qla2x00_probe_one()
2559 ha->flags.enable_64bit_addressing ? "enable" : in qla2x00_probe_one()
2561 ret = qla2x00_mem_alloc(ha, req_length, rsp_length, &req, &rsp); in qla2x00_probe_one()
2574 base_vha = qla2x00_create_host(sht, ha); in qla2x00_probe_one()
2577 qla2x00_mem_free(ha); in qla2x00_probe_one()
2578 qla2x00_free_req_que(ha, req); in qla2x00_probe_one()
2579 qla2x00_free_rsp_que(ha, rsp); in qla2x00_probe_one()
2588 if (IS_QLA2XXX_MIDTYPE(ha)) in qla2x00_probe_one()
2595 ha->mr.fcport.vha = base_vha; in qla2x00_probe_one()
2596 ha->mr.fcport.port_type = FCT_UNKNOWN; in qla2x00_probe_one()
2597 ha->mr.fcport.loop_id = FC_NO_LOOP_ID; in qla2x00_probe_one()
2598 qla2x00_set_fcport_state(&ha->mr.fcport, FCS_UNCONFIGURED); in qla2x00_probe_one()
2599 ha->mr.fcport.supported_classes = FC_COS_UNSPECIFIED; in qla2x00_probe_one()
2600 ha->mr.fcport.scan_state = 1; in qla2x00_probe_one()
2603 if (!IS_FWI2_CAPABLE(ha)) { in qla2x00_probe_one()
2604 if (IS_QLA2100(ha)) in qla2x00_probe_one()
2607 if (!IS_QLA82XX(ha)) in qla2x00_probe_one()
2610 host->max_id = ha->max_fibre_devices; in qla2x00_probe_one()
2613 if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) in qla2x00_probe_one()
2619 if (!IS_QLAFX00(ha) && !IS_FWI2_CAPABLE(ha) && in qla2x00_probe_one()
2637 if (!qla2x00_alloc_queues(ha, req, rsp)) { in qla2x00_probe_one()
2644 qlt_probe_one_stage1(base_vha, ha); in qla2x00_probe_one()
2647 ret = qla2x00_request_irqs(ha, rsp); in qla2x00_probe_one()
2657 if (IS_QLAFX00(ha)) { in qla2x00_probe_one()
2658 ha->rsp_q_map[0] = rsp; in qla2x00_probe_one()
2659 ha->req_q_map[0] = req; in qla2x00_probe_one()
2660 set_bit(0, ha->req_qid_map); in qla2x00_probe_one()
2661 set_bit(0, ha->rsp_qid_map); in qla2x00_probe_one()
2665 req->req_q_in = &ha->iobase->isp24.req_q_in; in qla2x00_probe_one()
2666 req->req_q_out = &ha->iobase->isp24.req_q_out; in qla2x00_probe_one()
2667 rsp->rsp_q_in = &ha->iobase->isp24.rsp_q_in; in qla2x00_probe_one()
2668 rsp->rsp_q_out = &ha->iobase->isp24.rsp_q_out; in qla2x00_probe_one()
2669 if (ha->mqenable || IS_QLA83XX(ha) || IS_QLA27XX(ha)) { in qla2x00_probe_one()
2670 req->req_q_in = &ha->mqiobase->isp25mq.req_q_in; in qla2x00_probe_one()
2671 req->req_q_out = &ha->mqiobase->isp25mq.req_q_out; in qla2x00_probe_one()
2672 rsp->rsp_q_in = &ha->mqiobase->isp25mq.rsp_q_in; in qla2x00_probe_one()
2673 rsp->rsp_q_out = &ha->mqiobase->isp25mq.rsp_q_out; in qla2x00_probe_one()
2676 if (IS_QLAFX00(ha)) { in qla2x00_probe_one()
2677 req->req_q_in = &ha->iobase->ispfx00.req_q_in; in qla2x00_probe_one()
2678 req->req_q_out = &ha->iobase->ispfx00.req_q_out; in qla2x00_probe_one()
2679 rsp->rsp_q_in = &ha->iobase->ispfx00.rsp_q_in; in qla2x00_probe_one()
2680 rsp->rsp_q_out = &ha->iobase->ispfx00.rsp_q_out; in qla2x00_probe_one()
2683 if (IS_P3P_TYPE(ha)) { in qla2x00_probe_one()
2684 req->req_q_out = &ha->iobase->isp82.req_q_out[0]; in qla2x00_probe_one()
2685 rsp->rsp_q_in = &ha->iobase->isp82.rsp_q_in[0]; in qla2x00_probe_one()
2686 rsp->rsp_q_out = &ha->iobase->isp82.rsp_q_out[0]; in qla2x00_probe_one()
2691 ha->rsp_q_map, ha->req_q_map, rsp->req, req->rsp); in qla2x00_probe_one()
2699 ha->rsp_q_map, ha->req_q_map, rsp->req, req->rsp); in qla2x00_probe_one()
2704 if (ha->isp_ops->initialize_adapter(base_vha)) { in qla2x00_probe_one()
2709 if (IS_QLA82XX(ha)) { in qla2x00_probe_one()
2710 qla82xx_idc_lock(ha); in qla2x00_probe_one()
2711 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE, in qla2x00_probe_one()
2713 qla82xx_idc_unlock(ha); in qla2x00_probe_one()
2716 } else if (IS_QLA8044(ha)) { in qla2x00_probe_one()
2717 qla8044_idc_lock(ha); in qla2x00_probe_one()
2721 qla8044_idc_unlock(ha); in qla2x00_probe_one()
2730 if (IS_QLAFX00(ha)) in qla2x00_probe_one()
2740 if (ha->mqenable) { in qla2x00_probe_one()
2748 if (ha->flags.running_gold_fw) in qla2x00_probe_one()
2754 ha->dpc_thread = kthread_create(qla2x00_do_dpc, ha, in qla2x00_probe_one()
2756 if (IS_ERR(ha->dpc_thread)) { in qla2x00_probe_one()
2759 ret = PTR_ERR(ha->dpc_thread); in qla2x00_probe_one()
2773 INIT_WORK(&ha->board_disable, qla2x00_disable_board_on_pci_error); in qla2x00_probe_one()
2775 if (IS_QLA8031(ha) || IS_MCTP_CAPABLE(ha)) { in qla2x00_probe_one()
2777 ha->dpc_lp_wq = create_singlethread_workqueue(wq_name); in qla2x00_probe_one()
2778 INIT_WORK(&ha->idc_aen, qla83xx_service_idc_aen); in qla2x00_probe_one()
2781 ha->dpc_hp_wq = create_singlethread_workqueue(wq_name); in qla2x00_probe_one()
2782 INIT_WORK(&ha->nic_core_reset, qla83xx_nic_core_reset_work); in qla2x00_probe_one()
2783 INIT_WORK(&ha->idc_state_handler, in qla2x00_probe_one()
2785 INIT_WORK(&ha->nic_core_unrecoverable, in qla2x00_probe_one()
2790 list_add_tail(&base_vha->list, &ha->vp_list); in qla2x00_probe_one()
2791 base_vha->host->irq = ha->pdev->irq; in qla2x00_probe_one()
2800 ha); in qla2x00_probe_one()
2802 if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) { in qla2x00_probe_one()
2803 if (ha->fw_attributes & BIT_4) { in qla2x00_probe_one()
2820 if (IS_PI_IPGUARD_CAPABLE(ha) && in qla2x00_probe_one()
2821 (ql2xenabledif > 1 || IS_PI_DIFB_DIX0_CAPABLE(ha))) in qla2x00_probe_one()
2829 ha->isp_ops->enable_intrs(ha); in qla2x00_probe_one()
2831 if (IS_QLAFX00(ha)) { in qla2x00_probe_one()
2834 host->sg_tablesize = (ha->mr.extended_io_enabled) ? in qla2x00_probe_one()
2844 ha->prev_minidump_failed = 0; in qla2x00_probe_one()
2857 if (IS_QLAFX00(ha)) { in qla2x00_probe_one()
2871 "QLogic %s - %s.\n", ha->model_number, ha->model_desc); in qla2x00_probe_one()
2874 pdev->device, ha->isp_ops->pci_info_str(base_vha, pci_info), in qla2x00_probe_one()
2875 pci_name(pdev), ha->flags.enable_64bit_addressing ? '+' : '-', in qla2x00_probe_one()
2877 ha->isp_ops->fw_version_str(base_vha, fw_str, sizeof(fw_str))); in qla2x00_probe_one()
2879 qlt_add_target(ha, base_vha); in qla2x00_probe_one()
2885 qla2x00_free_req_que(ha, req); in qla2x00_probe_one()
2886 ha->req_q_map[0] = NULL; in qla2x00_probe_one()
2887 clear_bit(0, ha->req_qid_map); in qla2x00_probe_one()
2888 qla2x00_free_rsp_que(ha, rsp); in qla2x00_probe_one()
2889 ha->rsp_q_map[0] = NULL; in qla2x00_probe_one()
2890 clear_bit(0, ha->rsp_qid_map); in qla2x00_probe_one()
2891 ha->max_req_queues = ha->max_rsp_queues = 0; in qla2x00_probe_one()
2897 if (ha->dpc_thread) { in qla2x00_probe_one()
2898 struct task_struct *t = ha->dpc_thread; in qla2x00_probe_one()
2900 ha->dpc_thread = NULL; in qla2x00_probe_one()
2909 qla2x00_clear_drv_active(ha); in qla2x00_probe_one()
2912 if (IS_P3P_TYPE(ha)) { in qla2x00_probe_one()
2913 if (!ha->nx_pcibase) in qla2x00_probe_one()
2914 iounmap((device_reg_t *)ha->nx_pcibase); in qla2x00_probe_one()
2916 iounmap((device_reg_t *)ha->nxdb_wr_ptr); in qla2x00_probe_one()
2918 if (ha->iobase) in qla2x00_probe_one()
2919 iounmap(ha->iobase); in qla2x00_probe_one()
2920 if (ha->cregbase) in qla2x00_probe_one()
2921 iounmap(ha->cregbase); in qla2x00_probe_one()
2923 pci_release_selected_regions(ha->pdev, ha->bars); in qla2x00_probe_one()
2924 kfree(ha); in qla2x00_probe_one()
2925 ha = NULL; in qla2x00_probe_one()
2936 struct qla_hw_data *ha; in qla2x00_shutdown() local
2942 ha = vha->hw; in qla2x00_shutdown()
2945 if (IS_QLAFX00(ha)) in qla2x00_shutdown()
2949 if (ha->flags.fce_enabled) { in qla2x00_shutdown()
2951 ha->flags.fce_enabled = 0; in qla2x00_shutdown()
2955 if (ha->eft) in qla2x00_shutdown()
2965 if (ha->interrupts_on) { in qla2x00_shutdown()
2967 ha->isp_ops->disable_intrs(ha); in qla2x00_shutdown()
2972 qla2x00_free_fw_dump(ha); in qla2x00_shutdown()
2980 qla2x00_delete_all_vps(struct qla_hw_data *ha, scsi_qla_host_t *base_vha) in qla2x00_delete_all_vps() argument
2986 mutex_lock(&ha->vport_lock); in qla2x00_delete_all_vps()
2987 while (ha->cur_vport_count) { in qla2x00_delete_all_vps()
2988 spin_lock_irqsave(&ha->vport_slock, flags); in qla2x00_delete_all_vps()
2990 BUG_ON(base_vha->list.next == &ha->vp_list); in qla2x00_delete_all_vps()
2995 spin_unlock_irqrestore(&ha->vport_slock, flags); in qla2x00_delete_all_vps()
2996 mutex_unlock(&ha->vport_lock); in qla2x00_delete_all_vps()
3001 mutex_lock(&ha->vport_lock); in qla2x00_delete_all_vps()
3003 mutex_unlock(&ha->vport_lock); in qla2x00_delete_all_vps()
3008 qla2x00_destroy_deferred_work(struct qla_hw_data *ha) in qla2x00_destroy_deferred_work() argument
3011 if (ha->wq) { in qla2x00_destroy_deferred_work()
3012 flush_workqueue(ha->wq); in qla2x00_destroy_deferred_work()
3013 destroy_workqueue(ha->wq); in qla2x00_destroy_deferred_work()
3014 ha->wq = NULL; in qla2x00_destroy_deferred_work()
3018 if (ha->dpc_lp_wq) { in qla2x00_destroy_deferred_work()
3019 cancel_work_sync(&ha->idc_aen); in qla2x00_destroy_deferred_work()
3020 destroy_workqueue(ha->dpc_lp_wq); in qla2x00_destroy_deferred_work()
3021 ha->dpc_lp_wq = NULL; in qla2x00_destroy_deferred_work()
3024 if (ha->dpc_hp_wq) { in qla2x00_destroy_deferred_work()
3025 cancel_work_sync(&ha->nic_core_reset); in qla2x00_destroy_deferred_work()
3026 cancel_work_sync(&ha->idc_state_handler); in qla2x00_destroy_deferred_work()
3027 cancel_work_sync(&ha->nic_core_unrecoverable); in qla2x00_destroy_deferred_work()
3028 destroy_workqueue(ha->dpc_hp_wq); in qla2x00_destroy_deferred_work()
3029 ha->dpc_hp_wq = NULL; in qla2x00_destroy_deferred_work()
3033 if (ha->dpc_thread) { in qla2x00_destroy_deferred_work()
3034 struct task_struct *t = ha->dpc_thread; in qla2x00_destroy_deferred_work()
3040 ha->dpc_thread = NULL; in qla2x00_destroy_deferred_work()
3046 qla2x00_unmap_iobases(struct qla_hw_data *ha) in qla2x00_unmap_iobases() argument
3048 if (IS_QLA82XX(ha)) { in qla2x00_unmap_iobases()
3050 iounmap((device_reg_t *)ha->nx_pcibase); in qla2x00_unmap_iobases()
3052 iounmap((device_reg_t *)ha->nxdb_wr_ptr); in qla2x00_unmap_iobases()
3054 if (ha->iobase) in qla2x00_unmap_iobases()
3055 iounmap(ha->iobase); in qla2x00_unmap_iobases()
3057 if (ha->cregbase) in qla2x00_unmap_iobases()
3058 iounmap(ha->cregbase); in qla2x00_unmap_iobases()
3060 if (ha->mqiobase) in qla2x00_unmap_iobases()
3061 iounmap(ha->mqiobase); in qla2x00_unmap_iobases()
3063 if ((IS_QLA83XX(ha) || IS_QLA27XX(ha)) && ha->msixbase) in qla2x00_unmap_iobases()
3064 iounmap(ha->msixbase); in qla2x00_unmap_iobases()
3069 qla2x00_clear_drv_active(struct qla_hw_data *ha) in qla2x00_clear_drv_active() argument
3071 if (IS_QLA8044(ha)) { in qla2x00_clear_drv_active()
3072 qla8044_idc_lock(ha); in qla2x00_clear_drv_active()
3073 qla8044_clear_drv_active(ha); in qla2x00_clear_drv_active()
3074 qla8044_idc_unlock(ha); in qla2x00_clear_drv_active()
3075 } else if (IS_QLA82XX(ha)) { in qla2x00_clear_drv_active()
3076 qla82xx_idc_lock(ha); in qla2x00_clear_drv_active()
3077 qla82xx_clear_drv_active(ha); in qla2x00_clear_drv_active()
3078 qla82xx_idc_unlock(ha); in qla2x00_clear_drv_active()
3086 struct qla_hw_data *ha; in qla2x00_remove_one() local
3089 ha = base_vha->hw; in qla2x00_remove_one()
3094 cancel_work_sync(&ha->board_disable); in qla2x00_remove_one()
3103 kfree(ha); in qla2x00_remove_one()
3112 if (IS_QLAFX00(ha)) in qla2x00_remove_one()
3115 qla2x00_delete_all_vps(ha, base_vha); in qla2x00_remove_one()
3117 if (IS_QLA8031(ha)) { in qla2x00_remove_one()
3132 if (IS_QLA2031(ha)) in qla2x00_remove_one()
3141 qla2x00_destroy_deferred_work(ha); in qla2x00_remove_one()
3143 qlt_remove_target(ha, base_vha); in qla2x00_remove_one()
3153 qla2x00_clear_drv_active(ha); in qla2x00_remove_one()
3157 qla2x00_unmap_iobases(ha); in qla2x00_remove_one()
3159 pci_release_selected_regions(ha->pdev, ha->bars); in qla2x00_remove_one()
3160 kfree(ha); in qla2x00_remove_one()
3161 ha = NULL; in qla2x00_remove_one()
3171 struct qla_hw_data *ha = vha->hw; in qla2x00_free_device() local
3181 if (ha->flags.fce_enabled) in qla2x00_free_device()
3184 if (ha->eft) in qla2x00_free_device()
3193 if (ha->interrupts_on) { in qla2x00_free_device()
3195 ha->isp_ops->disable_intrs(ha); in qla2x00_free_device()
3202 qla2x00_mem_free(ha); in qla2x00_free_device()
3206 qla2x00_free_queues(ha); in qla2x00_free_device()
3339 qla2x00_mem_alloc(struct qla_hw_data *ha, uint16_t req_len, uint16_t rsp_len, in qla2x00_mem_alloc() argument
3344 ha->init_cb = dma_alloc_coherent(&ha->pdev->dev, ha->init_cb_size, in qla2x00_mem_alloc()
3345 &ha->init_cb_dma, GFP_KERNEL); in qla2x00_mem_alloc()
3346 if (!ha->init_cb) in qla2x00_mem_alloc()
3349 if (qlt_mem_alloc(ha) < 0) in qla2x00_mem_alloc()
3352 ha->gid_list = dma_alloc_coherent(&ha->pdev->dev, in qla2x00_mem_alloc()
3353 qla2x00_gid_list_size(ha), &ha->gid_list_dma, GFP_KERNEL); in qla2x00_mem_alloc()
3354 if (!ha->gid_list) in qla2x00_mem_alloc()
3357 ha->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep); in qla2x00_mem_alloc()
3358 if (!ha->srb_mempool) in qla2x00_mem_alloc()
3361 if (IS_P3P_TYPE(ha)) { in qla2x00_mem_alloc()
3370 ha->ctx_mempool = mempool_create_slab_pool(SRB_MIN_REQ, in qla2x00_mem_alloc()
3372 if (!ha->ctx_mempool) in qla2x00_mem_alloc()
3374 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0021, in qla2x00_mem_alloc()
3376 ctx_cachep, ha->ctx_mempool); in qla2x00_mem_alloc()
3380 ha->nvram = kzalloc(MAX_NVRAM_SIZE, GFP_KERNEL); in qla2x00_mem_alloc()
3381 if (!ha->nvram) in qla2x00_mem_alloc()
3385 ha->pdev->device); in qla2x00_mem_alloc()
3386 ha->s_dma_pool = dma_pool_create(name, &ha->pdev->dev, in qla2x00_mem_alloc()
3388 if (!ha->s_dma_pool) in qla2x00_mem_alloc()
3391 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0022, in qla2x00_mem_alloc()
3393 ha->init_cb, ha->gid_list, ha->srb_mempool, ha->s_dma_pool); in qla2x00_mem_alloc()
3395 if (IS_P3P_TYPE(ha) || ql2xenabledif) { in qla2x00_mem_alloc()
3396 ha->dl_dma_pool = dma_pool_create(name, &ha->pdev->dev, in qla2x00_mem_alloc()
3398 if (!ha->dl_dma_pool) { in qla2x00_mem_alloc()
3399 ql_log_pci(ql_log_fatal, ha->pdev, 0x0023, in qla2x00_mem_alloc()
3404 ha->fcp_cmnd_dma_pool = dma_pool_create(name, &ha->pdev->dev, in qla2x00_mem_alloc()
3406 if (!ha->fcp_cmnd_dma_pool) { in qla2x00_mem_alloc()
3407 ql_log_pci(ql_log_fatal, ha->pdev, 0x0024, in qla2x00_mem_alloc()
3411 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0025, in qla2x00_mem_alloc()
3413 ha->dl_dma_pool, ha->fcp_cmnd_dma_pool); in qla2x00_mem_alloc()
3417 if (IS_QLA2100(ha) || IS_QLA2200(ha)) { in qla2x00_mem_alloc()
3419 ha->sns_cmd = dma_alloc_coherent(&ha->pdev->dev, in qla2x00_mem_alloc()
3420 sizeof(struct sns_cmd_pkt), &ha->sns_cmd_dma, GFP_KERNEL); in qla2x00_mem_alloc()
3421 if (!ha->sns_cmd) in qla2x00_mem_alloc()
3423 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0026, in qla2x00_mem_alloc()
3424 "sns_cmd: %p.\n", ha->sns_cmd); in qla2x00_mem_alloc()
3427 ha->ms_iocb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, in qla2x00_mem_alloc()
3428 &ha->ms_iocb_dma); in qla2x00_mem_alloc()
3429 if (!ha->ms_iocb) in qla2x00_mem_alloc()
3432 ha->ct_sns = dma_alloc_coherent(&ha->pdev->dev, in qla2x00_mem_alloc()
3433 sizeof(struct ct_sns_pkt), &ha->ct_sns_dma, GFP_KERNEL); in qla2x00_mem_alloc()
3434 if (!ha->ct_sns) in qla2x00_mem_alloc()
3436 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0027, in qla2x00_mem_alloc()
3438 ha->ms_iocb, ha->ct_sns); in qla2x00_mem_alloc()
3444 ql_log_pci(ql_log_fatal, ha->pdev, 0x0028, in qla2x00_mem_alloc()
3449 (*req)->ring = dma_alloc_coherent(&ha->pdev->dev, in qla2x00_mem_alloc()
3453 ql_log_pci(ql_log_fatal, ha->pdev, 0x0029, in qla2x00_mem_alloc()
3460 ql_log_pci(ql_log_fatal, ha->pdev, 0x002a, in qla2x00_mem_alloc()
3464 (*rsp)->hw = ha; in qla2x00_mem_alloc()
3466 (*rsp)->ring = dma_alloc_coherent(&ha->pdev->dev, in qla2x00_mem_alloc()
3470 ql_log_pci(ql_log_fatal, ha->pdev, 0x002b, in qla2x00_mem_alloc()
3476 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002c, in qla2x00_mem_alloc()
3482 if (ha->nvram_npiv_size) { in qla2x00_mem_alloc()
3483 ha->npiv_info = kzalloc(sizeof(struct qla_npiv_entry) * in qla2x00_mem_alloc()
3484 ha->nvram_npiv_size, GFP_KERNEL); in qla2x00_mem_alloc()
3485 if (!ha->npiv_info) { in qla2x00_mem_alloc()
3486 ql_log_pci(ql_log_fatal, ha->pdev, 0x002d, in qla2x00_mem_alloc()
3491 ha->npiv_info = NULL; in qla2x00_mem_alloc()
3494 if (IS_CNA_CAPABLE(ha) || IS_QLA2031(ha) || IS_QLA27XX(ha)) { in qla2x00_mem_alloc()
3495 ha->ex_init_cb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, in qla2x00_mem_alloc()
3496 &ha->ex_init_cb_dma); in qla2x00_mem_alloc()
3497 if (!ha->ex_init_cb) in qla2x00_mem_alloc()
3499 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002e, in qla2x00_mem_alloc()
3500 "ex_init_cb=%p.\n", ha->ex_init_cb); in qla2x00_mem_alloc()
3503 INIT_LIST_HEAD(&ha->gbl_dsd_list); in qla2x00_mem_alloc()
3506 if (!IS_FWI2_CAPABLE(ha)) { in qla2x00_mem_alloc()
3507 ha->async_pd = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, in qla2x00_mem_alloc()
3508 &ha->async_pd_dma); in qla2x00_mem_alloc()
3509 if (!ha->async_pd) in qla2x00_mem_alloc()
3511 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002f, in qla2x00_mem_alloc()
3512 "async_pd=%p.\n", ha->async_pd); in qla2x00_mem_alloc()
3515 INIT_LIST_HEAD(&ha->vp_list); in qla2x00_mem_alloc()
3518 ha->loop_id_map = kzalloc(BITS_TO_LONGS(LOOPID_MAP_SIZE) * sizeof(long), in qla2x00_mem_alloc()
3520 if (!ha->loop_id_map) in qla2x00_mem_alloc()
3523 qla2x00_set_reserved_loop_ids(ha); in qla2x00_mem_alloc()
3524 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0123, in qla2x00_mem_alloc()
3525 "loop_id_map=%p.\n", ha->loop_id_map); in qla2x00_mem_alloc()
3531 dma_pool_free(ha->s_dma_pool, ha->ex_init_cb, ha->ex_init_cb_dma); in qla2x00_mem_alloc()
3533 kfree(ha->npiv_info); in qla2x00_mem_alloc()
3535 dma_free_coherent(&ha->pdev->dev, ((*rsp)->length + 1) * in qla2x00_mem_alloc()
3542 dma_free_coherent(&ha->pdev->dev, ((*req)->length + 1) * in qla2x00_mem_alloc()
3549 dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt), in qla2x00_mem_alloc()
3550 ha->ct_sns, ha->ct_sns_dma); in qla2x00_mem_alloc()
3551 ha->ct_sns = NULL; in qla2x00_mem_alloc()
3552 ha->ct_sns_dma = 0; in qla2x00_mem_alloc()
3554 dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma); in qla2x00_mem_alloc()
3555 ha->ms_iocb = NULL; in qla2x00_mem_alloc()
3556 ha->ms_iocb_dma = 0; in qla2x00_mem_alloc()
3558 if (IS_QLA82XX(ha) || ql2xenabledif) { in qla2x00_mem_alloc()
3559 dma_pool_destroy(ha->fcp_cmnd_dma_pool); in qla2x00_mem_alloc()
3560 ha->fcp_cmnd_dma_pool = NULL; in qla2x00_mem_alloc()
3563 if (IS_QLA82XX(ha) || ql2xenabledif) { in qla2x00_mem_alloc()
3564 dma_pool_destroy(ha->dl_dma_pool); in qla2x00_mem_alloc()
3565 ha->dl_dma_pool = NULL; in qla2x00_mem_alloc()
3568 dma_pool_destroy(ha->s_dma_pool); in qla2x00_mem_alloc()
3569 ha->s_dma_pool = NULL; in qla2x00_mem_alloc()
3571 kfree(ha->nvram); in qla2x00_mem_alloc()
3572 ha->nvram = NULL; in qla2x00_mem_alloc()
3574 mempool_destroy(ha->ctx_mempool); in qla2x00_mem_alloc()
3575 ha->ctx_mempool = NULL; in qla2x00_mem_alloc()
3577 mempool_destroy(ha->srb_mempool); in qla2x00_mem_alloc()
3578 ha->srb_mempool = NULL; in qla2x00_mem_alloc()
3580 dma_free_coherent(&ha->pdev->dev, qla2x00_gid_list_size(ha), in qla2x00_mem_alloc()
3581 ha->gid_list, in qla2x00_mem_alloc()
3582 ha->gid_list_dma); in qla2x00_mem_alloc()
3583 ha->gid_list = NULL; in qla2x00_mem_alloc()
3584 ha->gid_list_dma = 0; in qla2x00_mem_alloc()
3586 qlt_mem_free(ha); in qla2x00_mem_alloc()
3588 dma_free_coherent(&ha->pdev->dev, ha->init_cb_size, ha->init_cb, in qla2x00_mem_alloc()
3589 ha->init_cb_dma); in qla2x00_mem_alloc()
3590 ha->init_cb = NULL; in qla2x00_mem_alloc()
3591 ha->init_cb_dma = 0; in qla2x00_mem_alloc()
3606 qla2x00_free_fw_dump(struct qla_hw_data *ha) in qla2x00_free_fw_dump() argument
3608 if (ha->fce) in qla2x00_free_fw_dump()
3609 dma_free_coherent(&ha->pdev->dev, in qla2x00_free_fw_dump()
3610 FCE_SIZE, ha->fce, ha->fce_dma); in qla2x00_free_fw_dump()
3612 if (ha->eft) in qla2x00_free_fw_dump()
3613 dma_free_coherent(&ha->pdev->dev, in qla2x00_free_fw_dump()
3614 EFT_SIZE, ha->eft, ha->eft_dma); in qla2x00_free_fw_dump()
3616 if (ha->fw_dump) in qla2x00_free_fw_dump()
3617 vfree(ha->fw_dump); in qla2x00_free_fw_dump()
3618 if (ha->fw_dump_template) in qla2x00_free_fw_dump()
3619 vfree(ha->fw_dump_template); in qla2x00_free_fw_dump()
3621 ha->fce = NULL; in qla2x00_free_fw_dump()
3622 ha->fce_dma = 0; in qla2x00_free_fw_dump()
3623 ha->eft = NULL; in qla2x00_free_fw_dump()
3624 ha->eft_dma = 0; in qla2x00_free_fw_dump()
3625 ha->fw_dumped = 0; in qla2x00_free_fw_dump()
3626 ha->fw_dump_cap_flags = 0; in qla2x00_free_fw_dump()
3627 ha->fw_dump_reading = 0; in qla2x00_free_fw_dump()
3628 ha->fw_dump = NULL; in qla2x00_free_fw_dump()
3629 ha->fw_dump_len = 0; in qla2x00_free_fw_dump()
3630 ha->fw_dump_template = NULL; in qla2x00_free_fw_dump()
3631 ha->fw_dump_template_len = 0; in qla2x00_free_fw_dump()
3642 qla2x00_mem_free(struct qla_hw_data *ha) in qla2x00_mem_free() argument
3644 qla2x00_free_fw_dump(ha); in qla2x00_mem_free()
3646 if (ha->mctp_dump) in qla2x00_mem_free()
3647 dma_free_coherent(&ha->pdev->dev, MCTP_DUMP_SIZE, ha->mctp_dump, in qla2x00_mem_free()
3648 ha->mctp_dump_dma); in qla2x00_mem_free()
3650 if (ha->srb_mempool) in qla2x00_mem_free()
3651 mempool_destroy(ha->srb_mempool); in qla2x00_mem_free()
3653 if (ha->dcbx_tlv) in qla2x00_mem_free()
3654 dma_free_coherent(&ha->pdev->dev, DCBX_TLV_DATA_SIZE, in qla2x00_mem_free()
3655 ha->dcbx_tlv, ha->dcbx_tlv_dma); in qla2x00_mem_free()
3657 if (ha->xgmac_data) in qla2x00_mem_free()
3658 dma_free_coherent(&ha->pdev->dev, XGMAC_DATA_SIZE, in qla2x00_mem_free()
3659 ha->xgmac_data, ha->xgmac_data_dma); in qla2x00_mem_free()
3661 if (ha->sns_cmd) in qla2x00_mem_free()
3662 dma_free_coherent(&ha->pdev->dev, sizeof(struct sns_cmd_pkt), in qla2x00_mem_free()
3663 ha->sns_cmd, ha->sns_cmd_dma); in qla2x00_mem_free()
3665 if (ha->ct_sns) in qla2x00_mem_free()
3666 dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt), in qla2x00_mem_free()
3667 ha->ct_sns, ha->ct_sns_dma); in qla2x00_mem_free()
3669 if (ha->sfp_data) in qla2x00_mem_free()
3670 dma_pool_free(ha->s_dma_pool, ha->sfp_data, ha->sfp_data_dma); in qla2x00_mem_free()
3672 if (ha->ms_iocb) in qla2x00_mem_free()
3673 dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma); in qla2x00_mem_free()
3675 if (ha->ex_init_cb) in qla2x00_mem_free()
3676 dma_pool_free(ha->s_dma_pool, in qla2x00_mem_free()
3677 ha->ex_init_cb, ha->ex_init_cb_dma); in qla2x00_mem_free()
3679 if (ha->async_pd) in qla2x00_mem_free()
3680 dma_pool_free(ha->s_dma_pool, ha->async_pd, ha->async_pd_dma); in qla2x00_mem_free()
3682 if (ha->s_dma_pool) in qla2x00_mem_free()
3683 dma_pool_destroy(ha->s_dma_pool); in qla2x00_mem_free()
3685 if (ha->gid_list) in qla2x00_mem_free()
3686 dma_free_coherent(&ha->pdev->dev, qla2x00_gid_list_size(ha), in qla2x00_mem_free()
3687 ha->gid_list, ha->gid_list_dma); in qla2x00_mem_free()
3689 if (IS_QLA82XX(ha)) { in qla2x00_mem_free()
3690 if (!list_empty(&ha->gbl_dsd_list)) { in qla2x00_mem_free()
3695 tdsd_ptr, &ha->gbl_dsd_list, list) { in qla2x00_mem_free()
3696 dma_pool_free(ha->dl_dma_pool, in qla2x00_mem_free()
3704 if (ha->dl_dma_pool) in qla2x00_mem_free()
3705 dma_pool_destroy(ha->dl_dma_pool); in qla2x00_mem_free()
3707 if (ha->fcp_cmnd_dma_pool) in qla2x00_mem_free()
3708 dma_pool_destroy(ha->fcp_cmnd_dma_pool); in qla2x00_mem_free()
3710 if (ha->ctx_mempool) in qla2x00_mem_free()
3711 mempool_destroy(ha->ctx_mempool); in qla2x00_mem_free()
3713 qlt_mem_free(ha); in qla2x00_mem_free()
3715 if (ha->init_cb) in qla2x00_mem_free()
3716 dma_free_coherent(&ha->pdev->dev, ha->init_cb_size, in qla2x00_mem_free()
3717 ha->init_cb, ha->init_cb_dma); in qla2x00_mem_free()
3718 vfree(ha->optrom_buffer); in qla2x00_mem_free()
3719 kfree(ha->nvram); in qla2x00_mem_free()
3720 kfree(ha->npiv_info); in qla2x00_mem_free()
3721 kfree(ha->swl); in qla2x00_mem_free()
3722 kfree(ha->loop_id_map); in qla2x00_mem_free()
3724 ha->srb_mempool = NULL; in qla2x00_mem_free()
3725 ha->ctx_mempool = NULL; in qla2x00_mem_free()
3726 ha->sns_cmd = NULL; in qla2x00_mem_free()
3727 ha->sns_cmd_dma = 0; in qla2x00_mem_free()
3728 ha->ct_sns = NULL; in qla2x00_mem_free()
3729 ha->ct_sns_dma = 0; in qla2x00_mem_free()
3730 ha->ms_iocb = NULL; in qla2x00_mem_free()
3731 ha->ms_iocb_dma = 0; in qla2x00_mem_free()
3732 ha->init_cb = NULL; in qla2x00_mem_free()
3733 ha->init_cb_dma = 0; in qla2x00_mem_free()
3734 ha->ex_init_cb = NULL; in qla2x00_mem_free()
3735 ha->ex_init_cb_dma = 0; in qla2x00_mem_free()
3736 ha->async_pd = NULL; in qla2x00_mem_free()
3737 ha->async_pd_dma = 0; in qla2x00_mem_free()
3739 ha->s_dma_pool = NULL; in qla2x00_mem_free()
3740 ha->dl_dma_pool = NULL; in qla2x00_mem_free()
3741 ha->fcp_cmnd_dma_pool = NULL; in qla2x00_mem_free()
3743 ha->gid_list = NULL; in qla2x00_mem_free()
3744 ha->gid_list_dma = 0; in qla2x00_mem_free()
3746 ha->tgt.atio_ring = NULL; in qla2x00_mem_free()
3747 ha->tgt.atio_dma = 0; in qla2x00_mem_free()
3748 ha->tgt.tgt_vp_map = NULL; in qla2x00_mem_free()
3752 struct qla_hw_data *ha) in qla2x00_create_host() argument
3759 ql_log_pci(ql_log_fatal, ha->pdev, 0x0107, in qla2x00_create_host()
3770 vha->hw = ha; in qla2x00_create_host()
3785 dev_name(&(ha->pdev->dev))); in qla2x00_create_host()
3997 struct qla_hw_data *ha = vha->hw; in qla2x00_relogin() local
4010 ha->isp_ops->fabric_logout(vha, in qla2x00_relogin()
4018 ha->min_external_loopid; in qla2x00_relogin()
4027 if (IS_ALOGIO_CAPABLE(ha)) { in qla2x00_relogin()
4090 struct qla_hw_data *ha = base_vha->hw; in qla83xx_schedule_work() local
4094 if (ha->dpc_lp_wq) in qla83xx_schedule_work()
4095 queue_work(ha->dpc_lp_wq, &ha->idc_aen); in qla83xx_schedule_work()
4099 if (!ha->flags.nic_core_reset_hdlr_active) { in qla83xx_schedule_work()
4100 if (ha->dpc_hp_wq) in qla83xx_schedule_work()
4101 queue_work(ha->dpc_hp_wq, &ha->nic_core_reset); in qla83xx_schedule_work()
4108 if (ha->dpc_hp_wq) in qla83xx_schedule_work()
4109 queue_work(ha->dpc_hp_wq, &ha->idc_state_handler); in qla83xx_schedule_work()
4112 if (ha->dpc_hp_wq) in qla83xx_schedule_work()
4113 queue_work(ha->dpc_hp_wq, &ha->nic_core_unrecoverable); in qla83xx_schedule_work()
4127 struct qla_hw_data *ha = in qla83xx_nic_core_unrecoverable_work() local
4129 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev); in qla83xx_nic_core_unrecoverable_work()
4135 if (ha->flags.nic_core_reset_owner) { in qla83xx_nic_core_unrecoverable_work()
4136 ha->flags.nic_core_reset_owner = 0; in qla83xx_nic_core_unrecoverable_work()
4149 struct qla_hw_data *ha = in qla83xx_idc_state_handler_work() local
4151 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev); in qla83xx_idc_state_handler_work()
4195 struct qla_hw_data *ha = in qla83xx_nic_core_reset_work() local
4197 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev); in qla83xx_nic_core_reset_work()
4200 if (IS_QLA2031(ha)) { in qla83xx_nic_core_reset_work()
4207 if (!ha->flags.nic_core_reset_hdlr_active) { in qla83xx_nic_core_reset_work()
4220 ha->flags.nic_core_reset_hdlr_active = 1; in qla83xx_nic_core_reset_work()
4226 ha->flags.nic_core_reset_hdlr_active = 0; in qla83xx_nic_core_reset_work()
4234 struct qla_hw_data *ha = in qla83xx_service_idc_aen() local
4236 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev); in qla83xx_service_idc_aen()
4287 struct qla_hw_data *ha = base_vha->hw; in qla83xx_force_lock_recovery() local
4298 data = (IDC_LOCK_RECOVERY_STAGE1) | (ha->portnum << 2); in qla83xx_force_lock_recovery()
4311 if (((data & idc_lck_rcvry_owner_mask) >> 2) == ha->portnum) { in qla83xx_force_lock_recovery()
4382 struct qla_hw_data *ha = base_vha->hw; in qla83xx_idc_lock() local
4391 ha->portnum); in qla83xx_idc_lock()
4435 struct qla_hw_data *ha = base_vha->hw; in qla83xx_idc_unlock() local
4444 if (data == ha->portnum) { in qla83xx_idc_unlock()
4490 struct qla_hw_data *ha = vha->hw; in __qla83xx_set_drv_presence() local
4495 drv_presence |= (1 << ha->portnum); in __qla83xx_set_drv_presence()
4519 struct qla_hw_data *ha = vha->hw; in __qla83xx_clear_drv_presence() local
4524 drv_presence &= ~(1 << ha->portnum); in __qla83xx_clear_drv_presence()
4547 struct qla_hw_data *ha = vha->hw; in qla83xx_need_reset_handler() local
4552 ack_timeout = jiffies + (ha->fcoe_reset_timeout * HZ); in qla83xx_need_reset_handler()
4620 struct qla_hw_data *ha = base_vha->hw; in qla83xx_idc_state_handler() local
4626 dev_init_timeout = jiffies + (ha->fcoe_dev_init_timeout * HZ); in qla83xx_idc_state_handler()
4645 if (ha->flags.nic_core_reset_owner) in qla83xx_idc_state_handler()
4648 ha->flags.nic_core_reset_owner = 0; in qla83xx_idc_state_handler()
4651 ha->portnum); in qla83xx_idc_state_handler()
4654 if (ha->flags.nic_core_reset_owner) in qla83xx_idc_state_handler()
4670 if (!ql2xdontresethba && ha->flags.nic_core_reset_owner) in qla83xx_idc_state_handler()
4680 (ha->fcoe_dev_init_timeout * HZ); in qla83xx_idc_state_handler()
4690 if (ha->flags.quiesce_owner) in qla83xx_idc_state_handler()
4697 (ha->fcoe_dev_init_timeout * HZ); in qla83xx_idc_state_handler()
4700 if (ha->flags.nic_core_reset_owner) in qla83xx_idc_state_handler()
4703 ha->flags.nic_core_reset_owner = 0; in qla83xx_idc_state_handler()
4733 struct qla_hw_data *ha = container_of(work, struct qla_hw_data, in qla2x00_disable_board_on_pci_error() local
4735 struct pci_dev *pdev = ha->pdev; in qla2x00_disable_board_on_pci_error()
4736 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev); in qla2x00_disable_board_on_pci_error()
4743 qla2x00_delete_all_vps(ha, base_vha); in qla2x00_disable_board_on_pci_error()
4756 qla2x00_destroy_deferred_work(ha); in qla2x00_disable_board_on_pci_error()
4772 qla2x00_mem_free(ha); in qla2x00_disable_board_on_pci_error()
4774 qla2x00_free_queues(ha); in qla2x00_disable_board_on_pci_error()
4776 qla2x00_unmap_iobases(ha); in qla2x00_disable_board_on_pci_error()
4778 pci_release_selected_regions(ha->pdev, ha->bars); in qla2x00_disable_board_on_pci_error()
4805 struct qla_hw_data *ha; in qla2x00_do_dpc() local
4807 ha = (struct qla_hw_data *)data; in qla2x00_do_dpc()
4808 base_vha = pci_get_drvdata(ha->pdev); in qla2x00_do_dpc()
4819 if (!base_vha->flags.init_done || ha->flags.mbox_busy) in qla2x00_do_dpc()
4822 if (ha->flags.eeh_busy) { in qla2x00_do_dpc()
4824 "eeh_busy=%d.\n", ha->flags.eeh_busy); in qla2x00_do_dpc()
4828 ha->dpc_active = 1; in qla2x00_do_dpc()
4836 if (IS_P3P_TYPE(ha)) { in qla2x00_do_dpc()
4837 if (IS_QLA8044(ha)) { in qla2x00_do_dpc()
4840 qla8044_idc_lock(ha); in qla2x00_do_dpc()
4844 qla8044_idc_unlock(ha); in qla2x00_do_dpc()
4854 qla82xx_idc_lock(ha); in qla2x00_do_dpc()
4855 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE, in qla2x00_do_dpc()
4857 qla82xx_idc_unlock(ha); in qla2x00_do_dpc()
4886 } else if (IS_QLAFX00(ha)) { in qla2x00_do_dpc()
4937 if (ha->isp_ops->abort_isp(base_vha)) { in qla2x00_do_dpc()
4965 if (IS_QLAFX00(ha)) in qla2x00_do_dpc()
4971 if (IS_P3P_TYPE(ha)) { in qla2x00_do_dpc()
4972 if (IS_QLA82XX(ha)) in qla2x00_do_dpc()
4974 if (IS_QLA8044(ha)) in qla2x00_do_dpc()
4978 if (!ha->flags.quiesce_owner) { in qla2x00_do_dpc()
4980 if (IS_QLA82XX(ha)) { in qla2x00_do_dpc()
4981 qla82xx_idc_lock(ha); in qla2x00_do_dpc()
4984 qla82xx_idc_unlock(ha); in qla2x00_do_dpc()
4985 } else if (IS_QLA8044(ha)) { in qla2x00_do_dpc()
4986 qla8044_idc_lock(ha); in qla2x00_do_dpc()
4989 qla8044_idc_unlock(ha); in qla2x00_do_dpc()
5045 if (IS_QLAFX00(ha)) in qla2x00_do_dpc()
5055 if (!ha->interrupts_on) in qla2x00_do_dpc()
5056 ha->isp_ops->enable_intrs(ha); in qla2x00_do_dpc()
5060 if (ha->beacon_blink_led == 1) in qla2x00_do_dpc()
5061 ha->isp_ops->beacon_blink(base_vha); in qla2x00_do_dpc()
5064 if (!IS_QLAFX00(ha)) in qla2x00_do_dpc()
5067 ha->dpc_active = 0; in qla2x00_do_dpc()
5079 ha->dpc_active = 0; in qla2x00_do_dpc()
5090 struct qla_hw_data *ha = vha->hw; in qla2xxx_wake_dpc() local
5091 struct task_struct *t = ha->dpc_thread; in qla2xxx_wake_dpc()
5139 struct qla_hw_data *ha = vha->hw; in qla2x00_timer() local
5142 if (ha->flags.eeh_busy) { in qla2x00_timer()
5145 ha->flags.eeh_busy); in qla2x00_timer()
5154 if (!pci_channel_offline(ha->pdev)) { in qla2x00_timer()
5155 pci_read_config_word(ha->pdev, PCI_VENDOR_ID, &w); in qla2x00_timer()
5160 if (!vha->vp_idx && IS_P3P_TYPE(ha)) { in qla2x00_timer()
5163 if (IS_QLA82XX(ha)) in qla2x00_timer()
5165 else if (IS_QLA8044(ha)) in qla2x00_timer()
5169 if (!vha->vp_idx && IS_QLAFX00(ha)) in qla2x00_timer()
5184 if (!IS_QLA2100(ha) && vha->link_down_timeout) in qla2x00_timer()
5193 spin_lock_irqsave(&ha->hardware_lock, in qla2x00_timer()
5195 req = ha->req_q_map[0]; in qla2x00_timer()
5210 if (IS_QLA82XX(ha)) in qla2x00_timer()
5218 spin_unlock_irqrestore(&ha->hardware_lock, in qla2x00_timer()
5230 if (IS_QLA82XX(ha)) in qla2x00_timer()
5243 if (!vha->vp_idx && (ha->beacon_blink_led == 1)) { in qla2x00_timer()
5245 if (!IS_P3P_TYPE(ha)) { in qla2x00_timer()
5337 struct qla_hw_data *ha = vha->hw; in qla2x00_request_firmware() local
5340 if (IS_QLA2100(ha)) { in qla2x00_request_firmware()
5342 } else if (IS_QLA2200(ha)) { in qla2x00_request_firmware()
5344 } else if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) { in qla2x00_request_firmware()
5346 } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) { in qla2x00_request_firmware()
5348 } else if (IS_QLA24XX_TYPE(ha)) { in qla2x00_request_firmware()
5350 } else if (IS_QLA25XX(ha)) { in qla2x00_request_firmware()
5352 } else if (IS_QLA81XX(ha)) { in qla2x00_request_firmware()
5354 } else if (IS_QLA82XX(ha)) { in qla2x00_request_firmware()
5356 } else if (IS_QLA2031(ha)) { in qla2x00_request_firmware()
5358 } else if (IS_QLA8031(ha)) { in qla2x00_request_firmware()
5360 } else if (IS_QLA27XX(ha)) { in qla2x00_request_firmware()
5370 if (request_firmware(&blob->fw, blob->name, &ha->pdev->dev)) { in qla2x00_request_firmware()
5398 struct qla_hw_data *ha = vha->hw; in qla2xxx_pci_error_detected() local
5405 ha->flags.eeh_busy = 0; in qla2xxx_pci_error_detected()
5408 ha->flags.eeh_busy = 1; in qla2xxx_pci_error_detected()
5410 if (IS_QLA82XX(ha)) { in qla2xxx_pci_error_detected()
5411 ha->flags.isp82xx_fw_hung = 1; in qla2xxx_pci_error_detected()
5421 ha->flags.pci_channel_io_perm_failure = 1; in qla2xxx_pci_error_detected()
5435 struct qla_hw_data *ha = base_vha->hw; in qla2xxx_pci_mmio_enabled() local
5436 struct device_reg_2xxx __iomem *reg = &ha->iobase->isp; in qla2xxx_pci_mmio_enabled()
5437 struct device_reg_24xx __iomem *reg24 = &ha->iobase->isp24; in qla2xxx_pci_mmio_enabled()
5439 if (IS_QLA82XX(ha)) in qla2xxx_pci_mmio_enabled()
5442 spin_lock_irqsave(&ha->hardware_lock, flags); in qla2xxx_pci_mmio_enabled()
5443 if (IS_QLA2100(ha) || IS_QLA2200(ha)){ in qla2xxx_pci_mmio_enabled()
5447 } else if (IS_QLA23XX(ha)) { in qla2xxx_pci_mmio_enabled()
5451 } else if (IS_FWI2_CAPABLE(ha)) { in qla2xxx_pci_mmio_enabled()
5456 spin_unlock_irqrestore(&ha->hardware_lock, flags); in qla2xxx_pci_mmio_enabled()
5461 ha->isp_ops->fw_dump(base_vha, 0); in qla2xxx_pci_mmio_enabled()
5473 struct qla_hw_data *ha = base_vha->hw; in qla82xx_error_recovery() local
5489 fn = PCI_FUNC(ha->pdev->devfn); in qla82xx_error_recovery()
5495 pci_get_domain_bus_and_slot(pci_domain_nr(ha->pdev->bus), in qla82xx_error_recovery()
5496 ha->pdev->bus->number, PCI_DEVFN(PCI_SLOT(ha->pdev->devfn), in qla82xx_error_recovery()
5515 ha->pdev->devfn); in qla82xx_error_recovery()
5516 qla82xx_idc_lock(ha); in qla82xx_error_recovery()
5518 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE, in qla82xx_error_recovery()
5521 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_IDC_VERSION, in qla82xx_error_recovery()
5524 drv_active = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_ACTIVE); in qla82xx_error_recovery()
5528 qla82xx_idc_unlock(ha); in qla82xx_error_recovery()
5536 qla82xx_idc_lock(ha); in qla82xx_error_recovery()
5541 qla82xx_clear_drv_active(ha); in qla82xx_error_recovery()
5542 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE, in qla82xx_error_recovery()
5547 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE, in qla82xx_error_recovery()
5549 qla82xx_idc_unlock(ha); in qla82xx_error_recovery()
5550 ha->flags.isp82xx_fw_hung = 0; in qla82xx_error_recovery()
5552 qla82xx_idc_lock(ha); in qla82xx_error_recovery()
5554 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_STATE, 0); in qla82xx_error_recovery()
5557 qla82xx_idc_unlock(ha); in qla82xx_error_recovery()
5561 ha->pdev->devfn); in qla82xx_error_recovery()
5562 if ((qla82xx_rd_32(ha, QLA82XX_CRB_DEV_STATE) == in qla82xx_error_recovery()
5564 ha->flags.isp82xx_fw_hung = 0; in qla82xx_error_recovery()
5566 qla82xx_idc_lock(ha); in qla82xx_error_recovery()
5568 qla82xx_idc_unlock(ha); in qla82xx_error_recovery()
5581 struct qla_hw_data *ha = base_vha->hw; in qla2xxx_pci_slot_reset() local
5601 if (ha->mem_only) in qla2xxx_pci_slot_reset()
5612 rsp = ha->rsp_q_map[0]; in qla2xxx_pci_slot_reset()
5613 if (qla2x00_request_irqs(ha, rsp)) in qla2xxx_pci_slot_reset()
5616 if (ha->isp_ops->pci_config(base_vha)) in qla2xxx_pci_slot_reset()
5619 if (IS_QLA82XX(ha)) { in qla2xxx_pci_slot_reset()
5627 while (ha->flags.mbox_busy && retries--) in qla2xxx_pci_slot_reset()
5631 if (ha->isp_ops->abort_isp(base_vha) == QLA_SUCCESS) in qla2xxx_pci_slot_reset()
5647 struct qla_hw_data *ha = base_vha->hw; in qla2xxx_pci_resume() local
5661 ha->flags.eeh_busy = 0; in qla2xxx_pci_resume()
5668 struct qla_hw_data *ha = vha->hw; in qla83xx_disable_laser() local
5669 struct device_reg_24xx __iomem *isp_reg = &ha->iobase->isp24; in qla83xx_disable_laser()