Lines Matching refs:ha
48 struct qla_hw_data *ha = vha->hw; in qla2x00_mailbox_command() local
49 scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev); in qla2x00_mailbox_command()
54 if (ha->pdev->error_state > pci_channel_io_frozen) { in qla2x00_mailbox_command()
67 reg = ha->iobase; in qla2x00_mailbox_command()
74 if (ha->flags.pci_channel_io_perm_failure) { in qla2x00_mailbox_command()
80 if (IS_P3P_TYPE(ha) && ha->flags.isp82xx_fw_hung) { in qla2x00_mailbox_command()
84 "FW hung = %d.\n", ha->flags.isp82xx_fw_hung); in qla2x00_mailbox_command()
93 if (!wait_for_completion_timeout(&ha->mbx_cmd_comp, mcp->tov * HZ)) { in qla2x00_mailbox_command()
101 ha->flags.mbox_busy = 1; in qla2x00_mailbox_command()
103 ha->mcp = mcp; in qla2x00_mailbox_command()
108 spin_lock_irqsave(&ha->hardware_lock, flags); in qla2x00_mailbox_command()
111 if (IS_P3P_TYPE(ha)) in qla2x00_mailbox_command()
113 else if (IS_FWI2_CAPABLE(ha) && !(IS_P3P_TYPE(ha))) in qla2x00_mailbox_command()
116 optr = (uint16_t __iomem *)MAILBOX_REG(ha, ®->isp, 0); in qla2x00_mailbox_command()
124 for (cnt = 0; cnt < ha->mbx_count; cnt++) { in qla2x00_mailbox_command()
125 if (IS_QLA2200(ha) && cnt == 8) in qla2x00_mailbox_command()
127 (uint16_t __iomem *)MAILBOX_REG(ha, ®->isp, 8); in qla2x00_mailbox_command()
143 ha->flags.mbox_int = 0; in qla2x00_mailbox_command()
144 clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags); in qla2x00_mailbox_command()
153 if ((!abort_active && io_lock_on) || IS_NOPOLLING_TYPE(ha)) { in qla2x00_mailbox_command()
154 set_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags); in qla2x00_mailbox_command()
156 if (IS_P3P_TYPE(ha)) { in qla2x00_mailbox_command()
159 spin_unlock_irqrestore(&ha->hardware_lock, in qla2x00_mailbox_command()
161 ha->flags.mbox_busy = 0; in qla2x00_mailbox_command()
168 } else if (IS_FWI2_CAPABLE(ha)) in qla2x00_mailbox_command()
172 spin_unlock_irqrestore(&ha->hardware_lock, flags); in qla2x00_mailbox_command()
174 if (!wait_for_completion_timeout(&ha->mbx_intr_comp, in qla2x00_mailbox_command()
178 spin_lock_irqsave(&ha->hardware_lock, flags); in qla2x00_mailbox_command()
179 clear_bit(MBX_INTR_WAIT, &ha->mbx_cmd_flags); in qla2x00_mailbox_command()
180 spin_unlock_irqrestore(&ha->hardware_lock, flags); in qla2x00_mailbox_command()
186 if (IS_P3P_TYPE(ha)) { in qla2x00_mailbox_command()
189 spin_unlock_irqrestore(&ha->hardware_lock, in qla2x00_mailbox_command()
191 ha->flags.mbox_busy = 0; in qla2x00_mailbox_command()
198 } else if (IS_FWI2_CAPABLE(ha)) in qla2x00_mailbox_command()
202 spin_unlock_irqrestore(&ha->hardware_lock, flags); in qla2x00_mailbox_command()
205 while (!ha->flags.mbox_int) { in qla2x00_mailbox_command()
210 qla2x00_poll(ha->rsp_q_map[0]); in qla2x00_mailbox_command()
212 if (!ha->flags.mbox_int && in qla2x00_mailbox_command()
213 !(IS_QLA2200(ha) && in qla2x00_mailbox_command()
223 if (ha->flags.mbox_int) { in qla2x00_mailbox_command()
230 ha->flags.mbox_int = 0; in qla2x00_mailbox_command()
231 clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags); in qla2x00_mailbox_command()
233 if (IS_P3P_TYPE(ha) && ha->flags.isp82xx_fw_hung) { in qla2x00_mailbox_command()
234 ha->flags.mbox_busy = 0; in qla2x00_mailbox_command()
237 ha->mcp = NULL; in qla2x00_mailbox_command()
240 "FW hung = %d.\n", ha->flags.isp82xx_fw_hung); in qla2x00_mailbox_command()
244 if (ha->mailbox_out[0] != MBS_COMMAND_COMPLETE) in qla2x00_mailbox_command()
249 iptr = (uint16_t *)&ha->mailbox_out[0]; in qla2x00_mailbox_command()
254 for (cnt = 0; cnt < ha->mbx_count; cnt++) { in qla2x00_mailbox_command()
270 if (IS_FWI2_CAPABLE(ha)) { in qla2x00_mailbox_command()
274 mb0 = RD_MAILBOX_REG(ha, ®->isp, 0); in qla2x00_mailbox_command()
288 ha->isp_ops->fw_dump(vha, 0); in qla2x00_mailbox_command()
293 ha->flags.mbox_busy = 0; in qla2x00_mailbox_command()
296 ha->mcp = NULL; in qla2x00_mailbox_command()
298 if ((abort_active || !io_lock_on) && !IS_NOPOLLING_TYPE(ha)) { in qla2x00_mailbox_command()
303 qla2x00_poll(ha->rsp_q_map[0]); in qla2x00_mailbox_command()
309 ha->flags.eeh_busy) { in qla2x00_mailbox_command()
317 if (IS_QLA82XX(ha)) { in qla2x00_mailbox_command()
321 qla82xx_wr_32(ha, in qla2x00_mailbox_command()
330 ha->flags.eeh_busy); in qla2x00_mailbox_command()
342 if (IS_QLA82XX(ha)) { in qla2x00_mailbox_command()
346 qla82xx_wr_32(ha, in qla2x00_mailbox_command()
358 complete(&ha->mbx_cmd_comp); in qla2x00_mailbox_command()
359 if (ha->isp_ops->abort_isp(vha)) { in qla2x00_mailbox_command()
374 complete(&ha->mbx_cmd_comp); in qla2x00_mailbox_command()
385 ha->fw_dump_cap_flags, in qla2x00_mailbox_command()
405 struct qla_hw_data *ha = vha->hw; in qla2x00_load_ram() local
412 if (MSW(risc_addr) || IS_FWI2_CAPABLE(ha)) { in qla2x00_load_ram()
426 if (IS_FWI2_CAPABLE(ha)) { in qla2x00_load_ram()
471 struct qla_hw_data *ha = vha->hw; in qla2x00_execute_fw() local
481 if (IS_FWI2_CAPABLE(ha)) { in qla2x00_execute_fw()
485 if (IS_QLA25XX(ha) || IS_QLA81XX(ha) || IS_QLA83XX(ha) || in qla2x00_execute_fw()
486 IS_QLA27XX(ha)) { in qla2x00_execute_fw()
487 struct nvram_81xx *nv = ha->nvram; in qla2x00_execute_fw()
497 if (IS_QLA2322(ha) || IS_QLA6322(ha)) { in qla2x00_execute_fw()
511 if (IS_FWI2_CAPABLE(ha)) { in qla2x00_execute_fw()
545 struct qla_hw_data *ha = vha->hw; in qla2x00_get_fw_version() local
553 if (IS_QLA81XX(vha->hw) || IS_QLA8031(ha) || IS_QLA8044(ha)) in qla2x00_get_fw_version()
555 if (IS_FWI2_CAPABLE(ha)) in qla2x00_get_fw_version()
557 if (IS_QLA27XX(ha)) in qla2x00_get_fw_version()
566 ha->fw_major_version = mcp->mb[1]; in qla2x00_get_fw_version()
567 ha->fw_minor_version = mcp->mb[2]; in qla2x00_get_fw_version()
568 ha->fw_subminor_version = mcp->mb[3]; in qla2x00_get_fw_version()
569 ha->fw_attributes = mcp->mb[6]; in qla2x00_get_fw_version()
571 ha->fw_memory_size = 0x1FFFF; /* Defaults to 128KB. */ in qla2x00_get_fw_version()
573 ha->fw_memory_size = (mcp->mb[5] << 16) | mcp->mb[4]; in qla2x00_get_fw_version()
574 if (IS_QLA81XX(vha->hw) || IS_QLA8031(vha->hw) || IS_QLA8044(ha)) { in qla2x00_get_fw_version()
575 ha->mpi_version[0] = mcp->mb[10] & 0xff; in qla2x00_get_fw_version()
576 ha->mpi_version[1] = mcp->mb[11] >> 8; in qla2x00_get_fw_version()
577 ha->mpi_version[2] = mcp->mb[11] & 0xff; in qla2x00_get_fw_version()
578 ha->mpi_capabilities = (mcp->mb[12] << 16) | mcp->mb[13]; in qla2x00_get_fw_version()
579 ha->phy_version[0] = mcp->mb[8] & 0xff; in qla2x00_get_fw_version()
580 ha->phy_version[1] = mcp->mb[9] >> 8; in qla2x00_get_fw_version()
581 ha->phy_version[2] = mcp->mb[9] & 0xff; in qla2x00_get_fw_version()
583 if (IS_FWI2_CAPABLE(ha)) { in qla2x00_get_fw_version()
584 ha->fw_attributes_h = mcp->mb[15]; in qla2x00_get_fw_version()
585 ha->fw_attributes_ext[0] = mcp->mb[16]; in qla2x00_get_fw_version()
586 ha->fw_attributes_ext[1] = mcp->mb[17]; in qla2x00_get_fw_version()
594 if (IS_QLA27XX(ha)) { in qla2x00_get_fw_version()
595 ha->fw_shared_ram_start = (mcp->mb[19] << 16) | mcp->mb[18]; in qla2x00_get_fw_version()
596 ha->fw_shared_ram_end = (mcp->mb[21] << 16) | mcp->mb[20]; in qla2x00_get_fw_version()
920 struct qla_hw_data *ha = vha->hw; in qla2x00_abort_command() local
927 spin_lock_irqsave(&ha->hardware_lock, flags); in qla2x00_abort_command()
932 spin_unlock_irqrestore(&ha->hardware_lock, flags); in qla2x00_abort_command()
940 if (HAS_EXTENDED_IDS(ha)) in qla2x00_abort_command()
1236 struct qla_hw_data *ha = vha->hw; in qla2x00_init_firmware() local
1241 if (IS_P3P_TYPE(ha) && ql2xdbwr) in qla2x00_init_firmware()
1242 qla82xx_wr_32(ha, ha->nxdb_wr_ptr, in qla2x00_init_firmware()
1243 (0x04 | (ha->portnum << 5) | (0 << 8) | (0 << 16))); in qla2x00_init_firmware()
1245 if (ha->flags.npiv_supported) in qla2x00_init_firmware()
1251 mcp->mb[2] = MSW(ha->init_cb_dma); in qla2x00_init_firmware()
1252 mcp->mb[3] = LSW(ha->init_cb_dma); in qla2x00_init_firmware()
1253 mcp->mb[6] = MSW(MSD(ha->init_cb_dma)); in qla2x00_init_firmware()
1254 mcp->mb[7] = LSW(MSD(ha->init_cb_dma)); in qla2x00_init_firmware()
1256 if (ha->ex_init_cb && ha->ex_init_cb->ex_version) { in qla2x00_init_firmware()
1258 mcp->mb[10] = MSW(ha->ex_init_cb_dma); in qla2x00_init_firmware()
1259 mcp->mb[11] = LSW(ha->ex_init_cb_dma); in qla2x00_init_firmware()
1260 mcp->mb[12] = MSW(MSD(ha->ex_init_cb_dma)); in qla2x00_init_firmware()
1261 mcp->mb[13] = LSW(MSD(ha->ex_init_cb_dma)); in qla2x00_init_firmware()
1262 mcp->mb[14] = sizeof(*ha->ex_init_cb); in qla2x00_init_firmware()
1267 if (IS_QLA83XX(ha) || IS_QLA27XX(ha)) in qla2x00_init_firmware()
1308 struct qla_hw_data *ha = vha->hw; in qla2x00_get_node_name_list() local
1319 pmap = dma_alloc_coherent(&ha->pdev->dev, dma_size, in qla2x00_get_node_name_list()
1364 dma_free_coherent(&ha->pdev->dev, dma_size, pmap, pmap_dma); in qla2x00_get_node_name_list()
1374 dma_free_coherent(&ha->pdev->dev, dma_size, pmap, pmap_dma); in qla2x00_get_node_name_list()
1403 struct qla_hw_data *ha = vha->hw; in qla2x00_get_port_database() local
1409 pd = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &pd_dma); in qla2x00_get_port_database()
1418 if (opt != 0 && !IS_FWI2_CAPABLE(ha)) in qla2x00_get_port_database()
1427 if (IS_FWI2_CAPABLE(ha)) { in qla2x00_get_port_database()
1432 } else if (HAS_EXTENDED_IDS(ha)) { in qla2x00_get_port_database()
1440 mcp->buf_size = IS_FWI2_CAPABLE(ha) ? in qla2x00_get_port_database()
1443 mcp->tov = (ha->login_timeout * 2) + (ha->login_timeout / 2); in qla2x00_get_port_database()
1448 if (IS_FWI2_CAPABLE(ha)) { in qla2x00_get_port_database()
1538 dma_pool_free(ha->s_dma_pool, pd, pd_dma); in qla2x00_get_port_database()
1866 struct qla_hw_data *ha = vha->hw; in qla24xx_login_fabric() local
1873 if (ha->flags.cpu_affinity_enabled) in qla24xx_login_fabric()
1874 req = ha->req_q_map[0]; in qla24xx_login_fabric()
1879 lg = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &lg_dma); in qla24xx_login_fabric()
1901 (ha->r_a_tov / 10 * 2) + 2); in qla24xx_login_fabric()
1970 dma_pool_free(ha->s_dma_pool, lg, lg_dma); in qla24xx_login_fabric()
2003 struct qla_hw_data *ha = vha->hw; in qla2x00_login_fabric() local
2010 if (HAS_EXTENDED_IDS(ha)) { in qla2x00_login_fabric()
2021 mcp->tov = (ha->login_timeout * 2) + (ha->login_timeout / 2); in qla2x00_login_fabric()
2084 struct qla_hw_data *ha = vha->hw; in qla2x00_login_local_device() local
2089 if (IS_FWI2_CAPABLE(ha)) in qla2x00_login_local_device()
2095 if (HAS_EXTENDED_IDS(ha)) in qla2x00_login_local_device()
2102 mcp->tov = (ha->login_timeout * 2) + (ha->login_timeout / 2); in qla2x00_login_local_device()
2143 struct qla_hw_data *ha = vha->hw; in qla24xx_fabric_logout() local
2150 lg = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &lg_dma); in qla24xx_fabric_logout()
2159 req = ha->req_q_map[0]; in qla24xx_fabric_logout()
2175 (ha->r_a_tov / 10 * 2) + 2); in qla24xx_fabric_logout()
2196 dma_pool_free(ha->s_dma_pool, lg, lg_dma); in qla24xx_fabric_logout()
2447 struct qla_hw_data *ha = vha->hw; in qla2x00_get_fcal_position_map() local
2452 pmap = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &pmap_dma); in qla2x00_get_fcal_position_map()
2469 mcp->tov = (ha->login_timeout * 2) + (ha->login_timeout / 2); in qla2x00_get_fcal_position_map()
2482 dma_pool_free(ha->s_dma_pool, pmap, pmap_dma); in qla2x00_get_fcal_position_map()
2515 struct qla_hw_data *ha = vha->hw; in qla2x00_get_link_status() local
2527 if (IS_FWI2_CAPABLE(ha)) { in qla2x00_get_link_status()
2533 } else if (HAS_EXTENDED_IDS(ha)) { in qla2x00_get_link_status()
2626 struct qla_hw_data *ha = vha->hw; in qla24xx_abort_command() local
2635 spin_lock_irqsave(&ha->hardware_lock, flags); in qla24xx_abort_command()
2640 spin_unlock_irqrestore(&ha->hardware_lock, flags); in qla24xx_abort_command()
2646 abt = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &abt_dma); in qla24xx_abort_command()
2688 dma_pool_free(ha->s_dma_pool, abt, abt_dma); in qla24xx_abort_command()
2709 struct qla_hw_data *ha; in __qla24xx_issue_tmf() local
2714 ha = vha->hw; in __qla24xx_issue_tmf()
2720 if (ha->flags.cpu_affinity_enabled) in __qla24xx_issue_tmf()
2721 rsp = ha->rsp_q_map[tag + 1]; in __qla24xx_issue_tmf()
2724 tsk = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &tsk_dma); in __qla24xx_issue_tmf()
2736 tsk->p.tsk.timeout = cpu_to_le16(ha->r_a_tov / 10 * 2); in __qla24xx_issue_tmf()
2790 dma_pool_free(ha->s_dma_pool, tsk, tsk_dma); in __qla24xx_issue_tmf()
2798 struct qla_hw_data *ha = fcport->vha->hw; in qla24xx_abort_target() local
2800 if ((ql2xasynctmfenable) && IS_FWI2_CAPABLE(ha)) in qla24xx_abort_target()
2809 struct qla_hw_data *ha = fcport->vha->hw; in qla24xx_lun_reset() local
2811 if ((ql2xasynctmfenable) && IS_FWI2_CAPABLE(ha)) in qla24xx_lun_reset()
2823 struct qla_hw_data *ha = vha->hw; in qla2x00_system_error() local
2825 if (!IS_QLA23XX(ha) && !IS_FWI2_CAPABLE(ha)) in qla2x00_system_error()
3342 struct qla_hw_data *ha = vha->hw; in qla24xx_report_id_acquisition() local
3373 void *wwpn = ha->init_cb->port_name; in qla24xx_report_id_acquisition()
3398 spin_lock_irqsave(&ha->vport_slock, flags); in qla24xx_report_id_acquisition()
3399 list_for_each_entry(vp, &ha->vp_list, list) { in qla24xx_report_id_acquisition()
3405 spin_unlock_irqrestore(&ha->vport_slock, flags); in qla24xx_report_id_acquisition()
3447 struct qla_hw_data *ha = vha->hw; in qla24xx_modify_vp_config() local
3448 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); in qla24xx_modify_vp_config()
3455 vpmod = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &vpmod_dma); in qla24xx_modify_vp_config()
3496 dma_pool_free(ha->s_dma_pool, vpmod, vpmod_dma); in qla24xx_modify_vp_config()
3523 struct qla_hw_data *ha = vha->hw; in qla24xx_control_vp() local
3525 struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev); in qla24xx_control_vp()
3530 if (vp_index == 0 || vp_index >= ha->max_npiv_vports) in qla24xx_control_vp()
3533 vce = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &vce_dma); in qla24xx_control_vp()
3551 mutex_lock(&ha->vport_lock); in qla24xx_control_vp()
3553 mutex_unlock(&ha->vport_lock); in qla24xx_control_vp()
3574 dma_pool_free(ha->s_dma_pool, vce, vce_dma); in qla24xx_control_vp()
3696 struct qla_hw_data *ha = vha->hw; in qla84xx_verify_chip() local
3701 mn = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &mn_dma); in qla84xx_verify_chip()
3707 options = ha->cs84xx->fw_update ? VCO_FORCE_UPDATE : 0; in qla84xx_verify_chip()
3759 spin_lock_irqsave(&ha->cs84xx->access_lock, flags); in qla84xx_verify_chip()
3760 ha->cs84xx->op_fw_version = in qla84xx_verify_chip()
3762 spin_unlock_irqrestore(&ha->cs84xx->access_lock, in qla84xx_verify_chip()
3768 dma_pool_free(ha->s_dma_pool, mn, mn_dma); in qla84xx_verify_chip()
3788 struct qla_hw_data *ha = vha->hw; in qla25xx_init_req_que() local
3793 if (IS_SHADOW_REG_CAPABLE(ha)) in qla25xx_init_req_que()
3808 if (IS_QLA83XX(ha) || IS_QLA27XX(ha)) in qla25xx_init_req_que()
3822 if (IS_QLA81XX(ha) || IS_QLA83XX(ha) || IS_QLA27XX(ha)) in qla25xx_init_req_que()
3824 if (IS_QLA83XX(ha) || IS_QLA27XX(ha)) { in qla25xx_init_req_que()
3830 spin_lock_irqsave(&ha->hardware_lock, flags); in qla25xx_init_req_que()
3833 if (!IS_QLA83XX(ha) && !IS_QLA27XX(ha)) in qla25xx_init_req_que()
3836 spin_unlock_irqrestore(&ha->hardware_lock, flags); in qla25xx_init_req_que()
3857 struct qla_hw_data *ha = vha->hw; in qla25xx_init_rsp_que() local
3862 if (IS_SHADOW_REG_CAPABLE(ha)) in qla25xx_init_rsp_que()
3874 if (IS_QLA83XX(ha) || IS_QLA27XX(ha)) in qla25xx_init_rsp_que()
3888 if (IS_QLA81XX(ha)) { in qla25xx_init_rsp_que()
3891 } else if (IS_QLA83XX(ha) || IS_QLA27XX(ha)) { in qla25xx_init_rsp_que()
3898 spin_lock_irqsave(&ha->hardware_lock, flags); in qla25xx_init_rsp_que()
3901 if (!IS_QLA83XX(ha)) in qla25xx_init_rsp_que()
3905 spin_unlock_irqrestore(&ha->hardware_lock, flags); in qla25xx_init_rsp_que()
4094 struct qla_hw_data *ha = vha->hw; in qla82xx_set_driver_version() local
4096 if (!IS_P3P_TYPE(ha)) in qla82xx_set_driver_version()
4142 struct qla_hw_data *ha = vha->hw; in qla25xx_set_driver_version() local
4144 if (!IS_FWI2_CAPABLE(ha) || IS_QLA24XX_TYPE(ha) || IS_QLA81XX(ha) || in qla25xx_set_driver_version()
4145 IS_P3P_TYPE(ha)) in qla25xx_set_driver_version()
4151 str = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL, &str_dma); in qla25xx_set_driver_version()
4186 dma_pool_free(ha->s_dma_pool, str, str_dma); in qla25xx_set_driver_version()
4231 struct qla_hw_data *ha = vha->hw; in qla2x00_read_sfp() local
4236 if (!IS_FWI2_CAPABLE(ha)) in qla2x00_read_sfp()
4278 struct qla_hw_data *ha = vha->hw; in qla2x00_write_sfp() local
4283 if (!IS_FWI2_CAPABLE(ha)) in qla2x00_write_sfp()
4500 struct qla_hw_data *ha = vha->hw; in qla2x00_echo_test() local
4508 if (IS_CNA_CAPABLE(ha)) { in qla2x00_echo_test()
4526 if (IS_CNA_CAPABLE(ha)) in qla2x00_echo_test()
4530 if (IS_QLA24XX_TYPE(ha) || IS_QLA25XX(ha) || in qla2x00_echo_test()
4531 IS_CNA_CAPABLE(ha) || IS_QLA2031(ha)) in qla2x00_echo_test()
4533 if (IS_CNA_CAPABLE(ha) || IS_QLA2031(ha)) in qla2x00_echo_test()
4623 struct qla_hw_data *ha = vha->hw; in qla81xx_write_mpi_register() local
4624 struct device_reg_24xx __iomem *reg = &ha->iobase->isp24; in qla81xx_write_mpi_register()
4631 clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags); in qla81xx_write_mpi_register()
4652 &ha->mbx_cmd_flags); in qla81xx_write_mpi_register()
4663 if (test_and_clear_bit(MBX_INTERRUPT, &ha->mbx_cmd_flags)) in qla81xx_write_mpi_register()
4685 struct qla_hw_data *ha = vha->hw; in qla2x00_get_data_rate() local
4690 if (!IS_FWI2_CAPABLE(ha)) in qla2x00_get_data_rate()
4697 if (IS_QLA83XX(ha) || IS_QLA27XX(ha)) in qla2x00_get_data_rate()
4709 ha->link_data_rate = mcp->mb[1]; in qla2x00_get_data_rate()
4721 struct qla_hw_data *ha = vha->hw; in qla81xx_get_port_config() local
4726 if (!IS_QLA81XX(ha) && !IS_QLA83XX(ha) && !IS_QLA8044(ha) && in qla81xx_get_port_config()
4727 !IS_QLA27XX(ha)) in qla81xx_get_port_config()
4787 struct qla_hw_data *ha = vha->hw; in qla24xx_set_fcp_prio() local
4792 if (!IS_QLA24XX_TYPE(ha) && !IS_QLA25XX(ha)) in qla24xx_set_fcp_prio()
4797 if (ha->flags.fcp_prio_enabled) in qla24xx_set_fcp_prio()
4829 struct qla_hw_data *ha = vha->hw; in qla2x00_get_thermal_temp() local
4832 if (!IS_FWI2_CAPABLE(ha) || IS_QLA24XX_TYPE(ha) || IS_QLA81XX(ha)) { in qla2x00_get_thermal_temp()
4838 if (IS_QLA25XX(ha)) { in qla2x00_get_thermal_temp()
4839 if (ha->pdev->subsystem_vendor == PCI_VENDOR_ID_QLOGIC && in qla2x00_get_thermal_temp()
4840 ha->pdev->subsystem_device == 0x0175) { in qla2x00_get_thermal_temp()
4846 if (ha->pdev->subsystem_vendor == PCI_VENDOR_ID_HP && in qla2x00_get_thermal_temp()
4847 ha->pdev->subsystem_device == 0x338e) { in qla2x00_get_thermal_temp()
4858 if (IS_QLA82XX(ha)) { in qla2x00_get_thermal_temp()
4862 } else if (IS_QLA8044(ha)) { in qla2x00_get_thermal_temp()
4876 struct qla_hw_data *ha = vha->hw; in qla82xx_mbx_intr_enable() local
4883 if (!IS_FWI2_CAPABLE(ha)) in qla82xx_mbx_intr_enable()
4911 struct qla_hw_data *ha = vha->hw; in qla82xx_mbx_intr_disable() local
4918 if (!IS_P3P_TYPE(ha)) in qla82xx_mbx_intr_disable()
4945 struct qla_hw_data *ha = vha->hw; in qla82xx_md_get_template_size() local
4976 ha->md_template_size = ((mcp->mb[3] << 16) | mcp->mb[2]); in qla82xx_md_get_template_size()
4977 if (!ha->md_template_size) { in qla82xx_md_get_template_size()
4989 struct qla_hw_data *ha = vha->hw; in qla82xx_md_get_template() local
4997 ha->md_tmplt_hdr = dma_alloc_coherent(&ha->pdev->dev, in qla82xx_md_get_template()
4998 ha->md_template_size, &ha->md_tmplt_hdr_dma, GFP_KERNEL); in qla82xx_md_get_template()
4999 if (!ha->md_tmplt_hdr) { in qla82xx_md_get_template()
5010 mcp->mb[4] = LSW(LSD(ha->md_tmplt_hdr_dma)); in qla82xx_md_get_template()
5011 mcp->mb[5] = MSW(LSD(ha->md_tmplt_hdr_dma)); in qla82xx_md_get_template()
5012 mcp->mb[6] = LSW(MSD(ha->md_tmplt_hdr_dma)); in qla82xx_md_get_template()
5013 mcp->mb[7] = MSW(MSD(ha->md_tmplt_hdr_dma)); in qla82xx_md_get_template()
5014 mcp->mb[8] = LSW(ha->md_template_size); in qla82xx_md_get_template()
5015 mcp->mb[9] = MSW(ha->md_template_size); in qla82xx_md_get_template()
5038 struct qla_hw_data *ha = vha->hw; in qla8044_md_get_template() local
5046 ha->md_tmplt_hdr = dma_alloc_coherent(&ha->pdev->dev, in qla8044_md_get_template()
5047 ha->md_template_size, &ha->md_tmplt_hdr_dma, GFP_KERNEL); in qla8044_md_get_template()
5048 if (!ha->md_tmplt_hdr) { in qla8044_md_get_template()
5055 while (offset < ha->md_template_size) { in qla8044_md_get_template()
5060 mcp->mb[4] = LSW(LSD(ha->md_tmplt_hdr_dma + offset)); in qla8044_md_get_template()
5061 mcp->mb[5] = MSW(LSD(ha->md_tmplt_hdr_dma + offset)); in qla8044_md_get_template()
5062 mcp->mb[6] = LSW(MSD(ha->md_tmplt_hdr_dma + offset)); in qla8044_md_get_template()
5063 mcp->mb[7] = MSW(MSD(ha->md_tmplt_hdr_dma + offset)); in qla8044_md_get_template()
5093 struct qla_hw_data *ha = vha->hw; in qla81xx_set_led_config() local
5097 if (!IS_QLA81XX(ha) && !IS_QLA8031(ha)) in qla81xx_set_led_config()
5107 if (IS_QLA8031(ha)) { in qla81xx_set_led_config()
5115 if (IS_QLA8031(ha)) in qla81xx_set_led_config()
5137 struct qla_hw_data *ha = vha->hw; in qla81xx_get_led_config() local
5141 if (!IS_QLA81XX(ha) && !IS_QLA8031(ha)) in qla81xx_get_led_config()
5152 if (IS_QLA8031(ha)) in qla81xx_get_led_config()
5164 if (IS_QLA8031(ha)) { in qla81xx_get_led_config()
5181 struct qla_hw_data *ha = vha->hw; in qla82xx_mbx_beacon_ctl() local
5185 if (!IS_P3P_TYPE(ha)) in qla82xx_mbx_beacon_ctl()
5219 struct qla_hw_data *ha = vha->hw; in qla83xx_wr_reg() local
5223 if (!IS_QLA83XX(ha) && !IS_QLA27XX(ha)) in qla83xx_wr_reg()
5256 struct qla_hw_data *ha = vha->hw; in qla2x00_port_logout() local
5260 if (IS_QLA2100(ha) || IS_QLA2200(ha)) { in qla2x00_port_logout()
5295 struct qla_hw_data *ha = vha->hw; in qla83xx_rd_reg() local
5298 if (!IS_QLA83XX(ha) && !IS_QLA27XX(ha)) in qla83xx_rd_reg()
5346 struct qla_hw_data *ha = vha->hw; in qla83xx_restart_nic_firmware() local
5348 if (!IS_QLA83XX(ha)) in qla83xx_restart_nic_firmware()
5364 ha->isp_ops->fw_dump(vha, 0); in qla83xx_restart_nic_firmware()
5380 struct qla_hw_data *ha = vha->hw; in qla83xx_access_control() local
5382 if (!IS_QLA8031(ha)) in qla83xx_access_control()
5409 ha->isp_ops->fw_dump(vha, 0); in qla83xx_access_control()