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Searched refs:ldr (Results 1 – 200 of 225) sorted by relevance

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/linux-4.4.14/arch/arm/mach-imx/
Dsuspend-imx6.S81 ldr r11, [r0, #PM_INFO_MX6Q_L2_V_OFFSET]
87 ldr r6, [r11, #L2X0_CACHE_SYNC]
102 ldr r6, [r0, #PM_INFO_MMDC_IO_NUM_OFFSET]
103 ldr r7, =PM_INFO_MMDC_IO_VAL_OFFSET
106 ldr r8, [r7], #0x4
107 ldr r9, [r7], #0x4
120 ldr r7, =MX6Q_MMDC_MPDGCTRL0
121 ldr r6, [r11, r7]
125 ldr r6, [r11, r7]
130 ldr r6, [r11, r7]
[all …]
Dsuspend-imx53.S50 ldr r1, [r0, #SUSPEND_INFO_MX53_IO_COUNT_OFFSET]
55 ldr r3, [r0, #SUSPEND_INFO_MX53_IOMUXC_V_OFFSET]
58 ldr r5, [r2], #12 /* IOMUXC register offset */
59 ldr r6, [r3, r5] /* current value */
66 ldr r1, [r0, #SUSPEND_INFO_MX53_M4IF_V_OFFSET]
67 ldr r2,[r1, #M4IF_MCR0_OFFSET]
73 ldr r2,[r1, #M4IF_MCR0_OFFSET]
78 ldr r1, [r0, #SUSPEND_INFO_MX53_IO_COUNT_OFFSET]
83 ldr r3, [r0, #SUSPEND_INFO_MX53_IOMUXC_V_OFFSET]
86 ldr r5, [r2], #4 /* IOMUXC register offset */
[all …]
Dssi-fiq.S45 ldr r12, .L_imx_ssi_fiq_base
48 ldr r13, .L_imx_ssi_fiq_tx_buffer
51 ldr r11, [r12, #SSI_SIER]
56 ldr r11, [r12, #SSI_SISR]
87 ldr r11, [r12, #SSI_SIER]
92 ldr r11, [r12, #SSI_SISR]
96 ldr r13, .L_imx_ssi_fiq_rx_buffer
104 ldr r11, [r12, #SSI_SACNT]
107 ldr r11, [r12, #SSI_SRX0]
110 ldr r11, [r12, #SSI_SRX0]
[all …]
Dheadsmp.S21 ldr r1, [r0]
23 ldr r0, [r1]
/linux-4.4.14/arch/arm/mach-omap2/
Dsleep34xx.S90 ldr r2, [r3] @ value for offset
106 ldr r12, high_mask
108 ldr r12, sram_phy_addr_mask
175 ldr r4, omap3_do_wfi_sram_addr
176 ldr r5, [r4]
192 ldr r1, kernel_flush
211 ldr r1, kernel_flush
236 ldr r4, sdrc_power @ read the SDRC_POWER register
237 ldr r5, [r4] @ read the contents of SDRC_POWER
282 ldr r4, cm_idlest_ckgen
[all …]
Dsleep44xx.S71 ldr r9, [r0, #OMAP_TYPE_OFFSET]
77 ldr r12, =OMAP4_MON_SCU_PWR_INDEX
110 ldr r9, [r8, #OMAP_TYPE_OFFSET]
119 ldr r12, =OMAP4_MON_SCU_PWR_INDEX
164 ldr r0, =0xffff
167 ldr r0, [r2, #L2X0_CLEAN_INV_WAY]
168 ldr r1, =0xffff
182 ldr r0, [r2, #L2X0_CACHE_SYNC]
213 ldr r9, [r8, #OMAP_TYPE_OFFSET]
219 ldr r12, =OMAP4_MON_SCU_PWR_INDEX
[all …]
Dsram242x.S51 ldr r2, omap242x_sdi_cm_clksel2_pll @ get address of dpllout reg
60 ldr r11, omap242x_sdi_sdrc_dlla_ctrl @ addr of dlla ctrl
61 ldr r10, [r11] @ get current val
73 ldr r10, [r11] @ get locked value
111 ldr r4, omap242x_sdi_prcm_voltctrl @ get addr of volt ctrl.
112 ldr r5, [r4] @ get value.
113 ldr r6, prcm_mask_val @ get value of mask
121 ldr r3, omap242x_sdi_timer_32ksynct_cr @ get addr of counter
122 ldr r5, [r3] @ get value
125 ldr r7, [r3] @ get timer value
[all …]
Dsram243x.S51 ldr r2, omap243x_sdi_cm_clksel2_pll @ get address of dpllout reg
60 ldr r11, omap243x_sdi_sdrc_dlla_ctrl @ addr of dlla ctrl
61 ldr r10, [r11] @ get current val
73 ldr r10, [r11] @ get locked value
111 ldr r4, omap243x_sdi_prcm_voltctrl @ get addr of volt ctrl.
112 ldr r5, [r4] @ get value.
113 ldr r6, prcm_mask_val @ get value of mask
121 ldr r3, omap243x_sdi_timer_32ksynct_cr @ get addr of counter
122 ldr r5, [r3] @ get value
125 ldr r7, [r3] @ get timer value
[all …]
Domap-headsmp.S35 wait: ldr r2, =AUX_CORE_BOOT0_PA @ read from AuxCoreBoot0
36 ldr r0, [r2]
51 wait_2: ldr r2, =AUX_CORE_BOOT0_PA @ read from AuxCoreBoot0
52 ldr r0, [r2]
58 ldr r12, =API_HYP_ENTRY
72 hold: ldr r12,=0x103
89 hold_2: ldr r12,=0x103
113 ldr r1, =OMAP44XX_GIC_DIST_BASE
114 ldr r0, [r1]
Dsleep24xx.S72 ldr r4, [r2] @ read SDRC_POWER
86 ldr r4, A_SDRC0 @ make a clock happen
87 ldr r4, [r4] @ read A_SDRC0
Domap-smc.S78 ldr r12, =0x104
86 ldr r12, =0x105
94 ldr r12, =0x103
/linux-4.4.14/arch/arm/mach-exynos/
Dsleep.S46 ldr r1, =CPU_MASK
48 ldr r1, =CPU_CORTEX_A9
59 ldr r1, =CPU_MASK
61 ldr r1, =CPU_CORTEX_A9
66 ldr r1, [r0]
67 ldr r1, [r0, r1]
69 ldr r2, [r0]
70 ldr r2, [r0, r2]
76 ldr r2, [r0]
80 ldr r1, [r0, #L2X0_R_PHY_BASE]
[all …]
Dheadsmp.S27 pen: ldr r7, [r6]
/linux-4.4.14/arch/arm64/kvm/
Dvgic-v2-switch.S40 ldr x2, [x0, #VCPU_KVM]
42 ldr x2, [x2, #KVM_VGIC_VCTRL]
50 ldr w5, [x2, #GICH_VMCR]
51 ldr w6, [x2, #GICH_MISR]
52 ldr w7, [x2, #GICH_EISR0]
53 ldr w8, [x2, #GICH_EISR1]
54 ldr w9, [x2, #GICH_ELRSR0]
55 ldr w10, [x2, #GICH_ELRSR1]
56 ldr w11, [x2, #GICH_APR]
82 ldr w4, [x3, #VGIC_CPU_NR_LR]
[all …]
Dvgic-v3-switch.S153 ldr w4, [x3, #VGIC_V3_CPU_HCR]
154 ldr w5, [x3, #VGIC_V3_CPU_VMCR]
155 ldr w25, [x3, #VGIC_V3_CPU_SRE]
170 ldr w20, [x3, #(VGIC_V3_CPU_AP1R + 3*4)]
172 ldr w19, [x3, #(VGIC_V3_CPU_AP1R + 2*4)]
174 6: ldr w18, [x3, #(VGIC_V3_CPU_AP1R + 1*4)]
176 5: ldr w17, [x3, #VGIC_V3_CPU_AP1R]
182 ldr w20, [x3, #(VGIC_V3_CPU_AP0R + 3*4)]
184 ldr w19, [x3, #(VGIC_V3_CPU_AP0R + 2*4)]
186 6: ldr w18, [x3, #(VGIC_V3_CPU_AP0R + 1*4)]
[all …]
Dhyp.S74 ldr x22, [x2, #CPU_GP_REG_OFFSET(CPU_SP_EL1)]
75 ldr x23, [x2, #CPU_GP_REG_OFFSET(CPU_ELR_EL1)]
76 ldr x24, [x2, #CPU_SPSR_OFFSET(KVM_SPSR_EL1)]
84 ldr x21, [x3, #16]
169 ldr x18, [x3, #144]
332 ldr x21, [x4, #(15 * 8)]
333 ldr x20, [x4, #(14 * 8)]
334 ldr x19, [x4, #(13 * 8)]
335 ldr x18, [x4, #(12 * 8)]
336 ldr x17, [x4, #(11 * 8)]
[all …]
Dhyp-init.S65 ldr x5, =TCR_EL2_MASK
67 ldr x5, =TCR_EL2_FLAGS
90 ldr x4, =VTCR_EL2_FLAGS
109 ldr x5, =SCTLR_EL2_FLAGS
119 ldr x4, =TRAMPOLINE_VA
/linux-4.4.14/arch/arm/mach-at91/
Dpm_suspend.S29 1: ldr tmp1, [pmc, #AT91_PMC_SR]
38 1: ldr tmp1, [pmc, #AT91_PMC_SR]
47 1: ldr tmp1, [pmc, #AT91_PMC_SR]
108 ldr r0, .pm_mode
112 ldr pmc, .pmc_base
115 ldr tmp1, [pmc, #AT91_PMC_MCKR]
127 ldr tmp1, [pmc, #AT91_CKGR_PLLAR]
135 ldr tmp1, [pmc, #AT91_CKGR_MOR]
141 ldr pmc, .pmc_base
146 ldr r0, .pm_mode
[all …]
/linux-4.4.14/arch/arm/mach-davinci/
Dsleep.S55 ldr ip, CACHE_FLUSH
65 ldr ip, [r0, #DDR2_SDRCR_OFFSET]
70 ldr ip, [r0, #DDR2_SDRCR_OFFSET]
85 ldr ip, [r3, #PLLDIV1]
90 ldr ip, [r3, #PLLCTL]
101 ldr ip, [r3, #PLLCTL]
106 ldr ip, [r4]
114 ldr ip, [r4]
121 ldr ip, [r3, #PLLCTL]
126 ldr ip, [r3, #PLLCTL]
[all …]
/linux-4.4.14/arch/arm/lib/
Dio-readsw-armv3.S24 ldr r3, [r0]
45 .Linsw_8_lp: ldr r3, [r0]
47 ldr r4, [r0]
50 ldr r4, [r0]
52 ldr r5, [r0]
55 ldr r5, [r0]
57 ldr r6, [r0]
60 ldr r6, [r0]
62 ldr lr, [r0]
76 ldr r3, [r0]
[all …]
Dbacktrace.S42 ldr r0, [sp], #4 @ by stmfd for this CPU
64 1001: ldr sv_pc, [frame, #0] @ get saved pc
65 1002: ldr sv_fp, [frame, #-12] @ get saved fp
70 1003: ldr r2, [sv_pc, #-4] @ if stmfd sp!, {args} exists,
71 ldr r3, .Ldsi+4 @ adjust saved 'pc' back one
76 ldr r1, [frame, #-4] @ get saved lr
81 ldr r1, [sv_pc, #-4] @ if stmfd sp!, {args} exists,
82 ldr r3, .Ldsi+4
88 1004: ldr r1, [sv_pc, #0] @ if stmfd sp!, {..., fp, ip, lr, pc}
89 ldr r3, .Ldsi @ instruction exists,
[all …]
Dgetuser.S64 4: TUSER(ldr) r2, [r0]
72 5: TUSER(ldr) r2, [r0]
73 6: TUSER(ldr) r3, [r0, #4]
75 5: TUSER(ldr) r2, [r0], #4
76 6: TUSER(ldr) r3, [r0]
89 7: ldr r2, [r0, #4]
120 11: TUSER(ldr) r3, [r0]
Dio-readsl.S22 1: ldr r3, [r0, #0]
23 ldr r4, [r0, #0]
24 ldr ip, [r0, #0]
25 ldr lr, [r0, #0]
38 3: ldr r3, [r0]
Dio-writesl.S39 ldr r3, [r1], #4
45 ldr r3, [r1], #4
53 ldr r3, [r1], #4
61 ldr r3, [r1], #4
Dmemmove.S89 W(ldr) r3, [r1, #-4]!
90 W(ldr) r4, [r1, #-4]!
91 W(ldr) r5, [r1, #-4]!
92 W(ldr) r6, [r1, #-4]!
93 W(ldr) r7, [r1, #-4]!
94 W(ldr) r8, [r1, #-4]!
95 W(ldr) lr, [r1, #-4]!
139 ldr r3, [r1, #0]
206 ldr r3, [r1, #-4]!
Dcsumpartialcopy.S38 ldr \reg1, [r0], #4
42 ldr \reg1, [r0], #4
43 ldr \reg2, [r0], #4
Dio-writesw-armv4.S61 ldr r3, [r1], #4
78 ARM( ldr r3, [r1, -r3]! )
80 THUMB( ldr r3, [r1, r3] )
90 ldr r3, [r1, #4]!
Ddelay-loop.S25 ldr r2, .LC1
29 ldr r2, .LC0
30 ldr r2, [r2] @ max = 0x01ffffff
Dcall_with_stack.S41 1: ldr lr, [sp]
42 ldr sp, [sp, #4]
Dcsumpartial.S31 ldr pc, [sp], #4
75 ldr td0, [sp], #4
78 ldr pc, [sp], #4 @ return
136 4: ldr td0, [buf], #4
Dmemcpy.S21 W(ldr) \reg, [\ptr], #4
33 ldr\cond\()b \reg, [\ptr], #1
Dcopy_to_user.S45 W(ldr) \reg, [\ptr], #4
57 ldr\cond\()b \reg, [\ptr], #1
Dio-writesw-armv3.S26 ldr r3, [r1, #-4]
108 ldr r3, [r1], #4
Dbitops.h70 ldr r2, [r1, r0, lsl #2]
95 ldr r2, [r1, r0, lsl #2]!
Dcsumipv6.S27 ldr r2, [sp, #4]
Dcsumpartialcopyuser.S88 ldr r5, [sp, #8*4] @ *err_ptr
Dcopy_from_user.S106 ldr r0, [sp], #4
/linux-4.4.14/arch/arm/mach-tegra/
Dsleep-tegra30.S84 ldr \rd, [\base, #EMC_ADR_CFG]
94 ldr \rd, [\base, #EMC_EMC_STATUS]
100 ldr \rd, [\r_car_base, #\pll_base]
106 ldr \rd, [\r_car_base, #\pll_misc]
109 ldr \rd, [\r_car_base, #\pll_misc]
110 ldr \rd, [\r_car_base, #\pll_misc]
118 ldr \rd, [\r_car_base, #\pll_base]
124 ldr \rd, [\car, #\iddq]
130 ldr \rd, [\car, #\iddq]
195 ldr r3, [r1] @ read CSR
[all …]
Dsleep-tegra20.S57 ldr \rd, [\r_car_base, #\pll_base]
64 ldr \rd, [\base, #EMC_ADR_CFG]
101 ldr r2, =__tegra20_cpu1_resettable_status_offset
106 ldr r3, =TEGRA_FLOW_CTRL_VIRT
109 ldr r2, [r3, r1]
114 ldr r3, =TEGRA_CLK_RESET_VIRT
162 ldr r12, [r3]
191 ldr r2, =__tegra20_cpu1_resettable_status_offset
205 ldr r2, =__tegra20_cpu1_resettable_status_offset
219 ldr r2, =__tegra20_cpu1_resettable_status_offset
[all …]
Dreset-handler.S61 ldr r1, [r2, r1]
77 ldr r1, [r0]
162 ldr r7, [r12, #RESET_DATA(MASK_PRESENT)]
180 ldr r8, [r12, #RESET_DATA(MASK_LP1)]
185 ldr lr, [r12, #RESET_DATA(STARTUP_LP1)]
193 ldr r9, [r12, #RESET_DATA(MASK_LP2)]
196 ldr lr, [r12, #RESET_DATA(STARTUP_LP2)]
213 ldr lr, [r12, #RESET_DATA(STARTUP_SECONDARY)]
253 ldr r0, [r6, +r2]
261 ldr r0, [r6, +r1] @ memory barrier
Dsleep.h56 1001: ldr \tmp, [\base]
122 ldr \tmp1, [\tmp1, #APB_MISC_GP_HIDREV]
/linux-4.4.14/arch/arm/kvm/
Dinterrupts_head.S179 ldr r2, [vcpu, #VCPU_PC]
180 ldr r3, [vcpu, #VCPU_CPSR]
185 ldr r2, [vcpu, #VCPU_USR_SP]
186 ldr r3, [vcpu, #VCPU_USR_LR]
332 ldr r2, [vcpu, #CP15_OFFSET(c14_CNTKCTL)]
335 ldr r6, [vcpu, #CP15_OFFSET(c10_AMAIR0)]
336 ldr r7, [vcpu, #CP15_OFFSET(c10_AMAIR1)]
347 ldr r2, [vcpu, #CP15_OFFSET(c13_CID)]
348 ldr r3, [vcpu, #CP15_OFFSET(c13_TID_URW)]
349 ldr r4, [vcpu, #CP15_OFFSET(c13_TID_URO)]
[all …]
Dinit.S80 ldr r2, =HTCR_MASK
88 ldr r2, =VTCR_MASK
116 ldr r2, =HSCTLR_MASK
119 ldr r2, =(HSCTLR_EE | HSCTLR_FI | HSCTLR_I | HSCTLR_C)
121 ARM( ldr r2, =(HSCTLR_M | HSCTLR_A) )
122 THUMB( ldr r2, =(HSCTLR_M | HSCTLR_A | HSCTLR_TE) )
139 ldr r0, =TRAMPOLINE_VA
/linux-4.4.14/arch/arm/mach-pxa/
Dstandby.S22 ldr r0, =PSSR
26 ldr ip, [r3]
62 ldr r2, [r1] @ Dummy read PXA3_MDCNFG
69 ldr r0, [r1, #PXA3_DDR_HCAL] @ Clear (and wait for) HCEN
72 1: ldr r0, [r1, #PXA3_DDR_HCAL]
76 ldr r0, [r1, #PXA3_RCOMP] @ Initiate RCOMP
83 ldr r0, [r1, #PXA3_DMCIER] @ set DMIER[EDLP]
87 ldr r0, [r1, #PXA3_DDR_HCAL] @ clear HCRNG, set HCPROG, HCEN
92 1: ldr r0, [r1, #PXA3_DMCISR]
96 ldr r0, [r1, #PXA3_MDCNFG] @ set PXA3_MDCNFG[DMCEN]
[all …]
Dsleep.S55 ldr r4, =MDREFR
56 ldr r5, [r4]
62 ldr r6, =MDREFR_KDIV
69 ldr r6, =CCCR
70 ldr r8, [r6] @ keep original value for resume
72 ldr r7, =CCCR_SLEEP @ prepare CCCR sleep value
96 ldr r4, =MDREFR
97 ldr r5, [r4]
112 ldr r6, =CCCR
113 ldr r8, [r6] @ keep original value for resume
[all …]
Dmioa701_bootresume.S30 ldr r0, mioa701_jumpaddr @ (Murphy's Law)
/linux-4.4.14/arch/arm/crypto/
Dsha1-armv4-large.S64 ldr r8,.LK_00_19
83 ldr r9,[r1],#4 @ handles unaligned
108 ldr r9,[r1],#4 @ handles unaligned
133 ldr r9,[r1],#4 @ handles unaligned
158 ldr r9,[r1],#4 @ handles unaligned
183 ldr r9,[r1],#4 @ handles unaligned
211 ldr r9,[r1],#4 @ handles unaligned
224 ldr r9,[r14,#15*4]
225 ldr r10,[r14,#13*4]
226 ldr r11,[r14,#7*4]
[all …]
Daes-armv4.S187 ldr r0,[r12,#0]
188 ldr r1,[r12,#4]
189 ldr r2,[r12,#8]
190 ldr r3,[r12,#12]
200 ldr r12,[sp],#4 @ pop out
251 ldr r12,[r11,#240-16]
263 ldr r4,[r10,r7,lsl#2] @ Te3[s0>>0]
265 ldr r5,[r10,r8,lsl#2] @ Te2[s0>>8]
267 ldr r6,[r10,r9,lsl#2] @ Te1[s0>>16]
269 ldr r0,[r10,r0,lsl#2] @ Te0[s0>>24]
[all …]
Dsha256-core.S_shipped95 ldr r12,.LOPENSSL_armcap
96 ldr r12,[r3,r12] @ OPENSSL_armcap_P
109 ldr r2,[r1],#4
116 @ ldr r2,[r1],#4 @ 0
141 ldr r12,[r14],#4 @ *K256++
157 ldr r2,[r1],#4 @ prefetch
163 ldr r2,[sp,#2*4] @ from future BODY_16_xx
165 ldr r1,[sp,#15*4] @ from future BODY_16_xx
174 @ ldr r2,[r1],#4 @ 1
199 ldr r3,[r14],#4 @ *K256++
[all …]
Dsha512-core.S_shipped143 ldr r12,.LOPENSSL_armcap
144 ldr r12,[r3,r12] @ OPENSSL_armcap_P
153 ldr r7,[r0,#32+LO]
154 ldr r8,[r0,#32+HI]
155 ldr r9, [r0,#48+LO]
156 ldr r10, [r0,#48+HI]
157 ldr r11, [r0,#56+LO]
158 ldr r12, [r0,#56+HI]
164 ldr r5,[r0,#0+LO]
165 ldr r6,[r0,#0+HI]
[all …]
Daes-ce-core.S167 ldr r4, [sp, #8]
193 ldr r4, [sp, #8]
380 ldr r6, [sp, #28]
387 ldr r6, [sp, #24] @ load AES key 2
/linux-4.4.14/arch/arm/mach-prima2/
Dsleep.S22 ldr r0, =sirfsoc_memc_base
23 ldr r5, [r0]
25 ldr r0, =sirfsoc_pwrc_base
26 ldr r6, [r0]
28 ldr r0, =sirfsoc_rtciobrg_base
29 ldr r7, [r0]
43 ldr r2, [r5, #DENALI_CTL_22_OFF]
52 ldr r4, [r5, #DENALI_CTL_112_OFF]
61 ldr r3, [r7]
Dheadsmp.S24 pen: ldr r7, [r6]
/linux-4.4.14/arch/arm/mach-sa1100/
Dsleep.S36 ldr r6, =MDREFR
37 ldr r4, [r6]
39 ldr r5, =PPCR
81 ldr r0, =MSC0
82 ldr r1, =MSC1
83 ldr r2, =MSC2
85 ldr r3, [r0]
89 ldr r4, [r1]
93 ldr r5, [r2]
97 ldr r7, [r6]
[all …]
/linux-4.4.14/arch/arm/boot/compressed/
Dhead-sharpsl.S27 ldr r7, .TOSAID
37 ldr r3, .PXA270ID
42 ldr r1, .W100ADDR @ Base address of w100 chip + regs offset
53 ldr r6, [r1, #0] @ Load Chip ID
54 ldr r3, .W100ID
55 ldr r7, .POODLEID
60 ldr r7, .CORGIID
61 ldr r3, .PXA255ID
67 ldr r7, .SHEPHERDID
72 ldr r7, .HUSKYID @ Must be Husky
[all …]
Dll_char_wr.S52 ldr r4, [r4, ip]
53 ldr r5, [r5, ip]
68 ldr r7, [lr, r7, lsl #2]
73 ldr r7, [lr, r7, lsl #2]
87 ldr ip, [lr, ip, lsl #2]
90 ldr ip, [lr, ip, lsl #2] @ avoid r4
97 ldr ip, [lr, ip, lsl #2]
100 ldr ip, [lr, ip, lsl #2] @ avoid r4
Dhead.S203 ldr r4, =zreladdr
222 ldr sp, [r0, #28]
279 ldr lr, [r6, #0]
281 ldr r1, =0xedfe0dd0 @ sig is 0xd00dfeed big endian
283 ldr r1, =0xd00dfeed
299 ldr r5, [r6, #4]
351 ldr r5, =_kernel_bss_size
358 ldr r5, [r6, #4]
487 1: ldr r1, [r11, #0] @ relocate entries in the GOT
506 1: ldr r1, [r11, #0] @ relocate entries in the GOT
[all …]
Ddebug.S22 ldr r1, [r2, r3]
Dhead-xscale.S23 1: ldr r0, [r2], #32
/linux-4.4.14/arch/arm/mach-mv78xx0/include/mach/
Dentry-macro.S14 ldr \base, =IRQ_VIRT_BASE
19 ldr \irqstat, [\base, #IRQ_CAUSE_LOW_OFF]
20 ldr \tmp, [\base, #IRQ_MASK_LOW_OFF]
26 ldr \irqstat, [\base, #IRQ_CAUSE_HIGH_OFF]
27 ldr \tmp, [\base, #IRQ_MASK_HIGH_OFF]
33 ldr \irqstat, [\base, #IRQ_CAUSE_ERR_OFF]
34 ldr \tmp, [\base, #IRQ_MASK_ERR_OFF]
/linux-4.4.14/arch/arm/include/debug/
Dsamsung.S17 ldr \rd, [\rx, # S3C2410_UFSTAT]
22 ldr \rd, [\rx, # S3C2410_UFSTAT]
30 ldr \rd, [\rx, # S3C2410_UFSTAT]
39 ldr \rd, [\rx, # S3C2410_UFSTAT]
52 ldr \rd, [\rx, # S3C2410_UFCON]
63 ldr \rd, [\rx, # S3C2410_UTRSTAT]
71 ldr \rd, [\rx, # S3C2410_UFCON]
82 ldr \rd, [\rx, # S3C2410_UTRSTAT]
Dtegra.S56 ldr rp, =TEGRA_CLK_RST_DEVICES_##lhu ; \
58 ldr rp, [rp, #0] ; \
64 ldr rp, =TEGRA_CLK_OUT_ENB_##lhu ; \
66 ldr rp, [rp, #0] ; \
72 ldr rp, =TEGRA_UART##uart##_BASE ; \
78 ldr \rv, [\rp] @ linked addr is stored there
80 ldr \rp, [\rp, #4] @ linked tegra_uart_config
82 ldr \rp, [\tmp] @ Load tegra_uart_config
90 10: ldr \rp, =TEGRA_PMC_SCRATCH20
91 ldr \rp, [\rp, #0] @ Load PMC_SCRATCH20
[all …]
Ds3c24xx.S20 ldr \rp, = CONFIG_DEBUG_UART_PHYS
21 ldr \rv, = CONFIG_DEBUG_UART_VIRT
25 ldr \rd, [\rx, # S3C2410_UFSTAT]
30 ldr \rd, [\rx, # S3C2410_UFSTAT]
Dmsm.S19 ldr \rp, =CONFIG_DEBUG_UART_PHYS
20 ldr \rv, =CONFIG_DEBUG_UART_VIRT
31 ldr \rd, [\rx, #0x08]
36 1001: ldr \rd, [\rx, #0x14]
50 ldr \rd, [\rx, #0x08]
Dbcm63xx.S14 ldr \rp, =CONFIG_DEBUG_UART_PHYS
15 ldr \rv, =CONFIG_DEBUG_UART_VIRT
24 1001: ldr \rd, [\rx, #UART_IR_REG]
30 1002: ldr \rd, [\rx, #UART_IR_REG]
Dnetx.S18 ldr \rp, =CONFIG_DEBUG_UART_PHYS
19 ldr \rv, =CONFIG_DEBUG_UART_VIRT
27 1002: ldr \rd, [\rx, #UART_FLAG]
33 1001: ldr \rd, [\rx, #UART_FLAG]
Dmeson.S17 ldr \rp, =(CONFIG_DEBUG_UART_PHYS) @ physical
18 ldr \rv, =(CONFIG_DEBUG_UART_VIRT) @ virtual
26 1002: ldr \rd, [\rx, #MESON_AO_UART_STATUS]
32 1001: ldr \rd, [\rx, #MESON_AO_UART_STATUS]
Defm32.S20 ldr \rx, =(CONFIG_DEBUG_UART_PHYS)
27 ldr \tmp, =(UARTn_CMD_TXEN)
36 1001: ldr \rd, [\rx, #UARTn_STATUS]
42 1001: ldr \rd, [\rx, UARTn_STATUS]
Dpl01x.S24 ldr \rp, =CONFIG_DEBUG_UART_PHYS
25 ldr \rv, =CONFIG_DEBUG_UART_VIRT
34 1001: ldr \rd, [\rx, #UART01x_FR]
41 1001: ldr \rd, [\rx, #UART01x_FR]
Dsti.S43 ldr \rp, =DEBUG_LL_UART_BASE @ physical base
44 ldr \rv, =VIRT_ADDRESS(DEBUG_LL_UART_BASE) @ virt base
52 1001: ldr \rd, [\rx, #ASC_STA_OFF]
58 1001: ldr \rd, [\rx, #ASC_STA_OFF]
Dks8695.S22 ldr \rp, =KS8695_UART_PA @ physical base address
23 ldr \rv, =KS8695_UART_VA @ virtual base address
31 1001: ldr \rd, [\rx, #KS8695_URLS] @ Read Line Status Register
37 1001: ldr \rd, [\rx, #KS8695_URLS] @ Read Line Status Register
Dzynq.S36 ldr \rp, =LL_UART_PADDR @ physical
37 ldr \rv, =LL_UART_VADDR @ virtual
45 1001: ldr \rd, [\rx, #UART_SR_OFFSET]
52 1002: ldr \rd, [\rx, #UART_SR_OFFSET] @ get status register
Dat91.S26 ldr \rp, =CONFIG_DEBUG_UART_PHYS @ System peripherals (phys address)
27 ldr \rv, =CONFIG_DEBUG_UART_VIRT @ System peripherals (virt address)
35 1001: ldr \rd, [\rx, #(AT91_DBGU_SR)] @ Read Status Register
41 1001: ldr \rd, [\rx, #(AT91_DBGU_SR)] @ Read Status Register
Domap2plus.S71 ldr \rv, [\rp] @ get absolute addr of 99f
73 ldr \rp, [\rp, #4] @ abs addr of omap_uart_phys
75 ldr \rp, [\tmp, #0] @ omap_uart_phys
76 ldr \rv, [\tmp, #4] @ omap_uart_virt
127 ldr \rp, =AM33XX_UART1_BASE
132 ldr \rp, =ZOOM_UART_BASE
134 ldr \rp, =ZOOM_UART_VIRT
169 ldr \tmp, [\tmp, #8] @ omap_uart_lsr
Dasm9260.S14 ldr \rp, = CONFIG_DEBUG_UART_PHYS
15 ldr \rv, = CONFIG_DEBUG_UART_VIRT
26 1002: ldr \rd, [\rx, #0x60] @ STAT
Dsirf.S22 ldr \rp, =CONFIG_DEBUG_UART_PHYS @ physical
23 ldr \rv, =CONFIG_DEBUG_UART_VIRT @ virtual
34 1001: ldr \rd, [\rx, #SIRF_LLUART_TXFIFO_STATUS]
Dclps711x.S23 ldr \rv, =CLPS711X_UART_VADDR
24 ldr \rp, =CLPS711X_UART_PADDR
35 1001: ldr \rd, [\rx, #SYSFLG]
Dimx.S32 ldr \rp, =UART_PADDR @ physical
33 ldr \rv, =UART_VADDR @ virtual
44 1002: ldr \rd, [\rx, #0x98] @ SR2
D8250.S13 ldr \rp, =CONFIG_DEBUG_UART_PHYS
14 ldr \rv, =CONFIG_DEBUG_UART_VIRT
25 ldr \rd, \rx
Ds5pv210.S23 ldr \rp, =S5PV210_PA_UART
24 ldr \rv, =S3C_VA_UART
Dsa1100.S33 ldr \rv, [\rp, #UTCR3]
59 1001: ldr \rd, [\rx, #UTSR1]
65 1001: ldr \rd, [\rx, #UTSR1]
Ddigicolor.S19 ldr \rp, =CONFIG_DEBUG_UART_PHYS
20 ldr \rv, =CONFIG_DEBUG_UART_VIRT
Dux500.S44 ldr \rp, =UART_PHYS_BASE @ no, physical address
45 ldr \rv, =UART_VIRT_BASE @ yes, virtual address
Drenesas-scif.S31 ldr \rp, =SCIF_PHYS
32 ldr \rv, =SCIF_VIRT
Dexynos.S29 ldr \rv, =S3C_VA_UART
Dvt8500.S29 1001: ldr \rd, [\rx, #0x1c]
Dvf.S21 ldr \rp, =VF_UART_PHYSICAL_BASE @ physical
/linux-4.4.14/arch/arm/mach-davinci/include/mach/
Dentry-macro.S14 ldr \base, =davinci_intc_base
15 ldr \base, [\base]
20 ldr \tmp, =davinci_intc_type
21 ldr \tmp, [\tmp]
26 ldr \tmp, [\base, #0x14]
32 1001: ldr \irqnr, [\base, #0x80] /* get irq number */
/linux-4.4.14/arch/arm/kernel/
Dentry-ftrace.S67 ldr r0, =ftrace_trace_function
68 ldr r2, [r0]
74 ldr r1, =ftrace_graph_return
75 ldr r2, [r1]
79 ldr r1, =ftrace_graph_entry
80 ldr r2, [r1]
81 ldr r0, =ftrace_graph_entry_stub
118 ldr r1, [sp, #16] @ instrumented routine (func)
139 ldr \reg, [fp, #-4]
143 ldr lr, [fp, #-4]
[all …]
Dhead-nommu.S60 ldr r9, =BASEADDR_V7M_SCB
61 ldr r9, [r9, V7M_SCB_CPUID]
63 ldr r9, =CONFIG_PROCESSOR_ID
71 ldr r5, =PLAT_PHYS_OFFSET @ Region start: PHYS_OFFSET
72 ldr r6, =(_end) @ Cover whole kernel
82 ldr r12, [r10, #PROCINFO_INITFUNC]
101 ldr r9, =CONFIG_PROCESSOR_ID
109 ldr r7, __secondary_data
113 ldr r6, [r7] @ get secondary_data.mpu_szr
118 ldr r12, [r10, #PROCINFO_INITFUNC]
[all …]
Drelocate_kernel.S13 ldr r0,kexec_indirection_page
14 ldr r1,kexec_start_address
24 ldr r3, [r0],#4
51 ldr r5,[r3],#4
61 ldr r1,kexec_mach_type
62 ldr r2,kexec_boot_atags
Dsleep.S63 ldr r10, =processor
64 ldr r4, [r10, #CPU_SLEEP_SIZE] @ size of CPU sleep state
66 ldr r4, =cpu_suspend_size
71 ldr r3, =sleep_save_sp
73 ldr r3, [r3, #SLEEP_SAVE_SP_VIRT]
74 ALT_SMP(ldr r0, =mpidr_hash)
103 ldr r3, =cpu_resume_after_mmu
141 ldr r3, [r2]
151 ldr r2, [r0]
153 ldr r0, [r0, #SLEEP_SAVE_SP_PHYS]
[all …]
Dentry-v7m.S46 ldr r1, =V7M_xPSR_EXCEPTIONNO
58 ldr r1, =BASEADDR_V7M_SCB
59 ldr r0, [r1, V7M_SCB_ICSR]
64 ldr r2, [tsk, #TI_FLAGS]
Diwmmxt.S88 ldr r3, =concan_owner
90 ldr r2, [sp, #60] @ current task pc value
91 ldr r1, [r3] @ get current Concan owner
203 ldr r3, =concan_owner
205 ldr r1, [r3] @ get current Concan owner
255 ldr r3, =concan_owner
257 ldr r3, [r3] @ get current Concan owner
293 ldr r3, =concan_owner
295 ldr r3, [r3] @ get current Concan owner
332 ldr r2, =concan_owner
[all …]
Dentry-armv.S43 ldr r1, =handle_arch_irq
46 ldr pc, [r1]
56 ldr ip, .LCprocfns
58 ldr pc, [ip, #PROCESSOR_PABT_FUNC]
77 ldr ip, .LCprocfns
79 ldr pc, [ip, #PROCESSOR_DABT_FUNC]
160 SPFIX( ldr r0, [sp] ) @ restored
205 THUMB( ldr r5, [sp, #S_PSR] ) @ potentially updated CPSR
217 ldr r8, [tsk, #TI_PREEMPT] @ get preempt count
218 ldr r0, [tsk, #TI_FLAGS] @ get flags
[all …]
Dhead-common.S51 ldr r5, [r2, #0]
53 ldr r6, =OF_DT_MAGIC @ is it a DTB?
60 ldr r5, [r2, #4]
61 ldr r6, =ATAG_CORE
98 THUMB( ldr sp, [r3, #16] )
Dhead.S114 ldr r8, =PLAT_PHYS_OFFSET @ always constant in this case
149 ldr r13, =__mmap_switched @ address to jump to after
158 ldr r12, [r10, #PROCINFO_INITFUNC]
224 ldr r7, [r10, #PROCINFO_MM_MMUFLAGS] @ mm_mmuflags
248 ldr r6, =(_end - 1)
266 ldr r6, =(_edata_loc - 1)
308 ldr r7, [r10, #PROCINFO_IO_MMUFLAGS] @ io_mmuflags
326 ldr r7, [r10, #PROCINFO_IO_MMUFLAGS] @ io_mmuflags
405 ldr r8, [r3, #8] @ get secondary_data.swapper_pg_dir
408 ldr r12, [r10, #PROCINFO_INITFUNC]
[all …]
Dentry-header.S49 ldr \rtmp1, \label
50 ldr \rtmp1, [\rtmp1]
129 ldr lr, =EXC_RET_THREADMODE_PROCESSSTACK
192 ldr sp, [\rd, #\offset] @ load sp_usr
193 ldr lr, [\rd, #\offset + 4] @ load lr_usr
324 ldr r1, [sp, #\offset + S_PSR] @ get calling cpsr
325 ldr lr, [sp, #\offset + S_PC] @ get pc
Dhyp-stub.S44 ldr \reg3, [\reg2]
56 ldr \reg3, [\reg2]
57 ldr \reg1, [\reg2, \reg3]
Dfiqasm.S31 ldr sp, [r0], #4
32 ldr lr, [r0]
Dentry-common.S38 ldr r1, [tsk, #TI_FLAGS] @ re-check for syscall tracing
64 ldr r1, [tsk, #TI_FLAGS] @ re-check for syscall tracing
96 ldr r1, [tsk, #TI_FLAGS]
180 USER( ldr r10, [lr, #-4] ) @ get SWI instruction
197 USER( ldr scno, [lr, #-4] ) @ get SWI instruction
220 ldr r10, [tsk, #TI_FLAGS] @ check for syscall tracing
Dmodule-plts.c29 u32 ldr[PLT_ENT_COUNT]; member
64 return (u32)plt->ldr; in get_module_plt()
72 return (u32)&plt->ldr[i]; in get_module_plt()
/linux-4.4.14/arch/arm64/kernel/
Dentry-ftrace.S64 ldr \reg, [x29]
65 ldr \reg, [\reg]
74 ldr \reg, [x29, #8]
79 ldr \reg, [x29]
80 ldr \reg, [\reg, #8]
85 ldr \reg, [x29]
102 ldr x2, [x0, #:lo12:ftrace_trace_function]
119 ldr x2, [x1, #:lo12:ftrace_graph_return]
125 ldr x2, [x1, #:lo12:ftrace_graph_entry]
Dsleep.S83 ldr x1, =sleep_save_sp
84 ldr x1, [x1, #SLEEP_SAVE_SP_VIRT]
86 ldr x9, =mpidr_hash
87 ldr x10, [x9, #MPIDR_HASH_MASK]
133 ldr x3, =cpu_resume_after_mmu
164 ldr x2, [x8, #MPIDR_HASH_MASK]
170 ldr x0, [x0, x7, lsl #3]
172 ldr x2, [x0, #CPU_CTX_SP]
Dentry.S92 ldr x19, [tsk, #TI_FLAGS] // since we can unmask debug
123 ldr x23, [sp, #S_SP] // load return stack pointer
161 ldr lr, [sp, #S_LR]
187 ldr x1, [x1, #:lo12:handle_arch_irq]
365 ldr w24, [tsk, #TI_PREEMPT] // get preempt count
367 ldr x0, [tsk, #TI_FLAGS] // get flags
382 ldr x0, [tsk, #TI_FLAGS] // get new tasks TI_FLAGS
600 ldr lr, [x8]
612 ldr x1, [tsk, #TI_FLAGS] // re-check for syscall tracing
629 ldr x2, [sp, #S_PSTATE]
[all …]
Dhead.S222 ldr x27, =__mmap_switched // address to jump to after
336 ldr x7, =SWAPPER_MM_MMUFLAGS
394 ldr x6, =KERNEL_END // __va(KERNEL_END)
578 ldr x1, =MPIDR_HWID_BITMASK
581 pen: ldr x4, [x3]
606 ldr x21, =secondary_data
607 ldr x27, =__secondary_switched // address to jump to after enabling the MMU
612 ldr x0, [x21] // get secondary_data.stack
635 ldr x5, =vectors
Defi-entry.S63 ldr x0, [sp, #16] // relocated _text address
64 ldr x21, =stext_offset
/linux-4.4.14/firmware/av7110/
DBoot.S55 reset: ldr r13, buffer
56 ldr r4, flag
61 ldr r1, wait_address
62 ldr r2, flag_address
63 ldr r3, sram
70 ldr pc, sram // jump to the copied code
77 ldr r3, [r4,#4] // destaddr
/linux-4.4.14/arch/arm/mach-omap1/
Dams-delta-fiq-handler.S100 ldr r12, omap_ih1_base @ set pointer to level1 handler
102 ldr r11, [r12, #IRQ_MIR_REG_OFFSET] @ fetch interrupts mask
104 ldr r13, [r12, #IRQ_ITR_REG_OFFSET] @ fetch interrupts status
108 ldr r10, [r12, #IRQ_SIR_FIQ_REG_OFFSET] @ get requested interrupt number
126 ldr r12, omap1510_gpio_base @ set base pointer to GPIO bank
128 ldr r11, [r12, #OMAP1510_GPIO_INT_MASK] @ fetch GPIO interrupts mask
130 ldr r13, [r12, #OMAP1510_GPIO_INT_STATUS] @ fetch status bits
149 ldr r8, [r12, #OMAP1510_GPIO_DATA_INPUT] @ fetch GPIO input
151 ldr r10, [r9, #BUF_STATE] @ fetch kbd interface state
172 data: ldr r10, [r9, #BUF_MASK] @ fetch current input bit mask
[all …]
Dsleep.S82 ldr r7, [r6, #EMIFF_SDRAM_CONFIG_ASM_OFFSET & 0xff]
88 ldr r8, [r6, #EMIFS_CONFIG_ASM_OFFSET & 0xff]
158 ldr r5, [r4, #EMIFS_CONFIG_ASM_OFFSET & 0xff]
167 ldr r5, [r4, #EMIFF_SDRAM_CONFIG_ASM_OFFSET & 0xff]
173 ldr r5, [r4, #EMIFS_CONFIG_ASM_OFFSET & 0xff]
237 ldr r7, [r6, #EMIFF_SDRAM_CONFIG_ASM_OFFSET & 0xff]
243 ldr r8, [r6, #EMIFS_CONFIG_ASM_OFFSET & 0xff]
/linux-4.4.14/arch/arm/mach-s3c24xx/
Dsleep-s3c2410.S46 ldr r4, =S3C2410_REFRESH
47 ldr r5, =S3C24XX_MISCCR
48 ldr r6, =S3C2410_CLKCON
49 ldr r7, [r4] @ get REFRESH (and ensure in TLB)
50 ldr r8, [r5] @ get MISCCR (and ensure in TLB)
51 ldr r9, [r6] @ get CLKCON (and ensure in TLB)
Dsleep-s3c2412.S36 ldr r1, =S3C2410_INTPND
37 ldr r2, =S3C2410_SRCPND
38 ldr r3, =S3C2410_EINTPEND
Dpm-h1940.S33 ldr pc, [r0, #S3C2410_GSTATUS3 - S3C24XX_VA_GPIO]
Dsleep.S68 ldr r12, [ r14, #0x54 ]
/linux-4.4.14/arch/arm64/lib/
Dstrcmp.S77 ldr data1, [src1], #8
78 ldr data2, [src2], #8
97 ldr data1, [src1], #8
99 ldr data2, [src2], #8
145 ldr data1, [src1], #8
146 ldr data2, [src2], #8
168 ldr data1, [src1,pos]
169 ldr data2, [src2,pos]
178 ldr data1, [src1], #8
179 ldr data2, [src2], #8
Dmemcmp.S75 ldr data1, [src1], #8
76 ldr data2, [src2], #8
111 ldr data1, [src1], #8
112 ldr data2, [src2], #8
178 ldr data1, [src1], #8
179 ldr data2, [src2], #8
199 ldr data1, [src1,pos]
200 ldr data2, [src2,pos]
205 ldr data1, [src1], #8
206 ldr data2, [src2], #8
Dstrncmp.S89 ldr data1, [src1], #8
90 ldr data2, [src2], #8
132 ldr data1, [src1], #8
134 ldr data2, [src2], #8
194 ldr data1, [src1], #8
195 ldr data2, [src2], #8
222 ldr data1, [src1,pos]
223 ldr data2, [src2,pos]
232 ldr data1, [src1], #8
233 ldr data2, [src2], #8
Dmemmove.S91 ldr tmp1w, [src, #-4]!
95 ldr tmp1, [src, #-8]!
127 ldr tmp1, [src, #-8]!
131 ldr tmp1w, [src, #-4]!
Dmemcpy.S56 ldr \ptr, [\regB], \val
Dcopy_to_user.S52 ldr \ptr, [\regB], \val
Dcopy_in_user.S54 USER(9998f, ldr \ptr, [\regB], \val)
Dcopy_from_user.S53 USER(9998f, ldr \ptr, [\regB], \val)
/linux-4.4.14/arch/arm/mach-ep93xx/
Dcrunch-bits.S71 ldr r8, =(EP93XX_APB_VIRT_BASE + 0x00130000) @ syscon addr
73 ldr r1, [r8, #0x80]
81 ldr r3, =crunch_owner
83 ldr r2, [sp, #60] @ current task pc value
84 ldr r1, [r3] @ get current crunch owner
89 ldr r2, [r8, #0x80]
216 ldr r4, =(EP93XX_APB_VIRT_BASE + 0x00130000) @ syscon addr
218 ldr r3, =crunch_owner
220 ldr r1, [r3] @ get current crunch owner
227 ldr r5, [r4, #0x80] @ enable access to crunch
[all …]
/linux-4.4.14/arch/arm/mach-ixp4xx/include/mach/
Dentry-macro.S16 ldr \irqstat, =(IXP4XX_INTC_BASE_VIRT+IXP4XX_ICIP_OFFSET)
17 ldr \irqstat, [\irqstat] @ get interrupts
31 ldr \irqstat, =(IXP4XX_INTC_BASE_VIRT+IXP4XX_ICIP2_OFFSET)
32 ldr \irqstat, [\irqstat] @ get upper interrupts
/linux-4.4.14/arch/arm/mach-shmobile/
Dheadsmp.S27 ldr r0, 2f
28 ldr r1, 1f
58 ldr r8, [r5, r1, lsl #2]
62 ldr r9, [r6, r1, lsl #2]
74 ldr r0, [r7, r1, lsl #2]
Dheadsmp-scu.S33 ldr r2, [r0, #8] @ SCU Power Status Register
/linux-4.4.14/arch/arm/mach-s3c64xx/
Dsleep.S44 ldr r2, =LL_UART /* for debug */
59 ldr r3, =S3C64XX_PA_GPIO
60 ldr r0, [ r3, #S3C64XX_GPNCON ]
67 ldr r0, [ r3, #S3C64XX_GPNDAT ]
/linux-4.4.14/arch/arm/mach-rockchip/
Dsleep.S39 ldr r3, rkpm_bootdata_l2ctlr_f
42 ldr r3, rkpm_bootdata_l2ctlr
45 ldr sp, rkpm_bootdata_cpusp
46 ldr r1, rkpm_bootdata_cpu_code
Dheadsmp.S19 ldr pc, 1f
/linux-4.4.14/arch/arm/mach-mvebu/
Dcoherency_ll.S42 ldr r1, =coherency_base
46 ldr r3, [r1]
47 ldr r1, [r1, r3]
54 ldr r1, =coherency_base
55 ldr r1, [r1]
Dpmsu_ll.S62 ldr r0, [r0] @ load the address of the
64 ldr r0, [r0] @ load the value in the
/linux-4.4.14/arch/arm/mm/
Dproc-v7m.S85 ldr r0, =BASEADDR_V7M_SCB
86 ldr r12, =vector_table
90 ldr r5, [r0, #V7M_SCB_SHCSR]
102 ldr r5, [r12, #11 * 4] @ read the SVC vector entry
106 ldr sp, =__v7m_setup_stack_top
120 ldr r12, [r0, V7M_SCB_CCR] @ system control register
Dabort-lv4t.S28 ldr r8, [r4] @ read arm instruction
40 /* 4 */ b .data_arm_lateldrpostconst @ ldr rd, [rn], #m
41 /* 5 */ b .data_arm_lateldrpreconst @ ldr rd, [rn, #m]
42 /* 6 */ b .data_arm_lateldrpostreg @ ldr rd, [rn], rm
43 /* 7 */ b .data_arm_lateldrprereg @ ldr rd, [rn, rm]
48 /* c */ b do_DataAbort @ ldc rd, [rn], #m @ Same as ldr rd, [rn], #m
73 ldr r7, [r2, r9, lsr #14] @ Get register 'Rn'
91 ldr r7, [r2, r9, lsr #14] @ Get register 'Rn'
105 ldr r7, [r2, r9, lsr #14] @ Get register 'Rn'
117 ldr r6, [r2, r7, lsl #2] @ Get register 'Rm'
[all …]
Dproc-macros.S14 ldr \rd, [\rn, #VMA_VM_MM]
21 ldr \rd, [\rn, #VMA_VM_FLAGS]
25 ldr \rd, [\rn, #TI_TASK]
26 ldr \rd, [\rd, #TSK_ACTIVE_MM]
35 ldr \rd, [\rd, #TI_TASK]
36 ldr \rd, [\rd, #TSK_ACTIVE_MM]
45 ldr \rd, [\rn, #MM_CONTEXT_ID + 4 ]
47 ldr \rd, [\rn, #MM_CONTEXT_ID]
149 ldr r2, [ip, r2]
Dcache-v4wb.S82 ldr r3, =flush_base
83 ldr r1, [r3, #0]
87 1: ldr r3, [r1], #32
93 1: ldr r3, [r1], #32
Dproc-arm740.S77 ldr r0, =(CONFIG_DRAM_BASE & 0xFFFFF000) @ base[31:12] of RAM
78 ldr r3, =(CONFIG_DRAM_SIZE >> 12) @ size of RAM (must be >= 4KB)
87 ldr r0, =(CONFIG_FLASH_MEM_BASE & 0xFFFFF000) @ base[31:12] of FLASH
88 ldr r3, =(CONFIG_FLASH_SIZE >> 12) @ size of FLASH (must be >= 4KB)
Dabort-ev6.S26 ldr ip, =0x4107b36
34 ldr r3, [r4] @ read aborted ARM instruction
Dl2c-l2x0-resume.S16 ldr r2, [r0]
35 ldr r0, [r1, #L2X0_CACHE_ID]
Dproc-sa110.S96 ldr r1, =UNCACHEABLE_ADDR @ load from uncacheable loc
97 ldr r1, [r1, #0] @ force switch to MCLK
142 ldr pc, [sp], #4
Dproc-arm940.S299 ldr r0, =(CONFIG_DRAM_BASE & 0xFFFFF000) @ base[31:12] of RAM
300 ldr r7, =CONFIG_DRAM_SIZE >> 12 @ size of RAM (must be >= 4KB)
305 ldr r0, =(CONFIG_FLASH_MEM_BASE & 0xFFFFF000) @ base[31:12] of FLASH
306 ldr r7, =CONFIG_FLASH_SIZE @ size of FLASH (must be >= 4KB)
Dabort-ev4.S21 ldr r3, [r4] @ read aborted ARM instruction
Dproc-sa1100.S109 ldr r1, =UNCACHEABLE_ADDR @ ptr to uncacheable address
112 ldr r1, [r1, #0] @ force switch to MCLK
153 ldr pc, [sp], #4
Dproc-arm946.S345 ldr r0, =(CONFIG_DRAM_BASE & 0xFFFFF000) @ base[31:12] of RAM
346 ldr r7, =CONFIG_DRAM_SIZE @ size of RAM (must be >= 4KB)
350 ldr r0, =(CONFIG_FLASH_MEM_BASE & 0xFFFFF000) @ base[31:12] of FLASH
351 ldr r7, =CONFIG_FLASH_SIZE @ size of FLASH (must be >= 4KB)
Dproc-v7.S139 ldr r4, =PRRR @ PRRR
140 ldr r5, =NMRR @ NMRR
433 ldr r10, =0x00000c08 @ Cortex-A8 primary part number
438 ldr r10, =0x00000c09 @ Cortex-A9 primary part number
443 ldr r10, =0x00000c0f @ Cortex-A15 primary part number
453 ldr r3, =PRRR @ PRRR
454 ldr r6, =NMRR @ NMRR
Dproc-arm720.S127 ldr r5, arm710_cr1_clear
129 ldr r5, arm710_cr1_set
Dabort-ev7.S29 ldr r3, =0x40d @ On permission fault
Dproc-fa526.S161 ldr r5, fa526_cr1_clear
163 ldr r5, fa526_cr1_set
/linux-4.4.14/arch/arm/vfp/
Dentry.S29 ldr r4, .LCvfp
30 ldr r11, [r10, #TI_CPU] @ CPU number
32 ldr pc, [r4] @ call VFP entry point
50 ldr r0, VFP_arch_address
Dvfphw.S28 ldr r0, =1f
43 ldr r0, =1f
60 ldr r0, =1f
84 ldr r3, [sp, #S_PSR] @ Neither lazy restore nor FP exceptions
95 ldr r3, vfp_current_hw_state_address
97 ldr r4, [r3, r11, lsl #2] @ vfp_current_hw_state pointer
141 ldr ip, [r10, #VFP_CPU]
/linux-4.4.14/arch/arm/mach-orion5x/include/mach/
Dentry-macro.S14 ldr \base, =MAIN_IRQ_CAUSE
18 ldr \irqstat, [\base, #0] @ main cause
19 ldr \tmp, [\base, #(MAIN_IRQ_MASK - MAIN_IRQ_CAUSE)] @ main mask
/linux-4.4.14/arch/arm/mach-socfpga/
Dself-refresh.S65 ldr r2, [r0, #SDR_CTRLGRP_LOWPWREQ_ADDR]
72 ldr r2, [r0, #SDR_CTRLGRP_LOWPWRACK_ADDR]
101 ldr r2, [r0, #SDR_CTRLGRP_LOWPWREQ_ADDR]
108 ldr r2, [r0, #SDR_CTRLGRP_LOWPWRACK_ADDR]
Dheadsmp.S28 ldr r3, [r2]
29 ldr r4, [r3]
/linux-4.4.14/arch/arm/mach-dove/include/mach/
Dentry-macro.S14 ldr \base, =IRQ_VIRT_BASE
19 ldr \irqstat, [\base, #IRQ_CAUSE_LOW_OFF]
20 ldr \tmp, [\base, #IRQ_MASK_LOW_OFF]
/linux-4.4.14/arch/arm/mach-lpc32xx/
Dsuspend.S46 ldr CLKPWRBASE_REG, [WORK1_REG, #0]
47 ldr EMCBASE_REG, [WORK1_REG, #4]
49 ldr SAVED_PWR_CTRL_REG, [CLKPWRBASE_REG,\
/linux-4.4.14/arch/arm64/kernel/vdso/
Dgettimeofday.S33 9999: ldr seqcnt, [vdso_data, #VDSO_TB_SEQ_COUNT]
36 ldr use_syscall, [vdso_data, #VDSO_USE_SYSCALL]
41 ldr \cnt, [vdso_data, #VDSO_TB_SEQ_COUNT]
181 ldr x2, 5f
187 ldr x2, 6f
220 ldr x10, [vdso_data, #VDSO_CS_CYCLE_LAST]
/linux-4.4.14/arch/arm/xen/
Dhypercall.S73 ldr r4, [sp, #4] \
100 ldr r3, [sp, #8]
108 ldr r4, [sp, #4]
/linux-4.4.14/arch/arm/mach-uniphier/
Dheadsmp.S23 ldr r1, uniphier_smp_trampoline_jump
24 ldr r3, uniphier_smp_trampoline_poll_addr
31 1: ldr r0, [r3]
/linux-4.4.14/arch/arm/include/asm/
Dvfpmacros.h28 ldr \tmp, =elf_hwcap @ may not have MVFR regs
29 ldr \tmp, [\tmp, #0]
52 ldr \tmp, =elf_hwcap @ may not have MVFR regs
53 ldr \tmp, [\tmp, #0]
Dtls.h20 ldr \tmp1, =elf_hwcap
21 ldr \tmp1, [\tmp1, #0]
Dfutex.h87 "1: " TUSER(ldr) " %1, [%3]\n" \
112 "1: " TUSER(ldr) " %1, [%4]\n" in futex_atomic_cmpxchg_inatomic()
Dassembler.h214 ldr \tmp, [\ti, #TI_PREEMPT] @ get preempt count
220 ldr \tmp, [\ti, #TI_PREEMPT] @ get preempt count
433 usracc ldr, \reg, \ptr, \inc, \cond, \rept, \abort
489 ldr r0, [sp, #S_FRAME_SIZE]
/linux-4.4.14/arch/arm/mach-s3c64xx/include/mach/
Ddebug-macro.S25 ldr \rp, = S3C_PA_UART
26 ldr \rv, = (S3C_VA_UART + S3C_PA_UART & 0xfffff)
/linux-4.4.14/arch/arm/mach-w90x900/include/mach/
Dentry-macro.S22 ldr \irqnr, [\base, #AIC_IPER]
23 ldr \irqnr, [\base, #AIC_ISNR]
/linux-4.4.14/arch/arm/mach-lpc32xx/include/mach/
Dentry-macro.S25 ldr \base, =IO_ADDRESS(LPC32XX_MIC_BASE)
33 ldr \irqstat, [\base, #LPC32XX_INTC_MASKED_STATUS_OFS]
/linux-4.4.14/arch/arm/mach-gemini/include/mach/
Dentry-macro.S19 ldr \irqstat, =IO_ADDRESS(GEMINI_INTERRUPT_BASE + IRQ_STATUS)
20 ldr \irqnr, [\irqstat]
/linux-4.4.14/sound/oss/
Dvidc_fill.S36 ldr r4, [r0], #2
62 ldr r4, [r0], #2
77 ldr r5, [r0], #2
95 ldr r4, [r0], #4
138 ldr r8, =dma_start
176 ldr lr, [ip, #IOMD_SD0ST]
/linux-4.4.14/arch/arm64/crypto/
Dsha1-ce-core.S81 ldr dga, [x0]
82 ldr dgb, [x0, #16]
85 ldr w4, [x0, #:lo12:sha1_ce_offsetof_finalize]
135 ldr x4, [x0, #:lo12:sha1_ce_offsetof_count]
Dsha2-ce-core.S91 ldr w4, [x0, #:lo12:sha256_ce_offsetof_finalize]
139 ldr x4, [x0, #:lo12:sha256_ce_offsetof_count]
Daes-modes.S307 ldr q8, =0x30000000200000001 /* addends 1,2,3[,0] */
399 ldr q7, .Lxts_mul_x
403 ldr q7, .Lxts_mul_x
471 ldr q7, .Lxts_mul_x
475 ldr q7, .Lxts_mul_x
Daes-neon.S28 ldr q13, \shiftrows
245 ldr q13, .LForward_ShiftRows
248 ldr q13, .LReverse_ShiftRows
275 ldr q13, .LForward_ShiftRows
278 ldr q13, .LReverse_ShiftRows
/linux-4.4.14/arch/arm/mach-ks8695/include/mach/
Dentry-macro.S18 ldr \base, =KS8695_IRQ_VA @ Base address of interrupt controller
22 ldr \irqstat, [\base, #KS8695_INTMS] @ Mask Status register
/linux-4.4.14/arch/arm64/mm/
Dproc-macros.S26 ldr \rd, [\rn, #VMA_VM_MM]
33 ldr \rd, [\rn, #MM_CONTEXT_ID]
Dproc.S103 ldr x12, [x0, #80]
172 ldr x5, =MAIR(0x00, MT_DEVICE_nGnRnE) | \
191 ldr x10, =TCR_TxSZ(VA_BITS) | TCR_CACHE_FLAGS | TCR_SMP_FLAGS | \
/linux-4.4.14/drivers/spi/
Dspi-s3c24xx-fiq.S43 ldr fiq_rtmp, fiq_rx_irq_ack
73 ldr fiq_rtmp, fiq_txrx_irq_ack
98 ldr fiq_rtmp, fiq_tx_irq_ack
/linux-4.4.14/drivers/media/rc/img-ir/
Dimg-ir-sanyo.c92 .ldr = {
117 .ldr = {
Dimg-ir-nec.c121 .ldr = {
146 .ldr = {
Dimg-ir-hw.h101 struct img_ir_symbol_timing ldr, s00, s01, s10, s11; member
129 u32 ldr, s00, s01, s10, s11, ft; member
Dimg-ir-hw.c91 img_ir_symbol_timing_preprocess(&timings->ldr, unit); in img_ir_timings_preprocess()
123 img_ir_symbol_timing_defaults(&timings->ldr, &defaults->ldr); in img_ir_timings_defaults()
300 regs->ldr = img_ir_symbol_timing(&timings->ldr, tolerance, clock_hz, in img_ir_timings_convert()
387 img_ir_write(priv, IMG_IR_LEAD_SYMB_TIMING, regs->ldr); in img_ir_write_timings()
394 regs->ldr, regs->s00, regs->s01, regs->s10, regs->s11, ft); in img_ir_write_timings()
Dimg-ir-rc6.c92 .ldr = {
Dimg-ir-jvc.c64 .ldr = {
Dimg-ir-sony.c130 .ldr = {
/linux-4.4.14/arch/unicore32/kernel/
Ddebug-macro.S78 1001: ldr \rd, [\rx, #UART_LSR_OFFSET]
84 1001: ldr \rd, [\rx, #UART_LSR_OFFSET]
/linux-4.4.14/arch/arm/nwfpe/
Dentry.S82 ldr r5, [sp, #S_PC] @ get contents of PC;
85 ldr r1, [sp, #S_PSR] @ fetch the PSR
/linux-4.4.14/arch/arm64/include/asm/
Dfpsimdmacros.h73 ldr w\tmpnr, [\state, #16 * 2]
75 ldr w\tmpnr, [\state, #16 * 2 + 4]
112 ldr w\tmpnr2, [\state, #8]
Dassembler.h178 ldr \dst, [\dst, :lo12:\sym]
181 ldr \dst, [\tmp, :lo12:\sym]
/linux-4.4.14/arch/arm/boot/bootp/
Dinit.S40 ldr r10, [r9, #4] @ get first tag
54 taglist: ldr r10, [r9, #0] @ tag length
/linux-4.4.14/arch/arm/common/
Dvlock.S78 MANY( ldr r2, [r0, r3] )
79 FEW( ldr r2, [r0, #VLOCK_VOTING_OFFSET] )
Dmcpm_head.S79 ldr r7, [r5, r7] @ r7 = mcpm_power_up_setup_phys
196 ldr r5, [r6, r4, lsl #2] @ r5 = CPU entry vector
/linux-4.4.14/arch/arm/mach-berlin/
Dheadsmp.S22 ldr pc, [pc, #140]
/linux-4.4.14/arch/arm/vdso/
Ddatapage.S11 ldr r1, [r0]
/linux-4.4.14/drivers/scsi/arm/
Dacornscsi-io.S67 ldr r3, [r0], #4
123 ldr r4, [r1], #4
133 ldr r3, [r1], #2
/linux-4.4.14/arch/arm/mach-zynq/
Dheadsmp.S15 ldr r0, zynq_secondary_trampoline_jump
/linux-4.4.14/arch/arm/mach-zx/
Dheadsmp.S18 ldr r0, [r1]
/linux-4.4.14/arch/arm/mach-sti/
Dheadsmp.S31 pen: ldr r7, [r6]
/linux-4.4.14/arch/arm/plat-versatile/
Dheadsmp.S28 pen: ldr r7, [r6]
/linux-4.4.14/drivers/net/wireless/
Datmel.c4348 ldr r0, =SPI_CGEN_BASE
4353 ldr r1, [r0, #28]
4359 ldr r0, =MRBASE
4372 ldr r0, =MRBASE
4373 ldr r1, =MAC_ADDRESS_MIB
4375 ldr r1, =NVRAM_IMAGE
4386 ldr r0, =NVRAM_IMAGE
4398 ldr r0, =MAC_ADDRESS_MIB
4418 ldr r0, =SP_BASE
4427 ldr r3, =SPI_CGEN_BASE
[all …]
/linux-4.4.14/arch/arm/mach-footbridge/include/mach/
Ddebug-macro.S36 1001: ldr \rd, [\rx, #0x178] @ UARTFLG
/linux-4.4.14/arch/arm/mach-spear/
Dheadsmp.S30 pen: ldr r7, [r6]
/linux-4.4.14/tools/perf/arch/arm64/tests/
Dregs_load.S6 #define LDR_REG(r) ldr x##r, [x0, 8 * r]
/linux-4.4.14/arch/arm/include/asm/hardware/
Dentry-macro-iomd.S16 ldr \tmp, =irq_prio_h

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