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Searched refs:intc (Results 1 – 200 of 216) sorted by relevance

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/linux-4.1.27/drivers/irqchip/
Dirq-bcm7038-l1.c79 static inline unsigned int reg_status(struct bcm7038_l1_chip *intc, in reg_status() argument
82 return (0 * intc->n_words + word) * sizeof(u32); in reg_status()
85 static inline unsigned int reg_mask_status(struct bcm7038_l1_chip *intc, in reg_mask_status() argument
88 return (1 * intc->n_words + word) * sizeof(u32); in reg_mask_status()
91 static inline unsigned int reg_mask_set(struct bcm7038_l1_chip *intc, in reg_mask_set() argument
94 return (2 * intc->n_words + word) * sizeof(u32); in reg_mask_set()
97 static inline unsigned int reg_mask_clr(struct bcm7038_l1_chip *intc, in reg_mask_clr() argument
100 return (3 * intc->n_words + word) * sizeof(u32); in reg_mask_clr()
121 struct bcm7038_l1_chip *intc = irq_desc_get_handler_data(desc); in bcm7038_l1_irq_handle() local
127 cpu = intc->cpus[cpu_logical_map(smp_processor_id())]; in bcm7038_l1_irq_handle()
[all …]
Dirq-moxart.c45 static struct moxart_irq_data intc; variable
52 irqstat = readl(intc.base + IRQ_STATUS_REG); in handle_irq()
56 handle_IRQ(irq_linear_revmap(intc.domain, hwirq), regs); in handle_irq()
68 intc.base = of_iomap(node, 0); in moxart_of_intc_init()
69 if (!intc.base) { in moxart_of_intc_init()
75 intc.domain = irq_domain_add_linear(node, 32, &irq_generic_chip_ops, in moxart_of_intc_init()
76 intc.base); in moxart_of_intc_init()
77 if (!intc.domain) { in moxart_of_intc_init()
82 ret = irq_alloc_domain_generic_chips(intc.domain, 32, 1, in moxart_of_intc_init()
88 irq_domain_remove(intc.domain); in moxart_of_intc_init()
[all …]
Dirq-s3c24xx.c56 struct s3c_irq_intc *intc; member
90 struct s3c_irq_intc *intc = irq_data->intc; in s3c_irq_mask() local
91 struct s3c_irq_intc *parent_intc = intc->parent; in s3c_irq_mask()
96 mask = __raw_readl(intc->reg_mask); in s3c_irq_mask()
98 __raw_writel(mask, intc->reg_mask); in s3c_irq_mask()
118 struct s3c_irq_intc *intc = irq_data->intc; in s3c_irq_unmask() local
119 struct s3c_irq_intc *parent_intc = intc->parent; in s3c_irq_unmask()
123 mask = __raw_readl(intc->reg_mask); in s3c_irq_unmask()
125 __raw_writel(mask, intc->reg_mask); in s3c_irq_unmask()
137 struct s3c_irq_intc *intc = irq_data->intc; in s3c_irq_ack() local
[all …]
Dirq-bcm2835.c97 static struct armctrl_ic intc __read_mostly;
103 writel_relaxed(HWIRQ_BIT(d->hwirq), intc.disable[HWIRQ_BANK(d->hwirq)]); in armctrl_mask_irq()
108 writel_relaxed(HWIRQ_BIT(d->hwirq), intc.enable[HWIRQ_BANK(d->hwirq)]); in armctrl_unmask_irq()
153 intc.domain = irq_domain_add_linear(node, MAKE_HWIRQ(NR_BANKS, 0), in armctrl_of_init()
155 if (!intc.domain) in armctrl_of_init()
159 intc.pending[b] = base + reg_pending[b]; in armctrl_of_init()
160 intc.enable[b] = base + reg_enable[b]; in armctrl_of_init()
161 intc.disable[b] = base + reg_disable[b]; in armctrl_of_init()
164 irq = irq_create_mapping(intc.domain, MAKE_HWIRQ(b, i)); in armctrl_of_init()
186 while ((stat = readl_relaxed(intc.pending[bank]))) { in armctrl_handle_bank()
[all …]
Dirq-vt8500.c81 static struct vt8500_irq_data intc[VT8500_INTC_MAX]; variable
189 base = intc[i].base; in vt8500_handle_irq()
201 handle_domain_irq(intc[i].domain, irqnr, regs); in vt8500_handle_irq()
217 intc[active_cnt].base = of_iomap(np, 0); in vt8500_irq_init()
218 intc[active_cnt].domain = irq_domain_add_linear(node, 64, in vt8500_irq_init()
219 &vt8500_irq_domain_ops, &intc[active_cnt]); in vt8500_irq_init()
221 if (!intc[active_cnt].base) { in vt8500_irq_init()
226 if (!intc[active_cnt].domain) { in vt8500_irq_init()
233 vt8500_init_irq_hw(intc[active_cnt].base); in vt8500_irq_init()
Dirq-hip04.c207 static u16 hip04_get_cpumask(struct hip04_irq_data *intc) in hip04_get_cpumask() argument
209 void __iomem *base = intc->dist_base; in hip04_get_cpumask()
225 static void __init hip04_irq_dist_init(struct hip04_irq_data *intc) in hip04_irq_dist_init() argument
229 unsigned int nr_irqs = intc->nr_irqs; in hip04_irq_dist_init()
230 void __iomem *base = intc->dist_base; in hip04_irq_dist_init()
237 cpumask = hip04_get_cpumask(intc); in hip04_irq_dist_init()
247 static void hip04_irq_cpu_init(struct hip04_irq_data *intc) in hip04_irq_cpu_init() argument
249 void __iomem *dist_base = intc->dist_base; in hip04_irq_cpu_init()
250 void __iomem *base = intc->cpu_base; in hip04_irq_cpu_init()
258 cpu_mask = hip04_get_cpumask(intc); in hip04_irq_cpu_init()
DMakefile18 obj-$(CONFIG_OMAP_IRQCHIP) += irq-omap-intc.o
32 obj-$(CONFIG_RENESAS_INTC_IRQPIN) += irq-renesas-intc-irqpin.o
/linux-4.1.27/arch/m68k/coldfire/
DMakefile18 obj-$(CONFIG_M5206) += m5206.o timers.o intc.o reset.o
19 obj-$(CONFIG_M5206e) += m5206.o timers.o intc.o reset.o
20 obj-$(CONFIG_M520x) += m520x.o pit.o intc-simr.o reset.o
21 obj-$(CONFIG_M523x) += m523x.o pit.o dma_timer.o intc-2.o reset.o
22 obj-$(CONFIG_M5249) += m5249.o timers.o intc.o intc-5249.o reset.o
23 obj-$(CONFIG_M525x) += m525x.o timers.o intc.o intc-525x.o reset.o
24 obj-$(CONFIG_M527x) += m527x.o pit.o intc-2.o reset.o
25 obj-$(CONFIG_M5272) += m5272.o intc-5272.o timers.o
26 obj-$(CONFIG_M528x) += m528x.o pit.o intc-2.o reset.o
27 obj-$(CONFIG_M5307) += m5307.o timers.o intc.o reset.o
[all …]
/linux-4.1.27/Documentation/devicetree/bindings/arm/mrvl/
Dintc.txt4 - compatible : Should be "mrvl,mmp-intc", "mrvl,mmp2-intc" or
5 "mrvl,mmp2-mux-intc"
7 If the interrupt controller is intc, address and length means the range
8 of the whold interrupt controller. If the interrupt controller is mux-intc,
9 address and length means one register. Since address of mux-intc is in the
10 range of intc. mux-intc is secondary interrupt controller.
12 only required in mux-intc interrupt controller.
14 only required in mux-intc interrupt controller.
18 - mrvl,intc-nr-irqs : Specifies the number of interrupts in the interrupt
24 intc: interrupt-controller@d4282000 {
[all …]
/linux-4.1.27/Documentation/devicetree/bindings/interrupt-controller/
Dti,omap-intc-irq.txt1 Omap2/3 intc controller
3 On TI omap2 and 3 the intc interrupt controller can provide
8 "ti,omap2-intc"
9 "ti,omap3-intc"
10 "ti,dm814-intc"
11 "ti,dm816-intc"
12 "ti,am33xx-intc"
16 source, should be 1 for intc
23 intc: interrupt-controller@48200000 {
24 compatible = "ti,omap3-intc";
Drenesas,intc-irqpin.txt5 - compatible: has to be "renesas,intc-irqpin-<soctype>", "renesas,intc-irqpin"
8 - "renesas,intc-irqpin-r8a7740" (R-Mobile A1)
9 - "renesas,intc-irqpin-r8a7778" (R-Car M1A)
10 - "renesas,intc-irqpin-r8a7779" (R-Car H1)
11 - "renesas,intc-irqpin-sh73a0" (SH-Mobile AG5)
Dmarvell,orion-intc.txt6 - compatible: shall be "marvell,orion-intc"
18 intc: interrupt-controller {
19 compatible = "marvell,orion-intc";
29 - compatible: shall be "marvell,orion-bridge-intc"
41 compatible = "marvell,orion-bridge-intc";
Dbrcm,l2-intc.txt5 - compatible: should be "brcm,l2-intc"
23 compatible = "brcm,l2-intc";
27 interrupt-parent = <&intc>;
Dcirrus,clps711x-intc.txt5 - compatible: Should be "cirrus,clps711x-intc".
36 intc: interrupt-controller {
37 compatible = "cirrus,clps711x-intc";
Dlsi,zevio-intc.txt4 - compatible: Compatible property value should be "lsi,zevio-intc".
14 compatible = "lsi,zevio-intc";
Dabilis,tb10x-ictl.txt24 intc: interrupt-controller { /* Parent interrupt controller */
35 interrupt-parent = <&intc>;
Dbrcm,bcm3380-l2-intc.txt15 - compatible: should be "brcm,bcm3380-l2-intc"
34 compatible = "brcm,bcm3380-l2-intc";
Dbrcm,bcm7120-l2-intc.txt54 - compatible: should be "brcm,bcm7120-l2-intc"
82 compatible = "brcm,bcm7120-l2-intc";
83 interrupt-parent = <&intc>;
Dbrcm,bcm7038-l1-intc.txt25 - compatible: should be "brcm,bcm7038-l1-intc"
44 compatible = "brcm,bcm7038-l1-intc";
Dallwinner,sun4i-ic.txt13 intc: interrupt-controller {
Ddigicolor-ic.txt15 intc: interrupt-controller@f0000040 {
Dopencores,or1k-pic.txt19 intc: interrupt-controller {
Dinterrupts.txt51 vic: intc@10140000 {
58 sic: intc@10003000 {
Dallwinner,sun67i-sc-nmi.txt20 sc-nmi-intc@01c00030 {
Dsamsung,s3c24xx-irq.txt51 interrupt-parent = <&intc>;
Dnvidia,tegra-ictlr.txt42 interrupt-parent = <&intc>;
Dbrcm,bcm2835-armctrl-ic.txt105 intc: interrupt-controller {
/linux-4.1.27/arch/arm/boot/dts/
Dmmp2.dtsi27 interrupt-parent = <&intc>;
42 intc: interrupt-controller@d4282000 { label
43 compatible = "mrvl,mmp2-intc";
47 mrvl,intc-nr-irqs = <64>;
51 compatible = "mrvl,mmp2-mux-intc";
57 mrvl,intc-nr-irqs = <2>;
61 compatible = "mrvl,mmp2-mux-intc";
67 mrvl,intc-nr-irqs = <2>;
72 compatible = "mrvl,mmp2-mux-intc";
78 mrvl,intc-nr-irqs = <3>;
[all …]
Dzynq-7000.dtsi47 interrupt-parent = <&intc>;
64 interrupt-parent = <&intc>;
71 interrupt-parent = <&intc>;
82 interrupt-parent = <&intc>;
94 interrupt-parent = <&intc>;
104 interrupt-parent = <&intc>;
113 interrupt-parent = <&intc>;
124 interrupt-parent = <&intc>;
131 intc: interrupt-controller@f8f01000 { label
175 interrupt-parent = <&intc>;
[all …]
Dvf500.dtsi29 intc: interrupt-controller@40002000 { label
33 interrupt-parent = <&intc>;
42 interrupt-parent = <&intc>;
50 interrupt-parent = <&intc>;
Dpxa168.dtsi26 interrupt-parent = <&intc>;
36 intc: interrupt-controller@d4282000 { label
37 compatible = "mrvl,mmp-intc";
41 mrvl,intc-nr-irqs = <64>;
Dpxa3xx.dtsi28 marvell,intc-priority;
29 marvell,intc-nr-irqs = <56>;
Dpxa910.dtsi26 interrupt-parent = <&intc>;
41 intc: interrupt-controller@d4282000 { label
42 compatible = "mrvl,mmp-intc";
46 mrvl,intc-nr-irqs = <64>;
Dstih41x.dtsi27 intc: interrupt-controller@fffe1000 { label
41 interrupt-parent = <&intc>;
Dvt8500.dtsi36 interrupt-parent = <&intc>;
38 intc: interrupt-controller@d8140000 { label
39 compatible = "via,vt8500-intc";
Dpxa27x.dtsi11 marvell,intc-priority;
12 marvell,intc-nr-irqs = <34>;
Dorion5x.dtsi16 interrupt-parent = <&intc>;
122 compatible = "marvell,orion-bridge-intc";
130 intc: interrupt-controller@20200 { label
131 compatible = "marvell,orion-intc";
Dnspire-classic.dtsi69 intc: interrupt-controller@DC000000 { label
70 compatible = "lsi,zevio-intc";
Ds3c24xx.dtsi15 interrupt-parent = <&intc>;
24 intc:interrupt-controller@4a000000 { label
Domap3.dtsi19 interrupt-parent = <&intc>;
186 intc: interrupt-controller@48200000 { label
187 compatible = "ti,omap3-intc";
286 interrupts-extended = <&intc 72>;
296 interrupts-extended = <&intc 73>;
306 interrupts-extended = <&intc 74>;
702 interrupt-parent = <&intc>;
709 interrupt-parent = <&intc>;
814 interrupt-parent = <&intc>;
827 interrupt-parent = <&intc>;
Dpxa2xx.dtsi42 compatible = "marvell,pxa-intc";
45 marvell,intc-nr-irqs = <32>;
Dda850.dtsi18 intc: interrupt-controller { label
19 compatible = "ti,cp-intc";
22 ti,intc-size = <100>;
32 interrupt-parent = <&intc>;
Dr8a7740.dtsi71 compatible = "renesas,intc-irqpin-r8a7740", "renesas,intc-irqpin";
93 compatible = "renesas,intc-irqpin-r8a7740", "renesas,intc-irqpin";
115 compatible = "renesas,intc-irqpin-r8a7740", "renesas,intc-irqpin";
137 compatible = "renesas,intc-irqpin-r8a7740", "renesas,intc-irqpin";
Dam33xx.dtsi18 interrupt-parent = <&intc>;
152 intc: interrupt-controller@48200000 { label
153 compatible = "ti,am33xx-intc";
312 interrupt-parent = <&intc>;
325 interrupt-parent = <&intc>;
335 interrupt-parent = <&intc>;
721 interrupt-parent = <&intc>;
784 interrupt-parent = <&intc>;
793 interrupt-parent = <&intc>;
Dmoxart.dtsi13 interrupt-parent = <&intc>;
38 intc: interrupt-controller@98800000 { label
Domap3-cm-t3x30.dtsi68 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
69 interrupt-parent = <&intc>;
Ddove.dtsi11 interrupt-parent = <&intc>;
57 msi-parent = <&intc>;
82 interrupt-map = <0 0 0 0 &intc 16>;
100 interrupt-map = <0 0 0 0 &intc 18>;
198 compatible = "marvell,orion-bridge-intc";
206 intc: main-interrupt-ctrl@20200 { label
207 compatible = "marvell,orion-intc";
Domap3-evm-common.dtsi41 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
42 interrupt-parent = <&intc>;
Domap3-evm-37xx.dts143 interrupts-extended = <&intc 72 &omap3_pmx_core OMAP3_UART1_RX>;
147 interrupts-extended = <&intc 73 &omap3_pmx_core OMAP3_UART2_RX>;
151 interrupts-extended = <&intc 74 &omap3_pmx_core OMAP3_UART3_RX>;
Dkirkwood.dtsi9 interrupt-parent = <&intc>;
211 compatible = "marvell,orion-bridge-intc";
231 intc: main-interrupt-ctrl@20200 { label
232 compatible = "marvell,orion-intc";
Dkirkwood-6282.dtsi32 interrupt-map = <0 0 0 0 &intc 9>;
49 interrupt-map = <0 0 0 0 &intc 10>;
Dam3517-craneboard.dts89 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
90 interrupt-parent = <&intc>;
Domap2.dtsi19 interrupt-parent = <&intc>;
74 intc: interrupt-controller@1 { label
75 compatible = "ti,omap2-intc";
Dbcm2835.dtsi6 interrupt-parent = <&intc>;
46 intc: interrupt-controller@7e00b200 { label
Dsh73a0.dtsi94 compatible = "renesas,intc-irqpin-sh73a0", "renesas,intc-irqpin";
116 compatible = "renesas,intc-irqpin-sh73a0", "renesas,intc-irqpin";
138 compatible = "renesas,intc-irqpin-sh73a0", "renesas,intc-irqpin";
160 compatible = "renesas,intc-irqpin-sh73a0", "renesas,intc-irqpin";
Dr8a7779-marzen.dts180 intc {
182 renesas,function = "intc";
Domap3-ldp.dts162 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
163 interrupt-parent = <&intc>;
289 interrupts-extended = <&intc 74 &omap3_pmx_core OMAP3_UART3_RX>;
Dstih407-family.dtsi30 intc: interrupt-controller@08761000 { label
43 interrupt-parent = <&intc>;
62 interrupt-parent = <&intc>;
Dkirkwood-98dx4122.dtsi28 interrupt-map = <0 0 0 0 &intc 9>;
Dqcom-msm8660.dtsi12 interrupt-parent = <&intc>;
46 intc: interrupt-controller@2080000 { label
Domap3-n950-n9.dtsi54 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
55 interrupt-parent = <&intc>;
Dcx92755.dtsi52 interrupt-parent = <&intc>;
70 intc: interrupt-controller@f0000040 { label
Dwm8650.dtsi37 compatible = "via,vt8500-intc";
45 compatible = "via,vt8500-intc";
Domap3-beagle-xm.dts272 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
273 interrupt-parent = <&intc>;
335 interrupts-extended = <&intc 74 &omap3_pmx_core OMAP3_UART3_RX>;
Dsocfpga_arria10.dtsi54 intc: intc@ffffd000 { label
67 interrupt-parent = <&intc>;
Domap3-igep.dtsi158 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
159 interrupt-parent = <&intc>;
Domap3-zoom3.dts148 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
149 interrupt-parent = <&intc>;
Domap3-beagle.dts266 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
267 interrupt-parent = <&intc>;
321 interrupts-extended = <&intc 74 &omap3_pmx_core OMAP3_UART3_RX>;
Dversatile-ab.dts96 vic: intc@10140000 {
105 sic: intc@10003000 {
Dqcom-msm8960.dtsi12 interrupt-parent = <&intc>;
57 intc: interrupt-controller@2000000 { label
Dwm8505.dtsi41 compatible = "via,vt8500-intc";
49 compatible = "via,vt8500-intc";
Domap3-overo-base.dtsi156 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
157 interrupt-parent = <&intc>;
Dwm8850.dtsi40 compatible = "via,vt8500-intc";
48 compatible = "via,vt8500-intc";
Dkirkwood-6281.dtsi28 interrupt-map = <0 0 0 0 &intc 9>;
Dkirkwood-6192.dtsi28 interrupt-map = <0 0 0 0 &intc 9>;
Domap2430-sdp.dts27 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
Dwm8750.dtsi43 compatible = "via,vt8500-intc";
51 compatible = "via,vt8500-intc";
Dqcom-apq8084.dtsi11 interrupt-parent = <&intc>;
98 intc: interrupt-controller@f9000000 { label
Dtegra20.dtsi145 interrupt-parent = <&intc>;
152 intc: interrupt-controller@50041000 { label
158 interrupt-parent = <&intc>;
178 interrupt-parent = <&intc>;
586 interrupt-map = <0 0 0 0 &intc GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
Ddm816x.dtsi14 interrupt-parent = <&intc>;
209 intc: interrupt-controller@48200000 { label
210 compatible = "ti,dm816-intc";
Dnspire-cx.dts95 intc: interrupt-controller@DC000000 { label
Domap3-overo-common-peripherals.dtsi91 interrupts-extended = <&intc 74 &omap3_pmx_core OMAP3_UART3_RX>;
Dqcom-msm8974.dtsi10 interrupt-parent = <&intc>;
98 intc: interrupt-controller@f9000000 { label
Dqcom-ipq8064.dtsi11 interrupt-parent = <&intc>;
104 intc: interrupt-controller@2000000 { label
Dtegra30.dtsi26 interrupt-map = <0 0 0 0 &intc GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
231 interrupt-parent = <&intc>;
237 intc: interrupt-controller@50041000 { label
243 interrupt-parent = <&intc>;
264 interrupt-parent = <&intc>;
Decx-2000.dts94 intc: interrupt-controller@fff11000 { label
Dbcm7445.dtsi101 compatible = "brcm,bcm7120-l2-intc";
Dimx6qdl.dtsi50 intc: interrupt-controller@00a01000 { label
56 interrupt-parent = <&intc>;
126 interrupt-parent = <&intc>;
706 interrupt-parent = <&intc>;
900 <&intc 0 118 IRQ_TYPE_LEVEL_HIGH>,
901 <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>;
Domap3-tao3530.dtsi178 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
179 interrupt-parent = <&intc>;
Datlas6.dtsi14 interrupt-parent = <&intc>;
53 intc: interrupt-controller@80020000 { label
56 compatible = "sirf,prima2-intc";
Domap3-pandora-common.dtsi324 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
325 interrupt-parent = <&intc>;
492 interrupts-extended = <&intc 74 &omap3_pmx_core OMAP3_UART3_RX>;
Domap3-devkit8000.dts64 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
Dnspire.dtsi15 interrupt-parent = <&intc>;
Dhighbank.dts109 intc: interrupt-controller@fff11000 { label
Dqcom-apq8064.dtsi12 interrupt-parent = <&intc>;
117 intc: interrupt-controller@2000000 { label
Dpxa910-dkb.dts37 interrupt-parent = <&intc>;
Dprima2.dtsi14 interrupt-parent = <&intc>;
64 intc: interrupt-controller@80020000 { label
67 compatible = "sirf,prima2-intc";
Dsocfpga.dtsi54 intc: intc@fffed000 { label
67 interrupt-parent = <&intc>;
Dimx6q-arm2.dts187 <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>;
Dimx6qdl-wandboard.dtsi213 <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>;
Domap3-gta04.dtsi237 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
238 interrupt-parent = <&intc>;
Domap3-lilly-a83x.dtsi221 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
222 interrupt-parent = <&intc>;
Domap3-n900.dts319 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
320 interrupt-parent = <&intc>;
900 interrupts-extended = <&intc 73 &omap3_pmx_core OMAP3_UART2_RX>;
906 interrupts-extended = <&intc 74 &omap3_pmx_core OMAP3_UART3_RX>;
Domap3430-sdp.dts27 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
Dr8a7779.dtsi152 compatible = "renesas,intc-irqpin-r8a7779", "renesas,intc-irqpin";
Decx-common.dtsi34 interrupt-parent = <&intc>;
Dr8a7791-henninger.dts101 renesas,function = "intc";
Dimx6sl.dtsi69 intc: interrupt-controller@00a01000 { label
75 interrupt-parent = <&intc>;
610 interrupt-parent = <&intc>;
Dstih415.dtsi28 interrupt-parent = <&intc>;
Dr8a7740-armadillo800eva.dts239 renesas,function = "intc";
Dr8a7778.dtsi72 compatible = "renesas,intc-irqpin-r8a7778", "renesas,intc-irqpin";
Dste-dbx5x0.dtsi22 interrupt-parent = <&intc>;
25 intc: interrupt-controller@a0411000 { label
432 interrupt-parent = <&intc>;
Dsun5i-a13.dtsi22 interrupt-parent = <&intc>;
472 intc: interrupt-controller@01c20400 { label
Dsun5i-a10s.dtsi20 interrupt-parent = <&intc>;
465 intc: interrupt-controller@01c20400 { label
Dimx6qdl-sabrelite.dtsi172 <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>;
Dimx6qdl-nitrogen6x.dtsi173 <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>;
Dimx6qdl-sabreauto.dtsi69 <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>;
Dste-nomadik-stn8815.dtsi728 vica: intc@10140000 {
735 vicb: intc@10140020 {
Dimx6sx.dtsi85 intc: interrupt-controller@00a01000 { label
91 interrupt-parent = <&intc>;
707 interrupt-parent = <&intc>;
Dimx6dl-riotboard.dts99 <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>;
Dsun4i-a10.dtsi21 interrupt-parent = <&intc>;
623 intc: interrupt-controller@01c20400 { label
Dr8a7790-lager.dts304 renesas,function = "intc";
/linux-4.1.27/Documentation/devicetree/bindings/arm/omap/
Dintc.txt9 "ti,omap2-intc"
15 - ti,intc-size: Number of interrupts handled by the interrupt controller.
16 - reg: physical base address and size of the intc registers map.
20 intc: interrupt-controller@1 {
21 compatible = "ti,omap2-intc";
24 ti,intc-size = <96>;
/linux-4.1.27/Documentation/devicetree/bindings/arm/davinci/
Dcp-intc.txt10 "ti,cp-intc"
16 - ti,intc-size: Number of interrupts handled by the interrupt controller.
17 - reg: physical base address and size of the intc registers map.
21 intc: interrupt-controller@1 {
22 compatible = "ti,cp-intc";
25 ti,intc-size = <101>;
/linux-4.1.27/arch/mips/boot/dts/ralink/
Drt3050.dtsi32 intc: intc@200 { label
33 compatible = "ralink,rt3052-intc", "ralink,rt2880-intc";
52 interrupt-parent = <&intc>;
63 interrupt-parent = <&intc>;
Drt3883.dtsi32 intc: intc@200 { label
33 compatible = "ralink,rt3883-intc", "ralink,rt2880-intc";
52 interrupt-parent = <&intc>;
Dmt7620a.dtsi32 intc: intc@200 { label
33 compatible = "ralink,mt7620a-intc", "ralink,rt2880-intc";
52 interrupt-parent = <&intc>;
Drt2880.dtsi32 intc: intc@200 { label
33 compatible = "ralink,rt2880-intc";
52 interrupt-parent = <&intc>;
/linux-4.1.27/Documentation/devicetree/bindings/arc/
Dinterrupts.txt8 - compatible: "snps,arc700-intc"
15 intc accessed via the special ARC AUX register interface, hence "reg" property
20 intc: interrupt-controller {
21 compatible = "snps,arc700-intc";
/linux-4.1.27/Documentation/devicetree/bindings/cris/
Dinterrupts.txt8 "axis,crisv32-intc"
12 - reg: physical base address and size of the intc registers map.
16 intc: interrupt-controller {
17 compatible = "axis,crisv32-intc";
/linux-4.1.27/arch/microblaze/kernel/
Dintc.c139 static int __init xilinx_intc_of_init(struct device_node *intc, in xilinx_intc_of_init() argument
145 intc_baseaddr = of_iomap(intc, 0); in xilinx_intc_of_init()
148 ret = of_property_read_u32(intc, "xlnx,num-intr-inputs", &nr_irq); in xilinx_intc_of_init()
154 ret = of_property_read_u32(intc, "xlnx,kind-of-intr", &intr_mask); in xilinx_intc_of_init()
164 intc->full_name, nr_irq, intr_mask); in xilinx_intc_of_init()
189 root_domain = irq_domain_add_linear(intc, nr_irq, &xintc_irq_domain_ops, in xilinx_intc_of_init()
DMakefile18 hw_exception_handler.o intc.o irq.o \
/linux-4.1.27/Documentation/devicetree/bindings/arm/vt8500/
Dvia,vt8500-intc.txt5 - compatible : "via,vt8500-intc"
11 intc: interrupt-controller@d8140000 {
12 compatible = "via,vt8500-intc";
/linux-4.1.27/Documentation/devicetree/bindings/mips/
Dcpu_irq.txt25 intc: intc@200 {
26 compatible = "ralink,rt2880-intc";
40 { .compatible = "ralink,rt2880-intc", .data = intc_of_init },
/linux-4.1.27/arch/cris/boot/dts/
Detraxfs.dtsi4 interrupt-parent = <&intc>;
24 intc: interrupt-controller { label
25 compatible = "axis,crisv32-intc";
/linux-4.1.27/Documentation/devicetree/bindings/pci/
Dfsl,imx6q-pcie.txt34 interrupt-map = <0 0 0 1 &intc GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
35 <0 0 0 2 &intc GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
36 <0 0 0 3 &intc GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
37 <0 0 0 4 &intc GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
Dnvidia,tegra20-pcie.txt142 interrupt-map = <0 0 0 0 &intc GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
/linux-4.1.27/arch/metag/boot/dts/
Dtz1090.dtsi16 interrupt-parent = <&intc>;
18 intc: interrupt-controller { label
19 compatible = "img,meta-intc";
36 compatible = "img,pdc-intc";
/linux-4.1.27/Documentation/devicetree/bindings/metag/
Dmeta-intc.txt9 The type shall be <string> and the value shall include "img,meta-intc".
46 intc: intc {
65 compatible = "img,meta-intc";
81 interrupt-parent = <&intc>;
Dpdc-intc.txt11 The type shall be <string> and the value shall include "img,pdc-intc".
65 compatible = "img,pdc-intc";
/linux-4.1.27/arch/arc/boot/dts/
Dangel4.dts17 interrupt-parent = <&intc>;
35 intc: interrupt-controller { label
36 compatible = "snps,arc700-intc";
Dnsimosci.dts17 interrupt-parent = <&intc>;
38 intc: interrupt-controller { label
39 compatible = "snps,arc700-intc";
Dabilis_tb10x.dtsi70 intc: interrupt-controller { label
71 compatible = "snps,arc700-intc";
80 interrupt-parent = <&intc>;
/linux-4.1.27/arch/mips/boot/dts/brcm/
Dbcm3384_zephyr.dtsi63 compatible = "brcm,bcm3380-l2-intc";
75 compatible = "brcm,bcm3380-l2-intc";
87 compatible = "brcm,bcm3380-l2-intc";
Dbcm7125.dtsi53 compatible = "brcm,bcm7038-l1-intc";
64 compatible = "brcm,l2-intc";
85 compatible = "brcm,bcm7120-l2-intc";
Dbcm7360.dtsi47 compatible = "brcm,bcm7038-l1-intc";
58 compatible = "brcm,l2-intc";
79 compatible = "brcm,bcm7120-l2-intc";
Dbcm7358.dtsi47 compatible = "brcm,bcm7038-l1-intc";
58 compatible = "brcm,l2-intc";
79 compatible = "brcm,bcm7120-l2-intc";
Dbcm7362.dtsi53 compatible = "brcm,bcm7038-l1-intc";
64 compatible = "brcm,l2-intc";
85 compatible = "brcm,bcm7120-l2-intc";
Dbcm7420.dtsi53 compatible = "brcm,bcm7038-l1-intc";
64 compatible = "brcm,l2-intc";
86 compatible = "brcm,bcm7120-l2-intc";
Dbcm3384_viper.dtsi57 compatible = "brcm,bcm3380-l2-intc";
69 compatible = "brcm,bcm3380-l2-intc";
Dbcm7425.dtsi53 compatible = "brcm,bcm7038-l1-intc";
64 compatible = "brcm,l2-intc";
87 compatible = "brcm,bcm7120-l2-intc";
Dbcm7346.dtsi53 compatible = "brcm,bcm7038-l1-intc";
64 compatible = "brcm,l2-intc";
85 compatible = "brcm,bcm7120-l2-intc";
Dbcm6328.dtsi53 compatible = "brcm,bcm3380-l2-intc";
Dbcm6368.dtsi54 compatible = "brcm,bcm3380-l2-intc";
/linux-4.1.27/Documentation/devicetree/bindings/net/can/
Dxilinx_can.txt30 interrupt-parent = <&intc>;
40 interrupt-parent = <&intc>;
Dc_can.txt35 interrupt-parent = <&intc>;
46 interrupt-parent = <&intc>;
Dcc770.txt8 - compatible : should be "bosch,cc770" for the CC770 and "intc,82527"
/linux-4.1.27/Documentation/devicetree/bindings/mfd/
Dtwl4030-audio.txt32 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
33 interrupt-parent = <&intc>;
Dtwl4030-power.txt40 interrupts = <7>; /* SYS_NIRQ cascaded to intc */
41 interrupt-parent = <&intc>;
Dpalmas.txt39 interrupt-parent = <&intc>;
D88pm860x.txt34 interrupt-parent = <&intc>;
Dda9055.txt53 interrupt-parent = <&intc>;
Dtps65910.txt75 interrupt-parent = <&intc>;
Das3722.txt142 interrupt-parent = <&intc>;
/linux-4.1.27/arch/arc/kernel/
Dirq.c101 init_onchip_IRQ(struct device_node *intc, struct device_node *parent) in init_onchip_IRQ() argument
106 root_domain = irq_domain_add_legacy(intc, NR_CPU_IRQS, 0, 0, in init_onchip_IRQ()
/linux-4.1.27/arch/sh/kernel/cpu/sh4a/
DMakefile11 obj-$(CONFIG_CPU_SUBTYPE_SH7786) += setup-sh7786.o intc-shx3.o
18 obj-$(CONFIG_CPU_SUBTYPE_SHX3) += setup-shx3.o intc-shx3.o
/linux-4.1.27/arch/avr32/mach-at32ap/
Dintc.c22 struct intc { struct
47 static struct intc intc0 = { argument
DMakefile1 obj-y += pdc.o clock.o intc.o extint.o pio.o hsmc.o
/linux-4.1.27/drivers/sh/
DKconfig3 source "drivers/sh/intc/Kconfig"
DMakefile4 obj-$(CONFIG_SH_INTC) += intc/
/linux-4.1.27/arch/sh/kernel/cpu/irq/
DMakefile5 obj-$(CONFIG_CPU_SH5) += intc-sh5.o
/linux-4.1.27/arch/mips/include/asm/
Dtxx9pio.h21 __u32 intc; member
/linux-4.1.27/Documentation/devicetree/bindings/timer/
Dcadence,ttc-timer.txt12 interrupt-parent = <&intc>;
/linux-4.1.27/Documentation/devicetree/bindings/watchdog/
Drt2880-wdt.txt17 interrupt-parent = <&intc>;
Dcadence-wdt.txt19 interrupt-parent = <&intc>;
/linux-4.1.27/Documentation/devicetree/bindings/xillybus/
Dxillybus.txt19 interrupt-parent = <&intc>;
/linux-4.1.27/Documentation/devicetree/bindings/hsi/
Domap-ssi.txt76 interrupt-parent = <&intc>;
91 interrupt-parent = <&intc>;
/linux-4.1.27/Documentation/devicetree/bindings/serial/
Dqca,ar9330-uart.txt32 interrupt-parent = <&intc>;
/linux-4.1.27/Documentation/devicetree/bindings/gpio/
Dgpio-zynq.txt23 interrupt-parent = <&intc>;
Dgpio-davinci.txt36 interrupt-parent = <&intc>;
/linux-4.1.27/Documentation/devicetree/bindings/i2c/
Di2c-jz4780.txt25 interrupt-parent = <&intc>;
Di2c-davinci.txt23 interrupt-parent = <&intc>;
/linux-4.1.27/arch/arm64/boot/dts/qcom/
Dmsm8916.dtsi22 interrupt-parent = <&intc>;
130 intc: interrupt-controller@b000000 { label
/linux-4.1.27/Documentation/devicetree/bindings/drm/tilcdc/
Dtilcdc.txt26 interrupt-parent = <&intc>;
/linux-4.1.27/Documentation/devicetree/bindings/rtc/
Drtc-omap.txt26 interrupt-parent = <&intc>;
/linux-4.1.27/Documentation/devicetree/bindings/input/
De3x0-button.txt22 interrupt-parent = <&intc>;
/linux-4.1.27/arch/powerpc/boot/dts/
Dtqm8xx.dts74 compatible = "intc,82527";
86 compatible = "intc,82527";
Dmpc8379_rdb.dts418 /* IDSEL AD28 IRQ7 inta, IRQ5 intb IRQ6 intc*/
/linux-4.1.27/Documentation/devicetree/bindings/spi/
Dspi-cadence.txt26 interrupt-parent = <&intc>;
/linux-4.1.27/Documentation/devicetree/bindings/dma/
Dti-edma.txt28 interrupt-parent = <&intc>;
Djz4780-dma.txt27 interrupt-parent = <&intc>;
Dste-dma40.txt22 interrupt-parent = <&intc>;
/linux-4.1.27/Documentation/devicetree/bindings/sound/
Domap-mcbsp.txt34 interrupt-parent = <&intc>;
/linux-4.1.27/Documentation/devicetree/bindings/net/
Ddavinci_emac.txt40 interrupt-parent = <&intc>;
Dcpsw.txt51 interrupt-parent = <&intc>;
/linux-4.1.27/Documentation/devicetree/bindings/arm/freescale/
Dfsl,vf610-mscm-ir.txt32 interrupt-parent = <&intc>;
/linux-4.1.27/arch/mips/include/asm/mach-au1x00/
Dgpio-au1000.h25 #define MAKE_IRQ(intc, off) (AU1000_INTC##intc##_INT_BASE + (off)) argument
/linux-4.1.27/arch/arm/mach-shmobile/
DMakefile61 obj-$(CONFIG_MACH_KZM9G) += board-kzm9g.o intc-sh73a0.o
/linux-4.1.27/Documentation/devicetree/bindings/mmc/
Dti-omap-hsmmc.txt105 interrupts-extended = <&intc 64 &gpio2 28 0>;
/linux-4.1.27/Documentation/devicetree/bindings/arm/
Dgic.txt63 intc: interrupt-controller@fff11000 {

12