1* Ingenic JZ4780 DMA Controller
2
3Required properties:
4
5- compatible: Should be "ingenic,jz4780-dma"
6- reg: Should contain the DMA controller registers location and length.
7- interrupts: Should contain the interrupt specifier of the DMA controller.
8- interrupt-parent: Should be the phandle of the interrupt controller that
9- clocks: Should contain a clock specifier for the JZ4780 PDMA clock.
10- #dma-cells: Must be <2>. Number of integer cells in the dmas property of
11  DMA clients (see below).
12
13Optional properties:
14
15- ingenic,reserved-channels: Bitmask of channels to reserve for devices that
16  need a specific channel. These channels will only be assigned when explicitly
17  requested by a client. The primary use for this is channels 0 and 1, which
18  can be configured to have special behaviour for NAND/BCH when using
19  programmable firmware.
20
21Example:
22
23dma: dma@13420000 {
24	compatible = "ingenic,jz4780-dma";
25	reg = <0x13420000 0x10000>;
26
27	interrupt-parent = <&intc>;
28	interrupts = <10>;
29
30	clocks = <&cgu JZ4780_CLK_PDMA>;
31
32	#dma-cells = <2>;
33
34	ingenic,reserved-channels = <0x3>;
35};
36
37DMA clients must use the format described in dma.txt, giving a phandle to the
38DMA controller plus the following 2 integer cells:
39
401. Request type: The DMA request type for transfers to/from the device on
41   the allocated channel, as defined in the SoC documentation.
42
432. Channel: If set to 0xffffffff, any available channel will be allocated for
44   the client. Otherwise, the exact channel specified will be used. The channel
45   should be reserved on the DMA controller using the ingenic,reserved-channels
46   property.
47
48Example:
49
50uart0: serial@10030000 {
51	...
52	dmas = <&dma 0x14 0xffffffff
53		&dma 0x15 0xffffffff>;
54	dma-names = "tx", "rx";
55	...
56};
57