1/*
2 * Device Tree Source for the Henninger board
3 *
4 * Copyright (C) 2014 Renesas Solutions Corp.
5 * Copyright (C) 2014 Cogent Embedded, Inc.
6 *
7 * This file is licensed under the terms of the GNU General Public License
8 * version 2.  This program is licensed "as is" without any warranty of any
9 * kind, whether express or implied.
10 */
11
12/dts-v1/;
13#include "r8a7791.dtsi"
14#include <dt-bindings/gpio/gpio.h>
15
16/ {
17	model = "Henninger";
18	compatible = "renesas,henninger", "renesas,r8a7791";
19
20	aliases {
21		serial0 = &scif0;
22	};
23
24	chosen {
25		bootargs = "console=ttySC0,38400 ignore_loglevel rw root=/dev/nfs ip=dhcp";
26		stdout-path = &scif0;
27	};
28
29	memory@40000000 {
30		device_type = "memory";
31		reg = <0 0x40000000 0 0x40000000>;
32	};
33
34	memory@200000000 {
35		device_type = "memory";
36		reg = <2 0x00000000 0 0x40000000>;
37	};
38
39	vcc_sdhi0: regulator@0 {
40		compatible = "regulator-fixed";
41
42		regulator-name = "SDHI0 Vcc";
43		regulator-min-microvolt = <3300000>;
44		regulator-max-microvolt = <3300000>;
45		regulator-always-on;
46	};
47
48	vccq_sdhi0: regulator@1 {
49		compatible = "regulator-gpio";
50
51		regulator-name = "SDHI0 VccQ";
52		regulator-min-microvolt = <1800000>;
53		regulator-max-microvolt = <3300000>;
54
55		gpios = <&gpio2 12 GPIO_ACTIVE_HIGH>;
56		gpios-states = <1>;
57		states = <3300000 1
58			  1800000 0>;
59	};
60
61	vcc_sdhi2: regulator@2 {
62		compatible = "regulator-fixed";
63
64		regulator-name = "SDHI2 Vcc";
65		regulator-min-microvolt = <3300000>;
66		regulator-max-microvolt = <3300000>;
67		regulator-always-on;
68	};
69
70	vccq_sdhi2: regulator@3 {
71		compatible = "regulator-gpio";
72
73		regulator-name = "SDHI2 VccQ";
74		regulator-min-microvolt = <1800000>;
75		regulator-max-microvolt = <3300000>;
76
77		gpios = <&gpio2 26 GPIO_ACTIVE_HIGH>;
78		gpios-states = <1>;
79		states = <3300000 1
80			  1800000 0>;
81	};
82};
83
84&extal_clk {
85	clock-frequency = <20000000>;
86};
87
88&pfc {
89	scif0_pins: serial0 {
90		renesas,groups = "scif0_data_d";
91		renesas,function = "scif0";
92	};
93
94	ether_pins: ether {
95		renesas,groups = "eth_link", "eth_mdio", "eth_rmii";
96		renesas,function = "eth";
97	};
98
99	phy1_pins: phy1 {
100		renesas,groups = "intc_irq0";
101		renesas,function = "intc";
102	};
103
104	sdhi0_pins: sd0 {
105		renesas,groups = "sdhi0_data4", "sdhi0_ctrl";
106		renesas,function = "sdhi0";
107	};
108
109	sdhi2_pins: sd2 {
110		renesas,groups = "sdhi2_data4", "sdhi2_ctrl";
111		renesas,function = "sdhi2";
112	};
113
114	i2c2_pins: i2c2 {
115		renesas,groups = "i2c2";
116		renesas,function = "i2c2";
117	};
118
119	qspi_pins: spi0 {
120		renesas,groups = "qspi_ctrl", "qspi_data4";
121		renesas,function = "qspi";
122	};
123
124	msiof0_pins: spi1 {
125		renesas,groups = "msiof0_clk", "msiof0_sync", "msiof0_rx",
126				 "msiof0_tx";
127		renesas,function = "msiof0";
128	};
129
130	usb0_pins: usb0 {
131		renesas,groups = "usb0";
132		renesas,function = "usb0";
133	};
134
135	usb1_pins: usb1 {
136		renesas,groups = "usb1";
137		renesas,function = "usb1";
138	};
139
140	vin0_pins: vin0 {
141		renesas,groups = "vin0_data8", "vin0_clk";
142		renesas,function = "vin0";
143	};
144
145	can0_pins: can0 {
146		renesas,groups = "can0_data";
147		renesas,function = "can0";
148	};
149};
150
151&scif0 {
152	pinctrl-0 = <&scif0_pins>;
153	pinctrl-names = "default";
154
155	status = "okay";
156};
157
158&ether {
159	pinctrl-0 = <&ether_pins &phy1_pins>;
160	pinctrl-names = "default";
161
162	phy-handle = <&phy1>;
163	renesas,ether-link-active-low;
164	status = "okay";
165
166	phy1: ethernet-phy@1 {
167		reg = <1>;
168		interrupt-parent = <&irqc0>;
169		interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
170		micrel,led-mode = <1>;
171	};
172};
173
174&sata0 {
175	status = "okay";
176};
177
178&sdhi0 {
179	pinctrl-0 = <&sdhi0_pins>;
180	pinctrl-names = "default";
181
182	vmmc-supply = <&vcc_sdhi0>;
183	vqmmc-supply = <&vccq_sdhi0>;
184	cd-gpios = <&gpio6 6 GPIO_ACTIVE_LOW>;
185	wp-gpios = <&gpio6 7 GPIO_ACTIVE_HIGH>;
186	status = "okay";
187};
188
189&sdhi2 {
190	pinctrl-0 = <&sdhi2_pins>;
191	pinctrl-names = "default";
192
193	vmmc-supply = <&vcc_sdhi2>;
194	vqmmc-supply = <&vccq_sdhi2>;
195	cd-gpios = <&gpio6 22 GPIO_ACTIVE_LOW>;
196	status = "okay";
197};
198
199&i2c2 {
200	pinctrl-0 = <&i2c2_pins>;
201	pinctrl-names = "default";
202
203	status = "okay";
204	clock-frequency = <400000>;
205
206	composite-in@20 {
207		compatible = "adi,adv7180";
208		reg = <0x20>;
209		remote = <&vin0>;
210
211		port {
212			adv7180: endpoint {
213				bus-width = <8>;
214				remote-endpoint = <&vin0ep>;
215			};
216		};
217	};
218};
219
220&qspi {
221	pinctrl-0 = <&qspi_pins>;
222	pinctrl-names = "default";
223
224	status = "okay";
225
226	flash@0 {
227		#address-cells = <1>;
228		#size-cells = <1>;
229		compatible = "spansion,s25fl512s";
230		reg = <0>;
231		spi-max-frequency = <30000000>;
232		spi-tx-bus-width = <4>;
233		spi-rx-bus-width = <4>;
234		m25p,fast-read;
235
236		partition@0 {
237			label = "loader_prg";
238			reg = <0x00000000 0x00040000>;
239			read-only;
240		};
241		partition@40000 {
242			label = "user_prg";
243			reg = <0x00040000 0x00400000>;
244			read-only;
245		};
246		partition@440000 {
247			label = "flash_fs";
248			reg = <0x00440000 0x03bc0000>;
249		};
250	};
251};
252
253&msiof0 {
254	pinctrl-0 = <&msiof0_pins>;
255	pinctrl-names = "default";
256
257	status = "okay";
258
259	pmic@0 {
260		compatible = "renesas,r2a11302ft";
261		reg = <0>;
262		spi-max-frequency = <6000000>;
263		spi-cpol;
264		spi-cpha;
265	};
266};
267
268&pci0 {
269	status = "okay";
270	pinctrl-0 = <&usb0_pins>;
271	pinctrl-names = "default";
272};
273
274&pci1 {
275	status = "okay";
276	pinctrl-0 = <&usb1_pins>;
277	pinctrl-names = "default";
278};
279
280&hsusb {
281	status = "okay";
282	pinctrl-0 = <&usb0_pins>;
283	pinctrl-names = "default";
284	renesas,enable-gpio = <&gpio5 31 GPIO_ACTIVE_HIGH>;
285};
286
287&usbphy {
288	status = "okay";
289};
290
291&pcie_bus_clk {
292	status = "okay";
293};
294
295&pciec {
296	status = "okay";
297};
298
299/* composite video input */
300&vin0 {
301	status = "okay";
302	pinctrl-0 = <&vin0_pins>;
303	pinctrl-names = "default";
304
305	port {
306		#address-cells = <1>;
307		#size-cells = <0>;
308
309		vin0ep: endpoint {
310			remote-endpoint = <&adv7180>;
311			bus-width = <8>;
312		};
313	};
314};
315
316&can0 {
317	pinctrl-0 = <&can0_pins>;
318	pinctrl-names = "default";
319	status = "okay";
320};
321