Searched refs:devfn (Results 1 - 200 of 482) sorted by relevance

123

/linux-4.1.27/arch/mips/pci/
H A Dops-rc32434.c47 struct pci_bus *bus, unsigned int devfn, config_access()
50 unsigned int slot = PCI_SLOT(devfn); config_access()
51 u8 func = PCI_FUNC(devfn); config_access()
72 static int read_config_byte(struct pci_bus *bus, unsigned int devfn, read_config_byte() argument
78 ret = config_access(PCI_ACCESS_READ, bus, devfn, where, &data); read_config_byte()
83 static int read_config_word(struct pci_bus *bus, unsigned int devfn, read_config_word() argument
89 ret = config_access(PCI_ACCESS_READ, bus, devfn, where, &data); read_config_word()
94 static int read_config_dword(struct pci_bus *bus, unsigned int devfn, read_config_dword() argument
104 if (bus->number == 0 && PCI_SLOT(devfn) > 21) read_config_dword()
108 ret = config_access(PCI_ACCESS_READ, bus, devfn, where, val); read_config_dword()
129 write_config_byte(struct pci_bus *bus, unsigned int devfn, int where, write_config_byte() argument
134 if (config_access(PCI_ACCESS_READ, bus, devfn, where, &data)) write_config_byte()
140 if (config_access(PCI_ACCESS_WRITE, bus, devfn, where, &data)) write_config_byte()
148 write_config_word(struct pci_bus *bus, unsigned int devfn, int where, write_config_word() argument
153 if (config_access(PCI_ACCESS_READ, bus, devfn, where, &data)) write_config_word()
159 if (config_access(PCI_ACCESS_WRITE, bus, devfn, where, &data)) write_config_word()
168 write_config_dword(struct pci_bus *bus, unsigned int devfn, int where, write_config_dword() argument
171 if (config_access(PCI_ACCESS_WRITE, bus, devfn, where, &val)) write_config_dword()
177 static int pci_config_read(struct pci_bus *bus, unsigned int devfn, pci_config_read() argument
182 return read_config_byte(bus, devfn, where, (u8 *) val); pci_config_read()
184 return read_config_word(bus, devfn, where, (u16 *) val); pci_config_read()
186 return read_config_dword(bus, devfn, where, val); pci_config_read()
190 static int pci_config_write(struct pci_bus *bus, unsigned int devfn, pci_config_write() argument
195 return write_config_byte(bus, devfn, where, (u8) val); pci_config_write()
197 return write_config_word(bus, devfn, where, (u16) val); pci_config_write()
199 return write_config_dword(bus, devfn, where, val); pci_config_write()
46 config_access(unsigned char access_type, struct pci_bus *bus, unsigned int devfn, unsigned char where, u32 *data) config_access() argument
H A Dops-sni.c24 static int set_config_address(unsigned int busno, unsigned int devfn, int reg) set_config_address() argument
26 if ((devfn > 255) || (reg > 255)) set_config_address()
29 if (busno == 0 && devfn >= PCI_DEVFN(8, 0)) set_config_address()
34 ((devfn & 0xff) << 8) | set_config_address()
40 static int pcimt_read(struct pci_bus *bus, unsigned int devfn, int reg, pcimt_read() argument
45 if ((res = set_config_address(bus->number, devfn, reg))) pcimt_read()
63 static int pcimt_write(struct pci_bus *bus, unsigned int devfn, int reg, pcimt_write() argument
68 if ((res = set_config_address(bus->number, devfn, reg))) pcimt_write()
91 static int pcit_set_config_address(unsigned int busno, unsigned int devfn, int reg) pcit_set_config_address() argument
93 if ((devfn > 255) || (reg > 255) || (busno > 255)) pcit_set_config_address()
96 outl((1 << 31) | ((busno & 0xff) << 16) | ((devfn & 0xff) << 8) | (reg & 0xfc), 0xcf8); pcit_set_config_address()
100 static int pcit_read(struct pci_bus *bus, unsigned int devfn, int reg, pcit_read() argument
107 * for the devfn by doing a config write and checking the result. If pcit_read()
113 if ((res = pcit_set_config_address(0, devfn, 0))) pcit_read()
120 if ((res = pcit_set_config_address(bus->number, devfn, reg))) pcit_read()
137 static int pcit_write(struct pci_bus *bus, unsigned int devfn, int reg, pcit_write() argument
142 if ((res = pcit_set_config_address(bus->number, devfn, reg))) pcit_write()
H A Dops-emma2rh.c40 static int check_args(struct pci_bus *bus, u32 devfn, u32 * bus_num) check_args() argument
51 if (PCI_SLOT(devfn) >= 10) check_args()
55 if ((*bus_num >= 64) || (PCI_SLOT(devfn) >= 16)) check_args()
62 unsigned int devfn, int where) set_pci_configuration_address()
71 config_win0 = (1 << (22 + PCI_SLOT(devfn))) | (5 << 9); set_pci_configuration_address()
76 config_win0 = (bus_num << 26) | (PCI_SLOT(devfn) << 22) | set_pci_configuration_address()
84 static int pci_config_read(struct pci_bus *bus, unsigned int devfn, int where, pci_config_read() argument
94 if (check_args(bus, devfn, &bus_num) == PCIBIOS_DEVICE_NOT_FOUND) pci_config_read()
99 if (set_pci_configuration_address(bus_num, devfn, where) < 0) pci_config_read()
103 *(volatile u32 *)(base + (PCI_FUNC(devfn) << 8) + pci_config_read()
129 static int pci_config_write(struct pci_bus *bus, unsigned int devfn, int where, pci_config_write() argument
138 if (check_args(bus, devfn, &bus_num) == PCIBIOS_DEVICE_NOT_FOUND) pci_config_write()
143 if (set_pci_configuration_address(bus_num, devfn, where) < 0) pci_config_write()
148 *(volatile u32 *)(base + (PCI_FUNC(devfn) << 8) + pci_config_write()
169 *(volatile u32 *)(base + (PCI_FUNC(devfn) << 8) + pci_config_write()
61 set_pci_configuration_address(unsigned char bus_num, unsigned int devfn, int where) set_pci_configuration_address() argument
H A Dops-nile4.c17 struct pci_bus *bus, unsigned int devfn, int where, u32 *val) nile4_pcibios_config_access()
22 if ((busnum == 0) && (PCI_SLOT(devfn) > 8)) nile4_pcibios_config_access()
28 if ((busnum == 0) && (devfn == PCI_DEVFN(0, 0))) { nile4_pcibios_config_access()
51 ((1 << (PCI_SLOT(devfn) + 15)) | (PCI_FUNC(devfn) << 8) nile4_pcibios_config_access()
54 adr = KSEG1ADDR(PCI_WINDOW1) | (busnum << 16) | (devfn << 8) | nile4_pcibios_config_access()
74 static int nile4_pcibios_read(struct pci_bus *bus, unsigned int devfn, nile4_pcibios_read() argument
85 err = nile4_pcibios_config_access(PCI_ACCESS_READ, bus, devfn, where, nile4_pcibios_read()
100 static int nile4_pcibios_write(struct pci_bus *bus, unsigned int devfn, nile4_pcibios_write() argument
111 err = nile4_pcibios_config_access(PCI_ACCESS_READ, bus, devfn, where, nile4_pcibios_write()
126 (PCI_ACCESS_WRITE, bus, devfn, where, &data)) nile4_pcibios_write()
16 nile4_pcibios_config_access(unsigned char access_type, struct pci_bus *bus, unsigned int devfn, int where, u32 *val) nile4_pcibios_config_access() argument
H A Dops-loongson3.c16 struct pci_bus *bus, unsigned int devfn, loongson3_pci_config_access()
22 int device = PCI_SLOT(devfn); loongson3_pci_config_access()
23 int function = PCI_FUNC(devfn); loongson3_pci_config_access()
50 static int loongson3_pci_pcibios_read(struct pci_bus *bus, unsigned int devfn, loongson3_pci_pcibios_read() argument
55 bus, devfn, where, &data); loongson3_pci_pcibios_read()
70 static int loongson3_pci_pcibios_write(struct pci_bus *bus, unsigned int devfn, loongson3_pci_pcibios_write() argument
80 bus, devfn, where, &data); loongson3_pci_pcibios_write()
93 bus, devfn, where, &data); loongson3_pci_pcibios_write()
15 loongson3_pci_config_access(unsigned char access_type, struct pci_bus *bus, unsigned int devfn, int where, u32 *data) loongson3_pci_config_access() argument
H A Dops-lantiq.c29 unsigned int devfn, unsigned int where, u32 *data) ltq_pci_config_access()
37 if ((bus->number != 0) || ((devfn & 0xf8) > 0x78) ltq_pci_config_access()
38 || ((devfn & 0xf8) == 0) || ((devfn & 0xf8) == 0x68)) ltq_pci_config_access()
44 cfg_base |= (bus->number << LTQ_PCI_CFG_BUSNUM_SHF) | (devfn << ltq_pci_config_access()
73 int ltq_pci_read_config_dword(struct pci_bus *bus, unsigned int devfn, ltq_pci_read_config_dword() argument
78 if (ltq_pci_config_access(PCI_ACCESS_READ, bus, devfn, where, &data)) ltq_pci_read_config_dword()
91 int ltq_pci_write_config_dword(struct pci_bus *bus, unsigned int devfn, ltq_pci_write_config_dword() argument
100 devfn, where, &data)) ltq_pci_write_config_dword()
111 if (ltq_pci_config_access(PCI_ACCESS_WRITE, bus, devfn, where, &data)) ltq_pci_write_config_dword()
28 ltq_pci_config_access(unsigned char access_type, struct pci_bus *bus, unsigned int devfn, unsigned int where, u32 *data) ltq_pci_config_access() argument
H A Dops-loongson2.c37 unsigned int devfn, int where, loongson_pcibios_config_access()
44 int device = PCI_SLOT(devfn); loongson_pcibios_config_access()
45 int function = PCI_FUNC(devfn); loongson_pcibios_config_access()
121 static int loongson_pcibios_read(struct pci_bus *bus, unsigned int devfn, loongson_pcibios_read() argument
131 if (loongson_pcibios_config_access(PCI_ACCESS_READ, bus, devfn, where, loongson_pcibios_read()
145 static int loongson_pcibios_write(struct pci_bus *bus, unsigned int devfn, loongson_pcibios_write() argument
158 if (loongson_pcibios_config_access(PCI_ACCESS_READ, bus, devfn, loongson_pcibios_write()
170 if (loongson_pcibios_config_access(PCI_ACCESS_WRITE, bus, devfn, where, loongson_pcibios_write()
190 u32 devfn = PCI_DEVFN(PCI_IDSEL_CS5536, 0); _rdmsr() local
194 loongson_pcibios_write(&bus, devfn, PCI_MSR_ADDR, 4, msr); _rdmsr()
195 loongson_pcibios_read(&bus, devfn, PCI_MSR_DATA_LO, 4, lo); _rdmsr()
196 loongson_pcibios_read(&bus, devfn, PCI_MSR_DATA_HI, 4, hi); _rdmsr()
206 u32 devfn = PCI_DEVFN(PCI_IDSEL_CS5536, 0); _wrmsr() local
210 loongson_pcibios_write(&bus, devfn, PCI_MSR_ADDR, 4, msr); _wrmsr()
211 loongson_pcibios_write(&bus, devfn, PCI_MSR_DATA_LO, 4, lo); _wrmsr()
212 loongson_pcibios_write(&bus, devfn, PCI_MSR_DATA_HI, 4, hi); _wrmsr()
35 loongson_pcibios_config_access(unsigned char access_type, struct pci_bus *bus, unsigned int devfn, int where, u32 *data) loongson_pcibios_config_access() argument
H A Dops-mace.c31 static inline int mkaddr(struct pci_bus *bus, unsigned int devfn, mkaddr() argument
35 ((devfn & 0xff) << 8) | mkaddr()
41 mace_pci_read_config(struct pci_bus *bus, unsigned int devfn, mace_pci_read_config() argument
48 mace->pci.config_addr = mkaddr(bus, devfn, reg); mace_pci_read_config()
68 (devfn == (1 << 3) || devfn == (2 << 3))) mace_pci_read_config()
77 mace_pci_write_config(struct pci_bus *bus, unsigned int devfn, mace_pci_write_config() argument
80 mace->pci.config_addr = mkaddr(bus, devfn, reg); mace_pci_write_config()
H A Dpci-lantiq.h14 unsigned int devfn, int where, int size, u32 *val);
16 unsigned int devfn, int where, int size, u32 val);
H A Dops-gt64xxx_pci0.c43 struct pci_bus *bus, unsigned int devfn, int where, u32 * data) gt64xxx_pci0_pcibios_config_access()
48 if ((busnum == 0) && (devfn >= PCI_DEVFN(31, 0))) gt64xxx_pci0_pcibios_config_access()
58 (devfn << GT_PCI0_CFGADDR_FUNCTNUM_SHF) | gt64xxx_pci0_pcibios_config_access()
63 if (busnum == 0 && PCI_SLOT(devfn) == 0) { gt64xxx_pci0_pcibios_config_access()
72 if (busnum == 0 && PCI_SLOT(devfn) == 0) { gt64xxx_pci0_pcibios_config_access()
103 static int gt64xxx_pci0_pcibios_read(struct pci_bus *bus, unsigned int devfn, gt64xxx_pci0_pcibios_read() argument
108 if (gt64xxx_pci0_pcibios_config_access(PCI_ACCESS_READ, bus, devfn, gt64xxx_pci0_pcibios_read()
122 static int gt64xxx_pci0_pcibios_write(struct pci_bus *bus, unsigned int devfn, gt64xxx_pci0_pcibios_write() argument
131 devfn, where, &data)) gt64xxx_pci0_pcibios_write()
142 if (gt64xxx_pci0_pcibios_config_access(PCI_ACCESS_WRITE, bus, devfn, gt64xxx_pci0_pcibios_write()
42 gt64xxx_pci0_pcibios_config_access(unsigned char access_type, struct pci_bus *bus, unsigned int devfn, int where, u32 * data) gt64xxx_pci0_pcibios_config_access() argument
H A Dops-bcm63xx.c65 unsigned int devfn, int where) bcm63xx_setup_cfg_access()
70 slot = PCI_SLOT(devfn); bcm63xx_setup_cfg_access()
71 func = PCI_FUNC(devfn); bcm63xx_setup_cfg_access()
101 unsigned int devfn, int where, int size, bcm63xx_do_cfg_read()
109 if (bcm63xx_setup_cfg_access(type, busn, devfn, where)) bcm63xx_do_cfg_read()
122 unsigned int devfn, int where, int size, bcm63xx_do_cfg_write()
130 if (bcm63xx_setup_cfg_access(type, busn, devfn, where)) bcm63xx_do_cfg_write()
147 static int bcm63xx_pci_read(struct pci_bus *bus, unsigned int devfn, bcm63xx_pci_read() argument
154 if (type == 0 && PCI_SLOT(devfn) == CARDBUS_PCI_IDSEL) bcm63xx_pci_read()
157 return bcm63xx_do_cfg_read(type, bus->number, devfn, bcm63xx_pci_read()
161 static int bcm63xx_pci_write(struct pci_bus *bus, unsigned int devfn, bcm63xx_pci_write() argument
168 if (type == 0 && PCI_SLOT(devfn) == CARDBUS_PCI_IDSEL) bcm63xx_pci_write()
171 return bcm63xx_do_cfg_write(type, bus->number, devfn, bcm63xx_pci_write()
362 static int bcm63xx_cb_read(struct pci_bus *bus, unsigned int devfn, bcm63xx_cb_read() argument
367 if (!bus->parent && PCI_SLOT(devfn) == FAKE_CB_BRIDGE_SLOT) { bcm63xx_cb_read()
378 PCI_SLOT(devfn) == 0) bcm63xx_cb_read()
386 static int bcm63xx_cb_write(struct pci_bus *bus, unsigned int devfn, bcm63xx_cb_write() argument
389 if (!bus->parent && PCI_SLOT(devfn) == FAKE_CB_BRIDGE_SLOT) { bcm63xx_cb_write()
396 PCI_SLOT(devfn) == 0) bcm63xx_cb_write()
438 PCI_SLOT(dev->devfn) == 0) bcm63xx_fixup()
468 static int bcm63xx_pcie_can_access(struct pci_bus *bus, int devfn) bcm63xx_pcie_can_access() argument
472 return PCI_SLOT(devfn) == 0; bcm63xx_pcie_can_access()
474 if (PCI_SLOT(devfn) == 0) bcm63xx_pcie_can_access()
482 static int bcm63xx_pcie_read(struct pci_bus *bus, unsigned int devfn, bcm63xx_pcie_read() argument
488 if (!bcm63xx_pcie_can_access(bus, devfn)) bcm63xx_pcie_read()
502 static int bcm63xx_pcie_write(struct pci_bus *bus, unsigned int devfn, bcm63xx_pcie_write() argument
508 if (!bcm63xx_pcie_can_access(bus, devfn)) bcm63xx_pcie_write()
64 bcm63xx_setup_cfg_access(int type, unsigned int busn, unsigned int devfn, int where) bcm63xx_setup_cfg_access() argument
100 bcm63xx_do_cfg_read(int type, unsigned int busn, unsigned int devfn, int where, int size, u32 *val) bcm63xx_do_cfg_read() argument
121 bcm63xx_do_cfg_write(int type, unsigned int busn, unsigned int devfn, int where, int size, u32 val) bcm63xx_do_cfg_write() argument
H A Dops-vr41xx.c36 unsigned int devfn, int where) set_pci_configuration_address()
42 if (PCI_SLOT(devfn) < 11 || where > 0xff) set_pci_configuration_address()
45 writel((1U << PCI_SLOT(devfn)) | (PCI_FUNC(devfn) << 8) | set_pci_configuration_address()
54 writel(((uint32_t)number << 16) | ((devfn & 0xff) << 8) | set_pci_configuration_address()
61 static int pci_config_read(struct pci_bus *bus, unsigned int devfn, int where, pci_config_read() argument
67 if (set_pci_configuration_address(bus->number, devfn, where) < 0) pci_config_read()
89 static int pci_config_write(struct pci_bus *bus, unsigned int devfn, int where, pci_config_write() argument
95 if (set_pci_configuration_address(bus->number, devfn, where) < 0) pci_config_write()
35 set_pci_configuration_address(unsigned char number, unsigned int devfn, int where) set_pci_configuration_address() argument
H A Dpci-xlp.c60 #define pci_cfg_addr(bus, devfn, off) (((bus) << 20) | ((devfn) << 12) | (off))
63 static inline u32 pci_cfg_read_32bit(struct pci_bus *bus, unsigned int devfn, pci_cfg_read_32bit() argument
74 if (PCI_SLOT(devfn) != 0 || pci_cfg_read_32bit()
75 !nlm_node_present(PCI_FUNC(devfn))) pci_cfg_read_32bit()
78 if (PCI_SLOT(devfn) == 0) /* b.0.0 hangs */ pci_cfg_read_32bit()
80 if (devfn == 44) /* b.5.4 hangs */ pci_cfg_read_32bit()
83 } else if (bus->number == 0 && PCI_SLOT(devfn) == 1 && where == 0x954) { pci_cfg_read_32bit()
87 pci_cfg_addr(bus->number, devfn, where)); pci_cfg_read_32bit()
92 static inline void pci_cfg_write_32bit(struct pci_bus *bus, unsigned int devfn, pci_cfg_write_32bit() argument
98 pci_cfg_addr(bus->number, devfn, where & ~3)); pci_cfg_write_32bit()
102 static int nlm_pcibios_read(struct pci_bus *bus, unsigned int devfn, nlm_pcibios_read() argument
112 data = pci_cfg_read_32bit(bus, devfn, where); nlm_pcibios_read()
125 static int nlm_pcibios_write(struct pci_bus *bus, unsigned int devfn, nlm_pcibios_write() argument
135 data = pci_cfg_read_32bit(bus, devfn, where); nlm_pcibios_write()
146 pci_cfg_write_32bit(bus, devfn, where, data); nlm_pcibios_write()
203 return PCI_FUNC(lnkdev->bus->self->devfn); xlp_socdev_to_node()
205 return PCI_SLOT(lnkdev->devfn) / 8; xlp_socdev_to_node()
221 lnkfunc = PCI_FUNC(lnkdev->devfn); pcibios_map_irq()
H A Dpci-bcm1480ht.c51 #define CFGOFFSET(bus, devfn, where) (((bus)<<16)+((devfn)<<8)+(where))
52 #define CFGADDR(bus, devfn, where) CFGOFFSET((bus)->number, (devfn), where)
88 static int bcm1480ht_can_access(struct pci_bus *bus, int devfn) bcm1480ht_can_access() argument
96 devno = PCI_SLOT(devfn); bcm1480ht_can_access()
109 static int bcm1480ht_pcibios_read(struct pci_bus *bus, unsigned int devfn, bcm1480ht_pcibios_read() argument
119 if (bcm1480ht_can_access(bus, devfn)) bcm1480ht_pcibios_read()
120 data = READCFG32(CFGADDR(bus, devfn, where)); bcm1480ht_pcibios_read()
134 static int bcm1480ht_pcibios_write(struct pci_bus *bus, unsigned int devfn, bcm1480ht_pcibios_write() argument
137 u32 cfgaddr = CFGADDR(bus, devfn, where); bcm1480ht_pcibios_write()
145 if (!bcm1480ht_can_access(bus, devfn)) bcm1480ht_pcibios_write()
H A Dpci-virtio-guest.c44 unsigned int devfn, int reg) pci_virtio_guest_write_config_addr()
49 pca.devfn_number = devfn; pci_virtio_guest_write_config_addr()
57 unsigned int devfn, int reg, int size, u32 val) pci_virtio_guest_write_config()
59 pci_virtio_guest_write_config_addr(bus, devfn, reg); pci_virtio_guest_write_config()
76 static int pci_virtio_guest_read_config(struct pci_bus *bus, unsigned int devfn, pci_virtio_guest_read_config() argument
79 pci_virtio_guest_write_config_addr(bus, devfn, reg); pci_virtio_guest_read_config()
43 pci_virtio_guest_write_config_addr(struct pci_bus *bus, unsigned int devfn, int reg) pci_virtio_guest_write_config_addr() argument
56 pci_virtio_guest_write_config(struct pci_bus *bus, unsigned int devfn, int reg, int size, u32 val) pci_virtio_guest_write_config() argument
H A Dops-bonito64.c38 unsigned int devfn, int where, bonito64_pcibios_config_access()
45 int device = PCI_SLOT(devfn); bonito64_pcibios_config_access()
46 int function = PCI_FUNC(devfn); bonito64_pcibios_config_access()
101 static int bonito64_pcibios_read(struct pci_bus *bus, unsigned int devfn, bonito64_pcibios_read() argument
111 if (bonito64_pcibios_config_access(PCI_ACCESS_READ, bus, devfn, where, bonito64_pcibios_read()
125 static int bonito64_pcibios_write(struct pci_bus *bus, unsigned int devfn, bonito64_pcibios_write() argument
138 if (bonito64_pcibios_config_access(PCI_ACCESS_READ, bus, devfn, bonito64_pcibios_write()
150 if (bonito64_pcibios_config_access(PCI_ACCESS_WRITE, bus, devfn, where, bonito64_pcibios_write()
36 bonito64_pcibios_config_access(unsigned char access_type, struct pci_bus *bus, unsigned int devfn, int where, u32 * data) bonito64_pcibios_config_access() argument
H A Dops-msc.c47 struct pci_bus *bus, unsigned int devfn, int where, u32 * data) msc_pcibios_config_access()
58 (PCI_SLOT(devfn) << MSC01_PCI_CFGADDR_DNUM_SHF) | msc_pcibios_config_access()
59 (PCI_FUNC(devfn) << MSC01_PCI_CFGADDR_FNUM_SHF) | msc_pcibios_config_access()
88 static int msc_pcibios_read(struct pci_bus *bus, unsigned int devfn, msc_pcibios_read() argument
98 if (msc_pcibios_config_access(PCI_ACCESS_READ, bus, devfn, where, msc_pcibios_read()
112 static int msc_pcibios_write(struct pci_bus *bus, unsigned int devfn, msc_pcibios_write() argument
125 if (msc_pcibios_config_access(PCI_ACCESS_READ, bus, devfn, msc_pcibios_write()
137 if (msc_pcibios_config_access(PCI_ACCESS_WRITE, bus, devfn, where, msc_pcibios_write()
46 msc_pcibios_config_access(unsigned char access_type, struct pci_bus *bus, unsigned int devfn, int where, u32 * data) msc_pcibios_config_access() argument
H A Dops-bridge.c43 static int pci_conf0_read_config(struct pci_bus *bus, unsigned int devfn, pci_conf0_read_config() argument
48 int slot = PCI_SLOT(devfn); pci_conf0_read_config()
49 int fn = PCI_FUNC(devfn); pci_conf0_read_config()
103 static int pci_conf1_read_config(struct pci_bus *bus, unsigned int devfn, pci_conf1_read_config() argument
109 int slot = PCI_SLOT(devfn); pci_conf1_read_config()
110 int fn = PCI_FUNC(devfn); pci_conf1_read_config()
167 static int pci_read_config(struct pci_bus *bus, unsigned int devfn, pci_read_config() argument
171 return pci_conf1_read_config(bus, devfn, where, size, value); pci_read_config()
173 return pci_conf0_read_config(bus, devfn, where, size, value); pci_read_config()
176 static int pci_conf0_write_config(struct pci_bus *bus, unsigned int devfn, pci_conf0_write_config() argument
181 int slot = PCI_SLOT(devfn); pci_conf0_write_config()
182 int fn = PCI_FUNC(devfn); pci_conf0_write_config()
242 static int pci_conf1_write_config(struct pci_bus *bus, unsigned int devfn, pci_conf1_write_config() argument
247 int slot = PCI_SLOT(devfn); pci_conf1_write_config()
248 int fn = PCI_FUNC(devfn); pci_conf1_write_config()
310 static int pci_write_config(struct pci_bus *bus, unsigned int devfn, pci_write_config() argument
314 return pci_conf1_write_config(bus, devfn, where, size, value); pci_write_config()
316 return pci_conf0_write_config(bus, devfn, where, size, value); pci_write_config()
H A Dpci-alchemy.c187 static int read_config_byte(struct pci_bus *bus, unsigned int devfn, read_config_byte() argument
191 int ret = config_access(PCI_ACCESS_READ, bus, devfn, where, &data); read_config_byte()
201 static int read_config_word(struct pci_bus *bus, unsigned int devfn, read_config_word() argument
205 int ret = config_access(PCI_ACCESS_READ, bus, devfn, where, &data); read_config_word()
213 static int read_config_dword(struct pci_bus *bus, unsigned int devfn, read_config_dword() argument
216 return config_access(PCI_ACCESS_READ, bus, devfn, where, val); read_config_dword()
219 static int write_config_byte(struct pci_bus *bus, unsigned int devfn, write_config_byte() argument
224 if (config_access(PCI_ACCESS_READ, bus, devfn, where, &data)) write_config_byte()
230 if (config_access(PCI_ACCESS_WRITE, bus, devfn, where, &data)) write_config_byte()
236 static int write_config_word(struct pci_bus *bus, unsigned int devfn, write_config_word() argument
241 if (config_access(PCI_ACCESS_READ, bus, devfn, where, &data)) write_config_word()
247 if (config_access(PCI_ACCESS_WRITE, bus, devfn, where, &data)) write_config_word()
253 static int write_config_dword(struct pci_bus *bus, unsigned int devfn, write_config_dword() argument
256 return config_access(PCI_ACCESS_WRITE, bus, devfn, where, &val); write_config_dword()
259 static int alchemy_pci_read(struct pci_bus *bus, unsigned int devfn, alchemy_pci_read() argument
265 int rc = read_config_byte(bus, devfn, where, &_val); alchemy_pci_read()
272 int rc = read_config_word(bus, devfn, where, &_val); alchemy_pci_read()
278 return read_config_dword(bus, devfn, where, val); alchemy_pci_read()
282 static int alchemy_pci_write(struct pci_bus *bus, unsigned int devfn, alchemy_pci_write() argument
287 return write_config_byte(bus, devfn, where, (u8) val); alchemy_pci_write()
289 return write_config_word(bus, devfn, where, (u16) val); alchemy_pci_write()
291 return write_config_dword(bus, devfn, where, val); alchemy_pci_write()
H A Dpci-bcm1480.c53 #define CFGOFFSET(bus, devfn, where) (((bus)<<16)+((devfn)<<8)+(where))
54 #define CFGADDR(bus, devfn, where) CFGOFFSET((bus)->number, (devfn), where)
97 static int bcm1480_pci_can_access(struct pci_bus *bus, int devfn) bcm1480_pci_can_access() argument
105 devno = PCI_SLOT(devfn); bcm1480_pci_can_access()
120 static int bcm1480_pcibios_read(struct pci_bus *bus, unsigned int devfn, bcm1480_pcibios_read() argument
130 if (bcm1480_pci_can_access(bus, devfn)) bcm1480_pcibios_read()
131 data = READCFG32(CFGADDR(bus, devfn, where)); bcm1480_pcibios_read()
145 static int bcm1480_pcibios_write(struct pci_bus *bus, unsigned int devfn, bcm1480_pcibios_write() argument
148 u32 cfgaddr = CFGADDR(bus, devfn, where); bcm1480_pcibios_write()
156 if (!bcm1480_pci_can_access(bus, devfn)) bcm1480_pcibios_write()
H A Dpci-sb1250.c53 #define CFGOFFSET(bus, devfn, where) (((bus)<<16) + ((devfn)<<8) + (where))
54 #define CFGADDR(bus, devfn, where) CFGOFFSET((bus)->number, (devfn), where)
104 static int sb1250_pci_can_access(struct pci_bus *bus, int devfn) sb1250_pci_can_access() argument
112 devno = PCI_SLOT(devfn); sb1250_pci_can_access()
129 static int sb1250_pcibios_read(struct pci_bus *bus, unsigned int devfn, sb1250_pcibios_read() argument
139 if (sb1250_pci_can_access(bus, devfn)) sb1250_pcibios_read()
140 data = READCFG32(CFGADDR(bus, devfn, where)); sb1250_pcibios_read()
154 static int sb1250_pcibios_write(struct pci_bus *bus, unsigned int devfn, sb1250_pcibios_write() argument
157 u32 cfgaddr = CFGADDR(bus, devfn, where); sb1250_pcibios_write()
165 if (!sb1250_pci_can_access(bus, devfn)) sb1250_pcibios_write()
H A Dpci-xlr.c59 #define pci_cfg_addr(bus, devfn, off) (((bus) << 16) | ((devfn) << 8) | (off))
62 static inline u32 pci_cfg_read_32bit(struct pci_bus *bus, unsigned int devfn, pci_cfg_read_32bit() argument
69 pci_cfg_addr(bus->number, devfn, where & ~3)); pci_cfg_read_32bit()
74 static inline void pci_cfg_write_32bit(struct pci_bus *bus, unsigned int devfn, pci_cfg_write_32bit() argument
80 pci_cfg_addr(bus->number, devfn, where & ~3)); pci_cfg_write_32bit()
84 static int nlm_pcibios_read(struct pci_bus *bus, unsigned int devfn, nlm_pcibios_read() argument
94 data = pci_cfg_read_32bit(bus, devfn, where); nlm_pcibios_read()
107 static int nlm_pcibios_write(struct pci_bus *bus, unsigned int devfn, nlm_pcibios_write() argument
117 data = pci_cfg_read_32bit(bus, devfn, where); nlm_pcibios_write()
128 pci_cfg_write_32bit(bus, devfn, where, data); nlm_pcibios_write()
212 link = PCI_SLOT(lnk->devfn); get_irq_vector()
H A Dpci-ar71xx.c83 static inline u32 ar71xx_pci_bus_addr(struct pci_bus *bus, unsigned int devfn, ar71xx_pci_bus_addr() argument
90 ret = (1 << PCI_SLOT(devfn)) | (PCI_FUNC(devfn) << 8) | ar71xx_pci_bus_addr()
94 ret = (bus->number << 16) | (PCI_SLOT(devfn) << 11) | ar71xx_pci_bus_addr()
95 (PCI_FUNC(devfn) << 8) | (where & ~3) | 1; ar71xx_pci_bus_addr()
163 unsigned int devfn, ar71xx_pci_set_cfgaddr()
170 addr = ar71xx_pci_bus_addr(bus, devfn, where); ar71xx_pci_set_cfgaddr()
179 static int ar71xx_pci_read_config(struct pci_bus *bus, unsigned int devfn, ar71xx_pci_read_config() argument
191 err = ar71xx_pci_set_cfgaddr(bus, devfn, where, size, ar71xx_pci_read_config()
203 static int ar71xx_pci_write_config(struct pci_bus *bus, unsigned int devfn, ar71xx_pci_write_config() argument
214 err = ar71xx_pci_set_cfgaddr(bus, devfn, where, size, ar71xx_pci_write_config()
162 ar71xx_pci_set_cfgaddr(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 cmd) ar71xx_pci_set_cfgaddr() argument
H A Dpci-rt2880.c66 static int rt2880_pci_config_read(struct pci_bus *bus, unsigned int devfn, rt2880_pci_config_read() argument
73 address = rt2880_pci_get_cfgaddr(bus->number, PCI_SLOT(devfn), rt2880_pci_config_read()
74 PCI_FUNC(devfn), where); rt2880_pci_config_read()
96 static int rt2880_pci_config_write(struct pci_bus *bus, unsigned int devfn, rt2880_pci_config_write() argument
103 address = rt2880_pci_get_cfgaddr(bus->number, PCI_SLOT(devfn), rt2880_pci_config_write()
104 PCI_FUNC(devfn), where); rt2880_pci_config_write()
192 switch (PCI_SLOT(dev->devfn)) { pcibios_map_irq()
H A Dpci-ar2315.c198 static int ar2315_pci_cfg_access(struct ar2315_pci_ctrl *apc, unsigned devfn, ar2315_pci_cfg_access() argument
201 int func = PCI_FUNC(devfn); ar2315_pci_cfg_access()
202 int dev = PCI_SLOT(devfn); ar2315_pci_cfg_access()
254 unsigned devfn, int where, u32 *val) ar2315_pci_local_cfg_rd()
256 return ar2315_pci_cfg_access(apc, devfn, where, sizeof(u32), val, ar2315_pci_local_cfg_rd()
261 unsigned devfn, int where, u32 val) ar2315_pci_local_cfg_wr()
263 return ar2315_pci_cfg_access(apc, devfn, where, sizeof(u32), &val, ar2315_pci_local_cfg_wr()
267 static int ar2315_pci_cfg_read(struct pci_bus *bus, unsigned devfn, int where, ar2315_pci_cfg_read() argument
272 if (PCI_SLOT(devfn) == AR2315_PCI_HOST_SLOT) ar2315_pci_cfg_read()
275 return ar2315_pci_cfg_access(apc, devfn, where, size, value, false); ar2315_pci_cfg_read()
278 static int ar2315_pci_cfg_write(struct pci_bus *bus, unsigned devfn, int where, ar2315_pci_cfg_write() argument
283 if (PCI_SLOT(devfn) == AR2315_PCI_HOST_SLOT) ar2315_pci_cfg_write()
286 return ar2315_pci_cfg_access(apc, devfn, where, size, &value, true); ar2315_pci_cfg_write()
296 unsigned devfn = PCI_DEVFN(AR2315_PCI_HOST_SLOT, 0); ar2315_pci_host_setup() local
300 res = ar2315_pci_local_cfg_rd(apc, devfn, PCI_VENDOR_ID, &id); ar2315_pci_host_setup()
305 ar2315_pci_local_cfg_wr(apc, devfn, PCI_BASE_ADDRESS_0, ar2315_pci_host_setup()
307 ar2315_pci_local_cfg_wr(apc, devfn, PCI_BASE_ADDRESS_1, ar2315_pci_host_setup()
309 ar2315_pci_local_cfg_wr(apc, devfn, PCI_BASE_ADDRESS_2, ar2315_pci_host_setup()
313 ar2315_pci_local_cfg_wr(apc, devfn, PCI_COMMAND, PCI_COMMAND_MEMORY | ar2315_pci_host_setup()
253 ar2315_pci_local_cfg_rd(struct ar2315_pci_ctrl *apc, unsigned devfn, int where, u32 *val) ar2315_pci_local_cfg_rd() argument
260 ar2315_pci_local_cfg_wr(struct ar2315_pci_ctrl *apc, unsigned devfn, int where, u32 val) ar2315_pci_local_cfg_wr() argument
H A Dfixup-rc32434.c43 if (dev->bus->number < 2 && PCI_SLOT(dev->devfn) < 12) pcibios_map_irq()
44 irq = irq_map[dev->bus->number][PCI_SLOT(dev->devfn)]; pcibios_map_irq()
51 if (PCI_SLOT(dev->devfn) == 6 && dev->bus->number == 0) { rc32434_pci_early_fixup()
H A Dfixup-lemote2f.c58 if ((PCI_SLOT(dev->devfn) != PCI_IDSEL_CS5536) pcibios_map_irq()
59 && (PCI_SLOT(dev->devfn) < 32)) { pcibios_map_irq()
67 } else if (PCI_SLOT(dev->devfn) == PCI_IDSEL_CS5536) { /* cs5536 */ pcibios_map_irq()
68 switch (PCI_FUNC(dev->devfn)) { pcibios_map_irq()
H A Dops-pmcmsp.c340 * devfn - this is an 8-bit field. The lower three bits
362 unsigned int devfn, msp_pcibios_config_access()
368 unsigned char dev_fn = (unsigned char)devfn; msp_pcibios_config_access()
478 * devfn - device/function combination that the read is
491 unsigned int devfn, msp_pcibios_read_config_byte()
502 if (msp_pcibios_config_access(PCI_ACCESS_READ, bus, devfn, msp_pcibios_read_config_byte()
525 * devfn - device/function combination that the read is
539 unsigned int devfn, msp_pcibios_read_config_word()
561 if (msp_pcibios_config_access(PCI_ACCESS_READ, bus, devfn, msp_pcibios_read_config_word()
582 * devfn - device/function combination that the read is
596 unsigned int devfn, msp_pcibios_read_config_dword()
613 if (msp_pcibios_config_access(PCI_ACCESS_READ, bus, devfn, msp_pcibios_read_config_dword()
635 * devfn - device/function combination that the write is
649 unsigned int devfn, msp_pcibios_write_config_byte()
656 if (msp_pcibios_config_access(PCI_ACCESS_READ, bus, devfn, msp_pcibios_write_config_byte()
665 if (msp_pcibios_config_access(PCI_ACCESS_WRITE, bus, devfn, msp_pcibios_write_config_byte()
683 * devfn - device/function combination that the write is
698 unsigned int devfn, msp_pcibios_write_config_word()
709 if (msp_pcibios_config_access(PCI_ACCESS_READ, bus, devfn, msp_pcibios_write_config_word()
718 if (msp_pcibios_config_access(PCI_ACCESS_WRITE, bus, devfn, msp_pcibios_write_config_word()
735 * devfn - device/function combination that the write is
750 unsigned int devfn, msp_pcibios_write_config_dword()
759 if (msp_pcibios_config_access(PCI_ACCESS_WRITE, bus, devfn, msp_pcibios_write_config_dword()
777 * devfn - device/function combination that the write is
792 unsigned int devfn, msp_pcibios_read_config()
798 if (msp_pcibios_read_config_byte(bus, devfn, where, val)) { msp_pcibios_read_config()
802 if (msp_pcibios_read_config_word(bus, devfn, where, val)) { msp_pcibios_read_config()
806 if (msp_pcibios_read_config_dword(bus, devfn, where, val)) { msp_pcibios_read_config()
828 * devfn - device/function combination that the write is
843 unsigned int devfn, msp_pcibios_write_config()
849 if (msp_pcibios_write_config_byte(bus, devfn, msp_pcibios_write_config()
854 if (msp_pcibios_write_config_word(bus, devfn, msp_pcibios_write_config()
859 if (msp_pcibios_write_config_dword(bus, devfn, where, val)) { msp_pcibios_write_config()
360 msp_pcibios_config_access(unsigned char access_type, struct pci_bus *bus, unsigned int devfn, unsigned char where, u32 *data) msp_pcibios_config_access() argument
490 msp_pcibios_read_config_byte(struct pci_bus *bus, unsigned int devfn, int where, u32 *val) msp_pcibios_read_config_byte() argument
538 msp_pcibios_read_config_word(struct pci_bus *bus, unsigned int devfn, int where, u32 *val) msp_pcibios_read_config_word() argument
595 msp_pcibios_read_config_dword(struct pci_bus *bus, unsigned int devfn, int where, u32 *val) msp_pcibios_read_config_dword() argument
648 msp_pcibios_write_config_byte(struct pci_bus *bus, unsigned int devfn, int where, u8 val) msp_pcibios_write_config_byte() argument
697 msp_pcibios_write_config_word(struct pci_bus *bus, unsigned int devfn, int where, u16 val) msp_pcibios_write_config_word() argument
749 msp_pcibios_write_config_dword(struct pci_bus *bus, unsigned int devfn, int where, u32 val) msp_pcibios_write_config_dword() argument
791 msp_pcibios_read_config(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val) msp_pcibios_read_config() argument
842 msp_pcibios_write_config(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val) msp_pcibios_write_config() argument
H A Dpci-rt3883.c234 static int rt3883_pci_config_read(struct pci_bus *bus, unsigned int devfn, rt3883_pci_config_read() argument
247 address = rt3883_pci_get_cfgaddr(bus->number, PCI_SLOT(devfn), rt3883_pci_config_read()
248 PCI_FUNC(devfn), where); rt3883_pci_config_read()
268 static int rt3883_pci_config_write(struct pci_bus *bus, unsigned int devfn, rt3883_pci_config_write() argument
281 address = rt3883_pci_get_cfgaddr(bus->number, PCI_SLOT(devfn), rt3883_pci_config_write()
282 PCI_FUNC(devfn), where); rt3883_pci_config_write()
470 int devfn; local
476 devfn = of_pci_get_devfn(child);
477 if (devfn < 0)
480 switch (PCI_SLOT(devfn)) {
H A Dops-tx3927.c48 static int mkaddr(struct pci_bus *bus, unsigned char devfn, unsigned char where) mkaddr() argument
51 devfn >= PCI_DEVFN(TX3927_PCIC_MAX_DEVNU, 0)) mkaddr()
55 ((devfn & 0xff) << 0x08) | mkaddr()
76 static int tx3927_pci_read_config(struct pci_bus *bus, unsigned int devfn, tx3927_pci_read_config() argument
79 if (mkaddr(bus, devfn, where)) { tx3927_pci_read_config()
101 static int tx3927_pci_write_config(struct pci_bus *bus, unsigned int devfn, tx3927_pci_write_config() argument
104 if (mkaddr(bus, devfn, where)) tx3927_pci_write_config()
H A Dfixup-emma2rh.c57 if (PCI_SLOT(dev->devfn) == EMMA2RH_USB_SLOT) nec_usb_controller_fixup()
74 if (PCI_SLOT(dev->devfn) == EMMA2RH_PCI_HOST_SLOT) { emma2rh_pci_host_fixup()
H A Dpcie-octeon.c1541 unsigned int devfn, int reg, int size, octeon_pcie_read_config()
1581 if ((bus->parent == NULL) && (devfn >> 3 != 0)) octeon_pcie_read_config()
1599 if ((bus->parent == NULL) && (devfn >= 2)) octeon_pcie_read_config()
1615 if ((bus_number == 2) && (devfn >> 3 != 2)) octeon_pcie_read_config()
1622 if ((bus_number == 2) && (devfn >> 3 != 3)) octeon_pcie_read_config()
1627 !((devfn == (2 << 3)) || (devfn == (3 << 3)))) octeon_pcie_read_config()
1638 !((devfn >> 3 >= 1) && (devfn >> 3 <= 4))) octeon_pcie_read_config()
1641 if ((bus_number == 5) && (devfn >> 3 != 0)) octeon_pcie_read_config()
1644 if ((bus_number == 6) && (devfn >> 3 != 0)) octeon_pcie_read_config()
1647 if ((bus_number == 7) && (devfn >> 3 != 0)) octeon_pcie_read_config()
1650 if ((bus_number == 8) && (devfn >> 3 != 0)) octeon_pcie_read_config()
1670 pr_debug("pcie_cfg_rd port=%d b=%d devfn=0x%03x reg=0x%03x" octeon_pcie_read_config()
1671 " size=%d ", pcie_port, bus_number, devfn, reg, size); octeon_pcie_read_config()
1676 devfn >> 3, devfn & 0x7, reg); octeon_pcie_read_config()
1680 devfn >> 3, devfn & 0x7, reg); octeon_pcie_read_config()
1684 devfn >> 3, devfn & 0x7, reg); octeon_pcie_read_config()
1712 static int octeon_pcie0_read_config(struct pci_bus *bus, unsigned int devfn, octeon_pcie0_read_config() argument
1715 return octeon_pcie_read_config(0, bus, devfn, reg, size, val); octeon_pcie0_read_config()
1718 static int octeon_pcie1_read_config(struct pci_bus *bus, unsigned int devfn, octeon_pcie1_read_config() argument
1721 return octeon_pcie_read_config(1, bus, devfn, reg, size, val); octeon_pcie1_read_config()
1724 static int octeon_dummy_read_config(struct pci_bus *bus, unsigned int devfn, octeon_dummy_read_config() argument
1734 unsigned int devfn, int reg, octeon_pcie_write_config()
1744 pr_debug("pcie_cfg_wr port=%d b=%d devfn=0x%03x" octeon_pcie_write_config()
1745 " reg=0x%03x size=%d val=%08x\n", pcie_port, bus_number, devfn, octeon_pcie_write_config()
1751 cvmx_pcie_config_write32(pcie_port, bus_number, devfn >> 3, octeon_pcie_write_config()
1752 devfn & 0x7, reg, val); octeon_pcie_write_config()
1755 cvmx_pcie_config_write16(pcie_port, bus_number, devfn >> 3, octeon_pcie_write_config()
1756 devfn & 0x7, reg, val); octeon_pcie_write_config()
1759 cvmx_pcie_config_write8(pcie_port, bus_number, devfn >> 3, octeon_pcie_write_config()
1760 devfn & 0x7, reg, val); octeon_pcie_write_config()
1768 static int octeon_pcie0_write_config(struct pci_bus *bus, unsigned int devfn, octeon_pcie0_write_config() argument
1771 return octeon_pcie_write_config(0, bus, devfn, reg, size, val); octeon_pcie0_write_config()
1774 static int octeon_pcie1_write_config(struct pci_bus *bus, unsigned int devfn, octeon_pcie1_write_config() argument
1777 return octeon_pcie_write_config(1, bus, devfn, reg, size, val); octeon_pcie1_write_config()
1780 static int octeon_dummy_write_config(struct pci_bus *bus, unsigned int devfn, octeon_dummy_write_config() argument
1540 octeon_pcie_read_config(unsigned int pcie_port, struct pci_bus *bus, unsigned int devfn, int reg, int size, u32 *val) octeon_pcie_read_config() argument
1733 octeon_pcie_write_config(unsigned int pcie_port, struct pci_bus *bus, unsigned int devfn, int reg, int size, u32 val) octeon_pcie_write_config() argument
H A Dfixup-malta.c92 if (PCI_SLOT(pdev->devfn) == 10) { malta_piix_func0_fixup()
126 if (PCI_SLOT(pdev->devfn) == 10) { malta_piix_func1_fixup()
H A Dfixup-mpc30x.c40 return internal_func_irqs[PCI_FUNC(dev->devfn)]; pcibios_map_irq()
H A Dfixup-tb0287.c43 switch (PCI_SLOT(dev->devfn)) { pcibios_map_irq()
H A Dpci-ar724x.c112 static int ar724x_pci_read(struct pci_bus *bus, unsigned int devfn, int where, ar724x_pci_read() argument
123 if (devfn) ar724x_pci_read()
159 static int ar724x_pci_write(struct pci_bus *bus, unsigned int devfn, int where, ar724x_pci_write() argument
171 if (devfn) ar724x_pci_write()
H A Dops-tx4927.c62 static int mkaddr(struct pci_bus *bus, unsigned int devfn, int where, mkaddr() argument
66 devfn >= PCI_DEVFN(TX4927_PCIC_MAX_DEVNU, 0)) mkaddr()
69 | ((devfn & 0xff) << 0x08) | (where & 0xfc) mkaddr()
143 static int tx4927_pci_config_read(struct pci_bus *bus, unsigned int devfn, tx4927_pci_config_read() argument
148 if (mkaddr(bus, devfn, where, pcicptr)) { tx4927_pci_config_read()
165 static int tx4927_pci_config_write(struct pci_bus *bus, unsigned int devfn, tx4927_pci_config_write() argument
170 if (mkaddr(bus, devfn, where, pcicptr)) tx4927_pci_config_write()
H A Dfixup-cobalt.c42 if (dev->devfn == PCI_DEVFN(0, 0) && qube_raq_galileo_early_fixup()
79 if (dev->devfn != PCI_DEVFN(0, 0)) qube_raq_galileo_fixup()
H A Dfixup-fuloong2e.c27 switch (PCI_FUNC(dev->devfn)) { pcibios_map_irq()
67 sb_slot = PCI_SLOT(pdev->devfn); loongson2e_686b_func0_fixup()
/linux-4.1.27/arch/x86/pci/
H A Dlegacy.c39 int devfn; pcibios_scan_specific_bus() local
45 for (devfn = 0; devfn < 256; devfn += 8) { pcibios_scan_specific_bus()
46 if (!raw_pci_read(0, busn, devfn, PCI_VENDOR_ID, 2, &l) && pcibios_scan_specific_bus()
48 DBG("Found device at %02x:%02x [%04x]\n", busn, devfn, l); pcibios_scan_specific_bus()
H A Dmmconfig_32.c28 static u32 get_base_addr(unsigned int seg, int bus, unsigned devfn) get_base_addr() argument
40 static void pci_exp_set_dev_base(unsigned int base, int bus, int devfn) pci_exp_set_dev_base() argument
42 u32 dev_base = base | PCI_MMCFG_BUS_OFFSET(bus) | (devfn << 12); pci_exp_set_dev_base()
53 unsigned int devfn, int reg, int len, u32 *value) pci_mmcfg_read()
58 if ((bus > 255) || (devfn > 255) || (reg > 4095)) { pci_mmcfg_read()
64 base = get_base_addr(seg, bus, devfn); pci_mmcfg_read()
72 pci_exp_set_dev_base(base, bus, devfn); pci_mmcfg_read()
92 unsigned int devfn, int reg, int len, u32 value) pci_mmcfg_write()
97 if ((bus > 255) || (devfn > 255) || (reg > 4095)) pci_mmcfg_write()
101 base = get_base_addr(seg, bus, devfn); pci_mmcfg_write()
109 pci_exp_set_dev_base(base, bus, devfn); pci_mmcfg_write()
52 pci_mmcfg_read(unsigned int seg, unsigned int bus, unsigned int devfn, int reg, int len, u32 *value) pci_mmcfg_read() argument
91 pci_mmcfg_write(unsigned int seg, unsigned int bus, unsigned int devfn, int reg, int len, u32 value) pci_mmcfg_write() argument
H A Dnumachip.c21 static inline char __iomem *pci_dev_base(unsigned int seg, unsigned int bus, unsigned int devfn) pci_dev_base() argument
26 return cfg->virt + (PCI_MMCFG_BUS_OFFSET(bus) | (devfn << 12)); pci_dev_base()
31 unsigned int devfn, int reg, int len, u32 *value) pci_mmcfg_read_numachip()
36 if (unlikely((bus > 255) || (devfn > 255) || (reg > 4095))) { pci_mmcfg_read_numachip()
42 if (unlikely(bus == 0 && devfn >= limit)) { pci_mmcfg_read_numachip()
48 addr = pci_dev_base(seg, bus, devfn); pci_mmcfg_read_numachip()
71 unsigned int devfn, int reg, int len, u32 value) pci_mmcfg_write_numachip()
76 if (unlikely((bus > 255) || (devfn > 255) || (reg > 4095))) pci_mmcfg_write_numachip()
80 if (unlikely(bus == 0 && devfn >= limit)) pci_mmcfg_write_numachip()
84 addr = pci_dev_base(seg, bus, devfn); pci_mmcfg_write_numachip()
30 pci_mmcfg_read_numachip(unsigned int seg, unsigned int bus, unsigned int devfn, int reg, int len, u32 *value) pci_mmcfg_read_numachip() argument
70 pci_mmcfg_write_numachip(unsigned int seg, unsigned int bus, unsigned int devfn, int reg, int len, u32 value) pci_mmcfg_write_numachip() argument
H A Ddirect.c16 #define PCI_CONF1_ADDRESS(bus, devfn, reg) \
18 | (devfn << 8) | (reg & 0xFC))
21 unsigned int devfn, int reg, int len, u32 *value) pci_conf1_read()
25 if (seg || (bus > 255) || (devfn > 255) || (reg > 4095)) { pci_conf1_read()
32 outl(PCI_CONF1_ADDRESS(bus, devfn, reg), 0xCF8); pci_conf1_read()
52 unsigned int devfn, int reg, int len, u32 value) pci_conf1_write()
56 if (seg || (bus > 255) || (devfn > 255) || (reg > 4095)) pci_conf1_write()
61 outl(PCI_CONF1_ADDRESS(bus, devfn, reg), 0xCF8); pci_conf1_write()
95 unsigned int devfn, int reg, int len, u32 *value) pci_conf2_read()
101 if ((bus > 255) || (devfn > 255) || (reg > 255)) { pci_conf2_read()
106 dev = PCI_SLOT(devfn); pci_conf2_read()
107 fn = PCI_FUNC(devfn); pci_conf2_read()
137 unsigned int devfn, int reg, int len, u32 value) pci_conf2_write()
143 if ((bus > 255) || (devfn > 255) || (reg > 255)) pci_conf2_write()
146 dev = PCI_SLOT(devfn); pci_conf2_write()
147 fn = PCI_FUNC(devfn); pci_conf2_write()
197 int year, devfn; pci_sanity_check() local
207 for (devfn = 0; devfn < 0x100; devfn++) { pci_sanity_check()
208 if (o->read(0, 0, devfn, PCI_CLASS_DEVICE, 2, &x)) pci_sanity_check()
213 if (o->read(0, 0, devfn, PCI_VENDOR_ID, 2, &x)) pci_sanity_check()
20 pci_conf1_read(unsigned int seg, unsigned int bus, unsigned int devfn, int reg, int len, u32 *value) pci_conf1_read() argument
51 pci_conf1_write(unsigned int seg, unsigned int bus, unsigned int devfn, int reg, int len, u32 value) pci_conf1_write() argument
94 pci_conf2_read(unsigned int seg, unsigned int bus, unsigned int devfn, int reg, int len, u32 *value) pci_conf2_read() argument
136 pci_conf2_write(unsigned int seg, unsigned int bus, unsigned int devfn, int reg, int len, u32 value) pci_conf2_write() argument
H A Dintel_mid_pci.c52 * @devfn: device in question
54 * Look for the fixed BAR cap on @bus and @devfn, returning its offset
57 static int fixed_bar_cap(struct pci_bus *bus, unsigned int devfn) fixed_bar_cap() argument
69 devfn, pos, 4, &pcie_cap)) fixed_bar_cap()
78 devfn, pos + 4, 4, &cap_data); fixed_bar_cap() local
89 static int pci_device_update_fixed(struct pci_bus *bus, unsigned int devfn, pci_device_update_fixed() argument
102 raw_pci_ext_ops->read(domain, busnum, devfn, pci_device_update_fixed()
125 return raw_pci_ext_ops->write(domain, busnum, devfn, reg, 4, pci_device_update_fixed()
130 return raw_pci_ext_ops->write(domain, busnum, devfn, reg, len, val); pci_device_update_fixed()
136 * @devfn: device & function in question
143 static bool type1_access_ok(unsigned int bus, unsigned int devfn, int reg) type1_access_ok() argument
155 if (bus == 0 && (devfn == PCI_DEVFN(2, 0) type1_access_ok()
156 || devfn == PCI_DEVFN(0, 0) type1_access_ok()
157 || devfn == PCI_DEVFN(3, 0))) type1_access_ok()
162 static int pci_read(struct pci_bus *bus, unsigned int devfn, int where, pci_read() argument
165 if (type1_access_ok(bus->number, devfn, where)) pci_read()
167 devfn, where, size, value); pci_read()
169 devfn, where, size, value); pci_read()
172 static int pci_write(struct pci_bus *bus, unsigned int devfn, int where, pci_write() argument
190 offset = fixed_bar_cap(bus, devfn); pci_write()
193 return pci_device_update_fixed(bus, devfn, where, size, value, pci_write()
202 if (type1_access_ok(bus->number, devfn, where)) pci_write()
204 devfn, where, size, value); pci_write()
205 return raw_pci_ext_ops->write(pci_domain_nr(bus), bus->number, devfn, pci_write()
283 if (type1_access_ok(dev->bus->number, dev->devfn, PCI_DEVICE_ID)) pci_d3delay_fixup()
315 offset = fixed_bar_cap(dev->bus, dev->devfn); pci_fixed_bar_fixup()
316 if (!offset || PCI_DEVFN(2, 0) == dev->devfn || pci_fixed_bar_fixup()
317 PCI_DEVFN(2, 2) == dev->devfn) pci_fixed_bar_fixup()
H A Dmmconfig_64.c18 static char __iomem *pci_dev_base(unsigned int seg, unsigned int bus, unsigned int devfn) pci_dev_base() argument
23 return cfg->virt + (PCI_MMCFG_BUS_OFFSET(bus) | (devfn << 12)); pci_dev_base()
28 unsigned int devfn, int reg, int len, u32 *value) pci_mmcfg_read()
33 if (unlikely((bus > 255) || (devfn > 255) || (reg > 4095))) { pci_mmcfg_read()
39 addr = pci_dev_base(seg, bus, devfn); pci_mmcfg_read()
62 unsigned int devfn, int reg, int len, u32 value) pci_mmcfg_write()
67 if (unlikely((bus > 255) || (devfn > 255) || (reg > 4095))) pci_mmcfg_write()
71 addr = pci_dev_base(seg, bus, devfn); pci_mmcfg_write()
27 pci_mmcfg_read(unsigned int seg, unsigned int bus, unsigned int devfn, int reg, int len, u32 *value) pci_mmcfg_read() argument
61 pci_mmcfg_write(unsigned int seg, unsigned int bus, unsigned int devfn, int reg, int len, u32 value) pci_mmcfg_write() argument
H A Dolpc.c45 static const uint32_t lxnb_hdr[] = { /* dev 1 function 0 - devfn = 8 */
58 static const uint32_t gxnb_hdr[] = { /* dev 1 function 0 - devfn = 8 */
71 static const uint32_t lxfb_hdr[] = { /* dev 1 function 1 - devfn = 9 */
84 static const uint32_t gxfb_hdr[] = { /* dev 1 function 1 - devfn = 9 */
97 static const uint32_t aes_hdr[] = { /* dev 1 function 2 - devfn = 0xa */
111 static const uint32_t isa_hdr[] = { /* dev f function 0 - devfn = 78 */
124 static const uint32_t ac97_hdr[] = { /* dev f function 3 - devfn = 7b */
137 static const uint32_t ohci_hdr[] = { /* dev f function 4 - devfn = 7c */
151 static const uint32_t ehci_hdr[] = { /* dev f function 4 - devfn = 7d */
177 static int is_simulated(unsigned int bus, unsigned int devfn) is_simulated() argument
179 return (!bus && ((PCI_SLOT(devfn) == NB_SLOT) || is_simulated()
180 (PCI_SLOT(devfn) == SB_SLOT))); is_simulated()
205 unsigned int devfn, int reg, int len, uint32_t *value) pci_olpc_read()
212 if (!is_simulated(bus, devfn)) pci_olpc_read()
213 return pci_direct_conf1.read(seg, bus, devfn, reg, len, value); pci_olpc_read()
222 switch (devfn) { pci_olpc_read()
267 unsigned int devfn, int reg, int len, uint32_t value) pci_olpc_write()
272 if (!is_simulated(bus, devfn)) pci_olpc_write()
273 return pci_direct_conf1.write(seg, bus, devfn, reg, len, value); pci_olpc_write()
297 printk(KERN_WARNING "OLPC PCI: Config write to devfn" pci_olpc_write()
298 " %x reg %x value %x\n", devfn, reg, value); pci_olpc_write()
204 pci_olpc_read(unsigned int seg, unsigned int bus, unsigned int devfn, int reg, int len, uint32_t *value) pci_olpc_read() argument
266 pci_olpc_write(unsigned int seg, unsigned int bus, unsigned int devfn, int reg, int len, uint32_t value) pci_olpc_write() argument
H A Dce4100.c200 int bridge_read(unsigned int devfn, int reg, int len, u32 *value) bridge_read() argument
229 pci_direct_conf1.read(0, 0, devfn, bridge_read()
269 unsigned int devfn, int reg, int len, u32 *value) ce4100_conf_read()
276 if (bus1_fixups[i].dev_func == devfn && ce4100_conf_read()
287 if (bus == 0 && (PCI_DEVFN(1, 0) == devfn) && ce4100_conf_read()
288 !bridge_read(devfn, reg, len, value)) ce4100_conf_read()
291 return pci_direct_conf1.read(seg, bus, devfn, reg, len, value); ce4100_conf_read()
295 unsigned int devfn, int reg, int len, u32 value) ce4100_conf_write()
302 if (bus1_fixups[i].dev_func == devfn && ce4100_conf_write()
313 if (bus == 0 && PCI_DEVFN(1, 0) == devfn && ce4100_conf_write()
317 return pci_direct_conf1.write(seg, bus, devfn, reg, len, value); ce4100_conf_write()
268 ce4100_conf_read(unsigned int seg, unsigned int bus, unsigned int devfn, int reg, int len, u32 *value) ce4100_conf_read() argument
294 ce4100_conf_write(unsigned int seg, unsigned int bus, unsigned int devfn, int reg, int len, u32 value) ce4100_conf_write() argument
H A Dcommon.c41 int raw_pci_read(unsigned int domain, unsigned int bus, unsigned int devfn, raw_pci_read() argument
45 return raw_pci_ops->read(domain, bus, devfn, reg, len, val); raw_pci_read()
47 return raw_pci_ext_ops->read(domain, bus, devfn, reg, len, val); raw_pci_read()
51 int raw_pci_write(unsigned int domain, unsigned int bus, unsigned int devfn, raw_pci_write() argument
55 return raw_pci_ops->write(domain, bus, devfn, reg, len, val); raw_pci_write()
57 return raw_pci_ext_ops->write(domain, bus, devfn, reg, len, val); raw_pci_write()
61 static int pci_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *value) pci_read() argument
64 devfn, where, size, value); pci_read()
67 static int pci_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 value) pci_write() argument
70 devfn, where, size, value); pci_write()
661 (PCI_SLOT(dev->devfn) == rom->device) && pcibios_add_device()
662 (PCI_FUNC(dev->devfn) == rom->function) && pcibios_add_device()
H A Dpcbios.c178 unsigned int devfn, int reg, int len, u32 *value) pci_bios_read()
182 unsigned long bx = (bus << 8) | devfn; pci_bios_read()
185 if (!value || (bus > 255) || (devfn > 255) || (reg > 255)) pci_bios_read()
245 unsigned int devfn, int reg, int len, u32 value) pci_bios_write()
249 unsigned long bx = (bus << 8) | devfn; pci_bios_write()
252 if ((bus > 255) || (devfn > 255) || (reg > 255)) pci_bios_write()
441 "b" ((dev->bus->number << 8) | dev->devfn), pcibios_set_irq_routing()
177 pci_bios_read(unsigned int seg, unsigned int bus, unsigned int devfn, int reg, int len, u32 *value) pci_bios_read() argument
244 pci_bios_write(unsigned int seg, unsigned int bus, unsigned int devfn, int reg, int len, u32 value) pci_bios_write() argument
H A Dxen.c294 map_irq.devfn = dev->devfn; xen_initdom_setup_msi_irqs()
367 restore_ext.devfn = dev->devfn; xen_initdom_restore_msi_irqs()
378 restore.devfn = dev->devfn; xen_initdom_restore_msi_irqs()
/linux-4.1.27/drivers/pci/hotplug/
H A Dcpci_hotplug_pci.c55 slot->devfn, cpci_get_attention_status()
61 slot->devfn, cpci_get_attention_status()
75 slot->devfn, cpci_set_attention_status()
80 slot->devfn, cpci_set_attention_status()
89 slot->devfn, cpci_set_attention_status()
102 slot->devfn, cpci_get_hs_csr()
107 slot->devfn, cpci_get_hs_csr()
121 slot->devfn, cpci_check_and_clear_ins()
126 slot->devfn, cpci_check_and_clear_ins()
133 slot->devfn, cpci_check_and_clear_ins()
150 slot->devfn, cpci_check_ext()
155 slot->devfn, cpci_check_ext()
170 slot->devfn, cpci_clear_ext()
175 slot->devfn, cpci_clear_ext()
182 slot->devfn, cpci_clear_ext()
196 slot->devfn, cpci_led_on()
201 slot->devfn, cpci_led_on()
208 slot->devfn, cpci_led_on()
225 slot->devfn, cpci_led_off()
230 slot->devfn, cpci_led_off()
237 slot->devfn, cpci_led_off()
265 slot->bus->number, PCI_SLOT(slot->devfn), PCI_FUNC(slot->devfn)); cpci_configure_slot()
266 slot->dev = pci_get_slot(slot->bus, slot->devfn); cpci_configure_slot()
278 n = pci_scan_slot(slot->bus, slot->devfn); cpci_configure_slot()
280 slot->dev = pci_get_slot(slot->bus, slot->devfn); cpci_configure_slot()
290 if (PCI_SLOT(dev->devfn) != PCI_SLOT(slot->devfn)) cpci_configure_slot()
320 if (PCI_SLOT(dev->devfn) != PCI_SLOT(slot->devfn)) cpci_unconfigure_slot()
H A Dibmphp_pci.c107 unsigned int devfn = PCI_DEVFN(device, function); ibmphp_configure_card() local
115 pci_bus_read_config_word (ibmphp_pci_bus, devfn, PCI_VENDOR_ID, &vendor_id); ibmphp_configure_card()
129 pci_bus_read_config_byte (ibmphp_pci_bus, devfn, PCI_HEADER_TYPE, &hdr_type); ibmphp_configure_card()
130 pci_bus_read_config_dword (ibmphp_pci_bus, devfn, PCI_CLASS_REVISION, &class); ibmphp_configure_card()
203 pci_bus_read_config_byte (ibmphp_pci_bus, devfn, PCI_SECONDARY_BUS, &sec_number); ibmphp_configure_card()
275 pci_bus_read_config_byte (ibmphp_pci_bus, devfn, PCI_SECONDARY_BUS, &sec_number); ibmphp_configure_card()
367 unsigned int devfn; configure_device() local
371 devfn = PCI_DEVFN(func->device, func->function); configure_device()
389 pci_bus_write_config_dword (ibmphp_pci_bus, devfn, address[count], 0xFFFFFFFF); configure_device()
390 pci_bus_read_config_dword (ibmphp_pci_bus, devfn, address[count], &bar[count]); configure_device()
425 pci_bus_write_config_dword (ibmphp_pci_bus, devfn, address[count], func->io[count]->start); configure_device()
429 pci_bus_read_config_dword (ibmphp_pci_bus, devfn, address[count], &bar[count]); configure_device()
487 pci_bus_write_config_dword (ibmphp_pci_bus, devfn, address[count], func->pfmem[count]->start); configure_device()
491 pci_bus_read_config_dword (ibmphp_pci_bus, devfn, address[count], &bar[count]); configure_device()
499 pci_bus_write_config_dword (ibmphp_pci_bus, devfn, address[count], 0x00000000); configure_device()
529 pci_bus_write_config_dword (ibmphp_pci_bus, devfn, address[count], func->mem[count]->start); configure_device()
532 pci_bus_read_config_dword (ibmphp_pci_bus, devfn, address[count], &bar[count]); configure_device()
541 pci_bus_write_config_dword (ibmphp_pci_bus, devfn, address[count], 0x00000000); configure_device()
548 pci_bus_read_config_byte (ibmphp_pci_bus, devfn, PCI_INTERRUPT_PIN, &irq); configure_device()
550 pci_bus_write_config_byte (ibmphp_pci_bus, devfn, PCI_INTERRUPT_LINE, func->irq[irq - 1]); configure_device()
552 pci_bus_write_config_byte (ibmphp_pci_bus, devfn, PCI_CACHE_LINE_SIZE, CACHE); configure_device()
553 pci_bus_write_config_byte (ibmphp_pci_bus, devfn, PCI_LATENCY_TIMER, LATENCY); configure_device()
555 pci_bus_write_config_dword (ibmphp_pci_bus, devfn, PCI_ROM_ADDRESS, 0x00L); configure_device()
556 pci_bus_write_config_word (ibmphp_pci_bus, devfn, PCI_COMMAND, DEVICEENABLE); configure_device()
596 unsigned int devfn; configure_bridge() local
602 devfn = PCI_DEVFN(func->function, func->device); configure_bridge()
609 pci_bus_write_config_byte (ibmphp_pci_bus, devfn, PCI_PRIMARY_BUS, func->busno); configure_bridge()
612 pci_bus_config_byte (ibmphp_pci_bus, devfn, PCI_PRIMARY_BUS, &pri_number); configure_bridge()
626 pci_bus_write_config_byte (ibmphp_pci_bus, devfn, PCI_SECONDARY_BUS, sec_number); configure_bridge()
629 pci_bus_read_config_byte (ibmphp_pci_bus, devfn, PCI_SECONDARY_BUS, &sec_number); configure_bridge()
633 pci_bus_write_config_byte (ibmphp_pci_bus, devfn, PCI_SUBORDINATE_BUS, sec_number); configure_bridge()
636 pci_bus_read_config_byte (ibmphp_pci_bus, devfn, PCI_SUBORDINATE_BUS, &sec_number); configure_bridge()
640 pci_bus_write_config_byte (ibmphp_pci_bus, devfn, PCI_CACHE_LINE_SIZE, CACHE); configure_bridge()
641 pci_bus_write_config_byte (ibmphp_pci_bus, devfn, PCI_LATENCY_TIMER, LATENCY); configure_bridge()
642 pci_bus_write_config_byte (ibmphp_pci_bus, devfn, PCI_SEC_LATENCY_TIMER, LATENCY); configure_bridge()
655 pci_bus_write_config_dword (ibmphp_pci_bus, devfn, address[count], 0xFFFFFFFF); configure_bridge()
656 pci_bus_read_config_dword (ibmphp_pci_bus, devfn, address[count], &bar[count]); configure_bridge()
696 pci_bus_write_config_dword (ibmphp_pci_bus, devfn, address[count], func->io[count]->start); configure_bridge()
748 pci_bus_write_config_dword (ibmphp_pci_bus, devfn, address[count], func->pfmem[count]->start); configure_bridge()
754 pci_bus_write_config_dword (ibmphp_pci_bus, devfn, address[count], 0x00000000); configure_bridge()
785 pci_bus_write_config_dword (ibmphp_pci_bus, devfn, address[count], func->mem[count]->start); configure_bridge()
791 pci_bus_write_config_dword (ibmphp_pci_bus, devfn, address[count], 0x00000000); configure_bridge()
950 pci_bus_read_config_byte (ibmphp_pci_bus, devfn, PCI_IO_BASE, &io_base); configure_bridge()
951 pci_bus_read_config_word (ibmphp_pci_bus, devfn, PCI_PREF_MEMORY_BASE, &pfmem_base); configure_bridge()
963 pci_bus_write_config_byte (ibmphp_pci_bus, devfn, PCI_IO_BASE, 0x00 | bus->rangeIO->start >> 8); configure_bridge()
964 pci_bus_write_config_byte (ibmphp_pci_bus, devfn, PCI_IO_LIMIT, 0x00 | bus->rangeIO->end >> 8); configure_bridge()
967 pci_bus_read_config_byte (ibmphp_pci_bus, devfn, PCI_IO_BASE, &temp); configure_bridge()
969 pci_bus_read_config_byte (ibmphp_pci_bus, devfn, PCI_IO_LIMIT, &temp); configure_bridge()
974 pci_bus_write_config_word (ibmphp_pci_bus, devfn, PCI_IO_BASE_UPPER16, 0x0000); configure_bridge()
975 pci_bus_write_config_word (ibmphp_pci_bus, devfn, PCI_IO_LIMIT_UPPER16, 0x0000); configure_bridge()
978 pci_bus_write_config_byte (ibmphp_pci_bus, devfn, PCI_IO_BASE, 0x00); configure_bridge()
979 pci_bus_write_config_byte (ibmphp_pci_bus, devfn, PCI_IO_LIMIT, 0x00); configure_bridge()
983 pci_bus_write_config_word (ibmphp_pci_bus, devfn, PCI_MEMORY_BASE, 0x0000 | bus->rangeMem->start >> 16); configure_bridge()
984 pci_bus_write_config_word (ibmphp_pci_bus, devfn, PCI_MEMORY_LIMIT, 0x0000 | bus->rangeMem->end >> 16); configure_bridge()
987 pci_bus_read_config_word (ibmphp_pci_bus, devfn, PCI_MEMORY_BASE, &temp); configure_bridge()
989 pci_bus_read_config_word (ibmphp_pci_bus, devfn, PCI_MEMORY_LIMIT, &temp); configure_bridge()
994 pci_bus_write_config_word (ibmphp_pci_bus, devfn, PCI_MEMORY_BASE, 0xffff); configure_bridge()
995 pci_bus_write_config_word (ibmphp_pci_bus, devfn, PCI_MEMORY_LIMIT, 0x0000); configure_bridge()
998 pci_bus_write_config_word (ibmphp_pci_bus, devfn, PCI_PREF_MEMORY_BASE, 0x0000 | bus->rangePFMem->start >> 16); configure_bridge()
999 pci_bus_write_config_word (ibmphp_pci_bus, devfn, PCI_PREF_MEMORY_LIMIT, 0x0000 | bus->rangePFMem->end >> 16); configure_bridge()
1002 pci_bus_read_config_word (ibmphp_pci_bus, devfn, PCI_PREF_MEMORY_BASE, &temp); configure_bridge()
1004 pci_bus_read_config_word (ibmphp_pci_bus, devfn, PCI_PREF_MEMORY_LIMIT, &temp); configure_bridge()
1009 pci_bus_write_config_dword (ibmphp_pci_bus, devfn, PCI_PREF_BASE_UPPER32, 0x00000000); configure_bridge()
1010 pci_bus_write_config_dword (ibmphp_pci_bus, devfn, PCI_PREF_LIMIT_UPPER32, 0x00000000); configure_bridge()
1013 pci_bus_write_config_word (ibmphp_pci_bus, devfn, PCI_PREF_MEMORY_BASE, 0xffff); configure_bridge()
1014 pci_bus_write_config_word (ibmphp_pci_bus, devfn, PCI_PREF_MEMORY_LIMIT, 0x0000); configure_bridge()
1019 pci_bus_read_config_byte (ibmphp_pci_bus, devfn, PCI_INTERRUPT_PIN, &irq); configure_bridge()
1021 pci_bus_write_config_byte (ibmphp_pci_bus, devfn, PCI_INTERRUPT_LINE, func->irq[irq - 1]); configure_bridge()
1023 pci_bus_write_config_byte (ibmphp_pci_bus, devfn, PCI_BRIDGE_CONTROL, ctrl); configure_bridge()
1024 pci_bus_write_config_byte (ibmphp_pci_bus, devfn, PCI_BRIDGE_CONTROL, PCI_BRIDGE_CTL_PARITY); configure_bridge()
1025 pci_bus_write_config_byte (ibmphp_pci_bus, devfn, PCI_BRIDGE_CONTROL, PCI_BRIDGE_CTL_SERR); configure_bridge()
1028 pci_bus_write_config_word (ibmphp_pci_bus, devfn, PCI_COMMAND, DEVICEENABLE); configure_bridge()
1029 pci_bus_write_config_word (ibmphp_pci_bus, devfn, PCI_BRIDGE_CONTROL, 0x07); configure_bridge()
1084 unsigned int devfn; scan_behind_bridge() local
1110 devfn = PCI_DEVFN(device, function); scan_behind_bridge()
1112 pci_bus_read_config_word (ibmphp_pci_bus, devfn, PCI_VENDOR_ID, &vendor_id); scan_behind_bridge()
1118 pci_bus_read_config_byte (ibmphp_pci_bus, devfn, PCI_HEADER_TYPE, &hdr_type); scan_behind_bridge()
1119 pci_bus_read_config_dword (ibmphp_pci_bus, devfn, PCI_CLASS_REVISION, &class); scan_behind_bridge()
1144 pci_bus_read_config_byte (ibmphp_pci_bus, devfn, address[count], &tmp); scan_behind_bridge()
1146 pci_bus_write_config_dword (ibmphp_pci_bus, devfn, address[count], 0xFFFFFFFD); scan_behind_bridge()
1148 pci_bus_write_config_dword (ibmphp_pci_bus, devfn, address[count], 0xFFFFFFFF); scan_behind_bridge()
1150 pci_bus_write_config_dword (ibmphp_pci_bus, devfn, address[count], 0xFFFFFFFF); scan_behind_bridge()
1151 pci_bus_read_config_dword (ibmphp_pci_bus, devfn, address[count], &bar[count]); scan_behind_bridge()
1235 unsigned int devfn; unconfigure_boot_device() local
1245 devfn = PCI_DEVFN(device, function); unconfigure_boot_device()
1248 pci_bus_read_config_dword (ibmphp_pci_bus, devfn, address[count], &start_address); unconfigure_boot_device()
1252 pci_bus_write_config_dword (ibmphp_pci_bus, devfn, address[count], 0xFFFFFFFF); unconfigure_boot_device()
1253 pci_bus_read_config_dword (ibmphp_pci_bus, devfn, address[count], &size); unconfigure_boot_device()
1254 pci_bus_write_config_dword (ibmphp_pci_bus, devfn, address[count], start_address); unconfigure_boot_device()
1347 unsigned int devfn; unconfigure_boot_bridge() local
1349 devfn = PCI_DEVFN(device, function); unconfigure_boot_bridge()
1353 pci_bus_read_config_byte (ibmphp_pci_bus, devfn, PCI_PRIMARY_BUS, &pri_number); unconfigure_boot_bridge()
1356 pci_bus_read_config_byte (ibmphp_pci_bus, devfn, PCI_SECONDARY_BUS, &sec_number); unconfigure_boot_bridge()
1365 pci_bus_read_config_byte (ibmphp_pci_bus, devfn, PCI_SUBORDINATE_BUS, &sub_number); unconfigure_boot_bridge()
1385 pci_bus_read_config_dword (ibmphp_pci_bus, devfn, address[count], &start_address); unconfigure_boot_bridge()
1453 unsigned int devfn; unconfigure_boot_card() local
1464 devfn = PCI_DEVFN(device, function); unconfigure_boot_card()
1467 pci_bus_read_config_word (ibmphp_pci_bus, devfn, PCI_VENDOR_ID, &vendor_id); unconfigure_boot_card()
1480 pci_bus_read_config_byte (ibmphp_pci_bus, devfn, PCI_HEADER_TYPE, &hdr_type); unconfigure_boot_card()
1481 pci_bus_read_config_dword (ibmphp_pci_bus, devfn, PCI_CLASS_REVISION, &class); unconfigure_boot_card()
H A Dcpqphp_pci.c142 static int PCI_RefinedAccessConfig(struct pci_bus *bus, unsigned int devfn, u8 offset, u32 *value) PCI_RefinedAccessConfig() argument
146 if (pci_bus_read_config_dword (bus, devfn, PCI_VENDOR_ID, &vendID) == -1) PCI_RefinedAccessConfig()
150 return pci_bus_read_config_dword (bus, devfn, offset, value); PCI_RefinedAccessConfig()
178 fakedev->devfn = dev_num << 3; cpqhp_set_irq()
253 tdevice = cpqhp_routing_table->slots[loop].devfn; PCI_GetBusDevHelper()
264 dbg("bus_num %d devfn %d\n", *bus_num, *dev_num); PCI_GetBusDevHelper()
565 unsigned int devfn; cpqhp_save_base_addr_length() local
571 devfn = PCI_DEVFN(func->device, func->function); cpqhp_save_base_addr_length()
574 pci_bus_read_config_byte (pci_bus, devfn, PCI_HEADER_TYPE, &header_type); cpqhp_save_base_addr_length()
577 pci_bus_read_config_byte (pci_bus, devfn, PCI_SECONDARY_BUS, &secondary_bus); cpqhp_save_base_addr_length()
598 pci_bus_write_config_dword (pci_bus, devfn, cloop, temp_register); cpqhp_save_base_addr_length()
599 pci_bus_read_config_dword (pci_bus, devfn, cloop, &base); cpqhp_save_base_addr_length()
634 pci_bus_write_config_dword (pci_bus, devfn, cloop, temp_register); cpqhp_save_base_addr_length()
635 pci_bus_read_config_dword (pci_bus, devfn, cloop, &base); cpqhp_save_base_addr_length()
710 unsigned int devfn; cpqhp_save_used_resources() local
716 devfn = PCI_DEVFN(func->device, func->function); cpqhp_save_used_resources()
719 pci_bus_read_config_word(pci_bus, devfn, PCI_COMMAND, &save_command); cpqhp_save_used_resources()
723 pci_bus_write_config_word(pci_bus, devfn, PCI_COMMAND, command); cpqhp_save_used_resources()
726 pci_bus_read_config_byte(pci_bus, devfn, PCI_HEADER_TYPE, &header_type); cpqhp_save_used_resources()
731 pci_bus_write_config_word(pci_bus, devfn, PCI_BRIDGE_CONTROL, command); cpqhp_save_used_resources()
732 pci_bus_read_config_byte(pci_bus, devfn, PCI_SECONDARY_BUS, &secondary_bus); cpqhp_save_used_resources()
733 pci_bus_read_config_byte(pci_bus, devfn, PCI_SUBORDINATE_BUS, &temp_byte); cpqhp_save_used_resources()
746 pci_bus_read_config_byte(pci_bus, devfn, PCI_IO_BASE, &b_base); cpqhp_save_used_resources()
747 pci_bus_read_config_byte(pci_bus, devfn, PCI_IO_LIMIT, &b_length); cpqhp_save_used_resources()
762 pci_bus_read_config_word(pci_bus, devfn, PCI_MEMORY_BASE, &w_base); cpqhp_save_used_resources()
763 pci_bus_read_config_word(pci_bus, devfn, PCI_MEMORY_LIMIT, &w_length); cpqhp_save_used_resources()
778 pci_bus_read_config_word(pci_bus, devfn, PCI_PREF_MEMORY_BASE, &w_base); cpqhp_save_used_resources()
779 pci_bus_read_config_word(pci_bus, devfn, PCI_PREF_MEMORY_LIMIT, &w_length); cpqhp_save_used_resources()
794 pci_bus_read_config_dword (pci_bus, devfn, cloop, &save_base); cpqhp_save_used_resources()
797 pci_bus_write_config_dword(pci_bus, devfn, cloop, temp_register); cpqhp_save_used_resources()
798 pci_bus_read_config_dword(pci_bus, devfn, cloop, &base); cpqhp_save_used_resources()
866 pci_bus_read_config_dword(pci_bus, devfn, cloop, &save_base); cpqhp_save_used_resources()
869 pci_bus_write_config_dword(pci_bus, devfn, cloop, temp_register); cpqhp_save_used_resources()
870 pci_bus_read_config_dword(pci_bus, devfn, cloop, &base); cpqhp_save_used_resources()
963 unsigned int devfn; cpqhp_configure_board() local
969 devfn = PCI_DEVFN(func->device, func->function); cpqhp_configure_board()
975 pci_bus_write_config_dword (pci_bus, devfn, cloop, func->config_space[cloop >> 2]); cpqhp_configure_board()
977 pci_bus_read_config_byte (pci_bus, devfn, PCI_HEADER_TYPE, &header_type); cpqhp_configure_board()
981 pci_bus_read_config_byte (pci_bus, devfn, PCI_SECONDARY_BUS, &secondary_bus); cpqhp_configure_board()
1001 pci_bus_read_config_dword (pci_bus, devfn, cloop, &temp); cpqhp_configure_board()
1042 unsigned int devfn; cpqhp_valid_replace() local
1051 devfn = PCI_DEVFN(func->device, func->function); cpqhp_valid_replace()
1053 pci_bus_read_config_dword (pci_bus, devfn, PCI_VENDOR_ID, &temp_register); cpqhp_valid_replace()
1063 pci_bus_read_config_dword (pci_bus, devfn, PCI_CLASS_REVISION, &temp_register); cpqhp_valid_replace()
1070 pci_bus_read_config_byte (pci_bus, devfn, PCI_HEADER_TYPE, &header_type); cpqhp_valid_replace()
1079 pci_bus_write_config_dword (pci_bus, devfn, PCI_PRIMARY_BUS, temp_register); cpqhp_valid_replace()
1097 pci_bus_read_config_dword (pci_bus, devfn, PCI_SUBSYSTEM_VENDOR_ID, &temp_register); cpqhp_valid_replace()
1111 pci_bus_write_config_dword (pci_bus, devfn, cloop, temp_register); cpqhp_valid_replace()
1112 pci_bus_read_config_dword (pci_bus, devfn, cloop, &base); cpqhp_valid_replace()
H A Dshpchp_pci.c65 if (PCI_SLOT(dev->devfn) != p_slot->device) shpchp_configure_device()
94 if (PCI_SLOT(dev->devfn) != p_slot->device) shpchp_unconfigure_device()
H A Dcpqphp_ctrl.c2086 unsigned int devfn; cpqhp_process_SS() local
2100 devfn = PCI_DEVFN(func->device, func->function); cpqhp_process_SS()
2103 rc = pci_bus_read_config_byte (pci_bus, devfn, 0x0B, &class_code); cpqhp_process_SS()
2112 rc = pci_bus_read_config_byte (pci_bus, devfn, PCI_HEADER_TYPE, &header_type); cpqhp_process_SS()
2118 rc = pci_bus_read_config_byte (pci_bus, devfn, PCI_BRIDGE_CONTROL, &BCR); cpqhp_process_SS()
2380 unsigned int devfn; configure_new_function() local
2396 devfn = PCI_DEVFN(func->device, func->function); configure_new_function()
2399 rc = pci_bus_read_config_byte(pci_bus, devfn, PCI_HEADER_TYPE, &temp_byte); configure_new_function()
2406 rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_PRIMARY_BUS, func->bus); configure_new_function()
2421 rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_SECONDARY_BUS, temp_byte); configure_new_function()
2428 rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_SUBORDINATE_BUS, temp_byte); configure_new_function()
2434 rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_SEC_LATENCY_TIMER, temp_byte); configure_new_function()
2437 rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_LATENCY_TIMER, temp_byte); configure_new_function()
2443 rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_CACHE_LINE_SIZE, temp_byte); configure_new_function()
2523 rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_IO_BASE, temp_byte); configure_new_function()
2526 rc = pci_bus_write_config_byte(pci_bus, devfn, PCI_IO_LIMIT, temp_byte); configure_new_function()
2536 rc = pci_bus_write_config_word(pci_bus, devfn, PCI_MEMORY_BASE, temp_word); configure_new_function()
2539 rc = pci_bus_write_config_word(pci_bus, devfn, PCI_MEMORY_LIMIT, temp_word); configure_new_function()
2546 rc = pci_bus_write_config_word (pci_bus, devfn, PCI_PREF_MEMORY_BASE, temp_word); configure_new_function()
2549 rc = pci_bus_write_config_word (pci_bus, devfn, PCI_PREF_MEMORY_LIMIT, temp_word); configure_new_function()
2618 rc = pci_bus_write_config_byte (pci_bus, devfn, PCI_SUBORDINATE_BUS, temp_byte); configure_new_function()
2639 rc = pci_bus_write_config_word (pci_bus, devfn, PCI_IO_BASE, temp_byte); configure_new_function()
2658 rc = pci_bus_write_config_byte (pci_bus, devfn, PCI_IO_LIMIT, temp_byte); configure_new_function()
2664 rc = pci_bus_write_config_word (pci_bus, devfn, PCI_IO_LIMIT, temp_word); configure_new_function()
2690 rc = pci_bus_write_config_word (pci_bus, devfn, PCI_MEMORY_BASE, temp_word); configure_new_function()
2709 rc = pci_bus_write_config_word (pci_bus, devfn, PCI_MEMORY_LIMIT, temp_word); configure_new_function()
2716 rc = pci_bus_write_config_word (pci_bus, devfn, PCI_MEMORY_LIMIT, temp_word); configure_new_function()
2742 rc = pci_bus_write_config_word (pci_bus, devfn, PCI_PREF_MEMORY_BASE, temp_word); configure_new_function()
2761 rc = pci_bus_write_config_word (pci_bus, devfn, PCI_PREF_MEMORY_LIMIT, temp_word); configure_new_function()
2767 rc = pci_bus_write_config_word (pci_bus, devfn, PCI_PREF_MEMORY_LIMIT, temp_word); configure_new_function()
2793 rc = pci_bus_write_config_word (pci_bus, devfn, PCI_COMMAND, command); configure_new_function()
2799 rc = pci_bus_write_config_word (pci_bus, devfn, PCI_BRIDGE_CONTROL, command); configure_new_function()
2802 rc = pci_bus_read_config_byte (pci_bus, devfn, 0x0B, &class_code); configure_new_function()
2812 dbg("CND: bus=%d, devfn=%d, offset=%d\n", pci_bus->number, devfn, cloop); configure_new_function()
2813 rc = pci_bus_write_config_dword (pci_bus, devfn, cloop, temp_register); configure_new_function()
2815 rc = pci_bus_read_config_dword (pci_bus, devfn, cloop, &temp_register); configure_new_function()
2877 rc = pci_bus_write_config_dword(pci_bus, devfn, cloop, base); configure_new_function()
2888 rc = pci_bus_write_config_dword(pci_bus, devfn, cloop, base); configure_new_function()
2894 rc = pci_bus_read_config_byte (pci_bus, devfn, configure_new_function()
2908 rc = pci_bus_read_config_byte (pci_bus, devfn, 0x0B, &class_code); configure_new_function()
2917 rc = pci_bus_write_config_byte (pci_bus, devfn, PCI_INTERRUPT_LINE, IRQ); configure_new_function()
2933 rc = pci_bus_write_config_byte(pci_bus, devfn, configure_new_function()
2938 rc = pci_bus_write_config_byte(pci_bus, devfn, configure_new_function()
2943 rc = pci_bus_write_config_word(pci_bus, devfn, configure_new_function()
2953 rc = pci_bus_write_config_word (pci_bus, devfn, configure_new_function()
H A Dcpqphp_core.c187 tdevice = cpqhp_routing_table->slots[loop].devfn; pci_print_IRQ_route()
349 tdevice = cpqhp_routing_table->slots[loop].devfn >> 3; get_slot_mapping()
448 u8 devfn; set_attention_status() local
454 if (cpqhp_get_bus_dev(ctrl, &bus, &devfn, slot->number) == -1) set_attention_status()
457 device = devfn >> 3; set_attention_status()
458 function = devfn & 0x7; set_attention_status()
475 u8 devfn; process_SI() local
481 if (cpqhp_get_bus_dev(ctrl, &bus, &devfn, slot->number) == -1) process_SI()
484 device = devfn >> 3; process_SI()
485 function = devfn & 0x7; process_SI()
507 u8 devfn; process_SS() local
513 if (cpqhp_get_bus_dev(ctrl, &bus, &devfn, slot->number) == -1) process_SS()
516 device = devfn >> 3; process_SS()
517 function = devfn & 0x7; process_SS()
1092 PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn), ctrl->rev); cpqhpc_probe()
/linux-4.1.27/drivers/xen/
H A Dpci.c51 .add.devfn = pci_dev->devfn xen_add_device()
63 add->physfn.devfn = physfn->devfn; xen_add_device()
66 if (pci_ari_enabled(pci_dev->bus) && PCI_SLOT(pci_dev->devfn)) xen_add_device()
117 .devfn = pci_dev->devfn, xen_add_device()
120 .physfn.devfn = physfn->devfn, xen_add_device()
127 else if (pci_ari_enabled(pci_dev->bus) && PCI_SLOT(pci_dev->devfn)) { xen_add_device()
130 .devfn = pci_dev->devfn, xen_add_device()
139 .devfn = pci_dev->devfn, xen_add_device()
158 .devfn = pci_dev->devfn xen_remove_device()
168 .devfn = pci_dev->devfn xen_remove_device()
H A Ddbgp.c27 dbgp.u.pci.devfn = pdev->devfn; xen_dbgp_op()
/linux-4.1.27/arch/mn10300/unit-asb2305/
H A Dpci.c55 #define CONFIG_CMD(bus, devfn, where) \
56 (0x80000000 | (bus->number << 16) | (devfn << 8) | (where & ~3))
68 static inline int __query(const struct pci_bus *bus, unsigned int devfn) __query() argument
71 return bus->number == 0 && (devfn == PCI_DEVFN(0, 0)); __query()
74 (devfn == PCI_DEVFN(2, 0) || devfn == PCI_DEVFN(3, 0)); __query()
82 static int pci_ampci_read_config_byte(struct pci_bus *bus, unsigned int devfn, pci_ampci_read_config_byte() argument
87 if (bus->number == 0 && devfn == PCI_DEVFN(0, 0)) { pci_ampci_read_config_byte()
91 CONFIG_ADDRESS = CONFIG_CMD(bus, devfn, where); pci_ampci_read_config_byte()
94 if (__query(bus, devfn)) pci_ampci_read_config_byte()
95 __pcidebug("=> %02hx", bus, devfn, where, value); pci_ampci_read_config_byte()
102 static int pci_ampci_read_config_word(struct pci_bus *bus, unsigned int devfn, pci_ampci_read_config_word() argument
107 if (bus->number == 0 && devfn == PCI_DEVFN(0, 0)) { pci_ampci_read_config_word()
111 CONFIG_ADDRESS = CONFIG_CMD(bus, devfn, where); pci_ampci_read_config_word()
114 if (__query(bus, devfn)) pci_ampci_read_config_word()
115 __pcidebug("=> %04hx", bus, devfn, where, value); pci_ampci_read_config_word()
122 static int pci_ampci_read_config_dword(struct pci_bus *bus, unsigned int devfn, pci_ampci_read_config_dword() argument
127 if (bus->number == 0 && devfn == PCI_DEVFN(0, 0)) { pci_ampci_read_config_dword()
131 CONFIG_ADDRESS = CONFIG_CMD(bus, devfn, where); pci_ampci_read_config_dword()
134 if (__query(bus, devfn)) pci_ampci_read_config_dword()
135 __pcidebug("=> %08x", bus, devfn, where, value); pci_ampci_read_config_dword()
142 static int pci_ampci_write_config_byte(struct pci_bus *bus, unsigned int devfn, pci_ampci_write_config_byte() argument
147 if (bus->number == 0 && devfn == PCI_DEVFN(0, 0)) { pci_ampci_write_config_byte()
152 (devfn == PCI_DEVFN(2, 0) || devfn == PCI_DEVFN(3, 0)) pci_ampci_write_config_byte()
154 __pcidebug("<= %02x", bus, devfn, where, value); pci_ampci_write_config_byte()
155 CONFIG_ADDRESS = CONFIG_CMD(bus, devfn, where); pci_ampci_write_config_byte()
162 static int pci_ampci_write_config_word(struct pci_bus *bus, unsigned int devfn, pci_ampci_write_config_word() argument
167 if (bus->number == 0 && devfn == PCI_DEVFN(0, 0)) { pci_ampci_write_config_word()
171 if (__query(bus, devfn)) pci_ampci_write_config_word()
172 __pcidebug("<= %04hx", bus, devfn, where, value); pci_ampci_write_config_word()
173 CONFIG_ADDRESS = CONFIG_CMD(bus, devfn, where); pci_ampci_write_config_word()
180 static int pci_ampci_write_config_dword(struct pci_bus *bus, unsigned int devfn, pci_ampci_write_config_dword() argument
185 if (bus->number == 0 && devfn == PCI_DEVFN(0, 0)) { pci_ampci_write_config_dword()
189 if (__query(bus, devfn)) pci_ampci_write_config_dword()
190 __pcidebug("<= %08x", bus, devfn, where, value); pci_ampci_write_config_dword()
191 CONFIG_ADDRESS = CONFIG_CMD(bus, devfn, where); pci_ampci_write_config_dword()
198 static int pci_ampci_read_config(struct pci_bus *bus, unsigned int devfn, pci_ampci_read_config() argument
203 return pci_ampci_read_config_byte(bus, devfn, where, val); pci_ampci_read_config()
205 return pci_ampci_read_config_word(bus, devfn, where, val); pci_ampci_read_config()
207 return pci_ampci_read_config_dword(bus, devfn, where, val); pci_ampci_read_config()
214 static int pci_ampci_write_config(struct pci_bus *bus, unsigned int devfn, pci_ampci_write_config() argument
219 return pci_ampci_write_config_byte(bus, devfn, where, val); pci_ampci_write_config()
221 return pci_ampci_write_config_word(bus, devfn, where, val); pci_ampci_write_config()
223 return pci_ampci_write_config_dword(bus, devfn, where, val); pci_ampci_write_config()
H A Dpci-asb2305.h46 u8 bus, devfn; /* Bus, device and function */ member in struct:irq_info
/linux-4.1.27/include/uapi/linux/
H A Dpci.h31 #define PCI_SLOT(devfn) (((devfn) >> 3) & 0x1f)
32 #define PCI_FUNC(devfn) ((devfn) & 0x07)
/linux-4.1.27/arch/arm/plat-orion/include/plat/
H A Dpcie.h25 u32 devfn, int where, int size, u32 *val);
27 u32 devfn, int where, int size, u32 *val);
29 u32 devfn, int where, int size, u32 *val);
31 u32 devfn, int where, int size, u32 val);
/linux-4.1.27/arch/arm/mach-cns3xxx/
H A Dpcie.c55 unsigned int devfn, int where) cns3xxx_pci_map_bus()
59 int slot = PCI_SLOT(devfn); cns3xxx_pci_map_bus()
72 if (devfn == 0) /* device# and function# are ignored by hw */ cns3xxx_pci_map_bus()
85 return base + (where & 0xffc) + (devfn << 12); cns3xxx_pci_map_bus()
88 static int cns3xxx_pci_read_config(struct pci_bus *bus, unsigned int devfn, cns3xxx_pci_read_config() argument
95 ret = pci_generic_config_read32(bus, devfn, where, size, val); cns3xxx_pci_read_config()
97 if (ret == PCIBIOS_SUCCESSFUL && !bus->number && !devfn && cns3xxx_pci_read_config()
136 pci_domain_nr(dev->bus), dev->bus->number, PCI_SLOT(dev->devfn), cns3xxx_pcie_map_irq()
137 PCI_FUNC(dev->devfn), slot, pin, irq); cns3xxx_pcie_map_irq()
229 u32 devfn = 0; cns3xxx_pcie_hw_init() local
234 pci_bus_write_config_byte(&bus, devfn, PCI_PRIMARY_BUS, 0); cns3xxx_pcie_hw_init()
235 pci_bus_write_config_byte(&bus, devfn, PCI_SECONDARY_BUS, 1); cns3xxx_pcie_hw_init()
236 pci_bus_write_config_byte(&bus, devfn, PCI_SUBORDINATE_BUS, 1); cns3xxx_pcie_hw_init()
238 pci_bus_read_config_byte(&bus, devfn, PCI_PRIMARY_BUS, &tmp8); cns3xxx_pcie_hw_init()
239 pci_bus_read_config_byte(&bus, devfn, PCI_SECONDARY_BUS, &tmp8); cns3xxx_pcie_hw_init()
240 pci_bus_read_config_byte(&bus, devfn, PCI_SUBORDINATE_BUS, &tmp8); cns3xxx_pcie_hw_init()
242 pci_bus_write_config_word(&bus, devfn, PCI_MEMORY_BASE, mem_base); cns3xxx_pcie_hw_init()
243 pci_bus_write_config_word(&bus, devfn, PCI_MEMORY_LIMIT, mem_limit); cns3xxx_pcie_hw_init()
244 pci_bus_write_config_word(&bus, devfn, PCI_IO_BASE_UPPER16, io_base); cns3xxx_pcie_hw_init()
245 pci_bus_write_config_word(&bus, devfn, PCI_IO_LIMIT_UPPER16, io_limit); cns3xxx_pcie_hw_init()
252 devfn = PCI_DEVFN(0, 0); cns3xxx_pcie_hw_init()
253 pos = pci_bus_find_capability(&bus, devfn, PCI_CAP_ID_EXP); cns3xxx_pcie_hw_init()
254 pci_bus_read_config_word(&bus, devfn, pos + PCI_EXP_DEVCTL, &dc); cns3xxx_pcie_hw_init()
257 pci_bus_write_config_word(&bus, devfn, pos + PCI_EXP_DEVCTL, dc); cns3xxx_pcie_hw_init()
258 pci_bus_read_config_word(&bus, devfn, pos + PCI_EXP_DEVCTL, &dc); cns3xxx_pcie_hw_init()
54 cns3xxx_pci_map_bus(struct pci_bus *bus, unsigned int devfn, int where) cns3xxx_pci_map_bus() argument
/linux-4.1.27/drivers/xen/xen-pciback/
H A Dvpci.c32 unsigned int devfn) __xen_pcibk_get_pci_dev()
41 if (PCI_SLOT(devfn) < PCI_SLOT_MAX) { __xen_pcibk_get_pci_dev()
45 &vpci_dev->dev_list[PCI_SLOT(devfn)], __xen_pcibk_get_pci_dev()
47 if (PCI_FUNC(entry->dev->devfn) == PCI_FUNC(devfn)) { __xen_pcibk_get_pci_dev()
61 && l->bus == r->bus && PCI_SLOT(l->devfn) == PCI_SLOT(r->devfn)) match_slot()
109 PCI_FUNC(dev->devfn)); __xen_pcibk_add_pci_dev()
112 func = PCI_FUNC(dev->devfn); __xen_pcibk_add_pci_dev()
125 func = dev->is_virtfn ? 0 : PCI_FUNC(dev->devfn); __xen_pcibk_add_pci_dev()
232 unsigned int *devfn) __xen_pcibk_get_pcifront_dev()
248 && dev->devfn == pcidev->devfn) { __xen_pcibk_get_pcifront_dev()
252 *devfn = PCI_DEVFN(slot, __xen_pcibk_get_pcifront_dev()
253 PCI_FUNC(pcidev->devfn)); __xen_pcibk_get_pcifront_dev()
29 __xen_pcibk_get_pci_dev(struct xen_pcibk_device *pdev, unsigned int domain, unsigned int bus, unsigned int devfn) __xen_pcibk_get_pci_dev() argument
229 __xen_pcibk_get_pcifront_dev(struct pci_dev *pcidev, struct xen_pcibk_device *pdev, unsigned int *domain, unsigned int *bus, unsigned int *devfn) __xen_pcibk_get_pcifront_dev() argument
H A Dpassthrough.c22 unsigned int devfn) __xen_pcibk_get_pci_dev()
33 && devfn == dev_entry->dev->devfn) { __xen_pcibk_get_pci_dev()
50 unsigned int domain, bus, devfn; __xen_pcibk_add_pci_dev() local
65 devfn = dev->devfn; __xen_pcibk_add_pci_dev()
66 err = publish_cb(pdev, domain, bus, devfn, devid); __xen_pcibk_add_pci_dev()
179 unsigned int *devfn) __xen_pcibk_get_pcifront_dev()
183 *devfn = pcidev->devfn; __xen_pcibk_get_pcifront_dev()
19 __xen_pcibk_get_pci_dev(struct xen_pcibk_device *pdev, unsigned int domain, unsigned int bus, unsigned int devfn) __xen_pcibk_get_pci_dev() argument
176 __xen_pcibk_get_pcifront_dev(struct pci_dev *pcidev, struct xen_pcibk_device *pdev, unsigned int *domain, unsigned int *bus, unsigned int *devfn) __xen_pcibk_get_pcifront_dev() argument
H A Dpciback.h87 unsigned int devfn, unsigned int devid);
101 unsigned int *devfn);
109 unsigned int devfn);
135 unsigned int bus, unsigned int devfn) xen_pcibk_get_pci_dev()
138 return xen_pcibk_backend->get(pdev, domain, bus, devfn); xen_pcibk_get_pci_dev()
143 * Add for domain0 PCIE-AER handling. Get guest domain/bus/devfn in xen_pcibk
152 unsigned int *devfn) xen_pcibk_get_pcifront_dev()
156 devfn); xen_pcibk_get_pcifront_dev()
134 xen_pcibk_get_pci_dev(struct xen_pcibk_device *pdev, unsigned int domain, unsigned int bus, unsigned int devfn) xen_pcibk_get_pci_dev() argument
148 xen_pcibk_get_pcifront_dev(struct pci_dev *pcidev, struct xen_pcibk_device *pdev, unsigned int *domain, unsigned int *bus, unsigned int *devfn) xen_pcibk_get_pcifront_dev() argument
H A Dpci_stub.c40 unsigned int devfn; member in struct:pcistub_device_id
116 .devfn = dev->devfn pcistub_device_release()
164 && slot == PCI_SLOT(psdev->dev->devfn) pcistub_device_find()
165 && func == PCI_FUNC(psdev->dev->devfn)) { pcistub_device_find()
214 && slot == PCI_SLOT(psdev->dev->devfn) pcistub_get_pci_dev_by_slot()
215 && func == PCI_FUNC(psdev->dev->devfn)) { pcistub_get_pci_dev_by_slot()
323 && dev->devfn == pdev_id->devfn) pcistub_match_one()
401 .devfn = dev->devfn pcistub_init_device()
657 &aer_op->domain, &aer_op->bus, &aer_op->devfn); common_process()
666 DRV_NAME ": aer_op %x dom %x bus %x devfn %x\n", common_process()
667 aer_cmd, aer_op->domain, aer_op->bus, aer_op->devfn); common_process()
724 dev_dbg(&dev->dev, "xen_pcibk_slot_reset(bus:%x,devfn:%x)\n", xen_pcibk_slot_reset()
725 dev->bus->number, dev->devfn); xen_pcibk_slot_reset()
730 PCI_SLOT(dev->devfn), xen_pcibk_slot_reset()
731 PCI_FUNC(dev->devfn)); xen_pcibk_slot_reset()
782 dev_dbg(&dev->dev, "xen_pcibk_mmio_enabled(bus:%x,devfn:%x)\n", xen_pcibk_mmio_enabled()
783 dev->bus->number, dev->devfn); xen_pcibk_mmio_enabled()
788 PCI_SLOT(dev->devfn), xen_pcibk_mmio_enabled()
789 PCI_FUNC(dev->devfn)); xen_pcibk_mmio_enabled()
840 dev_dbg(&dev->dev, "xen_pcibk_error_detected(bus:%x,devfn:%x)\n", xen_pcibk_error_detected()
841 dev->bus->number, dev->devfn); xen_pcibk_error_detected()
846 PCI_SLOT(dev->devfn), xen_pcibk_error_detected()
847 PCI_FUNC(dev->devfn)); xen_pcibk_error_detected()
894 dev_dbg(&dev->dev, "xen_pcibk_error_resume(bus:%x,devfn:%x)\n", xen_pcibk_error_resume()
895 dev->bus->number, dev->devfn); xen_pcibk_error_resume()
900 PCI_SLOT(dev->devfn), xen_pcibk_error_resume()
901 PCI_FUNC(dev->devfn)); xen_pcibk_error_resume()
1016 int rc = 0, devfn = PCI_DEVFN(slot, func); pcistub_device_id_add() local
1037 || PCI_SLOT(devfn) != slot pcistub_device_id_add()
1038 || PCI_FUNC(devfn) != func) pcistub_device_id_add()
1047 pci_dev_id->devfn = devfn; pcistub_device_id_add()
1069 && (slot < 0 || PCI_SLOT(pci_dev_id->devfn) == slot) pcistub_device_id_remove()
1070 && (func < 0 || PCI_FUNC(pci_dev_id->devfn) == func)) { pcistub_device_id_remove()
1182 PCI_SLOT(pci_dev_id->devfn), pcistub_slot_show()
1183 PCI_FUNC(pci_dev_id->devfn)); pcistub_slot_show()
1298 PCI_SLOT(quirk->pdev->devfn), pcistub_quirk_show()
1299 PCI_FUNC(quirk->pdev->devfn), pcistub_quirk_show()
/linux-4.1.27/arch/sparc/kernel/
H A Dpci_common.c20 unsigned long devfn, config_out_of_range()
31 unsigned long devfn, sun4u_config_mkaddr()
36 if (config_out_of_range(pbm, bus, devfn, reg)) sun4u_config_mkaddr()
40 devfn <<= rbits; sun4u_config_mkaddr()
43 return (void *) (pbm->config_space | bus | devfn | reg); sun4u_config_mkaddr()
52 unsigned char bus, unsigned int devfn, sun4u_read_pci_cfg_host()
59 addr = sun4u_config_mkaddr(pbm, bus, devfn, where); sun4u_read_pci_cfg_host()
94 sun4u_read_pci_cfg_host(pbm, bus, devfn, sun4u_read_pci_cfg_host()
99 sun4u_read_pci_cfg_host(pbm, bus, devfn, sun4u_read_pci_cfg_host()
107 static int sun4u_read_pci_cfg(struct pci_bus *bus_dev, unsigned int devfn, sun4u_read_pci_cfg() argument
128 if (!bus_dev->number && !PCI_SLOT(devfn)) sun4u_read_pci_cfg()
129 return sun4u_read_pci_cfg_host(pbm, bus, devfn, where, sun4u_read_pci_cfg()
132 addr = sun4u_config_mkaddr(pbm, bus, devfn, where); sun4u_read_pci_cfg()
165 unsigned char bus, unsigned int devfn, sun4u_write_pci_cfg_host()
170 addr = sun4u_config_mkaddr(pbm, bus, devfn, where); sun4u_write_pci_cfg_host()
202 sun4u_write_pci_cfg_host(pbm, bus, devfn, sun4u_write_pci_cfg_host()
204 sun4u_write_pci_cfg_host(pbm, bus, devfn, sun4u_write_pci_cfg_host()
211 static int sun4u_write_pci_cfg(struct pci_bus *bus_dev, unsigned int devfn, sun4u_write_pci_cfg() argument
218 if (!bus_dev->number && !PCI_SLOT(devfn)) sun4u_write_pci_cfg()
219 return sun4u_write_pci_cfg_host(pbm, bus, devfn, where, sun4u_write_pci_cfg()
222 addr = sun4u_config_mkaddr(pbm, bus, devfn, where); sun4u_write_pci_cfg()
256 static int sun4v_read_pci_cfg(struct pci_bus *bus_dev, unsigned int devfn, sun4v_read_pci_cfg() argument
262 unsigned int device = PCI_SLOT(devfn); sun4v_read_pci_cfg()
263 unsigned int func = PCI_FUNC(devfn); sun4v_read_pci_cfg()
266 if (config_out_of_range(pbm, bus, devfn, where)) { sun4v_read_pci_cfg()
289 static int sun4v_write_pci_cfg(struct pci_bus *bus_dev, unsigned int devfn, sun4v_write_pci_cfg() argument
295 unsigned int device = PCI_SLOT(devfn); sun4v_write_pci_cfg()
296 unsigned int func = PCI_FUNC(devfn); sun4v_write_pci_cfg()
298 if (config_out_of_range(pbm, bus, devfn, where)) { sun4v_write_pci_cfg()
18 config_out_of_range(struct pci_pbm_info *pbm, unsigned long bus, unsigned long devfn, unsigned long reg) config_out_of_range() argument
29 sun4u_config_mkaddr(struct pci_pbm_info *pbm, unsigned long bus, unsigned long devfn, unsigned long reg) sun4u_config_mkaddr() argument
51 sun4u_read_pci_cfg_host(struct pci_pbm_info *pbm, unsigned char bus, unsigned int devfn, int where, int size, u32 *value) sun4u_read_pci_cfg_host() argument
164 sun4u_write_pci_cfg_host(struct pci_pbm_info *pbm, unsigned char bus, unsigned int devfn, int where, int size, u32 value) sun4u_write_pci_cfg_host() argument
H A Dpsycho_common.h21 unsigned int devfn, psycho_pci_config_mkaddr()
26 PSYCHO_CONFIG_ENCODE(bus, devfn, where)); psycho_pci_config_mkaddr()
19 psycho_pci_config_mkaddr(struct pci_pbm_info *pbm, unsigned char bus, unsigned int devfn, int where) psycho_pci_config_mkaddr() argument
H A Dleon_pci_grpci1.c102 unsigned int devfn, int where, u32 val);
117 unsigned int devfn, int where, u32 *val) grpci1_cfg_r32()
125 devfn += (0x8 * 6); /* start at AD16=Device0 */ grpci1_cfg_r32()
128 devfn = 0; /* special case: bridge controller itself */ grpci1_cfg_r32()
136 pci_conf = (u32 *) (priv->pci_conf | (devfn << 8) | (where & 0xfc)); grpci1_cfg_r32()
154 unsigned int devfn, int where, u32 *val) grpci1_cfg_r16()
161 ret = grpci1_cfg_r32(priv, bus, devfn, where & ~0x3, &v); grpci1_cfg_r16()
167 unsigned int devfn, int where, u32 *val) grpci1_cfg_r8()
172 ret = grpci1_cfg_r32(priv, bus, devfn, where & ~0x3, &v); grpci1_cfg_r8()
179 unsigned int devfn, int where, u32 val) grpci1_cfg_w32()
188 devfn += (0x8 * 6); /* start at AD16=Device0 */ grpci1_cfg_w32()
191 devfn = 0; /* special case: bridge controller itself */ grpci1_cfg_w32()
199 (devfn << 8) | (where & 0xfc)); grpci1_cfg_w32()
206 unsigned int devfn, int where, u32 val) grpci1_cfg_w16()
213 ret = grpci1_cfg_r32(priv, bus, devfn, where&~3, &v); grpci1_cfg_w16()
218 return grpci1_cfg_w32(priv, bus, devfn, where & ~0x3, v); grpci1_cfg_w16()
222 unsigned int devfn, int where, u32 val) grpci1_cfg_w8()
227 ret = grpci1_cfg_r32(priv, bus, devfn, where & ~0x3, &v); grpci1_cfg_w8()
232 return grpci1_cfg_w32(priv, bus, devfn, where & ~0x3, v); grpci1_cfg_w8()
238 static int grpci1_read_config(struct pci_bus *bus, unsigned int devfn, grpci1_read_config() argument
245 if (PCI_SLOT(devfn) > 15 || busno > 15) { grpci1_read_config()
252 ret = grpci1_cfg_r8(priv, busno, devfn, where, val); grpci1_read_config()
255 ret = grpci1_cfg_r16(priv, busno, devfn, where, val); grpci1_read_config()
258 ret = grpci1_cfg_r32(priv, busno, devfn, where, val); grpci1_read_config()
268 busno, PCI_SLOT(devfn), PCI_FUNC(devfn), where, *val, size); grpci1_read_config()
277 static int grpci1_write_config(struct pci_bus *bus, unsigned int devfn, grpci1_write_config() argument
283 if (PCI_SLOT(devfn) > 15 || busno > 15) grpci1_write_config()
289 busno, PCI_SLOT(devfn), PCI_FUNC(devfn), where, size, val); grpci1_write_config()
296 return grpci1_cfg_w8(priv, busno, devfn, where, val); grpci1_write_config()
298 return grpci1_cfg_w16(priv, busno, devfn, where, val); grpci1_write_config()
300 return grpci1_cfg_w32(priv, busno, devfn, where, val); grpci1_write_config()
116 grpci1_cfg_r32(struct grpci1_priv *priv, unsigned int bus, unsigned int devfn, int where, u32 *val) grpci1_cfg_r32() argument
153 grpci1_cfg_r16(struct grpci1_priv *priv, unsigned int bus, unsigned int devfn, int where, u32 *val) grpci1_cfg_r16() argument
166 grpci1_cfg_r8(struct grpci1_priv *priv, unsigned int bus, unsigned int devfn, int where, u32 *val) grpci1_cfg_r8() argument
178 grpci1_cfg_w32(struct grpci1_priv *priv, unsigned int bus, unsigned int devfn, int where, u32 val) grpci1_cfg_w32() argument
205 grpci1_cfg_w16(struct grpci1_priv *priv, unsigned int bus, unsigned int devfn, int where, u32 val) grpci1_cfg_w16() argument
221 grpci1_cfg_w8(struct grpci1_priv *priv, unsigned int bus, unsigned int devfn, int where, u32 val) grpci1_cfg_w8() argument
H A Dpcic.c59 unsigned char devfn; /* Configuration address */ member in struct:pcic_ca2irq
175 static int pcic_read_config_dword(unsigned int busno, unsigned int devfn, pcic_read_config_dword() argument
188 writel(CONFIG_CMD(busno, devfn, where), pcic->pcic_config_space_addr); pcic_read_config_dword()
212 static int pcic_read_config(struct pci_bus *bus, unsigned int devfn, pcic_read_config() argument
220 pcic_read_config_dword(bus->number, devfn, where&~3, &v); pcic_read_config()
225 pcic_read_config_dword(bus->number, devfn, where&~3, &v); pcic_read_config()
230 pcic_read_config_dword(bus->number, devfn, where&~3, val); pcic_read_config()
236 static int pcic_write_config_dword(unsigned int busno, unsigned int devfn, pcic_write_config_dword() argument
245 writel(CONFIG_CMD(busno, devfn, where), pcic->pcic_config_space_addr); pcic_write_config_dword()
251 static int pcic_write_config(struct pci_bus *bus, unsigned int devfn, pcic_write_config() argument
259 pcic_read_config_dword(bus->number, devfn, where&~3, &v); pcic_write_config()
262 return pcic_write_config_dword(bus->number, devfn, where&~3, v); pcic_write_config()
265 pcic_read_config_dword(bus->number, devfn, where&~3, &v); pcic_write_config()
268 return pcic_write_config_dword(bus->number, devfn, where&~3, v); pcic_write_config()
271 return pcic_write_config_dword(bus->number, devfn, where, val); pcic_write_config()
456 unsigned long devfn = (regs[0].which_io >> 8) & 0xff; pdev_to_pnode() local
457 if(devfn == pdev->devfn) pdev_to_pnode()
523 namebuf, dev->bus->number, dev->devfn); pcic_map_pci_device()
548 if (p->busno == dev->bus->number && p->devfn == dev->devfn) pcic_fill_irq()
553 printk("PCIC: device %s devfn %02x:%02x not found in %d\n", pcic_fill_irq()
554 namebuf, dev->bus->number, dev->devfn, pcic->pcic_imdim); pcic_fill_irq()
579 p->irq, p->pin, dev->bus->number, dev->devfn); pcic_fill_irq()
643 pcic_read_config(dev->bus, dev->devfn, PCI_COMMAND, 2, &cmd); pcibios_fixup_bus()
646 dev->bus->number, dev->devfn); pcibios_fixup_bus()
648 pcic_write_config(dev->bus, dev->devfn, pcibios_fixup_bus()
653 dev->bus->number, dev->devfn); pcibios_fixup_bus()
655 pcic_write_config(dev->bus, dev->devfn, pcibios_fixup_bus()
H A Dleon_pci.c76 pci_bus_read_config_word(pbus, dev->devfn, PCI_COMMAND, &cmd); pcibios_fixup_bus()
83 pci_bus_write_config_word(pbus, dev->devfn, PCI_COMMAND, pcibios_fixup_bus()
92 pci_bus_write_config_word(pbus, dev->devfn, PCI_COMMAND, pcibios_fixup_bus()
H A Dleon_pci_grpci2.c234 unsigned int devfn, int where, u32 *val) grpci2_cfg_r32()
244 devfn += (0x8 * 6); /* start at AD16=Device0 */ grpci2_cfg_r32()
247 devfn = 0; /* special case: bridge controller itself */ grpci2_cfg_r32()
260 (devfn << 8) | (where & 0xfc)); grpci2_cfg_r32()
280 unsigned int devfn, int where, u32 *val) grpci2_cfg_r16()
287 ret = grpci2_cfg_r32(priv, bus, devfn, where & ~0x3, &v); grpci2_cfg_r16()
293 unsigned int devfn, int where, u32 *val) grpci2_cfg_r8()
298 ret = grpci2_cfg_r32(priv, bus, devfn, where & ~0x3, &v); grpci2_cfg_r8()
305 unsigned int devfn, int where, u32 val) grpci2_cfg_w32()
314 devfn += (0x8 * 6); /* start at AD16=Device0 */ grpci2_cfg_w32()
317 devfn = 0; /* special case: bridge controller itself */ grpci2_cfg_w32()
330 (devfn << 8) | (where & 0xfc)); grpci2_cfg_w32()
343 unsigned int devfn, int where, u32 val) grpci2_cfg_w16()
350 ret = grpci2_cfg_r32(priv, bus, devfn, where&~3, &v); grpci2_cfg_w16()
355 return grpci2_cfg_w32(priv, bus, devfn, where & ~0x3, v); grpci2_cfg_w16()
359 unsigned int devfn, int where, u32 val) grpci2_cfg_w8()
364 ret = grpci2_cfg_r32(priv, bus, devfn, where & ~0x3, &v); grpci2_cfg_w8()
369 return grpci2_cfg_w32(priv, bus, devfn, where & ~0x3, v); grpci2_cfg_w8()
375 static int grpci2_read_config(struct pci_bus *bus, unsigned int devfn, grpci2_read_config() argument
382 if (PCI_SLOT(devfn) > 15 || busno > 255) { grpci2_read_config()
389 ret = grpci2_cfg_r8(priv, busno, devfn, where, val); grpci2_read_config()
392 ret = grpci2_cfg_r16(priv, busno, devfn, where, val); grpci2_read_config()
395 ret = grpci2_cfg_r32(priv, busno, devfn, where, val); grpci2_read_config()
404 "size=%d\n", busno, PCI_SLOT(devfn), PCI_FUNC(devfn), where, grpci2_read_config()
414 static int grpci2_write_config(struct pci_bus *bus, unsigned int devfn, grpci2_write_config() argument
420 if (PCI_SLOT(devfn) > 15 || busno > 255) grpci2_write_config()
425 "val=%x\n", busno, PCI_SLOT(devfn), PCI_FUNC(devfn), grpci2_write_config()
433 return grpci2_cfg_w8(priv, busno, devfn, where, val); grpci2_write_config()
435 return grpci2_cfg_w16(priv, busno, devfn, where, val); grpci2_write_config()
437 return grpci2_cfg_w32(priv, busno, devfn, where, val); grpci2_write_config()
233 grpci2_cfg_r32(struct grpci2_priv *priv, unsigned int bus, unsigned int devfn, int where, u32 *val) grpci2_cfg_r32() argument
279 grpci2_cfg_r16(struct grpci2_priv *priv, unsigned int bus, unsigned int devfn, int where, u32 *val) grpci2_cfg_r16() argument
292 grpci2_cfg_r8(struct grpci2_priv *priv, unsigned int bus, unsigned int devfn, int where, u32 *val) grpci2_cfg_r8() argument
304 grpci2_cfg_w32(struct grpci2_priv *priv, unsigned int bus, unsigned int devfn, int where, u32 val) grpci2_cfg_w32() argument
342 grpci2_cfg_w16(struct grpci2_priv *priv, unsigned int bus, unsigned int devfn, int where, u32 val) grpci2_cfg_w16() argument
358 grpci2_cfg_w8(struct grpci2_priv *priv, unsigned int bus, unsigned int devfn, int where, u32 val) grpci2_cfg_w8() argument
H A Dprom_32.c98 unsigned int devfn; pci_path_component() local
105 devfn = (regs->phys_hi >> 8) & 0xff; pci_path_component()
106 if (devfn & 0x07) { pci_path_component()
109 devfn >> 3, pci_path_component()
110 devfn & 0x07); pci_path_component()
114 devfn >> 3); pci_path_component()
H A Dprom_64.c170 unsigned int devfn; pci_path_component() local
177 devfn = (regs->phys_hi >> 8) & 0xff; pci_path_component()
178 if (devfn & 0x07) { pci_path_component()
181 devfn >> 3, pci_path_component()
182 devfn & 0x07); pci_path_component()
186 devfn >> 3); pci_path_component()
H A Dpci.c249 struct pci_bus *bus, int devfn) of_create_pci_dev()
282 printk(" create device, devfn: %x, type: %s\n", of_create_pci_dev()
283 devfn, type); of_create_pci_dev()
289 dev->devfn = devfn; of_create_pci_dev()
294 if (PCI_SLOT(dev->devfn) == slot->number) of_create_pci_dev()
317 dev->bus->number, PCI_SLOT(devfn), PCI_FUNC(devfn)); of_create_pci_dev()
545 int reglen, devfn, prev_devfn; pci_of_scan_bus() local
561 devfn = (reg[0] >> 8) & 0xff; pci_of_scan_bus()
568 if (devfn == prev_devfn) pci_of_scan_bus()
570 prev_devfn = devfn; pci_of_scan_bus()
573 dev = of_create_pci_dev(pbm, child, bus, devfn); pci_of_scan_bus()
247 of_create_pci_dev(struct pci_pbm_info *pbm, struct device_node *node, struct pci_bus *bus, int devfn) of_create_pci_dev() argument
/linux-4.1.27/arch/powerpc/platforms/pasemi/
H A Dpci.c36 #define PA_PXP_CFA(bus, devfn, off) (((bus) << 20) | ((devfn) << 12) | (off))
38 static inline int pa_pxp_offset_valid(u8 bus, u8 devfn, int offset) pa_pxp_offset_valid() argument
44 if (bus == 0 && devfn == 0) pa_pxp_offset_valid()
51 u8 bus, u8 devfn, int offset) pa_pxp_cfg_addr()
53 return hose->cfg_data + PA_PXP_CFA(bus, devfn, offset); pa_pxp_cfg_addr()
56 static inline int is_root_port(int busno, int devfn) is_root_port() argument
58 return ((busno == 0) && (PCI_FUNC(devfn) < 4) && is_root_port()
59 ((PCI_SLOT(devfn) == 16) || (PCI_SLOT(devfn) == 17))); is_root_port()
68 static int workaround_5945(struct pci_bus *bus, unsigned int devfn, workaround_5945() argument
76 if (!is_root_port(bus->number, devfn) || !is_5945_reg(offset)) workaround_5945()
81 addr = pa_pxp_cfg_addr(hose, bus->number, devfn, offset & ~0x3); workaround_5945()
88 dummy = pa_pxp_cfg_addr(hose, bus->number, devfn, 0x10); workaround_5945()
111 static int pa_pxp_read_config(struct pci_bus *bus, unsigned int devfn, pa_pxp_read_config() argument
121 if (!pa_pxp_offset_valid(bus->number, devfn, offset)) pa_pxp_read_config()
124 if (workaround_5945(bus, devfn, offset, len, val)) pa_pxp_read_config()
127 addr = pa_pxp_cfg_addr(hose, bus->number, devfn, offset); pa_pxp_read_config()
148 static int pa_pxp_write_config(struct pci_bus *bus, unsigned int devfn, pa_pxp_write_config() argument
158 if (!pa_pxp_offset_valid(bus->number, devfn, offset)) pa_pxp_write_config()
161 addr = pa_pxp_cfg_addr(hose, bus->number, devfn, offset); pa_pxp_write_config()
243 return (void __iomem *)pa_pxp_cfg_addr(hose, dev->bus->number, dev->devfn, offset); pasemi_pci_getcfgaddr()
50 pa_pxp_cfg_addr(struct pci_controller *hose, u8 bus, u8 devfn, int offset) pa_pxp_cfg_addr() argument
H A Dmisc.c87 i2c_register_board_info(PCI_FUNC(pdev->devfn), &info, pasemi_register_i2c_devices()
/linux-4.1.27/arch/sh/drivers/pci/
H A Dops-sh7786.c23 struct pci_bus *bus, unsigned int devfn, int where, u32 *data) sh7786_pcie_config_access()
28 dev = PCI_SLOT(devfn); sh7786_pcie_config_access()
29 func = PCI_FUNC(devfn); sh7786_pcie_config_access()
47 * space to devfn 0 in order to enable self-enumeration. In this sh7786_pcie_config_access()
92 static int sh7786_pcie_read(struct pci_bus *bus, unsigned int devfn, sh7786_pcie_read() argument
106 devfn, where, &data); sh7786_pcie_read()
119 dev_dbg(&bus->dev, "pcie-config-read: bus=%3d devfn=0x%04x " sh7786_pcie_read()
121 devfn, where, size, (unsigned long)*val); sh7786_pcie_read()
128 static int sh7786_pcie_write(struct pci_bus *bus, unsigned int devfn, sh7786_pcie_write() argument
142 devfn, where, &data); sh7786_pcie_write()
146 dev_dbg(&bus->dev, "pcie-config-write: bus=%3d devfn=0x%04x " sh7786_pcie_write()
148 devfn, where, size, (unsigned long)val); sh7786_pcie_write()
162 devfn, where, &data); sh7786_pcie_write()
22 sh7786_pcie_config_access(unsigned char access_type, struct pci_bus *bus, unsigned int devfn, int where, u32 *data) sh7786_pcie_config_access() argument
H A Dops-sh4.c19 #define CONFIG_CMD(bus, devfn, where) \
20 (0x80000000 | (bus->number << 16) | (devfn << 8) | (where & ~3))
25 static int sh4_pci_read(struct pci_bus *bus, unsigned int devfn, sh4_pci_read() argument
37 pci_write_reg(chan, CONFIG_CMD(bus, devfn, where), SH4_PCIPAR); sh4_pci_read()
63 static int sh4_pci_write(struct pci_bus *bus, unsigned int devfn, sh4_pci_write() argument
72 pci_write_reg(chan, CONFIG_CMD(bus, devfn, where), SH4_PCIPAR); sh4_pci_write()
H A Dops-sh5.c25 static int sh5pci_read(struct pci_bus *bus, unsigned int devfn, int where, sh5pci_read() argument
28 SH5PCI_WRITE(PAR, CONFIG_CMD(bus, devfn, where)); sh5pci_read()
45 static int sh5pci_write(struct pci_bus *bus, unsigned int devfn, int where, sh5pci_write() argument
48 SH5PCI_WRITE(PAR, CONFIG_CMD(bus, devfn, where)); sh5pci_write()
H A Dops-dreamcast.c25 * someone implicitly messes around with the last devfn value.. otherwise we
39 static int gapspci_config_access(unsigned char bus, unsigned int devfn) gapspci_config_access() argument
41 return (bus == 0) && (devfn == 0); gapspci_config_access()
49 static int gapspci_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val) gapspci_read() argument
53 if (!gapspci_config_access(bus->number, devfn)) gapspci_read()
65 static int gapspci_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val) gapspci_write() argument
67 if (!gapspci_config_access(bus->number, devfn)) gapspci_write()
H A Dcommon.c11 int top_bus, int busnr, int devfn) fake_pci_dev()
18 dev.devfn = devfn; fake_pci_dev()
34 int top_bus, int bus, int devfn, int offset, type value) \
37 fake_pci_dev(hose, top_bus, bus, devfn), \
10 fake_pci_dev(struct pci_channel *hose, int top_bus, int busnr, int devfn) fake_pci_dev() argument
H A Dpci-sh5.h99 #define SET_CONFIG_BITS(bus,devfn,where) ((((bus) << 16) | ((devfn) << 8) | ((where) & ~3)) | 0x80000000)
102 #define CONFIG_CMD(bus, devfn, where) SET_CONFIG_BITS(bus->number,devfn,where)
H A Dfixups-cayman.c39 slot = path[i].slot = PCI_SLOT(dev->devfn); pcibios_map_platform_irq()
46 slot = PCI_SLOT(dev->devfn); pcibios_map_platform_irq()
H A Dfixups-dreamcast.c42 * We also assume that dev->devfn == 0 gapspci_fixup_resources()
/linux-4.1.27/drivers/acpi/
H A Dreboot.c11 unsigned int devfn; acpi_reboot() local
40 devfn = PCI_DEVFN((rr->address >> 32) & 0xffff, acpi_reboot()
44 pci_bus_write_config_byte(bus0, devfn, acpi_reboot()
/linux-4.1.27/arch/powerpc/sysdev/
H A Dindirect_pci.c24 unsigned char bus_number, unsigned int devfn, __indirect_read_config()
34 if (devfn != 0) __indirect_read_config()
39 if (ppc_md.pci_exclude_device(hose, bus_number, devfn)) __indirect_read_config()
56 (devfn << 8) | reg | cfg_type)); __indirect_read_config()
59 (devfn << 8) | reg | cfg_type)); __indirect_read_config()
80 int indirect_read_config(struct pci_bus *bus, unsigned int devfn, indirect_read_config() argument
85 return __indirect_read_config(hose, bus->number, devfn, offset, len, indirect_read_config()
89 int indirect_write_config(struct pci_bus *bus, unsigned int devfn, indirect_write_config() argument
100 if (devfn != 0) indirect_write_config()
105 if (ppc_md.pci_exclude_device(hose, bus->number, devfn)) indirect_write_config()
122 (devfn << 8) | reg | cfg_type)); indirect_write_config()
125 (devfn << 8) | reg | cfg_type)); indirect_write_config()
23 __indirect_read_config(struct pci_controller *hose, unsigned char bus_number, unsigned int devfn, int offset, int len, u32 *val) __indirect_read_config() argument
H A Dxilinx_pci.c43 if (dev->devfn || dev->bus->self) xilinx_pci_fixup_bridge()
74 xilinx_pci_exclude_device(struct pci_controller *hose, u_char bus, u8 devfn) xilinx_pci_exclude_device() argument
H A Dtsi108_pci.c147 tsi108_direct_read_config(struct pci_bus *bus, unsigned int devfn, int offset, tsi108_direct_read_config() argument
155 if (ppc_md.pci_exclude_device(hose, bus->number, devfn)) tsi108_direct_read_config()
159 devfn, tsi108_direct_read_config()
180 printk("%d:0x%x:0x%x ", bus->number, devfn, offset); tsi108_direct_read_config()
/linux-4.1.27/arch/microblaze/pci/
H A Dindirect_pci.c23 indirect_read_config(struct pci_bus *bus, unsigned int devfn, int offset, indirect_read_config() argument
34 if (devfn != 0) indirect_read_config()
52 (devfn << 8) | reg | cfg_type)); indirect_read_config()
55 (devfn << 8) | reg | cfg_type)); indirect_read_config()
77 indirect_write_config(struct pci_bus *bus, unsigned int devfn, int offset, indirect_write_config() argument
88 if (devfn != 0) indirect_write_config()
106 (devfn << 8) | reg | cfg_type)); indirect_write_config()
109 (devfn << 8) | reg | cfg_type)); indirect_write_config()
H A Dxilinx_pci.c43 if (dev->devfn || dev->bus->self) xilinx_pci_fixup_bridge()
75 xilinx_pci_exclude_device(struct pci_controller *hose, u_char bus, u8 devfn) xilinx_pci_exclude_device() argument
/linux-4.1.27/drivers/pci/pcie/aer/
H A Daer_inject.c51 unsigned int devfn; member in struct:aer_error
78 unsigned int bus, unsigned int devfn, aer_error_init()
84 err->devfn = devfn; aer_error_init()
90 unsigned int devfn) __find_aer_error()
97 devfn == err->devfn) __find_aer_error()
109 return __find_aer_error((u16)domain, dev->bus->number, dev->devfn); __find_aer_error_by_dev()
184 static int pci_read_aer(struct pci_bus *bus, unsigned int devfn, int where, pci_read_aer() argument
199 err = __find_aer_error((u16)domain, bus->number, devfn); pci_read_aer()
212 return ops->read(bus, devfn, where, size, val); pci_read_aer()
215 static int pci_write_aer(struct pci_bus *bus, unsigned int devfn, int where, pci_write_aer() argument
231 err = __find_aer_error((u16)domain, bus->number, devfn); pci_write_aer()
247 return ops->write(bus, devfn, where, size, val); pci_write_aer()
327 unsigned int devfn = PCI_DEVFN(einj->dev, einj->fn); aer_inject() local
332 dev = pci_get_domain_bus_and_slot((int)einj->domain, einj->bus, devfn); aer_inject()
386 aer_error_init(err, einj->domain, einj->bus, devfn, aer_inject()
417 rpdev->bus->number, rpdev->devfn, aer_inject()
427 rperr->source_id |= (einj->bus << 8) | devfn; aer_inject()
440 rperr->source_id |= ((einj->bus << 8) | devfn) << 16; aer_inject()
77 aer_error_init(struct aer_error *err, u16 domain, unsigned int bus, unsigned int devfn, int pos_cap_err) aer_error_init() argument
89 __find_aer_error(u16 domain, unsigned int bus, unsigned int devfn) __find_aer_error() argument
H A Daerdrv_acpi.c28 p->device == PCI_SLOT(pci->devfn) && hest_match_pci()
29 p->function == PCI_FUNC(pci->devfn); hest_match_pci()
H A Daerdrv_core.c109 if (e_info->id == ((dev->bus->number << 8) | dev->devfn)) is_error_source()
547 u8 devfn; member in struct:aer_recover_entry
563 void aer_recover_queue(int domain, unsigned int bus, unsigned int devfn, aer_recover_queue() argument
569 .devfn = devfn, aer_recover_queue()
580 domain, bus, PCI_SLOT(devfn), PCI_FUNC(devfn)); aer_recover_queue()
592 entry.devfn); aer_recover_work_func()
596 PCI_SLOT(entry.devfn), PCI_FUNC(entry.devfn)); aer_recover_work_func()
/linux-4.1.27/arch/sh/include/asm/
H A Dpci.h47 int bus, int devfn, int offset, u8 *value);
49 int bus, int devfn, int offset, u16 *value);
51 int bus, int devfn, int offset, u32 *value);
53 int bus, int devfn, int offset, u8 value);
55 int bus, int devfn, int offset, u16 value);
57 int bus, int devfn, int offset, u32 value);
/linux-4.1.27/arch/arm/plat-orion/
H A Dpcie.c209 u32 devfn, int where, int size, u32 *val) orion_pcie_rd_conf()
212 PCIE_CONF_DEV(PCI_SLOT(devfn)) | orion_pcie_rd_conf()
213 PCIE_CONF_FUNC(PCI_FUNC(devfn)) | orion_pcie_rd_conf()
228 u32 devfn, int where, int size, u32 *val) orion_pcie_rd_conf_tlp()
231 PCIE_CONF_DEV(PCI_SLOT(devfn)) | orion_pcie_rd_conf_tlp()
232 PCIE_CONF_FUNC(PCI_FUNC(devfn)) | orion_pcie_rd_conf_tlp()
239 PCI_FUNC(devfn) != 0) orion_pcie_rd_conf_tlp()
251 u32 devfn, int where, int size, u32 *val) orion_pcie_rd_conf_wa()
254 PCIE_CONF_DEV(PCI_SLOT(devfn)) | orion_pcie_rd_conf_wa()
255 PCIE_CONF_FUNC(PCI_FUNC(devfn)) | orion_pcie_rd_conf_wa()
267 u32 devfn, int where, int size, u32 val) orion_pcie_wr_conf()
272 PCIE_CONF_DEV(PCI_SLOT(devfn)) | orion_pcie_wr_conf()
273 PCIE_CONF_FUNC(PCI_FUNC(devfn)) | orion_pcie_wr_conf()
208 orion_pcie_rd_conf(void __iomem *base, struct pci_bus *bus, u32 devfn, int where, int size, u32 *val) orion_pcie_rd_conf() argument
227 orion_pcie_rd_conf_tlp(void __iomem *base, struct pci_bus *bus, u32 devfn, int where, int size, u32 *val) orion_pcie_rd_conf_tlp() argument
250 orion_pcie_rd_conf_wa(void __iomem *wa_base, struct pci_bus *bus, u32 devfn, int where, int size, u32 *val) orion_pcie_rd_conf_wa() argument
266 orion_pcie_wr_conf(void __iomem *base, struct pci_bus *bus, u32 devfn, int where, int size, u32 val) orion_pcie_wr_conf() argument
/linux-4.1.27/arch/powerpc/platforms/maple/
H A Dpci.c84 static unsigned long u3_agp_cfa0(u8 devfn, u8 off) u3_agp_cfa0() argument
86 return (1 << (unsigned long)PCI_SLOT(devfn)) | u3_agp_cfa0()
87 ((unsigned long)PCI_FUNC(devfn) << 8) | u3_agp_cfa0()
91 static unsigned long u3_agp_cfa1(u8 bus, u8 devfn, u8 off) u3_agp_cfa1() argument
94 ((unsigned long)devfn << 8) | u3_agp_cfa1()
120 static int u3_agp_read_config(struct pci_bus *bus, unsigned int devfn, u3_agp_read_config() argument
130 addr = u3_agp_cfg_access(hose, bus->number, devfn, offset); u3_agp_read_config()
151 static int u3_agp_write_config(struct pci_bus *bus, unsigned int devfn, u3_agp_write_config() argument
161 addr = u3_agp_cfg_access(hose, bus->number, devfn, offset); u3_agp_write_config()
188 static unsigned long u3_ht_cfa0(u8 devfn, u8 off) u3_ht_cfa0() argument
190 return (devfn << 8) | off; u3_ht_cfa0()
193 static unsigned long u3_ht_cfa1(u8 bus, u8 devfn, u8 off) u3_ht_cfa1() argument
195 return u3_ht_cfa0(devfn, off) + (bus << 16) + 0x01000000UL; u3_ht_cfa1()
199 u8 bus, u8 devfn, u8 offset) u3_ht_cfg_access()
202 if (PCI_SLOT(devfn) == 0) u3_ht_cfg_access()
204 return hose->cfg_data + u3_ht_cfa0(devfn, offset); u3_ht_cfg_access()
206 return hose->cfg_data + u3_ht_cfa1(bus, devfn, offset); u3_ht_cfg_access()
257 static int u3_ht_read_config(struct pci_bus *bus, unsigned int devfn, u3_ht_read_config() argument
267 if (bus->number == hose->first_busno && devfn == PCI_DEVFN(0, 0)) u3_ht_read_config()
273 addr = u3_ht_cfg_access(hose, bus->number, devfn, offset); u3_ht_read_config()
295 static int u3_ht_write_config(struct pci_bus *bus, unsigned int devfn, u3_ht_write_config() argument
305 if (bus->number == hose->first_busno && devfn == PCI_DEVFN(0, 0)) u3_ht_write_config()
311 addr = u3_ht_cfg_access(hose, bus->number, devfn, offset); u3_ht_write_config()
338 static unsigned int u4_pcie_cfa0(unsigned int devfn, unsigned int off) u4_pcie_cfa0() argument
340 return (1 << PCI_SLOT(devfn)) | u4_pcie_cfa0()
341 (PCI_FUNC(devfn) << 8) | u4_pcie_cfa0()
346 static unsigned int u4_pcie_cfa1(unsigned int bus, unsigned int devfn, u4_pcie_cfa1() argument
350 (devfn << 8) | u4_pcie_cfa1()
374 static int u4_pcie_read_config(struct pci_bus *bus, unsigned int devfn, u4_pcie_read_config() argument
385 addr = u4_pcie_cfg_access(hose, bus->number, devfn, offset); u4_pcie_read_config()
405 static int u4_pcie_write_config(struct pci_bus *bus, unsigned int devfn, u4_pcie_write_config() argument
416 addr = u4_pcie_cfg_access(hose, bus->number, devfn, offset); u4_pcie_write_config()
198 u3_ht_cfg_access(struct pci_controller* hose, u8 bus, u8 devfn, u8 offset) u3_ht_cfg_access() argument
/linux-4.1.27/arch/arm/mach-orion5x/
H A Dpci.c76 static int pcie_rd_conf(struct pci_bus *bus, u32 devfn, int where, pcie_rd_conf() argument
82 if (pcie_valid_config(bus->number, PCI_SLOT(devfn)) == 0) { pcie_rd_conf()
88 ret = orion_pcie_rd_conf(PCIE_BASE, bus, devfn, where, size, val); pcie_rd_conf()
94 static int pcie_rd_conf_wa(struct pci_bus *bus, u32 devfn, pcie_rd_conf_wa() argument
99 if (pcie_valid_config(bus->number, PCI_SLOT(devfn)) == 0) { pcie_rd_conf_wa()
115 bus, devfn, where, size, val); pcie_rd_conf_wa()
120 static int pcie_wr_conf(struct pci_bus *bus, u32 devfn, pcie_wr_conf() argument
126 if (pcie_valid_config(bus->number, PCI_SLOT(devfn)) == 0) pcie_wr_conf()
130 ret = orion_pcie_wr_conf(PCIE_BASE, bus, devfn, where, size, val); pcie_wr_conf()
322 static int orion5x_pci_valid_config(int bus, u32 devfn) orion5x_pci_valid_config() argument
328 if (PCI_SLOT(devfn) == 0 && PCI_FUNC(devfn) != 0) orion5x_pci_valid_config()
335 if (orion5x_pci_cardbus_mode && PCI_SLOT(devfn) > 1) orion5x_pci_valid_config()
342 static int orion5x_pci_rd_conf(struct pci_bus *bus, u32 devfn, orion5x_pci_rd_conf() argument
345 if (!orion5x_pci_valid_config(bus->number, devfn)) { orion5x_pci_rd_conf()
350 return orion5x_pci_hw_rd_conf(bus->number, PCI_SLOT(devfn), orion5x_pci_rd_conf()
351 PCI_FUNC(devfn), where, size, val); orion5x_pci_rd_conf()
354 static int orion5x_pci_wr_conf(struct pci_bus *bus, u32 devfn, orion5x_pci_wr_conf() argument
357 if (!orion5x_pci_valid_config(bus->number, devfn)) orion5x_pci_wr_conf()
360 return orion5x_pci_hw_wr_conf(bus->number, PCI_SLOT(devfn), orion5x_pci_wr_conf()
361 PCI_FUNC(devfn), where, size, val); orion5x_pci_wr_conf()
517 if (dev->bus->parent == NULL && dev->devfn == 0) { rc_pci_fixup()
/linux-4.1.27/arch/frv/mb93090-mb00/
H A Dpci-vdk.c58 (0x80000000 | (bus->number << 16) | (devfn << 8) | (where & ~3))
85 // return dev->bus->number==0 && (dev->devfn==PCI_DEVFN(0,0)); __query()
88 // (dev->devfn==PCI_DEVFN(2,0) || dev->devfn==PCI_DEVFN(3,0)); __query()
96 static int pci_frv_read_config(struct pci_bus *bus, unsigned int devfn, int where, int size, pci_frv_read_config() argument
101 if (bus->number == 0 && devfn == PCI_DEVFN(0, 0)) { pci_frv_read_config()
105 __set_PciCfgAddr(CONFIG_CMD(bus, devfn, where)); pci_frv_read_config()
129 static int pci_frv_write_config(struct pci_bus *bus, unsigned int devfn, int where, int size, pci_frv_write_config() argument
134 if (bus->number == 0 && devfn == PCI_DEVFN(0, 0)) { pci_frv_write_config()
138 __set_PciCfgAddr(CONFIG_CMD(bus, devfn, where)); pci_frv_write_config()
144 if (bus->number == 0 && devfn == PCI_DEVFN(0, 0)) { pci_frv_write_config()
148 __set_PciCfgAddr(CONFIG_CMD(bus, devfn, where)); pci_frv_write_config()
154 if (bus->number == 0 && devfn == PCI_DEVFN(0, 0)) { pci_frv_write_config()
158 __set_PciCfgAddr(CONFIG_CMD(bus, devfn, where)); pci_frv_write_config()
302 if (dev->devfn == 0) { pcibios_fixup_bus()
H A Dpci-irq.c51 dev->irq = pci_bus0_irq_routing[PCI_SLOT(dev->devfn)][pin - 1]; for_each_pci_dev()
/linux-4.1.27/arch/arm/mach-footbridge/
H A Ddc21285.c40 dc21285_base_address(struct pci_bus *bus, unsigned int devfn) dc21285_base_address() argument
45 if (PCI_SLOT(devfn) == 0) dc21285_base_address()
47 * For devfn 0, point at the 21285 dc21285_base_address()
51 devfn -= 1 << 3; dc21285_base_address()
53 if (devfn < PCI_DEVFN(MAX_SLOTS, 0)) dc21285_base_address()
54 addr = PCICFG0_BASE | 0xc00000 | (devfn << 8); dc21285_base_address()
57 addr = PCICFG1_BASE | (bus->number << 16) | (devfn << 8); dc21285_base_address()
63 dc21285_read_config(struct pci_bus *bus, unsigned int devfn, int where, dc21285_read_config() argument
66 unsigned long addr = dc21285_base_address(bus, devfn); dc21285_read_config()
97 dc21285_write_config(struct pci_bus *bus, unsigned int devfn, int where, dc21285_write_config() argument
100 unsigned long addr = dc21285_base_address(bus, devfn); dc21285_write_config()
H A Debsa285-pci.c22 switch (PCI_FUNC(dev->devfn)) { ebsa285_map_irq()
H A Dcats-pci.c37 dev->bus->number, dev->devfn, dev->irq); cats_map_irq()
/linux-4.1.27/arch/arm/mach-iop32x/
H A Dn2100.c83 if (PCI_SLOT(dev->devfn) == 1) { n2100_pci_map_irq()
86 } else if (PCI_SLOT(dev->devfn) == 2) { n2100_pci_map_irq()
89 } else if (PCI_SLOT(dev->devfn) == 3) { n2100_pci_map_irq()
92 } else if (PCI_SLOT(dev->devfn) == 4 && pin == 1) { n2100_pci_map_irq()
95 } else if (PCI_SLOT(dev->devfn) == 4 && pin == 2) { n2100_pci_map_irq()
98 } else if (PCI_SLOT(dev->devfn) == 4 && pin == 3) { n2100_pci_map_irq()
101 } else if (PCI_SLOT(dev->devfn) == 5) { n2100_pci_map_irq()
107 PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn)); n2100_pci_map_irq()
130 (dev->devfn == PCI_DEVFN(1, 0) || n2100_fixup_r8169()
131 dev->devfn == PCI_DEVFN(2, 0))) n2100_fixup_r8169()
H A Diq80321.c93 PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn)); iq80321_pci_map_irq()
H A Diq31244.c122 PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn)); ep80219_pci_map_irq()
157 PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn)); iq31244_pci_map_irq()
/linux-4.1.27/arch/arm/mach-dove/
H A Dpcie.c95 static int pcie_rd_conf(struct pci_bus *bus, u32 devfn, int where, pcie_rd_conf() argument
103 if (pcie_valid_config(pp, bus->number, PCI_SLOT(devfn)) == 0) { pcie_rd_conf()
109 ret = orion_pcie_rd_conf(pp->base, bus, devfn, where, size, val); pcie_rd_conf()
115 static int pcie_wr_conf(struct pci_bus *bus, u32 devfn, pcie_wr_conf() argument
123 if (pcie_valid_config(pp, bus->number, PCI_SLOT(devfn)) == 0) pcie_wr_conf()
127 ret = orion_pcie_wr_conf(pp->base, bus, devfn, where, size, val); pcie_wr_conf()
143 if (dev->bus->parent == NULL && dev->devfn == 0) { rc_pci_fixup()
/linux-4.1.27/arch/unicore32/kernel/
H A Dpci.c25 #define CONFIG_CMD(bus, devfn, where) \
26 (0x80000000 | (bus->number << 16) | (devfn << 8) | (where & ~3))
29 puv3_read_config(struct pci_bus *bus, unsigned int devfn, int where, puv3_read_config() argument
32 writel(CONFIG_CMD(bus, devfn, where), PCICFG_ADDR); puv3_read_config()
48 puv3_write_config(struct pci_bus *bus, unsigned int devfn, int where, puv3_write_config() argument
51 writel(CONFIG_CMD(bus, devfn, where), PCICFG_ADDR); puv3_write_config()
108 if (dev->devfn == 0x00) pci_puv3_map_irq()
110 else if (dev->devfn == 0x08) pci_puv3_map_irq()
112 else if (dev->devfn == 0x10) pci_puv3_map_irq()
114 else if (dev->devfn == 0x18) pci_puv3_map_irq()
118 if (dev->devfn == 0x30) pci_puv3_map_irq()
120 else if (dev->devfn == 0x60) pci_puv3_map_irq()
122 else if (dev->devfn == 0x58) pci_puv3_map_irq()
127 if (dev->devfn == 0x00) pci_puv3_map_irq()
/linux-4.1.27/arch/arm/mach-versatile/
H A Dpci.c79 unsigned int devfn, int offset) __pci_addr()
90 if (devfn > 255) __pci_addr()
94 (PCI_SLOT(devfn) << 11) | (PCI_FUNC(devfn) << 8) | offset); __pci_addr()
97 static int versatile_read_config(struct pci_bus *bus, unsigned int devfn, int where, versatile_read_config() argument
100 void __iomem *addr = __pci_addr(bus, devfn, where & ~3); versatile_read_config()
102 int slot = PCI_SLOT(devfn); versatile_read_config()
141 static int versatile_write_config(struct pci_bus *bus, unsigned int devfn, int where, versatile_write_config() argument
144 void __iomem *addr = __pci_addr(bus, devfn, where); versatile_write_config()
145 int slot = PCI_SLOT(devfn); versatile_write_config()
78 __pci_addr(struct pci_bus *bus, unsigned int devfn, int offset) __pci_addr() argument
/linux-4.1.27/arch/alpha/kernel/
H A Dsys_miata.c183 if((slot == 7) && (PCI_FUNC(dev->devfn) == 3)) { miata_map_irq()
185 struct pci_dev *pdev = pci_get_slot(dev->bus, dev->devfn & ~7); miata_map_irq()
205 slot = PCI_SLOT(dev->devfn); miata_swizzle()
208 else if ((PCI_SLOT(dev->bus->self->devfn) == 8) || miata_swizzle()
209 (PCI_SLOT(dev->bus->self->devfn) == 20)) { miata_swizzle()
210 slot = PCI_SLOT(dev->devfn) + 9; miata_swizzle()
216 if ((PCI_SLOT(dev->bus->self->devfn) == 8) || miata_swizzle()
217 (PCI_SLOT(dev->bus->self->devfn) == 20)) { miata_swizzle()
218 slot = PCI_SLOT(dev->devfn) + 9; miata_swizzle()
226 slot = PCI_SLOT(dev->devfn); miata_swizzle()
H A Dsys_ruffian.c148 slot = PCI_SLOT(dev->devfn); ruffian_swizzle()
151 else if (PCI_SLOT(dev->bus->self->devfn) == 13) { ruffian_swizzle()
152 slot = PCI_SLOT(dev->devfn) + 10; ruffian_swizzle()
158 if (PCI_SLOT(dev->bus->self->devfn) == 13) { ruffian_swizzle()
159 slot = PCI_SLOT(dev->devfn) + 10; ruffian_swizzle()
167 slot = PCI_SLOT(dev->devfn); ruffian_swizzle()
H A Dcore_polaris.c83 polaris_read_config(struct pci_bus *bus, unsigned int devfn, int where, polaris_read_config() argument
89 if (mk_conf_addr(bus, devfn, where, &addr, &type1)) polaris_read_config()
109 polaris_write_config(struct pci_bus *bus, unsigned int devfn, int where, polaris_write_config() argument
115 if (mk_conf_addr(bus, devfn, where, &addr, &type1)) polaris_write_config()
H A Dsys_noritake.c230 slot = PCI_SLOT(dev->devfn); noritake_swizzle()
233 else if (PCI_SLOT(dev->bus->self->devfn) == 8) { noritake_swizzle()
234 slot = PCI_SLOT(dev->devfn) + 15; /* WAG! */ noritake_swizzle()
240 if (PCI_SLOT(dev->bus->self->devfn) == 8) { noritake_swizzle()
241 slot = PCI_SLOT(dev->devfn) + 15; noritake_swizzle()
249 slot = PCI_SLOT(dev->devfn); noritake_swizzle()
H A Dsys_eiger.c181 slot = PCI_SLOT(dev->devfn); eiger_swizzle()
185 && (PCI_SLOT(dev->bus->self->devfn) eiger_swizzle()
187 slot = PCI_SLOT(dev->devfn); eiger_swizzle()
H A Dcore_mcpcia.c169 mk_conf_addr(struct pci_bus *pbus, unsigned int devfn, int where, mk_conf_addr() argument
176 DBG_CFG(("mk_conf_addr(bus=%d,devfn=0x%x,hose=%d,where=0x%x," mk_conf_addr()
178 bus, devfn, hose->index, where, pci_addr, type1)); mk_conf_addr()
185 addr = (bus << 16) | (devfn << 8) | (where); mk_conf_addr()
195 mcpcia_read_config(struct pci_bus *bus, unsigned int devfn, int where, mcpcia_read_config() argument
202 if (mk_conf_addr(bus, devfn, where, hose, &addr, &type1)) mcpcia_read_config()
222 mcpcia_write_config(struct pci_bus *bus, unsigned int devfn, int where, mcpcia_write_config() argument
229 if (mk_conf_addr(bus, devfn, where, hose, &addr, &type1)) mcpcia_write_config()
H A Dsys_dp264.c433 slot = PCI_SLOT(dev->devfn); monet_swizzle()
436 else if (hose->index == 1 && PCI_SLOT(dev->bus->self->devfn) == 8) { monet_swizzle()
437 slot = PCI_SLOT(dev->devfn); monet_swizzle()
443 PCI_SLOT(dev->bus->self->devfn) == 8) { monet_swizzle()
444 slot = PCI_SLOT(dev->devfn); monet_swizzle()
452 slot = PCI_SLOT(dev->devfn); monet_swizzle()
H A Dsys_sable.c413 slot = PCI_SLOT(dev->devfn); lynx_swizzle()
416 else if (PCI_SLOT(dev->bus->self->devfn) == 3) { lynx_swizzle()
417 slot = PCI_SLOT(dev->devfn) + 11; lynx_swizzle()
423 if (PCI_SLOT(dev->bus->self->devfn) == 3) { lynx_swizzle()
424 slot = PCI_SLOT(dev->devfn) + 11; lynx_swizzle()
432 slot = PCI_SLOT(dev->devfn); lynx_swizzle()
H A Dcore_apecs.c274 apecs_read_config(struct pci_bus *bus, unsigned int devfn, int where, apecs_read_config() argument
282 if (mk_conf_addr(bus, devfn, where, &pci_addr, &type1)) apecs_read_config()
293 apecs_write_config(struct pci_bus *bus, unsigned int devfn, int where, apecs_write_config() argument
300 if (mk_conf_addr(bus, devfn, where, &pci_addr, &type1)) apecs_write_config()
/linux-4.1.27/arch/powerpc/kernel/
H A Dpci_of_scan.c122 * @devfn: PCI function number, extracted from device tree by caller.
125 struct pci_bus *bus, int devfn) of_create_pci_dev()
138 pr_debug(" create device, devfn: %x, type: %s\n", devfn, type); of_create_pci_dev()
143 dev->devfn = devfn; of_create_pci_dev()
149 if (PCI_SLOT(dev->devfn) == slot->number) of_create_pci_dev()
160 dev->bus->number, PCI_SLOT(devfn), PCI_FUNC(devfn)); of_create_pci_dev()
309 int reglen, devfn; of_scan_pci_dev() local
321 devfn = (of_read_number(reg, 1) >> 8) & 0xff; of_scan_pci_dev()
324 dev = pci_get_slot(bus, devfn); of_scan_pci_dev()
337 dev = of_create_pci_dev(dn, bus, devfn); of_scan_pci_dev()
124 of_create_pci_dev(struct device_node *node, struct pci_bus *bus, int devfn) of_create_pci_dev() argument
H A Drtas_pci.c74 addr = rtas_config_addr(pdn->busno, pdn->devfn, where); rtas_read_config()
91 unsigned int devfn, rtas_pci_read_config()
104 if (pdn && pdn->devfn == devfn rtas_pci_read_config()
137 addr = rtas_config_addr(pdn->busno, pdn->devfn, where); rtas_write_config()
153 unsigned int devfn, rtas_pci_write_config()
164 if (pdn && pdn->devfn == devfn rtas_pci_write_config()
90 rtas_pci_read_config(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val) rtas_pci_read_config() argument
152 rtas_pci_write_config(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val) rtas_pci_write_config() argument
H A Dpci_dn.c71 int devfn) pci_get_pdn_by_devfn()
79 if (pdev->devfn == devfn) { pci_get_pdn_by_devfn()
100 pdn->devfn == devfn) pci_get_pdn_by_devfn()
132 pdn->devfn == pdev->devfn) pci_get_pdn()
142 int busno, int devfn) add_one_dev_pci_data()
159 pdn->devfn = devfn; add_one_dev_pci_data()
256 pdn->devfn != pci_iov_virtfn_devfn(pdev, i)) remove_dev_pci_data()
295 pdn->devfn = (addr >> 8) & 0xff; update_dn_pci_info()
435 pdn->devfn = pdn->busno = -1; pci_devs_phb_init_dynamic()
70 pci_get_pdn_by_devfn(struct pci_bus *bus, int devfn) pci_get_pdn_by_devfn() argument
140 add_one_dev_pci_data(struct pci_dn *parent, struct pci_dev *pdev, int busno, int devfn) add_one_dev_pci_data() argument
H A Dpci_32.c156 int pci_device_from_OF_node(struct device_node *node, u8 *bus, u8 *devfn) pci_device_from_OF_node() argument
171 *devfn = (be32_to_cpup(&reg[0]) >> 8) & 0xff; pci_device_from_OF_node()
183 dev->devfn == *devfn) { for_each_pci_dev()
283 long sys_pciconfig_iobase(long which, unsigned long bus, unsigned long devfn) sys_pciconfig_iobase() argument
/linux-4.1.27/arch/arm/mach-ixp4xx/
H A Dcommon-pci.c169 static u32 ixp4xx_config_addr(u8 bus_num, u16 devfn, int where) ixp4xx_config_addr() argument
174 addr = BIT(32-PCI_SLOT(devfn)) | ((PCI_FUNC(devfn)) << 8) | ixp4xx_config_addr()
178 addr = (bus_num << 16) | ((PCI_SLOT(devfn)) << 11) | ixp4xx_config_addr()
179 ((PCI_FUNC(devfn)) << 8) | (where & ~3) | 1; ixp4xx_config_addr()
242 static int ixp4xx_pci_read_config(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *value) ixp4xx_pci_read_config() argument
248 bus_num, PCI_SLOT(devfn), PCI_FUNC(devfn)); ixp4xx_pci_read_config()
256 addr = ixp4xx_config_addr(bus_num, devfn, where); ixp4xx_pci_read_config()
265 static int ixp4xx_pci_write_config(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 value) ixp4xx_pci_write_config() argument
271 size, bus_num, PCI_SLOT(devfn), PCI_FUNC(devfn)); ixp4xx_pci_write_config()
278 addr = ixp4xx_config_addr(bus_num, devfn, where); ixp4xx_pci_write_config()
/linux-4.1.27/drivers/edac/
H A Damd8131_edac.c72 .devfn = DEVFN_PCIX_BRIDGE_NORTH_A,
77 .devfn = DEVFN_PCIX_BRIDGE_NORTH_B,
82 .devfn = DEVFN_PCIX_BRIDGE_SOUTH_A,
87 .devfn = DEVFN_PCIX_BRIDGE_SOUTH_B,
255 if (dev_info->devfn == dev->devfn) amd8131_probe()
270 "vendor %x, device %x, devfn %x, name %s\n", amd8131_probe()
272 dev_info->devfn, dev_info->ctl_name); amd8131_probe()
306 "vendor %x, device %x, devfn %x, name %s\n", amd8131_probe()
308 dev_info->devfn, dev_info->ctl_name); amd8131_probe()
319 if (dev_info->devfn == dev->devfn) amd8131_remove()
H A Damd8131_edac.h92 int devfn; member in struct:amd8131_dev_info
106 * Function Zero, they could be discrimated by their pci_dev->devfn.
/linux-4.1.27/drivers/pci/
H A Dxen-pcifront.c179 static int pcifront_bus_read(struct pci_bus *bus, unsigned int devfn, pcifront_bus_read() argument
187 .devfn = devfn, pcifront_bus_read()
197 pci_domain_nr(bus), bus->number, PCI_SLOT(devfn), pcifront_bus_read()
198 PCI_FUNC(devfn), where, size); pcifront_bus_read()
218 static int pcifront_bus_write(struct pci_bus *bus, unsigned int devfn, pcifront_bus_write() argument
225 .devfn = devfn, pcifront_bus_write()
238 PCI_SLOT(devfn), PCI_FUNC(devfn), where, size, val); pcifront_bus_write()
258 .devfn = dev->devfn, pci_frontend_enable_msix()
312 .devfn = dev->devfn, pci_frontend_disable_msix()
331 .devfn = dev->devfn, pci_frontend_enable_msi()
347 "%x:%x\n", op.bus, op.devfn); pci_frontend_enable_msi()
360 .devfn = dev->devfn, pci_frontend_disable_msi()
423 unsigned int devfn; pcifront_scan_bus() local
429 for (devfn = 0; devfn < 0x100; devfn++) { pcifront_scan_bus()
430 d = pci_get_slot(b, devfn); pcifront_scan_bus()
437 d = pci_scan_single_device(b, devfn); pcifront_scan_bus()
441 PCI_SLOT(devfn), PCI_FUNC(devfn)); pcifront_scan_bus()
494 * devfn==0. The pcifront_scan_bus enumerates all devfn. */ pcifront_scan_root()
589 int devfn = pdev->sh_info->aer_op.devfn; pcifront_common_process() local
594 "pcifront AER process: cmd %x (bus:%x, devfn%x)", pcifront_common_process()
595 cmd, bus, devfn); pcifront_common_process()
598 pcidev = pci_get_bus_and_slot(bus, devfn); pcifront_common_process()
655 "pcifront service aer bus %x devfn %x\n", pcifront_do_aer()
656 pdev->sh_info->aer_op.bus, pdev->sh_info->aer_op.devfn); pcifront_do_aer()
H A Daccess.c30 (struct pci_bus *bus, unsigned int devfn, int pos, type *value) \
37 res = bus->ops->read(bus, devfn, pos, len, &data); \
45 (struct pci_bus *bus, unsigned int devfn, int pos, type value) \
51 res = bus->ops->write(bus, devfn, pos, len, value); \
70 int pci_generic_config_read(struct pci_bus *bus, unsigned int devfn, pci_generic_config_read() argument
75 addr = bus->ops->map_bus(bus, devfn, where); pci_generic_config_read()
92 int pci_generic_config_write(struct pci_bus *bus, unsigned int devfn, pci_generic_config_write() argument
97 addr = bus->ops->map_bus(bus, devfn, where); pci_generic_config_write()
112 int pci_generic_config_read32(struct pci_bus *bus, unsigned int devfn, pci_generic_config_read32() argument
117 addr = bus->ops->map_bus(bus, devfn, where & ~0x3); pci_generic_config_read32()
132 int pci_generic_config_write32(struct pci_bus *bus, unsigned int devfn, pci_generic_config_write32() argument
138 addr = bus->ops->map_bus(bus, devfn, where & ~0x3); pci_generic_config_write32()
245 ret = dev->bus->ops->read(dev->bus, dev->devfn, \
264 ret = dev->bus->ops->write(dev->bus, dev->devfn, \
446 PCI_DEVFN(PCI_SLOT(dev->devfn), 0)); pci_vpd_f0_read()
461 PCI_DEVFN(PCI_SLOT(dev->devfn), 0)); pci_vpd_f0_write()
H A Dsearch.c35 ret = fn(pdev, PCI_DEVID(pdev->bus->number, pdev->devfn), data); pci_for_each_dma_alias()
84 tmp->devfn), data); pci_for_each_dma_alias()
97 tmp->devfn), data); pci_for_each_dma_alias()
174 * @devfn: encodes number of PCI slot in which the desired PCI
185 struct pci_dev *pci_get_slot(struct pci_bus *bus, unsigned int devfn) pci_get_slot() argument
193 if (dev->devfn == devfn) pci_get_slot()
209 * @devfn: encodes number of PCI slot in which the desired PCI device
221 unsigned int devfn) pci_get_domain_bus_and_slot()
227 (dev->bus->number == bus && dev->devfn == devfn)) for_each_pci_dev()
220 pci_get_domain_bus_and_slot(int domain, unsigned int bus, unsigned int devfn) pci_get_domain_bus_and_slot() argument
H A Dpci-label.c47 int devfn; find_smbios_instance_string() local
50 devfn = pdev->devfn; find_smbios_instance_string()
57 donboard->devfn == devfn) { find_smbios_instance_string()
H A Dprobe.c1141 if (PCI_SLOT(dev->devfn) == slot->number) pci_setup_device()
1149 dev->bus->number, PCI_SLOT(dev->devfn), pci_setup_device()
1150 PCI_FUNC(dev->devfn)); pci_setup_device()
1448 bool pci_bus_read_dev_vendor_id(struct pci_bus *bus, int devfn, u32 *l, pci_bus_read_dev_vendor_id() argument
1453 if (pci_bus_read_config_dword(bus, devfn, PCI_VENDOR_ID, l)) pci_bus_read_dev_vendor_id()
1473 if (pci_bus_read_config_dword(bus, devfn, PCI_VENDOR_ID, l)) pci_bus_read_dev_vendor_id()
1478 pci_domain_nr(bus), bus->number, PCI_SLOT(devfn), pci_bus_read_dev_vendor_id()
1479 PCI_FUNC(devfn)); pci_bus_read_dev_vendor_id()
1492 static struct pci_dev *pci_scan_device(struct pci_bus *bus, int devfn) pci_scan_device() argument
1497 if (!pci_bus_read_dev_vendor_id(bus, devfn, &l, 60*1000)) pci_scan_device()
1504 dev->devfn = devfn; pci_scan_device()
1590 struct pci_dev *pci_scan_single_device(struct pci_bus *bus, int devfn) pci_scan_single_device() argument
1594 dev = pci_get_slot(bus, devfn); pci_scan_single_device()
1600 dev = pci_scan_device(bus, devfn); pci_scan_single_device()
1655 * @devfn: slot number to scan (must have zero function.)
1663 int pci_scan_slot(struct pci_bus *bus, int devfn) pci_scan_slot() argument
1668 if (only_one_child(bus) && (devfn > 0)) pci_scan_slot()
1671 dev = pci_scan_single_device(bus, devfn); pci_scan_slot()
1678 dev = pci_scan_single_device(bus, devfn + fn); pci_scan_slot()
1866 unsigned int devfn, pass, max = bus->busn_res.start; pci_scan_child_bus() local
1872 for (devfn = 0; devfn < 0x100; devfn += 8) pci_scan_child_bus()
1873 pci_scan_slot(bus, devfn); pci_scan_child_bus()
2243 if (a->devfn < b->devfn) return -1; pci_sort_bf_cmp()
2244 else if (a->devfn > b->devfn) return 1; pci_sort_bf_cmp()
H A Dof.c23 dev->devfn); pci_set_of_node()
H A Dslot.c110 if (PCI_SLOT(dev->devfn) == slot->number) pci_slot_release()
212 * @slot_nr: PCI_SLOT(pci_dev->devfn) or -1 for placeholder
244 * %struct pci_bus and bb is the bus number. In other words, the devfn of
305 if (PCI_SLOT(dev->devfn) == slot_nr) pci_create_slot()
/linux-4.1.27/arch/arm/plat-iop/
H A Dpci.c39 static u32 iop3xx_cfg_address(struct pci_bus *bus, int devfn, int where) iop3xx_cfg_address() argument
45 addr = 1 << (PCI_SLOT(devfn) + 16) | (PCI_SLOT(devfn) << 11); iop3xx_cfg_address()
47 addr = bus->number << 16 | PCI_SLOT(devfn) << 11 | 1; iop3xx_cfg_address()
49 addr |= PCI_FUNC(devfn) << 8 | (where & ~3); iop3xx_cfg_address()
113 iop3xx_read_config(struct pci_bus *bus, unsigned int devfn, int where, iop3xx_read_config() argument
116 unsigned long addr = iop3xx_cfg_address(bus, devfn, where); iop3xx_read_config()
128 iop3xx_write_config(struct pci_bus *bus, unsigned int devfn, int where, iop3xx_write_config() argument
131 unsigned long addr = iop3xx_cfg_address(bus, devfn, where); iop3xx_write_config()
/linux-4.1.27/drivers/pci/host/
H A Dpci-keystone.h48 unsigned int devfn, int where, int size, u32 val);
50 unsigned int devfn, int where, int size, u32 *val);
H A Dpci-mvebu.c47 #define PCIE_CONF_ADDR(bus, devfn, where) \
48 (PCIE_CONF_BUS(bus) | PCIE_CONF_DEV(PCI_SLOT(devfn)) | \
49 PCIE_CONF_FUNC(PCI_FUNC(devfn)) | PCIE_CONF_REG(where) | \
116 int devfn; member in struct:mvebu_pcie_port
255 u32 devfn, int where, int size, u32 *val) mvebu_pcie_hw_rd_conf()
257 mvebu_writel(port, PCIE_CONF_ADDR(bus->number, devfn, where), mvebu_pcie_hw_rd_conf()
272 u32 devfn, int where, int size, u32 val) mvebu_pcie_hw_wr_conf()
276 mvebu_writel(port, PCIE_CONF_ADDR(bus->number, devfn, where), mvebu_pcie_hw_wr_conf()
618 int devfn) mvebu_pcie_find_port()
625 if (bus->number == 0 && port->devfn == devfn) mvebu_pcie_find_port()
637 static int mvebu_pcie_wr_conf(struct pci_bus *bus, u32 devfn, mvebu_pcie_wr_conf() argument
644 port = mvebu_pcie_find_port(pcie, bus, devfn); mvebu_pcie_wr_conf()
663 PCI_SLOT(devfn) != 0) mvebu_pcie_wr_conf()
667 ret = mvebu_pcie_hw_wr_conf(port, bus, devfn, mvebu_pcie_wr_conf()
674 static int mvebu_pcie_rd_conf(struct pci_bus *bus, u32 devfn, int where, mvebu_pcie_rd_conf() argument
681 port = mvebu_pcie_find_port(pcie, bus, devfn); mvebu_pcie_rd_conf()
704 PCI_SLOT(devfn) != 0) { mvebu_pcie_rd_conf()
710 ret = mvebu_pcie_hw_rd_conf(port, bus, devfn, mvebu_pcie_rd_conf()
845 static int mvebu_get_tgt_attr(struct device_node *np, int devfn, mvebu_get_tgt_attr() argument
878 if (slot == PCI_SLOT(devfn) && type == rtype) { mvebu_get_tgt_attr()
1010 port->devfn = of_pci_get_devfn(child); mvebu_pcie_probe()
1011 if (port->devfn < 0) mvebu_pcie_probe()
1014 ret = mvebu_get_tgt_attr(np, port->devfn, IORESOURCE_MEM, mvebu_pcie_probe()
1023 mvebu_get_tgt_attr(np, port->devfn, IORESOURCE_IO, mvebu_pcie_probe()
253 mvebu_pcie_hw_rd_conf(struct mvebu_pcie_port *port, struct pci_bus *bus, u32 devfn, int where, int size, u32 *val) mvebu_pcie_hw_rd_conf() argument
270 mvebu_pcie_hw_wr_conf(struct mvebu_pcie_port *port, struct pci_bus *bus, u32 devfn, int where, int size, u32 val) mvebu_pcie_hw_wr_conf() argument
616 mvebu_pcie_find_port(struct mvebu_pcie *pcie, struct pci_bus *bus, int devfn) mvebu_pcie_find_port() argument
H A Dpcie-designware.c581 u32 devfn, int where, int size, u32 *val) dw_pcie_rd_other_conf()
586 busdev = PCIE_ATU_BUS(bus->number) | PCIE_ATU_DEV(PCI_SLOT(devfn)) | dw_pcie_rd_other_conf()
587 PCIE_ATU_FUNC(PCI_FUNC(devfn)); dw_pcie_rd_other_conf()
606 u32 devfn, int where, int size, u32 val) dw_pcie_wr_other_conf()
611 busdev = PCIE_ATU_BUS(bus->number) | PCIE_ATU_DEV(PCI_SLOT(devfn)) | dw_pcie_wr_other_conf()
612 PCIE_ATU_FUNC(PCI_FUNC(devfn)); dw_pcie_wr_other_conf()
653 static int dw_pcie_rd_conf(struct pci_bus *bus, u32 devfn, int where, dw_pcie_rd_conf() argument
659 if (dw_pcie_valid_config(pp, bus, PCI_SLOT(devfn)) == 0) { dw_pcie_rd_conf()
666 ret = pp->ops->rd_other_conf(pp, bus, devfn, dw_pcie_rd_conf()
669 ret = dw_pcie_rd_other_conf(pp, bus, devfn, dw_pcie_rd_conf()
677 static int dw_pcie_wr_conf(struct pci_bus *bus, u32 devfn, dw_pcie_wr_conf() argument
683 if (dw_pcie_valid_config(pp, bus, PCI_SLOT(devfn)) == 0) dw_pcie_wr_conf()
688 ret = pp->ops->wr_other_conf(pp, bus, devfn, dw_pcie_wr_conf()
691 ret = dw_pcie_wr_other_conf(pp, bus, devfn, dw_pcie_wr_conf()
580 dw_pcie_rd_other_conf(struct pcie_port *pp, struct pci_bus *bus, u32 devfn, int where, int size, u32 *val) dw_pcie_rd_other_conf() argument
605 dw_pcie_wr_other_conf(struct pcie_port *pp, struct pci_bus *bus, u32 devfn, int where, int size, u32 val) dw_pcie_wr_other_conf() argument
H A Dpci-keystone-dw.c361 * @devfn: device, function number info
374 unsigned int devfn) ks_pcie_cfg_setup()
376 u8 device = PCI_SLOT(devfn), function = PCI_FUNC(devfn); ks_pcie_cfg_setup()
398 unsigned int devfn, int where, int size, u32 *val) ks_dw_pcie_rd_other_conf()
404 addr = ks_pcie_cfg_setup(ks_pcie, bus_num, devfn); ks_dw_pcie_rd_other_conf()
410 unsigned int devfn, int where, int size, u32 val) ks_dw_pcie_wr_other_conf()
416 addr = ks_pcie_cfg_setup(ks_pcie, bus_num, devfn); ks_dw_pcie_wr_other_conf()
373 ks_pcie_cfg_setup(struct keystone_pcie *ks_pcie, u8 bus, unsigned int devfn) ks_pcie_cfg_setup() argument
397 ks_dw_pcie_rd_other_conf(struct pcie_port *pp, struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val) ks_dw_pcie_rd_other_conf() argument
409 ks_dw_pcie_wr_other_conf(struct pcie_port *pp, struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val) ks_dw_pcie_wr_other_conf() argument
H A Dpcie-designware.h66 unsigned int devfn, int where, int size, u32 *val);
68 unsigned int devfn, int where, int size, u32 val);
H A Dpci-host-generic.c48 unsigned int devfn, gen_pci_map_cfg_bus_cam()
55 return pci->cfg.win[idx] + ((devfn << 8) | where); gen_pci_map_cfg_bus_cam()
64 unsigned int devfn, gen_pci_map_cfg_bus_ecam()
71 return pci->cfg.win[idx] + ((devfn << 12) | where); gen_pci_map_cfg_bus_ecam()
47 gen_pci_map_cfg_bus_cam(struct pci_bus *bus, unsigned int devfn, int where) gen_pci_map_cfg_bus_cam() argument
63 gen_pci_map_cfg_bus_ecam(struct pci_bus *bus, unsigned int devfn, int where) gen_pci_map_cfg_bus_ecam() argument
H A Dpci-xgene.c95 static void xgene_pcie_set_rtdid_reg(struct pci_bus *bus, uint devfn) xgene_pcie_set_rtdid_reg() argument
102 d = PCI_SLOT(devfn); xgene_pcie_set_rtdid_reg()
103 f = PCI_FUNC(devfn); xgene_pcie_set_rtdid_reg()
130 static void __iomem *xgene_pcie_map_bus(struct pci_bus *bus, unsigned int devfn, xgene_pcie_map_bus() argument
135 if ((pci_is_root_bus(bus) && devfn != 0) || !port->link_up || xgene_pcie_map_bus()
139 xgene_pcie_set_rtdid_reg(bus, devfn); xgene_pcie_map_bus()
H A Dpcie-rcar.c181 unsigned int devfn, int where, u32 *data) rcar_pcie_config_access()
185 dev = PCI_SLOT(devfn); rcar_pcie_config_access()
186 func = PCI_FUNC(devfn); rcar_pcie_config_access()
201 * space to devfn 0 in order to enable self-enumeration. In this rcar_pcie_config_access()
258 static int rcar_pcie_read_conf(struct pci_bus *bus, unsigned int devfn, rcar_pcie_read_conf() argument
265 bus, devfn, where, val); rcar_pcie_read_conf()
276 dev_dbg(&bus->dev, "pcie-config-read: bus=%3d devfn=0x%04x where=0x%04x size=%d val=0x%08lx\n", rcar_pcie_read_conf()
277 bus->number, devfn, where, size, (unsigned long)*val); rcar_pcie_read_conf()
283 static int rcar_pcie_write_conf(struct pci_bus *bus, unsigned int devfn, rcar_pcie_write_conf() argument
291 bus, devfn, where, &data); rcar_pcie_write_conf()
295 dev_dbg(&bus->dev, "pcie-config-write: bus=%3d devfn=0x%04x where=0x%04x size=%d val=0x%08lx\n", rcar_pcie_write_conf()
296 bus->number, devfn, where, size, (unsigned long)val); rcar_pcie_write_conf()
310 bus, devfn, where, &data); rcar_pcie_write_conf()
179 rcar_pcie_config_access(struct rcar_pcie *pcie, unsigned char access_type, struct pci_bus *bus, unsigned int devfn, int where, u32 *data) rcar_pcie_config_access() argument
H A Dpcie-xilinx.c164 * @devfn: device/function
168 static bool xilinx_pcie_valid_device(struct pci_bus *bus, unsigned int devfn) xilinx_pcie_valid_device() argument
178 if (bus->number == port->root_busno && devfn > 0) xilinx_pcie_valid_device()
185 if (bus->primary == port->root_busno && devfn > 0) xilinx_pcie_valid_device()
194 * @devfn: Device/function
201 unsigned int devfn, int where) xilinx_pcie_map_bus()
206 if (!xilinx_pcie_valid_device(bus, devfn)) xilinx_pcie_map_bus()
210 (devfn << ECAM_DEV_NUM_SHIFT); xilinx_pcie_map_bus()
200 xilinx_pcie_map_bus(struct pci_bus *bus, unsigned int devfn, int where) xilinx_pcie_map_bus() argument
/linux-4.1.27/arch/x86/include/asm/
H A Damd_nb.h93 PCI_SLOT(misc->devfn) == PCI_SLOT(pdev->devfn)) amd_get_node_id()
H A Dpci_x86.h64 u8 bus, devfn; /* Bus, device and function */ member in struct:irq_info
99 int (*read)(unsigned int domain, unsigned int bus, unsigned int devfn,
101 int (*write)(unsigned int domain, unsigned int bus, unsigned int devfn,
/linux-4.1.27/include/linux/
H A Dof_pci.h14 unsigned int devfn);
27 unsigned int devfn) of_pci_find_child_device()
26 of_pci_find_child_device(struct device_node *parent, unsigned int devfn) of_pci_find_child_device() argument
H A Daer.h63 void aer_recover_queue(int domain, unsigned int bus, unsigned int devfn,
H A Dpci.h49 #define PCI_DEVID(bus, devfn) ((((u16)(bus)) << 8) | (devfn))
50 /* return bus from PCI devid = ((u16)bus_number) << 8) | devfn */
58 unsigned char number; /* PCI_SLOT(pci_dev->devfn) */
267 unsigned int devfn; /* encoded device & function index */ member in struct:pci_dev
282 u8 dma_alias_devfn;/* devfn of DMA alias, if any */
570 void __iomem *(*map_bus)(struct pci_bus *bus, unsigned int devfn, int where);
571 int (*read)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val);
572 int (*write)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val);
579 int raw_pci_read(unsigned int domain, unsigned int bus, unsigned int devfn,
581 int raw_pci_write(unsigned int domain, unsigned int bus, unsigned int devfn,
805 int pci_scan_slot(struct pci_bus *bus, int devfn);
806 struct pci_dev *pci_scan_single_device(struct pci_bus *bus, int devfn);
851 struct pci_dev *pci_get_slot(struct pci_bus *bus, unsigned int devfn);
853 unsigned int devfn); pci_get_bus_and_slot()
855 unsigned int devfn) pci_get_bus_and_slot()
857 return pci_get_domain_bus_and_slot(0, bus, devfn); pci_get_bus_and_slot()
862 int pci_bus_read_config_byte(struct pci_bus *bus, unsigned int devfn,
864 int pci_bus_read_config_word(struct pci_bus *bus, unsigned int devfn,
866 int pci_bus_read_config_dword(struct pci_bus *bus, unsigned int devfn,
868 int pci_bus_write_config_byte(struct pci_bus *bus, unsigned int devfn,
870 int pci_bus_write_config_word(struct pci_bus *bus, unsigned int devfn,
872 int pci_bus_write_config_dword(struct pci_bus *bus, unsigned int devfn,
875 int pci_generic_config_read(struct pci_bus *bus, unsigned int devfn,
877 int pci_generic_config_write(struct pci_bus *bus, unsigned int devfn,
879 int pci_generic_config_read32(struct pci_bus *bus, unsigned int devfn,
881 int pci_generic_config_write32(struct pci_bus *bus, unsigned int devfn,
888 return pci_bus_read_config_byte(dev->bus, dev->devfn, where, val); pci_read_config_byte()
892 return pci_bus_read_config_word(dev->bus, dev->devfn, where, val); pci_read_config_word()
897 return pci_bus_read_config_dword(dev->bus, dev->devfn, where, val); pci_read_config_dword()
901 return pci_bus_write_config_byte(dev->bus, dev->devfn, where, val); pci_write_config_byte()
905 return pci_bus_write_config_word(dev->bus, dev->devfn, where, val); pci_write_config_word()
910 return pci_bus_write_config_dword(dev->bus, dev->devfn, where, val); pci_write_config_dword()
1073 int pci_bus_find_capability(struct pci_bus *bus, unsigned int devfn, int cap);
1449 unsigned int devfn) pci_get_slot()
1452 unsigned int devfn) pci_get_bus_and_slot()
854 pci_get_bus_and_slot(unsigned int bus, unsigned int devfn) pci_get_bus_and_slot() argument
1448 pci_get_slot(struct pci_bus *bus, unsigned int devfn) pci_get_slot() argument
1451 pci_get_bus_and_slot(unsigned int bus, unsigned int devfn) pci_get_bus_and_slot() argument
/linux-4.1.27/include/xen/interface/
H A Dphysdev.h148 int devfn; member in struct:physdev_map_pirq
172 uint8_t devfn; member in struct:physdev_manage_pci
179 uint8_t devfn; member in struct:physdev_restore_msi
186 uint8_t devfn; member in struct:physdev_manage_pci_ext
191 uint8_t devfn; member in struct:physdev_manage_pci_ext::__anon13914
256 uint8_t devfn; member in struct:physdev_pci_device_add
260 uint8_t devfn; member in struct:physdev_pci_device_add::__anon13916
281 uint8_t devfn; member in struct:physdev_pci_device
/linux-4.1.27/arch/powerpc/platforms/82xx/
H A Dpq2.c39 u_char bus, u8 devfn) pq2_pci_exclude_device()
41 if (bus == 0 && PCI_SLOT(devfn) == 0) pq2_pci_exclude_device()
38 pq2_pci_exclude_device(struct pci_controller *hose, u_char bus, u8 devfn) pq2_pci_exclude_device() argument
/linux-4.1.27/arch/powerpc/boot/
H A Dmv64x60.h48 u32 mv64x60_cfg_read(u8 *bridge_base, u8 hose, u8 bus, u8 devfn,
50 void mv64x60_cfg_write(u8 *bridge_base, u8 hose, u8 bus, u8 devfn,
/linux-4.1.27/arch/arm64/kernel/
H A Dpci.c55 unsigned int devfn, int reg, int len, u32 *val) raw_pci_read()
61 unsigned int devfn, int reg, int len, u32 val) raw_pci_write()
54 raw_pci_read(unsigned int domain, unsigned int bus, unsigned int devfn, int reg, int len, u32 *val) raw_pci_read() argument
60 raw_pci_write(unsigned int domain, unsigned int bus, unsigned int devfn, int reg, int len, u32 val) raw_pci_write() argument
/linux-4.1.27/arch/m68k/coldfire/
H A Dpci.c70 static unsigned long mcf_mk_pcicar(int bus, unsigned int devfn, int where) mcf_mk_pcicar() argument
72 return (bus << PCICAR_BUSN) | (devfn << PCICAR_DEVFNN) | (where & 0xfc); mcf_mk_pcicar()
75 static int mcf_pci_readconfig(struct pci_bus *bus, unsigned int devfn, mcf_pci_readconfig() argument
83 if (mcf_host_slot2sid[PCI_SLOT(devfn)] == 0) mcf_pci_readconfig()
88 addr = mcf_mk_pcicar(bus->number, devfn, where); mcf_pci_readconfig()
109 static int mcf_pci_writeconfig(struct pci_bus *bus, unsigned int devfn, mcf_pci_writeconfig() argument
115 if (mcf_host_slot2sid[PCI_SLOT(devfn)] == 0) mcf_pci_writeconfig()
120 addr = mcf_mk_pcicar(bus->number, devfn, where); mcf_pci_writeconfig()
/linux-4.1.27/arch/arm/common/
H A Dit8152.c164 unsigned int devfn) it8152_pci_dev_base_address()
169 if (devfn < PCI_DEVFN(MAX_SLOTS, 0)) it8152_pci_dev_base_address()
170 addr = (devfn << 8); it8152_pci_dev_base_address()
172 addr = (bus->number << 16) | (devfn << 8); it8152_pci_dev_base_address()
178 unsigned int devfn, int where, it8152_pci_read_config()
181 unsigned long addr = it8152_pci_dev_base_address(bus, devfn); it8152_pci_read_config()
196 unsigned int devfn, int where, it8152_pci_write_config()
199 unsigned long addr = it8152_pci_dev_base_address(bus, devfn); it8152_pci_write_config()
163 it8152_pci_dev_base_address(struct pci_bus *bus, unsigned int devfn) it8152_pci_dev_base_address() argument
177 it8152_pci_read_config(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *value) it8152_pci_read_config() argument
195 it8152_pci_write_config(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 value) it8152_pci_write_config() argument
/linux-4.1.27/arch/ia64/sn/kernel/
H A Dio_acpi_init.c38 unsigned int devfn; member in struct:sn_pcidev_match
244 unsigned int devfn; get_host_devfn() local
255 * obtain the host devfn from the previous child device. get_host_devfn()
264 panic("%s: Unable to find host devfn\n", __func__); get_host_devfn()
280 panic("%s: Unable to find host devfn\n", __func__); get_host_devfn()
287 devfn = PCI_DEVFN(slot, function); get_host_devfn()
288 return devfn; get_host_devfn()
294 * Matching is done on bus number and devfn.
306 unsigned int devfn; find_matching_device() local
337 devfn = PCI_DEVFN(slot, function); find_matching_device()
338 if ((info->devfn == devfn) && (info->bus == bbn)) { find_matching_device()
391 pcidev_match.devfn = dev->devfn; sn_acpi_get_pcidev_info()
/linux-4.1.27/arch/powerpc/platforms/powermac/
H A Dpci.c127 #define MACRISC_CFA0(devfn, off) \
132 #define MACRISC_CFA1(bus, devfn, off) \
134 |(((unsigned int)(devfn)) << 8) \
176 static void __iomem *chaos_map_bus(struct pci_bus *bus, unsigned int devfn, chaos_map_bus() argument
184 np = of_pci_find_child_device(bus->dev.of_node, devfn); chaos_map_bus()
197 return macrisc_cfg_map_bus(bus, devfn, offset); chaos_map_bus()
233 struct pci_bus *bus, unsigned int devfn) u3_ht_skip_device()
245 else if (devfn == 0) u3_ht_skip_device()
250 if (PCI_DN(dn) && PCI_DN(dn)->devfn == devfn) u3_ht_skip_device()
266 #define U3_HT_CFA0(devfn, off) \
267 ((((unsigned int)devfn) << 8) | offset)
268 #define U3_HT_CFA1(bus, devfn, off) \
269 (U3_HT_CFA0(devfn, off) \
274 u8 devfn, u8 offset, int *swap) u3_ht_cfg_access()
278 if (devfn != 0) u3_ht_cfg_access()
279 return hose->cfg_data + U3_HT_CFA0(devfn, offset); u3_ht_cfg_access()
283 return hose->cfg_data + U3_HT_CFA1(bus, devfn, offset); u3_ht_cfg_access()
286 static int u3_ht_read_config(struct pci_bus *bus, unsigned int devfn, u3_ht_read_config() argument
298 addr = u3_ht_cfg_access(hose, bus->number, devfn, offset, &swap); u3_ht_read_config()
302 switch (u3_ht_skip_device(hose, bus, devfn)) { u3_ht_read_config()
337 static int u3_ht_write_config(struct pci_bus *bus, unsigned int devfn, u3_ht_write_config() argument
349 addr = u3_ht_cfg_access(hose, bus->number, devfn, offset, &swap); u3_ht_write_config()
353 switch (u3_ht_skip_device(hose, bus, devfn)) { u3_ht_write_config()
386 #define U4_PCIE_CFA0(devfn, off) \
392 #define U4_PCIE_CFA1(bus, devfn, off) \
394 |(((unsigned int)(devfn)) << 8) \
498 u8 bus, devfn; init_p2pbridge() local
508 if (pci_device_from_OF_node(p2pbridge, &bus, &devfn) < 0) { init_p2pbridge()
520 if (early_read_config_word(hose, bus, devfn, init_p2pbridge()
527 early_write_config_word(hose, bus, devfn, PCI_BRIDGE_CONTROL, val); init_p2pbridge()
535 unsigned char bus, devfn; init_second_ohare() local
544 if (pci_device_from_OF_node(np, &bus, &devfn) == 0) { init_second_ohare()
552 early_read_config_word(hose, bus, devfn, PCI_COMMAND, &cmd); init_second_ohare()
555 early_write_config_word(hose, bus, devfn, PCI_COMMAND, cmd); init_second_ohare()
575 u8 bus, devfn; fixup_nec_usb2() local
590 devfn = (prop[0] >> 8) & 0xff; fixup_nec_usb2()
592 if (PCI_FUNC(devfn) != 0) fixup_nec_usb2()
597 early_read_config_dword(hose, bus, devfn, 0xe4, &data); fixup_nec_usb2()
602 early_write_config_dword(hose, bus, devfn, 0xe4, data); fixup_nec_usb2()
1145 if (PCI_FUNC(dev->devfn) > 0) { fixup_k2_sata()
232 u3_ht_skip_device(struct pci_controller *hose, struct pci_bus *bus, unsigned int devfn) u3_ht_skip_device() argument
273 u3_ht_cfg_access(struct pci_controller *hose, u8 bus, u8 devfn, u8 offset, int *swap) u3_ht_cfg_access() argument
/linux-4.1.27/drivers/pci/pcie/
H A Dpme.c104 * @devfn: Device/function number to check.
110 static bool pcie_pme_from_pci_bridge(struct pci_bus *bus, u8 devfn) pcie_pme_from_pci_bridge() argument
115 if (devfn) pcie_pme_from_pci_bridge()
140 u8 busnr = req_id >> 8, devfn = req_id & 0xff; pcie_pme_handle_request() local
146 if (port->devfn == devfn && port->bus->number == busnr) { pcie_pme_handle_request()
175 found = pcie_pme_from_pci_bridge(bus, devfn); pcie_pme_handle_request()
183 if (dev->devfn == devfn) { pcie_pme_handle_request()
202 } else if (devfn) { pcie_pme_handle_request()
206 * used devfn different from zero. pcie_pme_handle_request()
209 busnr, PCI_SLOT(devfn), PCI_FUNC(devfn)); pcie_pme_handle_request()
/linux-4.1.27/drivers/of/
H A Dof_pci.c12 int devfn; __of_pci_pci_compare() local
14 devfn = of_pci_get_devfn(node); __of_pci_pci_compare()
15 if (devfn < 0) __of_pci_pci_compare()
18 return devfn == data; __of_pci_pci_compare()
22 unsigned int devfn) of_pci_find_child_device()
27 if (__of_pci_pci_compare(node, devfn)) for_each_child_of_node()
36 if (__of_pci_pci_compare(node2, devfn)) { for_each_child_of_node()
21 of_pci_find_child_device(struct device_node *parent, unsigned int devfn) of_pci_find_child_device() argument
/linux-4.1.27/arch/arm/mach-mv78xx0/
H A Dpcie.c137 static int pcie_rd_conf(struct pci_bus *bus, u32 devfn, int where, pcie_rd_conf() argument
145 if (pcie_valid_config(pp, bus->number, PCI_SLOT(devfn)) == 0) { pcie_rd_conf()
151 ret = orion_pcie_rd_conf(pp->base, bus, devfn, where, size, val); pcie_rd_conf()
157 static int pcie_wr_conf(struct pci_bus *bus, u32 devfn, pcie_wr_conf() argument
165 if (pcie_valid_config(pp, bus->number, PCI_SLOT(devfn)) == 0) pcie_wr_conf()
169 ret = orion_pcie_wr_conf(pp->base, bus, devfn, where, size, val); pcie_wr_conf()
185 if (dev->bus->parent == NULL && dev->devfn == 0) { rc_pci_fixup()
/linux-4.1.27/arch/powerpc/include/asm/
H A Dpci-bridge.h139 extern int indirect_read_config(struct pci_bus *bus, unsigned int devfn,
143 unsigned char bus_number, unsigned int devfn,
146 extern int indirect_write_config(struct pci_bus *bus, unsigned int devfn,
157 u8 *bus, u8 *devfn);
181 int devfn; /* pci device and function number */ member in struct:pci_dn
217 int devfn);
224 u8 *bus, u8 *devfn) pci_device_from_OF_node()
229 *devfn = PCI_DN(np)->devfn; pci_device_from_OF_node()
223 pci_device_from_OF_node(struct device_node *np, u8 *bus, u8 *devfn) pci_device_from_OF_node() argument
H A Dtsi108.h87 extern int tsi108_direct_write_config(struct pci_bus *bus, unsigned int devfn,
89 extern int tsi108_direct_read_config(struct pci_bus *bus, unsigned int devfn,
/linux-4.1.27/arch/powerpc/platforms/86xx/
H A Dmpc86xx_hpcn.c48 u_char bus, u_char devfn);
51 u_char bus, u_char devfn) mpc86xx_exclude_device()
54 return uli_exclude_device(hose, bus, devfn); mpc86xx_exclude_device()
50 mpc86xx_exclude_device(struct pci_controller *hose, u_char bus, u_char devfn) mpc86xx_exclude_device() argument
/linux-4.1.27/drivers/ide/
H A Dcy82c693.c94 dev = pci_get_slot(dev->bus, dev->devfn+1); cy82c693_set_pio_mode()
153 if (PCI_FUNC(dev->devfn) == 1) init_iops_cy82c693()
185 PCI_FUNC(dev->devfn) == 1) { cy82c693_init_one()
186 dev2 = pci_get_slot(dev->bus, dev->devfn + 1); cy82c693_init_one()
H A Dide-pci-generic.c118 !(PCI_FUNC(dev->devfn) & 1)) generic_init_one()
123 !(PCI_FUNC(dev->devfn) & 1)) generic_init_one()
128 PCI_FUNC(dev->devfn) != 1) generic_init_one()
/linux-4.1.27/arch/powerpc/platforms/52xx/
H A Defika.c35 static int rtas_read_config(struct pci_bus *bus, unsigned int devfn, int offset, rtas_read_config() argument
39 unsigned long addr = (offset & 0xff) | ((devfn & 0xff) << 8) rtas_read_config()
50 static int rtas_write_config(struct pci_bus *bus, unsigned int devfn, rtas_write_config() argument
54 unsigned long addr = (offset & 0xff) | ((devfn & 0xff) << 8) rtas_write_config()
H A Dmpc52xx_pci.c107 mpc52xx_pci_read_config(struct pci_bus *bus, unsigned int devfn, mpc52xx_pci_read_config() argument
114 if (ppc_md.pci_exclude_device(hose, bus->number, devfn)) mpc52xx_pci_read_config()
120 (devfn << 8) | mpc52xx_pci_read_config()
164 mpc52xx_pci_write_config(struct pci_bus *bus, unsigned int devfn, mpc52xx_pci_write_config() argument
171 if (ppc_md.pci_exclude_device(hose, bus->number, devfn)) mpc52xx_pci_write_config()
177 (devfn << 8) | mpc52xx_pci_write_config()
/linux-4.1.27/arch/ia64/pci/
H A Dpci.c40 #define PCI_SAL_ADDRESS(seg, bus, devfn, reg) \
41 (((u64) seg << 24) | (bus << 16) | (devfn << 8) | (reg))
45 #define PCI_SAL_EXT_ADDRESS(seg, bus, devfn, reg) \
46 (((u64) seg << 28) | (bus << 20) | (devfn << 12) | (reg))
48 int raw_pci_read(unsigned int seg, unsigned int bus, unsigned int devfn, raw_pci_read() argument
54 if (!value || (seg > 65535) || (bus > 255) || (devfn > 255) || (reg > 4095)) raw_pci_read()
58 addr = PCI_SAL_ADDRESS(seg, bus, devfn, reg); raw_pci_read()
61 addr = PCI_SAL_EXT_ADDRESS(seg, bus, devfn, reg); raw_pci_read()
75 int raw_pci_write(unsigned int seg, unsigned int bus, unsigned int devfn, raw_pci_write() argument
81 if ((seg > 65535) || (bus > 255) || (devfn > 255) || (reg > 4095)) raw_pci_write()
85 addr = PCI_SAL_ADDRESS(seg, bus, devfn, reg); raw_pci_write()
88 addr = PCI_SAL_EXT_ADDRESS(seg, bus, devfn, reg); raw_pci_write()
99 static int pci_read(struct pci_bus *bus, unsigned int devfn, int where, pci_read() argument
103 devfn, where, size, value); pci_read()
106 static int pci_write(struct pci_bus *bus, unsigned int devfn, int where, pci_write() argument
110 devfn, where, size, value); pci_write()
/linux-4.1.27/arch/powerpc/platforms/chrp/
H A Dpci.c33 int gg2_read_config(struct pci_bus *bus, unsigned int devfn, int off, gg2_read_config() argument
45 cfg_data = hose->cfg_data + ((bus->number<<16) | (devfn<<8) | off); gg2_read_config()
60 int gg2_write_config(struct pci_bus *bus, unsigned int devfn, int off, gg2_write_config() argument
72 cfg_data = hose->cfg_data + ((bus->number<<16) | (devfn<<8) | off); gg2_write_config()
96 int rtas_read_config(struct pci_bus *bus, unsigned int devfn, int offset, rtas_read_config() argument
100 unsigned long addr = (offset & 0xff) | ((devfn & 0xff) << 8) rtas_read_config()
111 int rtas_write_config(struct pci_bus *bus, unsigned int devfn, int offset, rtas_write_config() argument
115 unsigned long addr = (offset & 0xff) | ((devfn & 0xff) << 8) rtas_write_config()
/linux-4.1.27/drivers/hwmon/
H A Dfam15h_power.c60 pci_bus_read_config_dword(f4->bus, PCI_DEVFN(PCI_SLOT(f4->devfn), 5), show_power()
66 pci_bus_read_config_dword(f4->bus, PCI_DEVFN(PCI_SLOT(f4->devfn), 5), show_power()
124 pci_bus_read_config_dword(f4->bus, PCI_DEVFN(PCI_SLOT(f4->devfn), 3), fam15h_power_is_internal_node0()
155 PCI_DEVFN(PCI_SLOT(pdev->devfn), 5), tweak_runavg_range()
163 PCI_DEVFN(PCI_SLOT(pdev->devfn), 5), tweak_runavg_range()
187 pci_bus_read_config_dword(f4->bus, PCI_DEVFN(PCI_SLOT(f4->devfn), 5), fam15h_power_init_data()
H A Dk10temp.c65 static void amd_nb_smu_index_read(struct pci_dev *pdev, unsigned int devfn, amd_nb_smu_index_read() argument
69 pci_bus_write_config_dword(pdev->bus, devfn, amd_nb_smu_index_read()
71 pci_bus_read_config_dword(pdev->bus, devfn, amd_nb_smu_index_read()
171 PCI_DEVFN(PCI_SLOT(pdev->devfn), 2), has_erratum_319()
/linux-4.1.27/drivers/ssb/
H A Ddriver_gige.c110 static int ssb_gige_pci_read_config(struct pci_bus *bus, unsigned int devfn, ssb_gige_pci_read_config() argument
116 if ((PCI_SLOT(devfn) > 0) || (PCI_FUNC(devfn) > 0)) ssb_gige_pci_read_config()
140 static int ssb_gige_pci_write_config(struct pci_bus *bus, unsigned int devfn, ssb_gige_pci_write_config() argument
146 if ((PCI_SLOT(devfn) > 0) || (PCI_FUNC(devfn) > 0)) ssb_gige_pci_write_config()
/linux-4.1.27/arch/arm/mach-iop13xx/
H A Dpci.c175 * @devfn: Combined device number and function number
181 static u32 iop13xx_atux_cfg_address(struct pci_bus *bus, int devfn, int where) iop13xx_atux_cfg_address() argument
187 addr = 1 << (PCI_SLOT(devfn) + 16) | (PCI_SLOT(devfn) << 11); iop13xx_atux_cfg_address()
189 addr = bus->number << 16 | PCI_SLOT(devfn) << 11 | 1; iop13xx_atux_cfg_address()
191 addr |= PCI_FUNC(devfn) << 8 | ((where & 0xff) & ~3); iop13xx_atux_cfg_address()
199 * @devfn: Combined device number and function number
204 static u32 iop13xx_atue_cfg_address(struct pci_bus *bus, int devfn, int where) iop13xx_atue_cfg_address() argument
210 bus->number, PCI_SLOT(devfn), PCI_FUNC(devfn)); iop13xx_atue_cfg_address()
212 ((u32) PCI_SLOT(devfn)) << IOP13XX_ATUE_OCCAR_DEV_NUM | iop13xx_atue_cfg_address()
213 ((u32) PCI_FUNC(devfn)) << IOP13XX_ATUE_OCCAR_FUNC_NUM | iop13xx_atue_cfg_address()
279 iop13xx_atux_read_config(struct pci_bus *bus, unsigned int devfn, int where, iop13xx_atux_read_config() argument
282 unsigned long addr = iop13xx_atux_cfg_address(bus, devfn, where); iop13xx_atux_read_config()
297 iop13xx_atux_write_config(struct pci_bus *bus, unsigned int devfn, int where, iop13xx_atux_write_config() argument
300 unsigned long addr = iop13xx_atux_cfg_address(bus, devfn, where); iop13xx_atux_write_config()
419 iop13xx_atue_read_config(struct pci_bus *bus, unsigned int devfn, int where, iop13xx_atue_read_config() argument
423 unsigned long addr = iop13xx_atue_cfg_address(bus, devfn, where); iop13xx_atue_read_config()
426 if (!PCI_SLOT(devfn) || (addr & 1)) { iop13xx_atue_read_config()
444 iop13xx_atue_write_config(struct pci_bus *bus, unsigned int devfn, int where, iop13xx_atue_write_config() argument
447 unsigned long addr = iop13xx_atue_cfg_address(bus, devfn, where); iop13xx_atue_write_config()
/linux-4.1.27/arch/powerpc/platforms/
H A Dfsl_uli1575.c348 u_char bus, u_char devfn) uli_exclude_device()
352 if ((PCI_SLOT(devfn) == 29) && (PCI_FUNC(devfn) == 1)) uli_exclude_device()
356 if ((PCI_SLOT(devfn) == 29) && (PCI_FUNC(devfn) == 2)) uli_exclude_device()
347 uli_exclude_device(struct pci_controller *hose, u_char bus, u_char devfn) uli_exclude_device() argument
/linux-4.1.27/arch/arm/mach-ks8695/
H A Dpci.c42 static void ks8695_pci_setupconfig(unsigned int bus_nr, unsigned int devfn, unsigned int where) ks8695_pci_setupconfig() argument
47 pbca |= PCI_SLOT(devfn) << 11 ; ks8695_pci_setupconfig()
48 pbca |= PCI_FUNC(devfn) << 8; ks8695_pci_setupconfig()
60 static void __iomem *ks8695_pci_map_bus(struct pci_bus *bus, unsigned int devfn, ks8695_pci_map_bus() argument
63 ks8695_pci_setupconfig(bus->number, devfn, where); ks8695_pci_map_bus()
/linux-4.1.27/drivers/spi/
H A Dspi-pxa2xx-pci.c128 c->num_chipselect : dev->devfn; pxa2xx_spi_pci_probe()
130 dma_dev = pci_get_slot(dev->bus, PCI_DEVFN(PCI_SLOT(dev->devfn), 0)); pxa2xx_spi_pci_probe()
161 ssp->port_id = (c->port_id >= 0) ? c->port_id : dev->devfn; pxa2xx_spi_pci_probe()
/linux-4.1.27/arch/powerpc/platforms/85xx/
H A Dmpc85xx_ds.c117 u_char bus, u_char devfn);
122 u_char bus, u_char devfn) mpc85xx_exclude_device()
125 return uli_exclude_device(hose, bus, devfn); mpc85xx_exclude_device()
121 mpc85xx_exclude_device(struct pci_controller *hose, u_char bus, u_char devfn) mpc85xx_exclude_device() argument
H A Dmpc85xx_ads.c41 u_char bus, u_char devfn) mpc85xx_exclude_device()
43 if (bus == 0 && PCI_SLOT(devfn) == 0) mpc85xx_exclude_device()
40 mpc85xx_exclude_device(struct pci_controller *hose, u_char bus, u_char devfn) mpc85xx_exclude_device() argument
H A Dmpc85xx_cds.c75 u_char bus, u_char devfn) mpc85xx_exclude_device()
78 if ((bus == 1) && (PCI_SLOT(devfn) == ARCADIA_2ND_BRIDGE_IDSEL)) mpc85xx_exclude_device()
80 if ((bus == 0) && (PCI_SLOT(devfn) == ARCADIA_2ND_BRIDGE_IDSEL)) mpc85xx_exclude_device()
146 if (PCI_FUNC(dev->devfn) == 3) mpc85xx_cds_pci_irq_fixup()
74 mpc85xx_exclude_device(struct pci_controller *hose, u_char bus, u_char devfn) mpc85xx_exclude_device() argument
/linux-4.1.27/arch/powerpc/platforms/powernv/
H A Dpci.c411 (pdn->busno << 8) | (pdn->devfn), pe_no, fstate); pnv_pci_config_check_eeh()
432 u32 bdfn = (pdn->busno << 8) | pdn->devfn; pnv_pci_cfg_read()
459 cfg_dbg("%s: bus: %x devfn: %x +%x/%x -> %08x\n", pnv_pci_cfg_read()
460 __func__, pdn->busno, pdn->devfn, where, size, *val); pnv_pci_cfg_read()
468 u32 bdfn = (pdn->busno << 8) | pdn->devfn; pnv_pci_cfg_write()
470 cfg_dbg("%s: bus: %x devfn: %x +%x/%x -> %08x\n", pnv_pci_cfg_write()
471 pdn->busno, pdn->devfn, where, size, val); pnv_pci_cfg_write()
520 unsigned int devfn, pnv_pci_read_config()
528 pdn = pci_get_pdn_by_devfn(bus, devfn); pnv_pci_read_config()
549 unsigned int devfn, pnv_pci_write_config()
556 pdn = pci_get_pdn_by_devfn(bus, devfn); pnv_pci_write_config()
680 (pdev->devfn & 0xff))) { pnv_pci_dma_dev_setup()
519 pnv_pci_read_config(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val) pnv_pci_read_config() argument
548 pnv_pci_write_config(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val) pnv_pci_write_config() argument
/linux-4.1.27/drivers/media/pci/mantis/
H A Dmantis_pci.c60 PCI_SLOT(mantis->pdev->devfn), mantis_pci_init()
61 PCI_FUNC(mantis->pdev->devfn)); mantis_pci_init()
H A Dmantis_core.c121 mantis->pdev->bus->number, PCI_SLOT(mantis->pdev->devfn), PCI_FUNC(mantis->pdev->devfn)); mantis_core_init()
/linux-4.1.27/drivers/infiniband/hw/nes/
H A Dnes.c174 NES_IDX_DST_IP_ADDR+(0x10*PCI_FUNC(nesdev->pcidev->devfn)), 0); nes_inetaddr_event()
201 NES_IDX_DST_IP_ADDR+(0x10*PCI_FUNC(nesdev->pcidev->devfn)), nes_inetaddr_event()
553 nesdev->index_reg = 0x50 + (PCI_FUNC(pcidev->devfn)*8) + mmio_regs; nes_probe()
586 nesdev->nesadapter->pd_config_base[PCI_FUNC(nesdev->pcidev->devfn)]; */ nes_probe()
590 switch (PCI_FUNC(nesdev->pcidev->devfn) % nes_probe()
606 nesdev->mac_index = PCI_FUNC(nesdev->pcidev->devfn) % nes_probe()
632 PCI_FUNC(nesdev->pcidev->devfn)); nes_probe()
636 nesdev->int_req = (0x101 << PCI_FUNC(nesdev->pcidev->devfn)) | nes_probe()
637 (1 << (PCI_FUNC(nesdev->pcidev->devfn)+16)); nes_probe()
638 if (PCI_FUNC(nesdev->pcidev->devfn) < 4) { nes_probe()
643 if (PCI_FUNC(nesdev->pcidev->devfn) == 0) { nes_probe()
650 nesdev->intf_int_req |= (1 << (PCI_FUNC(nesdev->pcidev->devfn)+16)); nes_probe()
659 nesdev->timer_int_req = 0x101 << PCI_FUNC(nesdev->pcidev->devfn); nes_probe()
662 PCI_FUNC(nesdev->pcidev->devfn), nes_probe()
847 unsigned int devfn = 0xffffffff; nes_show_adapter() local
854 devfn = nesdev->pcidev->devfn; nes_show_adapter()
861 return snprintf(buf, PAGE_SIZE, "%x:%x\n", bus_number, devfn); nes_show_adapter()
/linux-4.1.27/arch/tile/kernel/
H A Dpci.c350 (PCI_SLOT(dev->devfn) == 0)) { pcibios_init()
457 * devfn is the combined PCI slot & function.
463 static int tile_cfg_read(struct pci_bus *bus, unsigned int devfn, int offset, tile_cfg_read() argument
468 int slot = (devfn >> 3) & 0x1f; tile_cfg_read()
469 int function = devfn & 0x7; tile_cfg_read()
506 static int tile_cfg_write(struct pci_bus *bus, unsigned int devfn, int offset, tile_cfg_write() argument
511 int slot = (devfn >> 3) & 0x1f; tile_cfg_write()
512 int function = devfn & 0x7; tile_cfg_write()
/linux-4.1.27/include/xen/interface/io/
H A Dpciif.h79 uint32_t devfn; member in struct:xen_pci_op
103 uint32_t devfn; member in struct:xen_pcie_aer_op
/linux-4.1.27/arch/arm/mach-iop33x/
H A Diq80331.c75 PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn)); iq80331_pci_map_irq()
H A Diq80332.c75 PCI_SLOT(dev->devfn), PCI_FUNC(dev->devfn)); iq80332_pci_map_irq()
/linux-4.1.27/drivers/isdn/hardware/eicon/
H A Ddivasmain.c211 return ((byte) pdev->devfn); diva_os_get_pci_func()
699 pdev->bus->number, pdev->devfn)) divas_init_one()
702 pdev->bus->number, pdev->devfn); divas_init_one()
709 pdev->devfn)) divas_init_one()
715 pdev->devfn); divas_init_one()
724 DRIVERLNAME, pdev->bus->number, pdev->devfn)) divas_init_one()
727 DRIVERLNAME, pdev->bus->number, pdev->devfn); divas_init_one()
736 pdev->devfn)) divas_init_one()
742 pdev->devfn); divas_init_one()
756 pdev->bus->number, pdev->devfn)) divas_remove_one()
758 DRIVERLNAME, pdev->bus->number, pdev->devfn); divas_remove_one()
/linux-4.1.27/arch/arm/mach-integrator/
H A Dpci_v3.c364 unsigned int devfn, int offset) v3_open_config_window()
375 BUG_ON(devfn > 255); v3_open_config_window()
378 int slot = PCI_SLOT(devfn); v3_open_config_window()
390 address = PCI_FUNC(devfn) << 8; v3_open_config_window()
409 * 15:11 = slot number (7:3 of devfn) v3_open_config_window()
410 * 10:8 = func number (2:0 of devfn) v3_open_config_window()
417 address = (busnr << 16) | (devfn << 8); v3_open_config_window()
456 static int v3_read_config(struct pci_bus *bus, unsigned int devfn, int where, v3_read_config() argument
459 int ret = pci_generic_config_read(bus, devfn, where, size, val); v3_read_config()
464 static int v3_write_config(struct pci_bus *bus, unsigned int devfn, int where, v3_write_config() argument
467 int ret = pci_generic_config_write(bus, devfn, where, size, val); v3_write_config()
363 v3_open_config_window(struct pci_bus *bus, unsigned int devfn, int offset) v3_open_config_window() argument
/linux-4.1.27/arch/mips/ath79/
H A Dmach-ubnt-xm.c87 switch (PCI_SLOT(dev->devfn)) { ubnt_xm_pci_plat_dev_init()
H A Dmach-db120.c98 switch (PCI_SLOT(dev->devfn)) { db120_pci_plat_dev_init()
/linux-4.1.27/drivers/iommu/
H A Dintel-iommu.c351 u8 devfn; /* PCI devfn number */ member in struct:device_domain_info
678 u8 bus, u8 devfn, int alloc) iommu_context_addr()
686 if (devfn >= 0x80) { iommu_context_addr()
687 devfn -= 0x80; iommu_context_addr()
690 devfn *= 2; iommu_context_addr()
708 return &context[devfn]; iommu_context_addr()
716 static struct intel_iommu *device_to_iommu(struct device *dev, u8 *bus, u8 *devfn) device_to_iommu() argument
743 *devfn = drhd->devices[i].devfn; for_each_active_iommu()
760 *devfn = pdev->devfn; for_each_active_iommu()
778 static int device_context_mapped(struct intel_iommu *iommu, u8 bus, u8 devfn) device_context_mapped() argument
785 context = iommu_context_addr(iommu, bus, devfn, 0); device_context_mapped()
792 static void clear_context_table(struct intel_iommu *iommu, u8 bus, u8 devfn) clear_context_table() argument
798 context = iommu_context_addr(iommu, bus, devfn, 0); clear_context_table()
1282 u8 bus, u8 devfn) iommu_support_dev_iotlb()
1298 info->devfn == devfn) { iommu_support_dev_iotlb()
1352 sid = info->bus << 8 | info->devfn; iommu_flush_dev_iotlb()
1794 u8 bus, u8 devfn, int translation) domain_context_mapping_one()
1804 bus, PCI_SLOT(devfn), PCI_FUNC(devfn)); domain_context_mapping_one()
1811 context = iommu_context_addr(iommu, bus, devfn, 1); domain_context_mapping_one()
1852 info = iommu_support_dev_iotlb(domain, iommu, bus, devfn); domain_context_mapping_one()
1880 (((u16)bus) << 8) | devfn, domain_context_mapping_one()
1916 u8 bus, devfn; domain_context_mapping() local
1919 iommu = device_to_iommu(dev, &bus, &devfn); domain_context_mapping()
1924 return domain_context_mapping_one(domain, iommu, bus, devfn, domain_context_mapping()
1946 u8 bus, devfn; domain_context_mapped() local
1948 iommu = device_to_iommu(dev, &bus, &devfn); domain_context_mapped()
1953 return device_context_mapped(iommu, bus, devfn); domain_context_mapped()
2119 static void iommu_detach_dev(struct intel_iommu *iommu, u8 bus, u8 devfn) iommu_detach_dev() argument
2124 clear_context_table(iommu, bus, devfn); iommu_detach_dev()
2150 iommu_detach_dev(info->iommu, info->bus, info->devfn); domain_remove_dev_info()
2179 dmar_search_domain_by_dev_info(int segment, int bus, int devfn) dmar_search_domain_by_dev_info() argument
2185 info->devfn == devfn) dmar_search_domain_by_dev_info()
2192 int bus, int devfn, dmar_insert_dev_info()
2205 info->devfn = devfn; dmar_insert_dev_info()
2215 info2 = dmar_search_domain_by_dev_info(iommu->segment, bus, devfn); dmar_insert_dev_info()
2249 u8 bus, devfn; get_domain_for_dev() local
2255 iommu = device_to_iommu(dev, &bus, &devfn); get_domain_for_dev()
2309 tmp = dmar_insert_dev_info(iommu, bus, devfn, dev, domain); get_domain_for_dev()
2520 u8 bus, devfn; domain_add_dev_info() local
2523 iommu = device_to_iommu(dev, &bus, &devfn); domain_add_dev_info()
2527 ndomain = dmar_insert_dev_info(iommu, bus, devfn, dev, domain); domain_add_dev_info()
4298 u8 bus, devfn; domain_remove_one_dev_info() local
4300 iommu = device_to_iommu(dev, &bus, &devfn); domain_remove_one_dev_info()
4307 info->devfn == devfn) { domain_remove_one_dev_info()
4312 iommu_detach_dev(iommu, info->bus, info->devfn); domain_remove_one_dev_info()
4408 u8 bus, devfn; intel_iommu_attach_device() local
4432 iommu = device_to_iommu(dev, &bus, &devfn); intel_iommu_attach_device()
4588 u8 bus, devfn; intel_iommu_add_device() local
4590 iommu = device_to_iommu(dev, &bus, &devfn); intel_iommu_add_device()
4608 u8 bus, devfn; intel_iommu_remove_device() local
4610 iommu = device_to_iommu(dev, &bus, &devfn); intel_iommu_remove_device()
677 iommu_context_addr(struct intel_iommu *iommu, u8 bus, u8 devfn, int alloc) iommu_context_addr() argument
1281 iommu_support_dev_iotlb(struct dmar_domain *domain, struct intel_iommu *iommu, u8 bus, u8 devfn) iommu_support_dev_iotlb() argument
1792 domain_context_mapping_one(struct dmar_domain *domain, struct intel_iommu *iommu, u8 bus, u8 devfn, int translation) domain_context_mapping_one() argument
2191 dmar_insert_dev_info(struct intel_iommu *iommu, int bus, int devfn, struct device *dev, struct dmar_domain *domain) dmar_insert_dev_info() argument
/linux-4.1.27/arch/parisc/kernel/
H A Ddrivers.c298 unsigned int devfn = to_pci_dev(dev)->devfn; get_node_path() local
299 path->mod = PCI_FUNC(devfn); get_node_path()
300 path->bc[i--] = PCI_SLOT(devfn); get_node_path()
306 unsigned int devfn = to_pci_dev(dev)->devfn; get_node_path() local
307 path->bc[i--] = PCI_SLOT(devfn) | (PCI_FUNC(devfn)<< 5); get_node_path()
646 unsigned int devfn = pdev->devfn; match_pci_device() local
647 return ((modpath->bc[5] == PCI_SLOT(devfn)) && match_pci_device()
648 (modpath->mod == PCI_FUNC(devfn))); match_pci_device()
651 id = PCI_SLOT(pdev->devfn) | (PCI_FUNC(pdev->devfn) << 5); match_pci_device()
/linux-4.1.27/drivers/gpu/drm/
H A Ddrm_pci.c137 PCI_SLOT(dev->pdev->devfn), drm_pci_set_busid()
138 PCI_FUNC(dev->pdev->devfn)); drm_pci_set_busid()
181 (slot != PCI_SLOT(dev->pdev->devfn)) || drm_pci_set_unique()
182 (func != PCI_FUNC(dev->pdev->devfn))) { drm_pci_set_unique()
195 p->devnum != PCI_SLOT(dev->pdev->devfn) || p->funcnum != PCI_FUNC(dev->pdev->devfn)) drm_pci_irq_by_busid()
/linux-4.1.27/drivers/isdn/hysdn/
H A Dhysdn_init.c76 card->devfn = akt_pcidev->devfn; /* slot + function */ hysdn_pci_init_one()
/linux-4.1.27/drivers/staging/rts5208/
H A Drtsx.h51 #define pci_get_bus_and_slot(bus, devfn) \
52 pci_get_domain_bus_and_slot(0, (bus), (devfn))
/linux-4.1.27/drivers/bcma/
H A Ddriver_pci_host.c231 unsigned int devfn, bcma_core_pci_hostmode_read_config()
243 err = bcma_extpci_read_config(pc, PCI_SLOT(devfn), bcma_core_pci_hostmode_read_config()
244 PCI_FUNC(devfn), reg, val, size); bcma_core_pci_hostmode_read_config()
251 unsigned int devfn, bcma_core_pci_hostmode_write_config()
263 err = bcma_extpci_write_config(pc, PCI_SLOT(devfn), bcma_core_pci_hostmode_write_config()
264 PCI_FUNC(devfn), reg, &val, size); bcma_core_pci_hostmode_write_config()
536 if (PCI_SLOT(dev->devfn) != 0) bcma_core_pci_fixup_pcibridge()
563 if (PCI_SLOT(dev->devfn) == 0) bcma_core_pci_fixup_addresses()
230 bcma_core_pci_hostmode_read_config(struct pci_bus *bus, unsigned int devfn, int reg, int size, u32 *val) bcma_core_pci_hostmode_read_config() argument
250 bcma_core_pci_hostmode_write_config(struct pci_bus *bus, unsigned int devfn, int reg, int size, u32 val) bcma_core_pci_hostmode_write_config() argument
/linux-4.1.27/arch/microblaze/include/asm/
H A Dpci.h109 struct pci_bus *bus, int devfn);
118 unsigned int devfn, int cap);
/linux-4.1.27/arch/powerpc/platforms/embedded6xx/
H A Dmpc7448_hpc2.c57 u_char bus, u_char devfn) mpc7448_hpc2_exclude_device()
59 if (bus == 0 && PCI_SLOT(devfn) == 0) mpc7448_hpc2_exclude_device()
56 mpc7448_hpc2_exclude_device(struct pci_controller *hose, u_char bus, u_char devfn) mpc7448_hpc2_exclude_device() argument
/linux-4.1.27/arch/mips/txx9/generic/
H A Dpci.c30 int top_bus, int bus, int devfn, int offset, u16 *value) early_read_config_word()
37 fake_dev.devfn = devfn; early_read_config_word()
277 irq = pcibios_map_irq(dev, PCI_SLOT(dev->devfn), 1); /* INTA */ quirk_slc90e66_bridge()
29 early_read_config_word(struct pci_controller *hose, int top_bus, int bus, int devfn, int offset, u16 *value) early_read_config_word() argument
/linux-4.1.27/arch/ia64/include/asm/sn/
H A Dpcidev.h57 u64 pdi_slot_host_handle; /* Bus and devfn Host pci_dev */

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