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/linux-4.1.27/drivers/net/wireless/b43/
H A D	wa.c	33 static void b43_wa_papd(struct b43_wldev dev) b43_wa_papd() argument 37 backup = b43_ofdmtab_read16(dev, B43_OFDMTAB_PWRDYN2, 0); b43_wa_papd() 38 b43_ofdmtab_write16(dev, B43_OFDMTAB_PWRDYN2, 0, 7); b43_wa_papd() 39 b43_ofdmtab_write16(dev, B43_OFDMTAB_UNKNOWN_APHY, 0, 0); b43_wa_papd() 40 b43_dummy_transmission(dev, true, true); b43_wa_papd() 41 b43_ofdmtab_write16(dev, B43_OFDMTAB_PWRDYN2, 0, backup); b43_wa_papd() 44 static void b43_wa_auxclipthr(struct b43_wldev dev) b43_wa_auxclipthr() argument 46 b43_phy_write(dev, B43_PHY_OFDM(0x8E), 0x3800); b43_wa_auxclipthr() 49 static void b43_wa_afcdac(struct b43_wldev dev) b43_wa_afcdac() argument 51 b43_phy_write(dev, 0x0035, 0x03FF); b43_wa_afcdac() 52 b43_phy_write(dev, 0x0036, 0x0400); b43_wa_afcdac() 55 static void b43_wa_txdc_offset(struct b43_wldev dev) b43_wa_txdc_offset() argument 57 b43_ofdmtab_write16(dev, B43_OFDMTAB_DC, 0, 0x0051); b43_wa_txdc_offset() 60 void b43_wa_initgains(struct b43_wldev dev) b43_wa_initgains() argument 62 struct b43_phy phy = &dev->phy; b43_wa_initgains() 64 b43_phy_write(dev, B43_PHY_LNAHPFCTL, 0x1FF9); b43_wa_initgains() 65 b43_phy_mask(dev, B43_PHY_LPFGAINCTL, 0xFF0F); b43_wa_initgains() 67 b43_ofdmtab_write16(dev, B43_OFDMTAB_LPFGAIN, 0, 0x1FBF); b43_wa_initgains() 68 b43_radio_write16(dev, 0x0002, 0x1FBF); b43_wa_initgains() 70 b43_phy_write(dev, 0x0024, 0x4680); b43_wa_initgains() 71 b43_phy_write(dev, 0x0020, 0x0003); b43_wa_initgains() 72 b43_phy_write(dev, 0x001D, 0x0F40); b43_wa_initgains() 73 b43_phy_write(dev, 0x001F, 0x1C00); b43_wa_initgains() 75 b43_phy_maskset(dev, 0x002A, 0x00FF, 0x0400); b43_wa_initgains() 77 b43_phy_maskset(dev, 0x002A, 0x00FF, 0x1A00); b43_wa_initgains() 78 b43_phy_write(dev, 0x00CC, 0x2121); b43_wa_initgains() 81 b43_phy_write(dev, 0x00BA, 0x3ED5); b43_wa_initgains() 84 static void b43_wa_divider(struct b43_wldev dev) b43_wa_divider() argument 86 b43_phy_mask(dev, 0x002B, ~0x0100); b43_wa_divider() 87 b43_phy_write(dev, 0x008E, 0x58C1); b43_wa_divider() 90 static void b43_wa_gt(struct b43_wldev dev) /* Gain table. / b43_wa_gt() argument 92 if (dev->phy.rev <= 2) { b43_wa_gt() 93 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAIN2, 0, 15); b43_wa_gt() 94 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAIN2, 1, 31); b43_wa_gt() 95 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAIN2, 2, 42); b43_wa_gt() 96 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAIN2, 3, 48); b43_wa_gt() 97 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAIN2, 4, 58); b43_wa_gt() 98 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAIN0, 0, 19); b43_wa_gt() 99 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAIN0, 1, 19); b43_wa_gt() 100 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAIN0, 2, 19); b43_wa_gt() 101 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAIN0, 3, 19); b43_wa_gt() 102 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAIN0, 4, 21); b43_wa_gt() 103 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAIN0, 5, 21); b43_wa_gt() 104 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAIN0, 6, 25); b43_wa_gt() 105 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAIN1, 0, 3); b43_wa_gt() 106 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAIN1, 1, 3); b43_wa_gt() 107 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAIN1, 2, 7); b43_wa_gt() 109 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAIN0, 0, 19); b43_wa_gt() 110 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAIN0, 1, 19); b43_wa_gt() 111 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAIN0, 2, 19); b43_wa_gt() 112 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAIN0, 3, 19); b43_wa_gt() 113 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAIN0, 4, 21); b43_wa_gt() 114 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAIN0, 5, 21); b43_wa_gt() 115 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAIN0, 6, 25); b43_wa_gt() 119 static void b43_wa_rssi_lt(struct b43_wldev dev) /* RSSI lookup table / b43_wa_rssi_lt() argument 125 b43_ofdmtab_write16(dev, B43_OFDMTAB_RSSI, i, i + 8); b43_wa_rssi_lt() 127 b43_ofdmtab_write16(dev, B43_OFDMTAB_RSSI, i, i - 8); b43_wa_rssi_lt() 130 b43_ofdmtab_write16(dev, B43_OFDMTAB_RSSI, i, i); b43_wa_rssi_lt() 134 static void b43_wa_analog(struct b43_wldev dev) b43_wa_analog() argument 136 struct b43_phy phy = &dev->phy; b43_wa_analog() 139 ofdmrev = b43_phy_read(dev, B43_PHY_VERSION_OFDM) & B43_PHYVER_VERSION; b43_wa_analog() 142 b43_phy_write(dev, B43_PHY_PWRDOWN, 0x1808); b43_wa_analog() 144 b43_phy_write(dev, B43_PHY_PWRDOWN, 0x1000); b43_wa_analog() 146 b43_ofdmtab_write16(dev, B43_OFDMTAB_DAC, 3, 0x1044); b43_wa_analog() 147 b43_ofdmtab_write16(dev, B43_OFDMTAB_DAC, 4, 0x7201); b43_wa_analog() 148 b43_ofdmtab_write16(dev, B43_OFDMTAB_DAC, 6, 0x0040); b43_wa_analog() 152 static void b43_wa_dac(struct b43_wldev dev) b43_wa_dac() argument 154 if (dev->phy.analog == 1) b43_wa_dac() 155 b43_ofdmtab_write16(dev, B43_OFDMTAB_DAC, 1, b43_wa_dac() 156 (b43_ofdmtab_read16(dev, B43_OFDMTAB_DAC, 1) & ~0x0034) \| 0x0008); b43_wa_dac() 158 b43_ofdmtab_write16(dev, B43_OFDMTAB_DAC, 1, b43_wa_dac() 159 (b43_ofdmtab_read16(dev, B43_OFDMTAB_DAC, 1) & ~0x0078) \| 0x0010); b43_wa_dac() 162 static void b43_wa_fft(struct b43_wldev dev) / Fine frequency table / b43_wa_fft() argument 166 if (dev->phy.type == B43_PHYTYPE_A) b43_wa_fft() 168 b43_ofdmtab_write16(dev, B43_OFDMTAB_DACRFPABB, i, b43_tab_finefreqa[i]); b43_wa_fft() 171 b43_ofdmtab_write16(dev, B43_OFDMTAB_DACRFPABB, i, b43_tab_finefreqg[i]); b43_wa_fft() 174 static void b43_wa_nft(struct b43_wldev dev) /* Noise figure table / b43_wa_nft() argument 176 struct b43_phy phy = &dev->phy; b43_wa_nft() 182 b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC2, i, b43_tab_noisea2[i]); b43_wa_nft() 185 b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC2, i, b43_tab_noisea3[i]); b43_wa_nft() 189 b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC2, i, b43_tab_noiseg1[i]); b43_wa_nft() 192 b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC2, i, b43_tab_noiseg2[i]); b43_wa_nft() 196 static void b43_wa_rt(struct b43_wldev dev) / Rotor table / b43_wa_rt() argument 201 b43_ofdmtab_write32(dev, B43_OFDMTAB_ROTOR, i, b43_tab_rotor[i]); b43_wa_rt() 204 static void b43_write_null_nst(struct b43_wldev dev) b43_write_null_nst() argument 209 b43_ofdmtab_write16(dev, B43_OFDMTAB_NOISESCALE, i, 0); b43_write_null_nst() 212 static void b43_write_nst(struct b43_wldev dev, const u16 nst) b43_write_nst() argument 217 b43_ofdmtab_write16(dev, B43_OFDMTAB_NOISESCALE, i, nst[i]); b43_write_nst() 220 static void b43_wa_nst(struct b43_wldev dev) / Noise scale table / b43_wa_nst() argument 222 struct b43_phy phy = &dev->phy; b43_wa_nst() 226 b43_write_null_nst(dev); b43_wa_nst() 228 b43_write_nst(dev, b43_tab_noisescalea2); b43_wa_nst() 230 b43_write_nst(dev, b43_tab_noisescalea3); b43_wa_nst() 232 b43_write_nst(dev, b43_tab_noisescaleg3); b43_wa_nst() 235 if (b43_phy_read(dev, B43_PHY_ENCORE) & B43_PHY_ENCORE_EN) b43_wa_nst() 236 b43_write_nst(dev, b43_tab_noisescaleg3); b43_wa_nst() 238 b43_write_nst(dev, b43_tab_noisescaleg2); b43_wa_nst() 240 b43_write_nst(dev, b43_tab_noisescaleg1); b43_wa_nst() 245 static void b43_wa_art(struct b43_wldev dev) / ADV retard table / b43_wa_art() argument 250 b43_ofdmtab_write32(dev, B43_OFDMTAB_ADVRETARD, b43_wa_art() 254 static void b43_wa_txlna_gain(struct b43_wldev dev) b43_wa_txlna_gain() argument 256 b43_ofdmtab_write16(dev, B43_OFDMTAB_DC, 13, 0x0000); b43_wa_txlna_gain() 259 static void b43_wa_crs_reset(struct b43_wldev dev) b43_wa_crs_reset() argument 261 b43_phy_write(dev, 0x002C, 0x0064); b43_wa_crs_reset() 264 static void b43_wa_2060txlna_gain(struct b43_wldev dev) b43_wa_2060txlna_gain() argument 266 b43_hf_write(dev, b43_hf_read(dev) \| b43_wa_2060txlna_gain() 270 static void b43_wa_lms(struct b43_wldev dev) b43_wa_lms() argument 272 b43_phy_maskset(dev, 0x0055, 0xFFC0, 0x0004); b43_wa_lms() 275 static void b43_wa_mixedsignal(struct b43_wldev dev) b43_wa_mixedsignal() argument 277 b43_ofdmtab_write16(dev, B43_OFDMTAB_DAC, 1, 3); b43_wa_mixedsignal() 280 static void b43_wa_msst(struct b43_wldev dev) / Min sigma square table / b43_wa_msst() argument 282 struct b43_phy phy = &dev->phy; b43_wa_msst() 296 b43_ofdmtab_write16(dev, B43_OFDMTAB_MINSIGSQ, b43_wa_msst() 301 static void b43_wa_iqadc(struct b43_wldev dev) b43_wa_iqadc() argument 303 if (dev->phy.analog == 4) b43_wa_iqadc() 304 b43_ofdmtab_write16(dev, B43_OFDMTAB_DAC, 0, b43_wa_iqadc() 305 b43_ofdmtab_read16(dev, B43_OFDMTAB_DAC, 0) & ~0xF000); b43_wa_iqadc() 308 static void b43_wa_crs_ed(struct b43_wldev dev) b43_wa_crs_ed() argument 310 struct b43_phy phy = &dev->phy; b43_wa_crs_ed() 313 b43_phy_write(dev, B43_PHY_CRSTHRES1_R1, 0x4F19); b43_wa_crs_ed() 315 b43_phy_write(dev, B43_PHY_CRSTHRES1, 0x1861); b43_wa_crs_ed() 316 b43_phy_write(dev, B43_PHY_CRSTHRES2, 0x0271); b43_wa_crs_ed() 317 b43_phy_set(dev, B43_PHY_ANTDWELL, 0x0800); b43_wa_crs_ed() 319 b43_phy_write(dev, B43_PHY_CRSTHRES1, 0x0098); b43_wa_crs_ed() 320 b43_phy_write(dev, B43_PHY_CRSTHRES2, 0x0070); b43_wa_crs_ed() 321 b43_phy_write(dev, B43_PHY_OFDM(0xC9), 0x0080); b43_wa_crs_ed() 322 b43_phy_set(dev, B43_PHY_ANTDWELL, 0x0800); b43_wa_crs_ed() 326 static void b43_wa_crs_thr(struct b43_wldev dev) b43_wa_crs_thr() argument 328 b43_phy_maskset(dev, B43_PHY_CRS0, ~0x03C0, 0xD000); b43_wa_crs_thr() 331 static void b43_wa_crs_blank(struct b43_wldev dev) b43_wa_crs_blank() argument 333 b43_phy_write(dev, B43_PHY_OFDM(0x2C), 0x005A); b43_wa_crs_blank() 336 static void b43_wa_cck_shiftbits(struct b43_wldev dev) b43_wa_cck_shiftbits() argument 338 b43_phy_write(dev, B43_PHY_CCKSHIFTBITS, 0x0026); b43_wa_cck_shiftbits() 341 static void b43_wa_wrssi_offset(struct b43_wldev dev) b43_wa_wrssi_offset() argument 345 if (dev->phy.rev == 1) { b43_wa_wrssi_offset() 347 b43_ofdmtab_write16(dev, B43_OFDMTAB_WRSSI_R1, b43_wa_wrssi_offset() 352 b43_ofdmtab_write16(dev, B43_OFDMTAB_WRSSI, b43_wa_wrssi_offset() 358 static void b43_wa_txpuoff_rxpuon(struct b43_wldev dev) b43_wa_txpuoff_rxpuon() argument 360 b43_ofdmtab_write16(dev, B43_OFDMTAB_UNKNOWN_0F, 2, 15); b43_wa_txpuoff_rxpuon() 361 b43_ofdmtab_write16(dev, B43_OFDMTAB_UNKNOWN_0F, 3, 20); b43_wa_txpuoff_rxpuon() 364 static void b43_wa_altagc(struct b43_wldev dev) b43_wa_altagc() argument 366 struct b43_phy phy = &dev->phy; b43_wa_altagc() 369 b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC1_R1, 0, 254); b43_wa_altagc() 370 b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC1_R1, 1, 13); b43_wa_altagc() 371 b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC1_R1, 2, 19); b43_wa_altagc() 372 b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC1_R1, 3, 25); b43_wa_altagc() 373 b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC2, 0, 0x2710); b43_wa_altagc() 374 b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC2, 1, 0x9B83); b43_wa_altagc() 375 b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC2, 2, 0x9B83); b43_wa_altagc() 376 b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC2, 3, 0x0F8D); b43_wa_altagc() 377 b43_phy_write(dev, B43_PHY_LMS, 4); b43_wa_altagc() 379 b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC1, 0, 254); b43_wa_altagc() 380 b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC1, 1, 13); b43_wa_altagc() 381 b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC1, 2, 19); b43_wa_altagc() 382 b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC1, 3, 25); b43_wa_altagc() 385 b43_phy_maskset(dev, B43_PHY_CCKSHIFTBITS_WA, 0x00FF, 0x5700); b43_wa_altagc() 386 b43_phy_maskset(dev, B43_PHY_OFDM(0x1A), ~0x007F, 0x000F); b43_wa_altagc() 387 b43_phy_maskset(dev, B43_PHY_OFDM(0x1A), ~0x3F80, 0x2B80); b43_wa_altagc() 388 b43_phy_maskset(dev, B43_PHY_ANTWRSETT, 0xF0FF, 0x0300); b43_wa_altagc() 389 b43_radio_set(dev, 0x7A, 0x0008); b43_wa_altagc() 390 b43_phy_maskset(dev, B43_PHY_N1P1GAIN, ~0x000F, 0x0008); b43_wa_altagc() 391 b43_phy_maskset(dev, B43_PHY_P1P2GAIN, ~0x0F00, 0x0600); b43_wa_altagc() 392 b43_phy_maskset(dev, B43_PHY_N1N2GAIN, ~0x0F00, 0x0700); b43_wa_altagc() 393 b43_phy_maskset(dev, B43_PHY_N1P1GAIN, ~0x0F00, 0x0100); b43_wa_altagc() 395 b43_phy_maskset(dev, B43_PHY_N1N2GAIN, ~0x000F, 0x0007); b43_wa_altagc() 397 b43_phy_maskset(dev, B43_PHY_OFDM(0x88), ~0x00FF, 0x001C); b43_wa_altagc() 398 b43_phy_maskset(dev, B43_PHY_OFDM(0x88), ~0x3F00, 0x0200); b43_wa_altagc() 399 b43_phy_maskset(dev, B43_PHY_OFDM(0x96), ~0x00FF, 0x001C); b43_wa_altagc() 400 b43_phy_maskset(dev, B43_PHY_OFDM(0x89), ~0x00FF, 0x0020); b43_wa_altagc() 401 b43_phy_maskset(dev, B43_PHY_OFDM(0x89), ~0x3F00, 0x0200); b43_wa_altagc() 402 b43_phy_maskset(dev, B43_PHY_OFDM(0x82), ~0x00FF, 0x002E); b43_wa_altagc() 403 b43_phy_maskset(dev, B43_PHY_OFDM(0x96), 0x00FF, 0x1A00); b43_wa_altagc() 404 b43_phy_maskset(dev, B43_PHY_OFDM(0x81), ~0x00FF, 0x0028); b43_wa_altagc() 405 b43_phy_maskset(dev, B43_PHY_OFDM(0x81), 0x00FF, 0x2C00); b43_wa_altagc() 407 b43_phy_write(dev, B43_PHY_PEAK_COUNT, 0x092B); b43_wa_altagc() 408 b43_phy_maskset(dev, B43_PHY_OFDM(0x1B), ~0x001E, 0x0002); b43_wa_altagc() 410 b43_phy_mask(dev, B43_PHY_OFDM(0x1B), ~0x001E); b43_wa_altagc() 411 b43_phy_write(dev, B43_PHY_OFDM(0x1F), 0x287A); b43_wa_altagc() 412 b43_phy_maskset(dev, B43_PHY_LPFGAINCTL, ~0x000F, 0x0004); b43_wa_altagc() 414 b43_phy_write(dev, B43_PHY_OFDM(0x22), 0x287A); b43_wa_altagc() 415 b43_phy_maskset(dev, B43_PHY_LPFGAINCTL, 0x0FFF, 0x3000); b43_wa_altagc() 418 b43_phy_maskset(dev, B43_PHY_DIVSRCHIDX, 0x8080, 0x7874); b43_wa_altagc() 419 b43_phy_write(dev, B43_PHY_OFDM(0x8E), 0x1C00); b43_wa_altagc() 421 b43_phy_maskset(dev, B43_PHY_DIVP1P2GAIN, ~0x0F00, 0x0600); b43_wa_altagc() 422 b43_phy_write(dev, B43_PHY_OFDM(0x8B), 0x005E); b43_wa_altagc() 423 b43_phy_maskset(dev, B43_PHY_ANTWRSETT, ~0x00FF, 0x001E); b43_wa_altagc() 424 b43_phy_write(dev, B43_PHY_OFDM(0x8D), 0x0002); b43_wa_altagc() 425 b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC3_R1, 0, 0); b43_wa_altagc() 426 b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC3_R1, 1, 7); b43_wa_altagc() 427 b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC3_R1, 2, 16); b43_wa_altagc() 428 b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC3_R1, 3, 28); b43_wa_altagc() 430 b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC3, 0, 0); b43_wa_altagc() 431 b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC3, 1, 7); b43_wa_altagc() 432 b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC3, 2, 16); b43_wa_altagc() 433 b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC3, 3, 28); b43_wa_altagc() 436 b43_phy_mask(dev, B43_PHY_OFDM(0x26), ~0x0003); b43_wa_altagc() 437 b43_phy_mask(dev, B43_PHY_OFDM(0x26), ~0x1000); b43_wa_altagc() 439 b43_phy_read(dev, B43_PHY_VERSION_OFDM); /* Dummy read / b43_wa_altagc() 442 static void b43_wa_tr_ltov(struct b43_wldev dev) /* TR Lookup Table Original Values / b43_wa_tr_ltov() argument 444 b43_gtab_write(dev, B43_GTAB_ORIGTR, 0, 0x7654); b43_wa_tr_ltov() 447 static void b43_wa_cpll_nonpilot(struct b43_wldev dev) b43_wa_cpll_nonpilot() argument 449 b43_ofdmtab_write16(dev, B43_OFDMTAB_UNKNOWN_11, 0, 0); b43_wa_cpll_nonpilot() 450 b43_ofdmtab_write16(dev, B43_OFDMTAB_UNKNOWN_11, 1, 0); b43_wa_cpll_nonpilot() 453 static void b43_wa_rssi_adc(struct b43_wldev dev) b43_wa_rssi_adc() argument 455 if (dev->phy.analog == 4) b43_wa_rssi_adc() 456 b43_phy_write(dev, 0x00DC, 0x7454); b43_wa_rssi_adc() 459 static void b43_wa_boards_a(struct b43_wldev dev) b43_wa_boards_a() argument 461 if (dev->dev->board_vendor == SSB_BOARDVENDOR_BCM && b43_wa_boards_a() 462 dev->dev->board_type == SSB_BOARD_BU4306 && b43_wa_boards_a() 463 dev->dev->board_rev < 0x30) { b43_wa_boards_a() 464 b43_phy_write(dev, 0x0010, 0xE000); b43_wa_boards_a() 465 b43_phy_write(dev, 0x0013, 0x0140); b43_wa_boards_a() 466 b43_phy_write(dev, 0x0014, 0x0280); b43_wa_boards_a() 468 if (dev->dev->board_type == SSB_BOARD_MP4318 && b43_wa_boards_a() 469 dev->dev->board_rev < 0x20) { b43_wa_boards_a() 470 b43_phy_write(dev, 0x0013, 0x0210); b43_wa_boards_a() 471 b43_phy_write(dev, 0x0014, 0x0840); b43_wa_boards_a() 473 b43_phy_write(dev, 0x0013, 0x0140); b43_wa_boards_a() 474 b43_phy_write(dev, 0x0014, 0x0280); b43_wa_boards_a() 476 if (dev->phy.rev <= 4) b43_wa_boards_a() 477 b43_phy_write(dev, 0x0010, 0xE000); b43_wa_boards_a() 479 b43_phy_write(dev, 0x0010, 0x2000); b43_wa_boards_a() 480 b43_ofdmtab_write16(dev, B43_OFDMTAB_DC, 1, 0x0039); b43_wa_boards_a() 481 b43_ofdmtab_write16(dev, B43_OFDMTAB_UNKNOWN_APHY, 7, 0x0040); b43_wa_boards_a() 485 static void b43_wa_boards_g(struct b43_wldev dev) b43_wa_boards_g() argument 487 struct ssb_sprom sprom = dev->dev->bus_sprom; b43_wa_boards_g() 488 struct b43_phy phy = &dev->phy; b43_wa_boards_g() 490 if (dev->dev->board_vendor != SSB_BOARDVENDOR_BCM \|\| b43_wa_boards_g() 491 dev->dev->board_type != SSB_BOARD_BU4306 \|\| b43_wa_boards_g() 492 dev->dev->board_rev != 0x17) { b43_wa_boards_g() 494 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAINX_R1, 1, 0x0002); b43_wa_boards_g() 495 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAINX_R1, 2, 0x0001); b43_wa_boards_g() 497 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAINX, 1, 0x0002); b43_wa_boards_g() 498 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAINX, 2, 0x0001); b43_wa_boards_g() 501 b43_phy_mask(dev, B43_PHY_EXTG(0x11), 0xF7FF); b43_wa_boards_g() 502 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAINX, 0x0020, 0x0001); b43_wa_boards_g() 503 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAINX, 0x0021, 0x0001); b43_wa_boards_g() 504 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAINX, 0x0022, 0x0001); b43_wa_boards_g() 505 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAINX, 0x0023, 0x0000); b43_wa_boards_g() 506 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAINX, 0x0000, 0x0000); b43_wa_boards_g() 507 b43_ofdmtab_write16(dev, B43_OFDMTAB_GAINX, 0x0003, 0x0002); b43_wa_boards_g() 512 b43_phy_write(dev, B43_PHY_GTABCTL, 0x3120); b43_wa_boards_g() 513 b43_phy_write(dev, B43_PHY_GTABDATA, 0xC480); b43_wa_boards_g() 517 void b43_wa_all(struct b43_wldev dev) b43_wa_all() argument 519 struct b43_phy *phy = &dev->phy; b43_wa_all() 524 b43_wa_papd(dev); b43_wa_all() 525 b43_wa_auxclipthr(dev); b43_wa_all() 526 b43_wa_afcdac(dev); b43_wa_all() 527 b43_wa_txdc_offset(dev); b43_wa_all() 528 b43_wa_initgains(dev); b43_wa_all() 529 b43_wa_divider(dev); b43_wa_all() 530 b43_wa_gt(dev); b43_wa_all() 531 b43_wa_rssi_lt(dev); b43_wa_all() 532 b43_wa_analog(dev); b43_wa_all() 533 b43_wa_dac(dev); b43_wa_all() 534 b43_wa_fft(dev); b43_wa_all() 535 b43_wa_nft(dev); b43_wa_all() 536 b43_wa_rt(dev); b43_wa_all() 537 b43_wa_nst(dev); b43_wa_all() 538 b43_wa_art(dev); b43_wa_all() 539 b43_wa_txlna_gain(dev); b43_wa_all() 540 b43_wa_crs_reset(dev); b43_wa_all() 541 b43_wa_2060txlna_gain(dev); b43_wa_all() 542 b43_wa_lms(dev); b43_wa_all() 545 b43_wa_papd(dev); b43_wa_all() 546 b43_wa_mixedsignal(dev); b43_wa_all() 547 b43_wa_rssi_lt(dev); b43_wa_all() 548 b43_wa_txdc_offset(dev); b43_wa_all() 549 b43_wa_initgains(dev); b43_wa_all() 550 b43_wa_dac(dev); b43_wa_all() 551 b43_wa_nft(dev); b43_wa_all() 552 b43_wa_nst(dev); b43_wa_all() 553 b43_wa_msst(dev); b43_wa_all() 554 b43_wa_analog(dev); b43_wa_all() 555 b43_wa_gt(dev); b43_wa_all() 556 b43_wa_txpuoff_rxpuon(dev); b43_wa_all() 557 b43_wa_txlna_gain(dev); b43_wa_all() 560 b43_wa_iqadc(dev); b43_wa_all() 562 b43_wa_papd(dev); b43_wa_all() 563 b43_wa_rssi_lt(dev); b43_wa_all() 564 b43_wa_txdc_offset(dev); b43_wa_all() 565 b43_wa_initgains(dev); b43_wa_all() 566 b43_wa_dac(dev); b43_wa_all() 567 b43_wa_nft(dev); b43_wa_all() 568 b43_wa_nst(dev); b43_wa_all() 569 b43_wa_msst(dev); b43_wa_all() 570 b43_wa_analog(dev); b43_wa_all() 571 b43_wa_gt(dev); b43_wa_all() 572 b43_wa_txpuoff_rxpuon(dev); b43_wa_all() 573 b43_wa_txlna_gain(dev); b43_wa_all() 576 b43_wa_iqadc(dev); b43_wa_all() 577 b43_wa_papd(dev); b43_wa_all() 578 b43_wa_rssi_lt(dev); b43_wa_all() 579 b43_wa_txdc_offset(dev); b43_wa_all() 580 b43_wa_initgains(dev); b43_wa_all() 581 b43_wa_dac(dev); b43_wa_all() 582 b43_wa_nft(dev); b43_wa_all() 583 b43_wa_nst(dev); b43_wa_all() 584 b43_wa_msst(dev); b43_wa_all() 585 b43_wa_analog(dev); b43_wa_all() 586 b43_wa_gt(dev); b43_wa_all() 587 b43_wa_txpuoff_rxpuon(dev); b43_wa_all() 588 b43_wa_txlna_gain(dev); b43_wa_all() 589 b43_wa_rssi_adc(dev); b43_wa_all() 593 b43_wa_boards_a(dev); b43_wa_all() 597 b43_wa_crs_ed(dev); b43_wa_all() 598 b43_wa_crs_thr(dev); b43_wa_all() 599 b43_wa_crs_blank(dev); b43_wa_all() 600 b43_wa_cck_shiftbits(dev); b43_wa_all() 601 b43_wa_fft(dev); b43_wa_all() 602 b43_wa_nft(dev); b43_wa_all() 603 b43_wa_rt(dev); b43_wa_all() 604 b43_wa_nst(dev); b43_wa_all() 605 b43_wa_art(dev); b43_wa_all() 606 b43_wa_wrssi_offset(dev); b43_wa_all() 607 b43_wa_altagc(dev); b43_wa_all() 614 b43_wa_tr_ltov(dev); b43_wa_all() 615 b43_wa_crs_ed(dev); b43_wa_all() 616 b43_wa_rssi_lt(dev); b43_wa_all() 617 b43_wa_nft(dev); b43_wa_all() 618 b43_wa_nst(dev); b43_wa_all() 619 b43_wa_msst(dev); b43_wa_all() 620 b43_wa_wrssi_offset(dev); b43_wa_all() 621 b43_wa_altagc(dev); b43_wa_all() 622 b43_wa_analog(dev); b43_wa_all() 623 b43_wa_txpuoff_rxpuon(dev); b43_wa_all() 628 b43_wa_boards_g(dev); b43_wa_all() 633 b43_wa_cpll_nonpilot(dev); b43_wa_all()
H A D	wa.h	`4 void b43_wa_initgains(struct b43_wldev dev); 5 void b43_wa_all(struct b43_wldev dev);`
H A D	phy_lcn.c	62 static void b43_radio_2064_channel_setup(struct b43_wldev dev) b43_radio_2064_channel_setup() argument 66 b43_radio_set(dev, 0x09d, 0x4); b43_radio_2064_channel_setup() 67 b43_radio_write(dev, 0x09e, 0xf); b43_radio_2064_channel_setup() 70 b43_radio_write(dev, 0x02a, 0xb); b43_radio_2064_channel_setup() 71 b43_radio_maskset(dev, 0x030, ~0x3, 0xa); b43_radio_2064_channel_setup() 72 b43_radio_maskset(dev, 0x091, ~0x3, 0); b43_radio_2064_channel_setup() 73 b43_radio_maskset(dev, 0x038, ~0xf, 0x7); b43_radio_2064_channel_setup() 74 b43_radio_maskset(dev, 0x030, ~0xc, 0x8); b43_radio_2064_channel_setup() 75 b43_radio_maskset(dev, 0x05e, ~0xf, 0x8); b43_radio_2064_channel_setup() 76 b43_radio_maskset(dev, 0x05e, ~0xf0, 0x80); b43_radio_2064_channel_setup() 77 b43_radio_write(dev, 0x06c, 0x80); b43_radio_2064_channel_setup() 79 save[0] = b43_radio_read(dev, 0x044); b43_radio_2064_channel_setup() 80 save[1] = b43_radio_read(dev, 0x12b); b43_radio_2064_channel_setup() 82 b43_radio_set(dev, 0x044, 0x7); b43_radio_2064_channel_setup() 83 b43_radio_set(dev, 0x12b, 0xe); b43_radio_2064_channel_setup() 87 b43_radio_write(dev, 0x040, 0xfb); b43_radio_2064_channel_setup() 89 b43_radio_write(dev, 0x041, 0x9a); b43_radio_2064_channel_setup() 90 b43_radio_write(dev, 0x042, 0xa3); b43_radio_2064_channel_setup() 91 b43_radio_write(dev, 0x043, 0x0c); b43_radio_2064_channel_setup() 95 b43_radio_set(dev, 0x044, 0x0c); b43_radio_2064_channel_setup() 98 b43_radio_write(dev, 0x044, save[0]); b43_radio_2064_channel_setup() 99 b43_radio_write(dev, 0x12b, save[1]); b43_radio_2064_channel_setup() 101 if (dev->phy.rev == 1) { b43_radio_2064_channel_setup() 103 b43_radio_write(dev, 0x038, 0x0); b43_radio_2064_channel_setup() 104 b43_radio_write(dev, 0x091, 0x7); b43_radio_2064_channel_setup() 109 static void b43_radio_2064_init(struct b43_wldev dev) b43_radio_2064_init() argument 111 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) { b43_radio_2064_init() 112 b43_radio_write(dev, 0x09c, 0x0020); b43_radio_2064_init() 113 b43_radio_write(dev, 0x105, 0x0008); b43_radio_2064_init() 117 b43_radio_write(dev, 0x032, 0x0062); b43_radio_2064_init() 118 b43_radio_write(dev, 0x033, 0x0019); b43_radio_2064_init() 119 b43_radio_write(dev, 0x090, 0x0010); b43_radio_2064_init() 120 b43_radio_write(dev, 0x010, 0x0000); b43_radio_2064_init() 121 if (dev->phy.rev == 1) { b43_radio_2064_init() 122 b43_radio_write(dev, 0x060, 0x007f); b43_radio_2064_init() 123 b43_radio_write(dev, 0x061, 0x0072); b43_radio_2064_init() 124 b43_radio_write(dev, 0x062, 0x007f); b43_radio_2064_init() 126 b43_radio_write(dev, 0x01d, 0x0002); b43_radio_2064_init() 127 b43_radio_write(dev, 0x01e, 0x0006); b43_radio_2064_init() 129 b43_phy_write(dev, 0x4ea, 0x4688); b43_radio_2064_init() 130 b43_phy_maskset(dev, 0x4eb, ~0x7, 0x2); b43_radio_2064_init() 131 b43_phy_mask(dev, 0x4eb, ~0x01c0); b43_radio_2064_init() 132 b43_phy_maskset(dev, 0x46a, 0xff00, 0x19); b43_radio_2064_init() 134 b43_lcntab_write(dev, B43_LCNTAB16(0x00, 0x55), 0); b43_radio_2064_init() 136 b43_radio_mask(dev, 0x05b, (u16) ~0xff02); b43_radio_2064_init() 137 b43_radio_set(dev, 0x004, 0x40); b43_radio_2064_init() 138 b43_radio_set(dev, 0x120, 0x10); b43_radio_2064_init() 139 b43_radio_set(dev, 0x078, 0x80); b43_radio_2064_init() 140 b43_radio_set(dev, 0x129, 0x2); b43_radio_2064_init() 141 b43_radio_set(dev, 0x057, 0x1); b43_radio_2064_init() 142 b43_radio_set(dev, 0x05b, 0x2); b43_radio_2064_init() 145 b43_radio_read(dev, 0x05c); b43_radio_2064_init() 147 b43_radio_mask(dev, 0x05b, (u16) ~0xff02); b43_radio_2064_init() 148 b43_radio_mask(dev, 0x057, (u16) ~0xff01); b43_radio_2064_init() 150 b43_phy_write(dev, 0x933, 0x2d6b); b43_radio_2064_init() 151 b43_phy_write(dev, 0x934, 0x2d6b); b43_radio_2064_init() 152 b43_phy_write(dev, 0x935, 0x2d6b); b43_radio_2064_init() 153 b43_phy_write(dev, 0x936, 0x2d6b); b43_radio_2064_init() 154 b43_phy_write(dev, 0x937, 0x016b); b43_radio_2064_init() 156 b43_radio_mask(dev, 0x057, (u16) ~0xff02); b43_radio_2064_init() 157 b43_radio_write(dev, 0x0c2, 0x006f); b43_radio_2064_init() 165 static void b43_phy_lcn_afe_set_unset(struct b43_wldev dev) b43_phy_lcn_afe_set_unset() argument 167 u16 afe_ctl2 = b43_phy_read(dev, B43_PHY_LCN_AFE_CTL2); b43_phy_lcn_afe_set_unset() 168 u16 afe_ctl1 = b43_phy_read(dev, B43_PHY_LCN_AFE_CTL1); b43_phy_lcn_afe_set_unset() 170 b43_phy_write(dev, B43_PHY_LCN_AFE_CTL2, afe_ctl2 \| 0x1); b43_phy_lcn_afe_set_unset() 171 b43_phy_write(dev, B43_PHY_LCN_AFE_CTL1, afe_ctl1 \| 0x1); b43_phy_lcn_afe_set_unset() 173 b43_phy_write(dev, B43_PHY_LCN_AFE_CTL2, afe_ctl2 & ~0x1); b43_phy_lcn_afe_set_unset() 174 b43_phy_write(dev, B43_PHY_LCN_AFE_CTL1, afe_ctl1 & ~0x1); b43_phy_lcn_afe_set_unset() 176 b43_phy_write(dev, B43_PHY_LCN_AFE_CTL2, afe_ctl2); b43_phy_lcn_afe_set_unset() 177 b43_phy_write(dev, B43_PHY_LCN_AFE_CTL1, afe_ctl1); b43_phy_lcn_afe_set_unset() 181 static u16 b43_phy_lcn_get_pa_gain(struct b43_wldev dev) b43_phy_lcn_get_pa_gain() argument 183 return (b43_phy_read(dev, 0x4fb) & 0x7f00) >> 8; b43_phy_lcn_get_pa_gain() 187 static void b43_phy_lcn_set_dac_gain(struct b43_wldev dev, u16 dac_gain) b43_phy_lcn_set_dac_gain() argument 191 dac_ctrl = b43_phy_read(dev, 0x439); b43_phy_lcn_set_dac_gain() 194 b43_phy_maskset(dev, 0x439, ~0xfff, dac_ctrl); b43_phy_lcn_set_dac_gain() 198 static void b43_phy_lcn_set_bbmult(struct b43_wldev dev, u8 m0) b43_phy_lcn_set_bbmult() argument 200 b43_lcntab_write(dev, B43_LCNTAB16(0x00, 0x57), m0 << 8); b43_phy_lcn_set_bbmult() 204 static void b43_phy_lcn_clear_tx_power_offsets(struct b43_wldev dev) b43_phy_lcn_clear_tx_power_offsets() argument 209 b43_phy_write(dev, B43_PHY_LCN_TABLE_ADDR, (0x7 << 10) \| 0x340); b43_phy_lcn_clear_tx_power_offsets() 211 b43_phy_write(dev, B43_PHY_LCN_TABLE_DATAHI, 0); b43_phy_lcn_clear_tx_power_offsets() 212 b43_phy_write(dev, B43_PHY_LCN_TABLE_DATALO, 0); b43_phy_lcn_clear_tx_power_offsets() 216 b43_phy_write(dev, B43_PHY_LCN_TABLE_ADDR, (0x7 << 10) \| 0x80); b43_phy_lcn_clear_tx_power_offsets() 218 b43_phy_write(dev, B43_PHY_LCN_TABLE_DATAHI, 0); b43_phy_lcn_clear_tx_power_offsets() 219 b43_phy_write(dev, B43_PHY_LCN_TABLE_DATALO, 0); b43_phy_lcn_clear_tx_power_offsets() 224 static void b43_phy_lcn_rev0_baseband_init(struct b43_wldev dev) b43_phy_lcn_rev0_baseband_init() argument 226 b43_radio_write(dev, 0x11c, 0); b43_phy_lcn_rev0_baseband_init() 228 b43_phy_write(dev, 0x43b, 0); b43_phy_lcn_rev0_baseband_init() 229 b43_phy_write(dev, 0x43c, 0); b43_phy_lcn_rev0_baseband_init() 230 b43_phy_write(dev, 0x44c, 0); b43_phy_lcn_rev0_baseband_init() 231 b43_phy_write(dev, 0x4e6, 0); b43_phy_lcn_rev0_baseband_init() 232 b43_phy_write(dev, 0x4f9, 0); b43_phy_lcn_rev0_baseband_init() 233 b43_phy_write(dev, 0x4b0, 0); b43_phy_lcn_rev0_baseband_init() 234 b43_phy_write(dev, 0x938, 0); b43_phy_lcn_rev0_baseband_init() 235 b43_phy_write(dev, 0x4b0, 0); b43_phy_lcn_rev0_baseband_init() 236 b43_phy_write(dev, 0x44e, 0); b43_phy_lcn_rev0_baseband_init() 238 b43_phy_set(dev, 0x567, 0x03); b43_phy_lcn_rev0_baseband_init() 240 b43_phy_set(dev, 0x44a, 0x44); b43_phy_lcn_rev0_baseband_init() 241 b43_phy_write(dev, 0x44a, 0x80); b43_phy_lcn_rev0_baseband_init() 243 if (!(dev->dev->bus_sprom->boardflags_lo & B43_BFL_FEM)) b43_phy_lcn_rev0_baseband_init() 245 b43_phy_maskset(dev, 0x634, ~0xff, 0xc); b43_phy_lcn_rev0_baseband_init() 246 if (dev->dev->bus_sprom->boardflags_lo & B43_BFL_FEM) { b43_phy_lcn_rev0_baseband_init() 247 b43_phy_maskset(dev, 0x634, ~0xff, 0xa); b43_phy_lcn_rev0_baseband_init() 248 b43_phy_write(dev, 0x910, 0x1); b43_phy_lcn_rev0_baseband_init() 251 b43_phy_write(dev, 0x910, 0x1); b43_phy_lcn_rev0_baseband_init() 253 b43_phy_maskset(dev, 0x448, ~0x300, 0x100); b43_phy_lcn_rev0_baseband_init() 254 b43_phy_maskset(dev, 0x608, ~0xff, 0x17); b43_phy_lcn_rev0_baseband_init() 255 b43_phy_maskset(dev, 0x604, ~0x7ff, 0x3ea); b43_phy_lcn_rev0_baseband_init() 259 static void b43_phy_lcn_bu_tweaks(struct b43_wldev dev) b43_phy_lcn_bu_tweaks() argument 261 b43_phy_set(dev, 0x805, 0x1); b43_phy_lcn_bu_tweaks() 263 b43_phy_maskset(dev, 0x42f, ~0x7, 0x3); b43_phy_lcn_bu_tweaks() 264 b43_phy_maskset(dev, 0x030, ~0x7, 0x3); b43_phy_lcn_bu_tweaks() 266 b43_phy_write(dev, 0x414, 0x1e10); b43_phy_lcn_bu_tweaks() 267 b43_phy_write(dev, 0x415, 0x0640); b43_phy_lcn_bu_tweaks() 269 b43_phy_maskset(dev, 0x4df, (u16) ~0xff00, 0xf700); b43_phy_lcn_bu_tweaks() 271 b43_phy_set(dev, 0x44a, 0x44); b43_phy_lcn_bu_tweaks() 272 b43_phy_write(dev, 0x44a, 0x80); b43_phy_lcn_bu_tweaks() 274 b43_phy_maskset(dev, 0x434, ~0xff, 0xfd); b43_phy_lcn_bu_tweaks() 275 b43_phy_maskset(dev, 0x420, ~0xff, 0x10); b43_phy_lcn_bu_tweaks() 277 if (dev->dev->bus_sprom->board_rev >= 0x1204) b43_phy_lcn_bu_tweaks() 278 b43_radio_set(dev, 0x09b, 0xf0); b43_phy_lcn_bu_tweaks() 280 b43_phy_write(dev, 0x7d6, 0x0902); b43_phy_lcn_bu_tweaks() 282 b43_phy_maskset(dev, 0x429, ~0xf, 0x9); b43_phy_lcn_bu_tweaks() 283 b43_phy_maskset(dev, 0x429, ~(0x3f << 4), 0xe << 4); b43_phy_lcn_bu_tweaks() 285 if (dev->phy.rev == 1) { b43_phy_lcn_bu_tweaks() 286 b43_phy_maskset(dev, 0x423, ~0xff, 0x46); b43_phy_lcn_bu_tweaks() 287 b43_phy_maskset(dev, 0x411, ~0xff, 1); b43_phy_lcn_bu_tweaks() 288 b43_phy_set(dev, 0x434, 0xff); / FIXME: update to wl / b43_phy_lcn_bu_tweaks() 292 b43_phy_maskset(dev, 0x656, ~0xf, 2); b43_phy_lcn_bu_tweaks() 293 b43_phy_set(dev, 0x44d, 4); b43_phy_lcn_bu_tweaks() 295 b43_radio_set(dev, 0x0f7, 0x4); b43_phy_lcn_bu_tweaks() 296 b43_radio_mask(dev, 0x0f1, ~0x3); b43_phy_lcn_bu_tweaks() 297 b43_radio_maskset(dev, 0x0f2, ~0xf8, 0x90); b43_phy_lcn_bu_tweaks() 298 b43_radio_maskset(dev, 0x0f3, ~0x3, 0x2); b43_phy_lcn_bu_tweaks() 299 b43_radio_maskset(dev, 0x0f3, ~0xf0, 0xa0); b43_phy_lcn_bu_tweaks() 301 b43_radio_set(dev, 0x11f, 0x2); b43_phy_lcn_bu_tweaks() 303 b43_phy_lcn_clear_tx_power_offsets(dev); b43_phy_lcn_bu_tweaks() 310 static void b43_phy_lcn_sense_setup(struct b43_wldev dev, b43_phy_lcn_sense_setup() argument 334 save_radio_regs[i][1] = b43_radio_read(dev, b43_phy_lcn_sense_setup() 337 save_phy_regs[i][1] = b43_phy_read(dev, save_phy_regs[i][0]); b43_phy_lcn_sense_setup() 338 b43_mac_suspend(dev); b43_phy_lcn_sense_setup() 339 save_radio_4a4 = b43_radio_read(dev, 0x4a4); b43_phy_lcn_sense_setup() 341 tx_pwr_idx = dev->phy.lcn->tx_pwr_curr_idx; b43_phy_lcn_sense_setup() 345 b43_radio_set(dev, 0x007, 0x1); b43_phy_lcn_sense_setup() 346 b43_radio_set(dev, 0x0ff, 0x10); b43_phy_lcn_sense_setup() 347 b43_radio_set(dev, 0x11f, 0x4); b43_phy_lcn_sense_setup() 349 b43_phy_mask(dev, 0x503, ~0x1); b43_phy_lcn_sense_setup() 350 b43_phy_mask(dev, 0x503, ~0x4); b43_phy_lcn_sense_setup() 351 b43_phy_mask(dev, 0x4a4, ~0x4000); b43_phy_lcn_sense_setup() 352 b43_phy_mask(dev, 0x4a4, (u16) ~0x8000); b43_phy_lcn_sense_setup() 353 b43_phy_mask(dev, 0x4d0, ~0x20); b43_phy_lcn_sense_setup() 354 b43_phy_set(dev, 0x4a5, 0xff); b43_phy_lcn_sense_setup() 355 b43_phy_maskset(dev, 0x4a5, ~0x7000, 0x5000); b43_phy_lcn_sense_setup() 356 b43_phy_mask(dev, 0x4a5, ~0x700); b43_phy_lcn_sense_setup() 357 b43_phy_maskset(dev, 0x40d, ~0xff, 64); b43_phy_lcn_sense_setup() 358 b43_phy_maskset(dev, 0x40d, ~0x700, 0x600); b43_phy_lcn_sense_setup() 359 b43_phy_maskset(dev, 0x4a2, ~0xff, 64); b43_phy_lcn_sense_setup() 360 b43_phy_maskset(dev, 0x4a2, ~0x700, 0x600); b43_phy_lcn_sense_setup() 361 b43_phy_maskset(dev, 0x4d9, ~0x70, 0x20); b43_phy_lcn_sense_setup() 362 b43_phy_maskset(dev, 0x4d9, ~0x700, 0x300); b43_phy_lcn_sense_setup() 363 b43_phy_maskset(dev, 0x4d9, ~0x7000, 0x1000); b43_phy_lcn_sense_setup() 364 b43_phy_mask(dev, 0x4da, ~0x1000); b43_phy_lcn_sense_setup() 365 b43_phy_set(dev, 0x4da, 0x2000); b43_phy_lcn_sense_setup() 366 b43_phy_set(dev, 0x4a6, 0x8000); b43_phy_lcn_sense_setup() 368 b43_radio_write(dev, 0x025, 0xc); b43_phy_lcn_sense_setup() 369 b43_radio_set(dev, 0x005, 0x8); b43_phy_lcn_sense_setup() 370 b43_phy_set(dev, 0x938, 0x4); b43_phy_lcn_sense_setup() 371 b43_phy_set(dev, 0x939, 0x4); b43_phy_lcn_sense_setup() 372 b43_phy_set(dev, 0x4a4, 0x1000); b43_phy_lcn_sense_setup() 375 b43_lcntab_write(dev, B43_LCNTAB16(0x8, 0x6), 0x640); b43_phy_lcn_sense_setup() 379 b43_phy_set(dev, 0x4d7, 0x8); b43_phy_lcn_sense_setup() 380 b43_phy_maskset(dev, 0x4d7, ~0x7000, 0x1000); b43_phy_lcn_sense_setup() 384 b43_radio_set(dev, 0x082, 0x20); b43_phy_lcn_sense_setup() 387 b43_phy_set(dev, 0x4d7, 0x8); b43_phy_lcn_sense_setup() 388 b43_phy_maskset(dev, 0x4d7, ~0x7000, 0x3000); b43_phy_lcn_sense_setup() 396 b43_phy_set(dev, 0x4d8, 0x1); b43_phy_lcn_sense_setup() 397 b43_phy_maskset(dev, 0x4d8, ~(0x3ff << 2), auxpga_vmid << 2); b43_phy_lcn_sense_setup() 398 b43_phy_set(dev, 0x4d8, 0x2); b43_phy_lcn_sense_setup() 399 b43_phy_maskset(dev, 0x4d8, ~(0x7 << 12), auxpga_gain << 12); b43_phy_lcn_sense_setup() 400 b43_phy_set(dev, 0x4d0, 0x20); b43_phy_lcn_sense_setup() 401 b43_radio_write(dev, 0x112, 0x6); b43_phy_lcn_sense_setup() 403 b43_dummy_transmission(dev, true, false); b43_phy_lcn_sense_setup() 405 if (!(b43_phy_read(dev, 0x476) & 0x8000)) b43_phy_lcn_sense_setup() 410 b43_radio_write(dev, save_radio_regs[i][0], b43_phy_lcn_sense_setup() 413 b43_phy_write(dev, save_phy_regs[i][0], save_phy_regs[i][1]); b43_phy_lcn_sense_setup() 415 b43_radio_write(dev, 0x4a4, save_radio_4a4); b43_phy_lcn_sense_setup() 417 b43_mac_enable(dev); b43_phy_lcn_sense_setup() 422 static bool b43_phy_lcn_load_tx_iir_cck_filter(struct b43_wldev dev, b43_phy_lcn_load_tx_iir_cck_filter() argument 465 b43_phy_write(dev, phy_regs[j], b43_phy_lcn_load_tx_iir_cck_filter() 474 static bool b43_phy_lcn_load_tx_iir_ofdm_filter(struct b43_wldev dev, b43_phy_lcn_load_tx_iir_ofdm_filter() argument 493 b43_phy_write(dev, phy_regs[j], b43_phy_lcn_load_tx_iir_ofdm_filter() 503 static void b43_phy_lcn_set_tx_gain_override(struct b43_wldev dev, bool enable) b43_phy_lcn_set_tx_gain_override() argument 505 b43_phy_maskset(dev, 0x4b0, ~(0x1 << 7), enable << 7); b43_phy_lcn_set_tx_gain_override() 506 b43_phy_maskset(dev, 0x4b0, ~(0x1 << 14), enable << 14); b43_phy_lcn_set_tx_gain_override() 507 b43_phy_maskset(dev, 0x43b, ~(0x1 << 6), enable << 6); b43_phy_lcn_set_tx_gain_override() 511 static void b43_phy_lcn_set_tx_gain(struct b43_wldev dev, b43_phy_lcn_set_tx_gain() argument 514 u16 pa_gain = b43_phy_lcn_get_pa_gain(dev); b43_phy_lcn_set_tx_gain() 516 b43_phy_write(dev, 0x4b5, b43_phy_lcn_set_tx_gain() 518 b43_phy_maskset(dev, 0x4fb, ~0x7fff, b43_phy_lcn_set_tx_gain() 520 b43_phy_write(dev, 0x4fc, b43_phy_lcn_set_tx_gain() 522 b43_phy_maskset(dev, 0x4fd, ~0x7fff, b43_phy_lcn_set_tx_gain() 525 b43_phy_lcn_set_dac_gain(dev, target_gains->dac_gain); b43_phy_lcn_set_tx_gain() 526 b43_phy_lcn_set_tx_gain_override(dev, true); b43_phy_lcn_set_tx_gain() 530 static void b43_phy_lcn_tx_pwr_ctl_init(struct b43_wldev dev) b43_phy_lcn_tx_pwr_ctl_init() argument 535 b43_mac_suspend(dev); b43_phy_lcn_tx_pwr_ctl_init() 537 if (!dev->phy.lcn->hw_pwr_ctl_capable) { b43_phy_lcn_tx_pwr_ctl_init() 538 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) { b43_phy_lcn_tx_pwr_ctl_init() 551 b43_phy_lcn_set_tx_gain(dev, &tx_gains); b43_phy_lcn_tx_pwr_ctl_init() 552 b43_phy_lcn_set_bbmult(dev, bbmult); b43_phy_lcn_tx_pwr_ctl_init() 553 b43_phy_lcn_sense_setup(dev, B43_SENSE_TEMP); b43_phy_lcn_tx_pwr_ctl_init() 555 b43err(dev->wl, "TX power control not supported for this HW\n"); b43_phy_lcn_tx_pwr_ctl_init() 558 b43_mac_enable(dev); b43_phy_lcn_tx_pwr_ctl_init() 562 static void b43_phy_lcn_txrx_spur_avoidance_mode(struct b43_wldev dev, b43_phy_lcn_txrx_spur_avoidance_mode() argument 566 b43_phy_write(dev, 0x942, 0x7); b43_phy_lcn_txrx_spur_avoidance_mode() 567 b43_phy_write(dev, 0x93b, ((1 << 13) + 23)); b43_phy_lcn_txrx_spur_avoidance_mode() 568 b43_phy_write(dev, 0x93c, ((1 << 13) + 1989)); b43_phy_lcn_txrx_spur_avoidance_mode() 570 b43_phy_write(dev, 0x44a, 0x084); b43_phy_lcn_txrx_spur_avoidance_mode() 571 b43_phy_write(dev, 0x44a, 0x080); b43_phy_lcn_txrx_spur_avoidance_mode() 572 b43_phy_write(dev, 0x6d3, 0x2222); b43_phy_lcn_txrx_spur_avoidance_mode() 573 b43_phy_write(dev, 0x6d3, 0x2220); b43_phy_lcn_txrx_spur_avoidance_mode() 575 b43_phy_write(dev, 0x942, 0x0); b43_phy_lcn_txrx_spur_avoidance_mode() 576 b43_phy_write(dev, 0x93b, ((0 << 13) + 23)); b43_phy_lcn_txrx_spur_avoidance_mode() 577 b43_phy_write(dev, 0x93c, ((0 << 13) + 1989)); b43_phy_lcn_txrx_spur_avoidance_mode() 579 b43_mac_switch_freq(dev, enable); b43_phy_lcn_txrx_spur_avoidance_mode() 587 static void b43_phy_lcn_set_channel_tweaks(struct b43_wldev dev, int channel) b43_phy_lcn_set_channel_tweaks() argument 589 struct bcma_drv_cc cc = &dev->dev->bdev->bus->drv_cc; b43_phy_lcn_set_channel_tweaks() 591 b43_phy_maskset(dev, 0x448, ~0x300, (channel == 14) ? 0x200 : 0x100); b43_phy_lcn_set_channel_tweaks() 601 b43_phy_write(dev, 0x942, 0); b43_phy_lcn_set_channel_tweaks() 603 b43_phy_lcn_txrx_spur_avoidance_mode(dev, false); b43_phy_lcn_set_channel_tweaks() 604 b43_phy_maskset(dev, 0x424, (u16) ~0xff00, 0x1b00); b43_phy_lcn_set_channel_tweaks() 605 b43_phy_write(dev, 0x425, 0x5907); b43_phy_lcn_set_channel_tweaks() 613 b43_phy_write(dev, 0x942, 0); b43_phy_lcn_set_channel_tweaks() 615 b43_phy_lcn_txrx_spur_avoidance_mode(dev, true); b43_phy_lcn_set_channel_tweaks() 616 b43_phy_maskset(dev, 0x424, (u16) ~0xff00, 0x1f00); b43_phy_lcn_set_channel_tweaks() 617 b43_phy_write(dev, 0x425, 0x590a); b43_phy_lcn_set_channel_tweaks() 620 b43_phy_set(dev, 0x44a, 0x44); b43_phy_lcn_set_channel_tweaks() 621 b43_phy_write(dev, 0x44a, 0x80); b43_phy_lcn_set_channel_tweaks() 625 static int b43_phy_lcn_set_channel(struct b43_wldev dev, b43_phy_lcn_set_channel() argument 635 b43_phy_lcn_set_channel_tweaks(dev, channel->hw_value); b43_phy_lcn_set_channel() 637 b43_phy_set(dev, 0x44a, 0x44); b43_phy_lcn_set_channel() 638 b43_phy_write(dev, 0x44a, 0x80); b43_phy_lcn_set_channel() 640 b43_radio_2064_channel_setup(dev); b43_phy_lcn_set_channel() 643 b43_phy_lcn_afe_set_unset(dev); b43_phy_lcn_set_channel() 645 b43_phy_write(dev, 0x657, sfo_cfg[channel->hw_value - 1][0]); b43_phy_lcn_set_channel() 646 b43_phy_write(dev, 0x658, sfo_cfg[channel->hw_value - 1][1]); b43_phy_lcn_set_channel() 649 b43_phy_maskset(dev, 0x448, ~(0x3 << 8), (2) << 8); b43_phy_lcn_set_channel() 650 b43_phy_lcn_load_tx_iir_cck_filter(dev, 3); b43_phy_lcn_set_channel() 652 b43_phy_maskset(dev, 0x448, ~(0x3 << 8), (1) << 8); b43_phy_lcn_set_channel() 654 b43_phy_lcn_load_tx_iir_cck_filter(dev, 25); b43_phy_lcn_set_channel() 657 b43_phy_lcn_load_tx_iir_ofdm_filter(dev, 0); b43_phy_lcn_set_channel() 659 b43_phy_maskset(dev, 0x4eb, ~(0x7 << 3), 0x1 << 3); b43_phy_lcn_set_channel() 668 static int b43_phy_lcn_op_allocate(struct b43_wldev dev) b43_phy_lcn_op_allocate() argument 675 dev->phy.lcn = phy_lcn; b43_phy_lcn_op_allocate() 680 static void b43_phy_lcn_op_free(struct b43_wldev dev) b43_phy_lcn_op_free() argument 682 struct b43_phy phy = &dev->phy; b43_phy_lcn_op_free() 689 static void b43_phy_lcn_op_prepare_structs(struct b43_wldev dev) b43_phy_lcn_op_prepare_structs() argument 691 struct b43_phy phy = &dev->phy; b43_phy_lcn_op_prepare_structs() 698 static int b43_phy_lcn_op_init(struct b43_wldev dev) b43_phy_lcn_op_init() argument 700 struct bcma_drv_cc cc = &dev->dev->bdev->bus->drv_cc; b43_phy_lcn_op_init() 702 b43_phy_set(dev, 0x44a, 0x80); b43_phy_lcn_op_init() 703 b43_phy_mask(dev, 0x44a, 0x7f); b43_phy_lcn_op_init() 704 b43_phy_set(dev, 0x6d1, 0x80); b43_phy_lcn_op_init() 705 b43_phy_write(dev, 0x6d0, 0x7); b43_phy_lcn_op_init() 707 b43_phy_lcn_afe_set_unset(dev); b43_phy_lcn_op_init() 709 b43_phy_write(dev, 0x60a, 0xa0); b43_phy_lcn_op_init() 710 b43_phy_write(dev, 0x46a, 0x19); b43_phy_lcn_op_init() 711 b43_phy_maskset(dev, 0x663, 0xFF00, 0x64); b43_phy_lcn_op_init() 713 b43_phy_lcn_tables_init(dev); b43_phy_lcn_op_init() 715 b43_phy_lcn_rev0_baseband_init(dev); b43_phy_lcn_op_init() 716 b43_phy_lcn_bu_tweaks(dev); b43_phy_lcn_op_init() 718 if (dev->phy.radio_ver == 0x2064) b43_phy_lcn_op_init() 719 b43_radio_2064_init(dev); b43_phy_lcn_op_init() 723 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) b43_phy_lcn_op_init() 724 b43_phy_lcn_tx_pwr_ctl_init(dev); b43_phy_lcn_op_init() 726 b43_switch_channel(dev, dev->phy.channel); b43_phy_lcn_op_init() 733 b43_phy_set(dev, 0x448, 0x4000); b43_phy_lcn_op_init() 735 b43_phy_mask(dev, 0x448, ~0x4000); b43_phy_lcn_op_init() 742 static void b43_phy_lcn_op_software_rfkill(struct b43_wldev dev, b43_phy_lcn_op_software_rfkill() argument 745 if (b43_read32(dev, B43_MMIO_MACCTL) & B43_MACCTL_ENABLED) b43_phy_lcn_op_software_rfkill() 746 b43err(dev->wl, "MAC not suspended\n"); b43_phy_lcn_op_software_rfkill() 749 b43_phy_mask(dev, B43_PHY_LCN_RF_CTL2, ~0x7c00); b43_phy_lcn_op_software_rfkill() 750 b43_phy_set(dev, B43_PHY_LCN_RF_CTL1, 0x1f00); b43_phy_lcn_op_software_rfkill() 752 b43_phy_mask(dev, B43_PHY_LCN_RF_CTL5, ~0x7f00); b43_phy_lcn_op_software_rfkill() 753 b43_phy_mask(dev, B43_PHY_LCN_RF_CTL4, ~0x2); b43_phy_lcn_op_software_rfkill() 754 b43_phy_set(dev, B43_PHY_LCN_RF_CTL3, 0x808); b43_phy_lcn_op_software_rfkill() 756 b43_phy_mask(dev, B43_PHY_LCN_RF_CTL7, ~0x8); b43_phy_lcn_op_software_rfkill() 757 b43_phy_set(dev, B43_PHY_LCN_RF_CTL6, 0x8); b43_phy_lcn_op_software_rfkill() 759 b43_phy_mask(dev, B43_PHY_LCN_RF_CTL1, ~0x1f00); b43_phy_lcn_op_software_rfkill() 760 b43_phy_mask(dev, B43_PHY_LCN_RF_CTL3, ~0x808); b43_phy_lcn_op_software_rfkill() 761 b43_phy_mask(dev, B43_PHY_LCN_RF_CTL6, ~0x8); b43_phy_lcn_op_software_rfkill() 765 static void b43_phy_lcn_op_switch_analog(struct b43_wldev dev, bool on) b43_phy_lcn_op_switch_analog() argument 768 b43_phy_mask(dev, B43_PHY_LCN_AFE_CTL1, ~0x7); b43_phy_lcn_op_switch_analog() 770 b43_phy_set(dev, B43_PHY_LCN_AFE_CTL2, 0x7); b43_phy_lcn_op_switch_analog() 771 b43_phy_set(dev, B43_PHY_LCN_AFE_CTL1, 0x7); b43_phy_lcn_op_switch_analog() 775 static int b43_phy_lcn_op_switch_channel(struct b43_wldev dev, b43_phy_lcn_op_switch_channel() argument 778 struct ieee80211_channel channel = dev->wl->hw->conf.chandef.chan; b43_phy_lcn_op_switch_channel() 780 cfg80211_get_chandef_type(&dev->wl->hw->conf.chandef); b43_phy_lcn_op_switch_channel() 782 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) { b43_phy_lcn_op_switch_channel() 789 return b43_phy_lcn_set_channel(dev, channel, channel_type); b43_phy_lcn_op_switch_channel() 792 static unsigned int b43_phy_lcn_op_get_default_chan(struct b43_wldev dev) b43_phy_lcn_op_get_default_chan() argument 794 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) b43_phy_lcn_op_get_default_chan() 800 b43_phy_lcn_op_recalc_txpower(struct b43_wldev dev, bool ignore_tssi) b43_phy_lcn_op_recalc_txpower() argument 805 static void b43_phy_lcn_op_adjust_txpower(struct b43_wldev dev) b43_phy_lcn_op_adjust_txpower() argument 813 static void b43_phy_lcn_op_maskset(struct b43_wldev dev, u16 reg, u16 mask, b43_phy_lcn_op_maskset() argument 816 b43_write16f(dev, B43_MMIO_PHY_CONTROL, reg); b43_phy_lcn_op_maskset() 817 b43_write16(dev, B43_MMIO_PHY_DATA, b43_phy_lcn_op_maskset() 818 (b43_read16(dev, B43_MMIO_PHY_DATA) & mask) \| set); b43_phy_lcn_op_maskset() 821 static u16 b43_phy_lcn_op_radio_read(struct b43_wldev dev, u16 reg) b43_phy_lcn_op_radio_read() argument 826 b43_write16f(dev, B43_MMIO_RADIO24_CONTROL, reg); b43_phy_lcn_op_radio_read() 827 return b43_read16(dev, B43_MMIO_RADIO24_DATA); b43_phy_lcn_op_radio_read() 830 static void b43_phy_lcn_op_radio_write(struct b43_wldev dev, u16 reg, b43_phy_lcn_op_radio_write() argument 833 b43_write16f(dev, B43_MMIO_RADIO24_CONTROL, reg); b43_phy_lcn_op_radio_write() 834 b43_write16(dev, B43_MMIO_RADIO24_DATA, value); b43_phy_lcn_op_radio_write()
H A D	phy_common.c	41 int b43_phy_allocate(struct b43_wldev dev) b43_phy_allocate() argument 43 struct b43_phy phy = &(dev->phy); b43_phy_allocate() 83 err = phy->ops->allocate(dev); b43_phy_allocate() 90 void b43_phy_free(struct b43_wldev dev) b43_phy_free() argument 92 dev->phy.ops->free(dev); b43_phy_free() 93 dev->phy.ops = NULL; b43_phy_free() 96 int b43_phy_init(struct b43_wldev dev) b43_phy_init() argument 98 struct b43_phy phy = &dev->phy; b43_phy_init() 106 phy->chandef = &dev->wl->hw->conf.chandef; b43_phy_init() 110 phy->ops->switch_analog(dev, true); b43_phy_init() 111 b43_software_rfkill(dev, false); b43_phy_init() 113 err = ops->init(dev); b43_phy_init() 115 b43err(dev->wl, "PHY init failed\n"); b43_phy_init() 120 err = b43_switch_channel(dev, phy->channel); b43_phy_init() 122 b43err(dev->wl, "PHY init: Channel switch to default failed\n"); b43_phy_init() 131 ops->exit(dev); b43_phy_init() 133 b43_software_rfkill(dev, true); b43_phy_init() 138 void b43_phy_exit(struct b43_wldev dev) b43_phy_exit() argument 140 const struct b43_phy_operations ops = dev->phy.ops; b43_phy_exit() 142 b43_software_rfkill(dev, true); b43_phy_exit() 143 dev->phy.do_full_init = true; b43_phy_exit() 145 ops->exit(dev); b43_phy_exit() 148 bool b43_has_hardware_pctl(struct b43_wldev dev) b43_has_hardware_pctl() argument 150 if (!dev->phy.hardware_power_control) b43_has_hardware_pctl() 152 if (!dev->phy.ops->supports_hwpctl) b43_has_hardware_pctl() 154 return dev->phy.ops->supports_hwpctl(dev); b43_has_hardware_pctl() 157 void b43_radio_lock(struct b43_wldev dev) b43_radio_lock() argument 162 B43_WARN_ON(dev->phy.radio_locked); b43_radio_lock() 163 dev->phy.radio_locked = true; b43_radio_lock() 166 macctl = b43_read32(dev, B43_MMIO_MACCTL); b43_radio_lock() 168 b43_write32(dev, B43_MMIO_MACCTL, macctl); b43_radio_lock() 171 b43_read32(dev, B43_MMIO_MACCTL); b43_radio_lock() 175 void b43_radio_unlock(struct b43_wldev dev) b43_radio_unlock() argument 180 B43_WARN_ON(!dev->phy.radio_locked); b43_radio_unlock() 181 dev->phy.radio_locked = false; b43_radio_unlock() 185 b43_read16(dev, B43_MMIO_PHY_VER); b43_radio_unlock() 187 macctl = b43_read32(dev, B43_MMIO_MACCTL); b43_radio_unlock() 189 b43_write32(dev, B43_MMIO_MACCTL, macctl); b43_radio_unlock() 192 void b43_phy_lock(struct b43_wldev dev) b43_phy_lock() argument 195 B43_WARN_ON(dev->phy.phy_locked); b43_phy_lock() 196 dev->phy.phy_locked = true; b43_phy_lock() 198 B43_WARN_ON(dev->dev->core_rev < 3); b43_phy_lock() 200 if (!b43_is_mode(dev->wl, NL80211_IFTYPE_AP)) b43_phy_lock() 201 b43_power_saving_ctl_bits(dev, B43_PS_AWAKE); b43_phy_lock() 204 void b43_phy_unlock(struct b43_wldev dev) b43_phy_unlock() argument 207 B43_WARN_ON(!dev->phy.phy_locked); b43_phy_unlock() 208 dev->phy.phy_locked = false; b43_phy_unlock() 210 B43_WARN_ON(dev->dev->core_rev < 3); b43_phy_unlock() 212 if (!b43_is_mode(dev->wl, NL80211_IFTYPE_AP)) b43_phy_unlock() 213 b43_power_saving_ctl_bits(dev, 0); b43_phy_unlock() 216 static inline void assert_mac_suspended(struct b43_wldev dev) assert_mac_suspended() argument 220 if ((b43_status(dev) >= B43_STAT_INITIALIZED) && assert_mac_suspended() 221 (dev->mac_suspended <= 0)) { assert_mac_suspended() 222 b43dbg(dev->wl, "PHY/RADIO register access with " assert_mac_suspended() 228 u16 b43_radio_read(struct b43_wldev dev, u16 reg) b43_radio_read() argument 230 assert_mac_suspended(dev); b43_radio_read() 231 dev->phy.writes_counter = 0; b43_radio_read() 232 return dev->phy.ops->radio_read(dev, reg); b43_radio_read() 235 void b43_radio_write(struct b43_wldev dev, u16 reg, u16 value) b43_radio_write() argument 237 assert_mac_suspended(dev); b43_radio_write() 238 if (b43_bus_host_is_pci(dev->dev) && b43_radio_write() 239 ++dev->phy.writes_counter > B43_MAX_WRITES_IN_ROW) { b43_radio_write() 240 b43_read32(dev, B43_MMIO_MACCTL); b43_radio_write() 241 dev->phy.writes_counter = 1; b43_radio_write() 243 dev->phy.ops->radio_write(dev, reg, value); b43_radio_write() 246 void b43_radio_mask(struct b43_wldev dev, u16 offset, u16 mask) b43_radio_mask() argument 248 b43_radio_write16(dev, offset, b43_radio_mask() 249 b43_radio_read16(dev, offset) & mask); b43_radio_mask() 252 void b43_radio_set(struct b43_wldev dev, u16 offset, u16 set) b43_radio_set() argument 254 b43_radio_write16(dev, offset, b43_radio_set() 255 b43_radio_read16(dev, offset) \| set); b43_radio_set() 258 void b43_radio_maskset(struct b43_wldev dev, u16 offset, u16 mask, u16 set) b43_radio_maskset() argument 260 b43_radio_write16(dev, offset, b43_radio_maskset() 261 (b43_radio_read16(dev, offset) & mask) \| set); b43_radio_maskset() 264 bool b43_radio_wait_value(struct b43_wldev dev, u16 offset, u16 mask, b43_radio_wait_value() argument 271 val = b43_radio_read(dev, offset); b43_radio_wait_value() 279 u16 b43_phy_read(struct b43_wldev dev, u16 reg) b43_phy_read() argument 281 assert_mac_suspended(dev); b43_phy_read() 282 dev->phy.writes_counter = 0; b43_phy_read() 284 if (dev->phy.ops->phy_read) b43_phy_read() 285 return dev->phy.ops->phy_read(dev, reg); b43_phy_read() 287 b43_write16f(dev, B43_MMIO_PHY_CONTROL, reg); b43_phy_read() 288 return b43_read16(dev, B43_MMIO_PHY_DATA); b43_phy_read() 291 void b43_phy_write(struct b43_wldev dev, u16 reg, u16 value) b43_phy_write() argument 293 assert_mac_suspended(dev); b43_phy_write() 294 if (b43_bus_host_is_pci(dev->dev) && b43_phy_write() 295 ++dev->phy.writes_counter > B43_MAX_WRITES_IN_ROW) { b43_phy_write() 296 b43_read16(dev, B43_MMIO_PHY_VER); b43_phy_write() 297 dev->phy.writes_counter = 1; b43_phy_write() 300 if (dev->phy.ops->phy_write) b43_phy_write() 301 return dev->phy.ops->phy_write(dev, reg, value); b43_phy_write() 303 b43_write16f(dev, B43_MMIO_PHY_CONTROL, reg); b43_phy_write() 304 b43_write16(dev, B43_MMIO_PHY_DATA, value); b43_phy_write() 307 void b43_phy_copy(struct b43_wldev dev, u16 destreg, u16 srcreg) b43_phy_copy() argument 309 b43_phy_write(dev, destreg, b43_phy_read(dev, srcreg)); b43_phy_copy() 312 void b43_phy_mask(struct b43_wldev dev, u16 offset, u16 mask) b43_phy_mask() argument 314 if (dev->phy.ops->phy_maskset) { b43_phy_mask() 315 assert_mac_suspended(dev); b43_phy_mask() 316 dev->phy.ops->phy_maskset(dev, offset, mask, 0); b43_phy_mask() 318 b43_phy_write(dev, offset, b43_phy_mask() 319 b43_phy_read(dev, offset) & mask); b43_phy_mask() 323 void b43_phy_set(struct b43_wldev dev, u16 offset, u16 set) b43_phy_set() argument 325 if (dev->phy.ops->phy_maskset) { b43_phy_set() 326 assert_mac_suspended(dev); b43_phy_set() 327 dev->phy.ops->phy_maskset(dev, offset, 0xFFFF, set); b43_phy_set() 329 b43_phy_write(dev, offset, b43_phy_set() 330 b43_phy_read(dev, offset) \| set); b43_phy_set() 334 void b43_phy_maskset(struct b43_wldev dev, u16 offset, u16 mask, u16 set) b43_phy_maskset() argument 336 if (dev->phy.ops->phy_maskset) { b43_phy_maskset() 337 assert_mac_suspended(dev); b43_phy_maskset() 338 dev->phy.ops->phy_maskset(dev, offset, mask, set); b43_phy_maskset() 340 b43_phy_write(dev, offset, b43_phy_maskset() 341 (b43_phy_read(dev, offset) & mask) \| set); b43_phy_maskset() 345 void b43_phy_put_into_reset(struct b43_wldev dev) b43_phy_put_into_reset() argument 349 switch (dev->dev->bus_type) { b43_phy_put_into_reset() 352 tmp = bcma_aread32(dev->dev->bdev, BCMA_IOCTL); b43_phy_put_into_reset() 356 bcma_awrite32(dev->dev->bdev, BCMA_IOCTL, tmp); b43_phy_put_into_reset() 359 tmp = bcma_aread32(dev->dev->bdev, BCMA_IOCTL); b43_phy_put_into_reset() 361 bcma_awrite32(dev->dev->bdev, BCMA_IOCTL, tmp); b43_phy_put_into_reset() 367 tmp = ssb_read32(dev->dev->sdev, SSB_TMSLOW); b43_phy_put_into_reset() 371 ssb_write32(dev->dev->sdev, SSB_TMSLOW, tmp); b43_phy_put_into_reset() 374 tmp = ssb_read32(dev->dev->sdev, SSB_TMSLOW); b43_phy_put_into_reset() 376 ssb_write32(dev->dev->sdev, SSB_TMSLOW, tmp); b43_phy_put_into_reset() 384 void b43_phy_take_out_of_reset(struct b43_wldev dev) b43_phy_take_out_of_reset() argument 388 switch (dev->dev->bus_type) { b43_phy_take_out_of_reset() 392 tmp = bcma_aread32(dev->dev->bdev, BCMA_IOCTL); b43_phy_take_out_of_reset() 396 bcma_awrite32(dev->dev->bdev, BCMA_IOCTL, tmp); b43_phy_take_out_of_reset() 400 tmp = bcma_aread32(dev->dev->bdev, BCMA_IOCTL); b43_phy_take_out_of_reset() 403 bcma_awrite32(dev->dev->bdev, BCMA_IOCTL, tmp); b43_phy_take_out_of_reset() 410 tmp = ssb_read32(dev->dev->sdev, SSB_TMSLOW); b43_phy_take_out_of_reset() 414 ssb_write32(dev->dev->sdev, SSB_TMSLOW, tmp); b43_phy_take_out_of_reset() 415 ssb_read32(dev->dev->sdev, SSB_TMSLOW); / flush / b43_phy_take_out_of_reset() 418 tmp = ssb_read32(dev->dev->sdev, SSB_TMSLOW); b43_phy_take_out_of_reset() 421 ssb_write32(dev->dev->sdev, SSB_TMSLOW, tmp); b43_phy_take_out_of_reset() 422 ssb_read32(dev->dev->sdev, SSB_TMSLOW); / flush / b43_phy_take_out_of_reset() 429 int b43_switch_channel(struct b43_wldev dev, unsigned int new_channel) b43_switch_channel() argument 431 struct b43_phy phy = &(dev->phy); b43_switch_channel() 439 if (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ) b43_switch_channel() 444 savedcookie = b43_shm_read16(dev, B43_SHM_SHARED, B43_SHM_SH_CHAN); b43_switch_channel() 445 b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_CHAN, channelcookie); b43_switch_channel() 448 err = phy->ops->switch_channel(dev, new_channel); b43_switch_channel() 458 b43_shm_write16(dev, B43_SHM_SHARED, b43_switch_channel() 464 void b43_software_rfkill(struct b43_wldev dev, bool blocked) b43_software_rfkill() argument 466 struct b43_phy phy = &dev->phy; b43_software_rfkill() 468 b43_mac_suspend(dev); b43_software_rfkill() 469 phy->ops->software_rfkill(dev, blocked); b43_software_rfkill() 471 b43_mac_enable(dev); b43_software_rfkill() 483 struct b43_wldev dev; b43_phy_txpower_adjust_work() local 486 dev = wl->current_dev; b43_phy_txpower_adjust_work() 488 if (likely(dev && (b43_status(dev) >= B43_STAT_STARTED))) b43_phy_txpower_adjust_work() 489 dev->phy.ops->adjust_txpower(dev); b43_phy_txpower_adjust_work() 494 void b43_phy_txpower_check(struct b43_wldev dev, unsigned int flags) b43_phy_txpower_check() argument 496 struct b43_phy phy = &dev->phy; b43_phy_txpower_check() 508 if ((dev->dev->board_vendor == SSB_BOARDVENDOR_BCM) && b43_phy_txpower_check() 509 (dev->dev->board_type == SSB_BOARD_BU4306)) b43_phy_txpower_check() 512 result = phy->ops->recalc_txpower(dev, !!(flags & B43_TXPWR_IGNORE_TSSI)); b43_phy_txpower_check() 520 ieee80211_queue_work(dev->wl->hw, &dev->wl->txpower_adjust_work); b43_phy_txpower_check() 523 int b43_phy_shm_tssi_read(struct b43_wldev dev, u16 shm_offset) b43_phy_shm_tssi_read() argument 530 tmp = b43_shm_read32(dev, B43_SHM_SHARED, shm_offset); b43_phy_shm_tssi_read() 543 b43_shm_write32(dev, B43_SHM_SHARED, shm_offset, tmp); b43_phy_shm_tssi_read() 556 if (b43_shm_read16(dev, B43_SHM_SHARED, B43_SHM_SH_HOSTF1) b43_phy_shm_tssi_read() 564 void b43_phyop_switch_analog_generic(struct b43_wldev dev, bool on) b43_phyop_switch_analog_generic() argument 566 b43_write16(dev, B43_MMIO_PHY0, on ? 0 : 0xF4); b43_phyop_switch_analog_generic() 570 bool b43_is_40mhz(struct b43_wldev dev) b43_is_40mhz() argument 572 return dev->phy.chandef->width == NL80211_CHAN_WIDTH_40; b43_is_40mhz() 576 void b43_phy_force_clock(struct b43_wldev dev, bool force) b43_phy_force_clock() argument 580 WARN_ON(dev->phy.type != B43_PHYTYPE_N && b43_phy_force_clock() 581 dev->phy.type != B43_PHYTYPE_HT && b43_phy_force_clock() 582 dev->phy.type != B43_PHYTYPE_AC); b43_phy_force_clock() 584 switch (dev->dev->bus_type) { b43_phy_force_clock() 587 tmp = bcma_aread32(dev->dev->bdev, BCMA_IOCTL); b43_phy_force_clock() 592 bcma_awrite32(dev->dev->bdev, BCMA_IOCTL, tmp); b43_phy_force_clock() 597 tmp = ssb_read32(dev->dev->sdev, SSB_TMSLOW); b43_phy_force_clock() 602 ssb_write32(dev->dev->sdev, SSB_TMSLOW, tmp); b43_phy_force_clock()
H A D	bus.c	34 static int b43_bus_bcma_bus_may_powerdown(struct b43_bus_dev dev) b43_bus_bcma_bus_may_powerdown() argument 36 return 0; / bcma_bus_may_powerdown(dev->bdev->bus); / b43_bus_bcma_bus_may_powerdown() 38 static int b43_bus_bcma_bus_powerup(struct b43_bus_dev dev, b43_bus_bcma_bus_powerup() argument 41 return 0; /* bcma_bus_powerup(dev->sdev->bus, dynamic_pctl); / b43_bus_bcma_bus_powerup() 43 static int b43_bus_bcma_device_is_enabled(struct b43_bus_dev dev) b43_bus_bcma_device_is_enabled() argument 45 return bcma_core_is_enabled(dev->bdev); b43_bus_bcma_device_is_enabled() 47 static void b43_bus_bcma_device_enable(struct b43_bus_dev dev, b43_bus_bcma_device_enable() argument 50 bcma_core_enable(dev->bdev, core_specific_flags); b43_bus_bcma_device_enable() 52 static void b43_bus_bcma_device_disable(struct b43_bus_dev dev, b43_bus_bcma_device_disable() argument 55 bcma_core_disable(dev->bdev, core_specific_flags); b43_bus_bcma_device_disable() 57 static u16 b43_bus_bcma_read16(struct b43_bus_dev dev, u16 offset) b43_bus_bcma_read16() argument 59 return bcma_read16(dev->bdev, offset); b43_bus_bcma_read16() 61 static u32 b43_bus_bcma_read32(struct b43_bus_dev dev, u16 offset) b43_bus_bcma_read32() argument 63 return bcma_read32(dev->bdev, offset); b43_bus_bcma_read32() 66 void b43_bus_bcma_write16(struct b43_bus_dev dev, u16 offset, u16 value) b43_bus_bcma_write16() argument 68 bcma_write16(dev->bdev, offset, value); b43_bus_bcma_write16() 71 void b43_bus_bcma_write32(struct b43_bus_dev dev, u16 offset, u32 value) b43_bus_bcma_write32() argument 73 bcma_write32(dev->bdev, offset, value); b43_bus_bcma_write32() 76 void b43_bus_bcma_block_read(struct b43_bus_dev dev, void buffer, b43_bus_bcma_block_read() argument 79 bcma_block_read(dev->bdev, buffer, count, offset, reg_width); b43_bus_bcma_block_read() 82 void b43_bus_bcma_block_write(struct b43_bus_dev dev, const void buffer, b43_bus_bcma_block_write() argument 85 bcma_block_write(dev->bdev, buffer, count, offset, reg_width); b43_bus_bcma_block_write() 90 struct b43_bus_dev dev = kzalloc(sizeof(dev), GFP_KERNEL); b43_bus_dev_bcma_init() local 91 if (!dev) b43_bus_dev_bcma_init() 94 dev->bus_type = B43_BUS_BCMA; b43_bus_dev_bcma_init() 95 dev->bdev = core; b43_bus_dev_bcma_init() 97 dev->bus_may_powerdown = b43_bus_bcma_bus_may_powerdown; b43_bus_dev_bcma_init() 98 dev->bus_powerup = b43_bus_bcma_bus_powerup; b43_bus_dev_bcma_init() 99 dev->device_is_enabled = b43_bus_bcma_device_is_enabled; b43_bus_dev_bcma_init() 100 dev->device_enable = b43_bus_bcma_device_enable; b43_bus_dev_bcma_init() 101 dev->device_disable = b43_bus_bcma_device_disable; b43_bus_dev_bcma_init() 103 dev->read16 = b43_bus_bcma_read16; b43_bus_dev_bcma_init() 104 dev->read32 = b43_bus_bcma_read32; b43_bus_dev_bcma_init() 105 dev->write16 = b43_bus_bcma_write16; b43_bus_dev_bcma_init() 106 dev->write32 = b43_bus_bcma_write32; b43_bus_dev_bcma_init() 107 dev->block_read = b43_bus_bcma_block_read; b43_bus_dev_bcma_init() 108 dev->block_write = b43_bus_bcma_block_write; b43_bus_dev_bcma_init() 110 if (b43_bus_host_is_pci(dev) && b43_bus_dev_bcma_init() 113 dev->flush_writes = true; b43_bus_dev_bcma_init() 116 dev->dev = &core->dev; b43_bus_dev_bcma_init() 117 dev->dma_dev = core->dma_dev; b43_bus_dev_bcma_init() 118 dev->irq = core->irq; b43_bus_dev_bcma_init() 120 dev->board_vendor = core->bus->boardinfo.vendor; b43_bus_dev_bcma_init() 121 dev->board_type = core->bus->boardinfo.type; b43_bus_dev_bcma_init() 122 dev->board_rev = core->bus->sprom.board_rev; b43_bus_dev_bcma_init() 124 dev->chip_id = core->bus->chipinfo.id; b43_bus_dev_bcma_init() 125 dev->chip_rev = core->bus->chipinfo.rev; b43_bus_dev_bcma_init() 126 dev->chip_pkg = core->bus->chipinfo.pkg; b43_bus_dev_bcma_init() 128 dev->bus_sprom = &core->bus->sprom; b43_bus_dev_bcma_init() 130 dev->core_id = core->id.id; b43_bus_dev_bcma_init() 131 dev->core_rev = core->id.rev; b43_bus_dev_bcma_init() 133 return dev; b43_bus_dev_bcma_init() 139 static int b43_bus_ssb_bus_may_powerdown(struct b43_bus_dev dev) b43_bus_ssb_bus_may_powerdown() argument 141 return ssb_bus_may_powerdown(dev->sdev->bus); b43_bus_ssb_bus_may_powerdown() 143 static int b43_bus_ssb_bus_powerup(struct b43_bus_dev dev, b43_bus_ssb_bus_powerup() argument 146 return ssb_bus_powerup(dev->sdev->bus, dynamic_pctl); b43_bus_ssb_bus_powerup() 148 static int b43_bus_ssb_device_is_enabled(struct b43_bus_dev dev) b43_bus_ssb_device_is_enabled() argument 150 return ssb_device_is_enabled(dev->sdev); b43_bus_ssb_device_is_enabled() 152 static void b43_bus_ssb_device_enable(struct b43_bus_dev dev, b43_bus_ssb_device_enable() argument 155 ssb_device_enable(dev->sdev, core_specific_flags); b43_bus_ssb_device_enable() 157 static void b43_bus_ssb_device_disable(struct b43_bus_dev dev, b43_bus_ssb_device_disable() argument 160 ssb_device_disable(dev->sdev, core_specific_flags); b43_bus_ssb_device_disable() 163 static u16 b43_bus_ssb_read16(struct b43_bus_dev dev, u16 offset) b43_bus_ssb_read16() argument 165 return ssb_read16(dev->sdev, offset); b43_bus_ssb_read16() 167 static u32 b43_bus_ssb_read32(struct b43_bus_dev dev, u16 offset) b43_bus_ssb_read32() argument 169 return ssb_read32(dev->sdev, offset); b43_bus_ssb_read32() 171 static void b43_bus_ssb_write16(struct b43_bus_dev dev, u16 offset, u16 value) b43_bus_ssb_write16() argument 173 ssb_write16(dev->sdev, offset, value); b43_bus_ssb_write16() 175 static void b43_bus_ssb_write32(struct b43_bus_dev dev, u16 offset, u32 value) b43_bus_ssb_write32() argument 177 ssb_write32(dev->sdev, offset, value); b43_bus_ssb_write32() 179 static void b43_bus_ssb_block_read(struct b43_bus_dev dev, void buffer, b43_bus_ssb_block_read() argument 182 ssb_block_read(dev->sdev, buffer, count, offset, reg_width); b43_bus_ssb_block_read() 185 void b43_bus_ssb_block_write(struct b43_bus_dev dev, const void buffer, b43_bus_ssb_block_write() argument 188 ssb_block_write(dev->sdev, buffer, count, offset, reg_width); b43_bus_ssb_block_write() 193 struct b43_bus_dev dev; b43_bus_dev_ssb_init() local 195 dev = kzalloc(sizeof(dev), GFP_KERNEL); b43_bus_dev_ssb_init() 196 if (!dev) b43_bus_dev_ssb_init() 199 dev->bus_type = B43_BUS_SSB; b43_bus_dev_ssb_init() 200 dev->sdev = sdev; b43_bus_dev_ssb_init() 202 dev->bus_may_powerdown = b43_bus_ssb_bus_may_powerdown; b43_bus_dev_ssb_init() 203 dev->bus_powerup = b43_bus_ssb_bus_powerup; b43_bus_dev_ssb_init() 204 dev->device_is_enabled = b43_bus_ssb_device_is_enabled; b43_bus_dev_ssb_init() 205 dev->device_enable = b43_bus_ssb_device_enable; b43_bus_dev_ssb_init() 206 dev->device_disable = b43_bus_ssb_device_disable; b43_bus_dev_ssb_init() 208 dev->read16 = b43_bus_ssb_read16; b43_bus_dev_ssb_init() 209 dev->read32 = b43_bus_ssb_read32; b43_bus_dev_ssb_init() 210 dev->write16 = b43_bus_ssb_write16; b43_bus_dev_ssb_init() 211 dev->write32 = b43_bus_ssb_write32; b43_bus_dev_ssb_init() 212 dev->block_read = b43_bus_ssb_block_read; b43_bus_dev_ssb_init() 213 dev->block_write = b43_bus_ssb_block_write; b43_bus_dev_ssb_init() 215 dev->dev = sdev->dev; b43_bus_dev_ssb_init() 216 dev->dma_dev = sdev->dma_dev; b43_bus_dev_ssb_init() 217 dev->irq = sdev->irq; b43_bus_dev_ssb_init() 219 dev->board_vendor = sdev->bus->boardinfo.vendor; b43_bus_dev_ssb_init() 220 dev->board_type = sdev->bus->boardinfo.type; b43_bus_dev_ssb_init() 221 dev->board_rev = sdev->bus->sprom.board_rev; b43_bus_dev_ssb_init() 223 dev->chip_id = sdev->bus->chip_id; b43_bus_dev_ssb_init() 224 dev->chip_rev = sdev->bus->chip_rev; b43_bus_dev_ssb_init() 225 dev->chip_pkg = sdev->bus->chip_package; b43_bus_dev_ssb_init() 227 dev->bus_sprom = &sdev->bus->sprom; b43_bus_dev_ssb_init() 229 dev->core_id = sdev->id.coreid; b43_bus_dev_ssb_init() 230 dev->core_rev = sdev->id.revision; b43_bus_dev_ssb_init() 232 return dev; b43_bus_dev_ssb_init() 236 void b43_bus_get_wldev(struct b43_bus_dev dev) b43_bus_get_wldev() argument 238 switch (dev->bus_type) { b43_bus_get_wldev() 241 return bcma_get_drvdata(dev->bdev); b43_bus_get_wldev() 245 return ssb_get_drvdata(dev->sdev); b43_bus_get_wldev() 251 void b43_bus_set_wldev(struct b43_bus_dev dev, void *wldev) b43_bus_set_wldev() argument 253 switch (dev->bus_type) { b43_bus_set_wldev() 256 bcma_set_drvdata(dev->bdev, wldev); b43_bus_set_wldev() 261 ssb_set_drvdata(dev->sdev, wldev); b43_bus_set_wldev()
H A D	phy_a.c	65 static s8 b43_aphy_estimate_power_out(struct b43_wldev dev, s8 tssi) 67 struct b43_phy phy = &dev->phy; 82 static void b43_radio_set_tx_iq(struct b43_wldev dev) b43_radio_set_tx_iq() argument 86 u16 tmp = b43_radio_read16(dev, 0x001E); b43_radio_set_tx_iq() 92 b43_phy_write(dev, 0x0069, b43_radio_set_tx_iq() 100 static void aphy_channel_switch(struct b43_wldev dev, unsigned int channel) aphy_channel_switch() argument 106 r8 = b43_radio_read16(dev, 0x0008); aphy_channel_switch() 107 b43_write16(dev, 0x03F0, freq); aphy_channel_switch() 108 b43_radio_write16(dev, 0x0008, r8); aphy_channel_switch() 111 tmp = b43_radio_read16(dev, 0x002E); aphy_channel_switch() 114 b43_radio_write16(dev, 0x002E, tmp); aphy_channel_switch() 123 b43_radio_write16(dev, 0x0007, (r8 << 4) \| r8); aphy_channel_switch() 124 b43_radio_write16(dev, 0x0020, (r8 << 4) \| r8); aphy_channel_switch() 125 b43_radio_write16(dev, 0x0021, (r8 << 4) \| r8); aphy_channel_switch() 126 b43_radio_maskset(dev, 0x0022, 0x000F, (r8 << 4)); aphy_channel_switch() 127 b43_radio_write16(dev, 0x002A, (r8 << 4)); aphy_channel_switch() 128 b43_radio_write16(dev, 0x002B, (r8 << 4)); aphy_channel_switch() 129 b43_radio_maskset(dev, 0x0008, 0x00F0, (r8 << 4)); aphy_channel_switch() 130 b43_radio_maskset(dev, 0x0029, 0xFF0F, 0x00B0); aphy_channel_switch() 131 b43_radio_write16(dev, 0x0035, 0x00AA); aphy_channel_switch() 132 b43_radio_write16(dev, 0x0036, 0x0085); aphy_channel_switch() 133 b43_radio_maskset(dev, 0x003A, 0xFF20, freq_r3A_value(freq)); aphy_channel_switch() 134 b43_radio_mask(dev, 0x003D, 0x00FF); aphy_channel_switch() 135 b43_radio_maskset(dev, 0x0081, 0xFF7F, 0x0080); aphy_channel_switch() 136 b43_radio_mask(dev, 0x0035, 0xFFEF); aphy_channel_switch() 137 b43_radio_maskset(dev, 0x0035, 0xFFEF, 0x0010); aphy_channel_switch() 138 b43_radio_set_tx_iq(dev); aphy_channel_switch() 140 //FIXME b43_phy_xmitpower(dev); aphy_channel_switch() 143 static void b43_radio_init2060(struct b43_wldev dev) b43_radio_init2060() argument 145 b43_radio_write16(dev, 0x0004, 0x00C0); b43_radio_init2060() 146 b43_radio_write16(dev, 0x0005, 0x0008); b43_radio_init2060() 147 b43_radio_write16(dev, 0x0009, 0x0040); b43_radio_init2060() 148 b43_radio_write16(dev, 0x0005, 0x00AA); b43_radio_init2060() 149 b43_radio_write16(dev, 0x0032, 0x008F); b43_radio_init2060() 150 b43_radio_write16(dev, 0x0006, 0x008F); b43_radio_init2060() 151 b43_radio_write16(dev, 0x0034, 0x008F); b43_radio_init2060() 152 b43_radio_write16(dev, 0x002C, 0x0007); b43_radio_init2060() 153 b43_radio_write16(dev, 0x0082, 0x0080); b43_radio_init2060() 154 b43_radio_write16(dev, 0x0080, 0x0000); b43_radio_init2060() 155 b43_radio_write16(dev, 0x003F, 0x00DA); b43_radio_init2060() 156 b43_radio_mask(dev, 0x0005, ~0x0008); b43_radio_init2060() 157 b43_radio_mask(dev, 0x0081, ~0x0010); b43_radio_init2060() 158 b43_radio_mask(dev, 0x0081, ~0x0020); b43_radio_init2060() 159 b43_radio_mask(dev, 0x0081, ~0x0020); b43_radio_init2060() 162 b43_radio_maskset(dev, 0x0081, ~0x0020, 0x0010); b43_radio_init2060() 165 b43_radio_maskset(dev, 0x0005, ~0x0008, 0x0008); b43_radio_init2060() 166 b43_radio_mask(dev, 0x0085, ~0x0010); b43_radio_init2060() 167 b43_radio_mask(dev, 0x0005, ~0x0008); b43_radio_init2060() 168 b43_radio_mask(dev, 0x0081, ~0x0040); b43_radio_init2060() 169 b43_radio_maskset(dev, 0x0081, ~0x0040, 0x0040); b43_radio_init2060() 170 b43_radio_write16(dev, 0x0005, b43_radio_init2060() 171 (b43_radio_read16(dev, 0x0081) & ~0x0008) \| 0x0008); b43_radio_init2060() 172 b43_phy_write(dev, 0x0063, 0xDDC6); b43_radio_init2060() 173 b43_phy_write(dev, 0x0069, 0x07BE); b43_radio_init2060() 174 b43_phy_write(dev, 0x006A, 0x0000); b43_radio_init2060() 176 aphy_channel_switch(dev, dev->phy.ops->get_default_chan(dev)); b43_radio_init2060() 181 static void b43_phy_rssiagc(struct b43_wldev dev, u8 enable) b43_phy_rssiagc() argument 185 if (dev->phy.rev < 3) { b43_phy_rssiagc() 188 b43_ofdmtab_write16(dev, b43_phy_rssiagc() 190 b43_ofdmtab_write16(dev, b43_phy_rssiagc() 195 b43_ofdmtab_write16(dev, b43_phy_rssiagc() 197 b43_ofdmtab_write16(dev, b43_phy_rssiagc() 203 b43_ofdmtab_write16(dev, b43_phy_rssiagc() 207 b43_ofdmtab_write16(dev, b43_phy_rssiagc() 212 static void b43_phy_ww(struct b43_wldev dev) b43_phy_ww() argument 217 b43_phy_mask(dev, B43_PHY_CRS0, ~B43_PHY_CRS0_EN); b43_phy_ww() 218 b43_phy_set(dev, B43_PHY_OFDM(0x1B), 0x1000); b43_phy_ww() 219 b43_phy_maskset(dev, B43_PHY_OFDM(0x82), 0xF0FF, 0x0300); b43_phy_ww() 220 b43_radio_set(dev, 0x0009, 0x0080); b43_phy_ww() 221 b43_radio_maskset(dev, 0x0012, 0xFFFC, 0x0002); b43_phy_ww() 222 b43_wa_initgains(dev); b43_phy_ww() 223 b43_phy_write(dev, B43_PHY_OFDM(0xBA), 0x3ED5); b43_phy_ww() 224 b = b43_phy_read(dev, B43_PHY_PWRDOWN); b43_phy_ww() 225 b43_phy_write(dev, B43_PHY_PWRDOWN, (b & 0xFFF8) \| 0x0005); b43_phy_ww() 226 b43_radio_set(dev, 0x0004, 0x0004); b43_phy_ww() 228 b43_radio_write16(dev, 0x0013, i); b43_phy_ww() 229 curr_s = b43_phy_read(dev, B43_PHY_OTABLEQ) & 0x00FF; b43_phy_ww() 238 b43_phy_write(dev, B43_PHY_PWRDOWN, b); b43_phy_ww() 239 b43_radio_mask(dev, 0x0004, 0xFFFB); b43_phy_ww() 240 b43_radio_write16(dev, 0x0013, best_s); b43_phy_ww() 241 b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC1_R1, 0, 0xFFEC); b43_phy_ww() 242 b43_phy_write(dev, B43_PHY_OFDM(0xB7), 0x1E80); b43_phy_ww() 243 b43_phy_write(dev, B43_PHY_OFDM(0xB6), 0x1C00); b43_phy_ww() 244 b43_phy_write(dev, B43_PHY_OFDM(0xB5), 0x0EC0); b43_phy_ww() 245 b43_phy_write(dev, B43_PHY_OFDM(0xB2), 0x00C0); b43_phy_ww() 246 b43_phy_write(dev, B43_PHY_OFDM(0xB9), 0x1FFF); b43_phy_ww() 247 b43_phy_maskset(dev, B43_PHY_OFDM(0xBB), 0xF000, 0x0053); b43_phy_ww() 248 b43_phy_maskset(dev, B43_PHY_OFDM61, 0xFE1F, 0x0120); b43_phy_ww() 249 b43_phy_maskset(dev, B43_PHY_OFDM(0x13), 0x0FFF, 0x3000); b43_phy_ww() 250 b43_phy_maskset(dev, B43_PHY_OFDM(0x14), 0x0FFF, 0x3000); b43_phy_ww() 251 b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC1, 6, 0x0017); b43_phy_ww() 253 b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC1, i, 0x000F); b43_phy_ww() 254 b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC1, 0x0D, 0x000E); b43_phy_ww() 255 b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC1, 0x0E, 0x0011); b43_phy_ww() 256 b43_ofdmtab_write16(dev, B43_OFDMTAB_AGC1, 0x0F, 0x0013); b43_phy_ww() 257 b43_phy_write(dev, B43_PHY_OFDM(0x33), 0x5030); b43_phy_ww() 258 b43_phy_set(dev, B43_PHY_CRS0, B43_PHY_CRS0_EN); b43_phy_ww() 261 static void hardware_pctl_init_aphy(struct b43_wldev dev) hardware_pctl_init_aphy() argument 266 void b43_phy_inita(struct b43_wldev dev) b43_phy_inita() argument 268 struct b43_phy phy = &dev->phy; b43_phy_inita() 280 b43_phy_mask(dev, B43_PHY_OFDM(0x1B), ~0x1000); b43_phy_inita() 281 if (b43_phy_read(dev, B43_PHY_ENCORE) & B43_PHY_ENCORE_EN) b43_phy_inita() 282 b43_phy_set(dev, B43_PHY_ENCORE, 0x0010); b43_phy_inita() 284 b43_phy_mask(dev, B43_PHY_ENCORE, ~0x1010); b43_phy_inita() 287 b43_wa_all(dev); b43_phy_inita() 291 b43_phy_set(dev, 0x0034, 0x0001); b43_phy_inita() 292 b43_phy_rssiagc(dev, 0); b43_phy_inita() 294 b43_phy_set(dev, B43_PHY_CRS0, B43_PHY_CRS0_EN); b43_phy_inita() 296 b43_radio_init2060(dev); b43_phy_inita() 298 if ((dev->dev->board_vendor == SSB_BOARDVENDOR_BCM) && b43_phy_inita() 299 ((dev->dev->board_type == SSB_BOARD_BU4306) \|\| b43_phy_inita() 300 (dev->dev->board_type == SSB_BOARD_BU4309))) { b43_phy_inita() 305 b43_phy_ww(dev); b43_phy_inita() 307 hardware_pctl_init_aphy(dev); b43_phy_inita() 313 (dev->dev->bus_sprom->boardflags_lo & B43_BFL_PACTRL)) { b43_phy_inita() 314 b43_phy_maskset(dev, B43_PHY_OFDM(0x6E), 0xE000, 0x3CF); b43_phy_inita() 319 static int b43_aphy_init_tssi2dbm_table(struct b43_wldev dev) b43_aphy_init_tssi2dbm_table() argument 321 struct b43_phy phy = &dev->phy; b43_aphy_init_tssi2dbm_table() 325 pab0 = (s16) (dev->dev->bus_sprom->pa1b0); b43_aphy_init_tssi2dbm_table() 326 pab1 = (s16) (dev->dev->bus_sprom->pa1b1); b43_aphy_init_tssi2dbm_table() 327 pab2 = (s16) (dev->dev->bus_sprom->pa1b2); b43_aphy_init_tssi2dbm_table() 332 if ((s8) dev->dev->bus_sprom->itssi_a != 0 && b43_aphy_init_tssi2dbm_table() 333 (s8) dev->dev->bus_sprom->itssi_a != -1) b43_aphy_init_tssi2dbm_table() 335 (s8) (dev->dev->bus_sprom->itssi_a); b43_aphy_init_tssi2dbm_table() 338 aphy->tssi2dbm = b43_generate_dyn_tssi2dbm_tab(dev, pab0, b43_aphy_init_tssi2dbm_table() 346 b43err(dev->wl, "Could not generate tssi2dBm " b43_aphy_init_tssi2dbm_table() 354 static int b43_aphy_op_allocate(struct b43_wldev dev) b43_aphy_op_allocate() argument 362 dev->phy.a = aphy; b43_aphy_op_allocate() 364 err = b43_aphy_init_tssi2dbm_table(dev); b43_aphy_op_allocate() 372 dev->phy.a = NULL; b43_aphy_op_allocate() 377 static void b43_aphy_op_prepare_structs(struct b43_wldev dev) b43_aphy_op_prepare_structs() argument 379 struct b43_phy phy = &dev->phy; b43_aphy_op_prepare_structs() 399 static void b43_aphy_op_free(struct b43_wldev dev) b43_aphy_op_free() argument 401 struct b43_phy phy = &dev->phy; b43_aphy_op_free() 408 dev->phy.a = NULL; b43_aphy_op_free() 411 static int b43_aphy_op_init(struct b43_wldev dev) b43_aphy_op_init() argument 413 b43_phy_inita(dev); b43_aphy_op_init() 418 static inline u16 adjust_phyreg(struct b43_wldev dev, u16 offset) adjust_phyreg() argument 429 b43err(dev->wl, "Invalid EXT-G PHY access at " adjust_phyreg() 435 b43err(dev->wl, "Invalid N-BMODE PHY access at " adjust_phyreg() 444 static u16 b43_aphy_op_read(struct b43_wldev dev, u16 reg) b43_aphy_op_read() argument 446 reg = adjust_phyreg(dev, reg); b43_aphy_op_read() 447 b43_write16f(dev, B43_MMIO_PHY_CONTROL, reg); b43_aphy_op_read() 448 return b43_read16(dev, B43_MMIO_PHY_DATA); b43_aphy_op_read() 451 static void b43_aphy_op_write(struct b43_wldev dev, u16 reg, u16 value) b43_aphy_op_write() argument 453 reg = adjust_phyreg(dev, reg); b43_aphy_op_write() 454 b43_write16f(dev, B43_MMIO_PHY_CONTROL, reg); b43_aphy_op_write() 455 b43_write16(dev, B43_MMIO_PHY_DATA, value); b43_aphy_op_write() 458 static u16 b43_aphy_op_radio_read(struct b43_wldev dev, u16 reg) b43_aphy_op_radio_read() argument 465 b43_write16(dev, B43_MMIO_RADIO_CONTROL, reg); b43_aphy_op_radio_read() 466 return b43_read16(dev, B43_MMIO_RADIO_DATA_LOW); b43_aphy_op_radio_read() 469 static void b43_aphy_op_radio_write(struct b43_wldev dev, u16 reg, u16 value) b43_aphy_op_radio_write() argument 474 b43_write16(dev, B43_MMIO_RADIO_CONTROL, reg); b43_aphy_op_radio_write() 475 b43_write16(dev, B43_MMIO_RADIO_DATA_LOW, value); b43_aphy_op_radio_write() 478 static bool b43_aphy_op_supports_hwpctl(struct b43_wldev dev) b43_aphy_op_supports_hwpctl() argument 480 return (dev->phy.rev >= 5); b43_aphy_op_supports_hwpctl() 483 static void b43_aphy_op_software_rfkill(struct b43_wldev dev, b43_aphy_op_software_rfkill() argument 486 struct b43_phy phy = &dev->phy; b43_aphy_op_software_rfkill() 491 b43_radio_write16(dev, 0x0004, 0x00C0); b43_aphy_op_software_rfkill() 492 b43_radio_write16(dev, 0x0005, 0x0008); b43_aphy_op_software_rfkill() 493 b43_phy_mask(dev, 0x0010, 0xFFF7); b43_aphy_op_software_rfkill() 494 b43_phy_mask(dev, 0x0011, 0xFFF7); b43_aphy_op_software_rfkill() 495 b43_radio_init2060(dev); b43_aphy_op_software_rfkill() 497 b43_radio_write16(dev, 0x0004, 0x00FF); b43_aphy_op_software_rfkill() 498 b43_radio_write16(dev, 0x0005, 0x00FB); b43_aphy_op_software_rfkill() 499 b43_phy_set(dev, 0x0010, 0x0008); b43_aphy_op_software_rfkill() 500 b43_phy_set(dev, 0x0011, 0x0008); b43_aphy_op_software_rfkill() 504 static int b43_aphy_op_switch_channel(struct b43_wldev dev, b43_aphy_op_switch_channel() argument 509 aphy_channel_switch(dev, new_channel); b43_aphy_op_switch_channel() 514 static unsigned int b43_aphy_op_get_default_chan(struct b43_wldev dev) b43_aphy_op_get_default_chan() argument 519 static void b43_aphy_op_set_rx_antenna(struct b43_wldev dev, int antenna) b43_aphy_op_set_rx_antenna() argument 521 struct b43_phy phy = &dev->phy; b43_aphy_op_set_rx_antenna() 528 b43_hf_write(dev, b43_hf_read(dev) & ~B43_HF_ANTDIVHELP); b43_aphy_op_set_rx_antenna() 530 b43_phy_maskset(dev, B43_PHY_BBANDCFG, ~B43_PHY_BBANDCFG_RXANT, b43_aphy_op_set_rx_antenna() 535 tmp = b43_phy_read(dev, B43_PHY_ANTDWELL); b43_aphy_op_set_rx_antenna() 540 b43_phy_write(dev, B43_PHY_ANTDWELL, tmp); b43_aphy_op_set_rx_antenna() 543 b43_phy_maskset(dev, B43_PHY_ANTDWELL, 0xFF00, 0x24); b43_aphy_op_set_rx_antenna() 545 b43_phy_set(dev, B43_PHY_OFDM61, 0x10); b43_aphy_op_set_rx_antenna() 547 b43_phy_write(dev, B43_PHY_CLIPPWRDOWNT, 0x1D); b43_aphy_op_set_rx_antenna() 548 b43_phy_write(dev, B43_PHY_ADIVRELATED, 8); b43_aphy_op_set_rx_antenna() 550 b43_phy_write(dev, B43_PHY_CLIPPWRDOWNT, 0x3A); b43_aphy_op_set_rx_antenna() 551 b43_phy_maskset(dev, B43_PHY_ADIVRELATED, 0xFF00, 8); b43_aphy_op_set_rx_antenna() 555 b43_hf_write(dev, b43_hf_read(dev) \| B43_HF_ANTDIVHELP); b43_aphy_op_set_rx_antenna() 558 static void b43_aphy_op_adjust_txpower(struct b43_wldev dev) b43_aphy_op_adjust_txpower() argument 562 static enum b43_txpwr_result b43_aphy_op_recalc_txpower(struct b43_wldev dev, b43_aphy_op_recalc_txpower() argument 568 static void b43_aphy_op_pwork_15sec(struct b43_wldev dev) b43_aphy_op_pwork_15sec() argument 572 static void b43_aphy_op_pwork_60sec(struct b43_wldev dev) b43_aphy_op_pwork_60sec() argument
H A D	phy_n.c	106 static inline bool b43_nphy_ipa(struct b43_wldev dev) b43_nphy_ipa() argument 108 enum ieee80211_band band = b43_current_band(dev->wl); b43_nphy_ipa() 109 return ((dev->phy.n->ipa2g_on && band == IEEE80211_BAND_2GHZ) \|\| b43_nphy_ipa() 110 (dev->phy.n->ipa5g_on && band == IEEE80211_BAND_5GHZ)); b43_nphy_ipa() 114 static u8 b43_nphy_get_rx_core_state(struct b43_wldev dev) b43_nphy_get_rx_core_state() argument 116 return (b43_phy_read(dev, B43_NPHY_RFSEQCA) & B43_NPHY_RFSEQCA_RXEN) >> b43_nphy_get_rx_core_state() 125 static void b43_nphy_force_rf_sequence(struct b43_wldev dev, b43_nphy_force_rf_sequence() argument 137 u16 seq_mode = b43_phy_read(dev, B43_NPHY_RFSEQMODE); b43_nphy_force_rf_sequence() 141 b43_phy_set(dev, B43_NPHY_RFSEQMODE, b43_nphy_force_rf_sequence() 143 b43_phy_set(dev, B43_NPHY_RFSEQTR, trigger[seq]); b43_nphy_force_rf_sequence() 145 if (!(b43_phy_read(dev, B43_NPHY_RFSEQST) & trigger[seq])) b43_nphy_force_rf_sequence() 149 b43err(dev->wl, "RF sequence status timeout\n"); b43_nphy_force_rf_sequence() 151 b43_phy_write(dev, B43_NPHY_RFSEQMODE, seq_mode); b43_nphy_force_rf_sequence() 154 static void b43_nphy_rf_ctl_override_rev19(struct b43_wldev dev, u16 field, b43_nphy_rf_ctl_override_rev19() argument 162 static void b43_nphy_rf_ctl_override_rev7(struct b43_wldev dev, u16 field, b43_nphy_rf_ctl_override_rev7() argument 166 struct b43_phy phy = &dev->phy; b43_nphy_rf_ctl_override_rev7() 182 e = b43_nphy_get_rf_ctl_over_rev7(dev, field, override); b43_nphy_rf_ctl_override_rev7() 186 b43err(dev->wl, "Invalid override value %d\n", override); b43_nphy_rf_ctl_override_rev7() 195 b43_phy_mask(dev, en_addr, ~en_mask); b43_nphy_rf_ctl_override_rev7() 197 b43_phy_mask(dev, val_addr, ~e->val_mask); b43_nphy_rf_ctl_override_rev7() 200 b43_phy_set(dev, en_addr, en_mask); b43_nphy_rf_ctl_override_rev7() 202 b43_phy_maskset(dev, val_addr, ~e->val_mask, (value << e->val_shift)); b43_nphy_rf_ctl_override_rev7() 209 static void b43_nphy_rf_ctl_override_one_to_many(struct b43_wldev dev, b43_nphy_rf_ctl_override_one_to_many() argument 213 struct b43_phy phy = &dev->phy; b43_nphy_rf_ctl_override_one_to_many() 220 b43_nphy_rf_ctl_override_rev7(dev, 0x20, value, core, off, 1); b43_nphy_rf_ctl_override_one_to_many() 221 b43_nphy_rf_ctl_override_rev7(dev, 0x10, value, core, off, 1); b43_nphy_rf_ctl_override_one_to_many() 222 b43_nphy_rf_ctl_override_rev7(dev, 0x08, value, core, off, 1); b43_nphy_rf_ctl_override_one_to_many() 225 b43_nphy_rf_ctl_override_rev7(dev, 0x4, value, core, off, 1); b43_nphy_rf_ctl_override_one_to_many() 226 b43_nphy_rf_ctl_override_rev7(dev, 0x2, value, core, off, 1); b43_nphy_rf_ctl_override_one_to_many() 227 b43_nphy_rf_ctl_override_rev7(dev, 0x1, value, core, off, 1); b43_nphy_rf_ctl_override_one_to_many() 228 b43_nphy_rf_ctl_override_rev7(dev, 0x2, value, core, off, 2); b43_nphy_rf_ctl_override_one_to_many() 229 b43_nphy_rf_ctl_override_rev7(dev, 0x0800, 0, core, off, 1); b43_nphy_rf_ctl_override_one_to_many() 232 b43_nphy_rf_ctl_override_rev7(dev, 0x4, value, core, off, 0); b43_nphy_rf_ctl_override_one_to_many() 233 b43_nphy_rf_ctl_override_rev7(dev, 0x2, value, core, off, 1); b43_nphy_rf_ctl_override_one_to_many() 234 b43_nphy_rf_ctl_override_rev7(dev, 0x1, value, core, off, 2); b43_nphy_rf_ctl_override_one_to_many() 235 b43_nphy_rf_ctl_override_rev7(dev, 0x0800, 1, core, off, 1); b43_nphy_rf_ctl_override_one_to_many() 239 b43_nphy_rf_ctl_override_rev7(dev, 0x0800, tmp, core, off, 0); b43_nphy_rf_ctl_override_one_to_many() 241 b43_nphy_rf_ctl_override_rev7(dev, 0x6000, tmp, core, off, 0); b43_nphy_rf_ctl_override_one_to_many() 245 b43_nphy_rf_ctl_override_rev7(dev, 0x1000, tmp, core, off, 0); b43_nphy_rf_ctl_override_one_to_many() 247 b43_nphy_rf_ctl_override_rev7(dev, 0x4000, tmp, core, off, 0); b43_nphy_rf_ctl_override_one_to_many() 253 static void b43_nphy_rf_ctl_override(struct b43_wldev dev, u16 field, b43_nphy_rf_ctl_override() argument 262 if (dev->phy.rev >= 3) { b43_nphy_rf_ctl_override() 266 b43err(dev->wl, b43_nphy_rf_ctl_override() 278 b43_phy_mask(dev, en_addr, ~(field)); b43_nphy_rf_ctl_override() 279 b43_phy_mask(dev, val_addr, b43_nphy_rf_ctl_override() 283 b43_phy_set(dev, en_addr, field); b43_nphy_rf_ctl_override() 284 b43_phy_maskset(dev, val_addr, b43_nphy_rf_ctl_override() 293 b43_phy_mask(dev, B43_NPHY_RFCTL_OVER, ~(field)); b43_nphy_rf_ctl_override() 296 b43_phy_set(dev, B43_NPHY_RFCTL_OVER, field); b43_nphy_rf_ctl_override() 301 b43err(dev->wl, b43_nphy_rf_ctl_override() 316 b43_phy_maskset(dev, addr, ~(rf_ctrl->bmask), b43_nphy_rf_ctl_override() 319 b43_phy_set(dev, B43_NPHY_RFCTL_OVER, 0x1); b43_nphy_rf_ctl_override() 320 b43_phy_set(dev, B43_NPHY_RFCTL_CMD, b43_nphy_rf_ctl_override() 323 b43_phy_mask(dev, B43_NPHY_RFCTL_OVER, 0xFFFE); b43_nphy_rf_ctl_override() 328 static void b43_nphy_rf_ctl_intc_override_rev7(struct b43_wldev dev, b43_nphy_rf_ctl_intc_override_rev7() argument 346 b43_phy_write(dev, reg, 0); b43_nphy_rf_ctl_intc_override_rev7() 347 b43_phy_mask(dev, 0x2ff, ~0x2000); b43_nphy_rf_ctl_intc_override_rev7() 348 b43_nphy_force_rf_sequence(dev, B43_RFSEQ_RESET2RX); b43_nphy_rf_ctl_intc_override_rev7() 351 b43_phy_maskset(dev, reg, ~0xC0, value << 6); b43_nphy_rf_ctl_intc_override_rev7() 352 b43_phy_set(dev, reg, 0x400); b43_nphy_rf_ctl_intc_override_rev7() 354 b43_phy_mask(dev, 0x2ff, ~0xC000 & 0xFFFF); b43_nphy_rf_ctl_intc_override_rev7() 355 b43_phy_set(dev, 0x2ff, 0x2000); b43_nphy_rf_ctl_intc_override_rev7() 356 b43_phy_set(dev, 0x2ff, 0x0001); b43_nphy_rf_ctl_intc_override_rev7() 360 if (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ) b43_nphy_rf_ctl_intc_override_rev7() 364 b43_phy_maskset(dev, reg, ~tmp, val); b43_nphy_rf_ctl_intc_override_rev7() 365 b43_phy_set(dev, reg, 0x1000); b43_nphy_rf_ctl_intc_override_rev7() 368 if (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ) { b43_nphy_rf_ctl_intc_override_rev7() 377 b43_phy_maskset(dev, reg, ~tmp, val); b43_nphy_rf_ctl_intc_override_rev7() 378 b43_phy_mask(dev, reg, ~tmp2); b43_nphy_rf_ctl_intc_override_rev7() 381 if (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ) { b43_nphy_rf_ctl_intc_override_rev7() 390 b43_phy_maskset(dev, reg, ~tmp, val); b43_nphy_rf_ctl_intc_override_rev7() 391 b43_phy_mask(dev, reg, ~tmp2); b43_nphy_rf_ctl_intc_override_rev7() 398 static void b43_nphy_rf_ctl_intc_override(struct b43_wldev dev, b43_nphy_rf_ctl_intc_override() argument 405 if (dev->phy.rev >= 7) { b43_nphy_rf_ctl_intc_override() 406 b43_nphy_rf_ctl_intc_override_rev7(dev, intc_override, value, b43_nphy_rf_ctl_intc_override() 411 B43_WARN_ON(dev->phy.rev < 3); b43_nphy_rf_ctl_intc_override() 419 b43_phy_set(dev, reg, 0x400); b43_nphy_rf_ctl_intc_override() 423 b43_phy_write(dev, reg, 0); b43_nphy_rf_ctl_intc_override() 424 b43_nphy_force_rf_sequence(dev, B43_RFSEQ_RESET2RX); b43_nphy_rf_ctl_intc_override() 428 b43_phy_maskset(dev, B43_NPHY_RFCTL_INTC1, b43_nphy_rf_ctl_intc_override() 430 b43_phy_maskset(dev, B43_NPHY_TXF_40CO_B1S1, b43_nphy_rf_ctl_intc_override() 432 b43_phy_set(dev, B43_NPHY_RFCTL_CMD, b43_nphy_rf_ctl_intc_override() 435 if (!(b43_phy_read(dev, B43_NPHY_RFCTL_CMD) & B43_NPHY_RFCTL_CMD_START)) { b43_nphy_rf_ctl_intc_override() 442 b43err(dev->wl, b43_nphy_rf_ctl_intc_override() 444 b43_phy_mask(dev, B43_NPHY_TXF_40CO_B1S1, b43_nphy_rf_ctl_intc_override() 447 b43_phy_maskset(dev, B43_NPHY_RFCTL_INTC2, b43_nphy_rf_ctl_intc_override() 449 b43_phy_maskset(dev, B43_NPHY_RFCTL_OVER, b43_nphy_rf_ctl_intc_override() 451 b43_phy_set(dev, B43_NPHY_RFCTL_CMD, b43_nphy_rf_ctl_intc_override() 454 if (!(b43_phy_read(dev, B43_NPHY_RFCTL_CMD) & B43_NPHY_RFCTL_CMD_RXTX)) { b43_nphy_rf_ctl_intc_override() 461 b43err(dev->wl, b43_nphy_rf_ctl_intc_override() 463 b43_phy_mask(dev, B43_NPHY_RFCTL_OVER, b43_nphy_rf_ctl_intc_override() 468 if (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ) { b43_nphy_rf_ctl_intc_override() 475 b43_phy_maskset(dev, reg, ~tmp, val); b43_nphy_rf_ctl_intc_override() 478 if (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ) { b43_nphy_rf_ctl_intc_override() 485 b43_phy_maskset(dev, reg, ~tmp, val); b43_nphy_rf_ctl_intc_override() 488 if (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ) { b43_nphy_rf_ctl_intc_override() 495 b43_phy_maskset(dev, reg, ~tmp, val); b43_nphy_rf_ctl_intc_override() 506 static void b43_nphy_write_clip_detection(struct b43_wldev dev, b43_nphy_write_clip_detection() argument 509 b43_phy_write(dev, B43_NPHY_C1_CLIP1THRES, clip_st[0]); b43_nphy_write_clip_detection() 510 b43_phy_write(dev, B43_NPHY_C2_CLIP1THRES, clip_st[1]); b43_nphy_write_clip_detection() 514 static void b43_nphy_read_clip_detection(struct b43_wldev dev, u16 clip_st) b43_nphy_read_clip_detection() argument 516 clip_st[0] = b43_phy_read(dev, B43_NPHY_C1_CLIP1THRES); b43_nphy_read_clip_detection() 517 clip_st[1] = b43_phy_read(dev, B43_NPHY_C2_CLIP1THRES); b43_nphy_read_clip_detection() 521 static u16 b43_nphy_classifier(struct b43_wldev dev, u16 mask, u16 val) b43_nphy_classifier() argument 525 if (dev->dev->core_rev == 16) b43_nphy_classifier() 526 b43_mac_suspend(dev); b43_nphy_classifier() 528 tmp = b43_phy_read(dev, B43_NPHY_CLASSCTL); b43_nphy_classifier() 533 b43_phy_maskset(dev, B43_NPHY_CLASSCTL, 0xFFF8, tmp); b43_nphy_classifier() 535 if (dev->dev->core_rev == 16) b43_nphy_classifier() 536 b43_mac_enable(dev); b43_nphy_classifier() 542 static void b43_nphy_reset_cca(struct b43_wldev dev) b43_nphy_reset_cca() argument 546 b43_phy_force_clock(dev, 1); b43_nphy_reset_cca() 547 bbcfg = b43_phy_read(dev, B43_NPHY_BBCFG); b43_nphy_reset_cca() 548 b43_phy_write(dev, B43_NPHY_BBCFG, bbcfg \| B43_NPHY_BBCFG_RSTCCA); b43_nphy_reset_cca() 550 b43_phy_write(dev, B43_NPHY_BBCFG, bbcfg & ~B43_NPHY_BBCFG_RSTCCA); b43_nphy_reset_cca() 551 b43_phy_force_clock(dev, 0); b43_nphy_reset_cca() 552 b43_nphy_force_rf_sequence(dev, B43_RFSEQ_RESET2RX); b43_nphy_reset_cca() 556 static void b43_nphy_stay_in_carrier_search(struct b43_wldev dev, bool enable) b43_nphy_stay_in_carrier_search() argument 558 struct b43_phy phy = &dev->phy; b43_nphy_stay_in_carrier_search() 564 nphy->classifier_state = b43_nphy_classifier(dev, 0, 0); b43_nphy_stay_in_carrier_search() 565 b43_nphy_classifier(dev, 0x7, b43_nphy_stay_in_carrier_search() 567 b43_nphy_read_clip_detection(dev, nphy->clip_state); b43_nphy_stay_in_carrier_search() 568 b43_nphy_write_clip_detection(dev, clip); b43_nphy_stay_in_carrier_search() 570 b43_nphy_reset_cca(dev); b43_nphy_stay_in_carrier_search() 573 b43_nphy_classifier(dev, 0x7, nphy->classifier_state); b43_nphy_stay_in_carrier_search() 574 b43_nphy_write_clip_detection(dev, nphy->clip_state); b43_nphy_stay_in_carrier_search() 580 static u16 b43_nphy_read_lpf_ctl(struct b43_wldev dev, u16 offset) b43_nphy_read_lpf_ctl() argument 583 offset = b43_is_40mhz(dev) ? 0x159 : 0x154; b43_nphy_read_lpf_ctl() 584 return b43_ntab_read(dev, B43_NTAB16(7, offset)) & 0x7; b43_nphy_read_lpf_ctl() 588 static void b43_nphy_adjust_lna_gain_table(struct b43_wldev dev) b43_nphy_adjust_lna_gain_table() argument 590 struct b43_phy_n nphy = dev->phy.n; b43_nphy_adjust_lna_gain_table() 600 b43_nphy_stay_in_carrier_search(dev, 1); b43_nphy_adjust_lna_gain_table() 603 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) { b43_nphy_adjust_lna_gain_table() 607 tmp = 40370 - 315 dev->phy.channel; b43_nphy_adjust_lna_gain_table() 609 tmp = 23242 - 224 * dev->phy.channel; b43_nphy_adjust_lna_gain_table() 629 b43_ntab_write_bulk(dev, B43_NTAB16(i, 8), 4, data); b43_nphy_adjust_lna_gain_table() 634 b43_phy_maskset(dev, B43_NPHY_C1_MINMAX_GAIN, ~B43_NPHY_C1_MINGAIN, b43_nphy_adjust_lna_gain_table() 636 b43_phy_maskset(dev, B43_NPHY_C2_MINMAX_GAIN, ~B43_NPHY_C2_MINGAIN, b43_nphy_adjust_lna_gain_table() 640 b43_nphy_stay_in_carrier_search(dev, 0); b43_nphy_adjust_lna_gain_table() 644 static void b43_nphy_set_rf_sequence(struct b43_wldev dev, u8 cmd, b43_nphy_set_rf_sequence() argument 647 struct b43_phy_n nphy = dev->phy.n; b43_nphy_set_rf_sequence() 649 u8 end = (dev->phy.rev >= 3) ? 0x1F : 0x0F; b43_nphy_set_rf_sequence() 654 b43_nphy_stay_in_carrier_search(dev, true); b43_nphy_set_rf_sequence() 656 b43_ntab_write_bulk(dev, B43_NTAB8(7, offset1), length, events); b43_nphy_set_rf_sequence() 657 b43_ntab_write_bulk(dev, B43_NTAB8(7, offset2), length, delays); b43_nphy_set_rf_sequence() 660 b43_ntab_write(dev, B43_NTAB8(7, offset1 + i), end); b43_nphy_set_rf_sequence() 661 b43_ntab_write(dev, B43_NTAB8(7, offset2 + i), 1); b43_nphy_set_rf_sequence() 665 b43_nphy_stay_in_carrier_search(dev, false); b43_nphy_set_rf_sequence() 672 static void b43_radio_2057_chantab_upload(struct b43_wldev dev, b43_radio_2057_chantab_upload() argument 677 b43_radio_write(dev, R2057_VCOCAL_COUNTVAL0, e_r7_2g->radio_vcocal_countval0); b43_radio_2057_chantab_upload() 678 b43_radio_write(dev, R2057_VCOCAL_COUNTVAL1, e_r7_2g->radio_vcocal_countval1); b43_radio_2057_chantab_upload() 679 b43_radio_write(dev, R2057_RFPLL_REFMASTER_SPAREXTALSIZE, e_r7_2g->radio_rfpll_refmaster_sparextalsize); b43_radio_2057_chantab_upload() 680 b43_radio_write(dev, R2057_RFPLL_LOOPFILTER_R1, e_r7_2g->radio_rfpll_loopfilter_r1); b43_radio_2057_chantab_upload() 681 b43_radio_write(dev, R2057_RFPLL_LOOPFILTER_C2, e_r7_2g->radio_rfpll_loopfilter_c2); b43_radio_2057_chantab_upload() 682 b43_radio_write(dev, R2057_RFPLL_LOOPFILTER_C1, e_r7_2g->radio_rfpll_loopfilter_c1); b43_radio_2057_chantab_upload() 683 b43_radio_write(dev, R2057_CP_KPD_IDAC, e_r7_2g->radio_cp_kpd_idac); b43_radio_2057_chantab_upload() 684 b43_radio_write(dev, R2057_RFPLL_MMD0, e_r7_2g->radio_rfpll_mmd0); b43_radio_2057_chantab_upload() 685 b43_radio_write(dev, R2057_RFPLL_MMD1, e_r7_2g->radio_rfpll_mmd1); b43_radio_2057_chantab_upload() 686 b43_radio_write(dev, R2057_VCOBUF_TUNE, e_r7_2g->radio_vcobuf_tune); b43_radio_2057_chantab_upload() 687 b43_radio_write(dev, R2057_LOGEN_MX2G_TUNE, e_r7_2g->radio_logen_mx2g_tune); b43_radio_2057_chantab_upload() 688 b43_radio_write(dev, R2057_LOGEN_INDBUF2G_TUNE, e_r7_2g->radio_logen_indbuf2g_tune); b43_radio_2057_chantab_upload() 689 b43_radio_write(dev, R2057_TXMIX2G_TUNE_BOOST_PU_CORE0, e_r7_2g->radio_txmix2g_tune_boost_pu_core0); b43_radio_2057_chantab_upload() 690 b43_radio_write(dev, R2057_PAD2G_TUNE_PUS_CORE0, e_r7_2g->radio_pad2g_tune_pus_core0); b43_radio_2057_chantab_upload() 691 b43_radio_write(dev, R2057_LNA2G_TUNE_CORE0, e_r7_2g->radio_lna2g_tune_core0); b43_radio_2057_chantab_upload() 692 b43_radio_write(dev, R2057_TXMIX2G_TUNE_BOOST_PU_CORE1, e_r7_2g->radio_txmix2g_tune_boost_pu_core1); b43_radio_2057_chantab_upload() 693 b43_radio_write(dev, R2057_PAD2G_TUNE_PUS_CORE1, e_r7_2g->radio_pad2g_tune_pus_core1); b43_radio_2057_chantab_upload() 694 b43_radio_write(dev, R2057_LNA2G_TUNE_CORE1, e_r7_2g->radio_lna2g_tune_core1); b43_radio_2057_chantab_upload() 697 b43_radio_write(dev, R2057_VCOCAL_COUNTVAL0, e_r7->radio_vcocal_countval0); b43_radio_2057_chantab_upload() 698 b43_radio_write(dev, R2057_VCOCAL_COUNTVAL1, e_r7->radio_vcocal_countval1); b43_radio_2057_chantab_upload() 699 b43_radio_write(dev, R2057_RFPLL_REFMASTER_SPAREXTALSIZE, e_r7->radio_rfpll_refmaster_sparextalsize); b43_radio_2057_chantab_upload() 700 b43_radio_write(dev, R2057_RFPLL_LOOPFILTER_R1, e_r7->radio_rfpll_loopfilter_r1); b43_radio_2057_chantab_upload() 701 b43_radio_write(dev, R2057_RFPLL_LOOPFILTER_C2, e_r7->radio_rfpll_loopfilter_c2); b43_radio_2057_chantab_upload() 702 b43_radio_write(dev, R2057_RFPLL_LOOPFILTER_C1, e_r7->radio_rfpll_loopfilter_c1); b43_radio_2057_chantab_upload() 703 b43_radio_write(dev, R2057_CP_KPD_IDAC, e_r7->radio_cp_kpd_idac); b43_radio_2057_chantab_upload() 704 b43_radio_write(dev, R2057_RFPLL_MMD0, e_r7->radio_rfpll_mmd0); b43_radio_2057_chantab_upload() 705 b43_radio_write(dev, R2057_RFPLL_MMD1, e_r7->radio_rfpll_mmd1); b43_radio_2057_chantab_upload() 706 b43_radio_write(dev, R2057_VCOBUF_TUNE, e_r7->radio_vcobuf_tune); b43_radio_2057_chantab_upload() 707 b43_radio_write(dev, R2057_LOGEN_MX2G_TUNE, e_r7->radio_logen_mx2g_tune); b43_radio_2057_chantab_upload() 708 b43_radio_write(dev, R2057_LOGEN_MX5G_TUNE, e_r7->radio_logen_mx5g_tune); b43_radio_2057_chantab_upload() 709 b43_radio_write(dev, R2057_LOGEN_INDBUF2G_TUNE, e_r7->radio_logen_indbuf2g_tune); b43_radio_2057_chantab_upload() 710 b43_radio_write(dev, R2057_LOGEN_INDBUF5G_TUNE, e_r7->radio_logen_indbuf5g_tune); b43_radio_2057_chantab_upload() 711 b43_radio_write(dev, R2057_TXMIX2G_TUNE_BOOST_PU_CORE0, e_r7->radio_txmix2g_tune_boost_pu_core0); b43_radio_2057_chantab_upload() 712 b43_radio_write(dev, R2057_PAD2G_TUNE_PUS_CORE0, e_r7->radio_pad2g_tune_pus_core0); b43_radio_2057_chantab_upload() 713 b43_radio_write(dev, R2057_PGA_BOOST_TUNE_CORE0, e_r7->radio_pga_boost_tune_core0); b43_radio_2057_chantab_upload() 714 b43_radio_write(dev, R2057_TXMIX5G_BOOST_TUNE_CORE0, e_r7->radio_txmix5g_boost_tune_core0); b43_radio_2057_chantab_upload() 715 b43_radio_write(dev, R2057_PAD5G_TUNE_MISC_PUS_CORE0, e_r7->radio_pad5g_tune_misc_pus_core0); b43_radio_2057_chantab_upload() 716 b43_radio_write(dev, R2057_LNA2G_TUNE_CORE0, e_r7->radio_lna2g_tune_core0); b43_radio_2057_chantab_upload() 717 b43_radio_write(dev, R2057_LNA5G_TUNE_CORE0, e_r7->radio_lna5g_tune_core0); b43_radio_2057_chantab_upload() 718 b43_radio_write(dev, R2057_TXMIX2G_TUNE_BOOST_PU_CORE1, e_r7->radio_txmix2g_tune_boost_pu_core1); b43_radio_2057_chantab_upload() 719 b43_radio_write(dev, R2057_PAD2G_TUNE_PUS_CORE1, e_r7->radio_pad2g_tune_pus_core1); b43_radio_2057_chantab_upload() 720 b43_radio_write(dev, R2057_PGA_BOOST_TUNE_CORE1, e_r7->radio_pga_boost_tune_core1); b43_radio_2057_chantab_upload() 721 b43_radio_write(dev, R2057_TXMIX5G_BOOST_TUNE_CORE1, e_r7->radio_txmix5g_boost_tune_core1); b43_radio_2057_chantab_upload() 722 b43_radio_write(dev, R2057_PAD5G_TUNE_MISC_PUS_CORE1, e_r7->radio_pad5g_tune_misc_pus_core1); b43_radio_2057_chantab_upload() 723 b43_radio_write(dev, R2057_LNA2G_TUNE_CORE1, e_r7->radio_lna2g_tune_core1); b43_radio_2057_chantab_upload() 724 b43_radio_write(dev, R2057_LNA5G_TUNE_CORE1, e_r7->radio_lna5g_tune_core1); b43_radio_2057_chantab_upload() 728 static void b43_radio_2057_setup(struct b43_wldev dev, b43_radio_2057_setup() argument 732 struct b43_phy phy = &dev->phy; b43_radio_2057_setup() 734 b43_radio_2057_chantab_upload(dev, tabent_r7, tabent_r7_2g); b43_radio_2057_setup() 739 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) { b43_radio_2057_setup() 740 b43_radio_write(dev, R2057_RFPLL_LOOPFILTER_R1, 0x3f); b43_radio_2057_setup() 741 b43_radio_write(dev, R2057_CP_KPD_IDAC, 0x3f); b43_radio_2057_setup() 742 b43_radio_write(dev, R2057_RFPLL_LOOPFILTER_C1, 0x8); b43_radio_2057_setup() 743 b43_radio_write(dev, R2057_RFPLL_LOOPFILTER_C2, 0x8); b43_radio_2057_setup() 745 b43_radio_write(dev, R2057_RFPLL_LOOPFILTER_R1, 0x1f); b43_radio_2057_setup() 746 b43_radio_write(dev, R2057_CP_KPD_IDAC, 0x3f); b43_radio_2057_setup() 747 b43_radio_write(dev, R2057_RFPLL_LOOPFILTER_C1, 0x8); b43_radio_2057_setup() 748 b43_radio_write(dev, R2057_RFPLL_LOOPFILTER_C2, 0x8); b43_radio_2057_setup() 752 b43_radio_write(dev, R2057_LOGEN_PTAT_RESETS, 0x20); b43_radio_2057_setup() 753 b43_radio_write(dev, R2057_VCOBUF_IDACS, 0x18); b43_radio_2057_setup() 754 if (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ) { b43_radio_2057_setup() 755 b43_radio_write(dev, R2057_LOGEN_PTAT_RESETS, 0x38); b43_radio_2057_setup() 756 b43_radio_write(dev, R2057_VCOBUF_IDACS, 0x0f); b43_radio_2057_setup() 758 if (b43_is_40mhz(dev)) { b43_radio_2057_setup() 761 b43_radio_write(dev, b43_radio_2057_setup() 764 b43_radio_write(dev, b43_radio_2057_setup() 771 b43_radio_write(dev, R2057_RFPLL_LOOPFILTER_R1, 0x1b); b43_radio_2057_setup() 772 b43_radio_write(dev, R2057_CP_KPD_IDAC, 0x3f); b43_radio_2057_setup() 773 b43_radio_write(dev, R2057_RFPLL_LOOPFILTER_C1, 0x1f); b43_radio_2057_setup() 774 b43_radio_write(dev, R2057_RFPLL_LOOPFILTER_C2, 0x1f); b43_radio_2057_setup() 778 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) { b43_radio_2057_setup() 782 if (b43_nphy_ipa(dev)) { b43_radio_2057_setup() 796 b43_radio_write(dev, R2057_TXMIX2G_TUNE_BOOST_PU_CORE0, b43_radio_2057_setup() 799 b43_radio_write(dev, R2057_PAD2G_TUNE_PUS_CORE0, b43_radio_2057_setup() 802 b43_radio_write(dev, R2057_TXMIX2G_TUNE_BOOST_PU_CORE1, b43_radio_2057_setup() 805 b43_radio_write(dev, R2057_PAD2G_TUNE_PUS_CORE1, b43_radio_2057_setup() 812 b43_radio_mask(dev, R2057_RFPLL_MISC_EN, ~0x01); b43_radio_2057_setup() 813 b43_radio_mask(dev, R2057_RFPLL_MISC_CAL_RESETN, ~0x04); b43_radio_2057_setup() 814 b43_radio_set(dev, R2057_RFPLL_MISC_CAL_RESETN, 0x4); b43_radio_2057_setup() 815 b43_radio_set(dev, R2057_RFPLL_MISC_EN, 0x01); b43_radio_2057_setup() 822 static u8 b43_radio_2057_rcal(struct b43_wldev dev) b43_radio_2057_rcal() argument 824 struct b43_phy phy = &dev->phy; b43_radio_2057_rcal() 846 saved_regs_phy[i] = b43_phy_read(dev, phy_to_store[i]); b43_radio_2057_rcal() 848 saved_regs_phy_rf[i] = b43_phy_read(dev, phy_to_store_rf[i]); b43_radio_2057_rcal() 852 b43_phy_write(dev, phy_to_store[i], 0); b43_radio_2057_rcal() 853 b43_phy_write(dev, B43_NPHY_REV3_RFCTL_OVER0, 0x07ff); b43_radio_2057_rcal() 854 b43_phy_write(dev, B43_NPHY_REV3_RFCTL_OVER1, 0x07ff); b43_radio_2057_rcal() 855 b43_phy_write(dev, B43_NPHY_REV7_RF_CTL_OVER3, 0x07ff); b43_radio_2057_rcal() 856 b43_phy_write(dev, B43_NPHY_REV7_RF_CTL_OVER4, 0x07ff); b43_radio_2057_rcal() 857 b43_phy_write(dev, B43_NPHY_REV7_RF_CTL_OVER5, 0x007f); b43_radio_2057_rcal() 858 b43_phy_write(dev, B43_NPHY_REV7_RF_CTL_OVER6, 0x007f); b43_radio_2057_rcal() 862 b43_phy_mask(dev, B43_NPHY_REV7_RF_CTL_OVER3, ~0x2); b43_radio_2057_rcal() 864 b43_radio_set(dev, R2057_IQTEST_SEL_PU, 0x1); b43_radio_2057_rcal() 865 b43_radio_maskset(dev, R2057v7_IQTEST_SEL_PU2, ~0x2, 0x1); b43_radio_2057_rcal() 868 b43_phy_set(dev, B43_NPHY_REV7_RF_CTL_OVER3, 0x2); b43_radio_2057_rcal() 869 b43_phy_set(dev, B43_NPHY_REV7_RF_CTL_MISC_REG3, 0x2); b43_radio_2057_rcal() 870 saved_regs_radio[0] = b43_radio_read(dev, R2057_IQTEST_SEL_PU); b43_radio_2057_rcal() 871 b43_radio_write(dev, R2057_IQTEST_SEL_PU, 0x11); b43_radio_2057_rcal() 874 saved_regs_radio[0] = b43_radio_read(dev, R2057_IQTEST_SEL_PU); b43_radio_2057_rcal() 875 saved_regs_radio[1] = b43_radio_read(dev, R2057v7_IQTEST_SEL_PU2); b43_radio_2057_rcal() 876 b43_phy_set(dev, B43_NPHY_REV7_RF_CTL_MISC_REG3, 0x2); b43_radio_2057_rcal() 877 b43_phy_set(dev, B43_NPHY_REV7_RF_CTL_OVER3, 0x2); b43_radio_2057_rcal() 878 b43_radio_write(dev, R2057v7_IQTEST_SEL_PU2, 0x2); b43_radio_2057_rcal() 879 b43_radio_write(dev, R2057_IQTEST_SEL_PU, 0x1); b43_radio_2057_rcal() 884 b43_radio_set(dev, R2057_RCAL_CONFIG, 0x1); b43_radio_2057_rcal() 888 b43_radio_set(dev, R2057_RCAL_CONFIG, 0x2); b43_radio_2057_rcal() 892 b43_radio_mask(dev, R2057_RCAL_CONFIG, ~0x2); b43_radio_2057_rcal() 895 if (!b43_radio_wait_value(dev, R2057_RCAL_STATUS, 1, 1, 100, 1000000)) { b43_radio_2057_rcal() 896 b43err(dev->wl, "Radio 0x2057 rcal timeout\n"); b43_radio_2057_rcal() 899 tmp = b43_radio_read(dev, R2057_RCAL_STATUS) & 0x3E; b43_radio_2057_rcal() 902 b43_radio_mask(dev, R2057_RCAL_CONFIG, ~0x1); b43_radio_2057_rcal() 906 b43_phy_write(dev, phy_to_store_rf[i], saved_regs_phy_rf[i]); b43_radio_2057_rcal() 908 b43_phy_write(dev, phy_to_store[i], saved_regs_phy[i]); b43_radio_2057_rcal() 913 b43_radio_maskset(dev, R2057_TEMPSENSE_CONFIG, ~0x3C, tmp); b43_radio_2057_rcal() 914 b43_radio_maskset(dev, R2057_BANDGAP_RCAL_TRIM, ~0xF0, b43_radio_2057_rcal() 918 b43_radio_mask(dev, R2057_IPA2G_CASCONV_CORE0, ~0x1); b43_radio_2057_rcal() 919 b43_radio_mask(dev, R2057v7_IQTEST_SEL_PU2, ~0x2); b43_radio_2057_rcal() 922 b43_radio_write(dev, R2057_IQTEST_SEL_PU, saved_regs_radio[0]); b43_radio_2057_rcal() 925 b43_radio_write(dev, R2057_IQTEST_SEL_PU, saved_regs_radio[0]); b43_radio_2057_rcal() 926 b43_radio_write(dev, R2057v7_IQTEST_SEL_PU2, saved_regs_radio[1]); b43_radio_2057_rcal() 936 static u16 b43_radio_2057_rccal(struct b43_wldev dev) b43_radio_2057_rccal() argument 938 struct b43_phy phy = &dev->phy; b43_radio_2057_rccal() 945 b43_radio_write(dev, R2057_RCCAL_MASTER, 0x61); b43_radio_2057_rccal() 946 b43_radio_write(dev, R2057_RCCAL_TRC0, 0xC0); b43_radio_2057_rccal() 948 b43_radio_write(dev, R2057v7_RCCAL_MASTER, 0x61); b43_radio_2057_rccal() 949 b43_radio_write(dev, R2057_RCCAL_TRC0, 0xE9); b43_radio_2057_rccal() 951 b43_radio_write(dev, R2057_RCCAL_X1, 0x6E); b43_radio_2057_rccal() 954 b43_radio_write(dev, R2057_RCCAL_START_R1_Q1_P1, 0x55); b43_radio_2057_rccal() 955 if (!b43_radio_wait_value(dev, R2057_RCCAL_DONE_OSCCAP, 2, 2, 500, b43_radio_2057_rccal() 957 b43dbg(dev->wl, "Radio 0x2057 rccal timeout\n"); b43_radio_2057_rccal() 959 b43_radio_write(dev, R2057_RCCAL_START_R1_Q1_P1, 0x15); b43_radio_2057_rccal() 964 b43_radio_write(dev, R2057_RCCAL_MASTER, 0x69); b43_radio_2057_rccal() 965 b43_radio_write(dev, R2057_RCCAL_TRC0, 0xB0); b43_radio_2057_rccal() 967 b43_radio_write(dev, R2057v7_RCCAL_MASTER, 0x69); b43_radio_2057_rccal() 968 b43_radio_write(dev, R2057_RCCAL_TRC0, 0xD5); b43_radio_2057_rccal() 970 b43_radio_write(dev, R2057_RCCAL_X1, 0x6E); b43_radio_2057_rccal() 974 b43_radio_write(dev, R2057_RCCAL_START_R1_Q1_P1, 0x55); b43_radio_2057_rccal() 976 if (!b43_radio_wait_value(dev, R2057_RCCAL_DONE_OSCCAP, 2, 2, 500, b43_radio_2057_rccal() 978 b43dbg(dev->wl, "Radio 0x2057 rccal timeout\n"); b43_radio_2057_rccal() 980 b43_radio_write(dev, R2057_RCCAL_START_R1_Q1_P1, 0x15); b43_radio_2057_rccal() 985 b43_radio_write(dev, R2057_RCCAL_MASTER, 0x73); b43_radio_2057_rccal() 986 b43_radio_write(dev, R2057_RCCAL_X1, 0x28); b43_radio_2057_rccal() 987 b43_radio_write(dev, R2057_RCCAL_TRC0, 0xB0); b43_radio_2057_rccal() 989 b43_radio_write(dev, R2057v7_RCCAL_MASTER, 0x73); b43_radio_2057_rccal() 990 b43_radio_write(dev, R2057_RCCAL_X1, 0x6E); b43_radio_2057_rccal() 991 b43_radio_write(dev, R2057_RCCAL_TRC0, 0x99); b43_radio_2057_rccal() 996 b43_radio_write(dev, R2057_RCCAL_START_R1_Q1_P1, 0x55); b43_radio_2057_rccal() 998 if (!b43_radio_wait_value(dev, R2057_RCCAL_DONE_OSCCAP, 2, 2, 500, b43_radio_2057_rccal() 1000 b43err(dev->wl, "Radio 0x2057 rcal timeout\n"); b43_radio_2057_rccal() 1003 tmp = b43_radio_read(dev, R2057_RCCAL_DONE_OSCCAP); b43_radio_2057_rccal() 1005 b43_radio_write(dev, R2057_RCCAL_START_R1_Q1_P1, 0x15); b43_radio_2057_rccal() 1009 b43_radio_mask(dev, R2057_RCCAL_MASTER, ~0x1); b43_radio_2057_rccal() 1011 b43_radio_mask(dev, R2057v7_RCCAL_MASTER, ~0x1); b43_radio_2057_rccal() 1016 static void b43_radio_2057_init_pre(struct b43_wldev dev) b43_radio_2057_init_pre() argument 1018 b43_phy_mask(dev, B43_NPHY_RFCTL_CMD, ~B43_NPHY_RFCTL_CMD_CHIP0PU); b43_radio_2057_init_pre() 1020 b43_phy_mask(dev, B43_NPHY_RFCTL_CMD, B43_NPHY_RFCTL_CMD_OEPORFORCE); b43_radio_2057_init_pre() 1021 b43_phy_set(dev, B43_NPHY_RFCTL_CMD, ~B43_NPHY_RFCTL_CMD_OEPORFORCE); b43_radio_2057_init_pre() 1022 b43_phy_set(dev, B43_NPHY_RFCTL_CMD, B43_NPHY_RFCTL_CMD_CHIP0PU); b43_radio_2057_init_pre() 1025 static void b43_radio_2057_init_post(struct b43_wldev dev) b43_radio_2057_init_post() argument 1027 b43_radio_set(dev, R2057_XTALPUOVR_PINCTRL, 0x1); b43_radio_2057_init_post() 1030 b43_radio_set(dev, R2057_XTALPUOVR_PINCTRL, 0x2); b43_radio_2057_init_post() 1032 b43_radio_set(dev, R2057_RFPLL_MISC_CAL_RESETN, 0x78); b43_radio_2057_init_post() 1033 b43_radio_set(dev, R2057_XTAL_CONFIG2, 0x80); b43_radio_2057_init_post() 1035 b43_radio_mask(dev, R2057_RFPLL_MISC_CAL_RESETN, ~0x78); b43_radio_2057_init_post() 1036 b43_radio_mask(dev, R2057_XTAL_CONFIG2, ~0x80); b43_radio_2057_init_post() 1038 if (dev->phy.do_full_init) { b43_radio_2057_init_post() 1039 b43_radio_2057_rcal(dev); b43_radio_2057_init_post() 1040 b43_radio_2057_rccal(dev); b43_radio_2057_init_post() 1042 b43_radio_mask(dev, R2057_RFPLL_MASTER, ~0x8); b43_radio_2057_init_post() 1046 static void b43_radio_2057_init(struct b43_wldev dev) b43_radio_2057_init() argument 1048 b43_radio_2057_init_pre(dev); b43_radio_2057_init() 1049 r2057_upload_inittabs(dev); b43_radio_2057_init() 1050 b43_radio_2057_init_post(dev); b43_radio_2057_init() 1057 static void b43_chantab_radio_2056_upload(struct b43_wldev dev, b43_chantab_radio_2056_upload() argument 1060 b43_radio_write(dev, B2056_SYN_PLL_VCOCAL1, e->radio_syn_pll_vcocal1); b43_chantab_radio_2056_upload() 1061 b43_radio_write(dev, B2056_SYN_PLL_VCOCAL2, e->radio_syn_pll_vcocal2); b43_chantab_radio_2056_upload() 1062 b43_radio_write(dev, B2056_SYN_PLL_REFDIV, e->radio_syn_pll_refdiv); b43_chantab_radio_2056_upload() 1063 b43_radio_write(dev, B2056_SYN_PLL_MMD2, e->radio_syn_pll_mmd2); b43_chantab_radio_2056_upload() 1064 b43_radio_write(dev, B2056_SYN_PLL_MMD1, e->radio_syn_pll_mmd1); b43_chantab_radio_2056_upload() 1065 b43_radio_write(dev, B2056_SYN_PLL_LOOPFILTER1, b43_chantab_radio_2056_upload() 1067 b43_radio_write(dev, B2056_SYN_PLL_LOOPFILTER2, b43_chantab_radio_2056_upload() 1069 b43_radio_write(dev, B2056_SYN_PLL_LOOPFILTER3, b43_chantab_radio_2056_upload() 1071 b43_radio_write(dev, B2056_SYN_PLL_LOOPFILTER4, b43_chantab_radio_2056_upload() 1073 b43_radio_write(dev, B2056_SYN_PLL_LOOPFILTER5, b43_chantab_radio_2056_upload() 1075 b43_radio_write(dev, B2056_SYN_RESERVED_ADDR27, b43_chantab_radio_2056_upload() 1077 b43_radio_write(dev, B2056_SYN_RESERVED_ADDR28, b43_chantab_radio_2056_upload() 1079 b43_radio_write(dev, B2056_SYN_RESERVED_ADDR29, b43_chantab_radio_2056_upload() 1081 b43_radio_write(dev, B2056_SYN_LOGEN_VCOBUF1, b43_chantab_radio_2056_upload() 1083 b43_radio_write(dev, B2056_SYN_LOGEN_MIXER2, e->radio_syn_logen_mixer2); b43_chantab_radio_2056_upload() 1084 b43_radio_write(dev, B2056_SYN_LOGEN_BUF3, e->radio_syn_logen_buf3); b43_chantab_radio_2056_upload() 1085 b43_radio_write(dev, B2056_SYN_LOGEN_BUF4, e->radio_syn_logen_buf4); b43_chantab_radio_2056_upload() 1087 b43_radio_write(dev, B2056_RX0 \| B2056_RX_LNAA_TUNE, b43_chantab_radio_2056_upload() 1089 b43_radio_write(dev, B2056_RX0 \| B2056_RX_LNAG_TUNE, b43_chantab_radio_2056_upload() 1092 b43_radio_write(dev, B2056_TX0 \| B2056_TX_INTPAA_BOOST_TUNE, b43_chantab_radio_2056_upload() 1094 b43_radio_write(dev, B2056_TX0 \| B2056_TX_INTPAG_BOOST_TUNE, b43_chantab_radio_2056_upload() 1096 b43_radio_write(dev, B2056_TX0 \| B2056_TX_PADA_BOOST_TUNE, b43_chantab_radio_2056_upload() 1098 b43_radio_write(dev, B2056_TX0 \| B2056_TX_PADG_BOOST_TUNE, b43_chantab_radio_2056_upload() 1100 b43_radio_write(dev, B2056_TX0 \| B2056_TX_PGAA_BOOST_TUNE, b43_chantab_radio_2056_upload() 1102 b43_radio_write(dev, B2056_TX0 \| B2056_TX_PGAG_BOOST_TUNE, b43_chantab_radio_2056_upload() 1104 b43_radio_write(dev, B2056_TX0 \| B2056_TX_MIXA_BOOST_TUNE, b43_chantab_radio_2056_upload() 1106 b43_radio_write(dev, B2056_TX0 \| B2056_TX_MIXG_BOOST_TUNE, b43_chantab_radio_2056_upload() 1109 b43_radio_write(dev, B2056_RX1 \| B2056_RX_LNAA_TUNE, b43_chantab_radio_2056_upload() 1111 b43_radio_write(dev, B2056_RX1 \| B2056_RX_LNAG_TUNE, b43_chantab_radio_2056_upload() 1114 b43_radio_write(dev, B2056_TX1 \| B2056_TX_INTPAA_BOOST_TUNE, b43_chantab_radio_2056_upload() 1116 b43_radio_write(dev, B2056_TX1 \| B2056_TX_INTPAG_BOOST_TUNE, b43_chantab_radio_2056_upload() 1118 b43_radio_write(dev, B2056_TX1 \| B2056_TX_PADA_BOOST_TUNE, b43_chantab_radio_2056_upload() 1120 b43_radio_write(dev, B2056_TX1 \| B2056_TX_PADG_BOOST_TUNE, b43_chantab_radio_2056_upload() 1122 b43_radio_write(dev, B2056_TX1 \| B2056_TX_PGAA_BOOST_TUNE, b43_chantab_radio_2056_upload() 1124 b43_radio_write(dev, B2056_TX1 \| B2056_TX_PGAG_BOOST_TUNE, b43_chantab_radio_2056_upload() 1126 b43_radio_write(dev, B2056_TX1 \| B2056_TX_MIXA_BOOST_TUNE, b43_chantab_radio_2056_upload() 1128 b43_radio_write(dev, B2056_TX1 \| B2056_TX_MIXG_BOOST_TUNE, b43_chantab_radio_2056_upload() 1133 static void b43_radio_2056_setup(struct b43_wldev dev, b43_radio_2056_setup() argument 1136 struct b43_phy phy = &dev->phy; b43_radio_2056_setup() 1137 struct ssb_sprom sprom = dev->dev->bus_sprom; b43_radio_2056_setup() 1138 enum ieee80211_band band = b43_current_band(dev->wl); b43_radio_2056_setup() 1146 B43_WARN_ON(dev->phy.rev < 3); b43_radio_2056_setup() 1149 ((dev->dev->chip_id == BCMA_CHIP_ID_BCM43224 \|\| b43_radio_2056_setup() 1150 dev->dev->chip_id == BCMA_CHIP_ID_BCM43225 \|\| b43_radio_2056_setup() 1151 dev->dev->chip_id == BCMA_CHIP_ID_BCM43421) && b43_radio_2056_setup() 1152 dev->dev->chip_pkg == BCMA_PKG_ID_BCM43224_FAB_SMIC); b43_radio_2056_setup() 1154 b43_chantab_radio_2056_upload(dev, e); b43_radio_2056_setup() 1155 b2056_upload_syn_pll_cp2(dev, band == IEEE80211_BAND_5GHZ); b43_radio_2056_setup() 1158 b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) { b43_radio_2056_setup() 1159 b43_radio_write(dev, B2056_SYN_PLL_LOOPFILTER1, 0x1F); b43_radio_2056_setup() 1160 b43_radio_write(dev, B2056_SYN_PLL_LOOPFILTER2, 0x1F); b43_radio_2056_setup() 1161 if (dev->dev->chip_id == BCMA_CHIP_ID_BCM4716 \|\| b43_radio_2056_setup() 1162 dev->dev->chip_id == BCMA_CHIP_ID_BCM47162) { b43_radio_2056_setup() 1163 b43_radio_write(dev, B2056_SYN_PLL_LOOPFILTER4, 0x14); b43_radio_2056_setup() 1164 b43_radio_write(dev, B2056_SYN_PLL_CP2, 0); b43_radio_2056_setup() 1166 b43_radio_write(dev, B2056_SYN_PLL_LOOPFILTER4, 0x0B); b43_radio_2056_setup() 1167 b43_radio_write(dev, B2056_SYN_PLL_CP2, 0x14); b43_radio_2056_setup() 1171 b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) { b43_radio_2056_setup() 1172 b43_radio_write(dev, B2056_SYN_PLL_LOOPFILTER1, 0x1f); b43_radio_2056_setup() 1173 b43_radio_write(dev, B2056_SYN_PLL_LOOPFILTER2, 0x1f); b43_radio_2056_setup() 1174 b43_radio_write(dev, B2056_SYN_PLL_LOOPFILTER4, 0x0b); b43_radio_2056_setup() 1175 b43_radio_write(dev, B2056_SYN_PLL_CP2, 0x20); b43_radio_2056_setup() 1178 b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ) { b43_radio_2056_setup() 1179 b43_radio_write(dev, B2056_SYN_PLL_LOOPFILTER1, 0x1F); b43_radio_2056_setup() 1180 b43_radio_write(dev, B2056_SYN_PLL_LOOPFILTER2, 0x1F); b43_radio_2056_setup() 1181 b43_radio_write(dev, B2056_SYN_PLL_LOOPFILTER4, 0x05); b43_radio_2056_setup() 1182 b43_radio_write(dev, B2056_SYN_PLL_CP2, 0x0C); b43_radio_2056_setup() 1185 if (dev->phy.n->ipa2g_on && band == IEEE80211_BAND_2GHZ) { b43_radio_2056_setup() 1188 if (dev->phy.rev >= 5) { b43_radio_2056_setup() 1189 b43_radio_write(dev, b43_radio_2056_setup() 1192 if (dev->dev->chip_id == BCMA_CHIP_ID_BCM4716 \|\| b43_radio_2056_setup() 1193 dev->dev->chip_id == BCMA_CHIP_ID_BCM47162) { b43_radio_2056_setup() 1212 b43_radio_write(dev, b43_radio_2056_setup() 1215 b43_radio_write(dev, b43_radio_2056_setup() 1218 b43_radio_write(dev, b43_radio_2056_setup() 1221 b43_radio_write(dev, b43_radio_2056_setup() 1224 b43_radio_write(dev, b43_radio_2056_setup() 1227 b43_radio_write(dev, b43_radio_2056_setup() 1230 b43_radio_write(dev, b43_radio_2056_setup() 1234 bias = b43_is_40mhz(dev) ? 0x40 : 0x20; b43_radio_2056_setup() 1235 b43_radio_write(dev, b43_radio_2056_setup() 1238 b43_radio_write(dev, b43_radio_2056_setup() 1241 b43_radio_write(dev, b43_radio_2056_setup() 1245 b43_radio_write(dev, offset \| B2056_TX_PA_SPARE1, 0xee); b43_radio_2056_setup() 1247 } else if (dev->phy.n->ipa5g_on && band == IEEE80211_BAND_5GHZ) { b43_radio_2056_setup() 1279 b43_radio_write(dev, b43_radio_2056_setup() 1281 b43_radio_write(dev, b43_radio_2056_setup() 1283 b43_radio_write(dev, b43_radio_2056_setup() 1285 b43_radio_write(dev, b43_radio_2056_setup() 1287 b43_radio_write(dev, b43_radio_2056_setup() 1289 b43_radio_write(dev, b43_radio_2056_setup() 1291 b43_radio_write(dev, b43_radio_2056_setup() 1293 b43_radio_write(dev, b43_radio_2056_setup() 1295 b43_radio_write(dev, b43_radio_2056_setup() 1297 b43_radio_write(dev, b43_radio_2056_setup() 1304 b43_radio_write(dev, B2056_SYN_PLL_VCOCAL12, 0x00); b43_radio_2056_setup() 1305 b43_radio_write(dev, B2056_TX_INTPAA_PA_MISC, 0x38); b43_radio_2056_setup() 1306 b43_radio_write(dev, B2056_TX_INTPAA_PA_MISC, 0x18); b43_radio_2056_setup() 1307 b43_radio_write(dev, B2056_TX_INTPAA_PA_MISC, 0x38); b43_radio_2056_setup() 1308 b43_radio_write(dev, B2056_TX_INTPAA_PA_MISC, 0x39); b43_radio_2056_setup() 1312 static u8 b43_radio_2056_rcal(struct b43_wldev dev) b43_radio_2056_rcal() argument 1314 struct b43_phy phy = &dev->phy; b43_radio_2056_rcal() 1320 mast2 = b43_radio_read(dev, B2056_SYN_PLL_MAST2); b43_radio_2056_rcal() 1321 b43_radio_write(dev, B2056_SYN_PLL_MAST2, mast2 \| 0x7); b43_radio_2056_rcal() 1324 b43_radio_write(dev, B2056_SYN_RCAL_MASTER, 0x01); b43_radio_2056_rcal() 1326 b43_radio_write(dev, B2056_SYN_RCAL_MASTER, 0x09); b43_radio_2056_rcal() 1328 if (!b43_radio_wait_value(dev, B2056_SYN_RCAL_CODE_OUT, 0x80, 0x80, 100, b43_radio_2056_rcal() 1330 b43err(dev->wl, "Radio recalibration timeout\n"); b43_radio_2056_rcal() 1334 b43_radio_write(dev, B2056_SYN_RCAL_MASTER, 0x01); b43_radio_2056_rcal() 1335 tmp = b43_radio_read(dev, B2056_SYN_RCAL_CODE_OUT); b43_radio_2056_rcal() 1336 b43_radio_write(dev, B2056_SYN_RCAL_MASTER, 0x00); b43_radio_2056_rcal() 1338 b43_radio_write(dev, B2056_SYN_PLL_MAST2, mast2); b43_radio_2056_rcal() 1343 static void b43_radio_init2056_pre(struct b43_wldev dev) b43_radio_init2056_pre() argument 1345 b43_phy_mask(dev, B43_NPHY_RFCTL_CMD, b43_radio_init2056_pre() 1348 b43_phy_mask(dev, B43_NPHY_RFCTL_CMD, b43_radio_init2056_pre() 1350 b43_phy_set(dev, B43_NPHY_RFCTL_CMD, b43_radio_init2056_pre() 1352 b43_phy_set(dev, B43_NPHY_RFCTL_CMD, b43_radio_init2056_pre() 1356 static void b43_radio_init2056_post(struct b43_wldev dev) b43_radio_init2056_post() argument 1358 b43_radio_set(dev, B2056_SYN_COM_CTRL, 0xB); b43_radio_init2056_post() 1359 b43_radio_set(dev, B2056_SYN_COM_PU, 0x2); b43_radio_init2056_post() 1360 b43_radio_set(dev, B2056_SYN_COM_RESET, 0x2); b43_radio_init2056_post() 1362 b43_radio_mask(dev, B2056_SYN_COM_RESET, ~0x2); b43_radio_init2056_post() 1363 b43_radio_mask(dev, B2056_SYN_PLL_MAST2, ~0xFC); b43_radio_init2056_post() 1364 b43_radio_mask(dev, B2056_SYN_RCCAL_CTRL0, ~0x1); b43_radio_init2056_post() 1365 if (dev->phy.do_full_init) b43_radio_init2056_post() 1366 b43_radio_2056_rcal(dev); b43_radio_init2056_post() 1373 static void b43_radio_init2056(struct b43_wldev dev) b43_radio_init2056() argument 1375 b43_radio_init2056_pre(dev); b43_radio_init2056() 1376 b2056_upload_inittabs(dev, 0, 0); b43_radio_init2056() 1377 b43_radio_init2056_post(dev); b43_radio_init2056() 1384 static void b43_chantab_radio_upload(struct b43_wldev dev, b43_chantab_radio_upload() argument 1387 b43_radio_write(dev, B2055_PLL_REF, e->radio_pll_ref); b43_chantab_radio_upload() 1388 b43_radio_write(dev, B2055_RF_PLLMOD0, e->radio_rf_pllmod0); b43_chantab_radio_upload() 1389 b43_radio_write(dev, B2055_RF_PLLMOD1, e->radio_rf_pllmod1); b43_chantab_radio_upload() 1390 b43_radio_write(dev, B2055_VCO_CAPTAIL, e->radio_vco_captail); b43_chantab_radio_upload() 1391 b43_read32(dev, B43_MMIO_MACCTL); /* flush writes / b43_chantab_radio_upload() 1393 b43_radio_write(dev, B2055_VCO_CAL1, e->radio_vco_cal1); b43_chantab_radio_upload() 1394 b43_radio_write(dev, B2055_VCO_CAL2, e->radio_vco_cal2); b43_chantab_radio_upload() 1395 b43_radio_write(dev, B2055_PLL_LFC1, e->radio_pll_lfc1); b43_chantab_radio_upload() 1396 b43_radio_write(dev, B2055_PLL_LFR1, e->radio_pll_lfr1); b43_chantab_radio_upload() 1397 b43_read32(dev, B43_MMIO_MACCTL); / flush writes / b43_chantab_radio_upload() 1399 b43_radio_write(dev, B2055_PLL_LFC2, e->radio_pll_lfc2); b43_chantab_radio_upload() 1400 b43_radio_write(dev, B2055_LGBUF_CENBUF, e->radio_lgbuf_cenbuf); b43_chantab_radio_upload() 1401 b43_radio_write(dev, B2055_LGEN_TUNE1, e->radio_lgen_tune1); b43_chantab_radio_upload() 1402 b43_radio_write(dev, B2055_LGEN_TUNE2, e->radio_lgen_tune2); b43_chantab_radio_upload() 1403 b43_read32(dev, B43_MMIO_MACCTL); / flush writes / b43_chantab_radio_upload() 1405 b43_radio_write(dev, B2055_C1_LGBUF_ATUNE, e->radio_c1_lgbuf_atune); b43_chantab_radio_upload() 1406 b43_radio_write(dev, B2055_C1_LGBUF_GTUNE, e->radio_c1_lgbuf_gtune); b43_chantab_radio_upload() 1407 b43_radio_write(dev, B2055_C1_RX_RFR1, e->radio_c1_rx_rfr1); b43_chantab_radio_upload() 1408 b43_radio_write(dev, B2055_C1_TX_PGAPADTN, e->radio_c1_tx_pgapadtn); b43_chantab_radio_upload() 1409 b43_read32(dev, B43_MMIO_MACCTL); / flush writes / b43_chantab_radio_upload() 1411 b43_radio_write(dev, B2055_C1_TX_MXBGTRIM, e->radio_c1_tx_mxbgtrim); b43_chantab_radio_upload() 1412 b43_radio_write(dev, B2055_C2_LGBUF_ATUNE, e->radio_c2_lgbuf_atune); b43_chantab_radio_upload() 1413 b43_radio_write(dev, B2055_C2_LGBUF_GTUNE, e->radio_c2_lgbuf_gtune); b43_chantab_radio_upload() 1414 b43_radio_write(dev, B2055_C2_RX_RFR1, e->radio_c2_rx_rfr1); b43_chantab_radio_upload() 1415 b43_read32(dev, B43_MMIO_MACCTL); / flush writes / b43_chantab_radio_upload() 1417 b43_radio_write(dev, B2055_C2_TX_PGAPADTN, e->radio_c2_tx_pgapadtn); b43_chantab_radio_upload() 1418 b43_radio_write(dev, B2055_C2_TX_MXBGTRIM, e->radio_c2_tx_mxbgtrim); b43_chantab_radio_upload() 1422 static void b43_radio_2055_setup(struct b43_wldev dev, b43_radio_2055_setup() argument 1425 B43_WARN_ON(dev->phy.rev >= 3); b43_radio_2055_setup() 1427 b43_chantab_radio_upload(dev, e); b43_radio_2055_setup() 1429 b43_radio_write(dev, B2055_VCO_CAL10, 0x05); b43_radio_2055_setup() 1430 b43_radio_write(dev, B2055_VCO_CAL10, 0x45); b43_radio_2055_setup() 1431 b43_read32(dev, B43_MMIO_MACCTL); /* flush writes / b43_radio_2055_setup() 1432 b43_radio_write(dev, B2055_VCO_CAL10, 0x65); b43_radio_2055_setup() 1436 static void b43_radio_init2055_pre(struct b43_wldev dev) b43_radio_init2055_pre() argument 1438 b43_phy_mask(dev, B43_NPHY_RFCTL_CMD, b43_radio_init2055_pre() 1440 b43_phy_set(dev, B43_NPHY_RFCTL_CMD, b43_radio_init2055_pre() 1443 b43_phy_set(dev, B43_NPHY_RFCTL_CMD, b43_radio_init2055_pre() 1447 static void b43_radio_init2055_post(struct b43_wldev dev) b43_radio_init2055_post() argument 1449 struct b43_phy_n nphy = dev->phy.n; b43_radio_init2055_post() 1450 struct ssb_sprom sprom = dev->dev->bus_sprom; b43_radio_init2055_post() 1454 workaround = (dev->dev->board_vendor != PCI_VENDOR_ID_BROADCOM b43_radio_init2055_post() 1455 && dev->dev->board_type == SSB_BOARD_CB2_4321 b43_radio_init2055_post() 1456 && dev->dev->board_rev >= 0x41); b43_radio_init2055_post() 1461 b43_radio_mask(dev, B2055_MASTER1, 0xFFF3); b43_radio_init2055_post() 1463 b43_radio_mask(dev, B2055_C1_RX_BB_REG, 0x7F); b43_radio_init2055_post() 1464 b43_radio_mask(dev, B2055_C2_RX_BB_REG, 0x7F); b43_radio_init2055_post() 1466 b43_radio_maskset(dev, B2055_RRCCAL_NOPTSEL, 0xFFC0, 0x2C); b43_radio_init2055_post() 1467 b43_radio_write(dev, B2055_CAL_MISC, 0x3C); b43_radio_init2055_post() 1468 b43_radio_mask(dev, B2055_CAL_MISC, 0xFFBE); b43_radio_init2055_post() 1469 b43_radio_set(dev, B2055_CAL_LPOCTL, 0x80); b43_radio_init2055_post() 1470 b43_radio_set(dev, B2055_CAL_MISC, 0x1); b43_radio_init2055_post() 1472 b43_radio_set(dev, B2055_CAL_MISC, 0x40); b43_radio_init2055_post() 1473 if (!b43_radio_wait_value(dev, B2055_CAL_COUT2, 0x80, 0x80, 10, 2000)) b43_radio_init2055_post() 1474 b43err(dev->wl, "radio post init timeout\n"); b43_radio_init2055_post() 1475 b43_radio_mask(dev, B2055_CAL_LPOCTL, 0xFF7F); b43_radio_init2055_post() 1476 b43_switch_channel(dev, dev->phy.channel); b43_radio_init2055_post() 1477 b43_radio_write(dev, B2055_C1_RX_BB_LPF, 0x9); b43_radio_init2055_post() 1478 b43_radio_write(dev, B2055_C2_RX_BB_LPF, 0x9); b43_radio_init2055_post() 1479 b43_radio_write(dev, B2055_C1_RX_BB_MIDACHP, 0x83); b43_radio_init2055_post() 1480 b43_radio_write(dev, B2055_C2_RX_BB_MIDACHP, 0x83); b43_radio_init2055_post() 1481 b43_radio_maskset(dev, B2055_C1_LNA_GAINBST, 0xFFF8, 0x6); b43_radio_init2055_post() 1482 b43_radio_maskset(dev, B2055_C2_LNA_GAINBST, 0xFFF8, 0x6); b43_radio_init2055_post() 1484 b43_radio_set(dev, B2055_C1_RX_RFSPC1, 0x2); b43_radio_init2055_post() 1485 b43_radio_set(dev, B2055_C2_RX_RFSPC1, 0x2); b43_radio_init2055_post() 1487 b43_radio_mask(dev, B2055_C1_RX_RFSPC1, 0xFFFD); b43_radio_init2055_post() 1488 b43_radio_mask(dev, B2055_C2_RX_RFSPC1, 0xFFFD); b43_radio_init2055_post() 1497 static void b43_radio_init2055(struct b43_wldev dev) b43_radio_init2055() argument 1499 b43_radio_init2055_pre(dev); b43_radio_init2055() 1500 if (b43_status(dev) < B43_STAT_INITIALIZED) { b43_radio_init2055() 1502 b2055_upload_inittab(dev, 0, 0); b43_radio_init2055() 1504 bool ghz5 = b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ; b43_radio_init2055() 1505 b2055_upload_inittab(dev, ghz5, 0); b43_radio_init2055() 1507 b43_radio_init2055_post(dev); b43_radio_init2055() 1515 static int b43_nphy_load_samples(struct b43_wldev dev, b43_nphy_load_samples() argument 1517 struct b43_phy_n nphy = dev->phy.n; b43_nphy_load_samples() 1523 b43err(dev->wl, "allocation for samples loading failed\n"); b43_nphy_load_samples() 1527 b43_nphy_stay_in_carrier_search(dev, 1); b43_nphy_load_samples() 1533 b43_ntab_write_bulk(dev, B43_NTAB32(17, 0), len, data); b43_nphy_load_samples() 1537 b43_nphy_stay_in_carrier_search(dev, 0); b43_nphy_load_samples() 1542 static u16 b43_nphy_gen_load_samples(struct b43_wldev dev, u32 freq, u16 max, b43_nphy_gen_load_samples() argument 1549 bw = b43_is_40mhz(dev) ? 40 : 20; b43_nphy_gen_load_samples() 1553 if (b43_phy_read(dev, B43_NPHY_BBCFG) & B43_NPHY_BBCFG_RSTRX) b43_nphy_gen_load_samples() 1558 if (b43_is_40mhz(dev)) b43_nphy_gen_load_samples() 1566 b43err(dev->wl, "allocation for samples generation failed\n"); b43_nphy_gen_load_samples() 1579 i = b43_nphy_load_samples(dev, samples, len); b43_nphy_gen_load_samples() 1585 static void b43_nphy_run_samples(struct b43_wldev dev, u16 samps, u16 loops, b43_nphy_run_samples() argument 1589 struct b43_phy phy = &dev->phy; b43_nphy_run_samples() 1590 struct b43_phy_n nphy = dev->phy.n; b43_nphy_run_samples() 1595 b43_nphy_stay_in_carrier_search(dev, true); b43_nphy_run_samples() 1600 lpf_bw3 = b43_phy_read(dev, B43_NPHY_REV7_RF_CTL_OVER3) & 0x80; b43_nphy_run_samples() 1601 lpf_bw4 = b43_phy_read(dev, B43_NPHY_REV7_RF_CTL_OVER4) & 0x80; b43_nphy_run_samples() 1606 u16 value = b43_nphy_read_lpf_ctl(dev, 0); b43_nphy_run_samples() 1608 b43_nphy_rf_ctl_override_rev19(dev, 0x80, value, b43_nphy_run_samples() 1611 b43_nphy_rf_ctl_override_rev7(dev, 0x80, value, b43_nphy_run_samples() 1618 tmp = b43_ntab_read(dev, B43_NTAB16(15, 87)); b43_nphy_run_samples() 1623 tmp = !b43_is_40mhz(dev) ? 0x6464 : 0x4747; b43_nphy_run_samples() 1624 b43_ntab_write(dev, B43_NTAB16(15, 87), tmp); b43_nphy_run_samples() 1627 b43_phy_write(dev, B43_NPHY_SAMP_DEPCNT, (samps - 1)); b43_nphy_run_samples() 1630 b43_phy_write(dev, B43_NPHY_SAMP_LOOPCNT, (loops - 1)); b43_nphy_run_samples() 1632 b43_phy_write(dev, B43_NPHY_SAMP_LOOPCNT, loops); b43_nphy_run_samples() 1634 b43_phy_write(dev, B43_NPHY_SAMP_WAITCNT, wait); b43_nphy_run_samples() 1636 seq_mode = b43_phy_read(dev, B43_NPHY_RFSEQMODE); b43_nphy_run_samples() 1638 b43_phy_set(dev, B43_NPHY_RFSEQMODE, B43_NPHY_RFSEQMODE_CAOVER); b43_nphy_run_samples() 1640 b43_phy_mask(dev, B43_NPHY_IQLOCAL_CMDGCTL, 0x7FFF); b43_nphy_run_samples() 1641 b43_phy_set(dev, B43_NPHY_IQLOCAL_CMDGCTL, 0x8000); b43_nphy_run_samples() 1644 b43_phy_write(dev, B43_NPHY_SAMP_CMD, tmp); b43_nphy_run_samples() 1647 if (!(b43_phy_read(dev, B43_NPHY_RFSEQST) & 1)) { b43_nphy_run_samples() 1654 b43err(dev->wl, "run samples timeout\n"); b43_nphy_run_samples() 1656 b43_phy_write(dev, B43_NPHY_RFSEQMODE, seq_mode); b43_nphy_run_samples() 1658 b43_nphy_stay_in_carrier_search(dev, false); b43_nphy_run_samples() 1666 static void b43_nphy_scale_offset_rssi(struct b43_wldev dev, u16 scale, b43_nphy_scale_offset_rssi() argument 1681 b43_phy_write(dev, B43_NPHY_RSSIMC_0I_RSSI_Z, tmp); b43_nphy_scale_offset_rssi() 1683 b43_phy_write(dev, B43_NPHY_RSSIMC_0Q_RSSI_Z, tmp); b43_nphy_scale_offset_rssi() 1685 b43_phy_write(dev, B43_NPHY_RSSIMC_1I_RSSI_Z, tmp); b43_nphy_scale_offset_rssi() 1687 b43_phy_write(dev, B43_NPHY_RSSIMC_1Q_RSSI_Z, tmp); b43_nphy_scale_offset_rssi() 1691 b43_phy_write(dev, B43_NPHY_RSSIMC_0I_RSSI_X, tmp); b43_nphy_scale_offset_rssi() 1693 b43_phy_write(dev, B43_NPHY_RSSIMC_0Q_RSSI_X, tmp); b43_nphy_scale_offset_rssi() 1695 b43_phy_write(dev, B43_NPHY_RSSIMC_1I_RSSI_X, tmp); b43_nphy_scale_offset_rssi() 1697 b43_phy_write(dev, B43_NPHY_RSSIMC_1Q_RSSI_X, tmp); b43_nphy_scale_offset_rssi() 1701 b43_phy_write(dev, B43_NPHY_RSSIMC_0I_RSSI_Y, tmp); b43_nphy_scale_offset_rssi() 1703 b43_phy_write(dev, B43_NPHY_RSSIMC_0Q_RSSI_Y, tmp); b43_nphy_scale_offset_rssi() 1705 b43_phy_write(dev, B43_NPHY_RSSIMC_1I_RSSI_Y, tmp); b43_nphy_scale_offset_rssi() 1707 b43_phy_write(dev, B43_NPHY_RSSIMC_1Q_RSSI_Y, tmp); b43_nphy_scale_offset_rssi() 1711 b43_phy_write(dev, B43_NPHY_RSSIMC_0I_TBD, tmp); b43_nphy_scale_offset_rssi() 1713 b43_phy_write(dev, B43_NPHY_RSSIMC_0Q_TBD, tmp); b43_nphy_scale_offset_rssi() 1715 b43_phy_write(dev, B43_NPHY_RSSIMC_1I_TBD, tmp); b43_nphy_scale_offset_rssi() 1717 b43_phy_write(dev, B43_NPHY_RSSIMC_1Q_TBD, tmp); b43_nphy_scale_offset_rssi() 1721 b43_phy_write(dev, B43_NPHY_RSSIMC_0I_PWRDET, tmp); b43_nphy_scale_offset_rssi() 1723 b43_phy_write(dev, B43_NPHY_RSSIMC_0Q_PWRDET, tmp); b43_nphy_scale_offset_rssi() 1725 b43_phy_write(dev, B43_NPHY_RSSIMC_1I_PWRDET, tmp); b43_nphy_scale_offset_rssi() 1727 b43_phy_write(dev, B43_NPHY_RSSIMC_1Q_PWRDET, tmp); b43_nphy_scale_offset_rssi() 1731 b43_phy_write(dev, B43_NPHY_RSSIMC_0I_TSSI, tmp); b43_nphy_scale_offset_rssi() 1733 b43_phy_write(dev, B43_NPHY_RSSIMC_1I_TSSI, tmp); b43_nphy_scale_offset_rssi() 1737 b43_phy_write(dev, B43_NPHY_RSSIMC_0Q_TSSI, tmp); b43_nphy_scale_offset_rssi() 1739 b43_phy_write(dev, B43_NPHY_RSSIMC_1Q_TSSI, tmp); b43_nphy_scale_offset_rssi() 1744 static void b43_nphy_rssi_select_rev19(struct b43_wldev dev, u8 code, b43_nphy_rssi_select_rev19() argument 1750 static void b43_nphy_rev3_rssi_select(struct b43_wldev dev, u8 code, b43_nphy_rev3_rssi_select() argument 1757 b43_phy_mask(dev, B43_NPHY_AFECTL_OVER1, 0xFDFF); b43_nphy_rev3_rssi_select() 1758 b43_phy_mask(dev, B43_NPHY_AFECTL_OVER, 0xFDFF); b43_nphy_rev3_rssi_select() 1759 b43_phy_mask(dev, B43_NPHY_AFECTL_C1, 0xFCFF); b43_nphy_rev3_rssi_select() 1760 b43_phy_mask(dev, B43_NPHY_AFECTL_C2, 0xFCFF); b43_nphy_rev3_rssi_select() 1761 b43_phy_mask(dev, B43_NPHY_TXF_40CO_B1S0, 0xFFDF); b43_nphy_rev3_rssi_select() 1762 b43_phy_mask(dev, B43_NPHY_TXF_40CO_B32S1, 0xFFDF); b43_nphy_rev3_rssi_select() 1763 b43_phy_mask(dev, B43_NPHY_RFCTL_LUT_TRSW_UP1, 0xFFC3); b43_nphy_rev3_rssi_select() 1764 b43_phy_mask(dev, B43_NPHY_RFCTL_LUT_TRSW_UP2, 0xFFC3); b43_nphy_rev3_rssi_select() 1772 b43_phy_maskset(dev, reg, 0xFDFF, 0x0200); b43_nphy_rev3_rssi_select() 1780 b43_phy_maskset(dev, reg, 0xFCFF, 0); b43_nphy_rev3_rssi_select() 1785 b43_phy_maskset(dev, reg, 0xFFC3, 0); b43_nphy_rev3_rssi_select() 1788 val = (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ) ? 4 : 8; b43_nphy_rev3_rssi_select() 1793 b43_phy_set(dev, reg, val); b43_nphy_rev3_rssi_select() 1798 b43_phy_set(dev, reg, 0x0020); b43_nphy_rev3_rssi_select() 1811 b43_phy_maskset(dev, reg, 0xFCFF, val); b43_nphy_rev3_rssi_select() 1812 b43_phy_maskset(dev, reg, 0xF3FF, val << 2); b43_nphy_rev3_rssi_select() 1817 b43_current_band(dev->wl); b43_nphy_rev3_rssi_select() 1819 if (dev->phy.rev < 7) { b43_nphy_rev3_rssi_select() 1820 if (b43_nphy_ipa(dev)) b43_nphy_rev3_rssi_select() 1826 b43_radio_write(dev, reg, val); b43_nphy_rev3_rssi_select() 1832 b43_phy_set(dev, reg, 0x0200); b43_nphy_rev3_rssi_select() 1839 static void b43_nphy_rev2_rssi_select(struct b43_wldev dev, u8 code, b43_nphy_rev2_rssi_select() argument 1863 b43_phy_maskset(dev, B43_NPHY_AFECTL_C1, 0x0FFF, val); b43_nphy_rev2_rssi_select() 1864 b43_phy_maskset(dev, B43_NPHY_AFECTL_C2, 0x0FFF, val); b43_nphy_rev2_rssi_select() 1867 b43_phy_maskset(dev, B43_NPHY_RFCTL_RSSIO1, 0xFFCF, b43_nphy_rev2_rssi_select() 1869 b43_phy_maskset(dev, B43_NPHY_RFCTL_RSSIO2, 0xFFCF, b43_nphy_rev2_rssi_select() 1874 b43_phy_mask(dev, B43_NPHY_AFECTL_OVER, ~0x3000); b43_nphy_rev2_rssi_select() 1876 b43_phy_mask(dev, B43_NPHY_RFCTL_CMD, b43_nphy_rev2_rssi_select() 1879 b43_phy_mask(dev, B43_NPHY_RFCTL_OVER, b43_nphy_rev2_rssi_select() 1884 b43_phy_mask(dev, B43_NPHY_RFCTL_CMD, b43_nphy_rev2_rssi_select() 1887 b43_phy_mask(dev, B43_NPHY_RFCTL_OVER, ~0x1); b43_nphy_rev2_rssi_select() 1890 b43_phy_set(dev, B43_NPHY_AFECTL_OVER, 0x3000); b43_nphy_rev2_rssi_select() 1892 b43_phy_maskset(dev, B43_NPHY_RFCTL_CMD, b43_nphy_rev2_rssi_select() 1897 b43_phy_set(dev, B43_NPHY_RFCTL_OVER, b43_nphy_rev2_rssi_select() 1902 b43_phy_set(dev, B43_NPHY_RFCTL_CMD, b43_nphy_rev2_rssi_select() 1905 b43_phy_mask(dev, B43_NPHY_RFCTL_OVER, ~0x1); b43_nphy_rev2_rssi_select() 1911 static void b43_nphy_rssi_select(struct b43_wldev dev, u8 code, b43_nphy_rssi_select() argument 1914 if (dev->phy.rev >= 19) b43_nphy_rssi_select() 1915 b43_nphy_rssi_select_rev19(dev, code, type); b43_nphy_rssi_select() 1916 else if (dev->phy.rev >= 3) b43_nphy_rssi_select() 1917 b43_nphy_rev3_rssi_select(dev, code, type); b43_nphy_rssi_select() 1919 b43_nphy_rev2_rssi_select(dev, code, type); b43_nphy_rssi_select() 1923 static void b43_nphy_set_rssi_2055_vcm(struct b43_wldev dev, b43_nphy_set_rssi_2055_vcm() argument 1930 b43_radio_maskset(dev, B2055_C1_B0NB_RSSIVCM, b43_nphy_set_rssi_2055_vcm() 1932 b43_radio_maskset(dev, B2055_C1_RX_BB_RSSICTL5, b43_nphy_set_rssi_2055_vcm() 1935 b43_radio_maskset(dev, B2055_C2_B0NB_RSSIVCM, b43_nphy_set_rssi_2055_vcm() 1937 b43_radio_maskset(dev, B2055_C2_RX_BB_RSSICTL5, b43_nphy_set_rssi_2055_vcm() 1942 b43_radio_maskset(dev, B2055_C1_RX_BB_RSSICTL5, b43_nphy_set_rssi_2055_vcm() 1945 b43_radio_maskset(dev, B2055_C2_RX_BB_RSSICTL5, b43_nphy_set_rssi_2055_vcm() 1952 static int b43_nphy_poll_rssi(struct b43_wldev dev, enum n_rssi_type rssi_type, b43_nphy_poll_rssi() argument 1962 if (dev->phy.rev >= 3) { b43_nphy_poll_rssi() 1963 save_regs_phy[0] = b43_phy_read(dev, B43_NPHY_AFECTL_C1); b43_nphy_poll_rssi() 1964 save_regs_phy[1] = b43_phy_read(dev, B43_NPHY_AFECTL_C2); b43_nphy_poll_rssi() 1965 save_regs_phy[2] = b43_phy_read(dev, b43_nphy_poll_rssi() 1967 save_regs_phy[3] = b43_phy_read(dev, b43_nphy_poll_rssi() 1969 save_regs_phy[4] = b43_phy_read(dev, B43_NPHY_AFECTL_OVER1); b43_nphy_poll_rssi() 1970 save_regs_phy[5] = b43_phy_read(dev, B43_NPHY_AFECTL_OVER); b43_nphy_poll_rssi() 1971 save_regs_phy[6] = b43_phy_read(dev, B43_NPHY_TXF_40CO_B1S0); b43_nphy_poll_rssi() 1972 save_regs_phy[7] = b43_phy_read(dev, B43_NPHY_TXF_40CO_B32S1); b43_nphy_poll_rssi() 1975 save_regs_phy[0] = b43_phy_read(dev, B43_NPHY_AFECTL_C1); b43_nphy_poll_rssi() 1976 save_regs_phy[1] = b43_phy_read(dev, B43_NPHY_AFECTL_C2); b43_nphy_poll_rssi() 1977 save_regs_phy[2] = b43_phy_read(dev, B43_NPHY_AFECTL_OVER); b43_nphy_poll_rssi() 1978 save_regs_phy[3] = b43_phy_read(dev, B43_NPHY_RFCTL_CMD); b43_nphy_poll_rssi() 1979 save_regs_phy[4] = b43_phy_read(dev, B43_NPHY_RFCTL_OVER); b43_nphy_poll_rssi() 1980 save_regs_phy[5] = b43_phy_read(dev, B43_NPHY_RFCTL_RSSIO1); b43_nphy_poll_rssi() 1981 save_regs_phy[6] = b43_phy_read(dev, B43_NPHY_RFCTL_RSSIO2); b43_nphy_poll_rssi() 1986 b43_nphy_rssi_select(dev, 5, rssi_type); b43_nphy_poll_rssi() 1988 if (dev->phy.rev < 2) { b43_nphy_poll_rssi() 1989 save_regs_phy[8] = b43_phy_read(dev, B43_NPHY_GPIO_SEL); b43_nphy_poll_rssi() 1990 b43_phy_write(dev, B43_NPHY_GPIO_SEL, 5); b43_nphy_poll_rssi() 1997 if (dev->phy.rev < 2) { b43_nphy_poll_rssi() 1998 s[0] = b43_phy_read(dev, B43_NPHY_GPIO_LOOUT); b43_nphy_poll_rssi() 1999 s[1] = b43_phy_read(dev, B43_NPHY_GPIO_HIOUT); b43_nphy_poll_rssi() 2001 s[0] = b43_phy_read(dev, B43_NPHY_RSSI1); b43_nphy_poll_rssi() 2002 s[1] = b43_phy_read(dev, B43_NPHY_RSSI2); b43_nphy_poll_rssi() 2013 if (dev->phy.rev < 2) b43_nphy_poll_rssi() 2014 b43_phy_write(dev, B43_NPHY_GPIO_SEL, save_regs_phy[8]); b43_nphy_poll_rssi() 2016 if (dev->phy.rev >= 3) { b43_nphy_poll_rssi() 2017 b43_phy_write(dev, B43_NPHY_AFECTL_C1, save_regs_phy[0]); b43_nphy_poll_rssi() 2018 b43_phy_write(dev, B43_NPHY_AFECTL_C2, save_regs_phy[1]); b43_nphy_poll_rssi() 2019 b43_phy_write(dev, B43_NPHY_RFCTL_LUT_TRSW_UP1, b43_nphy_poll_rssi() 2021 b43_phy_write(dev, B43_NPHY_RFCTL_LUT_TRSW_UP2, b43_nphy_poll_rssi() 2023 b43_phy_write(dev, B43_NPHY_AFECTL_OVER1, save_regs_phy[4]); b43_nphy_poll_rssi() 2024 b43_phy_write(dev, B43_NPHY_AFECTL_OVER, save_regs_phy[5]); b43_nphy_poll_rssi() 2025 b43_phy_write(dev, B43_NPHY_TXF_40CO_B1S0, save_regs_phy[6]); b43_nphy_poll_rssi() 2026 b43_phy_write(dev, B43_NPHY_TXF_40CO_B32S1, save_regs_phy[7]); b43_nphy_poll_rssi() 2028 b43_phy_write(dev, B43_NPHY_AFECTL_C1, save_regs_phy[0]); b43_nphy_poll_rssi() 2029 b43_phy_write(dev, B43_NPHY_AFECTL_C2, save_regs_phy[1]); b43_nphy_poll_rssi() 2030 b43_phy_write(dev, B43_NPHY_AFECTL_OVER, save_regs_phy[2]); b43_nphy_poll_rssi() 2031 b43_phy_write(dev, B43_NPHY_RFCTL_CMD, save_regs_phy[3]); b43_nphy_poll_rssi() 2032 b43_phy_write(dev, B43_NPHY_RFCTL_OVER, save_regs_phy[4]); b43_nphy_poll_rssi() 2033 b43_phy_write(dev, B43_NPHY_RFCTL_RSSIO1, save_regs_phy[5]); b43_nphy_poll_rssi() 2034 b43_phy_write(dev, B43_NPHY_RFCTL_RSSIO2, save_regs_phy[6]); b43_nphy_poll_rssi() 2041 static void b43_nphy_rev3_rssi_cal(struct b43_wldev dev) b43_nphy_rev3_rssi_cal() argument 2043 struct b43_phy phy = &dev->phy; b43_nphy_rev3_rssi_cal() 2044 struct b43_phy_n nphy = dev->phy.n; b43_nphy_rev3_rssi_cal() 2092 if (dev->phy.rev >= 7) { b43_nphy_rev3_rssi_cal() 2101 class = b43_nphy_classifier(dev, 0, 0); b43_nphy_rev3_rssi_cal() 2102 b43_nphy_classifier(dev, 7, 4); b43_nphy_rev3_rssi_cal() 2103 b43_nphy_read_clip_detection(dev, clip_state); b43_nphy_rev3_rssi_cal() 2104 b43_nphy_write_clip_detection(dev, clip_off); b43_nphy_rev3_rssi_cal() 2106 saved_regs_phy_rfctl[0] = b43_phy_read(dev, B43_NPHY_RFCTL_INTC1); b43_nphy_rev3_rssi_cal() 2107 saved_regs_phy_rfctl[1] = b43_phy_read(dev, B43_NPHY_RFCTL_INTC2); b43_nphy_rev3_rssi_cal() 2109 saved_regs_phy[i] = b43_phy_read(dev, regs_to_store[i]); b43_nphy_rev3_rssi_cal() 2111 b43_nphy_rf_ctl_intc_override(dev, N_INTC_OVERRIDE_OFF, 0, 7); b43_nphy_rev3_rssi_cal() 2112 b43_nphy_rf_ctl_intc_override(dev, N_INTC_OVERRIDE_TRSW, 1, 7); b43_nphy_rev3_rssi_cal() 2114 if (dev->phy.rev >= 7) { b43_nphy_rev3_rssi_cal() 2115 b43_nphy_rf_ctl_override_one_to_many(dev, b43_nphy_rev3_rssi_cal() 2118 b43_nphy_rf_ctl_override_one_to_many(dev, b43_nphy_rev3_rssi_cal() 2121 b43_nphy_rf_ctl_override_rev7(dev, 0x80, 1, 0, false, 0); b43_nphy_rev3_rssi_cal() 2122 b43_nphy_rf_ctl_override_rev7(dev, 0x40, 1, 0, false, 0); b43_nphy_rev3_rssi_cal() 2123 if (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ) { b43_nphy_rev3_rssi_cal() 2124 b43_nphy_rf_ctl_override_rev7(dev, 0x20, 0, 0, false, b43_nphy_rev3_rssi_cal() 2126 b43_nphy_rf_ctl_override_rev7(dev, 0x10, 1, 0, false, b43_nphy_rev3_rssi_cal() 2129 b43_nphy_rf_ctl_override_rev7(dev, 0x10, 0, 0, false, b43_nphy_rev3_rssi_cal() 2131 b43_nphy_rf_ctl_override_rev7(dev, 0x20, 1, 0, false, b43_nphy_rev3_rssi_cal() 2135 b43_nphy_rf_ctl_override(dev, 0x1, 0, 0, false); b43_nphy_rev3_rssi_cal() 2136 b43_nphy_rf_ctl_override(dev, 0x2, 1, 0, false); b43_nphy_rev3_rssi_cal() 2137 b43_nphy_rf_ctl_override(dev, 0x80, 1, 0, false); b43_nphy_rev3_rssi_cal() 2138 b43_nphy_rf_ctl_override(dev, 0x40, 1, 0, false); b43_nphy_rev3_rssi_cal() 2139 if (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ) { b43_nphy_rev3_rssi_cal() 2140 b43_nphy_rf_ctl_override(dev, 0x20, 0, 0, false); b43_nphy_rev3_rssi_cal() 2141 b43_nphy_rf_ctl_override(dev, 0x10, 1, 0, false); b43_nphy_rev3_rssi_cal() 2143 b43_nphy_rf_ctl_override(dev, 0x10, 0, 0, false); b43_nphy_rev3_rssi_cal() 2144 b43_nphy_rf_ctl_override(dev, 0x20, 1, 0, false); b43_nphy_rev3_rssi_cal() 2148 rx_core_state = b43_nphy_get_rx_core_state(dev); b43_nphy_rev3_rssi_cal() 2153 b43_nphy_scale_offset_rssi(dev, 0, 0, core + 1, N_RAIL_I, b43_nphy_rev3_rssi_cal() 2155 b43_nphy_scale_offset_rssi(dev, 0, 0, core + 1, N_RAIL_Q, b43_nphy_rev3_rssi_cal() 2160 if (dev->phy.rev >= 7) b43_nphy_rev3_rssi_cal() 2161 b43_radio_maskset(dev, b43_nphy_rev3_rssi_cal() 2166 b43_radio_maskset(dev, r \| B2056_RX_RSSI_MISC, b43_nphy_rev3_rssi_cal() 2168 b43_nphy_poll_rssi(dev, N_RSSI_NB, results[vcm], 8); b43_nphy_rev3_rssi_cal() 2194 if (dev->phy.rev >= 7) b43_nphy_rev3_rssi_cal() 2195 b43_radio_maskset(dev, b43_nphy_rev3_rssi_cal() 2200 b43_radio_maskset(dev, r \| B2056_RX_RSSI_MISC, b43_nphy_rev3_rssi_cal() 2213 b43_nphy_scale_offset_rssi(dev, 0, offset[i], b43_nphy_rev3_rssi_cal() 2224 b43_nphy_scale_offset_rssi(dev, 0, 0, core + 1, b43_nphy_rev3_rssi_cal() 2226 b43_nphy_scale_offset_rssi(dev, 0, 0, core + 1, b43_nphy_rev3_rssi_cal() 2228 b43_nphy_poll_rssi(dev, i, poll_results, 8); b43_nphy_rev3_rssi_cal() 2236 b43_nphy_scale_offset_rssi(dev, 0, b43_nphy_rev3_rssi_cal() 2243 b43_phy_write(dev, B43_NPHY_RFCTL_INTC1, saved_regs_phy_rfctl[0]); b43_nphy_rev3_rssi_cal() 2244 b43_phy_write(dev, B43_NPHY_RFCTL_INTC2, saved_regs_phy_rfctl[1]); b43_nphy_rev3_rssi_cal() 2246 b43_nphy_force_rf_sequence(dev, B43_RFSEQ_RESET2RX); b43_nphy_rev3_rssi_cal() 2248 b43_phy_set(dev, B43_NPHY_TXF_40CO_B1S1, 0x1); b43_nphy_rev3_rssi_cal() 2249 b43_phy_set(dev, B43_NPHY_RFCTL_CMD, B43_NPHY_RFCTL_CMD_START); b43_nphy_rev3_rssi_cal() 2250 b43_phy_mask(dev, B43_NPHY_TXF_40CO_B1S1, ~0x1); b43_nphy_rev3_rssi_cal() 2252 b43_phy_set(dev, B43_NPHY_RFCTL_OVER, 0x1); b43_nphy_rev3_rssi_cal() 2253 b43_phy_set(dev, B43_NPHY_RFCTL_CMD, B43_NPHY_RFCTL_CMD_RXTX); b43_nphy_rev3_rssi_cal() 2254 b43_phy_mask(dev, B43_NPHY_RFCTL_OVER, ~0x1); b43_nphy_rev3_rssi_cal() 2257 b43_phy_write(dev, regs_to_store[i], saved_regs_phy[i]); b43_nphy_rev3_rssi_cal() 2260 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) { b43_nphy_rev3_rssi_cal() 2267 if (dev->phy.rev >= 7) { b43_nphy_rev3_rssi_cal() 2268 rssical_radio_regs[0] = b43_radio_read(dev, b43_nphy_rev3_rssi_cal() 2270 rssical_radio_regs[1] = b43_radio_read(dev, b43_nphy_rev3_rssi_cal() 2273 rssical_radio_regs[0] = b43_radio_read(dev, B2056_RX0 \| b43_nphy_rev3_rssi_cal() 2275 rssical_radio_regs[1] = b43_radio_read(dev, B2056_RX1 \| b43_nphy_rev3_rssi_cal() 2278 rssical_phy_regs[0] = b43_phy_read(dev, B43_NPHY_RSSIMC_0I_RSSI_Z); b43_nphy_rev3_rssi_cal() 2279 rssical_phy_regs[1] = b43_phy_read(dev, B43_NPHY_RSSIMC_0Q_RSSI_Z); b43_nphy_rev3_rssi_cal() 2280 rssical_phy_regs[2] = b43_phy_read(dev, B43_NPHY_RSSIMC_1I_RSSI_Z); b43_nphy_rev3_rssi_cal() 2281 rssical_phy_regs[3] = b43_phy_read(dev, B43_NPHY_RSSIMC_1Q_RSSI_Z); b43_nphy_rev3_rssi_cal() 2282 rssical_phy_regs[4] = b43_phy_read(dev, B43_NPHY_RSSIMC_0I_RSSI_X); b43_nphy_rev3_rssi_cal() 2283 rssical_phy_regs[5] = b43_phy_read(dev, B43_NPHY_RSSIMC_0Q_RSSI_X); b43_nphy_rev3_rssi_cal() 2284 rssical_phy_regs[6] = b43_phy_read(dev, B43_NPHY_RSSIMC_1I_RSSI_X); b43_nphy_rev3_rssi_cal() 2285 rssical_phy_regs[7] = b43_phy_read(dev, B43_NPHY_RSSIMC_1Q_RSSI_X); b43_nphy_rev3_rssi_cal() 2286 rssical_phy_regs[8] = b43_phy_read(dev, B43_NPHY_RSSIMC_0I_RSSI_Y); b43_nphy_rev3_rssi_cal() 2287 rssical_phy_regs[9] = b43_phy_read(dev, B43_NPHY_RSSIMC_0Q_RSSI_Y); b43_nphy_rev3_rssi_cal() 2288 rssical_phy_regs[10] = b43_phy_read(dev, B43_NPHY_RSSIMC_1I_RSSI_Y); b43_nphy_rev3_rssi_cal() 2289 rssical_phy_regs[11] = b43_phy_read(dev, B43_NPHY_RSSIMC_1Q_RSSI_Y); b43_nphy_rev3_rssi_cal() 2292 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) b43_nphy_rev3_rssi_cal() 2298 b43_nphy_classifier(dev, 7, class); b43_nphy_rev3_rssi_cal() 2299 b43_nphy_write_clip_detection(dev, clip_state); b43_nphy_rev3_rssi_cal() 2303 static void b43_nphy_rev2_rssi_cal(struct b43_wldev dev, enum n_rssi_type type) b43_nphy_rev2_rssi_cal() argument 2334 class = b43_nphy_classifier(dev, 0, 0); b43_nphy_rev2_rssi_cal() 2335 b43_nphy_classifier(dev, 7, 4); b43_nphy_rev2_rssi_cal() 2336 b43_nphy_read_clip_detection(dev, clip_state); b43_nphy_rev2_rssi_cal() 2337 b43_nphy_write_clip_detection(dev, clip_off); b43_nphy_rev2_rssi_cal() 2339 if (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ) b43_nphy_rev2_rssi_cal() 2344 regs_save_phy[0] = b43_phy_read(dev, B43_NPHY_RFCTL_INTC1); b43_nphy_rev2_rssi_cal() 2345 regs_save_radio[0] = b43_radio_read(dev, B2055_C1_PD_RXTX); b43_nphy_rev2_rssi_cal() 2346 b43_phy_write(dev, B43_NPHY_RFCTL_INTC1, override); b43_nphy_rev2_rssi_cal() 2347 b43_radio_write(dev, B2055_C1_PD_RXTX, val); b43_nphy_rev2_rssi_cal() 2349 regs_save_phy[1] = b43_phy_read(dev, B43_NPHY_RFCTL_INTC2); b43_nphy_rev2_rssi_cal() 2350 regs_save_radio[1] = b43_radio_read(dev, B2055_C2_PD_RXTX); b43_nphy_rev2_rssi_cal() 2351 b43_phy_write(dev, B43_NPHY_RFCTL_INTC2, override); b43_nphy_rev2_rssi_cal() 2352 b43_radio_write(dev, B2055_C2_PD_RXTX, val); b43_nphy_rev2_rssi_cal() 2354 state[0] = b43_radio_read(dev, B2055_C1_PD_RSSIMISC) & 0x07; b43_nphy_rev2_rssi_cal() 2355 state[1] = b43_radio_read(dev, B2055_C2_PD_RSSIMISC) & 0x07; b43_nphy_rev2_rssi_cal() 2356 b43_radio_mask(dev, B2055_C1_PD_RSSIMISC, 0xF8); b43_nphy_rev2_rssi_cal() 2357 b43_radio_mask(dev, B2055_C2_PD_RSSIMISC, 0xF8); b43_nphy_rev2_rssi_cal() 2358 state[2] = b43_radio_read(dev, B2055_C1_SP_RSSI) & 0x07; b43_nphy_rev2_rssi_cal() 2359 state[3] = b43_radio_read(dev, B2055_C2_SP_RSSI) & 0x07; b43_nphy_rev2_rssi_cal() 2361 b43_nphy_rssi_select(dev, 5, type); b43_nphy_rev2_rssi_cal() 2362 b43_nphy_scale_offset_rssi(dev, 0, 0, 5, N_RAIL_I, type); b43_nphy_rev2_rssi_cal() 2363 b43_nphy_scale_offset_rssi(dev, 0, 0, 5, N_RAIL_Q, type); b43_nphy_rev2_rssi_cal() 2370 b43_nphy_set_rssi_2055_vcm(dev, type, tmp); b43_nphy_rev2_rssi_cal() 2371 b43_nphy_poll_rssi(dev, type, results[vcm], 8); b43_nphy_rev2_rssi_cal() 2402 b43_nphy_set_rssi_2055_vcm(dev, type, vcm_final); b43_nphy_rev2_rssi_cal() 2418 b43_nphy_scale_offset_rssi(dev, 0, offset[i], core, rail, b43_nphy_rev2_rssi_cal() 2422 b43_radio_maskset(dev, B2055_C1_PD_RSSIMISC, 0xF8, state[0]); b43_nphy_rev2_rssi_cal() 2423 b43_radio_maskset(dev, B2055_C2_PD_RSSIMISC, 0xF8, state[1]); b43_nphy_rev2_rssi_cal() 2427 b43_nphy_rssi_select(dev, 1, N_RSSI_NB); b43_nphy_rev2_rssi_cal() 2430 b43_nphy_rssi_select(dev, 1, N_RSSI_W1); b43_nphy_rev2_rssi_cal() 2433 b43_nphy_rssi_select(dev, 1, N_RSSI_W2); b43_nphy_rev2_rssi_cal() 2436 b43_nphy_rssi_select(dev, 1, N_RSSI_W2); b43_nphy_rev2_rssi_cal() 2442 b43_nphy_rssi_select(dev, 2, N_RSSI_NB); b43_nphy_rev2_rssi_cal() 2445 b43_nphy_rssi_select(dev, 2, N_RSSI_W1); b43_nphy_rev2_rssi_cal() 2448 b43_nphy_rssi_select(dev, 2, N_RSSI_W2); b43_nphy_rev2_rssi_cal() 2452 b43_nphy_rssi_select(dev, 0, type); b43_nphy_rev2_rssi_cal() 2454 b43_phy_write(dev, B43_NPHY_RFCTL_INTC1, regs_save_phy[0]); b43_nphy_rev2_rssi_cal() 2455 b43_radio_write(dev, B2055_C1_PD_RXTX, regs_save_radio[0]); b43_nphy_rev2_rssi_cal() 2456 b43_phy_write(dev, B43_NPHY_RFCTL_INTC2, regs_save_phy[1]); b43_nphy_rev2_rssi_cal() 2457 b43_radio_write(dev, B2055_C2_PD_RXTX, regs_save_radio[1]); b43_nphy_rev2_rssi_cal() 2459 b43_nphy_classifier(dev, 7, class); b43_nphy_rev2_rssi_cal() 2460 b43_nphy_write_clip_detection(dev, clip_state); b43_nphy_rev2_rssi_cal() 2463 b43_nphy_reset_cca(dev); b43_nphy_rev2_rssi_cal() 2470 static void b43_nphy_rssi_cal(struct b43_wldev dev) b43_nphy_rssi_cal() argument 2472 if (dev->phy.rev >= 19) { b43_nphy_rssi_cal() 2474 } else if (dev->phy.rev >= 3) { b43_nphy_rssi_cal() 2475 b43_nphy_rev3_rssi_cal(dev); b43_nphy_rssi_cal() 2477 b43_nphy_rev2_rssi_cal(dev, N_RSSI_NB); b43_nphy_rssi_cal() 2478 b43_nphy_rev2_rssi_cal(dev, N_RSSI_W1); b43_nphy_rssi_cal() 2479 b43_nphy_rev2_rssi_cal(dev, N_RSSI_W2); b43_nphy_rssi_cal() 2487 static void b43_nphy_gain_ctl_workarounds_rev19(struct b43_wldev dev) b43_nphy_gain_ctl_workarounds_rev19() argument 2492 static void b43_nphy_gain_ctl_workarounds_rev7(struct b43_wldev dev) b43_nphy_gain_ctl_workarounds_rev7() argument 2494 struct b43_phy phy = &dev->phy; b43_nphy_gain_ctl_workarounds_rev7() 2501 static void b43_nphy_gain_ctl_workarounds_rev3(struct b43_wldev dev) b43_nphy_gain_ctl_workarounds_rev3() argument 2503 struct ssb_sprom sprom = dev->dev->bus_sprom; b43_nphy_gain_ctl_workarounds_rev3() 2513 ghz5 = b43_phy_read(dev, B43_NPHY_BANDCTL) b43_nphy_gain_ctl_workarounds_rev3() 2517 e = b43_nphy_get_gain_ctl_workaround_ent(dev, ghz5, ext_lna); b43_nphy_gain_ctl_workarounds_rev3() 2518 if (ghz5 && dev->phy.rev >= 5) b43_nphy_gain_ctl_workarounds_rev3() 2523 b43_phy_set(dev, B43_NPHY_RXCTL, 0x0040); b43_nphy_gain_ctl_workarounds_rev3() 2526 b43_phy_set(dev, B43_NPHY_C1_CGAINI, B43_NPHY_C1_CGAINI_CL2DETECT); b43_nphy_gain_ctl_workarounds_rev3() 2527 b43_phy_set(dev, B43_NPHY_C2_CGAINI, B43_NPHY_C2_CGAINI_CL2DETECT); b43_nphy_gain_ctl_workarounds_rev3() 2529 b43_radio_write(dev, B2056_RX0 \| B2056_RX_BIASPOLE_LNAG1_IDAC, b43_nphy_gain_ctl_workarounds_rev3() 2531 b43_radio_write(dev, B2056_RX1 \| B2056_RX_BIASPOLE_LNAG1_IDAC, b43_nphy_gain_ctl_workarounds_rev3() 2533 b43_radio_write(dev, B2056_RX0 \| B2056_RX_LNAG2_IDAC, 0xF0); b43_nphy_gain_ctl_workarounds_rev3() 2534 b43_radio_write(dev, B2056_RX1 \| B2056_RX_LNAG2_IDAC, 0xF0); b43_nphy_gain_ctl_workarounds_rev3() 2535 b43_radio_write(dev, B2056_RX0 \| B2056_RX_RSSI_POLE, 0x00); b43_nphy_gain_ctl_workarounds_rev3() 2536 b43_radio_write(dev, B2056_RX1 \| B2056_RX_RSSI_POLE, 0x00); b43_nphy_gain_ctl_workarounds_rev3() 2537 b43_radio_write(dev, B2056_RX0 \| B2056_RX_RSSI_GAIN, b43_nphy_gain_ctl_workarounds_rev3() 2539 b43_radio_write(dev, B2056_RX1 \| B2056_RX_RSSI_GAIN, b43_nphy_gain_ctl_workarounds_rev3() 2541 b43_radio_write(dev, B2056_RX0 \| B2056_RX_BIASPOLE_LNAA1_IDAC, b43_nphy_gain_ctl_workarounds_rev3() 2543 b43_radio_write(dev, B2056_RX1 \| B2056_RX_BIASPOLE_LNAA1_IDAC, b43_nphy_gain_ctl_workarounds_rev3() 2545 b43_radio_write(dev, B2056_RX0 \| B2056_RX_LNAA2_IDAC, 0xFF); b43_nphy_gain_ctl_workarounds_rev3() 2546 b43_radio_write(dev, B2056_RX1 \| B2056_RX_LNAA2_IDAC, 0xFF); b43_nphy_gain_ctl_workarounds_rev3() 2548 b43_ntab_write_bulk(dev, B43_NTAB8(0, 8), 4, e->lna1_gain); b43_nphy_gain_ctl_workarounds_rev3() 2549 b43_ntab_write_bulk(dev, B43_NTAB8(1, 8), 4, e->lna1_gain); b43_nphy_gain_ctl_workarounds_rev3() 2550 b43_ntab_write_bulk(dev, B43_NTAB8(0, 16), 4, e->lna2_gain); b43_nphy_gain_ctl_workarounds_rev3() 2551 b43_ntab_write_bulk(dev, B43_NTAB8(1, 16), 4, e->lna2_gain); b43_nphy_gain_ctl_workarounds_rev3() 2552 b43_ntab_write_bulk(dev, B43_NTAB8(0, 32), 10, e->gain_db); b43_nphy_gain_ctl_workarounds_rev3() 2553 b43_ntab_write_bulk(dev, B43_NTAB8(1, 32), 10, e->gain_db); b43_nphy_gain_ctl_workarounds_rev3() 2554 b43_ntab_write_bulk(dev, B43_NTAB8(2, 32), 10, e->gain_bits); b43_nphy_gain_ctl_workarounds_rev3() 2555 b43_ntab_write_bulk(dev, B43_NTAB8(3, 32), 10, e->gain_bits); b43_nphy_gain_ctl_workarounds_rev3() 2556 b43_ntab_write_bulk(dev, B43_NTAB8(0, 0x40), 6, lpf_gain); b43_nphy_gain_ctl_workarounds_rev3() 2557 b43_ntab_write_bulk(dev, B43_NTAB8(1, 0x40), 6, lpf_gain); b43_nphy_gain_ctl_workarounds_rev3() 2558 b43_ntab_write_bulk(dev, B43_NTAB8(2, 0x40), 6, lpf_bits); b43_nphy_gain_ctl_workarounds_rev3() 2559 b43_ntab_write_bulk(dev, B43_NTAB8(3, 0x40), 6, lpf_bits); b43_nphy_gain_ctl_workarounds_rev3() 2561 b43_phy_write(dev, B43_NPHY_REV3_C1_INITGAIN_A, e->init_gain); b43_nphy_gain_ctl_workarounds_rev3() 2562 b43_phy_write(dev, B43_NPHY_REV3_C2_INITGAIN_A, e->init_gain); b43_nphy_gain_ctl_workarounds_rev3() 2564 b43_ntab_write_bulk(dev, B43_NTAB16(7, 0x106), 2, b43_nphy_gain_ctl_workarounds_rev3() 2567 b43_phy_write(dev, B43_NPHY_REV3_C1_CLIP_HIGAIN_A, e->cliphi_gain); b43_nphy_gain_ctl_workarounds_rev3() 2568 b43_phy_write(dev, B43_NPHY_REV3_C2_CLIP_HIGAIN_A, e->cliphi_gain); b43_nphy_gain_ctl_workarounds_rev3() 2569 b43_phy_write(dev, B43_NPHY_REV3_C1_CLIP_MEDGAIN_A, e->clipmd_gain); b43_nphy_gain_ctl_workarounds_rev3() 2570 b43_phy_write(dev, B43_NPHY_REV3_C2_CLIP_MEDGAIN_A, e->clipmd_gain); b43_nphy_gain_ctl_workarounds_rev3() 2571 b43_phy_write(dev, B43_NPHY_REV3_C1_CLIP_LOGAIN_A, e->cliplo_gain); b43_nphy_gain_ctl_workarounds_rev3() 2572 b43_phy_write(dev, B43_NPHY_REV3_C2_CLIP_LOGAIN_A, e->cliplo_gain); b43_nphy_gain_ctl_workarounds_rev3() 2574 b43_phy_maskset(dev, B43_NPHY_CRSMINPOWER0, 0xFF00, e->crsmin); b43_nphy_gain_ctl_workarounds_rev3() 2575 b43_phy_maskset(dev, B43_NPHY_CRSMINPOWERL0, 0xFF00, e->crsminl); b43_nphy_gain_ctl_workarounds_rev3() 2576 b43_phy_maskset(dev, B43_NPHY_CRSMINPOWERU0, 0xFF00, e->crsminu); b43_nphy_gain_ctl_workarounds_rev3() 2577 b43_phy_write(dev, B43_NPHY_C1_NBCLIPTHRES, e->nbclip); b43_nphy_gain_ctl_workarounds_rev3() 2578 b43_phy_write(dev, B43_NPHY_C2_NBCLIPTHRES, e->nbclip); b43_nphy_gain_ctl_workarounds_rev3() 2579 b43_phy_maskset(dev, B43_NPHY_C1_CLIPWBTHRES, b43_nphy_gain_ctl_workarounds_rev3() 2581 b43_phy_maskset(dev, B43_NPHY_C2_CLIPWBTHRES, b43_nphy_gain_ctl_workarounds_rev3() 2583 b43_phy_write(dev, B43_NPHY_CCK_SHIFTB_REF, 0x809C); b43_nphy_gain_ctl_workarounds_rev3() 2586 static void b43_nphy_gain_ctl_workarounds_rev1_2(struct b43_wldev dev) b43_nphy_gain_ctl_workarounds_rev1_2() argument 2588 struct b43_phy_n nphy = dev->phy.n; b43_nphy_gain_ctl_workarounds_rev1_2() 2597 b43_phy_set(dev, B43_NPHY_C1_CGAINI, B43_NPHY_C1_CGAINI_CL2DETECT); b43_nphy_gain_ctl_workarounds_rev1_2() 2598 b43_phy_set(dev, B43_NPHY_C2_CGAINI, B43_NPHY_C2_CGAINI_CL2DETECT); b43_nphy_gain_ctl_workarounds_rev1_2() 2601 b43_phy_write(dev, B43_NPHY_C1_NBCLIPTHRES, 0x84); b43_nphy_gain_ctl_workarounds_rev1_2() 2602 b43_phy_write(dev, B43_NPHY_C2_NBCLIPTHRES, 0x84); b43_nphy_gain_ctl_workarounds_rev1_2() 2604 if (!b43_is_40mhz(dev)) { b43_nphy_gain_ctl_workarounds_rev1_2() 2606 b43_phy_write(dev, B43_NPHY_CLIP1_NBDWELL_LEN, 0x002B); b43_nphy_gain_ctl_workarounds_rev1_2() 2607 b43_phy_write(dev, B43_NPHY_CLIP2_NBDWELL_LEN, 0x002B); b43_nphy_gain_ctl_workarounds_rev1_2() 2608 b43_phy_write(dev, B43_NPHY_W1CLIP1_DWELL_LEN, 0x0009); b43_nphy_gain_ctl_workarounds_rev1_2() 2609 b43_phy_write(dev, B43_NPHY_W1CLIP2_DWELL_LEN, 0x0009); b43_nphy_gain_ctl_workarounds_rev1_2() 2613 b43_phy_maskset(dev, B43_NPHY_C1_CLIPWBTHRES, b43_nphy_gain_ctl_workarounds_rev1_2() 2615 b43_phy_maskset(dev, B43_NPHY_C2_CLIPWBTHRES, b43_nphy_gain_ctl_workarounds_rev1_2() 2618 if (!b43_is_40mhz(dev)) { b43_nphy_gain_ctl_workarounds_rev1_2() 2619 b43_phy_maskset(dev, B43_NPHY_C1_CGAINI, b43_nphy_gain_ctl_workarounds_rev1_2() 2621 b43_phy_maskset(dev, B43_NPHY_C2_CGAINI, b43_nphy_gain_ctl_workarounds_rev1_2() 2623 b43_phy_maskset(dev, B43_NPHY_C1_CCK_CGAINI, b43_nphy_gain_ctl_workarounds_rev1_2() 2625 b43_phy_maskset(dev, B43_NPHY_C2_CCK_CGAINI, b43_nphy_gain_ctl_workarounds_rev1_2() 2629 b43_phy_write(dev, B43_NPHY_CCK_SHIFTB_REF, 0x809C); b43_nphy_gain_ctl_workarounds_rev1_2() 2632 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ && b43_nphy_gain_ctl_workarounds_rev1_2() 2633 b43_is_40mhz(dev)) b43_nphy_gain_ctl_workarounds_rev1_2() 2638 code = b43_is_40mhz(dev) ? 6 : 7; b43_nphy_gain_ctl_workarounds_rev1_2() 2642 b43_phy_maskset(dev, B43_NPHY_C1_INITGAIN, ~B43_NPHY_C1_INITGAIN_HPVGA2, b43_nphy_gain_ctl_workarounds_rev1_2() 2644 b43_phy_maskset(dev, B43_NPHY_C2_INITGAIN, ~B43_NPHY_C2_INITGAIN_HPVGA2, b43_nphy_gain_ctl_workarounds_rev1_2() 2647 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x1D06); b43_nphy_gain_ctl_workarounds_rev1_2() 2650 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, (code << 8 \| 0x7C)); b43_nphy_gain_ctl_workarounds_rev1_2() 2652 b43_nphy_adjust_lna_gain_table(dev); b43_nphy_gain_ctl_workarounds_rev1_2() 2655 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x0808); b43_nphy_gain_ctl_workarounds_rev1_2() 2656 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x0); b43_nphy_gain_ctl_workarounds_rev1_2() 2657 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x1); b43_nphy_gain_ctl_workarounds_rev1_2() 2658 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x1); b43_nphy_gain_ctl_workarounds_rev1_2() 2659 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x1); b43_nphy_gain_ctl_workarounds_rev1_2() 2661 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x0C08); b43_nphy_gain_ctl_workarounds_rev1_2() 2662 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x0); b43_nphy_gain_ctl_workarounds_rev1_2() 2663 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x1); b43_nphy_gain_ctl_workarounds_rev1_2() 2664 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x1); b43_nphy_gain_ctl_workarounds_rev1_2() 2665 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0x1); b43_nphy_gain_ctl_workarounds_rev1_2() 2667 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x1D06); b43_nphy_gain_ctl_workarounds_rev1_2() 2670 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, b43_nphy_gain_ctl_workarounds_rev1_2() 2674 if (dev->phy.rev == 2) { b43_nphy_gain_ctl_workarounds_rev1_2() 2676 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, b43_nphy_gain_ctl_workarounds_rev1_2() 2680 b43_phy_write(dev, b43_nphy_gain_ctl_workarounds_rev1_2() 2686 b43_nphy_set_rf_sequence(dev, 5, rfseq_events, rfseq_delays, 3); b43_nphy_gain_ctl_workarounds_rev1_2() 2687 b43_phy_maskset(dev, B43_NPHY_OVER_DGAIN1, b43_nphy_gain_ctl_workarounds_rev1_2() 2691 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) b43_nphy_gain_ctl_workarounds_rev1_2() 2692 b43_phy_maskset(dev, B43_PHY_N(0xC5D), 0xFF80, 4); b43_nphy_gain_ctl_workarounds_rev1_2() 2696 static void b43_nphy_gain_ctl_workarounds(struct b43_wldev dev) b43_nphy_gain_ctl_workarounds() argument 2698 if (dev->phy.rev >= 19) b43_nphy_gain_ctl_workarounds() 2699 b43_nphy_gain_ctl_workarounds_rev19(dev); b43_nphy_gain_ctl_workarounds() 2700 else if (dev->phy.rev >= 7) b43_nphy_gain_ctl_workarounds() 2701 b43_nphy_gain_ctl_workarounds_rev7(dev); b43_nphy_gain_ctl_workarounds() 2702 else if (dev->phy.rev >= 3) b43_nphy_gain_ctl_workarounds() 2703 b43_nphy_gain_ctl_workarounds_rev3(dev); b43_nphy_gain_ctl_workarounds() 2705 b43_nphy_gain_ctl_workarounds_rev1_2(dev); b43_nphy_gain_ctl_workarounds() 2708 static void b43_nphy_workarounds_rev7plus(struct b43_wldev dev) b43_nphy_workarounds_rev7plus() argument 2710 struct ssb_sprom sprom = dev->dev->bus_sprom; b43_nphy_workarounds_rev7plus() 2711 struct b43_phy phy = &dev->phy; b43_nphy_workarounds_rev7plus() 2739 b43_phy_write(dev, B43_NPHY_PHASETR_A0, 0x0125); b43_nphy_workarounds_rev7plus() 2740 b43_phy_write(dev, B43_NPHY_PHASETR_A1, 0x01b3); b43_nphy_workarounds_rev7plus() 2741 b43_phy_write(dev, B43_NPHY_PHASETR_A2, 0x0105); b43_nphy_workarounds_rev7plus() 2742 b43_phy_write(dev, B43_NPHY_PHASETR_B0, 0x016e); b43_nphy_workarounds_rev7plus() 2743 b43_phy_write(dev, B43_NPHY_PHASETR_B1, 0x00cd); b43_nphy_workarounds_rev7plus() 2744 b43_phy_write(dev, B43_NPHY_PHASETR_B2, 0x0020); b43_nphy_workarounds_rev7plus() 2747 b43_phy_set(dev, B43_NPHY_FINERX2_CGC, 0x10); b43_nphy_workarounds_rev7plus() 2748 b43_phy_maskset(dev, B43_NPHY_FREQGAIN0, 0xFF80, 0x0020); b43_nphy_workarounds_rev7plus() 2749 b43_phy_maskset(dev, B43_NPHY_FREQGAIN0, 0x80FF, 0x2700); b43_nphy_workarounds_rev7plus() 2750 b43_phy_maskset(dev, B43_NPHY_FREQGAIN1, 0xFF80, 0x002E); b43_nphy_workarounds_rev7plus() 2751 b43_phy_maskset(dev, B43_NPHY_FREQGAIN1, 0x80FF, 0x3300); b43_nphy_workarounds_rev7plus() 2752 b43_phy_maskset(dev, B43_NPHY_FREQGAIN2, 0xFF80, 0x0037); b43_nphy_workarounds_rev7plus() 2753 b43_phy_maskset(dev, B43_NPHY_FREQGAIN2, 0x80FF, 0x3A00); b43_nphy_workarounds_rev7plus() 2754 b43_phy_maskset(dev, B43_NPHY_FREQGAIN3, 0xFF80, 0x003C); b43_nphy_workarounds_rev7plus() 2755 b43_phy_maskset(dev, B43_NPHY_FREQGAIN3, 0x80FF, 0x3E00); b43_nphy_workarounds_rev7plus() 2756 b43_phy_maskset(dev, B43_NPHY_FREQGAIN4, 0xFF80, 0x003E); b43_nphy_workarounds_rev7plus() 2757 b43_phy_maskset(dev, B43_NPHY_FREQGAIN4, 0x80FF, 0x3F00); b43_nphy_workarounds_rev7plus() 2758 b43_phy_maskset(dev, B43_NPHY_FREQGAIN5, 0xFF80, 0x0040); b43_nphy_workarounds_rev7plus() 2759 b43_phy_maskset(dev, B43_NPHY_FREQGAIN5, 0x80FF, 0x4000); b43_nphy_workarounds_rev7plus() 2760 b43_phy_maskset(dev, B43_NPHY_FREQGAIN6, 0xFF80, 0x0040); b43_nphy_workarounds_rev7plus() 2761 b43_phy_maskset(dev, B43_NPHY_FREQGAIN6, 0x80FF, 0x4000); b43_nphy_workarounds_rev7plus() 2762 b43_phy_maskset(dev, B43_NPHY_FREQGAIN7, 0xFF80, 0x0040); b43_nphy_workarounds_rev7plus() 2763 b43_phy_maskset(dev, B43_NPHY_FREQGAIN7, 0x80FF, 0x4000); b43_nphy_workarounds_rev7plus() 2767 b43_phy_write(dev, B43_NPHY_FORCEFRONT0, 0x7ff); b43_nphy_workarounds_rev7plus() 2768 b43_phy_write(dev, B43_NPHY_FORCEFRONT1, 0x7ff); b43_nphy_workarounds_rev7plus() 2770 b43_phy_write(dev, B43_NPHY_FORCEFRONT0, 0x1B0); b43_nphy_workarounds_rev7plus() 2771 b43_phy_write(dev, B43_NPHY_FORCEFRONT1, 0x1B0); b43_nphy_workarounds_rev7plus() 2775 b43_phy_maskset(dev, B43_NPHY_TXTAILCNT, ~0xFF, 0xa0); b43_nphy_workarounds_rev7plus() 2777 b43_phy_maskset(dev, B43_NPHY_TXTAILCNT, ~0xFF, 0x72); b43_nphy_workarounds_rev7plus() 2779 b43_ntab_write(dev, B43_NTAB16(8, 0x00), 2); b43_nphy_workarounds_rev7plus() 2780 b43_ntab_write(dev, B43_NTAB16(8, 0x10), 2); b43_nphy_workarounds_rev7plus() 2781 tmp32 = b43_ntab_read(dev, B43_NTAB32(30, 0)); b43_nphy_workarounds_rev7plus() 2783 b43_ntab_write(dev, B43_NTAB32(30, 0), tmp32); b43_nphy_workarounds_rev7plus() 2784 b43_ntab_write_bulk(dev, B43_NTAB16(7, 0x15d), 3, ntab7_15e_16e); b43_nphy_workarounds_rev7plus() 2785 b43_ntab_write_bulk(dev, B43_NTAB16(7, 0x16d), 3, ntab7_15e_16e); b43_nphy_workarounds_rev7plus() 2787 b43_nphy_set_rf_sequence(dev, 1, tx2rx_events, tx2rx_delays, b43_nphy_workarounds_rev7plus() 2789 if (b43_nphy_ipa(dev)) b43_nphy_workarounds_rev7plus() 2790 b43_nphy_set_rf_sequence(dev, 0, rx2tx_events_ipa, b43_nphy_workarounds_rev7plus() 2793 b43_phy_maskset(dev, B43_NPHY_EPS_OVERRIDEI_0, 0x3FFF, 0x4000); b43_nphy_workarounds_rev7plus() 2794 b43_phy_maskset(dev, B43_NPHY_EPS_OVERRIDEI_1, 0x3FFF, 0x4000); b43_nphy_workarounds_rev7plus() 2797 lpf_ofdm_20mhz[core] = b43_nphy_read_lpf_ctl(dev, 0x154 + core 0x10); b43_nphy_workarounds_rev7plus() 2798 lpf_ofdm_40mhz[core] = b43_nphy_read_lpf_ctl(dev, 0x159 + core * 0x10); b43_nphy_workarounds_rev7plus() 2799 lpf_11b[core] = b43_nphy_read_lpf_ctl(dev, 0x152 + core * 0x10); b43_nphy_workarounds_rev7plus() 2802 bcap_val = b43_radio_read(dev, R2057_RCCAL_BCAP_VAL); b43_nphy_workarounds_rev7plus() 2803 scap_val = b43_radio_read(dev, R2057_RCCAL_SCAP_VAL); b43_nphy_workarounds_rev7plus() 2805 if (b43_nphy_ipa(dev)) { b43_nphy_workarounds_rev7plus() 2806 bool ghz2 = b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ; b43_nphy_workarounds_rev7plus() 2811 if (phy->rev == 8 && b43_is_40mhz(dev)) { b43_nphy_workarounds_rev7plus() 2834 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) { b43_nphy_workarounds_rev7plus() 2945 b43_ntab_write(dev, B43_NTAB16(7, 0x152 + core * 16), b43_nphy_workarounds_rev7plus() 2947 b43_ntab_write(dev, B43_NTAB16(7, 0x153 + core * 16), b43_nphy_workarounds_rev7plus() 2949 b43_ntab_write(dev, B43_NTAB16(7, 0x154 + core * 16), b43_nphy_workarounds_rev7plus() 2951 b43_ntab_write(dev, B43_NTAB16(7, 0x155 + core * 16), b43_nphy_workarounds_rev7plus() 2953 b43_ntab_write(dev, B43_NTAB16(7, 0x156 + core * 16), b43_nphy_workarounds_rev7plus() 2955 b43_ntab_write(dev, B43_NTAB16(7, 0x157 + core * 16), b43_nphy_workarounds_rev7plus() 2957 b43_ntab_write(dev, B43_NTAB16(7, 0x158 + core * 16), b43_nphy_workarounds_rev7plus() 2959 b43_ntab_write(dev, B43_NTAB16(7, 0x159 + core * 16), b43_nphy_workarounds_rev7plus() 2964 b43_phy_write(dev, 0x32F, 0x3); b43_nphy_workarounds_rev7plus() 2967 b43_nphy_rf_ctl_override_rev7(dev, 4, 1, 3, false, 0); b43_nphy_workarounds_rev7plus() 2972 b43_radio_write(dev, 0x5, 0x05); b43_nphy_workarounds_rev7plus() 2973 b43_radio_write(dev, 0x6, 0x30); b43_nphy_workarounds_rev7plus() 2974 b43_radio_write(dev, 0x7, 0x00); b43_nphy_workarounds_rev7plus() 2975 b43_radio_set(dev, 0x4f, 0x1); b43_nphy_workarounds_rev7plus() 2976 b43_radio_set(dev, 0xd4, 0x1); b43_nphy_workarounds_rev7plus() 2985 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) { b43_nphy_workarounds_rev7plus() 2988 b43_radio_write(dev, 0x5F, bias); b43_nphy_workarounds_rev7plus() 2989 b43_radio_write(dev, 0x64, conv); b43_nphy_workarounds_rev7plus() 2990 b43_radio_write(dev, 0x66, filt); b43_nphy_workarounds_rev7plus() 2992 b43_radio_write(dev, 0xE8, bias); b43_nphy_workarounds_rev7plus() 2993 b43_radio_write(dev, 0xE9, conv); b43_nphy_workarounds_rev7plus() 2994 b43_radio_write(dev, 0xEB, filt); b43_nphy_workarounds_rev7plus() 3000 if (b43_nphy_ipa(dev)) { b43_nphy_workarounds_rev7plus() 3001 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) { b43_nphy_workarounds_rev7plus() 3006 b43_radio_write(dev, 0x51, b43_nphy_workarounds_rev7plus() 3009 b43_radio_write(dev, 0xd6, b43_nphy_workarounds_rev7plus() 3017 b43_radio_write(dev, 0x64, b43_nphy_workarounds_rev7plus() 3019 b43_radio_write(dev, 0x5F, b43_nphy_workarounds_rev7plus() 3021 b43_radio_write(dev, 0x66, b43_nphy_workarounds_rev7plus() 3023 b43_radio_write(dev, 0x59, b43_nphy_workarounds_rev7plus() 3025 b43_radio_write(dev, 0x80, b43_nphy_workarounds_rev7plus() 3028 b43_radio_write(dev, 0x69, b43_nphy_workarounds_rev7plus() 3030 b43_radio_write(dev, 0xE8, b43_nphy_workarounds_rev7plus() 3032 b43_radio_write(dev, 0xEB, b43_nphy_workarounds_rev7plus() 3034 b43_radio_write(dev, 0xDE, b43_nphy_workarounds_rev7plus() 3036 b43_radio_write(dev, 0x105, b43_nphy_workarounds_rev7plus() 3043 if (!b43_is_40mhz(dev)) { b43_nphy_workarounds_rev7plus() 3044 b43_radio_write(dev, 0x5F, 0x14); b43_nphy_workarounds_rev7plus() 3045 b43_radio_write(dev, 0xE8, 0x12); b43_nphy_workarounds_rev7plus() 3047 b43_radio_write(dev, 0x5F, 0x16); b43_nphy_workarounds_rev7plus() 3048 b43_radio_write(dev, 0xE8, 0x16); b43_nphy_workarounds_rev7plus() 3055 b43_radio_write(dev, o + R2057_IPA2G_CASCONV_CORE0, 0x13); b43_nphy_workarounds_rev7plus() 3056 b43_radio_write(dev, o + R2057_TXMIX2G_TUNE_BOOST_PU_CORE0, 0x21); b43_nphy_workarounds_rev7plus() 3057 b43_radio_write(dev, o + R2057_IPA2G_BIAS_FILTER_CORE0, 0xff); b43_nphy_workarounds_rev7plus() 3058 b43_radio_write(dev, o + R2057_PAD2G_IDACS_CORE0, 0x88); b43_nphy_workarounds_rev7plus() 3059 b43_radio_write(dev, o + R2057_PAD2G_TUNE_PUS_CORE0, 0x23); b43_nphy_workarounds_rev7plus() 3060 b43_radio_write(dev, o + R2057_IPA2G_IMAIN_CORE0, 0x16); b43_nphy_workarounds_rev7plus() 3061 b43_radio_write(dev, o + R2057_PAD_BIAS_FILTER_BWS_CORE0, 0x3e); b43_nphy_workarounds_rev7plus() 3062 b43_radio_write(dev, o + R2057_BACKUP1_CORE0, 0x10); b43_nphy_workarounds_rev7plus() 3070 b43_radio_write(dev, 0x7D, 0xFF); b43_nphy_workarounds_rev7plus() 3071 b43_radio_write(dev, 0xFE, 0xFF); b43_nphy_workarounds_rev7plus() 3078 b43_radio_write(dev, 0x5c, 0x61); b43_nphy_workarounds_rev7plus() 3079 b43_radio_write(dev, 0x51, 0x70); b43_nphy_workarounds_rev7plus() 3081 b43_radio_write(dev, 0xe1, 0x61); b43_nphy_workarounds_rev7plus() 3082 b43_radio_write(dev, 0xd6, 0x70); b43_nphy_workarounds_rev7plus() 3089 b43_ntab_write(dev, B43_NTAB16(8, 0x05), 0x20); b43_nphy_workarounds_rev7plus() 3090 b43_ntab_write(dev, B43_NTAB16(8, 0x15), 0x20); b43_nphy_workarounds_rev7plus() 3093 b43_radio_write(dev, 0x1a1, 0x00); b43_nphy_workarounds_rev7plus() 3094 b43_radio_write(dev, 0x1a2, 0x3f); b43_nphy_workarounds_rev7plus() 3095 b43_radio_write(dev, 0x1a6, 0x3f); b43_nphy_workarounds_rev7plus() 3097 b43_radio_write(dev, 0x1a7, 0x00); b43_nphy_workarounds_rev7plus() 3098 b43_radio_write(dev, 0x1ab, 0x3f); b43_nphy_workarounds_rev7plus() 3099 b43_radio_write(dev, 0x1ac, 0x3f); b43_nphy_workarounds_rev7plus() 3103 b43_phy_set(dev, B43_NPHY_AFECTL_C1, 0x4); b43_nphy_workarounds_rev7plus() 3104 b43_phy_set(dev, B43_NPHY_AFECTL_OVER1, 0x4); b43_nphy_workarounds_rev7plus() 3105 b43_phy_set(dev, B43_NPHY_AFECTL_C2, 0x4); b43_nphy_workarounds_rev7plus() 3106 b43_phy_set(dev, B43_NPHY_AFECTL_OVER, 0x4); b43_nphy_workarounds_rev7plus() 3108 b43_phy_mask(dev, B43_NPHY_AFECTL_C1, ~0x1); b43_nphy_workarounds_rev7plus() 3109 b43_phy_set(dev, B43_NPHY_AFECTL_OVER1, 0x1); b43_nphy_workarounds_rev7plus() 3110 b43_phy_mask(dev, B43_NPHY_AFECTL_C2, ~0x1); b43_nphy_workarounds_rev7plus() 3111 b43_phy_set(dev, B43_NPHY_AFECTL_OVER, 0x1); b43_nphy_workarounds_rev7plus() 3112 b43_ntab_write(dev, B43_NTAB16(8, 0x05), 0); b43_nphy_workarounds_rev7plus() 3113 b43_ntab_write(dev, B43_NTAB16(8, 0x15), 0); b43_nphy_workarounds_rev7plus() 3115 b43_phy_mask(dev, B43_NPHY_AFECTL_C1, ~0x4); b43_nphy_workarounds_rev7plus() 3116 b43_phy_mask(dev, B43_NPHY_AFECTL_OVER1, ~0x4); b43_nphy_workarounds_rev7plus() 3117 b43_phy_mask(dev, B43_NPHY_AFECTL_C2, ~0x4); b43_nphy_workarounds_rev7plus() 3118 b43_phy_mask(dev, B43_NPHY_AFECTL_OVER, ~0x4); b43_nphy_workarounds_rev7plus() 3121 b43_phy_write(dev, B43_NPHY_ENDROP_TLEN, 0x2); b43_nphy_workarounds_rev7plus() 3123 b43_ntab_write(dev, B43_NTAB32(16, 0x100), 20); b43_nphy_workarounds_rev7plus() 3124 b43_ntab_write_bulk(dev, B43_NTAB8(7, 0x138), 2, ntab7_138_146); b43_nphy_workarounds_rev7plus() 3125 b43_ntab_write(dev, B43_NTAB16(7, 0x141), 0x77); b43_nphy_workarounds_rev7plus() 3126 b43_ntab_write_bulk(dev, B43_NTAB8(7, 0x133), 3, ntab7_133); b43_nphy_workarounds_rev7plus() 3127 b43_ntab_write_bulk(dev, B43_NTAB8(7, 0x146), 2, ntab7_138_146); b43_nphy_workarounds_rev7plus() 3128 b43_ntab_write(dev, B43_NTAB16(7, 0x123), 0x77); b43_nphy_workarounds_rev7plus() 3129 b43_ntab_write(dev, B43_NTAB16(7, 0x12A), 0x77); b43_nphy_workarounds_rev7plus() 3131 b43_ntab_read_bulk(dev, B43_NTAB32(16, 0x02), 1, noise_tbl); b43_nphy_workarounds_rev7plus() 3132 noise_tbl[1] = b43_is_40mhz(dev) ? 0x14D : 0x18D; b43_nphy_workarounds_rev7plus() 3133 b43_ntab_write_bulk(dev, B43_NTAB32(16, 0x02), 2, noise_tbl); b43_nphy_workarounds_rev7plus() 3135 b43_ntab_read_bulk(dev, B43_NTAB32(16, 0x7E), 1, noise_tbl); b43_nphy_workarounds_rev7plus() 3136 noise_tbl[1] = b43_is_40mhz(dev) ? 0x14D : 0x18D; b43_nphy_workarounds_rev7plus() 3137 b43_ntab_write_bulk(dev, B43_NTAB32(16, 0x7E), 2, noise_tbl); b43_nphy_workarounds_rev7plus() 3139 b43_nphy_gain_ctl_workarounds(dev); b43_nphy_workarounds_rev7plus() 3142 b43_ntab_write_bulk(dev, B43_NTAB16(8, 0x08), 4, b43_nphy_workarounds_rev7plus() 3144 b43_ntab_write_bulk(dev, B43_NTAB16(8, 0x18), 4, b43_nphy_workarounds_rev7plus() 3146 b43_ntab_write_bulk(dev, B43_NTAB16(8, 0x0C), 4, b43_nphy_workarounds_rev7plus() 3148 b43_ntab_write_bulk(dev, B43_NTAB16(8, 0x1C), 4, b43_nphy_workarounds_rev7plus() 3153 static void b43_nphy_workarounds_rev3plus(struct b43_wldev dev) b43_nphy_workarounds_rev3plus() argument 3155 struct b43_phy_n nphy = dev->phy.n; b43_nphy_workarounds_rev3plus() 3156 struct ssb_sprom sprom = dev->dev->bus_sprom; b43_nphy_workarounds_rev3plus() 3188 b43_phy_write(dev, B43_NPHY_FORCEFRONT0, 0x1f8); b43_nphy_workarounds_rev3plus() 3189 b43_phy_write(dev, B43_NPHY_FORCEFRONT1, 0x1f8); b43_nphy_workarounds_rev3plus() 3191 tmp32 = b43_ntab_read(dev, B43_NTAB32(30, 0)); b43_nphy_workarounds_rev3plus() 3193 b43_ntab_write(dev, B43_NTAB32(30, 0), tmp32); b43_nphy_workarounds_rev3plus() 3195 b43_phy_write(dev, B43_NPHY_PHASETR_A0, 0x0125); b43_nphy_workarounds_rev3plus() 3196 b43_phy_write(dev, B43_NPHY_PHASETR_A1, 0x01B3); b43_nphy_workarounds_rev3plus() 3197 b43_phy_write(dev, B43_NPHY_PHASETR_A2, 0x0105); b43_nphy_workarounds_rev3plus() 3198 b43_phy_write(dev, B43_NPHY_PHASETR_B0, 0x016E); b43_nphy_workarounds_rev3plus() 3199 b43_phy_write(dev, B43_NPHY_PHASETR_B1, 0x00CD); b43_nphy_workarounds_rev3plus() 3200 b43_phy_write(dev, B43_NPHY_PHASETR_B2, 0x0020); b43_nphy_workarounds_rev3plus() 3202 b43_phy_write(dev, B43_NPHY_REV3_C1_CLIP_LOGAIN_B, 0x000C); b43_nphy_workarounds_rev3plus() 3203 b43_phy_write(dev, B43_NPHY_REV3_C2_CLIP_LOGAIN_B, 0x000C); b43_nphy_workarounds_rev3plus() 3206 b43_nphy_set_rf_sequence(dev, 1, tx2rx_events, tx2rx_delays, b43_nphy_workarounds_rev3plus() 3210 if (b43_nphy_ipa(dev)) b43_nphy_workarounds_rev3plus() 3211 b43_nphy_set_rf_sequence(dev, 0, rx2tx_events_ipa, b43_nphy_workarounds_rev3plus() 3215 if (b43_nphy_ipa(dev)) { b43_nphy_workarounds_rev3plus() 3220 b43_nphy_set_rf_sequence(dev, 0, rx2tx_events, rx2tx_delays, b43_nphy_workarounds_rev3plus() 3224 tmp16 = (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) ? b43_nphy_workarounds_rev3plus() 3226 b43_phy_write(dev, B43_NPHY_ENDROP_TLEN, tmp16); b43_nphy_workarounds_rev3plus() 3228 b43_phy_maskset(dev, B43_NPHY_SGILTRNOFFSET, 0xF0FF, 0x0700); b43_nphy_workarounds_rev3plus() 3230 if (!b43_is_40mhz(dev)) { b43_nphy_workarounds_rev3plus() 3231 b43_ntab_write(dev, B43_NTAB32(16, 3), 0x18D); b43_nphy_workarounds_rev3plus() 3232 b43_ntab_write(dev, B43_NTAB32(16, 127), 0x18D); b43_nphy_workarounds_rev3plus() 3234 b43_ntab_write(dev, B43_NTAB32(16, 3), 0x14D); b43_nphy_workarounds_rev3plus() 3235 b43_ntab_write(dev, B43_NTAB32(16, 127), 0x14D); b43_nphy_workarounds_rev3plus() 3238 b43_nphy_gain_ctl_workarounds(dev); b43_nphy_workarounds_rev3plus() 3240 b43_ntab_write(dev, B43_NTAB16(8, 0), 2); b43_nphy_workarounds_rev3plus() 3241 b43_ntab_write(dev, B43_NTAB16(8, 16), 2); b43_nphy_workarounds_rev3plus() 3243 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) b43_nphy_workarounds_rev3plus() 3251 if (!(dev->phy.rev >= 4 && b43_nphy_workarounds_rev3plus() 3252 b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ)) b43_nphy_workarounds_rev3plus() 3257 b43_ntab_write_bulk(dev, B43_NTAB16(8, 0x08), 4, vmid); b43_nphy_workarounds_rev3plus() 3258 b43_ntab_write_bulk(dev, B43_NTAB16(8, 0x18), 4, vmid); b43_nphy_workarounds_rev3plus() 3259 b43_ntab_write_bulk(dev, B43_NTAB16(8, 0x0c), 4, gain); b43_nphy_workarounds_rev3plus() 3260 b43_ntab_write_bulk(dev, B43_NTAB16(8, 0x1c), 4, gain); b43_nphy_workarounds_rev3plus() 3263 if (dev->phy.rev >= 6) { b43_nphy_workarounds_rev3plus() 3264 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) b43_nphy_workarounds_rev3plus() 3269 } else if (dev->phy.rev == 5) { b43_nphy_workarounds_rev3plus() 3273 b43_ntab_write_bulk(dev, B43_NTAB16(8, 0x08), 4, vmid); b43_nphy_workarounds_rev3plus() 3274 b43_ntab_write_bulk(dev, B43_NTAB16(8, 0x18), 4, vmid); b43_nphy_workarounds_rev3plus() 3275 b43_ntab_write_bulk(dev, B43_NTAB16(8, 0x0c), 4, gain); b43_nphy_workarounds_rev3plus() 3276 b43_ntab_write_bulk(dev, B43_NTAB16(8, 0x1c), 4, gain); b43_nphy_workarounds_rev3plus() 3280 if (b43_current_band(dev->wl) != IEEE80211_BAND_2GHZ) { b43_nphy_workarounds_rev3plus() 3301 b43_ntab_write_bulk(dev, B43_NTAB16(8, 0x08), 4, vmid); b43_nphy_workarounds_rev3plus() 3302 b43_ntab_write_bulk(dev, B43_NTAB16(8, 0x0c), 4, gain); b43_nphy_workarounds_rev3plus() 3304 b43_ntab_write_bulk(dev, B43_NTAB16(8, 0x18), 4, vmid); b43_nphy_workarounds_rev3plus() 3305 b43_ntab_write_bulk(dev, B43_NTAB16(8, 0x1c), 4, gain); b43_nphy_workarounds_rev3plus() 3309 b43_radio_write(dev, B2056_RX0 \| B2056_RX_MIXA_MAST_BIAS, 0x00); b43_nphy_workarounds_rev3plus() 3310 b43_radio_write(dev, B2056_RX1 \| B2056_RX_MIXA_MAST_BIAS, 0x00); b43_nphy_workarounds_rev3plus() 3311 b43_radio_write(dev, B2056_RX0 \| B2056_RX_MIXA_BIAS_MAIN, 0x06); b43_nphy_workarounds_rev3plus() 3312 b43_radio_write(dev, B2056_RX1 \| B2056_RX_MIXA_BIAS_MAIN, 0x06); b43_nphy_workarounds_rev3plus() 3313 b43_radio_write(dev, B2056_RX0 \| B2056_RX_MIXA_BIAS_AUX, 0x07); b43_nphy_workarounds_rev3plus() 3314 b43_radio_write(dev, B2056_RX1 \| B2056_RX_MIXA_BIAS_AUX, 0x07); b43_nphy_workarounds_rev3plus() 3315 b43_radio_write(dev, B2056_RX0 \| B2056_RX_MIXA_LOB_BIAS, 0x88); b43_nphy_workarounds_rev3plus() 3316 b43_radio_write(dev, B2056_RX1 \| B2056_RX_MIXA_LOB_BIAS, 0x88); b43_nphy_workarounds_rev3plus() 3317 b43_radio_write(dev, B2056_RX0 \| B2056_RX_MIXA_CMFB_IDAC, 0x00); b43_nphy_workarounds_rev3plus() 3318 b43_radio_write(dev, B2056_RX1 \| B2056_RX_MIXA_CMFB_IDAC, 0x00); b43_nphy_workarounds_rev3plus() 3319 b43_radio_write(dev, B2056_RX0 \| B2056_RX_MIXG_CMFB_IDAC, 0x00); b43_nphy_workarounds_rev3plus() 3320 b43_radio_write(dev, B2056_RX1 \| B2056_RX_MIXG_CMFB_IDAC, 0x00); b43_nphy_workarounds_rev3plus() 3325 b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ) \|\| b43_nphy_workarounds_rev3plus() 3327 b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ)) b43_nphy_workarounds_rev3plus() 3331 b43_ntab_write(dev, B43_NTAB32(30, 1), tmp32); b43_nphy_workarounds_rev3plus() 3332 b43_ntab_write(dev, B43_NTAB32(30, 2), tmp32); b43_nphy_workarounds_rev3plus() 3333 b43_ntab_write(dev, B43_NTAB32(30, 3), tmp32); b43_nphy_workarounds_rev3plus() 3335 if (dev->phy.rev == 4 && b43_nphy_workarounds_rev3plus() 3336 b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ) { b43_nphy_workarounds_rev3plus() 3337 b43_radio_write(dev, B2056_TX0 \| B2056_TX_GMBB_IDAC, b43_nphy_workarounds_rev3plus() 3339 b43_radio_write(dev, B2056_TX1 \| B2056_TX_GMBB_IDAC, b43_nphy_workarounds_rev3plus() 3344 b43_phy_write(dev, B43_NPHY_ED_CRS40ASSERTTHRESH0, 0x03eb); b43_nphy_workarounds_rev3plus() 3345 b43_phy_write(dev, B43_NPHY_ED_CRS40ASSERTTHRESH1, 0x03eb); b43_nphy_workarounds_rev3plus() 3346 b43_phy_write(dev, B43_NPHY_ED_CRS40DEASSERTTHRESH0, 0x0341); b43_nphy_workarounds_rev3plus() 3347 b43_phy_write(dev, B43_NPHY_ED_CRS40DEASSERTTHRESH1, 0x0341); b43_nphy_workarounds_rev3plus() 3348 b43_phy_write(dev, B43_NPHY_ED_CRS20LASSERTTHRESH0, 0x042b); b43_nphy_workarounds_rev3plus() 3349 b43_phy_write(dev, B43_NPHY_ED_CRS20LASSERTTHRESH1, 0x042b); b43_nphy_workarounds_rev3plus() 3350 b43_phy_write(dev, B43_NPHY_ED_CRS20LDEASSERTTHRESH0, 0x0381); b43_nphy_workarounds_rev3plus() 3351 b43_phy_write(dev, B43_NPHY_ED_CRS20LDEASSERTTHRESH1, 0x0381); b43_nphy_workarounds_rev3plus() 3352 b43_phy_write(dev, B43_NPHY_ED_CRS20UASSERTTHRESH0, 0x042b); b43_nphy_workarounds_rev3plus() 3353 b43_phy_write(dev, B43_NPHY_ED_CRS20UASSERTTHRESH1, 0x042b); b43_nphy_workarounds_rev3plus() 3354 b43_phy_write(dev, B43_NPHY_ED_CRS20UDEASSERTTHRESH0, 0x0381); b43_nphy_workarounds_rev3plus() 3355 b43_phy_write(dev, B43_NPHY_ED_CRS20UDEASSERTTHRESH1, 0x0381); b43_nphy_workarounds_rev3plus() 3357 if (dev->phy.rev >= 6 && sprom->boardflags2_lo & B43_BFL2_SINGLEANT_CCK) b43_nphy_workarounds_rev3plus() 3361 static void b43_nphy_workarounds_rev1_2(struct b43_wldev dev) b43_nphy_workarounds_rev1_2() argument 3363 struct ssb_sprom sprom = dev->dev->bus_sprom; b43_nphy_workarounds_rev1_2() 3364 struct b43_phy phy = &dev->phy; b43_nphy_workarounds_rev1_2() 3374 dev->dev->board_type == BCMA_BOARD_TYPE_BCM943224M93) { b43_nphy_workarounds_rev1_2() 3379 if (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ && b43_nphy_workarounds_rev1_2() 3381 b43_radio_mask(dev, B2055_C1_TX_RF_SPARE, ~0x8); b43_nphy_workarounds_rev1_2() 3382 b43_radio_mask(dev, B2055_C2_TX_RF_SPARE, ~0x8); b43_nphy_workarounds_rev1_2() 3384 b43_radio_set(dev, B2055_C1_TX_RF_SPARE, 0x8); b43_nphy_workarounds_rev1_2() 3385 b43_radio_set(dev, B2055_C2_TX_RF_SPARE, 0x8); b43_nphy_workarounds_rev1_2() 3388 b43_ntab_write(dev, B43_NTAB16(8, 0x00), 0x000A); b43_nphy_workarounds_rev1_2() 3389 b43_ntab_write(dev, B43_NTAB16(8, 0x10), 0x000A); b43_nphy_workarounds_rev1_2() 3390 if (dev->phy.rev < 3) { b43_nphy_workarounds_rev1_2() 3391 b43_ntab_write(dev, B43_NTAB16(8, 0x02), 0xCDAA); b43_nphy_workarounds_rev1_2() 3392 b43_ntab_write(dev, B43_NTAB16(8, 0x12), 0xCDAA); b43_nphy_workarounds_rev1_2() 3395 if (dev->phy.rev < 2) { b43_nphy_workarounds_rev1_2() 3396 b43_ntab_write(dev, B43_NTAB16(8, 0x08), 0x0000); b43_nphy_workarounds_rev1_2() 3397 b43_ntab_write(dev, B43_NTAB16(8, 0x18), 0x0000); b43_nphy_workarounds_rev1_2() 3398 b43_ntab_write(dev, B43_NTAB16(8, 0x07), 0x7AAB); b43_nphy_workarounds_rev1_2() 3399 b43_ntab_write(dev, B43_NTAB16(8, 0x17), 0x7AAB); b43_nphy_workarounds_rev1_2() 3400 b43_ntab_write(dev, B43_NTAB16(8, 0x06), 0x0800); b43_nphy_workarounds_rev1_2() 3401 b43_ntab_write(dev, B43_NTAB16(8, 0x16), 0x0800); b43_nphy_workarounds_rev1_2() 3404 b43_phy_write(dev, B43_NPHY_RFCTL_LUT_TRSW_LO1, 0x2D8); b43_nphy_workarounds_rev1_2() 3405 b43_phy_write(dev, B43_NPHY_RFCTL_LUT_TRSW_UP1, 0x301); b43_nphy_workarounds_rev1_2() 3406 b43_phy_write(dev, B43_NPHY_RFCTL_LUT_TRSW_LO2, 0x2D8); b43_nphy_workarounds_rev1_2() 3407 b43_phy_write(dev, B43_NPHY_RFCTL_LUT_TRSW_UP2, 0x301); b43_nphy_workarounds_rev1_2() 3409 b43_nphy_set_rf_sequence(dev, 0, events1, delays1, 7); b43_nphy_workarounds_rev1_2() 3410 b43_nphy_set_rf_sequence(dev, 1, events2, delays2, 7); b43_nphy_workarounds_rev1_2() 3412 b43_nphy_gain_ctl_workarounds(dev); b43_nphy_workarounds_rev1_2() 3414 if (dev->phy.rev < 2) { b43_nphy_workarounds_rev1_2() 3415 if (b43_phy_read(dev, B43_NPHY_RXCTL) & 0x2) b43_nphy_workarounds_rev1_2() 3416 b43_hf_write(dev, b43_hf_read(dev) \| b43_nphy_workarounds_rev1_2() 3418 } else if (dev->phy.rev == 2) { b43_nphy_workarounds_rev1_2() 3419 b43_phy_write(dev, B43_NPHY_CRSCHECK2, 0); b43_nphy_workarounds_rev1_2() 3420 b43_phy_write(dev, B43_NPHY_CRSCHECK3, 0); b43_nphy_workarounds_rev1_2() 3423 if (dev->phy.rev < 2) b43_nphy_workarounds_rev1_2() 3424 b43_phy_mask(dev, B43_NPHY_SCRAM_SIGCTL, b43_nphy_workarounds_rev1_2() 3428 b43_phy_write(dev, B43_NPHY_PHASETR_A0, 0x125); b43_nphy_workarounds_rev1_2() 3429 b43_phy_write(dev, B43_NPHY_PHASETR_A1, 0x1B3); b43_nphy_workarounds_rev1_2() 3430 b43_phy_write(dev, B43_NPHY_PHASETR_A2, 0x105); b43_nphy_workarounds_rev1_2() 3431 b43_phy_write(dev, B43_NPHY_PHASETR_B0, 0x16E); b43_nphy_workarounds_rev1_2() 3432 b43_phy_write(dev, B43_NPHY_PHASETR_B1, 0xCD); b43_nphy_workarounds_rev1_2() 3433 b43_phy_write(dev, B43_NPHY_PHASETR_B2, 0x20); b43_nphy_workarounds_rev1_2() 3435 if (dev->phy.rev < 3) { b43_nphy_workarounds_rev1_2() 3436 b43_phy_mask(dev, B43_NPHY_PIL_DW1, b43_nphy_workarounds_rev1_2() 3438 b43_phy_write(dev, B43_NPHY_TXF_20CO_S2B1, 0xB5); b43_nphy_workarounds_rev1_2() 3439 b43_phy_write(dev, B43_NPHY_TXF_20CO_S2B2, 0xA4); b43_nphy_workarounds_rev1_2() 3440 b43_phy_write(dev, B43_NPHY_TXF_20CO_S2B3, 0x00); b43_nphy_workarounds_rev1_2() 3443 if (dev->phy.rev == 2) b43_nphy_workarounds_rev1_2() 3444 b43_phy_set(dev, B43_NPHY_FINERX2_CGC, b43_nphy_workarounds_rev1_2() 3449 static void b43_nphy_workarounds(struct b43_wldev dev) b43_nphy_workarounds() argument 3451 struct b43_phy phy = &dev->phy; b43_nphy_workarounds() 3454 if (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ) b43_nphy_workarounds() 3455 b43_nphy_classifier(dev, 1, 0); b43_nphy_workarounds() 3457 b43_nphy_classifier(dev, 1, 1); b43_nphy_workarounds() 3460 b43_nphy_stay_in_carrier_search(dev, 1); b43_nphy_workarounds() 3462 b43_phy_set(dev, B43_NPHY_IQFLIP, b43_nphy_workarounds() 3466 if (dev->phy.rev >= 7) b43_nphy_workarounds() 3467 b43_nphy_workarounds_rev7plus(dev); b43_nphy_workarounds() 3468 else if (dev->phy.rev >= 3) b43_nphy_workarounds() 3469 b43_nphy_workarounds_rev3plus(dev); b43_nphy_workarounds() 3471 b43_nphy_workarounds_rev1_2(dev); b43_nphy_workarounds() 3474 b43_nphy_stay_in_carrier_search(dev, 0); b43_nphy_workarounds() 3485 static int b43_nphy_tx_tone(struct b43_wldev dev, u32 freq, u16 max_val, b43_nphy_tx_tone() argument 3488 u16 samp = b43_nphy_gen_load_samples(dev, freq, max_val, dac_test); b43_nphy_tx_tone() 3491 b43_nphy_run_samples(dev, samp, 0xFFFF, 0, iqmode, dac_test, b43_nphy_tx_tone() 3497 static void b43_nphy_update_txrx_chain(struct b43_wldev dev) b43_nphy_update_txrx_chain() argument 3499 struct b43_phy_n nphy = dev->phy.n; b43_nphy_update_txrx_chain() 3512 b43_phy_maskset(dev, B43_NPHY_RFSEQCA, b43_nphy_update_txrx_chain() 3517 b43_phy_set(dev, B43_NPHY_RFSEQMODE, b43_nphy_update_txrx_chain() 3520 b43_phy_mask(dev, B43_NPHY_RFSEQMODE, b43_nphy_update_txrx_chain() 3525 static void b43_nphy_stop_playback(struct b43_wldev dev) b43_nphy_stop_playback() argument 3527 struct b43_phy phy = &dev->phy; b43_nphy_stop_playback() 3528 struct b43_phy_n nphy = dev->phy.n; b43_nphy_stop_playback() 3532 b43_nphy_stay_in_carrier_search(dev, 1); b43_nphy_stop_playback() 3534 tmp = b43_phy_read(dev, B43_NPHY_SAMP_STAT); b43_nphy_stop_playback() 3536 b43_phy_set(dev, B43_NPHY_SAMP_CMD, B43_NPHY_SAMP_CMD_STOP); b43_nphy_stop_playback() 3538 b43_phy_mask(dev, B43_NPHY_IQLOCAL_CMDGCTL, 0x7FFF); b43_nphy_stop_playback() 3540 b43_phy_mask(dev, B43_NPHY_SAMP_CMD, ~0x0004); b43_nphy_stop_playback() 3544 b43_ntab_write(dev, B43_NTAB16(15, 87), tmp); b43_nphy_stop_playback() 3550 b43_nphy_rf_ctl_override_rev19(dev, 0x80, 0, 0, true, b43_nphy_stop_playback() 3553 b43_nphy_rf_ctl_override_rev7(dev, 0x80, 0, 0, true, 1); b43_nphy_stop_playback() 3558 b43_nphy_stay_in_carrier_search(dev, 0); b43_nphy_stop_playback() 3562 static void b43_nphy_iq_cal_gain_params(struct b43_wldev dev, u16 core, b43_nphy_iq_cal_gain_params() argument 3566 struct b43_phy phy = &dev->phy; b43_nphy_iq_cal_gain_params() 3570 if (dev->phy.rev >= 3) { b43_nphy_iq_cal_gain_params() 3589 indx = (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ) ? b43_nphy_iq_cal_gain_params() 3611 static void b43_nphy_tx_power_ctrl(struct b43_wldev dev, bool enable) b43_nphy_tx_power_ctrl() argument 3613 struct b43_phy phy = &dev->phy; b43_nphy_tx_power_ctrl() 3614 struct b43_phy_n nphy = dev->phy.n; b43_nphy_tx_power_ctrl() 3617 enum ieee80211_band band = b43_current_band(dev->wl); b43_nphy_tx_power_ctrl() 3620 b43_nphy_stay_in_carrier_search(dev, 1); b43_nphy_tx_power_ctrl() 3624 if (dev->phy.rev >= 3 && b43_nphy_tx_power_ctrl() 3625 (b43_phy_read(dev, B43_NPHY_TXPCTL_CMD) & b43_nphy_tx_power_ctrl() 3630 nphy->tx_pwr_idx[0] = b43_phy_read(dev, b43_nphy_tx_power_ctrl() 3632 nphy->tx_pwr_idx[1] = b43_phy_read(dev, b43_nphy_tx_power_ctrl() 3636 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x6840); b43_nphy_tx_power_ctrl() 3638 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0); b43_nphy_tx_power_ctrl() 3640 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, 0x6C40); b43_nphy_tx_power_ctrl() 3642 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, 0); b43_nphy_tx_power_ctrl() 3645 if (dev->phy.rev >= 3) b43_nphy_tx_power_ctrl() 3647 b43_phy_mask(dev, B43_NPHY_TXPCTL_CMD, ~tmp); b43_nphy_tx_power_ctrl() 3649 if (dev->phy.rev >= 3) { b43_nphy_tx_power_ctrl() 3650 b43_phy_set(dev, B43_NPHY_AFECTL_OVER1, 0x0100); b43_nphy_tx_power_ctrl() 3651 b43_phy_set(dev, B43_NPHY_AFECTL_OVER, 0x0100); b43_nphy_tx_power_ctrl() 3653 b43_phy_set(dev, B43_NPHY_AFECTL_OVER, 0x4000); b43_nphy_tx_power_ctrl() 3656 if (dev->phy.rev == 2) b43_nphy_tx_power_ctrl() 3657 b43_phy_maskset(dev, B43_NPHY_BPHY_CTL3, b43_nphy_tx_power_ctrl() 3659 else if (dev->phy.rev < 2) b43_nphy_tx_power_ctrl() 3660 b43_phy_maskset(dev, B43_NPHY_BPHY_CTL3, b43_nphy_tx_power_ctrl() 3663 if (dev->phy.rev < 2 && b43_is_40mhz(dev)) b43_nphy_tx_power_ctrl() 3664 b43_hf_write(dev, b43_hf_read(dev) \| B43_HF_TSSIRPSMW); b43_nphy_tx_power_ctrl() 3666 b43_ntab_write_bulk(dev, B43_NTAB16(26, 64), 84, b43_nphy_tx_power_ctrl() 3668 b43_ntab_write_bulk(dev, B43_NTAB16(27, 64), 84, b43_nphy_tx_power_ctrl() 3675 if (dev->phy.rev >= 3) { b43_nphy_tx_power_ctrl() 3680 b43_phy_maskset(dev, B43_NPHY_TXPCTL_CMD, ~(bmask), val); b43_nphy_tx_power_ctrl() 3686 b43_phy_maskset(dev, B43_NPHY_TXPCTL_CMD, b43_nphy_tx_power_ctrl() 3689 b43_phy_maskset(dev, B43_NPHY_TXPCTL_INIT, b43_nphy_tx_power_ctrl() 3693 b43_phy_maskset(dev, B43_NPHY_TXPCTL_CMD, b43_nphy_tx_power_ctrl() 3697 b43_phy_maskset(dev, b43_nphy_tx_power_ctrl() 3704 if (dev->phy.rev >= 3) { b43_nphy_tx_power_ctrl() 3708 b43_phy_maskset(dev, B43_NPHY_TXPCTL_CMD, b43_nphy_tx_power_ctrl() 3711 if (dev->phy.rev > 1) b43_nphy_tx_power_ctrl() 3712 b43_phy_maskset(dev, b43_nphy_tx_power_ctrl() 3722 if (dev->phy.rev >= 3) { b43_nphy_tx_power_ctrl() 3723 b43_phy_mask(dev, B43_NPHY_AFECTL_OVER1, ~0x100); b43_nphy_tx_power_ctrl() 3724 b43_phy_mask(dev, B43_NPHY_AFECTL_OVER, ~0x100); b43_nphy_tx_power_ctrl() 3726 b43_phy_mask(dev, B43_NPHY_AFECTL_OVER, ~0x4000); b43_nphy_tx_power_ctrl() 3729 if (dev->phy.rev == 2) b43_nphy_tx_power_ctrl() 3730 b43_phy_maskset(dev, B43_NPHY_BPHY_CTL3, ~0xFF, 0x3b); b43_nphy_tx_power_ctrl() 3731 else if (dev->phy.rev < 2) b43_nphy_tx_power_ctrl() 3732 b43_phy_maskset(dev, B43_NPHY_BPHY_CTL3, ~0xFF, 0x40); b43_nphy_tx_power_ctrl() 3734 if (dev->phy.rev < 2 && b43_is_40mhz(dev)) b43_nphy_tx_power_ctrl() 3735 b43_hf_write(dev, b43_hf_read(dev) & ~B43_HF_TSSIRPSMW); b43_nphy_tx_power_ctrl() 3737 if (b43_nphy_ipa(dev)) { b43_nphy_tx_power_ctrl() 3738 b43_phy_mask(dev, B43_NPHY_PAPD_EN0, ~0x4); b43_nphy_tx_power_ctrl() 3739 b43_phy_mask(dev, B43_NPHY_PAPD_EN1, ~0x4); b43_nphy_tx_power_ctrl() 3744 b43_nphy_stay_in_carrier_search(dev, 0); b43_nphy_tx_power_ctrl() 3748 static void b43_nphy_tx_power_fix(struct b43_wldev dev) b43_nphy_tx_power_fix() argument 3750 struct b43_phy phy = &dev->phy; b43_nphy_tx_power_fix() 3751 struct b43_phy_n nphy = dev->phy.n; b43_nphy_tx_power_fix() 3752 struct ssb_sprom sprom = dev->dev->bus_sprom; b43_nphy_tx_power_fix() 3761 b43_nphy_stay_in_carrier_search(dev, 1); b43_nphy_tx_power_fix() 3764 if (dev->phy.rev >= 7) { b43_nphy_tx_power_fix() 3766 } else if (dev->phy.rev >= 3) { b43_nphy_tx_power_fix() 3773 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) { b43_nphy_tx_power_fix() 3790 if (dev->phy.rev < 7 && b43_nphy_tx_power_fix() 3802 const u32 table = b43_nphy_get_tx_gain_table(dev); b43_nphy_tx_power_fix() 3808 if (dev->phy.rev >= 3) b43_nphy_tx_power_fix() 3813 if (dev->phy.rev >= 7) b43_nphy_tx_power_fix() 3819 if (dev->phy.rev >= 3) { b43_nphy_tx_power_fix() 3821 b43_phy_set(dev, B43_NPHY_AFECTL_OVER1, 0x0100); b43_nphy_tx_power_fix() 3823 b43_phy_set(dev, B43_NPHY_AFECTL_OVER, 0x0100); b43_nphy_tx_power_fix() 3825 b43_phy_set(dev, B43_NPHY_AFECTL_OVER, 0x4000); b43_nphy_tx_power_fix() 3829 b43_phy_write(dev, B43_NPHY_AFECTL_DACGAIN1, dac_gain); b43_nphy_tx_power_fix() 3831 b43_phy_write(dev, B43_NPHY_AFECTL_DACGAIN2, dac_gain); b43_nphy_tx_power_fix() 3833 b43_ntab_write(dev, B43_NTAB16(0x7, 0x110 + i), radio_gain); b43_nphy_tx_power_fix() 3835 tmp = b43_ntab_read(dev, B43_NTAB16(0xF, 0x57)); b43_nphy_tx_power_fix() 3840 b43_ntab_write(dev, B43_NTAB16(0xF, 0x57), tmp); b43_nphy_tx_power_fix() 3842 if (b43_nphy_ipa(dev)) { b43_nphy_tx_power_fix() 3846 tmp32 = b43_ntab_read(dev, B43_NTAB32(26 + i, b43_nphy_tx_power_fix() 3848 b43_phy_maskset(dev, reg, 0xE00F, (u32) tmp32 << 4); b43_nphy_tx_power_fix() 3849 b43_phy_set(dev, reg, 0x4); b43_nphy_tx_power_fix() 3853 b43_phy_mask(dev, B43_NPHY_BPHY_CTL2, ~B43_NPHY_BPHY_CTL2_LUT); b43_nphy_tx_power_fix() 3856 b43_nphy_stay_in_carrier_search(dev, 0); b43_nphy_tx_power_fix() 3859 static void b43_nphy_ipa_internal_tssi_setup(struct b43_wldev dev) b43_nphy_ipa_internal_tssi_setup() argument 3861 struct b43_phy phy = &dev->phy; b43_nphy_ipa_internal_tssi_setup() 3871 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) { b43_nphy_ipa_internal_tssi_setup() 3872 b43_radio_write(dev, r + 0x5, 0x5); b43_nphy_ipa_internal_tssi_setup() 3873 b43_radio_write(dev, r + 0x9, 0xE); b43_nphy_ipa_internal_tssi_setup() 3875 b43_radio_write(dev, r + 0xA, 0); b43_nphy_ipa_internal_tssi_setup() 3877 b43_radio_write(dev, r + 0xB, 1); b43_nphy_ipa_internal_tssi_setup() 3879 b43_radio_write(dev, r + 0xB, 0x31); b43_nphy_ipa_internal_tssi_setup() 3881 b43_radio_write(dev, r + 0x5, 0x9); b43_nphy_ipa_internal_tssi_setup() 3882 b43_radio_write(dev, r + 0x9, 0xC); b43_nphy_ipa_internal_tssi_setup() 3883 b43_radio_write(dev, r + 0xB, 0x0); b43_nphy_ipa_internal_tssi_setup() 3885 b43_radio_write(dev, r + 0xA, 1); b43_nphy_ipa_internal_tssi_setup() 3887 b43_radio_write(dev, r + 0xA, 0x31); b43_nphy_ipa_internal_tssi_setup() 3889 b43_radio_write(dev, r + 0x6, 0); b43_nphy_ipa_internal_tssi_setup() 3890 b43_radio_write(dev, r + 0x7, 0); b43_nphy_ipa_internal_tssi_setup() 3891 b43_radio_write(dev, r + 0x8, 3); b43_nphy_ipa_internal_tssi_setup() 3892 b43_radio_write(dev, r + 0xC, 0); b43_nphy_ipa_internal_tssi_setup() 3895 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) b43_nphy_ipa_internal_tssi_setup() 3896 b43_radio_write(dev, B2056_SYN_RESERVED_ADDR31, 0x128); b43_nphy_ipa_internal_tssi_setup() 3898 b43_radio_write(dev, B2056_SYN_RESERVED_ADDR31, 0x80); b43_nphy_ipa_internal_tssi_setup() 3899 b43_radio_write(dev, B2056_SYN_RESERVED_ADDR30, 0); b43_nphy_ipa_internal_tssi_setup() 3900 b43_radio_write(dev, B2056_SYN_GPIO_MASTER1, 0x29); b43_nphy_ipa_internal_tssi_setup() 3905 b43_radio_write(dev, r \| B2056_TX_IQCAL_VCM_HG, 0); b43_nphy_ipa_internal_tssi_setup() 3906 b43_radio_write(dev, r \| B2056_TX_IQCAL_IDAC, 0); b43_nphy_ipa_internal_tssi_setup() 3907 b43_radio_write(dev, r \| B2056_TX_TSSI_VCM, 3); b43_nphy_ipa_internal_tssi_setup() 3908 b43_radio_write(dev, r \| B2056_TX_TX_AMP_DET, 0); b43_nphy_ipa_internal_tssi_setup() 3909 b43_radio_write(dev, r \| B2056_TX_TSSI_MISC1, 8); b43_nphy_ipa_internal_tssi_setup() 3910 b43_radio_write(dev, r \| B2056_TX_TSSI_MISC2, 0); b43_nphy_ipa_internal_tssi_setup() 3911 b43_radio_write(dev, r \| B2056_TX_TSSI_MISC3, 0); b43_nphy_ipa_internal_tssi_setup() 3912 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) { b43_nphy_ipa_internal_tssi_setup() 3913 b43_radio_write(dev, r \| B2056_TX_TX_SSI_MASTER, b43_nphy_ipa_internal_tssi_setup() 3916 b43_radio_write(dev, r \| B2056_TX_TSSIA, b43_nphy_ipa_internal_tssi_setup() 3919 b43_radio_write(dev, r \| B2056_TX_TSSIG, b43_nphy_ipa_internal_tssi_setup() 3922 b43_radio_write(dev, r \| B2056_TX_TSSIG, b43_nphy_ipa_internal_tssi_setup() 3924 b43_radio_write(dev, r \| B2056_TX_TX_SSI_MUX, b43_nphy_ipa_internal_tssi_setup() 3927 b43_radio_write(dev, r \| B2056_TX_TX_SSI_MASTER, b43_nphy_ipa_internal_tssi_setup() 3929 b43_radio_write(dev, r \| B2056_TX_TSSIA, 0x31); b43_nphy_ipa_internal_tssi_setup() 3930 b43_radio_write(dev, r \| B2056_TX_TSSIG, 0x0); b43_nphy_ipa_internal_tssi_setup() 3931 b43_radio_write(dev, r \| B2056_TX_TX_SSI_MUX, b43_nphy_ipa_internal_tssi_setup() 3943 static void b43_nphy_tx_power_ctl_idle_tssi(struct b43_wldev dev) b43_nphy_tx_power_ctl_idle_tssi() argument 3945 struct b43_phy phy = &dev->phy; b43_nphy_tx_power_ctl_idle_tssi() 3946 struct b43_phy_n nphy = dev->phy.n; b43_nphy_tx_power_ctl_idle_tssi() 3954 if (b43_nphy_ipa(dev)) b43_nphy_tx_power_ctl_idle_tssi() 3955 b43_nphy_ipa_internal_tssi_setup(dev); b43_nphy_tx_power_ctl_idle_tssi() 3958 b43_nphy_rf_ctl_override_rev19(dev, 0x1000, 0, 3, false, 0); b43_nphy_tx_power_ctl_idle_tssi() 3960 b43_nphy_rf_ctl_override_rev7(dev, 0x1000, 0, 3, false, 0); b43_nphy_tx_power_ctl_idle_tssi() 3962 b43_nphy_rf_ctl_override(dev, 0x2000, 0, 3, false); b43_nphy_tx_power_ctl_idle_tssi() 3964 b43_nphy_stop_playback(dev); b43_nphy_tx_power_ctl_idle_tssi() 3965 b43_nphy_tx_tone(dev, 4000, 0, false, false, false); b43_nphy_tx_power_ctl_idle_tssi() 3967 tmp = b43_nphy_poll_rssi(dev, N_RSSI_TSSI_2G, rssi, 1); b43_nphy_tx_power_ctl_idle_tssi() 3968 b43_nphy_stop_playback(dev); b43_nphy_tx_power_ctl_idle_tssi() 3970 b43_nphy_rssi_select(dev, 0, N_RSSI_W1); b43_nphy_tx_power_ctl_idle_tssi() 3973 b43_nphy_rf_ctl_override_rev19(dev, 0x1000, 0, 3, true, 0); b43_nphy_tx_power_ctl_idle_tssi() 3975 b43_nphy_rf_ctl_override_rev7(dev, 0x1000, 0, 3, true, 0); b43_nphy_tx_power_ctl_idle_tssi() 3977 b43_nphy_rf_ctl_override(dev, 0x2000, 0, 3, true); b43_nphy_tx_power_ctl_idle_tssi() 3994 static void b43_nphy_tx_prepare_adjusted_power_table(struct b43_wldev dev) b43_nphy_tx_prepare_adjusted_power_table() argument 3996 struct b43_phy_n nphy = dev->phy.n; b43_nphy_tx_prepare_adjusted_power_table() 4022 if (b43_is_40mhz(dev) && dev->phy.rev >= 5) { b43_nphy_tx_prepare_adjusted_power_table() 4026 idx = b43_is_40mhz(dev) ? 52 : 4; b43_nphy_tx_prepare_adjusted_power_table() 4030 idx = b43_is_40mhz(dev) ? 76 : 28; b43_nphy_tx_prepare_adjusted_power_table() 4033 idx = b43_is_40mhz(dev) ? 84 : 36; b43_nphy_tx_prepare_adjusted_power_table() 4036 idx = b43_is_40mhz(dev) ? 92 : 44; b43_nphy_tx_prepare_adjusted_power_table() 4055 static void b43_nphy_tx_power_ctl_setup(struct b43_wldev dev) b43_nphy_tx_power_ctl_setup() argument 4057 struct b43_phy phy = &dev->phy; b43_nphy_tx_power_ctl_setup() 4058 struct b43_phy_n nphy = dev->phy.n; b43_nphy_tx_power_ctl_setup() 4059 struct ssb_sprom sprom = dev->dev->bus_sprom; b43_nphy_tx_power_ctl_setup() 4073 if (dev->dev->core_rev == 11 \|\| dev->dev->core_rev == 12) { b43_nphy_tx_power_ctl_setup() 4074 b43_maskset32(dev, B43_MMIO_MACCTL, ~0, 0x200000); b43_nphy_tx_power_ctl_setup() 4075 b43_read32(dev, B43_MMIO_MACCTL); b43_nphy_tx_power_ctl_setup() 4080 b43_nphy_stay_in_carrier_search(dev, true); b43_nphy_tx_power_ctl_setup() 4082 b43_phy_set(dev, B43_NPHY_TSSIMODE, B43_NPHY_TSSIMODE_EN); b43_nphy_tx_power_ctl_setup() 4083 if (dev->phy.rev >= 3) b43_nphy_tx_power_ctl_setup() 4084 b43_phy_mask(dev, B43_NPHY_TXPCTL_CMD, b43_nphy_tx_power_ctl_setup() 4087 b43_phy_set(dev, B43_NPHY_TXPCTL_CMD, b43_nphy_tx_power_ctl_setup() 4090 if (dev->dev->core_rev == 11 \|\| dev->dev->core_rev == 12) b43_nphy_tx_power_ctl_setup() 4091 b43_maskset32(dev, B43_MMIO_MACCTL, ~0x200000, 0); b43_nphy_tx_power_ctl_setup() 4101 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) { b43_nphy_tx_power_ctl_setup() 4143 ppr_max = b43_ppr_get_max(dev, &nphy->tx_pwr_max_ppr); b43_nphy_tx_power_ctl_setup() 4149 if (dev->phy.rev >= 3) { b43_nphy_tx_power_ctl_setup() 4151 b43_phy_set(dev, B43_NPHY_TXPCTL_ITSSI, 0x4000); b43_nphy_tx_power_ctl_setup() 4152 if (dev->phy.rev >= 7) { b43_nphy_tx_power_ctl_setup() 4155 if (b43_nphy_ipa(dev)) b43_nphy_tx_power_ctl_setup() 4156 b43_radio_write(dev, r + 0x9, (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) ? 0xE : 0xC); b43_nphy_tx_power_ctl_setup() 4159 if (b43_nphy_ipa(dev)) { b43_nphy_tx_power_ctl_setup() 4160 tmp = (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ) ? 0xC : 0xE; b43_nphy_tx_power_ctl_setup() 4161 b43_radio_write(dev, b43_nphy_tx_power_ctl_setup() 4163 b43_radio_write(dev, b43_nphy_tx_power_ctl_setup() 4166 b43_radio_write(dev, b43_nphy_tx_power_ctl_setup() 4168 b43_radio_write(dev, b43_nphy_tx_power_ctl_setup() 4174 if (dev->dev->core_rev == 11 \|\| dev->dev->core_rev == 12) { b43_nphy_tx_power_ctl_setup() 4175 b43_maskset32(dev, B43_MMIO_MACCTL, ~0, 0x200000); b43_nphy_tx_power_ctl_setup() 4176 b43_read32(dev, B43_MMIO_MACCTL); b43_nphy_tx_power_ctl_setup() 4183 b43_phy_maskset(dev, B43_NPHY_TXPCTL_CMD, b43_nphy_tx_power_ctl_setup() 4185 b43_phy_maskset(dev, B43_NPHY_TXPCTL_INIT, b43_nphy_tx_power_ctl_setup() 4188 b43_phy_maskset(dev, B43_NPHY_TXPCTL_CMD, b43_nphy_tx_power_ctl_setup() 4190 if (dev->phy.rev > 1) b43_nphy_tx_power_ctl_setup() 4191 b43_phy_maskset(dev, B43_NPHY_TXPCTL_INIT, b43_nphy_tx_power_ctl_setup() 4195 if (dev->dev->core_rev == 11 \|\| dev->dev->core_rev == 12) b43_nphy_tx_power_ctl_setup() 4196 b43_maskset32(dev, B43_MMIO_MACCTL, ~0x200000, 0); b43_nphy_tx_power_ctl_setup() 4198 b43_phy_write(dev, B43_NPHY_TXPCTL_N, b43_nphy_tx_power_ctl_setup() 4201 b43_phy_write(dev, B43_NPHY_TXPCTL_ITSSI, b43_nphy_tx_power_ctl_setup() 4205 b43_phy_write(dev, B43_NPHY_TXPCTL_TPWR, b43_nphy_tx_power_ctl_setup() 4214 if (dev->phy.rev < 3 && (i <= (31 - idle[c] + 1))) b43_nphy_tx_power_ctl_setup() 4218 b43_ntab_write_bulk(dev, B43_NTAB32(26 + c, 0), 64, regval); b43_nphy_tx_power_ctl_setup() 4221 b43_nphy_tx_prepare_adjusted_power_table(dev); b43_nphy_tx_power_ctl_setup() 4222 b43_ntab_write_bulk(dev, B43_NTAB16(26, 64), 84, nphy->adj_pwr_tbl); b43_nphy_tx_power_ctl_setup() 4223 b43_ntab_write_bulk(dev, B43_NTAB16(27, 64), 84, nphy->adj_pwr_tbl); b43_nphy_tx_power_ctl_setup() 4226 b43_nphy_stay_in_carrier_search(dev, false); b43_nphy_tx_power_ctl_setup() 4229 static void b43_nphy_tx_gain_table_upload(struct b43_wldev dev) b43_nphy_tx_gain_table_upload() argument 4231 struct b43_phy phy = &dev->phy; b43_nphy_tx_gain_table_upload() 4239 table = b43_nphy_get_tx_gain_table(dev); b43_nphy_tx_gain_table_upload() 4243 b43_ntab_write_bulk(dev, B43_NTAB32(26, 192), 128, table); b43_nphy_tx_gain_table_upload() 4244 b43_ntab_write_bulk(dev, B43_NTAB32(27, 192), 128, table); b43_nphy_tx_gain_table_upload() 4256 rf_pwr_offset_table = b43_ntab_get_rf_pwr_offset_table(dev); b43_nphy_tx_gain_table_upload() 4270 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) b43_nphy_tx_gain_table_upload() 4276 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) b43_nphy_tx_gain_table_upload() 4282 b43_ntab_write(dev, B43_NTAB32(26, 576 + i), rfpwr_offset); b43_nphy_tx_gain_table_upload() 4283 b43_ntab_write(dev, B43_NTAB32(27, 576 + i), rfpwr_offset); b43_nphy_tx_gain_table_upload() 4288 static void b43_nphy_pa_override(struct b43_wldev dev, bool enable) b43_nphy_pa_override() argument 4290 struct b43_phy_n nphy = dev->phy.n; b43_nphy_pa_override() 4295 nphy->rfctrl_intc1_save = b43_phy_read(dev, b43_nphy_pa_override() 4297 nphy->rfctrl_intc2_save = b43_phy_read(dev, b43_nphy_pa_override() 4299 band = b43_current_band(dev->wl); b43_nphy_pa_override() 4300 if (dev->phy.rev >= 7) { b43_nphy_pa_override() 4302 } else if (dev->phy.rev >= 3) { b43_nphy_pa_override() 4313 b43_phy_write(dev, B43_NPHY_RFCTL_INTC1, tmp); b43_nphy_pa_override() 4314 b43_phy_write(dev, B43_NPHY_RFCTL_INTC2, tmp); b43_nphy_pa_override() 4316 b43_phy_write(dev, B43_NPHY_RFCTL_INTC1, b43_nphy_pa_override() 4318 b43_phy_write(dev, B43_NPHY_RFCTL_INTC2, b43_nphy_pa_override() 4327 static void b43_nphy_tx_lpf_bw(struct b43_wldev dev) b43_nphy_tx_lpf_bw() argument 4331 if (dev->phy.rev < 3 \|\| dev->phy.rev >= 7) b43_nphy_tx_lpf_bw() 4334 if (b43_nphy_ipa(dev)) b43_nphy_tx_lpf_bw() 4335 tmp = b43_is_40mhz(dev) ? 5 : 4; b43_nphy_tx_lpf_bw() 4337 tmp = b43_is_40mhz(dev) ? 3 : 1; b43_nphy_tx_lpf_bw() 4338 b43_phy_write(dev, B43_NPHY_TXF_40CO_B32S2, b43_nphy_tx_lpf_bw() 4341 if (b43_nphy_ipa(dev)) { b43_nphy_tx_lpf_bw() 4342 tmp = b43_is_40mhz(dev) ? 4 : 1; b43_nphy_tx_lpf_bw() 4343 b43_phy_write(dev, B43_NPHY_TXF_40CO_B1S2, b43_nphy_tx_lpf_bw() 4349 static void b43_nphy_rx_iq_est(struct b43_wldev dev, struct nphy_iq_est est, b43_nphy_rx_iq_est() argument 4355 b43_phy_write(dev, B43_NPHY_IQEST_SAMCNT, samps); b43_nphy_rx_iq_est() 4356 b43_phy_maskset(dev, B43_NPHY_IQEST_WT, ~B43_NPHY_IQEST_WT_VAL, time); b43_nphy_rx_iq_est() 4358 b43_phy_set(dev, B43_NPHY_IQEST_CMD, B43_NPHY_IQEST_CMD_MODE); b43_nphy_rx_iq_est() 4360 b43_phy_mask(dev, B43_NPHY_IQEST_CMD, ~B43_NPHY_IQEST_CMD_MODE); b43_nphy_rx_iq_est() 4362 b43_phy_set(dev, B43_NPHY_IQEST_CMD, B43_NPHY_IQEST_CMD_START); b43_nphy_rx_iq_est() 4365 tmp = b43_phy_read(dev, B43_NPHY_IQEST_CMD); b43_nphy_rx_iq_est() 4367 est->i0_pwr = (b43_phy_read(dev, B43_NPHY_IQEST_IPACC_HI0) << 16) \| b43_nphy_rx_iq_est() 4368 b43_phy_read(dev, B43_NPHY_IQEST_IPACC_LO0); b43_nphy_rx_iq_est() 4369 est->q0_pwr = (b43_phy_read(dev, B43_NPHY_IQEST_QPACC_HI0) << 16) \| b43_nphy_rx_iq_est() 4370 b43_phy_read(dev, B43_NPHY_IQEST_QPACC_LO0); b43_nphy_rx_iq_est() 4371 est->iq0_prod = (b43_phy_read(dev, B43_NPHY_IQEST_IQACC_HI0) << 16) \| b43_nphy_rx_iq_est() 4372 b43_phy_read(dev, B43_NPHY_IQEST_IQACC_LO0); b43_nphy_rx_iq_est() 4374 est->i1_pwr = (b43_phy_read(dev, B43_NPHY_IQEST_IPACC_HI1) << 16) \| b43_nphy_rx_iq_est() 4375 b43_phy_read(dev, B43_NPHY_IQEST_IPACC_LO1); b43_nphy_rx_iq_est() 4376 est->q1_pwr = (b43_phy_read(dev, B43_NPHY_IQEST_QPACC_HI1) << 16) \| b43_nphy_rx_iq_est() 4377 b43_phy_read(dev, B43_NPHY_IQEST_QPACC_LO1); b43_nphy_rx_iq_est() 4378 est->iq1_prod = (b43_phy_read(dev, B43_NPHY_IQEST_IQACC_HI1) << 16) \| b43_nphy_rx_iq_est() 4379 b43_phy_read(dev, B43_NPHY_IQEST_IQACC_LO1); b43_nphy_rx_iq_est() 4388 static void b43_nphy_rx_iq_coeffs(struct b43_wldev dev, bool write, b43_nphy_rx_iq_coeffs() argument 4392 b43_phy_write(dev, B43_NPHY_C1_RXIQ_COMPA0, pcomp->a0); b43_nphy_rx_iq_coeffs() 4393 b43_phy_write(dev, B43_NPHY_C1_RXIQ_COMPB0, pcomp->b0); b43_nphy_rx_iq_coeffs() 4394 b43_phy_write(dev, B43_NPHY_C2_RXIQ_COMPA1, pcomp->a1); b43_nphy_rx_iq_coeffs() 4395 b43_phy_write(dev, B43_NPHY_C2_RXIQ_COMPB1, pcomp->b1); b43_nphy_rx_iq_coeffs() 4397 pcomp->a0 = b43_phy_read(dev, B43_NPHY_C1_RXIQ_COMPA0); b43_nphy_rx_iq_coeffs() 4398 pcomp->b0 = b43_phy_read(dev, B43_NPHY_C1_RXIQ_COMPB0); b43_nphy_rx_iq_coeffs() 4399 pcomp->a1 = b43_phy_read(dev, B43_NPHY_C2_RXIQ_COMPA1); b43_nphy_rx_iq_coeffs() 4400 pcomp->b1 = b43_phy_read(dev, B43_NPHY_C2_RXIQ_COMPB1); b43_nphy_rx_iq_coeffs() 4407 static void b43_nphy_rx_cal_phy_cleanup(struct b43_wldev dev, u8 core) 4409 u16 regs = dev->phy.n->tx_rx_cal_phy_saveregs; 4411 b43_phy_write(dev, B43_NPHY_RFSEQCA, regs[0]); 4413 b43_phy_write(dev, B43_NPHY_AFECTL_C1, regs[1]); 4414 b43_phy_write(dev, B43_NPHY_AFECTL_OVER1, regs[2]); 4416 b43_phy_write(dev, B43_NPHY_AFECTL_C2, regs[1]); 4417 b43_phy_write(dev, B43_NPHY_AFECTL_OVER, regs[2]); 4419 b43_phy_write(dev, B43_NPHY_RFCTL_INTC1, regs[3]); 4420 b43_phy_write(dev, B43_NPHY_RFCTL_INTC2, regs[4]); 4421 b43_phy_write(dev, B43_NPHY_RFCTL_RSSIO1, regs[5]); 4422 b43_phy_write(dev, B43_NPHY_RFCTL_RSSIO2, regs[6]); 4423 b43_phy_write(dev, B43_NPHY_TXF_40CO_B1S1, regs[7]); 4424 b43_phy_write(dev, B43_NPHY_RFCTL_OVER, regs[8]); 4425 b43_phy_write(dev, B43_NPHY_PAPD_EN0, regs[9]); 4426 b43_phy_write(dev, B43_NPHY_PAPD_EN1, regs[10]); 4430 static void b43_nphy_rx_cal_phy_setup(struct b43_wldev dev, u8 core) 4433 u16 regs = dev->phy.n->tx_rx_cal_phy_saveregs; 4435 regs[0] = b43_phy_read(dev, B43_NPHY_RFSEQCA); 4437 regs[1] = b43_phy_read(dev, B43_NPHY_AFECTL_C1); 4438 regs[2] = b43_phy_read(dev, B43_NPHY_AFECTL_OVER1); 4440 regs[1] = b43_phy_read(dev, B43_NPHY_AFECTL_C2); 4441 regs[2] = b43_phy_read(dev, B43_NPHY_AFECTL_OVER); 4443 regs[3] = b43_phy_read(dev, B43_NPHY_RFCTL_INTC1); 4444 regs[4] = b43_phy_read(dev, B43_NPHY_RFCTL_INTC2); 4445 regs[5] = b43_phy_read(dev, B43_NPHY_RFCTL_RSSIO1); 4446 regs[6] = b43_phy_read(dev, B43_NPHY_RFCTL_RSSIO2); 4447 regs[7] = b43_phy_read(dev, B43_NPHY_TXF_40CO_B1S1); 4448 regs[8] = b43_phy_read(dev, B43_NPHY_RFCTL_OVER); 4449 regs[9] = b43_phy_read(dev, B43_NPHY_PAPD_EN0); 4450 regs[10] = b43_phy_read(dev, B43_NPHY_PAPD_EN1); 4452 b43_phy_mask(dev, B43_NPHY_PAPD_EN0, ~0x0001); 4453 b43_phy_mask(dev, B43_NPHY_PAPD_EN1, ~0x0001); 4455 b43_phy_maskset(dev, B43_NPHY_RFSEQCA, 4458 b43_phy_maskset(dev, B43_NPHY_RFSEQCA, ~B43_NPHY_RFSEQCA_TXEN, 4460 b43_phy_maskset(dev, B43_NPHY_RFSEQCA, ~B43_NPHY_RFSEQCA_RXEN, 4462 b43_phy_maskset(dev, B43_NPHY_RFSEQCA, ~B43_NPHY_RFSEQCA_TXDIS, 4466 b43_phy_mask(dev, B43_NPHY_AFECTL_C1, ~0x0007); 4467 b43_phy_set(dev, B43_NPHY_AFECTL_OVER1, 0x0007); 4469 b43_phy_mask(dev, B43_NPHY_AFECTL_C2, ~0x0007); 4470 b43_phy_set(dev, B43_NPHY_AFECTL_OVER, 0x0007); 4473 b43_nphy_rf_ctl_intc_override(dev, N_INTC_OVERRIDE_PA, 0, 3); 4474 b43_nphy_rf_ctl_override(dev, 8, 0, 3, false); 4475 b43_nphy_force_rf_sequence(dev, B43_RFSEQ_RX2TX); 4484 b43_nphy_rf_ctl_intc_override(dev, N_INTC_OVERRIDE_TRSW, rxval, 4486 b43_nphy_rf_ctl_intc_override(dev, N_INTC_OVERRIDE_TRSW, txval, 4492 static void b43_nphy_calc_rx_iq_comp(struct b43_wldev dev, u8 mask) b43_nphy_calc_rx_iq_comp() argument 4510 b43_nphy_rx_iq_coeffs(dev, false, &old); b43_nphy_calc_rx_iq_comp() 4511 b43_nphy_rx_iq_coeffs(dev, true, &new); b43_nphy_calc_rx_iq_comp() 4512 b43_nphy_rx_iq_est(dev, &est, 0x4000, 32, false); b43_nphy_calc_rx_iq_comp() 4565 if (dev->phy.rev >= 3) { b43_nphy_calc_rx_iq_comp() 4573 if (dev->phy.rev >= 3) { b43_nphy_calc_rx_iq_comp() 4586 b43_nphy_rx_iq_coeffs(dev, true, &new); b43_nphy_calc_rx_iq_comp() 4590 static void b43_nphy_tx_iq_workaround(struct b43_wldev dev) b43_nphy_tx_iq_workaround() argument 4593 b43_ntab_read_bulk(dev, B43_NTAB16(0xF, 0x50), 4, array); b43_nphy_tx_iq_workaround() 4595 b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_NPHY_TXIQW0, array[0]); b43_nphy_tx_iq_workaround() 4596 b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_NPHY_TXIQW1, array[1]); b43_nphy_tx_iq_workaround() 4597 b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_NPHY_TXIQW2, array[2]); b43_nphy_tx_iq_workaround() 4598 b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_NPHY_TXIQW3, array[3]); b43_nphy_tx_iq_workaround() 4602 static void b43_nphy_spur_workaround(struct b43_wldev dev) b43_nphy_spur_workaround() argument 4604 struct b43_phy_n nphy = dev->phy.n; b43_nphy_spur_workaround() 4606 u8 channel = dev->phy.channel; b43_nphy_spur_workaround() 4610 B43_WARN_ON(dev->phy.rev < 3); b43_nphy_spur_workaround() 4613 b43_nphy_stay_in_carrier_search(dev, 1); b43_nphy_spur_workaround() 4617 if (channel == 11 && b43_is_40mhz(dev)) b43_nphy_spur_workaround() 4657 b43_nphy_stay_in_carrier_search(dev, 0); b43_nphy_spur_workaround() 4661 static void b43_nphy_tx_pwr_ctrl_coef_setup(struct b43_wldev dev) b43_nphy_tx_pwr_ctrl_coef_setup() argument 4663 struct b43_phy_n nphy = dev->phy.n; b43_nphy_tx_pwr_ctrl_coef_setup() 4671 b43_nphy_stay_in_carrier_search(dev, true); b43_nphy_tx_pwr_ctrl_coef_setup() 4673 b43_ntab_read_bulk(dev, B43_NTAB16(15, 80), 7, buffer); b43_nphy_tx_pwr_ctrl_coef_setup() 4678 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, b43_nphy_tx_pwr_ctrl_coef_setup() 4681 b43_phy_write(dev, B43_NPHY_TABLE_DATAHI, b43_nphy_tx_pwr_ctrl_coef_setup() 4683 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, b43_nphy_tx_pwr_ctrl_coef_setup() 4692 b43_phy_write(dev, B43_NPHY_TABLE_ADDR, b43_nphy_tx_pwr_ctrl_coef_setup() 4695 if (dev->phy.rev >= 3) { b43_nphy_tx_pwr_ctrl_coef_setup() 4702 if (dev->phy.rev < 3) { b43_nphy_tx_pwr_ctrl_coef_setup() 4708 b43_phy_write(dev, B43_NPHY_TABLE_DATAHI, b43_nphy_tx_pwr_ctrl_coef_setup() 4710 b43_phy_write(dev, B43_NPHY_TABLE_DATALO, b43_nphy_tx_pwr_ctrl_coef_setup() 4715 if (dev->phy.rev >= 3) { b43_nphy_tx_pwr_ctrl_coef_setup() 4716 b43_shm_write16(dev, B43_SHM_SHARED, b43_nphy_tx_pwr_ctrl_coef_setup() 4718 b43_shm_write16(dev, B43_SHM_SHARED, b43_nphy_tx_pwr_ctrl_coef_setup() 4723 b43_nphy_stay_in_carrier_search(dev, false); b43_nphy_tx_pwr_ctrl_coef_setup() 4730 static void b43_nphy_restore_rssi_cal(struct b43_wldev dev) b43_nphy_restore_rssi_cal() argument 4732 struct b43_phy_n nphy = dev->phy.n; b43_nphy_restore_rssi_cal() 4737 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) { b43_nphy_restore_rssi_cal() 4749 if (dev->phy.rev >= 19) { b43_nphy_restore_rssi_cal() 4751 } else if (dev->phy.rev >= 7) { b43_nphy_restore_rssi_cal() 4752 b43_radio_maskset(dev, R2057_NB_MASTER_CORE0, ~R2057_VCM_MASK, b43_nphy_restore_rssi_cal() 4754 b43_radio_maskset(dev, R2057_NB_MASTER_CORE1, ~R2057_VCM_MASK, b43_nphy_restore_rssi_cal() 4757 b43_radio_maskset(dev, B2056_RX0 \| B2056_RX_RSSI_MISC, 0xE3, b43_nphy_restore_rssi_cal() 4759 b43_radio_maskset(dev, B2056_RX1 \| B2056_RX_RSSI_MISC, 0xE3, b43_nphy_restore_rssi_cal() 4763 b43_phy_write(dev, B43_NPHY_RSSIMC_0I_RSSI_Z, rssical_phy_regs[0]); b43_nphy_restore_rssi_cal() 4764 b43_phy_write(dev, B43_NPHY_RSSIMC_0Q_RSSI_Z, rssical_phy_regs[1]); b43_nphy_restore_rssi_cal() 4765 b43_phy_write(dev, B43_NPHY_RSSIMC_1I_RSSI_Z, rssical_phy_regs[2]); b43_nphy_restore_rssi_cal() 4766 b43_phy_write(dev, B43_NPHY_RSSIMC_1Q_RSSI_Z, rssical_phy_regs[3]); b43_nphy_restore_rssi_cal() 4768 b43_phy_write(dev, B43_NPHY_RSSIMC_0I_RSSI_X, rssical_phy_regs[4]); b43_nphy_restore_rssi_cal() 4769 b43_phy_write(dev, B43_NPHY_RSSIMC_0Q_RSSI_X, rssical_phy_regs[5]); b43_nphy_restore_rssi_cal() 4770 b43_phy_write(dev, B43_NPHY_RSSIMC_1I_RSSI_X, rssical_phy_regs[6]); b43_nphy_restore_rssi_cal() 4771 b43_phy_write(dev, B43_NPHY_RSSIMC_1Q_RSSI_X, rssical_phy_regs[7]); b43_nphy_restore_rssi_cal() 4773 b43_phy_write(dev, B43_NPHY_RSSIMC_0I_RSSI_Y, rssical_phy_regs[8]); b43_nphy_restore_rssi_cal() 4774 b43_phy_write(dev, B43_NPHY_RSSIMC_0Q_RSSI_Y, rssical_phy_regs[9]); b43_nphy_restore_rssi_cal() 4775 b43_phy_write(dev, B43_NPHY_RSSIMC_1I_RSSI_Y, rssical_phy_regs[10]); b43_nphy_restore_rssi_cal() 4776 b43_phy_write(dev, B43_NPHY_RSSIMC_1Q_RSSI_Y, rssical_phy_regs[11]); b43_nphy_restore_rssi_cal() 4779 static void b43_nphy_tx_cal_radio_setup_rev19(struct b43_wldev dev) b43_nphy_tx_cal_radio_setup_rev19() argument 4784 static void b43_nphy_tx_cal_radio_setup_rev7(struct b43_wldev dev) b43_nphy_tx_cal_radio_setup_rev7() argument 4786 struct b43_phy phy = &dev->phy; b43_nphy_tx_cal_radio_setup_rev7() 4787 struct b43_phy_n nphy = dev->phy.n; b43_nphy_tx_cal_radio_setup_rev7() 4796 save[off + 0] = b43_radio_read(dev, r + R2057_TX0_TX_SSI_MASTER); b43_nphy_tx_cal_radio_setup_rev7() 4797 save[off + 1] = b43_radio_read(dev, r + R2057_TX0_IQCAL_VCM_HG); b43_nphy_tx_cal_radio_setup_rev7() 4798 save[off + 2] = b43_radio_read(dev, r + R2057_TX0_IQCAL_IDAC); b43_nphy_tx_cal_radio_setup_rev7() 4799 save[off + 3] = b43_radio_read(dev, r + R2057_TX0_TSSI_VCM); b43_nphy_tx_cal_radio_setup_rev7() 4801 save[off + 5] = b43_radio_read(dev, r + R2057_TX0_TX_SSI_MUX); b43_nphy_tx_cal_radio_setup_rev7() 4803 save[off + 6] = b43_radio_read(dev, r + R2057_TX0_TSSIA); b43_nphy_tx_cal_radio_setup_rev7() 4804 save[off + 7] = b43_radio_read(dev, r + R2057_TX0_TSSIG); b43_nphy_tx_cal_radio_setup_rev7() 4805 save[off + 8] = b43_radio_read(dev, r + R2057_TX0_TSSI_MISC1); b43_nphy_tx_cal_radio_setup_rev7() 4807 if (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ) { b43_nphy_tx_cal_radio_setup_rev7() 4808 b43_radio_write(dev, r + R2057_TX0_TX_SSI_MASTER, 0xA); b43_nphy_tx_cal_radio_setup_rev7() 4809 b43_radio_write(dev, r + R2057_TX0_IQCAL_VCM_HG, 0x43); b43_nphy_tx_cal_radio_setup_rev7() 4810 b43_radio_write(dev, r + R2057_TX0_IQCAL_IDAC, 0x55); b43_nphy_tx_cal_radio_setup_rev7() 4811 b43_radio_write(dev, r + R2057_TX0_TSSI_VCM, 0); b43_nphy_tx_cal_radio_setup_rev7() 4812 b43_radio_write(dev, r + R2057_TX0_TSSIG, 0); b43_nphy_tx_cal_radio_setup_rev7() 4814 b43_radio_write(dev, r + R2057_TX0_TX_SSI_MUX, 0x4); b43_nphy_tx_cal_radio_setup_rev7() 4816 b43_radio_write(dev, r + R2057_TX0_TSSIA, tmp); b43_nphy_tx_cal_radio_setup_rev7() 4818 b43_radio_write(dev, r + R2057_TX0_TSSI_MISC1, 0x00); b43_nphy_tx_cal_radio_setup_rev7() 4820 b43_radio_write(dev, r + R2057_TX0_TX_SSI_MASTER, 0x6); b43_nphy_tx_cal_radio_setup_rev7() 4821 b43_radio_write(dev, r + R2057_TX0_IQCAL_VCM_HG, 0x43); b43_nphy_tx_cal_radio_setup_rev7() 4822 b43_radio_write(dev, r + R2057_TX0_IQCAL_IDAC, 0x55); b43_nphy_tx_cal_radio_setup_rev7() 4823 b43_radio_write(dev, r + R2057_TX0_TSSI_VCM, 0); b43_nphy_tx_cal_radio_setup_rev7() 4826 b43_radio_write(dev, r + R2057_TX0_TSSIA, 0); b43_nphy_tx_cal_radio_setup_rev7() 4828 b43_radio_write(dev, r + R2057_TX0_TX_SSI_MUX, 0x6); b43_nphy_tx_cal_radio_setup_rev7() 4830 b43_radio_write(dev, r + R2057_TX0_TSSIG, tmp); b43_nphy_tx_cal_radio_setup_rev7() 4832 b43_radio_write(dev, r + R2057_TX0_TSSI_MISC1, 0); b43_nphy_tx_cal_radio_setup_rev7() 4838 static void b43_nphy_tx_cal_radio_setup(struct b43_wldev dev) b43_nphy_tx_cal_radio_setup() argument 4840 struct b43_phy phy = &dev->phy; b43_nphy_tx_cal_radio_setup() 4841 struct b43_phy_n nphy = dev->phy.n; b43_nphy_tx_cal_radio_setup() 4847 b43_nphy_tx_cal_radio_setup_rev19(dev); b43_nphy_tx_cal_radio_setup() 4849 b43_nphy_tx_cal_radio_setup_rev7(dev); b43_nphy_tx_cal_radio_setup() 4855 save[offset + 0] = b43_radio_read(dev, B2055_CAL_RVARCTL); b43_nphy_tx_cal_radio_setup() 4856 save[offset + 1] = b43_radio_read(dev, B2055_CAL_LPOCTL); b43_nphy_tx_cal_radio_setup() 4857 save[offset + 2] = b43_radio_read(dev, B2055_CAL_TS); b43_nphy_tx_cal_radio_setup() 4858 save[offset + 3] = b43_radio_read(dev, B2055_CAL_RCCALRTS); b43_nphy_tx_cal_radio_setup() 4859 save[offset + 4] = b43_radio_read(dev, B2055_CAL_RCALRTS); b43_nphy_tx_cal_radio_setup() 4860 save[offset + 5] = b43_radio_read(dev, B2055_PADDRV); b43_nphy_tx_cal_radio_setup() 4861 save[offset + 6] = b43_radio_read(dev, B2055_XOCTL1); b43_nphy_tx_cal_radio_setup() 4862 save[offset + 7] = b43_radio_read(dev, B2055_XOCTL2); b43_nphy_tx_cal_radio_setup() 4863 save[offset + 8] = b43_radio_read(dev, B2055_XOREGUL); b43_nphy_tx_cal_radio_setup() 4864 save[offset + 9] = b43_radio_read(dev, B2055_XOMISC); b43_nphy_tx_cal_radio_setup() 4865 save[offset + 10] = b43_radio_read(dev, B2055_PLL_LFC1); b43_nphy_tx_cal_radio_setup() 4867 if (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ) { b43_nphy_tx_cal_radio_setup() 4868 b43_radio_write(dev, tmp \| B2055_CAL_RVARCTL, 0x0A); b43_nphy_tx_cal_radio_setup() 4869 b43_radio_write(dev, tmp \| B2055_CAL_LPOCTL, 0x40); b43_nphy_tx_cal_radio_setup() 4870 b43_radio_write(dev, tmp \| B2055_CAL_TS, 0x55); b43_nphy_tx_cal_radio_setup() 4871 b43_radio_write(dev, tmp \| B2055_CAL_RCCALRTS, 0); b43_nphy_tx_cal_radio_setup() 4872 b43_radio_write(dev, tmp \| B2055_CAL_RCALRTS, 0); b43_nphy_tx_cal_radio_setup() 4874 b43_radio_write(dev, tmp \| B2055_PADDRV, 4); b43_nphy_tx_cal_radio_setup() 4875 b43_radio_write(dev, tmp \| B2055_XOCTL1, 1); b43_nphy_tx_cal_radio_setup() 4877 b43_radio_write(dev, tmp \| B2055_PADDRV, 0); b43_nphy_tx_cal_radio_setup() 4878 b43_radio_write(dev, tmp \| B2055_XOCTL1, 0x2F); b43_nphy_tx_cal_radio_setup() 4880 b43_radio_write(dev, tmp \| B2055_XOCTL2, 0); b43_nphy_tx_cal_radio_setup() 4882 b43_radio_write(dev, tmp \| B2055_CAL_RVARCTL, 0x06); b43_nphy_tx_cal_radio_setup() 4883 b43_radio_write(dev, tmp \| B2055_CAL_LPOCTL, 0x40); b43_nphy_tx_cal_radio_setup() 4884 b43_radio_write(dev, tmp \| B2055_CAL_TS, 0x55); b43_nphy_tx_cal_radio_setup() 4885 b43_radio_write(dev, tmp \| B2055_CAL_RCCALRTS, 0); b43_nphy_tx_cal_radio_setup() 4886 b43_radio_write(dev, tmp \| B2055_CAL_RCALRTS, 0); b43_nphy_tx_cal_radio_setup() 4887 b43_radio_write(dev, tmp \| B2055_XOCTL1, 0); b43_nphy_tx_cal_radio_setup() 4889 b43_radio_write(dev, tmp \| B2055_PADDRV, 6); b43_nphy_tx_cal_radio_setup() 4890 b43_radio_write(dev, tmp \| B2055_XOCTL2, b43_nphy_tx_cal_radio_setup() 4891 (dev->phy.rev < 5) ? 0x11 : 0x01); b43_nphy_tx_cal_radio_setup() 4893 b43_radio_write(dev, tmp \| B2055_PADDRV, 0); b43_nphy_tx_cal_radio_setup() 4894 b43_radio_write(dev, tmp \| B2055_XOCTL2, 0); b43_nphy_tx_cal_radio_setup() 4897 b43_radio_write(dev, tmp \| B2055_XOREGUL, 0); b43_nphy_tx_cal_radio_setup() 4898 b43_radio_write(dev, tmp \| B2055_XOMISC, 0); b43_nphy_tx_cal_radio_setup() 4899 b43_radio_write(dev, tmp \| B2055_PLL_LFC1, 0); b43_nphy_tx_cal_radio_setup() 4902 save[0] = b43_radio_read(dev, B2055_C1_TX_RF_IQCAL1); b43_nphy_tx_cal_radio_setup() 4903 b43_radio_write(dev, B2055_C1_TX_RF_IQCAL1, 0x29); b43_nphy_tx_cal_radio_setup() 4905 save[1] = b43_radio_read(dev, B2055_C1_TX_RF_IQCAL2); b43_nphy_tx_cal_radio_setup() 4906 b43_radio_write(dev, B2055_C1_TX_RF_IQCAL2, 0x54); b43_nphy_tx_cal_radio_setup() 4908 save[2] = b43_radio_read(dev, B2055_C2_TX_RF_IQCAL1); b43_nphy_tx_cal_radio_setup() 4909 b43_radio_write(dev, B2055_C2_TX_RF_IQCAL1, 0x29); b43_nphy_tx_cal_radio_setup() 4911 save[3] = b43_radio_read(dev, B2055_C2_TX_RF_IQCAL2); b43_nphy_tx_cal_radio_setup() 4912 b43_radio_write(dev, B2055_C2_TX_RF_IQCAL2, 0x54); b43_nphy_tx_cal_radio_setup() 4914 save[3] = b43_radio_read(dev, B2055_C1_PWRDET_RXTX); b43_nphy_tx_cal_radio_setup() 4915 save[4] = b43_radio_read(dev, B2055_C2_PWRDET_RXTX); b43_nphy_tx_cal_radio_setup() 4917 if (!(b43_phy_read(dev, B43_NPHY_BANDCTL) & b43_nphy_tx_cal_radio_setup() 4919 b43_radio_write(dev, B2055_C1_PWRDET_RXTX, 0x04); b43_nphy_tx_cal_radio_setup() 4920 b43_radio_write(dev, B2055_C2_PWRDET_RXTX, 0x04); b43_nphy_tx_cal_radio_setup() 4922 b43_radio_write(dev, B2055_C1_PWRDET_RXTX, 0x20); b43_nphy_tx_cal_radio_setup() 4923 b43_radio_write(dev, B2055_C2_PWRDET_RXTX, 0x20); b43_nphy_tx_cal_radio_setup() 4926 if (dev->phy.rev < 2) { b43_nphy_tx_cal_radio_setup() 4927 b43_radio_set(dev, B2055_C1_TX_BB_MXGM, 0x20); b43_nphy_tx_cal_radio_setup() 4928 b43_radio_set(dev, B2055_C2_TX_BB_MXGM, 0x20); b43_nphy_tx_cal_radio_setup() 4930 b43_radio_mask(dev, B2055_C1_TX_BB_MXGM, ~0x20); b43_nphy_tx_cal_radio_setup() 4931 b43_radio_mask(dev, B2055_C2_TX_BB_MXGM, ~0x20); b43_nphy_tx_cal_radio_setup() 4937 static void b43_nphy_update_tx_cal_ladder(struct b43_wldev dev, u16 core) b43_nphy_update_tx_cal_ladder() argument 4939 struct b43_phy_n nphy = dev->phy.n; b43_nphy_update_tx_cal_ladder() 4951 b43_ntab_write(dev, B43_NTAB16(15, i), entry); b43_nphy_update_tx_cal_ladder() 4955 b43_ntab_write(dev, B43_NTAB16(15, i + 32), entry); b43_nphy_update_tx_cal_ladder() 4959 static void b43_nphy_pa_set_tx_dig_filter(struct b43_wldev dev, u16 offset, b43_nphy_pa_set_tx_dig_filter() argument 4967 b43_phy_write(dev, offset, filter[i]); b43_nphy_pa_set_tx_dig_filter() 4971 static void b43_nphy_ext_pa_set_tx_dig_filters(struct b43_wldev dev) b43_nphy_ext_pa_set_tx_dig_filters() argument 4973 b43_nphy_pa_set_tx_dig_filter(dev, 0x2C5, b43_nphy_ext_pa_set_tx_dig_filters() 4978 static void b43_nphy_int_pa_set_tx_dig_filters(struct b43_wldev dev) b43_nphy_int_pa_set_tx_dig_filters() argument 4990 b43_nphy_pa_set_tx_dig_filter(dev, offset[i], b43_nphy_int_pa_set_tx_dig_filters() 4994 if (dev->phy.rev == 16) b43_nphy_int_pa_set_tx_dig_filters() 4995 b43_nphy_pa_set_tx_dig_filter(dev, 0x186, dig_filter_phy_rev16); b43_nphy_int_pa_set_tx_dig_filters() 4998 if (dev->phy.rev == 17) { b43_nphy_int_pa_set_tx_dig_filters() 4999 b43_nphy_pa_set_tx_dig_filter(dev, 0x186, dig_filter_phy_rev16); b43_nphy_int_pa_set_tx_dig_filters() 5000 b43_nphy_pa_set_tx_dig_filter(dev, 0x195, b43_nphy_int_pa_set_tx_dig_filters() 5004 if (b43_is_40mhz(dev)) { b43_nphy_int_pa_set_tx_dig_filters() 5005 b43_nphy_pa_set_tx_dig_filter(dev, 0x186, b43_nphy_int_pa_set_tx_dig_filters() 5008 if (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ) b43_nphy_int_pa_set_tx_dig_filters() 5009 b43_nphy_pa_set_tx_dig_filter(dev, 0x186, b43_nphy_int_pa_set_tx_dig_filters() 5011 if (dev->phy.channel == 14) b43_nphy_int_pa_set_tx_dig_filters() 5012 b43_nphy_pa_set_tx_dig_filter(dev, 0x186, b43_nphy_int_pa_set_tx_dig_filters() 5018 static struct nphy_txgains b43_nphy_get_tx_gains(struct b43_wldev dev) b43_nphy_get_tx_gains() argument 5020 struct b43_phy_n nphy = dev->phy.n; b43_nphy_get_tx_gains() 5030 b43_nphy_stay_in_carrier_search(dev, true); b43_nphy_get_tx_gains() 5031 b43_ntab_read_bulk(dev, B43_NTAB16(7, 0x110), 2, curr_gain); b43_nphy_get_tx_gains() 5033 b43_nphy_stay_in_carrier_search(dev, false); b43_nphy_get_tx_gains() 5036 if (dev->phy.rev >= 7) { b43_nphy_get_tx_gains() 5042 } else if (dev->phy.rev >= 3) { b43_nphy_get_tx_gains() 5057 index[0] = (b43_phy_read(dev, B43_NPHY_C1_TXPCTL_STAT) & b43_nphy_get_tx_gains() 5060 index[1] = (b43_phy_read(dev, B43_NPHY_C2_TXPCTL_STAT) & b43_nphy_get_tx_gains() 5065 table = b43_nphy_get_tx_gain_table(dev); b43_nphy_get_tx_gains() 5069 if (dev->phy.rev >= 7) { b43_nphy_get_tx_gains() 5075 } else if (dev->phy.rev >= 3) { b43_nphy_get_tx_gains() 5093 static void b43_nphy_tx_cal_phy_cleanup(struct b43_wldev dev) b43_nphy_tx_cal_phy_cleanup() argument 5095 u16 regs = dev->phy.n->tx_rx_cal_phy_saveregs; b43_nphy_tx_cal_phy_cleanup() 5097 if (dev->phy.rev >= 3) { b43_nphy_tx_cal_phy_cleanup() 5098 b43_phy_write(dev, B43_NPHY_AFECTL_C1, regs[0]); b43_nphy_tx_cal_phy_cleanup() 5099 b43_phy_write(dev, B43_NPHY_AFECTL_C2, regs[1]); b43_nphy_tx_cal_phy_cleanup() 5100 b43_phy_write(dev, B43_NPHY_AFECTL_OVER1, regs[2]); b43_nphy_tx_cal_phy_cleanup() 5101 b43_phy_write(dev, B43_NPHY_AFECTL_OVER, regs[3]); b43_nphy_tx_cal_phy_cleanup() 5102 b43_phy_write(dev, B43_NPHY_BBCFG, regs[4]); b43_nphy_tx_cal_phy_cleanup() 5103 b43_ntab_write(dev, B43_NTAB16(8, 3), regs[5]); b43_nphy_tx_cal_phy_cleanup() 5104 b43_ntab_write(dev, B43_NTAB16(8, 19), regs[6]); b43_nphy_tx_cal_phy_cleanup() 5105 b43_phy_write(dev, B43_NPHY_RFCTL_INTC1, regs[7]); b43_nphy_tx_cal_phy_cleanup() 5106 b43_phy_write(dev, B43_NPHY_RFCTL_INTC2, regs[8]); b43_nphy_tx_cal_phy_cleanup() 5107 b43_phy_write(dev, B43_NPHY_PAPD_EN0, regs[9]); b43_nphy_tx_cal_phy_cleanup() 5108 b43_phy_write(dev, B43_NPHY_PAPD_EN1, regs[10]); b43_nphy_tx_cal_phy_cleanup() 5109 b43_nphy_reset_cca(dev); b43_nphy_tx_cal_phy_cleanup() 5111 b43_phy_maskset(dev, B43_NPHY_AFECTL_C1, 0x0FFF, regs[0]); b43_nphy_tx_cal_phy_cleanup() 5112 b43_phy_maskset(dev, B43_NPHY_AFECTL_C2, 0x0FFF, regs[1]); b43_nphy_tx_cal_phy_cleanup() 5113 b43_phy_write(dev, B43_NPHY_AFECTL_OVER, regs[2]); b43_nphy_tx_cal_phy_cleanup() 5114 b43_ntab_write(dev, B43_NTAB16(8, 2), regs[3]); b43_nphy_tx_cal_phy_cleanup() 5115 b43_ntab_write(dev, B43_NTAB16(8, 18), regs[4]); b43_nphy_tx_cal_phy_cleanup() 5116 b43_phy_write(dev, B43_NPHY_RFCTL_INTC1, regs[5]); b43_nphy_tx_cal_phy_cleanup() 5117 b43_phy_write(dev, B43_NPHY_RFCTL_INTC2, regs[6]); b43_nphy_tx_cal_phy_cleanup() 5122 static void b43_nphy_tx_cal_phy_setup(struct b43_wldev dev) b43_nphy_tx_cal_phy_setup() argument 5124 struct b43_phy phy = &dev->phy; b43_nphy_tx_cal_phy_setup() 5125 struct b43_phy_n nphy = dev->phy.n; b43_nphy_tx_cal_phy_setup() 5126 u16 regs = dev->phy.n->tx_rx_cal_phy_saveregs; b43_nphy_tx_cal_phy_setup() 5129 regs[0] = b43_phy_read(dev, B43_NPHY_AFECTL_C1); b43_nphy_tx_cal_phy_setup() 5130 regs[1] = b43_phy_read(dev, B43_NPHY_AFECTL_C2); b43_nphy_tx_cal_phy_setup() 5131 if (dev->phy.rev >= 3) { b43_nphy_tx_cal_phy_setup() 5132 b43_phy_maskset(dev, B43_NPHY_AFECTL_C1, 0xF0FF, 0x0A00); b43_nphy_tx_cal_phy_setup() 5133 b43_phy_maskset(dev, B43_NPHY_AFECTL_C2, 0xF0FF, 0x0A00); b43_nphy_tx_cal_phy_setup() 5135 tmp = b43_phy_read(dev, B43_NPHY_AFECTL_OVER1); b43_nphy_tx_cal_phy_setup() 5137 b43_phy_write(dev, B43_NPHY_AFECTL_OVER1, tmp \| 0x0600); b43_nphy_tx_cal_phy_setup() 5139 tmp = b43_phy_read(dev, B43_NPHY_AFECTL_OVER); b43_nphy_tx_cal_phy_setup() 5141 b43_phy_write(dev, B43_NPHY_AFECTL_OVER, tmp \| 0x0600); b43_nphy_tx_cal_phy_setup() 5143 regs[4] = b43_phy_read(dev, B43_NPHY_BBCFG); b43_nphy_tx_cal_phy_setup() 5144 b43_phy_mask(dev, B43_NPHY_BBCFG, b43_nphy_tx_cal_phy_setup() 5147 tmp = b43_ntab_read(dev, B43_NTAB16(8, 3)); b43_nphy_tx_cal_phy_setup() 5149 b43_ntab_write(dev, B43_NTAB16(8, 3), 0); b43_nphy_tx_cal_phy_setup() 5151 tmp = b43_ntab_read(dev, B43_NTAB16(8, 19)); b43_nphy_tx_cal_phy_setup() 5153 b43_ntab_write(dev, B43_NTAB16(8, 19), 0); b43_nphy_tx_cal_phy_setup() 5154 regs[7] = b43_phy_read(dev, B43_NPHY_RFCTL_INTC1); b43_nphy_tx_cal_phy_setup() 5155 regs[8] = b43_phy_read(dev, B43_NPHY_RFCTL_INTC2); b43_nphy_tx_cal_phy_setup() 5158 b43_nphy_rf_ctl_intc_override(dev, N_INTC_OVERRIDE_PA, b43_nphy_tx_cal_phy_setup() 5161 b43_nphy_rf_ctl_intc_override(dev, N_INTC_OVERRIDE_PA, b43_nphy_tx_cal_phy_setup() 5163 b43_nphy_rf_ctl_intc_override(dev, N_INTC_OVERRIDE_TRSW, 2, 1); b43_nphy_tx_cal_phy_setup() 5164 b43_nphy_rf_ctl_intc_override(dev, N_INTC_OVERRIDE_TRSW, 8, 2); b43_nphy_tx_cal_phy_setup() 5166 regs[9] = b43_phy_read(dev, B43_NPHY_PAPD_EN0); b43_nphy_tx_cal_phy_setup() 5167 regs[10] = b43_phy_read(dev, B43_NPHY_PAPD_EN1); b43_nphy_tx_cal_phy_setup() 5168 b43_phy_mask(dev, B43_NPHY_PAPD_EN0, ~0x0001); b43_nphy_tx_cal_phy_setup() 5169 b43_phy_mask(dev, B43_NPHY_PAPD_EN1, ~0x0001); b43_nphy_tx_cal_phy_setup() 5171 tmp = b43_nphy_read_lpf_ctl(dev, 0); b43_nphy_tx_cal_phy_setup() 5173 b43_nphy_rf_ctl_override_rev19(dev, 0x80, tmp, 0, false, b43_nphy_tx_cal_phy_setup() 5176 b43_nphy_rf_ctl_override_rev7(dev, 0x80, tmp, 0, false, b43_nphy_tx_cal_phy_setup() 5181 b43_nphy_rf_ctl_override_rev19(dev, 0x8, 0, 0x3, b43_nphy_tx_cal_phy_setup() 5184 b43_nphy_rf_ctl_override_rev7(dev, 0x8, 0, 0x3, b43_nphy_tx_cal_phy_setup() 5187 b43_radio_maskset(dev, R2057_OVR_REG0, 1 << 4, 1 << 4); b43_nphy_tx_cal_phy_setup() 5188 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) { b43_nphy_tx_cal_phy_setup() 5189 b43_radio_maskset(dev, R2057_PAD2G_TUNE_PUS_CORE0, ~1, 0); b43_nphy_tx_cal_phy_setup() 5190 b43_radio_maskset(dev, R2057_PAD2G_TUNE_PUS_CORE1, ~1, 0); b43_nphy_tx_cal_phy_setup() 5192 b43_radio_maskset(dev, R2057_IPA5G_CASCOFFV_PU_CORE0, ~1, 0); b43_nphy_tx_cal_phy_setup() 5193 b43_radio_maskset(dev, R2057_IPA5G_CASCOFFV_PU_CORE1, ~1, 0); b43_nphy_tx_cal_phy_setup() 5198 b43_phy_maskset(dev, B43_NPHY_AFECTL_C1, 0x0FFF, 0xA000); b43_nphy_tx_cal_phy_setup() 5199 b43_phy_maskset(dev, B43_NPHY_AFECTL_C2, 0x0FFF, 0xA000); b43_nphy_tx_cal_phy_setup() 5200 tmp = b43_phy_read(dev, B43_NPHY_AFECTL_OVER); b43_nphy_tx_cal_phy_setup() 5202 b43_phy_write(dev, B43_NPHY_AFECTL_OVER, tmp \| 0x3000); b43_nphy_tx_cal_phy_setup() 5203 tmp = b43_ntab_read(dev, B43_NTAB16(8, 2)); b43_nphy_tx_cal_phy_setup() 5206 b43_ntab_write(dev, B43_NTAB16(8, 2), tmp); b43_nphy_tx_cal_phy_setup() 5207 tmp = b43_ntab_read(dev, B43_NTAB16(8, 18)); b43_nphy_tx_cal_phy_setup() 5210 b43_ntab_write(dev, B43_NTAB16(8, 18), tmp); b43_nphy_tx_cal_phy_setup() 5211 regs[5] = b43_phy_read(dev, B43_NPHY_RFCTL_INTC1); b43_nphy_tx_cal_phy_setup() 5212 regs[6] = b43_phy_read(dev, B43_NPHY_RFCTL_INTC2); b43_nphy_tx_cal_phy_setup() 5213 if (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ) b43_nphy_tx_cal_phy_setup() 5217 b43_phy_write(dev, B43_NPHY_RFCTL_INTC1, tmp); b43_nphy_tx_cal_phy_setup() 5218 b43_phy_write(dev, B43_NPHY_RFCTL_INTC2, tmp); b43_nphy_tx_cal_phy_setup() 5223 static void b43_nphy_save_cal(struct b43_wldev dev) b43_nphy_save_cal() argument 5225 struct b43_phy phy = &dev->phy; b43_nphy_save_cal() 5226 struct b43_phy_n nphy = dev->phy.n; b43_nphy_save_cal() 5234 b43_nphy_stay_in_carrier_search(dev, 1); b43_nphy_save_cal() 5236 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) { b43_nphy_save_cal() 5248 b43_nphy_rx_iq_coeffs(dev, false, rxcal_coeffs); b43_nphy_save_cal() 5253 txcal_radio_regs[0] = b43_radio_read(dev, b43_nphy_save_cal() 5255 txcal_radio_regs[1] = b43_radio_read(dev, b43_nphy_save_cal() 5257 txcal_radio_regs[4] = b43_radio_read(dev, b43_nphy_save_cal() 5259 txcal_radio_regs[5] = b43_radio_read(dev, b43_nphy_save_cal() 5261 txcal_radio_regs[2] = b43_radio_read(dev, b43_nphy_save_cal() 5263 txcal_radio_regs[3] = b43_radio_read(dev, b43_nphy_save_cal() 5265 txcal_radio_regs[6] = b43_radio_read(dev, b43_nphy_save_cal() 5267 txcal_radio_regs[7] = b43_radio_read(dev, b43_nphy_save_cal() 5270 txcal_radio_regs[0] = b43_radio_read(dev, 0x2021); b43_nphy_save_cal() 5271 txcal_radio_regs[1] = b43_radio_read(dev, 0x2022); b43_nphy_save_cal() 5272 txcal_radio_regs[2] = b43_radio_read(dev, 0x3021); b43_nphy_save_cal() 5273 txcal_radio_regs[3] = b43_radio_read(dev, 0x3022); b43_nphy_save_cal() 5274 txcal_radio_regs[4] = b43_radio_read(dev, 0x2023); b43_nphy_save_cal() 5275 txcal_radio_regs[5] = b43_radio_read(dev, 0x2024); b43_nphy_save_cal() 5276 txcal_radio_regs[6] = b43_radio_read(dev, 0x3023); b43_nphy_save_cal() 5277 txcal_radio_regs[7] = b43_radio_read(dev, 0x3024); b43_nphy_save_cal() 5279 txcal_radio_regs[0] = b43_radio_read(dev, 0x8B); b43_nphy_save_cal() 5280 txcal_radio_regs[1] = b43_radio_read(dev, 0xBA); b43_nphy_save_cal() 5281 txcal_radio_regs[2] = b43_radio_read(dev, 0x8D); b43_nphy_save_cal() 5282 txcal_radio_regs[3] = b43_radio_read(dev, 0xBC); b43_nphy_save_cal() 5284 iqcal_chanspec->center_freq = dev->phy.chandef->chan->center_freq; b43_nphy_save_cal() 5286 cfg80211_get_chandef_type(dev->phy.chandef); b43_nphy_save_cal() 5287 b43_ntab_read_bulk(dev, B43_NTAB16(15, 80), 8, table); b43_nphy_save_cal() 5290 b43_nphy_stay_in_carrier_search(dev, 0); b43_nphy_save_cal() 5294 static void b43_nphy_restore_cal(struct b43_wldev dev) b43_nphy_restore_cal() argument 5296 struct b43_phy phy = &dev->phy; b43_nphy_restore_cal() 5297 struct b43_phy_n nphy = dev->phy.n; b43_nphy_restore_cal() 5307 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) { b43_nphy_restore_cal() 5319 b43_ntab_write_bulk(dev, B43_NTAB16(15, 80), 4, table); b43_nphy_restore_cal() 5322 if (dev->phy.rev >= 3) b43_nphy_restore_cal() 5328 b43_ntab_write_bulk(dev, B43_NTAB16(15, 88), 4, coef); b43_nphy_restore_cal() 5329 b43_ntab_write_bulk(dev, B43_NTAB16(15, 85), 2, loft); b43_nphy_restore_cal() 5330 b43_ntab_write_bulk(dev, B43_NTAB16(15, 93), 2, loft); b43_nphy_restore_cal() 5332 if (dev->phy.rev < 2) b43_nphy_restore_cal() 5333 b43_nphy_tx_iq_workaround(dev); b43_nphy_restore_cal() 5335 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) { b43_nphy_restore_cal() 5347 b43_radio_write(dev, R2057_TX0_LOFT_FINE_I, b43_nphy_restore_cal() 5349 b43_radio_write(dev, R2057_TX0_LOFT_FINE_Q, b43_nphy_restore_cal() 5351 b43_radio_write(dev, R2057_TX0_LOFT_COARSE_I, b43_nphy_restore_cal() 5353 b43_radio_write(dev, R2057_TX0_LOFT_COARSE_Q, b43_nphy_restore_cal() 5355 b43_radio_write(dev, R2057_TX1_LOFT_FINE_I, b43_nphy_restore_cal() 5357 b43_radio_write(dev, R2057_TX1_LOFT_FINE_Q, b43_nphy_restore_cal() 5359 b43_radio_write(dev, R2057_TX1_LOFT_COARSE_I, b43_nphy_restore_cal() 5361 b43_radio_write(dev, R2057_TX1_LOFT_COARSE_Q, b43_nphy_restore_cal() 5364 b43_radio_write(dev, 0x2021, txcal_radio_regs[0]); b43_nphy_restore_cal() 5365 b43_radio_write(dev, 0x2022, txcal_radio_regs[1]); b43_nphy_restore_cal() 5366 b43_radio_write(dev, 0x3021, txcal_radio_regs[2]); b43_nphy_restore_cal() 5367 b43_radio_write(dev, 0x3022, txcal_radio_regs[3]); b43_nphy_restore_cal() 5368 b43_radio_write(dev, 0x2023, txcal_radio_regs[4]); b43_nphy_restore_cal() 5369 b43_radio_write(dev, 0x2024, txcal_radio_regs[5]); b43_nphy_restore_cal() 5370 b43_radio_write(dev, 0x3023, txcal_radio_regs[6]); b43_nphy_restore_cal() 5371 b43_radio_write(dev, 0x3024, txcal_radio_regs[7]); b43_nphy_restore_cal() 5373 b43_radio_write(dev, 0x8B, txcal_radio_regs[0]); b43_nphy_restore_cal() 5374 b43_radio_write(dev, 0xBA, txcal_radio_regs[1]); b43_nphy_restore_cal() 5375 b43_radio_write(dev, 0x8D, txcal_radio_regs[2]); b43_nphy_restore_cal() 5376 b43_radio_write(dev, 0xBC, txcal_radio_regs[3]); b43_nphy_restore_cal() 5378 b43_nphy_rx_iq_coeffs(dev, true, rxcal_coeffs); b43_nphy_restore_cal() 5382 static int b43_nphy_cal_tx_iq_lo(struct b43_wldev dev, b43_nphy_cal_tx_iq_lo() argument 5386 struct b43_phy phy = &dev->phy; b43_nphy_cal_tx_iq_lo() 5387 struct b43_phy_n nphy = dev->phy.n; b43_nphy_cal_tx_iq_lo() 5404 b43_nphy_stay_in_carrier_search(dev, true); b43_nphy_cal_tx_iq_lo() 5406 if (dev->phy.rev >= 4) { b43_nphy_cal_tx_iq_lo() 5411 b43_ntab_read_bulk(dev, B43_NTAB16(7, 0x110), 2, save); b43_nphy_cal_tx_iq_lo() 5414 b43_nphy_iq_cal_gain_params(dev, i, target, &params[i]); b43_nphy_cal_tx_iq_lo() 5418 b43_ntab_write_bulk(dev, B43_NTAB16(7, 0x110), 2, gain); b43_nphy_cal_tx_iq_lo() 5420 b43_nphy_tx_cal_radio_setup(dev); b43_nphy_cal_tx_iq_lo() 5421 b43_nphy_tx_cal_phy_setup(dev); b43_nphy_cal_tx_iq_lo() 5423 phy6or5x = dev->phy.rev >= 6 \|\| b43_nphy_cal_tx_iq_lo() 5424 (dev->phy.rev == 5 && nphy->ipa2g_on && b43_nphy_cal_tx_iq_lo() 5425 b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ); b43_nphy_cal_tx_iq_lo() 5427 if (b43_is_40mhz(dev)) { b43_nphy_cal_tx_iq_lo() 5428 b43_ntab_write_bulk(dev, B43_NTAB16(15, 0), 18, b43_nphy_cal_tx_iq_lo() 5430 b43_ntab_write_bulk(dev, B43_NTAB16(15, 32), 18, b43_nphy_cal_tx_iq_lo() 5433 b43_ntab_write_bulk(dev, B43_NTAB16(15, 0), 18, b43_nphy_cal_tx_iq_lo() 5435 b43_ntab_write_bulk(dev, B43_NTAB16(15, 32), 18, b43_nphy_cal_tx_iq_lo() 5443 b43_phy_write(dev, B43_NPHY_IQLOCAL_CMDGCTL, 0x8AD9); b43_nphy_cal_tx_iq_lo() 5445 b43_phy_write(dev, B43_NPHY_IQLOCAL_CMDGCTL, 0x8AA9); b43_nphy_cal_tx_iq_lo() 5448 if (!b43_is_40mhz(dev)) b43_nphy_cal_tx_iq_lo() 5454 b43_nphy_run_samples(dev, (b43_is_40mhz(dev) ? 40 : 20) * 8, b43_nphy_cal_tx_iq_lo() 5457 error = b43_nphy_tx_tone(dev, freq, 250, true, false, false); b43_nphy_cal_tx_iq_lo() 5463 if (dev->phy.rev < 3) b43_nphy_cal_tx_iq_lo() 5469 if (dev->phy.rev < 3) b43_nphy_cal_tx_iq_lo() 5473 if (dev->phy.rev >= 3) { b43_nphy_cal_tx_iq_lo() 5483 b43_ntab_write_bulk(dev, B43_NTAB16(15, 64), length, table); b43_nphy_cal_tx_iq_lo() 5486 if (dev->phy.rev >= 3) b43_nphy_cal_tx_iq_lo() 5491 if (dev->phy.rev >= 3) b43_nphy_cal_tx_iq_lo() 5508 if (dev->phy.rev >= 3) b43_nphy_cal_tx_iq_lo() 5513 if (dev->phy.rev >= 3) b43_nphy_cal_tx_iq_lo() 5523 b43_nphy_update_tx_cal_ladder(dev, core); b43_nphy_cal_tx_iq_lo() 5528 b43_phy_write(dev, B43_NPHY_IQLOCAL_CMDNNUM, tmp); b43_nphy_cal_tx_iq_lo() 5531 buffer[0] = b43_ntab_read(dev, b43_nphy_cal_tx_iq_lo() 5535 b43_ntab_write(dev, B43_NTAB16(15, 69 + core), b43_nphy_cal_tx_iq_lo() 5539 b43_phy_write(dev, B43_NPHY_IQLOCAL_CMD, cmd); b43_nphy_cal_tx_iq_lo() 5541 tmp = b43_phy_read(dev, B43_NPHY_IQLOCAL_CMD); b43_nphy_cal_tx_iq_lo() 5547 b43_ntab_read_bulk(dev, B43_NTAB16(15, 96), length, b43_nphy_cal_tx_iq_lo() 5549 b43_ntab_write_bulk(dev, B43_NTAB16(15, 64), length, b43_nphy_cal_tx_iq_lo() 5559 last = (dev->phy.rev < 3) ? 6 : 7; b43_nphy_cal_tx_iq_lo() 5562 b43_ntab_write_bulk(dev, B43_NTAB16(15, 96), 4, buffer); b43_nphy_cal_tx_iq_lo() 5563 b43_ntab_read_bulk(dev, B43_NTAB16(15, 80), 4, buffer); b43_nphy_cal_tx_iq_lo() 5564 if (dev->phy.rev < 3) { b43_nphy_cal_tx_iq_lo() 5570 b43_ntab_write_bulk(dev, B43_NTAB16(15, 88), 4, b43_nphy_cal_tx_iq_lo() 5572 b43_ntab_read_bulk(dev, B43_NTAB16(15, 101), 2, b43_nphy_cal_tx_iq_lo() 5574 b43_ntab_write_bulk(dev, B43_NTAB16(15, 85), 2, b43_nphy_cal_tx_iq_lo() 5576 b43_ntab_write_bulk(dev, B43_NTAB16(15, 93), 2, b43_nphy_cal_tx_iq_lo() 5579 if (dev->phy.rev < 3) b43_nphy_cal_tx_iq_lo() 5581 b43_ntab_read_bulk(dev, B43_NTAB16(15, 96), length, b43_nphy_cal_tx_iq_lo() 5590 if (dev->phy.rev < 3) b43_nphy_cal_tx_iq_lo() 5592 b43_ntab_read_bulk(dev, B43_NTAB16(15, 96), length, b43_nphy_cal_tx_iq_lo() 5596 b43_nphy_stop_playback(dev); b43_nphy_cal_tx_iq_lo() 5597 b43_phy_write(dev, B43_NPHY_IQLOCAL_CMDGCTL, 0); b43_nphy_cal_tx_iq_lo() 5600 b43_nphy_tx_cal_phy_cleanup(dev); b43_nphy_cal_tx_iq_lo() 5601 b43_ntab_write_bulk(dev, B43_NTAB16(7, 0x110), 2, save); b43_nphy_cal_tx_iq_lo() 5603 if (dev->phy.rev < 2 && (!mphase \|\| nphy->mphase_cal_phase_id == last)) b43_nphy_cal_tx_iq_lo() 5604 b43_nphy_tx_iq_workaround(dev); b43_nphy_cal_tx_iq_lo() 5606 if (dev->phy.rev >= 4) b43_nphy_cal_tx_iq_lo() 5609 b43_nphy_stay_in_carrier_search(dev, false); b43_nphy_cal_tx_iq_lo() 5615 static void b43_nphy_reapply_tx_cal_coeffs(struct b43_wldev dev) b43_nphy_reapply_tx_cal_coeffs() argument 5617 struct b43_phy_n nphy = dev->phy.n; b43_nphy_reapply_tx_cal_coeffs() 5623 nphy->txiqlocal_chanspec.center_freq != dev->phy.chandef->chan->center_freq \|\| b43_nphy_reapply_tx_cal_coeffs() 5624 nphy->txiqlocal_chanspec.channel_type != cfg80211_get_chandef_type(dev->phy.chandef)) b43_nphy_reapply_tx_cal_coeffs() 5627 b43_ntab_read_bulk(dev, B43_NTAB16(15, 80), 7, buffer); b43_nphy_reapply_tx_cal_coeffs() 5636 b43_ntab_write_bulk(dev, B43_NTAB16(15, 80), 4, b43_nphy_reapply_tx_cal_coeffs() 5640 b43_ntab_write_bulk(dev, B43_NTAB16(15, 88), 4, b43_nphy_reapply_tx_cal_coeffs() 5642 b43_ntab_write_bulk(dev, B43_NTAB16(15, 85), 2, b43_nphy_reapply_tx_cal_coeffs() 5644 b43_ntab_write_bulk(dev, B43_NTAB16(15, 93), 2, b43_nphy_reapply_tx_cal_coeffs() 5650 static int b43_nphy_rev2_cal_rx_iq(struct b43_wldev dev, b43_nphy_rev2_cal_rx_iq() argument 5653 struct b43_phy_n nphy = dev->phy.n; b43_nphy_rev2_cal_rx_iq() 5676 b43_nphy_stay_in_carrier_search(dev, 1); b43_nphy_rev2_cal_rx_iq() 5678 if (dev->phy.rev < 2) b43_nphy_rev2_cal_rx_iq() 5679 b43_nphy_reapply_tx_cal_coeffs(dev); b43_nphy_rev2_cal_rx_iq() 5680 b43_ntab_read_bulk(dev, B43_NTAB16(7, 0x110), 2, gain_save); b43_nphy_rev2_cal_rx_iq() 5682 b43_nphy_iq_cal_gain_params(dev, i, target, &cal_params[i]); b43_nphy_rev2_cal_rx_iq() 5685 b43_ntab_write_bulk(dev, B43_NTAB16(7, 0x110), 2, cal_gain); b43_nphy_rev2_cal_rx_iq() 5698 tmp[1] = b43_phy_read(dev, B43_NPHY_RFSEQCA); b43_nphy_rev2_cal_rx_iq() 5699 tmp[2] = b43_phy_read(dev, afectl_core); b43_nphy_rev2_cal_rx_iq() 5700 tmp[3] = b43_phy_read(dev, B43_NPHY_AFECTL_OVER); b43_nphy_rev2_cal_rx_iq() 5701 tmp[4] = b43_phy_read(dev, rfctl[0]); b43_nphy_rev2_cal_rx_iq() 5702 tmp[5] = b43_phy_read(dev, rfctl[1]); b43_nphy_rev2_cal_rx_iq() 5704 b43_phy_maskset(dev, B43_NPHY_RFSEQCA, b43_nphy_rev2_cal_rx_iq() 5707 b43_phy_maskset(dev, B43_NPHY_RFSEQCA, ~B43_NPHY_RFSEQCA_TXEN, b43_nphy_rev2_cal_rx_iq() 5709 b43_phy_set(dev, afectl_core, 0x0006); b43_nphy_rev2_cal_rx_iq() 5710 b43_phy_set(dev, B43_NPHY_AFECTL_OVER, 0x0006); b43_nphy_rev2_cal_rx_iq() 5712 band = b43_current_band(dev->wl); b43_nphy_rev2_cal_rx_iq() 5716 b43_phy_write(dev, rfctl[0], 0x140); b43_nphy_rev2_cal_rx_iq() 5718 b43_phy_write(dev, rfctl[0], 0x110); b43_nphy_rev2_cal_rx_iq() 5721 b43_phy_write(dev, rfctl[0], 0x180); b43_nphy_rev2_cal_rx_iq() 5723 b43_phy_write(dev, rfctl[0], 0x120); b43_nphy_rev2_cal_rx_iq() 5727 b43_phy_write(dev, rfctl[1], 0x148); b43_nphy_rev2_cal_rx_iq() 5729 b43_phy_write(dev, rfctl[1], 0x114); b43_nphy_rev2_cal_rx_iq() 5732 b43_radio_maskset(dev, B2055_C1_GENSPARE2, 0xFC, b43_nphy_rev2_cal_rx_iq() 5734 b43_radio_maskset(dev, B2055_C2_GENSPARE2, 0xFC, b43_nphy_rev2_cal_rx_iq() 5772 b43_nphy_rf_ctl_override(dev, 0x400, tmp[0], 3, b43_nphy_rev2_cal_rx_iq() 5774 b43_nphy_force_rf_sequence(dev, B43_RFSEQ_RESET2RX); b43_nphy_rev2_cal_rx_iq() 5775 b43_nphy_stop_playback(dev); b43_nphy_rev2_cal_rx_iq() 5778 ret = b43_nphy_tx_tone(dev, 4000, b43_nphy_rev2_cal_rx_iq() 5783 b43_nphy_run_samples(dev, 160, 0xFFFF, 0, false, b43_nphy_rev2_cal_rx_iq() 5789 b43_nphy_rx_iq_est(dev, &est, 1024, 32, b43_nphy_rev2_cal_rx_iq() 5800 b43_nphy_calc_rx_iq_comp(dev, 1 << i); b43_nphy_rev2_cal_rx_iq() 5802 b43_nphy_stop_playback(dev); b43_nphy_rev2_cal_rx_iq() 5809 b43_radio_mask(dev, B2055_C1_GENSPARE2, 0xFC); b43_nphy_rev2_cal_rx_iq() 5810 b43_radio_mask(dev, B2055_C2_GENSPARE2, 0xFC); b43_nphy_rev2_cal_rx_iq() 5811 b43_phy_write(dev, rfctl[1], tmp[5]); b43_nphy_rev2_cal_rx_iq() 5812 b43_phy_write(dev, rfctl[0], tmp[4]); b43_nphy_rev2_cal_rx_iq() 5813 b43_phy_write(dev, B43_NPHY_AFECTL_OVER, tmp[3]); b43_nphy_rev2_cal_rx_iq() 5814 b43_phy_write(dev, afectl_core, tmp[2]); b43_nphy_rev2_cal_rx_iq() 5815 b43_phy_write(dev, B43_NPHY_RFSEQCA, tmp[1]); b43_nphy_rev2_cal_rx_iq() 5821 b43_nphy_rf_ctl_override(dev, 0x400, 0, 3, true); b43_nphy_rev2_cal_rx_iq() 5822 b43_nphy_force_rf_sequence(dev, B43_RFSEQ_RESET2RX); b43_nphy_rev2_cal_rx_iq() 5823 b43_ntab_write_bulk(dev, B43_NTAB16(7, 0x110), 2, gain_save); b43_nphy_rev2_cal_rx_iq() 5825 b43_nphy_stay_in_carrier_search(dev, 0); b43_nphy_rev2_cal_rx_iq() 5830 static int b43_nphy_rev3_cal_rx_iq(struct b43_wldev dev, b43_nphy_rev3_cal_rx_iq() argument 5837 static int b43_nphy_cal_rx_iq(struct b43_wldev dev, b43_nphy_cal_rx_iq() argument 5840 if (dev->phy.rev >= 7) b43_nphy_cal_rx_iq() 5843 if (dev->phy.rev >= 3) b43_nphy_cal_rx_iq() 5844 return b43_nphy_rev3_cal_rx_iq(dev, target, type, debug); b43_nphy_cal_rx_iq() 5846 return b43_nphy_rev2_cal_rx_iq(dev, target, type, debug); b43_nphy_cal_rx_iq() 5850 static void b43_nphy_set_rx_core_state(struct b43_wldev dev, u8 mask) b43_nphy_set_rx_core_state() argument 5852 struct b43_phy phy = &dev->phy; b43_nphy_set_rx_core_state() 5861 b43_mac_suspend(dev); b43_nphy_set_rx_core_state() 5864 b43_nphy_stay_in_carrier_search(dev, true); b43_nphy_set_rx_core_state() 5866 b43_phy_maskset(dev, B43_NPHY_RFSEQCA, ~B43_NPHY_RFSEQCA_RXEN, b43_nphy_set_rx_core_state() 5870 b43_phy_write(dev, B43_NPHY_HPANT_SWTHRES, 1); b43_nphy_set_rx_core_state() 5871 if (dev->phy.rev >= 3) { b43_nphy_set_rx_core_state() 5875 b43_phy_write(dev, B43_NPHY_HPANT_SWTHRES, 0x1E); b43_nphy_set_rx_core_state() 5876 if (dev->phy.rev >= 3) { b43_nphy_set_rx_core_state() 5881 b43_nphy_force_rf_sequence(dev, B43_RFSEQ_RESET2RX); b43_nphy_set_rx_core_state() 5884 b43_nphy_stay_in_carrier_search(dev, false); b43_nphy_set_rx_core_state() 5886 b43_mac_enable(dev); b43_nphy_set_rx_core_state() 5889 static enum b43_txpwr_result b43_nphy_op_recalc_txpower(struct b43_wldev dev, b43_nphy_op_recalc_txpower() argument 5892 struct b43_phy phy = &dev->phy; b43_nphy_op_recalc_txpower() 5893 struct b43_phy_n nphy = dev->phy.n; b43_nphy_op_recalc_txpower() 5894 struct ieee80211_channel channel = dev->wl->hw->conf.chandef.chan; b43_nphy_op_recalc_txpower() 5904 b43_ppr_clear(dev, ppr); b43_nphy_op_recalc_txpower() 5907 b43_ppr_load_max_from_sprom(dev, ppr, B43_BAND_2G); b43_nphy_op_recalc_txpower() 5913 b43_ppr_apply_max(dev, ppr, max); b43_nphy_op_recalc_txpower() 5914 if (b43_debug(dev, B43_DBG_XMITPOWER)) b43_nphy_op_recalc_txpower() 5915 b43dbg(dev->wl, "Calculated TX power: " Q52_FMT "\n", b43_nphy_op_recalc_txpower() 5916 Q52_ARG(b43_ppr_get_max(dev, ppr))); b43_nphy_op_recalc_txpower() 5922 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) b43_nphy_op_recalc_txpower() 5926 b43_ppr_add(dev, ppr, -hw_gain); b43_nphy_op_recalc_txpower() 5930 b43_ppr_apply_min(dev, ppr, INT_TO_Q52(8)); b43_nphy_op_recalc_txpower() 5934 b43_mac_suspend(dev); b43_nphy_op_recalc_txpower() 5935 b43_nphy_tx_power_ctl_setup(dev); b43_nphy_op_recalc_txpower() 5936 if (dev->dev->core_rev == 11 \|\| dev->dev->core_rev == 12) { b43_nphy_op_recalc_txpower() 5937 b43_maskset32(dev, B43_MMIO_MACCTL, ~0, B43_MACCTL_PHY_LOCK); b43_nphy_op_recalc_txpower() 5938 b43_read32(dev, B43_MMIO_MACCTL); b43_nphy_op_recalc_txpower() 5941 b43_nphy_tx_power_ctrl(dev, nphy->txpwrctrl); b43_nphy_op_recalc_txpower() 5942 if (dev->dev->core_rev == 11 \|\| dev->dev->core_rev == 12) b43_nphy_op_recalc_txpower() 5943 b43_maskset32(dev, B43_MMIO_MACCTL, ~B43_MACCTL_PHY_LOCK, 0); b43_nphy_op_recalc_txpower() 5944 b43_mac_enable(dev); b43_nphy_op_recalc_txpower() 5957 static void b43_nphy_update_mimo_config(struct b43_wldev dev, s32 preamble) b43_nphy_update_mimo_config() argument 5959 u16 mimocfg = b43_phy_read(dev, B43_NPHY_MIMOCFG); b43_nphy_update_mimo_config() 5967 b43_phy_write(dev, B43_NPHY_MIMOCFG, mimocfg); b43_nphy_update_mimo_config() 5971 static void b43_nphy_bphy_init(struct b43_wldev dev) b43_nphy_bphy_init() argument 5978 b43_phy_write(dev, B43_PHY_N_BMODE(0x88 + i), val); b43_nphy_bphy_init() 5983 b43_phy_write(dev, B43_PHY_N_BMODE(0x98 + i), val); b43_nphy_bphy_init() 5986 b43_phy_write(dev, B43_PHY_N_BMODE(0x38), 0x668); b43_nphy_bphy_init() 5990 static void b43_nphy_superswitch_init(struct b43_wldev dev, bool init) b43_nphy_superswitch_init() argument 5992 if (dev->phy.rev >= 7) b43_nphy_superswitch_init() 5995 if (dev->phy.rev >= 3) { b43_nphy_superswitch_init() 5999 b43_ntab_write(dev, B43_NTAB16(9, 2), 0x211); b43_nphy_superswitch_init() 6000 b43_ntab_write(dev, B43_NTAB16(9, 3), 0x222); b43_nphy_superswitch_init() 6001 b43_ntab_write(dev, B43_NTAB16(9, 8), 0x144); b43_nphy_superswitch_init() 6002 b43_ntab_write(dev, B43_NTAB16(9, 12), 0x188); b43_nphy_superswitch_init() 6005 b43_phy_write(dev, B43_NPHY_GPIO_LOOEN, 0); b43_nphy_superswitch_init() 6006 b43_phy_write(dev, B43_NPHY_GPIO_HIOEN, 0); b43_nphy_superswitch_init() 6008 switch (dev->dev->bus_type) { b43_nphy_superswitch_init() 6011 bcma_chipco_gpio_control(&dev->dev->bdev->bus->drv_cc, b43_nphy_superswitch_init() 6017 ssb_chipco_gpio_control(&dev->dev->sdev->bus->chipco, b43_nphy_superswitch_init() 6023 b43_maskset32(dev, B43_MMIO_MACCTL, ~B43_MACCTL_GPOUTSMSK, 0); b43_nphy_superswitch_init() 6024 b43_maskset16(dev, B43_MMIO_GPIO_MASK, ~0, 0xFC00); b43_nphy_superswitch_init() 6025 b43_maskset16(dev, B43_MMIO_GPIO_CONTROL, (~0xFC00 & 0xFFFF), b43_nphy_superswitch_init() 6029 b43_phy_write(dev, B43_NPHY_RFCTL_LUT_TRSW_LO1, 0x2D8); b43_nphy_superswitch_init() 6030 b43_phy_write(dev, B43_NPHY_RFCTL_LUT_TRSW_UP1, 0x301); b43_nphy_superswitch_init() 6031 b43_phy_write(dev, B43_NPHY_RFCTL_LUT_TRSW_LO2, 0x2D8); b43_nphy_superswitch_init() 6032 b43_phy_write(dev, B43_NPHY_RFCTL_LUT_TRSW_UP2, 0x301); b43_nphy_superswitch_init() 6038 static int b43_phy_initn(struct b43_wldev dev) b43_phy_initn() argument 6040 struct ssb_sprom sprom = dev->dev->bus_sprom; b43_phy_initn() 6041 struct b43_phy phy = &dev->phy; b43_phy_initn() 6052 if ((dev->phy.rev >= 3) && b43_phy_initn() 6054 (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ)) { b43_phy_initn() 6055 switch (dev->dev->bus_type) { b43_phy_initn() 6058 bcma_cc_set32(&dev->dev->bdev->bus->drv_cc, b43_phy_initn() 6064 chipco_set32(&dev->dev->sdev->bus->chipco, b43_phy_initn() 6070 nphy->use_int_tx_iq_lo_cal = b43_nphy_ipa(dev) \|\| b43_phy_initn() 6075 b43_nphy_tables_init(dev); b43_phy_initn() 6080 if (dev->phy.rev >= 3) { b43_phy_initn() 6081 b43_phy_write(dev, B43_NPHY_TXF_40CO_B1S1, 0); b43_phy_initn() 6082 b43_phy_write(dev, B43_NPHY_RFCTL_OVER, 0); b43_phy_initn() 6084 b43_phy_write(dev, B43_NPHY_REV7_RF_CTL_OVER3, 0); b43_phy_initn() 6085 b43_phy_write(dev, B43_NPHY_REV7_RF_CTL_OVER4, 0); b43_phy_initn() 6086 b43_phy_write(dev, B43_NPHY_REV7_RF_CTL_OVER5, 0); b43_phy_initn() 6087 b43_phy_write(dev, B43_NPHY_REV7_RF_CTL_OVER6, 0); b43_phy_initn() 6093 b43_phy_write(dev, B43_NPHY_TXF_40CO_B1S0, 0); b43_phy_initn() 6094 b43_phy_write(dev, B43_NPHY_TXF_40CO_B32S1, 0); b43_phy_initn() 6096 b43_phy_write(dev, B43_NPHY_RFCTL_OVER, 0); b43_phy_initn() 6098 b43_phy_write(dev, B43_NPHY_RFCTL_INTC1, 0); b43_phy_initn() 6099 b43_phy_write(dev, B43_NPHY_RFCTL_INTC2, 0); b43_phy_initn() 6100 if (dev->phy.rev < 6) { b43_phy_initn() 6101 b43_phy_write(dev, B43_NPHY_RFCTL_INTC3, 0); b43_phy_initn() 6102 b43_phy_write(dev, B43_NPHY_RFCTL_INTC4, 0); b43_phy_initn() 6104 b43_phy_mask(dev, B43_NPHY_RFSEQMODE, b43_phy_initn() 6107 if (dev->phy.rev >= 3) b43_phy_initn() 6108 b43_phy_write(dev, B43_NPHY_AFECTL_OVER1, 0); b43_phy_initn() 6109 b43_phy_write(dev, B43_NPHY_AFECTL_OVER, 0); b43_phy_initn() 6111 if (dev->phy.rev <= 2) { b43_phy_initn() 6112 tmp = (dev->phy.rev == 2) ? 0x3B : 0x40; b43_phy_initn() 6113 b43_phy_maskset(dev, B43_NPHY_BPHY_CTL3, b43_phy_initn() 6117 b43_phy_write(dev, B43_NPHY_AFESEQ_TX2RX_PUD_20M, 0x20); b43_phy_initn() 6118 b43_phy_write(dev, B43_NPHY_AFESEQ_TX2RX_PUD_40M, 0x20); b43_phy_initn() 6121 (dev->dev->board_vendor == PCI_VENDOR_ID_APPLE && b43_phy_initn() 6122 dev->dev->board_type == BCMA_BOARD_TYPE_BCM943224M93)) b43_phy_initn() 6123 b43_phy_write(dev, B43_NPHY_TXREALFD, 0xA0); b43_phy_initn() 6125 b43_phy_write(dev, B43_NPHY_TXREALFD, 0xB8); b43_phy_initn() 6126 b43_phy_write(dev, B43_NPHY_MIMO_CRSTXEXT, 0xC8); b43_phy_initn() 6127 b43_phy_write(dev, B43_NPHY_PLOAD_CSENSE_EXTLEN, 0x50); b43_phy_initn() 6128 b43_phy_write(dev, B43_NPHY_TXRIFS_FRDEL, 0x30); b43_phy_initn() 6131 b43_nphy_update_mimo_config(dev, nphy->preamble_override); b43_phy_initn() 6133 b43_nphy_update_txrx_chain(dev); b43_phy_initn() 6136 b43_phy_write(dev, B43_NPHY_DUP40_GFBL, 0xAA8); b43_phy_initn() 6137 b43_phy_write(dev, B43_NPHY_DUP40_BL, 0x9A4); b43_phy_initn() 6140 tmp2 = b43_current_band(dev->wl); b43_phy_initn() 6141 if (b43_nphy_ipa(dev)) { b43_phy_initn() 6142 b43_phy_set(dev, B43_NPHY_PAPD_EN0, 0x1); b43_phy_initn() 6143 b43_phy_maskset(dev, B43_NPHY_EPS_TABLE_ADJ0, 0x007F, b43_phy_initn() 6145 b43_phy_set(dev, B43_NPHY_PAPD_EN1, 0x1); b43_phy_initn() 6146 b43_phy_maskset(dev, B43_NPHY_EPS_TABLE_ADJ1, 0x007F, b43_phy_initn() 6148 b43_nphy_int_pa_set_tx_dig_filters(dev); b43_phy_initn() 6150 b43_nphy_ext_pa_set_tx_dig_filters(dev); b43_phy_initn() 6153 b43_nphy_workarounds(dev); b43_phy_initn() 6156 b43_phy_force_clock(dev, 1); b43_phy_initn() 6157 tmp = b43_phy_read(dev, B43_NPHY_BBCFG); b43_phy_initn() 6158 b43_phy_write(dev, B43_NPHY_BBCFG, tmp \| B43_NPHY_BBCFG_RSTCCA); b43_phy_initn() 6159 b43_phy_write(dev, B43_NPHY_BBCFG, tmp & ~B43_NPHY_BBCFG_RSTCCA); b43_phy_initn() 6160 b43_phy_force_clock(dev, 0); b43_phy_initn() 6162 b43_mac_phy_clock_set(dev, true); b43_phy_initn() 6165 b43_nphy_pa_override(dev, false); b43_phy_initn() 6166 b43_nphy_force_rf_sequence(dev, B43_RFSEQ_RX2TX); b43_phy_initn() 6167 b43_nphy_force_rf_sequence(dev, B43_RFSEQ_RESET2RX); b43_phy_initn() 6168 b43_nphy_pa_override(dev, true); b43_phy_initn() 6171 b43_nphy_classifier(dev, 0, 0); b43_phy_initn() 6172 b43_nphy_read_clip_detection(dev, clip); b43_phy_initn() 6173 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) b43_phy_initn() 6174 b43_nphy_bphy_init(dev); b43_phy_initn() 6177 b43_nphy_tx_power_ctrl(dev, false); b43_phy_initn() 6178 b43_nphy_tx_power_fix(dev); b43_phy_initn() 6179 b43_nphy_tx_power_ctl_idle_tssi(dev); b43_phy_initn() 6180 b43_nphy_tx_power_ctl_setup(dev); b43_phy_initn() 6181 b43_nphy_tx_gain_table_upload(dev); b43_phy_initn() 6184 b43_nphy_set_rx_core_state(dev, nphy->phyrxchain); b43_phy_initn() 6190 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) b43_phy_initn() 6196 b43_nphy_rssi_cal(dev); b43_phy_initn() 6198 b43_nphy_restore_rssi_cal(dev); b43_phy_initn() 6200 b43_nphy_rssi_cal(dev); b43_phy_initn() 6204 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) b43_phy_initn() 6213 target = b43_nphy_get_tx_gains(dev); b43_phy_initn() 6216 b43_nphy_superswitch_init(dev, true); b43_phy_initn() 6218 b43_nphy_rssi_cal(dev); b43_phy_initn() 6225 target = b43_nphy_get_tx_gains(dev); b43_phy_initn() 6227 if (!b43_nphy_cal_tx_iq_lo(dev, target, true, false)) b43_phy_initn() 6228 if (b43_nphy_cal_rx_iq(dev, target, 2, 0) == 0) b43_phy_initn() 6229 b43_nphy_save_cal(dev); b43_phy_initn() 6233 b43_nphy_restore_cal(dev); b43_phy_initn() 6237 b43_nphy_tx_pwr_ctrl_coef_setup(dev); b43_phy_initn() 6238 b43_nphy_tx_power_ctrl(dev, tx_pwr_state); b43_phy_initn() 6239 b43_phy_write(dev, B43_NPHY_TXMACIF_HOLDOFF, 0x0015); b43_phy_initn() 6240 b43_phy_write(dev, B43_NPHY_TXMACDELAY, 0x0320); b43_phy_initn() 6242 b43_phy_write(dev, B43_NPHY_PLOAD_CSENSE_EXTLEN, 0x0032); b43_phy_initn() 6243 b43_nphy_tx_lpf_bw(dev); b43_phy_initn() 6245 b43_nphy_spur_workaround(dev); b43_phy_initn() 6254 static void b43_chantab_phy_upload(struct b43_wldev dev, b43_chantab_phy_upload() argument 6257 b43_phy_write(dev, B43_NPHY_BW1A, e->phy_bw1a); b43_chantab_phy_upload() 6258 b43_phy_write(dev, B43_NPHY_BW2, e->phy_bw2); b43_chantab_phy_upload() 6259 b43_phy_write(dev, B43_NPHY_BW3, e->phy_bw3); b43_chantab_phy_upload() 6260 b43_phy_write(dev, B43_NPHY_BW4, e->phy_bw4); b43_chantab_phy_upload() 6261 b43_phy_write(dev, B43_NPHY_BW5, e->phy_bw5); b43_chantab_phy_upload() 6262 b43_phy_write(dev, B43_NPHY_BW6, e->phy_bw6); b43_chantab_phy_upload() 6266 static void b43_nphy_pmu_spur_avoid(struct b43_wldev dev, bool avoid) b43_nphy_pmu_spur_avoid() argument 6268 switch (dev->dev->bus_type) { b43_nphy_pmu_spur_avoid() 6271 bcma_pmu_spuravoid_pllupdate(&dev->dev->bdev->bus->drv_cc, b43_nphy_pmu_spur_avoid() 6277 ssb_pmu_spuravoid_pllupdate(&dev->dev->sdev->bus->chipco, b43_nphy_pmu_spur_avoid() 6285 static void b43_nphy_channel_setup(struct b43_wldev dev, b43_nphy_channel_setup() argument 6289 struct b43_phy phy = &dev->phy; b43_nphy_channel_setup() 6290 struct b43_phy_n nphy = dev->phy.n; b43_nphy_channel_setup() 6296 b43_phy_mask(dev, B43_NPHY_BANDCTL, ~B43_NPHY_BANDCTL_5GHZ); b43_nphy_channel_setup() 6298 tmp16 = b43_read16(dev, B43_MMIO_PSM_PHY_HDR); b43_nphy_channel_setup() 6299 b43_write16(dev, B43_MMIO_PSM_PHY_HDR, tmp16 \| 4); b43_nphy_channel_setup() 6301 b43_phy_set(dev, B43_PHY_B_BBCFG, b43_nphy_channel_setup() 6303 b43_write16(dev, B43_MMIO_PSM_PHY_HDR, tmp16); b43_nphy_channel_setup() 6304 b43_phy_set(dev, B43_NPHY_BANDCTL, B43_NPHY_BANDCTL_5GHZ); b43_nphy_channel_setup() 6306 b43_phy_mask(dev, B43_NPHY_BANDCTL, ~B43_NPHY_BANDCTL_5GHZ); b43_nphy_channel_setup() 6307 tmp16 = b43_read16(dev, B43_MMIO_PSM_PHY_HDR); b43_nphy_channel_setup() 6308 b43_write16(dev, B43_MMIO_PSM_PHY_HDR, tmp16 \| 4); b43_nphy_channel_setup() 6310 b43_phy_mask(dev, B43_PHY_B_BBCFG, b43_nphy_channel_setup() 6312 b43_write16(dev, B43_MMIO_PSM_PHY_HDR, tmp16); b43_nphy_channel_setup() 6315 b43_chantab_phy_upload(dev, e); b43_nphy_channel_setup() 6318 b43_nphy_classifier(dev, 2, 0); b43_nphy_channel_setup() 6319 b43_phy_set(dev, B43_PHY_B_TEST, 0x0800); b43_nphy_channel_setup() 6321 b43_nphy_classifier(dev, 2, 2); b43_nphy_channel_setup() 6323 b43_phy_mask(dev, B43_PHY_B_TEST, ~0x840); b43_nphy_channel_setup() 6327 b43_nphy_tx_power_fix(dev); b43_nphy_channel_setup() 6329 if (dev->phy.rev < 3) b43_nphy_channel_setup() 6330 b43_nphy_adjust_lna_gain_table(dev); b43_nphy_channel_setup() 6332 b43_nphy_tx_lpf_bw(dev); b43_nphy_channel_setup() 6334 if (dev->phy.rev >= 3 && b43_nphy_channel_setup() 6335 dev->phy.n->spur_avoid != B43_SPUR_AVOID_DISABLE) { b43_nphy_channel_setup() 6338 if (dev->phy.n->spur_avoid == B43_SPUR_AVOID_FORCE) { b43_nphy_channel_setup() 6349 if (!b43_is_40mhz(dev)) { / 20MHz / b43_nphy_channel_setup() 6357 if (!b43_is_40mhz(dev)) { / 20MHz / b43_nphy_channel_setup() 6363 spuravoid = dev->dev->chip_id == 0x4716; b43_nphy_channel_setup() 6367 b43_nphy_pmu_spur_avoid(dev, spuravoid); b43_nphy_channel_setup() 6369 b43_mac_switch_freq(dev, spuravoid); b43_nphy_channel_setup() 6371 if (dev->phy.rev == 3 \|\| dev->phy.rev == 4) b43_nphy_channel_setup() 6372 b43_wireless_core_phy_pll_reset(dev); b43_nphy_channel_setup() 6375 b43_phy_set(dev, B43_NPHY_BBCFG, B43_NPHY_BBCFG_RSTRX); b43_nphy_channel_setup() 6377 b43_phy_mask(dev, B43_NPHY_BBCFG, b43_nphy_channel_setup() 6380 b43_nphy_reset_cca(dev); b43_nphy_channel_setup() 6385 b43_phy_write(dev, B43_NPHY_NDATAT_DUP40, 0x3830); b43_nphy_channel_setup() 6388 b43_nphy_spur_workaround(dev); b43_nphy_channel_setup() 6392 static int b43_nphy_set_channel(struct b43_wldev dev, b43_nphy_set_channel() argument 6396 struct b43_phy phy = &dev->phy; b43_nphy_set_channel() 6409 r2057_get_chantabent_rev7(dev, channel->center_freq, b43_nphy_set_channel() 6414 tabent_r3 = b43_nphy_get_chantabent_rev3(dev, b43_nphy_set_channel() 6419 tabent_r2 = b43_nphy_get_chantabent_rev2(dev, b43_nphy_set_channel() 6436 b43_phy_set(dev, B43_NPHY_RXCTL, B43_NPHY_RXCTL_BSELU20); b43_nphy_set_channel() 6438 b43_phy_set(dev, 0x310, 0x8000); b43_nphy_set_channel() 6440 b43_phy_mask(dev, B43_NPHY_RXCTL, ~B43_NPHY_RXCTL_BSELU20); b43_nphy_set_channel() 6442 b43_phy_mask(dev, 0x310, (u16)~0x8000); b43_nphy_set_channel() 6453 b43_radio_maskset(dev, R2057_TIA_CONFIG_CORE0, ~2, tmp); b43_nphy_set_channel() 6454 b43_radio_maskset(dev, R2057_TIA_CONFIG_CORE1, ~2, tmp); b43_nphy_set_channel() 6457 b43_radio_2057_setup(dev, tabent_r7, tabent_r7_2g); b43_nphy_set_channel() 6458 b43_nphy_channel_setup(dev, phy_regs, channel); b43_nphy_set_channel() 6461 b43_radio_maskset(dev, 0x08, 0xFFFB, tmp); b43_nphy_set_channel() 6462 b43_radio_2056_setup(dev, tabent_r3); b43_nphy_set_channel() 6463 b43_nphy_channel_setup(dev, &(tabent_r3->phy_regs), channel); b43_nphy_set_channel() 6466 b43_radio_maskset(dev, B2055_MASTER1, 0xFF8F, tmp); b43_nphy_set_channel() 6467 b43_radio_2055_setup(dev, tabent_r2); b43_nphy_set_channel() 6468 b43_nphy_channel_setup(dev, &(tabent_r2->phy_regs), channel); b43_nphy_set_channel() 6478 static int b43_nphy_op_allocate(struct b43_wldev dev) b43_nphy_op_allocate() argument 6486 dev->phy.n = nphy; b43_nphy_op_allocate() 6491 static void b43_nphy_op_prepare_structs(struct b43_wldev dev) b43_nphy_op_prepare_structs() argument 6493 struct b43_phy phy = &dev->phy; b43_nphy_op_prepare_structs() 6495 struct ssb_sprom sprom = dev->dev->bus_sprom; b43_nphy_op_prepare_structs() 6514 if (dev->phy.rev >= 3 \|\| b43_nphy_op_prepare_structs() 6515 (dev->dev->board_vendor == PCI_VENDOR_ID_APPLE && b43_nphy_op_prepare_structs() 6516 (dev->dev->core_rev == 11 \|\| dev->dev->core_rev == 12))) { b43_nphy_op_prepare_structs() 6520 if (dev->phy.rev >= 2 && b43_nphy_op_prepare_structs() 6524 if (dev->dev->bus_type == B43_BUS_SSB && b43_nphy_op_prepare_structs() 6525 dev->dev->sdev->bus->bustype == SSB_BUSTYPE_PCI) { b43_nphy_op_prepare_structs() 6527 dev->dev->sdev->bus->host_pci; b43_nphy_op_prepare_structs() 6538 if (dev->phy.rev >= 3) { b43_nphy_op_prepare_structs() 6544 static void b43_nphy_op_free(struct b43_wldev dev) b43_nphy_op_free() argument 6546 struct b43_phy phy = &dev->phy; b43_nphy_op_free() 6553 static int b43_nphy_op_init(struct b43_wldev dev) b43_nphy_op_init() argument 6555 return b43_phy_initn(dev); b43_nphy_op_init() 6558 static inline void check_phyreg(struct b43_wldev dev, u16 offset) check_phyreg() argument 6563 b43err(dev->wl, "Invalid OFDM PHY access at " check_phyreg() 6569 b43err(dev->wl, "Invalid EXT-G PHY access at " check_phyreg() 6576 static void b43_nphy_op_maskset(struct b43_wldev dev, u16 reg, u16 mask, b43_nphy_op_maskset() argument 6579 check_phyreg(dev, reg); b43_nphy_op_maskset() 6580 b43_write16f(dev, B43_MMIO_PHY_CONTROL, reg); b43_nphy_op_maskset() 6581 b43_maskset16(dev, B43_MMIO_PHY_DATA, mask, set); b43_nphy_op_maskset() 6582 dev->phy.writes_counter = 1; b43_nphy_op_maskset() 6585 static u16 b43_nphy_op_radio_read(struct b43_wldev dev, u16 reg) b43_nphy_op_radio_read() argument 6588 B43_WARN_ON(dev->phy.rev < 7 && reg == 1); b43_nphy_op_radio_read() 6590 if (dev->phy.rev >= 7) b43_nphy_op_radio_read() 6595 b43_write16f(dev, B43_MMIO_RADIO_CONTROL, reg); b43_nphy_op_radio_read() 6596 return b43_read16(dev, B43_MMIO_RADIO_DATA_LOW); b43_nphy_op_radio_read() 6599 static void b43_nphy_op_radio_write(struct b43_wldev dev, u16 reg, u16 value) b43_nphy_op_radio_write() argument 6602 B43_WARN_ON(dev->phy.rev < 7 && reg == 1); b43_nphy_op_radio_write() 6604 b43_write16f(dev, B43_MMIO_RADIO_CONTROL, reg); b43_nphy_op_radio_write() 6605 b43_write16(dev, B43_MMIO_RADIO_DATA_LOW, value); b43_nphy_op_radio_write() 6609 static void b43_nphy_op_software_rfkill(struct b43_wldev dev, b43_nphy_op_software_rfkill() argument 6612 struct b43_phy phy = &dev->phy; b43_nphy_op_software_rfkill() 6614 if (b43_read32(dev, B43_MMIO_MACCTL) & B43_MACCTL_ENABLED) b43_nphy_op_software_rfkill() 6615 b43err(dev->wl, "MAC not suspended\n"); b43_nphy_op_software_rfkill() 6621 b43_phy_mask(dev, B43_NPHY_RFCTL_CMD, b43_nphy_op_software_rfkill() 6626 b43_phy_mask(dev, B43_NPHY_RFCTL_CMD, b43_nphy_op_software_rfkill() 6629 b43_radio_mask(dev, 0x09, ~0x2); b43_nphy_op_software_rfkill() 6631 b43_radio_write(dev, 0x204D, 0); b43_nphy_op_software_rfkill() 6632 b43_radio_write(dev, 0x2053, 0); b43_nphy_op_software_rfkill() 6633 b43_radio_write(dev, 0x2058, 0); b43_nphy_op_software_rfkill() 6634 b43_radio_write(dev, 0x205E, 0); b43_nphy_op_software_rfkill() 6635 b43_radio_mask(dev, 0x2062, ~0xF0); b43_nphy_op_software_rfkill() 6636 b43_radio_write(dev, 0x2064, 0); b43_nphy_op_software_rfkill() 6638 b43_radio_write(dev, 0x304D, 0); b43_nphy_op_software_rfkill() 6639 b43_radio_write(dev, 0x3053, 0); b43_nphy_op_software_rfkill() 6640 b43_radio_write(dev, 0x3058, 0); b43_nphy_op_software_rfkill() 6641 b43_radio_write(dev, 0x305E, 0); b43_nphy_op_software_rfkill() 6642 b43_radio_mask(dev, 0x3062, ~0xF0); b43_nphy_op_software_rfkill() 6643 b43_radio_write(dev, 0x3064, 0); b43_nphy_op_software_rfkill() 6649 if (!dev->phy.radio_on) b43_nphy_op_software_rfkill() 6650 b43_radio_2057_init(dev); b43_nphy_op_software_rfkill() 6651 b43_switch_channel(dev, dev->phy.channel); b43_nphy_op_software_rfkill() 6653 if (!dev->phy.radio_on) b43_nphy_op_software_rfkill() 6654 b43_radio_init2056(dev); b43_nphy_op_software_rfkill() 6655 b43_switch_channel(dev, dev->phy.channel); b43_nphy_op_software_rfkill() 6657 b43_radio_init2055(dev); b43_nphy_op_software_rfkill() 6663 static void b43_nphy_op_switch_analog(struct b43_wldev dev, bool on) b43_nphy_op_switch_analog() argument 6665 struct b43_phy phy = &dev->phy; b43_nphy_op_switch_analog() 6673 b43_phy_write(dev, B43_NPHY_AFECTL_C1, core); b43_nphy_op_switch_analog() 6674 b43_phy_write(dev, B43_NPHY_AFECTL_OVER1, override); b43_nphy_op_switch_analog() 6675 b43_phy_write(dev, B43_NPHY_AFECTL_C2, core); b43_nphy_op_switch_analog() 6676 b43_phy_write(dev, B43_NPHY_AFECTL_OVER, override); b43_nphy_op_switch_analog() 6678 b43_phy_write(dev, B43_NPHY_AFECTL_OVER1, override); b43_nphy_op_switch_analog() 6679 b43_phy_write(dev, B43_NPHY_AFECTL_C1, core); b43_nphy_op_switch_analog() 6680 b43_phy_write(dev, B43_NPHY_AFECTL_OVER, override); b43_nphy_op_switch_analog() 6681 b43_phy_write(dev, B43_NPHY_AFECTL_C2, core); b43_nphy_op_switch_analog() 6684 b43_phy_write(dev, B43_NPHY_AFECTL_OVER, override); b43_nphy_op_switch_analog() 6688 static int b43_nphy_op_switch_channel(struct b43_wldev dev, b43_nphy_op_switch_channel() argument 6691 struct ieee80211_channel channel = dev->wl->hw->conf.chandef.chan; b43_nphy_op_switch_channel() 6693 cfg80211_get_chandef_type(&dev->wl->hw->conf.chandef); b43_nphy_op_switch_channel() 6695 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) { b43_nphy_op_switch_channel() 6703 return b43_nphy_set_channel(dev, channel, channel_type); b43_nphy_op_switch_channel() 6706 static unsigned int b43_nphy_op_get_default_chan(struct b43_wldev *dev) b43_nphy_op_get_default_chan() argument 6708 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) b43_nphy_op_get_default_chan()
H A D	bus.h	20 int (bus_may_powerdown)(struct b43_bus_dev dev); 21 int (bus_powerup)(struct b43_bus_dev dev, bool dynamic_pctl); 22 int (device_is_enabled)(struct b43_bus_dev dev); 23 void (device_enable)(struct b43_bus_dev dev, 25 void (device_disable)(struct b43_bus_dev dev, 28 u16 (read16)(struct b43_bus_dev dev, u16 offset); 29 u32 (read32)(struct b43_bus_dev dev, u16 offset); 30 void (write16)(struct b43_bus_dev dev, u16 offset, u16 value); 31 void (write32)(struct b43_bus_dev dev, u16 offset, u32 value); 32 void (block_read)(struct b43_bus_dev dev, void buffer, 34 void (block_write)(struct b43_bus_dev dev, const void buffer, 38 struct device dev; member in struct:b43_bus_dev 56 static inline bool b43_bus_host_is_pcmcia(struct b43_bus_dev dev) b43_bus_host_is_pcmcia() argument 59 return (dev->bus_type == B43_BUS_SSB && b43_bus_host_is_pcmcia() 60 dev->sdev->bus->bustype == SSB_BUSTYPE_PCMCIA); b43_bus_host_is_pcmcia() 66 static inline bool b43_bus_host_is_pci(struct b43_bus_dev dev) b43_bus_host_is_pci() argument 69 if (dev->bus_type == B43_BUS_BCMA) b43_bus_host_is_pci() 70 return (dev->bdev->bus->hosttype == BCMA_HOSTTYPE_PCI); b43_bus_host_is_pci() 73 if (dev->bus_type == B43_BUS_SSB) b43_bus_host_is_pci() 74 return (dev->sdev->bus->bustype == SSB_BUSTYPE_PCI); b43_bus_host_is_pci() 79 static inline bool b43_bus_host_is_sdio(struct b43_bus_dev dev) b43_bus_host_is_sdio() argument 82 return (dev->bus_type == B43_BUS_SSB && b43_bus_host_is_sdio() 83 dev->sdev->bus->bustype == SSB_BUSTYPE_SDIO); b43_bus_host_is_sdio() 92 void b43_bus_get_wldev(struct b43_bus_dev dev); 93 void b43_bus_set_wldev(struct b43_bus_dev dev, void data);
H A D	sysfs.h	`6 int b43_sysfs_register(struct b43_wldev dev); 7 void b43_sysfs_unregister(struct b43_wldev dev);`
H A D	phy_ht.c	48 static void b43_radio_2059_channel_setup(struct b43_wldev dev, b43_radio_2059_channel_setup() argument 55 b43_radio_write(dev, 0x16, e->radio_syn16); b43_radio_2059_channel_setup() 56 b43_radio_write(dev, 0x17, e->radio_syn17); b43_radio_2059_channel_setup() 57 b43_radio_write(dev, 0x22, e->radio_syn22); b43_radio_2059_channel_setup() 58 b43_radio_write(dev, 0x25, e->radio_syn25); b43_radio_2059_channel_setup() 59 b43_radio_write(dev, 0x27, e->radio_syn27); b43_radio_2059_channel_setup() 60 b43_radio_write(dev, 0x28, e->radio_syn28); b43_radio_2059_channel_setup() 61 b43_radio_write(dev, 0x29, e->radio_syn29); b43_radio_2059_channel_setup() 62 b43_radio_write(dev, 0x2c, e->radio_syn2c); b43_radio_2059_channel_setup() 63 b43_radio_write(dev, 0x2d, e->radio_syn2d); b43_radio_2059_channel_setup() 64 b43_radio_write(dev, 0x37, e->radio_syn37); b43_radio_2059_channel_setup() 65 b43_radio_write(dev, 0x41, e->radio_syn41); b43_radio_2059_channel_setup() 66 b43_radio_write(dev, 0x43, e->radio_syn43); b43_radio_2059_channel_setup() 67 b43_radio_write(dev, 0x47, e->radio_syn47); b43_radio_2059_channel_setup() 71 b43_radio_write(dev, r \| 0x4a, e->radio_rxtx4a); b43_radio_2059_channel_setup() 72 b43_radio_write(dev, r \| 0x58, e->radio_rxtx58); b43_radio_2059_channel_setup() 73 b43_radio_write(dev, r \| 0x5a, e->radio_rxtx5a); b43_radio_2059_channel_setup() 74 b43_radio_write(dev, r \| 0x6a, e->radio_rxtx6a); b43_radio_2059_channel_setup() 75 b43_radio_write(dev, r \| 0x6d, e->radio_rxtx6d); b43_radio_2059_channel_setup() 76 b43_radio_write(dev, r \| 0x6e, e->radio_rxtx6e); b43_radio_2059_channel_setup() 77 b43_radio_write(dev, r \| 0x92, e->radio_rxtx92); b43_radio_2059_channel_setup() 78 b43_radio_write(dev, r \| 0x98, e->radio_rxtx98); b43_radio_2059_channel_setup() 84 b43_radio_mask(dev, R2059_RFPLL_MISC_EN, ~0x1); b43_radio_2059_channel_setup() 85 b43_radio_mask(dev, R2059_RFPLL_MISC_CAL_RESETN, ~0x4); b43_radio_2059_channel_setup() 86 b43_radio_set(dev, R2059_RFPLL_MISC_CAL_RESETN, 0x4); b43_radio_2059_channel_setup() 87 b43_radio_set(dev, R2059_RFPLL_MISC_EN, 0x1); b43_radio_2059_channel_setup() 93 static void b43_radio_2059_rcal(struct b43_wldev dev) b43_radio_2059_rcal() argument 96 b43_radio_set(dev, R2059_C3 \| R2059_RCAL_CONFIG, 0x1); b43_radio_2059_rcal() 99 b43_radio_set(dev, R2059_C3 \| 0x0BF, 0x1); b43_radio_2059_rcal() 100 b43_radio_maskset(dev, R2059_C3 \| 0x19B, 0x3, 0x2); b43_radio_2059_rcal() 103 b43_radio_set(dev, R2059_C3 \| R2059_RCAL_CONFIG, 0x2); b43_radio_2059_rcal() 107 b43_radio_mask(dev, R2059_C3 \| R2059_RCAL_CONFIG, ~0x2); b43_radio_2059_rcal() 109 if (!b43_radio_wait_value(dev, R2059_C3 \| R2059_RCAL_STATUS, 1, 1, 100, b43_radio_2059_rcal() 111 b43err(dev->wl, "Radio 0x2059 rcal timeout\n"); b43_radio_2059_rcal() 114 b43_radio_mask(dev, R2059_C3 \| R2059_RCAL_CONFIG, ~0x1); b43_radio_2059_rcal() 116 b43_radio_set(dev, 0xa, 0x60); b43_radio_2059_rcal() 120 static void b43_radio_2057_rccal(struct b43_wldev dev) b43_radio_2057_rccal() argument 128 b43_radio_write(dev, R2059_RCCAL_MASTER, radio_values[i][0]); b43_radio_2057_rccal() 129 b43_radio_write(dev, R2059_RCCAL_X1, 0x6E); b43_radio_2057_rccal() 130 b43_radio_write(dev, R2059_RCCAL_TRC0, radio_values[i][1]); b43_radio_2057_rccal() 133 b43_radio_write(dev, R2059_RCCAL_START_R1_Q1_P1, 0x55); b43_radio_2057_rccal() 136 if (!b43_radio_wait_value(dev, R2059_RCCAL_DONE_OSCCAP, 2, 2, b43_radio_2057_rccal() 138 b43err(dev->wl, "Radio 0x2059 rccal timeout\n"); b43_radio_2057_rccal() 141 b43_radio_write(dev, R2059_RCCAL_START_R1_Q1_P1, 0x15); b43_radio_2057_rccal() 144 b43_radio_mask(dev, R2059_RCCAL_MASTER, ~0x1); b43_radio_2057_rccal() 147 static void b43_radio_2059_init_pre(struct b43_wldev dev) b43_radio_2059_init_pre() argument 149 b43_phy_mask(dev, B43_PHY_HT_RF_CTL_CMD, ~B43_PHY_HT_RF_CTL_CMD_CHIP0_PU); b43_radio_2059_init_pre() 150 b43_phy_set(dev, B43_PHY_HT_RF_CTL_CMD, B43_PHY_HT_RF_CTL_CMD_FORCE); b43_radio_2059_init_pre() 151 b43_phy_mask(dev, B43_PHY_HT_RF_CTL_CMD, ~B43_PHY_HT_RF_CTL_CMD_FORCE); b43_radio_2059_init_pre() 152 b43_phy_set(dev, B43_PHY_HT_RF_CTL_CMD, B43_PHY_HT_RF_CTL_CMD_CHIP0_PU); b43_radio_2059_init_pre() 155 static void b43_radio_2059_init(struct b43_wldev dev) b43_radio_2059_init() argument 161 b43_radio_2059_init_pre(dev); b43_radio_2059_init() 163 r2059_upload_inittabs(dev); b43_radio_2059_init() 166 b43_radio_set(dev, routing[i] \| 0x146, 0x3); b43_radio_2059_init() 170 b43_radio_set(dev, R2059_RFPLL_MISC_CAL_RESETN, 0x0078); b43_radio_2059_init() 171 b43_radio_set(dev, R2059_XTAL_CONFIG2, 0x0080); b43_radio_2059_init() 173 b43_radio_mask(dev, R2059_RFPLL_MISC_CAL_RESETN, ~0x0078); b43_radio_2059_init() 174 b43_radio_mask(dev, R2059_XTAL_CONFIG2, ~0x0080); b43_radio_2059_init() 177 b43_radio_2059_rcal(dev); b43_radio_2059_init() 178 b43_radio_2057_rccal(dev); b43_radio_2059_init() 181 b43_radio_mask(dev, R2059_RFPLL_MASTER, ~0x0008); b43_radio_2059_init() 188 static void b43_phy_ht_force_rf_sequence(struct b43_wldev dev, u16 rf_seq) b43_phy_ht_force_rf_sequence() argument 192 u16 save_seq_mode = b43_phy_read(dev, B43_PHY_HT_RF_SEQ_MODE); b43_phy_ht_force_rf_sequence() 193 b43_phy_set(dev, B43_PHY_HT_RF_SEQ_MODE, 0x3); b43_phy_ht_force_rf_sequence() 195 b43_phy_set(dev, B43_PHY_HT_RF_SEQ_TRIG, rf_seq); b43_phy_ht_force_rf_sequence() 197 if (!(b43_phy_read(dev, B43_PHY_HT_RF_SEQ_STATUS) & rf_seq)) { b43_phy_ht_force_rf_sequence() 204 b43err(dev->wl, "Forcing RF sequence timeout\n"); b43_phy_ht_force_rf_sequence() 206 b43_phy_write(dev, B43_PHY_HT_RF_SEQ_MODE, save_seq_mode); b43_phy_ht_force_rf_sequence() 209 static void b43_phy_ht_pa_override(struct b43_wldev dev, bool enable) b43_phy_ht_pa_override() argument 211 struct b43_phy_ht htphy = dev->phy.ht; b43_phy_ht_pa_override() 219 b43_phy_write(dev, regs[i], htphy->rf_ctl_int_save[i]); b43_phy_ht_pa_override() 222 htphy->rf_ctl_int_save[i] = b43_phy_read(dev, regs[i]); b43_phy_ht_pa_override() 225 b43_phy_write(dev, regs[i], 0x0400); b43_phy_ht_pa_override() 233 static u16 b43_phy_ht_classifier(struct b43_wldev dev, u16 mask, u16 val) b43_phy_ht_classifier() argument 240 tmp = b43_phy_read(dev, B43_PHY_HT_CLASS_CTL); b43_phy_ht_classifier() 244 b43_phy_maskset(dev, B43_PHY_HT_CLASS_CTL, ~allowed, tmp); b43_phy_ht_classifier() 249 static void b43_phy_ht_reset_cca(struct b43_wldev dev) b43_phy_ht_reset_cca() argument 253 b43_phy_force_clock(dev, true); b43_phy_ht_reset_cca() 254 bbcfg = b43_phy_read(dev, B43_PHY_HT_BBCFG); b43_phy_ht_reset_cca() 255 b43_phy_write(dev, B43_PHY_HT_BBCFG, bbcfg \| B43_PHY_HT_BBCFG_RSTCCA); b43_phy_ht_reset_cca() 257 b43_phy_write(dev, B43_PHY_HT_BBCFG, bbcfg & ~B43_PHY_HT_BBCFG_RSTCCA); b43_phy_ht_reset_cca() 258 b43_phy_force_clock(dev, false); b43_phy_ht_reset_cca() 260 b43_phy_ht_force_rf_sequence(dev, B43_PHY_HT_RF_SEQ_TRIG_RST2RX); b43_phy_ht_reset_cca() 263 static void b43_phy_ht_zero_extg(struct b43_wldev dev) b43_phy_ht_zero_extg() argument 270 b43_phy_write(dev, B43_PHY_EXTG(base[i] + j), 0); b43_phy_ht_zero_extg() 274 b43_phy_write(dev, B43_PHY_EXTG(base[i] + 0xc), 0); b43_phy_ht_zero_extg() 278 static void b43_phy_ht_afe_unk1(struct b43_wldev dev) b43_phy_ht_afe_unk1() argument 290 b43_phy_set(dev, ctl_regs[i][1], 0x4); b43_phy_ht_afe_unk1() 291 b43_phy_set(dev, ctl_regs[i][0], 0x4); b43_phy_ht_afe_unk1() 292 b43_phy_mask(dev, ctl_regs[i][1], ~0x1); b43_phy_ht_afe_unk1() 293 b43_phy_set(dev, ctl_regs[i][0], 0x1); b43_phy_ht_afe_unk1() 294 b43_httab_write(dev, B43_HTTAB16(8, 5 + (i * 0x10)), 0); b43_phy_ht_afe_unk1() 295 b43_phy_mask(dev, ctl_regs[i][0], ~0x4); b43_phy_ht_afe_unk1() 299 static void b43_phy_ht_read_clip_detection(struct b43_wldev dev, u16 clip_st) b43_phy_ht_read_clip_detection() argument 301 clip_st[0] = b43_phy_read(dev, B43_PHY_HT_C1_CLIP1THRES); b43_phy_ht_read_clip_detection() 302 clip_st[1] = b43_phy_read(dev, B43_PHY_HT_C2_CLIP1THRES); b43_phy_ht_read_clip_detection() 303 clip_st[2] = b43_phy_read(dev, B43_PHY_HT_C3_CLIP1THRES); b43_phy_ht_read_clip_detection() 306 static void b43_phy_ht_bphy_init(struct b43_wldev dev) b43_phy_ht_bphy_init() argument 313 b43_phy_write(dev, B43_PHY_N_BMODE(0x88 + i), val); b43_phy_ht_bphy_init() 318 b43_phy_write(dev, B43_PHY_N_BMODE(0x98 + i), val); b43_phy_ht_bphy_init() 321 b43_phy_write(dev, B43_PHY_N_BMODE(0x38), 0x668); b43_phy_ht_bphy_init() 324 static void b43_phy_ht_bphy_reset(struct b43_wldev dev, bool reset) b43_phy_ht_bphy_reset() argument 328 tmp = b43_read16(dev, B43_MMIO_PSM_PHY_HDR); b43_phy_ht_bphy_reset() 329 b43_write16(dev, B43_MMIO_PSM_PHY_HDR, b43_phy_ht_bphy_reset() 334 b43_phy_set(dev, B43_PHY_B_BBCFG, b43_phy_ht_bphy_reset() 337 b43_phy_mask(dev, B43_PHY_B_BBCFG, b43_phy_ht_bphy_reset() 341 b43_write16(dev, B43_MMIO_PSM_PHY_HDR, tmp); b43_phy_ht_bphy_reset() 348 static void b43_phy_ht_stop_playback(struct b43_wldev dev) b43_phy_ht_stop_playback() argument 350 struct b43_phy_ht phy_ht = dev->phy.ht; b43_phy_ht_stop_playback() 354 tmp = b43_phy_read(dev, B43_PHY_HT_SAMP_STAT); b43_phy_ht_stop_playback() 356 b43_phy_set(dev, B43_PHY_HT_SAMP_CMD, B43_PHY_HT_SAMP_CMD_STOP); b43_phy_ht_stop_playback() 358 b43_phy_mask(dev, B43_PHY_HT_IQLOCAL_CMDGCTL, 0x7FFF); b43_phy_ht_stop_playback() 360 b43_phy_mask(dev, B43_PHY_HT_SAMP_CMD, ~0x0004); b43_phy_ht_stop_playback() 364 b43_httab_write(dev, B43_HTTAB16(13, 0x63 + i * 4), b43_phy_ht_stop_playback() 366 b43_httab_write(dev, B43_HTTAB16(13, 0x67 + i * 4), b43_phy_ht_stop_playback() 372 static u16 b43_phy_ht_load_samples(struct b43_wldev dev) b43_phy_ht_load_samples() argument 377 b43_phy_write(dev, B43_PHY_HT_TABLE_ADDR, 0x4400); b43_phy_ht_load_samples() 380 b43_phy_write(dev, B43_PHY_HT_TABLE_DATAHI, 0); b43_phy_ht_load_samples() 381 b43_phy_write(dev, B43_PHY_HT_TABLE_DATALO, 0); b43_phy_ht_load_samples() 387 static void b43_phy_ht_run_samples(struct b43_wldev dev, u16 samps, u16 loops, b43_phy_ht_run_samples() argument 390 struct b43_phy_ht phy_ht = dev->phy.ht; b43_phy_ht_run_samples() 396 phy_ht->bb_mult_save[i] = b43_httab_read(dev, B43_HTTAB16(13, 0x63 + i 4)); b43_phy_ht_run_samples() 399 b43_phy_write(dev, B43_PHY_HT_SAMP_DEP_CNT, samps - 1); b43_phy_ht_run_samples() 402 b43_phy_write(dev, B43_PHY_HT_SAMP_LOOP_CNT, loops); b43_phy_ht_run_samples() 403 b43_phy_write(dev, B43_PHY_HT_SAMP_WAIT_CNT, wait); b43_phy_ht_run_samples() 405 save_seq_mode = b43_phy_read(dev, B43_PHY_HT_RF_SEQ_MODE); b43_phy_ht_run_samples() 406 b43_phy_set(dev, B43_PHY_HT_RF_SEQ_MODE, b43_phy_ht_run_samples() 410 b43_phy_mask(dev, B43_PHY_HT_SAMP_CMD, ~0); b43_phy_ht_run_samples() 411 b43_phy_mask(dev, B43_PHY_HT_SAMP_CMD, ~0); b43_phy_ht_run_samples() 412 b43_phy_mask(dev, B43_PHY_HT_IQLOCAL_CMDGCTL, ~0); b43_phy_ht_run_samples() 413 b43_phy_set(dev, B43_PHY_HT_SAMP_CMD, 0x1); b43_phy_ht_run_samples() 416 if (!(b43_phy_read(dev, B43_PHY_HT_RF_SEQ_STATUS) & 1)) { b43_phy_ht_run_samples() 423 b43err(dev->wl, "run samples timeout\n"); b43_phy_ht_run_samples() 425 b43_phy_write(dev, B43_PHY_HT_RF_SEQ_MODE, save_seq_mode); b43_phy_ht_run_samples() 428 static void b43_phy_ht_tx_tone(struct b43_wldev dev) b43_phy_ht_tx_tone() argument 432 samp = b43_phy_ht_load_samples(dev); b43_phy_ht_tx_tone() 433 b43_phy_ht_run_samples(dev, samp, 0xFFFF, 0); b43_phy_ht_tx_tone() 440 static void b43_phy_ht_rssi_select(struct b43_wldev dev, u8 core_sel, b43_phy_ht_rssi_select() argument 452 b43err(dev->wl, "RSSI selection for core off not implemented yet\n"); b43_phy_ht_rssi_select() 463 b43_phy_set(dev, ctl_regs[core][0], 0x3 << 8); b43_phy_ht_rssi_select() 464 b43_phy_set(dev, ctl_regs[core][0], 0x3 << 10); b43_phy_ht_rssi_select() 465 b43_phy_set(dev, ctl_regs[core][1], 0x1 << 9); b43_phy_ht_rssi_select() 466 b43_phy_set(dev, ctl_regs[core][1], 0x1 << 10); b43_phy_ht_rssi_select() 468 b43_radio_set(dev, R2059_C3 \| 0xbf, 0x1); b43_phy_ht_rssi_select() 469 b43_radio_write(dev, radio_r[core] \| 0x159, b43_phy_ht_rssi_select() 473 b43err(dev->wl, "RSSI selection for type %d not implemented yet\n", b43_phy_ht_rssi_select() 480 static void b43_phy_ht_poll_rssi(struct b43_wldev dev, enum ht_rssi_type type, b43_phy_ht_poll_rssi() argument 496 phy_regs_values[i] = b43_phy_read(dev, phy_regs_to_save[i]); b43_phy_ht_poll_rssi() 498 b43_phy_ht_rssi_select(dev, 5, type); b43_phy_ht_poll_rssi() 504 tmp[0] = b43_phy_read(dev, B43_PHY_HT_RSSI_C1); b43_phy_ht_poll_rssi() 505 tmp[1] = b43_phy_read(dev, B43_PHY_HT_RSSI_C2); b43_phy_ht_poll_rssi() 506 tmp[2] = b43_phy_read(dev, B43_PHY_HT_RSSI_C3); b43_phy_ht_poll_rssi() 517 b43_phy_write(dev, phy_regs_to_save[i], phy_regs_values[i]); b43_phy_ht_poll_rssi() 524 static void b43_phy_ht_tx_power_fix(struct b43_wldev dev) b43_phy_ht_tx_power_fix() argument 530 u32 tmp = b43_httab_read(dev, B43_HTTAB32(26, 0xE8)); b43_phy_ht_tx_power_fix() 536 b43_phy_mask(dev, B43_PHY_EXTG(0x108), mask); b43_phy_ht_tx_power_fix() 538 b43_httab_write(dev, B43_HTTAB16(7, 0x110 + i), tmp >> 16); b43_phy_ht_tx_power_fix() 539 b43_httab_write(dev, B43_HTTAB8(13, 0x63 + (i * 4)), b43_phy_ht_tx_power_fix() 541 b43_httab_write(dev, B43_HTTAB8(13, 0x73 + (i * 4)), b43_phy_ht_tx_power_fix() 546 static void b43_phy_ht_tx_power_ctl(struct b43_wldev dev, bool enable) b43_phy_ht_tx_power_ctl() argument 548 struct b43_phy_ht phy_ht = dev->phy.ht; b43_phy_ht_tx_power_ctl() 561 if (b43_phy_read(dev, B43_PHY_HT_TXPCTL_CMD_C1) & en_bits) { b43_phy_ht_tx_power_ctl() 565 b43_phy_read(dev, status_regs[i]); b43_phy_ht_tx_power_ctl() 567 b43_phy_mask(dev, B43_PHY_HT_TXPCTL_CMD_C1, ~en_bits); b43_phy_ht_tx_power_ctl() 569 b43_phy_set(dev, B43_PHY_HT_TXPCTL_CMD_C1, en_bits); b43_phy_ht_tx_power_ctl() 571 if (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ) { b43_phy_ht_tx_power_ctl() 573 b43_phy_write(dev, cmd_regs[i], 0x32); b43_phy_ht_tx_power_ctl() 579 b43_phy_write(dev, cmd_regs[i], b43_phy_ht_tx_power_ctl() 586 static void b43_phy_ht_tx_power_ctl_idle_tssi(struct b43_wldev dev) b43_phy_ht_tx_power_ctl_idle_tssi() argument 588 struct b43_phy_ht phy_ht = dev->phy.ht; b43_phy_ht_tx_power_ctl_idle_tssi() 595 save_regs[core][1] = b43_phy_read(dev, base[core] + 6); b43_phy_ht_tx_power_ctl_idle_tssi() 596 save_regs[core][2] = b43_phy_read(dev, base[core] + 7); b43_phy_ht_tx_power_ctl_idle_tssi() 597 save_regs[core][0] = b43_phy_read(dev, base[core] + 0); b43_phy_ht_tx_power_ctl_idle_tssi() 599 b43_phy_write(dev, base[core] + 6, 0); b43_phy_ht_tx_power_ctl_idle_tssi() 600 b43_phy_mask(dev, base[core] + 7, ~0xF); /* 0xF? Or just 0x6? / b43_phy_ht_tx_power_ctl_idle_tssi() 601 b43_phy_set(dev, base[core] + 0, 0x0400); b43_phy_ht_tx_power_ctl_idle_tssi() 602 b43_phy_set(dev, base[core] + 0, 0x1000); b43_phy_ht_tx_power_ctl_idle_tssi() 605 b43_phy_ht_tx_tone(dev); b43_phy_ht_tx_power_ctl_idle_tssi() 607 b43_phy_ht_poll_rssi(dev, HT_RSSI_TSSI_2G, rssi_buf, 1); b43_phy_ht_tx_power_ctl_idle_tssi() 608 b43_phy_ht_stop_playback(dev); b43_phy_ht_tx_power_ctl_idle_tssi() 609 b43_phy_ht_reset_cca(dev); b43_phy_ht_tx_power_ctl_idle_tssi() 616 b43_phy_write(dev, base[core] + 0, save_regs[core][0]); b43_phy_ht_tx_power_ctl_idle_tssi() 617 b43_phy_write(dev, base[core] + 6, save_regs[core][1]); b43_phy_ht_tx_power_ctl_idle_tssi() 618 b43_phy_write(dev, base[core] + 7, save_regs[core][2]); b43_phy_ht_tx_power_ctl_idle_tssi() 622 static void b43_phy_ht_tssi_setup(struct b43_wldev dev) b43_phy_ht_tssi_setup() argument 629 b43_radio_set(dev, 0x8bf, 0x1); b43_phy_ht_tssi_setup() 630 b43_radio_write(dev, routing[core] \| 0x0159, 0x0011); b43_phy_ht_tssi_setup() 634 static void b43_phy_ht_tx_power_ctl_setup(struct b43_wldev dev) b43_phy_ht_tx_power_ctl_setup() argument 636 struct b43_phy_ht phy_ht = dev->phy.ht; b43_phy_ht_tx_power_ctl_setup() 637 struct ssb_sprom sprom = dev->dev->bus_sprom; b43_phy_ht_tx_power_ctl_setup() 643 u16 freq = dev->phy.chandef->chan->center_freq; b43_phy_ht_tx_power_ctl_setup() 646 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) { b43_phy_ht_tx_power_ctl_setup() 681 b43_phy_set(dev, B43_PHY_HT_TSSIMODE, B43_PHY_HT_TSSIMODE_EN); b43_phy_ht_tx_power_ctl_setup() 682 b43_phy_mask(dev, B43_PHY_HT_TXPCTL_CMD_C1, b43_phy_ht_tx_power_ctl_setup() 686 b43_phy_set(dev, B43_PHY_HT_TXPCTL_IDLE_TSSI, 0x4000); b43_phy_ht_tx_power_ctl_setup() 688 b43_phy_maskset(dev, B43_PHY_HT_TXPCTL_CMD_C1, b43_phy_ht_tx_power_ctl_setup() 690 b43_phy_maskset(dev, B43_PHY_HT_TXPCTL_CMD_C2, b43_phy_ht_tx_power_ctl_setup() 692 b43_phy_maskset(dev, B43_PHY_HT_TXPCTL_CMD_C3, b43_phy_ht_tx_power_ctl_setup() 695 b43_phy_set(dev, B43_PHY_HT_TXPCTL_IDLE_TSSI, b43_phy_ht_tx_power_ctl_setup() 698 b43_phy_maskset(dev, B43_PHY_HT_TXPCTL_IDLE_TSSI, b43_phy_ht_tx_power_ctl_setup() 701 b43_phy_maskset(dev, B43_PHY_HT_TXPCTL_IDLE_TSSI, b43_phy_ht_tx_power_ctl_setup() 704 b43_phy_maskset(dev, B43_PHY_HT_TXPCTL_IDLE_TSSI2, b43_phy_ht_tx_power_ctl_setup() 708 b43_phy_maskset(dev, B43_PHY_HT_TXPCTL_N, ~B43_PHY_HT_TXPCTL_N_TSSID, b43_phy_ht_tx_power_ctl_setup() 710 b43_phy_maskset(dev, B43_PHY_HT_TXPCTL_N, ~B43_PHY_HT_TXPCTL_N_NPTIL2, b43_phy_ht_tx_power_ctl_setup() 714 b43_phy_maskset(dev, B43_PHY_HT_TXPCTL_CMD_C1, 0x800, 0) b43_phy_ht_tx_power_ctl_setup() 715 b43_phy_maskset(dev, B43_PHY_HT_TXPCTL_CMD_C1, 0x400, 0) b43_phy_ht_tx_power_ctl_setup() 718 b43_phy_maskset(dev, B43_PHY_HT_TXPCTL_TARG_PWR, b43_phy_ht_tx_power_ctl_setup() 721 b43_phy_maskset(dev, B43_PHY_HT_TXPCTL_TARG_PWR, b43_phy_ht_tx_power_ctl_setup() 724 b43_phy_maskset(dev, B43_PHY_HT_TXPCTL_TARG_PWR2, b43_phy_ht_tx_power_ctl_setup() 738 b43_httab_write_bulk(dev, B43_HTTAB16(26 + c, 0), 64, regval); b43_phy_ht_tx_power_ctl_setup() 746 static void b43_phy_ht_spur_avoid(struct b43_wldev dev, b43_phy_ht_spur_avoid() argument 749 struct bcma_device core = dev->dev->bdev; b43_phy_ht_spur_avoid() 763 b43_mac_switch_freq(dev, spuravoid); b43_phy_ht_spur_avoid() 765 b43_wireless_core_phy_pll_reset(dev); b43_phy_ht_spur_avoid() 768 b43_phy_set(dev, B43_PHY_HT_BBCFG, B43_PHY_HT_BBCFG_RSTRX); b43_phy_ht_spur_avoid() 770 b43_phy_mask(dev, B43_PHY_HT_BBCFG, b43_phy_ht_spur_avoid() 773 b43_phy_ht_reset_cca(dev); b43_phy_ht_spur_avoid() 776 static void b43_phy_ht_channel_setup(struct b43_wldev dev, b43_phy_ht_channel_setup() argument 782 b43_phy_mask(dev, B43_PHY_HT_BANDCTL, ~B43_PHY_HT_BANDCTL_5GHZ); b43_phy_ht_channel_setup() 784 b43_phy_ht_bphy_reset(dev, true); b43_phy_ht_channel_setup() 787 b43_phy_set(dev, B43_PHY_HT_BANDCTL, B43_PHY_HT_BANDCTL_5GHZ); b43_phy_ht_channel_setup() 790 b43_phy_mask(dev, B43_PHY_HT_BANDCTL, ~B43_PHY_HT_BANDCTL_5GHZ); b43_phy_ht_channel_setup() 792 b43_phy_ht_bphy_reset(dev, false); b43_phy_ht_channel_setup() 795 b43_phy_write(dev, B43_PHY_HT_BW1, e->bw1); b43_phy_ht_channel_setup() 796 b43_phy_write(dev, B43_PHY_HT_BW2, e->bw2); b43_phy_ht_channel_setup() 797 b43_phy_write(dev, B43_PHY_HT_BW3, e->bw3); b43_phy_ht_channel_setup() 798 b43_phy_write(dev, B43_PHY_HT_BW4, e->bw4); b43_phy_ht_channel_setup() 799 b43_phy_write(dev, B43_PHY_HT_BW5, e->bw5); b43_phy_ht_channel_setup() 800 b43_phy_write(dev, B43_PHY_HT_BW6, e->bw6); b43_phy_ht_channel_setup() 803 b43_phy_ht_classifier(dev, B43_PHY_HT_CLASS_CTL_OFDM_EN, 0); b43_phy_ht_channel_setup() 804 b43_phy_set(dev, B43_PHY_HT_TEST, 0x0800); b43_phy_ht_channel_setup() 806 b43_phy_ht_classifier(dev, B43_PHY_HT_CLASS_CTL_OFDM_EN, b43_phy_ht_channel_setup() 809 b43_phy_mask(dev, B43_PHY_HT_TEST, ~0x840); b43_phy_ht_channel_setup() 813 b43_phy_ht_tx_power_fix(dev); b43_phy_ht_channel_setup() 815 b43_phy_ht_spur_avoid(dev, new_channel); b43_phy_ht_channel_setup() 817 b43_phy_write(dev, 0x017e, 0x3830); b43_phy_ht_channel_setup() 820 static int b43_phy_ht_set_channel(struct b43_wldev dev, b43_phy_ht_set_channel() argument 824 struct b43_phy phy = &dev->phy; b43_phy_ht_set_channel() 829 chent_r2059 = b43_phy_ht_get_channeltab_e_r2059(dev, b43_phy_ht_set_channel() 840 b43_radio_2059_channel_setup(dev, chent_r2059); b43_phy_ht_set_channel() 841 b43_phy_ht_channel_setup(dev, &(chent_r2059->phy_regs), b43_phy_ht_set_channel() 854 static int b43_phy_ht_op_allocate(struct b43_wldev dev) b43_phy_ht_op_allocate() argument 861 dev->phy.ht = phy_ht; b43_phy_ht_op_allocate() 866 static void b43_phy_ht_op_prepare_structs(struct b43_wldev dev) b43_phy_ht_op_prepare_structs() argument 868 struct b43_phy phy = &dev->phy; b43_phy_ht_op_prepare_structs() 882 static int b43_phy_ht_op_init(struct b43_wldev dev) b43_phy_ht_op_init() argument 884 struct b43_phy_ht phy_ht = dev->phy.ht; b43_phy_ht_op_init() 889 if (dev->dev->bus_type != B43_BUS_BCMA) { b43_phy_ht_op_init() 890 b43err(dev->wl, "HT-PHY is supported only on BCMA bus!\n"); b43_phy_ht_op_init() 894 b43_phy_ht_tables_init(dev); b43_phy_ht_op_init() 896 b43_phy_mask(dev, 0x0be, ~0x2); b43_phy_ht_op_init() 897 b43_phy_set(dev, 0x23f, 0x7ff); b43_phy_ht_op_init() 898 b43_phy_set(dev, 0x240, 0x7ff); b43_phy_ht_op_init() 899 b43_phy_set(dev, 0x241, 0x7ff); b43_phy_ht_op_init() 901 b43_phy_ht_zero_extg(dev); b43_phy_ht_op_init() 903 b43_phy_mask(dev, B43_PHY_EXTG(0), ~0x3); b43_phy_ht_op_init() 905 b43_phy_write(dev, B43_PHY_HT_AFE_C1_OVER, 0); b43_phy_ht_op_init() 906 b43_phy_write(dev, B43_PHY_HT_AFE_C2_OVER, 0); b43_phy_ht_op_init() 907 b43_phy_write(dev, B43_PHY_HT_AFE_C3_OVER, 0); b43_phy_ht_op_init() 909 b43_phy_write(dev, B43_PHY_EXTG(0x103), 0x20); b43_phy_ht_op_init() 910 b43_phy_write(dev, B43_PHY_EXTG(0x101), 0x20); b43_phy_ht_op_init() 911 b43_phy_write(dev, 0x20d, 0xb8); b43_phy_ht_op_init() 912 b43_phy_write(dev, B43_PHY_EXTG(0x14f), 0xc8); b43_phy_ht_op_init() 913 b43_phy_write(dev, 0x70, 0x50); b43_phy_ht_op_init() 914 b43_phy_write(dev, 0x1ff, 0x30); b43_phy_ht_op_init() 919 if (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ) b43_phy_ht_op_init() 920 b43_phy_ht_classifier(dev, B43_PHY_HT_CLASS_CTL_CCK_EN, 0); b43_phy_ht_op_init() 922 b43_phy_ht_classifier(dev, B43_PHY_HT_CLASS_CTL_CCK_EN, b43_phy_ht_op_init() 925 b43_phy_set(dev, 0xb1, 0x91); b43_phy_ht_op_init() 926 b43_phy_write(dev, 0x32f, 0x0003); b43_phy_ht_op_init() 927 b43_phy_write(dev, 0x077, 0x0010); b43_phy_ht_op_init() 928 b43_phy_write(dev, 0x0b4, 0x0258); b43_phy_ht_op_init() 929 b43_phy_mask(dev, 0x17e, ~0x4000); b43_phy_ht_op_init() 931 b43_phy_write(dev, 0x0b9, 0x0072); b43_phy_ht_op_init() 933 b43_httab_write_few(dev, B43_HTTAB16(7, 0x14e), 2, 0x010f, 0x010f); b43_phy_ht_op_init() 934 b43_httab_write_few(dev, B43_HTTAB16(7, 0x15e), 2, 0x010f, 0x010f); b43_phy_ht_op_init() 935 b43_httab_write_few(dev, B43_HTTAB16(7, 0x16e), 2, 0x010f, 0x010f); b43_phy_ht_op_init() 937 b43_phy_ht_afe_unk1(dev); b43_phy_ht_op_init() 939 b43_httab_write_few(dev, B43_HTTAB16(7, 0x130), 9, 0x777, 0x111, 0x111, b43_phy_ht_op_init() 942 b43_httab_write(dev, B43_HTTAB16(7, 0x120), 0x0777); b43_phy_ht_op_init() 943 b43_httab_write(dev, B43_HTTAB16(7, 0x124), 0x0777); b43_phy_ht_op_init() 945 b43_httab_write(dev, B43_HTTAB16(8, 0x00), 0x02); b43_phy_ht_op_init() 946 b43_httab_write(dev, B43_HTTAB16(8, 0x10), 0x02); b43_phy_ht_op_init() 947 b43_httab_write(dev, B43_HTTAB16(8, 0x20), 0x02); b43_phy_ht_op_init() 949 b43_httab_write_few(dev, B43_HTTAB16(8, 0x08), 4, b43_phy_ht_op_init() 951 b43_httab_write_few(dev, B43_HTTAB16(8, 0x18), 4, b43_phy_ht_op_init() 953 b43_httab_write_few(dev, B43_HTTAB16(8, 0x28), 4, b43_phy_ht_op_init() 956 b43_httab_write_few(dev, B43_HTTAB16(8, 0x0c), 4, 0x2, 0x2, 0x2, 0x2); b43_phy_ht_op_init() 957 b43_httab_write_few(dev, B43_HTTAB16(8, 0x1c), 4, 0x2, 0x2, 0x2, 0x2); b43_phy_ht_op_init() 958 b43_httab_write_few(dev, B43_HTTAB16(8, 0x2c), 4, 0x2, 0x2, 0x2, 0x2); b43_phy_ht_op_init() 960 b43_phy_maskset(dev, 0x0280, 0xff00, 0x3e); b43_phy_ht_op_init() 961 b43_phy_maskset(dev, 0x0283, 0xff00, 0x3e); b43_phy_ht_op_init() 962 b43_phy_maskset(dev, B43_PHY_OFDM(0x0141), 0xff00, 0x46); b43_phy_ht_op_init() 963 b43_phy_maskset(dev, 0x0283, 0xff00, 0x40); b43_phy_ht_op_init() 965 b43_httab_write_few(dev, B43_HTTAB16(00, 0x8), 4, b43_phy_ht_op_init() 967 b43_httab_write_few(dev, B43_HTTAB16(01, 0x8), 4, b43_phy_ht_op_init() 970 b43_httab_write_few(dev, B43_HTTAB16(40, 0x8), 4, b43_phy_ht_op_init() 973 b43_phy_maskset(dev, B43_PHY_OFDM(0x24), 0x3f, 0xd); b43_phy_ht_op_init() 974 b43_phy_maskset(dev, B43_PHY_OFDM(0x64), 0x3f, 0xd); b43_phy_ht_op_init() 975 b43_phy_maskset(dev, B43_PHY_OFDM(0xa4), 0x3f, 0xd); b43_phy_ht_op_init() 977 b43_phy_set(dev, B43_PHY_EXTG(0x060), 0x1); b43_phy_ht_op_init() 978 b43_phy_set(dev, B43_PHY_EXTG(0x064), 0x1); b43_phy_ht_op_init() 979 b43_phy_set(dev, B43_PHY_EXTG(0x080), 0x1); b43_phy_ht_op_init() 980 b43_phy_set(dev, B43_PHY_EXTG(0x084), 0x1); b43_phy_ht_op_init() 983 tmp = b43_httab_read(dev, B43_HTTAB16(7, 0x144)); b43_phy_ht_op_init() 984 b43_httab_write(dev, B43_HTTAB16(7, 0x14a), tmp); b43_phy_ht_op_init() 985 tmp = b43_httab_read(dev, B43_HTTAB16(7, 0x154)); b43_phy_ht_op_init() 986 b43_httab_write(dev, B43_HTTAB16(7, 0x15a), tmp); b43_phy_ht_op_init() 987 tmp = b43_httab_read(dev, B43_HTTAB16(7, 0x164)); b43_phy_ht_op_init() 988 b43_httab_write(dev, B43_HTTAB16(7, 0x16a), tmp); b43_phy_ht_op_init() 991 b43_phy_force_clock(dev, true); b43_phy_ht_op_init() 992 tmp = b43_phy_read(dev, B43_PHY_HT_BBCFG); b43_phy_ht_op_init() 993 b43_phy_write(dev, B43_PHY_HT_BBCFG, tmp \| B43_PHY_HT_BBCFG_RSTCCA); b43_phy_ht_op_init() 994 b43_phy_write(dev, B43_PHY_HT_BBCFG, tmp & ~B43_PHY_HT_BBCFG_RSTCCA); b43_phy_ht_op_init() 995 b43_phy_force_clock(dev, false); b43_phy_ht_op_init() 997 b43_mac_phy_clock_set(dev, true); b43_phy_ht_op_init() 999 b43_phy_ht_pa_override(dev, false); b43_phy_ht_op_init() 1000 b43_phy_ht_force_rf_sequence(dev, B43_PHY_HT_RF_SEQ_TRIG_RX2TX); b43_phy_ht_op_init() 1001 b43_phy_ht_force_rf_sequence(dev, B43_PHY_HT_RF_SEQ_TRIG_RST2RX); b43_phy_ht_op_init() 1002 b43_phy_ht_pa_override(dev, true); b43_phy_ht_op_init() 1005 b43_phy_ht_classifier(dev, 0, 0); b43_phy_ht_op_init() 1006 b43_phy_ht_read_clip_detection(dev, clip_state); b43_phy_ht_op_init() 1008 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) b43_phy_ht_op_init() 1009 b43_phy_ht_bphy_init(dev); b43_phy_ht_op_init() 1011 b43_httab_write_bulk(dev, B43_HTTAB32(0x1a, 0xc0), b43_phy_ht_op_init() 1015 b43_phy_ht_tx_power_fix(dev); b43_phy_ht_op_init() 1016 b43_phy_ht_tx_power_ctl(dev, false); b43_phy_ht_op_init() 1017 b43_phy_ht_tx_power_ctl_idle_tssi(dev); b43_phy_ht_op_init() 1018 b43_phy_ht_tx_power_ctl_setup(dev); b43_phy_ht_op_init() 1019 b43_phy_ht_tssi_setup(dev); b43_phy_ht_op_init() 1020 b43_phy_ht_tx_power_ctl(dev, saved_tx_pwr_ctl); b43_phy_ht_op_init() 1025 static void b43_phy_ht_op_free(struct b43_wldev dev) b43_phy_ht_op_free() argument 1027 struct b43_phy phy = &dev->phy; b43_phy_ht_op_free() 1035 static void b43_phy_ht_op_software_rfkill(struct b43_wldev dev, b43_phy_ht_op_software_rfkill() argument 1038 if (b43_read32(dev, B43_MMIO_MACCTL) & B43_MACCTL_ENABLED) b43_phy_ht_op_software_rfkill() 1039 b43err(dev->wl, "MAC not suspended\n"); b43_phy_ht_op_software_rfkill() 1042 b43_phy_mask(dev, B43_PHY_HT_RF_CTL_CMD, b43_phy_ht_op_software_rfkill() 1045 if (dev->phy.radio_ver == 0x2059) b43_phy_ht_op_software_rfkill() 1046 b43_radio_2059_init(dev); b43_phy_ht_op_software_rfkill() 1050 b43_switch_channel(dev, dev->phy.channel); b43_phy_ht_op_software_rfkill() 1054 static void b43_phy_ht_op_switch_analog(struct b43_wldev dev, bool on) b43_phy_ht_op_switch_analog() argument 1057 b43_phy_write(dev, B43_PHY_HT_AFE_C1, 0x00cd); b43_phy_ht_op_switch_analog() 1058 b43_phy_write(dev, B43_PHY_HT_AFE_C1_OVER, 0x0000); b43_phy_ht_op_switch_analog() 1059 b43_phy_write(dev, B43_PHY_HT_AFE_C2, 0x00cd); b43_phy_ht_op_switch_analog() 1060 b43_phy_write(dev, B43_PHY_HT_AFE_C2_OVER, 0x0000); b43_phy_ht_op_switch_analog() 1061 b43_phy_write(dev, B43_PHY_HT_AFE_C3, 0x00cd); b43_phy_ht_op_switch_analog() 1062 b43_phy_write(dev, B43_PHY_HT_AFE_C3_OVER, 0x0000); b43_phy_ht_op_switch_analog() 1064 b43_phy_write(dev, B43_PHY_HT_AFE_C1_OVER, 0x07ff); b43_phy_ht_op_switch_analog() 1065 b43_phy_write(dev, B43_PHY_HT_AFE_C1, 0x00fd); b43_phy_ht_op_switch_analog() 1066 b43_phy_write(dev, B43_PHY_HT_AFE_C2_OVER, 0x07ff); b43_phy_ht_op_switch_analog() 1067 b43_phy_write(dev, B43_PHY_HT_AFE_C2, 0x00fd); b43_phy_ht_op_switch_analog() 1068 b43_phy_write(dev, B43_PHY_HT_AFE_C3_OVER, 0x07ff); b43_phy_ht_op_switch_analog() 1069 b43_phy_write(dev, B43_PHY_HT_AFE_C3, 0x00fd); b43_phy_ht_op_switch_analog() 1073 static int b43_phy_ht_op_switch_channel(struct b43_wldev dev, b43_phy_ht_op_switch_channel() argument 1076 struct ieee80211_channel channel = dev->wl->hw->conf.chandef.chan; b43_phy_ht_op_switch_channel() 1078 cfg80211_get_chandef_type(&dev->wl->hw->conf.chandef); b43_phy_ht_op_switch_channel() 1080 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) { b43_phy_ht_op_switch_channel() 1087 return b43_phy_ht_set_channel(dev, channel, channel_type); b43_phy_ht_op_switch_channel() 1090 static unsigned int b43_phy_ht_op_get_default_chan(struct b43_wldev dev) b43_phy_ht_op_get_default_chan() argument 1092 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) b43_phy_ht_op_get_default_chan() 1101 static void b43_phy_ht_op_maskset(struct b43_wldev dev, u16 reg, u16 mask, b43_phy_ht_op_maskset() argument 1104 b43_write16f(dev, B43_MMIO_PHY_CONTROL, reg); b43_phy_ht_op_maskset() 1105 b43_write16(dev, B43_MMIO_PHY_DATA, b43_phy_ht_op_maskset() 1106 (b43_read16(dev, B43_MMIO_PHY_DATA) & mask) \| set); b43_phy_ht_op_maskset() 1109 static u16 b43_phy_ht_op_radio_read(struct b43_wldev dev, u16 reg) b43_phy_ht_op_radio_read() argument 1114 b43_write16f(dev, B43_MMIO_RADIO24_CONTROL, reg); b43_phy_ht_op_radio_read() 1115 return b43_read16(dev, B43_MMIO_RADIO24_DATA); b43_phy_ht_op_radio_read() 1118 static void b43_phy_ht_op_radio_write(struct b43_wldev dev, u16 reg, b43_phy_ht_op_radio_write() argument 1121 b43_write16f(dev, B43_MMIO_RADIO24_CONTROL, reg); b43_phy_ht_op_radio_write() 1122 b43_write16(dev, B43_MMIO_RADIO24_DATA, value); b43_phy_ht_op_radio_write() 1126 b43_phy_ht_op_recalc_txpower(struct b43_wldev dev, bool ignore_tssi) b43_phy_ht_op_recalc_txpower() argument 1131 static void b43_phy_ht_op_adjust_txpower(struct b43_wldev *dev) b43_phy_ht_op_adjust_txpower() argument
H A D	phy_g.c	66 static void b43_calc_nrssi_threshold(struct b43_wldev dev); 80 static void generate_rfatt_list(struct b43_wldev dev, generate_rfatt_list() argument 83 struct b43_phy phy = &dev->phy; generate_rfatt_list() 123 if (!b43_has_hardware_pctl(dev)) { generate_rfatt_list() 146 static void generate_bbatt_list(struct b43_wldev dev, generate_bbatt_list() argument 167 static void b43_shm_clear_tssi(struct b43_wldev dev) b43_shm_clear_tssi() argument 169 b43_shm_write16(dev, B43_SHM_SHARED, 0x0058, 0x7F7F); b43_shm_clear_tssi() 170 b43_shm_write16(dev, B43_SHM_SHARED, 0x005a, 0x7F7F); b43_shm_clear_tssi() 171 b43_shm_write16(dev, B43_SHM_SHARED, 0x0070, 0x7F7F); b43_shm_clear_tssi() 172 b43_shm_write16(dev, B43_SHM_SHARED, 0x0072, 0x7F7F); b43_shm_clear_tssi() 176 static void b43_synth_pu_workaround(struct b43_wldev dev, u8 channel) b43_synth_pu_workaround() argument 178 struct b43_phy phy = &dev->phy; b43_synth_pu_workaround() 188 b43_write16(dev, B43_MMIO_CHANNEL, b43_synth_pu_workaround() 191 b43_write16(dev, B43_MMIO_CHANNEL, channel2freq_bg(1)); b43_synth_pu_workaround() 194 b43_write16(dev, B43_MMIO_CHANNEL, channel2freq_bg(channel)); b43_synth_pu_workaround() 198 void b43_gphy_set_baseband_attenuation(struct b43_wldev dev, b43_gphy_set_baseband_attenuation() argument 201 struct b43_phy phy = &dev->phy; b43_gphy_set_baseband_attenuation() 204 b43_write16(dev, B43_MMIO_PHY0, (b43_read16(dev, B43_MMIO_PHY0) b43_gphy_set_baseband_attenuation() 208 b43_phy_maskset(dev, B43_PHY_DACCTL, 0xFFC3, (baseband_attenuation << 2)); b43_gphy_set_baseband_attenuation() 210 b43_phy_maskset(dev, B43_PHY_DACCTL, 0xFF87, (baseband_attenuation << 3)); b43_gphy_set_baseband_attenuation() 215 static void b43_set_txpower_g(struct b43_wldev dev, b43_set_txpower_g() argument 219 struct b43_phy phy = &dev->phy; b43_set_txpower_g() 239 if (b43_debug(dev, B43_DBG_XMITPOWER)) { b43_set_txpower_g() 240 b43dbg(dev->wl, "Tuning TX-power to bbatt(%u), " b43_set_txpower_g() 246 b43_gphy_set_baseband_attenuation(dev, bb); b43_set_txpower_g() 247 b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_RFATT, rf); b43_set_txpower_g() 249 b43_radio_write16(dev, 0x43, b43_set_txpower_g() 252 b43_radio_maskset(dev, 0x43, 0xFFF0, (rf & 0x000F)); b43_set_txpower_g() 253 b43_radio_maskset(dev, 0x52, ~0x0070, (tx_control & 0x0070)); b43_set_txpower_g() 256 b43_radio_write16(dev, 0x52, tx_magn \| tx_bias); b43_set_txpower_g() 258 b43_radio_maskset(dev, 0x52, 0xFFF0, (tx_bias & 0x000F)); b43_set_txpower_g() 260 b43_lo_g_adjust(dev); b43_set_txpower_g() 264 static void b43_gphy_tssi_power_lt_init(struct b43_wldev dev) b43_gphy_tssi_power_lt_init() argument 266 struct b43_phy_g gphy = dev->phy.g; b43_gphy_tssi_power_lt_init() 271 b43_ofdmtab_write16(dev, 0x3C20, i, gphy->tssi2dbm[i]); b43_gphy_tssi_power_lt_init() 273 b43_ofdmtab_write16(dev, 0x3C00, i - 32, gphy->tssi2dbm[i]); b43_gphy_tssi_power_lt_init() 277 b43_phy_write(dev, 0x380 + (i / 2), value); b43_gphy_tssi_power_lt_init() 282 static void b43_gphy_gain_lt_init(struct b43_wldev dev) b43_gphy_gain_lt_init() argument 284 struct b43_phy phy = &dev->phy; b43_gphy_gain_lt_init() 302 b43_phy_write(dev, 0x3C0 + nr_written, tmp); b43_gphy_gain_lt_init() 308 static void b43_set_all_gains(struct b43_wldev dev, b43_set_all_gains() argument 311 struct b43_phy phy = &dev->phy; b43_set_all_gains() 326 b43_ofdmtab_write16(dev, table, i, first); b43_set_all_gains() 329 b43_ofdmtab_write16(dev, table, i, second); b43_set_all_gains() 333 b43_phy_maskset(dev, 0x04A0, 0xBFBF, tmp); b43_set_all_gains() 334 b43_phy_maskset(dev, 0x04A1, 0xBFBF, tmp); b43_set_all_gains() 335 b43_phy_maskset(dev, 0x04A2, 0xBFBF, tmp); b43_set_all_gains() 337 b43_dummy_transmission(dev, false, true); b43_set_all_gains() 340 static void b43_set_original_gains(struct b43_wldev dev) b43_set_original_gains() argument 342 struct b43_phy phy = &dev->phy; b43_set_original_gains() 360 b43_ofdmtab_write16(dev, table, i, tmp); b43_set_original_gains() 364 b43_ofdmtab_write16(dev, table, i, i - start); b43_set_original_gains() 366 b43_phy_maskset(dev, 0x04A0, 0xBFBF, 0x4040); b43_set_original_gains() 367 b43_phy_maskset(dev, 0x04A1, 0xBFBF, 0x4040); b43_set_original_gains() 368 b43_phy_maskset(dev, 0x04A2, 0xBFBF, 0x4000); b43_set_original_gains() 369 b43_dummy_transmission(dev, false, true); b43_set_original_gains() 373 static void b43_nrssi_hw_write(struct b43_wldev dev, u16 offset, s16 val) b43_nrssi_hw_write() argument 375 b43_phy_write(dev, B43_PHY_NRSSILT_CTRL, offset); b43_nrssi_hw_write() 376 b43_phy_write(dev, B43_PHY_NRSSILT_DATA, (u16) val); b43_nrssi_hw_write() 380 static s16 b43_nrssi_hw_read(struct b43_wldev dev, u16 offset) b43_nrssi_hw_read() argument 384 b43_phy_write(dev, B43_PHY_NRSSILT_CTRL, offset); b43_nrssi_hw_read() 385 val = b43_phy_read(dev, B43_PHY_NRSSILT_DATA); b43_nrssi_hw_read() 391 static void b43_nrssi_hw_update(struct b43_wldev dev, u16 val) b43_nrssi_hw_update() argument 397 tmp = b43_nrssi_hw_read(dev, i); b43_nrssi_hw_update() 400 b43_nrssi_hw_write(dev, i, tmp); b43_nrssi_hw_update() 405 static void b43_nrssi_mem_update(struct b43_wldev dev) b43_nrssi_mem_update() argument 407 struct b43_phy_g gphy = dev->phy.g; b43_nrssi_mem_update() 421 static void b43_calc_nrssi_offset(struct b43_wldev dev) b43_calc_nrssi_offset() argument 423 struct b43_phy phy = &dev->phy; b43_calc_nrssi_offset() 429 backup[0] = b43_phy_read(dev, 0x0001); b43_calc_nrssi_offset() 430 backup[1] = b43_phy_read(dev, 0x0811); b43_calc_nrssi_offset() 431 backup[2] = b43_phy_read(dev, 0x0812); b43_calc_nrssi_offset() 433 backup[3] = b43_phy_read(dev, 0x0814); b43_calc_nrssi_offset() 434 backup[4] = b43_phy_read(dev, 0x0815); b43_calc_nrssi_offset() 436 backup[5] = b43_phy_read(dev, 0x005A); b43_calc_nrssi_offset() 437 backup[6] = b43_phy_read(dev, 0x0059); b43_calc_nrssi_offset() 438 backup[7] = b43_phy_read(dev, 0x0058); b43_calc_nrssi_offset() 439 backup[8] = b43_phy_read(dev, 0x000A); b43_calc_nrssi_offset() 440 backup[9] = b43_phy_read(dev, 0x0003); b43_calc_nrssi_offset() 441 backup[10] = b43_radio_read16(dev, 0x007A); b43_calc_nrssi_offset() 442 backup[11] = b43_radio_read16(dev, 0x0043); b43_calc_nrssi_offset() 444 b43_phy_mask(dev, 0x0429, 0x7FFF); b43_calc_nrssi_offset() 445 b43_phy_maskset(dev, 0x0001, 0x3FFF, 0x4000); b43_calc_nrssi_offset() 446 b43_phy_set(dev, 0x0811, 0x000C); b43_calc_nrssi_offset() 447 b43_phy_maskset(dev, 0x0812, 0xFFF3, 0x0004); b43_calc_nrssi_offset() 448 b43_phy_mask(dev, 0x0802, ~(0x1 \| 0x2)); b43_calc_nrssi_offset() 450 backup[12] = b43_phy_read(dev, 0x002E); b43_calc_nrssi_offset() 451 backup[13] = b43_phy_read(dev, 0x002F); b43_calc_nrssi_offset() 452 backup[14] = b43_phy_read(dev, 0x080F); b43_calc_nrssi_offset() 453 backup[15] = b43_phy_read(dev, 0x0810); b43_calc_nrssi_offset() 454 backup[16] = b43_phy_read(dev, 0x0801); b43_calc_nrssi_offset() 455 backup[17] = b43_phy_read(dev, 0x0060); b43_calc_nrssi_offset() 456 backup[18] = b43_phy_read(dev, 0x0014); b43_calc_nrssi_offset() 457 backup[19] = b43_phy_read(dev, 0x0478); b43_calc_nrssi_offset() 459 b43_phy_write(dev, 0x002E, 0); b43_calc_nrssi_offset() 460 b43_phy_write(dev, 0x002F, 0); b43_calc_nrssi_offset() 461 b43_phy_write(dev, 0x080F, 0); b43_calc_nrssi_offset() 462 b43_phy_write(dev, 0x0810, 0); b43_calc_nrssi_offset() 463 b43_phy_set(dev, 0x0478, 0x0100); b43_calc_nrssi_offset() 464 b43_phy_set(dev, 0x0801, 0x0040); b43_calc_nrssi_offset() 465 b43_phy_set(dev, 0x0060, 0x0040); b43_calc_nrssi_offset() 466 b43_phy_set(dev, 0x0014, 0x0200); b43_calc_nrssi_offset() 468 b43_radio_set(dev, 0x007A, 0x0070); b43_calc_nrssi_offset() 469 b43_radio_set(dev, 0x007A, 0x0080); b43_calc_nrssi_offset() 472 v47F = (s16) ((b43_phy_read(dev, 0x047F) >> 8) & 0x003F); b43_calc_nrssi_offset() 477 b43_radio_write16(dev, 0x007B, i); b43_calc_nrssi_offset() 480 (s16) ((b43_phy_read(dev, 0x047F) >> 8) & 0x003F); b43_calc_nrssi_offset() 489 b43_radio_mask(dev, 0x007A, 0x007F); b43_calc_nrssi_offset() 491 b43_phy_set(dev, 0x0814, 0x0001); b43_calc_nrssi_offset() 492 b43_phy_mask(dev, 0x0815, 0xFFFE); b43_calc_nrssi_offset() 494 b43_phy_set(dev, 0x0811, 0x000C); b43_calc_nrssi_offset() 495 b43_phy_set(dev, 0x0812, 0x000C); b43_calc_nrssi_offset() 496 b43_phy_set(dev, 0x0811, 0x0030); b43_calc_nrssi_offset() 497 b43_phy_set(dev, 0x0812, 0x0030); b43_calc_nrssi_offset() 498 b43_phy_write(dev, 0x005A, 0x0480); b43_calc_nrssi_offset() 499 b43_phy_write(dev, 0x0059, 0x0810); b43_calc_nrssi_offset() 500 b43_phy_write(dev, 0x0058, 0x000D); b43_calc_nrssi_offset() 502 b43_phy_write(dev, 0x0003, 0x0122); b43_calc_nrssi_offset() 504 b43_phy_set(dev, 0x000A, 0x2000); b43_calc_nrssi_offset() 507 b43_phy_set(dev, 0x0814, 0x0004); b43_calc_nrssi_offset() 508 b43_phy_mask(dev, 0x0815, 0xFFFB); b43_calc_nrssi_offset() 510 b43_phy_maskset(dev, 0x0003, 0xFF9F, 0x0040); b43_calc_nrssi_offset() 511 b43_radio_set(dev, 0x007A, 0x000F); b43_calc_nrssi_offset() 512 b43_set_all_gains(dev, 3, 0, 1); b43_calc_nrssi_offset() 513 b43_radio_maskset(dev, 0x0043, 0x00F0, 0x000F); b43_calc_nrssi_offset() 515 v47F = (s16) ((b43_phy_read(dev, 0x047F) >> 8) & 0x003F); b43_calc_nrssi_offset() 520 b43_radio_write16(dev, 0x007B, i); b43_calc_nrssi_offset() 523 (s16) ((b43_phy_read(dev, 0x047F) >> 8) & b43_calc_nrssi_offset() 535 b43_radio_write16(dev, 0x007B, saved); b43_calc_nrssi_offset() 538 b43_phy_write(dev, 0x002E, backup[12]); b43_calc_nrssi_offset() 539 b43_phy_write(dev, 0x002F, backup[13]); b43_calc_nrssi_offset() 540 b43_phy_write(dev, 0x080F, backup[14]); b43_calc_nrssi_offset() 541 b43_phy_write(dev, 0x0810, backup[15]); b43_calc_nrssi_offset() 544 b43_phy_write(dev, 0x0814, backup[3]); b43_calc_nrssi_offset() 545 b43_phy_write(dev, 0x0815, backup[4]); b43_calc_nrssi_offset() 547 b43_phy_write(dev, 0x005A, backup[5]); b43_calc_nrssi_offset() 548 b43_phy_write(dev, 0x0059, backup[6]); b43_calc_nrssi_offset() 549 b43_phy_write(dev, 0x0058, backup[7]); b43_calc_nrssi_offset() 550 b43_phy_write(dev, 0x000A, backup[8]); b43_calc_nrssi_offset() 551 b43_phy_write(dev, 0x0003, backup[9]); b43_calc_nrssi_offset() 552 b43_radio_write16(dev, 0x0043, backup[11]); b43_calc_nrssi_offset() 553 b43_radio_write16(dev, 0x007A, backup[10]); b43_calc_nrssi_offset() 554 b43_phy_write(dev, 0x0802, b43_phy_read(dev, 0x0802) \| 0x1 \| 0x2); b43_calc_nrssi_offset() 555 b43_phy_set(dev, 0x0429, 0x8000); b43_calc_nrssi_offset() 556 b43_set_original_gains(dev); b43_calc_nrssi_offset() 558 b43_phy_write(dev, 0x0801, backup[16]); b43_calc_nrssi_offset() 559 b43_phy_write(dev, 0x0060, backup[17]); b43_calc_nrssi_offset() 560 b43_phy_write(dev, 0x0014, backup[18]); b43_calc_nrssi_offset() 561 b43_phy_write(dev, 0x0478, backup[19]); b43_calc_nrssi_offset() 563 b43_phy_write(dev, 0x0001, backup[0]); b43_calc_nrssi_offset() 564 b43_phy_write(dev, 0x0812, backup[2]); b43_calc_nrssi_offset() 565 b43_phy_write(dev, 0x0811, backup[1]); b43_calc_nrssi_offset() 568 static void b43_calc_nrssi_slope(struct b43_wldev dev) b43_calc_nrssi_slope() argument 570 struct b43_phy phy = &dev->phy; b43_calc_nrssi_slope() 581 b43_calc_nrssi_offset(dev); b43_calc_nrssi_slope() 583 b43_phy_mask(dev, B43_PHY_G_CRS, 0x7FFF); b43_calc_nrssi_slope() 584 b43_phy_mask(dev, 0x0802, 0xFFFC); b43_calc_nrssi_slope() 585 backup[7] = b43_read16(dev, 0x03E2); b43_calc_nrssi_slope() 586 b43_write16(dev, 0x03E2, b43_read16(dev, 0x03E2) \| 0x8000); b43_calc_nrssi_slope() 587 backup[0] = b43_radio_read16(dev, 0x007A); b43_calc_nrssi_slope() 588 backup[1] = b43_radio_read16(dev, 0x0052); b43_calc_nrssi_slope() 589 backup[2] = b43_radio_read16(dev, 0x0043); b43_calc_nrssi_slope() 590 backup[3] = b43_phy_read(dev, 0x0015); b43_calc_nrssi_slope() 591 backup[4] = b43_phy_read(dev, 0x005A); b43_calc_nrssi_slope() 592 backup[5] = b43_phy_read(dev, 0x0059); b43_calc_nrssi_slope() 593 backup[6] = b43_phy_read(dev, 0x0058); b43_calc_nrssi_slope() 594 backup[8] = b43_read16(dev, 0x03E6); b43_calc_nrssi_slope() 595 backup[9] = b43_read16(dev, B43_MMIO_CHANNEL_EXT); b43_calc_nrssi_slope() 597 backup[10] = b43_phy_read(dev, 0x002E); b43_calc_nrssi_slope() 598 backup[11] = b43_phy_read(dev, 0x002F); b43_calc_nrssi_slope() 599 backup[12] = b43_phy_read(dev, 0x080F); b43_calc_nrssi_slope() 600 backup[13] = b43_phy_read(dev, B43_PHY_G_LO_CONTROL); b43_calc_nrssi_slope() 601 backup[14] = b43_phy_read(dev, 0x0801); b43_calc_nrssi_slope() 602 backup[15] = b43_phy_read(dev, 0x0060); b43_calc_nrssi_slope() 603 backup[16] = b43_phy_read(dev, 0x0014); b43_calc_nrssi_slope() 604 backup[17] = b43_phy_read(dev, 0x0478); b43_calc_nrssi_slope() 605 b43_phy_write(dev, 0x002E, 0); b43_calc_nrssi_slope() 606 b43_phy_write(dev, B43_PHY_G_LO_CONTROL, 0); b43_calc_nrssi_slope() 611 b43_phy_set(dev, 0x0478, 0x0100); b43_calc_nrssi_slope() 612 b43_phy_set(dev, 0x0801, 0x0040); b43_calc_nrssi_slope() 616 b43_phy_mask(dev, 0x0801, 0xFFBF); b43_calc_nrssi_slope() 619 b43_phy_set(dev, 0x0060, 0x0040); b43_calc_nrssi_slope() 620 b43_phy_set(dev, 0x0014, 0x0200); b43_calc_nrssi_slope() 622 b43_radio_set(dev, 0x007A, 0x0070); b43_calc_nrssi_slope() 623 b43_set_all_gains(dev, 0, 8, 0); b43_calc_nrssi_slope() 624 b43_radio_mask(dev, 0x007A, 0x00F7); b43_calc_nrssi_slope() 626 b43_phy_maskset(dev, 0x0811, 0xFFCF, 0x0030); b43_calc_nrssi_slope() 627 b43_phy_maskset(dev, 0x0812, 0xFFCF, 0x0010); b43_calc_nrssi_slope() 629 b43_radio_set(dev, 0x007A, 0x0080); b43_calc_nrssi_slope() 632 nrssi0 = (s16) ((b43_phy_read(dev, 0x047F) >> 8) & 0x003F); b43_calc_nrssi_slope() 636 b43_radio_mask(dev, 0x007A, 0x007F); b43_calc_nrssi_slope() 638 b43_phy_maskset(dev, 0x0003, 0xFF9F, 0x0040); b43_calc_nrssi_slope() 641 b43_write16(dev, B43_MMIO_CHANNEL_EXT, b43_calc_nrssi_slope() 642 b43_read16(dev, B43_MMIO_CHANNEL_EXT) b43_calc_nrssi_slope() 644 b43_radio_set(dev, 0x007A, 0x000F); b43_calc_nrssi_slope() 645 b43_phy_write(dev, 0x0015, 0xF330); b43_calc_nrssi_slope() 647 b43_phy_maskset(dev, 0x0812, 0xFFCF, 0x0020); b43_calc_nrssi_slope() 648 b43_phy_maskset(dev, 0x0811, 0xFFCF, 0x0020); b43_calc_nrssi_slope() 651 b43_set_all_gains(dev, 3, 0, 1); b43_calc_nrssi_slope() 653 b43_radio_write16(dev, 0x0043, 0x001F); b43_calc_nrssi_slope() 655 tmp = b43_radio_read16(dev, 0x0052) & 0xFF0F; b43_calc_nrssi_slope() 656 b43_radio_write16(dev, 0x0052, tmp \| 0x0060); b43_calc_nrssi_slope() 657 tmp = b43_radio_read16(dev, 0x0043) & 0xFFF0; b43_calc_nrssi_slope() 658 b43_radio_write16(dev, 0x0043, tmp \| 0x0009); b43_calc_nrssi_slope() 660 b43_phy_write(dev, 0x005A, 0x0480); b43_calc_nrssi_slope() 661 b43_phy_write(dev, 0x0059, 0x0810); b43_calc_nrssi_slope() 662 b43_phy_write(dev, 0x0058, 0x000D); b43_calc_nrssi_slope() 664 nrssi1 = (s16) ((b43_phy_read(dev, 0x047F) >> 8) & 0x003F); b43_calc_nrssi_slope() 676 b43_phy_write(dev, 0x002E, backup[10]); b43_calc_nrssi_slope() 677 b43_phy_write(dev, 0x002F, backup[11]); b43_calc_nrssi_slope() 678 b43_phy_write(dev, 0x080F, backup[12]); b43_calc_nrssi_slope() 679 b43_phy_write(dev, B43_PHY_G_LO_CONTROL, backup[13]); b43_calc_nrssi_slope() 682 b43_phy_mask(dev, 0x0812, 0xFFCF); b43_calc_nrssi_slope() 683 b43_phy_mask(dev, 0x0811, 0xFFCF); b43_calc_nrssi_slope() 686 b43_radio_write16(dev, 0x007A, backup[0]); b43_calc_nrssi_slope() 687 b43_radio_write16(dev, 0x0052, backup[1]); b43_calc_nrssi_slope() 688 b43_radio_write16(dev, 0x0043, backup[2]); b43_calc_nrssi_slope() 689 b43_write16(dev, 0x03E2, backup[7]); b43_calc_nrssi_slope() 690 b43_write16(dev, 0x03E6, backup[8]); b43_calc_nrssi_slope() 691 b43_write16(dev, B43_MMIO_CHANNEL_EXT, backup[9]); b43_calc_nrssi_slope() 692 b43_phy_write(dev, 0x0015, backup[3]); b43_calc_nrssi_slope() 693 b43_phy_write(dev, 0x005A, backup[4]); b43_calc_nrssi_slope() 694 b43_phy_write(dev, 0x0059, backup[5]); b43_calc_nrssi_slope() 695 b43_phy_write(dev, 0x0058, backup[6]); b43_calc_nrssi_slope() 696 b43_synth_pu_workaround(dev, phy->channel); b43_calc_nrssi_slope() 697 b43_phy_set(dev, 0x0802, (0x0001 \| 0x0002)); b43_calc_nrssi_slope() 698 b43_set_original_gains(dev); b43_calc_nrssi_slope() 699 b43_phy_set(dev, B43_PHY_G_CRS, 0x8000); b43_calc_nrssi_slope() 701 b43_phy_write(dev, 0x0801, backup[14]); b43_calc_nrssi_slope() 702 b43_phy_write(dev, 0x0060, backup[15]); b43_calc_nrssi_slope() 703 b43_phy_write(dev, 0x0014, backup[16]); b43_calc_nrssi_slope() 704 b43_phy_write(dev, 0x0478, backup[17]); b43_calc_nrssi_slope() 706 b43_nrssi_mem_update(dev); b43_calc_nrssi_slope() 707 b43_calc_nrssi_threshold(dev); b43_calc_nrssi_slope() 710 static void b43_calc_nrssi_threshold(struct b43_wldev dev) b43_calc_nrssi_threshold() argument 712 struct b43_phy phy = &dev->phy; b43_calc_nrssi_threshold() 721 !(dev->dev->bus_sprom->boardflags_lo & B43_BFL_RSSI)) { b43_calc_nrssi_threshold() 722 tmp16 = b43_nrssi_hw_read(dev, 0x20); b43_calc_nrssi_threshold() 726 b43_phy_maskset(dev, 0x048A, 0xF000, 0x09EB); b43_calc_nrssi_threshold() 728 b43_phy_maskset(dev, 0x048A, 0xF000, 0x0AED); b43_calc_nrssi_threshold() 760 tmp_u16 = b43_phy_read(dev, 0x048A) & 0xF000; b43_calc_nrssi_threshold() 763 b43_phy_write(dev, 0x048A, tmp_u16); b43_calc_nrssi_threshold() 806 b43_phy_read(dev, (offset))); \ 810 b43_phy_write(dev, (offset), \ 817 b43_radio_read16(dev, (offset))); \ 821 b43_radio_write16(dev, (offset), \ 828 b43_ofdmtab_read16(dev, (table), (offset))); \ 832 b43_ofdmtab_write16(dev, (table), (offset), \ 838 b43_radio_interference_mitigation_enable(struct b43_wldev dev, int mode) b43_radio_interference_mitigation_enable() argument 840 struct b43_phy phy = &dev->phy; b43_radio_interference_mitigation_enable() 849 b43_phy_set(dev, 0x042B, 0x0800); b43_radio_interference_mitigation_enable() 850 b43_phy_mask(dev, B43_PHY_G_CRS, ~0x4000); b43_radio_interference_mitigation_enable() 854 tmp = (b43_radio_read16(dev, 0x0078) & 0x001E); b43_radio_interference_mitigation_enable() 862 b43_radio_write16(dev, 0x0078, flipped); b43_radio_interference_mitigation_enable() 864 b43_calc_nrssi_threshold(dev); b43_radio_interference_mitigation_enable() 867 b43_phy_write(dev, 0x0406, 0x7E28); b43_radio_interference_mitigation_enable() 869 b43_phy_set(dev, 0x042B, 0x0800); b43_radio_interference_mitigation_enable() 870 b43_phy_set(dev, B43_PHY_RADIO_BITFIELD, 0x1000); b43_radio_interference_mitigation_enable() 873 b43_phy_maskset(dev, 0x04A0, 0xC0C0, 0x0008); b43_radio_interference_mitigation_enable() 875 b43_phy_maskset(dev, 0x04A1, 0xC0C0, 0x0605); b43_radio_interference_mitigation_enable() 877 b43_phy_maskset(dev, 0x04A2, 0xC0C0, 0x0204); b43_radio_interference_mitigation_enable() 879 b43_phy_maskset(dev, 0x04A8, 0xC0C0, 0x0803); b43_radio_interference_mitigation_enable() 881 b43_phy_maskset(dev, 0x04AB, 0xC0C0, 0x0605); b43_radio_interference_mitigation_enable() 884 b43_phy_write(dev, 0x04A7, 0x0002); b43_radio_interference_mitigation_enable() 886 b43_phy_write(dev, 0x04A3, 0x287A); b43_radio_interference_mitigation_enable() 888 b43_phy_write(dev, 0x04A9, 0x2027); b43_radio_interference_mitigation_enable() 890 b43_phy_write(dev, 0x0493, 0x32F5); b43_radio_interference_mitigation_enable() 892 b43_phy_write(dev, 0x04AA, 0x2027); b43_radio_interference_mitigation_enable() 894 b43_phy_write(dev, 0x04AC, 0x32F5); b43_radio_interference_mitigation_enable() 897 if (b43_phy_read(dev, 0x0033) & 0x0800) b43_radio_interference_mitigation_enable() 937 b43_phy_mask(dev, B43_PHY_RADIO_BITFIELD, ~0x1000); b43_radio_interference_mitigation_enable() 938 b43_phy_maskset(dev, B43_PHY_G_CRS, 0xFFFC, 0x0002); b43_radio_interference_mitigation_enable() 940 b43_phy_write(dev, 0x0033, 0x0800); b43_radio_interference_mitigation_enable() 941 b43_phy_write(dev, 0x04A3, 0x2027); b43_radio_interference_mitigation_enable() 942 b43_phy_write(dev, 0x04A9, 0x1CA8); b43_radio_interference_mitigation_enable() 943 b43_phy_write(dev, 0x0493, 0x287A); b43_radio_interference_mitigation_enable() 944 b43_phy_write(dev, 0x04AA, 0x1CA8); b43_radio_interference_mitigation_enable() 945 b43_phy_write(dev, 0x04AC, 0x287A); b43_radio_interference_mitigation_enable() 947 b43_phy_maskset(dev, 0x04A0, 0xFFC0, 0x001A); b43_radio_interference_mitigation_enable() 948 b43_phy_write(dev, 0x04A7, 0x000D); b43_radio_interference_mitigation_enable() 951 b43_phy_write(dev, 0x0406, 0xFF0D); b43_radio_interference_mitigation_enable() 953 b43_phy_write(dev, 0x04C0, 0xFFFF); b43_radio_interference_mitigation_enable() 954 b43_phy_write(dev, 0x04C1, 0x00A9); b43_radio_interference_mitigation_enable() 956 b43_phy_write(dev, 0x04C0, 0x00C1); b43_radio_interference_mitigation_enable() 957 b43_phy_write(dev, 0x04C1, 0x0059); b43_radio_interference_mitigation_enable() 960 b43_phy_maskset(dev, 0x04A1, 0xC0FF, 0x1800); b43_radio_interference_mitigation_enable() 961 b43_phy_maskset(dev, 0x04A1, 0xFFC0, 0x0015); b43_radio_interference_mitigation_enable() 962 b43_phy_maskset(dev, 0x04A8, 0xCFFF, 0x1000); b43_radio_interference_mitigation_enable() 963 b43_phy_maskset(dev, 0x04A8, 0xF0FF, 0x0A00); b43_radio_interference_mitigation_enable() 964 b43_phy_maskset(dev, 0x04AB, 0xCFFF, 0x1000); b43_radio_interference_mitigation_enable() 965 b43_phy_maskset(dev, 0x04AB, 0xF0FF, 0x0800); b43_radio_interference_mitigation_enable() 966 b43_phy_maskset(dev, 0x04AB, 0xFFCF, 0x0010); b43_radio_interference_mitigation_enable() 967 b43_phy_maskset(dev, 0x04AB, 0xFFF0, 0x0005); b43_radio_interference_mitigation_enable() 968 b43_phy_maskset(dev, 0x04A8, 0xFFCF, 0x0010); b43_radio_interference_mitigation_enable() 969 b43_phy_maskset(dev, 0x04A8, 0xFFF0, 0x0006); b43_radio_interference_mitigation_enable() 970 b43_phy_maskset(dev, 0x04A2, 0xF0FF, 0x0800); b43_radio_interference_mitigation_enable() 971 b43_phy_maskset(dev, 0x04A0, 0xF0FF, 0x0500); b43_radio_interference_mitigation_enable() 972 b43_phy_maskset(dev, 0x04A2, 0xFFF0, 0x000B); b43_radio_interference_mitigation_enable() 975 b43_phy_mask(dev, 0x048A, 0x7FFF); b43_radio_interference_mitigation_enable() 976 b43_phy_maskset(dev, 0x0415, 0x8000, 0x36D8); b43_radio_interference_mitigation_enable() 977 b43_phy_maskset(dev, 0x0416, 0x8000, 0x36D8); b43_radio_interference_mitigation_enable() 978 b43_phy_maskset(dev, 0x0417, 0xFE00, 0x016D); b43_radio_interference_mitigation_enable() 980 b43_phy_set(dev, 0x048A, 0x1000); b43_radio_interference_mitigation_enable() 981 b43_phy_maskset(dev, 0x048A, 0x9FFF, 0x2000); b43_radio_interference_mitigation_enable() 982 b43_hf_write(dev, b43_hf_read(dev) \| B43_HF_ACIW); b43_radio_interference_mitigation_enable() 985 b43_phy_set(dev, 0x042B, 0x0800); b43_radio_interference_mitigation_enable() 987 b43_phy_maskset(dev, 0x048C, 0xF0FF, 0x0200); b43_radio_interference_mitigation_enable() 989 b43_phy_maskset(dev, 0x04AE, 0xFF00, 0x007F); b43_radio_interference_mitigation_enable() 990 b43_phy_maskset(dev, 0x04AD, 0x00FF, 0x1300); b43_radio_interference_mitigation_enable() 992 b43_ofdmtab_write16(dev, 0x1A00, 0x3, 0x007F); b43_radio_interference_mitigation_enable() 993 b43_ofdmtab_write16(dev, 0x1A00, 0x2, 0x007F); b43_radio_interference_mitigation_enable() 994 b43_phy_mask(dev, 0x04AD, 0x00FF); b43_radio_interference_mitigation_enable() 996 b43_calc_nrssi_slope(dev); b43_radio_interference_mitigation_enable() 1004 b43_radio_interference_mitigation_disable(struct b43_wldev dev, int mode) b43_radio_interference_mitigation_disable() argument 1006 struct b43_phy phy = &dev->phy; b43_radio_interference_mitigation_disable() 1013 b43_phy_mask(dev, 0x042B, ~0x0800); b43_radio_interference_mitigation_disable() 1014 b43_phy_set(dev, B43_PHY_G_CRS, 0x4000); b43_radio_interference_mitigation_disable() 1018 b43_calc_nrssi_threshold(dev); b43_radio_interference_mitigation_disable() 1020 b43_phy_mask(dev, 0x042B, ~0x0800); b43_radio_interference_mitigation_disable() 1021 if (!dev->bad_frames_preempt) { b43_radio_interference_mitigation_disable() 1022 b43_phy_mask(dev, B43_PHY_RADIO_BITFIELD, ~(1 << 11)); b43_radio_interference_mitigation_disable() 1024 b43_phy_set(dev, B43_PHY_G_CRS, 0x4000); b43_radio_interference_mitigation_disable() 1038 if (!(b43_phy_read(dev, 0x0033) & 0x0800)) b43_radio_interference_mitigation_disable() 1076 b43_hf_write(dev, b43_hf_read(dev) & ~B43_HF_ACIW); b43_radio_interference_mitigation_disable() 1077 b43_calc_nrssi_slope(dev); b43_radio_interference_mitigation_disable() 1091 static u16 b43_radio_core_calibration_value(struct b43_wldev dev) b43_radio_core_calibration_value() argument 1102 reg = b43_radio_read16(dev, 0x60); b43_radio_core_calibration_value() 1112 static u16 radio2050_rfover_val(struct b43_wldev dev, radio2050_rfover_val() argument 1115 struct b43_phy phy = &dev->phy; radio2050_rfover_val() 1117 struct ssb_sprom sprom = dev->dev->bus_sprom; radio2050_rfover_val() 1257 static u16 b43_radio_init2050(struct b43_wldev dev) b43_radio_init2050() argument 1259 struct b43_phy phy = &dev->phy; b43_radio_init2050() 1269 sav.radio_43 = b43_radio_read16(dev, 0x43); b43_radio_init2050() 1270 sav.radio_51 = b43_radio_read16(dev, 0x51); b43_radio_init2050() 1271 sav.radio_52 = b43_radio_read16(dev, 0x52); b43_radio_init2050() 1272 sav.phy_pgactl = b43_phy_read(dev, B43_PHY_PGACTL); b43_radio_init2050() 1273 sav.phy_cck_5A = b43_phy_read(dev, B43_PHY_CCK(0x5A)); b43_radio_init2050() 1274 sav.phy_cck_59 = b43_phy_read(dev, B43_PHY_CCK(0x59)); b43_radio_init2050() 1275 sav.phy_cck_58 = b43_phy_read(dev, B43_PHY_CCK(0x58)); b43_radio_init2050() 1278 sav.phy_cck_30 = b43_phy_read(dev, B43_PHY_CCK(0x30)); b43_radio_init2050() 1279 sav.reg_3EC = b43_read16(dev, 0x3EC); b43_radio_init2050() 1281 b43_phy_write(dev, B43_PHY_CCK(0x30), 0xFF); b43_radio_init2050() 1282 b43_write16(dev, 0x3EC, 0x3F3F); b43_radio_init2050() 1284 sav.phy_rfover = b43_phy_read(dev, B43_PHY_RFOVER); b43_radio_init2050() 1285 sav.phy_rfoverval = b43_phy_read(dev, B43_PHY_RFOVERVAL); b43_radio_init2050() 1286 sav.phy_analogover = b43_phy_read(dev, B43_PHY_ANALOGOVER); b43_radio_init2050() 1288 b43_phy_read(dev, B43_PHY_ANALOGOVERVAL); b43_radio_init2050() 1289 sav.phy_crs0 = b43_phy_read(dev, B43_PHY_CRS0); b43_radio_init2050() 1290 sav.phy_classctl = b43_phy_read(dev, B43_PHY_CLASSCTL); b43_radio_init2050() 1292 b43_phy_set(dev, B43_PHY_ANALOGOVER, 0x0003); b43_radio_init2050() 1293 b43_phy_mask(dev, B43_PHY_ANALOGOVERVAL, 0xFFFC); b43_radio_init2050() 1294 b43_phy_mask(dev, B43_PHY_CRS0, 0x7FFF); b43_radio_init2050() 1295 b43_phy_mask(dev, B43_PHY_CLASSCTL, 0xFFFC); b43_radio_init2050() 1297 sav.phy_lo_mask = b43_phy_read(dev, B43_PHY_LO_MASK); b43_radio_init2050() 1298 sav.phy_lo_ctl = b43_phy_read(dev, B43_PHY_LO_CTL); b43_radio_init2050() 1301 b43_phy_write(dev, B43_PHY_LO_MASK, 0xC020); b43_radio_init2050() 1303 b43_phy_write(dev, B43_PHY_LO_MASK, 0x8020); b43_radio_init2050() 1304 b43_phy_write(dev, B43_PHY_LO_CTL, 0); b43_radio_init2050() 1307 b43_phy_write(dev, B43_PHY_RFOVERVAL, b43_radio_init2050() 1308 radio2050_rfover_val(dev, B43_PHY_RFOVERVAL, b43_radio_init2050() 1310 b43_phy_write(dev, B43_PHY_RFOVER, b43_radio_init2050() 1311 radio2050_rfover_val(dev, B43_PHY_RFOVER, 0)); b43_radio_init2050() 1313 b43_write16(dev, 0x3E2, b43_read16(dev, 0x3E2) \| 0x8000); b43_radio_init2050() 1315 sav.phy_syncctl = b43_phy_read(dev, B43_PHY_SYNCCTL); b43_radio_init2050() 1316 b43_phy_mask(dev, B43_PHY_SYNCCTL, 0xFF7F); b43_radio_init2050() 1317 sav.reg_3E6 = b43_read16(dev, 0x3E6); b43_radio_init2050() 1318 sav.reg_3F4 = b43_read16(dev, 0x3F4); b43_radio_init2050() 1321 b43_write16(dev, 0x03E6, 0x0122); b43_radio_init2050() 1324 b43_phy_maskset(dev, B43_PHY_CCK(0x03), 0xFFBF, 0x40); b43_radio_init2050() 1326 b43_write16(dev, B43_MMIO_CHANNEL_EXT, b43_radio_init2050() 1327 (b43_read16(dev, B43_MMIO_CHANNEL_EXT) \| 0x2000)); b43_radio_init2050() 1330 rcc = b43_radio_core_calibration_value(dev); b43_radio_init2050() 1333 b43_radio_write16(dev, 0x78, 0x26); b43_radio_init2050() 1335 b43_phy_write(dev, B43_PHY_RFOVERVAL, b43_radio_init2050() 1336 radio2050_rfover_val(dev, B43_PHY_RFOVERVAL, b43_radio_init2050() 1339 b43_phy_write(dev, B43_PHY_PGACTL, 0xBFAF); b43_radio_init2050() 1340 b43_phy_write(dev, B43_PHY_CCK(0x2B), 0x1403); b43_radio_init2050() 1342 b43_phy_write(dev, B43_PHY_RFOVERVAL, b43_radio_init2050() 1343 radio2050_rfover_val(dev, B43_PHY_RFOVERVAL, b43_radio_init2050() 1346 b43_phy_write(dev, B43_PHY_PGACTL, 0xBFA0); b43_radio_init2050() 1347 b43_radio_set(dev, 0x51, 0x0004); b43_radio_init2050() 1349 b43_radio_write16(dev, 0x43, 0x1F); b43_radio_init2050() 1351 b43_radio_write16(dev, 0x52, 0); b43_radio_init2050() 1352 b43_radio_maskset(dev, 0x43, 0xFFF0, 0x0009); b43_radio_init2050() 1354 b43_phy_write(dev, B43_PHY_CCK(0x58), 0); b43_radio_init2050() 1357 b43_phy_write(dev, B43_PHY_CCK(0x5A), 0x0480); b43_radio_init2050() 1358 b43_phy_write(dev, B43_PHY_CCK(0x59), 0xC810); b43_radio_init2050() 1359 b43_phy_write(dev, B43_PHY_CCK(0x58), 0x000D); b43_radio_init2050() 1361 b43_phy_write(dev, B43_PHY_RFOVERVAL, b43_radio_init2050() 1362 radio2050_rfover_val(dev, b43_radio_init2050() 1366 b43_phy_write(dev, B43_PHY_PGACTL, 0xAFB0); b43_radio_init2050() 1369 b43_phy_write(dev, B43_PHY_RFOVERVAL, b43_radio_init2050() 1370 radio2050_rfover_val(dev, b43_radio_init2050() 1374 b43_phy_write(dev, B43_PHY_PGACTL, 0xEFB0); b43_radio_init2050() 1377 b43_phy_write(dev, B43_PHY_RFOVERVAL, b43_radio_init2050() 1378 radio2050_rfover_val(dev, b43_radio_init2050() 1382 b43_phy_write(dev, B43_PHY_PGACTL, 0xFFF0); b43_radio_init2050() 1384 tmp1 += b43_phy_read(dev, B43_PHY_LO_LEAKAGE); b43_radio_init2050() 1385 b43_phy_write(dev, B43_PHY_CCK(0x58), 0); b43_radio_init2050() 1387 b43_phy_write(dev, B43_PHY_RFOVERVAL, b43_radio_init2050() 1388 radio2050_rfover_val(dev, b43_radio_init2050() 1392 b43_phy_write(dev, B43_PHY_PGACTL, 0xAFB0); b43_radio_init2050() 1396 b43_phy_write(dev, B43_PHY_CCK(0x58), 0); b43_radio_init2050() 1402 b43_radio_write16(dev, 0x78, radio78); b43_radio_init2050() 1405 b43_phy_write(dev, B43_PHY_CCK(0x5A), 0x0D80); b43_radio_init2050() 1406 b43_phy_write(dev, B43_PHY_CCK(0x59), 0xC810); b43_radio_init2050() 1407 b43_phy_write(dev, B43_PHY_CCK(0x58), 0x000D); b43_radio_init2050() 1409 b43_phy_write(dev, B43_PHY_RFOVERVAL, b43_radio_init2050() 1410 radio2050_rfover_val(dev, b43_radio_init2050() 1415 b43_phy_write(dev, B43_PHY_PGACTL, 0xAFB0); b43_radio_init2050() 1418 b43_phy_write(dev, B43_PHY_RFOVERVAL, b43_radio_init2050() 1419 radio2050_rfover_val(dev, b43_radio_init2050() 1424 b43_phy_write(dev, B43_PHY_PGACTL, 0xEFB0); b43_radio_init2050() 1427 b43_phy_write(dev, B43_PHY_RFOVERVAL, b43_radio_init2050() 1428 radio2050_rfover_val(dev, b43_radio_init2050() 1433 b43_phy_write(dev, B43_PHY_PGACTL, 0xFFF0); b43_radio_init2050() 1435 tmp2 += b43_phy_read(dev, B43_PHY_LO_LEAKAGE); b43_radio_init2050() 1436 b43_phy_write(dev, B43_PHY_CCK(0x58), 0); b43_radio_init2050() 1438 b43_phy_write(dev, B43_PHY_RFOVERVAL, b43_radio_init2050() 1439 radio2050_rfover_val(dev, b43_radio_init2050() 1444 b43_phy_write(dev, B43_PHY_PGACTL, 0xAFB0); b43_radio_init2050() 1453 b43_phy_write(dev, B43_PHY_PGACTL, sav.phy_pgactl); b43_radio_init2050() 1454 b43_radio_write16(dev, 0x51, sav.radio_51); b43_radio_init2050() 1455 b43_radio_write16(dev, 0x52, sav.radio_52); b43_radio_init2050() 1456 b43_radio_write16(dev, 0x43, sav.radio_43); b43_radio_init2050() 1457 b43_phy_write(dev, B43_PHY_CCK(0x5A), sav.phy_cck_5A); b43_radio_init2050() 1458 b43_phy_write(dev, B43_PHY_CCK(0x59), sav.phy_cck_59); b43_radio_init2050() 1459 b43_phy_write(dev, B43_PHY_CCK(0x58), sav.phy_cck_58); b43_radio_init2050() 1460 b43_write16(dev, 0x3E6, sav.reg_3E6); b43_radio_init2050() 1462 b43_write16(dev, 0x3F4, sav.reg_3F4); b43_radio_init2050() 1463 b43_phy_write(dev, B43_PHY_SYNCCTL, sav.phy_syncctl); b43_radio_init2050() 1464 b43_synth_pu_workaround(dev, phy->channel); b43_radio_init2050() 1466 b43_phy_write(dev, B43_PHY_CCK(0x30), sav.phy_cck_30); b43_radio_init2050() 1467 b43_write16(dev, 0x3EC, sav.reg_3EC); b43_radio_init2050() 1469 b43_write16(dev, B43_MMIO_PHY_RADIO, b43_radio_init2050() 1470 b43_read16(dev, B43_MMIO_PHY_RADIO) b43_radio_init2050() 1472 b43_phy_write(dev, B43_PHY_RFOVER, sav.phy_rfover); b43_radio_init2050() 1473 b43_phy_write(dev, B43_PHY_RFOVERVAL, sav.phy_rfoverval); b43_radio_init2050() 1474 b43_phy_write(dev, B43_PHY_ANALOGOVER, sav.phy_analogover); b43_radio_init2050() 1475 b43_phy_write(dev, B43_PHY_ANALOGOVERVAL, b43_radio_init2050() 1477 b43_phy_write(dev, B43_PHY_CRS0, sav.phy_crs0); b43_radio_init2050() 1478 b43_phy_write(dev, B43_PHY_CLASSCTL, sav.phy_classctl); b43_radio_init2050() 1480 b43_phy_write(dev, B43_PHY_LO_MASK, sav.phy_lo_mask); b43_radio_init2050() 1481 b43_phy_write(dev, B43_PHY_LO_CTL, sav.phy_lo_ctl); b43_radio_init2050() 1492 static void b43_phy_initb5(struct b43_wldev dev) b43_phy_initb5() argument 1494 struct b43_phy phy = &dev->phy; b43_phy_initb5() 1500 b43_radio_set(dev, 0x007A, 0x0050); b43_phy_initb5() 1502 if ((dev->dev->board_vendor != SSB_BOARDVENDOR_BCM) && b43_phy_initb5() 1503 (dev->dev->board_type != SSB_BOARD_BU4306)) { b43_phy_initb5() 1506 b43_phy_write(dev, offset, value); b43_phy_initb5() 1510 b43_phy_maskset(dev, 0x0035, 0xF0FF, 0x0700); b43_phy_initb5() 1512 b43_phy_write(dev, 0x0038, 0x0667); b43_phy_initb5() 1516 b43_radio_set(dev, 0x007A, 0x0020); b43_phy_initb5() 1517 b43_radio_set(dev, 0x0051, 0x0004); b43_phy_initb5() 1519 b43_write16(dev, B43_MMIO_PHY_RADIO, 0x0000); b43_phy_initb5() 1521 b43_phy_set(dev, 0x0802, 0x0100); b43_phy_initb5() 1522 b43_phy_set(dev, 0x042B, 0x2000); b43_phy_initb5() 1524 b43_phy_write(dev, 0x001C, 0x186A); b43_phy_initb5() 1526 b43_phy_maskset(dev, 0x0013, 0x00FF, 0x1900); b43_phy_initb5() 1527 b43_phy_maskset(dev, 0x0035, 0xFFC0, 0x0064); b43_phy_initb5() 1528 b43_phy_maskset(dev, 0x005D, 0xFF80, 0x000A); b43_phy_initb5() 1531 if (dev->bad_frames_preempt) { b43_phy_initb5() 1532 b43_phy_set(dev, B43_PHY_RADIO_BITFIELD, (1 << 11)); b43_phy_initb5() 1536 b43_phy_write(dev, 0x0026, 0xCE00); b43_phy_initb5() 1537 b43_phy_write(dev, 0x0021, 0x3763); b43_phy_initb5() 1538 b43_phy_write(dev, 0x0022, 0x1BC3); b43_phy_initb5() 1539 b43_phy_write(dev, 0x0023, 0x06F9); b43_phy_initb5() 1540 b43_phy_write(dev, 0x0024, 0x037E); b43_phy_initb5() 1542 b43_phy_write(dev, 0x0026, 0xCC00); b43_phy_initb5() 1543 b43_phy_write(dev, 0x0030, 0x00C6); b43_phy_initb5() 1544 b43_write16(dev, 0x03EC, 0x3F22); b43_phy_initb5() 1547 b43_phy_write(dev, 0x0020, 0x3E1C); b43_phy_initb5() 1549 b43_phy_write(dev, 0x0020, 0x301C); b43_phy_initb5() 1552 b43_write16(dev, 0x03E4, 0x3000); b43_phy_initb5() 1556 b43_gphy_channel_switch(dev, 7, 0); b43_phy_initb5() 1559 b43_radio_write16(dev, 0x0075, 0x0080); b43_phy_initb5() 1560 b43_radio_write16(dev, 0x0079, 0x0081); b43_phy_initb5() 1563 b43_radio_write16(dev, 0x0050, 0x0020); b43_phy_initb5() 1564 b43_radio_write16(dev, 0x0050, 0x0023); b43_phy_initb5() 1567 b43_radio_write16(dev, 0x0050, 0x0020); b43_phy_initb5() 1568 b43_radio_write16(dev, 0x005A, 0x0070); b43_phy_initb5() 1571 b43_radio_write16(dev, 0x005B, 0x007B); b43_phy_initb5() 1572 b43_radio_write16(dev, 0x005C, 0x00B0); b43_phy_initb5() 1574 b43_radio_set(dev, 0x007A, 0x0007); b43_phy_initb5() 1576 b43_gphy_channel_switch(dev, old_channel, 0); b43_phy_initb5() 1578 b43_phy_write(dev, 0x0014, 0x0080); b43_phy_initb5() 1579 b43_phy_write(dev, 0x0032, 0x00CA); b43_phy_initb5() 1580 b43_phy_write(dev, 0x002A, 0x88A3); b43_phy_initb5() 1582 b43_set_txpower_g(dev, &gphy->bbatt, &gphy->rfatt, gphy->tx_control); b43_phy_initb5() 1585 b43_radio_write16(dev, 0x005D, 0x000D); b43_phy_initb5() 1587 b43_write16(dev, 0x03E4, (b43_read16(dev, 0x03E4) & 0xFFC0) \| 0x0004); b43_phy_initb5() 1591 static void b43_phy_initb6(struct b43_wldev dev) b43_phy_initb6() argument 1593 struct b43_phy phy = &dev->phy; b43_phy_initb6() 1598 b43_phy_write(dev, 0x003E, 0x817A); b43_phy_initb6() 1599 b43_radio_write16(dev, 0x007A, b43_phy_initb6() 1600 (b43_radio_read16(dev, 0x007A) \| 0x0058)); b43_phy_initb6() 1602 b43_radio_write16(dev, 0x51, 0x37); b43_phy_initb6() 1603 b43_radio_write16(dev, 0x52, 0x70); b43_phy_initb6() 1604 b43_radio_write16(dev, 0x53, 0xB3); b43_phy_initb6() 1605 b43_radio_write16(dev, 0x54, 0x9B); b43_phy_initb6() 1606 b43_radio_write16(dev, 0x5A, 0x88); b43_phy_initb6() 1607 b43_radio_write16(dev, 0x5B, 0x88); b43_phy_initb6() 1608 b43_radio_write16(dev, 0x5D, 0x88); b43_phy_initb6() 1609 b43_radio_write16(dev, 0x5E, 0x88); b43_phy_initb6() 1610 b43_radio_write16(dev, 0x7D, 0x88); b43_phy_initb6() 1611 b43_hf_write(dev, b43_hf_read(dev) b43_phy_initb6() 1616 b43_radio_write16(dev, 0x51, 0); b43_phy_initb6() 1617 b43_radio_write16(dev, 0x52, 0x40); b43_phy_initb6() 1618 b43_radio_write16(dev, 0x53, 0xB7); b43_phy_initb6() 1619 b43_radio_write16(dev, 0x54, 0x98); b43_phy_initb6() 1620 b43_radio_write16(dev, 0x5A, 0x88); b43_phy_initb6() 1621 b43_radio_write16(dev, 0x5B, 0x6B); b43_phy_initb6() 1622 b43_radio_write16(dev, 0x5C, 0x0F); b43_phy_initb6() 1623 if (dev->dev->bus_sprom->boardflags_lo & B43_BFL_ALTIQ) { b43_phy_initb6() 1624 b43_radio_write16(dev, 0x5D, 0xFA); b43_phy_initb6() 1625 b43_radio_write16(dev, 0x5E, 0xD8); b43_phy_initb6() 1627 b43_radio_write16(dev, 0x5D, 0xF5); b43_phy_initb6() 1628 b43_radio_write16(dev, 0x5E, 0xB8); b43_phy_initb6() 1630 b43_radio_write16(dev, 0x0073, 0x0003); b43_phy_initb6() 1631 b43_radio_write16(dev, 0x007D, 0x00A8); b43_phy_initb6() 1632 b43_radio_write16(dev, 0x007C, 0x0001); b43_phy_initb6() 1633 b43_radio_write16(dev, 0x007E, 0x0008); b43_phy_initb6() 1637 b43_phy_write(dev, offset, val); b43_phy_initb6() 1642 b43_phy_write(dev, offset, val); b43_phy_initb6() 1647 b43_phy_write(dev, offset, (val & 0x3F3F)); b43_phy_initb6() 1651 b43_radio_set(dev, 0x007A, 0x0020); b43_phy_initb6() 1652 b43_radio_set(dev, 0x0051, 0x0004); b43_phy_initb6() 1653 b43_phy_set(dev, 0x0802, 0x0100); b43_phy_initb6() 1654 b43_phy_set(dev, 0x042B, 0x2000); b43_phy_initb6() 1655 b43_phy_write(dev, 0x5B, 0); b43_phy_initb6() 1656 b43_phy_write(dev, 0x5C, 0); b43_phy_initb6() 1661 b43_gphy_channel_switch(dev, 1, 0); b43_phy_initb6() 1663 b43_gphy_channel_switch(dev, 13, 0); b43_phy_initb6() 1665 b43_radio_write16(dev, 0x0050, 0x0020); b43_phy_initb6() 1666 b43_radio_write16(dev, 0x0050, 0x0023); b43_phy_initb6() 1669 b43_radio_write16(dev, 0x7C, (b43_radio_read16(dev, 0x7C) b43_phy_initb6() 1671 b43_radio_write16(dev, 0x50, 0x20); b43_phy_initb6() 1674 b43_radio_write16(dev, 0x50, 0x20); b43_phy_initb6() 1675 b43_radio_write16(dev, 0x5A, 0x70); b43_phy_initb6() 1676 b43_radio_write16(dev, 0x5B, 0x7B); b43_phy_initb6() 1677 b43_radio_write16(dev, 0x5C, 0xB0); b43_phy_initb6() 1679 b43_radio_maskset(dev, 0x007A, 0x00F8, 0x0007); b43_phy_initb6() 1681 b43_gphy_channel_switch(dev, old_channel, 0); b43_phy_initb6() 1683 b43_phy_write(dev, 0x0014, 0x0200); b43_phy_initb6() 1685 b43_phy_write(dev, 0x2A, 0x88C2); b43_phy_initb6() 1687 b43_phy_write(dev, 0x2A, 0x8AC0); b43_phy_initb6() 1688 b43_phy_write(dev, 0x0038, 0x0668); b43_phy_initb6() 1689 b43_set_txpower_g(dev, &gphy->bbatt, &gphy->rfatt, gphy->tx_control); b43_phy_initb6() 1691 b43_phy_maskset(dev, 0x5D, 0xFF80, 0x0003); b43_phy_initb6() 1693 b43_radio_write16(dev, 0x005D, 0x000D); b43_phy_initb6() 1696 b43_write16(dev, 0x3E4, 9); b43_phy_initb6() 1697 b43_phy_mask(dev, 0x61, 0x0FFF); b43_phy_initb6() 1699 b43_phy_maskset(dev, 0x0002, 0xFFC0, 0x0004); b43_phy_initb6() 1704 b43_write16(dev, 0x03E6, 0x0); b43_phy_initb6() 1707 static void b43_calc_loopback_gain(struct b43_wldev dev) b43_calc_loopback_gain() argument 1709 struct b43_phy phy = &dev->phy; b43_calc_loopback_gain() 1718 backup_phy[0] = b43_phy_read(dev, B43_PHY_CRS0); b43_calc_loopback_gain() 1719 backup_phy[1] = b43_phy_read(dev, B43_PHY_CCKBBANDCFG); b43_calc_loopback_gain() 1720 backup_phy[2] = b43_phy_read(dev, B43_PHY_RFOVER); b43_calc_loopback_gain() 1721 backup_phy[3] = b43_phy_read(dev, B43_PHY_RFOVERVAL); b43_calc_loopback_gain() 1723 backup_phy[4] = b43_phy_read(dev, B43_PHY_ANALOGOVER); b43_calc_loopback_gain() 1724 backup_phy[5] = b43_phy_read(dev, B43_PHY_ANALOGOVERVAL); b43_calc_loopback_gain() 1726 backup_phy[6] = b43_phy_read(dev, B43_PHY_CCK(0x5A)); b43_calc_loopback_gain() 1727 backup_phy[7] = b43_phy_read(dev, B43_PHY_CCK(0x59)); b43_calc_loopback_gain() 1728 backup_phy[8] = b43_phy_read(dev, B43_PHY_CCK(0x58)); b43_calc_loopback_gain() 1729 backup_phy[9] = b43_phy_read(dev, B43_PHY_CCK(0x0A)); b43_calc_loopback_gain() 1730 backup_phy[10] = b43_phy_read(dev, B43_PHY_CCK(0x03)); b43_calc_loopback_gain() 1731 backup_phy[11] = b43_phy_read(dev, B43_PHY_LO_MASK); b43_calc_loopback_gain() 1732 backup_phy[12] = b43_phy_read(dev, B43_PHY_LO_CTL); b43_calc_loopback_gain() 1733 backup_phy[13] = b43_phy_read(dev, B43_PHY_CCK(0x2B)); b43_calc_loopback_gain() 1734 backup_phy[14] = b43_phy_read(dev, B43_PHY_PGACTL); b43_calc_loopback_gain() 1735 backup_phy[15] = b43_phy_read(dev, B43_PHY_LO_LEAKAGE); b43_calc_loopback_gain() 1737 backup_radio[0] = b43_radio_read16(dev, 0x52); b43_calc_loopback_gain() 1738 backup_radio[1] = b43_radio_read16(dev, 0x43); b43_calc_loopback_gain() 1739 backup_radio[2] = b43_radio_read16(dev, 0x7A); b43_calc_loopback_gain() 1741 b43_phy_mask(dev, B43_PHY_CRS0, 0x3FFF); b43_calc_loopback_gain() 1742 b43_phy_set(dev, B43_PHY_CCKBBANDCFG, 0x8000); b43_calc_loopback_gain() 1743 b43_phy_set(dev, B43_PHY_RFOVER, 0x0002); b43_calc_loopback_gain() 1744 b43_phy_mask(dev, B43_PHY_RFOVERVAL, 0xFFFD); b43_calc_loopback_gain() 1745 b43_phy_set(dev, B43_PHY_RFOVER, 0x0001); b43_calc_loopback_gain() 1746 b43_phy_mask(dev, B43_PHY_RFOVERVAL, 0xFFFE); b43_calc_loopback_gain() 1748 b43_phy_set(dev, B43_PHY_ANALOGOVER, 0x0001); b43_calc_loopback_gain() 1749 b43_phy_mask(dev, B43_PHY_ANALOGOVERVAL, 0xFFFE); b43_calc_loopback_gain() 1750 b43_phy_set(dev, B43_PHY_ANALOGOVER, 0x0002); b43_calc_loopback_gain() 1751 b43_phy_mask(dev, B43_PHY_ANALOGOVERVAL, 0xFFFD); b43_calc_loopback_gain() 1753 b43_phy_set(dev, B43_PHY_RFOVER, 0x000C); b43_calc_loopback_gain() 1754 b43_phy_set(dev, B43_PHY_RFOVERVAL, 0x000C); b43_calc_loopback_gain() 1755 b43_phy_set(dev, B43_PHY_RFOVER, 0x0030); b43_calc_loopback_gain() 1756 b43_phy_maskset(dev, B43_PHY_RFOVERVAL, 0xFFCF, 0x10); b43_calc_loopback_gain() 1758 b43_phy_write(dev, B43_PHY_CCK(0x5A), 0x0780); b43_calc_loopback_gain() 1759 b43_phy_write(dev, B43_PHY_CCK(0x59), 0xC810); b43_calc_loopback_gain() 1760 b43_phy_write(dev, B43_PHY_CCK(0x58), 0x000D); b43_calc_loopback_gain() 1762 b43_phy_set(dev, B43_PHY_CCK(0x0A), 0x2000); b43_calc_loopback_gain() 1764 b43_phy_set(dev, B43_PHY_ANALOGOVER, 0x0004); b43_calc_loopback_gain() 1765 b43_phy_mask(dev, B43_PHY_ANALOGOVERVAL, 0xFFFB); b43_calc_loopback_gain() 1767 b43_phy_maskset(dev, B43_PHY_CCK(0x03), 0xFF9F, 0x40); b43_calc_loopback_gain() 1770 b43_radio_write16(dev, 0x43, 0x000F); b43_calc_loopback_gain() 1772 b43_radio_write16(dev, 0x52, 0); b43_calc_loopback_gain() 1773 b43_radio_maskset(dev, 0x43, 0xFFF0, 0x9); b43_calc_loopback_gain() 1775 b43_gphy_set_baseband_attenuation(dev, 11); b43_calc_loopback_gain() 1778 b43_phy_write(dev, B43_PHY_LO_MASK, 0xC020); b43_calc_loopback_gain() 1780 b43_phy_write(dev, B43_PHY_LO_MASK, 0x8020); b43_calc_loopback_gain() 1781 b43_phy_write(dev, B43_PHY_LO_CTL, 0); b43_calc_loopback_gain() 1783 b43_phy_maskset(dev, B43_PHY_CCK(0x2B), 0xFFC0, 0x01); b43_calc_loopback_gain() 1784 b43_phy_maskset(dev, B43_PHY_CCK(0x2B), 0xC0FF, 0x800); b43_calc_loopback_gain() 1786 b43_phy_set(dev, B43_PHY_RFOVER, 0x0100); b43_calc_loopback_gain() 1787 b43_phy_mask(dev, B43_PHY_RFOVERVAL, 0xCFFF); b43_calc_loopback_gain() 1789 if (dev->dev->bus_sprom->boardflags_lo & B43_BFL_EXTLNA) { b43_calc_loopback_gain() 1791 b43_phy_set(dev, B43_PHY_RFOVER, 0x0800); b43_calc_loopback_gain() 1792 b43_phy_set(dev, B43_PHY_RFOVERVAL, 0x8000); b43_calc_loopback_gain() 1795 b43_radio_mask(dev, 0x7A, 0x00F7); b43_calc_loopback_gain() 1801 b43_radio_write16(dev, 0x43, i); b43_calc_loopback_gain() 1802 b43_phy_maskset(dev, B43_PHY_RFOVERVAL, 0xF0FF, (j << 8)); b43_calc_loopback_gain() 1803 b43_phy_maskset(dev, B43_PHY_PGACTL, 0x0FFF, 0xA000); b43_calc_loopback_gain() 1804 b43_phy_set(dev, B43_PHY_PGACTL, 0xF000); b43_calc_loopback_gain() 1806 if (b43_phy_read(dev, B43_PHY_LO_LEAKAGE) >= 0xDFC) b43_calc_loopback_gain() 1814 b43_phy_set(dev, B43_PHY_RFOVERVAL, 0x30); b43_calc_loopback_gain() 1817 b43_phy_maskset(dev, B43_PHY_RFOVERVAL, 0xF0FF, (j << 8)); b43_calc_loopback_gain() 1818 b43_phy_maskset(dev, B43_PHY_PGACTL, 0x0FFF, 0xA000); b43_calc_loopback_gain() 1819 b43_phy_set(dev, B43_PHY_PGACTL, 0xF000); b43_calc_loopback_gain() 1822 if (b43_phy_read(dev, B43_PHY_LO_LEAKAGE) >= 0xDFC) b43_calc_loopback_gain() 1830 b43_phy_write(dev, B43_PHY_ANALOGOVER, backup_phy[4]); b43_calc_loopback_gain() 1831 b43_phy_write(dev, B43_PHY_ANALOGOVERVAL, backup_phy[5]); b43_calc_loopback_gain() 1833 b43_phy_write(dev, B43_PHY_CCK(0x5A), backup_phy[6]); b43_calc_loopback_gain() 1834 b43_phy_write(dev, B43_PHY_CCK(0x59), backup_phy[7]); b43_calc_loopback_gain() 1835 b43_phy_write(dev, B43_PHY_CCK(0x58), backup_phy[8]); b43_calc_loopback_gain() 1836 b43_phy_write(dev, B43_PHY_CCK(0x0A), backup_phy[9]); b43_calc_loopback_gain() 1837 b43_phy_write(dev, B43_PHY_CCK(0x03), backup_phy[10]); b43_calc_loopback_gain() 1838 b43_phy_write(dev, B43_PHY_LO_MASK, backup_phy[11]); b43_calc_loopback_gain() 1839 b43_phy_write(dev, B43_PHY_LO_CTL, backup_phy[12]); b43_calc_loopback_gain() 1840 b43_phy_write(dev, B43_PHY_CCK(0x2B), backup_phy[13]); b43_calc_loopback_gain() 1841 b43_phy_write(dev, B43_PHY_PGACTL, backup_phy[14]); b43_calc_loopback_gain() 1843 b43_gphy_set_baseband_attenuation(dev, backup_bband); b43_calc_loopback_gain() 1845 b43_radio_write16(dev, 0x52, backup_radio[0]); b43_calc_loopback_gain() 1846 b43_radio_write16(dev, 0x43, backup_radio[1]); b43_calc_loopback_gain() 1847 b43_radio_write16(dev, 0x7A, backup_radio[2]); b43_calc_loopback_gain() 1849 b43_phy_write(dev, B43_PHY_RFOVER, backup_phy[2] \| 0x0003); b43_calc_loopback_gain() 1851 b43_phy_write(dev, B43_PHY_RFOVER, backup_phy[2]); b43_calc_loopback_gain() 1852 b43_phy_write(dev, B43_PHY_RFOVERVAL, backup_phy[3]); b43_calc_loopback_gain() 1853 b43_phy_write(dev, B43_PHY_CRS0, backup_phy[0]); b43_calc_loopback_gain() 1854 b43_phy_write(dev, B43_PHY_CCKBBANDCFG, backup_phy[1]); b43_calc_loopback_gain() 1861 static void b43_hardware_pctl_early_init(struct b43_wldev dev) b43_hardware_pctl_early_init() argument 1863 struct b43_phy phy = &dev->phy; b43_hardware_pctl_early_init() 1865 if (!b43_has_hardware_pctl(dev)) { b43_hardware_pctl_early_init() 1866 b43_phy_write(dev, 0x047A, 0xC111); b43_hardware_pctl_early_init() 1870 b43_phy_mask(dev, 0x0036, 0xFEFF); b43_hardware_pctl_early_init() 1871 b43_phy_write(dev, 0x002F, 0x0202); b43_hardware_pctl_early_init() 1872 b43_phy_set(dev, 0x047C, 0x0002); b43_hardware_pctl_early_init() 1873 b43_phy_set(dev, 0x047A, 0xF000); b43_hardware_pctl_early_init() 1875 b43_phy_maskset(dev, 0x047A, 0xFF0F, 0x0010); b43_hardware_pctl_early_init() 1876 b43_phy_set(dev, 0x005D, 0x8000); b43_hardware_pctl_early_init() 1877 b43_phy_maskset(dev, 0x004E, 0xFFC0, 0x0010); b43_hardware_pctl_early_init() 1878 b43_phy_write(dev, 0x002E, 0xC07F); b43_hardware_pctl_early_init() 1879 b43_phy_set(dev, 0x0036, 0x0400); b43_hardware_pctl_early_init() 1881 b43_phy_set(dev, 0x0036, 0x0200); b43_hardware_pctl_early_init() 1882 b43_phy_set(dev, 0x0036, 0x0400); b43_hardware_pctl_early_init() 1883 b43_phy_mask(dev, 0x005D, 0x7FFF); b43_hardware_pctl_early_init() 1884 b43_phy_mask(dev, 0x004F, 0xFFFE); b43_hardware_pctl_early_init() 1885 b43_phy_maskset(dev, 0x004E, 0xFFC0, 0x0010); b43_hardware_pctl_early_init() 1886 b43_phy_write(dev, 0x002E, 0xC07F); b43_hardware_pctl_early_init() 1887 b43_phy_maskset(dev, 0x047A, 0xFF0F, 0x0010); b43_hardware_pctl_early_init() 1892 static void b43_hardware_pctl_init_gphy(struct b43_wldev dev) b43_hardware_pctl_init_gphy() argument 1894 struct b43_phy phy = &dev->phy; b43_hardware_pctl_init_gphy() 1897 if (!b43_has_hardware_pctl(dev)) { b43_hardware_pctl_init_gphy() 1899 b43_hf_write(dev, b43_hf_read(dev) & ~B43_HF_HWPCTL); b43_hardware_pctl_init_gphy() 1903 b43_phy_maskset(dev, 0x0036, 0xFFC0, (gphy->tgt_idle_tssi - gphy->cur_idle_tssi)); b43_hardware_pctl_init_gphy() 1904 b43_phy_maskset(dev, 0x0478, 0xFF00, (gphy->tgt_idle_tssi - gphy->cur_idle_tssi)); b43_hardware_pctl_init_gphy() 1905 b43_gphy_tssi_power_lt_init(dev); b43_hardware_pctl_init_gphy() 1906 b43_gphy_gain_lt_init(dev); b43_hardware_pctl_init_gphy() 1907 b43_phy_mask(dev, 0x0060, 0xFFBF); b43_hardware_pctl_init_gphy() 1908 b43_phy_write(dev, 0x0014, 0x0000); b43_hardware_pctl_init_gphy() 1911 b43_phy_set(dev, 0x0478, 0x0800); b43_hardware_pctl_init_gphy() 1912 b43_phy_mask(dev, 0x0478, 0xFEFF); b43_hardware_pctl_init_gphy() 1913 b43_phy_mask(dev, 0x0801, 0xFFBF); b43_hardware_pctl_init_gphy() 1915 b43_gphy_dc_lt_init(dev, 1); b43_hardware_pctl_init_gphy() 1918 b43_hf_write(dev, b43_hf_read(dev) \| B43_HF_HWPCTL); b43_hardware_pctl_init_gphy() 1922 static void b43_phy_init_pctl(struct b43_wldev dev) b43_phy_init_pctl() argument 1924 struct b43_phy phy = &dev->phy; b43_phy_init_pctl() 1932 if ((dev->dev->board_vendor == SSB_BOARDVENDOR_BCM) && b43_phy_init_pctl() 1933 (dev->dev->board_type == SSB_BOARD_BU4306)) b43_phy_init_pctl() 1936 b43_phy_write(dev, 0x0028, 0x8018); b43_phy_init_pctl() 1939 b43_write16(dev, B43_MMIO_PHY0, b43_read16(dev, B43_MMIO_PHY0) b43_phy_init_pctl() 1944 b43_hardware_pctl_early_init(dev); b43_phy_init_pctl() 1947 b43_radio_maskset(dev, 0x0076, 0x00F7, 0x0084); b43_phy_init_pctl() 1964 b43_set_txpower_g(dev, &bbatt, &rfatt, 0); b43_phy_init_pctl() 1966 b43_dummy_transmission(dev, false, true); b43_phy_init_pctl() 1967 gphy->cur_idle_tssi = b43_phy_read(dev, B43_PHY_ITSSI); b43_phy_init_pctl() 1971 b43dbg(dev->wl, b43_phy_init_pctl() 1980 b43_radio_mask(dev, 0x0076, 0xFF7B); b43_phy_init_pctl() 1982 b43_set_txpower_g(dev, &old_bbatt, b43_phy_init_pctl() 1986 b43_hardware_pctl_init_gphy(dev); b43_phy_init_pctl() 1987 b43_shm_clear_tssi(dev); b43_phy_init_pctl() 1990 static void b43_phy_initg(struct b43_wldev dev) b43_phy_initg() argument 1992 struct b43_phy phy = &dev->phy; b43_phy_initg() 1997 b43_phy_initb5(dev); b43_phy_initg() 1999 b43_phy_initb6(dev); b43_phy_initg() 2002 b43_phy_inita(dev); b43_phy_initg() 2005 b43_phy_write(dev, B43_PHY_ANALOGOVER, 0); b43_phy_initg() 2006 b43_phy_write(dev, B43_PHY_ANALOGOVERVAL, 0); b43_phy_initg() 2009 b43_phy_write(dev, B43_PHY_RFOVER, 0); b43_phy_initg() 2010 b43_phy_write(dev, B43_PHY_PGACTL, 0xC0); b43_phy_initg() 2013 b43_phy_write(dev, B43_PHY_RFOVER, 0x400); b43_phy_initg() 2014 b43_phy_write(dev, B43_PHY_PGACTL, 0xC0); b43_phy_initg() 2017 tmp = b43_phy_read(dev, B43_PHY_VERSION_OFDM); b43_phy_initg() 2020 b43_phy_write(dev, B43_PHY_OFDM(0xC2), 0x1816); b43_phy_initg() 2021 b43_phy_write(dev, B43_PHY_OFDM(0xC3), 0x8006); b43_phy_initg() 2024 b43_phy_maskset(dev, B43_PHY_OFDM(0xCC), 0x00FF, 0x1F00); b43_phy_initg() 2028 b43_phy_write(dev, B43_PHY_OFDM(0x7E), 0x78); b43_phy_initg() 2030 b43_phy_set(dev, B43_PHY_EXTG(0x01), 0x80); b43_phy_initg() 2031 b43_phy_set(dev, B43_PHY_OFDM(0x3E), 0x4); b43_phy_initg() 2034 b43_calc_loopback_gain(dev); b43_phy_initg() 2038 gphy->initval = b43_radio_init2050(dev); b43_phy_initg() 2040 b43_radio_write16(dev, 0x0078, gphy->initval); b43_phy_initg() 2042 b43_lo_g_init(dev); b43_phy_initg() 2044 b43_radio_write16(dev, 0x52, b43_phy_initg() 2045 (b43_radio_read16(dev, 0x52) & 0xFF00) b43_phy_initg() 2049 b43_radio_maskset(dev, 0x52, 0xFFF0, gphy->lo_control->tx_bias); b43_phy_initg() 2052 b43_phy_maskset(dev, B43_PHY_CCK(0x36), 0x0FFF, (gphy->lo_control->tx_bias << 12)); b43_phy_initg() 2054 if (dev->dev->bus_sprom->boardflags_lo & B43_BFL_PACTRL) b43_phy_initg() 2055 b43_phy_write(dev, B43_PHY_CCK(0x2E), 0x8075); b43_phy_initg() 2057 b43_phy_write(dev, B43_PHY_CCK(0x2E), 0x807F); b43_phy_initg() 2059 b43_phy_write(dev, B43_PHY_CCK(0x2F), 0x101); b43_phy_initg() 2061 b43_phy_write(dev, B43_PHY_CCK(0x2F), 0x202); b43_phy_initg() 2063 b43_lo_g_adjust(dev); b43_phy_initg() 2064 b43_phy_write(dev, B43_PHY_LO_MASK, 0x8078); b43_phy_initg() 2067 if (!(dev->dev->bus_sprom->boardflags_lo & B43_BFL_RSSI)) { b43_phy_initg() 2074 b43_nrssi_hw_update(dev, 0xFFFF); //FIXME? b43_phy_initg() 2075 b43_calc_nrssi_threshold(dev); b43_phy_initg() 2079 b43_calc_nrssi_slope(dev); b43_phy_initg() 2081 b43_calc_nrssi_threshold(dev); b43_phy_initg() 2084 b43_phy_write(dev, B43_PHY_EXTG(0x05), 0x3230); b43_phy_initg() 2085 b43_phy_init_pctl(dev); b43_phy_initg() 2089 if ((dev->dev->chip_id == 0x4306 b43_phy_initg() 2090 && dev->dev->chip_pkg == 2) \|\| 0) { b43_phy_initg() 2091 b43_phy_mask(dev, B43_PHY_CRS0, 0xBFFF); b43_phy_initg() 2092 b43_phy_mask(dev, B43_PHY_OFDM(0xC3), 0x7FFF); b43_phy_initg() 2096 void b43_gphy_channel_switch(struct b43_wldev dev, b43_gphy_channel_switch() argument 2101 b43_synth_pu_workaround(dev, channel); b43_gphy_channel_switch() 2103 b43_write16(dev, B43_MMIO_CHANNEL, channel2freq_bg(channel)); b43_gphy_channel_switch() 2106 if (dev->dev->bus_sprom->country_code == b43_gphy_channel_switch() 2108 b43_hf_write(dev, b43_gphy_channel_switch() 2109 b43_hf_read(dev) & ~B43_HF_ACPR); b43_gphy_channel_switch() 2111 b43_hf_write(dev, b43_gphy_channel_switch() 2112 b43_hf_read(dev) \| B43_HF_ACPR); b43_gphy_channel_switch() 2113 b43_write16(dev, B43_MMIO_CHANNEL_EXT, b43_gphy_channel_switch() 2114 b43_read16(dev, B43_MMIO_CHANNEL_EXT) b43_gphy_channel_switch() 2117 b43_write16(dev, B43_MMIO_CHANNEL_EXT, b43_gphy_channel_switch() 2118 b43_read16(dev, B43_MMIO_CHANNEL_EXT) b43_gphy_channel_switch() 2123 static void default_baseband_attenuation(struct b43_wldev dev, default_baseband_attenuation() argument 2126 struct b43_phy phy = &dev->phy; default_baseband_attenuation() 2134 static void default_radio_attenuation(struct b43_wldev dev, default_radio_attenuation() argument 2137 struct b43_bus_dev bdev = dev->dev; default_radio_attenuation() 2138 struct b43_phy phy = &dev->phy; default_radio_attenuation() 2142 if (dev->dev->board_vendor == SSB_BOARDVENDOR_BCM && default_radio_attenuation() 2143 dev->dev->board_type == SSB_BOARD_BCM4309G) { default_radio_attenuation() 2144 if (dev->dev->board_rev < 0x43) { default_radio_attenuation() 2147 } else if (dev->dev->board_rev < 0x51) { default_radio_attenuation() 2235 static u16 default_tx_control(struct b43_wldev dev) default_tx_control() argument 2237 struct b43_phy phy = &dev->phy; default_tx_control() 2250 static u8 b43_gphy_aci_detect(struct b43_wldev dev, u8 channel) b43_gphy_aci_detect() argument 2252 struct b43_phy phy = &dev->phy; b43_gphy_aci_detect() 2258 saved = b43_phy_read(dev, 0x0403); b43_gphy_aci_detect() 2259 b43_switch_channel(dev, channel); b43_gphy_aci_detect() 2260 b43_phy_write(dev, 0x0403, (saved & 0xFFF8) \| 5); b43_gphy_aci_detect() 2262 rssi = b43_phy_read(dev, 0x048A) & 0x3F; b43_gphy_aci_detect() 2269 temp = (b43_phy_read(dev, 0x047F) >> 8) & 0x3F; b43_gphy_aci_detect() 2277 b43_phy_write(dev, 0x0403, saved); b43_gphy_aci_detect() 2282 static u8 b43_gphy_aci_scan(struct b43_wldev dev) b43_gphy_aci_scan() argument 2284 struct b43_phy phy = &dev->phy; b43_gphy_aci_scan() 2292 b43_phy_lock(dev); b43_gphy_aci_scan() 2293 b43_radio_lock(dev); b43_gphy_aci_scan() 2294 b43_phy_mask(dev, 0x0802, 0xFFFC); b43_gphy_aci_scan() 2295 b43_phy_mask(dev, B43_PHY_G_CRS, 0x7FFF); b43_gphy_aci_scan() 2296 b43_set_all_gains(dev, 3, 8, 1); b43_gphy_aci_scan() 2303 ret[i - 1] = b43_gphy_aci_detect(dev, i); b43_gphy_aci_scan() 2305 b43_switch_channel(dev, channel); b43_gphy_aci_scan() 2306 b43_phy_maskset(dev, 0x0802, 0xFFFC, 0x0003); b43_gphy_aci_scan() 2307 b43_phy_mask(dev, 0x0403, 0xFFF8); b43_gphy_aci_scan() 2308 b43_phy_set(dev, B43_PHY_G_CRS, 0x8000); b43_gphy_aci_scan() 2309 b43_set_original_gains(dev); b43_gphy_aci_scan() 2317 b43_radio_unlock(dev); b43_gphy_aci_scan() 2318 b43_phy_unlock(dev); b43_gphy_aci_scan() 2352 u8 b43_generate_dyn_tssi2dbm_tab(struct b43_wldev dev, b43_generate_dyn_tssi2dbm_tab() argument 2361 b43err(dev->wl, "Could not allocate memory " b43_generate_dyn_tssi2dbm_tab() 2368 b43err(dev->wl, "Could not generate " b43_generate_dyn_tssi2dbm_tab() 2379 static int b43_gphy_init_tssi2dbm_table(struct b43_wldev dev) b43_gphy_init_tssi2dbm_table() argument 2381 struct b43_phy phy = &dev->phy; b43_gphy_init_tssi2dbm_table() 2385 pab0 = (s16) (dev->dev->bus_sprom->pa0b0); b43_gphy_init_tssi2dbm_table() 2386 pab1 = (s16) (dev->dev->bus_sprom->pa0b1); b43_gphy_init_tssi2dbm_table() 2387 pab2 = (s16) (dev->dev->bus_sprom->pa0b2); b43_gphy_init_tssi2dbm_table() 2389 B43_WARN_ON((dev->dev->chip_id == 0x4301) && b43_gphy_init_tssi2dbm_table() 2397 if ((s8) dev->dev->bus_sprom->itssi_bg != 0 && b43_gphy_init_tssi2dbm_table() 2398 (s8) dev->dev->bus_sprom->itssi_bg != -1) { b43_gphy_init_tssi2dbm_table() 2400 (s8) (dev->dev->bus_sprom->itssi_bg); b43_gphy_init_tssi2dbm_table() 2403 gphy->tssi2dbm = b43_generate_dyn_tssi2dbm_tab(dev, pab0, b43_gphy_init_tssi2dbm_table() 2417 static int b43_gphy_op_allocate(struct b43_wldev dev) b43_gphy_op_allocate() argument 2428 dev->phy.g = gphy; b43_gphy_op_allocate() 2437 err = b43_gphy_init_tssi2dbm_table(dev); b43_gphy_op_allocate() 2451 static void b43_gphy_op_prepare_structs(struct b43_wldev dev) b43_gphy_op_prepare_structs() argument 2453 struct b43_phy phy = &dev->phy; b43_gphy_op_prepare_structs() 2498 static void b43_gphy_op_free(struct b43_wldev dev) b43_gphy_op_free() argument 2500 struct b43_phy phy = &dev->phy; b43_gphy_op_free() 2511 dev->phy.g = NULL; b43_gphy_op_free() 2514 static int b43_gphy_op_prepare_hardware(struct b43_wldev dev) b43_gphy_op_prepare_hardware() argument 2516 struct b43_phy phy = &dev->phy; b43_gphy_op_prepare_hardware() 2522 default_baseband_attenuation(dev, &gphy->bbatt); b43_gphy_op_prepare_hardware() 2523 default_radio_attenuation(dev, &gphy->rfatt); b43_gphy_op_prepare_hardware() 2524 gphy->tx_control = (default_tx_control(dev) << 4); b43_gphy_op_prepare_hardware() 2525 generate_rfatt_list(dev, &lo->rfatt_list); b43_gphy_op_prepare_hardware() 2526 generate_bbatt_list(dev, &lo->bbatt_list); b43_gphy_op_prepare_hardware() 2529 b43_read32(dev, B43_MMIO_MACCTL); b43_gphy_op_prepare_hardware() 2535 b43_wireless_core_reset(dev, 0); b43_gphy_op_prepare_hardware() 2536 b43_phy_initg(dev); b43_gphy_op_prepare_hardware() 2538 b43_wireless_core_reset(dev, 1); b43_gphy_op_prepare_hardware() 2544 static int b43_gphy_op_init(struct b43_wldev dev) b43_gphy_op_init() argument 2546 b43_phy_initg(dev); b43_gphy_op_init() 2551 static void b43_gphy_op_exit(struct b43_wldev dev) b43_gphy_op_exit() argument 2553 b43_lo_g_cleanup(dev); b43_gphy_op_exit() 2556 static u16 b43_gphy_op_read(struct b43_wldev dev, u16 reg) b43_gphy_op_read() argument 2558 b43_write16f(dev, B43_MMIO_PHY_CONTROL, reg); b43_gphy_op_read() 2559 return b43_read16(dev, B43_MMIO_PHY_DATA); b43_gphy_op_read() 2562 static void b43_gphy_op_write(struct b43_wldev dev, u16 reg, u16 value) b43_gphy_op_write() argument 2564 b43_write16f(dev, B43_MMIO_PHY_CONTROL, reg); b43_gphy_op_write() 2565 b43_write16(dev, B43_MMIO_PHY_DATA, value); b43_gphy_op_write() 2568 static u16 b43_gphy_op_radio_read(struct b43_wldev dev, u16 reg) b43_gphy_op_radio_read() argument 2575 b43_write16f(dev, B43_MMIO_RADIO_CONTROL, reg); b43_gphy_op_radio_read() 2576 return b43_read16(dev, B43_MMIO_RADIO_DATA_LOW); b43_gphy_op_radio_read() 2579 static void b43_gphy_op_radio_write(struct b43_wldev dev, u16 reg, u16 value) b43_gphy_op_radio_write() argument 2584 b43_write16f(dev, B43_MMIO_RADIO_CONTROL, reg); b43_gphy_op_radio_write() 2585 b43_write16(dev, B43_MMIO_RADIO_DATA_LOW, value); b43_gphy_op_radio_write() 2588 static bool b43_gphy_op_supports_hwpctl(struct b43_wldev dev) b43_gphy_op_supports_hwpctl() argument 2590 return (dev->phy.rev >= 6); b43_gphy_op_supports_hwpctl() 2593 static void b43_gphy_op_software_rfkill(struct b43_wldev dev, b43_gphy_op_software_rfkill() argument 2596 struct b43_phy phy = &dev->phy; b43_gphy_op_software_rfkill() 2607 b43_phy_write(dev, 0x0015, 0x8000); b43_gphy_op_software_rfkill() 2608 b43_phy_write(dev, 0x0015, 0xCC00); b43_gphy_op_software_rfkill() 2609 b43_phy_write(dev, 0x0015, (phy->gmode ? 0x00C0 : 0x0000)); b43_gphy_op_software_rfkill() 2612 b43_phy_write(dev, B43_PHY_RFOVER, b43_gphy_op_software_rfkill() 2614 b43_phy_write(dev, B43_PHY_RFOVERVAL, b43_gphy_op_software_rfkill() 2619 b43_gphy_channel_switch(dev, 6, 1); b43_gphy_op_software_rfkill() 2620 b43_gphy_channel_switch(dev, channel, 0); b43_gphy_op_software_rfkill() 2625 rfover = b43_phy_read(dev, B43_PHY_RFOVER); b43_gphy_op_software_rfkill() 2626 rfoverval = b43_phy_read(dev, B43_PHY_RFOVERVAL); b43_gphy_op_software_rfkill() 2630 b43_phy_write(dev, B43_PHY_RFOVER, rfover \| 0x008C); b43_gphy_op_software_rfkill() 2631 b43_phy_write(dev, B43_PHY_RFOVERVAL, rfoverval & 0xFF73); b43_gphy_op_software_rfkill() 2635 static int b43_gphy_op_switch_channel(struct b43_wldev dev, b43_gphy_op_switch_channel() argument 2640 b43_gphy_channel_switch(dev, new_channel, 0); b43_gphy_op_switch_channel() 2645 static unsigned int b43_gphy_op_get_default_chan(struct b43_wldev dev) b43_gphy_op_get_default_chan() argument 2650 static void b43_gphy_op_set_rx_antenna(struct b43_wldev dev, int antenna) b43_gphy_op_set_rx_antenna() argument 2652 struct b43_phy phy = &dev->phy; b43_gphy_op_set_rx_antenna() 2659 b43_hf_write(dev, b43_hf_read(dev) & ~B43_HF_ANTDIVHELP); b43_gphy_op_set_rx_antenna() 2661 b43_phy_maskset(dev, B43_PHY_BBANDCFG, ~B43_PHY_BBANDCFG_RXANT, b43_gphy_op_set_rx_antenna() 2666 tmp = b43_phy_read(dev, B43_PHY_ANTDWELL); b43_gphy_op_set_rx_antenna() 2671 b43_phy_write(dev, B43_PHY_ANTDWELL, tmp); b43_gphy_op_set_rx_antenna() 2674 tmp = b43_phy_read(dev, B43_PHY_ANTWRSETT); b43_gphy_op_set_rx_antenna() 2679 b43_phy_write(dev, B43_PHY_ANTWRSETT, tmp); b43_gphy_op_set_rx_antenna() 2682 b43_phy_set(dev, B43_PHY_ANTWRSETT, B43_PHY_ANTWRSETT_ARXDIV); b43_gphy_op_set_rx_antenna() 2684 b43_phy_mask(dev, B43_PHY_ANTWRSETT, b43_gphy_op_set_rx_antenna() 2689 b43_phy_set(dev, B43_PHY_OFDM61, B43_PHY_OFDM61_10); b43_gphy_op_set_rx_antenna() 2690 b43_phy_maskset(dev, B43_PHY_DIVSRCHGAINBACK, 0xFF00, 0x15); b43_gphy_op_set_rx_antenna() 2693 b43_phy_write(dev, B43_PHY_ADIVRELATED, 8); b43_gphy_op_set_rx_antenna() 2695 b43_phy_maskset(dev, B43_PHY_ADIVRELATED, 0xFF00, 8); b43_gphy_op_set_rx_antenna() 2698 b43_phy_write(dev, B43_PHY_OFDM9B, 0xDC); b43_gphy_op_set_rx_antenna() 2700 b43_hf_write(dev, b43_hf_read(dev) \| B43_HF_ANTDIVHELP); b43_gphy_op_set_rx_antenna() 2703 static int b43_gphy_op_interf_mitigation(struct b43_wldev dev, b43_gphy_op_interf_mitigation() argument 2706 struct b43_phy phy = &dev->phy; b43_gphy_op_interf_mitigation() 2735 b43_radio_interference_mitigation_disable(dev, currentmode); b43_gphy_op_interf_mitigation() 2741 b43_radio_interference_mitigation_enable(dev, mode); b43_gphy_op_interf_mitigation() 2750 static s8 b43_gphy_estimate_power_out(struct b43_wldev dev, s8 tssi) b43_gphy_estimate_power_out() argument 2752 struct b43_phy_g gphy = dev->phy.g; b43_gphy_estimate_power_out() 2763 static void b43_put_attenuation_into_ranges(struct b43_wldev dev, b43_put_attenuation_into_ranges() argument 2768 struct b43_txpower_lo_control lo = dev->phy.g->lo_control; b43_put_attenuation_into_ranges() 2816 static void b43_gphy_op_adjust_txpower(struct b43_wldev dev) b43_gphy_op_adjust_txpower() argument 2818 struct b43_phy phy = &dev->phy; b43_gphy_op_adjust_txpower() 2823 b43_mac_suspend(dev); b43_gphy_op_adjust_txpower() 2831 b43_put_attenuation_into_ranges(dev, &bbatt, &rfatt); b43_gphy_op_adjust_txpower() 2841 } else if (dev->dev->bus_sprom-> b43_gphy_op_adjust_txpower() 2860 b43_put_attenuation_into_ranges(dev, &bbatt, &rfatt); b43_gphy_op_adjust_txpower() 2864 if (b43_debug(dev, B43_DBG_XMITPOWER)) b43_gphy_op_adjust_txpower() 2865 b43dbg(dev->wl, "Adjusting TX power\n"); b43_gphy_op_adjust_txpower() 2868 b43_phy_lock(dev); b43_gphy_op_adjust_txpower() 2869 b43_radio_lock(dev); b43_gphy_op_adjust_txpower() 2870 b43_set_txpower_g(dev, &gphy->bbatt, &gphy->rfatt, b43_gphy_op_adjust_txpower() 2872 b43_radio_unlock(dev); b43_gphy_op_adjust_txpower() 2873 b43_phy_unlock(dev); b43_gphy_op_adjust_txpower() 2875 b43_mac_enable(dev); b43_gphy_op_adjust_txpower() 2878 static enum b43_txpwr_result b43_gphy_op_recalc_txpower(struct b43_wldev dev, b43_gphy_op_recalc_txpower() argument 2881 struct b43_phy phy = &dev->phy; b43_gphy_op_recalc_txpower() 2890 cck_result = b43_phy_shm_tssi_read(dev, B43_SHM_SH_TSSI_CCK); b43_gphy_op_recalc_txpower() 2891 ofdm_result = b43_phy_shm_tssi_read(dev, B43_SHM_SH_TSSI_OFDM_G); b43_gphy_op_recalc_txpower() 2912 estimated_pwr = b43_gphy_estimate_power_out(dev, average_tssi); b43_gphy_op_recalc_txpower() 2915 max_pwr = dev->dev->bus_sprom->maxpwr_bg; b43_gphy_op_recalc_txpower() 2916 if (dev->dev->bus_sprom->boardflags_lo & B43_BFL_PACTRL) b43_gphy_op_recalc_txpower() 2919 b43warn(dev->wl, b43_gphy_op_recalc_txpower() 2922 dev->dev->bus_sprom->maxpwr_bg = max_pwr; b43_gphy_op_recalc_txpower() 2932 if (b43_debug(dev, B43_DBG_XMITPOWER)) { b43_gphy_op_recalc_txpower() 2933 b43dbg(dev->wl, b43_gphy_op_recalc_txpower() 2961 if (b43_debug(dev, B43_DBG_XMITPOWER)) { b43_gphy_op_recalc_txpower() 2963 b43dbg(dev->wl, b43_gphy_op_recalc_txpower() 2986 static void b43_gphy_op_pwork_15sec(struct b43_wldev dev) b43_gphy_op_pwork_15sec() argument 2988 struct b43_phy phy = &dev->phy; b43_gphy_op_pwork_15sec() 2991 b43_mac_suspend(dev); b43_gphy_op_pwork_15sec() 2996 phy->ops->interf_mitigation(dev, b43_gphy_op_pwork_15sec() 3000 if (/(aci_average > 1000) &&/ !b43_gphy_aci_scan(dev)) b43_gphy_op_pwork_15sec() 3001 phy->ops->interf_mitigation(dev, B43_INTERFMODE_NONE); b43_gphy_op_pwork_15sec() 3007 b43_lo_g_maintanance_work(dev); b43_gphy_op_pwork_15sec() 3008 b43_mac_enable(dev); b43_gphy_op_pwork_15sec() 3011 static void b43_gphy_op_pwork_60sec(struct b43_wldev dev) b43_gphy_op_pwork_60sec() argument 3013 struct b43_phy phy = &dev->phy; b43_gphy_op_pwork_60sec() 3015 if (!(dev->dev->bus_sprom->boardflags_lo & B43_BFL_RSSI)) b43_gphy_op_pwork_60sec() 3018 b43_mac_suspend(dev); b43_gphy_op_pwork_60sec() 3019 b43_calc_nrssi_slope(dev); b43_gphy_op_pwork_60sec() 3025 b43_switch_channel(dev, 1); b43_gphy_op_pwork_60sec() 3027 b43_switch_channel(dev, 13); b43_gphy_op_pwork_60sec() 3028 b43_switch_channel(dev, old_chan); b43_gphy_op_pwork_60sec() 3030 b43_mac_enable(dev); b43_gphy_op_pwork_60sec()
H A D	phy_lp.c	47 static unsigned int b43_lpphy_op_get_default_chan(struct b43_wldev dev) b43_lpphy_op_get_default_chan() argument 49 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) b43_lpphy_op_get_default_chan() 54 static int b43_lpphy_op_allocate(struct b43_wldev dev) b43_lpphy_op_allocate() argument 61 dev->phy.lp = lpphy; b43_lpphy_op_allocate() 66 static void b43_lpphy_op_prepare_structs(struct b43_wldev dev) b43_lpphy_op_prepare_structs() argument 68 struct b43_phy phy = &dev->phy; b43_lpphy_op_prepare_structs() 77 static void b43_lpphy_op_free(struct b43_wldev dev) b43_lpphy_op_free() argument 79 struct b43_phy_lp lpphy = dev->phy.lp; b43_lpphy_op_free() 82 dev->phy.lp = NULL; b43_lpphy_op_free() 86 static void lpphy_read_band_sprom(struct b43_wldev dev) lpphy_read_band_sprom() argument 88 struct ssb_sprom sprom = dev->dev->bus_sprom; lpphy_read_band_sprom() 89 struct b43_phy_lp lpphy = dev->phy.lp; lpphy_read_band_sprom() 94 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) { lpphy_read_band_sprom() 169 static void lpphy_adjust_gain_table(struct b43_wldev dev, u32 freq) lpphy_adjust_gain_table() argument 171 struct b43_phy_lp lpphy = dev->phy.lp; lpphy_adjust_gain_table() 175 B43_WARN_ON(dev->phy.rev >= 2); lpphy_adjust_gain_table() 177 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) lpphy_adjust_gain_table() 190 b43_lptab_write_bulk(dev, B43_LPTAB16(13, 0), 3, temp); lpphy_adjust_gain_table() 191 b43_lptab_write_bulk(dev, B43_LPTAB16(12, 0), 3, temp); lpphy_adjust_gain_table() 194 static void lpphy_table_init(struct b43_wldev dev) lpphy_table_init() argument 196 u32 freq = channel2freq_lp(b43_lpphy_op_get_default_chan(dev)); lpphy_table_init() 198 if (dev->phy.rev < 2) lpphy_table_init() 199 lpphy_rev0_1_table_init(dev); lpphy_table_init() 201 lpphy_rev2plus_table_init(dev); lpphy_table_init() 203 lpphy_init_tx_gain_table(dev); lpphy_table_init() 205 if (dev->phy.rev < 2) lpphy_table_init() 206 lpphy_adjust_gain_table(dev, freq); lpphy_table_init() 209 static void lpphy_baseband_rev0_1_init(struct b43_wldev dev) lpphy_baseband_rev0_1_init() argument 211 struct ssb_bus bus = dev->dev->sdev->bus; lpphy_baseband_rev0_1_init() 212 struct ssb_sprom sprom = dev->dev->bus_sprom; lpphy_baseband_rev0_1_init() 213 struct b43_phy_lp lpphy = dev->phy.lp; lpphy_baseband_rev0_1_init() 216 b43_phy_mask(dev, B43_LPPHY_AFE_DAC_CTL, 0xF7FF); lpphy_baseband_rev0_1_init() 217 b43_phy_write(dev, B43_LPPHY_AFE_CTL, 0); lpphy_baseband_rev0_1_init() 218 b43_phy_write(dev, B43_LPPHY_AFE_CTL_OVR, 0); lpphy_baseband_rev0_1_init() 219 b43_phy_write(dev, B43_LPPHY_RF_OVERRIDE_0, 0); lpphy_baseband_rev0_1_init() 220 b43_phy_write(dev, B43_LPPHY_RF_OVERRIDE_2, 0); lpphy_baseband_rev0_1_init() 221 b43_phy_set(dev, B43_LPPHY_AFE_DAC_CTL, 0x0004); lpphy_baseband_rev0_1_init() 222 b43_phy_maskset(dev, B43_LPPHY_OFDMSYNCTHRESH0, 0xFF00, 0x0078); lpphy_baseband_rev0_1_init() 223 b43_phy_maskset(dev, B43_LPPHY_CLIPCTRTHRESH, 0x83FF, 0x5800); lpphy_baseband_rev0_1_init() 224 b43_phy_write(dev, B43_LPPHY_ADC_COMPENSATION_CTL, 0x0016); lpphy_baseband_rev0_1_init() 225 b43_phy_maskset(dev, B43_LPPHY_AFE_ADC_CTL_0, 0xFFF8, 0x0004); lpphy_baseband_rev0_1_init() 226 b43_phy_maskset(dev, B43_LPPHY_VERYLOWGAINDB, 0x00FF, 0x5400); lpphy_baseband_rev0_1_init() 227 b43_phy_maskset(dev, B43_LPPHY_HIGAINDB, 0x00FF, 0x2400); lpphy_baseband_rev0_1_init() 228 b43_phy_maskset(dev, B43_LPPHY_LOWGAINDB, 0x00FF, 0x2100); lpphy_baseband_rev0_1_init() 229 b43_phy_maskset(dev, B43_LPPHY_VERYLOWGAINDB, 0xFF00, 0x0006); lpphy_baseband_rev0_1_init() 230 b43_phy_mask(dev, B43_LPPHY_RX_RADIO_CTL, 0xFFFE); lpphy_baseband_rev0_1_init() 231 b43_phy_maskset(dev, B43_LPPHY_CLIPCTRTHRESH, 0xFFE0, 0x0005); lpphy_baseband_rev0_1_init() 232 b43_phy_maskset(dev, B43_LPPHY_CLIPCTRTHRESH, 0xFC1F, 0x0180); lpphy_baseband_rev0_1_init() 233 b43_phy_maskset(dev, B43_LPPHY_CLIPCTRTHRESH, 0x83FF, 0x3C00); lpphy_baseband_rev0_1_init() 234 b43_phy_maskset(dev, B43_LPPHY_GAINDIRECTMISMATCH, 0xFFF0, 0x0005); lpphy_baseband_rev0_1_init() 235 b43_phy_maskset(dev, B43_LPPHY_GAIN_MISMATCH_LIMIT, 0xFFC0, 0x001A); lpphy_baseband_rev0_1_init() 236 b43_phy_maskset(dev, B43_LPPHY_CRS_ED_THRESH, 0xFF00, 0x00B3); lpphy_baseband_rev0_1_init() 237 b43_phy_maskset(dev, B43_LPPHY_CRS_ED_THRESH, 0x00FF, 0xAD00); lpphy_baseband_rev0_1_init() 238 b43_phy_maskset(dev, B43_LPPHY_INPUT_PWRDB, lpphy_baseband_rev0_1_init() 241 ((b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ) \|\| lpphy_baseband_rev0_1_init() 245 if (dev->phy.rev == 0) { lpphy_baseband_rev0_1_init() 246 b43_phy_maskset(dev, B43_LPPHY_LP_RF_SIGNAL_LUT, lpphy_baseband_rev0_1_init() 249 b43_lptab_write(dev, B43_LPTAB16(11, 7), 60); lpphy_baseband_rev0_1_init() 252 b43_phy_maskset(dev, B43_LPPHY_LP_RF_SIGNAL_LUT, lpphy_baseband_rev0_1_init() 254 b43_lptab_write(dev, B43_LPTAB16(11, 7), 100); lpphy_baseband_rev0_1_init() 257 b43_phy_write(dev, B43_LPPHY_AFE_RSSI_CTL_0, tmp); lpphy_baseband_rev0_1_init() 259 b43_phy_maskset(dev, B43_LPPHY_AFE_RSSI_CTL_1, 0xF000, 0x0AAA); lpphy_baseband_rev0_1_init() 261 b43_phy_maskset(dev, B43_LPPHY_AFE_RSSI_CTL_1, 0xF000, 0x02AA); lpphy_baseband_rev0_1_init() 262 b43_lptab_write(dev, B43_LPTAB16(11, 1), 24); lpphy_baseband_rev0_1_init() 263 b43_phy_maskset(dev, B43_LPPHY_RX_RADIO_CTL, lpphy_baseband_rev0_1_init() 265 if (dev->phy.rev == 1 && lpphy_baseband_rev0_1_init() 267 b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_1, 0xFFC0, 0x000A); lpphy_baseband_rev0_1_init() 268 b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_1, 0x3F00, 0x0900); lpphy_baseband_rev0_1_init() 269 b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_2, 0xFFC0, 0x000A); lpphy_baseband_rev0_1_init() 270 b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_2, 0xC0FF, 0x0B00); lpphy_baseband_rev0_1_init() 271 b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_3, 0xFFC0, 0x000A); lpphy_baseband_rev0_1_init() 272 b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_3, 0xC0FF, 0x0400); lpphy_baseband_rev0_1_init() 273 b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_4, 0xFFC0, 0x000A); lpphy_baseband_rev0_1_init() 274 b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_4, 0xC0FF, 0x0B00); lpphy_baseband_rev0_1_init() 275 b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_5, 0xFFC0, 0x000A); lpphy_baseband_rev0_1_init() 276 b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_5, 0xC0FF, 0x0900); lpphy_baseband_rev0_1_init() 277 b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_6, 0xFFC0, 0x000A); lpphy_baseband_rev0_1_init() 278 b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_6, 0xC0FF, 0x0B00); lpphy_baseband_rev0_1_init() 279 b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_7, 0xFFC0, 0x000A); lpphy_baseband_rev0_1_init() 280 b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_7, 0xC0FF, 0x0900); lpphy_baseband_rev0_1_init() 281 b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_8, 0xFFC0, 0x000A); lpphy_baseband_rev0_1_init() 282 b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_8, 0xC0FF, 0x0B00); lpphy_baseband_rev0_1_init() 283 } else if (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ \|\| lpphy_baseband_rev0_1_init() 284 (dev->dev->board_type == SSB_BOARD_BU4312) \|\| lpphy_baseband_rev0_1_init() 285 (dev->phy.rev == 0 && (sprom->boardflags_lo & B43_BFL_FEM))) { lpphy_baseband_rev0_1_init() 286 b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_1, 0xFFC0, 0x0001); lpphy_baseband_rev0_1_init() 287 b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_1, 0xC0FF, 0x0400); lpphy_baseband_rev0_1_init() 288 b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_2, 0xFFC0, 0x0001); lpphy_baseband_rev0_1_init() 289 b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_2, 0xC0FF, 0x0500); lpphy_baseband_rev0_1_init() 290 b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_3, 0xFFC0, 0x0002); lpphy_baseband_rev0_1_init() 291 b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_3, 0xC0FF, 0x0800); lpphy_baseband_rev0_1_init() 292 b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_4, 0xFFC0, 0x0002); lpphy_baseband_rev0_1_init() 293 b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_4, 0xC0FF, 0x0A00); lpphy_baseband_rev0_1_init() 294 } else if (dev->phy.rev == 1 \|\| lpphy_baseband_rev0_1_init() 296 b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_1, 0xFFC0, 0x0004); lpphy_baseband_rev0_1_init() 297 b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_1, 0xC0FF, 0x0800); lpphy_baseband_rev0_1_init() 298 b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_2, 0xFFC0, 0x0004); lpphy_baseband_rev0_1_init() 299 b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_2, 0xC0FF, 0x0C00); lpphy_baseband_rev0_1_init() 300 b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_3, 0xFFC0, 0x0002); lpphy_baseband_rev0_1_init() 301 b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_3, 0xC0FF, 0x0100); lpphy_baseband_rev0_1_init() 302 b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_4, 0xFFC0, 0x0002); lpphy_baseband_rev0_1_init() 303 b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_4, 0xC0FF, 0x0300); lpphy_baseband_rev0_1_init() 305 b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_1, 0xFFC0, 0x000A); lpphy_baseband_rev0_1_init() 306 b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_1, 0xC0FF, 0x0900); lpphy_baseband_rev0_1_init() 307 b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_2, 0xFFC0, 0x000A); lpphy_baseband_rev0_1_init() 308 b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_2, 0xC0FF, 0x0B00); lpphy_baseband_rev0_1_init() 309 b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_3, 0xFFC0, 0x0006); lpphy_baseband_rev0_1_init() 310 b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_3, 0xC0FF, 0x0500); lpphy_baseband_rev0_1_init() 311 b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_4, 0xFFC0, 0x0006); lpphy_baseband_rev0_1_init() 312 b43_phy_maskset(dev, B43_LPPHY_TR_LOOKUP_4, 0xC0FF, 0x0700); lpphy_baseband_rev0_1_init() 314 if (dev->phy.rev == 1 && (sprom->boardflags_hi & B43_BFH_PAREF)) { lpphy_baseband_rev0_1_init() 315 b43_phy_copy(dev, B43_LPPHY_TR_LOOKUP_5, B43_LPPHY_TR_LOOKUP_1); lpphy_baseband_rev0_1_init() 316 b43_phy_copy(dev, B43_LPPHY_TR_LOOKUP_6, B43_LPPHY_TR_LOOKUP_2); lpphy_baseband_rev0_1_init() 317 b43_phy_copy(dev, B43_LPPHY_TR_LOOKUP_7, B43_LPPHY_TR_LOOKUP_3); lpphy_baseband_rev0_1_init() 318 b43_phy_copy(dev, B43_LPPHY_TR_LOOKUP_8, B43_LPPHY_TR_LOOKUP_4); lpphy_baseband_rev0_1_init() 321 (dev->dev->chip_id == 0x5354) && lpphy_baseband_rev0_1_init() 322 (dev->dev->chip_pkg == SSB_CHIPPACK_BCM4712S)) { lpphy_baseband_rev0_1_init() 323 b43_phy_set(dev, B43_LPPHY_CRSGAIN_CTL, 0x0006); lpphy_baseband_rev0_1_init() 324 b43_phy_write(dev, B43_LPPHY_GPIO_SELECT, 0x0005); lpphy_baseband_rev0_1_init() 325 b43_phy_write(dev, B43_LPPHY_GPIO_OUTEN, 0xFFFF); lpphy_baseband_rev0_1_init() 327 b43_hf_write(dev, b43_hf_read(dev) \| B43_HF_PR45960W); lpphy_baseband_rev0_1_init() 329 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) { lpphy_baseband_rev0_1_init() 330 b43_phy_set(dev, B43_LPPHY_LP_PHY_CTL, 0x8000); lpphy_baseband_rev0_1_init() 331 b43_phy_set(dev, B43_LPPHY_CRSGAIN_CTL, 0x0040); lpphy_baseband_rev0_1_init() 332 b43_phy_maskset(dev, B43_LPPHY_MINPWR_LEVEL, 0x00FF, 0xA400); lpphy_baseband_rev0_1_init() 333 b43_phy_maskset(dev, B43_LPPHY_CRSGAIN_CTL, 0xF0FF, 0x0B00); lpphy_baseband_rev0_1_init() 334 b43_phy_maskset(dev, B43_LPPHY_SYNCPEAKCNT, 0xFFF8, 0x0007); lpphy_baseband_rev0_1_init() 335 b43_phy_maskset(dev, B43_LPPHY_DSSS_CONFIRM_CNT, 0xFFF8, 0x0003); lpphy_baseband_rev0_1_init() 336 b43_phy_maskset(dev, B43_LPPHY_DSSS_CONFIRM_CNT, 0xFFC7, 0x0020); lpphy_baseband_rev0_1_init() 337 b43_phy_mask(dev, B43_LPPHY_IDLEAFTERPKTRXTO, 0x00FF); lpphy_baseband_rev0_1_init() 339 b43_phy_mask(dev, B43_LPPHY_LP_PHY_CTL, 0x7FFF); lpphy_baseband_rev0_1_init() 340 b43_phy_mask(dev, B43_LPPHY_CRSGAIN_CTL, 0xFFBF); lpphy_baseband_rev0_1_init() 342 if (dev->phy.rev == 1) { lpphy_baseband_rev0_1_init() 343 tmp = b43_phy_read(dev, B43_LPPHY_CLIPCTRTHRESH); lpphy_baseband_rev0_1_init() 346 b43_phy_write(dev, B43_LPPHY_4C3, tmp2); lpphy_baseband_rev0_1_init() 347 tmp = b43_phy_read(dev, B43_LPPHY_GAINDIRECTMISMATCH); lpphy_baseband_rev0_1_init() 350 b43_phy_write(dev, B43_LPPHY_4C4, tmp2); lpphy_baseband_rev0_1_init() 351 tmp = b43_phy_read(dev, B43_LPPHY_VERYLOWGAINDB); lpphy_baseband_rev0_1_init() 354 b43_phy_write(dev, B43_LPPHY_4C5, tmp2); lpphy_baseband_rev0_1_init() 358 static void lpphy_save_dig_flt_state(struct b43_wldev dev) lpphy_save_dig_flt_state() argument 378 struct b43_phy_lp lpphy = dev->phy.lp; lpphy_save_dig_flt_state() 382 lpphy->dig_flt_state[i] = b43_phy_read(dev, addr[i]); lpphy_save_dig_flt_state() 383 b43_phy_write(dev, addr[i], coefs[i]); lpphy_save_dig_flt_state() 387 static void lpphy_restore_dig_flt_state(struct b43_wldev dev) lpphy_restore_dig_flt_state() argument 401 struct b43_phy_lp lpphy = dev->phy.lp; lpphy_restore_dig_flt_state() 405 b43_phy_write(dev, addr[i], lpphy->dig_flt_state[i]); lpphy_restore_dig_flt_state() 408 static void lpphy_baseband_rev2plus_init(struct b43_wldev dev) lpphy_baseband_rev2plus_init() argument 410 struct b43_phy_lp lpphy = dev->phy.lp; lpphy_baseband_rev2plus_init() 412 b43_phy_write(dev, B43_LPPHY_AFE_DAC_CTL, 0x50); lpphy_baseband_rev2plus_init() 413 b43_phy_write(dev, B43_LPPHY_AFE_CTL, 0x8800); lpphy_baseband_rev2plus_init() 414 b43_phy_write(dev, B43_LPPHY_AFE_CTL_OVR, 0); lpphy_baseband_rev2plus_init() 415 b43_phy_write(dev, B43_LPPHY_AFE_CTL_OVRVAL, 0); lpphy_baseband_rev2plus_init() 416 b43_phy_write(dev, B43_LPPHY_RF_OVERRIDE_0, 0); lpphy_baseband_rev2plus_init() 417 b43_phy_write(dev, B43_LPPHY_RF_OVERRIDE_2, 0); lpphy_baseband_rev2plus_init() 418 b43_phy_write(dev, B43_PHY_OFDM(0xF9), 0); lpphy_baseband_rev2plus_init() 419 b43_phy_write(dev, B43_LPPHY_TR_LOOKUP_1, 0); lpphy_baseband_rev2plus_init() 420 b43_phy_set(dev, B43_LPPHY_ADC_COMPENSATION_CTL, 0x10); lpphy_baseband_rev2plus_init() 421 b43_phy_maskset(dev, B43_LPPHY_OFDMSYNCTHRESH0, 0xFF00, 0xB4); lpphy_baseband_rev2plus_init() 422 b43_phy_maskset(dev, B43_LPPHY_DCOFFSETTRANSIENT, 0xF8FF, 0x200); lpphy_baseband_rev2plus_init() 423 b43_phy_maskset(dev, B43_LPPHY_DCOFFSETTRANSIENT, 0xFF00, 0x7F); lpphy_baseband_rev2plus_init() 424 b43_phy_maskset(dev, B43_LPPHY_GAINDIRECTMISMATCH, 0xFF0F, 0x40); lpphy_baseband_rev2plus_init() 425 b43_phy_maskset(dev, B43_LPPHY_PREAMBLECONFIRMTO, 0xFF00, 0x2); lpphy_baseband_rev2plus_init() 426 b43_phy_mask(dev, B43_LPPHY_CRSGAIN_CTL, ~0x4000); lpphy_baseband_rev2plus_init() 427 b43_phy_mask(dev, B43_LPPHY_CRSGAIN_CTL, ~0x2000); lpphy_baseband_rev2plus_init() 428 b43_phy_set(dev, B43_PHY_OFDM(0x10A), 0x1); lpphy_baseband_rev2plus_init() 429 if (dev->dev->board_rev >= 0x18) { lpphy_baseband_rev2plus_init() 430 b43_lptab_write(dev, B43_LPTAB32(17, 65), 0xEC); lpphy_baseband_rev2plus_init() 431 b43_phy_maskset(dev, B43_PHY_OFDM(0x10A), 0xFF01, 0x14); lpphy_baseband_rev2plus_init() 433 b43_phy_maskset(dev, B43_PHY_OFDM(0x10A), 0xFF01, 0x10); lpphy_baseband_rev2plus_init() 435 b43_phy_maskset(dev, B43_PHY_OFDM(0xDF), 0xFF00, 0xF4); lpphy_baseband_rev2plus_init() 436 b43_phy_maskset(dev, B43_PHY_OFDM(0xDF), 0x00FF, 0xF100); lpphy_baseband_rev2plus_init() 437 b43_phy_write(dev, B43_LPPHY_CLIPTHRESH, 0x48); lpphy_baseband_rev2plus_init() 438 b43_phy_maskset(dev, B43_LPPHY_HIGAINDB, 0xFF00, 0x46); lpphy_baseband_rev2plus_init() 439 b43_phy_maskset(dev, B43_PHY_OFDM(0xE4), 0xFF00, 0x10); lpphy_baseband_rev2plus_init() 440 b43_phy_maskset(dev, B43_LPPHY_PWR_THRESH1, 0xFFF0, 0x9); lpphy_baseband_rev2plus_init() 441 b43_phy_mask(dev, B43_LPPHY_GAINDIRECTMISMATCH, ~0xF); lpphy_baseband_rev2plus_init() 442 b43_phy_maskset(dev, B43_LPPHY_VERYLOWGAINDB, 0x00FF, 0x5500); lpphy_baseband_rev2plus_init() 443 b43_phy_maskset(dev, B43_LPPHY_CLIPCTRTHRESH, 0xFC1F, 0xA0); lpphy_baseband_rev2plus_init() 444 b43_phy_maskset(dev, B43_LPPHY_GAINDIRECTMISMATCH, 0xE0FF, 0x300); lpphy_baseband_rev2plus_init() 445 b43_phy_maskset(dev, B43_LPPHY_HIGAINDB, 0x00FF, 0x2A00); lpphy_baseband_rev2plus_init() 446 if ((dev->dev->chip_id == 0x4325) && (dev->dev->chip_rev == 0)) { lpphy_baseband_rev2plus_init() 447 b43_phy_maskset(dev, B43_LPPHY_LOWGAINDB, 0x00FF, 0x2100); lpphy_baseband_rev2plus_init() 448 b43_phy_maskset(dev, B43_LPPHY_VERYLOWGAINDB, 0xFF00, 0xA); lpphy_baseband_rev2plus_init() 450 b43_phy_maskset(dev, B43_LPPHY_LOWGAINDB, 0x00FF, 0x1E00); lpphy_baseband_rev2plus_init() 451 b43_phy_maskset(dev, B43_LPPHY_VERYLOWGAINDB, 0xFF00, 0xD); lpphy_baseband_rev2plus_init() 453 b43_phy_maskset(dev, B43_PHY_OFDM(0xFE), 0xFFE0, 0x1F); lpphy_baseband_rev2plus_init() 454 b43_phy_maskset(dev, B43_PHY_OFDM(0xFF), 0xFFE0, 0xC); lpphy_baseband_rev2plus_init() 455 b43_phy_maskset(dev, B43_PHY_OFDM(0x100), 0xFF00, 0x19); lpphy_baseband_rev2plus_init() 456 b43_phy_maskset(dev, B43_PHY_OFDM(0xFF), 0x03FF, 0x3C00); lpphy_baseband_rev2plus_init() 457 b43_phy_maskset(dev, B43_PHY_OFDM(0xFE), 0xFC1F, 0x3E0); lpphy_baseband_rev2plus_init() 458 b43_phy_maskset(dev, B43_PHY_OFDM(0xFF), 0xFFE0, 0xC); lpphy_baseband_rev2plus_init() 459 b43_phy_maskset(dev, B43_PHY_OFDM(0x100), 0x00FF, 0x1900); lpphy_baseband_rev2plus_init() 460 b43_phy_maskset(dev, B43_LPPHY_CLIPCTRTHRESH, 0x83FF, 0x5800); lpphy_baseband_rev2plus_init() 461 b43_phy_maskset(dev, B43_LPPHY_CLIPCTRTHRESH, 0xFFE0, 0x12); lpphy_baseband_rev2plus_init() 462 b43_phy_maskset(dev, B43_LPPHY_GAINMISMATCH, 0x0FFF, 0x9000); lpphy_baseband_rev2plus_init() 464 if ((dev->dev->chip_id == 0x4325) && (dev->dev->chip_rev == 0)) { lpphy_baseband_rev2plus_init() 465 b43_lptab_write(dev, B43_LPTAB16(0x08, 0x14), 0); lpphy_baseband_rev2plus_init() 466 b43_lptab_write(dev, B43_LPTAB16(0x08, 0x12), 0x40); lpphy_baseband_rev2plus_init() 469 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) { lpphy_baseband_rev2plus_init() 470 b43_phy_set(dev, B43_LPPHY_CRSGAIN_CTL, 0x40); lpphy_baseband_rev2plus_init() 471 b43_phy_maskset(dev, B43_LPPHY_CRSGAIN_CTL, 0xF0FF, 0xB00); lpphy_baseband_rev2plus_init() 472 b43_phy_maskset(dev, B43_LPPHY_SYNCPEAKCNT, 0xFFF8, 0x6); lpphy_baseband_rev2plus_init() 473 b43_phy_maskset(dev, B43_LPPHY_MINPWR_LEVEL, 0x00FF, 0x9D00); lpphy_baseband_rev2plus_init() 474 b43_phy_maskset(dev, B43_LPPHY_MINPWR_LEVEL, 0xFF00, 0xA1); lpphy_baseband_rev2plus_init() 475 b43_phy_mask(dev, B43_LPPHY_IDLEAFTERPKTRXTO, 0x00FF); lpphy_baseband_rev2plus_init() 477 b43_phy_mask(dev, B43_LPPHY_CRSGAIN_CTL, ~0x40); lpphy_baseband_rev2plus_init() 479 b43_phy_maskset(dev, B43_LPPHY_CRS_ED_THRESH, 0xFF00, 0xB3); lpphy_baseband_rev2plus_init() 480 b43_phy_maskset(dev, B43_LPPHY_CRS_ED_THRESH, 0x00FF, 0xAD00); lpphy_baseband_rev2plus_init() 481 b43_phy_maskset(dev, B43_LPPHY_INPUT_PWRDB, 0xFF00, lpphy->rx_pwr_offset); lpphy_baseband_rev2plus_init() 482 b43_phy_set(dev, B43_LPPHY_RESET_CTL, 0x44); lpphy_baseband_rev2plus_init() 483 b43_phy_write(dev, B43_LPPHY_RESET_CTL, 0x80); lpphy_baseband_rev2plus_init() 484 b43_phy_write(dev, B43_LPPHY_AFE_RSSI_CTL_0, 0xA954); lpphy_baseband_rev2plus_init() 485 b43_phy_write(dev, B43_LPPHY_AFE_RSSI_CTL_1, lpphy_baseband_rev2plus_init() 489 if ((dev->dev->chip_id == 0x4325) && (dev->dev->chip_rev == 0)) { lpphy_baseband_rev2plus_init() 490 b43_phy_set(dev, B43_LPPHY_AFE_ADC_CTL_0, 0x1C); lpphy_baseband_rev2plus_init() 491 b43_phy_maskset(dev, B43_LPPHY_AFE_CTL, 0x00FF, 0x8800); lpphy_baseband_rev2plus_init() 492 b43_phy_maskset(dev, B43_LPPHY_AFE_ADC_CTL_1, 0xFC3C, 0x0400); lpphy_baseband_rev2plus_init() 495 lpphy_save_dig_flt_state(dev); lpphy_baseband_rev2plus_init() 498 static void lpphy_baseband_init(struct b43_wldev dev) lpphy_baseband_init() argument 500 lpphy_table_init(dev); lpphy_baseband_init() 501 if (dev->phy.rev >= 2) lpphy_baseband_init() 502 lpphy_baseband_rev2plus_init(dev); lpphy_baseband_init() 504 lpphy_baseband_rev0_1_init(dev); lpphy_baseband_init() 513 static void lpphy_2062_init(struct b43_wldev dev) lpphy_2062_init() argument 515 struct b43_phy_lp lpphy = dev->phy.lp; lpphy_2062_init() 516 struct ssb_bus bus = dev->dev->sdev->bus; lpphy_2062_init() 536 b2062_upload_init_table(dev); lpphy_2062_init() 538 b43_radio_write(dev, B2062_N_TX_CTL3, 0); lpphy_2062_init() 539 b43_radio_write(dev, B2062_N_TX_CTL4, 0); lpphy_2062_init() 540 b43_radio_write(dev, B2062_N_TX_CTL5, 0); lpphy_2062_init() 541 b43_radio_write(dev, B2062_N_TX_CTL6, 0); lpphy_2062_init() 542 b43_radio_write(dev, B2062_N_PDN_CTL0, 0x40); lpphy_2062_init() 543 b43_radio_write(dev, B2062_N_PDN_CTL0, 0); lpphy_2062_init() 544 b43_radio_write(dev, B2062_N_CALIB_TS, 0x10); lpphy_2062_init() 545 b43_radio_write(dev, B2062_N_CALIB_TS, 0); lpphy_2062_init() 546 if (dev->phy.rev > 0) { lpphy_2062_init() 547 b43_radio_write(dev, B2062_S_BG_CTL1, lpphy_2062_init() 548 (b43_radio_read(dev, B2062_N_COMM2) >> 1) \| 0x80); lpphy_2062_init() 550 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) lpphy_2062_init() 551 b43_radio_set(dev, B2062_N_TSSI_CTL0, 0x1); lpphy_2062_init() 553 b43_radio_mask(dev, B2062_N_TSSI_CTL0, ~0x1); lpphy_2062_init() 563 b43_radio_mask(dev, B2062_S_RFPLL_CTL1, 0xFFFB); lpphy_2062_init() 566 b43_radio_set(dev, B2062_S_RFPLL_CTL1, 0x4); lpphy_2062_init() 571 b43_radio_write(dev, B2062_S_RFPLL_CTL7, tmp); lpphy_2062_init() 575 b43_radio_write(dev, B2062_S_RFPLL_CTL18, tmp); lpphy_2062_init() 579 b43_radio_write(dev, B2062_S_RFPLL_CTL19, tmp); lpphy_2062_init() 591 b43dbg(dev->wl, "b2062: Using crystal tab entry %u kHz.\n", lpphy_2062_init() 594 b43_radio_write(dev, B2062_S_RFPLL_CTL8, lpphy_2062_init() 596 b43_radio_write(dev, B2062_S_RFPLL_CTL9, lpphy_2062_init() 598 b43_radio_write(dev, B2062_S_RFPLL_CTL10, fd->data[4]); lpphy_2062_init() 599 b43_radio_write(dev, B2062_S_RFPLL_CTL11, fd->data[5]); lpphy_2062_init() 603 static void lpphy_2063_init(struct b43_wldev dev) lpphy_2063_init() argument 605 b2063_upload_init_table(dev); lpphy_2063_init() 606 b43_radio_write(dev, B2063_LOGEN_SP5, 0); lpphy_2063_init() 607 b43_radio_set(dev, B2063_COMM8, 0x38); lpphy_2063_init() 608 b43_radio_write(dev, B2063_REG_SP1, 0x56); lpphy_2063_init() 609 b43_radio_mask(dev, B2063_RX_BB_CTL2, ~0x2); lpphy_2063_init() 610 b43_radio_write(dev, B2063_PA_SP7, 0); lpphy_2063_init() 611 b43_radio_write(dev, B2063_TX_RF_SP6, 0x20); lpphy_2063_init() 612 b43_radio_write(dev, B2063_TX_RF_SP9, 0x40); lpphy_2063_init() 613 if (dev->phy.rev == 2) { lpphy_2063_init() 614 b43_radio_write(dev, B2063_PA_SP3, 0xa0); lpphy_2063_init() 615 b43_radio_write(dev, B2063_PA_SP4, 0xa0); lpphy_2063_init() 616 b43_radio_write(dev, B2063_PA_SP2, 0x18); lpphy_2063_init() 618 b43_radio_write(dev, B2063_PA_SP3, 0x20); lpphy_2063_init() 619 b43_radio_write(dev, B2063_PA_SP2, 0x20); lpphy_2063_init() 663 static void lpphy_sync_stx(struct b43_wldev dev) lpphy_sync_stx() argument 671 tmp = b43_radio_read(dev, e->rf_addr); lpphy_sync_stx() 674 b43_phy_maskset(dev, B43_PHY_OFDM(0xF2 + e->phy_offset), lpphy_sync_stx() 679 static void lpphy_radio_init(struct b43_wldev dev) lpphy_radio_init() argument 682 b43_phy_set(dev, B43_LPPHY_FOURWIRE_CTL, 0x2); lpphy_radio_init() 684 b43_phy_mask(dev, B43_LPPHY_FOURWIRE_CTL, 0xFFFD); lpphy_radio_init() 687 if (dev->phy.radio_ver == 0x2062) { lpphy_radio_init() 688 lpphy_2062_init(dev); lpphy_radio_init() 690 lpphy_2063_init(dev); lpphy_radio_init() 691 lpphy_sync_stx(dev); lpphy_radio_init() 692 b43_phy_write(dev, B43_PHY_OFDM(0xF0), 0x5F80); lpphy_radio_init() 693 b43_phy_write(dev, B43_PHY_OFDM(0xF1), 0); lpphy_radio_init() 694 if (dev->dev->chip_id == 0x4325) { lpphy_radio_init() 702 static void lpphy_set_rc_cap(struct b43_wldev dev) lpphy_set_rc_cap() argument 704 struct b43_phy_lp lpphy = dev->phy.lp; lpphy_set_rc_cap() 708 if (dev->phy.rev == 1) //FIXME check channel 14! lpphy_set_rc_cap() 711 b43_radio_write(dev, B2062_N_RXBB_CALIB2, lpphy_set_rc_cap() 713 b43_radio_write(dev, B2062_N_TX_CTL_A, rc_cap \| 0x80); lpphy_set_rc_cap() 714 b43_radio_write(dev, B2062_S_RXG_CNT16, lpphy_set_rc_cap() 718 static u8 lpphy_get_bb_mult(struct b43_wldev dev) lpphy_get_bb_mult() argument 720 return (b43_lptab_read(dev, B43_LPTAB16(0, 87)) & 0xFF00) >> 8; lpphy_get_bb_mult() 723 static void lpphy_set_bb_mult(struct b43_wldev dev, u8 bb_mult) lpphy_set_bb_mult() argument 725 b43_lptab_write(dev, B43_LPTAB16(0, 87), (u16)bb_mult << 8); lpphy_set_bb_mult() 728 static void lpphy_set_deaf(struct b43_wldev dev, bool user) lpphy_set_deaf() argument 730 struct b43_phy_lp lpphy = dev->phy.lp; lpphy_set_deaf() 736 b43_phy_maskset(dev, B43_LPPHY_CRSGAIN_CTL, 0xFF1F, 0x80); lpphy_set_deaf() 739 static void lpphy_clear_deaf(struct b43_wldev dev, bool user) lpphy_clear_deaf() argument 741 struct b43_phy_lp lpphy = dev->phy.lp; lpphy_clear_deaf() 749 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) lpphy_clear_deaf() 750 b43_phy_maskset(dev, B43_LPPHY_CRSGAIN_CTL, lpphy_clear_deaf() 753 b43_phy_maskset(dev, B43_LPPHY_CRSGAIN_CTL, lpphy_clear_deaf() 758 static void lpphy_set_trsw_over(struct b43_wldev dev, bool tx, bool rx) lpphy_set_trsw_over() argument 761 b43_phy_maskset(dev, B43_LPPHY_RF_OVERRIDE_VAL_0, 0xFFFC, trsw); lpphy_set_trsw_over() 762 b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_0, 0x3); lpphy_set_trsw_over() 765 static void lpphy_disable_crs(struct b43_wldev dev, bool user) lpphy_disable_crs() argument 767 lpphy_set_deaf(dev, user); lpphy_disable_crs() 768 lpphy_set_trsw_over(dev, false, true); lpphy_disable_crs() 769 b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_VAL_0, 0xFFFB); lpphy_disable_crs() 770 b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_0, 0x4); lpphy_disable_crs() 771 b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_VAL_0, 0xFFF7); lpphy_disable_crs() 772 b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_0, 0x8); lpphy_disable_crs() 773 b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_VAL_0, 0x10); lpphy_disable_crs() 774 b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_0, 0x10); lpphy_disable_crs() 775 b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_VAL_0, 0xFFDF); lpphy_disable_crs() 776 b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_0, 0x20); lpphy_disable_crs() 777 b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_VAL_0, 0xFFBF); lpphy_disable_crs() 778 b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_0, 0x40); lpphy_disable_crs() 779 b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_2_VAL, 0x7); lpphy_disable_crs() 780 b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_2_VAL, 0x38); lpphy_disable_crs() 781 b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_2_VAL, 0xFF3F); lpphy_disable_crs() 782 b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_2_VAL, 0x100); lpphy_disable_crs() 783 b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_2_VAL, 0xFDFF); lpphy_disable_crs() 784 b43_phy_write(dev, B43_LPPHY_PS_CTL_OVERRIDE_VAL0, 0); lpphy_disable_crs() 785 b43_phy_write(dev, B43_LPPHY_PS_CTL_OVERRIDE_VAL1, 1); lpphy_disable_crs() 786 b43_phy_write(dev, B43_LPPHY_PS_CTL_OVERRIDE_VAL2, 0x20); lpphy_disable_crs() 787 b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_2_VAL, 0xFBFF); lpphy_disable_crs() 788 b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_2_VAL, 0xF7FF); lpphy_disable_crs() 789 b43_phy_write(dev, B43_LPPHY_TX_GAIN_CTL_OVERRIDE_VAL, 0); lpphy_disable_crs() 790 b43_phy_write(dev, B43_LPPHY_RX_GAIN_CTL_OVERRIDE_VAL, 0x45AF); lpphy_disable_crs() 791 b43_phy_write(dev, B43_LPPHY_RF_OVERRIDE_2, 0x3FF); lpphy_disable_crs() 794 static void lpphy_restore_crs(struct b43_wldev dev, bool user) lpphy_restore_crs() argument 796 lpphy_clear_deaf(dev, user); lpphy_restore_crs() 797 b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_0, 0xFF80); lpphy_restore_crs() 798 b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_2, 0xFC00); lpphy_restore_crs() 803 static void lpphy_disable_rx_gain_override(struct b43_wldev dev) lpphy_disable_rx_gain_override() argument 805 b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_0, 0xFFFE); lpphy_disable_rx_gain_override() 806 b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_0, 0xFFEF); lpphy_disable_rx_gain_override() 807 b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_0, 0xFFBF); lpphy_disable_rx_gain_override() 808 if (dev->phy.rev >= 2) { lpphy_disable_rx_gain_override() 809 b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_2, 0xFEFF); lpphy_disable_rx_gain_override() 810 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) { lpphy_disable_rx_gain_override() 811 b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_2, 0xFBFF); lpphy_disable_rx_gain_override() 812 b43_phy_mask(dev, B43_PHY_OFDM(0xE5), 0xFFF7); lpphy_disable_rx_gain_override() 815 b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_2, 0xFDFF); lpphy_disable_rx_gain_override() 819 static void lpphy_enable_rx_gain_override(struct b43_wldev dev) lpphy_enable_rx_gain_override() argument 821 b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_0, 0x1); lpphy_enable_rx_gain_override() 822 b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_0, 0x10); lpphy_enable_rx_gain_override() 823 b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_0, 0x40); lpphy_enable_rx_gain_override() 824 if (dev->phy.rev >= 2) { lpphy_enable_rx_gain_override() 825 b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_2, 0x100); lpphy_enable_rx_gain_override() 826 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) { lpphy_enable_rx_gain_override() 827 b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_2, 0x400); lpphy_enable_rx_gain_override() 828 b43_phy_set(dev, B43_PHY_OFDM(0xE5), 0x8); lpphy_enable_rx_gain_override() 831 b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_2, 0x200); lpphy_enable_rx_gain_override() 835 static void lpphy_disable_tx_gain_override(struct b43_wldev dev) lpphy_disable_tx_gain_override() argument 837 if (dev->phy.rev < 2) lpphy_disable_tx_gain_override() 838 b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_2, 0xFEFF); lpphy_disable_tx_gain_override() 840 b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_2, 0xFF7F); lpphy_disable_tx_gain_override() 841 b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_2, 0xBFFF); lpphy_disable_tx_gain_override() 843 b43_phy_mask(dev, B43_LPPHY_AFE_CTL_OVR, 0xFFBF); lpphy_disable_tx_gain_override() 846 static void lpphy_enable_tx_gain_override(struct b43_wldev dev) lpphy_enable_tx_gain_override() argument 848 if (dev->phy.rev < 2) lpphy_enable_tx_gain_override() 849 b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_2, 0x100); lpphy_enable_tx_gain_override() 851 b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_2, 0x80); lpphy_enable_tx_gain_override() 852 b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_2, 0x4000); lpphy_enable_tx_gain_override() 854 b43_phy_set(dev, B43_LPPHY_AFE_CTL_OVR, 0x40); lpphy_enable_tx_gain_override() 857 static struct lpphy_tx_gains lpphy_get_tx_gains(struct b43_wldev dev) lpphy_get_tx_gains() argument 862 gains.dac = (b43_phy_read(dev, B43_LPPHY_AFE_DAC_CTL) & 0x380) >> 7; lpphy_get_tx_gains() 863 if (dev->phy.rev < 2) { lpphy_get_tx_gains() 864 tmp = b43_phy_read(dev, lpphy_get_tx_gains() 870 tmp = b43_phy_read(dev, B43_LPPHY_TX_GAIN_CTL_OVERRIDE_VAL); lpphy_get_tx_gains() 871 gains.pad = b43_phy_read(dev, B43_PHY_OFDM(0xFB)) & 0xFF; lpphy_get_tx_gains() 879 static void lpphy_set_dac_gain(struct b43_wldev dev, u16 dac) lpphy_set_dac_gain() argument 881 u16 ctl = b43_phy_read(dev, B43_LPPHY_AFE_DAC_CTL) & 0xC7F; lpphy_set_dac_gain() 883 b43_phy_maskset(dev, B43_LPPHY_AFE_DAC_CTL, 0xF000, ctl); lpphy_set_dac_gain() 886 static u16 lpphy_get_pa_gain(struct b43_wldev dev) lpphy_get_pa_gain() argument 888 return b43_phy_read(dev, B43_PHY_OFDM(0xFB)) & 0x7F; lpphy_get_pa_gain() 891 static void lpphy_set_pa_gain(struct b43_wldev dev, u16 gain) lpphy_set_pa_gain() argument 893 b43_phy_maskset(dev, B43_PHY_OFDM(0xFB), 0xE03F, gain << 6); lpphy_set_pa_gain() 894 b43_phy_maskset(dev, B43_PHY_OFDM(0xFD), 0x80FF, gain << 8); lpphy_set_pa_gain() 897 static void lpphy_set_tx_gains(struct b43_wldev dev, lpphy_set_tx_gains() argument 902 if (dev->phy.rev < 2) { lpphy_set_tx_gains() 904 b43_phy_maskset(dev, B43_LPPHY_TX_GAIN_CTL_OVERRIDE_VAL, lpphy_set_tx_gains() 907 pa_gain = lpphy_get_pa_gain(dev); lpphy_set_tx_gains() 908 b43_phy_write(dev, B43_LPPHY_TX_GAIN_CTL_OVERRIDE_VAL, lpphy_set_tx_gains() 914 b43_phy_maskset(dev, B43_PHY_OFDM(0xFB), lpphy_set_tx_gains() 916 b43_phy_write(dev, B43_PHY_OFDM(0xFC), lpphy_set_tx_gains() 918 b43_phy_maskset(dev, B43_PHY_OFDM(0xFD), lpphy_set_tx_gains() 921 lpphy_set_dac_gain(dev, gains.dac); lpphy_set_tx_gains() 922 lpphy_enable_tx_gain_override(dev); lpphy_set_tx_gains() 925 static void lpphy_rev0_1_set_rx_gain(struct b43_wldev dev, u32 gain) lpphy_rev0_1_set_rx_gain() argument 931 b43_phy_maskset(dev, B43_LPPHY_RF_OVERRIDE_VAL_0, 0xFFFE, trsw); lpphy_rev0_1_set_rx_gain() 932 b43_phy_maskset(dev, B43_LPPHY_RF_OVERRIDE_2_VAL, lpphy_rev0_1_set_rx_gain() 934 b43_phy_maskset(dev, B43_LPPHY_RF_OVERRIDE_2_VAL, lpphy_rev0_1_set_rx_gain() 936 b43_phy_write(dev, B43_LPPHY_RX_GAIN_CTL_OVERRIDE_VAL, lna); lpphy_rev0_1_set_rx_gain() 939 static void lpphy_rev2plus_set_rx_gain(struct b43_wldev dev, u32 gain) lpphy_rev2plus_set_rx_gain() argument 947 b43_phy_maskset(dev, B43_LPPHY_RF_OVERRIDE_VAL_0, 0xFFFE, trsw); lpphy_rev2plus_set_rx_gain() 948 b43_phy_maskset(dev, B43_LPPHY_RF_OVERRIDE_2_VAL, lpphy_rev2plus_set_rx_gain() 950 b43_phy_maskset(dev, B43_LPPHY_RF_OVERRIDE_2_VAL, lpphy_rev2plus_set_rx_gain() 952 b43_phy_write(dev, B43_LPPHY_RX_GAIN_CTL_OVERRIDE_VAL, low_gain); lpphy_rev2plus_set_rx_gain() 953 b43_phy_maskset(dev, B43_LPPHY_AFE_DDFS, 0xFFF0, high_gain); lpphy_rev2plus_set_rx_gain() 954 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) { lpphy_rev2plus_set_rx_gain() 956 b43_phy_maskset(dev, B43_LPPHY_RF_OVERRIDE_2_VAL, lpphy_rev2plus_set_rx_gain() 958 b43_phy_maskset(dev, B43_PHY_OFDM(0xE6), 0xFFE7, tmp << 3); lpphy_rev2plus_set_rx_gain() 962 static void lpphy_set_rx_gain(struct b43_wldev dev, u32 gain) lpphy_set_rx_gain() argument 964 if (dev->phy.rev < 2) lpphy_set_rx_gain() 965 lpphy_rev0_1_set_rx_gain(dev, gain); lpphy_set_rx_gain() 967 lpphy_rev2plus_set_rx_gain(dev, gain); lpphy_set_rx_gain() 968 lpphy_enable_rx_gain_override(dev); lpphy_set_rx_gain() 971 static void lpphy_set_rx_gain_by_index(struct b43_wldev dev, u16 idx) lpphy_set_rx_gain_by_index() argument 973 u32 gain = b43_lptab_read(dev, B43_LPTAB16(12, idx)); lpphy_set_rx_gain_by_index() 974 lpphy_set_rx_gain(dev, gain); lpphy_set_rx_gain_by_index() 977 static void lpphy_stop_ddfs(struct b43_wldev dev) lpphy_stop_ddfs() argument 979 b43_phy_mask(dev, B43_LPPHY_AFE_DDFS, 0xFFFD); lpphy_stop_ddfs() 980 b43_phy_mask(dev, B43_LPPHY_LP_PHY_CTL, 0xFFDF); lpphy_stop_ddfs() 983 static void lpphy_run_ddfs(struct b43_wldev dev, int i_on, int q_on, lpphy_run_ddfs() argument 986 lpphy_stop_ddfs(dev); lpphy_run_ddfs() 987 b43_phy_mask(dev, B43_LPPHY_AFE_DDFS_POINTER_INIT, 0xFF80); lpphy_run_ddfs() 988 b43_phy_mask(dev, B43_LPPHY_AFE_DDFS_POINTER_INIT, 0x80FF); lpphy_run_ddfs() 989 b43_phy_maskset(dev, B43_LPPHY_AFE_DDFS_INCR_INIT, 0xFF80, incr1); lpphy_run_ddfs() 990 b43_phy_maskset(dev, B43_LPPHY_AFE_DDFS_INCR_INIT, 0x80FF, incr2 << 8); lpphy_run_ddfs() 991 b43_phy_maskset(dev, B43_LPPHY_AFE_DDFS, 0xFFF7, i_on << 3); lpphy_run_ddfs() 992 b43_phy_maskset(dev, B43_LPPHY_AFE_DDFS, 0xFFEF, q_on << 4); lpphy_run_ddfs() 993 b43_phy_maskset(dev, B43_LPPHY_AFE_DDFS, 0xFF9F, scale_idx << 5); lpphy_run_ddfs() 994 b43_phy_mask(dev, B43_LPPHY_AFE_DDFS, 0xFFFB); lpphy_run_ddfs() 995 b43_phy_set(dev, B43_LPPHY_AFE_DDFS, 0x2); lpphy_run_ddfs() 996 b43_phy_set(dev, B43_LPPHY_LP_PHY_CTL, 0x20); lpphy_run_ddfs() 999 static bool lpphy_rx_iq_est(struct b43_wldev dev, u16 samples, u8 time, lpphy_rx_iq_est() argument 1004 b43_phy_mask(dev, B43_LPPHY_CRSGAIN_CTL, 0xFFF7); lpphy_rx_iq_est() 1005 b43_phy_write(dev, B43_LPPHY_IQ_NUM_SMPLS_ADDR, samples); lpphy_rx_iq_est() 1006 b43_phy_maskset(dev, B43_LPPHY_IQ_ENABLE_WAIT_TIME_ADDR, 0xFF00, time); lpphy_rx_iq_est() 1007 b43_phy_mask(dev, B43_LPPHY_IQ_ENABLE_WAIT_TIME_ADDR, 0xFEFF); lpphy_rx_iq_est() 1008 b43_phy_set(dev, B43_LPPHY_IQ_ENABLE_WAIT_TIME_ADDR, 0x200); lpphy_rx_iq_est() 1011 if (!(b43_phy_read(dev, lpphy_rx_iq_est() 1017 if ((b43_phy_read(dev, B43_LPPHY_IQ_ENABLE_WAIT_TIME_ADDR) & 0x200)) { lpphy_rx_iq_est() 1018 b43_phy_set(dev, B43_LPPHY_CRSGAIN_CTL, 0x8); lpphy_rx_iq_est() 1022 iq_est->iq_prod = b43_phy_read(dev, B43_LPPHY_IQ_ACC_HI_ADDR); lpphy_rx_iq_est() 1024 iq_est->iq_prod \|= b43_phy_read(dev, B43_LPPHY_IQ_ACC_LO_ADDR); lpphy_rx_iq_est() 1026 iq_est->i_pwr = b43_phy_read(dev, B43_LPPHY_IQ_I_PWR_ACC_HI_ADDR); lpphy_rx_iq_est() 1028 iq_est->i_pwr \|= b43_phy_read(dev, B43_LPPHY_IQ_I_PWR_ACC_LO_ADDR); lpphy_rx_iq_est() 1030 iq_est->q_pwr = b43_phy_read(dev, B43_LPPHY_IQ_Q_PWR_ACC_HI_ADDR); lpphy_rx_iq_est() 1032 iq_est->q_pwr \|= b43_phy_read(dev, B43_LPPHY_IQ_Q_PWR_ACC_LO_ADDR); lpphy_rx_iq_est() 1034 b43_phy_set(dev, B43_LPPHY_CRSGAIN_CTL, 0x8); lpphy_rx_iq_est() 1038 static int lpphy_loopback(struct b43_wldev dev) lpphy_loopback() argument 1046 lpphy_set_trsw_over(dev, true, true); lpphy_loopback() 1047 b43_phy_set(dev, B43_LPPHY_AFE_CTL_OVR, 1); lpphy_loopback() 1048 b43_phy_mask(dev, B43_LPPHY_AFE_CTL_OVRVAL, 0xFFFE); lpphy_loopback() 1049 b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_0, 0x800); lpphy_loopback() 1050 b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_VAL_0, 0x800); lpphy_loopback() 1051 b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_0, 0x8); lpphy_loopback() 1052 b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_VAL_0, 0x8); lpphy_loopback() 1053 b43_radio_write(dev, B2062_N_TX_CTL_A, 0x80); lpphy_loopback() 1054 b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_0, 0x80); lpphy_loopback() 1055 b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_VAL_0, 0x80); lpphy_loopback() 1057 lpphy_set_rx_gain_by_index(dev, i); lpphy_loopback() 1058 lpphy_run_ddfs(dev, 1, 1, 5, 5, 0); lpphy_loopback() 1059 if (!(lpphy_rx_iq_est(dev, 1000, 32, &iq_est))) lpphy_loopback() 1067 lpphy_stop_ddfs(dev); lpphy_loopback() 1098 static void lpphy_read_tx_pctl_mode_from_hardware(struct b43_wldev dev) lpphy_read_tx_pctl_mode_from_hardware() argument 1100 struct b43_phy_lp lpphy = dev->phy.lp; lpphy_read_tx_pctl_mode_from_hardware() 1103 ctl = b43_phy_read(dev, B43_LPPHY_TX_PWR_CTL_CMD); lpphy_read_tx_pctl_mode_from_hardware() 1122 static void lpphy_write_tx_pctl_mode_to_hardware(struct b43_wldev dev) lpphy_write_tx_pctl_mode_to_hardware() argument 1124 struct b43_phy_lp lpphy = dev->phy.lp; lpphy_write_tx_pctl_mode_to_hardware() 1141 b43_phy_maskset(dev, B43_LPPHY_TX_PWR_CTL_CMD, lpphy_write_tx_pctl_mode_to_hardware() 1145 static void lpphy_set_tx_power_control(struct b43_wldev dev, lpphy_set_tx_power_control() argument 1148 struct b43_phy_lp lpphy = dev->phy.lp; lpphy_set_tx_power_control() 1151 lpphy_read_tx_pctl_mode_from_hardware(dev); lpphy_set_tx_power_control() 1163 b43_phy_maskset(dev, B43_LPPHY_TX_PWR_CTL_CMD, lpphy_set_tx_power_control() 1165 b43_phy_maskset(dev, B43_LPPHY_TX_PWR_CTL_NNUM, lpphy_set_tx_power_control() 1168 lpphy_disable_tx_gain_override(dev); lpphy_set_tx_power_control() 1172 if (dev->phy.rev >= 2) { lpphy_set_tx_power_control() 1174 b43_phy_set(dev, B43_PHY_OFDM(0xD0), 0x2); lpphy_set_tx_power_control() 1176 b43_phy_mask(dev, B43_PHY_OFDM(0xD0), 0xFFFD); lpphy_set_tx_power_control() 1178 lpphy_write_tx_pctl_mode_to_hardware(dev); lpphy_set_tx_power_control() 1181 static int b43_lpphy_op_switch_channel(struct b43_wldev dev, 1184 static void lpphy_rev0_1_rc_calib(struct b43_wldev dev) lpphy_rev0_1_rc_calib() argument 1186 struct b43_phy_lp lpphy = dev->phy.lp; lpphy_rev0_1_rc_calib() 1205 err = b43_lpphy_op_switch_channel(dev, 7); lpphy_rev0_1_rc_calib() 1207 b43dbg(dev->wl, lpphy_rev0_1_rc_calib() 1211 old_txg_ovr = !!(b43_phy_read(dev, B43_LPPHY_AFE_CTL_OVR) & 0x40); lpphy_rev0_1_rc_calib() 1212 old_bbmult = lpphy_get_bb_mult(dev); lpphy_rev0_1_rc_calib() 1214 tx_gains = lpphy_get_tx_gains(dev); lpphy_rev0_1_rc_calib() 1215 old_rf_ovr = b43_phy_read(dev, B43_LPPHY_RF_OVERRIDE_0); lpphy_rev0_1_rc_calib() 1216 old_rf_ovrval = b43_phy_read(dev, B43_LPPHY_RF_OVERRIDE_VAL_0); lpphy_rev0_1_rc_calib() 1217 old_afe_ovr = b43_phy_read(dev, B43_LPPHY_AFE_CTL_OVR); lpphy_rev0_1_rc_calib() 1218 old_afe_ovrval = b43_phy_read(dev, B43_LPPHY_AFE_CTL_OVRVAL); lpphy_rev0_1_rc_calib() 1219 old_rf2_ovr = b43_phy_read(dev, B43_LPPHY_RF_OVERRIDE_2); lpphy_rev0_1_rc_calib() 1220 old_rf2_ovrval = b43_phy_read(dev, B43_LPPHY_RF_OVERRIDE_2_VAL); lpphy_rev0_1_rc_calib() 1221 old_phy_ctl = b43_phy_read(dev, B43_LPPHY_LP_PHY_CTL); lpphy_rev0_1_rc_calib() 1222 lpphy_read_tx_pctl_mode_from_hardware(dev); lpphy_rev0_1_rc_calib() 1225 lpphy_set_tx_power_control(dev, B43_LPPHY_TXPCTL_OFF); lpphy_rev0_1_rc_calib() 1226 lpphy_disable_crs(dev, true); lpphy_rev0_1_rc_calib() 1227 loopback = lpphy_loopback(dev); lpphy_rev0_1_rc_calib() 1230 lpphy_set_rx_gain_by_index(dev, loopback); lpphy_rev0_1_rc_calib() 1231 b43_phy_maskset(dev, B43_LPPHY_LP_PHY_CTL, 0xFFBF, 0x40); lpphy_rev0_1_rc_calib() 1232 b43_phy_maskset(dev, B43_LPPHY_RF_OVERRIDE_2_VAL, 0xFFF8, 0x1); lpphy_rev0_1_rc_calib() 1233 b43_phy_maskset(dev, B43_LPPHY_RF_OVERRIDE_2_VAL, 0xFFC7, 0x8); lpphy_rev0_1_rc_calib() 1234 b43_phy_maskset(dev, B43_LPPHY_RF_OVERRIDE_2_VAL, 0xFF3F, 0xC0); lpphy_rev0_1_rc_calib() 1236 b43_radio_write(dev, B2062_N_RXBB_CALIB2, i); lpphy_rev0_1_rc_calib() 1239 lpphy_run_ddfs(dev, 1, 1, j, j, 0); lpphy_rev0_1_rc_calib() 1240 if (!(lpphy_rx_iq_est(dev, 1000, 32, &iq_est))) lpphy_rev0_1_rc_calib() 1256 lpphy_stop_ddfs(dev); lpphy_rev0_1_rc_calib() 1259 lpphy_restore_crs(dev, true); lpphy_rev0_1_rc_calib() 1260 b43_phy_write(dev, B43_LPPHY_RF_OVERRIDE_VAL_0, old_rf_ovrval); lpphy_rev0_1_rc_calib() 1261 b43_phy_write(dev, B43_LPPHY_RF_OVERRIDE_0, old_rf_ovr); lpphy_rev0_1_rc_calib() 1262 b43_phy_write(dev, B43_LPPHY_AFE_CTL_OVRVAL, old_afe_ovrval); lpphy_rev0_1_rc_calib() 1263 b43_phy_write(dev, B43_LPPHY_AFE_CTL_OVR, old_afe_ovr); lpphy_rev0_1_rc_calib() 1264 b43_phy_write(dev, B43_LPPHY_RF_OVERRIDE_2_VAL, old_rf2_ovrval); lpphy_rev0_1_rc_calib() 1265 b43_phy_write(dev, B43_LPPHY_RF_OVERRIDE_2, old_rf2_ovr); lpphy_rev0_1_rc_calib() 1266 b43_phy_write(dev, B43_LPPHY_LP_PHY_CTL, old_phy_ctl); lpphy_rev0_1_rc_calib() 1268 lpphy_set_bb_mult(dev, old_bbmult); lpphy_rev0_1_rc_calib() 1277 lpphy_set_tx_gains(dev, tx_gains); lpphy_rev0_1_rc_calib() 1279 lpphy_set_tx_power_control(dev, old_txpctl); lpphy_rev0_1_rc_calib() 1281 lpphy_set_rc_cap(dev); lpphy_rev0_1_rc_calib() 1284 static void lpphy_rev2plus_rc_calib(struct b43_wldev dev) lpphy_rev2plus_rc_calib() argument 1286 struct ssb_bus bus = dev->dev->sdev->bus; lpphy_rev2plus_rc_calib() 1288 u8 tmp = b43_radio_read(dev, B2063_RX_BB_SP8) & 0xFF; lpphy_rev2plus_rc_calib() 1291 b43_radio_write(dev, B2063_RX_BB_SP8, 0x0); lpphy_rev2plus_rc_calib() 1292 b43_radio_write(dev, B2063_RC_CALIB_CTL1, 0x7E); lpphy_rev2plus_rc_calib() 1293 b43_radio_mask(dev, B2063_PLL_SP1, 0xF7); lpphy_rev2plus_rc_calib() 1294 b43_radio_write(dev, B2063_RC_CALIB_CTL1, 0x7C); lpphy_rev2plus_rc_calib() 1295 b43_radio_write(dev, B2063_RC_CALIB_CTL2, 0x15); lpphy_rev2plus_rc_calib() 1296 b43_radio_write(dev, B2063_RC_CALIB_CTL3, 0x70); lpphy_rev2plus_rc_calib() 1297 b43_radio_write(dev, B2063_RC_CALIB_CTL4, 0x52); lpphy_rev2plus_rc_calib() 1298 b43_radio_write(dev, B2063_RC_CALIB_CTL5, 0x1); lpphy_rev2plus_rc_calib() 1299 b43_radio_write(dev, B2063_RC_CALIB_CTL1, 0x7D); lpphy_rev2plus_rc_calib() 1302 if (b43_radio_read(dev, B2063_RC_CALIB_CTL6) & 0x2) lpphy_rev2plus_rc_calib() 1307 if (!(b43_radio_read(dev, B2063_RC_CALIB_CTL6) & 0x2)) lpphy_rev2plus_rc_calib() 1308 b43_radio_write(dev, B2063_RX_BB_SP8, tmp); lpphy_rev2plus_rc_calib() 1310 tmp = b43_radio_read(dev, B2063_TX_BB_SP3) & 0xFF; lpphy_rev2plus_rc_calib() 1312 b43_radio_write(dev, B2063_TX_BB_SP3, 0x0); lpphy_rev2plus_rc_calib() 1313 b43_radio_write(dev, B2063_RC_CALIB_CTL1, 0x7E); lpphy_rev2plus_rc_calib() 1314 b43_radio_write(dev, B2063_RC_CALIB_CTL1, 0x7C); lpphy_rev2plus_rc_calib() 1315 b43_radio_write(dev, B2063_RC_CALIB_CTL2, 0x55); lpphy_rev2plus_rc_calib() 1316 b43_radio_write(dev, B2063_RC_CALIB_CTL3, 0x76); lpphy_rev2plus_rc_calib() 1319 b43_radio_write(dev, B2063_RC_CALIB_CTL4, 0xFC); lpphy_rev2plus_rc_calib() 1320 b43_radio_write(dev, B2063_RC_CALIB_CTL5, 0x0); lpphy_rev2plus_rc_calib() 1322 b43_radio_write(dev, B2063_RC_CALIB_CTL4, 0x13); lpphy_rev2plus_rc_calib() 1323 b43_radio_write(dev, B2063_RC_CALIB_CTL5, 0x1); lpphy_rev2plus_rc_calib() 1326 b43_radio_write(dev, B2063_PA_SP7, 0x7D); lpphy_rev2plus_rc_calib() 1329 if (b43_radio_read(dev, B2063_RC_CALIB_CTL6) & 0x2) lpphy_rev2plus_rc_calib() 1334 if (!(b43_radio_read(dev, B2063_RC_CALIB_CTL6) & 0x2)) lpphy_rev2plus_rc_calib() 1335 b43_radio_write(dev, B2063_TX_BB_SP3, tmp); lpphy_rev2plus_rc_calib() 1337 b43_radio_write(dev, B2063_RC_CALIB_CTL1, 0x7E); lpphy_rev2plus_rc_calib() 1340 static void lpphy_calibrate_rc(struct b43_wldev dev) lpphy_calibrate_rc() argument 1342 struct b43_phy_lp lpphy = dev->phy.lp; lpphy_calibrate_rc() 1344 if (dev->phy.rev >= 2) { lpphy_calibrate_rc() 1345 lpphy_rev2plus_rc_calib(dev); lpphy_calibrate_rc() 1347 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) lpphy_calibrate_rc() 1348 lpphy_rev0_1_rc_calib(dev); lpphy_calibrate_rc() 1350 lpphy_set_rc_cap(dev); lpphy_calibrate_rc() 1354 static void b43_lpphy_op_set_rx_antenna(struct b43_wldev dev, int antenna) b43_lpphy_op_set_rx_antenna() argument 1356 if (dev->phy.rev >= 2) b43_lpphy_op_set_rx_antenna() 1362 b43_hf_write(dev, b43_hf_read(dev) & ~B43_HF_ANTDIVHELP); b43_lpphy_op_set_rx_antenna() 1364 b43_phy_maskset(dev, B43_LPPHY_CRSGAIN_CTL, 0xFFFD, antenna & 0x2); b43_lpphy_op_set_rx_antenna() 1365 b43_phy_maskset(dev, B43_LPPHY_CRSGAIN_CTL, 0xFFFE, antenna & 0x1); b43_lpphy_op_set_rx_antenna() 1367 b43_hf_write(dev, b43_hf_read(dev) \| B43_HF_ANTDIVHELP); b43_lpphy_op_set_rx_antenna() 1369 dev->phy.lp->antenna = antenna; b43_lpphy_op_set_rx_antenna() 1372 static void lpphy_set_tx_iqcc(struct b43_wldev dev, u16 a, u16 b) lpphy_set_tx_iqcc() argument 1378 b43_lptab_write_bulk(dev, B43_LPTAB16(0, 80), 2, tmp); lpphy_set_tx_iqcc() 1381 static void lpphy_set_tx_power_by_index(struct b43_wldev dev, u8 index) lpphy_set_tx_power_by_index() argument 1383 struct b43_phy_lp lpphy = dev->phy.lp; lpphy_set_tx_power_by_index() 1388 lpphy_read_tx_pctl_mode_from_hardware(dev); lpphy_set_tx_power_by_index() 1390 lpphy_set_tx_power_control(dev, B43_LPPHY_TXPCTL_SW); lpphy_set_tx_power_by_index() 1391 if (dev->phy.rev >= 2) { lpphy_set_tx_power_by_index() 1392 iq_comp = b43_lptab_read(dev, B43_LPTAB32(7, index + 320)); lpphy_set_tx_power_by_index() 1393 tx_gain = b43_lptab_read(dev, B43_LPTAB32(7, index + 192)); lpphy_set_tx_power_by_index() 1398 lpphy_set_tx_gains(dev, gains); lpphy_set_tx_power_by_index() 1400 iq_comp = b43_lptab_read(dev, B43_LPTAB32(10, index + 320)); lpphy_set_tx_power_by_index() 1401 tx_gain = b43_lptab_read(dev, B43_LPTAB32(10, index + 192)); lpphy_set_tx_power_by_index() 1402 b43_phy_maskset(dev, B43_LPPHY_TX_GAIN_CTL_OVERRIDE_VAL, lpphy_set_tx_power_by_index() 1404 lpphy_set_dac_gain(dev, tx_gain & 0x7); lpphy_set_tx_power_by_index() 1405 lpphy_set_pa_gain(dev, (tx_gain >> 24) & 0x7F); lpphy_set_tx_power_by_index() 1407 lpphy_set_bb_mult(dev, (iq_comp >> 20) & 0xFF); lpphy_set_tx_power_by_index() 1408 lpphy_set_tx_iqcc(dev, (iq_comp >> 10) & 0x3FF, iq_comp & 0x3FF); lpphy_set_tx_power_by_index() 1409 if (dev->phy.rev >= 2) { lpphy_set_tx_power_by_index() 1410 coeff = b43_lptab_read(dev, B43_LPTAB32(7, index + 448)); lpphy_set_tx_power_by_index() 1412 coeff = b43_lptab_read(dev, B43_LPTAB32(10, index + 448)); lpphy_set_tx_power_by_index() 1414 b43_lptab_write(dev, B43_LPTAB16(0, 85), coeff & 0xFFFF); lpphy_set_tx_power_by_index() 1415 if (dev->phy.rev >= 2) { lpphy_set_tx_power_by_index() 1416 rf_power = b43_lptab_read(dev, B43_LPTAB32(7, index + 576)); lpphy_set_tx_power_by_index() 1417 b43_phy_maskset(dev, B43_LPPHY_RF_PWR_OVERRIDE, 0xFF00, lpphy_set_tx_power_by_index() 1420 lpphy_enable_tx_gain_override(dev); lpphy_set_tx_power_by_index() 1423 static void lpphy_btcoex_override(struct b43_wldev dev) lpphy_btcoex_override() argument 1425 b43_write16(dev, B43_MMIO_BTCOEX_CTL, 0x3); lpphy_btcoex_override() 1426 b43_write16(dev, B43_MMIO_BTCOEX_TXCTL, 0xFF); lpphy_btcoex_override() 1429 static void b43_lpphy_op_software_rfkill(struct b43_wldev dev, b43_lpphy_op_software_rfkill() argument 1434 if (dev->phy.rev >= 2) { b43_lpphy_op_software_rfkill() 1435 b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_VAL_0, 0x83FF); b43_lpphy_op_software_rfkill() 1436 b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_0, 0x1F00); b43_lpphy_op_software_rfkill() 1437 b43_phy_mask(dev, B43_LPPHY_AFE_DDFS, 0x80FF); b43_lpphy_op_software_rfkill() 1438 b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_2_VAL, 0xDFFF); b43_lpphy_op_software_rfkill() 1439 b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_2, 0x0808); b43_lpphy_op_software_rfkill() 1441 b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_VAL_0, 0xE0FF); b43_lpphy_op_software_rfkill() 1442 b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_0, 0x1F00); b43_lpphy_op_software_rfkill() 1443 b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_2_VAL, 0xFCFF); b43_lpphy_op_software_rfkill() 1444 b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_2, 0x0018); b43_lpphy_op_software_rfkill() 1447 b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_0, 0xE0FF); b43_lpphy_op_software_rfkill() 1448 if (dev->phy.rev >= 2) b43_lpphy_op_software_rfkill() 1449 b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_2, 0xF7F7); b43_lpphy_op_software_rfkill() 1451 b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_2, 0xFFE7); b43_lpphy_op_software_rfkill() 1456 static void lpphy_set_analog_filter(struct b43_wldev dev, int channel) lpphy_set_analog_filter() argument 1458 struct b43_phy_lp lpphy = dev->phy.lp; lpphy_set_analog_filter() 1461 if (dev->phy.rev < 2) { //SPEC FIXME Isn't this rev0/1-specific? lpphy_set_analog_filter() 1462 b43_phy_maskset(dev, B43_LPPHY_LP_PHY_CTL, 0xFCFF, tmp << 9); lpphy_set_analog_filter() 1463 if ((dev->phy.rev == 1) && (lpphy->rc_cap)) lpphy_set_analog_filter() 1464 lpphy_set_rc_cap(dev); lpphy_set_analog_filter() 1466 b43_radio_write(dev, B2063_TX_BB_SP3, 0x3F); lpphy_set_analog_filter() 1470 static void lpphy_set_tssi_mux(struct b43_wldev dev, enum tssi_mux_mode mode) lpphy_set_tssi_mux() argument 1473 b43_radio_set(dev, B2063_PA_SP1, 0x2); lpphy_set_tssi_mux() 1474 b43_phy_set(dev, B43_PHY_OFDM(0xF3), 0x1000); lpphy_set_tssi_mux() 1475 b43_radio_write(dev, B2063_PA_CTL10, 0x51); lpphy_set_tssi_mux() 1477 b43_radio_mask(dev, B2063_PA_SP1, 0xFFFE); lpphy_set_tssi_mux() 1478 b43_phy_mask(dev, B43_LPPHY_AFE_CTL_OVRVAL, 0xFFC7); lpphy_set_tssi_mux() 1480 b43_radio_maskset(dev, B2063_PA_SP1, 0xFFFE, 0x1); lpphy_set_tssi_mux() 1481 b43_phy_maskset(dev, B43_LPPHY_AFE_CTL_OVRVAL, lpphy_set_tssi_mux() 1489 static void lpphy_tx_pctl_init_hw(struct b43_wldev dev) lpphy_tx_pctl_init_hw() argument 1496 if (dev->phy.rev >= 2) lpphy_tx_pctl_init_hw() 1497 b43_lptab_write(dev, B43_LPTAB32(7, i + 1), i); lpphy_tx_pctl_init_hw() 1499 b43_lptab_write(dev, B43_LPTAB32(10, i + 1), i); lpphy_tx_pctl_init_hw() 1502 b43_phy_maskset(dev, B43_LPPHY_TX_PWR_CTL_NNUM, 0xFF00, 0xFF); lpphy_tx_pctl_init_hw() 1503 b43_phy_maskset(dev, B43_LPPHY_TX_PWR_CTL_NNUM, 0x8FFF, 0x5000); lpphy_tx_pctl_init_hw() 1504 b43_phy_maskset(dev, B43_LPPHY_TX_PWR_CTL_IDLETSSI, 0xFFC0, 0x1F); lpphy_tx_pctl_init_hw() 1505 if (dev->phy.rev < 2) { lpphy_tx_pctl_init_hw() 1506 b43_phy_mask(dev, B43_LPPHY_LP_PHY_CTL, 0xEFFF); lpphy_tx_pctl_init_hw() 1507 b43_phy_maskset(dev, B43_LPPHY_LP_PHY_CTL, 0xDFFF, 0x2000); lpphy_tx_pctl_init_hw() 1509 b43_phy_mask(dev, B43_PHY_OFDM(0x103), 0xFFFE); lpphy_tx_pctl_init_hw() 1510 b43_phy_maskset(dev, B43_PHY_OFDM(0x103), 0xFFFB, 0x4); lpphy_tx_pctl_init_hw() 1511 b43_phy_maskset(dev, B43_PHY_OFDM(0x103), 0xFFEF, 0x10); lpphy_tx_pctl_init_hw() 1512 b43_radio_maskset(dev, B2063_IQ_CALIB_CTL2, 0xF3, 0x1); lpphy_tx_pctl_init_hw() 1513 lpphy_set_tssi_mux(dev, TSSI_MUX_POSTPA); lpphy_tx_pctl_init_hw() 1515 b43_phy_maskset(dev, B43_LPPHY_TX_PWR_CTL_IDLETSSI, 0x7FFF, 0x8000); lpphy_tx_pctl_init_hw() 1516 b43_phy_mask(dev, B43_LPPHY_TX_PWR_CTL_DELTAPWR_LIMIT, 0xFF); lpphy_tx_pctl_init_hw() 1517 b43_phy_write(dev, B43_LPPHY_TX_PWR_CTL_DELTAPWR_LIMIT, 0xA); lpphy_tx_pctl_init_hw() 1518 b43_phy_maskset(dev, B43_LPPHY_TX_PWR_CTL_CMD, lpphy_tx_pctl_init_hw() 1521 b43_phy_mask(dev, B43_LPPHY_TX_PWR_CTL_NNUM, 0xF8FF); lpphy_tx_pctl_init_hw() 1522 b43_phy_maskset(dev, B43_LPPHY_TX_PWR_CTL_CMD, lpphy_tx_pctl_init_hw() 1526 if (dev->phy.rev < 2) { lpphy_tx_pctl_init_hw() 1527 b43_phy_maskset(dev, B43_LPPHY_RF_OVERRIDE_0, 0xEFFF, 0x1000); lpphy_tx_pctl_init_hw() 1528 b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_VAL_0, 0xEFFF); lpphy_tx_pctl_init_hw() 1530 lpphy_set_tx_power_by_index(dev, 0x7F); lpphy_tx_pctl_init_hw() 1533 b43_dummy_transmission(dev, true, true); lpphy_tx_pctl_init_hw() 1535 tmp = b43_phy_read(dev, B43_LPPHY_TX_PWR_CTL_STAT); lpphy_tx_pctl_init_hw() 1537 b43_phy_maskset(dev, B43_LPPHY_TX_PWR_CTL_IDLETSSI, lpphy_tx_pctl_init_hw() 1541 b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_0, 0xEFFF); lpphy_tx_pctl_init_hw() 1547 static void lpphy_tx_pctl_init_sw(struct b43_wldev dev) lpphy_tx_pctl_init_sw() argument 1551 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) { lpphy_tx_pctl_init_sw() 1562 lpphy_set_tx_gains(dev, gains); lpphy_tx_pctl_init_sw() 1563 lpphy_set_bb_mult(dev, 150); lpphy_tx_pctl_init_sw() 1567 static void lpphy_tx_pctl_init(struct b43_wldev dev) lpphy_tx_pctl_init() argument 1570 lpphy_tx_pctl_init_hw(dev); lpphy_tx_pctl_init() 1572 lpphy_tx_pctl_init_sw(dev); lpphy_tx_pctl_init() 1576 static void lpphy_pr41573_workaround(struct b43_wldev dev) lpphy_pr41573_workaround() argument 1578 struct b43_phy_lp lpphy = dev->phy.lp; lpphy_pr41573_workaround() 1587 b43err(dev->wl, "PR41573 failed. Out of memory!\n"); lpphy_pr41573_workaround() 1591 lpphy_read_tx_pctl_mode_from_hardware(dev); lpphy_pr41573_workaround() 1597 if (dev->phy.rev < 2) { lpphy_pr41573_workaround() 1598 b43_lptab_read_bulk(dev, B43_LPTAB32(10, 0x140), lpphy_pr41573_workaround() 1601 b43_lptab_read_bulk(dev, B43_LPTAB32(7, 0x140), lpphy_pr41573_workaround() 1605 lpphy_table_init(dev); //FIXME is table init needed? lpphy_pr41573_workaround() 1606 lpphy_baseband_init(dev); lpphy_pr41573_workaround() 1607 lpphy_tx_pctl_init(dev); lpphy_pr41573_workaround() 1608 b43_lpphy_op_software_rfkill(dev, false); lpphy_pr41573_workaround() 1609 lpphy_set_tx_power_control(dev, B43_LPPHY_TXPCTL_OFF); lpphy_pr41573_workaround() 1610 if (dev->phy.rev < 2) { lpphy_pr41573_workaround() 1611 b43_lptab_write_bulk(dev, B43_LPTAB32(10, 0x140), lpphy_pr41573_workaround() 1614 b43_lptab_write_bulk(dev, B43_LPTAB32(7, 0x140), lpphy_pr41573_workaround() 1617 b43_write16(dev, B43_MMIO_CHANNEL, lpphy->channel); lpphy_pr41573_workaround() 1620 lpphy_set_analog_filter(dev, lpphy->channel); lpphy_pr41573_workaround() 1622 lpphy_set_tx_power_by_index(dev, tx_pwr_idx_over); lpphy_pr41573_workaround() 1624 lpphy_set_rc_cap(dev); lpphy_pr41573_workaround() 1625 b43_lpphy_op_set_rx_antenna(dev, lpphy->antenna); lpphy_pr41573_workaround() 1626 lpphy_set_tx_power_control(dev, txpctl_mode); lpphy_pr41573_workaround() 1709 static int lpphy_calc_rx_iq_comp(struct b43_wldev dev, u16 samples) lpphy_calc_rx_iq_comp() argument 1715 c1 = b43_phy_read(dev, B43_LPPHY_RX_COMP_COEFF_S); lpphy_calc_rx_iq_comp() 1719 b43_phy_maskset(dev, B43_LPPHY_RX_COMP_COEFF_S, 0xFF00, 0x00C0); lpphy_calc_rx_iq_comp() 1720 b43_phy_mask(dev, B43_LPPHY_RX_COMP_COEFF_S, 0x00FF); lpphy_calc_rx_iq_comp() 1722 ret = lpphy_rx_iq_est(dev, samples, 32, &iq_est); lpphy_calc_rx_iq_comp() 1761 b43_phy_maskset(dev, B43_LPPHY_RX_COMP_COEFF_S, 0xFF00, c1); lpphy_calc_rx_iq_comp() 1762 b43_phy_maskset(dev, B43_LPPHY_RX_COMP_COEFF_S, 0x00FF, c0 << 8); lpphy_calc_rx_iq_comp() 1766 static void lpphy_run_samples(struct b43_wldev dev, u16 samples, u16 loops, lpphy_run_samples() argument 1769 b43_phy_maskset(dev, B43_LPPHY_SMPL_PLAY_BUFFER_CTL, lpphy_run_samples() 1773 b43_phy_maskset(dev, B43_LPPHY_SMPL_PLAY_COUNT, 0xF000, loops); lpphy_run_samples() 1774 b43_phy_maskset(dev, B43_LPPHY_SMPL_PLAY_BUFFER_CTL, 0x3F, wait << 6); lpphy_run_samples() 1775 b43_phy_set(dev, B43_LPPHY_A_PHY_CTL_ADDR, 0x1); lpphy_run_samples() 1779 static void lpphy_start_tx_tone(struct b43_wldev dev, s32 freq, u16 max) lpphy_start_tx_tone() argument 1781 struct b43_phy_lp lpphy = dev->phy.lp; lpphy_start_tx_tone() 1807 b43_lptab_write_bulk(dev, B43_LPTAB16(5, 0), samples, buf); lpphy_start_tx_tone() 1809 lpphy_run_samples(dev, samples, 0xFFFF, 0); lpphy_start_tx_tone() 1812 static void lpphy_stop_tx_tone(struct b43_wldev dev) lpphy_stop_tx_tone() argument 1814 struct b43_phy_lp lpphy = dev->phy.lp; lpphy_stop_tx_tone() 1819 b43_phy_mask(dev, B43_LPPHY_SMPL_PLAY_COUNT, 0xF000); lpphy_stop_tx_tone() 1821 if (!(b43_phy_read(dev, B43_LPPHY_A_PHY_CTL_ADDR) & 0x1)) lpphy_stop_tx_tone() 1828 static void lpphy_papd_cal(struct b43_wldev dev, struct lpphy_tx_gains gains, lpphy_papd_cal() argument 1834 static void lpphy_papd_cal_txpwr(struct b43_wldev dev) lpphy_papd_cal_txpwr() argument 1836 struct b43_phy_lp lpphy = dev->phy.lp; lpphy_papd_cal_txpwr() 1840 lpphy_read_tx_pctl_mode_from_hardware(dev); lpphy_papd_cal_txpwr() 1842 old_afe_ovr = b43_phy_read(dev, B43_LPPHY_AFE_CTL_OVR) & 0x40; lpphy_papd_cal_txpwr() 1844 oldgains = lpphy_get_tx_gains(dev); lpphy_papd_cal_txpwr() 1845 old_rf = b43_phy_read(dev, B43_LPPHY_RF_PWR_OVERRIDE) & 0xFF; lpphy_papd_cal_txpwr() 1846 old_bbmult = lpphy_get_bb_mult(dev); lpphy_papd_cal_txpwr() 1848 lpphy_set_tx_power_control(dev, B43_LPPHY_TXPCTL_OFF); lpphy_papd_cal_txpwr() 1850 if (dev->dev->chip_id == 0x4325 && dev->dev->chip_rev == 0) lpphy_papd_cal_txpwr() 1851 lpphy_papd_cal(dev, gains, 0, 1, 30); lpphy_papd_cal_txpwr() 1853 lpphy_papd_cal(dev, gains, 0, 1, 65); lpphy_papd_cal_txpwr() 1856 lpphy_set_tx_gains(dev, oldgains); lpphy_papd_cal_txpwr() 1857 lpphy_set_bb_mult(dev, old_bbmult); lpphy_papd_cal_txpwr() 1858 lpphy_set_tx_power_control(dev, old_txpctl); lpphy_papd_cal_txpwr() 1859 b43_phy_maskset(dev, B43_LPPHY_RF_PWR_OVERRIDE, 0xFF00, old_rf); lpphy_papd_cal_txpwr() 1862 static int lpphy_rx_iq_cal(struct b43_wldev dev, bool noise, bool tx, lpphy_rx_iq_cal() argument 1865 struct b43_phy_lp lpphy = dev->phy.lp; lpphy_rx_iq_cal() 1874 if (dev->dev->chip_id == 0x5354) { lpphy_rx_iq_cal() 1880 } else if (dev->phy.rev >= 2) { lpphy_rx_iq_cal() 1893 b43_phy_maskset(dev, B43_LPPHY_RX_COMP_COEFF_S, 0xFF00, iqcomp->c1); lpphy_rx_iq_cal() 1894 b43_phy_maskset(dev, B43_LPPHY_RX_COMP_COEFF_S, lpphy_rx_iq_cal() 1903 lpphy_set_trsw_over(dev, tx, rx); lpphy_rx_iq_cal() 1905 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) { lpphy_rx_iq_cal() 1906 b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_0, 0x8); lpphy_rx_iq_cal() 1907 b43_phy_maskset(dev, B43_LPPHY_RF_OVERRIDE_VAL_0, lpphy_rx_iq_cal() 1910 b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_0, 0x20); lpphy_rx_iq_cal() 1911 b43_phy_maskset(dev, B43_LPPHY_RF_OVERRIDE_VAL_0, lpphy_rx_iq_cal() 1915 tmp = b43_phy_read(dev, B43_LPPHY_AFE_CTL_OVR) & 0x40; lpphy_rx_iq_cal() 1918 lpphy_set_rx_gain(dev, 0x2D5D); lpphy_rx_iq_cal() 1921 oldgains = lpphy_get_tx_gains(dev); lpphy_rx_iq_cal() 1924 lpphy_set_tx_gains(dev, gains); lpphy_rx_iq_cal() 1927 b43_phy_mask(dev, B43_LPPHY_AFE_CTL_OVR, 0xFFFE); lpphy_rx_iq_cal() 1928 b43_phy_mask(dev, B43_LPPHY_AFE_CTL_OVRVAL, 0xFFFE); lpphy_rx_iq_cal() 1929 b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_0, 0x800); lpphy_rx_iq_cal() 1930 b43_phy_set(dev, B43_LPPHY_RF_OVERRIDE_VAL_0, 0x800); lpphy_rx_iq_cal() 1931 lpphy_set_deaf(dev, false); lpphy_rx_iq_cal() 1933 ret = lpphy_calc_rx_iq_comp(dev, 0xFFF0); lpphy_rx_iq_cal() 1935 lpphy_start_tx_tone(dev, 4000, 100); lpphy_rx_iq_cal() 1936 ret = lpphy_calc_rx_iq_comp(dev, 0x4000); lpphy_rx_iq_cal() 1937 lpphy_stop_tx_tone(dev); lpphy_rx_iq_cal() 1939 lpphy_clear_deaf(dev, false); lpphy_rx_iq_cal() 1940 b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_0, 0xFFFC); lpphy_rx_iq_cal() 1941 b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_0, 0xFFF7); lpphy_rx_iq_cal() 1942 b43_phy_mask(dev, B43_LPPHY_RF_OVERRIDE_0, 0xFFDF); lpphy_rx_iq_cal() 1945 lpphy_set_tx_gains(dev, oldgains); lpphy_rx_iq_cal() 1947 lpphy_disable_tx_gain_override(dev); lpphy_rx_iq_cal() 1949 lpphy_disable_rx_gain_override(dev); lpphy_rx_iq_cal() 1950 b43_phy_mask(dev, B43_LPPHY_AFE_CTL_OVR, 0xFFFE); lpphy_rx_iq_cal() 1951 b43_phy_mask(dev, B43_LPPHY_AFE_CTL_OVRVAL, 0xF7FF); lpphy_rx_iq_cal() 1955 static void lpphy_calibration(struct b43_wldev dev) lpphy_calibration() argument 1957 struct b43_phy_lp lpphy = dev->phy.lp; lpphy_calibration() 1966 b43_mac_suspend(dev); lpphy_calibration() 1968 lpphy_btcoex_override(dev); lpphy_calibration() 1969 if (dev->phy.rev >= 2) lpphy_calibration() 1970 lpphy_save_dig_flt_state(dev); lpphy_calibration() 1971 lpphy_read_tx_pctl_mode_from_hardware(dev); lpphy_calibration() 1973 lpphy_set_tx_power_control(dev, B43_LPPHY_TXPCTL_OFF); lpphy_calibration() 1975 if ((dev->phy.rev == 0) && (saved_pctl_mode != B43_LPPHY_TXPCTL_OFF)) lpphy_calibration() 1976 lpphy_pr41573_workaround(dev); lpphy_calibration() 1977 if ((dev->phy.rev >= 2) && full_cal) { lpphy_calibration() 1978 lpphy_papd_cal_txpwr(dev); lpphy_calibration() 1980 lpphy_set_tx_power_control(dev, saved_pctl_mode); lpphy_calibration() 1981 if (dev->phy.rev >= 2) lpphy_calibration() 1982 lpphy_restore_dig_flt_state(dev); lpphy_calibration() 1983 lpphy_rx_iq_cal(dev, true, true, false, false, NULL); lpphy_calibration() 1985 b43_mac_enable(dev); lpphy_calibration() 1988 static void b43_lpphy_op_maskset(struct b43_wldev dev, u16 reg, u16 mask, b43_lpphy_op_maskset() argument 1991 b43_write16f(dev, B43_MMIO_PHY_CONTROL, reg); b43_lpphy_op_maskset() 1992 b43_write16(dev, B43_MMIO_PHY_DATA, b43_lpphy_op_maskset() 1993 (b43_read16(dev, B43_MMIO_PHY_DATA) & mask) \| set); b43_lpphy_op_maskset() 1996 static u16 b43_lpphy_op_radio_read(struct b43_wldev dev, u16 reg) b43_lpphy_op_radio_read() argument 2001 if (dev->phy.rev < 2) { b43_lpphy_op_radio_read() 2007 b43_write16f(dev, B43_MMIO_RADIO_CONTROL, reg); b43_lpphy_op_radio_read() 2008 return b43_read16(dev, B43_MMIO_RADIO_DATA_LOW); b43_lpphy_op_radio_read() 2011 static void b43_lpphy_op_radio_write(struct b43_wldev dev, u16 reg, u16 value) b43_lpphy_op_radio_write() argument 2016 b43_write16f(dev, B43_MMIO_RADIO_CONTROL, reg); b43_lpphy_op_radio_write() 2017 b43_write16(dev, B43_MMIO_RADIO_DATA_LOW, value); b43_lpphy_op_radio_write() 2389 static void lpphy_b2062_reset_pll_bias(struct b43_wldev dev) lpphy_b2062_reset_pll_bias() argument 2391 b43_radio_write(dev, B2062_S_RFPLL_CTL2, 0xFF); lpphy_b2062_reset_pll_bias() 2393 if (dev->dev->chip_id == 0x5354) { lpphy_b2062_reset_pll_bias() 2394 b43_radio_write(dev, B2062_N_COMM1, 4); lpphy_b2062_reset_pll_bias() 2395 b43_radio_write(dev, B2062_S_RFPLL_CTL2, 4); lpphy_b2062_reset_pll_bias() 2397 b43_radio_write(dev, B2062_S_RFPLL_CTL2, 0); lpphy_b2062_reset_pll_bias() 2402 static void lpphy_b2062_vco_calib(struct b43_wldev dev) lpphy_b2062_vco_calib() argument 2404 b43_radio_write(dev, B2062_S_RFPLL_CTL21, 0x42); lpphy_b2062_vco_calib() 2405 b43_radio_write(dev, B2062_S_RFPLL_CTL21, 0x62); lpphy_b2062_vco_calib() 2409 static int lpphy_b2062_tune(struct b43_wldev dev, lpphy_b2062_tune() argument 2412 struct b43_phy_lp lpphy = dev->phy.lp; lpphy_b2062_tune() 2413 struct ssb_bus bus = dev->dev->sdev->bus; lpphy_b2062_tune() 2429 b43_radio_set(dev, B2062_S_RFPLL_CTL14, 0x04); lpphy_b2062_tune() 2430 b43_radio_write(dev, B2062_N_LGENA_TUNE0, chandata->data[0]); lpphy_b2062_tune() 2431 b43_radio_write(dev, B2062_N_LGENA_TUNE2, chandata->data[1]); lpphy_b2062_tune() 2432 b43_radio_write(dev, B2062_N_LGENA_TUNE3, chandata->data[2]); lpphy_b2062_tune() 2433 b43_radio_write(dev, B2062_N_TX_TUNE, chandata->data[3]); lpphy_b2062_tune() 2434 b43_radio_write(dev, B2062_S_LGENG_CTL1, chandata->data[4]); lpphy_b2062_tune() 2435 b43_radio_write(dev, B2062_N_LGENA_CTL5, chandata->data[5]); lpphy_b2062_tune() 2436 b43_radio_write(dev, B2062_N_LGENA_CTL6, chandata->data[6]); lpphy_b2062_tune() 2437 b43_radio_write(dev, B2062_N_TX_PGA, chandata->data[7]); lpphy_b2062_tune() 2438 b43_radio_write(dev, B2062_N_TX_PAD, chandata->data[8]); lpphy_b2062_tune() 2442 b43_radio_write(dev, B2062_S_RFPLL_CTL33, 0xCC); lpphy_b2062_tune() 2443 b43_radio_write(dev, B2062_S_RFPLL_CTL34, 0x07); lpphy_b2062_tune() 2444 lpphy_b2062_reset_pll_bias(dev); lpphy_b2062_tune() 2451 b43_radio_write(dev, B2062_S_RFPLL_CTL26, tmp6); lpphy_b2062_tune() 2455 b43_radio_write(dev, B2062_S_RFPLL_CTL27, tmp6); lpphy_b2062_tune() 2459 b43_radio_write(dev, B2062_S_RFPLL_CTL28, tmp6); lpphy_b2062_tune() 2463 b43_radio_write(dev, B2062_S_RFPLL_CTL29, tmp6 + ((2 * tmp7) / tmp4)); lpphy_b2062_tune() 2464 tmp8 = b43_radio_read(dev, B2062_S_RFPLL_CTL19); lpphy_b2062_tune() 2466 b43_radio_write(dev, B2062_S_RFPLL_CTL23, (tmp9 >> 8) + 16); lpphy_b2062_tune() 2467 b43_radio_write(dev, B2062_S_RFPLL_CTL24, tmp9 & 0xFF); lpphy_b2062_tune() 2469 lpphy_b2062_vco_calib(dev); lpphy_b2062_tune() 2470 if (b43_radio_read(dev, B2062_S_RFPLL_CTL3) & 0x10) { lpphy_b2062_tune() 2471 b43_radio_write(dev, B2062_S_RFPLL_CTL33, 0xFC); lpphy_b2062_tune() 2472 b43_radio_write(dev, B2062_S_RFPLL_CTL34, 0); lpphy_b2062_tune() 2473 lpphy_b2062_reset_pll_bias(dev); lpphy_b2062_tune() 2474 lpphy_b2062_vco_calib(dev); lpphy_b2062_tune() 2475 if (b43_radio_read(dev, B2062_S_RFPLL_CTL3) & 0x10) lpphy_b2062_tune() 2479 b43_radio_mask(dev, B2062_S_RFPLL_CTL14, ~0x04); lpphy_b2062_tune() 2483 static void lpphy_b2063_vco_calib(struct b43_wldev dev) lpphy_b2063_vco_calib() argument 2487 b43_radio_mask(dev, B2063_PLL_SP1, ~0x40); lpphy_b2063_vco_calib() 2488 tmp = b43_radio_read(dev, B2063_PLL_JTAG_CALNRST) & 0xF8; lpphy_b2063_vco_calib() 2489 b43_radio_write(dev, B2063_PLL_JTAG_CALNRST, tmp); lpphy_b2063_vco_calib() 2491 b43_radio_write(dev, B2063_PLL_JTAG_CALNRST, tmp \| 0x4); lpphy_b2063_vco_calib() 2493 b43_radio_write(dev, B2063_PLL_JTAG_CALNRST, tmp \| 0x6); lpphy_b2063_vco_calib() 2495 b43_radio_write(dev, B2063_PLL_JTAG_CALNRST, tmp \| 0x7); lpphy_b2063_vco_calib() 2497 b43_radio_set(dev, B2063_PLL_SP1, 0x40); lpphy_b2063_vco_calib() 2500 static int lpphy_b2063_tune(struct b43_wldev dev, lpphy_b2063_tune() argument 2503 struct ssb_bus bus = dev->dev->sdev->bus; lpphy_b2063_tune() 2522 b43_radio_write(dev, B2063_LOGEN_VCOBUF1, chandata->data[0]); lpphy_b2063_tune() 2523 b43_radio_write(dev, B2063_LOGEN_MIXER2, chandata->data[1]); lpphy_b2063_tune() 2524 b43_radio_write(dev, B2063_LOGEN_BUF2, chandata->data[2]); lpphy_b2063_tune() 2525 b43_radio_write(dev, B2063_LOGEN_RCCR1, chandata->data[3]); lpphy_b2063_tune() 2526 b43_radio_write(dev, B2063_A_RX_1ST3, chandata->data[4]); lpphy_b2063_tune() 2527 b43_radio_write(dev, B2063_A_RX_2ND1, chandata->data[5]); lpphy_b2063_tune() 2528 b43_radio_write(dev, B2063_A_RX_2ND4, chandata->data[6]); lpphy_b2063_tune() 2529 b43_radio_write(dev, B2063_A_RX_2ND7, chandata->data[7]); lpphy_b2063_tune() 2530 b43_radio_write(dev, B2063_A_RX_PS6, chandata->data[8]); lpphy_b2063_tune() 2531 b43_radio_write(dev, B2063_TX_RF_CTL2, chandata->data[9]); lpphy_b2063_tune() 2532 b43_radio_write(dev, B2063_TX_RF_CTL5, chandata->data[10]); lpphy_b2063_tune() 2533 b43_radio_write(dev, B2063_PA_CTL11, chandata->data[11]); lpphy_b2063_tune() 2535 old_comm15 = b43_radio_read(dev, B2063_COMM15); lpphy_b2063_tune() 2536 b43_radio_set(dev, B2063_COMM15, 0x1E); lpphy_b2063_tune() 2548 b43_radio_write(dev, B2063_PLL_JTAG_PLL_VCO_CALIB3, 0x2); lpphy_b2063_tune() 2549 b43_radio_maskset(dev, B2063_PLL_JTAG_PLL_VCO_CALIB6, lpphy_b2063_tune() 2551 b43_radio_maskset(dev, B2063_PLL_JTAG_PLL_VCO_CALIB7, lpphy_b2063_tune() 2556 b43_radio_write(dev, B2063_PLL_JTAG_PLL_VCO_CALIB5, timeoutref); lpphy_b2063_tune() 2561 b43_radio_maskset(dev, B2063_PLL_JTAG_PLL_VCO_CALIB7, lpphy_b2063_tune() 2563 b43_radio_write(dev, B2063_PLL_JTAG_PLL_VCO_CALIB8, count & 0xFF); lpphy_b2063_tune() 2571 b43_radio_maskset(dev, B2063_PLL_JTAG_PLL_SG1, 0xFFE0, tmp1 >> 4); lpphy_b2063_tune() 2572 b43_radio_maskset(dev, B2063_PLL_JTAG_PLL_SG2, 0xFE0F, tmp1 << 4); lpphy_b2063_tune() 2573 b43_radio_maskset(dev, B2063_PLL_JTAG_PLL_SG2, 0xFFF0, tmp1 >> 16); lpphy_b2063_tune() 2574 b43_radio_write(dev, B2063_PLL_JTAG_PLL_SG3, (tmp2 >> 8) & 0xFF); lpphy_b2063_tune() 2575 b43_radio_write(dev, B2063_PLL_JTAG_PLL_SG4, tmp2 & 0xFF); lpphy_b2063_tune() 2577 b43_radio_write(dev, B2063_PLL_JTAG_PLL_LF1, 0xB9); lpphy_b2063_tune() 2578 b43_radio_write(dev, B2063_PLL_JTAG_PLL_LF2, 0x88); lpphy_b2063_tune() 2579 b43_radio_write(dev, B2063_PLL_JTAG_PLL_LF3, 0x28); lpphy_b2063_tune() 2580 b43_radio_write(dev, B2063_PLL_JTAG_PLL_LF4, 0x63); lpphy_b2063_tune() 2592 b43_radio_maskset(dev, B2063_PLL_JTAG_PLL_CP2, 0xFFC0, tmp5); lpphy_b2063_tune() 2593 b43_radio_maskset(dev, B2063_PLL_JTAG_PLL_CP2, 0xFFBF, scale << 6); lpphy_b2063_tune() 2600 b43_radio_maskset(dev, B2063_PLL_JTAG_PLL_CP3, 0xFFE0, tmp6); lpphy_b2063_tune() 2601 b43_radio_maskset(dev, B2063_PLL_JTAG_PLL_CP3, 0xFFDF, scale << 5); lpphy_b2063_tune() 2603 b43_radio_maskset(dev, B2063_PLL_JTAG_PLL_XTAL_12, 0xFFFB, 0x4); lpphy_b2063_tune() 2605 b43_radio_set(dev, B2063_PLL_JTAG_PLL_XTAL_12, 0x2); lpphy_b2063_tune() 2607 b43_radio_mask(dev, B2063_PLL_JTAG_PLL_XTAL_12, 0xFD); lpphy_b2063_tune() 2610 b43_radio_set(dev, B2063_PLL_JTAG_PLL_VCO1, 0x2); lpphy_b2063_tune() 2612 b43_radio_mask(dev, B2063_PLL_JTAG_PLL_VCO1, 0xFD); lpphy_b2063_tune() 2614 b43_radio_set(dev, B2063_PLL_SP2, 0x3); lpphy_b2063_tune() 2616 b43_radio_mask(dev, B2063_PLL_SP2, 0xFFFC); lpphy_b2063_tune() 2617 lpphy_b2063_vco_calib(dev); lpphy_b2063_tune() 2618 b43_radio_write(dev, B2063_COMM15, old_comm15); lpphy_b2063_tune() 2623 static int b43_lpphy_op_switch_channel(struct b43_wldev dev, b43_lpphy_op_switch_channel() argument 2626 struct b43_phy_lp lpphy = dev->phy.lp; b43_lpphy_op_switch_channel() 2629 if (dev->phy.radio_ver == 0x2063) { b43_lpphy_op_switch_channel() 2630 err = lpphy_b2063_tune(dev, new_channel); b43_lpphy_op_switch_channel() 2634 err = lpphy_b2062_tune(dev, new_channel); b43_lpphy_op_switch_channel() 2637 lpphy_set_analog_filter(dev, new_channel); b43_lpphy_op_switch_channel() 2638 lpphy_adjust_gain_table(dev, channel2freq_lp(new_channel)); b43_lpphy_op_switch_channel() 2642 b43_write16(dev, B43_MMIO_CHANNEL, new_channel); b43_lpphy_op_switch_channel() 2647 static int b43_lpphy_op_init(struct b43_wldev dev) b43_lpphy_op_init() argument 2651 if (dev->dev->bus_type != B43_BUS_SSB) { b43_lpphy_op_init() 2652 b43err(dev->wl, "LP-PHY is supported only on SSB!\n"); b43_lpphy_op_init() 2656 lpphy_read_band_sprom(dev); //FIXME should this be in prepare_structs? b43_lpphy_op_init() 2657 lpphy_baseband_init(dev); b43_lpphy_op_init() 2658 lpphy_radio_init(dev); b43_lpphy_op_init() 2659 lpphy_calibrate_rc(dev); b43_lpphy_op_init() 2660 err = b43_lpphy_op_switch_channel(dev, 7); b43_lpphy_op_init() 2662 b43dbg(dev->wl, "Switch to channel 7 failed, error = %d.\n", b43_lpphy_op_init() 2665 lpphy_tx_pctl_init(dev); b43_lpphy_op_init() 2666 lpphy_calibration(dev); b43_lpphy_op_init() 2672 static void b43_lpphy_op_adjust_txpower(struct b43_wldev dev) b43_lpphy_op_adjust_txpower() argument 2677 static enum b43_txpwr_result b43_lpphy_op_recalc_txpower(struct b43_wldev dev, b43_lpphy_op_recalc_txpower() argument 2684 static void b43_lpphy_op_switch_analog(struct b43_wldev dev, bool on) b43_lpphy_op_switch_analog() argument 2687 b43_phy_mask(dev, B43_LPPHY_AFE_CTL_OVR, 0xfff8); b43_lpphy_op_switch_analog() 2689 b43_phy_set(dev, B43_LPPHY_AFE_CTL_OVRVAL, 0x0007); b43_lpphy_op_switch_analog() 2690 b43_phy_set(dev, B43_LPPHY_AFE_CTL_OVR, 0x0007); b43_lpphy_op_switch_analog() 2694 static void b43_lpphy_op_pwork_15sec(struct b43_wldev dev) b43_lpphy_op_pwork_15sec() argument
H A D	sdio.h	`14 void (irq_handler)(struct b43_wldev dev); 17 int b43_sdio_request_irq(struct b43_wldev dev, 18 void (handler)(struct b43_wldev dev)); 19 void b43_sdio_free_irq(struct b43_wldev dev); 28 static inline int b43_sdio_request_irq(struct b43_wldev dev, b43_sdio_request_irq() argument 29 void (handler)(struct b43_wldev dev)) b43_sdio_request_irq() 33 static inline void b43_sdio_free_irq(struct b43_wldev dev) b43_sdio_free_irq() argument`
H A D	main.c	365 static void b43_wireless_core_exit(struct b43_wldev dev); 366 static int b43_wireless_core_init(struct b43_wldev dev); 367 static struct b43_wldev * b43_wireless_core_stop(struct b43_wldev dev); 368 static int b43_wireless_core_start(struct b43_wldev dev); 467 static void b43_ram_write(struct b43_wldev dev, u16 offset, u32 val) b43_ram_write() argument 473 macctl = b43_read32(dev, B43_MMIO_MACCTL); b43_ram_write() 477 b43_write32(dev, B43_MMIO_RAM_CONTROL, offset); b43_ram_write() 479 b43_write32(dev, B43_MMIO_RAM_DATA, val); b43_ram_write() 482 static inline void b43_shm_control_word(struct b43_wldev dev, b43_shm_control_word() argument 491 b43_write32(dev, B43_MMIO_SHM_CONTROL, control); b43_shm_control_word() 494 u32 b43_shm_read32(struct b43_wldev dev, u16 routing, u16 offset) b43_shm_read32() argument 502 b43_shm_control_word(dev, routing, offset >> 2); b43_shm_read32() 503 ret = b43_read16(dev, B43_MMIO_SHM_DATA_UNALIGNED); b43_shm_read32() 504 b43_shm_control_word(dev, routing, (offset >> 2) + 1); b43_shm_read32() 505 ret \|= ((u32)b43_read16(dev, B43_MMIO_SHM_DATA)) << 16; b43_shm_read32() 511 b43_shm_control_word(dev, routing, offset); b43_shm_read32() 512 ret = b43_read32(dev, B43_MMIO_SHM_DATA); b43_shm_read32() 517 u16 b43_shm_read16(struct b43_wldev dev, u16 routing, u16 offset) b43_shm_read16() argument 525 b43_shm_control_word(dev, routing, offset >> 2); b43_shm_read16() 526 ret = b43_read16(dev, B43_MMIO_SHM_DATA_UNALIGNED); b43_shm_read16() 532 b43_shm_control_word(dev, routing, offset); b43_shm_read16() 533 ret = b43_read16(dev, B43_MMIO_SHM_DATA); b43_shm_read16() 538 void b43_shm_write32(struct b43_wldev dev, u16 routing, u16 offset, u32 value) b43_shm_write32() argument 544 b43_shm_control_word(dev, routing, offset >> 2); b43_shm_write32() 545 b43_write16(dev, B43_MMIO_SHM_DATA_UNALIGNED, b43_shm_write32() 547 b43_shm_control_word(dev, routing, (offset >> 2) + 1); b43_shm_write32() 548 b43_write16(dev, B43_MMIO_SHM_DATA, b43_shm_write32() 554 b43_shm_control_word(dev, routing, offset); b43_shm_write32() 555 b43_write32(dev, B43_MMIO_SHM_DATA, value); b43_shm_write32() 558 void b43_shm_write16(struct b43_wldev dev, u16 routing, u16 offset, u16 value) b43_shm_write16() argument 564 b43_shm_control_word(dev, routing, offset >> 2); b43_shm_write16() 565 b43_write16(dev, B43_MMIO_SHM_DATA_UNALIGNED, value); b43_shm_write16() 570 b43_shm_control_word(dev, routing, offset); b43_shm_write16() 571 b43_write16(dev, B43_MMIO_SHM_DATA, value); b43_shm_write16() 575 u64 b43_hf_read(struct b43_wldev dev) b43_hf_read() argument 579 ret = b43_shm_read16(dev, B43_SHM_SHARED, B43_SHM_SH_HOSTF3); b43_hf_read() 581 ret \|= b43_shm_read16(dev, B43_SHM_SHARED, B43_SHM_SH_HOSTF2); b43_hf_read() 583 ret \|= b43_shm_read16(dev, B43_SHM_SHARED, B43_SHM_SH_HOSTF1); b43_hf_read() 589 void b43_hf_write(struct b43_wldev dev, u64 value) b43_hf_write() argument 596 b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_HOSTF1, lo); b43_hf_write() 597 b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_HOSTF2, mi); b43_hf_write() 598 b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_HOSTF3, hi); b43_hf_write() 602 static u16 b43_fwcapa_read(struct b43_wldev dev) b43_fwcapa_read() argument 604 B43_WARN_ON(!dev->fw.opensource); b43_fwcapa_read() 605 return b43_shm_read16(dev, B43_SHM_SHARED, B43_SHM_SH_FWCAPA); b43_fwcapa_read() 608 void b43_tsf_read(struct b43_wldev dev, u64 tsf) b43_tsf_read() argument 612 B43_WARN_ON(dev->dev->core_rev < 3); b43_tsf_read() 616 low = b43_read32(dev, B43_MMIO_REV3PLUS_TSF_LOW); b43_tsf_read() 617 high = b43_read32(dev, B43_MMIO_REV3PLUS_TSF_HIGH); b43_tsf_read() 624 static void b43_time_lock(struct b43_wldev dev) b43_time_lock() argument 626 b43_maskset32(dev, B43_MMIO_MACCTL, ~0, B43_MACCTL_TBTTHOLD); b43_time_lock() 628 b43_read32(dev, B43_MMIO_MACCTL); b43_time_lock() 631 static void b43_time_unlock(struct b43_wldev dev) b43_time_unlock() argument 633 b43_maskset32(dev, B43_MMIO_MACCTL, ~B43_MACCTL_TBTTHOLD, 0); b43_time_unlock() 635 b43_read32(dev, B43_MMIO_MACCTL); b43_time_unlock() 638 static void b43_tsf_write_locked(struct b43_wldev dev, u64 tsf) b43_tsf_write_locked() argument 642 B43_WARN_ON(dev->dev->core_rev < 3); b43_tsf_write_locked() 648 b43_write32(dev, B43_MMIO_REV3PLUS_TSF_LOW, low); b43_tsf_write_locked() 650 b43_write32(dev, B43_MMIO_REV3PLUS_TSF_HIGH, high); b43_tsf_write_locked() 654 void b43_tsf_write(struct b43_wldev dev, u64 tsf) b43_tsf_write() argument 656 b43_time_lock(dev); b43_tsf_write() 657 b43_tsf_write_locked(dev, tsf); b43_tsf_write() 658 b43_time_unlock(dev); b43_tsf_write() 662 void b43_macfilter_set(struct b43_wldev dev, u16 offset, const u8 mac) b43_macfilter_set() argument 671 b43_write16(dev, B43_MMIO_MACFILTER_CONTROL, offset); b43_macfilter_set() 675 b43_write16(dev, B43_MMIO_MACFILTER_DATA, data); b43_macfilter_set() 678 b43_write16(dev, B43_MMIO_MACFILTER_DATA, data); b43_macfilter_set() 681 b43_write16(dev, B43_MMIO_MACFILTER_DATA, data); b43_macfilter_set() 684 static void b43_write_mac_bssid_templates(struct b43_wldev dev) b43_write_mac_bssid_templates() argument 692 bssid = dev->wl->bssid; b43_write_mac_bssid_templates() 693 mac = dev->wl->mac_addr; b43_write_mac_bssid_templates() 695 b43_macfilter_set(dev, B43_MACFILTER_BSSID, bssid); b43_write_mac_bssid_templates() 706 b43_ram_write(dev, 0x20 + i, tmp); b43_write_mac_bssid_templates() 710 static void b43_upload_card_macaddress(struct b43_wldev dev) b43_upload_card_macaddress() argument 712 b43_write_mac_bssid_templates(dev); b43_upload_card_macaddress() 713 b43_macfilter_set(dev, B43_MACFILTER_SELF, dev->wl->mac_addr); b43_upload_card_macaddress() 716 static void b43_set_slot_time(struct b43_wldev dev, u16 slot_time) b43_set_slot_time() argument 720 if (b43_current_band(dev->wl) == IEEE80211_BAND_5GHZ) b43_set_slot_time() 722 b43_write16(dev, B43_MMIO_IFSSLOT, 510 + slot_time); b43_set_slot_time() 728 * b43_shm_write16(dev, B43_SHM_SHARED, 0x0010, slot_time); b43_set_slot_time() 732 static void b43_short_slot_timing_enable(struct b43_wldev dev) b43_short_slot_timing_enable() argument 734 b43_set_slot_time(dev, 9); b43_short_slot_timing_enable() 737 static void b43_short_slot_timing_disable(struct b43_wldev dev) b43_short_slot_timing_disable() argument 739 b43_set_slot_time(dev, 20); b43_short_slot_timing_disable() 745 void b43_dummy_transmission(struct b43_wldev dev, bool ofdm, bool pa_on) b43_dummy_transmission() argument 747 struct b43_phy phy = &dev->phy; b43_dummy_transmission() 767 b43_ram_write(dev, i * 4, buffer[i]); b43_dummy_transmission() 769 b43_write16(dev, B43_MMIO_XMTSEL, 0x0000); b43_dummy_transmission() 771 if (dev->dev->core_rev < 11) b43_dummy_transmission() 772 b43_write16(dev, B43_MMIO_WEPCTL, 0x0000); b43_dummy_transmission() 774 b43_write16(dev, B43_MMIO_WEPCTL, 0x0100); b43_dummy_transmission() 777 b43_write16(dev, B43_MMIO_TXE0_PHYCTL, value); b43_dummy_transmission() 780 b43_write16(dev, B43_MMIO_TXE0_PHYCTL1, 0x1A02); b43_dummy_transmission() 782 b43_write16(dev, B43_MMIO_TXE0_WM_0, 0x0000); b43_dummy_transmission() 783 b43_write16(dev, B43_MMIO_TXE0_WM_1, 0x0000); b43_dummy_transmission() 785 b43_write16(dev, B43_MMIO_XMTTPLATETXPTR, 0x0000); b43_dummy_transmission() 786 b43_write16(dev, B43_MMIO_XMTTXCNT, 0x0014); b43_dummy_transmission() 787 b43_write16(dev, B43_MMIO_XMTSEL, 0x0826); b43_dummy_transmission() 788 b43_write16(dev, B43_MMIO_TXE0_CTL, 0x0000); b43_dummy_transmission() 791 ; /b43_nphy_pa_override(dev, false) / b43_dummy_transmission() 796 b43_write16(dev, B43_MMIO_TXE0_AUX, 0x00D0); b43_dummy_transmission() 799 b43_write16(dev, B43_MMIO_TXE0_AUX, 0x0050); b43_dummy_transmission() 802 b43_write16(dev, B43_MMIO_TXE0_AUX, 0x0030); b43_dummy_transmission() 804 b43_read16(dev, B43_MMIO_TXE0_AUX); b43_dummy_transmission() 807 b43_radio_write16(dev, 0x0051, 0x0017); b43_dummy_transmission() 809 value = b43_read16(dev, B43_MMIO_TXE0_STATUS); b43_dummy_transmission() 815 value = b43_read16(dev, B43_MMIO_TXE0_STATUS); b43_dummy_transmission() 821 value = b43_read16(dev, B43_MMIO_IFSSTAT); b43_dummy_transmission() 827 b43_radio_write16(dev, 0x0051, 0x0037); b43_dummy_transmission() 830 static void key_write(struct b43_wldev dev, key_write() argument 839 kidx = b43_kidx_to_fw(dev, index); key_write() 841 b43_shm_write16(dev, B43_SHM_SHARED, key_write() 845 offset = dev->ktp + (index B43_SEC_KEYSIZE); key_write() 849 b43_shm_write16(dev, B43_SHM_SHARED, offset + i, value); key_write() 853 static void keymac_write(struct b43_wldev dev, u8 index, const u8 addr) keymac_write() argument 858 if (b43_new_kidx_api(dev)) keymac_write() 880 b43_shm_write32(dev, B43_SHM_RCMTA, keymac_write() 882 b43_shm_write16(dev, B43_SHM_RCMTA, keymac_write() 903 static void rx_tkip_phase1_write(struct b43_wldev dev, u8 index, u32 iv32, rx_tkip_phase1_write() argument 913 if (b43_new_kidx_api(dev)) rx_tkip_phase1_write() 925 if (b43_debug(dev, B43_DBG_KEYS)) { rx_tkip_phase1_write() 926 b43dbg(dev->wl, "rx_tkip_phase1_write : idx 0x%x, iv32 0x%x\n", rx_tkip_phase1_write() 932 b43_shm_write16(dev, B43_SHM_SHARED, offset + i, rx_tkip_phase1_write() 935 b43_shm_write16(dev, B43_SHM_SHARED, offset + i, iv32); rx_tkip_phase1_write() 936 b43_shm_write16(dev, B43_SHM_SHARED, offset + i + 2, iv32 >> 16); rx_tkip_phase1_write() 946 struct b43_wldev dev; b43_op_update_tkip_key() local 955 dev = wl->current_dev; b43_op_update_tkip_key() 956 B43_WARN_ON(!dev \|\| b43_status(dev) < B43_STAT_INITIALIZED); b43_op_update_tkip_key() 958 keymac_write(dev, index, NULL); /* First zero out mac to avoid race / b43_op_update_tkip_key() 960 rx_tkip_phase1_write(dev, index, iv32, phase1key); b43_op_update_tkip_key() 964 keymac_write(dev, index, sta->addr); b43_op_update_tkip_key() 967 static void do_key_write(struct b43_wldev dev, do_key_write() argument 974 if (b43_new_kidx_api(dev)) do_key_write() 977 B43_WARN_ON(index >= ARRAY_SIZE(dev->key)); do_key_write() 981 keymac_write(dev, index, NULL); /* First zero out mac. / do_key_write() 992 rx_tkip_phase1_write(dev, index, 0xffffffff, (u16)buf); do_key_write() 994 rx_tkip_phase1_write(dev, index, 0, NULL); do_key_write() 997 key_write(dev, index, algorithm, buf); do_key_write() 999 keymac_write(dev, index, mac_addr); do_key_write() 1001 dev->key[index].algorithm = algorithm; do_key_write() 1004 static int b43_key_write(struct b43_wldev dev, b43_key_write() argument 1024 for (i = 0; i < ARRAY_SIZE(dev->key); i++) { b43_key_write() 1026 B43_WARN_ON(dev->key[i].keyconf == keyconf); b43_key_write() 1030 if (b43_new_kidx_api(dev)) b43_key_write() 1037 B43_WARN_ON(i >= ARRAY_SIZE(dev->key)); b43_key_write() 1038 if (!dev->key[i].keyconf) { b43_key_write() 1045 b43warn(dev->wl, "Out of hardware key memory\n"); b43_key_write() 1051 do_key_write(dev, index, algorithm, key, key_len, mac_addr); b43_key_write() 1052 if ((index <= 3) && !b43_new_kidx_api(dev)) { b43_key_write() 1055 do_key_write(dev, index + 4, algorithm, key, key_len, NULL); b43_key_write() 1058 dev->key[index].keyconf = keyconf; b43_key_write() 1063 static int b43_key_clear(struct b43_wldev dev, int index) b43_key_clear() argument 1065 if (B43_WARN_ON((index < 0) \|\| (index >= ARRAY_SIZE(dev->key)))) b43_key_clear() 1067 do_key_write(dev, index, B43_SEC_ALGO_NONE, b43_key_clear() 1069 if ((index <= 3) && !b43_new_kidx_api(dev)) { b43_key_clear() 1070 do_key_write(dev, index + 4, B43_SEC_ALGO_NONE, b43_key_clear() 1073 dev->key[index].keyconf = NULL; b43_key_clear() 1078 static void b43_clear_keys(struct b43_wldev dev) b43_clear_keys() argument 1082 if (b43_new_kidx_api(dev)) b43_clear_keys() 1087 b43_key_clear(dev, i); b43_clear_keys() 1090 static void b43_dump_keymemory(struct b43_wldev dev) b43_dump_keymemory() argument 1100 if (!b43_debug(dev, B43_DBG_KEYS)) b43_dump_keymemory() 1103 hf = b43_hf_read(dev); b43_dump_keymemory() 1104 b43dbg(dev->wl, "Hardware key memory dump: USEDEFKEYS=%u\n", b43_dump_keymemory() 1106 if (b43_new_kidx_api(dev)) { b43_dump_keymemory() 1114 key = &(dev->key[index]); b43_dump_keymemory() 1117 offset = dev->ktp + (index * B43_SEC_KEYSIZE); b43_dump_keymemory() 1119 u16 tmp = b43_shm_read16(dev, B43_SHM_SHARED, offset + i); b43_dump_keymemory() 1123 algo = b43_shm_read16(dev, B43_SHM_SHARED, b43_dump_keymemory() 1132 u16 tmp = b43_shm_read16(dev, B43_SHM_SHARED, offset + i); b43_dump_keymemory() 1136 rcmta0 = b43_shm_read32(dev, B43_SHM_RCMTA, b43_dump_keymemory() 1138 rcmta1 = b43_shm_read16(dev, B43_SHM_RCMTA, b43_dump_keymemory() 1149 void b43_power_saving_ctl_bits(struct b43_wldev dev, unsigned int ps_flags) b43_power_saving_ctl_bits() argument 1183 macctl = b43_read32(dev, B43_MMIO_MACCTL); b43_power_saving_ctl_bits() 1192 b43_write32(dev, B43_MMIO_MACCTL, macctl); b43_power_saving_ctl_bits() 1194 b43_read32(dev, B43_MMIO_MACCTL); b43_power_saving_ctl_bits() 1195 if (awake && dev->dev->core_rev >= 5) { b43_power_saving_ctl_bits() 1198 ucstat = b43_shm_read16(dev, B43_SHM_SHARED, b43_power_saving_ctl_bits() 1208 void b43_wireless_core_phy_pll_reset(struct b43_wldev dev) b43_wireless_core_phy_pll_reset() argument 1213 switch (dev->dev->bus_type) { b43_wireless_core_phy_pll_reset() 1216 bcma_cc = &dev->dev->bdev->bus->drv_cc; b43_wireless_core_phy_pll_reset() 1226 ssb_cc = &dev->dev->sdev->bus->chipco; b43_wireless_core_phy_pll_reset() 1238 static void b43_bcma_phy_reset(struct b43_wldev dev) b43_bcma_phy_reset() argument 1243 flags = bcma_aread32(dev->dev->bdev, BCMA_IOCTL); b43_bcma_phy_reset() 1246 bcma_awrite32(dev->dev->bdev, BCMA_IOCTL, flags); b43_bcma_phy_reset() 1249 b43_phy_take_out_of_reset(dev); b43_bcma_phy_reset() 1252 static void b43_bcma_wireless_core_reset(struct b43_wldev dev, bool gmode) b43_bcma_wireless_core_reset() argument 1263 b43_device_enable(dev, flags); b43_bcma_wireless_core_reset() 1265 if (dev->phy.type == B43_PHYTYPE_AC) { b43_bcma_wireless_core_reset() 1268 tmp = bcma_aread32(dev->dev->bdev, BCMA_IOCTL); b43_bcma_wireless_core_reset() 1271 bcma_awrite32(dev->dev->bdev, BCMA_IOCTL, tmp); b43_bcma_wireless_core_reset() 1273 tmp = bcma_aread32(dev->dev->bdev, BCMA_IOCTL); b43_bcma_wireless_core_reset() 1275 bcma_awrite32(dev->dev->bdev, BCMA_IOCTL, tmp); b43_bcma_wireless_core_reset() 1277 tmp = bcma_aread32(dev->dev->bdev, BCMA_IOCTL); b43_bcma_wireless_core_reset() 1279 bcma_awrite32(dev->dev->bdev, BCMA_IOCTL, tmp); b43_bcma_wireless_core_reset() 1282 bcma_core_set_clockmode(dev->dev->bdev, BCMA_CLKMODE_FAST); b43_bcma_wireless_core_reset() 1283 b43_bcma_phy_reset(dev); b43_bcma_wireless_core_reset() 1284 bcma_core_pll_ctl(dev->dev->bdev, req, status, true); b43_bcma_wireless_core_reset() 1289 static void b43_ssb_wireless_core_reset(struct b43_wldev dev, bool gmode) b43_ssb_wireless_core_reset() argument 1297 if (dev->phy.type == B43_PHYTYPE_N) b43_ssb_wireless_core_reset() 1299 b43_device_enable(dev, flags); b43_ssb_wireless_core_reset() 1302 b43_phy_take_out_of_reset(dev); b43_ssb_wireless_core_reset() 1306 void b43_wireless_core_reset(struct b43_wldev dev, bool gmode) b43_wireless_core_reset() argument 1310 switch (dev->dev->bus_type) { b43_wireless_core_reset() 1313 b43_bcma_wireless_core_reset(dev, gmode); b43_wireless_core_reset() 1318 b43_ssb_wireless_core_reset(dev, gmode); b43_wireless_core_reset() 1327 if (dev->phy.ops) b43_wireless_core_reset() 1328 dev->phy.ops->switch_analog(dev, 1); b43_wireless_core_reset() 1330 macctl = b43_read32(dev, B43_MMIO_MACCTL); b43_wireless_core_reset() 1335 b43_write32(dev, B43_MMIO_MACCTL, macctl); b43_wireless_core_reset() 1338 static void handle_irq_transmit_status(struct b43_wldev dev) handle_irq_transmit_status() argument 1345 v0 = b43_read32(dev, B43_MMIO_XMITSTAT_0); handle_irq_transmit_status() 1348 v1 = b43_read32(dev, B43_MMIO_XMITSTAT_1); handle_irq_transmit_status() 1362 b43_handle_txstatus(dev, &stat); handle_irq_transmit_status() 1366 static void drain_txstatus_queue(struct b43_wldev dev) drain_txstatus_queue() argument 1370 if (dev->dev->core_rev < 5) drain_txstatus_queue() 1376 dummy = b43_read32(dev, B43_MMIO_XMITSTAT_0); drain_txstatus_queue() 1379 dummy = b43_read32(dev, B43_MMIO_XMITSTAT_1); drain_txstatus_queue() 1383 static u32 b43_jssi_read(struct b43_wldev dev) b43_jssi_read() argument 1387 val = b43_shm_read16(dev, B43_SHM_SHARED, B43_SHM_SH_JSSI1); b43_jssi_read() 1389 val \|= b43_shm_read16(dev, B43_SHM_SHARED, B43_SHM_SH_JSSI0); b43_jssi_read() 1394 static void b43_jssi_write(struct b43_wldev dev, u32 jssi) b43_jssi_write() argument 1396 b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_JSSI0, b43_jssi_write() 1398 b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_JSSI1, b43_jssi_write() 1402 static void b43_generate_noise_sample(struct b43_wldev dev) b43_generate_noise_sample() argument 1404 b43_jssi_write(dev, 0x7F7F7F7F); b43_generate_noise_sample() 1405 b43_write32(dev, B43_MMIO_MACCMD, b43_generate_noise_sample() 1406 b43_read32(dev, B43_MMIO_MACCMD) \| B43_MACCMD_BGNOISE); b43_generate_noise_sample() 1409 static void b43_calculate_link_quality(struct b43_wldev dev) b43_calculate_link_quality() argument 1413 if (dev->phy.type != B43_PHYTYPE_G) b43_calculate_link_quality() 1415 if (dev->noisecalc.calculation_running) b43_calculate_link_quality() 1417 dev->noisecalc.calculation_running = true; b43_calculate_link_quality() 1418 dev->noisecalc.nr_samples = 0; b43_calculate_link_quality() 1420 b43_generate_noise_sample(dev); b43_calculate_link_quality() 1423 static void handle_irq_noise(struct b43_wldev dev) handle_irq_noise() argument 1425 struct b43_phy_g phy = dev->phy.g; handle_irq_noise() 1433 if (dev->phy.type != B43_PHYTYPE_G) handle_irq_noise() 1445 B43_WARN_ON(!dev->noisecalc.calculation_running); handle_irq_noise() 1446 ((__le32 )noise) = cpu_to_le32(b43_jssi_read(dev)); handle_irq_noise() 1452 B43_WARN_ON(dev->noisecalc.nr_samples >= 8); handle_irq_noise() 1453 i = dev->noisecalc.nr_samples; handle_irq_noise() 1458 dev->noisecalc.samples[i][0] = phy->nrssi_lt[noise[0]]; handle_irq_noise() 1459 dev->noisecalc.samples[i][1] = phy->nrssi_lt[noise[1]]; handle_irq_noise() 1460 dev->noisecalc.samples[i][2] = phy->nrssi_lt[noise[2]]; handle_irq_noise() 1461 dev->noisecalc.samples[i][3] = phy->nrssi_lt[noise[3]]; handle_irq_noise() 1462 dev->noisecalc.nr_samples++; handle_irq_noise() 1463 if (dev->noisecalc.nr_samples == 8) { handle_irq_noise() 1468 average += dev->noisecalc.samples[i][j]; handle_irq_noise() 1474 tmp = b43_shm_read16(dev, B43_SHM_SHARED, 0x40C); handle_irq_noise() 1485 dev->stats.link_noise = average; handle_irq_noise() 1486 dev->noisecalc.calculation_running = false; handle_irq_noise() 1490 b43_generate_noise_sample(dev); handle_irq_noise() 1493 static void handle_irq_tbtt_indication(struct b43_wldev dev) handle_irq_tbtt_indication() argument 1495 if (b43_is_mode(dev->wl, NL80211_IFTYPE_AP)) { handle_irq_tbtt_indication() 1499 b43_power_saving_ctl_bits(dev, 0); handle_irq_tbtt_indication() 1501 if (b43_is_mode(dev->wl, NL80211_IFTYPE_ADHOC)) handle_irq_tbtt_indication() 1502 dev->dfq_valid = true; handle_irq_tbtt_indication() 1505 static void handle_irq_atim_end(struct b43_wldev dev) handle_irq_atim_end() argument 1507 if (dev->dfq_valid) { handle_irq_atim_end() 1508 b43_write32(dev, B43_MMIO_MACCMD, handle_irq_atim_end() 1509 b43_read32(dev, B43_MMIO_MACCMD) handle_irq_atim_end() 1511 dev->dfq_valid = false; handle_irq_atim_end() 1515 static void handle_irq_pmq(struct b43_wldev dev) handle_irq_pmq() argument 1522 tmp = b43_read32(dev, B43_MMIO_PS_STATUS); handle_irq_pmq() 1527 b43_write16(dev, B43_MMIO_PS_STATUS, 0x0002); handle_irq_pmq() 1530 static void b43_write_template_common(struct b43_wldev dev, b43_write_template_common() argument 1540 b43_ram_write(dev, ram_offset, le32_to_cpu(plcp.data)); b43_write_template_common() 1547 b43_ram_write(dev, ram_offset, tmp); b43_write_template_common() 1557 b43_ram_write(dev, ram_offset + i - 2, tmp); b43_write_template_common() 1559 b43_shm_write16(dev, B43_SHM_SHARED, shm_size_offset, b43_write_template_common() 1566 u8 b43_ieee80211_antenna_sanitize(struct b43_wldev dev, b43_ieee80211_antenna_sanitize() argument 1577 if (dev->phy.gmode) b43_ieee80211_antenna_sanitize() 1578 antenna_mask = dev->dev->bus_sprom->ant_available_bg; b43_ieee80211_antenna_sanitize() 1580 antenna_mask = dev->dev->bus_sprom->ant_available_a; b43_ieee80211_antenna_sanitize() 1610 static void b43_write_beacon_template(struct b43_wldev dev, b43_write_beacon_template() argument 1625 spin_lock_irqsave(&dev->wl->beacon_lock, flags); b43_write_beacon_template() 1626 info = IEEE80211_SKB_CB(dev->wl->current_beacon); b43_write_beacon_template() 1627 rate = ieee80211_get_tx_rate(dev->wl->hw, info)->hw_value; b43_write_beacon_template() 1629 beacon_skb = skb_clone(dev->wl->current_beacon, GFP_ATOMIC); b43_write_beacon_template() 1630 spin_unlock_irqrestore(&dev->wl->beacon_lock, flags); b43_write_beacon_template() 1633 b43dbg(dev->wl, "Could not upload beacon. " b43_write_beacon_template() 1642 b43_write_template_common(dev, (const u8 )bcn, b43_write_beacon_template() 1648 ctl = b43_shm_read16(dev, B43_SHM_SHARED, B43_SHM_SH_BEACPHYCTL); b43_write_beacon_template() 1658 b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_BEACPHYCTL, ctl); b43_write_beacon_template() 1688 b43_shm_write16(dev, B43_SHM_SHARED, b43_write_beacon_template() 1690 b43_shm_write16(dev, B43_SHM_SHARED, b43_write_beacon_template() 1701 b43_shm_write16(dev, B43_SHM_SHARED, b43_write_beacon_template() 1704 b43_shm_write16(dev, B43_SHM_SHARED, b43_write_beacon_template() 1707 b43dbg(dev->wl, "Updated beacon template at 0x%x\n", ram_offset); b43_write_beacon_template() 1712 static void b43_upload_beacon0(struct b43_wldev dev) b43_upload_beacon0() argument 1714 struct b43_wl wl = dev->wl; b43_upload_beacon0() 1718 b43_write_beacon_template(dev, B43_SHM_SH_BT_BASE0, B43_SHM_SH_BTL0); b43_upload_beacon0() 1722 static void b43_upload_beacon1(struct b43_wldev dev) b43_upload_beacon1() argument 1724 struct b43_wl wl = dev->wl; b43_upload_beacon1() 1728 b43_write_beacon_template(dev, B43_SHM_SH_BT_BASE1, B43_SHM_SH_BTL1); b43_upload_beacon1() 1732 static void handle_irq_beacon(struct b43_wldev dev) handle_irq_beacon() argument 1734 struct b43_wl wl = dev->wl; handle_irq_beacon() 1745 dev->irq_mask &= ~B43_IRQ_BEACON; handle_irq_beacon() 1747 cmd = b43_read32(dev, B43_MMIO_MACCMD); handle_irq_beacon() 1753 b43_write32(dev, B43_MMIO_GEN_IRQ_REASON, B43_IRQ_BEACON); handle_irq_beacon() 1754 dev->irq_mask \|= B43_IRQ_BEACON; handle_irq_beacon() 1762 b43_upload_beacon0(dev); handle_irq_beacon() 1763 b43_upload_beacon1(dev); handle_irq_beacon() 1764 cmd = b43_read32(dev, B43_MMIO_MACCMD); handle_irq_beacon() 1766 b43_write32(dev, B43_MMIO_MACCMD, cmd); handle_irq_beacon() 1769 b43_upload_beacon0(dev); handle_irq_beacon() 1770 cmd = b43_read32(dev, B43_MMIO_MACCMD); handle_irq_beacon() 1772 b43_write32(dev, B43_MMIO_MACCMD, cmd); handle_irq_beacon() 1774 b43_upload_beacon1(dev); handle_irq_beacon() 1775 cmd = b43_read32(dev, B43_MMIO_MACCMD); handle_irq_beacon() 1777 b43_write32(dev, B43_MMIO_MACCMD, cmd); handle_irq_beacon() 1782 static void b43_do_beacon_update_trigger_work(struct b43_wldev dev) b43_do_beacon_update_trigger_work() argument 1784 u32 old_irq_mask = dev->irq_mask; b43_do_beacon_update_trigger_work() 1787 handle_irq_beacon(dev); b43_do_beacon_update_trigger_work() 1788 if (old_irq_mask != dev->irq_mask) { b43_do_beacon_update_trigger_work() 1790 B43_WARN_ON(!dev->irq_mask); b43_do_beacon_update_trigger_work() 1791 if (b43_read32(dev, B43_MMIO_GEN_IRQ_MASK)) { b43_do_beacon_update_trigger_work() 1792 b43_write32(dev, B43_MMIO_GEN_IRQ_MASK, dev->irq_mask); b43_do_beacon_update_trigger_work() 1807 struct b43_wldev dev; b43_beacon_update_trigger_work() local 1810 dev = wl->current_dev; b43_beacon_update_trigger_work() 1811 if (likely(dev && (b43_status(dev) >= B43_STAT_INITIALIZED))) { b43_beacon_update_trigger_work() 1812 if (b43_bus_host_is_sdio(dev->dev)) { b43_beacon_update_trigger_work() 1814 b43_do_beacon_update_trigger_work(dev); b43_beacon_update_trigger_work() 1818 b43_do_beacon_update_trigger_work(dev); b43_beacon_update_trigger_work() 1859 static void b43_set_beacon_int(struct b43_wldev dev, u16 beacon_int) b43_set_beacon_int() argument 1861 b43_time_lock(dev); b43_set_beacon_int() 1862 if (dev->dev->core_rev >= 3) { b43_set_beacon_int() 1863 b43_write32(dev, B43_MMIO_TSF_CFP_REP, (beacon_int << 16)); b43_set_beacon_int() 1864 b43_write32(dev, B43_MMIO_TSF_CFP_START, (beacon_int << 10)); b43_set_beacon_int() 1866 b43_write16(dev, 0x606, (beacon_int >> 6)); b43_set_beacon_int() 1867 b43_write16(dev, 0x610, beacon_int); b43_set_beacon_int() 1869 b43_time_unlock(dev); b43_set_beacon_int() 1870 b43dbg(dev->wl, "Set beacon interval to %u\n", beacon_int); b43_set_beacon_int() 1873 static void b43_handle_firmware_panic(struct b43_wldev dev) b43_handle_firmware_panic() argument 1878 reason = b43_shm_read16(dev, B43_SHM_SCRATCH, B43_FWPANIC_REASON_REG); b43_handle_firmware_panic() 1879 b43err(dev->wl, "Whoopsy, firmware panic! Reason: %u\n", reason); b43_handle_firmware_panic() 1883 b43dbg(dev->wl, "The panic reason is unknown.\n"); b43_handle_firmware_panic() 1892 b43_controller_restart(dev, "Microcode panic"); b43_handle_firmware_panic() 1897 static void handle_irq_ucode_debug(struct b43_wldev dev) handle_irq_ucode_debug() argument 1904 if (!dev->fw.opensource) handle_irq_ucode_debug() 1908 reason = b43_shm_read16(dev, B43_SHM_SCRATCH, B43_DEBUGIRQ_REASON_REG); handle_irq_ucode_debug() 1912 b43_handle_firmware_panic(dev); handle_irq_ucode_debug() 1919 b43dbg(dev->wl, "SHM-dump: Failed to allocate memory\n"); handle_irq_ucode_debug() 1923 u16 tmp = b43_shm_read16(dev, B43_SHM_SHARED, i); handle_irq_ucode_debug() 1926 b43info(dev->wl, "Shared memory dump:\n"); handle_irq_ucode_debug() 1934 b43info(dev->wl, "Microcode register dump:\n"); handle_irq_ucode_debug() 1936 u16 tmp = b43_shm_read16(dev, B43_SHM_SCRATCH, i); handle_irq_ucode_debug() 1951 marker_id = b43_shm_read16(dev, B43_SHM_SCRATCH, handle_irq_ucode_debug() 1953 marker_line = b43_shm_read16(dev, B43_SHM_SCRATCH, handle_irq_ucode_debug() 1955 b43info(dev->wl, "The firmware just executed the MARKER(%u) " handle_irq_ucode_debug() 1960 b43dbg(dev->wl, "Debug-IRQ triggered for unknown reason: %u\n", handle_irq_ucode_debug() 1965 b43_shm_write16(dev, B43_SHM_SCRATCH, handle_irq_ucode_debug() 1969 static void b43_do_interrupt_thread(struct b43_wldev dev) b43_do_interrupt_thread() argument 1972 u32 dma_reason[ARRAY_SIZE(dev->dma_reason)]; b43_do_interrupt_thread() 1976 if (unlikely(b43_status(dev) != B43_STAT_STARTED)) b43_do_interrupt_thread() 1979 reason = dev->irq_reason; b43_do_interrupt_thread() 1981 dma_reason[i] = dev->dma_reason[i]; b43_do_interrupt_thread() 1986 b43err(dev->wl, "MAC transmission error\n"); b43_do_interrupt_thread() 1989 b43err(dev->wl, "PHY transmission error\n"); b43_do_interrupt_thread() 1991 if (unlikely(atomic_dec_and_test(&dev->phy.txerr_cnt))) { b43_do_interrupt_thread() 1992 atomic_set(&dev->phy.txerr_cnt, b43_do_interrupt_thread() 1994 b43err(dev->wl, "Too many PHY TX errors, " b43_do_interrupt_thread() 1996 b43_controller_restart(dev, "PHY TX errors"); b43_do_interrupt_thread() 2001 b43err(dev->wl, b43_do_interrupt_thread() 2006 b43err(dev->wl, "This device does not support DMA " b43_do_interrupt_thread() 2009 dev->use_pio = true; b43_do_interrupt_thread() 2010 b43_controller_restart(dev, "DMA error"); b43_do_interrupt_thread() 2015 handle_irq_ucode_debug(dev); b43_do_interrupt_thread() 2017 handle_irq_tbtt_indication(dev); b43_do_interrupt_thread() 2019 handle_irq_atim_end(dev); b43_do_interrupt_thread() 2021 handle_irq_beacon(dev); b43_do_interrupt_thread() 2023 handle_irq_pmq(dev); b43_do_interrupt_thread() 2027 handle_irq_noise(dev); b43_do_interrupt_thread() 2032 b43warn(dev->wl, "RX descriptor underrun\n"); b43_do_interrupt_thread() 2033 b43_dma_handle_rx_overflow(dev->dma.rx_ring); b43_do_interrupt_thread() 2036 if (b43_using_pio_transfers(dev)) b43_do_interrupt_thread() 2037 b43_pio_rx(dev->pio.rx_queue); b43_do_interrupt_thread() 2039 b43_dma_rx(dev->dma.rx_ring); b43_do_interrupt_thread() 2048 handle_irq_transmit_status(dev); b43_do_interrupt_thread() 2051 b43_write32(dev, B43_MMIO_GEN_IRQ_MASK, dev->irq_mask); b43_do_interrupt_thread() 2054 if (b43_debug(dev, B43_DBG_VERBOSESTATS)) { b43_do_interrupt_thread() 2055 dev->irq_count++; b43_do_interrupt_thread() 2056 for (i = 0; i < ARRAY_SIZE(dev->irq_bit_count); i++) { b43_do_interrupt_thread() 2058 dev->irq_bit_count[i]++; b43_do_interrupt_thread() 2067 struct b43_wldev dev = dev_id; b43_interrupt_thread_handler() local 2069 mutex_lock(&dev->wl->mutex); b43_interrupt_thread_handler() 2070 b43_do_interrupt_thread(dev); b43_interrupt_thread_handler() 2072 mutex_unlock(&dev->wl->mutex); b43_interrupt_thread_handler() 2077 static irqreturn_t b43_do_interrupt(struct b43_wldev dev) b43_do_interrupt() argument 2084 reason = b43_read32(dev, B43_MMIO_GEN_IRQ_REASON); b43_do_interrupt() 2087 reason &= dev->irq_mask; b43_do_interrupt() 2091 dev->dma_reason[0] = b43_read32(dev, B43_MMIO_DMA0_REASON) b43_do_interrupt() 2093 dev->dma_reason[1] = b43_read32(dev, B43_MMIO_DMA1_REASON) b43_do_interrupt() 2095 dev->dma_reason[2] = b43_read32(dev, B43_MMIO_DMA2_REASON) b43_do_interrupt() 2097 dev->dma_reason[3] = b43_read32(dev, B43_MMIO_DMA3_REASON) b43_do_interrupt() 2099 dev->dma_reason[4] = b43_read32(dev, B43_MMIO_DMA4_REASON) b43_do_interrupt() 2102 dev->dma_reason[5] = b43_read32(dev, B43_MMIO_DMA5_REASON) b43_do_interrupt() 2107 b43_write32(dev, B43_MMIO_GEN_IRQ_REASON, reason); b43_do_interrupt() 2108 b43_write32(dev, B43_MMIO_DMA0_REASON, dev->dma_reason[0]); b43_do_interrupt() 2109 b43_write32(dev, B43_MMIO_DMA1_REASON, dev->dma_reason[1]); b43_do_interrupt() 2110 b43_write32(dev, B43_MMIO_DMA2_REASON, dev->dma_reason[2]); b43_do_interrupt() 2111 b43_write32(dev, B43_MMIO_DMA3_REASON, dev->dma_reason[3]); b43_do_interrupt() 2112 b43_write32(dev, B43_MMIO_DMA4_REASON, dev->dma_reason[4]); b43_do_interrupt() 2114 b43_write32(dev, B43_MMIO_DMA5_REASON, dev->dma_reason[5]); b43_do_interrupt() 2118 b43_write32(dev, B43_MMIO_GEN_IRQ_MASK, 0); b43_do_interrupt() 2120 dev->irq_reason = reason; b43_do_interrupt() 2128 struct b43_wldev dev = dev_id; b43_interrupt_handler() local 2131 if (unlikely(b43_status(dev) < B43_STAT_STARTED)) b43_interrupt_handler() 2134 spin_lock(&dev->wl->hardirq_lock); b43_interrupt_handler() 2135 ret = b43_do_interrupt(dev); b43_interrupt_handler() 2137 spin_unlock(&dev->wl->hardirq_lock); b43_interrupt_handler() 2143 static void b43_sdio_interrupt_handler(struct b43_wldev dev) b43_sdio_interrupt_handler() argument 2145 struct b43_wl wl = dev->wl; b43_sdio_interrupt_handler() 2150 ret = b43_do_interrupt(dev); b43_sdio_interrupt_handler() 2152 b43_do_interrupt_thread(dev); b43_sdio_interrupt_handler() 2164 static void b43_release_firmware(struct b43_wldev dev) b43_release_firmware() argument 2166 complete(&dev->fw_load_complete); b43_release_firmware() 2167 b43_do_release_fw(&dev->fw.ucode); b43_release_firmware() 2168 b43_do_release_fw(&dev->fw.pcm); b43_release_firmware() 2169 b43_do_release_fw(&dev->fw.initvals); b43_release_firmware() 2170 b43_do_release_fw(&dev->fw.initvals_band); b43_release_firmware() 2192 complete(&ctx->dev->fw_load_complete); b43_fw_cb() 2239 init_completion(&ctx->dev->fw_load_complete); b43_do_request_fw() 2241 ctx->dev->dev->dev, GFP_KERNEL, b43_do_request_fw() 2247 wait_for_completion(&ctx->dev->fw_load_complete); b43_do_request_fw() 2255 ctx->dev->dev->dev); b43_do_request_fw() 2306 struct b43_wldev dev = ctx->dev; b43_try_request_fw() local 2307 struct b43_firmware fw = &ctx->dev->fw; b43_try_request_fw() 2308 struct b43_phy phy = &dev->phy; b43_try_request_fw() 2309 const u8 rev = ctx->dev->dev->core_rev; b43_try_request_fw() 2401 switch (dev->phy.type) { b43_try_request_fw() 2461 switch (dev->phy.type) { b43_try_request_fw() 2525 b43err(dev->wl, "The driver does not know which firmware (ucode) " b43_try_request_fw() 2531 b43err(dev->wl, "The driver does not know which firmware (PCM) " b43_try_request_fw() 2537 b43err(dev->wl, "The driver does not know which firmware (initvals) " b43_try_request_fw() 2548 b43_release_firmware(dev); b43_try_request_fw() 2552 static int b43_one_core_attach(struct b43_bus_dev dev, struct b43_wl wl); 2553 static void b43_one_core_detach(struct b43_bus_dev dev); 2560 struct b43_wldev dev = wl->current_dev; b43_request_firmware() local 2569 ctx->dev = dev; b43_request_firmware() 2591 b43err(dev->wl, "%s", errmsg); b43_request_firmware() 2593 b43_print_fw_helptext(dev->wl, 1); b43_request_firmware() 2598 if (!modparam_qos \|\| dev->fw.opensource) b43_request_firmware() 2613 b43_one_core_detach(dev->dev); b43_request_firmware() 2619 static int b43_upload_microcode(struct b43_wldev dev) b43_upload_microcode() argument 2621 struct wiphy wiphy = dev->wl->hw->wiphy; b43_upload_microcode() 2630 macctl = b43_read32(dev, B43_MMIO_MACCTL); b43_upload_microcode() 2633 b43_write32(dev, B43_MMIO_MACCTL, macctl); b43_upload_microcode() 2636 b43_shm_write16(dev, B43_SHM_SCRATCH, i, 0); b43_upload_microcode() 2638 b43_shm_write16(dev, B43_SHM_SHARED, i, 0); b43_upload_microcode() 2641 data = (__be32 ) (dev->fw.ucode.data->data + hdr_len); b43_upload_microcode() 2642 len = (dev->fw.ucode.data->size - hdr_len) / sizeof(__be32); b43_upload_microcode() 2643 b43_shm_control_word(dev, B43_SHM_UCODE \| B43_SHM_AUTOINC_W, 0x0000); b43_upload_microcode() 2645 b43_write32(dev, B43_MMIO_SHM_DATA, be32_to_cpu(data[i])); b43_upload_microcode() 2649 if (dev->fw.pcm.data) { b43_upload_microcode() 2651 data = (__be32 ) (dev->fw.pcm.data->data + hdr_len); b43_upload_microcode() 2652 len = (dev->fw.pcm.data->size - hdr_len) / sizeof(__be32); b43_upload_microcode() 2653 b43_shm_control_word(dev, B43_SHM_HW, 0x01EA); b43_upload_microcode() 2654 b43_write32(dev, B43_MMIO_SHM_DATA, 0x00004000); b43_upload_microcode() 2656 b43_shm_control_word(dev, B43_SHM_HW, 0x01EB); b43_upload_microcode() 2658 b43_write32(dev, B43_MMIO_SHM_DATA, be32_to_cpu(data[i])); b43_upload_microcode() 2663 b43_write32(dev, B43_MMIO_GEN_IRQ_REASON, B43_IRQ_ALL); b43_upload_microcode() 2666 b43_maskset32(dev, B43_MMIO_MACCTL, ~B43_MACCTL_PSM_JMP0, b43_upload_microcode() 2672 tmp = b43_read32(dev, B43_MMIO_GEN_IRQ_REASON); b43_upload_microcode() 2677 b43err(dev->wl, "Microcode not responding\n"); b43_upload_microcode() 2678 b43_print_fw_helptext(dev->wl, 1); b43_upload_microcode() 2684 b43_read32(dev, B43_MMIO_GEN_IRQ_REASON); /* dummy read / b43_upload_microcode() 2687 fwrev = b43_shm_read16(dev, B43_SHM_SHARED, B43_SHM_SH_UCODEREV); b43_upload_microcode() 2688 fwpatch = b43_shm_read16(dev, B43_SHM_SHARED, B43_SHM_SH_UCODEPATCH); b43_upload_microcode() 2689 fwdate = b43_shm_read16(dev, B43_SHM_SHARED, B43_SHM_SH_UCODEDATE); b43_upload_microcode() 2690 fwtime = b43_shm_read16(dev, B43_SHM_SHARED, B43_SHM_SH_UCODETIME); b43_upload_microcode() 2693 b43err(dev->wl, "YOUR FIRMWARE IS TOO OLD. Firmware from " b43_upload_microcode() 2696 b43_print_fw_helptext(dev->wl, 1); b43_upload_microcode() 2700 dev->fw.rev = fwrev; b43_upload_microcode() 2701 dev->fw.patch = fwpatch; b43_upload_microcode() 2702 if (dev->fw.rev >= 598) b43_upload_microcode() 2703 dev->fw.hdr_format = B43_FW_HDR_598; b43_upload_microcode() 2704 else if (dev->fw.rev >= 410) b43_upload_microcode() 2705 dev->fw.hdr_format = B43_FW_HDR_410; b43_upload_microcode() 2707 dev->fw.hdr_format = B43_FW_HDR_351; b43_upload_microcode() 2708 WARN_ON(dev->fw.opensource != (fwdate == 0xFFFF)); b43_upload_microcode() 2710 dev->qos_enabled = dev->wl->hw->queues > 1; b43_upload_microcode() 2712 dev->hwcrypto_enabled = true; b43_upload_microcode() 2714 if (dev->fw.opensource) { b43_upload_microcode() 2718 dev->fw.patch = fwtime; b43_upload_microcode() 2719 b43info(dev->wl, "Loading OpenSource firmware version %u.%u\n", b43_upload_microcode() 2720 dev->fw.rev, dev->fw.patch); b43_upload_microcode() 2722 fwcapa = b43_fwcapa_read(dev); b43_upload_microcode() 2723 if (!(fwcapa & B43_FWCAPA_HWCRYPTO) \|\| dev->fw.pcm_request_failed) { b43_upload_microcode() 2724 b43info(dev->wl, "Hardware crypto acceleration not supported by firmware\n"); b43_upload_microcode() 2726 dev->hwcrypto_enabled = false; b43_upload_microcode() 2731 b43info(dev->wl, "Loading firmware version %u.%u " b43_upload_microcode() 2736 if (dev->fw.pcm_request_failed) { b43_upload_microcode() 2737 b43warn(dev->wl, "No \"pcm5.fw\" firmware file found. " b43_upload_microcode() 2739 b43_print_fw_helptext(dev->wl, 0); b43_upload_microcode() 2744 dev->fw.rev, dev->fw.patch); b43_upload_microcode() 2745 wiphy->hw_version = dev->dev->core_id; b43_upload_microcode() 2747 if (dev->fw.hdr_format == B43_FW_HDR_351) { b43_upload_microcode() 2750 b43warn(dev->wl, "You are using an old firmware image. " b43_upload_microcode() 2753 b43_print_fw_helptext(dev->wl, 0); b43_upload_microcode() 2760 b43_maskset32(dev, B43_MMIO_MACCTL, ~B43_MACCTL_PSM_RUN, b43_upload_microcode() 2766 static int b43_write_initvals(struct b43_wldev dev, b43_write_initvals() argument 2795 b43_write32(dev, offset, value); b43_write_initvals() 2808 b43_write16(dev, offset, value); b43_write_initvals() 2821 b43err(dev->wl, "Initial Values Firmware file-format error.\n"); b43_write_initvals() 2822 b43_print_fw_helptext(dev->wl, 1); b43_write_initvals() 2827 static int b43_upload_initvals(struct b43_wldev dev) b43_upload_initvals() argument 2831 struct b43_firmware fw = &dev->fw; b43_upload_initvals() 2838 return b43_write_initvals(dev, ivals, count, b43_upload_initvals() 2842 static int b43_upload_initvals_band(struct b43_wldev dev) b43_upload_initvals_band() argument 2846 struct b43_firmware fw = &dev->fw; b43_upload_initvals_band() 2856 return b43_write_initvals(dev, ivals, count, b43_upload_initvals_band() 2865 static struct ssb_device b43_ssb_gpio_dev(struct b43_wldev dev) b43_ssb_gpio_dev() argument 2867 struct ssb_bus bus = dev->dev->sdev->bus; b43_ssb_gpio_dev() 2870 return (bus->chipco.dev ? bus->chipco.dev : bus->pcicore.dev); b43_ssb_gpio_dev() 2872 return bus->chipco.dev; b43_ssb_gpio_dev() 2877 static int b43_gpio_init(struct b43_wldev dev) b43_gpio_init() argument 2884 b43_maskset32(dev, B43_MMIO_MACCTL, ~B43_MACCTL_GPOUTSMSK, 0); b43_gpio_init() 2885 b43_maskset16(dev, B43_MMIO_GPIO_MASK, ~0, 0xF); b43_gpio_init() 2889 if (dev->dev->chip_id == 0x4301) { b43_gpio_init() 2892 } else if (dev->dev->chip_id == 0x5354) { b43_gpio_init() 2898 b43_write16(dev, B43_MMIO_GPIO_MASK, b43_gpio_init() 2899 b43_read16(dev, B43_MMIO_GPIO_MASK) b43_gpio_init() 2908 if (dev->dev->bus_sprom->boardflags_lo & B43_BFL_PACTRL) { b43_gpio_init() 2910 b43_write16(dev, B43_MMIO_GPIO_MASK, b43_gpio_init() 2911 b43_read16(dev, B43_MMIO_GPIO_MASK) b43_gpio_init() 2917 switch (dev->dev->bus_type) { b43_gpio_init() 2920 bcma_chipco_gpio_control(&dev->dev->bdev->bus->drv_cc, mask, set); b43_gpio_init() 2925 gpiodev = b43_ssb_gpio_dev(dev); b43_gpio_init() 2938 static void b43_gpio_cleanup(struct b43_wldev dev) b43_gpio_cleanup() argument 2944 switch (dev->dev->bus_type) { b43_gpio_cleanup() 2947 bcma_chipco_gpio_control(&dev->dev->bdev->bus->drv_cc, ~0, 0); b43_gpio_cleanup() 2952 gpiodev = b43_ssb_gpio_dev(dev); b43_gpio_cleanup() 2961 void b43_mac_enable(struct b43_wldev dev) b43_mac_enable() argument 2963 if (b43_debug(dev, B43_DBG_FIRMWARE)) { b43_mac_enable() 2966 fwstate = b43_shm_read16(dev, B43_SHM_SHARED, b43_mac_enable() 2970 b43err(dev->wl, "b43_mac_enable(): The firmware " b43_mac_enable() 2976 dev->mac_suspended--; b43_mac_enable() 2977 B43_WARN_ON(dev->mac_suspended < 0); b43_mac_enable() 2978 if (dev->mac_suspended == 0) { b43_mac_enable() 2979 b43_maskset32(dev, B43_MMIO_MACCTL, ~0, B43_MACCTL_ENABLED); b43_mac_enable() 2980 b43_write32(dev, B43_MMIO_GEN_IRQ_REASON, b43_mac_enable() 2983 b43_read32(dev, B43_MMIO_MACCTL); b43_mac_enable() 2984 b43_read32(dev, B43_MMIO_GEN_IRQ_REASON); b43_mac_enable() 2985 b43_power_saving_ctl_bits(dev, 0); b43_mac_enable() 2990 void b43_mac_suspend(struct b43_wldev dev) b43_mac_suspend() argument 2996 B43_WARN_ON(dev->mac_suspended < 0); b43_mac_suspend() 2998 if (dev->mac_suspended == 0) { b43_mac_suspend() 2999 b43_power_saving_ctl_bits(dev, B43_PS_AWAKE); b43_mac_suspend() 3000 b43_maskset32(dev, B43_MMIO_MACCTL, ~B43_MACCTL_ENABLED, 0); b43_mac_suspend() 3002 b43_read32(dev, B43_MMIO_MACCTL); b43_mac_suspend() 3004 tmp = b43_read32(dev, B43_MMIO_GEN_IRQ_REASON); b43_mac_suspend() 3011 tmp = b43_read32(dev, B43_MMIO_GEN_IRQ_REASON); b43_mac_suspend() 3016 b43err(dev->wl, "MAC suspend failed\n"); b43_mac_suspend() 3019 dev->mac_suspended++; b43_mac_suspend() 3023 void b43_mac_phy_clock_set(struct b43_wldev dev, bool on) b43_mac_phy_clock_set() argument 3027 switch (dev->dev->bus_type) { b43_mac_phy_clock_set() 3030 tmp = bcma_aread32(dev->dev->bdev, BCMA_IOCTL); b43_mac_phy_clock_set() 3035 bcma_awrite32(dev->dev->bdev, BCMA_IOCTL, tmp); b43_mac_phy_clock_set() 3040 tmp = ssb_read32(dev->dev->sdev, SSB_TMSLOW); b43_mac_phy_clock_set() 3045 ssb_write32(dev->dev->sdev, SSB_TMSLOW, tmp); b43_mac_phy_clock_set() 3052 void b43_mac_switch_freq(struct b43_wldev dev, u8 spurmode) b43_mac_switch_freq() argument 3054 u16 chip_id = dev->dev->chip_id; b43_mac_switch_freq() 3059 b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_LOW, 0x1862); b43_mac_switch_freq() 3060 b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_HIGH, 0x6); b43_mac_switch_freq() 3063 b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_LOW, 0x3e70); b43_mac_switch_freq() 3064 b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_HIGH, 0x6); b43_mac_switch_freq() 3067 b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_LOW, 0x6666); b43_mac_switch_freq() 3068 b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_HIGH, 0x6); b43_mac_switch_freq() 3080 b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_LOW, 0x2082); b43_mac_switch_freq() 3081 b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_HIGH, 0x8); b43_mac_switch_freq() 3084 b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_LOW, 0x5341); b43_mac_switch_freq() 3085 b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_HIGH, 0x8); b43_mac_switch_freq() 3088 b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_LOW, 0x8889); b43_mac_switch_freq() 3089 b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_HIGH, 0x8); b43_mac_switch_freq() 3092 } else if (dev->phy.type == B43_PHYTYPE_LCN) { b43_mac_switch_freq() 3095 b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_LOW, 0x7CE0); b43_mac_switch_freq() 3096 b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_HIGH, 0xC); b43_mac_switch_freq() 3099 b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_LOW, 0xCCCD); b43_mac_switch_freq() 3100 b43_write16(dev, B43_MMIO_TSF_CLK_FRAC_HIGH, 0xC); b43_mac_switch_freq() 3106 static void b43_adjust_opmode(struct b43_wldev dev) b43_adjust_opmode() argument 3108 struct b43_wl wl = dev->wl; b43_adjust_opmode() 3112 ctl = b43_read32(dev, B43_MMIO_MACCTL); b43_adjust_opmode() 3142 if (dev->dev->core_rev <= 4) b43_adjust_opmode() 3145 b43_write32(dev, B43_MMIO_MACCTL, ctl); b43_adjust_opmode() 3149 if (dev->dev->chip_id == 0x4306 && b43_adjust_opmode() 3150 dev->dev->chip_rev == 3) b43_adjust_opmode() 3155 b43_write16(dev, 0x612, cfp_pretbtt); b43_adjust_opmode() 3162 b43_maskset32(dev, B43_MMIO_MACCTL, ~B43_MACCTL_DISCPMQ, 0); b43_adjust_opmode() 3164 b43_maskset32(dev, B43_MMIO_MACCTL, ~0, B43_MACCTL_DISCPMQ); b43_adjust_opmode() 3167 static void b43_rate_memory_write(struct b43_wldev dev, u16 rate, int is_ofdm) b43_rate_memory_write() argument 3178 b43_shm_write16(dev, B43_SHM_SHARED, offset + 0x20, b43_rate_memory_write() 3179 b43_shm_read16(dev, B43_SHM_SHARED, offset)); b43_rate_memory_write() 3182 static void b43_rate_memory_init(struct b43_wldev dev) b43_rate_memory_init() argument 3184 switch (dev->phy.type) { b43_rate_memory_init() 3191 b43_rate_memory_write(dev, B43_OFDM_RATE_6MB, 1); b43_rate_memory_init() 3192 b43_rate_memory_write(dev, B43_OFDM_RATE_9MB, 1); b43_rate_memory_init() 3193 b43_rate_memory_write(dev, B43_OFDM_RATE_12MB, 1); b43_rate_memory_init() 3194 b43_rate_memory_write(dev, B43_OFDM_RATE_18MB, 1); b43_rate_memory_init() 3195 b43_rate_memory_write(dev, B43_OFDM_RATE_24MB, 1); b43_rate_memory_init() 3196 b43_rate_memory_write(dev, B43_OFDM_RATE_36MB, 1); b43_rate_memory_init() 3197 b43_rate_memory_write(dev, B43_OFDM_RATE_48MB, 1); b43_rate_memory_init() 3198 b43_rate_memory_write(dev, B43_OFDM_RATE_54MB, 1); b43_rate_memory_init() 3199 if (dev->phy.type == B43_PHYTYPE_A) b43_rate_memory_init() 3203 b43_rate_memory_write(dev, B43_CCK_RATE_1MB, 0); b43_rate_memory_init() 3204 b43_rate_memory_write(dev, B43_CCK_RATE_2MB, 0); b43_rate_memory_init() 3205 b43_rate_memory_write(dev, B43_CCK_RATE_5MB, 0); b43_rate_memory_init() 3206 b43_rate_memory_write(dev, B43_CCK_RATE_11MB, 0); b43_rate_memory_init() 3214 static void b43_set_phytxctl_defaults(struct b43_wldev dev) b43_set_phytxctl_defaults() argument 3222 b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_BEACPHYCTL, ctl); b43_set_phytxctl_defaults() 3223 b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_ACKCTSPHYCTL, ctl); b43_set_phytxctl_defaults() 3224 b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_PRPHYCTL, ctl); b43_set_phytxctl_defaults() 3228 static void b43_mgmtframe_txantenna(struct b43_wldev dev, int antenna) b43_mgmtframe_txantenna() argument 3236 tmp = b43_shm_read16(dev, B43_SHM_SHARED, B43_SHM_SH_ACKCTSPHYCTL); b43_mgmtframe_txantenna() 3238 b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_ACKCTSPHYCTL, tmp); b43_mgmtframe_txantenna() 3240 tmp = b43_shm_read16(dev, B43_SHM_SHARED, B43_SHM_SH_PRPHYCTL); b43_mgmtframe_txantenna() 3242 b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_PRPHYCTL, tmp); b43_mgmtframe_txantenna() 3246 static void b43_chip_exit(struct b43_wldev dev) b43_chip_exit() argument 3248 b43_phy_exit(dev); b43_chip_exit() 3249 b43_gpio_cleanup(dev); b43_chip_exit() 3256 static int b43_chip_init(struct b43_wldev dev) b43_chip_init() argument 3258 struct b43_phy phy = &dev->phy; b43_chip_init() 3265 if (dev->phy.gmode) b43_chip_init() 3268 b43_write32(dev, B43_MMIO_MACCTL, macctl); b43_chip_init() 3270 err = b43_upload_microcode(dev); b43_chip_init() 3274 err = b43_gpio_init(dev); b43_chip_init() 3278 err = b43_upload_initvals(dev); b43_chip_init() 3282 err = b43_upload_initvals_band(dev); b43_chip_init() 3287 phy->ops->switch_analog(dev, 1); b43_chip_init() 3288 err = b43_phy_init(dev); b43_chip_init() 3294 phy->ops->interf_mitigation(dev, B43_INTERFMODE_NONE); b43_chip_init() 3298 phy->ops->set_rx_antenna(dev, B43_ANTENNA_DEFAULT); b43_chip_init() 3299 b43_mgmtframe_txantenna(dev, B43_ANTENNA_DEFAULT); b43_chip_init() 3302 value16 = b43_read16(dev, 0x005E); b43_chip_init() 3304 b43_write16(dev, 0x005E, value16); b43_chip_init() 3306 b43_write32(dev, 0x0100, 0x01000000); b43_chip_init() 3307 if (dev->dev->core_rev < 5) b43_chip_init() 3308 b43_write32(dev, 0x010C, 0x01000000); b43_chip_init() 3310 b43_maskset32(dev, B43_MMIO_MACCTL, ~B43_MACCTL_INFRA, 0); b43_chip_init() 3311 b43_maskset32(dev, B43_MMIO_MACCTL, ~0, B43_MACCTL_INFRA); b43_chip_init() 3315 b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_PRMAXTIME, 0); b43_chip_init() 3318 b43_adjust_opmode(dev); b43_chip_init() 3320 if (dev->dev->core_rev < 3) { b43_chip_init() 3321 b43_write16(dev, 0x060E, 0x0000); b43_chip_init() 3322 b43_write16(dev, 0x0610, 0x8000); b43_chip_init() 3323 b43_write16(dev, 0x0604, 0x0000); b43_chip_init() 3324 b43_write16(dev, 0x0606, 0x0200); b43_chip_init() 3326 b43_write32(dev, 0x0188, 0x80000000); b43_chip_init() 3327 b43_write32(dev, 0x018C, 0x02000000); b43_chip_init() 3329 b43_write32(dev, B43_MMIO_GEN_IRQ_REASON, 0x00004000); b43_chip_init() 3330 b43_write32(dev, B43_MMIO_DMA0_IRQ_MASK, 0x0001FC00); b43_chip_init() 3331 b43_write32(dev, B43_MMIO_DMA1_IRQ_MASK, 0x0000DC00); b43_chip_init() 3332 b43_write32(dev, B43_MMIO_DMA2_IRQ_MASK, 0x0000DC00); b43_chip_init() 3333 b43_write32(dev, B43_MMIO_DMA3_IRQ_MASK, 0x0001DC00); b43_chip_init() 3334 b43_write32(dev, B43_MMIO_DMA4_IRQ_MASK, 0x0000DC00); b43_chip_init() 3335 b43_write32(dev, B43_MMIO_DMA5_IRQ_MASK, 0x0000DC00); b43_chip_init() 3337 b43_mac_phy_clock_set(dev, true); b43_chip_init() 3339 switch (dev->dev->bus_type) { b43_chip_init() 3343 b43_write16(dev, B43_MMIO_POWERUP_DELAY, 0xE74); b43_chip_init() 3348 b43_write16(dev, B43_MMIO_POWERUP_DELAY, b43_chip_init() 3349 dev->dev->sdev->bus->chipco.fast_pwrup_delay); b43_chip_init() 3355 b43dbg(dev->wl, "Chip initialized\n"); b43_chip_init() 3360 b43_gpio_cleanup(dev); b43_chip_init() 3364 static void b43_periodic_every60sec(struct b43_wldev dev) b43_periodic_every60sec() argument 3366 const struct b43_phy_operations ops = dev->phy.ops; b43_periodic_every60sec() 3369 ops->pwork_60sec(dev); b43_periodic_every60sec() 3372 b43_phy_txpower_check(dev, B43_TXPWR_IGNORE_TIME); b43_periodic_every60sec() 3375 static void b43_periodic_every30sec(struct b43_wldev dev) b43_periodic_every30sec() argument 3378 b43_calculate_link_quality(dev); b43_periodic_every30sec() 3381 static void b43_periodic_every15sec(struct b43_wldev dev) b43_periodic_every15sec() argument 3383 struct b43_phy phy = &dev->phy; b43_periodic_every15sec() 3386 if (dev->fw.opensource) { b43_periodic_every15sec() 3389 wdr = b43_shm_read16(dev, B43_SHM_SCRATCH, B43_WATCHDOG_REG); b43_periodic_every15sec() 3391 b43err(dev->wl, "Firmware watchdog: The firmware died!\n"); b43_periodic_every15sec() 3392 b43_controller_restart(dev, "Firmware watchdog"); b43_periodic_every15sec() 3395 b43_shm_write16(dev, B43_SHM_SCRATCH, b43_periodic_every15sec() 3401 phy->ops->pwork_15sec(dev); b43_periodic_every15sec() 3407 if (b43_debug(dev, B43_DBG_VERBOSESTATS)) { b43_periodic_every15sec() 3410 b43dbg(dev->wl, "Stats: %7u IRQs/sec, %7u TX/sec, %7u RX/sec\n", b43_periodic_every15sec() 3411 dev->irq_count / 15, b43_periodic_every15sec() 3412 dev->tx_count / 15, b43_periodic_every15sec() 3413 dev->rx_count / 15); b43_periodic_every15sec() 3414 dev->irq_count = 0; b43_periodic_every15sec() 3415 dev->tx_count = 0; b43_periodic_every15sec() 3416 dev->rx_count = 0; b43_periodic_every15sec() 3417 for (i = 0; i < ARRAY_SIZE(dev->irq_bit_count); i++) { b43_periodic_every15sec() 3418 if (dev->irq_bit_count[i]) { b43_periodic_every15sec() 3419 b43dbg(dev->wl, "Stats: %7u IRQ-%02u/sec (0x%08X)\n", b43_periodic_every15sec() 3420 dev->irq_bit_count[i] / 15, i, (1 << i)); b43_periodic_every15sec() 3421 dev->irq_bit_count[i] = 0; b43_periodic_every15sec() 3428 static void do_periodic_work(struct b43_wldev dev) do_periodic_work() argument 3432 state = dev->periodic_state; do_periodic_work() 3434 b43_periodic_every60sec(dev); do_periodic_work() 3436 b43_periodic_every30sec(dev); do_periodic_work() 3437 b43_periodic_every15sec(dev); do_periodic_work() 3447 struct b43_wldev dev = container_of(work, struct b43_wldev, b43_periodic_work_handler() local 3449 struct b43_wl wl = dev->wl; b43_periodic_work_handler() 3454 if (unlikely(b43_status(dev) != B43_STAT_STARTED)) b43_periodic_work_handler() 3456 if (b43_debug(dev, B43_DBG_PWORK_STOP)) b43_periodic_work_handler() 3459 do_periodic_work(dev); b43_periodic_work_handler() 3461 dev->periodic_state++; b43_periodic_work_handler() 3463 if (b43_debug(dev, B43_DBG_PWORK_FAST)) b43_periodic_work_handler() 3467 ieee80211_queue_delayed_work(wl->hw, &dev->periodic_work, delay); b43_periodic_work_handler() 3472 static void b43_periodic_tasks_setup(struct b43_wldev dev) b43_periodic_tasks_setup() argument 3474 struct delayed_work work = &dev->periodic_work; b43_periodic_tasks_setup() 3476 dev->periodic_state = 0; b43_periodic_tasks_setup() 3478 ieee80211_queue_delayed_work(dev->wl->hw, work, 0); b43_periodic_tasks_setup() 3482 static int b43_validate_chipaccess(struct b43_wldev dev) b43_validate_chipaccess() argument 3486 backup0 = b43_shm_read32(dev, B43_SHM_SHARED, 0); b43_validate_chipaccess() 3487 backup4 = b43_shm_read32(dev, B43_SHM_SHARED, 4); b43_validate_chipaccess() 3490 b43_shm_write32(dev, B43_SHM_SHARED, 0, 0x55AAAA55); b43_validate_chipaccess() 3491 if (b43_shm_read32(dev, B43_SHM_SHARED, 0) != 0x55AAAA55) b43_validate_chipaccess() 3493 b43_shm_write32(dev, B43_SHM_SHARED, 0, 0xAA5555AA); b43_validate_chipaccess() 3494 if (b43_shm_read32(dev, B43_SHM_SHARED, 0) != 0xAA5555AA) b43_validate_chipaccess() 3499 b43_shm_write16(dev, B43_SHM_SHARED, 0, 0x1122); b43_validate_chipaccess() 3500 b43_shm_write16(dev, B43_SHM_SHARED, 2, 0x3344); b43_validate_chipaccess() 3501 b43_shm_write16(dev, B43_SHM_SHARED, 4, 0x5566); b43_validate_chipaccess() 3502 b43_shm_write16(dev, B43_SHM_SHARED, 6, 0x7788); b43_validate_chipaccess() 3503 if (b43_shm_read32(dev, B43_SHM_SHARED, 2) != 0x55663344) b43_validate_chipaccess() 3504 b43warn(dev->wl, "Unaligned 32bit SHM read access is broken\n"); b43_validate_chipaccess() 3505 b43_shm_write32(dev, B43_SHM_SHARED, 2, 0xAABBCCDD); b43_validate_chipaccess() 3506 if (b43_shm_read16(dev, B43_SHM_SHARED, 0) != 0x1122 \|\| b43_validate_chipaccess() 3507 b43_shm_read16(dev, B43_SHM_SHARED, 2) != 0xCCDD \|\| b43_validate_chipaccess() 3508 b43_shm_read16(dev, B43_SHM_SHARED, 4) != 0xAABB \|\| b43_validate_chipaccess() 3509 b43_shm_read16(dev, B43_SHM_SHARED, 6) != 0x7788) b43_validate_chipaccess() 3510 b43warn(dev->wl, "Unaligned 32bit SHM write access is broken\n"); b43_validate_chipaccess() 3512 b43_shm_write32(dev, B43_SHM_SHARED, 0, backup0); b43_validate_chipaccess() 3513 b43_shm_write32(dev, B43_SHM_SHARED, 4, backup4); b43_validate_chipaccess() 3515 if ((dev->dev->core_rev >= 3) && (dev->dev->core_rev <= 10)) { b43_validate_chipaccess() 3518 b43_write16(dev, B43_MMIO_TSF_CFP_START, 0xAAAA); b43_validate_chipaccess() 3519 b43_write32(dev, B43_MMIO_TSF_CFP_START, 0xCCCCBBBB); b43_validate_chipaccess() 3520 if (b43_read16(dev, B43_MMIO_TSF_CFP_START_LOW) != 0xBBBB) b43_validate_chipaccess() 3522 if (b43_read16(dev, B43_MMIO_TSF_CFP_START_HIGH) != 0xCCCC) b43_validate_chipaccess() 3525 b43_write32(dev, B43_MMIO_TSF_CFP_START, 0); b43_validate_chipaccess() 3527 v = b43_read32(dev, B43_MMIO_MACCTL); b43_validate_chipaccess() 3534 b43err(dev->wl, "Failed to validate the chipaccess\n"); b43_validate_chipaccess() 3538 static void b43_security_init(struct b43_wldev dev) b43_security_init() argument 3540 dev->ktp = b43_shm_read16(dev, B43_SHM_SHARED, B43_SHM_SH_KTP); b43_security_init() 3544 dev->ktp = 2; b43_security_init() 3546 b43_write16(dev, B43_MMIO_RCMTA_COUNT, B43_NR_PAIRWISE_KEYS); b43_security_init() 3548 b43_clear_keys(dev); b43_security_init() 3555 struct b43_wldev dev; b43_rng_read() local 3559 dev = wl->current_dev; b43_rng_read() 3560 if (likely(dev && b43_status(dev) >= B43_STAT_INITIALIZED)) { b43_rng_read() 3561 data = b43_read16(dev, B43_MMIO_RNG); b43_rng_read() 3603 struct b43_wldev dev; b43_tx_work() local 3609 dev = wl->current_dev; b43_tx_work() 3610 if (unlikely(!dev \|\| b43_status(dev) < B43_STAT_STARTED)) { b43_tx_work() 3618 if (b43_using_pio_transfers(dev)) b43_tx_work() 3619 err = b43_pio_tx(dev, skb); b43_tx_work() 3621 err = b43_dma_tx(dev, skb); b43_tx_work() 3638 dev->tx_count++; b43_tx_work() 3664 static void b43_qos_params_upload(struct b43_wldev dev, b43_qos_params_upload() argument 3672 if (!dev->qos_enabled) b43_qos_params_upload() 3675 bslots = b43_read16(dev, B43_MMIO_RNG) & p->cw_min; b43_qos_params_upload() 3689 tmp = b43_shm_read16(dev, B43_SHM_SHARED, b43_qos_params_upload() 3693 b43_shm_write16(dev, B43_SHM_SHARED, b43_qos_params_upload() 3697 b43_shm_write16(dev, B43_SHM_SHARED, b43_qos_params_upload() 3714 static void b43_qos_upload_all(struct b43_wldev dev) b43_qos_upload_all() argument 3716 struct b43_wl wl = dev->wl; b43_qos_upload_all() 3720 if (!dev->qos_enabled) b43_qos_upload_all() 3726 b43_mac_suspend(dev); b43_qos_upload_all() 3729 b43_qos_params_upload(dev, &(params->p), b43_qos_upload_all() 3732 b43_mac_enable(dev); b43_qos_upload_all() 3780 static void b43_qos_init(struct b43_wldev dev) b43_qos_init() argument 3782 if (!dev->qos_enabled) { b43_qos_init() 3784 b43_hf_write(dev, b43_hf_read(dev) & ~B43_HF_EDCF); b43_qos_init() 3785 b43_write16(dev, B43_MMIO_IFSCTL, b43_qos_init() 3786 b43_read16(dev, B43_MMIO_IFSCTL) b43_qos_init() 3788 b43dbg(dev->wl, "QoS disabled\n"); b43_qos_init() 3793 b43_qos_upload_all(dev); b43_qos_init() 3796 b43_hf_write(dev, b43_hf_read(dev) \| B43_HF_EDCF); b43_qos_init() 3797 b43_write16(dev, B43_MMIO_IFSCTL, b43_qos_init() 3798 b43_read16(dev, B43_MMIO_IFSCTL) b43_qos_init() 3800 b43dbg(dev->wl, "QoS enabled\n"); b43_qos_init() 3808 struct b43_wldev dev; b43_op_conf_tx() local 3822 dev = wl->current_dev; b43_op_conf_tx() 3823 if (unlikely(!dev \|\| (b43_status(dev) < B43_STAT_INITIALIZED))) b43_op_conf_tx() 3827 b43_mac_suspend(dev); b43_op_conf_tx() 3828 b43_qos_params_upload(dev, &(wl->qos_params[queue].p), b43_op_conf_tx() 3830 b43_mac_enable(dev); b43_op_conf_tx() 3854 struct b43_wldev dev; b43_op_get_tsf() local 3858 dev = wl->current_dev; b43_op_get_tsf() 3860 if (dev && (b43_status(dev) >= B43_STAT_INITIALIZED)) b43_op_get_tsf() 3861 b43_tsf_read(dev, &tsf); b43_op_get_tsf() 3874 struct b43_wldev dev; b43_op_set_tsf() local 3877 dev = wl->current_dev; b43_op_set_tsf() 3879 if (dev && (b43_status(dev) >= B43_STAT_INITIALIZED)) b43_op_set_tsf() 3880 b43_tsf_write(dev, tsf); b43_op_set_tsf() 3900 static int b43_switch_band(struct b43_wldev dev, b43_switch_band() argument 3903 struct b43_phy phy = &dev->phy; b43_switch_band() 3921 b43err(dev->wl, "This device doesn't support %s-GHz band\n", b43_switch_band() 3931 b43dbg(dev->wl, "Switching to %s GHz band\n", b43_switch_band() 3936 b43_software_rfkill(dev, true); b43_switch_band() 3939 b43_phy_put_into_reset(dev); b43_switch_band() 3940 switch (dev->dev->bus_type) { b43_switch_band() 3943 tmp = bcma_aread32(dev->dev->bdev, BCMA_IOCTL); b43_switch_band() 3948 bcma_awrite32(dev->dev->bdev, BCMA_IOCTL, tmp); b43_switch_band() 3953 tmp = ssb_read32(dev->dev->sdev, SSB_TMSLOW); b43_switch_band() 3958 ssb_write32(dev->dev->sdev, SSB_TMSLOW, tmp); b43_switch_band() 3962 b43_phy_take_out_of_reset(dev); b43_switch_band() 3964 b43_upload_initvals_band(dev); b43_switch_band() 3966 b43_phy_init(dev); b43_switch_band() 3971 static void b43_set_beacon_listen_interval(struct b43_wldev dev, u16 interval) b43_set_beacon_listen_interval() argument 3974 b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_BCN_LI, interval); b43_set_beacon_listen_interval() 3978 static void b43_set_retry_limits(struct b43_wldev dev, b43_set_retry_limits() argument 3987 b43_shm_write16(dev, B43_SHM_SCRATCH, B43_SHM_SC_SRLIMIT, b43_set_retry_limits() 3989 b43_shm_write16(dev, B43_SHM_SCRATCH, B43_SHM_SC_LRLIMIT, b43_set_retry_limits() 3996 struct b43_wldev dev = wl->current_dev; b43_op_config() local 3997 struct b43_phy phy = &dev->phy; b43_op_config() 4003 b43_mac_suspend(dev); b43_op_config() 4006 b43_set_beacon_listen_interval(dev, conf->listen_interval); b43_op_config() 4013 err = b43_switch_band(dev, conf->chandef.chan); b43_op_config() 4020 b43_switch_channel(dev, phy->channel); b43_op_config() 4024 b43_set_retry_limits(dev, conf->short_frame_max_tx_count, b43_op_config() 4030 dev->wl->radiotap_enabled = !!(conf->flags & IEEE80211_CONF_MONITOR); b43_op_config() 4036 b43_phy_txpower_check(dev, B43_TXPWR_IGNORE_TIME \| b43_op_config() 4043 b43_mgmtframe_txantenna(dev, antenna); b43_op_config() 4046 phy->ops->set_rx_antenna(dev, antenna); b43_op_config() 4050 b43_software_rfkill(dev, false); b43_op_config() 4051 b43info(dev->wl, "Radio turned on by software\n"); b43_op_config() 4052 if (!dev->radio_hw_enable) { b43_op_config() 4053 b43info(dev->wl, "The hardware RF-kill button " b43_op_config() 4058 b43_software_rfkill(dev, true); b43_op_config() 4059 b43info(dev->wl, "Radio turned off by software\n"); b43_op_config() 4064 b43_mac_enable(dev); b43_op_config() 4070 static void b43_update_basic_rates(struct b43_wldev dev, u32 brates) b43_update_basic_rates() argument 4073 dev->wl->hw->wiphy->bands[b43_current_band(dev->wl)]; b43_update_basic_rates() 4107 rateptr = b43_shm_read16(dev, B43_SHM_SHARED, b43_update_basic_rates() 4110 b43_shm_write16(dev, B43_SHM_SHARED, basic + 2 * offset, b43_update_basic_rates() 4121 struct b43_wldev dev; b43_op_bss_info_changed() local 4125 dev = wl->current_dev; b43_op_bss_info_changed() 4126 if (!dev \|\| b43_status(dev) < B43_STAT_STARTED) b43_op_bss_info_changed() 4138 if (b43_status(dev) >= B43_STAT_INITIALIZED) { b43_op_bss_info_changed() 4146 b43_write_mac_bssid_templates(dev); b43_op_bss_info_changed() 4149 b43_mac_suspend(dev); b43_op_bss_info_changed() 4157 b43_set_beacon_int(dev, conf->beacon_int); b43_op_bss_info_changed() 4160 b43_update_basic_rates(dev, conf->basic_rates); b43_op_bss_info_changed() 4164 b43_short_slot_timing_enable(dev); b43_op_bss_info_changed() 4166 b43_short_slot_timing_disable(dev); b43_op_bss_info_changed() 4169 b43_mac_enable(dev); b43_op_bss_info_changed() 4179 struct b43_wldev dev; b43_op_set_key() local 4204 dev = wl->current_dev; b43_op_set_key() 4206 if (!dev \|\| b43_status(dev) < B43_STAT_INITIALIZED) b43_op_set_key() 4209 if (dev->fw.pcm_request_failed \|\| !dev->hwcrypto_enabled) { b43_op_set_key() 4254 err = b43_key_write(dev, -1, algorithm, b43_op_set_key() 4259 err = b43_key_write(dev, index, algorithm, b43_op_set_key() 4267 b43_hf_write(dev, b43_hf_read(dev) \| B43_HF_USEDEFKEYS); b43_op_set_key() 4269 b43_hf_write(dev, b43_op_set_key() 4270 b43_hf_read(dev) & ~B43_HF_USEDEFKEYS); b43_op_set_key() 4277 err = b43_key_clear(dev, key->hw_key_idx); b43_op_set_key() 4292 b43_dump_keymemory(dev); b43_op_set_key() 4304 struct b43_wldev dev; b43_op_configure_filter() local 4307 dev = wl->current_dev; b43_op_configure_filter() 4308 if (!dev) { b43_op_configure_filter() 4331 if (changed && b43_status(dev) >= B43_STAT_INITIALIZED) b43_op_configure_filter() 4332 b43_adjust_opmode(dev); b43_op_configure_filter() 4339 Returns the current dev. This might be different from the passed in dev, 4341 static struct b43_wldev * b43_wireless_core_stop(struct b43_wldev dev) b43_wireless_core_stop() argument 4348 if (!dev) b43_wireless_core_stop() 4350 wl = dev->wl; b43_wireless_core_stop() 4352 if (!dev \|\| b43_status(dev) < B43_STAT_STARTED) b43_wireless_core_stop() 4353 return dev; b43_wireless_core_stop() 4357 cancel_delayed_work_sync(&dev->periodic_work); b43_wireless_core_stop() 4359 b43_leds_stop(dev); b43_wireless_core_stop() 4361 dev = wl->current_dev; b43_wireless_core_stop() 4362 if (!dev \|\| b43_status(dev) < B43_STAT_STARTED) { b43_wireless_core_stop() 4364 return dev; b43_wireless_core_stop() 4368 b43_set_status(dev, B43_STAT_INITIALIZED); b43_wireless_core_stop() 4369 if (b43_bus_host_is_sdio(dev->dev)) { b43_wireless_core_stop() 4371 b43_write32(dev, B43_MMIO_GEN_IRQ_MASK, 0); b43_wireless_core_stop() 4372 b43_read32(dev, B43_MMIO_GEN_IRQ_MASK); / Flush / b43_wireless_core_stop() 4375 b43_write32(dev, B43_MMIO_GEN_IRQ_MASK, 0); b43_wireless_core_stop() 4376 b43_read32(dev, B43_MMIO_GEN_IRQ_MASK); / Flush / b43_wireless_core_stop() 4380 orig_dev = dev; b43_wireless_core_stop() 4382 if (b43_bus_host_is_sdio(dev->dev)) { b43_wireless_core_stop() 4383 b43_sdio_free_irq(dev); b43_wireless_core_stop() 4385 synchronize_irq(dev->dev->irq); b43_wireless_core_stop() 4386 free_irq(dev->dev->irq, dev); b43_wireless_core_stop() 4389 dev = wl->current_dev; b43_wireless_core_stop() 4390 if (!dev) b43_wireless_core_stop() 4391 return dev; b43_wireless_core_stop() 4392 if (dev != orig_dev) { b43_wireless_core_stop() 4393 if (b43_status(dev) >= B43_STAT_STARTED) b43_wireless_core_stop() 4395 return dev; b43_wireless_core_stop() 4397 mask = b43_read32(dev, B43_MMIO_GEN_IRQ_MASK); b43_wireless_core_stop() 4410 b43_mac_suspend(dev); b43_wireless_core_stop() 4411 b43_leds_exit(dev); b43_wireless_core_stop() 4414 return dev; b43_wireless_core_stop() 4418 static int b43_wireless_core_start(struct b43_wldev dev) b43_wireless_core_start() argument 4422 B43_WARN_ON(b43_status(dev) != B43_STAT_INITIALIZED); b43_wireless_core_start() 4424 drain_txstatus_queue(dev); b43_wireless_core_start() 4425 if (b43_bus_host_is_sdio(dev->dev)) { b43_wireless_core_start() 4426 err = b43_sdio_request_irq(dev, b43_sdio_interrupt_handler); b43_wireless_core_start() 4428 b43err(dev->wl, "Cannot request SDIO IRQ\n"); b43_wireless_core_start() 4432 err = request_threaded_irq(dev->dev->irq, b43_interrupt_handler, b43_wireless_core_start() 4434 IRQF_SHARED, KBUILD_MODNAME, dev); b43_wireless_core_start() 4436 b43err(dev->wl, "Cannot request IRQ-%d\n", b43_wireless_core_start() 4437 dev->dev->irq); b43_wireless_core_start() 4443 ieee80211_wake_queues(dev->wl->hw); b43_wireless_core_start() 4444 b43_set_status(dev, B43_STAT_STARTED); b43_wireless_core_start() 4447 b43_mac_enable(dev); b43_wireless_core_start() 4448 b43_write32(dev, B43_MMIO_GEN_IRQ_MASK, dev->irq_mask); b43_wireless_core_start() 4451 b43_periodic_tasks_setup(dev); b43_wireless_core_start() 4453 b43_leds_init(dev); b43_wireless_core_start() 4455 b43dbg(dev->wl, "Wireless interface started\n"); b43_wireless_core_start() 4460 static char b43_phy_name(struct b43_wldev dev, u8 phy_type) b43_phy_name() argument 4490 static int b43_phy_versioning(struct b43_wldev dev) b43_phy_versioning() argument 4492 struct b43_phy phy = &dev->phy; b43_phy_versioning() 4493 const u8 core_rev = dev->dev->core_rev; b43_phy_versioning() 4505 tmp = b43_read16(dev, B43_MMIO_PHY_VER); b43_phy_versioning() 4557 b43err(dev->wl, "FOUND UNSUPPORTED PHY (Analog %u, Type %d (%s), Revision %u)\n", b43_phy_versioning() 4558 analog_type, phy_type, b43_phy_name(dev, phy_type), b43_phy_versioning() 4562 b43info(dev->wl, "Found PHY: Analog %u, Type %d (%s), Revision %u\n", b43_phy_versioning() 4563 analog_type, phy_type, b43_phy_name(dev, phy_type), phy_rev); b43_phy_versioning() 4569 b43_write16f(dev, B43_MMIO_RADIO24_CONTROL, 0); b43_phy_versioning() 4570 radio_rev = b43_read16(dev, B43_MMIO_RADIO24_DATA); b43_phy_versioning() 4572 b43_write16f(dev, B43_MMIO_RADIO24_CONTROL, 1); b43_phy_versioning() 4573 radio_id = b43_read16(dev, B43_MMIO_RADIO24_DATA); b43_phy_versioning() 4580 b43_write16f(dev, B43_MMIO_RADIO24_CONTROL, tmp); b43_phy_versioning() 4581 radio24[tmp] = b43_read16(dev, B43_MMIO_RADIO24_DATA); b43_phy_versioning() 4589 if (dev->dev->chip_id == 0x4317) { b43_phy_versioning() 4590 if (dev->dev->chip_rev == 0) b43_phy_versioning() 4592 else if (dev->dev->chip_rev == 1) b43_phy_versioning() 4597 b43_write16f(dev, B43_MMIO_RADIO_CONTROL, b43_phy_versioning() 4599 tmp = b43_read16(dev, B43_MMIO_RADIO_DATA_LOW); b43_phy_versioning() 4600 b43_write16f(dev, B43_MMIO_RADIO_CONTROL, b43_phy_versioning() 4602 tmp \|= b43_read16(dev, B43_MMIO_RADIO_DATA_HIGH) << 16; b43_phy_versioning() 4657 b43err(dev->wl, b43_phy_versioning() 4662 b43info(dev->wl, b43_phy_versioning() 4678 static void setup_struct_phy_for_init(struct b43_wldev dev, setup_struct_phy_for_init() argument 4692 static void setup_struct_wldev_for_init(struct b43_wldev dev) setup_struct_wldev_for_init() argument 4694 dev->dfq_valid = false; setup_struct_wldev_for_init() 4698 dev->radio_hw_enable = true; setup_struct_wldev_for_init() 4701 memset(&dev->stats, 0, sizeof(dev->stats)); setup_struct_wldev_for_init() 4703 setup_struct_phy_for_init(dev, &dev->phy); setup_struct_wldev_for_init() 4706 dev->irq_reason = 0; setup_struct_wldev_for_init() 4707 memset(dev->dma_reason, 0, sizeof(dev->dma_reason)); setup_struct_wldev_for_init() 4708 dev->irq_mask = B43_IRQ_MASKTEMPLATE; setup_struct_wldev_for_init() 4710 dev->irq_mask &= ~B43_IRQ_PHY_TXERR; setup_struct_wldev_for_init() 4712 dev->mac_suspended = 1; setup_struct_wldev_for_init() 4715 memset(&dev->noisecalc, 0, sizeof(dev->noisecalc)); setup_struct_wldev_for_init() 4718 static void b43_bluetooth_coext_enable(struct b43_wldev dev) b43_bluetooth_coext_enable() argument 4720 struct ssb_sprom sprom = dev->dev->bus_sprom; b43_bluetooth_coext_enable() 4727 if (dev->phy.type != B43_PHYTYPE_B && !dev->phy.gmode) b43_bluetooth_coext_enable() 4730 hf = b43_hf_read(dev); b43_bluetooth_coext_enable() 4735 b43_hf_write(dev, hf); b43_bluetooth_coext_enable() 4738 static void b43_bluetooth_coext_disable(struct b43_wldev dev) b43_bluetooth_coext_disable() argument 4745 static void b43_imcfglo_timeouts_workaround(struct b43_wldev dev) b43_imcfglo_timeouts_workaround() argument 4751 if (dev->dev->bus_type != B43_BUS_SSB) b43_imcfglo_timeouts_workaround() 4757 bus = dev->dev->sdev->bus; b43_imcfglo_timeouts_workaround() 4761 tmp = ssb_read32(dev->dev->sdev, SSB_IMCFGLO); b43_imcfglo_timeouts_workaround() 4765 ssb_write32(dev->dev->sdev, SSB_IMCFGLO, tmp); b43_imcfglo_timeouts_workaround() 4770 static void b43_set_synth_pu_delay(struct b43_wldev dev, bool idle) b43_set_synth_pu_delay() argument 4775 if (dev->phy.type == B43_PHYTYPE_A) b43_set_synth_pu_delay() 4779 if (b43_is_mode(dev->wl, NL80211_IFTYPE_ADHOC) \|\| idle) b43_set_synth_pu_delay() 4781 if ((dev->phy.radio_ver == 0x2050) && (dev->phy.radio_rev == 8)) b43_set_synth_pu_delay() 4784 b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_SPUWKUP, pu_delay); b43_set_synth_pu_delay() 4788 static void b43_set_pretbtt(struct b43_wldev dev) b43_set_pretbtt() argument 4793 if (b43_is_mode(dev->wl, NL80211_IFTYPE_ADHOC)) { b43_set_pretbtt() 4796 if (dev->phy.type == B43_PHYTYPE_A) b43_set_pretbtt() 4801 b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_PRETBTT, pretbtt); b43_set_pretbtt() 4802 b43_write16(dev, B43_MMIO_TSF_CFP_PRETBTT, pretbtt); b43_set_pretbtt() 4807 static void b43_wireless_core_exit(struct b43_wldev dev) b43_wireless_core_exit() argument 4809 B43_WARN_ON(dev && b43_status(dev) > B43_STAT_INITIALIZED); b43_wireless_core_exit() 4810 if (!dev \|\| b43_status(dev) != B43_STAT_INITIALIZED) b43_wireless_core_exit() 4813 b43_set_status(dev, B43_STAT_UNINIT); b43_wireless_core_exit() 4816 b43_maskset32(dev, B43_MMIO_MACCTL, ~B43_MACCTL_PSM_RUN, b43_wireless_core_exit() 4819 switch (dev->dev->bus_type) { b43_wireless_core_exit() 4822 bcma_host_pci_down(dev->dev->bdev->bus); b43_wireless_core_exit() 4832 b43_dma_free(dev); b43_wireless_core_exit() 4833 b43_pio_free(dev); b43_wireless_core_exit() 4834 b43_chip_exit(dev); b43_wireless_core_exit() 4835 dev->phy.ops->switch_analog(dev, 0); b43_wireless_core_exit() 4836 if (dev->wl->current_beacon) { b43_wireless_core_exit() 4837 dev_kfree_skb_any(dev->wl->current_beacon); b43_wireless_core_exit() 4838 dev->wl->current_beacon = NULL; b43_wireless_core_exit() 4841 b43_device_disable(dev, 0); b43_wireless_core_exit() 4842 b43_bus_may_powerdown(dev); b43_wireless_core_exit() 4846 static int b43_wireless_core_init(struct b43_wldev dev) b43_wireless_core_init() argument 4848 struct ssb_sprom sprom = dev->dev->bus_sprom; b43_wireless_core_init() 4849 struct b43_phy phy = &dev->phy; b43_wireless_core_init() 4853 B43_WARN_ON(b43_status(dev) != B43_STAT_UNINIT); b43_wireless_core_init() 4855 err = b43_bus_powerup(dev, 0); b43_wireless_core_init() 4858 if (!b43_device_is_enabled(dev)) b43_wireless_core_init() 4859 b43_wireless_core_reset(dev, phy->gmode); b43_wireless_core_init() 4862 setup_struct_wldev_for_init(dev); b43_wireless_core_init() 4863 phy->ops->prepare_structs(dev); b43_wireless_core_init() 4866 switch (dev->dev->bus_type) { b43_wireless_core_init() 4869 bcma_host_pci_irq_ctl(dev->dev->bdev->bus, b43_wireless_core_init() 4870 dev->dev->bdev, true); b43_wireless_core_init() 4871 bcma_host_pci_up(dev->dev->bdev->bus); b43_wireless_core_init() 4876 ssb_pcicore_dev_irqvecs_enable(&dev->dev->sdev->bus->pcicore, b43_wireless_core_init() 4877 dev->dev->sdev); b43_wireless_core_init() 4882 b43_imcfglo_timeouts_workaround(dev); b43_wireless_core_init() 4883 b43_bluetooth_coext_disable(dev); b43_wireless_core_init() 4885 err = phy->ops->prepare_hardware(dev); b43_wireless_core_init() 4889 err = b43_chip_init(dev); b43_wireless_core_init() 4892 b43_shm_write16(dev, B43_SHM_SHARED, b43_wireless_core_init() 4893 B43_SHM_SH_WLCOREREV, dev->dev->core_rev); b43_wireless_core_init() 4894 hf = b43_hf_read(dev); b43_wireless_core_init() 4911 if (dev->dev->bus_type == B43_BUS_SSB && b43_wireless_core_init() 4912 dev->dev->sdev->bus->bustype == SSB_BUSTYPE_PCI && b43_wireless_core_init() 4913 dev->dev->sdev->bus->pcicore.dev->id.revision <= 10) b43_wireless_core_init() 4917 b43_hf_write(dev, hf); b43_wireless_core_init() 4920 if (dev->dev->core_rev >= 13) { b43_wireless_core_init() 4921 u32 mac_hw_cap = b43_read32(dev, B43_MMIO_MAC_HW_CAP); b43_wireless_core_init() 4923 b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_MACHW_L, b43_wireless_core_init() 4925 b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_MACHW_H, b43_wireless_core_init() 4929 b43_set_retry_limits(dev, B43_DEFAULT_SHORT_RETRY_LIMIT, b43_wireless_core_init() 4931 b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_SFFBLIM, 3); b43_wireless_core_init() 4932 b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_LFFBLIM, 2); b43_wireless_core_init() 4938 b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_PRMAXTIME, 1); b43_wireless_core_init() 4940 b43_rate_memory_init(dev); b43_wireless_core_init() 4941 b43_set_phytxctl_defaults(dev); b43_wireless_core_init() 4945 b43_shm_write16(dev, B43_SHM_SCRATCH, B43_SHM_SC_MINCONT, 0x1F); b43_wireless_core_init() 4947 b43_shm_write16(dev, B43_SHM_SCRATCH, B43_SHM_SC_MINCONT, 0xF); b43_wireless_core_init() 4949 b43_shm_write16(dev, B43_SHM_SCRATCH, B43_SHM_SC_MAXCONT, 0x3FF); b43_wireless_core_init() 4952 b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_PHYTYPE, phy->type); b43_wireless_core_init() 4953 b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_PHYVER, phy->rev); b43_wireless_core_init() 4955 if (b43_bus_host_is_pcmcia(dev->dev) \|\| b43_wireless_core_init() 4956 b43_bus_host_is_sdio(dev->dev)) { b43_wireless_core_init() 4957 dev->__using_pio_transfers = true; b43_wireless_core_init() 4958 err = b43_pio_init(dev); b43_wireless_core_init() 4959 } else if (dev->use_pio) { b43_wireless_core_init() 4960 b43warn(dev->wl, "Forced PIO by use_pio module parameter. " b43_wireless_core_init() 4963 dev->__using_pio_transfers = true; b43_wireless_core_init() 4964 err = b43_pio_init(dev); b43_wireless_core_init() 4966 dev->__using_pio_transfers = false; b43_wireless_core_init() 4967 err = b43_dma_init(dev); b43_wireless_core_init() 4971 b43_qos_init(dev); b43_wireless_core_init() 4972 b43_set_synth_pu_delay(dev, 1); b43_wireless_core_init() 4973 b43_bluetooth_coext_enable(dev); b43_wireless_core_init() 4975 b43_bus_powerup(dev, !(sprom->boardflags_lo & B43_BFL_XTAL_NOSLOW)); b43_wireless_core_init() 4976 b43_upload_card_macaddress(dev); b43_wireless_core_init() 4977 b43_security_init(dev); b43_wireless_core_init() 4979 ieee80211_wake_queues(dev->wl->hw); b43_wireless_core_init() 4981 b43_set_status(dev, B43_STAT_INITIALIZED); b43_wireless_core_init() 4987 b43_chip_exit(dev); b43_wireless_core_init() 4989 b43_bus_may_powerdown(dev); b43_wireless_core_init() 4990 B43_WARN_ON(b43_status(dev) != B43_STAT_UNINIT); b43_wireless_core_init() 4998 struct b43_wldev dev; b43_op_add_interface() local 5016 dev = wl->current_dev; b43_op_add_interface() 5022 b43_adjust_opmode(dev); b43_op_add_interface() 5023 b43_set_pretbtt(dev); b43_op_add_interface() 5024 b43_set_synth_pu_delay(dev, 0); b43_op_add_interface() 5025 b43_upload_card_macaddress(dev); b43_op_add_interface() 5041 struct b43_wldev dev = wl->current_dev; b43_op_remove_interface() local 5053 b43_adjust_opmode(dev); b43_op_remove_interface() 5055 b43_upload_card_macaddress(dev); b43_op_remove_interface() 5063 struct b43_wldev dev = wl->current_dev; b43_op_start() local 5082 if (b43_status(dev) < B43_STAT_INITIALIZED) { b43_op_start() 5083 err = b43_wireless_core_init(dev); b43_op_start() 5089 if (b43_status(dev) < B43_STAT_STARTED) { b43_op_start() 5090 err = b43_wireless_core_start(dev); b43_op_start() 5093 b43_wireless_core_exit(dev); b43_op_start() 5119 struct b43_wldev dev = wl->current_dev; b43_op_stop() local 5123 if (!dev) b43_op_stop() 5127 if (b43_status(dev) >= B43_STAT_STARTED) { b43_op_stop() 5128 dev = b43_wireless_core_stop(dev); b43_op_stop() 5129 if (!dev) b43_op_stop() 5132 b43_wireless_core_exit(dev); b43_op_stop() 5166 struct b43_wldev dev; b43_op_sw_scan_start_notifier() local 5169 dev = wl->current_dev; b43_op_sw_scan_start_notifier() 5170 if (dev && (b43_status(dev) >= B43_STAT_INITIALIZED)) { b43_op_sw_scan_start_notifier() 5172 b43_hf_write(dev, b43_hf_read(dev) \| B43_HF_SKCFPUP); b43_op_sw_scan_start_notifier() 5181 struct b43_wldev dev; b43_op_sw_scan_complete_notifier() local 5184 dev = wl->current_dev; b43_op_sw_scan_complete_notifier() 5185 if (dev && (b43_status(dev) >= B43_STAT_INITIALIZED)) { b43_op_sw_scan_complete_notifier() 5187 b43_hf_write(dev, b43_hf_read(dev) & ~B43_HF_SKCFPUP); b43_op_sw_scan_complete_notifier() 5196 struct b43_wldev dev = wl->current_dev; b43_op_get_survey() local 5204 survey->noise = dev->stats.link_noise; b43_op_get_survey() 5237 struct b43_wldev dev = b43_chip_reset() local 5239 struct b43_wl wl = dev->wl; b43_chip_reset() 5245 prev_status = b43_status(dev); b43_chip_reset() 5248 dev = b43_wireless_core_stop(dev); b43_chip_reset() 5249 if (!dev) { b43_chip_reset() 5255 b43_wireless_core_exit(dev); b43_chip_reset() 5259 err = b43_wireless_core_init(dev); b43_chip_reset() 5264 err = b43_wireless_core_start(dev); b43_chip_reset() 5266 b43_wireless_core_exit(dev); b43_chip_reset() 5272 wl->current_dev = NULL; / Failed to init the dev. / b43_chip_reset() 5288 static int b43_setup_bands(struct b43_wldev dev, b43_setup_bands() argument 5291 struct ieee80211_hw hw = dev->wl->hw; b43_setup_bands() 5292 struct b43_phy phy = &dev->phy; b43_setup_bands() 5305 if (dev->phy.type == B43_PHYTYPE_N) { b43_setup_bands() 5315 dev->phy.supports_2ghz = have_2ghz_phy; b43_setup_bands() 5316 dev->phy.supports_5ghz = have_5ghz_phy; b43_setup_bands() 5321 static void b43_wireless_core_detach(struct b43_wldev dev) b43_wireless_core_detach() argument 5325 b43_release_firmware(dev); b43_wireless_core_detach() 5326 b43_phy_free(dev); b43_wireless_core_detach() 5329 static void b43_supported_bands(struct b43_wldev dev, bool have_2ghz_phy, b43_supported_bands() argument 5335 if (dev->dev->bus_type == B43_BUS_BCMA && b43_supported_bands() 5336 dev->dev->bdev->bus->hosttype == BCMA_HOSTTYPE_PCI) b43_supported_bands() 5337 dev_id = dev->dev->bdev->bus->host_pci->device; b43_supported_bands() 5340 if (dev->dev->bus_type == B43_BUS_SSB && b43_supported_bands() 5341 dev->dev->sdev->bus->bustype == SSB_BUSTYPE_PCI) b43_supported_bands() 5342 dev_id = dev->dev->sdev->bus->host_pci->device; b43_supported_bands() 5345 if (dev->dev->bus_sprom->dev_id) b43_supported_bands() 5346 dev_id = dev->dev->bus_sprom->dev_id; b43_supported_bands() 5369 if (dev->phy.type != B43_PHYTYPE_G) b43_supported_bands() 5388 switch (dev->phy.type) { b43_supported_bands() 5406 static int b43_wireless_core_attach(struct b43_wldev dev) b43_wireless_core_attach() argument 5408 struct b43_wl wl = dev->wl; b43_wireless_core_attach() 5409 struct b43_phy phy = &dev->phy; b43_wireless_core_attach() 5421 err = b43_bus_powerup(dev, 0); b43_wireless_core_attach() 5430 switch (dev->dev->bus_type) { b43_wireless_core_attach() 5433 tmp = bcma_aread32(dev->dev->bdev, BCMA_IOST); b43_wireless_core_attach() 5440 if (dev->dev->core_rev >= 5) { b43_wireless_core_attach() 5441 tmp = ssb_read32(dev->dev->sdev, SSB_TMSHIGH); b43_wireless_core_attach() 5450 dev->phy.gmode = have_2ghz_phy; b43_wireless_core_attach() 5451 b43_wireless_core_reset(dev, dev->phy.gmode); b43_wireless_core_attach() 5454 err = b43_phy_versioning(dev); b43_wireless_core_attach() 5459 b43_supported_bands(dev, &have_2ghz_phy, &have_5ghz_phy); b43_wireless_core_attach() 5463 switch (dev->phy.type) { b43_wireless_core_attach() 5479 err = b43_phy_allocate(dev); b43_wireless_core_attach() 5483 dev->phy.gmode = have_2ghz_phy; b43_wireless_core_attach() 5484 b43_wireless_core_reset(dev, dev->phy.gmode); b43_wireless_core_attach() 5486 err = b43_validate_chipaccess(dev); b43_wireless_core_attach() 5489 err = b43_setup_bands(dev, have_2ghz_phy, have_5ghz_phy); b43_wireless_core_attach() 5495 wl->current_dev = dev; b43_wireless_core_attach() 5496 INIT_WORK(&dev->restart_work, b43_chip_reset); b43_wireless_core_attach() 5498 dev->phy.ops->switch_analog(dev, 0); b43_wireless_core_attach() 5499 b43_device_disable(dev, 0); b43_wireless_core_attach() 5500 b43_bus_may_powerdown(dev); b43_wireless_core_attach() 5506 b43_phy_free(dev); b43_wireless_core_attach() 5508 b43_bus_may_powerdown(dev); b43_wireless_core_attach() 5512 static void b43_one_core_detach(struct b43_bus_dev dev) b43_one_core_detach() argument 5520 wldev = b43_bus_get_wldev(dev); b43_one_core_detach() 5525 b43_bus_set_wldev(dev, NULL); b43_one_core_detach() 5529 static int b43_one_core_attach(struct b43_bus_dev dev, struct b43_wl wl) b43_one_core_attach() argument 5539 wldev->dev = dev; b43_one_core_attach() 5549 b43_bus_set_wldev(dev, wldev); b43_one_core_attach() 5591 static void b43_wireless_exit(struct b43_bus_dev dev, struct b43_wl wl) b43_wireless_exit() argument 5595 ssb_set_devtypedata(dev->sdev, NULL); b43_wireless_exit() 5600 static struct b43_wl b43_wireless_init(struct b43_bus_dev dev) b43_wireless_init() argument 5602 struct ssb_sprom sprom = dev->bus_sprom; b43_wireless_init() 5630 SET_IEEE80211_DEV(hw, dev->dev); b43_wireless_init() 5652 (dev->chip_id > 0x9999) ? "%d" : "%04X", dev->chip_id); b43_wireless_init() 5654 dev->core_rev); b43_wireless_init() 5661 struct b43_bus_dev dev; b43_bcma_probe() local 5671 dev = b43_bus_dev_bcma_init(core); b43_bcma_probe() 5672 if (!dev) b43_bcma_probe() 5675 wl = b43_wireless_init(dev); b43_bcma_probe() 5681 err = b43_one_core_attach(dev, wl); b43_bcma_probe() 5715 b43_one_core_detach(wldev->dev); b43_bcma_remove() 5737 struct b43_bus_dev dev; b43_ssb_probe() local 5741 dev = b43_bus_dev_ssb_init(sdev); b43_ssb_probe() 5742 if (!dev) b43_ssb_probe() 5754 wl = b43_wireless_init(dev); b43_ssb_probe() 5762 err = b43_one_core_attach(dev, wl); b43_ssb_probe() 5773 b43_wireless_exit(dev, wl); b43_ssb_probe() 5775 kfree(dev); b43_ssb_probe() 5783 struct b43_bus_dev dev = wldev->dev; b43_ssb_remove() local 5798 b43_one_core_detach(dev); b43_ssb_remove() 5804 b43_wireless_exit(dev, wl); b43_ssb_remove() 5816 void b43_controller_restart(struct b43_wldev dev, const char *reason) b43_controller_restart() argument 5819 if (b43_status(dev) < B43_STAT_INITIALIZED) b43_controller_restart() 5821 b43info(dev->wl, "Controller RESET (%s) ...\n", reason); b43_controller_restart() 5822 ieee80211_queue_work(dev->wl->hw, &dev->restart_work); b43_controller_restart()
H A D	phy_ac.c	20 static int b43_phy_ac_op_allocate(struct b43_wldev dev) b43_phy_ac_op_allocate() argument 27 dev->phy.ac = phy_ac; b43_phy_ac_op_allocate() 32 static void b43_phy_ac_op_free(struct b43_wldev dev) b43_phy_ac_op_free() argument 34 struct b43_phy phy = &dev->phy; b43_phy_ac_op_free() 41 static void b43_phy_ac_op_maskset(struct b43_wldev dev, u16 reg, u16 mask, b43_phy_ac_op_maskset() argument 44 b43_write16f(dev, B43_MMIO_PHY_CONTROL, reg); b43_phy_ac_op_maskset() 45 b43_write16(dev, B43_MMIO_PHY_DATA, b43_phy_ac_op_maskset() 46 (b43_read16(dev, B43_MMIO_PHY_DATA) & mask) \| set); b43_phy_ac_op_maskset() 49 static u16 b43_phy_ac_op_radio_read(struct b43_wldev dev, u16 reg) b43_phy_ac_op_radio_read() argument 51 b43_write16f(dev, B43_MMIO_RADIO24_CONTROL, reg); b43_phy_ac_op_radio_read() 52 return b43_read16(dev, B43_MMIO_RADIO24_DATA); b43_phy_ac_op_radio_read() 55 static void b43_phy_ac_op_radio_write(struct b43_wldev dev, u16 reg, b43_phy_ac_op_radio_write() argument 58 b43_write16f(dev, B43_MMIO_RADIO24_CONTROL, reg); b43_phy_ac_op_radio_write() 59 b43_write16(dev, B43_MMIO_RADIO24_DATA, value); b43_phy_ac_op_radio_write() 62 static unsigned int b43_phy_ac_op_get_default_chan(struct b43_wldev dev) b43_phy_ac_op_get_default_chan() argument 64 if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) b43_phy_ac_op_get_default_chan() 70 b43_phy_ac_op_recalc_txpower(struct b43_wldev dev, bool ignore_tssi) b43_phy_ac_op_recalc_txpower() argument 75 static void b43_phy_ac_op_adjust_txpower(struct b43_wldev *dev) b43_phy_ac_op_adjust_txpower() argument
/linux-4.1.27/include/linux/
H A D	kdev_t.h	9 #define MAJOR(dev) ((unsigned int) ((dev) >> MINORBITS)) 10 #define MINOR(dev) ((unsigned int) ((dev) & MINORMASK)) 13 #define print_dev_t(buffer, dev) \ 14 sprintf((buffer), "%u:%u\n", MAJOR(dev), MINOR(dev)) 16 #define format_dev_t(buffer, dev) \ 18 sprintf(buffer, "%u:%u", MAJOR(dev), MINOR(dev)); \ 23 static inline int old_valid_dev(dev_t dev) old_valid_dev() argument 25 return MAJOR(dev) < 256 && MINOR(dev) < 256; old_valid_dev() 28 static inline u16 old_encode_dev(dev_t dev) old_encode_dev() argument 30 return (MAJOR(dev) << 8) \| MINOR(dev); old_encode_dev() 38 static inline int new_valid_dev(dev_t dev) new_valid_dev() argument 43 static inline u32 new_encode_dev(dev_t dev) new_encode_dev() argument 45 unsigned major = MAJOR(dev); new_encode_dev() 46 unsigned minor = MINOR(dev); new_encode_dev() 50 static inline dev_t new_decode_dev(u32 dev) new_decode_dev() argument 52 unsigned major = (dev & 0xfff00) >> 8; new_decode_dev() 53 unsigned minor = (dev & 0xff) \| ((dev >> 12) & 0xfff00); new_decode_dev() 57 static inline int huge_valid_dev(dev_t dev) huge_valid_dev() argument 62 static inline u64 huge_encode_dev(dev_t dev) huge_encode_dev() argument 64 return new_encode_dev(dev); huge_encode_dev() 67 static inline dev_t huge_decode_dev(u64 dev) huge_decode_dev() argument 69 return new_decode_dev(dev); huge_decode_dev() 72 static inline int sysv_valid_dev(dev_t dev) sysv_valid_dev() argument 74 return MAJOR(dev) < (1<<14) && MINOR(dev) < (1<<18); sysv_valid_dev() 77 static inline u32 sysv_encode_dev(dev_t dev) sysv_encode_dev() argument 79 return MINOR(dev) \| (MAJOR(dev) << 18); sysv_encode_dev() 82 static inline unsigned sysv_major(u32 dev) sysv_major() argument 84 return (dev >> 18) & 0x3fff; sysv_major() 87 static inline unsigned sysv_minor(u32 dev) sysv_minor() argument 89 return dev & 0x3ffff; sysv_minor()
H A D	pm_runtime.h	34 extern int pm_generic_runtime_suspend(struct device dev); 35 extern int pm_generic_runtime_resume(struct device dev); 36 extern int pm_runtime_force_suspend(struct device dev); 37 extern int pm_runtime_force_resume(struct device dev); 39 extern int __pm_runtime_idle(struct device dev, int rpmflags); 40 extern int __pm_runtime_suspend(struct device dev, int rpmflags); 41 extern int __pm_runtime_resume(struct device dev, int rpmflags); 42 extern int pm_schedule_suspend(struct device dev, unsigned int delay); 43 extern int __pm_runtime_set_status(struct device dev, unsigned int status); 44 extern int pm_runtime_barrier(struct device dev); 45 extern void pm_runtime_enable(struct device dev); 46 extern void __pm_runtime_disable(struct device dev, bool check_resume); 47 extern void pm_runtime_allow(struct device dev); 48 extern void pm_runtime_forbid(struct device dev); 49 extern void pm_runtime_no_callbacks(struct device dev); 50 extern void pm_runtime_irq_safe(struct device dev); 51 extern void __pm_runtime_use_autosuspend(struct device dev, bool use); 52 extern void pm_runtime_set_autosuspend_delay(struct device dev, int delay); 53 extern unsigned long pm_runtime_autosuspend_expiration(struct device dev); 54 extern void pm_runtime_update_max_time_suspended(struct device dev, 56 extern void pm_runtime_set_memalloc_noio(struct device dev, bool enable); 58 static inline bool pm_children_suspended(struct device dev) pm_children_suspended() argument 60 return dev->power.ignore_children pm_children_suspended() 61 \|\| !atomic_read(&dev->power.child_count); pm_children_suspended() 64 static inline void pm_runtime_get_noresume(struct device dev) pm_runtime_get_noresume() argument 66 atomic_inc(&dev->power.usage_count); pm_runtime_get_noresume() 69 static inline void pm_runtime_put_noidle(struct device dev) pm_runtime_put_noidle() argument 71 atomic_add_unless(&dev->power.usage_count, -1, 0); pm_runtime_put_noidle() 74 static inline bool device_run_wake(struct device dev) device_run_wake() argument 76 return dev->power.run_wake; device_run_wake() 79 static inline void device_set_run_wake(struct device dev, bool enable) device_set_run_wake() argument 81 dev->power.run_wake = enable; device_set_run_wake() 84 static inline bool pm_runtime_suspended(struct device dev) pm_runtime_suspended() argument 86 return dev->power.runtime_status == RPM_SUSPENDED pm_runtime_suspended() 87 && !dev->power.disable_depth; pm_runtime_suspended() 90 static inline bool pm_runtime_active(struct device dev) pm_runtime_active() argument 92 return dev->power.runtime_status == RPM_ACTIVE pm_runtime_active() 93 \|\| dev->power.disable_depth; pm_runtime_active() 96 static inline bool pm_runtime_status_suspended(struct device dev) pm_runtime_status_suspended() argument 98 return dev->power.runtime_status == RPM_SUSPENDED; pm_runtime_status_suspended() 101 static inline bool pm_runtime_suspended_if_enabled(struct device dev) pm_runtime_suspended_if_enabled() argument 103 return pm_runtime_status_suspended(dev) && dev->power.disable_depth == 1; pm_runtime_suspended_if_enabled() 106 static inline bool pm_runtime_enabled(struct device dev) pm_runtime_enabled() argument 108 return !dev->power.disable_depth; pm_runtime_enabled() 111 static inline bool pm_runtime_callbacks_present(struct device dev) pm_runtime_callbacks_present() argument 113 return !dev->power.no_callbacks; pm_runtime_callbacks_present() 116 static inline void pm_runtime_mark_last_busy(struct device dev) pm_runtime_mark_last_busy() argument 118 ACCESS_ONCE(dev->power.last_busy) = jiffies; pm_runtime_mark_last_busy() 121 static inline bool pm_runtime_is_irq_safe(struct device dev) pm_runtime_is_irq_safe() argument 123 return dev->power.irq_safe; pm_runtime_is_irq_safe() 130 static inline int pm_generic_runtime_suspend(struct device dev) { return 0; } pm_generic_runtime_resume() argument 131 static inline int pm_generic_runtime_resume(struct device dev) { return 0; } pm_runtime_force_suspend() argument 132 static inline int pm_runtime_force_suspend(struct device dev) { return 0; } pm_runtime_force_resume() argument 133 static inline int pm_runtime_force_resume(struct device dev) { return 0; } pm_runtime_force_resume() argument 135 static inline int __pm_runtime_idle(struct device dev, int rpmflags) __pm_runtime_idle() argument 139 static inline int __pm_runtime_suspend(struct device dev, int rpmflags) __pm_runtime_suspend() argument 143 static inline int __pm_runtime_resume(struct device dev, int rpmflags) __pm_runtime_resume() argument 147 static inline int pm_schedule_suspend(struct device dev, unsigned int delay) pm_schedule_suspend() argument 151 static inline int __pm_runtime_set_status(struct device dev, __pm_runtime_set_status() argument 153 static inline int pm_runtime_barrier(struct device dev) { return 0; } pm_runtime_enable() argument 154 static inline void pm_runtime_enable(struct device dev) {} __pm_runtime_disable() argument 155 static inline void __pm_runtime_disable(struct device dev, bool c) {} pm_runtime_allow() argument 156 static inline void pm_runtime_allow(struct device dev) {} pm_runtime_forbid() argument 157 static inline void pm_runtime_forbid(struct device dev) {} pm_runtime_forbid() argument 159 static inline bool pm_children_suspended(struct device dev) { return false; } pm_runtime_get_noresume() argument 160 static inline void pm_runtime_get_noresume(struct device dev) {} pm_runtime_put_noidle() argument 161 static inline void pm_runtime_put_noidle(struct device dev) {} device_run_wake() argument 162 static inline bool device_run_wake(struct device dev) { return false; } device_set_run_wake() argument 163 static inline void device_set_run_wake(struct device dev, bool enable) {} pm_runtime_suspended() argument 164 static inline bool pm_runtime_suspended(struct device dev) { return false; } pm_runtime_active() argument 165 static inline bool pm_runtime_active(struct device dev) { return true; } pm_runtime_status_suspended() argument 166 static inline bool pm_runtime_status_suspended(struct device dev) { return false; } pm_runtime_suspended_if_enabled() argument 167 static inline bool pm_runtime_suspended_if_enabled(struct device dev) { return false; } pm_runtime_enabled() argument 168 static inline bool pm_runtime_enabled(struct device dev) { return false; } pm_runtime_enabled() argument 170 static inline void pm_runtime_no_callbacks(struct device dev) {} pm_runtime_irq_safe() argument 171 static inline void pm_runtime_irq_safe(struct device dev) {} pm_runtime_is_irq_safe() argument 172 static inline bool pm_runtime_is_irq_safe(struct device dev) { return false; } pm_runtime_is_irq_safe() argument 174 static inline bool pm_runtime_callbacks_present(struct device dev) { return false; } pm_runtime_mark_last_busy() argument 175 static inline void pm_runtime_mark_last_busy(struct device dev) {} __pm_runtime_use_autosuspend() argument 176 static inline void __pm_runtime_use_autosuspend(struct device dev, __pm_runtime_use_autosuspend() argument 178 static inline void pm_runtime_set_autosuspend_delay(struct device dev, pm_runtime_set_autosuspend_delay() argument 181 struct device dev) { return 0; } pm_runtime_set_memalloc_noio() 182 static inline void pm_runtime_set_memalloc_noio(struct device dev, pm_runtime_set_memalloc_noio() argument 187 static inline int pm_runtime_idle(struct device dev) pm_runtime_idle() argument 189 return __pm_runtime_idle(dev, 0); pm_runtime_idle() 192 static inline int pm_runtime_suspend(struct device dev) pm_runtime_suspend() argument 194 return __pm_runtime_suspend(dev, 0); pm_runtime_suspend() 197 static inline int pm_runtime_autosuspend(struct device dev) pm_runtime_autosuspend() argument 199 return __pm_runtime_suspend(dev, RPM_AUTO); pm_runtime_autosuspend() 202 static inline int pm_runtime_resume(struct device dev) pm_runtime_resume() argument 204 return __pm_runtime_resume(dev, 0); pm_runtime_resume() 207 static inline int pm_request_idle(struct device dev) pm_request_idle() argument 209 return __pm_runtime_idle(dev, RPM_ASYNC); pm_request_idle() 212 static inline int pm_request_resume(struct device dev) pm_request_resume() argument 214 return __pm_runtime_resume(dev, RPM_ASYNC); pm_request_resume() 217 static inline int pm_request_autosuspend(struct device dev) pm_request_autosuspend() argument 219 return __pm_runtime_suspend(dev, RPM_ASYNC \| RPM_AUTO); pm_request_autosuspend() 222 static inline int pm_runtime_get(struct device dev) pm_runtime_get() argument 224 return __pm_runtime_resume(dev, RPM_GET_PUT \| RPM_ASYNC); pm_runtime_get() 227 static inline int pm_runtime_get_sync(struct device dev) pm_runtime_get_sync() argument 229 return __pm_runtime_resume(dev, RPM_GET_PUT); pm_runtime_get_sync() 232 static inline int pm_runtime_put(struct device dev) pm_runtime_put() argument 234 return __pm_runtime_idle(dev, RPM_GET_PUT \| RPM_ASYNC); pm_runtime_put() 237 static inline int pm_runtime_put_autosuspend(struct device dev) pm_runtime_put_autosuspend() argument 239 return __pm_runtime_suspend(dev, pm_runtime_put_autosuspend() 243 static inline int pm_runtime_put_sync(struct device dev) pm_runtime_put_sync() argument 245 return __pm_runtime_idle(dev, RPM_GET_PUT); pm_runtime_put_sync() 248 static inline int pm_runtime_put_sync_suspend(struct device dev) pm_runtime_put_sync_suspend() argument 250 return __pm_runtime_suspend(dev, RPM_GET_PUT); pm_runtime_put_sync_suspend() 253 static inline int pm_runtime_put_sync_autosuspend(struct device dev) pm_runtime_put_sync_autosuspend() argument 255 return __pm_runtime_suspend(dev, RPM_GET_PUT \| RPM_AUTO); pm_runtime_put_sync_autosuspend() 258 static inline int pm_runtime_set_active(struct device dev) pm_runtime_set_active() argument 260 return __pm_runtime_set_status(dev, RPM_ACTIVE); pm_runtime_set_active() 263 static inline void pm_runtime_set_suspended(struct device dev) pm_runtime_set_suspended() argument 265 __pm_runtime_set_status(dev, RPM_SUSPENDED); pm_runtime_set_suspended() 268 static inline void pm_runtime_disable(struct device dev) pm_runtime_disable() argument 270 __pm_runtime_disable(dev, true); pm_runtime_disable() 273 static inline void pm_runtime_use_autosuspend(struct device dev) pm_runtime_use_autosuspend() argument 275 __pm_runtime_use_autosuspend(dev, true); pm_runtime_use_autosuspend() 278 static inline void pm_runtime_dont_use_autosuspend(struct device dev) pm_runtime_dont_use_autosuspend() argument 280 __pm_runtime_use_autosuspend(dev, false); pm_runtime_dont_use_autosuspend() 180 pm_runtime_autosuspend_expiration( struct device *dev) pm_runtime_autosuspend_expiration() argument
H A D	dma-mapping.h	18 void* (alloc)(struct device dev, size_t size, 21 void (free)(struct device dev, size_t size, 27 int (get_sgtable)(struct device dev, struct sg_table sgt, void , 30 dma_addr_t (map_page)(struct device dev, struct page page, 34 void (unmap_page)(struct device dev, dma_addr_t dma_handle, 41 int (map_sg)(struct device dev, struct scatterlist sg, 44 void (unmap_sg)(struct device dev, 48 void (sync_single_for_cpu)(struct device dev, 51 void (sync_single_for_device)(struct device dev, 54 void (sync_sg_for_cpu)(struct device dev, 57 void (sync_sg_for_device)(struct device dev, 60 int (mapping_error)(struct device dev, dma_addr_t dma_addr); 61 int (dma_supported)(struct device dev, u64 mask); 62 int (set_dma_mask)(struct device dev, u64 mask); 64 u64 (get_required_mask)(struct device dev); 80 static inline int is_device_dma_capable(struct device dev) is_device_dma_capable() argument 82 return dev->dma_mask != NULL && dev->dma_mask != DMA_MASK_NONE; is_device_dma_capable() 91 static inline u64 dma_get_mask(struct device dev) dma_get_mask() argument 93 if (dev && dev->dma_mask && dev->dma_mask) dma_get_mask() 94 return dev->dma_mask; dma_get_mask() 99 int dma_set_coherent_mask(struct device dev, u64 mask); 101 static inline int dma_set_coherent_mask(struct device dev, u64 mask) dma_set_coherent_mask() argument 103 if (!dma_supported(dev, mask)) dma_set_coherent_mask() 105 dev->coherent_dma_mask = mask; dma_set_coherent_mask() 116 static inline int dma_set_mask_and_coherent(struct device dev, u64 mask) dma_set_mask_and_coherent() argument 118 int rc = dma_set_mask(dev, mask); dma_set_mask_and_coherent() 120 dma_set_coherent_mask(dev, mask); dma_set_mask_and_coherent() 126 * does not have dev->dma_mask appropriately setup. 128 static inline int dma_coerce_mask_and_coherent(struct device dev, u64 mask) dma_coerce_mask_and_coherent() argument 130 dev->dma_mask = &dev->coherent_dma_mask; dma_coerce_mask_and_coherent() 131 return dma_set_mask_and_coherent(dev, mask); dma_coerce_mask_and_coherent() 134 extern u64 dma_get_required_mask(struct device dev); 137 static inline void arch_setup_dma_ops(struct device dev, u64 dma_base, arch_setup_dma_ops() argument 143 static inline void arch_teardown_dma_ops(struct device dev) { } arch_teardown_dma_ops() argument 146 static inline unsigned int dma_get_max_seg_size(struct device dev) dma_get_max_seg_size() argument 148 return dev->dma_parms ? dev->dma_parms->max_segment_size : 65536; dma_get_max_seg_size() 151 static inline unsigned int dma_set_max_seg_size(struct device dev, dma_set_max_seg_size() argument 154 if (dev->dma_parms) { dma_set_max_seg_size() 155 dev->dma_parms->max_segment_size = size; dma_set_max_seg_size() 161 static inline unsigned long dma_get_seg_boundary(struct device dev) dma_get_seg_boundary() argument 163 return dev->dma_parms ? dma_get_seg_boundary() 164 dev->dma_parms->segment_boundary_mask : 0xffffffff; dma_get_seg_boundary() 167 static inline int dma_set_seg_boundary(struct device dev, unsigned long mask) dma_set_seg_boundary() argument 169 if (dev->dma_parms) { dma_set_seg_boundary() 170 dev->dma_parms->segment_boundary_mask = mask; dma_set_seg_boundary() 177 static inline unsigned long dma_max_pfn(struct device dev) dma_max_pfn() argument 179 return dev->dma_mask >> PAGE_SHIFT; dma_max_pfn() 183 static inline void dma_zalloc_coherent(struct device dev, size_t size, dma_zalloc_coherent() argument 186 void ret = dma_alloc_coherent(dev, size, dma_handle, dma_zalloc_coherent() 209 dma_declare_coherent_memory(struct device dev, phys_addr_t phys_addr, dma_declare_coherent_memory() argument 216 dma_release_declared_memory(struct device dev) dma_release_declared_memory() argument 221 dma_mark_declared_memory_occupied(struct device dev, dma_mark_declared_memory_occupied() argument 231 extern void dmam_alloc_coherent(struct device dev, size_t size, 233 extern void dmam_free_coherent(struct device dev, size_t size, void vaddr, 235 extern void dmam_alloc_noncoherent(struct device dev, size_t size, 237 extern void dmam_free_noncoherent(struct device dev, size_t size, void vaddr, 240 extern int dmam_declare_coherent_memory(struct device dev, 244 extern void dmam_release_declared_memory(struct device dev); 246 static inline int dmam_declare_coherent_memory(struct device dev, dmam_declare_coherent_memory() argument 253 static inline void dmam_release_declared_memory(struct device dev) dmam_release_declared_memory() argument 261 #define dma_map_single_attrs(dev, cpu_addr, size, dir, attrs) \ 262 dma_map_single(dev, cpu_addr, size, dir) 264 #define dma_unmap_single_attrs(dev, dma_addr, size, dir, attrs) \ 265 dma_unmap_single(dev, dma_addr, size, dir) 267 #define dma_map_sg_attrs(dev, sgl, nents, dir, attrs) \ 268 dma_map_sg(dev, sgl, nents, dir) 270 #define dma_unmap_sg_attrs(dev, sgl, nents, dir, attrs) \ 271 dma_unmap_sg(dev, sgl, nents, dir) 274 static inline void dma_alloc_writecombine(struct device dev, size_t size, dma_alloc_writecombine() argument 279 return dma_alloc_attrs(dev, size, dma_addr, gfp, &attrs); dma_alloc_writecombine() 282 static inline void dma_free_writecombine(struct device dev, size_t size, dma_free_writecombine() argument 287 return dma_free_attrs(dev, size, cpu_addr, dma_addr, &attrs); dma_free_writecombine() 290 static inline int dma_mmap_writecombine(struct device dev, dma_mmap_writecombine() argument 297 return dma_mmap_attrs(dev, vma, cpu_addr, dma_addr, size, &attrs); dma_mmap_writecombine()
H A D	pm_clock.h	24 static inline bool pm_clk_no_clocks(struct device dev) pm_clk_no_clocks() argument 26 return dev && dev->power.subsys_data pm_clk_no_clocks() 27 && list_empty(&dev->power.subsys_data->clock_list); pm_clk_no_clocks() 30 extern void pm_clk_init(struct device dev); 31 extern int pm_clk_create(struct device dev); 32 extern void pm_clk_destroy(struct device dev); 33 extern int pm_clk_add(struct device dev, const char con_id); 34 extern int pm_clk_add_clk(struct device dev, struct clk clk); 35 extern void pm_clk_remove(struct device dev, const char con_id); 36 extern int pm_clk_suspend(struct device dev); 37 extern int pm_clk_resume(struct device dev); 39 static inline bool pm_clk_no_clocks(struct device dev) pm_clk_no_clocks() argument 43 static inline void pm_clk_init(struct device dev) pm_clk_init() argument 46 static inline int pm_clk_create(struct device dev) pm_clk_create() argument 50 static inline void pm_clk_destroy(struct device dev) pm_clk_destroy() argument 53 static inline int pm_clk_add(struct device dev, const char con_id) pm_clk_add() argument 58 static inline int pm_clk_add_clk(struct device dev, struct clk clk) pm_clk_add_clk() argument 62 static inline void pm_clk_remove(struct device dev, const char con_id) pm_clk_remove() argument
H A D	vlynq.h	74 struct device dev; member in struct:vlynq_device 80 int (probe)(struct vlynq_device dev, struct vlynq_device_id id); 81 void (remove)(struct vlynq_device dev); 86 int (on)(struct vlynq_device dev); 87 void (off)(struct vlynq_device dev); 97 return container_of(device, struct vlynq_device, dev); to_vlynq_device() 110 static inline void vlynq_get_drvdata(struct vlynq_device dev) vlynq_get_drvdata() argument 112 return dev_get_drvdata(&dev->dev); vlynq_get_drvdata() 115 static inline void vlynq_set_drvdata(struct vlynq_device dev, void data) vlynq_set_drvdata() argument 117 dev_set_drvdata(&dev->dev, data); vlynq_set_drvdata() 120 static inline u32 vlynq_mem_start(struct vlynq_device dev) vlynq_mem_start() argument 122 return dev->mem_start; vlynq_mem_start() 125 static inline u32 vlynq_mem_end(struct vlynq_device dev) vlynq_mem_end() argument 127 return dev->mem_end; vlynq_mem_end() 130 static inline u32 vlynq_mem_len(struct vlynq_device dev) vlynq_mem_len() argument 132 return dev->mem_end - dev->mem_start + 1; vlynq_mem_len() 135 static inline int vlynq_virq_to_irq(struct vlynq_device dev, int virq) vlynq_virq_to_irq() argument 137 int irq = dev->irq_start + virq; vlynq_virq_to_irq() 138 if ((irq < dev->irq_start) \|\| (irq > dev->irq_end)) vlynq_virq_to_irq() 144 static inline int vlynq_irq_to_virq(struct vlynq_device dev, int irq) vlynq_irq_to_virq() argument 146 if ((irq < dev->irq_start) \|\| (irq > dev->irq_end)) vlynq_irq_to_virq() 149 return irq - dev->irq_start; vlynq_irq_to_virq() 153 extern int vlynq_enable_device(struct vlynq_device dev); 154 extern void vlynq_disable_device(struct vlynq_device dev); 155 extern int vlynq_set_local_mapping(struct vlynq_device dev, u32 tx_offset, 157 extern int vlynq_set_remote_mapping(struct vlynq_device dev, u32 tx_offset, 159 extern int vlynq_set_local_irq(struct vlynq_device dev, int virq); 160 extern int vlynq_set_remote_irq(struct vlynq_device dev, int virq);
/linux-4.1.27/arch/powerpc/include/asm/
H A D	libata-portmap.h	`6 #define ATA_PRIMARY_IRQ(dev) pci_get_legacy_ide_irq(dev, 0) 10 #define ATA_SECONDARY_IRQ(dev) pci_get_legacy_ide_irq(dev, 1)`
H A D	macio.h	48 #define to_macio_device(d) container_of(d, struct macio_dev, ofdev.dev) 51 extern struct macio_dev macio_dev_get(struct macio_dev dev); 52 extern void macio_dev_put(struct macio_dev dev); 59 static inline int macio_resource_count(struct macio_dev dev) macio_resource_count() argument 61 return dev->n_resources; macio_resource_count() 64 static inline unsigned long macio_resource_start(struct macio_dev dev, int resource_no) macio_resource_start() argument 66 return dev->resource[resource_no].start; macio_resource_start() 69 static inline unsigned long macio_resource_end(struct macio_dev dev, int resource_no) macio_resource_end() argument 71 return dev->resource[resource_no].end; macio_resource_end() 74 static inline unsigned long macio_resource_len(struct macio_dev dev, int resource_no) macio_resource_len() argument 76 struct resource res = &dev->resource[resource_no]; macio_resource_len() 82 extern int macio_enable_devres(struct macio_dev dev); 84 extern int macio_request_resource(struct macio_dev dev, int resource_no, const char name); 85 extern void macio_release_resource(struct macio_dev dev, int resource_no); 86 extern int macio_request_resources(struct macio_dev dev, const char name); 87 extern void macio_release_resources(struct macio_dev dev); 89 static inline int macio_irq_count(struct macio_dev dev) macio_irq_count() argument 91 return dev->n_interrupts; macio_irq_count() 94 static inline int macio_irq(struct macio_dev dev, int irq_no) macio_irq() argument 96 return dev->interrupt[irq_no].start; macio_irq() 99 static inline void macio_set_drvdata(struct macio_dev dev, void data) macio_set_drvdata() argument 101 dev_set_drvdata(&dev->ofdev.dev, data); macio_set_drvdata() 104 static inline void macio_get_drvdata(struct macio_dev dev) macio_get_drvdata() argument 106 return dev_get_drvdata(&dev->ofdev.dev); macio_get_drvdata() 111 return mdev->ofdev.dev.of_node; macio_get_of_node() 126 int (probe)(struct macio_dev* dev, const struct of_device_id match); 127 int (remove)(struct macio_dev* dev); 129 int (suspend)(struct macio_dev dev, pm_message_t state); 130 int (resume)(struct macio_dev dev); 131 int (shutdown)(struct macio_dev dev); 134 void (mediabay_event)(struct macio_dev dev, int mb_state);
/linux-4.1.27/drivers/net/wireless/b43legacy/
H A D	radio.c	90 void b43legacy_radio_lock(struct b43legacy_wldev dev) b43legacy_radio_lock() argument 94 status = b43legacy_read32(dev, B43legacy_MMIO_MACCTL); b43legacy_radio_lock() 97 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, status); b43legacy_radio_lock() 102 void b43legacy_radio_unlock(struct b43legacy_wldev dev) b43legacy_radio_unlock() argument 106 b43legacy_read16(dev, B43legacy_MMIO_PHY_VER); /* dummy read / b43legacy_radio_unlock() 107 status = b43legacy_read32(dev, B43legacy_MMIO_MACCTL); b43legacy_radio_unlock() 110 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, status); b43legacy_radio_unlock() 114 u16 b43legacy_radio_read16(struct b43legacy_wldev dev, u16 offset) b43legacy_radio_read16() argument 116 struct b43legacy_phy phy = &dev->phy; b43legacy_radio_read16() 137 b43legacy_write16(dev, B43legacy_MMIO_RADIO_CONTROL, offset); b43legacy_radio_read16() 138 return b43legacy_read16(dev, B43legacy_MMIO_RADIO_DATA_LOW); b43legacy_radio_read16() 141 void b43legacy_radio_write16(struct b43legacy_wldev dev, u16 offset, u16 val) b43legacy_radio_write16() argument 143 b43legacy_write16(dev, B43legacy_MMIO_RADIO_CONTROL, offset); b43legacy_radio_write16() 145 b43legacy_write16(dev, B43legacy_MMIO_RADIO_DATA_LOW, val); b43legacy_radio_write16() 148 static void b43legacy_set_all_gains(struct b43legacy_wldev dev, b43legacy_set_all_gains() argument 151 struct b43legacy_phy phy = &dev->phy; b43legacy_set_all_gains() 165 b43legacy_ilt_write(dev, offset + i, first); b43legacy_set_all_gains() 168 b43legacy_ilt_write(dev, offset + i, second); b43legacy_set_all_gains() 172 b43legacy_phy_write(dev, 0x04A0, b43legacy_set_all_gains() 173 (b43legacy_phy_read(dev, 0x04A0) & 0xBFBF) b43legacy_set_all_gains() 175 b43legacy_phy_write(dev, 0x04A1, b43legacy_set_all_gains() 176 (b43legacy_phy_read(dev, 0x04A1) & 0xBFBF) b43legacy_set_all_gains() 178 b43legacy_phy_write(dev, 0x04A2, b43legacy_set_all_gains() 179 (b43legacy_phy_read(dev, 0x04A2) & 0xBFBF) b43legacy_set_all_gains() 182 b43legacy_dummy_transmission(dev); b43legacy_set_all_gains() 185 static void b43legacy_set_original_gains(struct b43legacy_wldev dev) b43legacy_set_original_gains() argument 187 struct b43legacy_phy phy = &dev->phy; b43legacy_set_original_gains() 205 b43legacy_ilt_write(dev, offset + i, tmp); b43legacy_set_original_gains() 209 b43legacy_ilt_write(dev, offset + i, i - start); b43legacy_set_original_gains() 211 b43legacy_phy_write(dev, 0x04A0, b43legacy_set_original_gains() 212 (b43legacy_phy_read(dev, 0x04A0) & 0xBFBF) b43legacy_set_original_gains() 214 b43legacy_phy_write(dev, 0x04A1, b43legacy_set_original_gains() 215 (b43legacy_phy_read(dev, 0x04A1) & 0xBFBF) b43legacy_set_original_gains() 217 b43legacy_phy_write(dev, 0x04A2, b43legacy_set_original_gains() 218 (b43legacy_phy_read(dev, 0x04A2) & 0xBFBF) b43legacy_set_original_gains() 220 b43legacy_dummy_transmission(dev); b43legacy_set_original_gains() 224 static void b43legacy_synth_pu_workaround(struct b43legacy_wldev dev, b43legacy_synth_pu_workaround() argument 227 struct b43legacy_phy phy = &dev->phy; b43legacy_synth_pu_workaround() 236 b43legacy_write16(dev, B43legacy_MMIO_CHANNEL, b43legacy_synth_pu_workaround() 239 b43legacy_write16(dev, B43legacy_MMIO_CHANNEL, b43legacy_synth_pu_workaround() 242 b43legacy_write16(dev, B43legacy_MMIO_CHANNEL, b43legacy_synth_pu_workaround() 246 u8 b43legacy_radio_aci_detect(struct b43legacy_wldev dev, u8 channel) b43legacy_radio_aci_detect() argument 248 struct b43legacy_phy phy = &dev->phy; b43legacy_radio_aci_detect() 256 saved = b43legacy_phy_read(dev, 0x0403); b43legacy_radio_aci_detect() 257 b43legacy_radio_selectchannel(dev, channel, 0); b43legacy_radio_aci_detect() 258 b43legacy_phy_write(dev, 0x0403, (saved & 0xFFF8) \| 5); b43legacy_radio_aci_detect() 260 rssi = b43legacy_phy_read(dev, 0x048A) & 0x3F; b43legacy_radio_aci_detect() 267 temp = (b43legacy_phy_read(dev, 0x047F) >> 8) & 0x3F; b43legacy_radio_aci_detect() 275 b43legacy_phy_write(dev, 0x0403, saved); b43legacy_radio_aci_detect() 280 u8 b43legacy_radio_aci_scan(struct b43legacy_wldev dev) b43legacy_radio_aci_scan() argument 282 struct b43legacy_phy phy = &dev->phy; b43legacy_radio_aci_scan() 293 b43legacy_phy_lock(dev); b43legacy_radio_aci_scan() 294 b43legacy_radio_lock(dev); b43legacy_radio_aci_scan() 295 b43legacy_phy_write(dev, 0x0802, b43legacy_radio_aci_scan() 296 b43legacy_phy_read(dev, 0x0802) & 0xFFFC); b43legacy_radio_aci_scan() 297 b43legacy_phy_write(dev, B43legacy_PHY_G_CRS, b43legacy_radio_aci_scan() 298 b43legacy_phy_read(dev, B43legacy_PHY_G_CRS) b43legacy_radio_aci_scan() 300 b43legacy_set_all_gains(dev, 3, 8, 1); b43legacy_radio_aci_scan() 307 ret[i-1] = b43legacy_radio_aci_detect(dev, i); b43legacy_radio_aci_scan() 309 b43legacy_radio_selectchannel(dev, channel, 0); b43legacy_radio_aci_scan() 310 b43legacy_phy_write(dev, 0x0802, b43legacy_radio_aci_scan() 311 (b43legacy_phy_read(dev, 0x0802) & 0xFFFC) b43legacy_radio_aci_scan() 313 b43legacy_phy_write(dev, 0x0403, b43legacy_radio_aci_scan() 314 b43legacy_phy_read(dev, 0x0403) & 0xFFF8); b43legacy_radio_aci_scan() 315 b43legacy_phy_write(dev, B43legacy_PHY_G_CRS, b43legacy_radio_aci_scan() 316 b43legacy_phy_read(dev, B43legacy_PHY_G_CRS) b43legacy_radio_aci_scan() 318 b43legacy_set_original_gains(dev); b43legacy_radio_aci_scan() 326 b43legacy_radio_unlock(dev); b43legacy_radio_aci_scan() 327 b43legacy_phy_unlock(dev); b43legacy_radio_aci_scan() 333 void b43legacy_nrssi_hw_write(struct b43legacy_wldev dev, u16 offset, s16 val) b43legacy_nrssi_hw_write() argument 335 b43legacy_phy_write(dev, B43legacy_PHY_NRSSILT_CTRL, offset); b43legacy_nrssi_hw_write() 337 b43legacy_phy_write(dev, B43legacy_PHY_NRSSILT_DATA, (u16)val); b43legacy_nrssi_hw_write() 341 s16 b43legacy_nrssi_hw_read(struct b43legacy_wldev dev, u16 offset) b43legacy_nrssi_hw_read() argument 345 b43legacy_phy_write(dev, B43legacy_PHY_NRSSILT_CTRL, offset); b43legacy_nrssi_hw_read() 346 val = b43legacy_phy_read(dev, B43legacy_PHY_NRSSILT_DATA); b43legacy_nrssi_hw_read() 352 void b43legacy_nrssi_hw_update(struct b43legacy_wldev dev, u16 val) b43legacy_nrssi_hw_update() argument 358 tmp = b43legacy_nrssi_hw_read(dev, i); b43legacy_nrssi_hw_update() 361 b43legacy_nrssi_hw_write(dev, i, tmp); b43legacy_nrssi_hw_update() 366 void b43legacy_nrssi_mem_update(struct b43legacy_wldev dev) b43legacy_nrssi_mem_update() argument 368 struct b43legacy_phy phy = &dev->phy; b43legacy_nrssi_mem_update() 383 static void b43legacy_calc_nrssi_offset(struct b43legacy_wldev dev) b43legacy_calc_nrssi_offset() argument 385 struct b43legacy_phy phy = &dev->phy; b43legacy_calc_nrssi_offset() 391 backup[0] = b43legacy_phy_read(dev, 0x0001); b43legacy_calc_nrssi_offset() 392 backup[1] = b43legacy_phy_read(dev, 0x0811); b43legacy_calc_nrssi_offset() 393 backup[2] = b43legacy_phy_read(dev, 0x0812); b43legacy_calc_nrssi_offset() 394 backup[3] = b43legacy_phy_read(dev, 0x0814); b43legacy_calc_nrssi_offset() 395 backup[4] = b43legacy_phy_read(dev, 0x0815); b43legacy_calc_nrssi_offset() 396 backup[5] = b43legacy_phy_read(dev, 0x005A); b43legacy_calc_nrssi_offset() 397 backup[6] = b43legacy_phy_read(dev, 0x0059); b43legacy_calc_nrssi_offset() 398 backup[7] = b43legacy_phy_read(dev, 0x0058); b43legacy_calc_nrssi_offset() 399 backup[8] = b43legacy_phy_read(dev, 0x000A); b43legacy_calc_nrssi_offset() 400 backup[9] = b43legacy_phy_read(dev, 0x0003); b43legacy_calc_nrssi_offset() 401 backup[10] = b43legacy_radio_read16(dev, 0x007A); b43legacy_calc_nrssi_offset() 402 backup[11] = b43legacy_radio_read16(dev, 0x0043); b43legacy_calc_nrssi_offset() 404 b43legacy_phy_write(dev, 0x0429, b43legacy_calc_nrssi_offset() 405 b43legacy_phy_read(dev, 0x0429) & 0x7FFF); b43legacy_calc_nrssi_offset() 406 b43legacy_phy_write(dev, 0x0001, b43legacy_calc_nrssi_offset() 407 (b43legacy_phy_read(dev, 0x0001) & 0x3FFF) b43legacy_calc_nrssi_offset() 409 b43legacy_phy_write(dev, 0x0811, b43legacy_calc_nrssi_offset() 410 b43legacy_phy_read(dev, 0x0811) \| 0x000C); b43legacy_calc_nrssi_offset() 411 b43legacy_phy_write(dev, 0x0812, b43legacy_calc_nrssi_offset() 412 (b43legacy_phy_read(dev, 0x0812) & 0xFFF3) b43legacy_calc_nrssi_offset() 414 b43legacy_phy_write(dev, 0x0802, b43legacy_calc_nrssi_offset() 415 b43legacy_phy_read(dev, 0x0802) & ~(0x1 \| 0x2)); b43legacy_calc_nrssi_offset() 417 backup[12] = b43legacy_phy_read(dev, 0x002E); b43legacy_calc_nrssi_offset() 418 backup[13] = b43legacy_phy_read(dev, 0x002F); b43legacy_calc_nrssi_offset() 419 backup[14] = b43legacy_phy_read(dev, 0x080F); b43legacy_calc_nrssi_offset() 420 backup[15] = b43legacy_phy_read(dev, 0x0810); b43legacy_calc_nrssi_offset() 421 backup[16] = b43legacy_phy_read(dev, 0x0801); b43legacy_calc_nrssi_offset() 422 backup[17] = b43legacy_phy_read(dev, 0x0060); b43legacy_calc_nrssi_offset() 423 backup[18] = b43legacy_phy_read(dev, 0x0014); b43legacy_calc_nrssi_offset() 424 backup[19] = b43legacy_phy_read(dev, 0x0478); b43legacy_calc_nrssi_offset() 426 b43legacy_phy_write(dev, 0x002E, 0); b43legacy_calc_nrssi_offset() 427 b43legacy_phy_write(dev, 0x002F, 0); b43legacy_calc_nrssi_offset() 428 b43legacy_phy_write(dev, 0x080F, 0); b43legacy_calc_nrssi_offset() 429 b43legacy_phy_write(dev, 0x0810, 0); b43legacy_calc_nrssi_offset() 430 b43legacy_phy_write(dev, 0x0478, b43legacy_calc_nrssi_offset() 431 b43legacy_phy_read(dev, 0x0478) \| 0x0100); b43legacy_calc_nrssi_offset() 432 b43legacy_phy_write(dev, 0x0801, b43legacy_calc_nrssi_offset() 433 b43legacy_phy_read(dev, 0x0801) \| 0x0040); b43legacy_calc_nrssi_offset() 434 b43legacy_phy_write(dev, 0x0060, b43legacy_calc_nrssi_offset() 435 b43legacy_phy_read(dev, 0x0060) \| 0x0040); b43legacy_calc_nrssi_offset() 436 b43legacy_phy_write(dev, 0x0014, b43legacy_calc_nrssi_offset() 437 b43legacy_phy_read(dev, 0x0014) \| 0x0200); b43legacy_calc_nrssi_offset() 439 b43legacy_radio_write16(dev, 0x007A, b43legacy_calc_nrssi_offset() 440 b43legacy_radio_read16(dev, 0x007A) \| 0x0070); b43legacy_calc_nrssi_offset() 441 b43legacy_radio_write16(dev, 0x007A, b43legacy_calc_nrssi_offset() 442 b43legacy_radio_read16(dev, 0x007A) \| 0x0080); b43legacy_calc_nrssi_offset() 445 v47F = (s16)((b43legacy_phy_read(dev, 0x047F) >> 8) & 0x003F); b43legacy_calc_nrssi_offset() 450 b43legacy_radio_write16(dev, 0x007B, i); b43legacy_calc_nrssi_offset() 452 v47F = (s16)((b43legacy_phy_read(dev, 0x047F) >> 8) b43legacy_calc_nrssi_offset() 462 b43legacy_radio_write16(dev, 0x007A, b43legacy_calc_nrssi_offset() 463 b43legacy_radio_read16(dev, 0x007A) b43legacy_calc_nrssi_offset() 465 b43legacy_phy_write(dev, 0x0814, b43legacy_calc_nrssi_offset() 466 b43legacy_phy_read(dev, 0x0814) \| 0x0001); b43legacy_calc_nrssi_offset() 467 b43legacy_phy_write(dev, 0x0815, b43legacy_calc_nrssi_offset() 468 b43legacy_phy_read(dev, 0x0815) & 0xFFFE); b43legacy_calc_nrssi_offset() 469 b43legacy_phy_write(dev, 0x0811, b43legacy_calc_nrssi_offset() 470 b43legacy_phy_read(dev, 0x0811) \| 0x000C); b43legacy_calc_nrssi_offset() 471 b43legacy_phy_write(dev, 0x0812, b43legacy_calc_nrssi_offset() 472 b43legacy_phy_read(dev, 0x0812) \| 0x000C); b43legacy_calc_nrssi_offset() 473 b43legacy_phy_write(dev, 0x0811, b43legacy_calc_nrssi_offset() 474 b43legacy_phy_read(dev, 0x0811) \| 0x0030); b43legacy_calc_nrssi_offset() 475 b43legacy_phy_write(dev, 0x0812, b43legacy_calc_nrssi_offset() 476 b43legacy_phy_read(dev, 0x0812) \| 0x0030); b43legacy_calc_nrssi_offset() 477 b43legacy_phy_write(dev, 0x005A, 0x0480); b43legacy_calc_nrssi_offset() 478 b43legacy_phy_write(dev, 0x0059, 0x0810); b43legacy_calc_nrssi_offset() 479 b43legacy_phy_write(dev, 0x0058, 0x000D); b43legacy_calc_nrssi_offset() 481 b43legacy_phy_write(dev, 0x0003, 0x0122); b43legacy_calc_nrssi_offset() 483 b43legacy_phy_write(dev, 0x000A, b43legacy_calc_nrssi_offset() 484 b43legacy_phy_read(dev, 0x000A) b43legacy_calc_nrssi_offset() 486 b43legacy_phy_write(dev, 0x0814, b43legacy_calc_nrssi_offset() 487 b43legacy_phy_read(dev, 0x0814) \| 0x0004); b43legacy_calc_nrssi_offset() 488 b43legacy_phy_write(dev, 0x0815, b43legacy_calc_nrssi_offset() 489 b43legacy_phy_read(dev, 0x0815) & 0xFFFB); b43legacy_calc_nrssi_offset() 490 b43legacy_phy_write(dev, 0x0003, b43legacy_calc_nrssi_offset() 491 (b43legacy_phy_read(dev, 0x0003) & 0xFF9F) b43legacy_calc_nrssi_offset() 493 b43legacy_radio_write16(dev, 0x007A, b43legacy_calc_nrssi_offset() 494 b43legacy_radio_read16(dev, 0x007A) b43legacy_calc_nrssi_offset() 496 b43legacy_set_all_gains(dev, 3, 0, 1); b43legacy_calc_nrssi_offset() 497 b43legacy_radio_write16(dev, 0x0043, b43legacy_calc_nrssi_offset() 498 (b43legacy_radio_read16(dev, 0x0043) b43legacy_calc_nrssi_offset() 501 v47F = (s16)((b43legacy_phy_read(dev, 0x047F) >> 8) & 0x003F); b43legacy_calc_nrssi_offset() 506 b43legacy_radio_write16(dev, 0x007B, i); b43legacy_calc_nrssi_offset() 508 v47F = (s16)((b43legacy_phy_read(dev, 0x047F) >> b43legacy_calc_nrssi_offset() 520 b43legacy_radio_write16(dev, 0x007B, saved); b43legacy_calc_nrssi_offset() 523 b43legacy_phy_write(dev, 0x002E, backup[12]); b43legacy_calc_nrssi_offset() 524 b43legacy_phy_write(dev, 0x002F, backup[13]); b43legacy_calc_nrssi_offset() 525 b43legacy_phy_write(dev, 0x080F, backup[14]); b43legacy_calc_nrssi_offset() 526 b43legacy_phy_write(dev, 0x0810, backup[15]); b43legacy_calc_nrssi_offset() 528 b43legacy_phy_write(dev, 0x0814, backup[3]); b43legacy_calc_nrssi_offset() 529 b43legacy_phy_write(dev, 0x0815, backup[4]); b43legacy_calc_nrssi_offset() 530 b43legacy_phy_write(dev, 0x005A, backup[5]); b43legacy_calc_nrssi_offset() 531 b43legacy_phy_write(dev, 0x0059, backup[6]); b43legacy_calc_nrssi_offset() 532 b43legacy_phy_write(dev, 0x0058, backup[7]); b43legacy_calc_nrssi_offset() 533 b43legacy_phy_write(dev, 0x000A, backup[8]); b43legacy_calc_nrssi_offset() 534 b43legacy_phy_write(dev, 0x0003, backup[9]); b43legacy_calc_nrssi_offset() 535 b43legacy_radio_write16(dev, 0x0043, backup[11]); b43legacy_calc_nrssi_offset() 536 b43legacy_radio_write16(dev, 0x007A, backup[10]); b43legacy_calc_nrssi_offset() 537 b43legacy_phy_write(dev, 0x0802, b43legacy_calc_nrssi_offset() 538 b43legacy_phy_read(dev, 0x0802) \| 0x1 \| 0x2); b43legacy_calc_nrssi_offset() 539 b43legacy_phy_write(dev, 0x0429, b43legacy_calc_nrssi_offset() 540 b43legacy_phy_read(dev, 0x0429) \| 0x8000); b43legacy_calc_nrssi_offset() 541 b43legacy_set_original_gains(dev); b43legacy_calc_nrssi_offset() 543 b43legacy_phy_write(dev, 0x0801, backup[16]); b43legacy_calc_nrssi_offset() 544 b43legacy_phy_write(dev, 0x0060, backup[17]); b43legacy_calc_nrssi_offset() 545 b43legacy_phy_write(dev, 0x0014, backup[18]); b43legacy_calc_nrssi_offset() 546 b43legacy_phy_write(dev, 0x0478, backup[19]); b43legacy_calc_nrssi_offset() 548 b43legacy_phy_write(dev, 0x0001, backup[0]); b43legacy_calc_nrssi_offset() 549 b43legacy_phy_write(dev, 0x0812, backup[2]); b43legacy_calc_nrssi_offset() 550 b43legacy_phy_write(dev, 0x0811, backup[1]); b43legacy_calc_nrssi_offset() 553 void b43legacy_calc_nrssi_slope(struct b43legacy_wldev dev) b43legacy_calc_nrssi_slope() argument 555 struct b43legacy_phy phy = &dev->phy; b43legacy_calc_nrssi_slope() 563 backup[0] = b43legacy_radio_read16(dev, 0x007A); b43legacy_calc_nrssi_slope() 564 backup[1] = b43legacy_radio_read16(dev, 0x0052); b43legacy_calc_nrssi_slope() 565 backup[2] = b43legacy_radio_read16(dev, 0x0043); b43legacy_calc_nrssi_slope() 566 backup[3] = b43legacy_phy_read(dev, 0x0030); b43legacy_calc_nrssi_slope() 567 backup[4] = b43legacy_phy_read(dev, 0x0026); b43legacy_calc_nrssi_slope() 568 backup[5] = b43legacy_phy_read(dev, 0x0015); b43legacy_calc_nrssi_slope() 569 backup[6] = b43legacy_phy_read(dev, 0x002A); b43legacy_calc_nrssi_slope() 570 backup[7] = b43legacy_phy_read(dev, 0x0020); b43legacy_calc_nrssi_slope() 571 backup[8] = b43legacy_phy_read(dev, 0x005A); b43legacy_calc_nrssi_slope() 572 backup[9] = b43legacy_phy_read(dev, 0x0059); b43legacy_calc_nrssi_slope() 573 backup[10] = b43legacy_phy_read(dev, 0x0058); b43legacy_calc_nrssi_slope() 574 backup[11] = b43legacy_read16(dev, 0x03E2); b43legacy_calc_nrssi_slope() 575 backup[12] = b43legacy_read16(dev, 0x03E6); b43legacy_calc_nrssi_slope() 576 backup[13] = b43legacy_read16(dev, B43legacy_MMIO_CHANNEL_EXT); b43legacy_calc_nrssi_slope() 578 tmp = b43legacy_radio_read16(dev, 0x007A); b43legacy_calc_nrssi_slope() 580 b43legacy_radio_write16(dev, 0x007A, tmp); b43legacy_calc_nrssi_slope() 581 b43legacy_phy_write(dev, 0x0030, 0x00FF); b43legacy_calc_nrssi_slope() 582 b43legacy_write16(dev, 0x03EC, 0x7F7F); b43legacy_calc_nrssi_slope() 583 b43legacy_phy_write(dev, 0x0026, 0x0000); b43legacy_calc_nrssi_slope() 584 b43legacy_phy_write(dev, 0x0015, b43legacy_calc_nrssi_slope() 585 b43legacy_phy_read(dev, 0x0015) \| 0x0020); b43legacy_calc_nrssi_slope() 586 b43legacy_phy_write(dev, 0x002A, 0x08A3); b43legacy_calc_nrssi_slope() 587 b43legacy_radio_write16(dev, 0x007A, b43legacy_calc_nrssi_slope() 588 b43legacy_radio_read16(dev, 0x007A) b43legacy_calc_nrssi_slope() 591 nrssi0 = (s16)b43legacy_phy_read(dev, 0x0027); b43legacy_calc_nrssi_slope() 592 b43legacy_radio_write16(dev, 0x007A, b43legacy_calc_nrssi_slope() 593 b43legacy_radio_read16(dev, 0x007A) b43legacy_calc_nrssi_slope() 596 b43legacy_write16(dev, 0x03E6, 0x0040); b43legacy_calc_nrssi_slope() 598 b43legacy_write16(dev, 0x03E6, 0x0122); b43legacy_calc_nrssi_slope() 600 b43legacy_write16(dev, B43legacy_MMIO_CHANNEL_EXT, b43legacy_calc_nrssi_slope() 601 b43legacy_read16(dev, b43legacy_calc_nrssi_slope() 603 b43legacy_phy_write(dev, 0x0020, 0x3F3F); b43legacy_calc_nrssi_slope() 604 b43legacy_phy_write(dev, 0x0015, 0xF330); b43legacy_calc_nrssi_slope() 605 b43legacy_radio_write16(dev, 0x005A, 0x0060); b43legacy_calc_nrssi_slope() 606 b43legacy_radio_write16(dev, 0x0043, b43legacy_calc_nrssi_slope() 607 b43legacy_radio_read16(dev, 0x0043) b43legacy_calc_nrssi_slope() 609 b43legacy_phy_write(dev, 0x005A, 0x0480); b43legacy_calc_nrssi_slope() 610 b43legacy_phy_write(dev, 0x0059, 0x0810); b43legacy_calc_nrssi_slope() 611 b43legacy_phy_write(dev, 0x0058, 0x000D); b43legacy_calc_nrssi_slope() 614 nrssi1 = (s16)b43legacy_phy_read(dev, 0x0027); b43legacy_calc_nrssi_slope() 615 b43legacy_phy_write(dev, 0x0030, backup[3]); b43legacy_calc_nrssi_slope() 616 b43legacy_radio_write16(dev, 0x007A, backup[0]); b43legacy_calc_nrssi_slope() 617 b43legacy_write16(dev, 0x03E2, backup[11]); b43legacy_calc_nrssi_slope() 618 b43legacy_phy_write(dev, 0x0026, backup[4]); b43legacy_calc_nrssi_slope() 619 b43legacy_phy_write(dev, 0x0015, backup[5]); b43legacy_calc_nrssi_slope() 620 b43legacy_phy_write(dev, 0x002A, backup[6]); b43legacy_calc_nrssi_slope() 621 b43legacy_synth_pu_workaround(dev, phy->channel); b43legacy_calc_nrssi_slope() 623 b43legacy_write16(dev, 0x03F4, backup[13]); b43legacy_calc_nrssi_slope() 625 b43legacy_phy_write(dev, 0x0020, backup[7]); b43legacy_calc_nrssi_slope() 626 b43legacy_phy_write(dev, 0x005A, backup[8]); b43legacy_calc_nrssi_slope() 627 b43legacy_phy_write(dev, 0x0059, backup[9]); b43legacy_calc_nrssi_slope() 628 b43legacy_phy_write(dev, 0x0058, backup[10]); b43legacy_calc_nrssi_slope() 629 b43legacy_radio_write16(dev, 0x0052, backup[1]); b43legacy_calc_nrssi_slope() 630 b43legacy_radio_write16(dev, 0x0043, backup[2]); b43legacy_calc_nrssi_slope() 646 b43legacy_calc_nrssi_offset(dev); b43legacy_calc_nrssi_slope() 648 b43legacy_phy_write(dev, B43legacy_PHY_G_CRS, b43legacy_calc_nrssi_slope() 649 b43legacy_phy_read(dev, B43legacy_PHY_G_CRS) b43legacy_calc_nrssi_slope() 651 b43legacy_phy_write(dev, 0x0802, b43legacy_calc_nrssi_slope() 652 b43legacy_phy_read(dev, 0x0802) & 0xFFFC); b43legacy_calc_nrssi_slope() 653 backup[7] = b43legacy_read16(dev, 0x03E2); b43legacy_calc_nrssi_slope() 654 b43legacy_write16(dev, 0x03E2, b43legacy_calc_nrssi_slope() 655 b43legacy_read16(dev, 0x03E2) \| 0x8000); b43legacy_calc_nrssi_slope() 656 backup[0] = b43legacy_radio_read16(dev, 0x007A); b43legacy_calc_nrssi_slope() 657 backup[1] = b43legacy_radio_read16(dev, 0x0052); b43legacy_calc_nrssi_slope() 658 backup[2] = b43legacy_radio_read16(dev, 0x0043); b43legacy_calc_nrssi_slope() 659 backup[3] = b43legacy_phy_read(dev, 0x0015); b43legacy_calc_nrssi_slope() 660 backup[4] = b43legacy_phy_read(dev, 0x005A); b43legacy_calc_nrssi_slope() 661 backup[5] = b43legacy_phy_read(dev, 0x0059); b43legacy_calc_nrssi_slope() 662 backup[6] = b43legacy_phy_read(dev, 0x0058); b43legacy_calc_nrssi_slope() 663 backup[8] = b43legacy_read16(dev, 0x03E6); b43legacy_calc_nrssi_slope() 664 backup[9] = b43legacy_read16(dev, B43legacy_MMIO_CHANNEL_EXT); b43legacy_calc_nrssi_slope() 666 backup[10] = b43legacy_phy_read(dev, 0x002E); b43legacy_calc_nrssi_slope() 667 backup[11] = b43legacy_phy_read(dev, 0x002F); b43legacy_calc_nrssi_slope() 668 backup[12] = b43legacy_phy_read(dev, 0x080F); b43legacy_calc_nrssi_slope() 669 backup[13] = b43legacy_phy_read(dev, b43legacy_calc_nrssi_slope() 671 backup[14] = b43legacy_phy_read(dev, 0x0801); b43legacy_calc_nrssi_slope() 672 backup[15] = b43legacy_phy_read(dev, 0x0060); b43legacy_calc_nrssi_slope() 673 backup[16] = b43legacy_phy_read(dev, 0x0014); b43legacy_calc_nrssi_slope() 674 backup[17] = b43legacy_phy_read(dev, 0x0478); b43legacy_calc_nrssi_slope() 675 b43legacy_phy_write(dev, 0x002E, 0); b43legacy_calc_nrssi_slope() 676 b43legacy_phy_write(dev, B43legacy_PHY_G_LO_CONTROL, 0); b43legacy_calc_nrssi_slope() 679 b43legacy_phy_write(dev, 0x0478, b43legacy_calc_nrssi_slope() 680 b43legacy_phy_read(dev, b43legacy_calc_nrssi_slope() 682 b43legacy_phy_write(dev, 0x0801, b43legacy_calc_nrssi_slope() 683 b43legacy_phy_read(dev, b43legacy_calc_nrssi_slope() 687 b43legacy_phy_write(dev, 0x0801, b43legacy_calc_nrssi_slope() 688 b43legacy_phy_read(dev, b43legacy_calc_nrssi_slope() 692 b43legacy_phy_write(dev, 0x0060, b43legacy_calc_nrssi_slope() 693 b43legacy_phy_read(dev, 0x0060) b43legacy_calc_nrssi_slope() 695 b43legacy_phy_write(dev, 0x0014, b43legacy_calc_nrssi_slope() 696 b43legacy_phy_read(dev, 0x0014) b43legacy_calc_nrssi_slope() 699 b43legacy_radio_write16(dev, 0x007A, b43legacy_calc_nrssi_slope() 700 b43legacy_radio_read16(dev, 0x007A) b43legacy_calc_nrssi_slope() 702 b43legacy_set_all_gains(dev, 0, 8, 0); b43legacy_calc_nrssi_slope() 703 b43legacy_radio_write16(dev, 0x007A, b43legacy_calc_nrssi_slope() 704 b43legacy_radio_read16(dev, 0x007A) b43legacy_calc_nrssi_slope() 707 b43legacy_phy_write(dev, 0x0811, b43legacy_calc_nrssi_slope() 708 (b43legacy_phy_read(dev, 0x0811) b43legacy_calc_nrssi_slope() 710 b43legacy_phy_write(dev, 0x0812, b43legacy_calc_nrssi_slope() 711 (b43legacy_phy_read(dev, 0x0812) b43legacy_calc_nrssi_slope() 714 b43legacy_radio_write16(dev, 0x007A, b43legacy_calc_nrssi_slope() 715 b43legacy_radio_read16(dev, 0x007A) b43legacy_calc_nrssi_slope() 719 nrssi0 = (s16)((b43legacy_phy_read(dev, 0x047F) >> 8) & 0x003F); b43legacy_calc_nrssi_slope() 723 b43legacy_radio_write16(dev, 0x007A, b43legacy_calc_nrssi_slope() 724 b43legacy_radio_read16(dev, 0x007A) b43legacy_calc_nrssi_slope() 727 b43legacy_phy_write(dev, 0x0003, b43legacy_calc_nrssi_slope() 728 (b43legacy_phy_read(dev, 0x0003) b43legacy_calc_nrssi_slope() 731 b43legacy_write16(dev, B43legacy_MMIO_CHANNEL_EXT, b43legacy_calc_nrssi_slope() 732 b43legacy_read16(dev, b43legacy_calc_nrssi_slope() 734 b43legacy_radio_write16(dev, 0x007A, b43legacy_calc_nrssi_slope() 735 b43legacy_radio_read16(dev, 0x007A) b43legacy_calc_nrssi_slope() 737 b43legacy_phy_write(dev, 0x0015, 0xF330); b43legacy_calc_nrssi_slope() 739 b43legacy_phy_write(dev, 0x0812, b43legacy_calc_nrssi_slope() 740 (b43legacy_phy_read(dev, 0x0812) b43legacy_calc_nrssi_slope() 742 b43legacy_phy_write(dev, 0x0811, b43legacy_calc_nrssi_slope() 743 (b43legacy_phy_read(dev, 0x0811) b43legacy_calc_nrssi_slope() 747 b43legacy_set_all_gains(dev, 3, 0, 1); b43legacy_calc_nrssi_slope() 749 b43legacy_radio_write16(dev, 0x0043, 0x001F); b43legacy_calc_nrssi_slope() 751 tmp = b43legacy_radio_read16(dev, 0x0052) & 0xFF0F; b43legacy_calc_nrssi_slope() 752 b43legacy_radio_write16(dev, 0x0052, tmp \| 0x0060); b43legacy_calc_nrssi_slope() 753 tmp = b43legacy_radio_read16(dev, 0x0043) & 0xFFF0; b43legacy_calc_nrssi_slope() 754 b43legacy_radio_write16(dev, 0x0043, tmp \| 0x0009); b43legacy_calc_nrssi_slope() 756 b43legacy_phy_write(dev, 0x005A, 0x0480); b43legacy_calc_nrssi_slope() 757 b43legacy_phy_write(dev, 0x0059, 0x0810); b43legacy_calc_nrssi_slope() 758 b43legacy_phy_write(dev, 0x0058, 0x000D); b43legacy_calc_nrssi_slope() 760 nrssi1 = (s16)((b43legacy_phy_read(dev, 0x047F) >> 8) & 0x003F); b43legacy_calc_nrssi_slope() 772 b43legacy_phy_write(dev, 0x002E, backup[10]); b43legacy_calc_nrssi_slope() 773 b43legacy_phy_write(dev, 0x002F, backup[11]); b43legacy_calc_nrssi_slope() 774 b43legacy_phy_write(dev, 0x080F, backup[12]); b43legacy_calc_nrssi_slope() 775 b43legacy_phy_write(dev, B43legacy_PHY_G_LO_CONTROL, b43legacy_calc_nrssi_slope() 779 b43legacy_phy_write(dev, 0x0812, b43legacy_calc_nrssi_slope() 780 b43legacy_phy_read(dev, 0x0812) b43legacy_calc_nrssi_slope() 782 b43legacy_phy_write(dev, 0x0811, b43legacy_calc_nrssi_slope() 783 b43legacy_phy_read(dev, 0x0811) b43legacy_calc_nrssi_slope() 787 b43legacy_radio_write16(dev, 0x007A, backup[0]); b43legacy_calc_nrssi_slope() 788 b43legacy_radio_write16(dev, 0x0052, backup[1]); b43legacy_calc_nrssi_slope() 789 b43legacy_radio_write16(dev, 0x0043, backup[2]); b43legacy_calc_nrssi_slope() 790 b43legacy_write16(dev, 0x03E2, backup[7]); b43legacy_calc_nrssi_slope() 791 b43legacy_write16(dev, 0x03E6, backup[8]); b43legacy_calc_nrssi_slope() 792 b43legacy_write16(dev, B43legacy_MMIO_CHANNEL_EXT, backup[9]); b43legacy_calc_nrssi_slope() 793 b43legacy_phy_write(dev, 0x0015, backup[3]); b43legacy_calc_nrssi_slope() 794 b43legacy_phy_write(dev, 0x005A, backup[4]); b43legacy_calc_nrssi_slope() 795 b43legacy_phy_write(dev, 0x0059, backup[5]); b43legacy_calc_nrssi_slope() 796 b43legacy_phy_write(dev, 0x0058, backup[6]); b43legacy_calc_nrssi_slope() 797 b43legacy_synth_pu_workaround(dev, phy->channel); b43legacy_calc_nrssi_slope() 798 b43legacy_phy_write(dev, 0x0802, b43legacy_calc_nrssi_slope() 799 b43legacy_phy_read(dev, 0x0802) \| 0x0003); b43legacy_calc_nrssi_slope() 800 b43legacy_set_original_gains(dev); b43legacy_calc_nrssi_slope() 801 b43legacy_phy_write(dev, B43legacy_PHY_G_CRS, b43legacy_calc_nrssi_slope() 802 b43legacy_phy_read(dev, B43legacy_PHY_G_CRS) b43legacy_calc_nrssi_slope() 805 b43legacy_phy_write(dev, 0x0801, backup[14]); b43legacy_calc_nrssi_slope() 806 b43legacy_phy_write(dev, 0x0060, backup[15]); b43legacy_calc_nrssi_slope() 807 b43legacy_phy_write(dev, 0x0014, backup[16]); b43legacy_calc_nrssi_slope() 808 b43legacy_phy_write(dev, 0x0478, backup[17]); b43legacy_calc_nrssi_slope() 810 b43legacy_nrssi_mem_update(dev); b43legacy_calc_nrssi_slope() 811 b43legacy_calc_nrssi_threshold(dev); b43legacy_calc_nrssi_slope() 818 void b43legacy_calc_nrssi_threshold(struct b43legacy_wldev dev) b43legacy_calc_nrssi_threshold() argument 820 struct b43legacy_phy phy = &dev->phy; b43legacy_calc_nrssi_threshold() 831 if (!(dev->dev->bus->sprom.boardflags_lo & b43legacy_calc_nrssi_threshold() 843 b43legacy_phy_read(dev, 0x0020); / dummy read / b43legacy_calc_nrssi_threshold() 844 b43legacy_phy_write(dev, 0x0020, (((u16)threshold) << 8) b43legacy_calc_nrssi_threshold() 848 b43legacy_phy_write(dev, 0x0087, 0x0E0D); b43legacy_calc_nrssi_threshold() 849 b43legacy_phy_write(dev, 0x0086, 0x0C0B); b43legacy_calc_nrssi_threshold() 850 b43legacy_phy_write(dev, 0x0085, 0x0A09); b43legacy_calc_nrssi_threshold() 851 b43legacy_phy_write(dev, 0x0084, 0x0808); b43legacy_calc_nrssi_threshold() 852 b43legacy_phy_write(dev, 0x0083, 0x0808); b43legacy_calc_nrssi_threshold() 853 b43legacy_phy_write(dev, 0x0082, 0x0604); b43legacy_calc_nrssi_threshold() 854 b43legacy_phy_write(dev, 0x0081, 0x0302); b43legacy_calc_nrssi_threshold() 855 b43legacy_phy_write(dev, 0x0080, 0x0100); b43legacy_calc_nrssi_threshold() 861 !(dev->dev->bus->sprom.boardflags_lo & b43legacy_calc_nrssi_threshold() 863 tmp16 = b43legacy_nrssi_hw_read(dev, 0x20); b43legacy_calc_nrssi_threshold() 867 b43legacy_phy_write(dev, 0x048A, b43legacy_calc_nrssi_threshold() 868 (b43legacy_phy_read(dev, b43legacy_calc_nrssi_threshold() 871 b43legacy_phy_write(dev, 0x048A, b43legacy_calc_nrssi_threshold() 872 (b43legacy_phy_read(dev, b43legacy_calc_nrssi_threshold() 906 tmp_u16 = b43legacy_phy_read(dev, 0x048A) & 0xF000; b43legacy_calc_nrssi_threshold() 909 b43legacy_phy_write(dev, 0x048A, tmp_u16); b43legacy_calc_nrssi_threshold() 957 b43legacy_phy_read(dev, (offset))); \ 961 b43legacy_phy_write(dev, (offset), \ 968 b43legacy_radio_read16(dev, (offset))); \ 972 b43legacy_radio_write16(dev, (offset), \ 979 b43legacy_ilt_read(dev, (offset))); \ 983 b43legacy_ilt_write(dev, (offset), \ 989 b43legacy_radio_interference_mitigation_enable(struct b43legacy_wldev dev, b43legacy_radio_interference_mitigation_enable() argument 992 struct b43legacy_phy phy = &dev->phy; b43legacy_radio_interference_mitigation_enable() 1002 b43legacy_phy_write(dev, 0x042B, b43legacy_radio_interference_mitigation_enable() 1003 b43legacy_phy_read(dev, 0x042B) b43legacy_radio_interference_mitigation_enable() 1005 b43legacy_phy_write(dev, B43legacy_PHY_G_CRS, b43legacy_radio_interference_mitigation_enable() 1006 b43legacy_phy_read(dev, b43legacy_radio_interference_mitigation_enable() 1011 tmp = (b43legacy_radio_read16(dev, 0x0078) & 0x001E); b43legacy_radio_interference_mitigation_enable() 1019 b43legacy_radio_write16(dev, 0x0078, flipped); b43legacy_radio_interference_mitigation_enable() 1021 b43legacy_calc_nrssi_threshold(dev); b43legacy_radio_interference_mitigation_enable() 1024 b43legacy_phy_write(dev, 0x0406, 0x7E28); b43legacy_radio_interference_mitigation_enable() 1026 b43legacy_phy_write(dev, 0x042B, b43legacy_radio_interference_mitigation_enable() 1027 b43legacy_phy_read(dev, 0x042B) \| 0x0800); b43legacy_radio_interference_mitigation_enable() 1028 b43legacy_phy_write(dev, B43legacy_PHY_RADIO_BITFIELD, b43legacy_radio_interference_mitigation_enable() 1029 b43legacy_phy_read(dev, b43legacy_radio_interference_mitigation_enable() 1033 b43legacy_phy_write(dev, 0x04A0, b43legacy_radio_interference_mitigation_enable() 1034 (b43legacy_phy_read(dev, 0x04A0) & 0xC0C0) b43legacy_radio_interference_mitigation_enable() 1037 b43legacy_phy_write(dev, 0x04A1, b43legacy_radio_interference_mitigation_enable() 1038 (b43legacy_phy_read(dev, 0x04A1) & 0xC0C0) b43legacy_radio_interference_mitigation_enable() 1041 b43legacy_phy_write(dev, 0x04A2, b43legacy_radio_interference_mitigation_enable() 1042 (b43legacy_phy_read(dev, 0x04A2) & 0xC0C0) b43legacy_radio_interference_mitigation_enable() 1045 b43legacy_phy_write(dev, 0x04A8, b43legacy_radio_interference_mitigation_enable() 1046 (b43legacy_phy_read(dev, 0x04A8) & 0xC0C0) b43legacy_radio_interference_mitigation_enable() 1049 b43legacy_phy_write(dev, 0x04AB, b43legacy_radio_interference_mitigation_enable() 1050 (b43legacy_phy_read(dev, 0x04AB) & 0xC0C0) b43legacy_radio_interference_mitigation_enable() 1054 b43legacy_phy_write(dev, 0x04A7, 0x0002); b43legacy_radio_interference_mitigation_enable() 1056 b43legacy_phy_write(dev, 0x04A3, 0x287A); b43legacy_radio_interference_mitigation_enable() 1058 b43legacy_phy_write(dev, 0x04A9, 0x2027); b43legacy_radio_interference_mitigation_enable() 1060 b43legacy_phy_write(dev, 0x0493, 0x32F5); b43legacy_radio_interference_mitigation_enable() 1062 b43legacy_phy_write(dev, 0x04AA, 0x2027); b43legacy_radio_interference_mitigation_enable() 1064 b43legacy_phy_write(dev, 0x04AC, 0x32F5); b43legacy_radio_interference_mitigation_enable() 1067 if (b43legacy_phy_read(dev, 0x0033) & 0x0800) b43legacy_radio_interference_mitigation_enable() 1107 b43legacy_phy_write(dev, B43legacy_PHY_RADIO_BITFIELD, b43legacy_radio_interference_mitigation_enable() 1108 b43legacy_phy_read(dev, b43legacy_radio_interference_mitigation_enable() 1110 b43legacy_phy_write(dev, B43legacy_PHY_G_CRS, b43legacy_radio_interference_mitigation_enable() 1111 (b43legacy_phy_read(dev, b43legacy_radio_interference_mitigation_enable() 1115 b43legacy_phy_write(dev, 0x0033, 0x0800); b43legacy_radio_interference_mitigation_enable() 1116 b43legacy_phy_write(dev, 0x04A3, 0x2027); b43legacy_radio_interference_mitigation_enable() 1117 b43legacy_phy_write(dev, 0x04A9, 0x1CA8); b43legacy_radio_interference_mitigation_enable() 1118 b43legacy_phy_write(dev, 0x0493, 0x287A); b43legacy_radio_interference_mitigation_enable() 1119 b43legacy_phy_write(dev, 0x04AA, 0x1CA8); b43legacy_radio_interference_mitigation_enable() 1120 b43legacy_phy_write(dev, 0x04AC, 0x287A); b43legacy_radio_interference_mitigation_enable() 1122 b43legacy_phy_write(dev, 0x04A0, b43legacy_radio_interference_mitigation_enable() 1123 (b43legacy_phy_read(dev, 0x04A0) b43legacy_radio_interference_mitigation_enable() 1125 b43legacy_phy_write(dev, 0x04A7, 0x000D); b43legacy_radio_interference_mitigation_enable() 1128 b43legacy_phy_write(dev, 0x0406, 0xFF0D); b43legacy_radio_interference_mitigation_enable() 1130 b43legacy_phy_write(dev, 0x04C0, 0xFFFF); b43legacy_radio_interference_mitigation_enable() 1131 b43legacy_phy_write(dev, 0x04C1, 0x00A9); b43legacy_radio_interference_mitigation_enable() 1133 b43legacy_phy_write(dev, 0x04C0, 0x00C1); b43legacy_radio_interference_mitigation_enable() 1134 b43legacy_phy_write(dev, 0x04C1, 0x0059); b43legacy_radio_interference_mitigation_enable() 1137 b43legacy_phy_write(dev, 0x04A1, b43legacy_radio_interference_mitigation_enable() 1138 (b43legacy_phy_read(dev, 0x04A1) b43legacy_radio_interference_mitigation_enable() 1140 b43legacy_phy_write(dev, 0x04A1, b43legacy_radio_interference_mitigation_enable() 1141 (b43legacy_phy_read(dev, 0x04A1) b43legacy_radio_interference_mitigation_enable() 1143 b43legacy_phy_write(dev, 0x04A8, b43legacy_radio_interference_mitigation_enable() 1144 (b43legacy_phy_read(dev, 0x04A8) b43legacy_radio_interference_mitigation_enable() 1146 b43legacy_phy_write(dev, 0x04A8, b43legacy_radio_interference_mitigation_enable() 1147 (b43legacy_phy_read(dev, 0x04A8) b43legacy_radio_interference_mitigation_enable() 1149 b43legacy_phy_write(dev, 0x04AB, b43legacy_radio_interference_mitigation_enable() 1150 (b43legacy_phy_read(dev, 0x04AB) b43legacy_radio_interference_mitigation_enable() 1152 b43legacy_phy_write(dev, 0x04AB, b43legacy_radio_interference_mitigation_enable() 1153 (b43legacy_phy_read(dev, 0x04AB) b43legacy_radio_interference_mitigation_enable() 1155 b43legacy_phy_write(dev, 0x04AB, b43legacy_radio_interference_mitigation_enable() 1156 (b43legacy_phy_read(dev, 0x04AB) b43legacy_radio_interference_mitigation_enable() 1158 b43legacy_phy_write(dev, 0x04AB, b43legacy_radio_interference_mitigation_enable() 1159 (b43legacy_phy_read(dev, 0x04AB) b43legacy_radio_interference_mitigation_enable() 1161 b43legacy_phy_write(dev, 0x04A8, b43legacy_radio_interference_mitigation_enable() 1162 (b43legacy_phy_read(dev, 0x04A8) b43legacy_radio_interference_mitigation_enable() 1164 b43legacy_phy_write(dev, 0x04A8, b43legacy_radio_interference_mitigation_enable() 1165 (b43legacy_phy_read(dev, 0x04A8) b43legacy_radio_interference_mitigation_enable() 1167 b43legacy_phy_write(dev, 0x04A2, b43legacy_radio_interference_mitigation_enable() 1168 (b43legacy_phy_read(dev, 0x04A2) b43legacy_radio_interference_mitigation_enable() 1170 b43legacy_phy_write(dev, 0x04A0, b43legacy_radio_interference_mitigation_enable() 1171 (b43legacy_phy_read(dev, 0x04A0) b43legacy_radio_interference_mitigation_enable() 1173 b43legacy_phy_write(dev, 0x04A2, b43legacy_radio_interference_mitigation_enable() 1174 (b43legacy_phy_read(dev, 0x04A2) b43legacy_radio_interference_mitigation_enable() 1178 b43legacy_phy_write(dev, 0x048A, b43legacy_radio_interference_mitigation_enable() 1179 b43legacy_phy_read(dev, 0x048A) b43legacy_radio_interference_mitigation_enable() 1181 b43legacy_phy_write(dev, 0x0415, b43legacy_radio_interference_mitigation_enable() 1182 (b43legacy_phy_read(dev, 0x0415) b43legacy_radio_interference_mitigation_enable() 1184 b43legacy_phy_write(dev, 0x0416, b43legacy_radio_interference_mitigation_enable() 1185 (b43legacy_phy_read(dev, 0x0416) b43legacy_radio_interference_mitigation_enable() 1187 b43legacy_phy_write(dev, 0x0417, b43legacy_radio_interference_mitigation_enable() 1188 (b43legacy_phy_read(dev, 0x0417) b43legacy_radio_interference_mitigation_enable() 1191 b43legacy_phy_write(dev, 0x048A, b43legacy_radio_interference_mitigation_enable() 1192 b43legacy_phy_read(dev, 0x048A) b43legacy_radio_interference_mitigation_enable() 1194 b43legacy_phy_write(dev, 0x048A, b43legacy_radio_interference_mitigation_enable() 1195 (b43legacy_phy_read(dev, 0x048A) b43legacy_radio_interference_mitigation_enable() 1197 tmp32 = b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, b43legacy_radio_interference_mitigation_enable() 1201 b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, b43legacy_radio_interference_mitigation_enable() 1207 b43legacy_phy_write(dev, 0x042B, b43legacy_radio_interference_mitigation_enable() 1208 b43legacy_phy_read(dev, 0x042B) b43legacy_radio_interference_mitigation_enable() 1210 b43legacy_phy_write(dev, 0x048C, b43legacy_radio_interference_mitigation_enable() 1211 (b43legacy_phy_read(dev, 0x048C) b43legacy_radio_interference_mitigation_enable() 1214 b43legacy_phy_write(dev, 0x04AE, b43legacy_radio_interference_mitigation_enable() 1215 (b43legacy_phy_read(dev, 0x04AE) b43legacy_radio_interference_mitigation_enable() 1217 b43legacy_phy_write(dev, 0x04AD, b43legacy_radio_interference_mitigation_enable() 1218 (b43legacy_phy_read(dev, 0x04AD) b43legacy_radio_interference_mitigation_enable() 1221 b43legacy_ilt_write(dev, 0x1A00 + 0x3, 0x007F); b43legacy_radio_interference_mitigation_enable() 1222 b43legacy_ilt_write(dev, 0x1A00 + 0x2, 0x007F); b43legacy_radio_interference_mitigation_enable() 1223 b43legacy_phy_write(dev, 0x04AD, b43legacy_radio_interference_mitigation_enable() 1224 b43legacy_phy_read(dev, 0x04AD) b43legacy_radio_interference_mitigation_enable() 1227 b43legacy_calc_nrssi_slope(dev); b43legacy_radio_interference_mitigation_enable() 1235 b43legacy_radio_interference_mitigation_disable(struct b43legacy_wldev dev, b43legacy_radio_interference_mitigation_disable() argument 1238 struct b43legacy_phy phy = &dev->phy; b43legacy_radio_interference_mitigation_disable() 1245 b43legacy_phy_write(dev, 0x042B, b43legacy_radio_interference_mitigation_disable() 1246 b43legacy_phy_read(dev, 0x042B) b43legacy_radio_interference_mitigation_disable() 1248 b43legacy_phy_write(dev, B43legacy_PHY_G_CRS, b43legacy_radio_interference_mitigation_disable() 1249 b43legacy_phy_read(dev, b43legacy_radio_interference_mitigation_disable() 1254 b43legacy_calc_nrssi_threshold(dev); b43legacy_radio_interference_mitigation_disable() 1256 b43legacy_phy_write(dev, 0x042B, b43legacy_radio_interference_mitigation_disable() 1257 b43legacy_phy_read(dev, 0x042B) & ~0x0800); b43legacy_radio_interference_mitigation_disable() 1258 if (!dev->bad_frames_preempt) b43legacy_radio_interference_mitigation_disable() 1259 b43legacy_phy_write(dev, B43legacy_PHY_RADIO_BITFIELD, b43legacy_radio_interference_mitigation_disable() 1260 b43legacy_phy_read(dev, b43legacy_radio_interference_mitigation_disable() 1263 b43legacy_phy_write(dev, B43legacy_PHY_G_CRS, b43legacy_radio_interference_mitigation_disable() 1264 b43legacy_phy_read(dev, B43legacy_PHY_G_CRS) b43legacy_radio_interference_mitigation_disable() 1279 if (!(b43legacy_phy_read(dev, 0x0033) & 0x0800)) b43legacy_radio_interference_mitigation_disable() 1317 tmp32 = b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, b43legacy_radio_interference_mitigation_disable() 1321 b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, b43legacy_radio_interference_mitigation_disable() 1325 b43legacy_calc_nrssi_slope(dev); b43legacy_radio_interference_mitigation_disable() 1339 int b43legacy_radio_set_interference_mitigation(struct b43legacy_wldev dev, b43legacy_radio_set_interference_mitigation() argument 1342 struct b43legacy_phy phy = &dev->phy; b43legacy_radio_set_interference_mitigation() 1370 b43legacy_radio_interference_mitigation_disable(dev, b43legacy_radio_set_interference_mitigation() 1377 b43legacy_radio_interference_mitigation_enable(dev, mode); b43legacy_radio_set_interference_mitigation() 1383 u16 b43legacy_radio_calibrationvalue(struct b43legacy_wldev dev) b43legacy_radio_calibrationvalue() argument 1389 reg = b43legacy_radio_read16(dev, 0x0060); b43legacy_radio_calibrationvalue() 1399 static u16 b43legacy_get_812_value(struct b43legacy_wldev dev, u8 lpd) b43legacy_get_812_value() argument 1401 struct b43legacy_phy phy = &dev->phy; b43legacy_get_812_value() 1410 if (phy->rev < 7 \|\| !(dev->dev->bus->sprom.boardflags_lo b43legacy_get_812_value() 1463 if (phy->rev >= 7 && dev->dev->bus->sprom.boardflags_lo b43legacy_get_812_value() 1496 u16 b43legacy_radio_init2050(struct b43legacy_wldev dev) b43legacy_radio_init2050() argument 1498 struct b43legacy_phy phy = &dev->phy; b43legacy_radio_init2050() 1506 backup[0] = b43legacy_radio_read16(dev, 0x0043); b43legacy_radio_init2050() 1507 backup[14] = b43legacy_radio_read16(dev, 0x0051); b43legacy_radio_init2050() 1508 backup[15] = b43legacy_radio_read16(dev, 0x0052); b43legacy_radio_init2050() 1509 backup[1] = b43legacy_phy_read(dev, 0x0015); b43legacy_radio_init2050() 1510 backup[16] = b43legacy_phy_read(dev, 0x005A); b43legacy_radio_init2050() 1511 backup[17] = b43legacy_phy_read(dev, 0x0059); b43legacy_radio_init2050() 1512 backup[18] = b43legacy_phy_read(dev, 0x0058); b43legacy_radio_init2050() 1514 backup[2] = b43legacy_phy_read(dev, 0x0030); b43legacy_radio_init2050() 1515 backup[3] = b43legacy_read16(dev, 0x03EC); b43legacy_radio_init2050() 1516 b43legacy_phy_write(dev, 0x0030, 0x00FF); b43legacy_radio_init2050() 1517 b43legacy_write16(dev, 0x03EC, 0x3F3F); b43legacy_radio_init2050() 1520 backup[4] = b43legacy_phy_read(dev, 0x0811); b43legacy_radio_init2050() 1521 backup[5] = b43legacy_phy_read(dev, 0x0812); b43legacy_radio_init2050() 1522 backup[6] = b43legacy_phy_read(dev, 0x0814); b43legacy_radio_init2050() 1523 backup[7] = b43legacy_phy_read(dev, 0x0815); b43legacy_radio_init2050() 1524 backup[8] = b43legacy_phy_read(dev, b43legacy_radio_init2050() 1526 backup[9] = b43legacy_phy_read(dev, 0x0802); b43legacy_radio_init2050() 1527 b43legacy_phy_write(dev, 0x0814, b43legacy_radio_init2050() 1528 (b43legacy_phy_read(dev, 0x0814) b43legacy_radio_init2050() 1530 b43legacy_phy_write(dev, 0x0815, b43legacy_radio_init2050() 1531 (b43legacy_phy_read(dev, 0x0815) b43legacy_radio_init2050() 1533 b43legacy_phy_write(dev, B43legacy_PHY_G_CRS, b43legacy_radio_init2050() 1534 (b43legacy_phy_read(dev, b43legacy_radio_init2050() 1536 b43legacy_phy_write(dev, 0x0802, b43legacy_radio_init2050() 1537 (b43legacy_phy_read(dev, 0x0802) b43legacy_radio_init2050() 1540 backup[19] = b43legacy_phy_read(dev, 0x080F); b43legacy_radio_init2050() 1541 backup[20] = b43legacy_phy_read(dev, 0x0810); b43legacy_radio_init2050() 1543 b43legacy_phy_write(dev, 0x080F, b43legacy_radio_init2050() 1546 b43legacy_phy_write(dev, 0x080F, b43legacy_radio_init2050() 1548 b43legacy_phy_write(dev, 0x0810, 0x0000); b43legacy_radio_init2050() 1550 b43legacy_phy_write(dev, 0x0812, b43legacy_radio_init2050() 1551 b43legacy_get_812_value(dev, b43legacy_radio_init2050() 1554 !(dev->dev->bus->sprom.boardflags_lo b43legacy_radio_init2050() 1556 b43legacy_phy_write(dev, 0x0811, 0x01B3); b43legacy_radio_init2050() 1558 b43legacy_phy_write(dev, 0x0811, 0x09B3); b43legacy_radio_init2050() 1561 b43legacy_write16(dev, B43legacy_MMIO_PHY_RADIO, b43legacy_radio_init2050() 1562 (b43legacy_read16(dev, B43legacy_MMIO_PHY_RADIO) b43legacy_radio_init2050() 1564 backup[10] = b43legacy_phy_read(dev, 0x0035); b43legacy_radio_init2050() 1565 b43legacy_phy_write(dev, 0x0035, b43legacy_radio_init2050() 1566 (b43legacy_phy_read(dev, 0x0035) & 0xFF7F)); b43legacy_radio_init2050() 1567 backup[11] = b43legacy_read16(dev, 0x03E6); b43legacy_radio_init2050() 1568 backup[12] = b43legacy_read16(dev, B43legacy_MMIO_CHANNEL_EXT); b43legacy_radio_init2050() 1572 b43legacy_write16(dev, 0x03E6, 0x0122); b43legacy_radio_init2050() 1575 b43legacy_phy_write(dev, 0x0003, b43legacy_radio_init2050() 1576 (b43legacy_phy_read(dev, 0x0003) b43legacy_radio_init2050() 1578 b43legacy_write16(dev, B43legacy_MMIO_CHANNEL_EXT, b43legacy_radio_init2050() 1579 (b43legacy_read16(dev, b43legacy_radio_init2050() 1583 ret = b43legacy_radio_calibrationvalue(dev); b43legacy_radio_init2050() 1586 b43legacy_radio_write16(dev, 0x0078, 0x0026); b43legacy_radio_init2050() 1589 b43legacy_phy_write(dev, 0x0812, b43legacy_radio_init2050() 1590 b43legacy_get_812_value(dev, b43legacy_radio_init2050() 1592 b43legacy_phy_write(dev, 0x0015, 0xBFAF); b43legacy_radio_init2050() 1593 b43legacy_phy_write(dev, 0x002B, 0x1403); b43legacy_radio_init2050() 1595 b43legacy_phy_write(dev, 0x0812, b43legacy_radio_init2050() 1596 b43legacy_get_812_value(dev, b43legacy_radio_init2050() 1598 b43legacy_phy_write(dev, 0x0015, 0xBFA0); b43legacy_radio_init2050() 1599 b43legacy_radio_write16(dev, 0x0051, b43legacy_radio_init2050() 1600 (b43legacy_radio_read16(dev, 0x0051) b43legacy_radio_init2050() 1603 b43legacy_radio_write16(dev, 0x0043, 0x001F); b43legacy_radio_init2050() 1605 b43legacy_radio_write16(dev, 0x0052, 0x0000); b43legacy_radio_init2050() 1606 b43legacy_radio_write16(dev, 0x0043, b43legacy_radio_init2050() 1607 (b43legacy_radio_read16(dev, 0x0043) b43legacy_radio_init2050() 1610 b43legacy_phy_write(dev, 0x0058, 0x0000); b43legacy_radio_init2050() 1613 b43legacy_phy_write(dev, 0x005A, 0x0480); b43legacy_radio_init2050() 1614 b43legacy_phy_write(dev, 0x0059, 0xC810); b43legacy_radio_init2050() 1615 b43legacy_phy_write(dev, 0x0058, 0x000D); b43legacy_radio_init2050() 1617 b43legacy_phy_write(dev, 0x0812, b43legacy_radio_init2050() 1618 b43legacy_get_812_value(dev, b43legacy_radio_init2050() 1620 b43legacy_phy_write(dev, 0x0015, 0xAFB0); b43legacy_radio_init2050() 1623 b43legacy_phy_write(dev, 0x0812, b43legacy_radio_init2050() 1624 b43legacy_get_812_value(dev, b43legacy_radio_init2050() 1626 b43legacy_phy_write(dev, 0x0015, 0xEFB0); b43legacy_radio_init2050() 1629 b43legacy_phy_write(dev, 0x0812, b43legacy_radio_init2050() 1630 b43legacy_get_812_value(dev, b43legacy_radio_init2050() 1632 b43legacy_phy_write(dev, 0x0015, 0xFFF0); b43legacy_radio_init2050() 1634 tmp1 += b43legacy_phy_read(dev, 0x002D); b43legacy_radio_init2050() 1635 b43legacy_phy_write(dev, 0x0058, 0x0000); b43legacy_radio_init2050() 1637 b43legacy_phy_write(dev, 0x0812, b43legacy_radio_init2050() 1638 b43legacy_get_812_value(dev, b43legacy_radio_init2050() 1640 b43legacy_phy_write(dev, 0x0015, 0xAFB0); b43legacy_radio_init2050() 1646 b43legacy_phy_write(dev, 0x0058, 0x0000); b43legacy_radio_init2050() 1649 b43legacy_radio_write16(dev, 0x0078, (flip_4bit(i) << 1) b43legacy_radio_init2050() 1651 backup[13] = b43legacy_radio_read16(dev, 0x0078); b43legacy_radio_init2050() 1654 b43legacy_phy_write(dev, 0x005A, 0x0D80); b43legacy_radio_init2050() 1655 b43legacy_phy_write(dev, 0x0059, 0xC810); b43legacy_radio_init2050() 1656 b43legacy_phy_write(dev, 0x0058, 0x000D); b43legacy_radio_init2050() 1658 b43legacy_phy_write(dev, 0x0812, b43legacy_radio_init2050() 1659 b43legacy_get_812_value(dev, b43legacy_radio_init2050() 1661 b43legacy_phy_write(dev, 0x0015, 0xAFB0); b43legacy_radio_init2050() 1664 b43legacy_phy_write(dev, 0x0812, b43legacy_radio_init2050() 1665 b43legacy_get_812_value(dev, b43legacy_radio_init2050() 1667 b43legacy_phy_write(dev, 0x0015, 0xEFB0); b43legacy_radio_init2050() 1670 b43legacy_phy_write(dev, 0x0812, b43legacy_radio_init2050() 1671 b43legacy_get_812_value(dev, b43legacy_radio_init2050() 1673 b43legacy_phy_write(dev, 0x0015, 0xFFF0); b43legacy_radio_init2050() 1675 tmp2 += b43legacy_phy_read(dev, 0x002D); b43legacy_radio_init2050() 1676 b43legacy_phy_write(dev, 0x0058, 0x0000); b43legacy_radio_init2050() 1678 b43legacy_phy_write(dev, 0x0812, b43legacy_radio_init2050() 1679 b43legacy_get_812_value(dev, b43legacy_radio_init2050() 1681 b43legacy_phy_write(dev, 0x0015, 0xAFB0); b43legacy_radio_init2050() 1690 b43legacy_phy_write(dev, 0x0015, backup[1]); b43legacy_radio_init2050() 1691 b43legacy_radio_write16(dev, 0x0051, backup[14]); b43legacy_radio_init2050() 1692 b43legacy_radio_write16(dev, 0x0052, backup[15]); b43legacy_radio_init2050() 1693 b43legacy_radio_write16(dev, 0x0043, backup[0]); b43legacy_radio_init2050() 1694 b43legacy_phy_write(dev, 0x005A, backup[16]); b43legacy_radio_init2050() 1695 b43legacy_phy_write(dev, 0x0059, backup[17]); b43legacy_radio_init2050() 1696 b43legacy_phy_write(dev, 0x0058, backup[18]); b43legacy_radio_init2050() 1697 b43legacy_write16(dev, 0x03E6, backup[11]); b43legacy_radio_init2050() 1699 b43legacy_write16(dev, B43legacy_MMIO_CHANNEL_EXT, backup[12]); b43legacy_radio_init2050() 1700 b43legacy_phy_write(dev, 0x0035, backup[10]); b43legacy_radio_init2050() 1701 b43legacy_radio_selectchannel(dev, phy->channel, 1); b43legacy_radio_init2050() 1703 b43legacy_phy_write(dev, 0x0030, backup[2]); b43legacy_radio_init2050() 1704 b43legacy_write16(dev, 0x03EC, backup[3]); b43legacy_radio_init2050() 1707 b43legacy_write16(dev, B43legacy_MMIO_PHY_RADIO, b43legacy_radio_init2050() 1708 (b43legacy_read16(dev, b43legacy_radio_init2050() 1710 b43legacy_phy_write(dev, 0x0811, backup[4]); b43legacy_radio_init2050() 1711 b43legacy_phy_write(dev, 0x0812, backup[5]); b43legacy_radio_init2050() 1712 b43legacy_phy_write(dev, 0x0814, backup[6]); b43legacy_radio_init2050() 1713 b43legacy_phy_write(dev, 0x0815, backup[7]); b43legacy_radio_init2050() 1714 b43legacy_phy_write(dev, B43legacy_PHY_G_CRS, b43legacy_radio_init2050() 1716 b43legacy_phy_write(dev, 0x0802, backup[9]); b43legacy_radio_init2050() 1718 b43legacy_phy_write(dev, 0x080F, backup[19]); b43legacy_radio_init2050() 1719 b43legacy_phy_write(dev, 0x0810, backup[20]); b43legacy_radio_init2050() 1746 int b43legacy_radio_selectchannel(struct b43legacy_wldev dev, b43legacy_radio_selectchannel() argument 1750 struct b43legacy_phy phy = &dev->phy; b43legacy_radio_selectchannel() 1765 b43legacy_synth_pu_workaround(dev, channel); b43legacy_radio_selectchannel() 1767 b43legacy_write16(dev, B43legacy_MMIO_CHANNEL, b43legacy_radio_selectchannel() 1771 if (dev->dev->bus->sprom.country_code == 5) /* JAPAN) / b43legacy_radio_selectchannel() 1772 b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, b43legacy_radio_selectchannel() 1774 b43legacy_shm_read32(dev, b43legacy_radio_selectchannel() 1779 b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, b43legacy_radio_selectchannel() 1781 b43legacy_shm_read32(dev, b43legacy_radio_selectchannel() 1785 b43legacy_write16(dev, B43legacy_MMIO_CHANNEL_EXT, b43legacy_radio_selectchannel() 1786 b43legacy_read16(dev, b43legacy_radio_selectchannel() 1789 b43legacy_write16(dev, B43legacy_MMIO_CHANNEL_EXT, b43legacy_radio_selectchannel() 1790 b43legacy_read16(dev, b43legacy_radio_selectchannel() 1801 void b43legacy_radio_set_txantenna(struct b43legacy_wldev dev, u32 val) b43legacy_radio_set_txantenna() argument 1806 tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 0x0022) & 0xFCFF; b43legacy_radio_set_txantenna() 1807 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0022, tmp \| val); b43legacy_radio_set_txantenna() 1808 tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 0x03A8) & 0xFCFF; b43legacy_radio_set_txantenna() 1809 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x03A8, tmp \| val); b43legacy_radio_set_txantenna() 1810 tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 0x0054) & 0xFCFF; b43legacy_radio_set_txantenna() 1811 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0054, tmp \| val); b43legacy_radio_set_txantenna() 1881 void b43legacy_radio_set_txpower_a(struct b43legacy_wldev dev, u16 txpower) b43legacy_radio_set_txpower_a() argument 1883 struct b43legacy_phy phy = &dev->phy; b43legacy_radio_set_txpower_a() 1894 b43legacy_phy_write(dev, 0x0019, pamp); b43legacy_radio_set_txpower_a() 1898 b43legacy_phy_write(dev, 0x0017, base \| 0x0020); b43legacy_radio_set_txpower_a() 1900 ilt = b43legacy_ilt_read(dev, 0x3001); b43legacy_radio_set_txpower_a() 1907 b43legacy_ilt_write(dev, 0x3001, dac); b43legacy_radio_set_txpower_a() 1914 void b43legacy_radio_set_txpower_bg(struct b43legacy_wldev dev, b43legacy_radio_set_txpower_bg() argument 1919 struct b43legacy_phy phy = &dev->phy; b43legacy_radio_set_txpower_bg() 1938 b43legacy_phy_set_baseband_attenuation(dev, baseband_attenuation); b43legacy_radio_set_txpower_bg() 1939 b43legacy_radio_write16(dev, 0x0043, radio_attenuation); b43legacy_radio_set_txpower_bg() 1940 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0064, b43legacy_radio_set_txpower_bg() 1943 b43legacy_radio_write16(dev, 0x0052, b43legacy_radio_set_txpower_bg() 1944 (b43legacy_radio_read16(dev, 0x0052) b43legacy_radio_set_txpower_bg() 1948 b43legacy_phy_lo_adjust(dev, 0); b43legacy_radio_set_txpower_bg() 1951 u16 b43legacy_default_baseband_attenuation(struct b43legacy_wldev dev) b43legacy_default_baseband_attenuation() argument 1953 struct b43legacy_phy phy = &dev->phy; b43legacy_default_baseband_attenuation() 1960 u16 b43legacy_default_radio_attenuation(struct b43legacy_wldev dev) b43legacy_default_radio_attenuation() argument 1962 struct b43legacy_phy phy = &dev->phy; b43legacy_default_radio_attenuation() 1980 if (is_bcm_board_vendor(dev) && b43legacy_default_radio_attenuation() 1981 dev->dev->bus->boardinfo.type == 0x421 && b43legacy_default_radio_attenuation() 1982 dev->dev->bus->sprom.board_rev >= 30) b43legacy_default_radio_attenuation() 1984 else if (is_bcm_board_vendor(dev) && b43legacy_default_radio_attenuation() 1985 dev->dev->bus->boardinfo.type == 0x416) b43legacy_default_radio_attenuation() 1990 if (is_bcm_board_vendor(dev) && b43legacy_default_radio_attenuation() 1991 dev->dev->bus->boardinfo.type == 0x421 && b43legacy_default_radio_attenuation() 1992 dev->dev->bus->sprom.board_rev >= 30) b43legacy_default_radio_attenuation() 2000 if (is_bcm_board_vendor(dev) && b43legacy_default_radio_attenuation() 2001 dev->dev->bus->boardinfo.type == 0x421 && b43legacy_default_radio_attenuation() 2002 dev->dev->bus->sprom.board_rev >= 30) b43legacy_default_radio_attenuation() 2004 else if (is_bcm_board_vendor(dev) && b43legacy_default_radio_attenuation() 2005 dev->dev->bus->boardinfo.type == b43legacy_default_radio_attenuation() 2008 else if (dev->dev->bus->chip_id == 0x4320) b43legacy_default_radio_attenuation() 2034 if (is_bcm_board_vendor(dev) && b43legacy_default_radio_attenuation() 2035 dev->dev->bus->boardinfo.type == 0x421) { b43legacy_default_radio_attenuation() 2036 if (dev->dev->bus->sprom.board_rev < 0x43) b43legacy_default_radio_attenuation() 2038 else if (dev->dev->bus->sprom.board_rev < 0x51) b43legacy_default_radio_attenuation() 2047 u16 b43legacy_default_txctl1(struct b43legacy_wldev dev) b43legacy_default_txctl1() argument 2049 struct b43legacy_phy phy = &dev->phy; b43legacy_default_txctl1() 2062 void b43legacy_radio_turn_on(struct b43legacy_wldev dev) b43legacy_radio_turn_on() argument 2064 struct b43legacy_phy phy = &dev->phy; b43legacy_radio_turn_on() 2076 b43legacy_phy_write(dev, 0x0015, 0x8000); b43legacy_radio_turn_on() 2077 b43legacy_phy_write(dev, 0x0015, 0xCC00); b43legacy_radio_turn_on() 2078 b43legacy_phy_write(dev, 0x0015, b43legacy_radio_turn_on() 2082 b43legacy_phy_write(dev, B43legacy_PHY_RFOVER, b43legacy_radio_turn_on() 2084 b43legacy_phy_write(dev, B43legacy_PHY_RFOVERVAL, b43legacy_radio_turn_on() 2089 err = b43legacy_radio_selectchannel(dev, b43legacy_radio_turn_on() 2091 err \|= b43legacy_radio_selectchannel(dev, channel, 0); b43legacy_radio_turn_on() 2100 void b43legacy_radio_turn_off(struct b43legacy_wldev dev, bool force) b43legacy_radio_turn_off() argument 2102 struct b43legacy_phy phy = &dev->phy; b43legacy_radio_turn_off() 2107 if (phy->type == B43legacy_PHYTYPE_G && dev->dev->id.revision >= 5) { b43legacy_radio_turn_off() 2110 rfover = b43legacy_phy_read(dev, B43legacy_PHY_RFOVER); b43legacy_radio_turn_off() 2111 rfoverval = b43legacy_phy_read(dev, B43legacy_PHY_RFOVERVAL); b43legacy_radio_turn_off() 2117 b43legacy_phy_write(dev, B43legacy_PHY_RFOVER, rfover \| 0x008C); b43legacy_radio_turn_off() 2118 b43legacy_phy_write(dev, B43legacy_PHY_RFOVERVAL, b43legacy_radio_turn_off() 2121 b43legacy_phy_write(dev, 0x0015, 0xAA00); b43legacy_radio_turn_off() 2123 b43legacydbg(dev->wl, "Radio initialized\n"); b43legacy_radio_turn_off() 2126 void b43legacy_radio_clear_tssi(struct b43legacy_wldev dev) b43legacy_radio_clear_tssi() argument 2128 struct b43legacy_phy phy = &dev->phy; b43legacy_radio_clear_tssi() 2133 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0058, b43legacy_radio_clear_tssi() 2135 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x005a, b43legacy_radio_clear_tssi() 2137 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0070, b43legacy_radio_clear_tssi() 2139 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0072, b43legacy_radio_clear_tssi()
H A D	phy.c	83 static void b43legacy_phy_initg(struct b43legacy_wldev dev); 98 void b43legacy_phy_lock(struct b43legacy_wldev dev) b43legacy_phy_lock() argument 101 B43legacy_WARN_ON(dev->phy.phy_locked); b43legacy_phy_lock() 102 dev->phy.phy_locked = 1; b43legacy_phy_lock() 105 if (dev->dev->id.revision < 3) { b43legacy_phy_lock() 106 b43legacy_mac_suspend(dev); b43legacy_phy_lock() 108 if (!b43legacy_is_mode(dev->wl, NL80211_IFTYPE_AP)) b43legacy_phy_lock() 109 b43legacy_power_saving_ctl_bits(dev, -1, 1); b43legacy_phy_lock() 113 void b43legacy_phy_unlock(struct b43legacy_wldev dev) b43legacy_phy_unlock() argument 116 B43legacy_WARN_ON(!dev->phy.phy_locked); b43legacy_phy_unlock() 117 dev->phy.phy_locked = 0; b43legacy_phy_unlock() 120 if (dev->dev->id.revision < 3) { b43legacy_phy_unlock() 121 b43legacy_mac_enable(dev); b43legacy_phy_unlock() 123 if (!b43legacy_is_mode(dev->wl, NL80211_IFTYPE_AP)) b43legacy_phy_unlock() 124 b43legacy_power_saving_ctl_bits(dev, -1, -1); b43legacy_phy_unlock() 128 u16 b43legacy_phy_read(struct b43legacy_wldev dev, u16 offset) b43legacy_phy_read() argument 130 b43legacy_write16(dev, B43legacy_MMIO_PHY_CONTROL, offset); b43legacy_phy_read() 131 return b43legacy_read16(dev, B43legacy_MMIO_PHY_DATA); b43legacy_phy_read() 134 void b43legacy_phy_write(struct b43legacy_wldev dev, u16 offset, u16 val) b43legacy_phy_write() argument 136 b43legacy_write16(dev, B43legacy_MMIO_PHY_CONTROL, offset); b43legacy_phy_write() 138 b43legacy_write16(dev, B43legacy_MMIO_PHY_DATA, val); b43legacy_phy_write() 141 void b43legacy_phy_calibrate(struct b43legacy_wldev dev) b43legacy_phy_calibrate() argument 143 struct b43legacy_phy phy = &dev->phy; b43legacy_phy_calibrate() 145 b43legacy_read32(dev, B43legacy_MMIO_MACCTL); / Dummy read. / b43legacy_phy_calibrate() 149 b43legacy_wireless_core_reset(dev, 0); b43legacy_phy_calibrate() 150 b43legacy_phy_initg(dev); b43legacy_phy_calibrate() 151 b43legacy_wireless_core_reset(dev, B43legacy_TMSLOW_GMODE); b43legacy_phy_calibrate() 159 static void b43legacy_phy_init_pctl(struct b43legacy_wldev dev) b43legacy_phy_init_pctl() argument 161 struct b43legacy_phy phy = &dev->phy; b43legacy_phy_init_pctl() 169 if (is_bcm_board_vendor(dev) && b43legacy_phy_init_pctl() 170 (dev->dev->bus->boardinfo.type == 0x0416)) b43legacy_phy_init_pctl() 173 b43legacy_phy_write(dev, 0x0028, 0x8018); b43legacy_phy_init_pctl() 174 b43legacy_write16(dev, 0x03E6, b43legacy_read16(dev, 0x03E6) & 0xFFDF); b43legacy_phy_init_pctl() 179 b43legacy_phy_write(dev, 0x047A, 0xC111); b43legacy_phy_init_pctl() 191 b43legacy_radio_write16(dev, 0x0076, b43legacy_phy_init_pctl() 192 b43legacy_radio_read16(dev, 0x0076) b43legacy_phy_init_pctl() 200 b43legacy_radio_set_txpower_bg(dev, 0xB, 0x1F, 0); b43legacy_phy_init_pctl() 202 b43legacy_radio_set_txpower_bg(dev, 0xB, 9, 0); b43legacy_phy_init_pctl() 205 b43legacy_dummy_transmission(dev); b43legacy_phy_init_pctl() 207 phy->savedpctlreg = b43legacy_phy_read(dev, B43legacy_PHY_G_PCTL); b43legacy_phy_init_pctl() 210 b43legacy_radio_set_txpower_bg(dev, saved_batt, saved_ratt, b43legacy_phy_init_pctl() 213 b43legacy_radio_write16(dev, 0x0076, b43legacy_radio_read16(dev, b43legacy_phy_init_pctl() 215 b43legacy_radio_clear_tssi(dev); b43legacy_phy_init_pctl() 218 static void b43legacy_phy_agcsetup(struct b43legacy_wldev dev) b43legacy_phy_agcsetup() argument 220 struct b43legacy_phy phy = &dev->phy; b43legacy_phy_agcsetup() 226 b43legacy_ilt_write(dev, offset, 0x00FE); b43legacy_phy_agcsetup() 227 b43legacy_ilt_write(dev, offset + 1, 0x000D); b43legacy_phy_agcsetup() 228 b43legacy_ilt_write(dev, offset + 2, 0x0013); b43legacy_phy_agcsetup() 229 b43legacy_ilt_write(dev, offset + 3, 0x0019); b43legacy_phy_agcsetup() 232 b43legacy_ilt_write(dev, 0x1800, 0x2710); b43legacy_phy_agcsetup() 233 b43legacy_ilt_write(dev, 0x1801, 0x9B83); b43legacy_phy_agcsetup() 234 b43legacy_ilt_write(dev, 0x1802, 0x9B83); b43legacy_phy_agcsetup() 235 b43legacy_ilt_write(dev, 0x1803, 0x0F8D); b43legacy_phy_agcsetup() 236 b43legacy_phy_write(dev, 0x0455, 0x0004); b43legacy_phy_agcsetup() 239 b43legacy_phy_write(dev, 0x04A5, (b43legacy_phy_read(dev, 0x04A5) b43legacy_phy_agcsetup() 241 b43legacy_phy_write(dev, 0x041A, (b43legacy_phy_read(dev, 0x041A) b43legacy_phy_agcsetup() 243 b43legacy_phy_write(dev, 0x041A, (b43legacy_phy_read(dev, 0x041A) b43legacy_phy_agcsetup() 245 b43legacy_phy_write(dev, 0x048C, (b43legacy_phy_read(dev, 0x048C) b43legacy_phy_agcsetup() 248 b43legacy_radio_write16(dev, 0x007A, b43legacy_phy_agcsetup() 249 b43legacy_radio_read16(dev, 0x007A) b43legacy_phy_agcsetup() 252 b43legacy_phy_write(dev, 0x04A0, (b43legacy_phy_read(dev, 0x04A0) b43legacy_phy_agcsetup() 254 b43legacy_phy_write(dev, 0x04A1, (b43legacy_phy_read(dev, 0x04A1) b43legacy_phy_agcsetup() 256 b43legacy_phy_write(dev, 0x04A2, (b43legacy_phy_read(dev, 0x04A2) b43legacy_phy_agcsetup() 258 b43legacy_phy_write(dev, 0x04A0, (b43legacy_phy_read(dev, 0x04A0) b43legacy_phy_agcsetup() 262 b43legacy_phy_write(dev, 0x04A2, b43legacy_phy_agcsetup() 263 (b43legacy_phy_read(dev, 0x04A2) b43legacy_phy_agcsetup() 266 b43legacy_phy_write(dev, 0x0488, (b43legacy_phy_read(dev, 0x0488) b43legacy_phy_agcsetup() 268 b43legacy_phy_write(dev, 0x0488, (b43legacy_phy_read(dev, 0x0488) b43legacy_phy_agcsetup() 270 b43legacy_phy_write(dev, 0x0496, (b43legacy_phy_read(dev, 0x0496) b43legacy_phy_agcsetup() 272 b43legacy_phy_write(dev, 0x0489, (b43legacy_phy_read(dev, 0x0489) b43legacy_phy_agcsetup() 274 b43legacy_phy_write(dev, 0x0489, (b43legacy_phy_read(dev, 0x0489) b43legacy_phy_agcsetup() 276 b43legacy_phy_write(dev, 0x0482, (b43legacy_phy_read(dev, 0x0482) b43legacy_phy_agcsetup() 278 b43legacy_phy_write(dev, 0x0496, (b43legacy_phy_read(dev, 0x0496) b43legacy_phy_agcsetup() 280 b43legacy_phy_write(dev, 0x0481, (b43legacy_phy_read(dev, 0x0481) b43legacy_phy_agcsetup() 282 b43legacy_phy_write(dev, 0x0481, (b43legacy_phy_read(dev, 0x0481) b43legacy_phy_agcsetup() 286 b43legacy_phy_write(dev, 0x0430, 0x092B); b43legacy_phy_agcsetup() 287 b43legacy_phy_write(dev, 0x041B, b43legacy_phy_agcsetup() 288 (b43legacy_phy_read(dev, 0x041B) b43legacy_phy_agcsetup() 291 b43legacy_phy_write(dev, 0x041B, b43legacy_phy_agcsetup() 292 b43legacy_phy_read(dev, 0x041B) & 0xFFE1); b43legacy_phy_agcsetup() 293 b43legacy_phy_write(dev, 0x041F, 0x287A); b43legacy_phy_agcsetup() 294 b43legacy_phy_write(dev, 0x0420, b43legacy_phy_agcsetup() 295 (b43legacy_phy_read(dev, 0x0420) b43legacy_phy_agcsetup() 300 b43legacy_phy_write(dev, 0x0422, 0x287A); b43legacy_phy_agcsetup() 301 b43legacy_phy_write(dev, 0x0420, b43legacy_phy_agcsetup() 302 (b43legacy_phy_read(dev, 0x0420) b43legacy_phy_agcsetup() 306 b43legacy_phy_write(dev, 0x04A8, (b43legacy_phy_read(dev, 0x04A8) b43legacy_phy_agcsetup() 308 b43legacy_phy_write(dev, 0x048E, 0x1C00); b43legacy_phy_agcsetup() 311 b43legacy_phy_write(dev, 0x04AB, b43legacy_phy_agcsetup() 312 (b43legacy_phy_read(dev, 0x04AB) b43legacy_phy_agcsetup() 314 b43legacy_phy_write(dev, 0x048B, 0x005E); b43legacy_phy_agcsetup() 315 b43legacy_phy_write(dev, 0x048C, b43legacy_phy_agcsetup() 316 (b43legacy_phy_read(dev, 0x048C) & 0xFF00) b43legacy_phy_agcsetup() 318 b43legacy_phy_write(dev, 0x048D, 0x0002); b43legacy_phy_agcsetup() 321 b43legacy_ilt_write(dev, offset + 0x0800, 0); b43legacy_phy_agcsetup() 322 b43legacy_ilt_write(dev, offset + 0x0801, 7); b43legacy_phy_agcsetup() 323 b43legacy_ilt_write(dev, offset + 0x0802, 16); b43legacy_phy_agcsetup() 324 b43legacy_ilt_write(dev, offset + 0x0803, 28); b43legacy_phy_agcsetup() 327 b43legacy_phy_write(dev, 0x0426, b43legacy_phy_agcsetup() 328 (b43legacy_phy_read(dev, 0x0426) & 0xFFFC)); b43legacy_phy_agcsetup() 329 b43legacy_phy_write(dev, 0x0426, b43legacy_phy_agcsetup() 330 (b43legacy_phy_read(dev, 0x0426) & 0xEFFF)); b43legacy_phy_agcsetup() 334 static void b43legacy_phy_setupg(struct b43legacy_wldev dev) b43legacy_phy_setupg() argument 336 struct b43legacy_phy phy = &dev->phy; b43legacy_phy_setupg() 341 b43legacy_phy_write(dev, 0x0406, 0x4F19); b43legacy_phy_setupg() 342 b43legacy_phy_write(dev, B43legacy_PHY_G_CRS, b43legacy_phy_setupg() 343 (b43legacy_phy_read(dev, b43legacy_phy_setupg() 345 b43legacy_phy_write(dev, 0x042C, 0x005A); b43legacy_phy_setupg() 346 b43legacy_phy_write(dev, 0x0427, 0x001A); b43legacy_phy_setupg() 349 b43legacy_ilt_write(dev, 0x5800 + i, b43legacy_phy_setupg() 352 b43legacy_ilt_write(dev, 0x1800 + i, b43legacy_phy_setupg() 355 b43legacy_ilt_write32(dev, 0x2000 + i, b43legacy_phy_setupg() 359 b43legacy_nrssi_hw_write(dev, 0xBA98, (s16)0x7654); b43legacy_phy_setupg() 362 b43legacy_phy_write(dev, 0x04C0, 0x1861); b43legacy_phy_setupg() 363 b43legacy_phy_write(dev, 0x04C1, 0x0271); b43legacy_phy_setupg() 365 b43legacy_phy_write(dev, 0x04C0, 0x0098); b43legacy_phy_setupg() 366 b43legacy_phy_write(dev, 0x04C1, 0x0070); b43legacy_phy_setupg() 367 b43legacy_phy_write(dev, 0x04C9, 0x0080); b43legacy_phy_setupg() 369 b43legacy_phy_write(dev, 0x042B, b43legacy_phy_read(dev, b43legacy_phy_setupg() 373 b43legacy_ilt_write(dev, 0x4000 + i, i); b43legacy_phy_setupg() 375 b43legacy_ilt_write(dev, 0x1800 + i, b43legacy_phy_setupg() 381 b43legacy_ilt_write(dev, 0x1400 + i, b43legacy_phy_setupg() 383 else if ((phy->rev >= 7) && (b43legacy_phy_read(dev, 0x0449) & 0x0200)) b43legacy_phy_setupg() 385 b43legacy_ilt_write(dev, 0x1400 + i, b43legacy_phy_setupg() 389 b43legacy_ilt_write(dev, 0x1400 + i, b43legacy_phy_setupg() 394 b43legacy_ilt_write(dev, 0x5000 + i, b43legacy_phy_setupg() 398 b43legacy_ilt_write(dev, 0x5000 + i, b43legacy_phy_setupg() 403 b43legacy_ilt_write32(dev, 0x2400 + i, b43legacy_phy_setupg() 406 b43legacy_ilt_write(dev, 0x5400 + i, 0x0020); b43legacy_phy_setupg() 407 b43legacy_phy_agcsetup(dev); b43legacy_phy_setupg() 409 if (is_bcm_board_vendor(dev) && b43legacy_phy_setupg() 410 (dev->dev->bus->boardinfo.type == 0x0416) && b43legacy_phy_setupg() 411 (dev->dev->bus->sprom.board_rev == 0x0017)) b43legacy_phy_setupg() 414 b43legacy_ilt_write(dev, 0x5001, 0x0002); b43legacy_phy_setupg() 415 b43legacy_ilt_write(dev, 0x5002, 0x0001); b43legacy_phy_setupg() 418 b43legacy_ilt_write(dev, 0x1000 + i, 0x0820); b43legacy_phy_setupg() 419 b43legacy_phy_agcsetup(dev); b43legacy_phy_setupg() 420 b43legacy_phy_read(dev, 0x0400); / dummy read / b43legacy_phy_setupg() 421 b43legacy_phy_write(dev, 0x0403, 0x1000); b43legacy_phy_setupg() 422 b43legacy_ilt_write(dev, 0x3C02, 0x000F); b43legacy_phy_setupg() 423 b43legacy_ilt_write(dev, 0x3C03, 0x0014); b43legacy_phy_setupg() 425 if (is_bcm_board_vendor(dev) && b43legacy_phy_setupg() 426 (dev->dev->bus->boardinfo.type == 0x0416) && b43legacy_phy_setupg() 427 (dev->dev->bus->sprom.board_rev == 0x0017)) b43legacy_phy_setupg() 430 b43legacy_ilt_write(dev, 0x0401, 0x0002); b43legacy_phy_setupg() 431 b43legacy_ilt_write(dev, 0x0402, 0x0001); b43legacy_phy_setupg() 436 static void b43legacy_phy_inita(struct b43legacy_wldev dev) b43legacy_phy_inita() argument 441 b43legacy_phy_setupg(dev); b43legacy_phy_inita() 442 if (dev->dev->bus->sprom.boardflags_lo & B43legacy_BFL_PACTRL) b43legacy_phy_inita() 443 b43legacy_phy_write(dev, 0x046E, 0x03CF); b43legacy_phy_inita() 446 static void b43legacy_phy_initb2(struct b43legacy_wldev dev) b43legacy_phy_initb2() argument 448 struct b43legacy_phy phy = &dev->phy; b43legacy_phy_initb2() 452 b43legacy_write16(dev, 0x03EC, 0x3F22); b43legacy_phy_initb2() 453 b43legacy_phy_write(dev, 0x0020, 0x301C); b43legacy_phy_initb2() 454 b43legacy_phy_write(dev, 0x0026, 0x0000); b43legacy_phy_initb2() 455 b43legacy_phy_write(dev, 0x0030, 0x00C6); b43legacy_phy_initb2() 456 b43legacy_phy_write(dev, 0x0088, 0x3E00); b43legacy_phy_initb2() 459 b43legacy_phy_write(dev, offset, val); b43legacy_phy_initb2() 462 b43legacy_phy_write(dev, 0x03E4, 0x3000); b43legacy_phy_initb2() 463 b43legacy_radio_selectchannel(dev, phy->channel, 0); b43legacy_phy_initb2() 465 b43legacy_radio_write16(dev, 0x0075, 0x0080); b43legacy_phy_initb2() 466 b43legacy_radio_write16(dev, 0x0079, 0x0081); b43legacy_phy_initb2() 468 b43legacy_radio_write16(dev, 0x0050, 0x0020); b43legacy_phy_initb2() 469 b43legacy_radio_write16(dev, 0x0050, 0x0023); b43legacy_phy_initb2() 471 b43legacy_radio_write16(dev, 0x0050, 0x0020); b43legacy_phy_initb2() 472 b43legacy_radio_write16(dev, 0x005A, 0x0070); b43legacy_phy_initb2() 473 b43legacy_radio_write16(dev, 0x005B, 0x007B); b43legacy_phy_initb2() 474 b43legacy_radio_write16(dev, 0x005C, 0x00B0); b43legacy_phy_initb2() 475 b43legacy_radio_write16(dev, 0x007A, 0x000F); b43legacy_phy_initb2() 476 b43legacy_phy_write(dev, 0x0038, 0x0677); b43legacy_phy_initb2() 477 b43legacy_radio_init2050(dev); b43legacy_phy_initb2() 479 b43legacy_phy_write(dev, 0x0014, 0x0080); b43legacy_phy_initb2() 480 b43legacy_phy_write(dev, 0x0032, 0x00CA); b43legacy_phy_initb2() 481 b43legacy_phy_write(dev, 0x0032, 0x00CC); b43legacy_phy_initb2() 482 b43legacy_phy_write(dev, 0x0035, 0x07C2); b43legacy_phy_initb2() 483 b43legacy_phy_lo_b_measure(dev); b43legacy_phy_initb2() 484 b43legacy_phy_write(dev, 0x0026, 0xCC00); b43legacy_phy_initb2() 486 b43legacy_phy_write(dev, 0x0026, 0xCE00); b43legacy_phy_initb2() 487 b43legacy_write16(dev, B43legacy_MMIO_CHANNEL_EXT, 0x1000); b43legacy_phy_initb2() 488 b43legacy_phy_write(dev, 0x002A, 0x88A3); b43legacy_phy_initb2() 490 b43legacy_phy_write(dev, 0x002A, 0x88C2); b43legacy_phy_initb2() 491 b43legacy_radio_set_txpower_bg(dev, 0xFFFF, 0xFFFF, 0xFFFF); b43legacy_phy_initb2() 492 b43legacy_phy_init_pctl(dev); b43legacy_phy_initb2() 495 static void b43legacy_phy_initb4(struct b43legacy_wldev dev) b43legacy_phy_initb4() argument 497 struct b43legacy_phy phy = &dev->phy; b43legacy_phy_initb4() 501 b43legacy_write16(dev, 0x03EC, 0x3F22); b43legacy_phy_initb4() 502 b43legacy_phy_write(dev, 0x0020, 0x301C); b43legacy_phy_initb4() 503 b43legacy_phy_write(dev, 0x0026, 0x0000); b43legacy_phy_initb4() 504 b43legacy_phy_write(dev, 0x0030, 0x00C6); b43legacy_phy_initb4() 505 b43legacy_phy_write(dev, 0x0088, 0x3E00); b43legacy_phy_initb4() 508 b43legacy_phy_write(dev, offset, val); b43legacy_phy_initb4() 511 b43legacy_phy_write(dev, 0x03E4, 0x3000); b43legacy_phy_initb4() 512 b43legacy_radio_selectchannel(dev, phy->channel, 0); b43legacy_phy_initb4() 514 b43legacy_radio_write16(dev, 0x0075, 0x0080); b43legacy_phy_initb4() 515 b43legacy_radio_write16(dev, 0x0079, 0x0081); b43legacy_phy_initb4() 517 b43legacy_radio_write16(dev, 0x0050, 0x0020); b43legacy_phy_initb4() 518 b43legacy_radio_write16(dev, 0x0050, 0x0023); b43legacy_phy_initb4() 520 b43legacy_radio_write16(dev, 0x0050, 0x0020); b43legacy_phy_initb4() 521 b43legacy_radio_write16(dev, 0x005A, 0x0070); b43legacy_phy_initb4() 522 b43legacy_radio_write16(dev, 0x005B, 0x007B); b43legacy_phy_initb4() 523 b43legacy_radio_write16(dev, 0x005C, 0x00B0); b43legacy_phy_initb4() 524 b43legacy_radio_write16(dev, 0x007A, 0x000F); b43legacy_phy_initb4() 525 b43legacy_phy_write(dev, 0x0038, 0x0677); b43legacy_phy_initb4() 526 b43legacy_radio_init2050(dev); b43legacy_phy_initb4() 528 b43legacy_phy_write(dev, 0x0014, 0x0080); b43legacy_phy_initb4() 529 b43legacy_phy_write(dev, 0x0032, 0x00CA); b43legacy_phy_initb4() 531 b43legacy_phy_write(dev, 0x0032, 0x00E0); b43legacy_phy_initb4() 532 b43legacy_phy_write(dev, 0x0035, 0x07C2); b43legacy_phy_initb4() 534 b43legacy_phy_lo_b_measure(dev); b43legacy_phy_initb4() 536 b43legacy_phy_write(dev, 0x0026, 0xCC00); b43legacy_phy_initb4() 538 b43legacy_phy_write(dev, 0x0026, 0xCE00); b43legacy_phy_initb4() 539 b43legacy_write16(dev, B43legacy_MMIO_CHANNEL_EXT, 0x1100); b43legacy_phy_initb4() 540 b43legacy_phy_write(dev, 0x002A, 0x88A3); b43legacy_phy_initb4() 542 b43legacy_phy_write(dev, 0x002A, 0x88C2); b43legacy_phy_initb4() 543 b43legacy_radio_set_txpower_bg(dev, 0xFFFF, 0xFFFF, 0xFFFF); b43legacy_phy_initb4() 544 if (dev->dev->bus->sprom.boardflags_lo & B43legacy_BFL_RSSI) { b43legacy_phy_initb4() 545 b43legacy_calc_nrssi_slope(dev); b43legacy_phy_initb4() 546 b43legacy_calc_nrssi_threshold(dev); b43legacy_phy_initb4() 548 b43legacy_phy_init_pctl(dev); b43legacy_phy_initb4() 551 static void b43legacy_phy_initb5(struct b43legacy_wldev dev) b43legacy_phy_initb5() argument 553 struct b43legacy_phy phy = &dev->phy; b43legacy_phy_initb5() 559 b43legacy_radio_write16(dev, 0x007A, b43legacy_phy_initb5() 560 b43legacy_radio_read16(dev, 0x007A) b43legacy_phy_initb5() 562 if (!is_bcm_board_vendor(dev) && b43legacy_phy_initb5() 563 (dev->dev->bus->boardinfo.type != 0x0416)) { b43legacy_phy_initb5() 566 b43legacy_phy_write(dev, offset, value); b43legacy_phy_initb5() 570 b43legacy_phy_write(dev, 0x0035, b43legacy_phy_initb5() 571 (b43legacy_phy_read(dev, 0x0035) & 0xF0FF) b43legacy_phy_initb5() 574 b43legacy_phy_write(dev, 0x0038, 0x0667); b43legacy_phy_initb5() 578 b43legacy_radio_write16(dev, 0x007A, b43legacy_phy_initb5() 579 b43legacy_radio_read16(dev, 0x007A) b43legacy_phy_initb5() 581 b43legacy_radio_write16(dev, 0x0051, b43legacy_phy_initb5() 582 b43legacy_radio_read16(dev, 0x0051) b43legacy_phy_initb5() 585 b43legacy_write16(dev, B43legacy_MMIO_PHY_RADIO, 0x0000); b43legacy_phy_initb5() 587 b43legacy_phy_write(dev, 0x0802, b43legacy_phy_read(dev, 0x0802) b43legacy_phy_initb5() 589 b43legacy_phy_write(dev, 0x042B, b43legacy_phy_read(dev, 0x042B) b43legacy_phy_initb5() 592 b43legacy_phy_write(dev, 0x001C, 0x186A); b43legacy_phy_initb5() 594 b43legacy_phy_write(dev, 0x0013, (b43legacy_phy_read(dev, b43legacy_phy_initb5() 596 b43legacy_phy_write(dev, 0x0035, (b43legacy_phy_read(dev, b43legacy_phy_initb5() 598 b43legacy_phy_write(dev, 0x005D, (b43legacy_phy_read(dev, b43legacy_phy_initb5() 600 b43legacy_phy_write(dev, 0x5B, 0x0000); b43legacy_phy_initb5() 601 b43legacy_phy_write(dev, 0x5C, 0x0000); b43legacy_phy_initb5() 604 if (dev->bad_frames_preempt) b43legacy_phy_initb5() 605 b43legacy_phy_write(dev, B43legacy_PHY_RADIO_BITFIELD, b43legacy_phy_initb5() 606 b43legacy_phy_read(dev, b43legacy_phy_initb5() 610 b43legacy_phy_write(dev, 0x0026, 0xCE00); b43legacy_phy_initb5() 611 b43legacy_phy_write(dev, 0x0021, 0x3763); b43legacy_phy_initb5() 612 b43legacy_phy_write(dev, 0x0022, 0x1BC3); b43legacy_phy_initb5() 613 b43legacy_phy_write(dev, 0x0023, 0x06F9); b43legacy_phy_initb5() 614 b43legacy_phy_write(dev, 0x0024, 0x037E); b43legacy_phy_initb5() 616 b43legacy_phy_write(dev, 0x0026, 0xCC00); b43legacy_phy_initb5() 617 b43legacy_phy_write(dev, 0x0030, 0x00C6); b43legacy_phy_initb5() 618 b43legacy_write16(dev, 0x03EC, 0x3F22); b43legacy_phy_initb5() 621 b43legacy_phy_write(dev, 0x0020, 0x3E1C); b43legacy_phy_initb5() 623 b43legacy_phy_write(dev, 0x0020, 0x301C); b43legacy_phy_initb5() 626 b43legacy_write16(dev, 0x03E4, 0x3000); b43legacy_phy_initb5() 630 b43legacy_radio_selectchannel(dev, 7, 0); b43legacy_phy_initb5() 633 b43legacy_radio_write16(dev, 0x0075, 0x0080); b43legacy_phy_initb5() 634 b43legacy_radio_write16(dev, 0x0079, 0x0081); b43legacy_phy_initb5() 637 b43legacy_radio_write16(dev, 0x0050, 0x0020); b43legacy_phy_initb5() 638 b43legacy_radio_write16(dev, 0x0050, 0x0023); b43legacy_phy_initb5() 641 b43legacy_radio_write16(dev, 0x0050, 0x0020); b43legacy_phy_initb5() 642 b43legacy_radio_write16(dev, 0x005A, 0x0070); b43legacy_phy_initb5() 645 b43legacy_radio_write16(dev, 0x005B, 0x007B); b43legacy_phy_initb5() 646 b43legacy_radio_write16(dev, 0x005C, 0x00B0); b43legacy_phy_initb5() 648 b43legacy_radio_write16(dev, 0x007A, b43legacy_radio_read16(dev, b43legacy_phy_initb5() 651 b43legacy_radio_selectchannel(dev, old_channel, 0); b43legacy_phy_initb5() 653 b43legacy_phy_write(dev, 0x0014, 0x0080); b43legacy_phy_initb5() 654 b43legacy_phy_write(dev, 0x0032, 0x00CA); b43legacy_phy_initb5() 655 b43legacy_phy_write(dev, 0x002A, 0x88A3); b43legacy_phy_initb5() 657 b43legacy_radio_set_txpower_bg(dev, 0xFFFF, 0xFFFF, 0xFFFF); b43legacy_phy_initb5() 660 b43legacy_radio_write16(dev, 0x005D, 0x000D); b43legacy_phy_initb5() 662 b43legacy_write16(dev, 0x03E4, (b43legacy_read16(dev, 0x03E4) & b43legacy_phy_initb5() 666 static void b43legacy_phy_initb6(struct b43legacy_wldev dev) b43legacy_phy_initb6() argument 668 struct b43legacy_phy phy = &dev->phy; b43legacy_phy_initb6() 673 b43legacy_phy_write(dev, 0x003E, 0x817A); b43legacy_phy_initb6() 674 b43legacy_radio_write16(dev, 0x007A, b43legacy_phy_initb6() 675 (b43legacy_radio_read16(dev, 0x007A) \| 0x0058)); b43legacy_phy_initb6() 678 b43legacy_radio_write16(dev, 0x0051, 0x0037); b43legacy_phy_initb6() 679 b43legacy_radio_write16(dev, 0x0052, 0x0070); b43legacy_phy_initb6() 680 b43legacy_radio_write16(dev, 0x0053, 0x00B3); b43legacy_phy_initb6() 681 b43legacy_radio_write16(dev, 0x0054, 0x009B); b43legacy_phy_initb6() 682 b43legacy_radio_write16(dev, 0x005A, 0x0088); b43legacy_phy_initb6() 683 b43legacy_radio_write16(dev, 0x005B, 0x0088); b43legacy_phy_initb6() 684 b43legacy_radio_write16(dev, 0x005D, 0x0088); b43legacy_phy_initb6() 685 b43legacy_radio_write16(dev, 0x005E, 0x0088); b43legacy_phy_initb6() 686 b43legacy_radio_write16(dev, 0x007D, 0x0088); b43legacy_phy_initb6() 687 b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, b43legacy_phy_initb6() 689 (b43legacy_shm_read32(dev, b43legacy_phy_initb6() 695 b43legacy_radio_write16(dev, 0x0051, 0x0000); b43legacy_phy_initb6() 696 b43legacy_radio_write16(dev, 0x0052, 0x0040); b43legacy_phy_initb6() 697 b43legacy_radio_write16(dev, 0x0053, 0x00B7); b43legacy_phy_initb6() 698 b43legacy_radio_write16(dev, 0x0054, 0x0098); b43legacy_phy_initb6() 699 b43legacy_radio_write16(dev, 0x005A, 0x0088); b43legacy_phy_initb6() 700 b43legacy_radio_write16(dev, 0x005B, 0x006B); b43legacy_phy_initb6() 701 b43legacy_radio_write16(dev, 0x005C, 0x000F); b43legacy_phy_initb6() 702 if (dev->dev->bus->sprom.boardflags_lo & 0x8000) { b43legacy_phy_initb6() 703 b43legacy_radio_write16(dev, 0x005D, 0x00FA); b43legacy_phy_initb6() 704 b43legacy_radio_write16(dev, 0x005E, 0x00D8); b43legacy_phy_initb6() 706 b43legacy_radio_write16(dev, 0x005D, 0x00F5); b43legacy_phy_initb6() 707 b43legacy_radio_write16(dev, 0x005E, 0x00B8); b43legacy_phy_initb6() 709 b43legacy_radio_write16(dev, 0x0073, 0x0003); b43legacy_phy_initb6() 710 b43legacy_radio_write16(dev, 0x007D, 0x00A8); b43legacy_phy_initb6() 711 b43legacy_radio_write16(dev, 0x007C, 0x0001); b43legacy_phy_initb6() 712 b43legacy_radio_write16(dev, 0x007E, 0x0008); b43legacy_phy_initb6() 716 b43legacy_phy_write(dev, offset, val); b43legacy_phy_initb6() 721 b43legacy_phy_write(dev, offset, val); b43legacy_phy_initb6() 726 b43legacy_phy_write(dev, offset, (val & 0x3F3F)); b43legacy_phy_initb6() 730 b43legacy_radio_write16(dev, 0x007A, b43legacy_phy_initb6() 731 b43legacy_radio_read16(dev, 0x007A) \| b43legacy_phy_initb6() 733 b43legacy_radio_write16(dev, 0x0051, b43legacy_phy_initb6() 734 b43legacy_radio_read16(dev, 0x0051) \| b43legacy_phy_initb6() 736 b43legacy_phy_write(dev, 0x0802, b43legacy_phy_initb6() 737 b43legacy_phy_read(dev, 0x0802) \| 0x0100); b43legacy_phy_initb6() 738 b43legacy_phy_write(dev, 0x042B, b43legacy_phy_initb6() 739 b43legacy_phy_read(dev, 0x042B) \| 0x2000); b43legacy_phy_initb6() 740 b43legacy_phy_write(dev, 0x5B, 0x0000); b43legacy_phy_initb6() 741 b43legacy_phy_write(dev, 0x5C, 0x0000); b43legacy_phy_initb6() 746 b43legacy_radio_selectchannel(dev, 1, 0); b43legacy_phy_initb6() 748 b43legacy_radio_selectchannel(dev, 13, 0); b43legacy_phy_initb6() 750 b43legacy_radio_write16(dev, 0x0050, 0x0020); b43legacy_phy_initb6() 751 b43legacy_radio_write16(dev, 0x0050, 0x0023); b43legacy_phy_initb6() 754 b43legacy_radio_write16(dev, 0x007C, b43legacy_phy_initb6() 755 (b43legacy_radio_read16(dev, 0x007C) b43legacy_phy_initb6() 757 b43legacy_radio_write16(dev, 0x0050, 0x0020); b43legacy_phy_initb6() 760 b43legacy_radio_write16(dev, 0x0050, 0x0020); b43legacy_phy_initb6() 761 b43legacy_radio_write16(dev, 0x005A, 0x0070); b43legacy_phy_initb6() 762 b43legacy_radio_write16(dev, 0x005B, 0x007B); b43legacy_phy_initb6() 763 b43legacy_radio_write16(dev, 0x005C, 0x00B0); b43legacy_phy_initb6() 765 b43legacy_radio_write16(dev, 0x007A, b43legacy_phy_initb6() 766 (b43legacy_radio_read16(dev, b43legacy_phy_initb6() 769 b43legacy_radio_selectchannel(dev, old_channel, 0); b43legacy_phy_initb6() 771 b43legacy_phy_write(dev, 0x0014, 0x0200); b43legacy_phy_initb6() 773 b43legacy_phy_write(dev, 0x002A, 0x88C2); b43legacy_phy_initb6() 775 b43legacy_phy_write(dev, 0x002A, 0x8AC0); b43legacy_phy_initb6() 776 b43legacy_phy_write(dev, 0x0038, 0x0668); b43legacy_phy_initb6() 777 b43legacy_radio_set_txpower_bg(dev, 0xFFFF, 0xFFFF, 0xFFFF); b43legacy_phy_initb6() 779 b43legacy_phy_write(dev, 0x005D, (b43legacy_phy_read(dev, b43legacy_phy_initb6() 782 b43legacy_radio_write16(dev, 0x005D, 0x000D); b43legacy_phy_initb6() 785 b43legacy_write16(dev, 0x03E4, 0x0009); b43legacy_phy_initb6() 786 b43legacy_phy_write(dev, 0x61, b43legacy_phy_read(dev, 0x61) b43legacy_phy_initb6() 789 b43legacy_phy_write(dev, 0x0002, (b43legacy_phy_read(dev, b43legacy_phy_initb6() 792 b43legacy_write16(dev, 0x03E6, 0x0); b43legacy_phy_initb6() 794 b43legacy_write16(dev, 0x03E6, 0x8140); b43legacy_phy_initb6() 795 b43legacy_phy_write(dev, 0x0016, 0x0410); b43legacy_phy_initb6() 796 b43legacy_phy_write(dev, 0x0017, 0x0820); b43legacy_phy_initb6() 797 b43legacy_phy_write(dev, 0x0062, 0x0007); b43legacy_phy_initb6() 798 b43legacy_radio_init2050(dev); b43legacy_phy_initb6() 799 b43legacy_phy_lo_g_measure(dev); b43legacy_phy_initb6() 800 if (dev->dev->bus->sprom.boardflags_lo & b43legacy_phy_initb6() 802 b43legacy_calc_nrssi_slope(dev); b43legacy_phy_initb6() 803 b43legacy_calc_nrssi_threshold(dev); b43legacy_phy_initb6() 805 b43legacy_phy_init_pctl(dev); b43legacy_phy_initb6() 809 static void b43legacy_calc_loopback_gain(struct b43legacy_wldev dev) b43legacy_calc_loopback_gain() argument 811 struct b43legacy_phy phy = &dev->phy; b43legacy_calc_loopback_gain() 821 backup_phy[0] = b43legacy_phy_read(dev, 0x0429); b43legacy_calc_loopback_gain() 822 backup_phy[1] = b43legacy_phy_read(dev, 0x0001); b43legacy_calc_loopback_gain() 823 backup_phy[2] = b43legacy_phy_read(dev, 0x0811); b43legacy_calc_loopback_gain() 824 backup_phy[3] = b43legacy_phy_read(dev, 0x0812); b43legacy_calc_loopback_gain() 826 backup_phy[4] = b43legacy_phy_read(dev, 0x0814); b43legacy_calc_loopback_gain() 827 backup_phy[5] = b43legacy_phy_read(dev, 0x0815); b43legacy_calc_loopback_gain() 829 backup_phy[6] = b43legacy_phy_read(dev, 0x005A); b43legacy_calc_loopback_gain() 830 backup_phy[7] = b43legacy_phy_read(dev, 0x0059); b43legacy_calc_loopback_gain() 831 backup_phy[8] = b43legacy_phy_read(dev, 0x0058); b43legacy_calc_loopback_gain() 832 backup_phy[9] = b43legacy_phy_read(dev, 0x000A); b43legacy_calc_loopback_gain() 833 backup_phy[10] = b43legacy_phy_read(dev, 0x0003); b43legacy_calc_loopback_gain() 834 backup_phy[11] = b43legacy_phy_read(dev, 0x080F); b43legacy_calc_loopback_gain() 835 backup_phy[12] = b43legacy_phy_read(dev, 0x0810); b43legacy_calc_loopback_gain() 836 backup_phy[13] = b43legacy_phy_read(dev, 0x002B); b43legacy_calc_loopback_gain() 837 backup_phy[14] = b43legacy_phy_read(dev, 0x0015); b43legacy_calc_loopback_gain() 838 b43legacy_phy_read(dev, 0x002D); /* dummy read / b43legacy_calc_loopback_gain() 840 backup_radio[0] = b43legacy_radio_read16(dev, 0x0052); b43legacy_calc_loopback_gain() 841 backup_radio[1] = b43legacy_radio_read16(dev, 0x0043); b43legacy_calc_loopback_gain() 842 backup_radio[2] = b43legacy_radio_read16(dev, 0x007A); b43legacy_calc_loopback_gain() 844 b43legacy_phy_write(dev, 0x0429, b43legacy_calc_loopback_gain() 845 b43legacy_phy_read(dev, 0x0429) & 0x3FFF); b43legacy_calc_loopback_gain() 846 b43legacy_phy_write(dev, 0x0001, b43legacy_calc_loopback_gain() 847 b43legacy_phy_read(dev, 0x0001) & 0x8000); b43legacy_calc_loopback_gain() 848 b43legacy_phy_write(dev, 0x0811, b43legacy_calc_loopback_gain() 849 b43legacy_phy_read(dev, 0x0811) \| 0x0002); b43legacy_calc_loopback_gain() 850 b43legacy_phy_write(dev, 0x0812, b43legacy_calc_loopback_gain() 851 b43legacy_phy_read(dev, 0x0812) & 0xFFFD); b43legacy_calc_loopback_gain() 852 b43legacy_phy_write(dev, 0x0811, b43legacy_calc_loopback_gain() 853 b43legacy_phy_read(dev, 0x0811) \| 0x0001); b43legacy_calc_loopback_gain() 854 b43legacy_phy_write(dev, 0x0812, b43legacy_calc_loopback_gain() 855 b43legacy_phy_read(dev, 0x0812) & 0xFFFE); b43legacy_calc_loopback_gain() 857 b43legacy_phy_write(dev, 0x0814, b43legacy_calc_loopback_gain() 858 b43legacy_phy_read(dev, 0x0814) \| 0x0001); b43legacy_calc_loopback_gain() 859 b43legacy_phy_write(dev, 0x0815, b43legacy_calc_loopback_gain() 860 b43legacy_phy_read(dev, 0x0815) & 0xFFFE); b43legacy_calc_loopback_gain() 861 b43legacy_phy_write(dev, 0x0814, b43legacy_calc_loopback_gain() 862 b43legacy_phy_read(dev, 0x0814) \| 0x0002); b43legacy_calc_loopback_gain() 863 b43legacy_phy_write(dev, 0x0815, b43legacy_calc_loopback_gain() 864 b43legacy_phy_read(dev, 0x0815) & 0xFFFD); b43legacy_calc_loopback_gain() 866 b43legacy_phy_write(dev, 0x0811, b43legacy_phy_read(dev, 0x0811) \| b43legacy_calc_loopback_gain() 868 b43legacy_phy_write(dev, 0x0812, b43legacy_phy_read(dev, 0x0812) \| b43legacy_calc_loopback_gain() 871 b43legacy_phy_write(dev, 0x0811, (b43legacy_phy_read(dev, 0x0811) b43legacy_calc_loopback_gain() 873 b43legacy_phy_write(dev, 0x0812, (b43legacy_phy_read(dev, 0x0812) b43legacy_calc_loopback_gain() 876 b43legacy_phy_write(dev, 0x005A, 0x0780); b43legacy_calc_loopback_gain() 877 b43legacy_phy_write(dev, 0x0059, 0xC810); b43legacy_calc_loopback_gain() 878 b43legacy_phy_write(dev, 0x0058, 0x000D); b43legacy_calc_loopback_gain() 880 b43legacy_phy_write(dev, 0x0003, 0x0122); b43legacy_calc_loopback_gain() 882 b43legacy_phy_write(dev, 0x000A, b43legacy_calc_loopback_gain() 883 b43legacy_phy_read(dev, 0x000A) b43legacy_calc_loopback_gain() 886 b43legacy_phy_write(dev, 0x0814, b43legacy_calc_loopback_gain() 887 b43legacy_phy_read(dev, 0x0814) \| 0x0004); b43legacy_calc_loopback_gain() 888 b43legacy_phy_write(dev, 0x0815, b43legacy_calc_loopback_gain() 889 b43legacy_phy_read(dev, 0x0815) & 0xFFFB); b43legacy_calc_loopback_gain() 891 b43legacy_phy_write(dev, 0x0003, b43legacy_calc_loopback_gain() 892 (b43legacy_phy_read(dev, 0x0003) b43legacy_calc_loopback_gain() 895 b43legacy_radio_write16(dev, 0x0052, 0x0000); b43legacy_calc_loopback_gain() 896 b43legacy_radio_write16(dev, 0x0043, b43legacy_calc_loopback_gain() 897 (b43legacy_radio_read16(dev, 0x0043) b43legacy_calc_loopback_gain() 901 b43legacy_radio_write16(dev, 0x0043, 0x000F); b43legacy_calc_loopback_gain() 906 b43legacy_phy_set_baseband_attenuation(dev, 11); b43legacy_calc_loopback_gain() 909 b43legacy_phy_write(dev, 0x080F, 0xC020); b43legacy_calc_loopback_gain() 911 b43legacy_phy_write(dev, 0x080F, 0x8020); b43legacy_calc_loopback_gain() 912 b43legacy_phy_write(dev, 0x0810, 0x0000); b43legacy_calc_loopback_gain() 914 b43legacy_phy_write(dev, 0x002B, b43legacy_calc_loopback_gain() 915 (b43legacy_phy_read(dev, 0x002B) b43legacy_calc_loopback_gain() 917 b43legacy_phy_write(dev, 0x002B, b43legacy_calc_loopback_gain() 918 (b43legacy_phy_read(dev, 0x002B) b43legacy_calc_loopback_gain() 920 b43legacy_phy_write(dev, 0x0811, b43legacy_calc_loopback_gain() 921 b43legacy_phy_read(dev, 0x0811) \| 0x0100); b43legacy_calc_loopback_gain() 922 b43legacy_phy_write(dev, 0x0812, b43legacy_calc_loopback_gain() 923 b43legacy_phy_read(dev, 0x0812) & 0xCFFF); b43legacy_calc_loopback_gain() 924 if (dev->dev->bus->sprom.boardflags_lo & B43legacy_BFL_EXTLNA) { b43legacy_calc_loopback_gain() 926 b43legacy_phy_write(dev, 0x0811, b43legacy_calc_loopback_gain() 927 b43legacy_phy_read(dev, 0x0811) b43legacy_calc_loopback_gain() 929 b43legacy_phy_write(dev, 0x0812, b43legacy_calc_loopback_gain() 930 b43legacy_phy_read(dev, 0x0812) b43legacy_calc_loopback_gain() 934 b43legacy_radio_write16(dev, 0x007A, b43legacy_calc_loopback_gain() 935 b43legacy_radio_read16(dev, 0x007A) b43legacy_calc_loopback_gain() 939 b43legacy_radio_write16(dev, 0x0043, loop1_cnt); b43legacy_calc_loopback_gain() 940 b43legacy_phy_write(dev, 0x0812, b43legacy_calc_loopback_gain() 941 (b43legacy_phy_read(dev, 0x0812) b43legacy_calc_loopback_gain() 943 b43legacy_phy_write(dev, 0x0015, b43legacy_calc_loopback_gain() 944 (b43legacy_phy_read(dev, 0x0015) b43legacy_calc_loopback_gain() 946 b43legacy_phy_write(dev, 0x0015, b43legacy_calc_loopback_gain() 947 (b43legacy_phy_read(dev, 0x0015) b43legacy_calc_loopback_gain() 950 if (b43legacy_phy_read(dev, 0x002D) >= 0x0DFC) b43legacy_calc_loopback_gain() 958 b43legacy_phy_write(dev, 0x0812, b43legacy_calc_loopback_gain() 959 b43legacy_phy_read(dev, 0x0812) b43legacy_calc_loopback_gain() 962 b43legacy_phy_write(dev, 0x0812, b43legacy_calc_loopback_gain() 963 (b43legacy_phy_read(dev, 0x0812) b43legacy_calc_loopback_gain() 965 b43legacy_phy_write(dev, 0x0015, b43legacy_calc_loopback_gain() 966 (b43legacy_phy_read(dev, 0x0015) b43legacy_calc_loopback_gain() 968 b43legacy_phy_write(dev, 0x0015, b43legacy_calc_loopback_gain() 969 (b43legacy_phy_read(dev, 0x0015) b43legacy_calc_loopback_gain() 972 if (b43legacy_phy_read(dev, 0x002D) >= 0x0DFC) b43legacy_calc_loopback_gain() 978 b43legacy_phy_write(dev, 0x0814, backup_phy[4]); b43legacy_calc_loopback_gain() 979 b43legacy_phy_write(dev, 0x0815, backup_phy[5]); b43legacy_calc_loopback_gain() 981 b43legacy_phy_write(dev, 0x005A, backup_phy[6]); b43legacy_calc_loopback_gain() 982 b43legacy_phy_write(dev, 0x0059, backup_phy[7]); b43legacy_calc_loopback_gain() 983 b43legacy_phy_write(dev, 0x0058, backup_phy[8]); b43legacy_calc_loopback_gain() 984 b43legacy_phy_write(dev, 0x000A, backup_phy[9]); b43legacy_calc_loopback_gain() 985 b43legacy_phy_write(dev, 0x0003, backup_phy[10]); b43legacy_calc_loopback_gain() 986 b43legacy_phy_write(dev, 0x080F, backup_phy[11]); b43legacy_calc_loopback_gain() 987 b43legacy_phy_write(dev, 0x0810, backup_phy[12]); b43legacy_calc_loopback_gain() 988 b43legacy_phy_write(dev, 0x002B, backup_phy[13]); b43legacy_calc_loopback_gain() 989 b43legacy_phy_write(dev, 0x0015, backup_phy[14]); b43legacy_calc_loopback_gain() 991 b43legacy_phy_set_baseband_attenuation(dev, backup_bband); b43legacy_calc_loopback_gain() 993 b43legacy_radio_write16(dev, 0x0052, backup_radio[0]); b43legacy_calc_loopback_gain() 994 b43legacy_radio_write16(dev, 0x0043, backup_radio[1]); b43legacy_calc_loopback_gain() 995 b43legacy_radio_write16(dev, 0x007A, backup_radio[2]); b43legacy_calc_loopback_gain() 997 b43legacy_phy_write(dev, 0x0811, backup_phy[2] \| 0x0003); b43legacy_calc_loopback_gain() 999 b43legacy_phy_write(dev, 0x0811, backup_phy[2]); b43legacy_calc_loopback_gain() 1000 b43legacy_phy_write(dev, 0x0812, backup_phy[3]); b43legacy_calc_loopback_gain() 1001 b43legacy_phy_write(dev, 0x0429, backup_phy[0]); b43legacy_calc_loopback_gain() 1002 b43legacy_phy_write(dev, 0x0001, backup_phy[1]); b43legacy_calc_loopback_gain() 1008 static void b43legacy_phy_initg(struct b43legacy_wldev dev) b43legacy_phy_initg() argument 1010 struct b43legacy_phy phy = &dev->phy; b43legacy_phy_initg() 1014 b43legacy_phy_initb5(dev); b43legacy_phy_initg() 1016 b43legacy_phy_initb6(dev); b43legacy_phy_initg() 1018 b43legacy_phy_inita(dev); b43legacy_phy_initg() 1021 b43legacy_phy_write(dev, 0x0814, 0x0000); b43legacy_phy_initg() 1022 b43legacy_phy_write(dev, 0x0815, 0x0000); b43legacy_phy_initg() 1025 b43legacy_phy_write(dev, 0x0811, 0x0000); b43legacy_phy_initg() 1026 b43legacy_phy_write(dev, 0x0015, 0x00C0); b43legacy_phy_initg() 1029 b43legacy_phy_write(dev, 0x0811, 0x0400); b43legacy_phy_initg() 1030 b43legacy_phy_write(dev, 0x0015, 0x00C0); b43legacy_phy_initg() 1033 tmp = b43legacy_phy_read(dev, 0x0400) & 0xFF; b43legacy_phy_initg() 1035 b43legacy_phy_write(dev, 0x04C2, 0x1816); b43legacy_phy_initg() 1036 b43legacy_phy_write(dev, 0x04C3, 0x8606); b43legacy_phy_initg() 1039 b43legacy_phy_write(dev, 0x04C2, 0x1816); b43legacy_phy_initg() 1040 b43legacy_phy_write(dev, 0x04C3, 0x8006); b43legacy_phy_initg() 1041 b43legacy_phy_write(dev, 0x04CC, b43legacy_phy_initg() 1042 (b43legacy_phy_read(dev, b43legacy_phy_initg() 1047 b43legacy_phy_write(dev, 0x047E, 0x0078); b43legacy_phy_initg() 1050 b43legacy_phy_write(dev, 0x0801, b43legacy_phy_read(dev, 0x0801) b43legacy_phy_initg() 1052 b43legacy_phy_write(dev, 0x043E, b43legacy_phy_read(dev, 0x043E) b43legacy_phy_initg() 1056 b43legacy_calc_loopback_gain(dev); b43legacy_phy_initg() 1059 phy->initval = b43legacy_radio_init2050(dev); b43legacy_phy_initg() 1061 b43legacy_radio_write16(dev, 0x0078, phy->initval); b43legacy_phy_initg() 1064 b43legacy_phy_lo_g_measure(dev); b43legacy_phy_initg() 1067 b43legacy_radio_write16(dev, 0x0052, b43legacy_phy_initg() 1071 b43legacy_radio_write16(dev, 0x0052, b43legacy_phy_initg() 1072 (b43legacy_radio_read16(dev, b43legacy_phy_initg() 1076 b43legacy_phy_write(dev, 0x0036, b43legacy_phy_initg() 1077 (b43legacy_phy_read(dev, 0x0036) b43legacy_phy_initg() 1079 if (dev->dev->bus->sprom.boardflags_lo & b43legacy_phy_initg() 1081 b43legacy_phy_write(dev, 0x002E, 0x8075); b43legacy_phy_initg() 1083 b43legacy_phy_write(dev, 0x002E, 0x807F); b43legacy_phy_initg() 1085 b43legacy_phy_write(dev, 0x002F, 0x0101); b43legacy_phy_initg() 1087 b43legacy_phy_write(dev, 0x002F, 0x0202); b43legacy_phy_initg() 1090 b43legacy_phy_lo_adjust(dev, 0); b43legacy_phy_initg() 1091 b43legacy_phy_write(dev, 0x080F, 0x8078); b43legacy_phy_initg() 1094 if (!(dev->dev->bus->sprom.boardflags_lo & B43legacy_BFL_RSSI)) { b43legacy_phy_initg() 1101 b43legacy_nrssi_hw_update(dev, 0xFFFF); b43legacy_phy_initg() 1102 b43legacy_calc_nrssi_threshold(dev); b43legacy_phy_initg() 1106 b43legacy_calc_nrssi_slope(dev); b43legacy_phy_initg() 1109 b43legacy_calc_nrssi_threshold(dev); b43legacy_phy_initg() 1113 b43legacy_phy_write(dev, 0x0805, 0x3230); b43legacy_phy_initg() 1114 b43legacy_phy_init_pctl(dev); b43legacy_phy_initg() 1115 if (dev->dev->bus->chip_id == 0x4306 b43legacy_phy_initg() 1116 && dev->dev->bus->chip_package == 2) { b43legacy_phy_initg() 1117 b43legacy_phy_write(dev, 0x0429, b43legacy_phy_initg() 1118 b43legacy_phy_read(dev, 0x0429) & 0xBFFF); b43legacy_phy_initg() 1119 b43legacy_phy_write(dev, 0x04C3, b43legacy_phy_initg() 1120 b43legacy_phy_read(dev, 0x04C3) & 0x7FFF); b43legacy_phy_initg() 1124 static u16 b43legacy_phy_lo_b_r15_loop(struct b43legacy_wldev dev) b43legacy_phy_lo_b_r15_loop() argument 1132 b43legacy_phy_write(dev, 0x0015, 0xAFA0); b43legacy_phy_lo_b_r15_loop() 1134 b43legacy_phy_write(dev, 0x0015, 0xEFA0); b43legacy_phy_lo_b_r15_loop() 1136 b43legacy_phy_write(dev, 0x0015, 0xFFA0); b43legacy_phy_lo_b_r15_loop() 1138 ret += b43legacy_phy_read(dev, 0x002C); b43legacy_phy_lo_b_r15_loop() 1146 void b43legacy_phy_lo_b_measure(struct b43legacy_wldev dev) b43legacy_phy_lo_b_measure() argument 1148 struct b43legacy_phy phy = &dev->phy; b43legacy_phy_lo_b_measure() 1155 regstack[0] = b43legacy_phy_read(dev, 0x0015); b43legacy_phy_lo_b_measure() 1156 regstack[1] = b43legacy_radio_read16(dev, 0x0052) & 0xFFF0; b43legacy_phy_lo_b_measure() 1159 regstack[2] = b43legacy_phy_read(dev, 0x000A); b43legacy_phy_lo_b_measure() 1160 regstack[3] = b43legacy_phy_read(dev, 0x002A); b43legacy_phy_lo_b_measure() 1161 regstack[4] = b43legacy_phy_read(dev, 0x0035); b43legacy_phy_lo_b_measure() 1162 regstack[5] = b43legacy_phy_read(dev, 0x0003); b43legacy_phy_lo_b_measure() 1163 regstack[6] = b43legacy_phy_read(dev, 0x0001); b43legacy_phy_lo_b_measure() 1164 regstack[7] = b43legacy_phy_read(dev, 0x0030); b43legacy_phy_lo_b_measure() 1166 regstack[8] = b43legacy_radio_read16(dev, 0x0043); b43legacy_phy_lo_b_measure() 1167 regstack[9] = b43legacy_radio_read16(dev, 0x007A); b43legacy_phy_lo_b_measure() 1168 regstack[10] = b43legacy_read16(dev, 0x03EC); b43legacy_phy_lo_b_measure() 1169 regstack[11] = b43legacy_radio_read16(dev, 0x0052) & 0x00F0; b43legacy_phy_lo_b_measure() 1171 b43legacy_phy_write(dev, 0x0030, 0x00FF); b43legacy_phy_lo_b_measure() 1172 b43legacy_write16(dev, 0x03EC, 0x3F3F); b43legacy_phy_lo_b_measure() 1173 b43legacy_phy_write(dev, 0x0035, regstack[4] & 0xFF7F); b43legacy_phy_lo_b_measure() 1174 b43legacy_radio_write16(dev, 0x007A, regstack[9] & 0xFFF0); b43legacy_phy_lo_b_measure() 1176 b43legacy_phy_write(dev, 0x0015, 0xB000); b43legacy_phy_lo_b_measure() 1177 b43legacy_phy_write(dev, 0x002B, 0x0004); b43legacy_phy_lo_b_measure() 1180 b43legacy_phy_write(dev, 0x002B, 0x0203); b43legacy_phy_lo_b_measure() 1181 b43legacy_phy_write(dev, 0x002A, 0x08A3); b43legacy_phy_lo_b_measure() 1187 b43legacy_radio_write16(dev, 0x0052, regstack[1] \| i); b43legacy_phy_lo_b_measure() 1188 b43legacy_phy_lo_b_r15_loop(dev); b43legacy_phy_lo_b_measure() 1191 b43legacy_radio_write16(dev, 0x0052, regstack[1] \| i); b43legacy_phy_lo_b_measure() 1192 mls = b43legacy_phy_lo_b_r15_loop(dev) / 10; b43legacy_phy_lo_b_measure() 1198 b43legacy_radio_write16(dev, 0x0052, regstack[1] b43legacy_phy_lo_b_measure() 1209 b43legacy_phy_write(dev, 0x002F, fval); b43legacy_phy_lo_b_measure() 1210 mls = b43legacy_phy_lo_b_r15_loop(dev) / 10; b43legacy_phy_lo_b_measure() 1219 b43legacy_phy_write(dev, 0x002F, phy->minlowsigpos[1]); b43legacy_phy_lo_b_measure() 1221 b43legacy_phy_write(dev, 0x000A, regstack[2]); b43legacy_phy_lo_b_measure() 1222 b43legacy_phy_write(dev, 0x002A, regstack[3]); b43legacy_phy_lo_b_measure() 1223 b43legacy_phy_write(dev, 0x0035, regstack[4]); b43legacy_phy_lo_b_measure() 1224 b43legacy_phy_write(dev, 0x0003, regstack[5]); b43legacy_phy_lo_b_measure() 1225 b43legacy_phy_write(dev, 0x0001, regstack[6]); b43legacy_phy_lo_b_measure() 1226 b43legacy_phy_write(dev, 0x0030, regstack[7]); b43legacy_phy_lo_b_measure() 1228 b43legacy_radio_write16(dev, 0x0043, regstack[8]); b43legacy_phy_lo_b_measure() 1229 b43legacy_radio_write16(dev, 0x007A, regstack[9]); b43legacy_phy_lo_b_measure() 1231 b43legacy_radio_write16(dev, 0x0052, b43legacy_phy_lo_b_measure() 1232 (b43legacy_radio_read16(dev, 0x0052) b43legacy_phy_lo_b_measure() 1235 b43legacy_write16(dev, 0x03EC, regstack[10]); b43legacy_phy_lo_b_measure() 1237 b43legacy_phy_write(dev, 0x0015, regstack[0]); b43legacy_phy_lo_b_measure() 1241 u16 b43legacy_phy_lo_g_deviation_subval(struct b43legacy_wldev dev, b43legacy_phy_lo_g_deviation_subval() argument 1244 struct b43legacy_phy phy = &dev->phy; b43legacy_phy_lo_g_deviation_subval() 1250 b43legacy_phy_write(dev, 0x15, 0xE300); b43legacy_phy_lo_g_deviation_subval() 1252 b43legacy_phy_write(dev, 0x0812, control \| 0x00B0); b43legacy_phy_lo_g_deviation_subval() 1254 b43legacy_phy_write(dev, 0x0812, control \| 0x00B2); b43legacy_phy_lo_g_deviation_subval() 1256 b43legacy_phy_write(dev, 0x0812, control \| 0x00B3); b43legacy_phy_lo_g_deviation_subval() 1258 b43legacy_phy_write(dev, 0x0015, 0xF300); b43legacy_phy_lo_g_deviation_subval() 1261 b43legacy_phy_write(dev, 0x0015, control \| 0xEFA0); b43legacy_phy_lo_g_deviation_subval() 1263 b43legacy_phy_write(dev, 0x0015, control \| 0xEFE0); b43legacy_phy_lo_g_deviation_subval() 1265 b43legacy_phy_write(dev, 0x0015, control \| 0xFFE0); b43legacy_phy_lo_g_deviation_subval() 1268 ret = b43legacy_phy_read(dev, 0x002D); b43legacy_phy_lo_g_deviation_subval() 1275 static u32 b43legacy_phy_lo_g_singledeviation(struct b43legacy_wldev dev, b43legacy_phy_lo_g_singledeviation() argument 1282 ret += b43legacy_phy_lo_g_deviation_subval(dev, control); b43legacy_phy_lo_g_singledeviation() 1289 void b43legacy_lo_write(struct b43legacy_wldev dev, b43legacy_lo_write() argument 1301 b43legacydbg(dev->wl, b43legacy_lo_write() 1309 b43legacy_phy_write(dev, B43legacy_PHY_G_LO_CONTROL, value); b43legacy_lo_write() 1313 struct b43legacy_lopair b43legacy_find_lopair(struct b43legacy_wldev dev, b43legacy_find_lopair() argument 1319 struct b43legacy_phy phy = &dev->phy; b43legacy_find_lopair() 1331 struct b43legacy_lopair b43legacy_current_lopair(struct b43legacy_wldev dev) b43legacy_current_lopair() argument 1333 struct b43legacy_phy phy = &dev->phy; b43legacy_current_lopair() 1335 return b43legacy_find_lopair(dev, phy->bbatt, b43legacy_current_lopair() 1340 void b43legacy_phy_lo_adjust(struct b43legacy_wldev dev, int fixed) b43legacy_phy_lo_adjust() argument 1346 pair = b43legacy_find_lopair(dev, 2, 3, 0); b43legacy_phy_lo_adjust() 1348 pair = b43legacy_current_lopair(dev); b43legacy_phy_lo_adjust() 1349 b43legacy_lo_write(dev, pair); b43legacy_phy_lo_adjust() 1352 static void b43legacy_phy_lo_g_measure_txctl2(struct b43legacy_wldev dev) b43legacy_phy_lo_g_measure_txctl2() argument 1354 struct b43legacy_phy phy = &dev->phy; b43legacy_phy_lo_g_measure_txctl2() 1360 b43legacy_radio_write16(dev, 0x0052, 0x0000); b43legacy_phy_lo_g_measure_txctl2() 1362 smallest = b43legacy_phy_lo_g_singledeviation(dev, 0); b43legacy_phy_lo_g_measure_txctl2() 1364 b43legacy_radio_write16(dev, 0x0052, i); b43legacy_phy_lo_g_measure_txctl2() 1366 tmp = b43legacy_phy_lo_g_singledeviation(dev, 0); b43legacy_phy_lo_g_measure_txctl2() 1376 void b43legacy_phy_lo_g_state(struct b43legacy_wldev dev, b43legacy_phy_lo_g_state() argument 1409 b43legacy_lo_write(dev, &lowest_transition); b43legacy_phy_lo_g_state() 1410 lowest_deviation = b43legacy_phy_lo_g_singledeviation(dev, r27); b43legacy_phy_lo_g_state() 1439 b43legacy_lo_write(dev, &transition); b43legacy_phy_lo_g_state() 1440 tmp = b43legacy_phy_lo_g_singledeviation(dev, b43legacy_phy_lo_g_state() 1466 void b43legacy_phy_set_baseband_attenuation(struct b43legacy_wldev dev, b43legacy_phy_set_baseband_attenuation() argument 1469 struct b43legacy_phy phy = &dev->phy; b43legacy_phy_set_baseband_attenuation() 1473 value = (b43legacy_read16(dev, 0x03E6) & 0xFFF0); b43legacy_phy_set_baseband_attenuation() 1475 b43legacy_write16(dev, 0x03E6, value); b43legacy_phy_set_baseband_attenuation() 1480 value = b43legacy_phy_read(dev, 0x0060) & 0xFFC3; b43legacy_phy_set_baseband_attenuation() 1483 value = b43legacy_phy_read(dev, 0x0060) & 0xFF87; b43legacy_phy_set_baseband_attenuation() 1486 b43legacy_phy_write(dev, 0x0060, value); b43legacy_phy_set_baseband_attenuation() 1490 void b43legacy_phy_lo_g_measure(struct b43legacy_wldev dev) b43legacy_phy_lo_g_measure() argument 1493 const int is_initializing = (b43legacy_status(dev) b43legacy_phy_lo_g_measure() 1495 struct b43legacy_phy phy = &dev->phy; b43legacy_phy_lo_g_measure() 1513 regstack[0] = b43legacy_phy_read(dev, B43legacy_PHY_G_CRS); b43legacy_phy_lo_g_measure() 1514 regstack[1] = b43legacy_phy_read(dev, 0x0802); b43legacy_phy_lo_g_measure() 1515 b43legacy_phy_write(dev, B43legacy_PHY_G_CRS, regstack[0] b43legacy_phy_lo_g_measure() 1517 b43legacy_phy_write(dev, 0x0802, regstack[1] & 0xFFFC); b43legacy_phy_lo_g_measure() 1519 regstack[3] = b43legacy_read16(dev, 0x03E2); b43legacy_phy_lo_g_measure() 1520 b43legacy_write16(dev, 0x03E2, regstack[3] \| 0x8000); b43legacy_phy_lo_g_measure() 1521 regstack[4] = b43legacy_read16(dev, B43legacy_MMIO_CHANNEL_EXT); b43legacy_phy_lo_g_measure() 1522 regstack[5] = b43legacy_phy_read(dev, 0x15); b43legacy_phy_lo_g_measure() 1523 regstack[6] = b43legacy_phy_read(dev, 0x2A); b43legacy_phy_lo_g_measure() 1524 regstack[7] = b43legacy_phy_read(dev, 0x35); b43legacy_phy_lo_g_measure() 1525 regstack[8] = b43legacy_phy_read(dev, 0x60); b43legacy_phy_lo_g_measure() 1526 regstack[9] = b43legacy_radio_read16(dev, 0x43); b43legacy_phy_lo_g_measure() 1527 regstack[10] = b43legacy_radio_read16(dev, 0x7A); b43legacy_phy_lo_g_measure() 1528 regstack[11] = b43legacy_radio_read16(dev, 0x52); b43legacy_phy_lo_g_measure() 1530 regstack[12] = b43legacy_phy_read(dev, 0x0811); b43legacy_phy_lo_g_measure() 1531 regstack[13] = b43legacy_phy_read(dev, 0x0812); b43legacy_phy_lo_g_measure() 1532 regstack[14] = b43legacy_phy_read(dev, 0x0814); b43legacy_phy_lo_g_measure() 1533 regstack[15] = b43legacy_phy_read(dev, 0x0815); b43legacy_phy_lo_g_measure() 1535 b43legacy_radio_selectchannel(dev, 6, 0); b43legacy_phy_lo_g_measure() 1537 b43legacy_phy_write(dev, B43legacy_PHY_G_CRS, regstack[0] b43legacy_phy_lo_g_measure() 1539 b43legacy_phy_write(dev, 0x0802, regstack[1] & 0xFFFC); b43legacy_phy_lo_g_measure() 1540 b43legacy_dummy_transmission(dev); b43legacy_phy_lo_g_measure() 1542 b43legacy_radio_write16(dev, 0x0043, 0x0006); b43legacy_phy_lo_g_measure() 1544 b43legacy_phy_set_baseband_attenuation(dev, 2); b43legacy_phy_lo_g_measure() 1546 b43legacy_write16(dev, B43legacy_MMIO_CHANNEL_EXT, 0x0000); b43legacy_phy_lo_g_measure() 1547 b43legacy_phy_write(dev, 0x002E, 0x007F); b43legacy_phy_lo_g_measure() 1548 b43legacy_phy_write(dev, 0x080F, 0x0078); b43legacy_phy_lo_g_measure() 1549 b43legacy_phy_write(dev, 0x0035, regstack[7] & ~(1 << 7)); b43legacy_phy_lo_g_measure() 1550 b43legacy_radio_write16(dev, 0x007A, regstack[10] & 0xFFF0); b43legacy_phy_lo_g_measure() 1551 b43legacy_phy_write(dev, 0x002B, 0x0203); b43legacy_phy_lo_g_measure() 1552 b43legacy_phy_write(dev, 0x002A, 0x08A3); b43legacy_phy_lo_g_measure() 1554 b43legacy_phy_write(dev, 0x0814, regstack[14] \| 0x0003); b43legacy_phy_lo_g_measure() 1555 b43legacy_phy_write(dev, 0x0815, regstack[15] & 0xFFFC); b43legacy_phy_lo_g_measure() 1556 b43legacy_phy_write(dev, 0x0811, 0x01B3); b43legacy_phy_lo_g_measure() 1557 b43legacy_phy_write(dev, 0x0812, 0x00B2); b43legacy_phy_lo_g_measure() 1560 b43legacy_phy_lo_g_measure_txctl2(dev); b43legacy_phy_lo_g_measure() 1561 b43legacy_phy_write(dev, 0x080F, 0x8078); b43legacy_phy_lo_g_measure() 1605 b43legacy_radio_write16(dev, 0x43, i); b43legacy_phy_lo_g_measure() 1606 b43legacy_radio_write16(dev, 0x52, phy->txctl2); b43legacy_phy_lo_g_measure() 1610 b43legacy_phy_set_baseband_attenuation(dev, j * 2); b43legacy_phy_lo_g_measure() 1615 b43legacy_radio_write16(dev, 0x007A, tmp); b43legacy_phy_lo_g_measure() 1618 b43legacy_phy_lo_g_state(dev, &control, tmp_control, b43legacy_phy_lo_g_measure() 1652 b43legacy_radio_write16(dev, 0x43, i - 9); b43legacy_phy_lo_g_measure() 1655 b43legacy_radio_write16(dev, 0x52, b43legacy_phy_lo_g_measure() 1661 b43legacy_phy_set_baseband_attenuation(dev, j * 2); b43legacy_phy_lo_g_measure() 1666 b43legacy_radio_write16(dev, 0x7A, tmp); b43legacy_phy_lo_g_measure() 1669 b43legacy_phy_lo_g_state(dev, &control, tmp_control, b43legacy_phy_lo_g_measure() 1676 b43legacy_phy_write(dev, 0x0015, 0xE300); b43legacy_phy_lo_g_measure() 1677 b43legacy_phy_write(dev, 0x0812, (r27 << 8) \| 0xA0); b43legacy_phy_lo_g_measure() 1679 b43legacy_phy_write(dev, 0x0812, (r27 << 8) \| 0xA2); b43legacy_phy_lo_g_measure() 1681 b43legacy_phy_write(dev, 0x0812, (r27 << 8) \| 0xA3); b43legacy_phy_lo_g_measure() 1684 b43legacy_phy_write(dev, 0x0015, r27 \| 0xEFA0); b43legacy_phy_lo_g_measure() 1685 b43legacy_phy_lo_adjust(dev, is_initializing); b43legacy_phy_lo_g_measure() 1686 b43legacy_phy_write(dev, 0x002E, 0x807F); b43legacy_phy_lo_g_measure() 1688 b43legacy_phy_write(dev, 0x002F, 0x0202); b43legacy_phy_lo_g_measure() 1690 b43legacy_phy_write(dev, 0x002F, 0x0101); b43legacy_phy_lo_g_measure() 1691 b43legacy_write16(dev, B43legacy_MMIO_CHANNEL_EXT, regstack[4]); b43legacy_phy_lo_g_measure() 1692 b43legacy_phy_write(dev, 0x0015, regstack[5]); b43legacy_phy_lo_g_measure() 1693 b43legacy_phy_write(dev, 0x002A, regstack[6]); b43legacy_phy_lo_g_measure() 1694 b43legacy_phy_write(dev, 0x0035, regstack[7]); b43legacy_phy_lo_g_measure() 1695 b43legacy_phy_write(dev, 0x0060, regstack[8]); b43legacy_phy_lo_g_measure() 1696 b43legacy_radio_write16(dev, 0x0043, regstack[9]); b43legacy_phy_lo_g_measure() 1697 b43legacy_radio_write16(dev, 0x007A, regstack[10]); b43legacy_phy_lo_g_measure() 1699 regstack[11] \|= (b43legacy_radio_read16(dev, 0x52) & 0x000F); b43legacy_phy_lo_g_measure() 1700 b43legacy_radio_write16(dev, 0x52, regstack[11]); b43legacy_phy_lo_g_measure() 1701 b43legacy_write16(dev, 0x03E2, regstack[3]); b43legacy_phy_lo_g_measure() 1703 b43legacy_phy_write(dev, 0x0811, regstack[12]); b43legacy_phy_lo_g_measure() 1704 b43legacy_phy_write(dev, 0x0812, regstack[13]); b43legacy_phy_lo_g_measure() 1705 b43legacy_phy_write(dev, 0x0814, regstack[14]); b43legacy_phy_lo_g_measure() 1706 b43legacy_phy_write(dev, 0x0815, regstack[15]); b43legacy_phy_lo_g_measure() 1707 b43legacy_phy_write(dev, B43legacy_PHY_G_CRS, regstack[0]); b43legacy_phy_lo_g_measure() 1708 b43legacy_phy_write(dev, 0x0802, regstack[1]); b43legacy_phy_lo_g_measure() 1710 b43legacy_radio_selectchannel(dev, oldchannel, 1); b43legacy_phy_lo_g_measure() 1719 b43legacywarn(dev->wl, b43legacy_phy_lo_g_measure() 1729 void b43legacy_phy_lo_mark_current_used(struct b43legacy_wldev dev) b43legacy_phy_lo_mark_current_used() argument 1733 pair = b43legacy_current_lopair(dev); b43legacy_phy_lo_mark_current_used() 1737 void b43legacy_phy_lo_mark_all_unused(struct b43legacy_wldev dev) b43legacy_phy_lo_mark_all_unused() argument 1739 struct b43legacy_phy phy = &dev->phy; b43legacy_phy_lo_mark_all_unused() 1752 static s8 b43legacy_phy_estimate_power_out(struct b43legacy_wldev dev, s8 tssi) b43legacy_phy_estimate_power_out() argument 1754 struct b43legacy_phy phy = &dev->phy; b43legacy_phy_estimate_power_out() 1776 void b43legacy_phy_xmitpower(struct b43legacy_wldev dev) b43legacy_phy_xmitpower() argument 1778 struct b43legacy_phy phy = &dev->phy; b43legacy_phy_xmitpower() 1797 if ((dev->dev->bus->boardinfo.type == 0x0416) && b43legacy_phy_xmitpower() 1798 is_bcm_board_vendor(dev)) b43legacy_phy_xmitpower() 1807 tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 0x0058); b43legacy_phy_xmitpower() 1810 tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 0x005A); b43legacy_phy_xmitpower() 1816 tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, b43legacy_phy_xmitpower() 1820 tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, b43legacy_phy_xmitpower() 1832 b43legacy_radio_clear_tssi(dev); b43legacy_phy_xmitpower() 1836 if (tmp && (b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 0x005E) b43legacy_phy_xmitpower() 1840 estimated_pwr = b43legacy_phy_estimate_power_out(dev, average); b43legacy_phy_xmitpower() 1842 max_pwr = dev->dev->bus->sprom.maxpwr_bg; b43legacy_phy_xmitpower() 1844 if ((dev->dev->bus->sprom.boardflags_lo b43legacy_phy_xmitpower() 1849 b43legacywarn(dev->wl, "Invalid max-TX-power value in SPROM." b43legacy_phy_xmitpower() 1852 dev->dev->bus->sprom.maxpwr_bg = max_pwr; b43legacy_phy_xmitpower() 1863 - dev->dev->bus->sprom.antenna_gain.a0 b43legacy_phy_xmitpower() 1869 if (b43legacy_debug(dev, B43legacy_DBG_XMITPOWER)) b43legacy_phy_xmitpower() 1870 b43legacydbg(dev->wl, "Current TX power output: " Q52_FMT b43legacy_phy_xmitpower() 1884 b43legacy_phy_lo_mark_current_used(dev); b43legacy_phy_xmitpower() 1923 } else if (dev->dev->bus->sprom.boardflags_lo b43legacy_phy_xmitpower() 1948 b43legacy_phy_lock(dev); b43legacy_phy_xmitpower() 1949 b43legacy_radio_lock(dev); b43legacy_phy_xmitpower() 1950 b43legacy_radio_set_txpower_bg(dev, baseband_attenuation, b43legacy_phy_xmitpower() 1952 b43legacy_phy_lo_mark_current_used(dev); b43legacy_phy_xmitpower() 1953 b43legacy_radio_unlock(dev); b43legacy_phy_xmitpower() 1954 b43legacy_phy_unlock(dev); b43legacy_phy_xmitpower() 1994 int b43legacy_phy_init_tssi2dbm_table(struct b43legacy_wldev dev) b43legacy_phy_init_tssi2dbm_table() argument 1996 struct b43legacy_phy phy = &dev->phy; b43legacy_phy_init_tssi2dbm_table() 2005 pab0 = (s16)(dev->dev->bus->sprom.pa0b0); b43legacy_phy_init_tssi2dbm_table() 2006 pab1 = (s16)(dev->dev->bus->sprom.pa0b1); b43legacy_phy_init_tssi2dbm_table() 2007 pab2 = (s16)(dev->dev->bus->sprom.pa0b2); b43legacy_phy_init_tssi2dbm_table() 2009 if ((dev->dev->bus->chip_id == 0x4301) && (phy->radio_ver != 0x2050)) { b43legacy_phy_init_tssi2dbm_table() 2018 if ((s8)dev->dev->bus->sprom.itssi_bg != 0 && b43legacy_phy_init_tssi2dbm_table() 2019 (s8)dev->dev->bus->sprom.itssi_bg != -1) b43legacy_phy_init_tssi2dbm_table() 2020 phy->idle_tssi = (s8)(dev->dev->bus->sprom. b43legacy_phy_init_tssi2dbm_table() 2026 b43legacyerr(dev->wl, "Could not allocate memory " b43legacy_phy_init_tssi2dbm_table() 2034 b43legacyerr(dev->wl, "Could not generate " b43legacy_phy_init_tssi2dbm_table() 2058 int b43legacy_phy_init(struct b43legacy_wldev dev) b43legacy_phy_init() argument 2060 struct b43legacy_phy phy = &dev->phy; b43legacy_phy_init() 2067 b43legacy_phy_initb2(dev); b43legacy_phy_init() 2071 b43legacy_phy_initb4(dev); b43legacy_phy_init() 2075 b43legacy_phy_initb5(dev); b43legacy_phy_init() 2079 b43legacy_phy_initb6(dev); b43legacy_phy_init() 2085 b43legacy_phy_initg(dev); b43legacy_phy_init() 2090 b43legacyerr(dev->wl, "Unknown PHYTYPE found\n"); b43legacy_phy_init() 2095 void b43legacy_phy_set_antenna_diversity(struct b43legacy_wldev dev) b43legacy_phy_set_antenna_diversity() argument 2097 struct b43legacy_phy phy = &dev->phy; b43legacy_phy_set_antenna_diversity() 2109 ucodeflags = b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, b43legacy_phy_set_antenna_diversity() 2111 b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, b43legacy_phy_set_antenna_diversity() 2123 b43legacy_phy_write(dev, offset + 1, b43legacy_phy_set_antenna_diversity() 2124 (b43legacy_phy_read(dev, offset + 1) b43legacy_phy_set_antenna_diversity() 2132 b43legacy_phy_write(dev, offset + 0x2B, b43legacy_phy_set_antenna_diversity() 2133 (b43legacy_phy_read(dev, b43legacy_phy_set_antenna_diversity() 2140 b43legacy_phy_write(dev, 0x048C, b43legacy_phy_set_antenna_diversity() 2141 b43legacy_phy_read(dev, b43legacy_phy_set_antenna_diversity() 2144 b43legacy_phy_write(dev, 0x048C, b43legacy_phy_set_antenna_diversity() 2145 b43legacy_phy_read(dev, b43legacy_phy_set_antenna_diversity() 2148 b43legacy_phy_write(dev, 0x0461, b43legacy_phy_set_antenna_diversity() 2149 b43legacy_phy_read(dev, b43legacy_phy_set_antenna_diversity() 2151 b43legacy_phy_write(dev, 0x04AD, b43legacy_phy_set_antenna_diversity() 2152 (b43legacy_phy_read(dev, b43legacy_phy_set_antenna_diversity() 2156 b43legacy_phy_write(dev, 0x0427, b43legacy_phy_set_antenna_diversity() 2159 b43legacy_phy_write(dev, 0x0427, b43legacy_phy_set_antenna_diversity() 2160 (b43legacy_phy_read(dev, 0x0427) b43legacy_phy_set_antenna_diversity() 2163 b43legacy_phy_write(dev, 0x049B, 0x00DC); b43legacy_phy_set_antenna_diversity() 2166 b43legacy_phy_write(dev, 0x002B, b43legacy_phy_set_antenna_diversity() 2167 (b43legacy_phy_read(dev, b43legacy_phy_set_antenna_diversity() 2171 b43legacy_phy_write(dev, 0x0061, b43legacy_phy_set_antenna_diversity() 2172 b43legacy_phy_read(dev, b43legacy_phy_set_antenna_diversity() 2175 b43legacy_phy_write(dev, 0x0093, b43legacy_phy_set_antenna_diversity() 2177 b43legacy_phy_write(dev, 0x0027, b43legacy_phy_set_antenna_diversity() 2180 b43legacy_phy_write(dev, 0x0093, b43legacy_phy_set_antenna_diversity() 2182 b43legacy_phy_write(dev, 0x0027, b43legacy_phy_set_antenna_diversity() 2183 (b43legacy_phy_read(dev, 0x0027) b43legacy_phy_set_antenna_diversity() 2190 if (dev->dev->id.revision == 2) b43legacy_phy_set_antenna_diversity() 2194 b43legacy_phy_write(dev, 0x03E2, b43legacy_phy_set_antenna_diversity() 2195 (b43legacy_phy_read(dev, 0x03E2) b43legacy_phy_set_antenna_diversity() 2203 ucodeflags = b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, b43legacy_phy_set_antenna_diversity() 2205 b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, b43legacy_phy_set_antenna_diversity() 2219 void b43legacy_power_saving_ctl_bits(struct b43legacy_wldev dev, b43legacy_power_saving_ctl_bits() argument 2240 status = b43legacy_read32(dev, B43legacy_MMIO_MACCTL); b43legacy_power_saving_ctl_bits() 2249 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, status); b43legacy_power_saving_ctl_bits() 2250 if (bit26 && dev->dev->id.revision >= 5) { b43legacy_power_saving_ctl_bits() 2252 if (b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, b43legacy_power_saving_ctl_bits()
H A D	sysfs.h	`6 int b43legacy_sysfs_register(struct b43legacy_wldev dev); 7 void b43legacy_sysfs_unregister(struct b43legacy_wldev dev);`
H A D	main.c	163 static void b43legacy_wireless_core_exit(struct b43legacy_wldev dev); 164 static int b43legacy_wireless_core_init(struct b43legacy_wldev dev); 165 static void b43legacy_wireless_core_stop(struct b43legacy_wldev dev); 166 static int b43legacy_wireless_core_start(struct b43legacy_wldev dev); 255 static void b43legacy_ram_write(struct b43legacy_wldev dev, u16 offset, b43legacy_ram_write() argument 262 status = b43legacy_read32(dev, B43legacy_MMIO_MACCTL); b43legacy_ram_write() 266 b43legacy_write32(dev, B43legacy_MMIO_RAM_CONTROL, offset); b43legacy_ram_write() 268 b43legacy_write32(dev, B43legacy_MMIO_RAM_DATA, val); b43legacy_ram_write() 272 void b43legacy_shm_control_word(struct b43legacy_wldev dev, b43legacy_shm_control_word() argument 282 b43legacy_write32(dev, B43legacy_MMIO_SHM_CONTROL, control); b43legacy_shm_control_word() 285 u32 b43legacy_shm_read32(struct b43legacy_wldev dev, b43legacy_shm_read32() argument 294 b43legacy_shm_control_word(dev, routing, offset >> 2); b43legacy_shm_read32() 295 ret = b43legacy_read16(dev, b43legacy_shm_read32() 298 b43legacy_shm_control_word(dev, routing, b43legacy_shm_read32() 300 ret \|= b43legacy_read16(dev, B43legacy_MMIO_SHM_DATA); b43legacy_shm_read32() 306 b43legacy_shm_control_word(dev, routing, offset); b43legacy_shm_read32() 307 ret = b43legacy_read32(dev, B43legacy_MMIO_SHM_DATA); b43legacy_shm_read32() 312 u16 b43legacy_shm_read16(struct b43legacy_wldev dev, b43legacy_shm_read16() argument 321 b43legacy_shm_control_word(dev, routing, offset >> 2); b43legacy_shm_read16() 322 ret = b43legacy_read16(dev, b43legacy_shm_read16() 329 b43legacy_shm_control_word(dev, routing, offset); b43legacy_shm_read16() 330 ret = b43legacy_read16(dev, B43legacy_MMIO_SHM_DATA); b43legacy_shm_read16() 335 void b43legacy_shm_write32(struct b43legacy_wldev dev, b43legacy_shm_write32() argument 343 b43legacy_shm_control_word(dev, routing, offset >> 2); b43legacy_shm_write32() 345 b43legacy_write16(dev, b43legacy_shm_write32() 349 b43legacy_shm_control_word(dev, routing, b43legacy_shm_write32() 352 b43legacy_write16(dev, B43legacy_MMIO_SHM_DATA, b43legacy_shm_write32() 358 b43legacy_shm_control_word(dev, routing, offset); b43legacy_shm_write32() 360 b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA, value); b43legacy_shm_write32() 363 void b43legacy_shm_write16(struct b43legacy_wldev dev, u16 routing, u16 offset, b43legacy_shm_write16() argument 370 b43legacy_shm_control_word(dev, routing, offset >> 2); b43legacy_shm_write16() 372 b43legacy_write16(dev, b43legacy_shm_write16() 379 b43legacy_shm_control_word(dev, routing, offset); b43legacy_shm_write16() 381 b43legacy_write16(dev, B43legacy_MMIO_SHM_DATA, value); b43legacy_shm_write16() 385 u32 b43legacy_hf_read(struct b43legacy_wldev dev) b43legacy_hf_read() argument 389 ret = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, b43legacy_hf_read() 392 ret \|= b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, b43legacy_hf_read() 399 void b43legacy_hf_write(struct b43legacy_wldev dev, u32 value) b43legacy_hf_write() argument 401 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, b43legacy_hf_write() 404 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, b43legacy_hf_write() 409 void b43legacy_tsf_read(struct b43legacy_wldev dev, u64 tsf) b43legacy_tsf_read() argument 417 if (dev->dev->id.revision >= 3) { b43legacy_tsf_read() 423 high = b43legacy_read32(dev, b43legacy_tsf_read() 425 low = b43legacy_read32(dev, b43legacy_tsf_read() 427 high2 = b43legacy_read32(dev, b43legacy_tsf_read() 445 v3 = b43legacy_read16(dev, B43legacy_MMIO_TSF_3); b43legacy_tsf_read() 446 v2 = b43legacy_read16(dev, B43legacy_MMIO_TSF_2); b43legacy_tsf_read() 447 v1 = b43legacy_read16(dev, B43legacy_MMIO_TSF_1); b43legacy_tsf_read() 448 v0 = b43legacy_read16(dev, B43legacy_MMIO_TSF_0); b43legacy_tsf_read() 450 test3 = b43legacy_read16(dev, B43legacy_MMIO_TSF_3); b43legacy_tsf_read() 451 test2 = b43legacy_read16(dev, B43legacy_MMIO_TSF_2); b43legacy_tsf_read() 452 test1 = b43legacy_read16(dev, B43legacy_MMIO_TSF_1); b43legacy_tsf_read() 467 static void b43legacy_time_lock(struct b43legacy_wldev dev) b43legacy_time_lock() argument 471 status = b43legacy_read32(dev, B43legacy_MMIO_MACCTL); b43legacy_time_lock() 473 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, status); b43legacy_time_lock() 477 static void b43legacy_time_unlock(struct b43legacy_wldev dev) b43legacy_time_unlock() argument 481 status = b43legacy_read32(dev, B43legacy_MMIO_MACCTL); b43legacy_time_unlock() 483 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, status); b43legacy_time_unlock() 486 static void b43legacy_tsf_write_locked(struct b43legacy_wldev dev, u64 tsf) b43legacy_tsf_write_locked() argument 492 if (dev->dev->id.revision >= 3) { b43legacy_tsf_write_locked() 496 b43legacy_write32(dev, B43legacy_MMIO_REV3PLUS_TSF_LOW, 0); b43legacy_tsf_write_locked() 498 b43legacy_write32(dev, B43legacy_MMIO_REV3PLUS_TSF_HIGH, b43legacy_tsf_write_locked() 501 b43legacy_write32(dev, B43legacy_MMIO_REV3PLUS_TSF_LOW, b43legacy_tsf_write_locked() 509 b43legacy_write16(dev, B43legacy_MMIO_TSF_0, 0); b43legacy_tsf_write_locked() 511 b43legacy_write16(dev, B43legacy_MMIO_TSF_3, v3); b43legacy_tsf_write_locked() 513 b43legacy_write16(dev, B43legacy_MMIO_TSF_2, v2); b43legacy_tsf_write_locked() 515 b43legacy_write16(dev, B43legacy_MMIO_TSF_1, v1); b43legacy_tsf_write_locked() 517 b43legacy_write16(dev, B43legacy_MMIO_TSF_0, v0); b43legacy_tsf_write_locked() 521 void b43legacy_tsf_write(struct b43legacy_wldev dev, u64 tsf) b43legacy_tsf_write() argument 523 b43legacy_time_lock(dev); b43legacy_tsf_write() 524 b43legacy_tsf_write_locked(dev, tsf); b43legacy_tsf_write() 525 b43legacy_time_unlock(dev); b43legacy_tsf_write() 529 void b43legacy_macfilter_set(struct b43legacy_wldev dev, b43legacy_macfilter_set() argument 539 b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_CONTROL, offset); b43legacy_macfilter_set() 543 b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_DATA, data); b43legacy_macfilter_set() 546 b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_DATA, data); b43legacy_macfilter_set() 549 b43legacy_write16(dev, B43legacy_MMIO_MACFILTER_DATA, data); b43legacy_macfilter_set() 552 static void b43legacy_write_mac_bssid_templates(struct b43legacy_wldev dev) b43legacy_write_mac_bssid_templates() argument 555 const u8 mac = dev->wl->mac_addr; b43legacy_write_mac_bssid_templates() 556 const u8 bssid = dev->wl->bssid; b43legacy_write_mac_bssid_templates() 566 b43legacy_macfilter_set(dev, B43legacy_MACFILTER_BSSID, bssid); b43legacy_write_mac_bssid_templates() 577 b43legacy_ram_write(dev, 0x20 + i, tmp); b43legacy_write_mac_bssid_templates() 578 b43legacy_ram_write(dev, 0x78 + i, tmp); b43legacy_write_mac_bssid_templates() 579 b43legacy_ram_write(dev, 0x478 + i, tmp); b43legacy_write_mac_bssid_templates() 583 static void b43legacy_upload_card_macaddress(struct b43legacy_wldev dev) b43legacy_upload_card_macaddress() argument 585 b43legacy_write_mac_bssid_templates(dev); b43legacy_upload_card_macaddress() 586 b43legacy_macfilter_set(dev, B43legacy_MACFILTER_SELF, b43legacy_upload_card_macaddress() 587 dev->wl->mac_addr); b43legacy_upload_card_macaddress() 590 static void b43legacy_set_slot_time(struct b43legacy_wldev dev, b43legacy_set_slot_time() argument 594 if (dev->phy.type != B43legacy_PHYTYPE_G) b43legacy_set_slot_time() 596 b43legacy_write16(dev, 0x684, 510 + slot_time); b43legacy_set_slot_time() 597 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0010, b43legacy_set_slot_time() 601 static void b43legacy_short_slot_timing_enable(struct b43legacy_wldev dev) b43legacy_short_slot_timing_enable() argument 603 b43legacy_set_slot_time(dev, 9); b43legacy_short_slot_timing_enable() 606 static void b43legacy_short_slot_timing_disable(struct b43legacy_wldev dev) b43legacy_short_slot_timing_disable() argument 608 b43legacy_set_slot_time(dev, 20); b43legacy_short_slot_timing_disable() 615 static void b43legacy_synchronize_irq(struct b43legacy_wldev dev) b43legacy_synchronize_irq() argument 617 synchronize_irq(dev->dev->irq); b43legacy_synchronize_irq() 618 tasklet_kill(&dev->isr_tasklet); b43legacy_synchronize_irq() 624 void b43legacy_dummy_transmission(struct b43legacy_wldev dev) b43legacy_dummy_transmission() argument 626 struct b43legacy_phy phy = &dev->phy; b43legacy_dummy_transmission() 650 b43legacy_ram_write(dev, i 4, buffer[i]); b43legacy_dummy_transmission() 653 b43legacy_read32(dev, B43legacy_MMIO_MACCTL); b43legacy_dummy_transmission() 655 b43legacy_write16(dev, 0x0568, 0x0000); b43legacy_dummy_transmission() 656 b43legacy_write16(dev, 0x07C0, 0x0000); b43legacy_dummy_transmission() 657 b43legacy_write16(dev, 0x050C, 0x0000); b43legacy_dummy_transmission() 658 b43legacy_write16(dev, 0x0508, 0x0000); b43legacy_dummy_transmission() 659 b43legacy_write16(dev, 0x050A, 0x0000); b43legacy_dummy_transmission() 660 b43legacy_write16(dev, 0x054C, 0x0000); b43legacy_dummy_transmission() 661 b43legacy_write16(dev, 0x056A, 0x0014); b43legacy_dummy_transmission() 662 b43legacy_write16(dev, 0x0568, 0x0826); b43legacy_dummy_transmission() 663 b43legacy_write16(dev, 0x0500, 0x0000); b43legacy_dummy_transmission() 664 b43legacy_write16(dev, 0x0502, 0x0030); b43legacy_dummy_transmission() 667 b43legacy_radio_write16(dev, 0x0051, 0x0017); b43legacy_dummy_transmission() 669 value = b43legacy_read16(dev, 0x050E); b43legacy_dummy_transmission() 675 value = b43legacy_read16(dev, 0x050E); b43legacy_dummy_transmission() 681 value = b43legacy_read16(dev, 0x0690); b43legacy_dummy_transmission() 687 b43legacy_radio_write16(dev, 0x0051, 0x0037); b43legacy_dummy_transmission() 691 static void b43legacy_switch_analog(struct b43legacy_wldev dev, int on) b43legacy_switch_analog() argument 693 b43legacy_write16(dev, B43legacy_MMIO_PHY0, on ? 0 : 0xF4); b43legacy_switch_analog() 696 void b43legacy_wireless_core_reset(struct b43legacy_wldev dev, u32 flags) b43legacy_wireless_core_reset() argument 703 ssb_device_enable(dev->dev, flags); b43legacy_wireless_core_reset() 707 tmslow = ssb_read32(dev->dev, SSB_TMSLOW); b43legacy_wireless_core_reset() 710 ssb_write32(dev->dev, SSB_TMSLOW, tmslow); b43legacy_wireless_core_reset() 711 ssb_read32(dev->dev, SSB_TMSLOW); /* flush / b43legacy_wireless_core_reset() 714 ssb_write32(dev->dev, SSB_TMSLOW, tmslow); b43legacy_wireless_core_reset() 715 ssb_read32(dev->dev, SSB_TMSLOW); / flush / b43legacy_wireless_core_reset() 719 b43legacy_switch_analog(dev, 1); b43legacy_wireless_core_reset() 721 macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL); b43legacy_wireless_core_reset() 725 dev->phy.gmode = true; b43legacy_wireless_core_reset() 727 dev->phy.gmode = false; b43legacy_wireless_core_reset() 729 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl); b43legacy_wireless_core_reset() 732 static void handle_irq_transmit_status(struct b43legacy_wldev dev) handle_irq_transmit_status() argument 740 v0 = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_0); handle_irq_transmit_status() 743 v1 = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_1); handle_irq_transmit_status() 757 b43legacy_handle_txstatus(dev, &stat); handle_irq_transmit_status() 761 static void drain_txstatus_queue(struct b43legacy_wldev dev) drain_txstatus_queue() argument 765 if (dev->dev->id.revision < 5) drain_txstatus_queue() 771 dummy = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_0); drain_txstatus_queue() 774 dummy = b43legacy_read32(dev, B43legacy_MMIO_XMITSTAT_1); drain_txstatus_queue() 778 static u32 b43legacy_jssi_read(struct b43legacy_wldev dev) b43legacy_jssi_read() argument 782 val = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 0x40A); b43legacy_jssi_read() 784 val \|= b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, 0x408); b43legacy_jssi_read() 789 static void b43legacy_jssi_write(struct b43legacy_wldev dev, u32 jssi) b43legacy_jssi_write() argument 791 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x408, b43legacy_jssi_write() 793 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x40A, b43legacy_jssi_write() 797 static void b43legacy_generate_noise_sample(struct b43legacy_wldev dev) b43legacy_generate_noise_sample() argument 799 b43legacy_jssi_write(dev, 0x7F7F7F7F); b43legacy_generate_noise_sample() 800 b43legacy_write32(dev, B43legacy_MMIO_MACCMD, b43legacy_generate_noise_sample() 801 b43legacy_read32(dev, B43legacy_MMIO_MACCMD) b43legacy_generate_noise_sample() 803 B43legacy_WARN_ON(dev->noisecalc.channel_at_start != b43legacy_generate_noise_sample() 804 dev->phy.channel); b43legacy_generate_noise_sample() 807 static void b43legacy_calculate_link_quality(struct b43legacy_wldev dev) b43legacy_calculate_link_quality() argument 811 if (dev->noisecalc.calculation_running) b43legacy_calculate_link_quality() 813 dev->noisecalc.channel_at_start = dev->phy.channel; b43legacy_calculate_link_quality() 814 dev->noisecalc.calculation_running = true; b43legacy_calculate_link_quality() 815 dev->noisecalc.nr_samples = 0; b43legacy_calculate_link_quality() 817 b43legacy_generate_noise_sample(dev); b43legacy_calculate_link_quality() 820 static void handle_irq_noise(struct b43legacy_wldev dev) handle_irq_noise() argument 822 struct b43legacy_phy phy = &dev->phy; handle_irq_noise() 831 B43legacy_WARN_ON(!dev->noisecalc.calculation_running); handle_irq_noise() 832 if (dev->noisecalc.channel_at_start != phy->channel) handle_irq_noise() 834 ((__le32 )noise) = cpu_to_le32(b43legacy_jssi_read(dev)); handle_irq_noise() 840 B43legacy_WARN_ON(dev->noisecalc.nr_samples >= 8); handle_irq_noise() 841 i = dev->noisecalc.nr_samples; handle_irq_noise() 846 dev->noisecalc.samples[i][0] = phy->nrssi_lt[noise[0]]; handle_irq_noise() 847 dev->noisecalc.samples[i][1] = phy->nrssi_lt[noise[1]]; handle_irq_noise() 848 dev->noisecalc.samples[i][2] = phy->nrssi_lt[noise[2]]; handle_irq_noise() 849 dev->noisecalc.samples[i][3] = phy->nrssi_lt[noise[3]]; handle_irq_noise() 850 dev->noisecalc.nr_samples++; handle_irq_noise() 851 if (dev->noisecalc.nr_samples == 8) { handle_irq_noise() 856 average += dev->noisecalc.samples[i][j]; handle_irq_noise() 862 tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, handle_irq_noise() 874 dev->stats.link_noise = average; handle_irq_noise() 876 dev->noisecalc.calculation_running = false; handle_irq_noise() 880 b43legacy_generate_noise_sample(dev); handle_irq_noise() 883 static void handle_irq_tbtt_indication(struct b43legacy_wldev dev) handle_irq_tbtt_indication() argument 885 if (b43legacy_is_mode(dev->wl, NL80211_IFTYPE_AP)) { handle_irq_tbtt_indication() 889 b43legacy_power_saving_ctl_bits(dev, -1, -1); handle_irq_tbtt_indication() 891 if (b43legacy_is_mode(dev->wl, NL80211_IFTYPE_ADHOC)) handle_irq_tbtt_indication() 892 dev->dfq_valid = true; handle_irq_tbtt_indication() 895 static void handle_irq_atim_end(struct b43legacy_wldev dev) handle_irq_atim_end() argument 897 if (dev->dfq_valid) { handle_irq_atim_end() 898 b43legacy_write32(dev, B43legacy_MMIO_MACCMD, handle_irq_atim_end() 899 b43legacy_read32(dev, B43legacy_MMIO_MACCMD) handle_irq_atim_end() 901 dev->dfq_valid = false; handle_irq_atim_end() 905 static void handle_irq_pmq(struct b43legacy_wldev dev) handle_irq_pmq() argument 912 tmp = b43legacy_read32(dev, B43legacy_MMIO_PS_STATUS); handle_irq_pmq() 917 b43legacy_write16(dev, B43legacy_MMIO_PS_STATUS, 0x0002); handle_irq_pmq() 920 static void b43legacy_write_template_common(struct b43legacy_wldev dev, b43legacy_write_template_common() argument 931 b43legacy_ram_write(dev, ram_offset, le32_to_cpu(plcp.data)); b43legacy_write_template_common() 938 b43legacy_ram_write(dev, ram_offset, tmp); b43legacy_write_template_common() 948 b43legacy_ram_write(dev, ram_offset + i - 2, tmp); b43legacy_write_template_common() 950 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_size_offset, b43legacy_write_template_common() 966 static void b43legacy_write_beacon_template(struct b43legacy_wldev dev, b43legacy_write_beacon_template() argument 978 struct ieee80211_tx_info info = IEEE80211_SKB_CB(dev->wl->current_beacon); b43legacy_write_beacon_template() 980 bcn = (const struct ieee80211_mgmt )(dev->wl->current_beacon->data); b43legacy_write_beacon_template() 981 len = min_t(size_t, dev->wl->current_beacon->len, b43legacy_write_beacon_template() 983 rate = ieee80211_get_tx_rate(dev->wl->hw, info)->hw_value; b43legacy_write_beacon_template() 985 b43legacy_write_template_common(dev, (const u8 )bcn, len, ram_offset, b43legacy_write_beacon_template() 991 ctl = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, b43legacy_write_beacon_template() 999 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, b43legacy_write_beacon_template() 1031 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, b43legacy_write_beacon_template() 1033 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, b43legacy_write_beacon_template() 1040 b43legacywarn(dev->wl, "Did not find a valid TIM IE in the " b43legacy_write_beacon_template() 1044 b43legacydbg(dev->wl, "Updated beacon template\n"); b43legacy_write_beacon_template() 1047 static void b43legacy_write_probe_resp_plcp(struct b43legacy_wldev dev, b43legacy_write_probe_resp_plcp() argument 1057 dur = ieee80211_generic_frame_duration(dev->wl->hw, b43legacy_write_probe_resp_plcp() 1058 dev->wl->vif, b43legacy_write_probe_resp_plcp() 1064 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_offset, b43legacy_write_probe_resp_plcp() 1066 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_offset + 2, b43legacy_write_probe_resp_plcp() 1068 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, shm_offset + 6, b43legacy_write_probe_resp_plcp() 1078 static const u8 b43legacy_generate_probe_resp(struct b43legacy_wldev dev, b43legacy_generate_probe_resp() argument 1089 src_size = dev->wl->current_beacon->len; b43legacy_generate_probe_resp() 1090 src_data = (const u8 )dev->wl->current_beacon->data; b43legacy_generate_probe_resp() 1123 dur = ieee80211_generic_frame_duration(dev->wl->hw, b43legacy_generate_probe_resp() 1124 dev->wl->vif, b43legacy_generate_probe_resp() 1133 static void b43legacy_write_probe_resp_template(struct b43legacy_wldev dev, b43legacy_write_probe_resp_template() argument 1141 size = dev->wl->current_beacon->len; b43legacy_write_probe_resp_template() 1142 probe_resp_data = b43legacy_generate_probe_resp(dev, &size, rate); b43legacy_write_probe_resp_template() 1149 b43legacy_write_probe_resp_plcp(dev, 0x31A, size, b43legacy_write_probe_resp_template() 1151 b43legacy_write_probe_resp_plcp(dev, 0x32C, size, b43legacy_write_probe_resp_template() 1153 b43legacy_write_probe_resp_plcp(dev, 0x33E, size, b43legacy_write_probe_resp_template() 1155 b43legacy_write_probe_resp_plcp(dev, 0x350, size, b43legacy_write_probe_resp_template() 1160 b43legacy_write_template_common(dev, probe_resp_data, b43legacy_write_probe_resp_template() 1166 static void b43legacy_upload_beacon0(struct b43legacy_wldev dev) b43legacy_upload_beacon0() argument 1168 struct b43legacy_wl wl = dev->wl; b43legacy_upload_beacon0() 1172 b43legacy_write_beacon_template(dev, 0x68, 0x18); b43legacy_upload_beacon0() 1175 b43legacy_write_probe_resp_template(dev, 0x268, 0x4A, b43legacy_upload_beacon0() 1180 static void b43legacy_upload_beacon1(struct b43legacy_wldev dev) b43legacy_upload_beacon1() argument 1182 struct b43legacy_wl wl = dev->wl; b43legacy_upload_beacon1() 1186 b43legacy_write_beacon_template(dev, 0x468, 0x1A); b43legacy_upload_beacon1() 1190 static void handle_irq_beacon(struct b43legacy_wldev dev) handle_irq_beacon() argument 1192 struct b43legacy_wl wl = dev->wl; handle_irq_beacon() 1201 dev->irq_mask &= ~B43legacy_IRQ_BEACON; handle_irq_beacon() 1203 cmd = b43legacy_read32(dev, B43legacy_MMIO_MACCMD); handle_irq_beacon() 1209 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON, B43legacy_IRQ_BEACON); handle_irq_beacon() 1210 dev->irq_mask \|= B43legacy_IRQ_BEACON; handle_irq_beacon() 1218 b43legacy_upload_beacon0(dev); handle_irq_beacon() 1219 b43legacy_upload_beacon1(dev); handle_irq_beacon() 1220 cmd = b43legacy_read32(dev, B43legacy_MMIO_MACCMD); handle_irq_beacon() 1222 b43legacy_write32(dev, B43legacy_MMIO_MACCMD, cmd); handle_irq_beacon() 1225 b43legacy_upload_beacon0(dev); handle_irq_beacon() 1226 cmd = b43legacy_read32(dev, B43legacy_MMIO_MACCMD); handle_irq_beacon() 1228 b43legacy_write32(dev, B43legacy_MMIO_MACCMD, cmd); handle_irq_beacon() 1230 b43legacy_upload_beacon1(dev); handle_irq_beacon() 1231 cmd = b43legacy_read32(dev, B43legacy_MMIO_MACCMD); handle_irq_beacon() 1233 b43legacy_write32(dev, B43legacy_MMIO_MACCMD, cmd); handle_irq_beacon() 1242 struct b43legacy_wldev dev; b43legacy_beacon_update_trigger_work() local 1245 dev = wl->current_dev; b43legacy_beacon_update_trigger_work() 1246 if (likely(dev && (b43legacy_status(dev) >= B43legacy_STAT_INITIALIZED))) { b43legacy_beacon_update_trigger_work() 1249 handle_irq_beacon(dev); b43legacy_beacon_update_trigger_work() 1251 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, b43legacy_beacon_update_trigger_work() 1252 dev->irq_mask); b43legacy_beacon_update_trigger_work() 1285 static void b43legacy_set_beacon_int(struct b43legacy_wldev dev, b43legacy_set_beacon_int() argument 1288 b43legacy_time_lock(dev); b43legacy_set_beacon_int() 1289 if (dev->dev->id.revision >= 3) { b43legacy_set_beacon_int() 1290 b43legacy_write32(dev, B43legacy_MMIO_TSF_CFP_REP, b43legacy_set_beacon_int() 1292 b43legacy_write32(dev, B43legacy_MMIO_TSF_CFP_START, b43legacy_set_beacon_int() 1295 b43legacy_write16(dev, 0x606, (beacon_int >> 6)); b43legacy_set_beacon_int() 1296 b43legacy_write16(dev, 0x610, beacon_int); b43legacy_set_beacon_int() 1298 b43legacy_time_unlock(dev); b43legacy_set_beacon_int() 1299 b43legacydbg(dev->wl, "Set beacon interval to %u\n", beacon_int); b43legacy_set_beacon_int() 1302 static void handle_irq_ucode_debug(struct b43legacy_wldev dev) handle_irq_ucode_debug() argument 1307 static void b43legacy_interrupt_tasklet(struct b43legacy_wldev dev) b43legacy_interrupt_tasklet() argument 1310 u32 dma_reason[ARRAY_SIZE(dev->dma_reason)]; b43legacy_interrupt_tasklet() 1315 spin_lock_irqsave(&dev->wl->irq_lock, flags); b43legacy_interrupt_tasklet() 1317 B43legacy_WARN_ON(b43legacy_status(dev) < b43legacy_interrupt_tasklet() 1320 reason = dev->irq_reason; b43legacy_interrupt_tasklet() 1322 dma_reason[i] = dev->dma_reason[i]; b43legacy_interrupt_tasklet() 1327 b43legacyerr(dev->wl, "MAC transmission error\n"); b43legacy_interrupt_tasklet() 1330 b43legacyerr(dev->wl, "PHY transmission error\n"); b43legacy_interrupt_tasklet() 1332 if (unlikely(atomic_dec_and_test(&dev->phy.txerr_cnt))) { b43legacy_interrupt_tasklet() 1333 b43legacyerr(dev->wl, "Too many PHY TX errors, " b43legacy_interrupt_tasklet() 1335 b43legacy_controller_restart(dev, "PHY TX errors"); b43legacy_interrupt_tasklet() 1342 b43legacyerr(dev->wl, "Fatal DMA error: " b43legacy_interrupt_tasklet() 1348 b43legacy_controller_restart(dev, "DMA error"); b43legacy_interrupt_tasklet() 1350 spin_unlock_irqrestore(&dev->wl->irq_lock, flags); b43legacy_interrupt_tasklet() 1354 b43legacyerr(dev->wl, "DMA error: " b43legacy_interrupt_tasklet() 1363 handle_irq_ucode_debug(dev); b43legacy_interrupt_tasklet() 1365 handle_irq_tbtt_indication(dev); b43legacy_interrupt_tasklet() 1367 handle_irq_atim_end(dev); b43legacy_interrupt_tasklet() 1369 handle_irq_beacon(dev); b43legacy_interrupt_tasklet() 1371 handle_irq_pmq(dev); b43legacy_interrupt_tasklet() 1375 handle_irq_noise(dev); b43legacy_interrupt_tasklet() 1379 if (b43legacy_using_pio(dev)) b43legacy_interrupt_tasklet() 1380 b43legacy_pio_rx(dev->pio.queue0); b43legacy_interrupt_tasklet() 1382 b43legacy_dma_rx(dev->dma.rx_ring0); b43legacy_interrupt_tasklet() 1387 if (b43legacy_using_pio(dev)) b43legacy_interrupt_tasklet() 1388 b43legacy_pio_rx(dev->pio.queue3); b43legacy_interrupt_tasklet() 1390 b43legacy_dma_rx(dev->dma.rx_ring3); b43legacy_interrupt_tasklet() 1396 handle_irq_transmit_status(dev); b43legacy_interrupt_tasklet() 1398 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, dev->irq_mask); b43legacy_interrupt_tasklet() 1400 spin_unlock_irqrestore(&dev->wl->irq_lock, flags); b43legacy_interrupt_tasklet() 1403 static void pio_irq_workaround(struct b43legacy_wldev dev, pio_irq_workaround() argument 1408 rxctl = b43legacy_read16(dev, base + B43legacy_PIO_RXCTL); pio_irq_workaround() 1410 dev->dma_reason[queueidx] \|= B43legacy_DMAIRQ_RX_DONE; pio_irq_workaround() 1412 dev->dma_reason[queueidx] &= ~B43legacy_DMAIRQ_RX_DONE; pio_irq_workaround() 1415 static void b43legacy_interrupt_ack(struct b43legacy_wldev dev, u32 reason) b43legacy_interrupt_ack() argument 1417 if (b43legacy_using_pio(dev) && b43legacy_interrupt_ack() 1418 (dev->dev->id.revision < 3) && b43legacy_interrupt_ack() 1421 pio_irq_workaround(dev, B43legacy_MMIO_PIO1_BASE, 0); b43legacy_interrupt_ack() 1422 pio_irq_workaround(dev, B43legacy_MMIO_PIO2_BASE, 1); b43legacy_interrupt_ack() 1423 pio_irq_workaround(dev, B43legacy_MMIO_PIO3_BASE, 2); b43legacy_interrupt_ack() 1424 pio_irq_workaround(dev, B43legacy_MMIO_PIO4_BASE, 3); b43legacy_interrupt_ack() 1427 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON, reason); b43legacy_interrupt_ack() 1429 b43legacy_write32(dev, B43legacy_MMIO_DMA0_REASON, b43legacy_interrupt_ack() 1430 dev->dma_reason[0]); b43legacy_interrupt_ack() 1431 b43legacy_write32(dev, B43legacy_MMIO_DMA1_REASON, b43legacy_interrupt_ack() 1432 dev->dma_reason[1]); b43legacy_interrupt_ack() 1433 b43legacy_write32(dev, B43legacy_MMIO_DMA2_REASON, b43legacy_interrupt_ack() 1434 dev->dma_reason[2]); b43legacy_interrupt_ack() 1435 b43legacy_write32(dev, B43legacy_MMIO_DMA3_REASON, b43legacy_interrupt_ack() 1436 dev->dma_reason[3]); b43legacy_interrupt_ack() 1437 b43legacy_write32(dev, B43legacy_MMIO_DMA4_REASON, b43legacy_interrupt_ack() 1438 dev->dma_reason[4]); b43legacy_interrupt_ack() 1439 b43legacy_write32(dev, B43legacy_MMIO_DMA5_REASON, b43legacy_interrupt_ack() 1440 dev->dma_reason[5]); b43legacy_interrupt_ack() 1447 struct b43legacy_wldev dev = dev_id; b43legacy_interrupt_handler() local 1450 B43legacy_WARN_ON(!dev); b43legacy_interrupt_handler() 1452 spin_lock(&dev->wl->irq_lock); b43legacy_interrupt_handler() 1454 if (unlikely(b43legacy_status(dev) < B43legacy_STAT_STARTED)) b43legacy_interrupt_handler() 1457 reason = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON); b43legacy_interrupt_handler() 1461 reason &= dev->irq_mask; b43legacy_interrupt_handler() 1465 dev->dma_reason[0] = b43legacy_read32(dev, b43legacy_interrupt_handler() 1468 dev->dma_reason[1] = b43legacy_read32(dev, b43legacy_interrupt_handler() 1471 dev->dma_reason[2] = b43legacy_read32(dev, b43legacy_interrupt_handler() 1474 dev->dma_reason[3] = b43legacy_read32(dev, b43legacy_interrupt_handler() 1477 dev->dma_reason[4] = b43legacy_read32(dev, b43legacy_interrupt_handler() 1480 dev->dma_reason[5] = b43legacy_read32(dev, b43legacy_interrupt_handler() 1484 b43legacy_interrupt_ack(dev, reason); b43legacy_interrupt_handler() 1486 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, 0); b43legacy_interrupt_handler() 1488 dev->irq_reason = reason; b43legacy_interrupt_handler() 1489 tasklet_schedule(&dev->isr_tasklet); b43legacy_interrupt_handler() 1492 spin_unlock(&dev->wl->irq_lock); b43legacy_interrupt_handler() 1497 static void b43legacy_release_firmware(struct b43legacy_wldev dev) b43legacy_release_firmware() argument 1499 release_firmware(dev->fw.ucode); b43legacy_release_firmware() 1500 dev->fw.ucode = NULL; b43legacy_release_firmware() 1501 release_firmware(dev->fw.pcm); b43legacy_release_firmware() 1502 dev->fw.pcm = NULL; b43legacy_release_firmware() 1503 release_firmware(dev->fw.initvals); b43legacy_release_firmware() 1504 dev->fw.initvals = NULL; b43legacy_release_firmware() 1505 release_firmware(dev->fw.initvals_band); b43legacy_release_firmware() 1506 dev->fw.initvals_band = NULL; b43legacy_release_firmware() 1518 struct b43legacy_wldev dev = context; b43legacy_fw_cb() local 1520 dev->fwp = firmware; b43legacy_fw_cb() 1521 complete(&dev->fw_load_complete); b43legacy_fw_cb() 1524 static int do_request_fw(struct b43legacy_wldev dev, do_request_fw() argument 1539 b43legacyinfo(dev->wl, "Loading firmware %s\n", path); do_request_fw() 1541 init_completion(&dev->fw_load_complete); do_request_fw() 1543 dev->dev->dev, GFP_KERNEL, do_request_fw() 1544 dev, b43legacy_fw_cb); do_request_fw() 1546 b43legacyerr(dev->wl, "Unable to load firmware\n"); do_request_fw() 1550 wait_for_completion(&dev->fw_load_complete); do_request_fw() 1551 if (!dev->fwp) do_request_fw() 1553 fw = dev->fwp; do_request_fw() 1555 err = request_firmware(fw, path, dev->dev->dev); do_request_fw() 1558 b43legacyerr(dev->wl, "Firmware file \"%s\" not found " do_request_fw() 1583 b43legacyerr(dev->wl, "Firmware file \"%s\" format error.\n", path); do_request_fw() 1587 static int b43legacy_one_core_attach(struct ssb_device dev, 1589 static void b43legacy_one_core_detach(struct ssb_device dev); 1595 struct b43legacy_wldev dev = wl->current_dev; b43legacy_request_firmware() local 1596 struct b43legacy_firmware fw = &dev->fw; b43legacy_request_firmware() 1597 const u8 rev = dev->dev->id.revision; b43legacy_request_firmware() 1608 err = do_request_fw(dev, filename, &fw->ucode, true); b43legacy_request_firmware() 1617 err = do_request_fw(dev, filename, &fw->pcm, false); b43legacy_request_firmware() 1622 switch (dev->phy.type) { b43legacy_request_firmware() 1635 err = do_request_fw(dev, filename, &fw->initvals, false); b43legacy_request_firmware() 1640 switch (dev->phy.type) { b43legacy_request_firmware() 1655 err = do_request_fw(dev, filename, &fw->initvals_band, false); b43legacy_request_firmware() 1665 b43legacy_one_core_detach(dev->dev); b43legacy_request_firmware() 1669 b43legacy_print_fw_helptext(dev->wl); b43legacy_request_firmware() 1674 b43legacyerr(dev->wl, "No Initial Values firmware file for PHY %u, " b43legacy_request_firmware() 1675 "core rev %u\n", dev->phy.type, rev); b43legacy_request_firmware() 1679 b43legacy_release_firmware(dev); b43legacy_request_firmware() 1683 static int b43legacy_upload_microcode(struct b43legacy_wldev dev) b43legacy_upload_microcode() argument 1685 struct wiphy wiphy = dev->wl->hw->wiphy; b43legacy_upload_microcode() 1698 macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL); b43legacy_upload_microcode() 1701 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl); b43legacy_upload_microcode() 1704 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS, i, 0); b43legacy_upload_microcode() 1706 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, i, 0); b43legacy_upload_microcode() 1709 data = (__be32 ) (dev->fw.ucode->data + hdr_len); b43legacy_upload_microcode() 1710 len = (dev->fw.ucode->size - hdr_len) / sizeof(__be32); b43legacy_upload_microcode() 1711 b43legacy_shm_control_word(dev, b43legacy_upload_microcode() 1716 b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA, b43legacy_upload_microcode() 1721 if (dev->fw.pcm) { b43legacy_upload_microcode() 1723 data = (__be32 ) (dev->fw.pcm->data + hdr_len); b43legacy_upload_microcode() 1724 len = (dev->fw.pcm->size - hdr_len) / sizeof(__be32); b43legacy_upload_microcode() 1725 b43legacy_shm_control_word(dev, B43legacy_SHM_HW, 0x01EA); b43legacy_upload_microcode() 1726 b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA, 0x00004000); b43legacy_upload_microcode() 1728 b43legacy_shm_control_word(dev, B43legacy_SHM_HW, 0x01EB); b43legacy_upload_microcode() 1730 b43legacy_write32(dev, B43legacy_MMIO_SHM_DATA, b43legacy_upload_microcode() 1736 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON, b43legacy_upload_microcode() 1740 macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL); b43legacy_upload_microcode() 1743 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl); b43legacy_upload_microcode() 1748 tmp = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON); b43legacy_upload_microcode() 1753 b43legacyerr(dev->wl, "Microcode not responding\n"); b43legacy_upload_microcode() 1754 b43legacy_print_fw_helptext(dev->wl); b43legacy_upload_microcode() 1765 b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON); b43legacy_upload_microcode() 1768 fwrev = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, b43legacy_upload_microcode() 1770 fwpatch = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, b43legacy_upload_microcode() 1772 fwdate = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, b43legacy_upload_microcode() 1774 fwtime = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, b43legacy_upload_microcode() 1778 b43legacyerr(dev->wl, "YOU ARE TRYING TO LOAD V4 FIRMWARE." b43legacy_upload_microcode() 1782 b43legacy_print_fw_helptext(dev->wl); b43legacy_upload_microcode() 1786 b43legacyinfo(dev->wl, "Loading firmware version 0x%X, patch level %u " b43legacy_upload_microcode() 1792 dev->fw.rev = fwrev; b43legacy_upload_microcode() 1793 dev->fw.patch = fwpatch; b43legacy_upload_microcode() 1796 dev->fw.rev, dev->fw.patch); b43legacy_upload_microcode() 1797 wiphy->hw_version = dev->dev->id.coreid; b43legacy_upload_microcode() 1802 macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL); b43legacy_upload_microcode() 1805 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl); b43legacy_upload_microcode() 1810 static int b43legacy_write_initvals(struct b43legacy_wldev dev, b43legacy_write_initvals() argument 1839 b43legacy_write32(dev, offset, value); b43legacy_write_initvals() 1852 b43legacy_write16(dev, offset, value); b43legacy_write_initvals() 1865 b43legacyerr(dev->wl, "Initial Values Firmware file-format error.\n"); b43legacy_write_initvals() 1866 b43legacy_print_fw_helptext(dev->wl); b43legacy_write_initvals() 1871 static int b43legacy_upload_initvals(struct b43legacy_wldev dev) b43legacy_upload_initvals() argument 1875 struct b43legacy_firmware fw = &dev->fw; b43legacy_upload_initvals() 1883 err = b43legacy_write_initvals(dev, ivals, count, b43legacy_upload_initvals() 1893 err = b43legacy_write_initvals(dev, ivals, count, b43legacy_upload_initvals() 1906 static int b43legacy_gpio_init(struct b43legacy_wldev dev) b43legacy_gpio_init() argument 1908 struct ssb_bus bus = dev->dev->bus; b43legacy_gpio_init() 1913 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, b43legacy_gpio_init() 1914 b43legacy_read32(dev, b43legacy_gpio_init() 1918 b43legacy_write16(dev, B43legacy_MMIO_GPIO_MASK, b43legacy_gpio_init() 1919 b43legacy_read16(dev, b43legacy_gpio_init() 1925 if (dev->dev->bus->chip_id == 0x4301) { b43legacy_gpio_init() 1929 if (dev->dev->bus->sprom.boardflags_lo & B43legacy_BFL_PACTRL) { b43legacy_gpio_init() 1930 b43legacy_write16(dev, B43legacy_MMIO_GPIO_MASK, b43legacy_gpio_init() 1931 b43legacy_read16(dev, b43legacy_gpio_init() 1937 if (dev->dev->id.revision >= 2) b43legacy_gpio_init() 1941 pcidev = bus->pcicore.dev; b43legacy_gpio_init() 1943 gpiodev = bus->chipco.dev ? : pcidev; b43legacy_gpio_init() 1954 static void b43legacy_gpio_cleanup(struct b43legacy_wldev dev) b43legacy_gpio_cleanup() argument 1956 struct ssb_bus bus = dev->dev->bus; b43legacy_gpio_cleanup() 1960 pcidev = bus->pcicore.dev; b43legacy_gpio_cleanup() 1962 gpiodev = bus->chipco.dev ? : pcidev; b43legacy_gpio_cleanup() 1969 void b43legacy_mac_enable(struct b43legacy_wldev dev) b43legacy_mac_enable() argument 1971 dev->mac_suspended--; b43legacy_mac_enable() 1972 B43legacy_WARN_ON(dev->mac_suspended < 0); b43legacy_mac_enable() 1974 if (dev->mac_suspended == 0) { b43legacy_mac_enable() 1975 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, b43legacy_mac_enable() 1976 b43legacy_read32(dev, b43legacy_mac_enable() 1979 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON, b43legacy_mac_enable() 1982 b43legacy_read32(dev, B43legacy_MMIO_MACCTL); b43legacy_mac_enable() 1983 b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON); b43legacy_mac_enable() 1984 b43legacy_power_saving_ctl_bits(dev, -1, -1); b43legacy_mac_enable() 1987 spin_lock_irq(&dev->wl->irq_lock); b43legacy_mac_enable() 1988 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, b43legacy_mac_enable() 1989 dev->irq_mask); b43legacy_mac_enable() 1990 spin_unlock_irq(&dev->wl->irq_lock); b43legacy_mac_enable() 1995 void b43legacy_mac_suspend(struct b43legacy_wldev dev) b43legacy_mac_suspend() argument 2002 B43legacy_WARN_ON(dev->mac_suspended < 0); b43legacy_mac_suspend() 2004 if (dev->mac_suspended == 0) { b43legacy_mac_suspend() 2007 spin_lock_irq(&dev->wl->irq_lock); b43legacy_mac_suspend() 2008 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, 0); b43legacy_mac_suspend() 2009 spin_unlock_irq(&dev->wl->irq_lock); b43legacy_mac_suspend() 2010 b43legacy_synchronize_irq(dev); b43legacy_mac_suspend() 2012 b43legacy_power_saving_ctl_bits(dev, -1, 1); b43legacy_mac_suspend() 2013 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, b43legacy_mac_suspend() 2014 b43legacy_read32(dev, b43legacy_mac_suspend() 2017 b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON); b43legacy_mac_suspend() 2019 tmp = b43legacy_read32(dev, b43legacy_mac_suspend() 2025 b43legacyerr(dev->wl, "MAC suspend failed\n"); b43legacy_mac_suspend() 2028 dev->mac_suspended++; b43legacy_mac_suspend() 2031 static void b43legacy_adjust_opmode(struct b43legacy_wldev dev) b43legacy_adjust_opmode() argument 2033 struct b43legacy_wl wl = dev->wl; b43legacy_adjust_opmode() 2037 ctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL); b43legacy_adjust_opmode() 2066 if (dev->dev->id.revision <= 4) b43legacy_adjust_opmode() 2069 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, ctl); b43legacy_adjust_opmode() 2074 if (dev->dev->bus->chip_id == 0x4306 && b43legacy_adjust_opmode() 2075 dev->dev->bus->chip_rev == 3) b43legacy_adjust_opmode() 2080 b43legacy_write16(dev, 0x612, cfp_pretbtt); b43legacy_adjust_opmode() 2083 static void b43legacy_rate_memory_write(struct b43legacy_wldev dev, b43legacy_rate_memory_write() argument 2096 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, offset + 0x20, b43legacy_rate_memory_write() 2097 b43legacy_shm_read16(dev, b43legacy_rate_memory_write() 2101 static void b43legacy_rate_memory_init(struct b43legacy_wldev dev) b43legacy_rate_memory_init() argument 2103 switch (dev->phy.type) { b43legacy_rate_memory_init() 2105 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_6MB, 1); b43legacy_rate_memory_init() 2106 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_12MB, 1); b43legacy_rate_memory_init() 2107 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_18MB, 1); b43legacy_rate_memory_init() 2108 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_24MB, 1); b43legacy_rate_memory_init() 2109 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_36MB, 1); b43legacy_rate_memory_init() 2110 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_48MB, 1); b43legacy_rate_memory_init() 2111 b43legacy_rate_memory_write(dev, B43legacy_OFDM_RATE_54MB, 1); b43legacy_rate_memory_init() 2114 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_1MB, 0); b43legacy_rate_memory_init() 2115 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_2MB, 0); b43legacy_rate_memory_init() 2116 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_5MB, 0); b43legacy_rate_memory_init() 2117 b43legacy_rate_memory_write(dev, B43legacy_CCK_RATE_11MB, 0); b43legacy_rate_memory_init() 2125 static void b43legacy_mgmtframe_txantenna(struct b43legacy_wldev dev, b43legacy_mgmtframe_txantenna() argument 2149 tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, b43legacy_mgmtframe_txantenna() 2152 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, b43legacy_mgmtframe_txantenna() 2155 tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, b43legacy_mgmtframe_txantenna() 2158 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, b43legacy_mgmtframe_txantenna() 2161 tmp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, b43legacy_mgmtframe_txantenna() 2164 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, b43legacy_mgmtframe_txantenna() 2169 static void b43legacy_chip_exit(struct b43legacy_wldev dev) b43legacy_chip_exit() argument 2171 b43legacy_radio_turn_off(dev, 1); b43legacy_chip_exit() 2172 b43legacy_gpio_cleanup(dev); b43legacy_chip_exit() 2179 static int b43legacy_chip_init(struct b43legacy_wldev dev) b43legacy_chip_init() argument 2181 struct b43legacy_phy phy = &dev->phy; b43legacy_chip_init() 2189 if (dev->phy.gmode) b43legacy_chip_init() 2192 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl); b43legacy_chip_init() 2194 err = b43legacy_upload_microcode(dev); b43legacy_chip_init() 2198 err = b43legacy_gpio_init(dev); b43legacy_chip_init() 2202 err = b43legacy_upload_initvals(dev); b43legacy_chip_init() 2205 b43legacy_radio_turn_on(dev); b43legacy_chip_init() 2207 b43legacy_write16(dev, 0x03E6, 0x0000); b43legacy_chip_init() 2208 err = b43legacy_phy_init(dev); b43legacy_chip_init() 2215 b43legacy_radio_set_interference_mitigation(dev, tmp); b43legacy_chip_init() 2217 b43legacy_phy_set_antenna_diversity(dev); b43legacy_chip_init() 2218 b43legacy_mgmtframe_txantenna(dev, B43legacy_ANTENNA_DEFAULT); b43legacy_chip_init() 2221 value16 = b43legacy_read16(dev, 0x005E); b43legacy_chip_init() 2223 b43legacy_write16(dev, 0x005E, value16); b43legacy_chip_init() 2225 b43legacy_write32(dev, 0x0100, 0x01000000); b43legacy_chip_init() 2226 if (dev->dev->id.revision < 5) b43legacy_chip_init() 2227 b43legacy_write32(dev, 0x010C, 0x01000000); b43legacy_chip_init() 2229 value32 = b43legacy_read32(dev, B43legacy_MMIO_MACCTL); b43legacy_chip_init() 2231 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, value32); b43legacy_chip_init() 2232 value32 = b43legacy_read32(dev, B43legacy_MMIO_MACCTL); b43legacy_chip_init() 2234 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, value32); b43legacy_chip_init() 2236 if (b43legacy_using_pio(dev)) { b43legacy_chip_init() 2237 b43legacy_write32(dev, 0x0210, 0x00000100); b43legacy_chip_init() 2238 b43legacy_write32(dev, 0x0230, 0x00000100); b43legacy_chip_init() 2239 b43legacy_write32(dev, 0x0250, 0x00000100); b43legacy_chip_init() 2240 b43legacy_write32(dev, 0x0270, 0x00000100); b43legacy_chip_init() 2241 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0034, b43legacy_chip_init() 2247 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, 0x0074, 0x0000); b43legacy_chip_init() 2250 b43legacy_adjust_opmode(dev); b43legacy_chip_init() 2252 if (dev->dev->id.revision < 3) { b43legacy_chip_init() 2253 b43legacy_write16(dev, 0x060E, 0x0000); b43legacy_chip_init() 2254 b43legacy_write16(dev, 0x0610, 0x8000); b43legacy_chip_init() 2255 b43legacy_write16(dev, 0x0604, 0x0000); b43legacy_chip_init() 2256 b43legacy_write16(dev, 0x0606, 0x0200); b43legacy_chip_init() 2258 b43legacy_write32(dev, 0x0188, 0x80000000); b43legacy_chip_init() 2259 b43legacy_write32(dev, 0x018C, 0x02000000); b43legacy_chip_init() 2261 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_REASON, 0x00004000); b43legacy_chip_init() 2262 b43legacy_write32(dev, B43legacy_MMIO_DMA0_IRQ_MASK, 0x0001DC00); b43legacy_chip_init() 2263 b43legacy_write32(dev, B43legacy_MMIO_DMA1_IRQ_MASK, 0x0000DC00); b43legacy_chip_init() 2264 b43legacy_write32(dev, B43legacy_MMIO_DMA2_IRQ_MASK, 0x0000DC00); b43legacy_chip_init() 2265 b43legacy_write32(dev, B43legacy_MMIO_DMA3_IRQ_MASK, 0x0001DC00); b43legacy_chip_init() 2266 b43legacy_write32(dev, B43legacy_MMIO_DMA4_IRQ_MASK, 0x0000DC00); b43legacy_chip_init() 2267 b43legacy_write32(dev, B43legacy_MMIO_DMA5_IRQ_MASK, 0x0000DC00); b43legacy_chip_init() 2269 value32 = ssb_read32(dev->dev, SSB_TMSLOW); b43legacy_chip_init() 2271 ssb_write32(dev->dev, SSB_TMSLOW, value32); b43legacy_chip_init() 2273 b43legacy_write16(dev, B43legacy_MMIO_POWERUP_DELAY, b43legacy_chip_init() 2274 dev->dev->bus->chipco.fast_pwrup_delay); b43legacy_chip_init() 2280 b43legacydbg(dev->wl, "Chip initialized\n"); b43legacy_chip_init() 2285 b43legacy_radio_turn_off(dev, 1); b43legacy_chip_init() 2287 b43legacy_gpio_cleanup(dev); b43legacy_chip_init() 2291 static void b43legacy_periodic_every120sec(struct b43legacy_wldev dev) b43legacy_periodic_every120sec() argument 2293 struct b43legacy_phy phy = &dev->phy; b43legacy_periodic_every120sec() 2298 b43legacy_mac_suspend(dev); b43legacy_periodic_every120sec() 2299 b43legacy_phy_lo_g_measure(dev); b43legacy_periodic_every120sec() 2300 b43legacy_mac_enable(dev); b43legacy_periodic_every120sec() 2303 static void b43legacy_periodic_every60sec(struct b43legacy_wldev dev) b43legacy_periodic_every60sec() argument 2305 b43legacy_phy_lo_mark_all_unused(dev); b43legacy_periodic_every60sec() 2306 if (dev->dev->bus->sprom.boardflags_lo & B43legacy_BFL_RSSI) { b43legacy_periodic_every60sec() 2307 b43legacy_mac_suspend(dev); b43legacy_periodic_every60sec() 2308 b43legacy_calc_nrssi_slope(dev); b43legacy_periodic_every60sec() 2309 b43legacy_mac_enable(dev); b43legacy_periodic_every60sec() 2313 static void b43legacy_periodic_every30sec(struct b43legacy_wldev dev) b43legacy_periodic_every30sec() argument 2316 b43legacy_calculate_link_quality(dev); b43legacy_periodic_every30sec() 2319 static void b43legacy_periodic_every15sec(struct b43legacy_wldev dev) b43legacy_periodic_every15sec() argument 2321 b43legacy_phy_xmitpower(dev); / FIXME: unless scanning? / b43legacy_periodic_every15sec() 2323 atomic_set(&dev->phy.txerr_cnt, B43legacy_PHY_TX_BADNESS_LIMIT); b43legacy_periodic_every15sec() 2327 static void do_periodic_work(struct b43legacy_wldev dev) do_periodic_work() argument 2331 state = dev->periodic_state; do_periodic_work() 2333 b43legacy_periodic_every120sec(dev); do_periodic_work() 2335 b43legacy_periodic_every60sec(dev); do_periodic_work() 2337 b43legacy_periodic_every30sec(dev); do_periodic_work() 2338 b43legacy_periodic_every15sec(dev); do_periodic_work() 2348 struct b43legacy_wldev dev = container_of(work, struct b43legacy_wldev, b43legacy_periodic_work_handler() local 2350 struct b43legacy_wl wl = dev->wl; b43legacy_periodic_work_handler() 2355 if (unlikely(b43legacy_status(dev) != B43legacy_STAT_STARTED)) b43legacy_periodic_work_handler() 2357 if (b43legacy_debug(dev, B43legacy_DBG_PWORK_STOP)) b43legacy_periodic_work_handler() 2360 do_periodic_work(dev); b43legacy_periodic_work_handler() 2362 dev->periodic_state++; b43legacy_periodic_work_handler() 2364 if (b43legacy_debug(dev, B43legacy_DBG_PWORK_FAST)) b43legacy_periodic_work_handler() 2368 ieee80211_queue_delayed_work(wl->hw, &dev->periodic_work, delay); b43legacy_periodic_work_handler() 2373 static void b43legacy_periodic_tasks_setup(struct b43legacy_wldev dev) b43legacy_periodic_tasks_setup() argument 2375 struct delayed_work work = &dev->periodic_work; b43legacy_periodic_tasks_setup() 2377 dev->periodic_state = 0; b43legacy_periodic_tasks_setup() 2379 ieee80211_queue_delayed_work(dev->wl->hw, work, 0); b43legacy_periodic_tasks_setup() 2383 static int b43legacy_validate_chipaccess(struct b43legacy_wldev dev) b43legacy_validate_chipaccess() argument 2388 shm_backup = b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, 0); b43legacy_validate_chipaccess() 2389 b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, 0, 0xAA5555AA); b43legacy_validate_chipaccess() 2390 if (b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, 0) != b43legacy_validate_chipaccess() 2393 b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, 0, 0x55AAAA55); b43legacy_validate_chipaccess() 2394 if (b43legacy_shm_read32(dev, B43legacy_SHM_SHARED, 0) != b43legacy_validate_chipaccess() 2397 b43legacy_shm_write32(dev, B43legacy_SHM_SHARED, 0, shm_backup); b43legacy_validate_chipaccess() 2399 value = b43legacy_read32(dev, B43legacy_MMIO_MACCTL); b43legacy_validate_chipaccess() 2404 value = b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_REASON); b43legacy_validate_chipaccess() 2410 b43legacyerr(dev->wl, "Failed to validate the chipaccess\n"); b43legacy_validate_chipaccess() 2414 static void b43legacy_security_init(struct b43legacy_wldev dev) b43legacy_security_init() argument 2416 dev->max_nr_keys = (dev->dev->id.revision >= 5) ? 58 : 20; b43legacy_security_init() 2417 B43legacy_WARN_ON(dev->max_nr_keys > ARRAY_SIZE(dev->key)); b43legacy_security_init() 2418 dev->ktp = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, b43legacy_security_init() 2423 dev->ktp = 2; b43legacy_security_init() 2424 if (dev->dev->id.revision >= 5) b43legacy_security_init() 2426 b43legacy_write16(dev, B43legacy_MMIO_RCMTA_COUNT, b43legacy_security_init() 2427 dev->max_nr_keys - 8); b43legacy_security_init() 2482 struct b43legacy_wldev dev; b43legacy_tx_work() local 2488 dev = wl->current_dev; b43legacy_tx_work() 2489 if (unlikely(!dev \|\| b43legacy_status(dev) < B43legacy_STAT_STARTED)) { b43legacy_tx_work() 2497 if (b43legacy_using_pio(dev)) b43legacy_tx_work() 2498 err = b43legacy_pio_tx(dev, skb); b43legacy_tx_work() 2500 err = b43legacy_dma_tx(dev, skb); b43legacy_tx_work() 2574 struct b43legacy_wldev *dev, find_wldev_for_phymode() 2584 dev = d; find_wldev_for_phymode() 2593 static void b43legacy_put_phy_into_reset(struct b43legacy_wldev dev) b43legacy_put_phy_into_reset() argument 2595 struct ssb_device sdev = dev->dev; b43legacy_put_phy_into_reset() 2683 static void b43legacy_set_retry_limits(struct b43legacy_wldev dev, b43legacy_set_retry_limits() argument 2692 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS, 0x0006, short_retry); b43legacy_set_retry_limits() 2693 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS, 0x0007, long_retry); b43legacy_set_retry_limits() 2700 struct b43legacy_wldev dev; b43legacy_op_dev_config() local 2711 dev = wl->current_dev; b43legacy_op_dev_config() 2712 phy = &dev->phy; b43legacy_op_dev_config() 2715 b43legacy_set_retry_limits(dev, b43legacy_op_dev_config() 2741 if (b43legacy_status(dev) < B43legacy_STAT_STARTED) { b43legacy_op_dev_config() 2745 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, 0); b43legacy_op_dev_config() 2747 b43legacy_synchronize_irq(dev); b43legacy_op_dev_config() 2752 b43legacy_radio_selectchannel(dev, conf->chandef.chan->hw_value, b43legacy_op_dev_config() 2755 dev->wl->radiotap_enabled = !!(conf->flags & IEEE80211_CONF_MONITOR); b43legacy_op_dev_config() 2761 b43legacy_phy_xmitpower(dev); b43legacy_op_dev_config() 2766 b43legacy_mgmtframe_txantenna(dev, antenna_tx); b43legacy_op_dev_config() 2770 b43legacy_radio_turn_on(dev); b43legacy_op_dev_config() 2771 b43legacyinfo(dev->wl, "Radio turned on by software\n"); b43legacy_op_dev_config() 2772 if (!dev->radio_hw_enable) b43legacy_op_dev_config() 2773 b43legacyinfo(dev->wl, "The hardware RF-kill" b43legacy_op_dev_config() 2778 b43legacy_radio_turn_off(dev, 0); b43legacy_op_dev_config() 2779 b43legacyinfo(dev->wl, "Radio turned off by" b43legacy_op_dev_config() 2785 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, dev->irq_mask); b43legacy_op_dev_config() 2794 static void b43legacy_update_basic_rates(struct b43legacy_wldev dev, u32 brates) b43legacy_update_basic_rates() argument 2797 dev->wl->hw->wiphy->bands[IEEE80211_BAND_2GHZ]; b43legacy_update_basic_rates() 2831 rateptr = b43legacy_shm_read16(dev, B43legacy_SHM_SHARED, b43legacy_update_basic_rates() 2834 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, b43legacy_update_basic_rates() 2845 struct b43legacy_wldev dev; b43legacy_op_bss_info_changed() local 2851 dev = wl->current_dev; b43legacy_op_bss_info_changed() 2857 if (b43legacy_status(dev) < B43legacy_STAT_STARTED) { b43legacy_op_bss_info_changed() 2861 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, 0); b43legacy_op_bss_info_changed() 2864 b43legacy_synchronize_irq(dev); b43legacy_op_bss_info_changed() 2872 if (b43legacy_status(dev) >= B43legacy_STAT_INITIALIZED) { b43legacy_op_bss_info_changed() 2879 b43legacy_write_mac_bssid_templates(dev); b43legacy_op_bss_info_changed() 2883 b43legacy_mac_suspend(dev); b43legacy_op_bss_info_changed() 2888 b43legacy_set_beacon_int(dev, conf->beacon_int); b43legacy_op_bss_info_changed() 2891 b43legacy_update_basic_rates(dev, conf->basic_rates); b43legacy_op_bss_info_changed() 2895 b43legacy_short_slot_timing_enable(dev); b43legacy_op_bss_info_changed() 2897 b43legacy_short_slot_timing_disable(dev); b43legacy_op_bss_info_changed() 2900 b43legacy_mac_enable(dev); b43legacy_op_bss_info_changed() 2903 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, dev->irq_mask); b43legacy_op_bss_info_changed() 2916 struct b43legacy_wldev dev = wl->current_dev; b43legacy_op_configure_filter() local 2919 if (!dev) { b43legacy_op_configure_filter() 2943 if (changed && b43legacy_status(dev) >= B43legacy_STAT_INITIALIZED) b43legacy_op_configure_filter() 2944 b43legacy_adjust_opmode(dev); b43legacy_op_configure_filter() 2949 static void b43legacy_wireless_core_stop(struct b43legacy_wldev dev) b43legacy_wireless_core_stop() argument 2951 struct b43legacy_wl wl = dev->wl; b43legacy_wireless_core_stop() 2955 if (b43legacy_status(dev) < B43legacy_STAT_STARTED) b43legacy_wireless_core_stop() 2962 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, 0); b43legacy_wireless_core_stop() 2963 b43legacy_read32(dev, B43legacy_MMIO_GEN_IRQ_MASK); / flush / b43legacy_wireless_core_stop() 2965 b43legacy_synchronize_irq(dev); b43legacy_wireless_core_stop() 2967 b43legacy_set_status(dev, B43legacy_STAT_INITIALIZED); b43legacy_wireless_core_stop() 2972 cancel_delayed_work_sync(&dev->periodic_work); b43legacy_wireless_core_stop() 2982 b43legacy_mac_suspend(dev); b43legacy_wireless_core_stop() 2983 free_irq(dev->dev->irq, dev); b43legacy_wireless_core_stop() 2988 static int b43legacy_wireless_core_start(struct b43legacy_wldev dev) b43legacy_wireless_core_start() argument 2992 B43legacy_WARN_ON(b43legacy_status(dev) != B43legacy_STAT_INITIALIZED); b43legacy_wireless_core_start() 2994 drain_txstatus_queue(dev); b43legacy_wireless_core_start() 2995 err = request_irq(dev->dev->irq, b43legacy_interrupt_handler, b43legacy_wireless_core_start() 2996 IRQF_SHARED, KBUILD_MODNAME, dev); b43legacy_wireless_core_start() 2998 b43legacyerr(dev->wl, "Cannot request IRQ-%d\n", b43legacy_wireless_core_start() 2999 dev->dev->irq); b43legacy_wireless_core_start() 3003 ieee80211_wake_queues(dev->wl->hw); b43legacy_wireless_core_start() 3004 b43legacy_set_status(dev, B43legacy_STAT_STARTED); b43legacy_wireless_core_start() 3007 b43legacy_mac_enable(dev); b43legacy_wireless_core_start() 3008 b43legacy_write32(dev, B43legacy_MMIO_GEN_IRQ_MASK, dev->irq_mask); b43legacy_wireless_core_start() 3011 b43legacy_periodic_tasks_setup(dev); b43legacy_wireless_core_start() 3013 b43legacydbg(dev->wl, "Wireless interface started\n"); b43legacy_wireless_core_start() 3019 static int b43legacy_phy_versioning(struct b43legacy_wldev dev) b43legacy_phy_versioning() argument 3021 struct b43legacy_phy phy = &dev->phy; b43legacy_phy_versioning() 3032 tmp = b43legacy_read16(dev, B43legacy_MMIO_PHY_VER); b43legacy_phy_versioning() 3051 b43legacyerr(dev->wl, "FOUND UNSUPPORTED PHY " b43legacy_phy_versioning() 3056 b43legacydbg(dev->wl, "Found PHY: Analog %u, Type %u, Revision %u\n", b43legacy_phy_versioning() 3061 if (dev->dev->bus->chip_id == 0x4317) { b43legacy_phy_versioning() 3062 if (dev->dev->bus->chip_rev == 0) b43legacy_phy_versioning() 3064 else if (dev->dev->bus->chip_rev == 1) b43legacy_phy_versioning() 3069 b43legacy_write16(dev, B43legacy_MMIO_RADIO_CONTROL, b43legacy_phy_versioning() 3071 tmp = b43legacy_read16(dev, B43legacy_MMIO_RADIO_DATA_HIGH); b43legacy_phy_versioning() 3073 b43legacy_write16(dev, B43legacy_MMIO_RADIO_CONTROL, b43legacy_phy_versioning() 3075 tmp \|= b43legacy_read16(dev, B43legacy_MMIO_RADIO_DATA_LOW); b43legacy_phy_versioning() 3093 b43legacyerr(dev->wl, "FOUND UNSUPPORTED RADIO " b43legacy_phy_versioning() 3098 b43legacydbg(dev->wl, "Found Radio: Manuf 0x%X, Version 0x%X," b43legacy_phy_versioning() 3113 static void setup_struct_phy_for_init(struct b43legacy_wldev dev, setup_struct_phy_for_init() argument 3124 dev->radio_hw_enable = true; setup_struct_phy_for_init() 3139 phy->bbatt = b43legacy_default_baseband_attenuation(dev); setup_struct_phy_for_init() 3140 phy->rfatt = b43legacy_default_radio_attenuation(dev); setup_struct_phy_for_init() 3141 phy->txctl1 = b43legacy_default_txctl1(dev); setup_struct_phy_for_init() 3158 static void setup_struct_wldev_for_init(struct b43legacy_wldev dev) setup_struct_wldev_for_init() argument 3161 dev->dfq_valid = false; setup_struct_wldev_for_init() 3164 memset(&dev->stats, 0, sizeof(dev->stats)); setup_struct_wldev_for_init() 3166 setup_struct_phy_for_init(dev, &dev->phy); setup_struct_wldev_for_init() 3169 dev->irq_reason = 0; setup_struct_wldev_for_init() 3170 memset(dev->dma_reason, 0, sizeof(dev->dma_reason)); setup_struct_wldev_for_init() 3171 dev->irq_mask = B43legacy_IRQ_MASKTEMPLATE; setup_struct_wldev_for_init() 3173 dev->mac_suspended = 1; setup_struct_wldev_for_init() 3176 memset(&dev->noisecalc, 0, sizeof(dev->noisecalc)); setup_struct_wldev_for_init() 3179 static void b43legacy_set_synth_pu_delay(struct b43legacy_wldev dev, b43legacy_set_synth_pu_delay() argument 3183 if (b43legacy_is_mode(dev->wl, NL80211_IFTYPE_ADHOC) \|\| idle) b43legacy_set_synth_pu_delay() 3185 if ((dev->phy.radio_ver == 0x2050) && (dev->phy.radio_rev == 8)) b43legacy_set_synth_pu_delay() 3188 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, b43legacy_set_synth_pu_delay() 3193 static void b43legacy_set_pretbtt(struct b43legacy_wldev dev) b43legacy_set_pretbtt() argument 3198 if (b43legacy_is_mode(dev->wl, NL80211_IFTYPE_ADHOC)) b43legacy_set_pretbtt() 3202 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, b43legacy_set_pretbtt() 3204 b43legacy_write16(dev, B43legacy_MMIO_TSF_CFP_PRETBTT, pretbtt); b43legacy_set_pretbtt() 3209 static void b43legacy_wireless_core_exit(struct b43legacy_wldev dev) b43legacy_wireless_core_exit() argument 3211 struct b43legacy_phy phy = &dev->phy; b43legacy_wireless_core_exit() 3214 B43legacy_WARN_ON(b43legacy_status(dev) > B43legacy_STAT_INITIALIZED); b43legacy_wireless_core_exit() 3215 if (b43legacy_status(dev) != B43legacy_STAT_INITIALIZED) b43legacy_wireless_core_exit() 3217 b43legacy_set_status(dev, B43legacy_STAT_UNINIT); b43legacy_wireless_core_exit() 3220 macctl = b43legacy_read32(dev, B43legacy_MMIO_MACCTL); b43legacy_wireless_core_exit() 3223 b43legacy_write32(dev, B43legacy_MMIO_MACCTL, macctl); b43legacy_wireless_core_exit() 3225 b43legacy_leds_exit(dev); b43legacy_wireless_core_exit() 3226 b43legacy_rng_exit(dev->wl); b43legacy_wireless_core_exit() 3227 b43legacy_pio_free(dev); b43legacy_wireless_core_exit() 3228 b43legacy_dma_free(dev); b43legacy_wireless_core_exit() 3229 b43legacy_chip_exit(dev); b43legacy_wireless_core_exit() 3230 b43legacy_radio_turn_off(dev, 1); b43legacy_wireless_core_exit() 3231 b43legacy_switch_analog(dev, 0); b43legacy_wireless_core_exit() 3236 if (dev->wl->current_beacon) { b43legacy_wireless_core_exit() 3237 dev_kfree_skb_any(dev->wl->current_beacon); b43legacy_wireless_core_exit() 3238 dev->wl->current_beacon = NULL; b43legacy_wireless_core_exit() 3241 ssb_device_disable(dev->dev, 0); b43legacy_wireless_core_exit() 3242 ssb_bus_may_powerdown(dev->dev->bus); b43legacy_wireless_core_exit() 3245 static void prepare_phy_data_for_init(struct b43legacy_wldev dev) prepare_phy_data_for_init() argument 3247 struct b43legacy_phy phy = &dev->phy; prepare_phy_data_for_init() 3251 phy->bbatt = b43legacy_default_baseband_attenuation(dev); prepare_phy_data_for_init() 3252 phy->rfatt = b43legacy_default_radio_attenuation(dev); prepare_phy_data_for_init() 3253 phy->txctl1 = b43legacy_default_txctl1(dev); prepare_phy_data_for_init() 3285 static int b43legacy_wireless_core_init(struct b43legacy_wldev dev) b43legacy_wireless_core_init() argument 3287 struct b43legacy_wl wl = dev->wl; b43legacy_wireless_core_init() 3288 struct ssb_bus bus = dev->dev->bus; b43legacy_wireless_core_init() 3289 struct b43legacy_phy phy = &dev->phy; b43legacy_wireless_core_init() 3290 struct ssb_sprom sprom = &dev->dev->bus->sprom; b43legacy_wireless_core_init() 3295 B43legacy_WARN_ON(b43legacy_status(dev) != B43legacy_STAT_UNINIT); b43legacy_wireless_core_init() 3300 if (!ssb_device_is_enabled(dev->dev)) { b43legacy_wireless_core_init() 3302 b43legacy_wireless_core_reset(dev, tmp); b43legacy_wireless_core_init() 3313 setup_struct_wldev_for_init(dev); b43legacy_wireless_core_init() 3315 err = b43legacy_phy_init_tssi2dbm_table(dev); b43legacy_wireless_core_init() 3320 ssb_pcicore_dev_irqvecs_enable(&bus->pcicore, dev->dev); b43legacy_wireless_core_init() 3322 prepare_phy_data_for_init(dev); b43legacy_wireless_core_init() 3323 b43legacy_phy_calibrate(dev); b43legacy_wireless_core_init() 3324 err = b43legacy_chip_init(dev); b43legacy_wireless_core_init() 3327 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, b43legacy_wireless_core_init() 3329 dev->dev->id.revision); b43legacy_wireless_core_init() 3330 hf = b43legacy_hf_read(dev); b43legacy_wireless_core_init() 3342 b43legacy_hf_write(dev, hf); b43legacy_wireless_core_init() 3344 b43legacy_set_retry_limits(dev, b43legacy_wireless_core_init() 3348 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, b43legacy_wireless_core_init() 3350 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, b43legacy_wireless_core_init() 3357 b43legacy_shm_write16(dev, B43legacy_SHM_SHARED, b43legacy_wireless_core_init() 3360 b43legacy_rate_memory_init(dev); b43legacy_wireless_core_init() 3364 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS, b43legacy_wireless_core_init() 3367 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS, b43legacy_wireless_core_init() 3370 b43legacy_shm_write16(dev, B43legacy_SHM_WIRELESS, b43legacy_wireless_core_init() 3374 if (b43legacy_using_pio(dev)) b43legacy_wireless_core_init() 3375 err = b43legacy_pio_init(dev); b43legacy_wireless_core_init() 3377 err = b43legacy_dma_init(dev); b43legacy_wireless_core_init() 3379 b43legacy_qos_init(dev); b43legacy_wireless_core_init() 3385 b43legacy_set_synth_pu_delay(dev, 1); b43legacy_wireless_core_init() 3388 b43legacy_upload_card_macaddress(dev); b43legacy_wireless_core_init() 3389 b43legacy_security_init(dev); b43legacy_wireless_core_init() 3392 ieee80211_wake_queues(dev->wl->hw); b43legacy_wireless_core_init() 3393 b43legacy_set_status(dev, B43legacy_STAT_INITIALIZED); b43legacy_wireless_core_init() 3395 b43legacy_leds_init(dev); b43legacy_wireless_core_init() 3400 b43legacy_chip_exit(dev); b43legacy_wireless_core_init() 3408 B43legacy_WARN_ON(b43legacy_status(dev) != B43legacy_STAT_UNINIT); b43legacy_wireless_core_init() 3416 struct b43legacy_wldev dev; b43legacy_op_add_interface() local 3434 dev = wl->current_dev; b43legacy_op_add_interface() 3441 b43legacy_adjust_opmode(dev); b43legacy_op_add_interface() 3442 b43legacy_set_pretbtt(dev); b43legacy_op_add_interface() 3443 b43legacy_set_synth_pu_delay(dev, 0); b43legacy_op_add_interface() 3444 b43legacy_upload_card_macaddress(dev); b43legacy_op_add_interface() 3458 struct b43legacy_wldev dev = wl->current_dev; b43legacy_op_remove_interface() local 3472 b43legacy_adjust_opmode(dev); b43legacy_op_remove_interface() 3474 b43legacy_upload_card_macaddress(dev); b43legacy_op_remove_interface() 3483 struct b43legacy_wldev dev = wl->current_dev; b43legacy_op_start() local 3500 if (b43legacy_status(dev) < B43legacy_STAT_INITIALIZED) { b43legacy_op_start() 3501 err = b43legacy_wireless_core_init(dev); b43legacy_op_start() 3507 if (b43legacy_status(dev) < B43legacy_STAT_STARTED) { b43legacy_op_start() 3508 err = b43legacy_wireless_core_start(dev); b43legacy_op_start() 3511 b43legacy_wireless_core_exit(dev); b43legacy_op_start() 3527 struct b43legacy_wldev dev = wl->current_dev; b43legacy_op_stop() local 3532 if (b43legacy_status(dev) >= B43legacy_STAT_STARTED) b43legacy_op_stop() 3533 b43legacy_wireless_core_stop(dev); b43legacy_op_stop() 3534 b43legacy_wireless_core_exit(dev); b43legacy_op_stop() 3556 struct b43legacy_wldev dev = wl->current_dev; b43legacy_op_get_survey() local 3564 survey->noise = dev->stats.link_noise; b43legacy_op_get_survey() 3590 struct b43legacy_wldev dev = b43legacy_chip_reset() local 3592 struct b43legacy_wl wl = dev->wl; b43legacy_chip_reset() 3598 prev_status = b43legacy_status(dev); b43legacy_chip_reset() 3601 b43legacy_wireless_core_stop(dev); b43legacy_chip_reset() 3603 b43legacy_wireless_core_exit(dev); b43legacy_chip_reset() 3607 err = b43legacy_wireless_core_init(dev); b43legacy_chip_reset() 3612 err = b43legacy_wireless_core_start(dev); b43legacy_chip_reset() 3614 b43legacy_wireless_core_exit(dev); b43legacy_chip_reset() 3620 wl->current_dev = NULL; /* Failed to init the dev. / b43legacy_chip_reset() 3628 static int b43legacy_setup_modes(struct b43legacy_wldev dev, b43legacy_setup_modes() argument 3632 struct ieee80211_hw hw = dev->wl->hw; b43legacy_setup_modes() 3633 struct b43legacy_phy phy = &dev->phy; b43legacy_setup_modes() 3651 static void b43legacy_wireless_core_detach(struct b43legacy_wldev dev) b43legacy_wireless_core_detach() argument 3655 b43legacy_release_firmware(dev); b43legacy_wireless_core_detach() 3658 static int b43legacy_wireless_core_attach(struct b43legacy_wldev dev) b43legacy_wireless_core_attach() argument 3660 struct b43legacy_wl wl = dev->wl; b43legacy_wireless_core_attach() 3661 struct ssb_bus bus = dev->dev->bus; b43legacy_wireless_core_attach() 3681 if (dev->dev->id.revision >= 5) { b43legacy_wireless_core_attach() 3684 tmshigh = ssb_read32(dev->dev, SSB_TMSHIGH); b43legacy_wireless_core_attach() 3688 } else if (dev->dev->id.revision == 4) b43legacy_wireless_core_attach() 3693 dev->phy.gmode = (have_gphy \|\| have_bphy); b43legacy_wireless_core_attach() 3694 dev->phy.radio_on = true; b43legacy_wireless_core_attach() 3695 tmp = dev->phy.gmode ? B43legacy_TMSLOW_GMODE : 0; b43legacy_wireless_core_attach() 3696 b43legacy_wireless_core_reset(dev, tmp); b43legacy_wireless_core_attach() 3698 err = b43legacy_phy_versioning(dev); b43legacy_wireless_core_attach() 3709 switch (dev->phy.type) { b43legacy_wireless_core_attach() 3720 dev->phy.gmode = (have_gphy \|\| have_bphy); b43legacy_wireless_core_attach() 3721 tmp = dev->phy.gmode ? B43legacy_TMSLOW_GMODE : 0; b43legacy_wireless_core_attach() 3722 b43legacy_wireless_core_reset(dev, tmp); b43legacy_wireless_core_attach() 3724 err = b43legacy_validate_chipaccess(dev); b43legacy_wireless_core_attach() 3727 err = b43legacy_setup_modes(dev, have_bphy, have_gphy); b43legacy_wireless_core_attach() 3733 wl->current_dev = dev; b43legacy_wireless_core_attach() 3734 INIT_WORK(&dev->restart_work, b43legacy_chip_reset); b43legacy_wireless_core_attach() 3736 b43legacy_radio_turn_off(dev, 1); b43legacy_wireless_core_attach() 3737 b43legacy_switch_analog(dev, 0); b43legacy_wireless_core_attach() 3738 ssb_device_disable(dev->dev, 0); b43legacy_wireless_core_attach() 3749 static void b43legacy_one_core_detach(struct ssb_device dev) b43legacy_one_core_detach() argument 3757 wldev = ssb_get_drvdata(dev); b43legacy_one_core_detach() 3763 ssb_set_drvdata(dev, NULL); b43legacy_one_core_detach() 3767 static int b43legacy_one_core_attach(struct ssb_device dev, b43legacy_one_core_attach() argument 3777 wldev->dev = dev; b43legacy_one_core_attach() 3794 ssb_set_drvdata(dev, wldev); b43legacy_one_core_attach() 3813 static void b43legacy_wireless_exit(struct ssb_device dev, b43legacy_wireless_exit() argument 3818 ssb_set_devtypedata(dev, NULL); b43legacy_wireless_exit() 3822 static int b43legacy_wireless_init(struct ssb_device dev) b43legacy_wireless_init() argument 3824 struct ssb_sprom sprom = &dev->bus->sprom; b43legacy_wireless_init() 3830 b43legacy_sprom_fixup(dev->bus); b43legacy_wireless_init() 3848 SET_IEEE80211_DEV(hw, dev->dev); b43legacy_wireless_init() 3871 ssb_set_devtypedata(dev, wl); b43legacy_wireless_init() 3873 dev->bus->chip_id, dev->id.revision); b43legacy_wireless_init() 3879 static int b43legacy_probe(struct ssb_device dev, b43legacy_probe() argument 3886 wl = ssb_get_devtypedata(dev); b43legacy_probe() 3890 err = b43legacy_wireless_init(dev); b43legacy_probe() 3893 wl = ssb_get_devtypedata(dev); b43legacy_probe() 3896 err = b43legacy_one_core_attach(dev, wl); b43legacy_probe() 3909 b43legacy_wireless_exit(dev, wl); b43legacy_probe() 3913 static void b43legacy_remove(struct ssb_device dev) b43legacy_remove() argument 3915 struct b43legacy_wl wl = ssb_get_devtypedata(dev); b43legacy_remove() 3916 struct b43legacy_wldev wldev = ssb_get_drvdata(dev); b43legacy_remove() 3930 b43legacy_one_core_detach(dev); b43legacy_remove() 3936 b43legacy_wireless_exit(dev, wl); b43legacy_remove() 3940 void b43legacy_controller_restart(struct b43legacy_wldev dev, b43legacy_controller_restart() argument 3944 if (b43legacy_status(dev) < B43legacy_STAT_INITIALIZED) b43legacy_controller_restart() 3946 b43legacyinfo(dev->wl, "Controller RESET (%s) ...\n", reason); b43legacy_controller_restart() 3947 ieee80211_queue_work(dev->wl->hw, &dev->restart_work); b43legacy_controller_restart() 3952 static int b43legacy_suspend(struct ssb_device dev, pm_message_t state) b43legacy_suspend() argument 3954 struct b43legacy_wldev wldev = ssb_get_drvdata(dev); b43legacy_suspend() 3972 static int b43legacy_resume(struct ssb_device dev) b43legacy_resume() argument 3974 struct b43legacy_wldev wldev = ssb_get_drvdata(dev); b43legacy_resume() 2572 find_wldev_for_phymode(struct b43legacy_wl wl, unsigned int phymode, struct b43legacy_wldev dev, bool gmode) find_wldev_for_phymode() argument
/linux-4.1.27/include/asm-generic/
H A D	libata-portmap.h	`4 #define ATA_PRIMARY_IRQ(dev) 14 5 #define ATA_SECONDARY_IRQ(dev) 15`
H A D	dma-coherent.h	9 int dma_alloc_from_coherent(struct device dev, ssize_t size, 11 int dma_release_from_coherent(struct device dev, int order, void vaddr); 13 int dma_mmap_from_coherent(struct device dev, struct vm_area_struct vma, 19 int dma_declare_coherent_memory(struct device dev, phys_addr_t phys_addr, 22 void dma_release_declared_memory(struct device dev); 24 void dma_mark_declared_memory_occupied(struct device *dev, 27 #define dma_alloc_from_coherent(dev, size, handle, ret) (0) 28 #define dma_release_from_coherent(dev, order, vaddr) (0) 29 #define dma_mmap_from_coherent(dev, vma, vaddr, order, ret) (0)
/linux-4.1.27/drivers/media/usb/hdpvr/
H A D	hdpvr-control.c	27 int hdpvr_config_call(struct hdpvr_device dev, uint value, u8 valbuf) hdpvr_config_call() argument 32 mutex_lock(&dev->usbc_mutex); hdpvr_config_call() 33 dev->usbc_buf[0] = valbuf; hdpvr_config_call() 34 ret = usb_control_msg(dev->udev, hdpvr_config_call() 35 usb_sndctrlpipe(dev->udev, 0), hdpvr_config_call() 38 dev->usbc_buf, 1, 10000); hdpvr_config_call() 40 mutex_unlock(&dev->usbc_mutex); hdpvr_config_call() 41 v4l2_dbg(MSG_INFO, hdpvr_debug, &dev->v4l2_dev, hdpvr_config_call() 48 int get_video_info(struct hdpvr_device dev, struct hdpvr_video_info vidinf) get_video_info() argument 53 mutex_lock(&dev->usbc_mutex); get_video_info() 54 ret = usb_control_msg(dev->udev, get_video_info() 55 usb_rcvctrlpipe(dev->udev, 0), get_video_info() 58 dev->usbc_buf, 5, get_video_info() 63 v4l2_dbg(MSG_INFO, hdpvr_debug, &dev->v4l2_dev, get_video_info() 65 dev->usbc_buf); get_video_info() 67 mutex_unlock(&dev->usbc_mutex); get_video_info() 72 vidinf->width = dev->usbc_buf[1] << 8 \| dev->usbc_buf[0]; get_video_info() 73 vidinf->height = dev->usbc_buf[3] << 8 \| dev->usbc_buf[2]; get_video_info() 74 vidinf->fps = dev->usbc_buf[4]; get_video_info() 80 int get_input_lines_info(struct hdpvr_device dev) get_input_lines_info() argument 84 mutex_lock(&dev->usbc_mutex); get_input_lines_info() 85 ret = usb_control_msg(dev->udev, get_input_lines_info() 86 usb_rcvctrlpipe(dev->udev, 0), get_input_lines_info() 89 dev->usbc_buf, 3, get_input_lines_info() 94 v4l2_dbg(MSG_INFO, hdpvr_debug, &dev->v4l2_dev, get_input_lines_info() 96 dev->usbc_buf); get_input_lines_info() 100 lines = dev->usbc_buf[1] << 8 \| dev->usbc_buf[0]; get_input_lines_info() 101 mutex_unlock(&dev->usbc_mutex); get_input_lines_info() 106 int hdpvr_set_bitrate(struct hdpvr_device dev) hdpvr_set_bitrate() argument 110 mutex_lock(&dev->usbc_mutex); hdpvr_set_bitrate() 111 memset(dev->usbc_buf, 0, 4); hdpvr_set_bitrate() 112 dev->usbc_buf[0] = dev->options.bitrate; hdpvr_set_bitrate() 113 dev->usbc_buf[2] = dev->options.peak_bitrate; hdpvr_set_bitrate() 115 ret = usb_control_msg(dev->udev, hdpvr_set_bitrate() 116 usb_sndctrlpipe(dev->udev, 0), hdpvr_set_bitrate() 118 CTRL_DEFAULT_INDEX, dev->usbc_buf, 4, 1000); hdpvr_set_bitrate() 119 mutex_unlock(&dev->usbc_mutex); hdpvr_set_bitrate() 124 int hdpvr_set_audio(struct hdpvr_device dev, u8 input, hdpvr_set_audio() argument 129 if (dev->flags & HDPVR_FLAG_AC3_CAP) { hdpvr_set_audio() 130 mutex_lock(&dev->usbc_mutex); hdpvr_set_audio() 131 memset(dev->usbc_buf, 0, 2); hdpvr_set_audio() 132 dev->usbc_buf[0] = input; hdpvr_set_audio() 134 dev->usbc_buf[1] = 0; hdpvr_set_audio() 136 dev->usbc_buf[1] = 1; hdpvr_set_audio() 138 mutex_unlock(&dev->usbc_mutex); hdpvr_set_audio() 139 v4l2_err(&dev->v4l2_dev, "invalid audio codec %d\n", hdpvr_set_audio() 145 ret = usb_control_msg(dev->udev, hdpvr_set_audio() 146 usb_sndctrlpipe(dev->udev, 0), hdpvr_set_audio() 148 CTRL_DEFAULT_INDEX, dev->usbc_buf, 2, hdpvr_set_audio() 150 mutex_unlock(&dev->usbc_mutex); hdpvr_set_audio() 154 ret = hdpvr_config_call(dev, CTRL_AUDIO_INPUT_VALUE, input); hdpvr_set_audio() 159 int hdpvr_set_options(struct hdpvr_device *dev) hdpvr_set_options() argument 161 hdpvr_config_call(dev, CTRL_VIDEO_STD_TYPE, dev->options.video_std); hdpvr_set_options() 163 hdpvr_config_call(dev, CTRL_VIDEO_INPUT_VALUE, hdpvr_set_options() 164 dev->options.video_input+1); hdpvr_set_options() 166 hdpvr_set_audio(dev, dev->options.audio_input+1, hdpvr_set_options() 167 dev->options.audio_codec); hdpvr_set_options() 169 hdpvr_set_bitrate(dev); hdpvr_set_options() 170 hdpvr_config_call(dev, CTRL_BITRATE_MODE_VALUE, hdpvr_set_options() 171 dev->options.bitrate_mode); hdpvr_set_options() 172 hdpvr_config_call(dev, CTRL_GOP_MODE_VALUE, dev->options.gop_mode); hdpvr_set_options() 174 hdpvr_config_call(dev, CTRL_BRIGHTNESS, dev->options.brightness); hdpvr_set_options() 175 hdpvr_config_call(dev, CTRL_CONTRAST, dev->options.contrast); hdpvr_set_options() 176 hdpvr_config_call(dev, CTRL_HUE, dev->options.hue); hdpvr_set_options() 177 hdpvr_config_call(dev, CTRL_SATURATION, dev->options.saturation); hdpvr_set_options() 178 hdpvr_config_call(dev, CTRL_SHARPNESS, dev->options.sharpness); hdpvr_set_options()
H A D	hdpvr-core.c	26 #include <media/v4l2-dev.h> 69 void hdpvr_delete(struct hdpvr_device dev) hdpvr_delete() argument 71 hdpvr_free_buffers(dev); hdpvr_delete() 72 usb_put_dev(dev->udev); hdpvr_delete() 117 static int device_authorization(struct hdpvr_device dev) device_authorization() argument 124 mutex_lock(&dev->usbc_mutex); device_authorization() 125 ret = usb_control_msg(dev->udev, device_authorization() 126 usb_rcvctrlpipe(dev->udev, 0), device_authorization() 129 dev->usbc_buf, 46, device_authorization() 132 v4l2_err(&dev->v4l2_dev, device_authorization() 138 v4l2_dbg(MSG_INFO, hdpvr_debug, &dev->v4l2_dev, device_authorization() 140 ret, dev->usbc_buf); device_authorization() 144 dev->fw_ver = dev->usbc_buf[1]; device_authorization() 146 v4l2_info(&dev->v4l2_dev, "firmware version 0x%x dated %s\n", device_authorization() 147 dev->fw_ver, &dev->usbc_buf[2]); device_authorization() 149 if (dev->fw_ver > 0x15) { device_authorization() 150 dev->options.brightness = 0x80; device_authorization() 151 dev->options.contrast = 0x40; device_authorization() 152 dev->options.hue = 0xf; device_authorization() 153 dev->options.saturation = 0x40; device_authorization() 154 dev->options.sharpness = 0x80; device_authorization() 157 switch (dev->fw_ver) { device_authorization() 159 dev->flags &= ~HDPVR_FLAG_AC3_CAP; device_authorization() 165 dev->flags \|= HDPVR_FLAG_AC3_CAP; device_authorization() 168 v4l2_info(&dev->v4l2_dev, "untested firmware, the driver might" device_authorization() 170 if (dev->fw_ver >= HDPVR_FIRMWARE_VERSION_AC3) device_authorization() 171 dev->flags \|= HDPVR_FLAG_AC3_CAP; device_authorization() 173 dev->flags &= ~HDPVR_FLAG_AC3_CAP; device_authorization() 176 response = dev->usbc_buf+38; device_authorization() 178 v4l2_dbg(MSG_INFO, hdpvr_debug, &dev->v4l2_dev, "challenge: %8ph\n", device_authorization() 183 v4l2_dbg(MSG_INFO, hdpvr_debug, &dev->v4l2_dev, " response: %8ph\n", device_authorization() 188 ret = usb_control_msg(dev->udev, device_authorization() 189 usb_sndctrlpipe(dev->udev, 0), device_authorization() 194 v4l2_dbg(MSG_INFO, hdpvr_debug, &dev->v4l2_dev, device_authorization() 199 mutex_unlock(&dev->usbc_mutex); device_authorization() 203 static int hdpvr_device_init(struct hdpvr_device dev) hdpvr_device_init() argument 208 if (device_authorization(dev)) hdpvr_device_init() 212 hdpvr_set_options(dev); hdpvr_device_init() 215 mutex_lock(&dev->usbc_mutex); hdpvr_device_init() 216 buf = dev->usbc_buf; hdpvr_device_init() 218 ret = usb_control_msg(dev->udev, hdpvr_device_init() 219 usb_sndctrlpipe(dev->udev, 0), hdpvr_device_init() 224 v4l2_dbg(MSG_INFO, hdpvr_debug, &dev->v4l2_dev, hdpvr_device_init() 226 mutex_unlock(&dev->usbc_mutex); hdpvr_device_init() 229 mutex_lock(&dev->usbc_mutex); hdpvr_device_init() 231 ret = usb_control_msg(dev->udev, hdpvr_device_init() 232 usb_sndctrlpipe(dev->udev, 0), hdpvr_device_init() 235 v4l2_dbg(MSG_INFO, hdpvr_debug, &dev->v4l2_dev, hdpvr_device_init() 240 ret = usb_control_msg(dev->udev, hdpvr_device_init() 241 usb_sndctrlpipe(dev->udev, 0), hdpvr_device_init() 244 v4l2_dbg(MSG_INFO, hdpvr_debug, &dev->v4l2_dev, hdpvr_device_init() 246 mutex_unlock(&dev->usbc_mutex); hdpvr_device_init() 248 dev->status = STATUS_IDLE; hdpvr_device_init() 273 struct hdpvr_device dev; hdpvr_probe() local 282 dev = kzalloc(sizeof(dev), GFP_KERNEL); hdpvr_probe() 283 if (!dev) { hdpvr_probe() 284 dev_err(&interface->dev, "Out of memory\n"); hdpvr_probe() 290 INIT_LIST_HEAD(&dev->free_buff_list); hdpvr_probe() 291 INIT_LIST_HEAD(&dev->rec_buff_list); hdpvr_probe() 294 if (v4l2_device_register(&interface->dev, &dev->v4l2_dev)) { hdpvr_probe() 295 dev_err(&interface->dev, "v4l2_device_register failed\n"); hdpvr_probe() 299 mutex_init(&dev->io_mutex); hdpvr_probe() 300 mutex_init(&dev->i2c_mutex); hdpvr_probe() 301 mutex_init(&dev->usbc_mutex); hdpvr_probe() 302 dev->usbc_buf = kmalloc(64, GFP_KERNEL); hdpvr_probe() 303 if (!dev->usbc_buf) { hdpvr_probe() 304 v4l2_err(&dev->v4l2_dev, "Out of memory\n"); hdpvr_probe() 308 init_waitqueue_head(&dev->wait_buffer); hdpvr_probe() 309 init_waitqueue_head(&dev->wait_data); hdpvr_probe() 311 dev->workqueue = create_singlethread_workqueue("hdpvr_buffer"); hdpvr_probe() 312 if (!dev->workqueue) hdpvr_probe() 315 dev->options = hdpvr_default_options; hdpvr_probe() 318 dev->options.video_input = default_video_input; hdpvr_probe() 321 dev->options.audio_input = default_audio_input; hdpvr_probe() 323 dev->options.audio_codec = hdpvr_probe() 327 dev->udev = usb_get_dev(interface_to_usbdev(interface)); hdpvr_probe() 335 if (!dev->bulk_in_endpointAddr && hdpvr_probe() 340 dev->bulk_in_size = buffer_size; hdpvr_probe() 341 dev->bulk_in_endpointAddr = endpoint->bEndpointAddress; hdpvr_probe() 345 if (!dev->bulk_in_endpointAddr) { hdpvr_probe() 346 v4l2_err(&dev->v4l2_dev, "Could not find bulk-in endpoint\n"); hdpvr_probe() 351 if (hdpvr_device_init(dev)) { hdpvr_probe() 352 v4l2_err(&dev->v4l2_dev, "device init failed\n"); hdpvr_probe() 356 mutex_lock(&dev->io_mutex); hdpvr_probe() 357 if (hdpvr_alloc_buffers(dev, NUM_BUFFERS)) { hdpvr_probe() 358 mutex_unlock(&dev->io_mutex); hdpvr_probe() 359 v4l2_err(&dev->v4l2_dev, hdpvr_probe() 363 mutex_unlock(&dev->io_mutex); hdpvr_probe() 366 retval = hdpvr_register_i2c_adapter(dev); hdpvr_probe() 368 v4l2_err(&dev->v4l2_dev, "i2c adapter register failed\n"); hdpvr_probe() 372 client = hdpvr_register_ir_rx_i2c(dev); hdpvr_probe() 374 v4l2_err(&dev->v4l2_dev, "i2c IR RX device register failed\n"); hdpvr_probe() 379 client = hdpvr_register_ir_tx_i2c(dev); hdpvr_probe() 381 v4l2_err(&dev->v4l2_dev, "i2c IR TX device register failed\n"); hdpvr_probe() 387 retval = hdpvr_register_videodev(dev, &interface->dev, hdpvr_probe() 390 v4l2_err(&dev->v4l2_dev, "registering videodev failed\n"); hdpvr_probe() 395 v4l2_info(&dev->v4l2_dev, "device now attached to %s\n", hdpvr_probe() 396 video_device_node_name(&dev->video_dev)); hdpvr_probe() 401 i2c_del_adapter(&dev->i2c_adapter); hdpvr_probe() 404 if (dev) { hdpvr_probe() 406 if (dev->workqueue) hdpvr_probe() 407 destroy_workqueue(dev->workqueue); hdpvr_probe() 409 hdpvr_delete(dev); hdpvr_probe() 416 struct hdpvr_device dev = to_hdpvr_dev(usb_get_intfdata(interface)); hdpvr_disconnect() local 418 v4l2_info(&dev->v4l2_dev, "device %s disconnected\n", hdpvr_disconnect() 419 video_device_node_name(&dev->video_dev)); hdpvr_disconnect() 421 mutex_lock(&dev->io_mutex); hdpvr_disconnect() 422 dev->status = STATUS_DISCONNECTED; hdpvr_disconnect() 423 wake_up_interruptible(&dev->wait_data); hdpvr_disconnect() 424 wake_up_interruptible(&dev->wait_buffer); hdpvr_disconnect() 425 mutex_unlock(&dev->io_mutex); hdpvr_disconnect() 426 v4l2_device_disconnect(&dev->v4l2_dev); hdpvr_disconnect() 428 flush_workqueue(dev->workqueue); hdpvr_disconnect() 429 mutex_lock(&dev->io_mutex); hdpvr_disconnect() 430 hdpvr_cancel_queue(dev); hdpvr_disconnect() 431 mutex_unlock(&dev->io_mutex); hdpvr_disconnect() 433 i2c_del_adapter(&dev->i2c_adapter); hdpvr_disconnect() 435 video_unregister_device(&dev->video_dev); hdpvr_disconnect()
H A D	hdpvr-i2c.c	35 struct i2c_client hdpvr_register_ir_tx_i2c(struct hdpvr_device dev) hdpvr_register_ir_tx_i2c() argument 37 struct IR_i2c_init_data init_data = &dev->ir_i2c_init_data; hdpvr_register_ir_tx_i2c() 45 return i2c_new_device(&dev->i2c_adapter, &hdpvr_ir_tx_i2c_board_info); hdpvr_register_ir_tx_i2c() 48 struct i2c_client hdpvr_register_ir_rx_i2c(struct hdpvr_device dev) hdpvr_register_ir_rx_i2c() argument 50 struct IR_i2c_init_data init_data = &dev->ir_i2c_init_data; hdpvr_register_ir_rx_i2c() 63 return i2c_new_device(&dev->i2c_adapter, &hdpvr_ir_rx_i2c_board_info); hdpvr_register_ir_rx_i2c() 66 static int hdpvr_i2c_read(struct hdpvr_device dev, int bus, hdpvr_i2c_read() argument 72 if ((len > sizeof(dev->i2c_buf)) \|\| (wlen > sizeof(dev->i2c_buf))) hdpvr_i2c_read() 76 memcpy(&dev->i2c_buf, wdata, wlen); hdpvr_i2c_read() 77 ret = usb_control_msg(dev->udev, usb_sndctrlpipe(dev->udev, 0), hdpvr_i2c_read() 79 (bus << 8) \| addr, 0, &dev->i2c_buf, hdpvr_i2c_read() 85 ret = usb_control_msg(dev->udev, usb_rcvctrlpipe(dev->udev, 0), hdpvr_i2c_read() 87 (bus << 8) \| addr, 0, &dev->i2c_buf, len, 1000); hdpvr_i2c_read() 90 memcpy(data, &dev->i2c_buf, len); hdpvr_i2c_read() 98 static int hdpvr_i2c_write(struct hdpvr_device dev, int bus, hdpvr_i2c_write() argument 103 if (len > sizeof(dev->i2c_buf)) hdpvr_i2c_write() 106 memcpy(&dev->i2c_buf, data, len); hdpvr_i2c_write() 107 ret = usb_control_msg(dev->udev, usb_sndctrlpipe(dev->udev, 0), hdpvr_i2c_write() 109 (bus << 8) \| addr, 0, &dev->i2c_buf, len, 1000); hdpvr_i2c_write() 114 ret = usb_control_msg(dev->udev, usb_rcvctrlpipe(dev->udev, 0), hdpvr_i2c_write() 116 0, 0, &dev->i2c_buf, 2, 1000); hdpvr_i2c_write() 118 if ((ret == 2) && (dev->i2c_buf[1] == (len - 1))) hdpvr_i2c_write() 129 struct hdpvr_device dev = i2c_get_adapdata(i2c_adapter); hdpvr_transfer() local 135 mutex_lock(&dev->i2c_mutex); hdpvr_transfer() 141 retval = hdpvr_i2c_read(dev, 1, addr, NULL, 0, hdpvr_transfer() 144 retval = hdpvr_i2c_write(dev, 1, addr, msgs[0].buf, hdpvr_transfer() 148 v4l2_warn(&dev->v4l2_dev, "refusing 2-phase i2c xfer " hdpvr_transfer() 155 v4l2_warn(&dev->v4l2_dev, "refusing complex xfer with " hdpvr_transfer() 166 retval = hdpvr_i2c_read(dev, 1, addr, msgs[0].buf, msgs[0].len, hdpvr_transfer() 169 v4l2_warn(&dev->v4l2_dev, "refusing %d-phase i2c xfer\n", num); hdpvr_transfer() 173 mutex_unlock(&dev->i2c_mutex); hdpvr_transfer() 194 static int hdpvr_activate_ir(struct hdpvr_device dev) hdpvr_activate_ir() argument 198 mutex_lock(&dev->i2c_mutex); hdpvr_activate_ir() 200 hdpvr_i2c_read(dev, 0, 0x54, NULL, 0, buffer, 1); hdpvr_activate_ir() 204 hdpvr_i2c_write(dev, 1, 0x54, buffer, 2); hdpvr_activate_ir() 207 hdpvr_i2c_write(dev, 1, 0x54, buffer, 2); hdpvr_activate_ir() 209 mutex_unlock(&dev->i2c_mutex); hdpvr_activate_ir() 214 int hdpvr_register_i2c_adapter(struct hdpvr_device *dev) hdpvr_register_i2c_adapter() argument 218 hdpvr_activate_ir(dev); hdpvr_register_i2c_adapter() 220 dev->i2c_adapter = hdpvr_i2c_adapter_template; hdpvr_register_i2c_adapter() 221 dev->i2c_adapter.dev.parent = &dev->udev->dev; hdpvr_register_i2c_adapter() 223 i2c_set_adapdata(&dev->i2c_adapter, dev); hdpvr_register_i2c_adapter() 225 retval = i2c_add_adapter(&dev->i2c_adapter); hdpvr_register_i2c_adapter()
/linux-4.1.27/drivers/mtd/nand/
H A D	r852.c	34 static inline uint8_t r852_read_reg(struct r852_device dev, int address) r852_read_reg() argument 36 uint8_t reg = readb(dev->mmio + address); r852_read_reg() 41 static inline void r852_write_reg(struct r852_device dev, r852_write_reg() argument 44 writeb(value, dev->mmio + address); r852_write_reg() 50 static inline uint32_t r852_read_reg_dword(struct r852_device dev, int address) r852_read_reg_dword() argument 52 uint32_t reg = le32_to_cpu(readl(dev->mmio + address)); r852_read_reg_dword() 57 static inline void r852_write_reg_dword(struct r852_device dev, r852_write_reg_dword() argument 60 writel(cpu_to_le32(value), dev->mmio + address); r852_write_reg_dword() 73 static void r852_dma_test(struct r852_device dev) r852_dma_test() argument 75 dev->dma_usable = (r852_read_reg(dev, R852_DMA_CAP) & r852_dma_test() 78 if (!dev->dma_usable) r852_dma_test() 83 dev->dma_usable = 0; r852_dma_test() 89 Expects dev->dma_dir and dev->dma_state be set 91 static void r852_dma_enable(struct r852_device dev) r852_dma_enable() argument 96 dma_reg = r852_read_reg_dword(dev, R852_DMA_SETTINGS); r852_dma_enable() 99 if (dev->dma_dir) r852_dma_enable() 102 if (dev->dma_state == DMA_INTERNAL) { r852_dma_enable() 106 r852_write_reg_dword(dev, R852_DMA_ADDR, r852_dma_enable() 107 cpu_to_le32(dev->phys_bounce_buffer)); r852_dma_enable() 110 r852_write_reg_dword(dev, R852_DMA_ADDR, r852_dma_enable() 111 cpu_to_le32(dev->phys_dma_addr)); r852_dma_enable() 115 r852_read_reg_dword(dev, R852_DMA_ADDR); r852_dma_enable() 117 r852_write_reg_dword(dev, R852_DMA_SETTINGS, dma_reg); r852_dma_enable() 120 dma_irq_reg = r852_read_reg_dword(dev, R852_DMA_IRQ_ENABLE); r852_dma_enable() 121 r852_write_reg_dword(dev, R852_DMA_IRQ_ENABLE, r852_dma_enable() 132 static void r852_dma_done(struct r852_device dev, int error) r852_dma_done() argument 134 WARN_ON(dev->dma_stage == 0); r852_dma_done() 136 r852_write_reg_dword(dev, R852_DMA_IRQ_STA, r852_dma_done() 137 r852_read_reg_dword(dev, R852_DMA_IRQ_STA)); r852_dma_done() 139 r852_write_reg_dword(dev, R852_DMA_SETTINGS, 0); r852_dma_done() 140 r852_write_reg_dword(dev, R852_DMA_IRQ_ENABLE, 0); r852_dma_done() 143 r852_write_reg_dword(dev, R852_DMA_ADDR, r852_dma_done() 144 cpu_to_le32(dev->phys_bounce_buffer)); r852_dma_done() 145 r852_read_reg_dword(dev, R852_DMA_ADDR); r852_dma_done() 147 dev->dma_error = error; r852_dma_done() 148 dev->dma_stage = 0; r852_dma_done() 150 if (dev->phys_dma_addr && dev->phys_dma_addr != dev->phys_bounce_buffer) r852_dma_done() 151 pci_unmap_single(dev->pci_dev, dev->phys_dma_addr, R852_DMA_LEN, r852_dma_done() 152 dev->dma_dir ? PCI_DMA_FROMDEVICE : PCI_DMA_TODEVICE); r852_dma_done() 158 static int r852_dma_wait(struct r852_device dev) r852_dma_wait() argument 160 long timeout = wait_for_completion_timeout(&dev->dma_done, r852_dma_wait() 173 static void r852_do_dma(struct r852_device dev, uint8_t buf, int do_read) r852_do_dma() argument 179 dev->dma_error = 0; r852_do_dma() 182 dev->dma_dir = do_read; r852_do_dma() 183 dev->dma_stage = 1; r852_do_dma() 184 reinit_completion(&dev->dma_done); r852_do_dma() 190 dev->dma_state = do_read ? DMA_INTERNAL : DMA_MEMORY; r852_do_dma() 197 dev->phys_dma_addr = pci_map_single(dev->pci_dev, (void )buf, r852_do_dma() 201 if (pci_dma_mapping_error(dev->pci_dev, dev->phys_dma_addr)) r852_do_dma() 207 dev->phys_dma_addr = dev->phys_bounce_buffer; r852_do_dma() 209 memcpy(dev->bounce_buffer, buf, R852_DMA_LEN); r852_do_dma() 213 spin_lock_irqsave(&dev->irqlock, flags); r852_do_dma() 214 r852_dma_enable(dev); r852_do_dma() 215 spin_unlock_irqrestore(&dev->irqlock, flags); r852_do_dma() 218 error = r852_dma_wait(dev); r852_do_dma() 221 r852_dma_done(dev, error); r852_do_dma() 226 memcpy((void )buf, dev->bounce_buffer, R852_DMA_LEN); r852_do_dma() 234 struct r852_device dev = r852_get_dev(mtd); r852_write_buf() local 238 if (dev->card_unstable) r852_write_buf() 242 if (len == R852_DMA_LEN && dev->dma_usable) { r852_write_buf() 243 r852_do_dma(dev, (uint8_t )buf, 0); r852_write_buf() 250 r852_write_reg_dword(dev, R852_DATALINE, reg); r852_write_buf() 258 r852_write_reg(dev, R852_DATALINE, buf++); r852_write_buf() 268 struct r852_device dev = r852_get_dev(mtd); r852_read_buf() local 271 if (dev->card_unstable) { r852_read_buf() 279 if (len == R852_DMA_LEN && dev->dma_usable) { r852_read_buf() 280 r852_do_dma(dev, buf, 1); r852_read_buf() 287 reg = r852_read_reg_dword(dev, R852_DATALINE); r852_read_buf() 297 buf++ = r852_read_reg(dev, R852_DATALINE); r852_read_buf() 305 struct r852_device dev = r852_get_dev(mtd); r852_read_byte() local 308 if (dev->card_unstable) r852_read_byte() 311 return r852_read_reg(dev, R852_DATALINE); r852_read_byte() 319 struct r852_device dev = r852_get_dev(mtd); r852_cmdctl() local 321 if (dev->card_unstable) r852_cmdctl() 326 dev->ctlreg &= ~(R852_CTL_DATA \| R852_CTL_COMMAND \| r852_cmdctl() 330 dev->ctlreg \|= R852_CTL_DATA; r852_cmdctl() 333 dev->ctlreg \|= R852_CTL_COMMAND; r852_cmdctl() 336 dev->ctlreg \|= (R852_CTL_CARDENABLE \| R852_CTL_ON); r852_cmdctl() 338 dev->ctlreg &= ~R852_CTL_WRITE; r852_cmdctl() 342 dev->ctlreg \|= R852_CTL_WRITE; r852_cmdctl() 344 r852_write_reg(dev, R852_CTL, dev->ctlreg); r852_cmdctl() 349 if (dat == NAND_CMD_SEQIN && (dev->ctlreg & R852_CTL_COMMAND)) { r852_cmdctl() 350 dev->ctlreg \|= R852_CTL_WRITE; r852_cmdctl() 351 r852_write_reg(dev, R852_CTL, dev->ctlreg); r852_cmdctl() 355 r852_write_reg(dev, R852_DATALINE, dat); r852_cmdctl() 364 struct r852_device dev = chip->priv; r852_wait() local 380 if (dev->dma_error) { r852_wait() 382 dev->dma_error = 0; r852_wait() 393 struct r852_device dev = r852_get_dev(mtd); r852_ready() local 394 return !(r852_read_reg(dev, R852_CARD_STA) & R852_CARD_STA_BUSY); r852_ready() 404 struct r852_device dev = r852_get_dev(mtd); r852_ecc_hwctl() local 406 if (dev->card_unstable) r852_ecc_hwctl() 413 dev->ctlreg \|= R852_CTL_ECC_ENABLE; r852_ecc_hwctl() 416 r852_write_reg(dev, R852_CTL, r852_ecc_hwctl() 417 dev->ctlreg \| R852_CTL_ECC_ACCESS); r852_ecc_hwctl() 419 r852_read_reg_dword(dev, R852_DATALINE); r852_ecc_hwctl() 420 r852_write_reg(dev, R852_CTL, dev->ctlreg); r852_ecc_hwctl() 425 dev->ctlreg &= ~R852_CTL_ECC_ENABLE; r852_ecc_hwctl() 426 r852_write_reg(dev, R852_CTL, dev->ctlreg); r852_ecc_hwctl() 437 struct r852_device dev = r852_get_dev(mtd); r852_ecc_calculate() local 441 if (dev->card_unstable) r852_ecc_calculate() 444 dev->ctlreg &= ~R852_CTL_ECC_ENABLE; r852_ecc_calculate() 445 r852_write_reg(dev, R852_CTL, dev->ctlreg \| R852_CTL_ECC_ACCESS); r852_ecc_calculate() 447 ecc1 = r852_read_reg_dword(dev, R852_DATALINE); r852_ecc_calculate() 448 ecc2 = r852_read_reg_dword(dev, R852_DATALINE); r852_ecc_calculate() 458 r852_write_reg(dev, R852_CTL, dev->ctlreg); r852_ecc_calculate() 473 struct r852_device dev = r852_get_dev(mtd); r852_ecc_correct() local 475 if (dev->card_unstable) r852_ecc_correct() 478 if (dev->dma_error) { r852_ecc_correct() 479 dev->dma_error = 0; r852_ecc_correct() 483 r852_write_reg(dev, R852_CTL, dev->ctlreg \| R852_CTL_ECC_ACCESS); r852_ecc_correct() 484 ecc_reg = r852_read_reg_dword(dev, R852_DATALINE); r852_ecc_correct() 485 r852_write_reg(dev, R852_CTL, dev->ctlreg); r852_ecc_correct() 534 static void r852_engine_enable(struct r852_device dev) r852_engine_enable() argument 536 if (r852_read_reg_dword(dev, R852_HW) & R852_HW_UNKNOWN) { r852_engine_enable() 537 r852_write_reg(dev, R852_CTL, R852_CTL_RESET \| R852_CTL_ON); r852_engine_enable() 538 r852_write_reg_dword(dev, R852_HW, R852_HW_ENABLED); r852_engine_enable() 540 r852_write_reg_dword(dev, R852_HW, R852_HW_ENABLED); r852_engine_enable() 541 r852_write_reg(dev, R852_CTL, R852_CTL_RESET \| R852_CTL_ON); r852_engine_enable() 544 r852_write_reg(dev, R852_CTL, 0); r852_engine_enable() 552 static void r852_engine_disable(struct r852_device dev) r852_engine_disable() argument 554 r852_write_reg_dword(dev, R852_HW, 0); r852_engine_disable() 555 r852_write_reg(dev, R852_CTL, R852_CTL_RESET); r852_engine_disable() 562 static void r852_card_update_present(struct r852_device dev) r852_card_update_present() argument 567 spin_lock_irqsave(&dev->irqlock, flags); r852_card_update_present() 568 reg = r852_read_reg(dev, R852_CARD_STA); r852_card_update_present() 569 dev->card_detected = !!(reg & R852_CARD_STA_PRESENT); r852_card_update_present() 570 spin_unlock_irqrestore(&dev->irqlock, flags); r852_card_update_present() 577 static void r852_update_card_detect(struct r852_device dev) r852_update_card_detect() argument 579 int card_detect_reg = r852_read_reg(dev, R852_CARD_IRQ_ENABLE); r852_update_card_detect() 580 dev->card_unstable = 0; r852_update_card_detect() 585 card_detect_reg \|= dev->card_detected ? r852_update_card_detect() 588 r852_write_reg(dev, R852_CARD_IRQ_ENABLE, card_detect_reg); r852_update_card_detect() 594 struct mtd_info mtd = container_of(sys_dev, struct mtd_info, dev); r852_media_type_show() 595 struct r852_device dev = r852_get_dev(mtd); r852_media_type_show() local 596 char data = dev->sm ? "smartmedia" : "xd"; r852_media_type_show() 606 static void r852_update_media_status(struct r852_device dev) r852_update_media_status() argument 612 spin_lock_irqsave(&dev->irqlock, flags); r852_update_media_status() 613 if (!dev->card_detected) { r852_update_media_status() 615 spin_unlock_irqrestore(&dev->irqlock, flags); r852_update_media_status() 619 readonly = r852_read_reg(dev, R852_CARD_STA) & R852_CARD_STA_RO; r852_update_media_status() 620 reg = r852_read_reg(dev, R852_DMA_CAP); r852_update_media_status() 621 dev->sm = (reg & (R852_DMA1 \| R852_DMA2)) && (reg & R852_SMBIT); r852_update_media_status() 624 dev->sm ? "SmartMedia" : "xD", r852_update_media_status() 627 dev->readonly = readonly; r852_update_media_status() 628 spin_unlock_irqrestore(&dev->irqlock, flags); r852_update_media_status() 635 static int r852_register_nand_device(struct r852_device dev) r852_register_nand_device() argument 637 dev->mtd = kzalloc(sizeof(struct mtd_info), GFP_KERNEL); r852_register_nand_device() 639 if (!dev->mtd) r852_register_nand_device() 642 WARN_ON(dev->card_registred); r852_register_nand_device() 644 dev->mtd->owner = THIS_MODULE; r852_register_nand_device() 645 dev->mtd->priv = dev->chip; r852_register_nand_device() 646 dev->mtd->dev.parent = &dev->pci_dev->dev; r852_register_nand_device() 648 if (dev->readonly) r852_register_nand_device() 649 dev->chip->options \|= NAND_ROM; r852_register_nand_device() 651 r852_engine_enable(dev); r852_register_nand_device() 653 if (sm_register_device(dev->mtd, dev->sm)) r852_register_nand_device() 656 if (device_create_file(&dev->mtd->dev, &dev_attr_media_type)) r852_register_nand_device() 659 dev->card_registred = 1; r852_register_nand_device() 662 kfree(dev->mtd); r852_register_nand_device() 665 dev->card_detected = 0; r852_register_nand_device() 673 static void r852_unregister_nand_device(struct r852_device dev) r852_unregister_nand_device() argument 675 if (!dev->card_registred) r852_unregister_nand_device() 678 device_remove_file(&dev->mtd->dev, &dev_attr_media_type); r852_unregister_nand_device() 679 nand_release(dev->mtd); r852_unregister_nand_device() 680 r852_engine_disable(dev); r852_unregister_nand_device() 681 dev->card_registred = 0; r852_unregister_nand_device() 682 kfree(dev->mtd); r852_unregister_nand_device() 683 dev->mtd = NULL; r852_unregister_nand_device() 689 struct r852_device dev = r852_card_detect_work() local 692 r852_card_update_present(dev); r852_card_detect_work() 693 r852_update_card_detect(dev); r852_card_detect_work() 694 dev->card_unstable = 0; r852_card_detect_work() 697 if (dev->card_detected == dev->card_registred) r852_card_detect_work() 701 r852_update_media_status(dev); r852_card_detect_work() 704 if (dev->card_detected) r852_card_detect_work() 705 r852_register_nand_device(dev); r852_card_detect_work() 707 r852_unregister_nand_device(dev); r852_card_detect_work() 709 r852_update_card_detect(dev); r852_card_detect_work() 713 static void r852_disable_irqs(struct r852_device dev) r852_disable_irqs() argument 716 reg = r852_read_reg(dev, R852_CARD_IRQ_ENABLE); r852_disable_irqs() 717 r852_write_reg(dev, R852_CARD_IRQ_ENABLE, reg & ~R852_CARD_IRQ_MASK); r852_disable_irqs() 719 reg = r852_read_reg_dword(dev, R852_DMA_IRQ_ENABLE); r852_disable_irqs() 720 r852_write_reg_dword(dev, R852_DMA_IRQ_ENABLE, r852_disable_irqs() 723 r852_write_reg(dev, R852_CARD_IRQ_STA, R852_CARD_IRQ_MASK); r852_disable_irqs() 724 r852_write_reg_dword(dev, R852_DMA_IRQ_STA, R852_DMA_IRQ_MASK); r852_disable_irqs() 730 struct r852_device dev = (struct r852_device )data; r852_irq() local 736 spin_lock_irqsave(&dev->irqlock, flags); r852_irq() 739 card_status = r852_read_reg(dev, R852_CARD_IRQ_STA); r852_irq() 740 r852_write_reg(dev, R852_CARD_IRQ_STA, card_status); r852_irq() 745 dev->card_detected = !!(card_status & R852_CARD_IRQ_INSERT); r852_irq() 749 WARN_ON(dev->card_unstable); r852_irq() 753 r852_disable_irqs(dev); r852_irq() 755 if (dev->card_unstable) r852_irq() 759 dev->card_unstable = 1; r852_irq() 760 queue_delayed_work(dev->card_workqueue, r852_irq() 761 &dev->card_detect_work, msecs_to_jiffies(100)); r852_irq() 767 dma_status = r852_read_reg_dword(dev, R852_DMA_IRQ_STA); r852_irq() 768 r852_write_reg_dword(dev, R852_DMA_IRQ_STA, dma_status); r852_irq() 776 r852_dma_done(dev, -EIO); r852_irq() 777 complete(&dev->dma_done); r852_irq() 782 WARN_ON_ONCE(dev->dma_stage == 0); r852_irq() 784 if (dev->dma_stage == 0) r852_irq() 788 if (dev->dma_state == DMA_INTERNAL && r852_irq() 791 dev->dma_state = DMA_MEMORY; r852_irq() 792 dev->dma_stage++; r852_irq() 796 if (dev->dma_state == DMA_MEMORY && r852_irq() 798 dev->dma_state = DMA_INTERNAL; r852_irq() 799 dev->dma_stage++; r852_irq() 803 if (dev->dma_stage == 2) r852_irq() 804 r852_dma_enable(dev); r852_irq() 807 if (dev->dma_stage == 3) { r852_irq() 808 r852_dma_done(dev, 0); r852_irq() 809 complete(&dev->dma_done); r852_irq() 822 spin_unlock_irqrestore(&dev->irqlock, flags); r852_irq() 830 struct r852_device dev; r852_probe() local 880 dev = kzalloc(sizeof(struct r852_device), GFP_KERNEL); r852_probe() 882 if (!dev) r852_probe() 885 chip->priv = dev; r852_probe() 886 dev->chip = chip; r852_probe() 887 dev->pci_dev = pci_dev; r852_probe() 888 pci_set_drvdata(pci_dev, dev); r852_probe() 890 dev->bounce_buffer = pci_alloc_consistent(pci_dev, R852_DMA_LEN, r852_probe() 891 &dev->phys_bounce_buffer); r852_probe() 893 if (!dev->bounce_buffer) r852_probe() 898 dev->mmio = pci_ioremap_bar(pci_dev, 0); r852_probe() 900 if (!dev->mmio) r852_probe() 904 dev->tmp_buffer = kzalloc(SM_SECTOR_SIZE, GFP_KERNEL); r852_probe() 906 if (!dev->tmp_buffer) r852_probe() 909 init_completion(&dev->dma_done); r852_probe() 911 dev->card_workqueue = create_freezable_workqueue(DRV_NAME); r852_probe() 913 if (!dev->card_workqueue) r852_probe() 916 INIT_DELAYED_WORK(&dev->card_detect_work, r852_card_detect_work); r852_probe() 919 r852_engine_disable(dev); r852_probe() 920 r852_disable_irqs(dev); r852_probe() 922 r852_dma_test(dev); r852_probe() 924 dev->irq = pci_dev->irq; r852_probe() 925 spin_lock_init(&dev->irqlock); r852_probe() 927 dev->card_detected = 0; r852_probe() 928 r852_card_update_present(dev); r852_probe() 933 DRV_NAME, dev)) r852_probe() 937 queue_delayed_work(dev->card_workqueue, r852_probe() 938 &dev->card_detect_work, 0); r852_probe() 945 destroy_workqueue(dev->card_workqueue); r852_probe() 947 kfree(dev->tmp_buffer); r852_probe() 949 pci_iounmap(pci_dev, dev->mmio); r852_probe() 952 dev->bounce_buffer, dev->phys_bounce_buffer); r852_probe() 954 kfree(dev); r852_probe() 968 struct r852_device dev = pci_get_drvdata(pci_dev); r852_remove() local 972 cancel_delayed_work_sync(&dev->card_detect_work); r852_remove() 973 destroy_workqueue(dev->card_workqueue); r852_remove() 976 r852_unregister_nand_device(dev); r852_remove() 979 r852_disable_irqs(dev); r852_remove() 980 synchronize_irq(dev->irq); r852_remove() 981 free_irq(dev->irq, dev); r852_remove() 984 kfree(dev->tmp_buffer); r852_remove() 985 pci_iounmap(pci_dev, dev->mmio); r852_remove() 987 dev->bounce_buffer, dev->phys_bounce_buffer); r852_remove() 989 kfree(dev->chip); r852_remove() 990 kfree(dev); r852_remove() 999 struct r852_device dev = pci_get_drvdata(pci_dev); r852_shutdown() local 1001 cancel_delayed_work_sync(&dev->card_detect_work); r852_shutdown() 1002 r852_disable_irqs(dev); r852_shutdown() 1003 synchronize_irq(dev->irq); r852_shutdown() 1010 struct r852_device dev = pci_get_drvdata(to_pci_dev(device)); r852_suspend() local 1012 if (dev->ctlreg & R852_CTL_CARDENABLE) r852_suspend() 1016 cancel_delayed_work_sync(&dev->card_detect_work); r852_suspend() 1019 r852_disable_irqs(dev); r852_suspend() 1020 r852_engine_disable(dev); r852_suspend() 1025 dev->card_unstable = 0; r852_suspend() 1031 struct r852_device dev = pci_get_drvdata(to_pci_dev(device)); r852_resume() local 1033 r852_disable_irqs(dev); r852_resume() 1034 r852_card_update_present(dev); r852_resume() 1035 r852_engine_disable(dev); r852_resume() 1039 if (dev->card_detected != dev->card_registred) { r852_resume() 1041 dev->card_detected ? "added" : "removed"); r852_resume() 1043 queue_delayed_work(dev->card_workqueue, r852_resume() 1044 &dev->card_detect_work, msecs_to_jiffies(1000)); r852_resume() 1049 if (dev->card_registred) { r852_resume() 1050 r852_engine_enable(dev); r852_resume() 1051 dev->chip->select_chip(dev->mtd, 0); r852_resume() 1052 dev->chip->cmdfunc(dev->mtd, NAND_CMD_RESET, -1, -1); r852_resume() 1053 dev->chip->select_chip(dev->mtd, -1); r852_resume() 1057 r852_update_card_detect(dev); r852_resume()
/linux-4.1.27/drivers/base/power/
H A D	power.h	3 static inline void device_pm_init_common(struct device dev) device_pm_init_common() argument 5 if (!dev->power.early_init) { device_pm_init_common() 6 spin_lock_init(&dev->power.lock); device_pm_init_common() 7 dev->power.qos = NULL; device_pm_init_common() 8 dev->power.early_init = true; device_pm_init_common() 14 static inline void pm_runtime_early_init(struct device dev) pm_runtime_early_init() argument 16 dev->power.disable_depth = 1; pm_runtime_early_init() 17 device_pm_init_common(dev); pm_runtime_early_init() 20 extern void pm_runtime_init(struct device dev); 21 extern void pm_runtime_remove(struct device dev); 27 extern int dpm_sysfs_add(struct device dev); 28 extern void dpm_sysfs_remove(struct device dev); 29 extern void rpm_sysfs_remove(struct device dev); 30 extern int wakeup_sysfs_add(struct device dev); 31 extern void wakeup_sysfs_remove(struct device dev); 32 extern int pm_qos_sysfs_add_resume_latency(struct device dev); 33 extern void pm_qos_sysfs_remove_resume_latency(struct device dev); 34 extern int pm_qos_sysfs_add_flags(struct device dev); 35 extern void pm_qos_sysfs_remove_flags(struct device dev); 39 static inline void pm_runtime_early_init(struct device dev) pm_runtime_early_init() argument 41 device_pm_init_common(dev); pm_runtime_early_init() 44 static inline void pm_runtime_init(struct device dev) {} pm_runtime_remove() argument 45 static inline void pm_runtime_remove(struct device dev) {} pm_runtime_remove() argument 47 static inline int dpm_sysfs_add(struct device dev) { return 0; } dpm_sysfs_remove() argument 48 static inline void dpm_sysfs_remove(struct device dev) {} rpm_sysfs_remove() argument 49 static inline void rpm_sysfs_remove(struct device dev) {} wakeup_sysfs_add() argument 50 static inline int wakeup_sysfs_add(struct device dev) { return 0; } wakeup_sysfs_remove() argument 51 static inline void wakeup_sysfs_remove(struct device dev) {} pm_qos_sysfs_add() argument 52 static inline int pm_qos_sysfs_add(struct device dev) { return 0; } pm_qos_sysfs_remove() argument 53 static inline void pm_qos_sysfs_remove(struct device dev) {} pm_qos_sysfs_remove() argument 70 extern void device_pm_sleep_init(struct device dev); 79 static inline void device_pm_sleep_init(struct device dev) {} device_pm_sleep_init() argument 81 static inline void device_pm_add(struct device dev) {} device_pm_add() argument 83 static inline void device_pm_remove(struct device dev) device_pm_remove() argument 85 pm_runtime_remove(dev); device_pm_remove() 92 static inline void device_pm_move_last(struct device dev) {} device_pm_move_last() argument 96 static inline void device_pm_init(struct device *dev) device_pm_init() argument 98 device_pm_init_common(dev); device_pm_init() 99 device_pm_sleep_init(dev); device_pm_init() 100 pm_runtime_init(dev); device_pm_init()
H A D	generic_ops.c	16 * @dev: Device to suspend. 18 * If PM operations are defined for the @dev's driver and they include 22 int pm_generic_runtime_suspend(struct device dev) pm_generic_runtime_suspend() argument 24 const struct dev_pm_ops pm = dev->driver ? dev->driver->pm : NULL; pm_generic_runtime_suspend() 27 ret = pm && pm->runtime_suspend ? pm->runtime_suspend(dev) : 0; pm_generic_runtime_suspend() 35 * @dev: Device to resume. 37 * If PM operations are defined for the @dev's driver and they include 41 int pm_generic_runtime_resume(struct device dev) pm_generic_runtime_resume() argument 43 const struct dev_pm_ops pm = dev->driver ? dev->driver->pm : NULL; pm_generic_runtime_resume() 46 ret = pm && pm->runtime_resume ? pm->runtime_resume(dev) : 0; pm_generic_runtime_resume() 56 * @dev: Device to prepare. 60 int pm_generic_prepare(struct device dev) pm_generic_prepare() argument 62 struct device_driver drv = dev->driver; pm_generic_prepare() 66 ret = drv->pm->prepare(dev); pm_generic_prepare() 73 * @dev: Device to suspend. 75 int pm_generic_suspend_noirq(struct device dev) pm_generic_suspend_noirq() argument 77 const struct dev_pm_ops pm = dev->driver ? dev->driver->pm : NULL; pm_generic_suspend_noirq() 79 return pm && pm->suspend_noirq ? pm->suspend_noirq(dev) : 0; pm_generic_suspend_noirq() 85 * @dev: Device to suspend. 87 int pm_generic_suspend_late(struct device dev) pm_generic_suspend_late() argument 89 const struct dev_pm_ops pm = dev->driver ? dev->driver->pm : NULL; pm_generic_suspend_late() 91 return pm && pm->suspend_late ? pm->suspend_late(dev) : 0; pm_generic_suspend_late() 97 * @dev: Device to suspend. 99 int pm_generic_suspend(struct device dev) pm_generic_suspend() argument 101 const struct dev_pm_ops pm = dev->driver ? dev->driver->pm : NULL; pm_generic_suspend() 103 return pm && pm->suspend ? pm->suspend(dev) : 0; pm_generic_suspend() 109 * @dev: Device to freeze. 111 int pm_generic_freeze_noirq(struct device dev) pm_generic_freeze_noirq() argument 113 const struct dev_pm_ops pm = dev->driver ? dev->driver->pm : NULL; pm_generic_freeze_noirq() 115 return pm && pm->freeze_noirq ? pm->freeze_noirq(dev) : 0; pm_generic_freeze_noirq() 121 * @dev: Device to freeze. 123 int pm_generic_freeze_late(struct device dev) pm_generic_freeze_late() argument 125 const struct dev_pm_ops pm = dev->driver ? dev->driver->pm : NULL; pm_generic_freeze_late() 127 return pm && pm->freeze_late ? pm->freeze_late(dev) : 0; pm_generic_freeze_late() 133 * @dev: Device to freeze. 135 int pm_generic_freeze(struct device dev) pm_generic_freeze() argument 137 const struct dev_pm_ops pm = dev->driver ? dev->driver->pm : NULL; pm_generic_freeze() 139 return pm && pm->freeze ? pm->freeze(dev) : 0; pm_generic_freeze() 145 * @dev: Device to handle. 147 int pm_generic_poweroff_noirq(struct device dev) pm_generic_poweroff_noirq() argument 149 const struct dev_pm_ops pm = dev->driver ? dev->driver->pm : NULL; pm_generic_poweroff_noirq() 151 return pm && pm->poweroff_noirq ? pm->poweroff_noirq(dev) : 0; pm_generic_poweroff_noirq() 157 * @dev: Device to handle. 159 int pm_generic_poweroff_late(struct device dev) pm_generic_poweroff_late() argument 161 const struct dev_pm_ops pm = dev->driver ? dev->driver->pm : NULL; pm_generic_poweroff_late() 163 return pm && pm->poweroff_late ? pm->poweroff_late(dev) : 0; pm_generic_poweroff_late() 169 * @dev: Device to handle. 171 int pm_generic_poweroff(struct device dev) pm_generic_poweroff() argument 173 const struct dev_pm_ops pm = dev->driver ? dev->driver->pm : NULL; pm_generic_poweroff() 175 return pm && pm->poweroff ? pm->poweroff(dev) : 0; pm_generic_poweroff() 181 * @dev: Device to thaw. 183 int pm_generic_thaw_noirq(struct device dev) pm_generic_thaw_noirq() argument 185 const struct dev_pm_ops pm = dev->driver ? dev->driver->pm : NULL; pm_generic_thaw_noirq() 187 return pm && pm->thaw_noirq ? pm->thaw_noirq(dev) : 0; pm_generic_thaw_noirq() 193 * @dev: Device to thaw. 195 int pm_generic_thaw_early(struct device dev) pm_generic_thaw_early() argument 197 const struct dev_pm_ops pm = dev->driver ? dev->driver->pm : NULL; pm_generic_thaw_early() 199 return pm && pm->thaw_early ? pm->thaw_early(dev) : 0; pm_generic_thaw_early() 205 * @dev: Device to thaw. 207 int pm_generic_thaw(struct device dev) pm_generic_thaw() argument 209 const struct dev_pm_ops pm = dev->driver ? dev->driver->pm : NULL; pm_generic_thaw() 211 return pm && pm->thaw ? pm->thaw(dev) : 0; pm_generic_thaw() 217 * @dev: Device to resume. 219 int pm_generic_resume_noirq(struct device dev) pm_generic_resume_noirq() argument 221 const struct dev_pm_ops pm = dev->driver ? dev->driver->pm : NULL; pm_generic_resume_noirq() 223 return pm && pm->resume_noirq ? pm->resume_noirq(dev) : 0; pm_generic_resume_noirq() 229 * @dev: Device to resume. 231 int pm_generic_resume_early(struct device dev) pm_generic_resume_early() argument 233 const struct dev_pm_ops pm = dev->driver ? dev->driver->pm : NULL; pm_generic_resume_early() 235 return pm && pm->resume_early ? pm->resume_early(dev) : 0; pm_generic_resume_early() 241 * @dev: Device to resume. 243 int pm_generic_resume(struct device dev) pm_generic_resume() argument 245 const struct dev_pm_ops pm = dev->driver ? dev->driver->pm : NULL; pm_generic_resume() 247 return pm && pm->resume ? pm->resume(dev) : 0; pm_generic_resume() 253 * @dev: Device to restore. 255 int pm_generic_restore_noirq(struct device dev) pm_generic_restore_noirq() argument 257 const struct dev_pm_ops pm = dev->driver ? dev->driver->pm : NULL; pm_generic_restore_noirq() 259 return pm && pm->restore_noirq ? pm->restore_noirq(dev) : 0; pm_generic_restore_noirq() 265 * @dev: Device to resume. 267 int pm_generic_restore_early(struct device dev) pm_generic_restore_early() argument 269 const struct dev_pm_ops pm = dev->driver ? dev->driver->pm : NULL; pm_generic_restore_early() 271 return pm && pm->restore_early ? pm->restore_early(dev) : 0; pm_generic_restore_early() 277 * @dev: Device to restore. 279 int pm_generic_restore(struct device dev) pm_generic_restore() argument 281 const struct dev_pm_ops pm = dev->driver ? dev->driver->pm : NULL; pm_generic_restore() 283 return pm && pm->restore ? pm->restore(dev) : 0; pm_generic_restore() 289 * @dev: Device to handle. 293 void pm_generic_complete(struct device dev) pm_generic_complete() argument 295 struct device_driver drv = dev->driver; pm_generic_complete() 298 drv->pm->complete(dev); pm_generic_complete() 304 pm_request_idle(dev); pm_generic_complete()
H A D	main.c	89 * @dev: Device object being initialized. 91 void device_pm_sleep_init(struct device dev) device_pm_sleep_init() argument 93 dev->power.is_prepared = false; device_pm_sleep_init() 94 dev->power.is_suspended = false; device_pm_sleep_init() 95 dev->power.is_noirq_suspended = false; device_pm_sleep_init() 96 dev->power.is_late_suspended = false; device_pm_sleep_init() 97 init_completion(&dev->power.completion); device_pm_sleep_init() 98 complete_all(&dev->power.completion); device_pm_sleep_init() 99 dev->power.wakeup = NULL; device_pm_sleep_init() 100 INIT_LIST_HEAD(&dev->power.entry); device_pm_sleep_init() 121 @dev: Device to add to the list. 123 void device_pm_add(struct device dev) device_pm_add() argument 126 dev->bus ? dev->bus->name : "No Bus", dev_name(dev)); device_pm_add() 128 if (dev->parent && dev->parent->power.is_prepared) device_pm_add() 129 dev_warn(dev, "parent %s should not be sleeping\n", device_pm_add() 130 dev_name(dev->parent)); device_pm_add() 131 list_add_tail(&dev->power.entry, &dpm_list); device_pm_add() 137 @dev: Device to be removed from the list. 139 void device_pm_remove(struct device dev) device_pm_remove() argument 142 dev->bus ? dev->bus->name : "No Bus", dev_name(dev)); device_pm_remove() 143 complete_all(&dev->power.completion); device_pm_remove() 145 list_del_init(&dev->power.entry); device_pm_remove() 147 device_wakeup_disable(dev); device_pm_remove() 148 pm_runtime_remove(dev); device_pm_remove() 181 @dev: Device to move in dpm_list. 183 void device_pm_move_last(struct device dev) device_pm_move_last() argument 186 dev->bus ? dev->bus->name : "No Bus", dev_name(dev)); device_pm_move_last() 187 list_move_tail(&dev->power.entry, &dpm_list); device_pm_move_last() 190 static ktime_t initcall_debug_start(struct device dev) initcall_debug_start() argument 196 dev_name(dev), task_pid_nr(current), initcall_debug_start() 197 dev->parent ? dev_name(dev->parent) : "none"); initcall_debug_start() 204 static void initcall_debug_report(struct device dev, ktime_t calltime, initcall_debug_report() argument 214 pr_info("call %s+ returned %d after %Ld usecs\n", dev_name(dev), initcall_debug_report() 221 @dev: Device to wait for. 224 static void dpm_wait(struct device dev, bool async) dpm_wait() argument 226 if (!dev) dpm_wait() 229 if (async \|\| (pm_async_enabled && dev->power.async_suspend)) dpm_wait() 230 wait_for_completion(&dev->power.completion); dpm_wait() 233 static int dpm_wait_fn(struct device dev, void async_ptr) dpm_wait_fn() argument 235 dpm_wait(dev, ((bool )async_ptr)); dpm_wait_fn() 239 static void dpm_wait_for_children(struct device dev, bool async) dpm_wait_for_children() argument 241 device_for_each_child(dev, &async, dpm_wait_fn); dpm_wait_for_children() 281 * Runtime PM is disabled for @dev while this function is being executed. 315 * The driver of @dev will not receive interrupts while this function is being 344 static void pm_dev_dbg(struct device dev, pm_message_t state, char info) pm_dev_dbg() argument 346 dev_dbg(dev, "%s%s%s\n", info, pm_verb(state.event), pm_dev_dbg() 347 ((state.event & PM_EVENT_SLEEP) && device_may_wakeup(dev)) ? pm_dev_dbg() 351 static void pm_dev_err(struct device dev, pm_message_t state, char info, pm_dev_err() argument 355 dev_name(dev), pm_verb(state.event), info, error); pm_dev_err() 375 static int dpm_run_callback(pm_callback_t cb, struct device dev, dpm_run_callback() argument 384 calltime = initcall_debug_start(dev); dpm_run_callback() 386 pm_dev_dbg(dev, state, info); dpm_run_callback() 387 trace_device_pm_callback_start(dev, info, state.event); dpm_run_callback() 388 error = cb(dev); dpm_run_callback() 389 trace_device_pm_callback_end(dev, error); dpm_run_callback() 392 initcall_debug_report(dev, calltime, error, state, info); dpm_run_callback() 399 struct device dev; member in struct:dpm_watchdog 419 dev_emerg(wd->dev, "** DPM device timeout *\n"); dpm_watchdog_handler() 422 dev_driver_string(wd->dev), dev_name(wd->dev)); dpm_watchdog_handler() 428 @dev: Device to handle. 430 static void dpm_watchdog_set(struct dpm_watchdog wd, struct device dev) dpm_watchdog_set() argument 434 wd->dev = dev; dpm_watchdog_set() 466 * @dev: Device to handle. 470 * The driver of @dev will not receive interrupts while this function is being 473 static int device_resume_noirq(struct device dev, pm_message_t state, bool async) device_resume_noirq() argument 479 TRACE_DEVICE(dev); device_resume_noirq() 482 if (dev->power.syscore \|\| dev->power.direct_complete) device_resume_noirq() 485 if (!dev->power.is_noirq_suspended) device_resume_noirq() 488 dpm_wait(dev->parent, async); device_resume_noirq() 490 if (dev->pm_domain) { device_resume_noirq() 492 callback = pm_noirq_op(&dev->pm_domain->ops, state); device_resume_noirq() 493 } else if (dev->type && dev->type->pm) { device_resume_noirq() 495 callback = pm_noirq_op(dev->type->pm, state); device_resume_noirq() 496 } else if (dev->class && dev->class->pm) { device_resume_noirq() 498 callback = pm_noirq_op(dev->class->pm, state); device_resume_noirq() 499 } else if (dev->bus && dev->bus->pm) { device_resume_noirq() 501 callback = pm_noirq_op(dev->bus->pm, state); device_resume_noirq() 504 if (!callback && dev->driver && dev->driver->pm) { device_resume_noirq() 506 callback = pm_noirq_op(dev->driver->pm, state); device_resume_noirq() 509 error = dpm_run_callback(callback, dev, state, info); device_resume_noirq() 510 dev->power.is_noirq_suspended = false; device_resume_noirq() 513 complete_all(&dev->power.completion); device_resume_noirq() 518 static bool is_async(struct device dev) is_async() argument 520 return dev->power.async_suspend && pm_async_enabled is_async() 526 struct device dev = (struct device )data; async_resume_noirq() local 529 error = device_resume_noirq(dev, pm_transition, true); async_resume_noirq() 531 pm_dev_err(dev, pm_transition, " async", error); async_resume_noirq() 533 put_device(dev); async_resume_noirq() 545 struct device dev; dpm_resume_noirq() local 557 list_for_each_entry(dev, &dpm_noirq_list, power.entry) { dpm_resume_noirq() 558 reinit_completion(&dev->power.completion); dpm_resume_noirq() 559 if (is_async(dev)) { dpm_resume_noirq() 560 get_device(dev); dpm_resume_noirq() 561 async_schedule(async_resume_noirq, dev); dpm_resume_noirq() 566 dev = to_device(dpm_noirq_list.next); dpm_resume_noirq() 567 get_device(dev); dpm_resume_noirq() 568 list_move_tail(&dev->power.entry, &dpm_late_early_list); dpm_resume_noirq() 571 if (!is_async(dev)) { dpm_resume_noirq() 574 error = device_resume_noirq(dev, state, false); dpm_resume_noirq() 578 dpm_save_failed_dev(dev_name(dev)); dpm_resume_noirq() 579 pm_dev_err(dev, state, " noirq", error); dpm_resume_noirq() 584 put_device(dev); dpm_resume_noirq() 596 @dev: Device to handle. 600 * Runtime PM is disabled for @dev while this function is being executed. 602 static int device_resume_early(struct device dev, pm_message_t state, bool async) device_resume_early() argument 608 TRACE_DEVICE(dev); device_resume_early() 611 if (dev->power.syscore \|\| dev->power.direct_complete) device_resume_early() 614 if (!dev->power.is_late_suspended) device_resume_early() 617 dpm_wait(dev->parent, async); device_resume_early() 619 if (dev->pm_domain) { device_resume_early() 621 callback = pm_late_early_op(&dev->pm_domain->ops, state); device_resume_early() 622 } else if (dev->type && dev->type->pm) { device_resume_early() 624 callback = pm_late_early_op(dev->type->pm, state); device_resume_early() 625 } else if (dev->class && dev->class->pm) { device_resume_early() 627 callback = pm_late_early_op(dev->class->pm, state); device_resume_early() 628 } else if (dev->bus && dev->bus->pm) { device_resume_early() 630 callback = pm_late_early_op(dev->bus->pm, state); device_resume_early() 633 if (!callback && dev->driver && dev->driver->pm) { device_resume_early() 635 callback = pm_late_early_op(dev->driver->pm, state); device_resume_early() 638 error = dpm_run_callback(callback, dev, state, info); device_resume_early() 639 dev->power.is_late_suspended = false; device_resume_early() 644 pm_runtime_enable(dev); device_resume_early() 645 complete_all(&dev->power.completion); device_resume_early() 651 struct device dev = (struct device )data; async_resume_early() local 654 error = device_resume_early(dev, pm_transition, true); async_resume_early() 656 pm_dev_err(dev, pm_transition, " async", error); async_resume_early() 658 put_device(dev); async_resume_early() 667 struct device dev; dpm_resume_early() local 679 list_for_each_entry(dev, &dpm_late_early_list, power.entry) { dpm_resume_early() 680 reinit_completion(&dev->power.completion); dpm_resume_early() 681 if (is_async(dev)) { dpm_resume_early() 682 get_device(dev); dpm_resume_early() 683 async_schedule(async_resume_early, dev); dpm_resume_early() 688 dev = to_device(dpm_late_early_list.next); dpm_resume_early() 689 get_device(dev); dpm_resume_early() 690 list_move_tail(&dev->power.entry, &dpm_suspended_list); dpm_resume_early() 693 if (!is_async(dev)) { dpm_resume_early() 696 error = device_resume_early(dev, state, false); dpm_resume_early() 700 dpm_save_failed_dev(dev_name(dev)); dpm_resume_early() 701 pm_dev_err(dev, state, " early", error); dpm_resume_early() 705 put_device(dev); dpm_resume_early() 726 * @dev: Device to handle. 730 static int device_resume(struct device dev, pm_message_t state, bool async) device_resume() argument 737 TRACE_DEVICE(dev); device_resume() 740 if (dev->power.syscore) device_resume() 743 if (dev->power.direct_complete) { device_resume() 745 pm_runtime_enable(dev); device_resume() 749 dpm_wait(dev->parent, async); device_resume() 750 dpm_watchdog_set(&wd, dev); device_resume() 751 device_lock(dev); device_resume() 757 dev->power.is_prepared = false; device_resume() 759 if (!dev->power.is_suspended) device_resume() 762 if (dev->pm_domain) { device_resume() 764 callback = pm_op(&dev->pm_domain->ops, state); device_resume() 768 if (dev->type && dev->type->pm) { device_resume() 770 callback = pm_op(dev->type->pm, state); device_resume() 774 if (dev->class) { device_resume() 775 if (dev->class->pm) { device_resume() 777 callback = pm_op(dev->class->pm, state); device_resume() 779 } else if (dev->class->resume) { device_resume() 781 callback = dev->class->resume; device_resume() 786 if (dev->bus) { device_resume() 787 if (dev->bus->pm) { device_resume() 789 callback = pm_op(dev->bus->pm, state); device_resume() 790 } else if (dev->bus->resume) { device_resume() 792 callback = dev->bus->resume; device_resume() 798 if (!callback && dev->driver && dev->driver->pm) { device_resume() 800 callback = pm_op(dev->driver->pm, state); device_resume() 804 error = dpm_run_callback(callback, dev, state, info); device_resume() 805 dev->power.is_suspended = false; device_resume() 808 device_unlock(dev); device_resume() 812 complete_all(&dev->power.completion); device_resume() 821 struct device dev = (struct device )data; async_resume() local 824 error = device_resume(dev, pm_transition, true); async_resume() 826 pm_dev_err(dev, pm_transition, " async", error); async_resume() 827 put_device(dev); async_resume() 839 struct device dev; dpm_resume() local 849 list_for_each_entry(dev, &dpm_suspended_list, power.entry) { dpm_resume() 850 reinit_completion(&dev->power.completion); dpm_resume() 851 if (is_async(dev)) { dpm_resume() 852 get_device(dev); dpm_resume() 853 async_schedule(async_resume, dev); dpm_resume() 858 dev = to_device(dpm_suspended_list.next); dpm_resume() 859 get_device(dev); dpm_resume() 860 if (!is_async(dev)) { dpm_resume() 865 error = device_resume(dev, state, false); dpm_resume() 869 dpm_save_failed_dev(dev_name(dev)); dpm_resume() 870 pm_dev_err(dev, state, "", error); dpm_resume() 875 if (!list_empty(&dev->power.entry)) dpm_resume() 876 list_move_tail(&dev->power.entry, &dpm_prepared_list); dpm_resume() 877 put_device(dev); dpm_resume() 889 * @dev: Device to handle. 892 static void device_complete(struct device dev, pm_message_t state) device_complete() argument 897 if (dev->power.syscore) device_complete() 900 device_lock(dev); device_complete() 902 if (dev->pm_domain) { device_complete() 904 callback = dev->pm_domain->ops.complete; device_complete() 905 } else if (dev->type && dev->type->pm) { device_complete() 907 callback = dev->type->pm->complete; device_complete() 908 } else if (dev->class && dev->class->pm) { device_complete() 910 callback = dev->class->pm->complete; device_complete() 911 } else if (dev->bus && dev->bus->pm) { device_complete() 913 callback = dev->bus->pm->complete; device_complete() 916 if (!callback && dev->driver && dev->driver->pm) { device_complete() 918 callback = dev->driver->pm->complete; device_complete() 922 pm_dev_dbg(dev, state, info); device_complete() 923 trace_device_pm_callback_start(dev, info, state.event); device_complete() 924 callback(dev); device_complete() 925 trace_device_pm_callback_end(dev, 0); device_complete() 928 device_unlock(dev); device_complete() 930 pm_runtime_put(dev); device_complete() 950 struct device dev = to_device(dpm_prepared_list.prev); dpm_complete() local 952 get_device(dev); dpm_complete() 953 dev->power.is_prepared = false; dpm_complete() 954 list_move(&dev->power.entry, &list); dpm_complete() 957 device_complete(dev, state); dpm_complete() 960 put_device(dev); dpm_complete() 1007 * @dev: Device to handle. 1011 * The driver of @dev will not receive interrupts while this function is being 1014 static int __device_suspend_noirq(struct device dev, pm_message_t state, bool async) __device_suspend_noirq() argument 1020 TRACE_DEVICE(dev); __device_suspend_noirq() 1031 if (dev->power.syscore \|\| dev->power.direct_complete) __device_suspend_noirq() 1034 dpm_wait_for_children(dev, async); __device_suspend_noirq() 1036 if (dev->pm_domain) { __device_suspend_noirq() 1038 callback = pm_noirq_op(&dev->pm_domain->ops, state); __device_suspend_noirq() 1039 } else if (dev->type && dev->type->pm) { __device_suspend_noirq() 1041 callback = pm_noirq_op(dev->type->pm, state); __device_suspend_noirq() 1042 } else if (dev->class && dev->class->pm) { __device_suspend_noirq() 1044 callback = pm_noirq_op(dev->class->pm, state); __device_suspend_noirq() 1045 } else if (dev->bus && dev->bus->pm) { __device_suspend_noirq() 1047 callback = pm_noirq_op(dev->bus->pm, state); __device_suspend_noirq() 1050 if (!callback && dev->driver && dev->driver->pm) { __device_suspend_noirq() 1052 callback = pm_noirq_op(dev->driver->pm, state); __device_suspend_noirq() 1055 error = dpm_run_callback(callback, dev, state, info); __device_suspend_noirq() 1057 dev->power.is_noirq_suspended = true; __device_suspend_noirq() 1062 complete_all(&dev->power.completion); __device_suspend_noirq() 1069 struct device dev = (struct device )data; async_suspend_noirq() local 1072 error = __device_suspend_noirq(dev, pm_transition, true); async_suspend_noirq() 1074 dpm_save_failed_dev(dev_name(dev)); async_suspend_noirq() 1075 pm_dev_err(dev, pm_transition, " async", error); async_suspend_noirq() 1078 put_device(dev); async_suspend_noirq() 1081 static int device_suspend_noirq(struct device dev) device_suspend_noirq() argument 1083 reinit_completion(&dev->power.completion); device_suspend_noirq() 1085 if (is_async(dev)) { device_suspend_noirq() 1086 get_device(dev); device_suspend_noirq() 1087 async_schedule(async_suspend_noirq, dev); device_suspend_noirq() 1090 return __device_suspend_noirq(dev, pm_transition, false); device_suspend_noirq() 1113 struct device dev = to_device(dpm_late_early_list.prev); dpm_suspend_noirq() local 1115 get_device(dev); dpm_suspend_noirq() 1118 error = device_suspend_noirq(dev); dpm_suspend_noirq() 1122 pm_dev_err(dev, state, " noirq", error); dpm_suspend_noirq() 1123 dpm_save_failed_dev(dev_name(dev)); dpm_suspend_noirq() 1124 put_device(dev); dpm_suspend_noirq() 1127 if (!list_empty(&dev->power.entry)) dpm_suspend_noirq() 1128 list_move(&dev->power.entry, &dpm_noirq_list); dpm_suspend_noirq() 1129 put_device(dev); dpm_suspend_noirq() 1152 @dev: Device to handle. 1156 * Runtime PM is disabled for @dev while this function is being executed. 1158 static int __device_suspend_late(struct device dev, pm_message_t state, bool async) __device_suspend_late() argument 1164 TRACE_DEVICE(dev); __device_suspend_late() 1167 __pm_runtime_disable(dev, false); __device_suspend_late() 1177 if (dev->power.syscore \|\| dev->power.direct_complete) __device_suspend_late() 1180 dpm_wait_for_children(dev, async); __device_suspend_late() 1182 if (dev->pm_domain) { __device_suspend_late() 1184 callback = pm_late_early_op(&dev->pm_domain->ops, state); __device_suspend_late() 1185 } else if (dev->type && dev->type->pm) { __device_suspend_late() 1187 callback = pm_late_early_op(dev->type->pm, state); __device_suspend_late() 1188 } else if (dev->class && dev->class->pm) { __device_suspend_late() 1190 callback = pm_late_early_op(dev->class->pm, state); __device_suspend_late() 1191 } else if (dev->bus && dev->bus->pm) { __device_suspend_late() 1193 callback = pm_late_early_op(dev->bus->pm, state); __device_suspend_late() 1196 if (!callback && dev->driver && dev->driver->pm) { __device_suspend_late() 1198 callback = pm_late_early_op(dev->driver->pm, state); __device_suspend_late() 1201 error = dpm_run_callback(callback, dev, state, info); __device_suspend_late() 1203 dev->power.is_late_suspended = true; __device_suspend_late() 1209 complete_all(&dev->power.completion); __device_suspend_late() 1215 struct device dev = (struct device )data; async_suspend_late() local 1218 error = __device_suspend_late(dev, pm_transition, true); async_suspend_late() 1220 dpm_save_failed_dev(dev_name(dev)); async_suspend_late() 1221 pm_dev_err(dev, pm_transition, " async", error); async_suspend_late() 1223 put_device(dev); async_suspend_late() 1226 static int device_suspend_late(struct device dev) device_suspend_late() argument 1228 reinit_completion(&dev->power.completion); device_suspend_late() 1230 if (is_async(dev)) { device_suspend_late() 1231 get_device(dev); device_suspend_late() 1232 async_schedule(async_suspend_late, dev); device_suspend_late() 1236 return __device_suspend_late(dev, pm_transition, false); device_suspend_late() 1254 struct device dev = to_device(dpm_suspended_list.prev); dpm_suspend_late() local 1256 get_device(dev); dpm_suspend_late() 1259 error = device_suspend_late(dev); dpm_suspend_late() 1262 if (!list_empty(&dev->power.entry)) dpm_suspend_late() 1263 list_move(&dev->power.entry, &dpm_late_early_list); dpm_suspend_late() 1266 pm_dev_err(dev, state, " late", error); dpm_suspend_late() 1267 dpm_save_failed_dev(dev_name(dev)); dpm_suspend_late() 1268 put_device(dev); dpm_suspend_late() 1271 put_device(dev); dpm_suspend_late() 1313 @dev: Device to suspend. 1318 static int legacy_suspend(struct device dev, pm_message_t state, legacy_suspend() argument 1319 int (cb)(struct device dev, pm_message_t state), legacy_suspend() 1325 calltime = initcall_debug_start(dev); legacy_suspend() 1327 trace_device_pm_callback_start(dev, info, state.event); legacy_suspend() 1328 error = cb(dev, state); legacy_suspend() 1329 trace_device_pm_callback_end(dev, error); legacy_suspend() 1332 initcall_debug_report(dev, calltime, error, state, info); legacy_suspend() 1339 @dev: Device to handle. 1343 static int __device_suspend(struct device dev, pm_message_t state, bool async) __device_suspend() argument 1350 TRACE_DEVICE(dev); __device_suspend() 1353 dpm_wait_for_children(dev, async); __device_suspend() 1364 if (pm_runtime_barrier(dev) && device_may_wakeup(dev)) __device_suspend() 1365 pm_wakeup_event(dev, 0); __device_suspend() 1372 if (dev->power.syscore) __device_suspend() 1375 if (dev->power.direct_complete) { __device_suspend() 1376 if (pm_runtime_status_suspended(dev)) { __device_suspend() 1377 pm_runtime_disable(dev); __device_suspend() 1378 if (pm_runtime_suspended_if_enabled(dev)) __device_suspend() 1381 pm_runtime_enable(dev); __device_suspend() 1383 dev->power.direct_complete = false; __device_suspend() 1386 dpm_watchdog_set(&wd, dev); __device_suspend() 1387 device_lock(dev); __device_suspend() 1389 if (dev->pm_domain) { __device_suspend() 1391 callback = pm_op(&dev->pm_domain->ops, state); __device_suspend() 1395 if (dev->type && dev->type->pm) { __device_suspend() 1397 callback = pm_op(dev->type->pm, state); __device_suspend() 1401 if (dev->class) { __device_suspend() 1402 if (dev->class->pm) { __device_suspend() 1404 callback = pm_op(dev->class->pm, state); __device_suspend() 1406 } else if (dev->class->suspend) { __device_suspend() 1407 pm_dev_dbg(dev, state, "legacy class "); __device_suspend() 1408 error = legacy_suspend(dev, state, dev->class->suspend, __device_suspend() 1414 if (dev->bus) { __device_suspend() 1415 if (dev->bus->pm) { __device_suspend() 1417 callback = pm_op(dev->bus->pm, state); __device_suspend() 1418 } else if (dev->bus->suspend) { __device_suspend() 1419 pm_dev_dbg(dev, state, "legacy bus "); __device_suspend() 1420 error = legacy_suspend(dev, state, dev->bus->suspend, __device_suspend() 1427 if (!callback && dev->driver && dev->driver->pm) { __device_suspend() 1429 callback = pm_op(dev->driver->pm, state); __device_suspend() 1432 error = dpm_run_callback(callback, dev, state, info); __device_suspend() 1436 struct device parent = dev->parent; __device_suspend() 1438 dev->power.is_suspended = true; __device_suspend() 1442 dev->parent->power.direct_complete = false; __device_suspend() 1443 if (dev->power.wakeup_path __device_suspend() 1444 && !dev->parent->power.ignore_children) __device_suspend() 1445 dev->parent->power.wakeup_path = true; __device_suspend() 1451 device_unlock(dev); __device_suspend() 1455 complete_all(&dev->power.completion); __device_suspend() 1465 struct device dev = (struct device )data; async_suspend() local 1468 error = __device_suspend(dev, pm_transition, true); async_suspend() 1470 dpm_save_failed_dev(dev_name(dev)); async_suspend() 1471 pm_dev_err(dev, pm_transition, " async", error); async_suspend() 1474 put_device(dev); async_suspend() 1477 static int device_suspend(struct device dev) device_suspend() argument 1479 reinit_completion(&dev->power.completion); device_suspend() 1481 if (is_async(dev)) { device_suspend() 1482 get_device(dev); device_suspend() 1483 async_schedule(async_suspend, dev); device_suspend() 1487 return __device_suspend(dev, pm_transition, false); device_suspend() 1508 struct device dev = to_device(dpm_prepared_list.prev); dpm_suspend() local 1510 get_device(dev); dpm_suspend() 1513 error = device_suspend(dev); dpm_suspend() 1517 pm_dev_err(dev, state, "", error); dpm_suspend() 1518 dpm_save_failed_dev(dev_name(dev)); dpm_suspend() 1519 put_device(dev); dpm_suspend() 1522 if (!list_empty(&dev->power.entry)) dpm_suspend() 1523 list_move(&dev->power.entry, &dpm_suspended_list); dpm_suspend() 1524 put_device(dev); dpm_suspend() 1543 * @dev: Device to handle. 1549 static int device_prepare(struct device dev, pm_message_t state) device_prepare() argument 1555 if (dev->power.syscore) device_prepare() 1564 pm_runtime_get_noresume(dev); device_prepare() 1566 device_lock(dev); device_prepare() 1568 dev->power.wakeup_path = device_may_wakeup(dev); device_prepare() 1570 if (dev->pm_domain) { device_prepare() 1572 callback = dev->pm_domain->ops.prepare; device_prepare() 1573 } else if (dev->type && dev->type->pm) { device_prepare() 1575 callback = dev->type->pm->prepare; device_prepare() 1576 } else if (dev->class && dev->class->pm) { device_prepare() 1578 callback = dev->class->pm->prepare; device_prepare() 1579 } else if (dev->bus && dev->bus->pm) { device_prepare() 1581 callback = dev->bus->pm->prepare; device_prepare() 1584 if (!callback && dev->driver && dev->driver->pm) { device_prepare() 1586 callback = dev->driver->pm->prepare; device_prepare() 1590 trace_device_pm_callback_start(dev, info, state.event); device_prepare() 1591 ret = callback(dev); device_prepare() 1592 trace_device_pm_callback_end(dev, ret); device_prepare() 1595 device_unlock(dev); device_prepare() 1599 pm_runtime_put(dev); device_prepare() 1609 spin_lock_irq(&dev->power.lock); device_prepare() 1610 dev->power.direct_complete = ret > 0 && state.event == PM_EVENT_SUSPEND; device_prepare() 1611 spin_unlock_irq(&dev->power.lock); device_prepare() 1630 struct device dev = to_device(dpm_list.next); dpm_prepare() local 1632 get_device(dev); dpm_prepare() 1635 error = device_prepare(dev, state); dpm_prepare() 1640 put_device(dev); dpm_prepare() 1646 dev_name(dev), error); dpm_prepare() 1647 put_device(dev); dpm_prepare() 1650 dev->power.is_prepared = true; dpm_prepare() 1651 if (!list_empty(&dev->power.entry)) dpm_prepare() 1652 list_move_tail(&dev->power.entry, &dpm_prepared_list); dpm_prepare() 1653 put_device(dev); dpm_prepare() 1690 * @dev: Device to wait for. 1691 * @subordinate: Device that needs to wait for @dev. 1693 int device_pm_wait_for_dev(struct device subordinate, struct device dev) device_pm_wait_for_dev() argument 1695 dpm_wait(dev, subordinate->power.async_suspend); device_pm_wait_for_dev() 1710 struct device *dev; dpm_for_each_dev() local 1716 list_for_each_entry(dev, &dpm_list, power.entry) dpm_for_each_dev() 1717 fn(dev, data); dpm_for_each_dev()
H A D	runtime.c	18 static pm_callback_t __rpm_get_callback(struct device dev, size_t cb_offset) __rpm_get_callback() argument 23 if (dev->pm_domain) __rpm_get_callback() 24 ops = &dev->pm_domain->ops; __rpm_get_callback() 25 else if (dev->type && dev->type->pm) __rpm_get_callback() 26 ops = dev->type->pm; __rpm_get_callback() 27 else if (dev->class && dev->class->pm) __rpm_get_callback() 28 ops = dev->class->pm; __rpm_get_callback() 29 else if (dev->bus && dev->bus->pm) __rpm_get_callback() 30 ops = dev->bus->pm; __rpm_get_callback() 39 if (!cb && dev->driver && dev->driver->pm) __rpm_get_callback() 40 cb = (pm_callback_t )((void )dev->driver->pm + cb_offset); __rpm_get_callback() 45 #define RPM_GET_CALLBACK(dev, callback) \ 46 __rpm_get_callback(dev, offsetof(struct dev_pm_ops, callback)) 48 static int rpm_resume(struct device dev, int rpmflags); 49 static int rpm_suspend(struct device dev, int rpmflags); 53 * @dev: Device to update the accounting for 62 void update_pm_runtime_accounting(struct device dev) update_pm_runtime_accounting() argument 67 delta = now - dev->power.accounting_timestamp; update_pm_runtime_accounting() 69 dev->power.accounting_timestamp = now; update_pm_runtime_accounting() 71 if (dev->power.disable_depth > 0) update_pm_runtime_accounting() 74 if (dev->power.runtime_status == RPM_SUSPENDED) update_pm_runtime_accounting() 75 dev->power.suspended_jiffies += delta; update_pm_runtime_accounting() 77 dev->power.active_jiffies += delta; update_pm_runtime_accounting() 80 static void __update_runtime_status(struct device dev, enum rpm_status status) __update_runtime_status() argument 82 update_pm_runtime_accounting(dev); __update_runtime_status() 83 dev->power.runtime_status = status; __update_runtime_status() 88 * @dev: Device to handle. 90 static void pm_runtime_deactivate_timer(struct device dev) pm_runtime_deactivate_timer() argument 92 if (dev->power.timer_expires > 0) { pm_runtime_deactivate_timer() 93 del_timer(&dev->power.suspend_timer); pm_runtime_deactivate_timer() 94 dev->power.timer_expires = 0; pm_runtime_deactivate_timer() 100 @dev: Device to handle. 102 static void pm_runtime_cancel_pending(struct device dev) pm_runtime_cancel_pending() argument 104 pm_runtime_deactivate_timer(dev); pm_runtime_cancel_pending() 109 dev->power.request = RPM_REQ_NONE; pm_runtime_cancel_pending() 114 @dev: Device to handle. 121 * This function may be called either with or without dev->power.lock held. 124 unsigned long pm_runtime_autosuspend_expiration(struct device dev) pm_runtime_autosuspend_expiration() argument 131 if (!dev->power.use_autosuspend) pm_runtime_autosuspend_expiration() 134 autosuspend_delay = ACCESS_ONCE(dev->power.autosuspend_delay); pm_runtime_autosuspend_expiration() 138 last_busy = ACCESS_ONCE(dev->power.last_busy); pm_runtime_autosuspend_expiration() 159 static int dev_memalloc_noio(struct device dev, void data) dev_memalloc_noio() argument 161 return dev->power.memalloc_noio; dev_memalloc_noio() 166 @dev: Device to handle. 192 void pm_runtime_set_memalloc_noio(struct device dev, bool enable) pm_runtime_set_memalloc_noio() argument 201 spin_lock_irq(&dev->power.lock); pm_runtime_set_memalloc_noio() 202 enabled = dev->power.memalloc_noio; pm_runtime_set_memalloc_noio() 203 dev->power.memalloc_noio = enable; pm_runtime_set_memalloc_noio() 204 spin_unlock_irq(&dev->power.lock); pm_runtime_set_memalloc_noio() 213 dev = dev->parent; pm_runtime_set_memalloc_noio() 220 if (!dev \|\| (!enable && pm_runtime_set_memalloc_noio() 221 device_for_each_child(dev, NULL, pm_runtime_set_memalloc_noio() 231 @dev: Device to test. 233 static int rpm_check_suspend_allowed(struct device dev) rpm_check_suspend_allowed() argument 237 if (dev->power.runtime_error) rpm_check_suspend_allowed() 239 else if (dev->power.disable_depth > 0) rpm_check_suspend_allowed() 241 else if (atomic_read(&dev->power.usage_count) > 0) rpm_check_suspend_allowed() 243 else if (!pm_children_suspended(dev)) rpm_check_suspend_allowed() 247 else if ((dev->power.deferred_resume rpm_check_suspend_allowed() 248 && dev->power.runtime_status == RPM_SUSPENDING) rpm_check_suspend_allowed() 249 \|\| (dev->power.request_pending rpm_check_suspend_allowed() 250 && dev->power.request == RPM_REQ_RESUME)) rpm_check_suspend_allowed() 252 else if (__dev_pm_qos_read_value(dev) < 0) rpm_check_suspend_allowed() 254 else if (dev->power.runtime_status == RPM_SUSPENDED) rpm_check_suspend_allowed() 263 @dev: Device to run the callback for. 265 static int __rpm_callback(int (cb)(struct device ), struct device dev) 266 __releases(&dev->power.lock) __acquires(&dev->power.lock) 270 if (dev->power.irq_safe) 271 spin_unlock(&dev->power.lock); 273 spin_unlock_irq(&dev->power.lock); 275 retval = cb(dev); 277 if (dev->power.irq_safe) 278 spin_lock(&dev->power.lock); 280 spin_lock_irq(&dev->power.lock); 287 @dev: Device to notify the bus type about. 296 * This function must be called under dev->power.lock with interrupts disabled. 298 static int rpm_idle(struct device dev, int rpmflags) rpm_idle() argument 303 trace_rpm_idle(dev, rpmflags); rpm_idle() 304 retval = rpm_check_suspend_allowed(dev); rpm_idle() 309 else if (dev->power.runtime_status != RPM_ACTIVE) rpm_idle() 316 else if (dev->power.request_pending && rpm_idle() 317 dev->power.request > RPM_REQ_IDLE) rpm_idle() 321 else if (dev->power.idle_notification) rpm_idle() 327 dev->power.request = RPM_REQ_NONE; rpm_idle() 329 if (dev->power.no_callbacks) rpm_idle() 334 dev->power.request = RPM_REQ_IDLE; rpm_idle() 335 if (!dev->power.request_pending) { rpm_idle() 336 dev->power.request_pending = true; rpm_idle() 337 queue_work(pm_wq, &dev->power.work); rpm_idle() 339 trace_rpm_return_int(dev, _THIS_IP_, 0); rpm_idle() 343 dev->power.idle_notification = true; rpm_idle() 345 callback = RPM_GET_CALLBACK(dev, runtime_idle); rpm_idle() 348 retval = __rpm_callback(callback, dev); rpm_idle() 350 dev->power.idle_notification = false; rpm_idle() 351 wake_up_all(&dev->power.wait_queue); rpm_idle() 354 trace_rpm_return_int(dev, _THIS_IP_, retval); rpm_idle() 355 return retval ? retval : rpm_suspend(dev, rpmflags \| RPM_AUTO); rpm_idle() 361 @dev: Device to run the callback for. 363 static int rpm_callback(int (cb)(struct device ), struct device dev) rpm_callback() argument 370 if (dev->power.memalloc_noio) { rpm_callback() 383 retval = __rpm_callback(cb, dev); rpm_callback() 386 retval = __rpm_callback(cb, dev); rpm_callback() 389 dev->power.runtime_error = retval; rpm_callback() 395 @dev: Device to suspend. 407 * ignore_children of parent->power and irq_safe of dev->power are not set). 412 * This function must be called under dev->power.lock with interrupts disabled. 414 static int rpm_suspend(struct device dev, int rpmflags) 415 __releases(&dev->power.lock) __acquires(&dev->power.lock) 421 trace_rpm_suspend(dev, rpmflags); 424 retval = rpm_check_suspend_allowed(dev); 430 else if (dev->power.runtime_status == RPM_RESUMING && 438 && dev->power.runtime_status != RPM_SUSPENDING) { 439 unsigned long expires = pm_runtime_autosuspend_expiration(dev); 443 dev->power.request = RPM_REQ_NONE; 452 if (!(dev->power.timer_expires && time_before_eq( 453 dev->power.timer_expires, expires))) { 454 dev->power.timer_expires = expires; 455 mod_timer(&dev->power.suspend_timer, expires); 457 dev->power.timer_autosuspends = 1; 463 pm_runtime_cancel_pending(dev); variable 465 if (dev->power.runtime_status == RPM_SUSPENDING) { 473 if (dev->power.irq_safe) { 474 spin_unlock(&dev->power.lock); 478 spin_lock(&dev->power.lock); 484 prepare_to_wait(&dev->power.wait_queue, &wait, 486 if (dev->power.runtime_status != RPM_SUSPENDING) 489 spin_unlock_irq(&dev->power.lock); 493 spin_lock_irq(&dev->power.lock); 495 finish_wait(&dev->power.wait_queue, &wait); 499 if (dev->power.no_callbacks) 504 dev->power.request = (rpmflags & RPM_AUTO) ? 506 if (!dev->power.request_pending) { 507 dev->power.request_pending = true; 508 queue_work(pm_wq, &dev->power.work); 513 __update_runtime_status(dev, RPM_SUSPENDING); 515 callback = RPM_GET_CALLBACK(dev, runtime_suspend); 517 retval = rpm_callback(callback, dev); 522 __update_runtime_status(dev, RPM_SUSPENDED); 523 pm_runtime_deactivate_timer(dev); variable 525 if (dev->parent) { 526 parent = dev->parent; 529 wake_up_all(&dev->power.wait_queue); 531 if (dev->power.deferred_resume) { 532 dev->power.deferred_resume = false; 533 rpm_resume(dev, 0); 539 if (parent && !parent->power.ignore_children && !dev->power.irq_safe) { 540 spin_unlock(&dev->power.lock); 546 spin_lock(&dev->power.lock); 550 trace_rpm_return_int(dev, _THIS_IP_, retval); 555 __update_runtime_status(dev, RPM_ACTIVE); 556 dev->power.deferred_resume = false; 557 wake_up_all(&dev->power.wait_queue); 560 dev->power.runtime_error = 0; 569 pm_runtime_autosuspend_expiration(dev) != 0) 572 pm_runtime_cancel_pending(dev); variable 579 @dev: Device to resume. 592 * This function must be called under dev->power.lock with interrupts disabled. 594 static int rpm_resume(struct device dev, int rpmflags) 595 __releases(&dev->power.lock) __acquires(&dev->power.lock) 601 trace_rpm_resume(dev, rpmflags); 604 if (dev->power.runtime_error) 606 else if (dev->power.disable_depth == 1 && dev->power.is_suspended 607 && dev->power.runtime_status == RPM_ACTIVE) 609 else if (dev->power.disable_depth > 0) 620 dev->power.request = RPM_REQ_NONE; 621 if (!dev->power.timer_autosuspends) 622 pm_runtime_deactivate_timer(dev); variable 624 if (dev->power.runtime_status == RPM_ACTIVE) { 629 if (dev->power.runtime_status == RPM_RESUMING 630 \|\| dev->power.runtime_status == RPM_SUSPENDING) { 634 if (dev->power.runtime_status == RPM_SUSPENDING) 635 dev->power.deferred_resume = true; 641 if (dev->power.irq_safe) { 642 spin_unlock(&dev->power.lock); 646 spin_lock(&dev->power.lock); 652 prepare_to_wait(&dev->power.wait_queue, &wait, 654 if (dev->power.runtime_status != RPM_RESUMING 655 && dev->power.runtime_status != RPM_SUSPENDING) 658 spin_unlock_irq(&dev->power.lock); 662 spin_lock_irq(&dev->power.lock); 664 finish_wait(&dev->power.wait_queue, &wait); 673 if (dev->power.no_callbacks && !parent && dev->parent) { 674 spin_lock_nested(&dev->parent->power.lock, SINGLE_DEPTH_NESTING); 675 if (dev->parent->power.disable_depth > 0 676 \|\| dev->parent->power.ignore_children 677 \|\| dev->parent->power.runtime_status == RPM_ACTIVE) { 678 atomic_inc(&dev->parent->power.child_count); 679 spin_unlock(&dev->parent->power.lock); 683 spin_unlock(&dev->parent->power.lock); 688 dev->power.request = RPM_REQ_RESUME; 689 if (!dev->power.request_pending) { 690 dev->power.request_pending = true; 691 queue_work(pm_wq, &dev->power.work); 697 if (!parent && dev->parent) { 700 necessary. Not needed if dev is irq-safe; then the 703 parent = dev->parent; 704 if (dev->power.irq_safe) 706 spin_unlock(&dev->power.lock); 723 spin_lock(&dev->power.lock); 730 if (dev->power.no_callbacks) 733 __update_runtime_status(dev, RPM_RESUMING); 735 callback = RPM_GET_CALLBACK(dev, runtime_resume); 737 retval = rpm_callback(callback, dev); 739 __update_runtime_status(dev, RPM_SUSPENDED); 740 pm_runtime_cancel_pending(dev); variable 743 __update_runtime_status(dev, RPM_ACTIVE); 747 wake_up_all(&dev->power.wait_queue); 750 rpm_idle(dev, RPM_ASYNC); 753 if (parent && !dev->power.irq_safe) { 754 spin_unlock_irq(&dev->power.lock); 758 spin_lock_irq(&dev->power.lock); 761 trace_rpm_return_int(dev, _THIS_IP_, retval); 775 struct device dev = container_of(work, struct device, power.work); pm_runtime_work() local 778 spin_lock_irq(&dev->power.lock); pm_runtime_work() 780 if (!dev->power.request_pending) pm_runtime_work() 783 req = dev->power.request; pm_runtime_work() 784 dev->power.request = RPM_REQ_NONE; pm_runtime_work() 785 dev->power.request_pending = false; pm_runtime_work() 791 rpm_idle(dev, RPM_NOWAIT); pm_runtime_work() 794 rpm_suspend(dev, RPM_NOWAIT); pm_runtime_work() 797 rpm_suspend(dev, RPM_NOWAIT \| RPM_AUTO); pm_runtime_work() 800 rpm_resume(dev, RPM_NOWAIT); pm_runtime_work() 805 spin_unlock_irq(&dev->power.lock); pm_runtime_work() 816 struct device dev = (struct device )data; pm_suspend_timer_fn() local 820 spin_lock_irqsave(&dev->power.lock, flags); pm_suspend_timer_fn() 822 expires = dev->power.timer_expires; pm_suspend_timer_fn() 825 dev->power.timer_expires = 0; pm_suspend_timer_fn() 826 rpm_suspend(dev, dev->power.timer_autosuspends ? pm_suspend_timer_fn() 830 spin_unlock_irqrestore(&dev->power.lock, flags); pm_suspend_timer_fn() 835 @dev: Device to suspend. 838 int pm_schedule_suspend(struct device dev, unsigned int delay) pm_schedule_suspend() argument 843 spin_lock_irqsave(&dev->power.lock, flags); pm_schedule_suspend() 846 retval = rpm_suspend(dev, RPM_ASYNC); pm_schedule_suspend() 850 retval = rpm_check_suspend_allowed(dev); pm_schedule_suspend() 855 pm_runtime_cancel_pending(dev); pm_schedule_suspend() 857 dev->power.timer_expires = jiffies + msecs_to_jiffies(delay); pm_schedule_suspend() 858 dev->power.timer_expires += !dev->power.timer_expires; pm_schedule_suspend() 859 dev->power.timer_autosuspends = 0; pm_schedule_suspend() 860 mod_timer(&dev->power.suspend_timer, dev->power.timer_expires); pm_schedule_suspend() 863 spin_unlock_irqrestore(&dev->power.lock, flags); pm_schedule_suspend() 871 @dev: Device to send idle notification for. 881 int __pm_runtime_idle(struct device dev, int rpmflags) __pm_runtime_idle() argument 886 might_sleep_if(!(rpmflags & RPM_ASYNC) && !dev->power.irq_safe); __pm_runtime_idle() 889 if (!atomic_dec_and_test(&dev->power.usage_count)) __pm_runtime_idle() 893 spin_lock_irqsave(&dev->power.lock, flags); __pm_runtime_idle() 894 retval = rpm_idle(dev, rpmflags); __pm_runtime_idle() 895 spin_unlock_irqrestore(&dev->power.lock, flags); __pm_runtime_idle() 903 @dev: Device to suspend. 913 int __pm_runtime_suspend(struct device dev, int rpmflags) __pm_runtime_suspend() argument 918 might_sleep_if(!(rpmflags & RPM_ASYNC) && !dev->power.irq_safe); __pm_runtime_suspend() 921 if (!atomic_dec_and_test(&dev->power.usage_count)) __pm_runtime_suspend() 925 spin_lock_irqsave(&dev->power.lock, flags); __pm_runtime_suspend() 926 retval = rpm_suspend(dev, rpmflags); __pm_runtime_suspend() 927 spin_unlock_irqrestore(&dev->power.lock, flags); __pm_runtime_suspend() 935 @dev: Device to resume. 944 int __pm_runtime_resume(struct device dev, int rpmflags) __pm_runtime_resume() argument 949 might_sleep_if(!(rpmflags & RPM_ASYNC) && !dev->power.irq_safe); __pm_runtime_resume() 952 atomic_inc(&dev->power.usage_count); __pm_runtime_resume() 954 spin_lock_irqsave(&dev->power.lock, flags); __pm_runtime_resume() 955 retval = rpm_resume(dev, rpmflags); __pm_runtime_resume() 956 spin_unlock_irqrestore(&dev->power.lock, flags); __pm_runtime_resume() 964 @dev: Device to handle. 979 int __pm_runtime_set_status(struct device dev, unsigned int status) __pm_runtime_set_status() argument 981 struct device parent = dev->parent; __pm_runtime_set_status() 989 spin_lock_irqsave(&dev->power.lock, flags); __pm_runtime_set_status() 991 if (!dev->power.runtime_error && !dev->power.disable_depth) { __pm_runtime_set_status() 996 if (dev->power.runtime_status == status) __pm_runtime_set_status() 1020 else if (dev->power.runtime_status == RPM_SUSPENDED) __pm_runtime_set_status() 1030 __update_runtime_status(dev, status); __pm_runtime_set_status() 1031 dev->power.runtime_error = 0; __pm_runtime_set_status() 1033 spin_unlock_irqrestore(&dev->power.lock, flags); __pm_runtime_set_status() 1044 * @dev: Device to handle. 1049 * Should be called under dev->power.lock with interrupts disabled. 1051 static void __pm_runtime_barrier(struct device dev) __pm_runtime_barrier() argument 1053 pm_runtime_deactivate_timer(dev); __pm_runtime_barrier() 1055 if (dev->power.request_pending) { __pm_runtime_barrier() 1056 dev->power.request = RPM_REQ_NONE; __pm_runtime_barrier() 1057 spin_unlock_irq(&dev->power.lock); __pm_runtime_barrier() 1059 cancel_work_sync(&dev->power.work); __pm_runtime_barrier() 1061 spin_lock_irq(&dev->power.lock); __pm_runtime_barrier() 1062 dev->power.request_pending = false; __pm_runtime_barrier() 1065 if (dev->power.runtime_status == RPM_SUSPENDING __pm_runtime_barrier() 1066 \|\| dev->power.runtime_status == RPM_RESUMING __pm_runtime_barrier() 1067 \|\| dev->power.idle_notification) { __pm_runtime_barrier() 1072 prepare_to_wait(&dev->power.wait_queue, &wait, __pm_runtime_barrier() 1074 if (dev->power.runtime_status != RPM_SUSPENDING __pm_runtime_barrier() 1075 && dev->power.runtime_status != RPM_RESUMING __pm_runtime_barrier() 1076 && !dev->power.idle_notification) __pm_runtime_barrier() 1078 spin_unlock_irq(&dev->power.lock); __pm_runtime_barrier() 1082 spin_lock_irq(&dev->power.lock); __pm_runtime_barrier() 1084 finish_wait(&dev->power.wait_queue, &wait); __pm_runtime_barrier() 1090 @dev: Device to handle. 1102 int pm_runtime_barrier(struct device dev) pm_runtime_barrier() argument 1106 pm_runtime_get_noresume(dev); pm_runtime_barrier() 1107 spin_lock_irq(&dev->power.lock); pm_runtime_barrier() 1109 if (dev->power.request_pending pm_runtime_barrier() 1110 && dev->power.request == RPM_REQ_RESUME) { pm_runtime_barrier() 1111 rpm_resume(dev, 0); pm_runtime_barrier() 1115 __pm_runtime_barrier(dev); pm_runtime_barrier() 1117 spin_unlock_irq(&dev->power.lock); pm_runtime_barrier() 1118 pm_runtime_put_noidle(dev); pm_runtime_barrier() 1126 @dev: Device to handle. 1138 void __pm_runtime_disable(struct device dev, bool check_resume) __pm_runtime_disable() argument 1140 spin_lock_irq(&dev->power.lock); __pm_runtime_disable() 1142 if (dev->power.disable_depth > 0) { __pm_runtime_disable() 1143 dev->power.disable_depth++; __pm_runtime_disable() 1152 if (check_resume && dev->power.request_pending __pm_runtime_disable() 1153 && dev->power.request == RPM_REQ_RESUME) { __pm_runtime_disable() 1158 pm_runtime_get_noresume(dev); __pm_runtime_disable() 1160 rpm_resume(dev, 0); __pm_runtime_disable() 1162 pm_runtime_put_noidle(dev); __pm_runtime_disable() 1165 if (!dev->power.disable_depth++) __pm_runtime_disable() 1166 __pm_runtime_barrier(dev); __pm_runtime_disable() 1169 spin_unlock_irq(&dev->power.lock); __pm_runtime_disable() 1175 @dev: Device to handle. 1177 void pm_runtime_enable(struct device dev) pm_runtime_enable() argument 1181 spin_lock_irqsave(&dev->power.lock, flags); pm_runtime_enable() 1183 if (dev->power.disable_depth > 0) pm_runtime_enable() 1184 dev->power.disable_depth--; pm_runtime_enable() 1186 dev_warn(dev, "Unbalanced %s!\n", __func__); pm_runtime_enable() 1188 spin_unlock_irqrestore(&dev->power.lock, flags); pm_runtime_enable() 1194 @dev: Device to handle. 1200 void pm_runtime_forbid(struct device dev) pm_runtime_forbid() argument 1202 spin_lock_irq(&dev->power.lock); pm_runtime_forbid() 1203 if (!dev->power.runtime_auto) pm_runtime_forbid() 1206 dev->power.runtime_auto = false; pm_runtime_forbid() 1207 atomic_inc(&dev->power.usage_count); pm_runtime_forbid() 1208 rpm_resume(dev, 0); pm_runtime_forbid() 1211 spin_unlock_irq(&dev->power.lock); pm_runtime_forbid() 1217 @dev: Device to handle. 1221 void pm_runtime_allow(struct device dev) pm_runtime_allow() argument 1223 spin_lock_irq(&dev->power.lock); pm_runtime_allow() 1224 if (dev->power.runtime_auto) pm_runtime_allow() 1227 dev->power.runtime_auto = true; pm_runtime_allow() 1228 if (atomic_dec_and_test(&dev->power.usage_count)) pm_runtime_allow() 1229 rpm_idle(dev, RPM_AUTO); pm_runtime_allow() 1232 spin_unlock_irq(&dev->power.lock); pm_runtime_allow() 1238 @dev: Device to handle. 1244 void pm_runtime_no_callbacks(struct device dev) pm_runtime_no_callbacks() argument 1246 spin_lock_irq(&dev->power.lock); pm_runtime_no_callbacks() 1247 dev->power.no_callbacks = 1; pm_runtime_no_callbacks() 1248 spin_unlock_irq(&dev->power.lock); pm_runtime_no_callbacks() 1249 if (device_is_registered(dev)) pm_runtime_no_callbacks() 1250 rpm_sysfs_remove(dev); pm_runtime_no_callbacks() 1256 @dev: Device to handle 1265 void pm_runtime_irq_safe(struct device dev) pm_runtime_irq_safe() argument 1267 if (dev->parent) pm_runtime_irq_safe() 1268 pm_runtime_get_sync(dev->parent); pm_runtime_irq_safe() 1269 spin_lock_irq(&dev->power.lock); pm_runtime_irq_safe() 1270 dev->power.irq_safe = 1; pm_runtime_irq_safe() 1271 spin_unlock_irq(&dev->power.lock); pm_runtime_irq_safe() 1277 @dev: Device to handle. 1284 * This function must be called under dev->power.lock with interrupts disabled. 1286 static void update_autosuspend(struct device dev, int old_delay, int old_use) update_autosuspend() argument 1288 int delay = dev->power.autosuspend_delay; update_autosuspend() 1291 if (dev->power.use_autosuspend && delay < 0) { update_autosuspend() 1295 atomic_inc(&dev->power.usage_count); update_autosuspend() 1296 rpm_resume(dev, 0); update_autosuspend() 1305 atomic_dec(&dev->power.usage_count); update_autosuspend() 1308 rpm_idle(dev, RPM_AUTO); update_autosuspend() 1314 @dev: Device to handle. 1321 void pm_runtime_set_autosuspend_delay(struct device dev, int delay) pm_runtime_set_autosuspend_delay() argument 1325 spin_lock_irq(&dev->power.lock); pm_runtime_set_autosuspend_delay() 1326 old_delay = dev->power.autosuspend_delay; pm_runtime_set_autosuspend_delay() 1327 old_use = dev->power.use_autosuspend; pm_runtime_set_autosuspend_delay() 1328 dev->power.autosuspend_delay = delay; pm_runtime_set_autosuspend_delay() 1329 update_autosuspend(dev, old_delay, old_use); pm_runtime_set_autosuspend_delay() 1330 spin_unlock_irq(&dev->power.lock); pm_runtime_set_autosuspend_delay() 1336 @dev: Device to handle. 1342 void __pm_runtime_use_autosuspend(struct device dev, bool use) __pm_runtime_use_autosuspend() argument 1346 spin_lock_irq(&dev->power.lock); __pm_runtime_use_autosuspend() 1347 old_delay = dev->power.autosuspend_delay; __pm_runtime_use_autosuspend() 1348 old_use = dev->power.use_autosuspend; __pm_runtime_use_autosuspend() 1349 dev->power.use_autosuspend = use; __pm_runtime_use_autosuspend() 1350 update_autosuspend(dev, old_delay, old_use); __pm_runtime_use_autosuspend() 1351 spin_unlock_irq(&dev->power.lock); __pm_runtime_use_autosuspend() 1357 @dev: Device object to initialize. 1359 void pm_runtime_init(struct device dev) pm_runtime_init() argument 1361 dev->power.runtime_status = RPM_SUSPENDED; pm_runtime_init() 1362 dev->power.idle_notification = false; pm_runtime_init() 1364 dev->power.disable_depth = 1; pm_runtime_init() 1365 atomic_set(&dev->power.usage_count, 0); pm_runtime_init() 1367 dev->power.runtime_error = 0; pm_runtime_init() 1369 atomic_set(&dev->power.child_count, 0); pm_runtime_init() 1370 pm_suspend_ignore_children(dev, false); pm_runtime_init() 1371 dev->power.runtime_auto = true; pm_runtime_init() 1373 dev->power.request_pending = false; pm_runtime_init() 1374 dev->power.request = RPM_REQ_NONE; pm_runtime_init() 1375 dev->power.deferred_resume = false; pm_runtime_init() 1376 dev->power.accounting_timestamp = jiffies; pm_runtime_init() 1377 INIT_WORK(&dev->power.work, pm_runtime_work); pm_runtime_init() 1379 dev->power.timer_expires = 0; pm_runtime_init() 1380 setup_timer(&dev->power.suspend_timer, pm_suspend_timer_fn, pm_runtime_init() 1381 (unsigned long)dev); pm_runtime_init() 1383 init_waitqueue_head(&dev->power.wait_queue); pm_runtime_init() 1388 @dev: Device object being removed from device hierarchy. 1390 void pm_runtime_remove(struct device dev) pm_runtime_remove() argument 1392 __pm_runtime_disable(dev, false); pm_runtime_remove() 1395 if (dev->power.runtime_status == RPM_ACTIVE) pm_runtime_remove() 1396 pm_runtime_set_suspended(dev); pm_runtime_remove() 1397 if (dev->power.irq_safe && dev->parent) pm_runtime_remove() 1398 pm_runtime_put(dev->parent); pm_runtime_remove() 1403 @dev: Device to suspend. 1413 int pm_runtime_force_suspend(struct device dev) pm_runtime_force_suspend() argument 1418 pm_runtime_disable(dev); pm_runtime_force_suspend() 1419 if (pm_runtime_status_suspended(dev)) pm_runtime_force_suspend() 1422 callback = RPM_GET_CALLBACK(dev, runtime_suspend); pm_runtime_force_suspend() 1429 ret = callback(dev); pm_runtime_force_suspend() 1433 pm_runtime_set_suspended(dev); pm_runtime_force_suspend() 1436 pm_runtime_enable(dev); pm_runtime_force_suspend() 1443 @dev: Device to resume. 1453 int pm_runtime_force_resume(struct device *dev) pm_runtime_force_resume() argument 1458 callback = RPM_GET_CALLBACK(dev, runtime_resume); pm_runtime_force_resume() 1465 ret = pm_runtime_set_active(dev); pm_runtime_force_resume() 1469 ret = callback(dev); pm_runtime_force_resume() 1471 pm_runtime_set_suspended(dev); pm_runtime_force_resume() 1475 pm_runtime_mark_last_busy(dev); pm_runtime_force_resume() 1477 pm_runtime_enable(dev); pm_runtime_force_resume()
/linux-4.1.27/drivers/misc/mei/
H A D	init.c	90 * @dev: the device structure 92 void mei_cancel_work(struct mei_device dev) mei_cancel_work() argument 94 cancel_work_sync(&dev->init_work); mei_cancel_work() 95 cancel_work_sync(&dev->reset_work); mei_cancel_work() 97 cancel_delayed_work(&dev->timer_work); mei_cancel_work() 104 @dev: the device structure 108 int mei_reset(struct mei_device dev) mei_reset() argument 110 enum mei_dev_state state = dev->dev_state; mei_reset() 120 mei_fw_status_str(dev, fw_sts_str, MEI_FW_STATUS_STR_SZ); mei_reset() 121 dev_warn(dev->dev, "unexpected reset: dev_state = %s fw status = %s\n", mei_reset() 130 mei_hbm_idle(dev); mei_reset() 134 dev->dev_state = MEI_DEV_RESETTING; mei_reset() 136 dev->reset_count++; mei_reset() 137 if (dev->reset_count > MEI_MAX_CONSEC_RESET) { mei_reset() 138 dev_err(dev->dev, "reset: reached maximal consecutive resets: disabling the device\n"); mei_reset() 139 dev->dev_state = MEI_DEV_DISABLED; mei_reset() 143 ret = mei_hw_reset(dev, interrupts_enabled); mei_reset() 151 mei_cl_all_write_clear(dev); mei_reset() 153 mei_cl_all_disconnect(dev); mei_reset() 156 mei_cl_all_wakeup(dev); mei_reset() 159 dev_dbg(dev->dev, "remove iamthif and wd from the file list.\n"); mei_reset() 160 mei_cl_unlink(&dev->wd_cl); mei_reset() 161 mei_cl_unlink(&dev->iamthif_cl); mei_reset() 162 mei_amthif_reset_params(dev); mei_reset() 165 mei_hbm_reset(dev); mei_reset() 167 dev->rd_msg_hdr = 0; mei_reset() 168 dev->wd_pending = false; mei_reset() 171 dev_err(dev->dev, "hw_reset failed ret = %d\n", ret); mei_reset() 176 dev_dbg(dev->dev, "powering down: end of reset\n"); mei_reset() 177 dev->dev_state = MEI_DEV_DISABLED; mei_reset() 181 ret = mei_hw_start(dev); mei_reset() 183 dev_err(dev->dev, "hw_start failed ret = %d\n", ret); mei_reset() 187 dev_dbg(dev->dev, "link is established start sending messages.\n"); mei_reset() 189 dev->dev_state = MEI_DEV_INIT_CLIENTS; mei_reset() 190 ret = mei_hbm_start_req(dev); mei_reset() 192 dev_err(dev->dev, "hbm_start failed ret = %d\n", ret); mei_reset() 193 dev->dev_state = MEI_DEV_RESETTING; mei_reset() 204 @dev: the device structure 208 int mei_start(struct mei_device dev) mei_start() argument 212 mutex_lock(&dev->device_lock); mei_start() 215 mei_clear_interrupts(dev); mei_start() 217 mei_hw_config(dev); mei_start() 219 dev_dbg(dev->dev, "reset in start the mei device.\n"); mei_start() 221 dev->reset_count = 0; mei_start() 223 dev->dev_state = MEI_DEV_INITIALIZING; mei_start() 224 ret = mei_reset(dev); mei_start() 226 if (ret == -ENODEV \|\| dev->dev_state == MEI_DEV_DISABLED) { mei_start() 227 dev_err(dev->dev, "reset failed ret = %d", ret); mei_start() 233 if (dev->dev_state == MEI_DEV_DISABLED) { mei_start() 234 dev_err(dev->dev, "reset failed"); mei_start() 238 if (mei_hbm_start_wait(dev)) { mei_start() 239 dev_err(dev->dev, "HBM haven't started"); mei_start() 243 if (!mei_host_is_ready(dev)) { mei_start() 244 dev_err(dev->dev, "host is not ready.\n"); mei_start() 248 if (!mei_hw_is_ready(dev)) { mei_start() 249 dev_err(dev->dev, "ME is not ready.\n"); mei_start() 253 if (!mei_hbm_version_is_supported(dev)) { mei_start() 254 dev_dbg(dev->dev, "MEI start failed.\n"); mei_start() 258 dev_dbg(dev->dev, "link layer has been established.\n"); mei_start() 260 mutex_unlock(&dev->device_lock); mei_start() 263 dev_err(dev->dev, "link layer initialization failed.\n"); mei_start() 264 dev->dev_state = MEI_DEV_DISABLED; mei_start() 265 mutex_unlock(&dev->device_lock); mei_start() 273 @dev: the device structure 277 int mei_restart(struct mei_device dev) mei_restart() argument 281 mutex_lock(&dev->device_lock); mei_restart() 283 mei_clear_interrupts(dev); mei_restart() 285 dev->dev_state = MEI_DEV_POWER_UP; mei_restart() 286 dev->reset_count = 0; mei_restart() 288 err = mei_reset(dev); mei_restart() 290 mutex_unlock(&dev->device_lock); mei_restart() 292 if (err == -ENODEV \|\| dev->dev_state == MEI_DEV_DISABLED) { mei_restart() 293 dev_err(dev->dev, "device disabled = %d\n", err); mei_restart() 299 schedule_work(&dev->reset_work); mei_restart() 308 struct mei_device dev = mei_reset_work() local 312 mutex_lock(&dev->device_lock); mei_reset_work() 314 ret = mei_reset(dev); mei_reset_work() 316 mutex_unlock(&dev->device_lock); mei_reset_work() 318 if (dev->dev_state == MEI_DEV_DISABLED) { mei_reset_work() 319 dev_err(dev->dev, "device disabled = %d\n", ret); mei_reset_work() 325 schedule_work(&dev->reset_work); mei_reset_work() 328 void mei_stop(struct mei_device dev) mei_stop() argument 330 dev_dbg(dev->dev, "stopping the device.\n"); mei_stop() 332 mei_cancel_work(dev); mei_stop() 334 mei_nfc_host_exit(dev); mei_stop() 336 mei_cl_bus_remove_devices(dev); mei_stop() 338 mutex_lock(&dev->device_lock); mei_stop() 340 mei_wd_stop(dev); mei_stop() 342 dev->dev_state = MEI_DEV_POWER_DOWN; mei_stop() 343 mei_reset(dev); mei_stop() 345 dev->dev_state = MEI_DEV_DISABLED; mei_stop() 347 mutex_unlock(&dev->device_lock); mei_stop() 349 mei_watchdog_unregister(dev); mei_stop() 356 @dev: the device structure 360 bool mei_write_is_idle(struct mei_device dev) mei_write_is_idle() argument 362 bool idle = (dev->dev_state == MEI_DEV_ENABLED && mei_write_is_idle() 363 list_empty(&dev->ctrl_wr_list.list) && mei_write_is_idle() 364 list_empty(&dev->write_list.list)); mei_write_is_idle() 366 dev_dbg(dev->dev, "write pg: is idle[%d] state=%s ctrl=%d write=%d\n", mei_write_is_idle() 368 mei_dev_state_str(dev->dev_state), mei_write_is_idle() 369 list_empty(&dev->ctrl_wr_list.list), mei_write_is_idle() 370 list_empty(&dev->write_list.list)); mei_write_is_idle() 379 @dev: the mei device 383 void mei_device_init(struct mei_device *dev, mei_device_init() argument 388 INIT_LIST_HEAD(&dev->file_list); mei_device_init() 389 INIT_LIST_HEAD(&dev->device_list); mei_device_init() 390 INIT_LIST_HEAD(&dev->me_clients); mei_device_init() 391 mutex_init(&dev->device_lock); mei_device_init() 392 init_rwsem(&dev->me_clients_rwsem); mei_device_init() 393 init_waitqueue_head(&dev->wait_hw_ready); mei_device_init() 394 init_waitqueue_head(&dev->wait_pg); mei_device_init() 395 init_waitqueue_head(&dev->wait_hbm_start); mei_device_init() 396 init_waitqueue_head(&dev->wait_stop_wd); mei_device_init() 397 dev->dev_state = MEI_DEV_INITIALIZING; mei_device_init() 398 dev->reset_count = 0; mei_device_init() 400 mei_io_list_init(&dev->write_list); mei_device_init() 401 mei_io_list_init(&dev->write_waiting_list); mei_device_init() 402 mei_io_list_init(&dev->ctrl_wr_list); mei_device_init() 403 mei_io_list_init(&dev->ctrl_rd_list); mei_device_init() 405 INIT_DELAYED_WORK(&dev->timer_work, mei_timer); mei_device_init() 406 INIT_WORK(&dev->init_work, mei_host_client_init); mei_device_init() 407 INIT_WORK(&dev->reset_work, mei_reset_work); mei_device_init() 409 INIT_LIST_HEAD(&dev->wd_cl.link); mei_device_init() 410 INIT_LIST_HEAD(&dev->iamthif_cl.link); mei_device_init() 411 mei_io_list_init(&dev->amthif_cmd_list); mei_device_init() 412 mei_io_list_init(&dev->amthif_rd_complete_list); mei_device_init() 414 bitmap_zero(dev->host_clients_map, MEI_CLIENTS_MAX); mei_device_init() 415 dev->open_handle_count = 0; mei_device_init() 421 bitmap_set(dev->host_clients_map, 0, 1); mei_device_init() 423 dev->pg_event = MEI_PG_EVENT_IDLE; mei_device_init() 424 dev->ops = hw_ops; mei_device_init() 425 dev->dev = device; mei_device_init()
H A D	wd.c	42 static void mei_wd_set_start_timeout(struct mei_device dev, u16 timeout) mei_wd_set_start_timeout() argument 44 dev_dbg(dev->dev, "wd: set timeout=%d.\n", timeout); mei_wd_set_start_timeout() 45 memcpy(dev->wd_data, mei_start_wd_params, MEI_WD_HDR_SIZE); mei_wd_set_start_timeout() 46 memcpy(dev->wd_data + MEI_WD_HDR_SIZE, &timeout, sizeof(u16)); mei_wd_set_start_timeout() 52 @dev: the device structure 58 int mei_wd_host_init(struct mei_device dev) mei_wd_host_init() argument 60 struct mei_cl cl = &dev->wd_cl; mei_wd_host_init() 64 mei_cl_init(cl, dev); mei_wd_host_init() 66 dev->wd_timeout = MEI_WD_DEFAULT_TIMEOUT; mei_wd_host_init() 67 dev->wd_state = MEI_WD_IDLE; mei_wd_host_init() 71 me_cl = mei_me_cl_by_uuid(dev, &mei_wd_guid); mei_wd_host_init() 73 dev_info(dev->dev, "wd: failed to find the client\n"); mei_wd_host_init() 84 dev_info(dev->dev, "wd: failed link client\n"); mei_wd_host_init() 91 dev_err(dev->dev, "wd: failed to connect = %d\n", ret); mei_wd_host_init() 96 ret = mei_watchdog_register(dev); mei_wd_host_init() 107 * @dev: the device structure 114 int mei_wd_send(struct mei_device dev) mei_wd_send() argument 116 struct mei_cl cl = &dev->wd_cl; mei_wd_send() 126 if (!memcmp(dev->wd_data, mei_start_wd_params, MEI_WD_HDR_SIZE)) mei_wd_send() 128 else if (!memcmp(dev->wd_data, mei_stop_wd_params, MEI_WD_HDR_SIZE)) mei_wd_send() 131 dev_err(dev->dev, "wd: invalid message is to be sent, aborting\n"); mei_wd_send() 135 ret = mei_write_message(dev, &hdr, dev->wd_data); mei_wd_send() 137 dev_err(dev->dev, "wd: write message failed\n"); mei_wd_send() 143 dev_err(dev->dev, "wd: flow_ctrl_reduce failed.\n"); mei_wd_send() 153 * @dev: the device structure 161 int mei_wd_stop(struct mei_device dev) mei_wd_stop() argument 163 struct mei_cl cl = &dev->wd_cl; mei_wd_stop() 167 dev->wd_state != MEI_WD_RUNNING) mei_wd_stop() 170 memcpy(dev->wd_data, mei_stop_wd_params, MEI_WD_STOP_MSG_SIZE); mei_wd_stop() 172 dev->wd_state = MEI_WD_STOPPING; mei_wd_stop() 178 if (ret && mei_hbuf_acquire(dev)) { mei_wd_stop() 179 ret = mei_wd_send(dev); mei_wd_stop() 182 dev->wd_pending = false; mei_wd_stop() 184 dev->wd_pending = true; mei_wd_stop() 187 mutex_unlock(&dev->device_lock); mei_wd_stop() 189 ret = wait_event_timeout(dev->wait_stop_wd, mei_wd_stop() 190 dev->wd_state == MEI_WD_IDLE, mei_wd_stop() 192 mutex_lock(&dev->device_lock); mei_wd_stop() 193 if (dev->wd_state != MEI_WD_IDLE) { mei_wd_stop() 196 dev_warn(dev->dev, "wd: stop failed to complete ret=%d\n", ret); mei_wd_stop() 199 dev_dbg(dev->dev, "wd: stop completed after %u msec\n", mei_wd_stop() 215 struct mei_device dev; mei_wd_ops_start() local 219 dev = watchdog_get_drvdata(wd_dev); mei_wd_ops_start() 220 if (!dev) mei_wd_ops_start() 223 cl = &dev->wd_cl; mei_wd_ops_start() 225 mutex_lock(&dev->device_lock); mei_wd_ops_start() 227 if (dev->dev_state != MEI_DEV_ENABLED) { mei_wd_ops_start() 228 dev_dbg(dev->dev, "wd: dev_state != MEI_DEV_ENABLED dev_state = %s\n", mei_wd_ops_start() 229 mei_dev_state_str(dev->dev_state)); mei_wd_ops_start() 234 cl_dbg(dev, cl, "MEI Driver is not connected to Watchdog Client\n"); mei_wd_ops_start() 238 mei_wd_set_start_timeout(dev, dev->wd_timeout); mei_wd_ops_start() 242 mutex_unlock(&dev->device_lock); mei_wd_ops_start() 255 struct mei_device dev; mei_wd_ops_stop() local 257 dev = watchdog_get_drvdata(wd_dev); mei_wd_ops_stop() 258 if (!dev) mei_wd_ops_stop() 261 mutex_lock(&dev->device_lock); mei_wd_ops_stop() 262 mei_wd_stop(dev); mei_wd_ops_stop() 263 mutex_unlock(&dev->device_lock); mei_wd_ops_stop() 277 struct mei_device dev; mei_wd_ops_ping() local 281 dev = watchdog_get_drvdata(wd_dev); mei_wd_ops_ping() 282 if (!dev) mei_wd_ops_ping() 285 cl = &dev->wd_cl; mei_wd_ops_ping() 287 mutex_lock(&dev->device_lock); mei_wd_ops_ping() 290 cl_err(dev, cl, "wd: not connected.\n"); mei_wd_ops_ping() 295 dev->wd_state = MEI_WD_RUNNING; mei_wd_ops_ping() 302 if (ret && mei_hbuf_acquire(dev)) { mei_wd_ops_ping() 303 dev_dbg(dev->dev, "wd: sending ping\n"); mei_wd_ops_ping() 305 ret = mei_wd_send(dev); mei_wd_ops_ping() 308 dev->wd_pending = false; mei_wd_ops_ping() 310 dev->wd_pending = true; mei_wd_ops_ping() 314 mutex_unlock(&dev->device_lock); mei_wd_ops_ping() 329 struct mei_device dev; mei_wd_ops_set_timeout() local 331 dev = watchdog_get_drvdata(wd_dev); mei_wd_ops_set_timeout() 332 if (!dev) mei_wd_ops_set_timeout() 339 mutex_lock(&dev->device_lock); mei_wd_ops_set_timeout() 341 dev->wd_timeout = timeout; mei_wd_ops_set_timeout() 343 mei_wd_set_start_timeout(dev, dev->wd_timeout); mei_wd_ops_set_timeout() 345 mutex_unlock(&dev->device_lock); mei_wd_ops_set_timeout() 376 int mei_watchdog_register(struct mei_device dev) mei_watchdog_register() argument 382 mutex_unlock(&dev->device_lock); mei_watchdog_register() 384 mutex_lock(&dev->device_lock); mei_watchdog_register() 386 dev_err(dev->dev, "wd: unable to register watchdog device = %d.\n", mei_watchdog_register() 391 dev_dbg(dev->dev, "wd: successfully register watchdog interface.\n"); mei_watchdog_register() 392 watchdog_set_drvdata(&amt_wd_dev, dev); mei_watchdog_register() 396 void mei_watchdog_unregister(struct mei_device dev) mei_watchdog_unregister() argument
H A D	pci-txe.c	47 static inline void mei_txe_set_pm_domain(struct mei_device dev); 48 static inline void mei_txe_unset_pm_domain(struct mei_device dev); 50 static inline void mei_txe_set_pm_domain(struct mei_device dev) {} mei_txe_unset_pm_domain() argument 51 static inline void mei_txe_unset_pm_domain(struct mei_device dev) {} mei_txe_unset_pm_domain() argument 75 struct mei_device dev; mei_txe_probe() local 80 / enable pci dev / mei_txe_probe() 83 dev_err(&pdev->dev, "failed to enable pci device.\n"); mei_txe_probe() 91 dev_err(&pdev->dev, "failed to get pci regions.\n"); mei_txe_probe() 99 dev_err(&pdev->dev, "No suitable DMA available.\n"); mei_txe_probe() 104 / allocates and initializes the mei dev structure / mei_txe_probe() 105 dev = mei_txe_dev_init(pdev); mei_txe_probe() 106 if (!dev) { mei_txe_probe() 110 hw = to_txe_hw(dev); mei_txe_probe() 116 dev_err(&pdev->dev, "mapping I/O device memory failure.\n"); mei_txe_probe() 126 mei_clear_interrupts(dev); mei_txe_probe() 133 IRQF_ONESHOT, KBUILD_MODNAME, dev); mei_txe_probe() 138 IRQF_SHARED, KBUILD_MODNAME, dev); mei_txe_probe() 140 dev_err(&pdev->dev, "mei: request_threaded_irq failure. irq = %d\n", mei_txe_probe() 145 if (mei_start(dev)) { mei_txe_probe() 146 dev_err(&pdev->dev, "init hw failure.\n"); mei_txe_probe() 151 pm_runtime_set_autosuspend_delay(&pdev->dev, MEI_TXI_RPM_TIMEOUT); mei_txe_probe() 152 pm_runtime_use_autosuspend(&pdev->dev); mei_txe_probe() 154 err = mei_register(dev, &pdev->dev); mei_txe_probe() 158 pci_set_drvdata(pdev, dev); mei_txe_probe() 166 mei_txe_set_pm_domain(dev); mei_txe_probe() 168 pm_runtime_put_noidle(&pdev->dev); mei_txe_probe() 174 mei_cancel_work(dev); mei_txe_probe() 177 mei_disable_interrupts(dev); mei_txe_probe() 179 free_irq(pdev->irq, dev); mei_txe_probe() 185 kfree(dev); mei_txe_probe() 191 dev_err(&pdev->dev, "initialization failed.\n"); mei_txe_probe() 205 struct mei_device dev; mei_txe_remove() local 208 dev = pci_get_drvdata(pdev); mei_txe_remove() 209 if (!dev) { mei_txe_remove() 210 dev_err(&pdev->dev, "mei: dev =NULL\n"); mei_txe_remove() 214 pm_runtime_get_noresume(&pdev->dev); mei_txe_remove() 216 hw = to_txe_hw(dev); mei_txe_remove() 218 mei_stop(dev); mei_txe_remove() 221 mei_txe_unset_pm_domain(dev); mei_txe_remove() 224 mei_disable_interrupts(dev); mei_txe_remove() 225 free_irq(pdev->irq, dev); mei_txe_remove() 232 mei_deregister(dev); mei_txe_remove() 234 kfree(dev); mei_txe_remove() 245 struct mei_device dev = pci_get_drvdata(pdev); mei_txe_pci_suspend() local 247 if (!dev) mei_txe_pci_suspend() 250 dev_dbg(&pdev->dev, "suspend\n"); mei_txe_pci_suspend() 252 mei_stop(dev); mei_txe_pci_suspend() 254 mei_disable_interrupts(dev); mei_txe_pci_suspend() 256 free_irq(pdev->irq, dev); mei_txe_pci_suspend() 265 struct mei_device dev; mei_txe_pci_resume() local 268 dev = pci_get_drvdata(pdev); mei_txe_pci_resume() 269 if (!dev) mei_txe_pci_resume() 274 mei_clear_interrupts(dev); mei_txe_pci_resume() 281 IRQF_ONESHOT, KBUILD_MODNAME, dev); mei_txe_pci_resume() 286 IRQF_SHARED, KBUILD_MODNAME, dev); mei_txe_pci_resume() 288 dev_err(&pdev->dev, "request_threaded_irq failed: irq = %d.\n", mei_txe_pci_resume() 293 err = mei_restart(dev); mei_txe_pci_resume() 303 struct mei_device dev; mei_txe_pm_runtime_idle() local 305 dev_dbg(&pdev->dev, "rpm: txe: runtime_idle\n"); mei_txe_pm_runtime_idle() 307 dev = pci_get_drvdata(pdev); mei_txe_pm_runtime_idle() 308 if (!dev) mei_txe_pm_runtime_idle() 310 if (mei_write_is_idle(dev)) mei_txe_pm_runtime_idle() 318 struct mei_device dev; mei_txe_pm_runtime_suspend() local 321 dev_dbg(&pdev->dev, "rpm: txe: runtime suspend\n"); mei_txe_pm_runtime_suspend() 323 dev = pci_get_drvdata(pdev); mei_txe_pm_runtime_suspend() 324 if (!dev) mei_txe_pm_runtime_suspend() 327 mutex_lock(&dev->device_lock); mei_txe_pm_runtime_suspend() 329 if (mei_write_is_idle(dev)) mei_txe_pm_runtime_suspend() 330 ret = mei_txe_aliveness_set_sync(dev, 0); mei_txe_pm_runtime_suspend() 342 mei_disable_interrupts(dev); mei_txe_pm_runtime_suspend() 344 dev_dbg(&pdev->dev, "rpm: txe: runtime suspend ret=%d\n", ret); mei_txe_pm_runtime_suspend() 346 mutex_unlock(&dev->device_lock); mei_txe_pm_runtime_suspend() 353 struct mei_device dev; mei_txe_pm_runtime_resume() local 356 dev_dbg(&pdev->dev, "rpm: txe: runtime resume\n"); mei_txe_pm_runtime_resume() 358 dev = pci_get_drvdata(pdev); mei_txe_pm_runtime_resume() 359 if (!dev) mei_txe_pm_runtime_resume() 362 mutex_lock(&dev->device_lock); mei_txe_pm_runtime_resume() 364 mei_enable_interrupts(dev); mei_txe_pm_runtime_resume() 366 ret = mei_txe_aliveness_set_sync(dev, 1); mei_txe_pm_runtime_resume() 368 mutex_unlock(&dev->device_lock); mei_txe_pm_runtime_resume() 370 dev_dbg(&pdev->dev, "rpm: txe: runtime resume ret = %d\n", ret); mei_txe_pm_runtime_resume() 378 @dev: mei_device 380 static inline void mei_txe_set_pm_domain(struct mei_device dev) mei_txe_set_pm_domain() argument 382 struct pci_dev pdev = to_pci_dev(dev->dev); mei_txe_set_pm_domain() 384 if (pdev->dev.bus && pdev->dev.bus->pm) { mei_txe_set_pm_domain() 385 dev->pg_domain.ops = pdev->dev.bus->pm; mei_txe_set_pm_domain() 387 dev->pg_domain.ops.runtime_suspend = mei_txe_pm_runtime_suspend; mei_txe_set_pm_domain() 388 dev->pg_domain.ops.runtime_resume = mei_txe_pm_runtime_resume; mei_txe_set_pm_domain() 389 dev->pg_domain.ops.runtime_idle = mei_txe_pm_runtime_idle; mei_txe_set_pm_domain() 391 pdev->dev.pm_domain = &dev->pg_domain; mei_txe_set_pm_domain() 398 @dev: mei_device 400 static inline void mei_txe_unset_pm_domain(struct mei_device *dev) mei_txe_unset_pm_domain() argument 403 dev->dev->pm_domain = NULL; mei_txe_unset_pm_domain()
H A D	hw-me.c	62 * @dev: the device structure 66 static inline u32 mei_me_mecbrw_read(const struct mei_device dev) mei_me_mecbrw_read() argument 68 return mei_me_reg_read(to_me_hw(dev), ME_CB_RW); mei_me_mecbrw_read() 74 @dev: the device structure 77 static inline void mei_me_hcbww_write(struct mei_device dev, u32 data) mei_me_hcbww_write() argument 79 mei_me_reg_write(to_me_hw(dev), H_CB_WW, data); mei_me_hcbww_write() 85 @dev: the device structure 89 static inline u32 mei_me_mecsr_read(const struct mei_device dev) mei_me_mecsr_read() argument 93 reg = mei_me_reg_read(to_me_hw(dev), ME_CSR_HA); mei_me_mecsr_read() 94 trace_mei_reg_read(dev->dev, "ME_CSR_HA", ME_CSR_HA, reg); mei_me_mecsr_read() 102 @dev: the device structure 106 static inline u32 mei_hcsr_read(const struct mei_device dev) mei_hcsr_read() argument 110 reg = mei_me_reg_read(to_me_hw(dev), H_CSR); mei_hcsr_read() 111 trace_mei_reg_read(dev->dev, "H_CSR", H_CSR, reg); mei_hcsr_read() 119 @dev: the device structure 122 static inline void mei_hcsr_write(struct mei_device dev, u32 reg) mei_hcsr_write() argument 124 trace_mei_reg_write(dev->dev, "H_CSR", H_CSR, reg); mei_hcsr_write() 125 mei_me_reg_write(to_me_hw(dev), H_CSR, reg); mei_hcsr_write() 132 @dev: the device structure 135 static inline void mei_hcsr_set(struct mei_device dev, u32 reg) mei_hcsr_set() argument 138 mei_hcsr_write(dev, reg); mei_hcsr_set() 144 @dev: mei device 149 static int mei_me_fw_status(struct mei_device dev, mei_me_fw_status() argument 152 struct pci_dev pdev = to_pci_dev(dev->dev); mei_me_fw_status() 153 struct mei_me_hw hw = to_me_hw(dev); mei_me_fw_status() 175 @dev: mei device 177 static void mei_me_hw_config(struct mei_device dev) mei_me_hw_config() argument 179 struct mei_me_hw hw = to_me_hw(dev); mei_me_hw_config() 180 u32 hcsr = mei_hcsr_read(dev); mei_me_hw_config() 182 dev->hbuf_depth = (hcsr & H_CBD) >> 24; mei_me_hw_config() 191 * @dev: mei device 195 static inline enum mei_pg_state mei_me_pg_state(struct mei_device dev) mei_me_pg_state() argument 197 struct mei_me_hw hw = to_me_hw(dev); mei_me_pg_state() 205 * @dev: the device structure 207 static void mei_me_intr_clear(struct mei_device dev) mei_me_intr_clear() argument 209 u32 hcsr = mei_hcsr_read(dev); mei_me_intr_clear() 212 mei_hcsr_write(dev, hcsr); mei_me_intr_clear() 217 @dev: the device structure 219 static void mei_me_intr_enable(struct mei_device dev) mei_me_intr_enable() argument 221 u32 hcsr = mei_hcsr_read(dev); mei_me_intr_enable() 224 mei_hcsr_set(dev, hcsr); mei_me_intr_enable() 230 @dev: the device structure 232 static void mei_me_intr_disable(struct mei_device dev) mei_me_intr_disable() argument 234 u32 hcsr = mei_hcsr_read(dev); mei_me_intr_disable() 237 mei_hcsr_set(dev, hcsr); mei_me_intr_disable() 243 @dev: the device structure 245 static void mei_me_hw_reset_release(struct mei_device dev) mei_me_hw_reset_release() argument 247 u32 hcsr = mei_hcsr_read(dev); mei_me_hw_reset_release() 251 mei_hcsr_set(dev, hcsr); mei_me_hw_reset_release() 259 @dev: the device structure 264 static int mei_me_hw_reset(struct mei_device dev, bool intr_enable) mei_me_hw_reset() argument 266 u32 hcsr = mei_hcsr_read(dev); mei_me_hw_reset() 274 dev_warn(dev->dev, "H_RST is set = 0x%08X", hcsr); mei_me_hw_reset() 276 mei_hcsr_set(dev, hcsr); mei_me_hw_reset() 277 hcsr = mei_hcsr_read(dev); mei_me_hw_reset() 287 dev->recvd_hw_ready = false; mei_me_hw_reset() 288 mei_hcsr_write(dev, hcsr); mei_me_hw_reset() 294 hcsr = mei_hcsr_read(dev); mei_me_hw_reset() 297 dev_warn(dev->dev, "H_RST is not set = 0x%08X", hcsr); mei_me_hw_reset() 300 dev_warn(dev->dev, "H_RDY is not cleared 0x%08X", hcsr); mei_me_hw_reset() 303 mei_me_hw_reset_release(dev); mei_me_hw_reset() 311 @dev: mei device 313 static void mei_me_host_set_ready(struct mei_device dev) mei_me_host_set_ready() argument 315 u32 hcsr = mei_hcsr_read(dev); mei_me_host_set_ready() 318 mei_hcsr_set(dev, hcsr); mei_me_host_set_ready() 324 @dev: mei device 327 static bool mei_me_host_is_ready(struct mei_device dev) mei_me_host_is_ready() argument 329 u32 hcsr = mei_hcsr_read(dev); mei_me_host_is_ready() 337 @dev: mei device 340 static bool mei_me_hw_is_ready(struct mei_device dev) mei_me_hw_is_ready() argument 342 u32 mecsr = mei_me_mecsr_read(dev); mei_me_hw_is_ready() 351 @dev: mei device 354 static int mei_me_hw_ready_wait(struct mei_device dev) mei_me_hw_ready_wait() argument 356 mutex_unlock(&dev->device_lock); mei_me_hw_ready_wait() 357 wait_event_timeout(dev->wait_hw_ready, mei_me_hw_ready_wait() 358 dev->recvd_hw_ready, mei_me_hw_ready_wait() 360 mutex_lock(&dev->device_lock); mei_me_hw_ready_wait() 361 if (!dev->recvd_hw_ready) { mei_me_hw_ready_wait() 362 dev_err(dev->dev, "wait hw ready failed\n"); mei_me_hw_ready_wait() 366 mei_me_hw_reset_release(dev); mei_me_hw_ready_wait() 367 dev->recvd_hw_ready = false; mei_me_hw_ready_wait() 374 @dev: mei device 377 static int mei_me_hw_start(struct mei_device dev) mei_me_hw_start() argument 379 int ret = mei_me_hw_ready_wait(dev); mei_me_hw_start() 383 dev_dbg(dev->dev, "hw is ready\n"); mei_me_hw_start() 385 mei_me_host_set_ready(dev); mei_me_hw_start() 393 @dev: the device structure 397 static unsigned char mei_hbuf_filled_slots(struct mei_device dev) mei_hbuf_filled_slots() argument 402 hcsr = mei_hcsr_read(dev); mei_hbuf_filled_slots() 413 @dev: the device structure 417 static bool mei_me_hbuf_is_empty(struct mei_device dev) mei_me_hbuf_is_empty() argument 419 return mei_hbuf_filled_slots(dev) == 0; mei_me_hbuf_is_empty() 425 @dev: the device structure 429 static int mei_me_hbuf_empty_slots(struct mei_device dev) mei_me_hbuf_empty_slots() argument 433 filled_slots = mei_hbuf_filled_slots(dev); mei_me_hbuf_empty_slots() 434 empty_slots = dev->hbuf_depth - filled_slots; mei_me_hbuf_empty_slots() 437 if (filled_slots > dev->hbuf_depth) mei_me_hbuf_empty_slots() 446 @dev: the device structure 450 static size_t mei_me_hbuf_max_len(const struct mei_device dev) mei_me_hbuf_max_len() argument 452 return dev->hbuf_depth sizeof(u32) - sizeof(struct mei_msg_hdr); mei_me_hbuf_max_len() 459 * @dev: the device structure 465 static int mei_me_write_message(struct mei_device dev, mei_me_write_message() argument 477 dev_dbg(dev->dev, MEI_HDR_FMT, MEI_HDR_PRM(header)); mei_me_write_message() 479 empty_slots = mei_hbuf_empty_slots(dev); mei_me_write_message() 480 dev_dbg(dev->dev, "empty slots = %hu.\n", empty_slots); mei_me_write_message() 486 mei_me_hcbww_write(dev, ((u32 ) header)); mei_me_write_message() 489 mei_me_hcbww_write(dev, reg_buf[i]); mei_me_write_message() 496 mei_me_hcbww_write(dev, reg); mei_me_write_message() 499 hcsr = mei_hcsr_read(dev) \| H_IG; mei_me_write_message() 500 mei_hcsr_set(dev, hcsr); mei_me_write_message() 501 if (!mei_me_hw_is_ready(dev)) mei_me_write_message() 510 @dev: the device structure 514 static int mei_me_count_full_read_slots(struct mei_device dev) mei_me_count_full_read_slots() argument 520 me_csr = mei_me_mecsr_read(dev); mei_me_count_full_read_slots() 530 dev_dbg(dev->dev, "filled_slots =%08x\n", filled_slots); mei_me_count_full_read_slots() 537 @dev: the device structure 543 static int mei_me_read_slots(struct mei_device dev, unsigned char buffer, mei_me_read_slots() argument 550 reg_buf++ = mei_me_mecbrw_read(dev); mei_me_read_slots() 553 u32 reg = mei_me_mecbrw_read(dev); mei_me_read_slots() 558 hcsr = mei_hcsr_read(dev) \| H_IG; mei_me_read_slots() 559 mei_hcsr_set(dev, hcsr); mei_me_read_slots() 566 @dev: the device structure 568 static void mei_me_pg_set(struct mei_device dev) mei_me_pg_set() argument 570 struct mei_me_hw hw = to_me_hw(dev); mei_me_pg_set() 574 trace_mei_reg_read(dev->dev, "H_HPG_CSR", H_HPG_CSR, reg); mei_me_pg_set() 578 trace_mei_reg_write(dev->dev, "H_HPG_CSR", H_HPG_CSR, reg); mei_me_pg_set() 585 * @dev: the device structure 587 static void mei_me_pg_unset(struct mei_device dev) mei_me_pg_unset() argument 589 struct mei_me_hw hw = to_me_hw(dev); mei_me_pg_unset() 593 trace_mei_reg_read(dev->dev, "H_HPG_CSR", H_HPG_CSR, reg); mei_me_pg_unset() 599 trace_mei_reg_write(dev->dev, "H_HPG_CSR", H_HPG_CSR, reg); mei_me_pg_unset() 606 * @dev: the device structure 610 int mei_me_pg_enter_sync(struct mei_device dev) mei_me_pg_enter_sync() argument 612 struct mei_me_hw hw = to_me_hw(dev); mei_me_pg_enter_sync() 616 dev->pg_event = MEI_PG_EVENT_WAIT; mei_me_pg_enter_sync() 618 ret = mei_hbm_pg(dev, MEI_PG_ISOLATION_ENTRY_REQ_CMD); mei_me_pg_enter_sync() 622 mutex_unlock(&dev->device_lock); mei_me_pg_enter_sync() 623 wait_event_timeout(dev->wait_pg, mei_me_pg_enter_sync() 624 dev->pg_event == MEI_PG_EVENT_RECEIVED, timeout); mei_me_pg_enter_sync() 625 mutex_lock(&dev->device_lock); mei_me_pg_enter_sync() 627 if (dev->pg_event == MEI_PG_EVENT_RECEIVED) { mei_me_pg_enter_sync() 628 mei_me_pg_set(dev); mei_me_pg_enter_sync() 634 dev->pg_event = MEI_PG_EVENT_IDLE; mei_me_pg_enter_sync() 643 * @dev: the device structure 647 int mei_me_pg_exit_sync(struct mei_device dev) mei_me_pg_exit_sync() argument 649 struct mei_me_hw hw = to_me_hw(dev); mei_me_pg_exit_sync() 653 if (dev->pg_event == MEI_PG_EVENT_RECEIVED) mei_me_pg_exit_sync() 656 dev->pg_event = MEI_PG_EVENT_WAIT; mei_me_pg_exit_sync() 658 mei_me_pg_unset(dev); mei_me_pg_exit_sync() 660 mutex_unlock(&dev->device_lock); mei_me_pg_exit_sync() 661 wait_event_timeout(dev->wait_pg, mei_me_pg_exit_sync() 662 dev->pg_event == MEI_PG_EVENT_RECEIVED, timeout); mei_me_pg_exit_sync() 663 mutex_lock(&dev->device_lock); mei_me_pg_exit_sync() 666 if (dev->pg_event != MEI_PG_EVENT_RECEIVED) { mei_me_pg_exit_sync() 671 dev->pg_event = MEI_PG_EVENT_INTR_WAIT; mei_me_pg_exit_sync() 672 ret = mei_hbm_pg(dev, MEI_PG_ISOLATION_EXIT_RES_CMD); mei_me_pg_exit_sync() 676 mutex_unlock(&dev->device_lock); mei_me_pg_exit_sync() 677 wait_event_timeout(dev->wait_pg, mei_me_pg_exit_sync() 678 dev->pg_event == MEI_PG_EVENT_INTR_RECEIVED, timeout); mei_me_pg_exit_sync() 679 mutex_lock(&dev->device_lock); mei_me_pg_exit_sync() 681 if (dev->pg_event == MEI_PG_EVENT_INTR_RECEIVED) mei_me_pg_exit_sync() 687 dev->pg_event = MEI_PG_EVENT_IDLE; mei_me_pg_exit_sync() 696 * @dev: the device structure 700 static bool mei_me_pg_in_transition(struct mei_device dev) mei_me_pg_in_transition() argument 702 return dev->pg_event >= MEI_PG_EVENT_WAIT && mei_me_pg_in_transition() 703 dev->pg_event <= MEI_PG_EVENT_INTR_WAIT; mei_me_pg_in_transition() 709 @dev: the device structure 713 static bool mei_me_pg_is_enabled(struct mei_device dev) mei_me_pg_is_enabled() argument 715 u32 reg = mei_me_mecsr_read(dev); mei_me_pg_is_enabled() 720 if (!dev->hbm_f_pg_supported) mei_me_pg_is_enabled() 726 dev_dbg(dev->dev, "pg: not supported: HGP = %d hbm version %d.%d ?= %d.%d\n", mei_me_pg_is_enabled() 728 dev->version.major_version, mei_me_pg_is_enabled() 729 dev->version.minor_version, mei_me_pg_is_enabled() 739 @dev: the device structure 741 static void mei_me_pg_intr(struct mei_device dev) mei_me_pg_intr() argument 743 struct mei_me_hw hw = to_me_hw(dev); mei_me_pg_intr() 745 if (dev->pg_event != MEI_PG_EVENT_INTR_WAIT) mei_me_pg_intr() 748 dev->pg_event = MEI_PG_EVENT_INTR_RECEIVED; mei_me_pg_intr() 750 if (waitqueue_active(&dev->wait_pg)) mei_me_pg_intr() 751 wake_up(&dev->wait_pg); mei_me_pg_intr() 765 struct mei_device dev = (struct mei_device ) dev_id; mei_me_irq_quick_handler() local 766 u32 hcsr = mei_hcsr_read(dev); mei_me_irq_quick_handler() 772 mei_hcsr_write(dev, hcsr); mei_me_irq_quick_handler() 789 struct mei_device dev = (struct mei_device ) dev_id; mei_me_irq_thread_handler() local 794 dev_dbg(dev->dev, "function called after ISR to handle the interrupt processing.\n"); mei_me_irq_thread_handler() 796 mutex_lock(&dev->device_lock); mei_me_irq_thread_handler() 801 if (pci_dev_msi_enabled(to_pci_dev(dev->dev))) mei_me_irq_thread_handler() 802 mei_clear_interrupts(dev); mei_me_irq_thread_handler() 805 if (!mei_hw_is_ready(dev) && dev->dev_state != MEI_DEV_RESETTING) { mei_me_irq_thread_handler() 806 dev_warn(dev->dev, "FW not ready: resetting.\n"); mei_me_irq_thread_handler() 807 schedule_work(&dev->reset_work); mei_me_irq_thread_handler() 811 mei_me_pg_intr(dev); mei_me_irq_thread_handler() 813 /* check if we need to start the dev / mei_me_irq_thread_handler() 814 if (!mei_host_is_ready(dev)) { mei_me_irq_thread_handler() 815 if (mei_hw_is_ready(dev)) { mei_me_irq_thread_handler() 816 dev_dbg(dev->dev, "we need to start the dev.\n"); mei_me_irq_thread_handler() 817 dev->recvd_hw_ready = true; mei_me_irq_thread_handler() 818 wake_up(&dev->wait_hw_ready); mei_me_irq_thread_handler() 820 dev_dbg(dev->dev, "Spurious Interrupt\n"); mei_me_irq_thread_handler() 825 slots = mei_count_full_read_slots(dev); mei_me_irq_thread_handler() 827 dev_dbg(dev->dev, "slots to read = %08x\n", slots); mei_me_irq_thread_handler() 828 rets = mei_irq_read_handler(dev, &complete_list, &slots); mei_me_irq_thread_handler() 836 if (rets && dev->dev_state != MEI_DEV_RESETTING) { mei_me_irq_thread_handler() 837 dev_err(dev->dev, "mei_irq_read_handler ret = %d.\n", mei_me_irq_thread_handler() 839 schedule_work(&dev->reset_work); mei_me_irq_thread_handler() 844 dev->hbuf_is_ready = mei_hbuf_is_ready(dev); mei_me_irq_thread_handler() 851 if (dev->pg_event != MEI_PG_EVENT_WAIT && mei_me_irq_thread_handler() 852 dev->pg_event != MEI_PG_EVENT_RECEIVED) { mei_me_irq_thread_handler() 853 rets = mei_irq_write_handler(dev, &complete_list); mei_me_irq_thread_handler() 854 dev->hbuf_is_ready = mei_hbuf_is_ready(dev); mei_me_irq_thread_handler() 857 mei_irq_compl_handler(dev, &complete_list); mei_me_irq_thread_handler() 860 dev_dbg(dev->dev, "interrupt thread end ret = %d\n", rets); mei_me_irq_thread_handler() 861 mutex_unlock(&dev->device_lock); mei_me_irq_thread_handler() 985 struct mei_device dev; mei_me_dev_init() local 988 dev = kzalloc(sizeof(struct mei_device) + mei_me_dev_init() 990 if (!dev) mei_me_dev_init() 992 hw = to_me_hw(dev); mei_me_dev_init() 994 mei_device_init(dev, &pdev->dev, &mei_me_hw_ops); mei_me_dev_init() 996 return dev; mei_me_dev_init()
H A D	hbm.c	99 * @dev: the device structure 101 void mei_hbm_idle(struct mei_device dev) mei_hbm_idle() argument 103 dev->init_clients_timer = 0; mei_hbm_idle() 104 dev->hbm_state = MEI_HBM_IDLE; mei_hbm_idle() 110 @dev: the device structure 112 void mei_hbm_reset(struct mei_device dev) mei_hbm_reset() argument 114 dev->me_client_index = 0; mei_hbm_reset() 116 mei_me_cl_rm_all(dev); mei_hbm_reset() 118 mei_hbm_idle(dev); mei_hbm_reset() 160 @dev: the device structure 168 int mei_hbm_cl_write(struct mei_device dev, mei_hbm_cl_write() argument 171 struct mei_msg_hdr mei_hdr = &dev->wr_msg.hdr; mei_hbm_cl_write() 174 mei_hbm_cl_hdr(cl, hbm_cmd, dev->wr_msg.data, len); mei_hbm_cl_write() 176 return mei_write_message(dev, mei_hdr, dev->wr_msg.data); mei_hbm_cl_write() 198 * @dev: the device structure 204 struct mei_cl mei_hbm_cl_find_by_cmd(struct mei_device dev, void buf) mei_hbm_cl_find_by_cmd() argument 209 list_for_each_entry(cl, &dev->file_list, link) mei_hbm_cl_find_by_cmd() 219 @dev: the device structure 223 int mei_hbm_start_wait(struct mei_device dev) mei_hbm_start_wait() argument 227 if (dev->hbm_state > MEI_HBM_STARTING) mei_hbm_start_wait() 230 mutex_unlock(&dev->device_lock); mei_hbm_start_wait() 231 ret = wait_event_timeout(dev->wait_hbm_start, mei_hbm_start_wait() 232 dev->hbm_state != MEI_HBM_STARTING, mei_hbm_start_wait() 234 mutex_lock(&dev->device_lock); mei_hbm_start_wait() 236 if (ret == 0 && (dev->hbm_state <= MEI_HBM_STARTING)) { mei_hbm_start_wait() 237 dev->hbm_state = MEI_HBM_IDLE; mei_hbm_start_wait() 238 dev_err(dev->dev, "waiting for mei start failed\n"); mei_hbm_start_wait() 247 @dev: the device structure 251 int mei_hbm_start_req(struct mei_device dev) mei_hbm_start_req() argument 253 struct mei_msg_hdr mei_hdr = &dev->wr_msg.hdr; mei_hbm_start_req() 258 mei_hbm_reset(dev); mei_hbm_start_req() 263 start_req = (struct hbm_host_version_request )dev->wr_msg.data; mei_hbm_start_req() 269 dev->hbm_state = MEI_HBM_IDLE; mei_hbm_start_req() 270 ret = mei_write_message(dev, mei_hdr, dev->wr_msg.data); mei_hbm_start_req() 272 dev_err(dev->dev, "version message write failed: ret = %d\n", mei_hbm_start_req() 277 dev->hbm_state = MEI_HBM_STARTING; mei_hbm_start_req() 278 dev->init_clients_timer = MEI_CLIENTS_INIT_TIMEOUT; mei_hbm_start_req() 285 @dev: the device structure 289 static int mei_hbm_enum_clients_req(struct mei_device dev) mei_hbm_enum_clients_req() argument 291 struct mei_msg_hdr mei_hdr = &dev->wr_msg.hdr; mei_hbm_enum_clients_req() 299 enum_req = (struct hbm_host_enum_request )dev->wr_msg.data; mei_hbm_enum_clients_req() 303 ret = mei_write_message(dev, mei_hdr, dev->wr_msg.data); mei_hbm_enum_clients_req() 305 dev_err(dev->dev, "enumeration request write failed: ret = %d.\n", mei_hbm_enum_clients_req() 309 dev->hbm_state = MEI_HBM_ENUM_CLIENTS; mei_hbm_enum_clients_req() 310 dev->init_clients_timer = MEI_CLIENTS_INIT_TIMEOUT; mei_hbm_enum_clients_req() 317 @dev: the device structure 323 static int mei_hbm_me_cl_add(struct mei_device dev, mei_hbm_me_cl_add() argument 329 mei_me_cl_rm_by_uuid(dev, uuid); mei_hbm_me_cl_add() 341 mei_me_cl_add(dev, me_cl); mei_hbm_me_cl_add() 349 @dev: the device structure 354 static int mei_hbm_prop_req(struct mei_device dev) mei_hbm_prop_req() argument 357 struct mei_msg_hdr mei_hdr = &dev->wr_msg.hdr; mei_hbm_prop_req() 363 next_client_index = find_next_bit(dev->me_clients_map, MEI_CLIENTS_MAX, mei_hbm_prop_req() 364 dev->me_client_index); mei_hbm_prop_req() 368 dev->hbm_state = MEI_HBM_STARTED; mei_hbm_prop_req() 369 schedule_work(&dev->init_work); mei_hbm_prop_req() 375 prop_req = (struct hbm_props_request )dev->wr_msg.data; mei_hbm_prop_req() 382 ret = mei_write_message(dev, mei_hdr, dev->wr_msg.data); mei_hbm_prop_req() 384 dev_err(dev->dev, "properties request write failed: ret = %d\n", mei_hbm_prop_req() 389 dev->init_clients_timer = MEI_CLIENTS_INIT_TIMEOUT; mei_hbm_prop_req() 390 dev->me_client_index = next_client_index; mei_hbm_prop_req() 398 @dev: the device structure 404 int mei_hbm_pg(struct mei_device dev, u8 pg_cmd) mei_hbm_pg() argument 406 struct mei_msg_hdr mei_hdr = &dev->wr_msg.hdr; mei_hbm_pg() 411 if (!dev->hbm_f_pg_supported) mei_hbm_pg() 416 req = (struct hbm_power_gate )dev->wr_msg.data; mei_hbm_pg() 420 ret = mei_write_message(dev, mei_hdr, dev->wr_msg.data); mei_hbm_pg() 422 dev_err(dev->dev, "power gate command write failed.\n"); mei_hbm_pg() 430 @dev: mei device 434 static int mei_hbm_stop_req(struct mei_device dev) mei_hbm_stop_req() argument 436 struct mei_msg_hdr mei_hdr = &dev->wr_msg.hdr; mei_hbm_stop_req() 438 (struct hbm_host_stop_request )dev->wr_msg.data; mei_hbm_stop_req() 447 return mei_write_message(dev, mei_hdr, dev->wr_msg.data); mei_hbm_stop_req() 453 @dev: the device structure 458 int mei_hbm_cl_flow_control_req(struct mei_device dev, struct mei_cl cl) mei_hbm_cl_flow_control_req() argument 462 cl_dbg(dev, cl, "sending flow control\n"); mei_hbm_cl_flow_control_req() 463 return mei_hbm_cl_write(dev, cl, MEI_FLOW_CONTROL_CMD, len); mei_hbm_cl_flow_control_req() 469 * @dev: the device structure 474 static int mei_hbm_add_single_flow_creds(struct mei_device dev, mei_hbm_add_single_flow_creds() argument 480 me_cl = mei_me_cl_by_id(dev, flow->me_addr); mei_hbm_add_single_flow_creds() 482 dev_err(dev->dev, "no such me client %d\n", mei_hbm_add_single_flow_creds() 493 dev_dbg(dev->dev, "recv flow ctrl msg ME %d (single) creds = %d.\n", mei_hbm_add_single_flow_creds() 505 @dev: the device structure 508 static void mei_hbm_cl_flow_control_res(struct mei_device dev, mei_hbm_cl_flow_control_res() argument 515 mei_hbm_add_single_flow_creds(dev, flow_control); mei_hbm_cl_flow_control_res() 519 cl = mei_hbm_cl_find_by_cmd(dev, flow_control); mei_hbm_cl_flow_control_res() 522 cl_dbg(dev, cl, "flow control creds = %d.\n", mei_hbm_cl_flow_control_res() 531 @dev: the device structure 536 int mei_hbm_cl_disconnect_req(struct mei_device dev, struct mei_cl cl) mei_hbm_cl_disconnect_req() argument 540 return mei_hbm_cl_write(dev, cl, CLIENT_DISCONNECT_REQ_CMD, len); mei_hbm_cl_disconnect_req() 546 * @dev: the device structure 551 int mei_hbm_cl_disconnect_rsp(struct mei_device dev, struct mei_cl cl) mei_hbm_cl_disconnect_rsp() argument 555 return mei_hbm_cl_write(dev, cl, CLIENT_DISCONNECT_RES_CMD, len); mei_hbm_cl_disconnect_rsp() 562 * @dev: the device structure 566 static void mei_hbm_cl_disconnect_res(struct mei_device dev, struct mei_cl cl, mei_hbm_cl_disconnect_res() argument 572 cl_dbg(dev, cl, "hbm: disconnect response status=%d\n", rs->status); mei_hbm_cl_disconnect_res() 582 * @dev: the device structure 587 int mei_hbm_cl_connect_req(struct mei_device dev, struct mei_cl cl) mei_hbm_cl_connect_req() argument 591 return mei_hbm_cl_write(dev, cl, CLIENT_CONNECT_REQ_CMD, len); mei_hbm_cl_connect_req() 598 * @dev: the device structure 602 static void mei_hbm_cl_connect_res(struct mei_device dev, struct mei_cl cl, mei_hbm_cl_connect_res() argument 608 cl_dbg(dev, cl, "hbm: connect response status=%s\n", mei_hbm_cl_connect_res() 622 * @dev: the device structure 626 static void mei_hbm_cl_res(struct mei_device dev, mei_hbm_cl_res() argument 634 list_for_each_entry_safe(cb, next, &dev->ctrl_rd_list.list, list) { mei_hbm_cl_res() 652 mei_hbm_cl_connect_res(dev, cl, rs); mei_hbm_cl_res() 655 mei_hbm_cl_disconnect_res(dev, cl, rs); mei_hbm_cl_res() 670 @dev: the device structure. 675 static int mei_hbm_fw_disconnect_req(struct mei_device dev, mei_hbm_fw_disconnect_req() argument 681 cl = mei_hbm_cl_find_by_cmd(dev, disconnect_req); mei_hbm_fw_disconnect_req() 683 cl_dbg(dev, cl, "disconnect request received\n"); mei_hbm_fw_disconnect_req() 690 cl_dbg(dev, cl, "add disconnect response as first\n"); mei_hbm_fw_disconnect_req() 691 list_add(&cb->list, &dev->ctrl_wr_list.list); mei_hbm_fw_disconnect_req() 700 @dev: the device structure 702 static void mei_hbm_config_features(struct mei_device dev) mei_hbm_config_features() argument 705 dev->hbm_f_pg_supported = 0; mei_hbm_config_features() 706 if (dev->version.major_version > HBM_MAJOR_VERSION_PGI) mei_hbm_config_features() 707 dev->hbm_f_pg_supported = 1; mei_hbm_config_features() 709 if (dev->version.major_version == HBM_MAJOR_VERSION_PGI && mei_hbm_config_features() 710 dev->version.minor_version >= HBM_MINOR_VERSION_PGI) mei_hbm_config_features() 711 dev->hbm_f_pg_supported = 1; mei_hbm_config_features() 718 @dev: the device structure 721 bool mei_hbm_version_is_supported(struct mei_device dev) mei_hbm_version_is_supported() argument 723 return (dev->version.major_version < HBM_MAJOR_VERSION) \|\| mei_hbm_version_is_supported() 724 (dev->version.major_version == HBM_MAJOR_VERSION && mei_hbm_version_is_supported() 725 dev->version.minor_version <= HBM_MINOR_VERSION); mei_hbm_version_is_supported() 732 @dev: the device structure 737 int mei_hbm_dispatch(struct mei_device dev, struct mei_msg_hdr hdr) mei_hbm_dispatch() argument 749 BUG_ON(hdr->length >= sizeof(dev->rd_msg_buf)); mei_hbm_dispatch() 750 mei_read_slots(dev, dev->rd_msg_buf, hdr->length); mei_hbm_dispatch() 751 mei_msg = (struct mei_bus_message *)dev->rd_msg_buf; mei_hbm_dispatch() 757 if (dev->hbm_state == MEI_HBM_IDLE) { mei_hbm_dispatch() 758 dev_dbg(dev->dev, "hbm: state is idle ignore spurious messages\n"); mei_hbm_dispatch() 764 dev_dbg(dev->dev, "hbm: start: response message received.\n"); mei_hbm_dispatch() 766 dev->init_clients_timer = 0; mei_hbm_dispatch() 770 dev_dbg(dev->dev, "HBM VERSION: DRIVER=%02d:%02d DEVICE=%02d:%02d\n", mei_hbm_dispatch() 776 dev->version.major_version = HBM_MAJOR_VERSION; mei_hbm_dispatch() 777 dev->version.minor_version = HBM_MINOR_VERSION; mei_hbm_dispatch() 779 dev->version.major_version = mei_hbm_dispatch() 781 dev->version.minor_version = mei_hbm_dispatch() 785 if (!mei_hbm_version_is_supported(dev)) { mei_hbm_dispatch() 786 dev_warn(dev->dev, "hbm: start: version mismatch - stopping the driver.\n"); mei_hbm_dispatch() 788 dev->hbm_state = MEI_HBM_STOPPED; mei_hbm_dispatch() 789 if (mei_hbm_stop_req(dev)) { mei_hbm_dispatch() 790 dev_err(dev->dev, "hbm: start: failed to send stop request\n"); mei_hbm_dispatch() 796 mei_hbm_config_features(dev); mei_hbm_dispatch() 798 if (dev->dev_state != MEI_DEV_INIT_CLIENTS \|\| mei_hbm_dispatch() 799 dev->hbm_state != MEI_HBM_STARTING) { mei_hbm_dispatch() 800 dev_err(dev->dev, "hbm: start: state mismatch, [%d, %d]\n", mei_hbm_dispatch() 801 dev->dev_state, dev->hbm_state); mei_hbm_dispatch() 805 if (mei_hbm_enum_clients_req(dev)) { mei_hbm_dispatch() 806 dev_err(dev->dev, "hbm: start: failed to send enumeration request\n"); mei_hbm_dispatch() 810 wake_up(&dev->wait_hbm_start); mei_hbm_dispatch() 814 dev_dbg(dev->dev, "hbm: client connect response: message received.\n"); mei_hbm_dispatch() 815 mei_hbm_cl_res(dev, cl_cmd, MEI_FOP_CONNECT); mei_hbm_dispatch() 819 dev_dbg(dev->dev, "hbm: client disconnect response: message received.\n"); mei_hbm_dispatch() 820 mei_hbm_cl_res(dev, cl_cmd, MEI_FOP_DISCONNECT); mei_hbm_dispatch() 824 dev_dbg(dev->dev, "hbm: client flow control response: message received.\n"); mei_hbm_dispatch() 827 mei_hbm_cl_flow_control_res(dev, flow_control); mei_hbm_dispatch() 831 dev_dbg(dev->dev, "power gate isolation entry response received\n"); mei_hbm_dispatch() 832 dev->pg_event = MEI_PG_EVENT_RECEIVED; mei_hbm_dispatch() 833 if (waitqueue_active(&dev->wait_pg)) mei_hbm_dispatch() 834 wake_up(&dev->wait_pg); mei_hbm_dispatch() 838 dev_dbg(dev->dev, "power gate isolation exit request received\n"); mei_hbm_dispatch() 839 dev->pg_event = MEI_PG_EVENT_RECEIVED; mei_hbm_dispatch() 840 if (waitqueue_active(&dev->wait_pg)) mei_hbm_dispatch() 841 wake_up(&dev->wait_pg); mei_hbm_dispatch() 848 pm_request_resume(dev->dev); mei_hbm_dispatch() 852 dev_dbg(dev->dev, "hbm: properties response: message received.\n"); mei_hbm_dispatch() 854 dev->init_clients_timer = 0; mei_hbm_dispatch() 856 if (dev->dev_state != MEI_DEV_INIT_CLIENTS \|\| mei_hbm_dispatch() 857 dev->hbm_state != MEI_HBM_CLIENT_PROPERTIES) { mei_hbm_dispatch() 858 dev_err(dev->dev, "hbm: properties response: state mismatch, [%d, %d]\n", mei_hbm_dispatch() 859 dev->dev_state, dev->hbm_state); mei_hbm_dispatch() 866 dev_err(dev->dev, "hbm: properties response: wrong status = %d %s\n", mei_hbm_dispatch() 872 mei_hbm_me_cl_add(dev, props_res); mei_hbm_dispatch() 874 dev->me_client_index++; mei_hbm_dispatch() 877 if (mei_hbm_prop_req(dev)) mei_hbm_dispatch() 883 dev_dbg(dev->dev, "hbm: enumeration response: message received\n"); mei_hbm_dispatch() 885 dev->init_clients_timer = 0; mei_hbm_dispatch() 888 BUILD_BUG_ON(sizeof(dev->me_clients_map) mei_hbm_dispatch() 890 memcpy(dev->me_clients_map, enum_res->valid_addresses, mei_hbm_dispatch() 893 if (dev->dev_state != MEI_DEV_INIT_CLIENTS \|\| mei_hbm_dispatch() 894 dev->hbm_state != MEI_HBM_ENUM_CLIENTS) { mei_hbm_dispatch() 895 dev_err(dev->dev, "hbm: enumeration response: state mismatch, [%d, %d]\n", mei_hbm_dispatch() 896 dev->dev_state, dev->hbm_state); mei_hbm_dispatch() 900 dev->hbm_state = MEI_HBM_CLIENT_PROPERTIES; mei_hbm_dispatch() 903 if (mei_hbm_prop_req(dev)) mei_hbm_dispatch() 909 dev_dbg(dev->dev, "hbm: stop response: message received\n"); mei_hbm_dispatch() 911 dev->init_clients_timer = 0; mei_hbm_dispatch() 913 if (dev->hbm_state != MEI_HBM_STOPPED) { mei_hbm_dispatch() 914 dev_err(dev->dev, "hbm: stop response: state mismatch, [%d, %d]\n", mei_hbm_dispatch() 915 dev->dev_state, dev->hbm_state); mei_hbm_dispatch() 919 dev->dev_state = MEI_DEV_POWER_DOWN; mei_hbm_dispatch() 920 dev_info(dev->dev, "hbm: stop response: resetting.\n"); mei_hbm_dispatch() 926 dev_dbg(dev->dev, "hbm: disconnect request: message received\n"); mei_hbm_dispatch() 929 mei_hbm_fw_disconnect_req(dev, disconnect_req); mei_hbm_dispatch() 933 dev_dbg(dev->dev, "hbm: stop request: message received\n"); mei_hbm_dispatch() 934 dev->hbm_state = MEI_HBM_STOPPED; mei_hbm_dispatch() 935 if (mei_hbm_stop_req(dev)) { mei_hbm_dispatch() 936 dev_err(dev->dev, "hbm: stop request: failed to send stop request\n"); mei_hbm_dispatch()
H A D	amthif.c	45 * @dev: the device structure 47 void mei_amthif_reset_params(struct mei_device dev) mei_amthif_reset_params() argument 50 dev->iamthif_current_cb = NULL; mei_amthif_reset_params() 51 dev->iamthif_canceled = false; mei_amthif_reset_params() 52 dev->iamthif_state = MEI_IAMTHIF_IDLE; mei_amthif_reset_params() 53 dev->iamthif_timer = 0; mei_amthif_reset_params() 54 dev->iamthif_stall_timer = 0; mei_amthif_reset_params() 55 dev->iamthif_open_count = 0; mei_amthif_reset_params() 61 @dev: the device structure 65 int mei_amthif_host_init(struct mei_device dev) mei_amthif_host_init() argument 67 struct mei_cl cl = &dev->iamthif_cl; mei_amthif_host_init() 71 dev->iamthif_state = MEI_IAMTHIF_IDLE; mei_amthif_host_init() 73 mei_cl_init(cl, dev); mei_amthif_host_init() 75 me_cl = mei_me_cl_by_uuid(dev, &mei_amthif_guid); mei_amthif_host_init() 77 dev_info(dev->dev, "amthif: failed to find the client"); mei_amthif_host_init() 86 dev->iamthif_mtu = me_cl->props.max_msg_length; mei_amthif_host_init() 87 dev_dbg(dev->dev, "IAMTHIF_MTU = %d\n", dev->iamthif_mtu); mei_amthif_host_init() 92 dev_err(dev->dev, "amthif: failed cl_link %d\n", ret); mei_amthif_host_init() 98 dev->iamthif_state = MEI_IAMTHIF_IDLE; mei_amthif_host_init() 108 * @dev: the device structure 113 struct mei_cl_cb mei_amthif_find_read_list_entry(struct mei_device dev, mei_amthif_find_read_list_entry() argument 118 list_for_each_entry(cb, &dev->amthif_rd_complete_list.list, list) mei_amthif_find_read_list_entry() 128 * @dev: the device structure 134 * Locking: called under "dev->device_lock" lock 141 int mei_amthif_read(struct mei_device dev, struct file file, mei_amthif_read() argument 152 dev_err(dev->dev, "bad file ext.\n"); mei_amthif_read() 156 dev_dbg(dev->dev, "checking amthif data\n"); mei_amthif_read() 157 cb = mei_amthif_find_read_list_entry(dev, file); mei_amthif_read() 164 dev_dbg(dev->dev, "waiting for amthif data\n"); mei_amthif_read() 167 mutex_unlock(&dev->device_lock); mei_amthif_read() 169 wait_ret = wait_event_interruptible(dev->iamthif_cl.wait, mei_amthif_read() 170 (cb = mei_amthif_find_read_list_entry(dev, file))); mei_amthif_read() 173 mutex_lock(&dev->device_lock); mei_amthif_read() 178 dev_dbg(dev->dev, "woke up from sleep\n"); mei_amthif_read() 183 dev_dbg(dev->dev, "read operation failed %d\n", rets); mei_amthif_read() 187 dev_dbg(dev->dev, "Got amthif data\n"); mei_amthif_read() 188 dev->iamthif_timer = 0; mei_amthif_read() 192 dev_dbg(dev->dev, "amthif timeout = %lud\n", mei_amthif_read() 196 dev_dbg(dev->dev, "amthif Time out\n"); mei_amthif_read() 215 dev_dbg(dev->dev, "amthif cb->buf size - %d\n", mei_amthif_read() 217 dev_dbg(dev->dev, "amthif cb->buf_idx - %lu\n", cb->buf_idx); mei_amthif_read() 224 dev_dbg(dev->dev, "failed to copy data to userland\n"); mei_amthif_read() 234 dev_dbg(dev->dev, "free amthif cb memory.\n"); mei_amthif_read() 251 struct mei_device dev = cl->dev; mei_amthif_read_start() local 253 size_t length = dev->iamthif_mtu; mei_amthif_read_start() 266 list_add_tail(&cb->list, &dev->ctrl_wr_list.list); mei_amthif_read_start() 268 dev->iamthif_state = MEI_IAMTHIF_READING; mei_amthif_read_start() 269 dev->iamthif_file_object = cb->file_object; mei_amthif_read_start() 270 dev->iamthif_current_cb = cb; mei_amthif_read_start() 288 struct mei_device dev; mei_amthif_send_cmd() local 291 if (!cl->dev \|\| !cb) mei_amthif_send_cmd() 294 dev = cl->dev; mei_amthif_send_cmd() 296 dev->iamthif_state = MEI_IAMTHIF_WRITING; mei_amthif_send_cmd() 297 dev->iamthif_current_cb = cb; mei_amthif_send_cmd() 298 dev->iamthif_file_object = cb->file_object; mei_amthif_send_cmd() 299 dev->iamthif_canceled = false; mei_amthif_send_cmd() 314 * @dev: the device structure 318 int mei_amthif_run_next_cmd(struct mei_device dev) mei_amthif_run_next_cmd() argument 320 struct mei_cl cl = &dev->iamthif_cl; mei_amthif_run_next_cmd() 323 dev->iamthif_canceled = false; mei_amthif_run_next_cmd() 324 dev->iamthif_state = MEI_IAMTHIF_IDLE; mei_amthif_run_next_cmd() 325 dev->iamthif_timer = 0; mei_amthif_run_next_cmd() 326 dev->iamthif_file_object = NULL; mei_amthif_run_next_cmd() 328 dev_dbg(dev->dev, "complete amthif cmd_list cb.\n"); mei_amthif_run_next_cmd() 330 cb = list_first_entry_or_null(&dev->amthif_cmd_list.list, mei_amthif_run_next_cmd() 350 struct mei_device dev; mei_amthif_write() local 352 if (WARN_ON(!cl \|\| !cl->dev)) mei_amthif_write() 358 dev = cl->dev; mei_amthif_write() 360 list_add_tail(&cb->list, &dev->amthif_cmd_list.list); mei_amthif_write() 361 return mei_amthif_run_next_cmd(dev); mei_amthif_write() 367 @dev: the device structure 373 * Locking: called under "dev->device_lock" lock 376 unsigned int mei_amthif_poll(struct mei_device dev, mei_amthif_poll() argument 381 poll_wait(file, &dev->iamthif_cl.wait, wait); mei_amthif_poll() 383 if (dev->iamthif_state == MEI_IAMTHIF_READ_COMPLETE && mei_amthif_poll() 384 dev->iamthif_file_object == file) { mei_amthif_poll() 387 mei_amthif_run_next_cmd(dev); mei_amthif_poll() 433 struct mei_device dev; mei_amthif_irq_read_msg() local 436 dev = cl->dev; mei_amthif_irq_read_msg() 438 if (dev->iamthif_state != MEI_IAMTHIF_READING) mei_amthif_irq_read_msg() 448 dev_dbg(dev->dev, "completed amthif read.\n "); mei_amthif_irq_read_msg() 449 dev->iamthif_current_cb = NULL; mei_amthif_irq_read_msg() 450 dev->iamthif_stall_timer = 0; mei_amthif_irq_read_msg() 458 * @dev: the device structure. 461 void mei_amthif_complete(struct mei_device dev, struct mei_cl_cb cb) mei_amthif_complete() argument 466 dev->iamthif_stall_timer = MEI_IAMTHIF_STALL_TIMER; mei_amthif_complete() 474 list_add_tail(&cb->list, &dev->amthif_rd_complete_list.list); mei_amthif_complete() 475 wake_up_interruptible(&dev->iamthif_cl.wait); mei_amthif_complete() 479 if (dev->iamthif_canceled != 1) { mei_amthif_complete() 480 dev->iamthif_state = MEI_IAMTHIF_READ_COMPLETE; mei_amthif_complete() 481 dev->iamthif_stall_timer = 0; mei_amthif_complete() 482 list_add_tail(&cb->list, &dev->amthif_rd_complete_list.list); mei_amthif_complete() 483 dev_dbg(dev->dev, "amthif read completed\n"); mei_amthif_complete() 484 dev->iamthif_timer = jiffies; mei_amthif_complete() 485 dev_dbg(dev->dev, "dev->iamthif_timer = %ld\n", mei_amthif_complete() 486 dev->iamthif_timer); mei_amthif_complete() 488 mei_amthif_run_next_cmd(dev); mei_amthif_complete() 491 dev_dbg(dev->dev, "completing amthif call back.\n"); mei_amthif_complete() 492 wake_up_interruptible(&dev->iamthif_cl.wait); mei_amthif_complete() 499 * @dev: device structure. 508 static bool mei_clear_list(struct mei_device dev, mei_clear_list() argument 511 struct mei_cl cl = &dev->iamthif_cl; mei_clear_list() 520 if (dev->iamthif_current_cb == cb) { list_for_each_entry_safe() 521 dev->iamthif_current_cb = NULL; list_for_each_entry_safe() 523 mei_hbm_cl_flow_control_req(dev, cl); list_for_each_entry_safe() 536 * @dev: device structure 544 static bool mei_clear_lists(struct mei_device dev, struct file file) mei_clear_lists() argument 549 mei_clear_list(dev, file, &dev->amthif_cmd_list.list); mei_clear_lists() 550 if (mei_clear_list(dev, file, &dev->amthif_rd_complete_list.list)) mei_clear_lists() 553 mei_clear_list(dev, file, &dev->ctrl_rd_list.list); mei_clear_lists() 555 if (mei_clear_list(dev, file, &dev->ctrl_wr_list.list)) mei_clear_lists() 558 if (mei_clear_list(dev, file, &dev->write_waiting_list.list)) mei_clear_lists() 561 if (mei_clear_list(dev, file, &dev->write_list.list)) mei_clear_lists() 565 if (dev->iamthif_current_cb && !removed) { mei_clear_lists() 567 if (dev->iamthif_current_cb->file_object == file) { mei_clear_lists() 569 mei_io_cb_free(dev->iamthif_current_cb); mei_clear_lists() 570 dev->iamthif_current_cb = NULL; mei_clear_lists() 580 * @dev: device structure 585 int mei_amthif_release(struct mei_device dev, struct file file) mei_amthif_release() argument 587 if (dev->iamthif_open_count > 0) mei_amthif_release() 588 dev->iamthif_open_count--; mei_amthif_release() 590 if (dev->iamthif_file_object == file && mei_amthif_release() 591 dev->iamthif_state != MEI_IAMTHIF_IDLE) { mei_amthif_release() 593 dev_dbg(dev->dev, "amthif canceled iamthif state %d\n", mei_amthif_release() 594 dev->iamthif_state); mei_amthif_release() 595 dev->iamthif_canceled = true; mei_amthif_release() 596 if (dev->iamthif_state == MEI_IAMTHIF_READ_COMPLETE) { mei_amthif_release() 597 dev_dbg(dev->dev, "run next amthif iamthif cb\n"); mei_amthif_release() 598 mei_amthif_run_next_cmd(dev); mei_amthif_release() 602 if (mei_clear_lists(dev, file)) mei_amthif_release() 603 dev->iamthif_state = MEI_IAMTHIF_IDLE; mei_amthif_release()
H A D	interrupt.c	36 * @dev: mei device 39 void mei_irq_compl_handler(struct mei_device dev, struct mei_cl_cb compl_list) mei_irq_compl_handler() argument 48 dev_dbg(dev->dev, "completing call back.\n"); mei_irq_compl_handler() 49 if (cl == &dev->iamthif_cl) mei_irq_compl_handler() 50 mei_amthif_complete(dev, cb); mei_irq_compl_handler() 75 * @dev: mei device 79 void mei_irq_discard_msg(struct mei_device dev, struct mei_msg_hdr hdr) mei_irq_discard_msg() argument 85 mei_read_slots(dev, dev->rd_msg_buf, hdr->length); mei_irq_discard_msg() 86 dev_dbg(dev->dev, "discarding message " MEI_HDR_FMT "\n", mei_irq_discard_msg() 103 struct mei_device dev = cl->dev; mei_cl_irq_read_msg() local 109 cl_err(dev, cl, "pending read cb not found\n"); mei_cl_irq_read_msg() 114 cl_dbg(dev, cl, "not connected\n"); mei_cl_irq_read_msg() 120 cl_err(dev, cl, "response buffer is not allocated.\n"); mei_cl_irq_read_msg() 127 cl_dbg(dev, cl, "message overflow. size %d len %d idx %ld\n", mei_cl_irq_read_msg() 142 mei_read_slots(dev, buffer, mei_hdr->length); mei_cl_irq_read_msg() 148 cl_dbg(dev, cl, "completed read length = %lu\n", cb->buf_idx); mei_cl_irq_read_msg() 154 mei_irq_discard_msg(dev, mei_hdr); mei_cl_irq_read_msg() 171 struct mei_device dev = cl->dev; mei_cl_irq_disconnect_rsp() local 176 slots = mei_hbuf_empty_slots(dev); mei_cl_irq_disconnect_rsp() 182 ret = mei_hbm_cl_disconnect_rsp(dev, cl); mei_cl_irq_disconnect_rsp() 206 struct mei_device dev = cl->dev; mei_cl_irq_disconnect() local 211 slots = mei_hbuf_empty_slots(dev); mei_cl_irq_disconnect() 216 if (mei_hbm_cl_disconnect_req(dev, cl)) { mei_cl_irq_disconnect() 226 list_move_tail(&cb->list, &dev->ctrl_rd_list.list); mei_cl_irq_disconnect() 246 struct mei_device dev = cl->dev; mei_cl_irq_read() local 252 slots = mei_hbuf_empty_slots(dev); mei_cl_irq_read() 257 ret = mei_hbm_cl_flow_control_req(dev, cl); mei_cl_irq_read() 283 struct mei_device dev = cl->dev; mei_cl_irq_connect() local 289 slots = mei_hbuf_empty_slots(dev); mei_cl_irq_connect() 299 ret = mei_hbm_cl_connect_req(dev, cl); mei_cl_irq_connect() 307 list_move_tail(&cb->list, &dev->ctrl_rd_list.list); mei_cl_irq_connect() 317 @dev: the device structure 323 int mei_irq_read_handler(struct mei_device dev, mei_irq_read_handler() argument 330 if (!dev->rd_msg_hdr) { mei_irq_read_handler() 331 dev->rd_msg_hdr = mei_read_hdr(dev); mei_irq_read_handler() 333 dev_dbg(dev->dev, "slots =%08x.\n", slots); mei_irq_read_handler() 335 mei_hdr = (struct mei_msg_hdr ) &dev->rd_msg_hdr; mei_irq_read_handler() 336 dev_dbg(dev->dev, MEI_HDR_FMT, MEI_HDR_PRM(mei_hdr)); mei_irq_read_handler() 338 if (mei_hdr->reserved \|\| !dev->rd_msg_hdr) { mei_irq_read_handler() 339 dev_err(dev->dev, "corrupted message header 0x%08X\n", mei_irq_read_handler() 340 dev->rd_msg_hdr); mei_irq_read_handler() 346 dev_err(dev->dev, "less data available than length=%08x.\n", mei_irq_read_handler() 355 ret = mei_hbm_dispatch(dev, mei_hdr); mei_irq_read_handler() 357 dev_dbg(dev->dev, "mei_hbm_dispatch failed ret = %d\n", mei_irq_read_handler() 365 list_for_each_entry(cl, &dev->file_list, link) { mei_irq_read_handler() 367 cl_dbg(dev, cl, "got a message\n"); mei_irq_read_handler() 373 if (&cl->link == &dev->file_list) { mei_irq_read_handler() 374 dev_err(dev->dev, "no destination client found 0x%08X\n", mei_irq_read_handler() 375 dev->rd_msg_hdr); mei_irq_read_handler() 380 if (cl == &dev->iamthif_cl) { mei_irq_read_handler() 389 slots = mei_count_full_read_slots(dev); mei_irq_read_handler() 390 dev->rd_msg_hdr = 0; mei_irq_read_handler() 394 dev_err(dev->dev, "resetting due to slots overflow.\n"); mei_irq_read_handler() 409 * @dev: the device structure 414 int mei_irq_write_handler(struct mei_device dev, struct mei_cl_cb cmpl_list) mei_irq_write_handler() argument 424 if (!mei_hbuf_acquire(dev)) mei_irq_write_handler() 427 slots = mei_hbuf_empty_slots(dev); mei_irq_write_handler() 432 dev_dbg(dev->dev, "complete all waiting for write cb.\n"); mei_irq_write_handler() 434 list = &dev->write_waiting_list; mei_irq_write_handler() 439 cl_dbg(dev, cl, "MEI WRITE COMPLETE\n"); mei_irq_write_handler() 444 if (dev->wd_state == MEI_WD_STOPPING) { mei_irq_write_handler() 445 dev->wd_state = MEI_WD_IDLE; mei_irq_write_handler() 446 wake_up(&dev->wait_stop_wd); mei_irq_write_handler() 449 if (mei_cl_is_connected(&dev->wd_cl)) { mei_irq_write_handler() 450 if (dev->wd_pending && mei_irq_write_handler() 451 mei_cl_flow_ctrl_creds(&dev->wd_cl) > 0) { mei_irq_write_handler() 452 ret = mei_wd_send(dev); mei_irq_write_handler() 455 dev->wd_pending = false; mei_irq_write_handler() 460 dev_dbg(dev->dev, "complete control write list cb.\n"); mei_irq_write_handler() 461 list_for_each_entry_safe(cb, next, &dev->ctrl_wr_list.list, list) { mei_irq_write_handler() 497 dev_dbg(dev->dev, "complete write list cb.\n"); mei_irq_write_handler() 498 list_for_each_entry_safe(cb, next, &dev->write_list.list, list) { mei_irq_write_handler() 500 if (cl == &dev->iamthif_cl) mei_irq_write_handler() 524 struct mei_device dev = container_of(work, mei_timer() local 528 mutex_lock(&dev->device_lock); mei_timer() 531 if (dev->dev_state == MEI_DEV_INIT_CLIENTS && mei_timer() 532 dev->hbm_state != MEI_HBM_IDLE) { mei_timer() 534 if (dev->init_clients_timer) { mei_timer() 535 if (--dev->init_clients_timer == 0) { mei_timer() 536 dev_err(dev->dev, "timer: init clients timeout hbm_state = %d.\n", mei_timer() 537 dev->hbm_state); mei_timer() 538 mei_reset(dev); mei_timer() 544 if (dev->dev_state != MEI_DEV_ENABLED) mei_timer() 548 list_for_each_entry(cl, &dev->file_list, link) { mei_timer() 551 dev_err(dev->dev, "timer: connect/disconnect timeout.\n"); mei_timer() 552 mei_reset(dev); mei_timer() 558 if (!mei_cl_is_connected(&dev->iamthif_cl)) mei_timer() 561 if (dev->iamthif_stall_timer) { mei_timer() 562 if (--dev->iamthif_stall_timer == 0) { mei_timer() 563 dev_err(dev->dev, "timer: amthif hanged.\n"); mei_timer() 564 mei_reset(dev); mei_timer() 565 dev->iamthif_canceled = false; mei_timer() 566 dev->iamthif_state = MEI_IAMTHIF_IDLE; mei_timer() 567 dev->iamthif_timer = 0; mei_timer() 569 mei_io_cb_free(dev->iamthif_current_cb); mei_timer() 570 dev->iamthif_current_cb = NULL; mei_timer() 572 dev->iamthif_file_object = NULL; mei_timer() 573 mei_amthif_run_next_cmd(dev); mei_timer() 577 if (dev->iamthif_timer) { mei_timer() 579 timeout = dev->iamthif_timer + mei_timer() 582 dev_dbg(dev->dev, "dev->iamthif_timer = %ld\n", mei_timer() 583 dev->iamthif_timer); mei_timer() 584 dev_dbg(dev->dev, "timeout = %ld\n", timeout); mei_timer() 585 dev_dbg(dev->dev, "jiffies = %ld\n", jiffies); mei_timer() 592 dev_dbg(dev->dev, "freeing AMTHI for other requests\n"); mei_timer() 594 mei_io_list_flush(&dev->amthif_rd_complete_list, mei_timer() 595 &dev->iamthif_cl); mei_timer() 596 mei_io_cb_free(dev->iamthif_current_cb); mei_timer() 597 dev->iamthif_current_cb = NULL; mei_timer() 599 dev->iamthif_file_object->private_data = NULL; mei_timer() 600 dev->iamthif_file_object = NULL; mei_timer() 601 dev->iamthif_timer = 0; mei_timer() 602 mei_amthif_run_next_cmd(dev); mei_timer() 607 if (dev->dev_state != MEI_DEV_DISABLED) mei_timer() 608 schedule_delayed_work(&dev->timer_work, 2 HZ); mei_timer() 609 mutex_unlock(&dev->device_lock); mei_timer()
H A D	pci-me.c	92 static inline void mei_me_set_pm_domain(struct mei_device dev); 93 static inline void mei_me_unset_pm_domain(struct mei_device dev); 95 static inline void mei_me_set_pm_domain(struct mei_device dev) {} mei_me_unset_pm_domain() argument 96 static inline void mei_me_unset_pm_domain(struct mei_device dev) {} mei_me_unset_pm_domain() argument 111 dev_info(&pdev->dev, "Device doesn't have valid ME Interface\n"); mei_me_quirk_probe() 129 struct mei_device dev; mei_me_probe() local 137 / enable pci dev / mei_me_probe() 140 dev_err(&pdev->dev, "failed to enable pci device.\n"); mei_me_probe() 148 dev_err(&pdev->dev, "failed to get pci regions.\n"); mei_me_probe() 152 if (dma_set_mask(&pdev->dev, DMA_BIT_MASK(64)) \|\| mei_me_probe() 153 dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64))) { mei_me_probe() 155 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32)); mei_me_probe() 157 err = dma_set_coherent_mask(&pdev->dev, mei_me_probe() 161 dev_err(&pdev->dev, "No usable DMA configuration, aborting\n"); mei_me_probe() 166 / allocates and initializes the mei dev structure / mei_me_probe() 167 dev = mei_me_dev_init(pdev, cfg); mei_me_probe() 168 if (!dev) { mei_me_probe() 172 hw = to_me_hw(dev); mei_me_probe() 176 dev_err(&pdev->dev, "mapping I/O device memory failure.\n"); mei_me_probe() 187 IRQF_ONESHOT, KBUILD_MODNAME, dev); mei_me_probe() 192 IRQF_SHARED, KBUILD_MODNAME, dev); mei_me_probe() 195 dev_err(&pdev->dev, "request_threaded_irq failure. irq = %d\n", mei_me_probe() 200 if (mei_start(dev)) { mei_me_probe() 201 dev_err(&pdev->dev, "init hw failure.\n"); mei_me_probe() 206 pm_runtime_set_autosuspend_delay(&pdev->dev, MEI_ME_RPM_TIMEOUT); mei_me_probe() 207 pm_runtime_use_autosuspend(&pdev->dev); mei_me_probe() 209 err = mei_register(dev, &pdev->dev); mei_me_probe() 213 pci_set_drvdata(pdev, dev); mei_me_probe() 215 schedule_delayed_work(&dev->timer_work, HZ); mei_me_probe() 223 mei_me_set_pm_domain(dev); mei_me_probe() 225 if (mei_pg_is_enabled(dev)) mei_me_probe() 226 pm_runtime_put_noidle(&pdev->dev); mei_me_probe() 228 dev_dbg(&pdev->dev, "initialization successful.\n"); mei_me_probe() 233 mei_cancel_work(dev); mei_me_probe() 234 mei_disable_interrupts(dev); mei_me_probe() 235 free_irq(pdev->irq, dev); mei_me_probe() 240 kfree(dev); mei_me_probe() 246 dev_err(&pdev->dev, "initialization failed.\n"); mei_me_probe() 260 struct mei_device dev; mei_me_remove() local 263 dev = pci_get_drvdata(pdev); mei_me_remove() 264 if (!dev) mei_me_remove() 267 if (mei_pg_is_enabled(dev)) mei_me_remove() 268 pm_runtime_get_noresume(&pdev->dev); mei_me_remove() 270 hw = to_me_hw(dev); mei_me_remove() 273 dev_dbg(&pdev->dev, "stop\n"); mei_me_remove() 274 mei_stop(dev); mei_me_remove() 277 mei_me_unset_pm_domain(dev); mei_me_remove() 280 mei_disable_interrupts(dev); mei_me_remove() 282 free_irq(pdev->irq, dev); mei_me_remove() 288 mei_deregister(dev); mei_me_remove() 290 kfree(dev); mei_me_remove() 301 struct mei_device dev = pci_get_drvdata(pdev); mei_me_pci_suspend() local 303 if (!dev) mei_me_pci_suspend() 306 dev_dbg(&pdev->dev, "suspend\n"); mei_me_pci_suspend() 308 mei_stop(dev); mei_me_pci_suspend() 310 mei_disable_interrupts(dev); mei_me_pci_suspend() 312 free_irq(pdev->irq, dev); mei_me_pci_suspend() 321 struct mei_device dev; mei_me_pci_resume() local 324 dev = pci_get_drvdata(pdev); mei_me_pci_resume() 325 if (!dev) mei_me_pci_resume() 335 IRQF_ONESHOT, KBUILD_MODNAME, dev); mei_me_pci_resume() 340 IRQF_SHARED, KBUILD_MODNAME, dev); mei_me_pci_resume() 343 dev_err(&pdev->dev, "request_threaded_irq failed: irq = %d.\n", mei_me_pci_resume() 348 err = mei_restart(dev); mei_me_pci_resume() 353 schedule_delayed_work(&dev->timer_work, HZ); mei_me_pci_resume() 363 struct mei_device dev; mei_me_pm_runtime_idle() local 365 dev_dbg(&pdev->dev, "rpm: me: runtime_idle\n"); mei_me_pm_runtime_idle() 367 dev = pci_get_drvdata(pdev); mei_me_pm_runtime_idle() 368 if (!dev) mei_me_pm_runtime_idle() 370 if (mei_write_is_idle(dev)) mei_me_pm_runtime_idle() 379 struct mei_device dev; mei_me_pm_runtime_suspend() local 382 dev_dbg(&pdev->dev, "rpm: me: runtime suspend\n"); mei_me_pm_runtime_suspend() 384 dev = pci_get_drvdata(pdev); mei_me_pm_runtime_suspend() 385 if (!dev) mei_me_pm_runtime_suspend() 388 mutex_lock(&dev->device_lock); mei_me_pm_runtime_suspend() 390 if (mei_write_is_idle(dev)) mei_me_pm_runtime_suspend() 391 ret = mei_me_pg_enter_sync(dev); mei_me_pm_runtime_suspend() 395 mutex_unlock(&dev->device_lock); mei_me_pm_runtime_suspend() 397 dev_dbg(&pdev->dev, "rpm: me: runtime suspend ret=%d\n", ret); mei_me_pm_runtime_suspend() 405 struct mei_device dev; mei_me_pm_runtime_resume() local 408 dev_dbg(&pdev->dev, "rpm: me: runtime resume\n"); mei_me_pm_runtime_resume() 410 dev = pci_get_drvdata(pdev); mei_me_pm_runtime_resume() 411 if (!dev) mei_me_pm_runtime_resume() 414 mutex_lock(&dev->device_lock); mei_me_pm_runtime_resume() 416 ret = mei_me_pg_exit_sync(dev); mei_me_pm_runtime_resume() 418 mutex_unlock(&dev->device_lock); mei_me_pm_runtime_resume() 420 dev_dbg(&pdev->dev, "rpm: me: runtime resume ret = %d\n", ret); mei_me_pm_runtime_resume() 428 @dev: mei_device 430 static inline void mei_me_set_pm_domain(struct mei_device dev) mei_me_set_pm_domain() argument 432 struct pci_dev pdev = to_pci_dev(dev->dev); mei_me_set_pm_domain() 434 if (pdev->dev.bus && pdev->dev.bus->pm) { mei_me_set_pm_domain() 435 dev->pg_domain.ops = pdev->dev.bus->pm; mei_me_set_pm_domain() 437 dev->pg_domain.ops.runtime_suspend = mei_me_pm_runtime_suspend; mei_me_set_pm_domain() 438 dev->pg_domain.ops.runtime_resume = mei_me_pm_runtime_resume; mei_me_set_pm_domain() 439 dev->pg_domain.ops.runtime_idle = mei_me_pm_runtime_idle; mei_me_set_pm_domain() 441 pdev->dev.pm_domain = &dev->pg_domain; mei_me_set_pm_domain() 448 @dev: mei_device 450 static inline void mei_me_unset_pm_domain(struct mei_device *dev) mei_me_unset_pm_domain() argument 453 dev->dev->pm_domain = NULL; mei_me_unset_pm_domain()
/linux-4.1.27/drivers/isdn/pcbit/
H A D	layer2.c	53 static void pcbit_transmit(struct pcbit_dev dev); 55 static void pcbit_recv_ack(struct pcbit_dev dev, unsigned char ack); 57 static void pcbit_l2_error(struct pcbit_dev dev); 58 static void pcbit_l2_active_conf(struct pcbit_dev dev, u_char info); 61 static void pcbit_firmware_bug(struct pcbit_dev dev); 64 pcbit_sched_delivery(struct pcbit_dev dev) pcbit_sched_delivery() argument 66 schedule_work(&dev->qdelivery); pcbit_sched_delivery() 75 pcbit_l2_write(struct pcbit_dev dev, ulong msg, ushort refnum, pcbit_l2_write() argument 82 if (dev->l2_state != L2_RUNNING && dev->l2_state != L2_LOADING) { pcbit_l2_write() 105 spin_lock_irqsave(&dev->lock, flags); pcbit_l2_write() 107 if (dev->write_queue == NULL) { pcbit_l2_write() 108 dev->write_queue = frame; pcbit_l2_write() 109 spin_unlock_irqrestore(&dev->lock, flags); pcbit_l2_write() 110 pcbit_transmit(dev); pcbit_l2_write() 112 for (ptr = dev->write_queue; ptr->next; ptr = ptr->next); pcbit_l2_write() 115 spin_unlock_irqrestore(&dev->lock, flags); pcbit_l2_write() 121 pcbit_tx_update(struct pcbit_dev dev, ushort len) pcbit_tx_update() argument 125 dev->send_seq = (dev->send_seq + 1) % 8; pcbit_tx_update() 127 dev->fsize[dev->send_seq] = len; pcbit_tx_update() 129 info \|= dev->rcv_seq << 3; pcbit_tx_update() 130 info \|= dev->send_seq; pcbit_tx_update() 132 writeb(info, dev->sh_mem + BANK4); pcbit_tx_update() 141 pcbit_transmit(struct pcbit_dev dev) pcbit_transmit() argument 152 if (dev->l2_state != L2_RUNNING && dev->l2_state != L2_LOADING) pcbit_transmit() 155 unacked = (dev->send_seq + (8 - dev->unack_seq)) & 0x07; pcbit_transmit() 157 spin_lock_irqsave(&dev->lock, flags); pcbit_transmit() 159 if (dev->free > 16 && dev->write_queue && unacked < 7) { pcbit_transmit() 161 if (!dev->w_busy) pcbit_transmit() 162 dev->w_busy = 1; pcbit_transmit() 164 spin_unlock_irqrestore(&dev->lock, flags); pcbit_transmit() 169 frame = dev->write_queue; pcbit_transmit() 170 free = dev->free; pcbit_transmit() 172 spin_unlock_irqrestore(&dev->lock, flags); pcbit_transmit() 194 pcbit_writew(dev, flen - FRAME_HDR_LEN); pcbit_transmit() 196 pcbit_writeb(dev, GET_MSG_CPU(msg)); pcbit_transmit() 198 pcbit_writeb(dev, GET_MSG_PROC(msg)); pcbit_transmit() 201 pcbit_writew(dev, frame->hdr_len + PREHDR_LEN); pcbit_transmit() 204 pcbit_writew(dev, frame->dt_len); pcbit_transmit() 212 pcbit_writew(dev, frame->hdr_len + PREHDR_LEN); pcbit_transmit() 215 pcbit_writew(dev, 0); pcbit_transmit() 218 pcbit_writeb(dev, GET_MSG_CMD(msg)); pcbit_transmit() 219 pcbit_writeb(dev, GET_MSG_SCMD(msg)); pcbit_transmit() 222 pcbit_writew(dev, frame->refnum); pcbit_transmit() 235 pcbit_writew(dev, tt); pcbit_transmit() 245 memcpy_topcbit(dev, frame->skb->data + frame->copied, pcbit_transmit() 250 dev->free -= flen; pcbit_transmit() 251 pcbit_tx_update(dev, flen); pcbit_transmit() 253 spin_lock_irqsave(&dev->lock, flags); pcbit_transmit() 257 dev->write_queue = frame->next; pcbit_transmit() 265 dev->w_busy = 0; pcbit_transmit() 266 spin_unlock_irqrestore(&dev->lock, flags); pcbit_transmit() 268 spin_unlock_irqrestore(&dev->lock, flags); pcbit_transmit() 271 unacked, dev->free, dev->write_queue ? "not empty" : pcbit_transmit() 287 struct pcbit_dev dev = pcbit_deliver() local 290 spin_lock_irqsave(&dev->lock, flags); pcbit_deliver() 292 while ((frame = dev->read_queue)) { pcbit_deliver() 293 dev->read_queue = frame->next; pcbit_deliver() 294 spin_unlock_irqrestore(&dev->lock, flags); pcbit_deliver() 307 pcbit_l3_receive(dev, frame->msg, frame->skb, frame->hdr_len, pcbit_deliver() 312 spin_lock_irqsave(&dev->lock, flags); pcbit_deliver() 315 spin_unlock_irqrestore(&dev->lock, flags); pcbit_deliver() 323 pcbit_receive(struct pcbit_dev dev) pcbit_receive() argument 332 if (dev->l2_state != L2_RUNNING && dev->l2_state != L2_LOADING) pcbit_receive() 335 tt = pcbit_readw(dev); pcbit_receive() 340 pcbit_l2_error(dev); pcbit_receive() 346 if (dev->read_frame) { pcbit_receive() 349 kfree_skb(dev->read_frame->skb); pcbit_receive() 350 kfree(dev->read_frame); pcbit_receive() 351 dev->read_frame = NULL; pcbit_receive() 360 cpu = pcbit_readb(dev); pcbit_receive() 361 proc = pcbit_readb(dev); pcbit_receive() 367 pcbit_l2_error(dev); pcbit_receive() 375 frame->hdr_len = pcbit_readw(dev); pcbit_receive() 376 frame->dt_len = pcbit_readw(dev); pcbit_receive() 390 pcbit_firmware_bug(dev); pcbit_receive() 401 pcbit_l2_error(dev); pcbit_receive() 424 if (!(frame = dev->read_frame)) { pcbit_receive() 427 dev->readptr += tt; pcbit_receive() 428 if (dev->readptr > dev->sh_mem + BANK2 + BANKLEN) pcbit_receive() 429 dev->readptr -= BANKLEN; pcbit_receive() 435 memcpy_frompcbit(dev, skb_put(frame->skb, tt), tt); pcbit_receive() 438 spin_lock_irqsave(&dev->lock, flags); pcbit_receive() 442 dev->read_frame = NULL; pcbit_receive() 444 if (dev->read_queue) { pcbit_receive() 446 for (ptr = dev->read_queue; ptr->next; ptr = ptr->next); pcbit_receive() 449 dev->read_queue = frame; pcbit_receive() 452 dev->read_frame = frame; pcbit_receive() 454 spin_unlock_irqrestore(&dev->lock, flags); pcbit_receive() 464 pcbit_fake_conf(struct pcbit_dev dev, struct pcbit_chan chan) pcbit_fake_conf() argument 471 ictl.driver = dev->id; pcbit_fake_conf() 474 dev->dev_if->statcallb(&ictl); pcbit_fake_conf() 479 pcbit_firmware_bug(struct pcbit_dev dev) pcbit_firmware_bug() argument 483 chan = dev->b1; pcbit_firmware_bug() 486 pcbit_fake_conf(dev, chan); pcbit_firmware_bug() 488 chan = dev->b2; pcbit_firmware_bug() 491 pcbit_fake_conf(dev, chan); pcbit_firmware_bug() 498 struct pcbit_dev dev; pcbit_irq_handler() local 503 dev = (struct pcbit_dev ) devptr; pcbit_irq_handler() 505 if (!dev) { pcbit_irq_handler() 509 if (dev->interrupt) { pcbit_irq_handler() 513 dev->interrupt = 1; pcbit_irq_handler() 515 info = readb(dev->sh_mem + BANK3); pcbit_irq_handler() 517 if (dev->l2_state == L2_STARTING \|\| dev->l2_state == L2_ERROR) { pcbit_irq_handler() 518 pcbit_l2_active_conf(dev, info); pcbit_irq_handler() 519 dev->interrupt = 0; pcbit_irq_handler() 526 pcbit_l2_error(dev); pcbit_irq_handler() 527 dev->interrupt = 0; pcbit_irq_handler() 530 if (dev->l2_state != L2_RUNNING && dev->l2_state != L2_LOADING) { pcbit_irq_handler() 531 dev->interrupt = 0; pcbit_irq_handler() 537 dev->interrupt = 0; pcbit_irq_handler() 539 if (read_seq != dev->rcv_seq) { pcbit_irq_handler() 540 while (read_seq != dev->rcv_seq) { pcbit_irq_handler() 541 pcbit_receive(dev); pcbit_irq_handler() 542 dev->rcv_seq = (dev->rcv_seq + 1) % 8; pcbit_irq_handler() 544 pcbit_sched_delivery(dev); pcbit_irq_handler() 546 if (ack_seq != dev->unack_seq) { pcbit_irq_handler() 547 pcbit_recv_ack(dev, ack_seq); pcbit_irq_handler() 549 info = dev->rcv_seq << 3; pcbit_irq_handler() 550 info \|= dev->send_seq; pcbit_irq_handler() 552 writeb(info, dev->sh_mem + BANK4); pcbit_irq_handler() 558 pcbit_l2_active_conf(struct pcbit_dev dev, u_char info) pcbit_l2_active_conf() argument 562 state = dev->l2_state; pcbit_l2_active_conf() 570 dev->rcv_seq = info & 0x07U; pcbit_l2_active_conf() 571 dev->l2_state = L2_RUNNING; pcbit_l2_active_conf() 573 dev->l2_state = L2_DOWN; pcbit_l2_active_conf() 576 wake_up_interruptible(&dev->set_running_wq); pcbit_l2_active_conf() 578 if (state == L2_ERROR && dev->l2_state == L2_RUNNING) { pcbit_l2_active_conf() 579 pcbit_transmit(dev); pcbit_l2_active_conf() 587 struct pcbit_dev dev; pcbit_l2_err_recover() local 590 dev = (struct pcbit_dev ) data; pcbit_l2_err_recover() 592 del_timer(&dev->error_recover_timer); pcbit_l2_err_recover() 593 if (dev->w_busy \|\| dev->r_busy) { pcbit_l2_err_recover() 594 init_timer(&dev->error_recover_timer); pcbit_l2_err_recover() 595 dev->error_recover_timer.expires = jiffies + ERRTIME; pcbit_l2_err_recover() 596 add_timer(&dev->error_recover_timer); pcbit_l2_err_recover() 599 dev->w_busy = dev->r_busy = 1; pcbit_l2_err_recover() 601 if (dev->read_frame) { pcbit_l2_err_recover() 602 kfree_skb(dev->read_frame->skb); pcbit_l2_err_recover() 603 kfree(dev->read_frame); pcbit_l2_err_recover() 604 dev->read_frame = NULL; pcbit_l2_err_recover() 606 if (dev->write_queue) { pcbit_l2_err_recover() 607 frame = dev->write_queue; pcbit_l2_err_recover() 609 dev->write_queue = dev->write_queue->next; pcbit_l2_err_recover() 619 dev->rcv_seq = dev->send_seq = dev->unack_seq = 0; pcbit_l2_err_recover() 620 dev->free = 511; pcbit_l2_err_recover() 621 dev->l2_state = L2_ERROR; pcbit_l2_err_recover() 624 pcbit_firmware_bug(dev); pcbit_l2_err_recover() 626 dev->writeptr = dev->sh_mem; pcbit_l2_err_recover() 627 dev->readptr = dev->sh_mem + BANK2; pcbit_l2_err_recover() 629 writeb((0x80U \| ((dev->rcv_seq & 0x07) << 3) \| (dev->send_seq & 0x07)), pcbit_l2_err_recover() 630 dev->sh_mem + BANK4); pcbit_l2_err_recover() 631 dev->w_busy = dev->r_busy = 0; pcbit_l2_err_recover() 636 pcbit_l2_error(struct pcbit_dev dev) pcbit_l2_error() argument 638 if (dev->l2_state == L2_RUNNING) { pcbit_l2_error() 643 log_state(dev); pcbit_l2_error() 646 dev->l2_state = L2_DOWN; pcbit_l2_error() 648 init_timer(&dev->error_recover_timer); pcbit_l2_error() 649 dev->error_recover_timer.function = &pcbit_l2_err_recover; pcbit_l2_error() 650 dev->error_recover_timer.data = (ulong) dev; pcbit_l2_error() 651 dev->error_recover_timer.expires = jiffies + ERRTIME; pcbit_l2_error() 652 add_timer(&dev->error_recover_timer); pcbit_l2_error() 659 * update dev->free 664 pcbit_recv_ack(struct pcbit_dev dev, unsigned char ack) pcbit_recv_ack() argument 670 unacked = (dev->send_seq + (8 - dev->unack_seq)) & 0x07; pcbit_recv_ack() 672 / dev->unack_seq < ack <= dev->send_seq; */ pcbit_recv_ack() 676 if (dev->send_seq > dev->unack_seq) { pcbit_recv_ack() 677 if (ack <= dev->unack_seq \|\| ack > dev->send_seq) { pcbit_recv_ack() 679 "layer 2 ack unacceptable - dev %d", pcbit_recv_ack() 680 dev->id); pcbit_recv_ack() 682 pcbit_l2_error(dev); pcbit_recv_ack() 683 } else if (ack > dev->send_seq && ack <= dev->unack_seq) { pcbit_recv_ack() 685 "layer 2 ack unacceptable - dev %d", pcbit_recv_ack() 686 dev->id); pcbit_recv_ack() 687 pcbit_l2_error(dev); pcbit_recv_ack() 693 i = dev->unack_seq; pcbit_recv_ack() 696 dev->unack_seq = i = (i + 1) % 8; pcbit_recv_ack() 697 dev->free += dev->fsize[i]; pcbit_recv_ack() 701 while (count < 7 && dev->write_queue) { pcbit_recv_ack() 702 u8 lsend_seq = dev->send_seq; pcbit_recv_ack() 704 pcbit_transmit(dev); pcbit_recv_ack() 706 if (dev->send_seq == lsend_seq) pcbit_recv_ack()
H A D	drv.c	64 static int set_protocol_running(struct pcbit_dev dev); 66 static void pcbit_clear_msn(struct pcbit_dev dev); 67 static void pcbit_set_msn(struct pcbit_dev dev, char list); 68 static int pcbit_check_msn(struct pcbit_dev dev, char msn); 73 struct pcbit_dev dev; pcbit_init_dev() local 76 if ((dev = kzalloc(sizeof(struct pcbit_dev), GFP_KERNEL)) == NULL) pcbit_init_dev() 82 dev_pcbit[board] = dev; pcbit_init_dev() 83 init_waitqueue_head(&dev->set_running_wq); pcbit_init_dev() 84 spin_lock_init(&dev->lock); pcbit_init_dev() 87 dev->ph_mem = mem_base; pcbit_init_dev() 88 if (!request_mem_region(dev->ph_mem, 4096, "PCBIT mem")) { pcbit_init_dev() 91 dev->ph_mem, dev->ph_mem + 4096); pcbit_init_dev() 92 kfree(dev); pcbit_init_dev() 96 dev->sh_mem = ioremap(dev->ph_mem, 4096); pcbit_init_dev() 101 kfree(dev); pcbit_init_dev() 106 dev->b1 = kzalloc(sizeof(struct pcbit_chan), GFP_KERNEL); pcbit_init_dev() 107 if (!dev->b1) { pcbit_init_dev() 109 iounmap(dev->sh_mem); pcbit_init_dev() 110 release_mem_region(dev->ph_mem, 4096); pcbit_init_dev() 111 kfree(dev); pcbit_init_dev() 115 dev->b2 = kzalloc(sizeof(struct pcbit_chan), GFP_KERNEL); pcbit_init_dev() 116 if (!dev->b2) { pcbit_init_dev() 118 kfree(dev->b1); pcbit_init_dev() 119 iounmap(dev->sh_mem); pcbit_init_dev() 120 release_mem_region(dev->ph_mem, 4096); pcbit_init_dev() 121 kfree(dev); pcbit_init_dev() 125 dev->b2->id = 1; pcbit_init_dev() 127 INIT_WORK(&dev->qdelivery, pcbit_deliver); pcbit_init_dev() 133 if (request_irq(irq, &pcbit_irq_handler, 0, pcbit_devname[board], dev) != 0) pcbit_init_dev() 135 kfree(dev->b1); pcbit_init_dev() 136 kfree(dev->b2); pcbit_init_dev() 137 iounmap(dev->sh_mem); pcbit_init_dev() 138 release_mem_region(dev->ph_mem, 4096); pcbit_init_dev() 139 kfree(dev); pcbit_init_dev() 144 dev->irq = irq; pcbit_init_dev() 147 dev->rcv_seq = 0; pcbit_init_dev() 148 dev->send_seq = 0; pcbit_init_dev() 149 dev->unack_seq = 0; pcbit_init_dev() 151 dev->hl_hdrlen = 16; pcbit_init_dev() 156 free_irq(irq, dev); pcbit_init_dev() 157 kfree(dev->b1); pcbit_init_dev() 158 kfree(dev->b2); pcbit_init_dev() 159 iounmap(dev->sh_mem); pcbit_init_dev() 160 release_mem_region(dev->ph_mem, 4096); pcbit_init_dev() 161 kfree(dev); pcbit_init_dev() 166 dev->dev_if = dev_if; pcbit_init_dev() 188 free_irq(irq, dev); pcbit_init_dev() 189 kfree(dev->b1); pcbit_init_dev() 190 kfree(dev->b2); pcbit_init_dev() 191 iounmap(dev->sh_mem); pcbit_init_dev() 192 release_mem_region(dev->ph_mem, 4096); pcbit_init_dev() 193 kfree(dev); pcbit_init_dev() 198 dev->id = dev_if->channels; pcbit_init_dev() 201 dev->l2_state = L2_DOWN; pcbit_init_dev() 202 dev->free = 511; pcbit_init_dev() 205 set_protocol_running(dev); pcbit_init_dev() 214 struct pcbit_dev dev; pcbit_terminate() local 216 dev = dev_pcbit[board]; pcbit_terminate() 218 if (dev) { pcbit_terminate() 219 / unregister_isdn(dev->dev_if); / pcbit_terminate() 220 free_irq(dev->irq, dev); pcbit_terminate() 221 pcbit_clear_msn(dev); pcbit_terminate() 222 kfree(dev->dev_if); pcbit_terminate() 223 if (dev->b1->fsm_timer.function) pcbit_terminate() 224 del_timer(&dev->b1->fsm_timer); pcbit_terminate() 225 if (dev->b2->fsm_timer.function) pcbit_terminate() 226 del_timer(&dev->b2->fsm_timer); pcbit_terminate() 227 kfree(dev->b1); pcbit_terminate() 228 kfree(dev->b2); pcbit_terminate() 229 iounmap(dev->sh_mem); pcbit_terminate() 230 release_mem_region(dev->ph_mem, 4096); pcbit_terminate() 231 kfree(dev); pcbit_terminate() 238 struct pcbit_dev dev; pcbit_command() local 242 dev = finddev(ctl->driver); pcbit_command() 244 if (!dev) pcbit_command() 250 chan = (ctl->arg & 0x0F) ? dev->b2 : dev->b1; pcbit_command() 260 pcbit_fsm_event(dev, chan, EV_USR_SETUP_REQ, &info); pcbit_command() 263 pcbit_fsm_event(dev, chan, EV_USR_SETUP_RESP, NULL); pcbit_command() 269 pcbit_fsm_event(dev, chan, EV_USR_RELEASE_REQ, NULL); pcbit_command() 275 pcbit_clear_msn(dev); pcbit_command() 278 pcbit_set_msn(dev, ctl->parm.num); pcbit_command() 302 struct pcbit_dev dev; pcbit_block_timer() local 307 dev = chan2dev(chan); pcbit_block_timer() 309 if (dev == NULL) { pcbit_block_timer() 321 ictl.driver = dev->id; pcbit_block_timer() 324 dev->dev_if->statcallb(&ictl); pcbit_block_timer() 333 struct pcbit_dev dev; pcbit_xmit() local 335 dev = finddev(driver); pcbit_xmit() 336 if (dev == NULL) pcbit_xmit() 342 chan = chnum ? dev->b2 : dev->b1; pcbit_xmit() 358 * see net/core/dev.c pcbit_xmit() 382 pcbit_l2_write(dev, MSG_TDATA_REQ, refnum, skb, hdrlen); pcbit_xmit() 389 struct pcbit_dev dev; pcbit_writecmd() local 397 dev = finddev(driver); pcbit_writecmd() 399 if (!dev) pcbit_writecmd() 405 switch (dev->l2_state) { pcbit_writecmd() 418 memcpy_toio(dev->sh_mem, cbuf, len); pcbit_writecmd() 438 if (!(readb(dev->sh_mem + dev->loadptr))) pcbit_writecmd() 447 writeb(loadbuf[i], dev->sh_mem + dev->loadptr + 1); pcbit_writecmd() 448 writeb(0x01, dev->sh_mem + dev->loadptr); pcbit_writecmd() 450 dev->loadptr += 2; pcbit_writecmd() 451 if (dev->loadptr > LOAD_ZONE_END) pcbit_writecmd() 452 dev->loadptr = LOAD_ZONE_START; pcbit_writecmd() 467 void pcbit_l3_receive(struct pcbit_dev dev, ulong msg, pcbit_l3_receive() argument 481 if (!(chan = capi_channel(dev, skb))) { pcbit_l3_receive() 489 dev->dev_if->rcvcallb_skb(dev->id, chan->id, skb); pcbit_l3_receive() 492 pcbit_l2_write(dev, MSG_TDATA_RESP, refnum, pcbit_l3_receive() 497 if (!(chan = capi_channel(dev, skb))) { pcbit_l3_receive() 517 ictl.driver = dev->id; pcbit_l3_receive() 520 dev->dev_if->statcallb(&ictl); pcbit_l3_receive() 529 if (!dev->b1->fsm_state) pcbit_l3_receive() 530 chan = dev->b1; pcbit_l3_receive() 531 else if (!dev->b2->fsm_state) pcbit_l3_receive() 532 chan = dev->b2; pcbit_l3_receive() 538 pcbit_l2_write(dev, MSG_DISC_REQ, refnum, skb2, len); pcbit_l3_receive() 548 pcbit_fsm_event(dev, chan, EV_NET_SETUP, NULL); pcbit_l3_receive() 550 if (pcbit_check_msn(dev, cbdata.data.setup.CallingPN)) pcbit_l3_receive() 551 pcbit_fsm_event(dev, chan, EV_USR_PROCED_REQ, &cbdata); pcbit_l3_receive() 553 pcbit_fsm_event(dev, chan, EV_USR_RELEASE_REQ, NULL); pcbit_l3_receive() 567 dev->b1->s_refnum, pcbit_l3_receive() 568 dev->b2->s_refnum); pcbit_l3_receive() 572 if (dev->b1->fsm_state == ST_CALL_INIT) pcbit_l3_receive() 573 chan = dev->b1; pcbit_l3_receive() 575 if (dev->b2->s_refnum == ST_CALL_INIT) pcbit_l3_receive() 576 chan = dev->b2; pcbit_l3_receive() 585 pcbit_fsm_event(dev, chan, EV_ERROR, NULL); pcbit_l3_receive() 589 pcbit_fsm_event(dev, chan, EV_NET_CALL_PROC, NULL); pcbit_l3_receive() 591 pcbit_fsm_event(dev, chan, EV_NET_SETUP_ACK, NULL); pcbit_l3_receive() 595 if (!(chan = capi_channel(dev, skb))) { pcbit_l3_receive() 603 /* pcbit_fsm_event(dev, chan, EV_ERROR, NULL); / pcbit_l3_receive() 607 pcbit_fsm_event(dev, chan, EV_NET_CONN, NULL); pcbit_l3_receive() 611 if (!(chan = capi_channel(dev, skb))) { pcbit_l3_receive() 618 pcbit_fsm_event(dev, chan, EV_NET_CONN_ACK, NULL); pcbit_l3_receive() 626 if (!(chan = capi_channel(dev, skb))) { pcbit_l3_receive() 633 pcbit_fsm_event(dev, chan, EV_NET_SELP_RESP, NULL); pcbit_l3_receive() 640 if (!(chan = capi_channel(dev, skb))) { pcbit_l3_receive() 647 pcbit_fsm_event(dev, chan, EV_NET_ACTV_RESP, NULL); pcbit_l3_receive() 652 if (!(chan = capi_channel(dev, skb))) { pcbit_l3_receive() 659 pcbit_fsm_event(dev, chan, EV_NET_DISC, NULL); pcbit_l3_receive() 664 if (!(chan = capi_channel(dev, skb))) { pcbit_l3_receive() 671 pcbit_fsm_event(dev, chan, EV_NET_RELEASE, NULL); pcbit_l3_receive() 754 static void pcbit_logstat(struct pcbit_dev dev, char str) pcbit_logstat() argument 768 ictl.driver = dev->id; pcbit_logstat() 770 dev->dev_if->statcallb(&ictl); pcbit_logstat() 773 void pcbit_state_change(struct pcbit_dev dev, struct pcbit_chan chan, pcbit_state_change() argument 779 dev->id, chan->id, pcbit_state_change() 787 pcbit_logstat(dev, buf); pcbit_state_change() 792 struct pcbit_dev dev; set_running_timeout() local 797 dev = (struct pcbit_dev ) ptr; set_running_timeout() 799 dev->l2_state = L2_DOWN; set_running_timeout() 800 wake_up_interruptible(&dev->set_running_wq); set_running_timeout() 803 static int set_protocol_running(struct pcbit_dev dev) set_protocol_running() argument 807 init_timer(&dev->set_running_timer); set_protocol_running() 809 dev->set_running_timer.function = &set_running_timeout; set_protocol_running() 810 dev->set_running_timer.data = (ulong) dev; set_protocol_running() 811 dev->set_running_timer.expires = jiffies + SET_RUN_TIMEOUT; set_protocol_running() 815 dev->l2_state = L2_STARTING; set_protocol_running() 817 writeb((0x80U \| ((dev->rcv_seq & 0x07) << 3) \| (dev->send_seq & 0x07)), set_protocol_running() 818 dev->sh_mem + BANK4); set_protocol_running() 820 add_timer(&dev->set_running_timer); set_protocol_running() 822 wait_event(dev->set_running_wq, dev->l2_state == L2_RUNNING \|\| set_protocol_running() 823 dev->l2_state == L2_DOWN); set_protocol_running() 825 del_timer(&dev->set_running_timer); set_protocol_running() 827 if (dev->l2_state == L2_RUNNING) set_protocol_running() 831 dev->unack_seq = dev->send_seq; set_protocol_running() 833 dev->writeptr = dev->sh_mem; set_protocol_running() 834 dev->readptr = dev->sh_mem + BANK2; set_protocol_running() 837 ctl.driver = dev->id; set_protocol_running() 840 dev->dev_if->statcallb(&ctl); set_protocol_running() 849 readb(dev->sh_mem + BANK3)); set_protocol_running() 851 writeb(0x40, dev->sh_mem + BANK4); set_protocol_running() 854 ctl.driver = dev->id; set_protocol_running() 857 dev->dev_if->statcallb(&ctl); set_protocol_running() 867 struct pcbit_dev dev; pcbit_ioctl() local 870 dev = finddev(ctl->driver); pcbit_ioctl() 872 if (!dev) pcbit_ioctl() 882 cmd->info.l2_status = dev->l2_state; pcbit_ioctl() 886 if (dev->l2_state == L2_RUNNING) pcbit_ioctl() 889 dev->unack_seq = dev->send_seq = dev->rcv_seq = 0; pcbit_ioctl() 891 dev->writeptr = dev->sh_mem; pcbit_ioctl() 892 dev->readptr = dev->sh_mem + BANK2; pcbit_ioctl() 894 dev->l2_state = L2_LOADING; pcbit_ioctl() 898 if (dev->l2_state != L2_LOADING) pcbit_ioctl() 901 dev->l2_state = L2_LWMODE; pcbit_ioctl() 905 if (dev->l2_state == L2_RUNNING) pcbit_ioctl() 907 dev->loadptr = LOAD_ZONE_START; pcbit_ioctl() 908 dev->l2_state = L2_FWMODE; pcbit_ioctl() 912 if (dev->l2_state == L2_RUNNING) pcbit_ioctl() 914 dev->l2_state = L2_DOWN; pcbit_ioctl() 918 if (dev->l2_state == L2_RUNNING) pcbit_ioctl() 925 writeb(cmd->info.rdp_byte.value, dev->sh_mem + cmd->info.rdp_byte.addr); pcbit_ioctl() 928 if (dev->l2_state == L2_RUNNING) pcbit_ioctl() 939 cmd->info.rdp_byte.value = readb(dev->sh_mem + cmd->info.rdp_byte.addr); pcbit_ioctl() 942 if (dev->l2_state == L2_RUNNING) pcbit_ioctl() 944 return set_protocol_running(dev); pcbit_ioctl() 947 if (dev->l2_state != L2_LOADING) pcbit_ioctl() 949 pcbit_l2_write(dev, MSG_WATCH188, 0x0001, NULL, 0); pcbit_ioctl() 952 if (dev->l2_state != L2_LOADING) pcbit_ioctl() 954 pcbit_l2_write(dev, MSG_PING188_REQ, 0x0001, NULL, 0); pcbit_ioctl() 957 if (dev->l2_state != L2_LOADING) pcbit_ioctl() 959 pcbit_l2_write(dev, MSG_API_ON, 0x0001, NULL, 0); pcbit_ioctl() 962 dev->l2_state = L2_DOWN; pcbit_ioctl() 963 writeb(0x40, dev->sh_mem + BANK4); pcbit_ioctl() 964 dev->rcv_seq = 0; pcbit_ioctl() 965 dev->send_seq = 0; pcbit_ioctl() 966 dev->unack_seq = 0; pcbit_ioctl() 982 static void pcbit_clear_msn(struct pcbit_dev dev) pcbit_clear_msn() argument 986 for (ptr = dev->msn_list; ptr;) pcbit_clear_msn() 993 dev->msn_list = NULL; pcbit_clear_msn() 996 static void pcbit_set_msn(struct pcbit_dev dev, char list) pcbit_set_msn() argument 1012 ptr->next = dev->msn_list; pcbit_set_msn() 1013 dev->msn_list = ptr; pcbit_set_msn() 1018 if (dev->msn_list) pcbit_set_msn() 1019 for (back = dev->msn_list; back->next; back = back->next); pcbit_set_msn() 1051 if (dev->msn_list == NULL) pcbit_set_msn() 1052 dev->msn_list = ptr; pcbit_set_msn() 1063 static int pcbit_check_msn(struct pcbit_dev dev, char msn) pcbit_check_msn() argument 1067 for (ptr = dev->msn_list; ptr; ptr = ptr->next) { pcbit_check_msn()
H A D	layer2.h	124 extern int pcbit_l2_write(struct pcbit_dev dev, ulong msg, ushort refnum, 132 static __inline__ void log_state(struct pcbit_dev dev) { log_state() argument 134 (ulong) (dev->writeptr - dev->sh_mem)); log_state() 136 (ulong) (dev->readptr - (dev->sh_mem + BANK2))); log_state() 138 dev->rcv_seq, dev->send_seq, dev->unack_seq); log_state() 144 struct pcbit_dev dev; chan2dev() local 149 if ((dev = dev_pcbit[i])) chan2dev() 150 if (dev->b1 == chan \|\| dev->b2 == chan) chan2dev() 151 return dev; chan2dev() 158 struct pcbit_dev dev; finddev() local 162 if ((dev = dev_pcbit[i])) finddev() 163 if (dev->id == id) finddev() 164 return dev; finddev() 173 static __inline__ void pcbit_writeb(struct pcbit_dev dev, unsigned char dt) pcbit_writeb() argument 175 writeb(dt, dev->writeptr++); pcbit_writeb() 176 if (dev->writeptr == dev->sh_mem + BANKLEN) pcbit_writeb() 177 dev->writeptr = dev->sh_mem; pcbit_writeb() 180 static __inline__ void pcbit_writew(struct pcbit_dev dev, unsigned short dt) pcbit_writew() argument 184 dist = BANKLEN - (dev->writeptr - dev->sh_mem); pcbit_writew() 187 writew(dt, dev->writeptr); pcbit_writew() 188 dev->writeptr = dev->sh_mem; pcbit_writew() 191 writeb((u_char) (dt & 0x00ffU), dev->writeptr); pcbit_writew() 192 dev->writeptr = dev->sh_mem; pcbit_writew() 193 writeb((u_char) (dt >> 8), dev->writeptr++); pcbit_writew() 196 writew(dt, dev->writeptr); pcbit_writew() 197 dev->writeptr += 2; pcbit_writew() 202 static __inline__ void memcpy_topcbit(struct pcbit_dev dev, u_char data, memcpy_topcbit() argument 207 diff = len - (BANKLEN - (dev->writeptr - dev->sh_mem)); memcpy_topcbit() 211 memcpy_toio(dev->writeptr, data, len - diff); memcpy_topcbit() 212 memcpy_toio(dev->sh_mem, data + (len - diff), diff); memcpy_topcbit() 213 dev->writeptr = dev->sh_mem + diff; memcpy_topcbit() 217 memcpy_toio(dev->writeptr, data, len); memcpy_topcbit() 219 dev->writeptr += len; memcpy_topcbit() 221 dev->writeptr = dev->sh_mem; memcpy_topcbit() 225 static __inline__ unsigned char pcbit_readb(struct pcbit_dev dev) pcbit_readb() argument 229 val = readb(dev->readptr++); pcbit_readb() 230 if (dev->readptr == dev->sh_mem + BANK2 + BANKLEN) pcbit_readb() 231 dev->readptr = dev->sh_mem + BANK2; pcbit_readb() 236 static __inline__ unsigned short pcbit_readw(struct pcbit_dev dev) pcbit_readw() argument 241 dist = BANKLEN - (dev->readptr - (dev->sh_mem + BANK2)); pcbit_readw() 244 val = readw(dev->readptr); pcbit_readw() 245 dev->readptr = dev->sh_mem + BANK2; pcbit_readw() 248 val = readb(dev->readptr); pcbit_readw() 249 dev->readptr = dev->sh_mem + BANK2; pcbit_readw() 250 val = (readb(dev->readptr++) << 8) \| val; pcbit_readw() 253 val = readw(dev->readptr); pcbit_readw() 254 dev->readptr += 2; pcbit_readw() 260 static __inline__ void memcpy_frompcbit(struct pcbit_dev dev, u_char data, int len) memcpy_frompcbit() argument 264 diff = len - (BANKLEN - (dev->readptr - (dev->sh_mem + BANK2))); memcpy_frompcbit() 267 memcpy_fromio(data, dev->readptr, len - diff); memcpy_frompcbit() 268 memcpy_fromio(data + (len - diff), dev->sh_mem + BANK2 , diff); memcpy_frompcbit() 269 dev->readptr = dev->sh_mem + BANK2 + diff; memcpy_frompcbit() 273 memcpy_fromio(data, dev->readptr, len); memcpy_frompcbit() 274 dev->readptr += len; memcpy_frompcbit() 276 dev->readptr = dev->sh_mem + BANK2; memcpy_frompcbit()
/linux-4.1.27/drivers/media/dvb-frontends/
H A D	rtl2832_sdr.c	160 static int rtl2832_sdr_wr_regs(struct rtl2832_sdr_dev dev, u16 reg, rtl2832_sdr_wr_regs() argument 163 struct platform_device pdev = dev->pdev; rtl2832_sdr_wr_regs() 164 struct rtl2832_sdr_platform_data pdata = pdev->dev.platform_data; rtl2832_sdr_wr_regs() 172 static int rtl2832_sdr_rd_regs(struct rtl2832_sdr_dev dev, u16 reg, u8 val, 175 struct platform_device pdev = dev->pdev; 176 struct rtl2832_sdr_platform_data pdata = pdev->dev.platform_data; 184 static int rtl2832_sdr_wr_reg(struct rtl2832_sdr_dev dev, u16 reg, u8 val) rtl2832_sdr_wr_reg() argument 186 return rtl2832_sdr_wr_regs(dev, reg, &val, 1); rtl2832_sdr_wr_reg() 190 static int rtl2832_sdr_wr_reg_mask(struct rtl2832_sdr_dev dev, u16 reg, rtl2832_sdr_wr_reg_mask() argument 193 struct platform_device pdev = dev->pdev; rtl2832_sdr_wr_reg_mask() 194 struct rtl2832_sdr_platform_data pdata = pdev->dev.platform_data; rtl2832_sdr_wr_reg_mask() 202 struct rtl2832_sdr_dev dev) rtl2832_sdr_get_next_fill_buf() 207 spin_lock_irqsave(&dev->queued_bufs_lock, flags); rtl2832_sdr_get_next_fill_buf() 208 if (list_empty(&dev->queued_bufs)) rtl2832_sdr_get_next_fill_buf() 211 buf = list_entry(dev->queued_bufs.next, rtl2832_sdr_get_next_fill_buf() 215 spin_unlock_irqrestore(&dev->queued_bufs_lock, flags); rtl2832_sdr_get_next_fill_buf() 219 static unsigned int rtl2832_sdr_convert_stream(struct rtl2832_sdr_dev dev, rtl2832_sdr_convert_stream() argument 222 struct platform_device pdev = dev->pdev; rtl2832_sdr_convert_stream() 225 if (dev->pixelformat == V4L2_SDR_FMT_CU8) { rtl2832_sdr_convert_stream() 229 } else if (dev->pixelformat == V4L2_SDR_FMT_CU16LE) { rtl2832_sdr_convert_stream() 242 if (unlikely(time_is_before_jiffies(dev->jiffies_next))) { rtl2832_sdr_convert_stream() 245 dev->jiffies_next + msecs_to_jiffies(MSECS)); rtl2832_sdr_convert_stream() 246 unsigned int samples = dev->sample - dev->sample_measured; rtl2832_sdr_convert_stream() 248 dev->jiffies_next = jiffies + msecs_to_jiffies(MSECS); rtl2832_sdr_convert_stream() 249 dev->sample_measured = dev->sample; rtl2832_sdr_convert_stream() 250 dev_dbg(&pdev->dev, rtl2832_sdr_convert_stream() 256 dev->sample += src_len / 2; rtl2832_sdr_convert_stream() 267 struct rtl2832_sdr_dev dev = urb->context; rtl2832_sdr_urb_complete() local 268 struct platform_device pdev = dev->pdev; rtl2832_sdr_urb_complete() 271 dev_dbg_ratelimited(&pdev->dev, "status=%d length=%d/%d errors=%d\n", rtl2832_sdr_urb_complete() 284 dev_err_ratelimited(&pdev->dev, "urb failed=%d\n", urb->status); rtl2832_sdr_urb_complete() 292 fbuf = rtl2832_sdr_get_next_fill_buf(dev); rtl2832_sdr_urb_complete() 294 dev->vb_full++; rtl2832_sdr_urb_complete() 295 dev_notice_ratelimited(&pdev->dev, rtl2832_sdr_urb_complete() 297 dev->vb_full); rtl2832_sdr_urb_complete() 303 len = rtl2832_sdr_convert_stream(dev, ptr, urb->transfer_buffer, rtl2832_sdr_urb_complete() 307 fbuf->vb.v4l2_buf.sequence = dev->sequence++; rtl2832_sdr_urb_complete() 314 static int rtl2832_sdr_kill_urbs(struct rtl2832_sdr_dev dev) rtl2832_sdr_kill_urbs() argument 316 struct platform_device pdev = dev->pdev; rtl2832_sdr_kill_urbs() 319 for (i = dev->urbs_submitted - 1; i >= 0; i--) { rtl2832_sdr_kill_urbs() 320 dev_dbg(&pdev->dev, "kill urb=%d\n", i); rtl2832_sdr_kill_urbs() 322 usb_kill_urb(dev->urb_list[i]); rtl2832_sdr_kill_urbs() 324 dev->urbs_submitted = 0; rtl2832_sdr_kill_urbs() 329 static int rtl2832_sdr_submit_urbs(struct rtl2832_sdr_dev dev) rtl2832_sdr_submit_urbs() argument 331 struct platform_device pdev = dev->pdev; rtl2832_sdr_submit_urbs() 334 for (i = 0; i < dev->urbs_initialized; i++) { rtl2832_sdr_submit_urbs() 335 dev_dbg(&pdev->dev, "submit urb=%d\n", i); rtl2832_sdr_submit_urbs() 336 ret = usb_submit_urb(dev->urb_list[i], GFP_ATOMIC); rtl2832_sdr_submit_urbs() 338 dev_err(&pdev->dev, rtl2832_sdr_submit_urbs() 341 rtl2832_sdr_kill_urbs(dev); rtl2832_sdr_submit_urbs() 344 dev->urbs_submitted++; rtl2832_sdr_submit_urbs() 350 static int rtl2832_sdr_free_stream_bufs(struct rtl2832_sdr_dev dev) rtl2832_sdr_free_stream_bufs() argument 352 struct platform_device pdev = dev->pdev; rtl2832_sdr_free_stream_bufs() 354 if (dev->flags & USB_STATE_URB_BUF) { rtl2832_sdr_free_stream_bufs() 355 while (dev->buf_num) { rtl2832_sdr_free_stream_bufs() 356 dev->buf_num--; rtl2832_sdr_free_stream_bufs() 357 dev_dbg(&pdev->dev, "free buf=%d\n", dev->buf_num); rtl2832_sdr_free_stream_bufs() 358 usb_free_coherent(dev->udev, dev->buf_size, rtl2832_sdr_free_stream_bufs() 359 dev->buf_list[dev->buf_num], rtl2832_sdr_free_stream_bufs() 360 dev->dma_addr[dev->buf_num]); rtl2832_sdr_free_stream_bufs() 363 dev->flags &= ~USB_STATE_URB_BUF; rtl2832_sdr_free_stream_bufs() 368 static int rtl2832_sdr_alloc_stream_bufs(struct rtl2832_sdr_dev dev) rtl2832_sdr_alloc_stream_bufs() argument 370 struct platform_device pdev = dev->pdev; rtl2832_sdr_alloc_stream_bufs() 372 dev->buf_num = 0; rtl2832_sdr_alloc_stream_bufs() 373 dev->buf_size = BULK_BUFFER_SIZE; rtl2832_sdr_alloc_stream_bufs() 375 dev_dbg(&pdev->dev, "all in all I will use %u bytes for streaming\n", rtl2832_sdr_alloc_stream_bufs() 378 for (dev->buf_num = 0; dev->buf_num < MAX_BULK_BUFS; dev->buf_num++) { rtl2832_sdr_alloc_stream_bufs() 379 dev->buf_list[dev->buf_num] = usb_alloc_coherent(dev->udev, rtl2832_sdr_alloc_stream_bufs() 381 &dev->dma_addr[dev->buf_num]); rtl2832_sdr_alloc_stream_bufs() 382 if (!dev->buf_list[dev->buf_num]) { rtl2832_sdr_alloc_stream_bufs() 383 dev_dbg(&pdev->dev, "alloc buf=%d failed\n", rtl2832_sdr_alloc_stream_bufs() 384 dev->buf_num); rtl2832_sdr_alloc_stream_bufs() 385 rtl2832_sdr_free_stream_bufs(dev); rtl2832_sdr_alloc_stream_bufs() 389 dev_dbg(&pdev->dev, "alloc buf=%d %p (dma %llu)\n", rtl2832_sdr_alloc_stream_bufs() 390 dev->buf_num, dev->buf_list[dev->buf_num], rtl2832_sdr_alloc_stream_bufs() 391 (long long)dev->dma_addr[dev->buf_num]); rtl2832_sdr_alloc_stream_bufs() 392 dev->flags \|= USB_STATE_URB_BUF; rtl2832_sdr_alloc_stream_bufs() 398 static int rtl2832_sdr_free_urbs(struct rtl2832_sdr_dev dev) rtl2832_sdr_free_urbs() argument 400 struct platform_device pdev = dev->pdev; rtl2832_sdr_free_urbs() 403 rtl2832_sdr_kill_urbs(dev); rtl2832_sdr_free_urbs() 405 for (i = dev->urbs_initialized - 1; i >= 0; i--) { rtl2832_sdr_free_urbs() 406 if (dev->urb_list[i]) { rtl2832_sdr_free_urbs() 407 dev_dbg(&pdev->dev, "free urb=%d\n", i); rtl2832_sdr_free_urbs() 409 usb_free_urb(dev->urb_list[i]); rtl2832_sdr_free_urbs() 412 dev->urbs_initialized = 0; rtl2832_sdr_free_urbs() 417 static int rtl2832_sdr_alloc_urbs(struct rtl2832_sdr_dev dev) rtl2832_sdr_alloc_urbs() argument 419 struct platform_device pdev = dev->pdev; rtl2832_sdr_alloc_urbs() 424 dev_dbg(&pdev->dev, "alloc urb=%d\n", i); rtl2832_sdr_alloc_urbs() 425 dev->urb_list[i] = usb_alloc_urb(0, GFP_ATOMIC); rtl2832_sdr_alloc_urbs() 426 if (!dev->urb_list[i]) { rtl2832_sdr_alloc_urbs() 427 dev_dbg(&pdev->dev, "failed\n"); rtl2832_sdr_alloc_urbs() 429 usb_free_urb(dev->urb_list[j]); rtl2832_sdr_alloc_urbs() 432 usb_fill_bulk_urb(dev->urb_list[i], rtl2832_sdr_alloc_urbs() 433 dev->udev, rtl2832_sdr_alloc_urbs() 434 usb_rcvbulkpipe(dev->udev, 0x81), rtl2832_sdr_alloc_urbs() 435 dev->buf_list[i], rtl2832_sdr_alloc_urbs() 437 rtl2832_sdr_urb_complete, dev); rtl2832_sdr_alloc_urbs() 439 dev->urb_list[i]->transfer_flags = URB_NO_TRANSFER_DMA_MAP; rtl2832_sdr_alloc_urbs() 440 dev->urb_list[i]->transfer_dma = dev->dma_addr[i]; rtl2832_sdr_alloc_urbs() 441 dev->urbs_initialized++; rtl2832_sdr_alloc_urbs() 448 static void rtl2832_sdr_cleanup_queued_bufs(struct rtl2832_sdr_dev dev) rtl2832_sdr_cleanup_queued_bufs() argument 450 struct platform_device pdev = dev->pdev; rtl2832_sdr_cleanup_queued_bufs() 453 dev_dbg(&pdev->dev, "\n"); rtl2832_sdr_cleanup_queued_bufs() 455 spin_lock_irqsave(&dev->queued_bufs_lock, flags); rtl2832_sdr_cleanup_queued_bufs() 456 while (!list_empty(&dev->queued_bufs)) { rtl2832_sdr_cleanup_queued_bufs() 459 buf = list_entry(dev->queued_bufs.next, rtl2832_sdr_cleanup_queued_bufs() 464 spin_unlock_irqrestore(&dev->queued_bufs_lock, flags); rtl2832_sdr_cleanup_queued_bufs() 470 struct rtl2832_sdr_dev dev = video_drvdata(file); rtl2832_sdr_querycap() local 471 struct platform_device pdev = dev->pdev; rtl2832_sdr_querycap() 473 dev_dbg(&pdev->dev, "\n"); rtl2832_sdr_querycap() 476 strlcpy(cap->card, dev->vdev.name, sizeof(cap->card)); rtl2832_sdr_querycap() 477 usb_make_path(dev->udev, cap->bus_info, sizeof(cap->bus_info)); rtl2832_sdr_querycap() 489 struct rtl2832_sdr_dev dev = vb2_get_drv_priv(vq); rtl2832_sdr_queue_setup() local 490 struct platform_device pdev = dev->pdev; rtl2832_sdr_queue_setup() 492 dev_dbg(&pdev->dev, "nbuffers=%d\n", nbuffers); rtl2832_sdr_queue_setup() 498 sizes[0] = PAGE_ALIGN(dev->buffersize); rtl2832_sdr_queue_setup() 499 dev_dbg(&pdev->dev, "nbuffers=%d sizes[0]=%d\n", nbuffers, sizes[0]); rtl2832_sdr_queue_setup() 505 struct rtl2832_sdr_dev dev = vb2_get_drv_priv(vb->vb2_queue); rtl2832_sdr_buf_prepare() local 508 if (!dev->udev) rtl2832_sdr_buf_prepare() 516 struct rtl2832_sdr_dev dev = vb2_get_drv_priv(vb->vb2_queue); rtl2832_sdr_buf_queue() local 522 if (!dev->udev) { rtl2832_sdr_buf_queue() 527 spin_lock_irqsave(&dev->queued_bufs_lock, flags); rtl2832_sdr_buf_queue() 528 list_add_tail(&buf->list, &dev->queued_bufs); rtl2832_sdr_buf_queue() 529 spin_unlock_irqrestore(&dev->queued_bufs_lock, flags); rtl2832_sdr_buf_queue() 532 static int rtl2832_sdr_set_adc(struct rtl2832_sdr_dev dev) rtl2832_sdr_set_adc() argument 534 struct platform_device pdev = dev->pdev; rtl2832_sdr_set_adc() 535 struct rtl2832_sdr_platform_data pdata = pdev->dev.platform_data; rtl2832_sdr_set_adc() 543 dev_dbg(&pdev->dev, "f_adc=%u\n", dev->f_adc); rtl2832_sdr_set_adc() 545 if (!test_bit(POWER_ON, &dev->flags)) rtl2832_sdr_set_adc() 548 if (dev->f_adc == 0) rtl2832_sdr_set_adc() 551 f_sr = dev->f_adc; rtl2832_sdr_set_adc() 553 ret = rtl2832_sdr_wr_regs(dev, 0x13e, "\x00\x00", 2); rtl2832_sdr_set_adc() 557 ret = rtl2832_sdr_wr_regs(dev, 0x115, "\x00\x00\x00\x00", 4); rtl2832_sdr_set_adc() 577 dev_dbg(&pdev->dev, "f_if=%u if_ctl=%08x\n", f_if, u32tmp); rtl2832_sdr_set_adc() 583 ret = rtl2832_sdr_wr_regs(dev, 0x119, buf, 3); rtl2832_sdr_set_adc() 597 ret = rtl2832_sdr_wr_reg(dev, 0x1b1, u8tmp1); rtl2832_sdr_set_adc() 601 ret = rtl2832_sdr_wr_reg(dev, 0x008, u8tmp2); rtl2832_sdr_set_adc() 605 ret = rtl2832_sdr_wr_reg(dev, 0x006, 0x80); rtl2832_sdr_set_adc() 616 ret = rtl2832_sdr_wr_regs(dev, 0x19f, buf, 4); rtl2832_sdr_set_adc() 621 ret = rtl2832_sdr_wr_regs(dev, 0x11c, rtl2832_sdr_set_adc() 627 ret = rtl2832_sdr_wr_regs(dev, 0x017, "\x11\x10", 2); rtl2832_sdr_set_adc() 632 ret = rtl2832_sdr_wr_regs(dev, 0x019, "\x05", 1); rtl2832_sdr_set_adc() 636 ret = rtl2832_sdr_wr_regs(dev, 0x01a, "\x1b\x16\x0d\x06\x01\xff", 6); rtl2832_sdr_set_adc() 641 ret = rtl2832_sdr_wr_regs(dev, 0x192, "\x00\xf0\x0f", 3); rtl2832_sdr_set_adc() 646 ret = rtl2832_sdr_wr_regs(dev, 0x061, "\x60", 1); rtl2832_sdr_set_adc() 653 ret = rtl2832_sdr_wr_regs(dev, 0x112, "\x5a", 1); rtl2832_sdr_set_adc() 654 ret = rtl2832_sdr_wr_regs(dev, 0x102, "\x40", 1); rtl2832_sdr_set_adc() 655 ret = rtl2832_sdr_wr_regs(dev, 0x103, "\x5a", 1); rtl2832_sdr_set_adc() 656 ret = rtl2832_sdr_wr_regs(dev, 0x1c7, "\x30", 1); rtl2832_sdr_set_adc() 657 ret = rtl2832_sdr_wr_regs(dev, 0x104, "\xd0", 1); rtl2832_sdr_set_adc() 658 ret = rtl2832_sdr_wr_regs(dev, 0x105, "\xbe", 1); rtl2832_sdr_set_adc() 659 ret = rtl2832_sdr_wr_regs(dev, 0x1c8, "\x18", 1); rtl2832_sdr_set_adc() 660 ret = rtl2832_sdr_wr_regs(dev, 0x106, "\x35", 1); rtl2832_sdr_set_adc() 661 ret = rtl2832_sdr_wr_regs(dev, 0x1c9, "\x21", 1); rtl2832_sdr_set_adc() 662 ret = rtl2832_sdr_wr_regs(dev, 0x1ca, "\x21", 1); rtl2832_sdr_set_adc() 663 ret = rtl2832_sdr_wr_regs(dev, 0x1cb, "\x00", 1); rtl2832_sdr_set_adc() 664 ret = rtl2832_sdr_wr_regs(dev, 0x107, "\x40", 1); rtl2832_sdr_set_adc() 665 ret = rtl2832_sdr_wr_regs(dev, 0x1cd, "\x10", 1); rtl2832_sdr_set_adc() 666 ret = rtl2832_sdr_wr_regs(dev, 0x1ce, "\x10", 1); rtl2832_sdr_set_adc() 667 ret = rtl2832_sdr_wr_regs(dev, 0x108, "\x80", 1); rtl2832_sdr_set_adc() 668 ret = rtl2832_sdr_wr_regs(dev, 0x109, "\x7f", 1); rtl2832_sdr_set_adc() 669 ret = rtl2832_sdr_wr_regs(dev, 0x10a, "\x80", 1); rtl2832_sdr_set_adc() 670 ret = rtl2832_sdr_wr_regs(dev, 0x10b, "\x7f", 1); rtl2832_sdr_set_adc() 671 ret = rtl2832_sdr_wr_regs(dev, 0x00e, "\xfc", 1); rtl2832_sdr_set_adc() 672 ret = rtl2832_sdr_wr_regs(dev, 0x00e, "\xfc", 1); rtl2832_sdr_set_adc() 673 ret = rtl2832_sdr_wr_regs(dev, 0x011, "\xd4", 1); rtl2832_sdr_set_adc() 674 ret = rtl2832_sdr_wr_regs(dev, 0x1e5, "\xf0", 1); rtl2832_sdr_set_adc() 675 ret = rtl2832_sdr_wr_regs(dev, 0x1d9, "\x00", 1); rtl2832_sdr_set_adc() 676 ret = rtl2832_sdr_wr_regs(dev, 0x1db, "\x00", 1); rtl2832_sdr_set_adc() 677 ret = rtl2832_sdr_wr_regs(dev, 0x1dd, "\x14", 1); rtl2832_sdr_set_adc() 678 ret = rtl2832_sdr_wr_regs(dev, 0x1de, "\xec", 1); rtl2832_sdr_set_adc() 679 ret = rtl2832_sdr_wr_regs(dev, 0x1d8, "\x0c", 1); rtl2832_sdr_set_adc() 680 ret = rtl2832_sdr_wr_regs(dev, 0x1e6, "\x02", 1); rtl2832_sdr_set_adc() 681 ret = rtl2832_sdr_wr_regs(dev, 0x1d7, "\x09", 1); rtl2832_sdr_set_adc() 682 ret = rtl2832_sdr_wr_regs(dev, 0x00d, "\x83", 1); rtl2832_sdr_set_adc() 683 ret = rtl2832_sdr_wr_regs(dev, 0x010, "\x49", 1); rtl2832_sdr_set_adc() 684 ret = rtl2832_sdr_wr_regs(dev, 0x00d, "\x87", 1); rtl2832_sdr_set_adc() 685 ret = rtl2832_sdr_wr_regs(dev, 0x00d, "\x85", 1); rtl2832_sdr_set_adc() 686 ret = rtl2832_sdr_wr_regs(dev, 0x013, "\x02", 1); rtl2832_sdr_set_adc() 690 ret = rtl2832_sdr_wr_regs(dev, 0x112, "\x5a", 1); rtl2832_sdr_set_adc() 691 ret = rtl2832_sdr_wr_regs(dev, 0x102, "\x40", 1); rtl2832_sdr_set_adc() 692 ret = rtl2832_sdr_wr_regs(dev, 0x103, "\x5a", 1); rtl2832_sdr_set_adc() 693 ret = rtl2832_sdr_wr_regs(dev, 0x1c7, "\x2c", 1); rtl2832_sdr_set_adc() 694 ret = rtl2832_sdr_wr_regs(dev, 0x104, "\xcc", 1); rtl2832_sdr_set_adc() 695 ret = rtl2832_sdr_wr_regs(dev, 0x105, "\xbe", 1); rtl2832_sdr_set_adc() 696 ret = rtl2832_sdr_wr_regs(dev, 0x1c8, "\x16", 1); rtl2832_sdr_set_adc() 697 ret = rtl2832_sdr_wr_regs(dev, 0x106, "\x35", 1); rtl2832_sdr_set_adc() 698 ret = rtl2832_sdr_wr_regs(dev, 0x1c9, "\x21", 1); rtl2832_sdr_set_adc() 699 ret = rtl2832_sdr_wr_regs(dev, 0x1ca, "\x21", 1); rtl2832_sdr_set_adc() 700 ret = rtl2832_sdr_wr_regs(dev, 0x1cb, "\x00", 1); rtl2832_sdr_set_adc() 701 ret = rtl2832_sdr_wr_regs(dev, 0x107, "\x40", 1); rtl2832_sdr_set_adc() 702 ret = rtl2832_sdr_wr_regs(dev, 0x1cd, "\x10", 1); rtl2832_sdr_set_adc() 703 ret = rtl2832_sdr_wr_regs(dev, 0x1ce, "\x10", 1); rtl2832_sdr_set_adc() 704 ret = rtl2832_sdr_wr_regs(dev, 0x108, "\x80", 1); rtl2832_sdr_set_adc() 705 ret = rtl2832_sdr_wr_regs(dev, 0x109, "\x7f", 1); rtl2832_sdr_set_adc() 706 ret = rtl2832_sdr_wr_regs(dev, 0x10a, "\x80", 1); rtl2832_sdr_set_adc() 707 ret = rtl2832_sdr_wr_regs(dev, 0x10b, "\x7f", 1); rtl2832_sdr_set_adc() 708 ret = rtl2832_sdr_wr_regs(dev, 0x00e, "\xfc", 1); rtl2832_sdr_set_adc() 709 ret = rtl2832_sdr_wr_regs(dev, 0x00e, "\xfc", 1); rtl2832_sdr_set_adc() 710 ret = rtl2832_sdr_wr_regs(dev, 0x011, "\xe9\xbf", 2); rtl2832_sdr_set_adc() 711 ret = rtl2832_sdr_wr_regs(dev, 0x1e5, "\xf0", 1); rtl2832_sdr_set_adc() 712 ret = rtl2832_sdr_wr_regs(dev, 0x1d9, "\x00", 1); rtl2832_sdr_set_adc() 713 ret = rtl2832_sdr_wr_regs(dev, 0x1db, "\x00", 1); rtl2832_sdr_set_adc() 714 ret = rtl2832_sdr_wr_regs(dev, 0x1dd, "\x11", 1); rtl2832_sdr_set_adc() 715 ret = rtl2832_sdr_wr_regs(dev, 0x1de, "\xef", 1); rtl2832_sdr_set_adc() 716 ret = rtl2832_sdr_wr_regs(dev, 0x1d8, "\x0c", 1); rtl2832_sdr_set_adc() 717 ret = rtl2832_sdr_wr_regs(dev, 0x1e6, "\x02", 1); rtl2832_sdr_set_adc() 718 ret = rtl2832_sdr_wr_regs(dev, 0x1d7, "\x09", 1); rtl2832_sdr_set_adc() 722 ret = rtl2832_sdr_wr_regs(dev, 0x112, "\x5a", 1); rtl2832_sdr_set_adc() 723 ret = rtl2832_sdr_wr_regs(dev, 0x102, "\x40", 1); rtl2832_sdr_set_adc() 724 ret = rtl2832_sdr_wr_regs(dev, 0x115, "\x01", 1); rtl2832_sdr_set_adc() 725 ret = rtl2832_sdr_wr_regs(dev, 0x103, "\x80", 1); rtl2832_sdr_set_adc() 726 ret = rtl2832_sdr_wr_regs(dev, 0x1c7, "\x24", 1); rtl2832_sdr_set_adc() 727 ret = rtl2832_sdr_wr_regs(dev, 0x104, "\xcc", 1); rtl2832_sdr_set_adc() 728 ret = rtl2832_sdr_wr_regs(dev, 0x105, "\xbe", 1); rtl2832_sdr_set_adc() 729 ret = rtl2832_sdr_wr_regs(dev, 0x1c8, "\x14", 1); rtl2832_sdr_set_adc() 730 ret = rtl2832_sdr_wr_regs(dev, 0x106, "\x35", 1); rtl2832_sdr_set_adc() 731 ret = rtl2832_sdr_wr_regs(dev, 0x1c9, "\x21", 1); rtl2832_sdr_set_adc() 732 ret = rtl2832_sdr_wr_regs(dev, 0x1ca, "\x21", 1); rtl2832_sdr_set_adc() 733 ret = rtl2832_sdr_wr_regs(dev, 0x1cb, "\x00", 1); rtl2832_sdr_set_adc() 734 ret = rtl2832_sdr_wr_regs(dev, 0x107, "\x40", 1); rtl2832_sdr_set_adc() 735 ret = rtl2832_sdr_wr_regs(dev, 0x1cd, "\x10", 1); rtl2832_sdr_set_adc() 736 ret = rtl2832_sdr_wr_regs(dev, 0x1ce, "\x10", 1); rtl2832_sdr_set_adc() 737 ret = rtl2832_sdr_wr_regs(dev, 0x108, "\x80", 1); rtl2832_sdr_set_adc() 738 ret = rtl2832_sdr_wr_regs(dev, 0x109, "\x7f", 1); rtl2832_sdr_set_adc() 739 ret = rtl2832_sdr_wr_regs(dev, 0x10a, "\x80", 1); rtl2832_sdr_set_adc() 740 ret = rtl2832_sdr_wr_regs(dev, 0x10b, "\x7f", 1); rtl2832_sdr_set_adc() 741 ret = rtl2832_sdr_wr_regs(dev, 0x00e, "\xfc", 1); rtl2832_sdr_set_adc() 742 ret = rtl2832_sdr_wr_regs(dev, 0x00e, "\xfc", 1); rtl2832_sdr_set_adc() 743 ret = rtl2832_sdr_wr_regs(dev, 0x011, "\xf4", 1); rtl2832_sdr_set_adc() 746 dev_notice(&pdev->dev, "Unsupported tuner\n"); rtl2832_sdr_set_adc() 750 ret = rtl2832_sdr_wr_reg_mask(dev, 0x101, 0x04, 0x04); rtl2832_sdr_set_adc() 754 ret = rtl2832_sdr_wr_reg_mask(dev, 0x101, 0x00, 0x04); rtl2832_sdr_set_adc() 761 static void rtl2832_sdr_unset_adc(struct rtl2832_sdr_dev dev) rtl2832_sdr_unset_adc() argument 763 struct platform_device pdev = dev->pdev; rtl2832_sdr_unset_adc() 766 dev_dbg(&pdev->dev, "\n"); rtl2832_sdr_unset_adc() 769 ret = rtl2832_sdr_wr_regs(dev, 0x061, "\xe0", 1); rtl2832_sdr_unset_adc() 774 ret = rtl2832_sdr_wr_regs(dev, 0x019, "\x20", 1); rtl2832_sdr_unset_adc() 778 ret = rtl2832_sdr_wr_regs(dev, 0x017, "\x11\x10", 2); rtl2832_sdr_unset_adc() 783 ret = rtl2832_sdr_wr_regs(dev, 0x192, "\x00\x0f\xff", 3); rtl2832_sdr_unset_adc() 787 ret = rtl2832_sdr_wr_regs(dev, 0x13e, "\x40\x00", 2); rtl2832_sdr_unset_adc() 791 ret = rtl2832_sdr_wr_regs(dev, 0x115, "\x06\x3f\xce\xcc", 4); rtl2832_sdr_unset_adc() 798 static int rtl2832_sdr_set_tuner_freq(struct rtl2832_sdr_dev dev) rtl2832_sdr_set_tuner_freq() argument 800 struct platform_device pdev = dev->pdev; rtl2832_sdr_set_tuner_freq() 801 struct rtl2832_sdr_platform_data pdata = pdev->dev.platform_data; rtl2832_sdr_set_tuner_freq() 810 if (dev->f_tuner == 0) rtl2832_sdr_set_tuner_freq() 816 bandwidth_auto = v4l2_ctrl_find(&dev->hdl, rtl2832_sdr_set_tuner_freq() 818 bandwidth = v4l2_ctrl_find(&dev->hdl, V4L2_CID_RF_TUNER_BANDWIDTH); rtl2832_sdr_set_tuner_freq() 820 c->bandwidth_hz = dev->f_adc; rtl2832_sdr_set_tuner_freq() 821 v4l2_ctrl_s_ctrl(bandwidth, dev->f_adc); rtl2832_sdr_set_tuner_freq() 826 c->frequency = dev->f_tuner; rtl2832_sdr_set_tuner_freq() 829 dev_dbg(&pdev->dev, "frequency=%u bandwidth=%d\n", rtl2832_sdr_set_tuner_freq() 832 if (!test_bit(POWER_ON, &dev->flags)) rtl2832_sdr_set_tuner_freq() 841 static int rtl2832_sdr_set_tuner(struct rtl2832_sdr_dev dev) rtl2832_sdr_set_tuner() argument 843 struct platform_device pdev = dev->pdev; rtl2832_sdr_set_tuner() 844 struct rtl2832_sdr_platform_data pdata = pdev->dev.platform_data; rtl2832_sdr_set_tuner() 847 dev_dbg(&pdev->dev, "\n"); rtl2832_sdr_set_tuner() 855 static void rtl2832_sdr_unset_tuner(struct rtl2832_sdr_dev dev) rtl2832_sdr_unset_tuner() argument 857 struct platform_device pdev = dev->pdev; rtl2832_sdr_unset_tuner() 858 struct rtl2832_sdr_platform_data pdata = pdev->dev.platform_data; rtl2832_sdr_unset_tuner() 861 dev_dbg(&pdev->dev, "\n"); rtl2832_sdr_unset_tuner() 871 struct rtl2832_sdr_dev dev = vb2_get_drv_priv(vq); rtl2832_sdr_start_streaming() local 872 struct platform_device pdev = dev->pdev; rtl2832_sdr_start_streaming() 873 struct rtl2832_sdr_platform_data pdata = pdev->dev.platform_data; rtl2832_sdr_start_streaming() 877 dev_dbg(&pdev->dev, "\n"); rtl2832_sdr_start_streaming() 879 if (!dev->udev) rtl2832_sdr_start_streaming() 882 if (mutex_lock_interruptible(&dev->v4l2_lock)) rtl2832_sdr_start_streaming() 892 set_bit(POWER_ON, &dev->flags); rtl2832_sdr_start_streaming() 894 ret = rtl2832_sdr_set_tuner(dev); rtl2832_sdr_start_streaming() 898 ret = rtl2832_sdr_set_tuner_freq(dev); rtl2832_sdr_start_streaming() 902 ret = rtl2832_sdr_set_adc(dev); rtl2832_sdr_start_streaming() 906 ret = rtl2832_sdr_alloc_stream_bufs(dev); rtl2832_sdr_start_streaming() 910 ret = rtl2832_sdr_alloc_urbs(dev); rtl2832_sdr_start_streaming() 914 dev->sequence = 0; rtl2832_sdr_start_streaming() 916 ret = rtl2832_sdr_submit_urbs(dev); rtl2832_sdr_start_streaming() 921 mutex_unlock(&dev->v4l2_lock); rtl2832_sdr_start_streaming() 928 struct rtl2832_sdr_dev dev = vb2_get_drv_priv(vq); rtl2832_sdr_stop_streaming() local 929 struct platform_device pdev = dev->pdev; rtl2832_sdr_stop_streaming() 930 struct rtl2832_sdr_platform_data pdata = pdev->dev.platform_data; rtl2832_sdr_stop_streaming() 933 dev_dbg(&pdev->dev, "\n"); rtl2832_sdr_stop_streaming() 935 mutex_lock(&dev->v4l2_lock); rtl2832_sdr_stop_streaming() 937 rtl2832_sdr_kill_urbs(dev); rtl2832_sdr_stop_streaming() 938 rtl2832_sdr_free_urbs(dev); rtl2832_sdr_stop_streaming() 939 rtl2832_sdr_free_stream_bufs(dev); rtl2832_sdr_stop_streaming() 940 rtl2832_sdr_cleanup_queued_bufs(dev); rtl2832_sdr_stop_streaming() 941 rtl2832_sdr_unset_adc(dev); rtl2832_sdr_stop_streaming() 942 rtl2832_sdr_unset_tuner(dev); rtl2832_sdr_stop_streaming() 944 clear_bit(POWER_ON, &dev->flags); rtl2832_sdr_stop_streaming() 953 mutex_unlock(&dev->v4l2_lock); rtl2832_sdr_stop_streaming() 969 struct rtl2832_sdr_dev dev = video_drvdata(file); rtl2832_sdr_g_tuner() local 970 struct platform_device pdev = dev->pdev; rtl2832_sdr_g_tuner() 972 dev_dbg(&pdev->dev, "index=%d type=%d\n", v->index, v->type); rtl2832_sdr_g_tuner() 996 struct rtl2832_sdr_dev dev = video_drvdata(file); rtl2832_sdr_s_tuner() local 997 struct platform_device pdev = dev->pdev; rtl2832_sdr_s_tuner() 999 dev_dbg(&pdev->dev, "\n"); rtl2832_sdr_s_tuner() 1009 struct rtl2832_sdr_dev dev = video_drvdata(file); rtl2832_sdr_enum_freq_bands() local 1010 struct platform_device pdev = dev->pdev; rtl2832_sdr_enum_freq_bands() 1012 dev_dbg(&pdev->dev, "tuner=%d type=%d index=%d\n", rtl2832_sdr_enum_freq_bands() 1035 struct rtl2832_sdr_dev dev = video_drvdata(file); rtl2832_sdr_g_frequency() local 1036 struct platform_device pdev = dev->pdev; rtl2832_sdr_g_frequency() 1039 dev_dbg(&pdev->dev, "tuner=%d type=%d\n", f->tuner, f->type); rtl2832_sdr_g_frequency() 1042 f->frequency = dev->f_adc; rtl2832_sdr_g_frequency() 1045 f->frequency = dev->f_tuner; rtl2832_sdr_g_frequency() 1057 struct rtl2832_sdr_dev dev = video_drvdata(file); rtl2832_sdr_s_frequency() local 1058 struct platform_device pdev = dev->pdev; rtl2832_sdr_s_frequency() 1061 dev_dbg(&pdev->dev, "tuner=%d type=%d frequency=%u\n", rtl2832_sdr_s_frequency() 1076 dev->f_adc = clamp_t(unsigned int, f->frequency, rtl2832_sdr_s_frequency() 1080 dev_dbg(&pdev->dev, "ADC frequency=%u Hz\n", dev->f_adc); rtl2832_sdr_s_frequency() 1081 ret = rtl2832_sdr_set_adc(dev); rtl2832_sdr_s_frequency() 1083 dev->f_tuner = clamp_t(unsigned int, f->frequency, rtl2832_sdr_s_frequency() 1086 dev_dbg(&pdev->dev, "RF frequency=%u Hz\n", f->frequency); rtl2832_sdr_s_frequency() 1088 ret = rtl2832_sdr_set_tuner_freq(dev); rtl2832_sdr_s_frequency() 1099 struct rtl2832_sdr_dev dev = video_drvdata(file); rtl2832_sdr_enum_fmt_sdr_cap() local 1100 struct platform_device pdev = dev->pdev; rtl2832_sdr_enum_fmt_sdr_cap() 1102 dev_dbg(&pdev->dev, "\n"); rtl2832_sdr_enum_fmt_sdr_cap() 1104 if (f->index >= dev->num_formats) rtl2832_sdr_enum_fmt_sdr_cap() 1116 struct rtl2832_sdr_dev dev = video_drvdata(file); rtl2832_sdr_g_fmt_sdr_cap() local 1117 struct platform_device pdev = dev->pdev; rtl2832_sdr_g_fmt_sdr_cap() 1119 dev_dbg(&pdev->dev, "\n"); rtl2832_sdr_g_fmt_sdr_cap() 1121 f->fmt.sdr.pixelformat = dev->pixelformat; rtl2832_sdr_g_fmt_sdr_cap() 1122 f->fmt.sdr.buffersize = dev->buffersize; rtl2832_sdr_g_fmt_sdr_cap() 1132 struct rtl2832_sdr_dev dev = video_drvdata(file); rtl2832_sdr_s_fmt_sdr_cap() local 1133 struct platform_device pdev = dev->pdev; rtl2832_sdr_s_fmt_sdr_cap() 1134 struct vb2_queue q = &dev->vb_queue; rtl2832_sdr_s_fmt_sdr_cap() 1137 dev_dbg(&pdev->dev, "pixelformat fourcc %4.4s\n", rtl2832_sdr_s_fmt_sdr_cap() 1144 for (i = 0; i < dev->num_formats; i++) { rtl2832_sdr_s_fmt_sdr_cap() 1146 dev->pixelformat = formats[i].pixelformat; rtl2832_sdr_s_fmt_sdr_cap() 1147 dev->buffersize = formats[i].buffersize; rtl2832_sdr_s_fmt_sdr_cap() 1153 dev->pixelformat = formats[0].pixelformat; rtl2832_sdr_s_fmt_sdr_cap() 1154 dev->buffersize = formats[0].buffersize; rtl2832_sdr_s_fmt_sdr_cap() 1164 struct rtl2832_sdr_dev dev = video_drvdata(file); rtl2832_sdr_try_fmt_sdr_cap() local 1165 struct platform_device pdev = dev->pdev; rtl2832_sdr_try_fmt_sdr_cap() 1168 dev_dbg(&pdev->dev, "pixelformat fourcc %4.4s\n", rtl2832_sdr_try_fmt_sdr_cap() 1172 for (i = 0; i < dev->num_formats; i++) { rtl2832_sdr_try_fmt_sdr_cap() 1234 struct rtl2832_sdr_dev dev = rtl2832_sdr_s_ctrl() local 1237 struct platform_device pdev = dev->pdev; rtl2832_sdr_s_ctrl() 1238 struct rtl2832_sdr_platform_data pdata = pdev->dev.platform_data; rtl2832_sdr_s_ctrl() 1243 dev_dbg(&pdev->dev, "id=%d name=%s val=%d min=%lld max=%lld step=%lld\n", rtl2832_sdr_s_ctrl() 1251 if (dev->bandwidth_auto->val) { rtl2832_sdr_s_ctrl() 1253 s32 val = dev->f_adc + div_u64(dev->bandwidth->step, 2); rtl2832_sdr_s_ctrl() 1256 val = clamp_t(s32, val, dev->bandwidth->minimum, rtl2832_sdr_s_ctrl() 1257 dev->bandwidth->maximum); rtl2832_sdr_s_ctrl() 1258 offset = val - dev->bandwidth->minimum; rtl2832_sdr_s_ctrl() 1259 offset = dev->bandwidth->step * rtl2832_sdr_s_ctrl() 1260 div_u64(offset, dev->bandwidth->step); rtl2832_sdr_s_ctrl() 1261 dev->bandwidth->val = dev->bandwidth->minimum + offset; rtl2832_sdr_s_ctrl() 1263 c->bandwidth_hz = dev->bandwidth->val; rtl2832_sdr_s_ctrl() 1265 if (!test_bit(POWER_ON, &dev->flags)) rtl2832_sdr_s_ctrl() 1286 struct rtl2832_sdr_dev dev = rtl2832_sdr_video_release() local 1288 struct platform_device pdev = dev->pdev; rtl2832_sdr_video_release() 1290 dev_dbg(&pdev->dev, "\n"); rtl2832_sdr_video_release() 1292 v4l2_ctrl_handler_free(&dev->hdl); rtl2832_sdr_video_release() 1293 v4l2_device_unregister(&dev->v4l2_dev); rtl2832_sdr_video_release() 1294 kfree(dev); rtl2832_sdr_video_release() 1300 struct rtl2832_sdr_dev dev; rtl2832_sdr_probe() local 1301 struct rtl2832_sdr_platform_data pdata = pdev->dev.platform_data; rtl2832_sdr_probe() 1306 dev_dbg(&pdev->dev, "\n"); rtl2832_sdr_probe() 1309 dev_err(&pdev->dev, "Cannot proceed without platform data\n"); rtl2832_sdr_probe() 1313 if (!pdev->dev.parent->driver) { rtl2832_sdr_probe() 1314 dev_dbg(&pdev->dev, "No parent device\n"); rtl2832_sdr_probe() 1319 if (!try_module_get(pdev->dev.parent->driver->owner)) { rtl2832_sdr_probe() 1320 dev_err(&pdev->dev, "Refcount fail"); rtl2832_sdr_probe() 1324 dev = kzalloc(sizeof(dev), GFP_KERNEL); rtl2832_sdr_probe() 1325 if (dev == NULL) { rtl2832_sdr_probe() 1332 dev->pdev = pdev; rtl2832_sdr_probe() 1333 dev->udev = pdata->dvb_usb_device->udev; rtl2832_sdr_probe() 1334 dev->f_adc = bands_adc[0].rangelow; rtl2832_sdr_probe() 1335 dev->f_tuner = bands_fm[0].rangelow; rtl2832_sdr_probe() 1336 dev->pixelformat = formats[0].pixelformat; rtl2832_sdr_probe() 1337 dev->buffersize = formats[0].buffersize; rtl2832_sdr_probe() 1338 dev->num_formats = NUM_FORMATS; rtl2832_sdr_probe() 1340 dev->num_formats -= 1; rtl2832_sdr_probe() 1342 mutex_init(&dev->v4l2_lock); rtl2832_sdr_probe() 1343 mutex_init(&dev->vb_queue_lock); rtl2832_sdr_probe() 1344 spin_lock_init(&dev->queued_bufs_lock); rtl2832_sdr_probe() 1345 INIT_LIST_HEAD(&dev->queued_bufs); rtl2832_sdr_probe() 1348 dev->vb_queue.type = V4L2_BUF_TYPE_SDR_CAPTURE; rtl2832_sdr_probe() 1349 dev->vb_queue.io_modes = VB2_MMAP \| VB2_USERPTR \| VB2_READ; rtl2832_sdr_probe() 1350 dev->vb_queue.drv_priv = dev; rtl2832_sdr_probe() 1351 dev->vb_queue.buf_struct_size = sizeof(struct rtl2832_sdr_frame_buf); rtl2832_sdr_probe() 1352 dev->vb_queue.ops = &rtl2832_sdr_vb2_ops; rtl2832_sdr_probe() 1353 dev->vb_queue.mem_ops = &vb2_vmalloc_memops; rtl2832_sdr_probe() 1354 dev->vb_queue.timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC; rtl2832_sdr_probe() 1355 ret = vb2_queue_init(&dev->vb_queue); rtl2832_sdr_probe() 1357 dev_err(&pdev->dev, "Could not initialize vb2 queue\n"); rtl2832_sdr_probe() 1364 v4l2_ctrl_handler_init(&dev->hdl, 9); rtl2832_sdr_probe() 1366 v4l2_ctrl_add_handler(&dev->hdl, subdev->ctrl_handler, NULL); rtl2832_sdr_probe() 1370 v4l2_ctrl_handler_init(&dev->hdl, 2); rtl2832_sdr_probe() 1371 dev->bandwidth_auto = v4l2_ctrl_new_std(&dev->hdl, ops, rtl2832_sdr_probe() 1374 dev->bandwidth = v4l2_ctrl_new_std(&dev->hdl, ops, rtl2832_sdr_probe() 1377 v4l2_ctrl_auto_cluster(2, &dev->bandwidth_auto, 0, false); rtl2832_sdr_probe() 1381 v4l2_ctrl_handler_init(&dev->hdl, 2); rtl2832_sdr_probe() 1382 dev->bandwidth_auto = v4l2_ctrl_new_std(&dev->hdl, ops, rtl2832_sdr_probe() 1385 dev->bandwidth = v4l2_ctrl_new_std(&dev->hdl, ops, rtl2832_sdr_probe() 1389 v4l2_ctrl_auto_cluster(2, &dev->bandwidth_auto, 0, false); rtl2832_sdr_probe() 1392 v4l2_ctrl_handler_init(&dev->hdl, 0); rtl2832_sdr_probe() 1393 dev_err(&pdev->dev, "Unsupported tuner\n"); rtl2832_sdr_probe() 1396 if (dev->hdl.error) { rtl2832_sdr_probe() 1397 ret = dev->hdl.error; rtl2832_sdr_probe() 1398 dev_err(&pdev->dev, "Could not initialize controls\n"); rtl2832_sdr_probe() 1403 dev->vdev = rtl2832_sdr_template; rtl2832_sdr_probe() 1404 dev->vdev.queue = &dev->vb_queue; rtl2832_sdr_probe() 1405 dev->vdev.queue->lock = &dev->vb_queue_lock; rtl2832_sdr_probe() 1406 video_set_drvdata(&dev->vdev, dev); rtl2832_sdr_probe() 1409 dev->v4l2_dev.release = rtl2832_sdr_video_release; rtl2832_sdr_probe() 1410 ret = v4l2_device_register(&pdev->dev, &dev->v4l2_dev); rtl2832_sdr_probe() 1412 dev_err(&pdev->dev, "Failed to register v4l2-device %d\n", ret); rtl2832_sdr_probe() 1416 dev->v4l2_dev.ctrl_handler = &dev->hdl; rtl2832_sdr_probe() 1417 dev->vdev.v4l2_dev = &dev->v4l2_dev; rtl2832_sdr_probe() 1418 dev->vdev.lock = &dev->v4l2_lock; rtl2832_sdr_probe() 1419 dev->vdev.vfl_dir = VFL_DIR_RX; rtl2832_sdr_probe() 1421 ret = video_register_device(&dev->vdev, VFL_TYPE_SDR, -1); rtl2832_sdr_probe() 1423 dev_err(&pdev->dev, "Failed to register as video device %d\n", rtl2832_sdr_probe() 1427 dev_info(&pdev->dev, "Registered as %s\n", rtl2832_sdr_probe() 1428 video_device_node_name(&dev->vdev)); rtl2832_sdr_probe() 1429 dev_info(&pdev->dev, "Realtek RTL2832 SDR attached\n"); rtl2832_sdr_probe() 1430 dev_notice(&pdev->dev, rtl2832_sdr_probe() 1432 platform_set_drvdata(pdev, dev); rtl2832_sdr_probe() 1435 v4l2_device_unregister(&dev->v4l2_dev); rtl2832_sdr_probe() 1437 v4l2_ctrl_handler_free(&dev->hdl); rtl2832_sdr_probe() 1439 kfree(dev); rtl2832_sdr_probe() 1441 module_put(pdev->dev.parent->driver->owner); rtl2832_sdr_probe() 1448 struct rtl2832_sdr_dev dev = platform_get_drvdata(pdev); rtl2832_sdr_remove() local 1450 dev_dbg(&pdev->dev, "\n"); rtl2832_sdr_remove() 1452 mutex_lock(&dev->vb_queue_lock); rtl2832_sdr_remove() 1453 mutex_lock(&dev->v4l2_lock); rtl2832_sdr_remove() 1455 dev->udev = NULL; rtl2832_sdr_remove() 1456 v4l2_device_disconnect(&dev->v4l2_dev); rtl2832_sdr_remove() 1457 video_unregister_device(&dev->vdev); rtl2832_sdr_remove() 1458 mutex_unlock(&dev->v4l2_lock); rtl2832_sdr_remove() 1459 mutex_unlock(&dev->vb_queue_lock); rtl2832_sdr_remove() 1460 v4l2_device_put(&dev->v4l2_dev); rtl2832_sdr_remove() 1461 module_put(pdev->dev.parent->driver->owner); rtl2832_sdr_remove() 201 rtl2832_sdr_get_next_fill_buf( struct rtl2832_sdr_dev *dev) rtl2832_sdr_get_next_fill_buf() argument
/linux-4.1.27/sound/oss/
H A D	midibuf.c	4 * Device file manager for /dev/midi# 81 static void drain_midi_queue(int dev) drain_midi_queue() argument 88 if (midi_devs[dev]->buffer_status != NULL) drain_midi_queue() 89 wait_event_interruptible_timeout(midi_sleeper[dev], drain_midi_queue() 90 !midi_devs[dev]->buffer_status(dev), HZ/10); drain_midi_queue() 93 static void midi_input_intr(int dev, unsigned char data) midi_input_intr() argument 95 if (midi_in_buf[dev] == NULL) midi_input_intr() 105 if (SPACE_AVAIL(midi_in_buf[dev])) { midi_input_intr() 106 QUEUE_BYTE(midi_in_buf[dev], data); midi_input_intr() 107 wake_up(&input_sleeper[dev]); midi_input_intr() 111 static void midi_output_intr(int dev) midi_output_intr() argument 121 int dev; midi_poll() local 126 for (dev = 0; dev < num_midis; dev++) midi_poll() 127 if (midi_devs[dev] != NULL && midi_out_buf[dev] != NULL) midi_poll() 129 while (DATA_AVAIL(midi_out_buf[dev])) midi_poll() 132 int c = midi_out_buf[dev]->queue[midi_out_buf[dev]->head]; midi_poll() 135 ok = midi_devs[dev]->outputc(dev, c); midi_poll() 139 midi_out_buf[dev]->head = (midi_out_buf[dev]->head + 1) % MAX_QUEUE_SIZE; midi_poll() 140 midi_out_buf[dev]->len--; midi_poll() 143 if (DATA_AVAIL(midi_out_buf[dev]) < 100) midi_poll() 144 wake_up(&midi_sleeper[dev]); midi_poll() 155 int MIDIbuf_open(int dev, struct file file) MIDIbuf_open() argument 159 dev = dev >> 4; MIDIbuf_open() 167 if (dev < 0 \|\| dev >= num_midis \|\| midi_devs[dev] == NULL) MIDIbuf_open() 173 module_put(midi_devs[dev]->owner); MIDIbuf_open() 175 if ((err = midi_devs[dev]->open(dev, mode, MIDIbuf_open() 179 parms[dev].prech_timeout = MAX_SCHEDULE_TIMEOUT; MIDIbuf_open() 180 midi_in_buf[dev] = vmalloc(sizeof(struct midi_buf)); MIDIbuf_open() 182 if (midi_in_buf[dev] == NULL) MIDIbuf_open() 185 midi_devs[dev]->close(dev); MIDIbuf_open() 188 midi_in_buf[dev]->len = midi_in_buf[dev]->head = midi_in_buf[dev]->tail = 0; MIDIbuf_open() 190 midi_out_buf[dev] = vmalloc(sizeof(struct midi_buf)); MIDIbuf_open() 192 if (midi_out_buf[dev] == NULL) MIDIbuf_open() 195 midi_devs[dev]->close(dev); MIDIbuf_open() 196 vfree(midi_in_buf[dev]); MIDIbuf_open() 197 midi_in_buf[dev] = NULL; MIDIbuf_open() 200 midi_out_buf[dev]->len = midi_out_buf[dev]->head = midi_out_buf[dev]->tail = 0; MIDIbuf_open() 203 init_waitqueue_head(&midi_sleeper[dev]); MIDIbuf_open() 204 init_waitqueue_head(&input_sleeper[dev]); MIDIbuf_open() 214 void MIDIbuf_release(int dev, struct file file) MIDIbuf_release() argument 218 dev = dev >> 4; MIDIbuf_release() 221 if (dev < 0 \|\| dev >= num_midis \|\| midi_devs[dev] == NULL) MIDIbuf_release() 230 midi_devs[dev]->outputc(dev, 0xfe); /* MIDIbuf_release() 235 wait_event_interruptible(midi_sleeper[dev], MIDIbuf_release() 236 !DATA_AVAIL(midi_out_buf[dev])); MIDIbuf_release() 241 drain_midi_queue(dev); /* MIDIbuf_release() 246 midi_devs[dev]->close(dev); MIDIbuf_release() 251 vfree(midi_in_buf[dev]); MIDIbuf_release() 252 vfree(midi_out_buf[dev]); MIDIbuf_release() 253 midi_in_buf[dev] = NULL; MIDIbuf_release() 254 midi_out_buf[dev] = NULL; MIDIbuf_release() 256 module_put(midi_devs[dev]->owner); MIDIbuf_release() 259 int MIDIbuf_write(int dev, struct file file, const char __user buf, int count) MIDIbuf_write() argument 264 dev = dev >> 4; MIDIbuf_write() 273 n = SPACE_AVAIL(midi_out_buf[dev]); MIDIbuf_write() 284 if (wait_event_interruptible(midi_sleeper[dev], MIDIbuf_write() 285 SPACE_AVAIL(midi_out_buf[dev]))) MIDIbuf_write() 290 n = SPACE_AVAIL(midi_out_buf[dev]); MIDIbuf_write() 304 QUEUE_BYTE(midi_out_buf[dev], tmp_data); MIDIbuf_write() 313 int MIDIbuf_read(int dev, struct file file, char __user buf, int count) MIDIbuf_read() argument 318 dev = dev >> 4; MIDIbuf_read() 320 if (!DATA_AVAIL(midi_in_buf[dev])) { /* MIDIbuf_read() 327 wait_event_interruptible_timeout(input_sleeper[dev], MIDIbuf_read() 328 DATA_AVAIL(midi_in_buf[dev]), MIDIbuf_read() 329 parms[dev].prech_timeout); MIDIbuf_read() 334 if (c == 0 && DATA_AVAIL(midi_in_buf[dev])) /* MIDIbuf_read() 338 n = DATA_AVAIL(midi_in_buf[dev]); MIDIbuf_read() 346 REMOVE_BYTE(midi_in_buf[dev], tmp_data); MIDIbuf_read() 362 int MIDIbuf_ioctl(int dev, struct file file, MIDIbuf_ioctl() argument 367 dev = dev >> 4; MIDIbuf_ioctl() 371 if (midi_devs[dev]->coproc) / Coprocessor ioctl / MIDIbuf_ioctl() 372 return midi_devs[dev]->coproc->ioctl(midi_devs[dev]->coproc->devc, cmd, arg, 0); MIDIbuf_ioctl() 373 / printk("/dev/midi%d: No coprocessor for this device\n", dev);/ MIDIbuf_ioctl() 386 parms[dev].prech_timeout = val; MIDIbuf_ioctl() 390 if (!midi_devs[dev]->ioctl) MIDIbuf_ioctl() 392 return midi_devs[dev]->ioctl(dev, cmd, arg); MIDIbuf_ioctl() 398 unsigned int MIDIbuf_poll(int dev, struct file file, poll_table * wait) MIDIbuf_poll() argument 402 dev = dev >> 4; MIDIbuf_poll() 405 poll_wait(file, &input_sleeper[dev], wait); MIDIbuf_poll() 406 if (DATA_AVAIL(midi_in_buf[dev])) MIDIbuf_poll() 410 poll_wait(file, &midi_sleeper[dev], wait); MIDIbuf_poll() 411 if (!SPACE_AVAIL(midi_out_buf[dev])) MIDIbuf_poll() 418 int MIDIbuf_avail(int dev) MIDIbuf_avail() argument 420 if (midi_in_buf[dev]) MIDIbuf_avail() 421 return DATA_AVAIL (midi_in_buf[dev]); MIDIbuf_avail()
H A D	audio.c	4 * Device file manager for /dev/audio 41 static int dma_ioctl(int dev, unsigned int cmd, void __user arg); 43 static int set_format(int dev, int fmt) set_format() argument 47 audio_devs[dev]->local_conversion = 0; set_format() 49 if (!(audio_devs[dev]->format_mask & fmt)) / Not supported / set_format() 54 audio_devs[dev]->local_conversion = CNV_MU_LAW; set_format() 59 audio_devs[dev]->audio_format = audio_devs[dev]->d->set_bits(dev, fmt); set_format() 60 audio_devs[dev]->local_format = fmt; set_format() 63 return audio_devs[dev]->local_format; set_format() 65 if (audio_devs[dev]->local_conversion) set_format() 66 return audio_devs[dev]->local_conversion; set_format() 68 return audio_devs[dev]->local_format; set_format() 71 int audio_open(int dev, struct file file) audio_open() argument 75 int dev_type = dev & 0x0f; audio_open() 80 dev = dev >> 4; audio_open() 87 if (dev < 0 \|\| dev >= num_audiodevs) audio_open() 90 driver = audio_devs[dev]->d; audio_open() 95 if ((ret = DMAbuf_open(dev, mode)) < 0) audio_open() 98 if ( (coprocessor = audio_devs[dev]->coproc) != NULL ) { audio_open() 108 audio_devs[dev]->local_conversion = 0; audio_open() 111 set_format(dev, AFMT_MU_LAW); audio_open() 113 set_format(dev, bits); audio_open() 115 audio_devs[dev]->audio_mode = AM_NONE; audio_open() 127 DMAbuf_release(dev, mode); audio_open() 135 static void sync_output(int dev) sync_output() argument 139 struct dma_buffparms dmap = audio_devs[dev]->dmap_out; sync_output() 154 DMAbuf_move_wrpointer(dev, len); sync_output() 179 void audio_release(int dev, struct file file) audio_release() argument 184 dev = dev >> 4; audio_release() 192 audio_devs[dev]->dmap_out->closing = 1; audio_release() 193 audio_devs[dev]->dmap_in->closing = 1; audio_release() 200 sync_output(dev); audio_release() 202 if ( (coprocessor = audio_devs[dev]->coproc) != NULL ) { audio_release() 206 DMAbuf_release(dev, mode); audio_release() 208 module_put(audio_devs[dev]->d->owner); audio_release() 222 int audio_write(int dev, struct file file, const char __user buf, int count) audio_write() argument 228 dev = dev >> 4; audio_write() 236 if (!(audio_devs[dev]->open_mode & OPEN_WRITE)) audio_write() 239 if (audio_devs[dev]->flags & DMA_DUPLEX) audio_write() 240 audio_devs[dev]->audio_mode \|= AM_WRITE; audio_write() 242 audio_devs[dev]->audio_mode = AM_WRITE; audio_write() 246 sync_output(dev); audio_write() 252 if ((err = DMAbuf_getwrbuffer(dev, &dma_buf, &buf_size, !!(file->f_flags & O_NONBLOCK))) < 0) audio_write() 266 if (!audio_devs[dev]->d->copy_user) audio_write() 269 (audio_devs[dev]->dmap_out->raw_buf + audio_devs[dev]->dmap_out->buffsize)) audio_write() 271 printk(KERN_ERR "audio: Buffer error 3 (%lx,%d), (%lx, %d)\n", (long) dma_buf, l, (long) audio_devs[dev]->dmap_out->raw_buf, (int) audio_devs[dev]->dmap_out->buffsize); audio_write() 274 if (dma_buf < audio_devs[dev]->dmap_out->raw_buf) audio_write() 276 printk(KERN_ERR "audio: Buffer error 13 (%lx<%lx)\n", (long) dma_buf, (long) audio_devs[dev]->dmap_out->raw_buf); audio_write() 282 else audio_devs[dev]->d->copy_user (dev, audio_write() 290 if (audio_devs[dev]->local_conversion & CNV_MU_LAW) audio_write() 296 DMAbuf_move_wrpointer(dev, l); audio_write() 303 int audio_read(int dev, struct file file, char __user buf, int count) audio_read() argument 309 dev = dev >> 4; audio_read() 313 if (!(audio_devs[dev]->open_mode & OPEN_READ)) audio_read() 316 if ((audio_devs[dev]->audio_mode & AM_WRITE) && !(audio_devs[dev]->flags & DMA_DUPLEX)) audio_read() 317 sync_output(dev); audio_read() 319 if (audio_devs[dev]->flags & DMA_DUPLEX) audio_read() 320 audio_devs[dev]->audio_mode \|= AM_READ; audio_read() 322 audio_devs[dev]->audio_mode = AM_READ; audio_read() 326 if ((buf_no = DMAbuf_getrdbuffer(dev, &dmabuf, &l, !!(file->f_flags & O_NONBLOCK))) < 0) audio_read() 347 if (audio_devs[dev]->local_conversion & CNV_MU_LAW) audio_read() 359 DMAbuf_rmchars(dev, buf_no, l); audio_read() 368 int audio_ioctl(int dev, struct file file, unsigned int cmd, void __user arg) audio_ioctl() argument 375 dev = dev >> 4; audio_ioctl() 378 if (audio_devs[dev]->coproc) /* Coprocessor ioctl / audio_ioctl() 379 return audio_devs[dev]->coproc->ioctl(audio_devs[dev]->coproc->devc, cmd, arg, 0); audio_ioctl() 381 printk(KERN_DEBUG"/dev/dsp%d: No coprocessor for this device\n", dev); / audio_ioctl() 387 if (!(audio_devs[dev]->open_mode & OPEN_WRITE)) audio_ioctl() 389 if (audio_devs[dev]->dmap_out->fragment_size == 0) audio_ioctl() 391 sync_output(dev); audio_ioctl() 392 DMAbuf_sync(dev); audio_ioctl() 393 DMAbuf_reset(dev); audio_ioctl() 397 if (!(audio_devs[dev]->open_mode & OPEN_WRITE)) audio_ioctl() 399 if (audio_devs[dev]->dmap_out->fragment_size == 0) audio_ioctl() 401 audio_devs[dev]->dmap_out->flags \|= DMA_POST \| DMA_DIRTY; audio_ioctl() 402 sync_output(dev); audio_ioctl() 403 dma_ioctl(dev, SNDCTL_DSP_POST, NULL); audio_ioctl() 407 audio_devs[dev]->audio_mode = AM_NONE; audio_ioctl() 408 DMAbuf_reset(dev); audio_ioctl() 412 val = audio_devs[dev]->format_mask \| AFMT_MU_LAW; audio_ioctl() 418 val = set_format(dev, val); audio_ioctl() 422 if (!(audio_devs[dev]->open_mode & OPEN_READ)) audio_ioctl() 424 if ((audio_devs[dev]->audio_mode & AM_WRITE) && !(audio_devs[dev]->flags & DMA_DUPLEX)) audio_ioctl() 426 return dma_ioctl(dev, cmd, arg); audio_ioctl() 429 if (!(audio_devs[dev]->open_mode & OPEN_WRITE)) audio_ioctl() 431 if ((audio_devs[dev]->audio_mode & AM_READ) && !(audio_devs[dev]->flags & DMA_DUPLEX)) audio_ioctl() 433 return dma_ioctl(dev, cmd, arg); audio_ioctl() 443 if (audio_devs[dev]->flags & DMA_DUPLEX && audio_ioctl() 444 audio_devs[dev]->open_mode == OPEN_READWRITE) audio_ioctl() 446 if (audio_devs[dev]->coproc) audio_ioctl() 448 if (audio_devs[dev]->d->local_qlen) /* Device has hidden buffers / audio_ioctl() 450 if (audio_devs[dev]->d->trigger) / Supports SETTRIGGER / audio_ioctl() 457 val = audio_devs[dev]->d->set_speed(dev, val); audio_ioctl() 461 val = audio_devs[dev]->d->set_speed(dev, 0); audio_ioctl() 469 val = audio_devs[dev]->d->set_channels(dev, val + 1) - 1; audio_ioctl() 475 val = audio_devs[dev]->d->set_channels(dev, val); audio_ioctl() 479 val = audio_devs[dev]->d->set_channels(dev, 0); audio_ioctl() 483 val = audio_devs[dev]->d->set_bits(dev, 0); audio_ioctl() 487 if (audio_devs[dev]->open_mode != OPEN_READWRITE) audio_ioctl() 489 return (audio_devs[dev]->flags & DMA_DUPLEX) ? 0 : -EIO; audio_ioctl() 494 if (audio_devs[dev]->open_mode & OPEN_WRITE) audio_ioctl() 495 audio_devs[dev]->dmap_out->applic_profile = val; audio_ioctl() 496 if (audio_devs[dev]->open_mode & OPEN_READ) audio_ioctl() 497 audio_devs[dev]->dmap_in->applic_profile = val; audio_ioctl() 501 dmap = audio_devs[dev]->dmap_out; audio_ioctl() 502 if (!(audio_devs[dev]->open_mode & OPEN_WRITE)) audio_ioctl() 512 count = DMAbuf_get_buffer_pointer (dev, dmap, DMODE_OUTPUT); audio_ioctl() 526 return dma_ioctl(dev, cmd, arg); audio_ioctl() 538 void reorganize_buffers(int dev, struct dma_buffparms dmap, int recording) reorganize_buffers() argument 544 struct audio_operations dsp_dev = audio_devs[dev]; reorganize_buffers() 549 sr = dsp_dev->d->set_speed(dev, 0); reorganize_buffers() 550 nc = dsp_dev->d->set_channels(dev, 0); reorganize_buffers() 551 sz = dsp_dev->d->set_bits(dev, 0); reorganize_buffers() 560 / printk(KERN_DEBUG "Warning: Invalid PCM parameters[%d] sr=%d, nc=%d, sz=%d\n", dev, sr, nc, sz);/ reorganize_buffers() 625 if (audio_devs[dev]->min_fragment) reorganize_buffers() 626 if (bsz < (1 << audio_devs[dev]->min_fragment)) reorganize_buffers() 627 bsz = 1 << audio_devs[dev]->min_fragment; reorganize_buffers() 628 if (audio_devs[dev]->max_fragment) reorganize_buffers() 629 if (bsz > (1 << audio_devs[dev]->max_fragment)) reorganize_buffers() 630 bsz = 1 << audio_devs[dev]->max_fragment; reorganize_buffers() 666 static int dma_subdivide(int dev, struct dma_buffparms dmap, int fact) dma_subdivide() argument 688 static int dma_set_fragment(int dev, struct dma_buffparms dmap, int fact) dma_set_fragment() argument 713 if (audio_devs[dev]->min_fragment > 0) dma_set_fragment() 714 if (bytes < audio_devs[dev]->min_fragment) dma_set_fragment() 715 bytes = audio_devs[dev]->min_fragment; dma_set_fragment() 717 if (audio_devs[dev]->max_fragment > 0) dma_set_fragment() 718 if (bytes > audio_devs[dev]->max_fragment) dma_set_fragment() 719 bytes = audio_devs[dev]->max_fragment; dma_set_fragment() 733 audio_devs[dev]->flags & DMA_AUTOMODE) dma_set_fragment() 740 static int dma_ioctl(int dev, unsigned int cmd, void __user arg) dma_ioctl() argument 742 struct dma_buffparms dmap_out = audio_devs[dev]->dmap_out; dma_ioctl() 743 struct dma_buffparms dmap_in = audio_devs[dev]->dmap_in; dma_ioctl() 756 if (audio_devs[dev]->open_mode & OPEN_WRITE) dma_ioctl() 757 ret = dma_subdivide(dev, dmap_out, fact); dma_ioctl() 760 if (audio_devs[dev]->open_mode != OPEN_WRITE \|\| dma_ioctl() 761 (audio_devs[dev]->flags & DMA_DUPLEX && dma_ioctl() 762 audio_devs[dev]->open_mode & OPEN_READ)) dma_ioctl() 763 ret = dma_subdivide(dev, dmap_in, fact); dma_ioctl() 771 if (cmd == SNDCTL_DSP_GETISPACE && !(audio_devs[dev]->open_mode & OPEN_READ)) dma_ioctl() 773 if (cmd == SNDCTL_DSP_GETOSPACE && !(audio_devs[dev]->open_mode & OPEN_WRITE)) dma_ioctl() 775 if (cmd == SNDCTL_DSP_GETISPACE && audio_devs[dev]->flags & DMA_DUPLEX) dma_ioctl() 780 reorganize_buffers(dev, dmap, (cmd == SNDCTL_DSP_GETISPACE)); dma_ioctl() 786 if (!DMAbuf_space_in_queue(dev)) dma_ioctl() 790 info.fragments = DMAbuf_space_in_queue(dev); dma_ioctl() 791 if (audio_devs[dev]->d->local_qlen) dma_ioctl() 793 int tmp = audio_devs[dev]->d->local_qlen(dev); dma_ioctl() 824 bits &= audio_devs[dev]->open_mode; dma_ioctl() 825 if (audio_devs[dev]->d->trigger == NULL) dma_ioctl() 827 if (!(audio_devs[dev]->flags & DMA_DUPLEX) && (bits & PCM_ENABLE_INPUT) && dma_ioctl() 834 changed = (audio_devs[dev]->enable_bits ^ bits) & PCM_ENABLE_INPUT; dma_ioctl() 835 if (changed && audio_devs[dev]->go) dma_ioctl() 837 reorganize_buffers(dev, dmap_in, 1); dma_ioctl() 838 if ((err = audio_devs[dev]->d->prepare_for_input(dev, dma_ioctl() 844 audio_devs[dev]->enable_bits \|= PCM_ENABLE_INPUT; dma_ioctl() 845 DMAbuf_activate_recording(dev, dmap_in); dma_ioctl() 847 audio_devs[dev]->enable_bits &= ~PCM_ENABLE_INPUT; dma_ioctl() 853 changed = (audio_devs[dev]->enable_bits ^ bits) & PCM_ENABLE_OUTPUT; dma_ioctl() 856 audio_devs[dev]->go) dma_ioctl() 859 reorganize_buffers(dev, dmap_out, 0); dma_ioctl() 861 audio_devs[dev]->enable_bits \|= PCM_ENABLE_OUTPUT; dma_ioctl() 863 DMAbuf_launch_output(dev, dmap_out); dma_ioctl() 865 audio_devs[dev]->enable_bits &= ~PCM_ENABLE_OUTPUT; dma_ioctl() 869 if (changed && audio_devs[dev]->d->trigger) dma_ioctl() 870 audio_devs[dev]->d->trigger(dev, bits * audio_devs[dev]->go); dma_ioctl() 875 ret = audio_devs[dev]->enable_bits; dma_ioctl() 879 if (!audio_devs[dev]->d->trigger) dma_ioctl() 881 audio_devs[dev]->d->trigger(dev, 0); dma_ioctl() 882 audio_devs[dev]->go = 0; dma_ioctl() 886 if (!(audio_devs[dev]->open_mode & OPEN_READ)) dma_ioctl() 890 cinfo.ptr = DMAbuf_get_buffer_pointer(dev, dmap_in, DMODE_INPUT) & ~3; dma_ioctl() 903 if (!(audio_devs[dev]->open_mode & OPEN_WRITE)) dma_ioctl() 908 cinfo.ptr = DMAbuf_get_buffer_pointer(dev, dmap_out, DMODE_OUTPUT) & ~3; dma_ioctl() 921 if (!(audio_devs[dev]->open_mode & OPEN_WRITE)) dma_ioctl() 930 count = DMAbuf_get_buffer_pointer (dev, dmap_out, DMODE_OUTPUT); dma_ioctl() 943 if (audio_devs[dev]->dmap_out->qlen > 0) dma_ioctl() 944 if (!(audio_devs[dev]->dmap_out->flags & DMA_ACTIVE)) dma_ioctl() 945 DMAbuf_launch_output(dev, audio_devs[dev]->dmap_out); dma_ioctl() 950 if (audio_devs[dev]->open_mode & OPEN_WRITE) dma_ioctl() 951 reorganize_buffers(dev, dmap_out, (audio_devs[dev]->open_mode == OPEN_READ)); dma_ioctl() 952 if (audio_devs[dev]->open_mode == OPEN_READ \|\| dma_ioctl() 953 (audio_devs[dev]->flags & DMA_DUPLEX && dma_ioctl() 954 audio_devs[dev]->open_mode & OPEN_READ)) dma_ioctl() 955 reorganize_buffers(dev, dmap_in, (audio_devs[dev]->open_mode == OPEN_READ)); dma_ioctl() 956 if (audio_devs[dev]->open_mode == OPEN_READ) dma_ioctl() 965 if (audio_devs[dev]->open_mode & OPEN_WRITE) dma_ioctl() 966 ret = dma_set_fragment(dev, dmap_out, fact); dma_ioctl() 969 if (audio_devs[dev]->open_mode == OPEN_READ \|\| dma_ioctl() 970 (audio_devs[dev]->flags & DMA_DUPLEX && dma_ioctl() 971 audio_devs[dev]->open_mode & OPEN_READ)) dma_ioctl() 972 ret = dma_set_fragment(dev, dmap_in, fact); dma_ioctl() 980 if (!audio_devs[dev]->d->ioctl) dma_ioctl() 982 return audio_devs[dev]->d->ioctl(dev, cmd, arg); dma_ioctl()
H A D	msnd_pinnacle.c	73 dev.play_sample_size / 8 / \ 74 dev.play_sample_rate / \ 75 dev.play_channels) 78 dev.rec_sample_size / 8 / \ 79 dev.rec_sample_rate / \ 80 dev.rec_channels) 83 static multisound_dev_t dev; variable 93 static __inline__ int chk_send_dsp_cmd(multisound_dev_t dev, register BYTE cmd) chk_send_dsp_cmd() argument 95 if (msnd_send_dsp_cmd(dev, cmd) == 0) chk_send_dsp_cmd() 98 return msnd_send_dsp_cmd(dev, cmd); chk_send_dsp_cmd() 106 dev.last_playbank = -1; reset_play_queue() 107 writew(PCTODSP_OFFSET(0 DAQDS__size), dev.DAPQ + JQS_wHead); reset_play_queue() 108 writew(PCTODSP_OFFSET(0 * DAQDS__size), dev.DAPQ + JQS_wTail); reset_play_queue() 110 for (n = 0, lpDAQ = dev.base + DAPQ_DATA_BUFF; n < 3; ++n, lpDAQ += DAQDS__size) { reset_play_queue() 114 writew(dev.play_sample_size, lpDAQ + DAQDS_wSampleSize); reset_play_queue() 115 writew(dev.play_channels, lpDAQ + DAQDS_wChannels); reset_play_queue() 116 writew(dev.play_sample_rate, lpDAQ + DAQDS_wSampleRate); reset_play_queue() 128 dev.last_recbank = 2; reset_record_queue() 129 writew(PCTODSP_OFFSET(0 * DAQDS__size), dev.DARQ + JQS_wHead); reset_record_queue() 130 writew(PCTODSP_OFFSET(dev.last_recbank * DAQDS__size), dev.DARQ + JQS_wTail); reset_record_queue() 133 spin_lock_irqsave(&dev.lock, flags); reset_record_queue() 134 msnd_outb(HPBLKSEL_1, dev.io + HP_BLKS); reset_record_queue() 135 memset_io(dev.base, 0, DAR_BUFF_SIZE * 3); reset_record_queue() 136 msnd_outb(HPBLKSEL_0, dev.io + HP_BLKS); reset_record_queue() 137 spin_unlock_irqrestore(&dev.lock, flags); reset_record_queue() 139 for (n = 0, lpDAQ = dev.base + DARQ_DATA_BUFF; n < 3; ++n, lpDAQ += DAQDS__size) { reset_record_queue() 143 writew(dev.rec_sample_size, lpDAQ + DAQDS_wSampleSize); reset_record_queue() 144 writew(dev.rec_channels, lpDAQ + DAQDS_wChannels); reset_record_queue() 145 writew(dev.rec_sample_rate, lpDAQ + DAQDS_wSampleRate); reset_record_queue() 153 if (dev.mode & FMODE_WRITE) { reset_queues() 154 msnd_fifo_make_empty(&dev.DAPF); reset_queues() 157 if (dev.mode & FMODE_READ) { reset_queues() 158 msnd_fifo_make_empty(&dev.DARF); reset_queues() 168 lpDAQ = dev.base + DAPQ_DATA_BUFF; dsp_set_format() 169 lpDARQ = dev.base + DARQ_DATA_BUFF; dsp_set_format() 188 dev.play_sample_size = data; dsp_set_format() 190 dev.rec_sample_size = data; dsp_set_format() 198 size = dev.fifosize / 4; dsp_get_frag_size() 212 lpDAQ = dev.base + DAPQ_DATA_BUFF; dsp_ioctl() 213 lpDARQ = dev.base + DARQ_DATA_BUFF; dsp_ioctl() 231 spin_lock_irqsave(&dev.lock, flags); dsp_ioctl() 233 abinfo.bytes = dev.DAPF.n - dev.DAPF.len; dsp_ioctl() 234 abinfo.fragstotal = dev.DAPF.n / abinfo.fragsize; dsp_ioctl() 236 spin_unlock_irqrestore(&dev.lock, flags); dsp_ioctl() 242 spin_lock_irqsave(&dev.lock, flags); dsp_ioctl() 244 abinfo.bytes = dev.DARF.n - dev.DARF.len; dsp_ioctl() 245 abinfo.fragstotal = dev.DARF.n / abinfo.fragsize; dsp_ioctl() 247 spin_unlock_irqrestore(&dev.lock, flags); dsp_ioctl() 251 dev.nresets = 0; dsp_ioctl() 277 ? dev.play_sample_size dsp_ioctl() 281 ? dev.rec_sample_size dsp_ioctl() 289 if (!test_bit(F_DISABLE_WRITE_NDELAY, &dev.flags) && dsp_ioctl() 291 dev.play_ndelay = 1; dsp_ioctl() 293 dev.rec_ndelay = 1; dsp_ioctl() 321 dev.play_sample_rate = data; dsp_ioctl() 323 dev.rec_sample_rate = data; dsp_ioctl() 364 dev.play_channels = data; dsp_ioctl() 366 dev.rec_channels = data; dsp_ioctl() 391 return (dev.left_levels[d] >> 8) * 100 / 0xff \| mixer_get() 392 (((dev.right_levels[d] >> 8) * 100 / 0xff) << 8); mixer_get() 399 writew((dev.left_levels[a] >> 1) * \ 400 readw(dev.SMA + SMA_wCurrMastVolLeft) / 0xffff, \ 401 dev.SMA + SMA_##b##Left); \ 402 writew((dev.right_levels[a] >> 1) * \ 403 readw(dev.SMA + SMA_wCurrMastVolRight) / 0xffff, \ 404 dev.SMA + SMA_##b##Right); 407 writeb((dev.left_levels[d] >> 8) * \ 408 readw(dev.SMA + SMA_wCurrMastVolLeft) / 0xffff, \ 409 dev.SMA + SMA_##s##Left); \ 410 writeb((dev.right_levels[d] >> 8) * \ 411 readw(dev.SMA + SMA_wCurrMastVolRight) / 0xffff, \ 412 dev.SMA + SMA_##s##Right); \ 413 if (msnd_send_word(&dev, 0, 0, ar) == 0) \ 414 chk_send_dsp_cmd(&dev, HDEX_AUX_REQ); 417 writeb(dev.left_levels[d] >> 8, \ 418 dev.SMA + SMA_##s##Left); \ 419 writeb(dev.right_levels[d] >> 8, \ 420 dev.SMA + SMA_##s##Right); \ 421 if (msnd_send_word(&dev, 0, 0, ar) == 0) \ 422 chk_send_dsp_cmd(&dev, HDEX_AUX_REQ); 441 dev.left_levels[d] = wLeft; mixer_set() 442 dev.right_levels[d] = wRight; mixer_set() 448 writeb(bLeft, dev.SMA + SMA_bInPotPosLeft); mixer_set() 449 writeb(bRight, dev.SMA + SMA_bInPotPosRight); mixer_set() 450 if (msnd_send_word(&dev, 0, 0, HDEXAR_IN_SET_POTS) == 0) mixer_set() 451 chk_send_dsp_cmd(&dev, HDEX_AUX_REQ); mixer_set() 456 writeb(bLeft, dev.SMA + SMA_bMicPotPosLeft); mixer_set() 457 writeb(bRight, dev.SMA + SMA_bMicPotPosRight); mixer_set() 458 if (msnd_send_word(&dev, 0, 0, HDEXAR_MIC_SET_POTS) == 0) mixer_set() 459 chk_send_dsp_cmd(&dev, HDEX_AUX_REQ); mixer_set() 463 writew(wLeft, dev.SMA + SMA_wCurrMastVolLeft); mixer_set() 464 writew(wRight, dev.SMA + SMA_wCurrMastVolRight); mixer_set() 510 if (dev.recsrc == recsrc) set_recsrc() 511 return dev.recsrc; set_recsrc() 514 dev.recsrc = 0; set_recsrc() 517 dev.recsrc ^= recsrc; set_recsrc() 520 if (dev.recsrc & SOUND_MASK_IMIX) { set_recsrc() 521 if (msnd_send_word(&dev, 0, 0, HDEXAR_SET_ANA_IN) == 0) set_recsrc() 522 chk_send_dsp_cmd(&dev, HDEX_AUX_REQ); set_recsrc() 524 else if (dev.recsrc & SOUND_MASK_SYNTH) { set_recsrc() 525 if (msnd_send_word(&dev, 0, 0, HDEXAR_SET_SYNTH_IN) == 0) set_recsrc() 526 chk_send_dsp_cmd(&dev, HDEX_AUX_REQ); set_recsrc() 528 else if ((dev.recsrc & SOUND_MASK_DIGITAL1) && test_bit(F_HAVEDIGITAL, &dev.flags)) { set_recsrc() 529 if (msnd_send_word(&dev, 0, 0, HDEXAR_SET_DAT_IN) == 0) set_recsrc() 530 chk_send_dsp_cmd(&dev, HDEX_AUX_REQ); set_recsrc() 535 dev.recsrc = 0; set_recsrc() 537 dev.recsrc = SOUND_MASK_IMIX; set_recsrc() 538 if (msnd_send_word(&dev, 0, 0, HDEXAR_SET_ANA_IN) == 0) set_recsrc() 539 chk_send_dsp_cmd(&dev, HDEX_AUX_REQ); set_recsrc() 544 return dev.recsrc; set_recsrc() 549 dev.recsrc = 0; force_recsrc() 563 info.modify_counter = dev.mixer_mod_count; mixer_ioctl() 574 dev.nresets = 0; mixer_ioctl() 594 ++dev.mixer_mod_count; mixer_ioctl() 599 val = dev.recsrc; mixer_ioctl() 621 if (test_bit(F_HAVEDIGITAL, &dev.flags)) mixer_ioctl() 656 if (minor == dev.dsp_minor) dev_ioctl() 658 else if (minor == dev.mixer_minor) dev_ioctl() 667 int timeout = get_play_delay_jiffies(dev.DAPF.len); dsp_write_flush() 669 if (!(dev.mode & FMODE_WRITE) \|\| !test_bit(F_WRITING, &dev.flags)) dsp_write_flush() 671 set_bit(F_WRITEFLUSH, &dev.flags); dsp_write_flush() 673 dev.writeflush, dsp_write_flush() 674 !test_bit(F_WRITEFLUSH, &dev.flags), dsp_write_flush() 676 clear_bit(F_WRITEFLUSH, &dev.flags); dsp_write_flush() 681 clear_bit(F_WRITING, &dev.flags); dsp_write_flush() 686 if ((file ? file->f_mode : dev.mode) & FMODE_READ) { dsp_halt() 687 clear_bit(F_READING, &dev.flags); dsp_halt() 688 chk_send_dsp_cmd(&dev, HDEX_RECORD_STOP); dsp_halt() 689 msnd_disable_irq(&dev); dsp_halt() 692 dev.mode &= ~FMODE_READ; dsp_halt() 694 clear_bit(F_AUDIO_READ_INUSE, &dev.flags); dsp_halt() 696 if ((file ? file->f_mode : dev.mode) & FMODE_WRITE) { dsp_halt() 697 if (test_bit(F_WRITING, &dev.flags)) { dsp_halt() 699 chk_send_dsp_cmd(&dev, HDEX_PLAY_STOP); dsp_halt() 701 msnd_disable_irq(&dev); dsp_halt() 704 dev.mode &= ~FMODE_WRITE; dsp_halt() 706 clear_bit(F_AUDIO_WRITE_INUSE, &dev.flags); dsp_halt() 718 if ((file ? file->f_mode : dev.mode) & FMODE_WRITE) { dsp_open() 719 set_bit(F_AUDIO_WRITE_INUSE, &dev.flags); dsp_open() 720 clear_bit(F_WRITING, &dev.flags); dsp_open() 721 msnd_fifo_make_empty(&dev.DAPF); dsp_open() 725 dev.mode \|= FMODE_WRITE; dsp_open() 727 msnd_enable_irq(&dev); dsp_open() 729 if ((file ? file->f_mode : dev.mode) & FMODE_READ) { dsp_open() 730 set_bit(F_AUDIO_READ_INUSE, &dev.flags); dsp_open() 731 clear_bit(F_READING, &dev.flags); dsp_open() 732 msnd_fifo_make_empty(&dev.DARF); dsp_open() 736 dev.mode \|= FMODE_READ; dsp_open() 738 msnd_enable_irq(&dev); dsp_open() 745 dev.play_sample_size = DEFSAMPLESIZE; set_default_play_audio_parameters() 746 dev.play_sample_rate = DEFSAMPLERATE; set_default_play_audio_parameters() 747 dev.play_channels = DEFCHANNELS; set_default_play_audio_parameters() 752 dev.rec_sample_size = DEFSAMPLESIZE; set_default_rec_audio_parameters() 753 dev.rec_sample_rate = DEFSAMPLERATE; set_default_rec_audio_parameters() 754 dev.rec_channels = DEFCHANNELS; set_default_rec_audio_parameters() 769 if (minor == dev.dsp_minor) { dev_open() 771 test_bit(F_AUDIO_WRITE_INUSE, &dev.flags)) \|\| dev_open() 773 test_bit(F_AUDIO_READ_INUSE, &dev.flags))) { dev_open() 779 dev.nresets = 0; dev_open() 782 if (!test_bit(F_DISABLE_WRITE_NDELAY, &dev.flags)) dev_open() 783 dev.play_ndelay = (file->f_flags & O_NDELAY) ? 1 : 0; dev_open() 785 dev.play_ndelay = 0; dev_open() 789 dev.rec_ndelay = (file->f_flags & O_NDELAY) ? 1 : 0; dev_open() 793 else if (minor == dev.mixer_minor) { dev_open() 808 if (minor == dev.dsp_minor) dev_release() 810 else if (minor == dev.mixer_minor) { dev_release() 825 wTmp = readw(dev.DARQ + JQS_wTail) + PCTODSP_OFFSET(DAQDS__size); pack_DARQ_to_DARF() 826 if (wTmp > readw(dev.DARQ + JQS_wSize)) pack_DARQ_to_DARF() 828 while (wTmp == readw(dev.DARQ + JQS_wHead) && timeout--) pack_DARQ_to_DARF() 830 writew(wTmp, dev.DARQ + JQS_wTail); pack_DARQ_to_DARF() 833 DAQD = bank * DAQDS__size + dev.base + DARQ_DATA_BUFF; pack_DARQ_to_DARF() 840 msnd_outb(HPBLKSEL_1, dev.io + HP_BLKS); pack_DARQ_to_DARF() 842 &dev.DARF, pack_DARQ_to_DARF() 843 dev.base + bank * DAR_BUFF_SIZE, pack_DARQ_to_DARF() 845 msnd_outb(HPBLKSEL_0, dev.io + HP_BLKS); pack_DARQ_to_DARF() 856 DAPQ_tail = readw(dev.DAPQ + JQS_wTail); pack_DAPF_to_DAPQ() 857 while (DAPQ_tail != readw(dev.DAPQ + JQS_wHead) \|\| start) { pack_DAPF_to_DAPQ() 865 spin_lock_irqsave(&dev.lock, flags); pack_DAPF_to_DAPQ() 867 &dev.DAPF, pack_DAPF_to_DAPQ() 868 dev.base + bank_num * DAP_BUFF_SIZE, pack_DAPF_to_DAPQ() 870 spin_unlock_irqrestore(&dev.lock, flags); pack_DAPF_to_DAPQ() 873 &dev.DAPF, pack_DAPF_to_DAPQ() 874 dev.base + bank_num * DAP_BUFF_SIZE, pack_DAPF_to_DAPQ() 884 DAQD = bank_num * DAQDS__size + dev.base + DAPQ_DATA_BUFF; pack_DAPF_to_DAPQ() 892 writew(DAPQ_tail, dev.DAPQ + JQS_wTail); pack_DAPF_to_DAPQ() 894 msnd_send_dsp_cmd(&dev, HDEX_PLAY_START); pack_DAPF_to_DAPQ() 917 spin_lock_irqsave(&dev.lock, flags); dsp_read() 918 n = msnd_fifo_read(&dev.DARF, page, k); dsp_read() 919 spin_unlock_irqrestore(&dev.lock, flags); dsp_read() 930 if (!test_bit(F_READING, &dev.flags) && dev.mode & FMODE_READ) { dsp_read() 931 dev.last_recbank = -1; dsp_read() 932 if (chk_send_dsp_cmd(&dev, HDEX_RECORD_START) == 0) dsp_read() 933 set_bit(F_READING, &dev.flags); dsp_read() 936 if (dev.rec_ndelay) { dsp_read() 942 set_bit(F_READBLOCK, &dev.flags); dsp_read() 944 dev.readblock, dsp_read() 945 test_bit(F_READBLOCK, &dev.flags), dsp_read() 947 clear_bit(F_READING, &dev.flags); dsp_read() 981 spin_lock_irqsave(&dev.lock, flags); dsp_write() 982 n = msnd_fifo_write(&dev.DAPF, page, k); dsp_write() 983 spin_unlock_irqrestore(&dev.lock, flags); dsp_write() 990 if (!test_bit(F_WRITING, &dev.flags) && (dev.mode & FMODE_WRITE)) { dsp_write() 991 dev.last_playbank = -1; dsp_write() 993 set_bit(F_WRITING, &dev.flags); dsp_write() 996 if (dev.play_ndelay) { dsp_write() 1002 set_bit(F_WRITEBLOCK, &dev.flags); dsp_write() 1004 dev.writeblock, dsp_write() 1005 test_bit(F_WRITEBLOCK, &dev.flags), dsp_write() 1021 if (minor == dev.dsp_minor) dev_read() 1030 if (minor == dev.dsp_minor) dev_write() 1040 if (dev.last_playbank == LOBYTE(wMessage) \|\| !test_bit(F_WRITING, &dev.flags)) eval_dsp_msg() 1042 dev.last_playbank = LOBYTE(wMessage); eval_dsp_msg() 1045 if (!test_bit(F_WRITEBLOCK, &dev.flags)) { eval_dsp_msg() 1046 if (test_and_clear_bit(F_WRITEFLUSH, &dev.flags)) eval_dsp_msg() 1047 wake_up_interruptible(&dev.writeflush); eval_dsp_msg() 1049 clear_bit(F_WRITING, &dev.flags); eval_dsp_msg() 1052 if (test_and_clear_bit(F_WRITEBLOCK, &dev.flags)) eval_dsp_msg() 1053 wake_up_interruptible(&dev.writeblock); eval_dsp_msg() 1057 if (dev.last_recbank == LOBYTE(wMessage)) eval_dsp_msg() 1059 dev.last_recbank = LOBYTE(wMessage); eval_dsp_msg() 1061 pack_DARQ_to_DARF(dev.last_recbank); eval_dsp_msg() 1063 if (test_and_clear_bit(F_READBLOCK, &dev.flags)) eval_dsp_msg() 1064 wake_up_interruptible(&dev.readblock); eval_dsp_msg() 1074 clear_bit(F_WRITING, &dev.flags); eval_dsp_msg() 1079 clear_bit(F_READING, &dev.flags); eval_dsp_msg() 1090 if (dev.midi_in_interrupt) eval_dsp_msg() 1091 (dev.midi_in_interrupt)(&dev); eval_dsp_msg() 1103 msnd_inb(dev.io + HP_RXL); intr() 1106 while (readw(dev.DSPQ + JQS_wTail) != readw(dev.DSPQ + JQS_wHead)) { intr() 1109 eval_dsp_msg(readw(dev.pwDSPQData + 2readw(dev.DSPQ + JQS_wHead))); intr() 1111 if ((wTmp = readw(dev.DSPQ + JQS_wHead) + 1) > readw(dev.DSPQ + JQS_wSize)) intr() 1112 writew(0, dev.DSPQ + JQS_wHead); intr() 1114 writew(wTmp, dev.DSPQ + JQS_wHead); intr() 1133 msnd_outb(HPDSPRESET_ON, dev.io + HP_DSPR); reset_dsp() 1136 dev.info = msnd_inb(dev.io + HP_INFO); reset_dsp() 1138 msnd_outb(HPDSPRESET_OFF, dev.io + HP_DSPR); reset_dsp() 1141 if (msnd_inb(dev.io + HP_CVR) == HP_CVR_DEF) reset_dsp() 1158 if (!request_region(dev.io, dev.numio, "probing")) { probe_multisound() 1164 release_region(dev.io, dev.numio); probe_multisound() 1169 dev.name = "Classic/Tahiti/Monterey"; probe_multisound() 1172 switch (dev.info >> 4) { probe_multisound() 1180 switch (dev.info & 0x7) { probe_multisound() 1181 case 0x0: rev = "I"; dev.name = pin; break; probe_multisound() 1182 case 0x1: rev = "F"; dev.name = pin; break; probe_multisound() 1183 case 0x2: rev = "G"; dev.name = pin; break; probe_multisound() 1184 case 0x3: rev = "H"; dev.name = pin; break; probe_multisound() 1185 case 0x4: rev = "E"; dev.name = fiji; break; probe_multisound() 1186 case 0x5: rev = "C"; dev.name = fiji; break; probe_multisound() 1187 case 0x6: rev = "D"; dev.name = fiji; break; probe_multisound() 1190 dev.name = pinfiji; probe_multisound() 1196 dev.name, probe_multisound() 1200 dev.io, dev.io + dev.numio - 1, probe_multisound() 1201 dev.irq, probe_multisound() 1202 dev.base, dev.base + 0x7fff); probe_multisound() 1204 release_region(dev.io, dev.numio); probe_multisound() 1215 msnd_outb(dev.memid, dev.io + HP_MEMM); init_sma() 1217 msnd_outb(HPBLKSEL_0, dev.io + HP_BLKS); init_sma() 1219 mastVolLeft = readw(dev.SMA + SMA_wCurrMastVolLeft); init_sma() 1220 mastVolRight = readw(dev.SMA + SMA_wCurrMastVolRight); init_sma() 1223 memset_io(dev.base, 0, 0x8000); init_sma() 1226 spin_lock_irqsave(&dev.lock, flags); init_sma() 1227 msnd_outb(HPBLKSEL_1, dev.io + HP_BLKS); init_sma() 1228 memset_io(dev.base, 0, 0x8000); init_sma() 1229 msnd_outb(HPBLKSEL_0, dev.io + HP_BLKS); init_sma() 1230 spin_unlock_irqrestore(&dev.lock, flags); init_sma() 1232 dev.pwDSPQData = (dev.base + DSPQ_DATA_BUFF); init_sma() 1233 dev.pwMODQData = (dev.base + MODQ_DATA_BUFF); init_sma() 1234 dev.pwMIDQData = (dev.base + MIDQ_DATA_BUFF); init_sma() 1237 dev.SMA = dev.base + SMA_STRUCT_START; init_sma() 1240 dev.DAPQ = dev.base + DAPQ_OFFSET; init_sma() 1241 msnd_init_queue(dev.DAPQ, DAPQ_DATA_BUFF, DAPQ_BUFF_SIZE); init_sma() 1244 dev.DARQ = dev.base + DARQ_OFFSET; init_sma() 1245 msnd_init_queue(dev.DARQ, DARQ_DATA_BUFF, DARQ_BUFF_SIZE); init_sma() 1248 dev.MODQ = dev.base + MODQ_OFFSET; init_sma() 1249 msnd_init_queue(dev.MODQ, MODQ_DATA_BUFF, MODQ_BUFF_SIZE); init_sma() 1252 dev.MIDQ = dev.base + MIDQ_OFFSET; init_sma() 1253 msnd_init_queue(dev.MIDQ, MIDQ_DATA_BUFF, MIDQ_BUFF_SIZE); init_sma() 1256 dev.DSPQ = dev.base + DSPQ_OFFSET; init_sma() 1257 msnd_init_queue(dev.DSPQ, DSPQ_DATA_BUFF, DSPQ_BUFF_SIZE); init_sma() 1261 writew(1, dev.SMA + SMA_wCurrPlayFormat); init_sma() 1262 writew(dev.play_sample_size, dev.SMA + SMA_wCurrPlaySampleSize); init_sma() 1263 writew(dev.play_channels, dev.SMA + SMA_wCurrPlayChannels); init_sma() 1264 writew(dev.play_sample_rate, dev.SMA + SMA_wCurrPlaySampleRate); init_sma() 1266 writew(dev.play_sample_rate, dev.SMA + SMA_wCalFreqAtoD); init_sma() 1267 writew(mastVolLeft, dev.SMA + SMA_wCurrMastVolLeft); init_sma() 1268 writew(mastVolRight, dev.SMA + SMA_wCurrMastVolRight); init_sma() 1270 writel(0x00010000, dev.SMA + SMA_dwCurrPlayPitch); init_sma() 1271 writel(0x00000001, dev.SMA + SMA_dwCurrPlayRate); init_sma() 1273 writew(0x303, dev.SMA + SMA_wCurrInputTagBits); init_sma() 1282 writew(srate, dev.SMA + SMA_wCalFreqAtoD); calibrate_adc() 1283 if (dev.calibrate_signal == 0) calibrate_adc() 1284 writew(readw(dev.SMA + SMA_wCurrHostStatusFlags) calibrate_adc() 1285 \| 0x0001, dev.SMA + SMA_wCurrHostStatusFlags); calibrate_adc() 1287 writew(readw(dev.SMA + SMA_wCurrHostStatusFlags) calibrate_adc() 1288 & ~0x0001, dev.SMA + SMA_wCurrHostStatusFlags); calibrate_adc() 1289 if (msnd_send_word(&dev, 0, 0, HDEXAR_CAL_A_TO_D) == 0 && calibrate_adc() 1290 chk_send_dsp_cmd(&dev, HDEX_AUX_REQ) == 0) { calibrate_adc() 1304 msnd_outb(HPBLKSEL_0, dev.io + HP_BLKS); upload_dsp_code() 1319 memcpy_toio(dev.base, PERMCODE, PERMCODESIZE); upload_dsp_code() 1320 if (msnd_upload_host(&dev, INITCODE, INITCODESIZE) < 0) { upload_dsp_code() 1343 msnd_outb(HPPRORESET_ON, dev.io + HP_PROR); reset_proteus() 1345 msnd_outb(HPPRORESET_OFF, dev.io + HP_PROR); reset_proteus() 1355 msnd_outb(HPWAITSTATE_0, dev.io + HP_WAIT); initialize() 1356 msnd_outb(HPBITMODE_16, dev.io + HP_BITM); initialize() 1374 while (readw(dev.base)) { initialize() 1391 if (test_bit(F_RESETTING, &dev.flags) \|\| ++dev.nresets > 10) dsp_full_reset() 1394 set_bit(F_RESETTING, &dev.flags); dsp_full_reset() 1399 force_recsrc(dev.recsrc); dsp_full_reset() 1401 clear_bit(F_RESETTING, &dev.flags); dsp_full_reset() 1410 if ((err = request_irq(dev.irq, intr, 0, dev.name, &dev)) < 0) { attach_multisound() 1411 printk(KERN_ERR LOGNAME ": Couldn't grab IRQ %d\n", dev.irq); attach_multisound() 1414 if (request_region(dev.io, dev.numio, dev.name) == NULL) { attach_multisound() 1415 free_irq(dev.irq, &dev); attach_multisound() 1421 release_region(dev.io, dev.numio); attach_multisound() 1422 free_irq(dev.irq, &dev); attach_multisound() 1426 if ((err = msnd_register(&dev)) < 0) { attach_multisound() 1428 release_region(dev.io, dev.numio); attach_multisound() 1429 free_irq(dev.irq, &dev); attach_multisound() 1433 if ((dev.dsp_minor = register_sound_dsp(&dev_fileops, -1)) < 0) { attach_multisound() 1435 msnd_unregister(&dev); attach_multisound() 1436 release_region(dev.io, dev.numio); attach_multisound() 1437 free_irq(dev.irq, &dev); attach_multisound() 1438 return dev.dsp_minor; attach_multisound() 1441 if ((dev.mixer_minor = register_sound_mixer(&dev_fileops, -1)) < 0) { attach_multisound() 1443 unregister_sound_mixer(dev.mixer_minor); attach_multisound() 1444 msnd_unregister(&dev); attach_multisound() 1445 release_region(dev.io, dev.numio); attach_multisound() 1446 free_irq(dev.irq, &dev); attach_multisound() 1447 return dev.mixer_minor; attach_multisound() 1450 dev.ext_midi_dev = dev.hdr_midi_dev = -1; attach_multisound() 1452 disable_irq(dev.irq); attach_multisound() 1453 calibrate_adc(dev.play_sample_rate); attach_multisound() 1463 release_region(dev.io, dev.numio); unload_multisound() 1464 free_irq(dev.irq, &dev); unload_multisound() 1465 unregister_sound_mixer(dev.mixer_minor); unload_multisound() 1466 unregister_sound_dsp(dev.dsp_minor); unload_multisound() 1467 msnd_unregister(&dev); unload_multisound() 1808 case 5: dev.irqid = HPIRQ_5; break; msnd_init() 1809 case 7: dev.irqid = HPIRQ_7; break; msnd_init() 1810 case 9: dev.irqid = HPIRQ_9; break; msnd_init() 1811 case 10: dev.irqid = HPIRQ_10; break; msnd_init() 1812 case 11: dev.irqid = HPIRQ_11; break; msnd_init() 1813 case 12: dev.irqid = HPIRQ_12; break; msnd_init() 1817 case 0xb0000: dev.memid = HPMEM_B000; break; msnd_init() 1818 case 0xc8000: dev.memid = HPMEM_C800; break; msnd_init() 1819 case 0xd0000: dev.memid = HPMEM_D000; break; msnd_init() 1820 case 0xd8000: dev.memid = HPMEM_D800; break; msnd_init() 1821 case 0xe0000: dev.memid = HPMEM_E000; break; msnd_init() 1822 case 0xe8000: dev.memid = HPMEM_E800; break; msnd_init() 1874 dev.type = msndClassic; msnd_init() 1876 dev.type = msndPinnacle; msnd_init() 1878 dev.io = io; msnd_init() 1879 dev.numio = DSP_NUMIO; msnd_init() 1880 dev.irq = irq; msnd_init() 1881 dev.base = ioremap(mem, 0x8000); msnd_init() 1882 dev.fifosize = fifosize * 1024; msnd_init() 1883 dev.calibrate_signal = calibrate_signal ? 1 : 0; msnd_init() 1884 dev.recsrc = 0; msnd_init() 1885 dev.dspq_data_buff = DSPQ_DATA_BUFF; msnd_init() 1886 dev.dspq_buff_size = DSPQ_BUFF_SIZE; msnd_init() 1890 clear_bit(F_DISABLE_WRITE_NDELAY, &dev.flags); msnd_init() 1892 set_bit(F_DISABLE_WRITE_NDELAY, &dev.flags); msnd_init() 1895 set_bit(F_HAVEDIGITAL, &dev.flags); msnd_init() 1897 init_waitqueue_head(&dev.writeblock); msnd_init() 1898 init_waitqueue_head(&dev.readblock); msnd_init() 1899 init_waitqueue_head(&dev.writeflush); msnd_init() 1900 msnd_fifo_init(&dev.DAPF); msnd_init() 1901 msnd_fifo_init(&dev.DARF); msnd_init() 1902 spin_lock_init(&dev.lock); msnd_init() 1903 printk(KERN_INFO LOGNAME ": %u byte audio FIFOs (x2)\n", dev.fifosize); msnd_init() 1904 if ((err = msnd_fifo_alloc(&dev.DAPF, dev.fifosize)) < 0) { msnd_init() 1909 if ((err = msnd_fifo_alloc(&dev.DARF, dev.fifosize)) < 0) { msnd_init() 1911 msnd_fifo_free(&dev.DAPF); msnd_init() 1917 msnd_fifo_free(&dev.DAPF); msnd_init() 1918 msnd_fifo_free(&dev.DARF); msnd_init() 1924 msnd_fifo_free(&dev.DAPF); msnd_init() 1925 msnd_fifo_free(&dev.DARF); msnd_init() 1935 msnd_fifo_free(&dev.DAPF); msdn_cleanup() 1936 msnd_fifo_free(&dev.DARF); msdn_cleanup()
/linux-4.1.27/drivers/pnp/
H A D	core.c	79 dev_set_name(&protocol->dev, "pnp%d", nodenum); pnp_register_protocol() 85 ret = device_register(&protocol->dev); pnp_register_protocol() 99 device_unregister(&protocol->dev); pnp_unregister_protocol() 102 static void pnp_free_ids(struct pnp_dev dev) pnp_free_ids() argument 107 id = dev->id; pnp_free_ids() 121 void pnp_free_resources(struct pnp_dev dev) pnp_free_resources() argument 125 list_for_each_entry_safe(pnp_res, tmp, &dev->resources, list) { pnp_free_resources() 132 struct pnp_dev dev = to_pnp_dev(dmdev); pnp_release_device() local 134 pnp_free_ids(dev); pnp_release_device() 135 pnp_free_resources(dev); pnp_release_device() 136 pnp_free_options(dev); pnp_release_device() 137 kfree(dev); pnp_release_device() 143 struct pnp_dev dev; pnp_alloc_dev() local 146 dev = kzalloc(sizeof(struct pnp_dev), GFP_KERNEL); pnp_alloc_dev() 147 if (!dev) pnp_alloc_dev() 150 INIT_LIST_HEAD(&dev->resources); pnp_alloc_dev() 151 INIT_LIST_HEAD(&dev->options); pnp_alloc_dev() 152 dev->protocol = protocol; pnp_alloc_dev() 153 dev->number = id; pnp_alloc_dev() 154 dev->dma_mask = DMA_BIT_MASK(24); pnp_alloc_dev() 156 dev->dev.parent = &dev->protocol->dev; pnp_alloc_dev() 157 dev->dev.bus = &pnp_bus_type; pnp_alloc_dev() 158 dev->dev.dma_mask = &dev->dma_mask; pnp_alloc_dev() 159 dev->dev.coherent_dma_mask = dev->dma_mask; pnp_alloc_dev() 160 dev->dev.release = &pnp_release_device; pnp_alloc_dev() 162 dev_set_name(&dev->dev, "%02x:%02x", dev->protocol->number, dev->number); pnp_alloc_dev() 164 dev_id = pnp_add_id(dev, pnpid); pnp_alloc_dev() 166 kfree(dev); pnp_alloc_dev() 170 return dev; pnp_alloc_dev() 173 static void pnp_delist_device(struct pnp_dev dev) pnp_delist_device() argument 176 list_del(&dev->global_list); pnp_delist_device() 177 list_del(&dev->protocol_list); pnp_delist_device() 181 int __pnp_add_device(struct pnp_dev dev) __pnp_add_device() argument 185 pnp_fixup_device(dev); __pnp_add_device() 186 dev->status = PNP_READY; __pnp_add_device() 190 list_add_tail(&dev->global_list, &pnp_global); __pnp_add_device() 191 list_add_tail(&dev->protocol_list, &dev->protocol->devices); __pnp_add_device() 195 ret = device_register(&dev->dev); __pnp_add_device() 197 pnp_delist_device(dev); __pnp_add_device() 198 else if (dev->protocol->can_wakeup) __pnp_add_device() 199 device_set_wakeup_capable(&dev->dev, __pnp_add_device() 200 dev->protocol->can_wakeup(dev)); __pnp_add_device() 207 * @dev: pointer to dev to add 211 int pnp_add_device(struct pnp_dev dev) pnp_add_device() argument 218 if (dev->card) pnp_add_device() 221 ret = __pnp_add_device(dev); pnp_add_device() 226 for (id = dev->id; id; id = id->next) pnp_add_device() 229 dev_printk(KERN_DEBUG, &dev->dev, "%s device, IDs%s (%s)\n", pnp_add_device() 230 dev->protocol->name, buf, pnp_add_device() 231 dev->active ? "active" : "disabled"); pnp_add_device() 235 void __pnp_remove_device(struct pnp_dev dev) __pnp_remove_device() argument 237 pnp_delist_device(dev); __pnp_remove_device() 238 device_unregister(&dev->dev); __pnp_remove_device()
H A D	manager.c	21 static struct resource pnp_find_resource(struct pnp_dev dev, pnp_find_resource() argument 26 struct resource res = pnp_get_resource(dev, type, bar); pnp_find_resource() 37 static int pnp_assign_port(struct pnp_dev dev, struct pnp_port rule, int idx) pnp_assign_port() argument 41 res = pnp_find_resource(dev, rule->flags, IORESOURCE_IO, idx); pnp_assign_port() 43 pnp_dbg(&dev->dev, " io %d already set to %#llx-%#llx " pnp_assign_port() 56 pnp_dbg(&dev->dev, " io %d disabled\n", idx); pnp_assign_port() 63 while (!pnp_check_port(dev, res)) { pnp_assign_port() 67 pnp_dbg(&dev->dev, " couldn't assign io %d " pnp_assign_port() 76 pnp_add_io_resource(dev, res->start, res->end, res->flags); pnp_assign_port() 80 static int pnp_assign_mem(struct pnp_dev dev, struct pnp_mem rule, int idx) pnp_assign_mem() argument 84 res = pnp_find_resource(dev, rule->flags, IORESOURCE_MEM, idx); pnp_assign_mem() 86 pnp_dbg(&dev->dev, " mem %d already set to %#llx-%#llx " pnp_assign_mem() 109 pnp_dbg(&dev->dev, " mem %d disabled\n", idx); pnp_assign_mem() 116 while (!pnp_check_mem(dev, res)) { pnp_assign_mem() 120 pnp_dbg(&dev->dev, " couldn't assign mem %d " pnp_assign_mem() 129 pnp_add_mem_resource(dev, res->start, res->end, res->flags); pnp_assign_mem() 133 static int pnp_assign_irq(struct pnp_dev dev, struct pnp_irq rule, int idx) pnp_assign_irq() argument 143 res = pnp_find_resource(dev, rule->flags, IORESOURCE_IRQ, idx); pnp_assign_irq() 145 pnp_dbg(&dev->dev, " irq %d already set to %d flags %#lx\n", pnp_assign_irq() 157 pnp_dbg(&dev->dev, " irq %d disabled\n", idx); pnp_assign_irq() 170 if (pnp_check_irq(dev, res)) pnp_assign_irq() 179 pnp_dbg(&dev->dev, " irq %d disabled (optional)\n", idx); pnp_assign_irq() 183 pnp_dbg(&dev->dev, " couldn't assign irq %d\n", idx); pnp_assign_irq() 187 pnp_add_irq_resource(dev, res->start, res->flags); pnp_assign_irq() 192 static int pnp_assign_dma(struct pnp_dev dev, struct pnp_dma rule, int idx) pnp_assign_dma() argument 202 res = pnp_find_resource(dev, rule->flags, IORESOURCE_DMA, idx); pnp_assign_dma() 204 pnp_dbg(&dev->dev, " dma %d already set to %d flags %#lx\n", pnp_assign_dma() 216 pnp_dbg(&dev->dev, " dma %d disabled\n", idx); pnp_assign_dma() 223 if (pnp_check_dma(dev, res)) pnp_assign_dma() 228 pnp_dbg(&dev->dev, " couldn't assign dma %d\n", idx); pnp_assign_dma() 232 pnp_add_dma_resource(dev, res->start, res->flags); pnp_assign_dma() 237 void pnp_init_resources(struct pnp_dev dev) pnp_init_resources() argument 239 pnp_free_resources(dev); pnp_init_resources() 242 static void pnp_clean_resource_table(struct pnp_dev dev) pnp_clean_resource_table() argument 246 list_for_each_entry_safe(pnp_res, tmp, &dev->resources, list) { pnp_clean_resource_table() 254 @dev: pointer to the desired device 257 static int pnp_assign_resources(struct pnp_dev dev, int set) pnp_assign_resources() argument 264 pnp_dbg(&dev->dev, "pnp_assign_resources, try dependent set %d\n", set); pnp_assign_resources() 266 pnp_clean_resource_table(dev); pnp_assign_resources() 268 list_for_each_entry(option, &dev->options, list) { pnp_assign_resources() 275 ret = pnp_assign_port(dev, &option->u.port, nport++); pnp_assign_resources() 278 ret = pnp_assign_mem(dev, &option->u.mem, nmem++); pnp_assign_resources() 281 ret = pnp_assign_irq(dev, &option->u.irq, nirq++); pnp_assign_resources() 285 ret = pnp_assign_dma(dev, &option->u.dma, ndma++); pnp_assign_resources() 298 pnp_dbg(&dev->dev, "pnp_assign_resources failed (%d)\n", ret); pnp_assign_resources() 299 pnp_clean_resource_table(dev); pnp_assign_resources() 301 dbg_pnp_show_resources(dev, "pnp_assign_resources succeeded"); pnp_assign_resources() 307 @dev: pointer to the desired device 309 int pnp_auto_config_dev(struct pnp_dev dev) pnp_auto_config_dev() argument 313 if (!pnp_can_configure(dev)) { pnp_auto_config_dev() 314 pnp_dbg(&dev->dev, "configuration not supported\n"); pnp_auto_config_dev() 318 ret = pnp_assign_resources(dev, 0); pnp_auto_config_dev() 322 for (i = 1; i < dev->num_dependent_sets; i++) { pnp_auto_config_dev() 323 ret = pnp_assign_resources(dev, i); pnp_auto_config_dev() 328 dev_err(&dev->dev, "unable to assign resources\n"); pnp_auto_config_dev() 334 @dev: pointer to the desired device 338 int pnp_start_dev(struct pnp_dev dev) pnp_start_dev() argument 340 if (!pnp_can_write(dev)) { pnp_start_dev() 341 pnp_dbg(&dev->dev, "activation not supported\n"); pnp_start_dev() 345 dbg_pnp_show_resources(dev, "pnp_start_dev"); pnp_start_dev() 346 if (dev->protocol->set(dev) < 0) { pnp_start_dev() 347 dev_err(&dev->dev, "activation failed\n"); pnp_start_dev() 351 dev_info(&dev->dev, "activated\n"); pnp_start_dev() 357 @dev: pointer to the desired device 361 int pnp_stop_dev(struct pnp_dev dev) pnp_stop_dev() argument 363 if (!pnp_can_disable(dev)) { pnp_stop_dev() 364 pnp_dbg(&dev->dev, "disabling not supported\n"); pnp_stop_dev() 367 if (dev->protocol->disable(dev) < 0) { pnp_stop_dev() 368 dev_err(&dev->dev, "disable failed\n"); pnp_stop_dev() 372 dev_info(&dev->dev, "disabled\n"); pnp_stop_dev() 378 @dev: pointer to the desired device 382 int pnp_activate_dev(struct pnp_dev dev) pnp_activate_dev() argument 386 if (dev->active) pnp_activate_dev() 390 if (pnp_auto_config_dev(dev)) pnp_activate_dev() 393 error = pnp_start_dev(dev); pnp_activate_dev() 397 dev->active = 1; pnp_activate_dev() 403 @dev: pointer to the desired device 407 int pnp_disable_dev(struct pnp_dev *dev) pnp_disable_dev() argument 411 if (!dev->active) pnp_disable_dev() 414 error = pnp_stop_dev(dev); pnp_disable_dev() 418 dev->active = 0; pnp_disable_dev() 422 pnp_clean_resource_table(dev); pnp_disable_dev()
/linux-4.1.27/drivers/net/ethernet/mellanox/mlx4/
H A D	main.c	171 int mlx4_check_port_params(struct mlx4_dev dev, mlx4_check_port_params() argument 176 if (!(dev->caps.flags & MLX4_DEV_CAP_FLAG_DPDP)) { mlx4_check_port_params() 177 for (i = 0; i < dev->caps.num_ports - 1; i++) { mlx4_check_port_params() 179 mlx4_err(dev, "Only same port types supported on this HCA, aborting\n"); mlx4_check_port_params() 185 for (i = 0; i < dev->caps.num_ports; i++) { mlx4_check_port_params() 186 if (!(port_type[i] & dev->caps.supported_type[i+1])) { mlx4_check_port_params() 187 mlx4_err(dev, "Requested port type for port %d is not supported on this HCA\n", mlx4_check_port_params() 195 static void mlx4_set_port_mask(struct mlx4_dev dev) mlx4_set_port_mask() argument 199 for (i = 1; i <= dev->caps.num_ports; ++i) mlx4_set_port_mask() 200 dev->caps.port_mask[i] = dev->caps.port_type[i]; mlx4_set_port_mask() 207 static int mlx4_query_func(struct mlx4_dev dev, struct mlx4_dev_cap dev_cap) mlx4_query_func() argument 212 if (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_SYS_EQS) { mlx4_query_func() 213 err = mlx4_QUERY_FUNC(dev, &func, 0); mlx4_query_func() 215 mlx4_err(dev, "QUERY_DEV_CAP command failed, aborting.\n"); mlx4_query_func() 226 static void mlx4_enable_cqe_eqe_stride(struct mlx4_dev dev) mlx4_enable_cqe_eqe_stride() argument 228 struct mlx4_caps dev_cap = &dev->caps; mlx4_enable_cqe_eqe_stride() 246 mlx4_dbg(dev, "Enabling CQE stride cacheLine supported\n"); mlx4_enable_cqe_eqe_stride() 251 if (mlx4_is_master(dev)) mlx4_enable_cqe_eqe_stride() 255 mlx4_dbg(dev, "Disabling CQE stride, cacheLine size unsupported\n"); mlx4_enable_cqe_eqe_stride() 261 static int _mlx4_dev_port(struct mlx4_dev dev, int port, _mlx4_dev_port() argument 264 dev->caps.vl_cap[port] = port_cap->max_vl; _mlx4_dev_port() 265 dev->caps.ib_mtu_cap[port] = port_cap->ib_mtu; _mlx4_dev_port() 266 dev->phys_caps.gid_phys_table_len[port] = port_cap->max_gids; _mlx4_dev_port() 267 dev->phys_caps.pkey_phys_table_len[port] = port_cap->max_pkeys; _mlx4_dev_port() 271 dev->caps.gid_table_len[port] = port_cap->max_gids; _mlx4_dev_port() 272 dev->caps.pkey_table_len[port] = port_cap->max_pkeys; _mlx4_dev_port() 273 dev->caps.port_width_cap[port] = port_cap->max_port_width; _mlx4_dev_port() 274 dev->caps.eth_mtu_cap[port] = port_cap->eth_mtu; _mlx4_dev_port() 275 dev->caps.def_mac[port] = port_cap->def_mac; _mlx4_dev_port() 276 dev->caps.supported_type[port] = port_cap->supported_port_types; _mlx4_dev_port() 277 dev->caps.suggested_type[port] = port_cap->suggested_type; _mlx4_dev_port() 278 dev->caps.default_sense[port] = port_cap->default_sense; _mlx4_dev_port() 279 dev->caps.trans_type[port] = port_cap->trans_type; _mlx4_dev_port() 280 dev->caps.vendor_oui[port] = port_cap->vendor_oui; _mlx4_dev_port() 281 dev->caps.wavelength[port] = port_cap->wavelength; _mlx4_dev_port() 282 dev->caps.trans_code[port] = port_cap->trans_code; _mlx4_dev_port() 287 static int mlx4_dev_port(struct mlx4_dev dev, int port, mlx4_dev_port() argument 292 err = mlx4_QUERY_PORT(dev, port, port_cap); mlx4_dev_port() 295 mlx4_err(dev, "QUERY_PORT command failed.\n"); mlx4_dev_port() 300 static inline void mlx4_enable_ignore_fcs(struct mlx4_dev dev) mlx4_enable_ignore_fcs() argument 302 if (!(dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_IGNORE_FCS)) mlx4_enable_ignore_fcs() 305 if (mlx4_is_mfunc(dev)) { mlx4_enable_ignore_fcs() 306 mlx4_dbg(dev, "SRIOV mode - Disabling Ignore FCS"); mlx4_enable_ignore_fcs() 307 dev->caps.flags2 &= ~MLX4_DEV_CAP_FLAG2_IGNORE_FCS; mlx4_enable_ignore_fcs() 311 if (!(dev->caps.flags & MLX4_DEV_CAP_FLAG_FCS_KEEP)) { mlx4_enable_ignore_fcs() 312 mlx4_dbg(dev, mlx4_enable_ignore_fcs() 314 dev->caps.flags2 &= ~MLX4_DEV_CAP_FLAG2_IGNORE_FCS; mlx4_enable_ignore_fcs() 320 static int mlx4_dev_cap(struct mlx4_dev dev, struct mlx4_dev_cap dev_cap) mlx4_dev_cap() argument 325 err = mlx4_QUERY_DEV_CAP(dev, dev_cap); mlx4_dev_cap() 327 mlx4_err(dev, "QUERY_DEV_CAP command failed, aborting\n"); mlx4_dev_cap() 330 mlx4_dev_cap_dump(dev, dev_cap); mlx4_dev_cap() 333 mlx4_err(dev, "HCA minimum page size of %d bigger than kernel PAGE_SIZE of %ld, aborting\n", mlx4_dev_cap() 338 mlx4_err(dev, "HCA has %d ports, but we only support %d, aborting\n", mlx4_dev_cap() 343 if (dev_cap->uar_size > pci_resource_len(dev->persist->pdev, 2)) { mlx4_dev_cap() 344 mlx4_err(dev, "HCA reported UAR size of 0x%x bigger than PCI resource 2 size of 0x%llx, aborting\n", mlx4_dev_cap() 347 pci_resource_len(dev->persist->pdev, 2)); mlx4_dev_cap() 351 dev->caps.num_ports = dev_cap->num_ports; mlx4_dev_cap() 352 dev->caps.num_sys_eqs = dev_cap->num_sys_eqs; mlx4_dev_cap() 353 dev->phys_caps.num_phys_eqs = dev_cap->flags2 & MLX4_DEV_CAP_FLAG2_SYS_EQS ? mlx4_dev_cap() 354 dev->caps.num_sys_eqs : mlx4_dev_cap() 356 for (i = 1; i <= dev->caps.num_ports; ++i) { mlx4_dev_cap() 357 err = _mlx4_dev_port(dev, i, dev_cap->port_cap + i); mlx4_dev_cap() 359 mlx4_err(dev, "QUERY_PORT command failed, aborting\n"); mlx4_dev_cap() 364 dev->caps.uar_page_size = PAGE_SIZE; mlx4_dev_cap() 365 dev->caps.num_uars = dev_cap->uar_size / PAGE_SIZE; mlx4_dev_cap() 366 dev->caps.local_ca_ack_delay = dev_cap->local_ca_ack_delay; mlx4_dev_cap() 367 dev->caps.bf_reg_size = dev_cap->bf_reg_size; mlx4_dev_cap() 368 dev->caps.bf_regs_per_page = dev_cap->bf_regs_per_page; mlx4_dev_cap() 369 dev->caps.max_sq_sg = dev_cap->max_sq_sg; mlx4_dev_cap() 370 dev->caps.max_rq_sg = dev_cap->max_rq_sg; mlx4_dev_cap() 371 dev->caps.max_wqes = dev_cap->max_qp_sz; mlx4_dev_cap() 372 dev->caps.max_qp_init_rdma = dev_cap->max_requester_per_qp; mlx4_dev_cap() 373 dev->caps.max_srq_wqes = dev_cap->max_srq_sz; mlx4_dev_cap() 374 dev->caps.max_srq_sge = dev_cap->max_rq_sg - 1; mlx4_dev_cap() 375 dev->caps.reserved_srqs = dev_cap->reserved_srqs; mlx4_dev_cap() 376 dev->caps.max_sq_desc_sz = dev_cap->max_sq_desc_sz; mlx4_dev_cap() 377 dev->caps.max_rq_desc_sz = dev_cap->max_rq_desc_sz; mlx4_dev_cap() 383 dev->caps.max_cqes = dev_cap->max_cq_sz - 1; mlx4_dev_cap() 384 dev->caps.reserved_cqs = dev_cap->reserved_cqs; mlx4_dev_cap() 385 dev->caps.reserved_eqs = dev_cap->reserved_eqs; mlx4_dev_cap() 386 dev->caps.reserved_mtts = dev_cap->reserved_mtts; mlx4_dev_cap() 387 dev->caps.reserved_mrws = dev_cap->reserved_mrws; mlx4_dev_cap() 390 dev->caps.reserved_uars = max_t(int, 128, dev_cap->reserved_uars); mlx4_dev_cap() 391 dev->caps.reserved_pds = dev_cap->reserved_pds; mlx4_dev_cap() 392 dev->caps.reserved_xrcds = (dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC) ? mlx4_dev_cap() 394 dev->caps.max_xrcds = (dev->caps.flags & MLX4_DEV_CAP_FLAG_XRC) ? mlx4_dev_cap() 396 dev->caps.mtt_entry_sz = dev_cap->mtt_entry_sz; mlx4_dev_cap() 398 dev->caps.max_msg_sz = dev_cap->max_msg_sz; mlx4_dev_cap() 399 dev->caps.page_size_cap = ~(u32) (dev_cap->min_page_sz - 1); mlx4_dev_cap() 400 dev->caps.flags = dev_cap->flags; mlx4_dev_cap() 401 dev->caps.flags2 = dev_cap->flags2; mlx4_dev_cap() 402 dev->caps.bmme_flags = dev_cap->bmme_flags; mlx4_dev_cap() 403 dev->caps.reserved_lkey = dev_cap->reserved_lkey; mlx4_dev_cap() 404 dev->caps.stat_rate_support = dev_cap->stat_rate_support; mlx4_dev_cap() 405 dev->caps.max_gso_sz = dev_cap->max_gso_sz; mlx4_dev_cap() 406 dev->caps.max_rss_tbl_sz = dev_cap->max_rss_tbl_sz; mlx4_dev_cap() 409 if (mlx4_priv(dev)->pci_dev_data & MLX4_PCI_DEV_FORCE_SENSE_PORT) mlx4_dev_cap() 410 dev->caps.flags \|= MLX4_DEV_CAP_FLAG_SENSE_SUPPORT; mlx4_dev_cap() 412 if (mlx4_is_mfunc(dev)) mlx4_dev_cap() 413 dev->caps.flags &= ~MLX4_DEV_CAP_FLAG_SENSE_SUPPORT; mlx4_dev_cap() 416 dev->caps.log_num_macs = MLX4_MIN_LOG_NUM_MAC; mlx4_dev_cap() 417 dev->caps.log_num_vlans = MLX4_MIN_LOG_NUM_VLANS; mlx4_dev_cap() 419 dev->caps.log_num_macs = log_num_mac; mlx4_dev_cap() 420 dev->caps.log_num_vlans = MLX4_LOG_NUM_VLANS; mlx4_dev_cap() 423 for (i = 1; i <= dev->caps.num_ports; ++i) { mlx4_dev_cap() 424 dev->caps.port_type[i] = MLX4_PORT_TYPE_NONE; mlx4_dev_cap() 425 if (dev->caps.supported_type[i]) { mlx4_dev_cap() 427 if (dev->caps.supported_type[i] == MLX4_PORT_TYPE_ETH) mlx4_dev_cap() 428 dev->caps.port_type[i] = MLX4_PORT_TYPE_ETH; mlx4_dev_cap() 430 else if (dev->caps.supported_type[i] == mlx4_dev_cap() 432 dev->caps.port_type[i] = MLX4_PORT_TYPE_IB; mlx4_dev_cap() 438 dev->caps.port_type[i] = dev->caps.suggested_type[i] ? mlx4_dev_cap() 441 dev->caps.port_type[i] = port_type_array[i - 1]; mlx4_dev_cap() 450 mlx4_priv(dev)->sense.sense_allowed[i] = mlx4_dev_cap() 451 ((dev->caps.supported_type[i] == MLX4_PORT_TYPE_AUTO) && mlx4_dev_cap() 452 (dev->caps.flags & MLX4_DEV_CAP_FLAG_DPDP) && mlx4_dev_cap() 453 (dev->caps.flags & MLX4_DEV_CAP_FLAG_SENSE_SUPPORT)); mlx4_dev_cap() 460 if (mlx4_priv(dev)->sense.sense_allowed[i] && dev->caps.default_sense[i]) { mlx4_dev_cap() 462 dev->caps.possible_type[i] = MLX4_PORT_TYPE_AUTO; mlx4_dev_cap() 463 mlx4_SENSE_PORT(dev, i, &sensed_port); mlx4_dev_cap() 465 dev->caps.port_type[i] = sensed_port; mlx4_dev_cap() 467 dev->caps.possible_type[i] = dev->caps.port_type[i]; mlx4_dev_cap() 470 if (dev->caps.log_num_macs > dev_cap->port_cap[i].log_max_macs) { mlx4_dev_cap() 471 dev->caps.log_num_macs = dev_cap->port_cap[i].log_max_macs; mlx4_dev_cap() 472 mlx4_warn(dev, "Requested number of MACs is too much for port %d, reducing to %d\n", mlx4_dev_cap() 473 i, 1 << dev->caps.log_num_macs); mlx4_dev_cap() 475 if (dev->caps.log_num_vlans > dev_cap->port_cap[i].log_max_vlans) { mlx4_dev_cap() 476 dev->caps.log_num_vlans = dev_cap->port_cap[i].log_max_vlans; mlx4_dev_cap() 477 mlx4_warn(dev, "Requested number of VLANs is too much for port %d, reducing to %d\n", mlx4_dev_cap() 478 i, 1 << dev->caps.log_num_vlans); mlx4_dev_cap() 482 dev->caps.max_counters = 1 << ilog2(dev_cap->max_counters); mlx4_dev_cap() 484 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW] = dev_cap->reserved_qps; mlx4_dev_cap() 485 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_ETH_ADDR] = mlx4_dev_cap() 486 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FC_ADDR] = mlx4_dev_cap() 487 (1 << dev->caps.log_num_macs) mlx4_dev_cap() 488 (1 << dev->caps.log_num_vlans) * mlx4_dev_cap() 489 dev->caps.num_ports; mlx4_dev_cap() 490 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FC_EXCH] = MLX4_NUM_FEXCH; mlx4_dev_cap() 493 dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_FS_EN) mlx4_dev_cap() 494 dev->caps.dmfs_high_rate_qpn_base = dev_cap->dmfs_high_rate_qpn_base; mlx4_dev_cap() 496 dev->caps.dmfs_high_rate_qpn_base = mlx4_dev_cap() 497 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW]; mlx4_dev_cap() 500 dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_FS_EN) { mlx4_dev_cap() 501 dev->caps.dmfs_high_rate_qpn_range = dev_cap->dmfs_high_rate_qpn_range; mlx4_dev_cap() 502 dev->caps.dmfs_high_steer_mode = MLX4_STEERING_DMFS_A0_DEFAULT; mlx4_dev_cap() 503 dev->caps.flags2 \|= MLX4_DEV_CAP_FLAG2_FS_A0; mlx4_dev_cap() 505 dev->caps.dmfs_high_steer_mode = MLX4_STEERING_DMFS_A0_NOT_SUPPORTED; mlx4_dev_cap() 506 dev->caps.dmfs_high_rate_qpn_base = mlx4_dev_cap() 507 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW]; mlx4_dev_cap() 508 dev->caps.dmfs_high_rate_qpn_range = MLX4_A0_STEERING_TABLE_SIZE; mlx4_dev_cap() 511 dev->caps.rl_caps = dev_cap->rl_caps; mlx4_dev_cap() 513 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_RSS_RAW_ETH] = mlx4_dev_cap() 514 dev->caps.dmfs_high_rate_qpn_range; mlx4_dev_cap() 516 dev->caps.reserved_qps = dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW] + mlx4_dev_cap() 517 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_ETH_ADDR] + mlx4_dev_cap() 518 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FC_ADDR] + mlx4_dev_cap() 519 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FC_EXCH]; mlx4_dev_cap() 521 dev->caps.sqp_demux = (mlx4_is_master(dev)) ? MLX4_MAX_NUM_SLAVES : 0; mlx4_dev_cap() 523 if (!enable_64b_cqe_eqe && !mlx4_is_slave(dev)) { mlx4_dev_cap() 526 mlx4_warn(dev, "64B EQEs/CQEs supported by the device but not enabled\n"); mlx4_dev_cap() 527 dev->caps.flags &= ~MLX4_DEV_CAP_FLAG_64B_CQE; mlx4_dev_cap() 528 dev->caps.flags &= ~MLX4_DEV_CAP_FLAG_64B_EQE; mlx4_dev_cap() 534 mlx4_warn(dev, "Disabling EQE/CQE stride per user request\n"); mlx4_dev_cap() 540 if ((dev->caps.flags & mlx4_dev_cap() 542 mlx4_is_master(dev)) mlx4_dev_cap() 543 dev->caps.function_caps \|= MLX4_FUNC_CAP_64B_EQE_CQE; mlx4_dev_cap() 545 if (!mlx4_is_slave(dev)) { mlx4_dev_cap() 546 mlx4_enable_cqe_eqe_stride(dev); mlx4_dev_cap() 547 dev->caps.alloc_res_qp_mask = mlx4_dev_cap() 548 (dev->caps.bf_reg_size ? MLX4_RESERVE_ETH_BF_QP : 0) \| mlx4_dev_cap() 551 if (!(dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ETS_CFG) && mlx4_dev_cap() 552 dev->caps.flags & MLX4_DEV_CAP_FLAG_SET_ETH_SCHED) { mlx4_dev_cap() 553 mlx4_warn(dev, "Old device ETS support detected\n"); mlx4_dev_cap() 554 mlx4_warn(dev, "Consider upgrading device FW.\n"); mlx4_dev_cap() 555 dev->caps.flags2 \|= MLX4_DEV_CAP_FLAG2_ETS_CFG; mlx4_dev_cap() 559 dev->caps.alloc_res_qp_mask = 0; mlx4_dev_cap() 562 mlx4_enable_ignore_fcs(dev); mlx4_dev_cap() 567 static int mlx4_get_pcie_dev_link_caps(struct mlx4_dev dev, mlx4_get_pcie_dev_link_caps() argument 579 err1 = pcie_capability_read_dword(dev->persist->pdev, PCI_EXP_LNKCAP, mlx4_get_pcie_dev_link_caps() 581 err2 = pcie_capability_read_dword(dev->persist->pdev, PCI_EXP_LNKCAP2, mlx4_get_pcie_dev_link_caps() 608 static void mlx4_check_pcie_caps(struct mlx4_dev dev) mlx4_check_pcie_caps() argument 620 err = mlx4_get_pcie_dev_link_caps(dev, &speed_cap, &width_cap); mlx4_check_pcie_caps() 622 mlx4_warn(dev, mlx4_check_pcie_caps() 627 err = pcie_get_minimum_link(dev->persist->pdev, &speed, &width); mlx4_check_pcie_caps() 630 mlx4_warn(dev, mlx4_check_pcie_caps() 636 mlx4_warn(dev, mlx4_check_pcie_caps() 639 mlx4_info(dev, "PCIe link speed is %s, device supports %s\n", mlx4_check_pcie_caps() 641 mlx4_info(dev, "PCIe link width is x%d, device supports x%d\n", mlx4_check_pcie_caps() 647 static int mlx4_how_many_lives_vf(struct mlx4_dev dev) mlx4_how_many_lives_vf() argument 649 struct mlx4_priv priv = mlx4_priv(dev); mlx4_how_many_lives_vf() 654 for (i = 1/the ppf is 0/; i < dev->num_slaves; ++i) { mlx4_how_many_lives_vf() 658 mlx4_warn(dev, "%s: slave: %d is still active\n", mlx4_how_many_lives_vf() 666 int mlx4_get_parav_qkey(struct mlx4_dev dev, u32 qpn, u32 qkey) mlx4_get_parav_qkey() argument 670 if (qpn >= dev->phys_caps.base_tunnel_sqpn + 8 * MLX4_MFUNC_MAX \|\| mlx4_get_parav_qkey() 671 qpn < dev->phys_caps.base_proxy_sqpn) mlx4_get_parav_qkey() 674 if (qpn >= dev->phys_caps.base_tunnel_sqpn) mlx4_get_parav_qkey() 676 qk += qpn - dev->phys_caps.base_tunnel_sqpn; mlx4_get_parav_qkey() 678 qk += qpn - dev->phys_caps.base_proxy_sqpn; mlx4_get_parav_qkey() 684 void mlx4_sync_pkey_table(struct mlx4_dev dev, int slave, int port, int i, int val) mlx4_sync_pkey_table() argument 686 struct mlx4_priv priv = container_of(dev, struct mlx4_priv, dev); mlx4_sync_pkey_table() 688 if (!mlx4_is_master(dev)) mlx4_sync_pkey_table() 695 void mlx4_put_slave_node_guid(struct mlx4_dev dev, int slave, __be64 guid) mlx4_put_slave_node_guid() argument 697 struct mlx4_priv priv = container_of(dev, struct mlx4_priv, dev); mlx4_put_slave_node_guid() 699 if (!mlx4_is_master(dev)) mlx4_put_slave_node_guid() 706 __be64 mlx4_get_slave_node_guid(struct mlx4_dev dev, int slave) mlx4_get_slave_node_guid() argument 708 struct mlx4_priv priv = container_of(dev, struct mlx4_priv, dev); mlx4_get_slave_node_guid() 710 if (!mlx4_is_master(dev)) mlx4_get_slave_node_guid() 717 int mlx4_is_slave_active(struct mlx4_dev dev, int slave) mlx4_is_slave_active() argument 719 struct mlx4_priv priv = mlx4_priv(dev); mlx4_is_slave_active() 722 if (!mlx4_is_master(dev)) mlx4_is_slave_active() 730 static void slave_adjust_steering_mode(struct mlx4_dev dev, slave_adjust_steering_mode() argument 734 dev->caps.steering_mode = hca_param->steering_mode; slave_adjust_steering_mode() 735 if (dev->caps.steering_mode == MLX4_STEERING_MODE_DEVICE_MANAGED) { slave_adjust_steering_mode() 736 dev->caps.num_qp_per_mgm = dev_cap->fs_max_num_qp_per_entry; slave_adjust_steering_mode() 737 dev->caps.fs_log_max_ucast_qp_range_size = slave_adjust_steering_mode() 740 dev->caps.num_qp_per_mgm = slave_adjust_steering_mode() 743 mlx4_dbg(dev, "Steering mode is: %s\n", slave_adjust_steering_mode() 744 mlx4_steering_mode_str(dev->caps.steering_mode)); slave_adjust_steering_mode() 747 static int mlx4_slave_cap(struct mlx4_dev dev) mlx4_slave_cap() argument 757 err = mlx4_QUERY_HCA(dev, &hca_param); mlx4_slave_cap() 759 mlx4_err(dev, "QUERY_HCA command failed, aborting\n"); mlx4_slave_cap() 767 mlx4_err(dev, "Unknown hca global capabilities\n"); mlx4_slave_cap() 773 dev->caps.hca_core_clock = hca_param.hca_core_clock; mlx4_slave_cap() 776 dev->caps.max_qp_dest_rdma = 1 << hca_param.log_rd_per_qp; mlx4_slave_cap() 777 err = mlx4_dev_cap(dev, &dev_cap); mlx4_slave_cap() 779 mlx4_err(dev, "QUERY_DEV_CAP command failed, aborting\n"); mlx4_slave_cap() 783 err = mlx4_QUERY_FW(dev); mlx4_slave_cap() 785 mlx4_err(dev, "QUERY_FW command failed: could not get FW version\n"); mlx4_slave_cap() 787 page_size = ~dev->caps.page_size_cap + 1; mlx4_slave_cap() 788 mlx4_warn(dev, "HCA minimum page size:%d\n", page_size); mlx4_slave_cap() 790 mlx4_err(dev, "HCA minimum page size of %d bigger than kernel PAGE_SIZE of %ld, aborting\n", mlx4_slave_cap() 796 dev->caps.uar_page_size = 1 << (hca_param.uar_page_sz + 12); mlx4_slave_cap() 799 if (dev->caps.uar_page_size != PAGE_SIZE) { mlx4_slave_cap() 800 mlx4_err(dev, "UAR size:%d != kernel PAGE_SIZE of %ld\n", mlx4_slave_cap() 801 dev->caps.uar_page_size, PAGE_SIZE); mlx4_slave_cap() 806 err = mlx4_QUERY_FUNC_CAP(dev, 0, &func_cap); mlx4_slave_cap() 808 mlx4_err(dev, "QUERY_FUNC_CAP general command failed, aborting (%d)\n", mlx4_slave_cap() 815 mlx4_err(dev, "Unknown pf context behaviour %x known flags %x\n", mlx4_slave_cap() 820 dev->caps.num_ports = func_cap.num_ports; mlx4_slave_cap() 821 dev->quotas.qp = func_cap.qp_quota; mlx4_slave_cap() 822 dev->quotas.srq = func_cap.srq_quota; mlx4_slave_cap() 823 dev->quotas.cq = func_cap.cq_quota; mlx4_slave_cap() 824 dev->quotas.mpt = func_cap.mpt_quota; mlx4_slave_cap() 825 dev->quotas.mtt = func_cap.mtt_quota; mlx4_slave_cap() 826 dev->caps.num_qps = 1 << hca_param.log_num_qps; mlx4_slave_cap() 827 dev->caps.num_srqs = 1 << hca_param.log_num_srqs; mlx4_slave_cap() 828 dev->caps.num_cqs = 1 << hca_param.log_num_cqs; mlx4_slave_cap() 829 dev->caps.num_mpts = 1 << hca_param.log_mpt_sz; mlx4_slave_cap() 830 dev->caps.num_eqs = func_cap.max_eq; mlx4_slave_cap() 831 dev->caps.reserved_eqs = func_cap.reserved_eq; mlx4_slave_cap() 832 dev->caps.reserved_lkey = func_cap.reserved_lkey; mlx4_slave_cap() 833 dev->caps.num_pds = MLX4_NUM_PDS; mlx4_slave_cap() 834 dev->caps.num_mgms = 0; mlx4_slave_cap() 835 dev->caps.num_amgms = 0; mlx4_slave_cap() 837 if (dev->caps.num_ports > MLX4_MAX_PORTS) { mlx4_slave_cap() 838 mlx4_err(dev, "HCA has %d ports, but we only support %d, aborting\n", mlx4_slave_cap() 839 dev->caps.num_ports, MLX4_MAX_PORTS); mlx4_slave_cap() 843 dev->caps.qp0_qkey = kcalloc(dev->caps.num_ports, sizeof(u32), GFP_KERNEL); mlx4_slave_cap() 844 dev->caps.qp0_tunnel = kcalloc(dev->caps.num_ports, sizeof (u32), GFP_KERNEL); mlx4_slave_cap() 845 dev->caps.qp0_proxy = kcalloc(dev->caps.num_ports, sizeof (u32), GFP_KERNEL); mlx4_slave_cap() 846 dev->caps.qp1_tunnel = kcalloc(dev->caps.num_ports, sizeof (u32), GFP_KERNEL); mlx4_slave_cap() 847 dev->caps.qp1_proxy = kcalloc(dev->caps.num_ports, sizeof (u32), GFP_KERNEL); mlx4_slave_cap() 849 if (!dev->caps.qp0_tunnel \|\| !dev->caps.qp0_proxy \|\| mlx4_slave_cap() 850 !dev->caps.qp1_tunnel \|\| !dev->caps.qp1_proxy \|\| mlx4_slave_cap() 851 !dev->caps.qp0_qkey) { mlx4_slave_cap() 856 for (i = 1; i <= dev->caps.num_ports; ++i) { mlx4_slave_cap() 857 err = mlx4_QUERY_FUNC_CAP(dev, i, &func_cap); mlx4_slave_cap() 859 mlx4_err(dev, "QUERY_FUNC_CAP port command failed for port %d, aborting (%d)\n", mlx4_slave_cap() 863 dev->caps.qp0_qkey[i - 1] = func_cap.qp0_qkey; mlx4_slave_cap() 864 dev->caps.qp0_tunnel[i - 1] = func_cap.qp0_tunnel_qpn; mlx4_slave_cap() 865 dev->caps.qp0_proxy[i - 1] = func_cap.qp0_proxy_qpn; mlx4_slave_cap() 866 dev->caps.qp1_tunnel[i - 1] = func_cap.qp1_tunnel_qpn; mlx4_slave_cap() 867 dev->caps.qp1_proxy[i - 1] = func_cap.qp1_proxy_qpn; mlx4_slave_cap() 868 dev->caps.port_mask[i] = dev->caps.port_type[i]; mlx4_slave_cap() 869 dev->caps.phys_port_id[i] = func_cap.phys_port_id; mlx4_slave_cap() 870 if (mlx4_get_slave_pkey_gid_tbl_len(dev, i, mlx4_slave_cap() 871 &dev->caps.gid_table_len[i], mlx4_slave_cap() 872 &dev->caps.pkey_table_len[i])) mlx4_slave_cap() 876 if (dev->caps.uar_page_size * (dev->caps.num_uars - mlx4_slave_cap() 877 dev->caps.reserved_uars) > mlx4_slave_cap() 878 pci_resource_len(dev->persist->pdev, mlx4_slave_cap() 880 mlx4_err(dev, "HCA reported UAR region size of 0x%x bigger than PCI resource 2 size of 0x%llx, aborting\n", mlx4_slave_cap() 881 dev->caps.uar_page_size * dev->caps.num_uars, mlx4_slave_cap() 883 pci_resource_len(dev->persist->pdev, 2)); mlx4_slave_cap() 888 dev->caps.eqe_size = 64; mlx4_slave_cap() 889 dev->caps.eqe_factor = 1; mlx4_slave_cap() 891 dev->caps.eqe_size = 32; mlx4_slave_cap() 892 dev->caps.eqe_factor = 0; mlx4_slave_cap() 896 dev->caps.cqe_size = 64; mlx4_slave_cap() 897 dev->caps.userspace_caps \|= MLX4_USER_DEV_CAP_LARGE_CQE; mlx4_slave_cap() 899 dev->caps.cqe_size = 32; mlx4_slave_cap() 903 dev->caps.eqe_size = hca_param.eqe_size; mlx4_slave_cap() 904 dev->caps.eqe_factor = 0; mlx4_slave_cap() 908 dev->caps.cqe_size = hca_param.cqe_size; mlx4_slave_cap() 910 dev->caps.userspace_caps \|= MLX4_USER_DEV_CAP_LARGE_CQE; mlx4_slave_cap() 913 dev->caps.flags2 &= ~MLX4_DEV_CAP_FLAG2_TS; mlx4_slave_cap() 914 mlx4_warn(dev, "Timestamping is not supported in slave mode\n"); mlx4_slave_cap() 916 slave_adjust_steering_mode(dev, &dev_cap, &hca_param); mlx4_slave_cap() 917 mlx4_dbg(dev, "RSS support for IP fragments is %s\n", mlx4_slave_cap() 921 dev->caps.bf_reg_size) mlx4_slave_cap() 922 dev->caps.alloc_res_qp_mask \|= MLX4_RESERVE_ETH_BF_QP; mlx4_slave_cap() 925 dev->caps.alloc_res_qp_mask \|= MLX4_RESERVE_A0_QP; mlx4_slave_cap() 930 kfree(dev->caps.qp0_qkey); mlx4_slave_cap() 931 kfree(dev->caps.qp0_tunnel); mlx4_slave_cap() 932 kfree(dev->caps.qp0_proxy); mlx4_slave_cap() 933 kfree(dev->caps.qp1_tunnel); mlx4_slave_cap() 934 kfree(dev->caps.qp1_proxy); mlx4_slave_cap() 935 dev->caps.qp0_qkey = NULL; mlx4_slave_cap() 936 dev->caps.qp0_tunnel = NULL; mlx4_slave_cap() 937 dev->caps.qp0_proxy = NULL; mlx4_slave_cap() 938 dev->caps.qp1_tunnel = NULL; mlx4_slave_cap() 939 dev->caps.qp1_proxy = NULL; mlx4_slave_cap() 944 static void mlx4_request_modules(struct mlx4_dev dev) mlx4_request_modules() argument 952 for (port = 1; port <= dev->caps.num_ports; port++) { mlx4_request_modules() 953 if (dev->caps.port_type[port] == MLX4_PORT_TYPE_IB) mlx4_request_modules() 955 else if (dev->caps.port_type[port] == MLX4_PORT_TYPE_ETH) mlx4_request_modules() 961 if (has_ib_port \|\| (dev->caps.flags & MLX4_DEV_CAP_FLAG_IBOE)) mlx4_request_modules() 969 int mlx4_change_port_types(struct mlx4_dev dev, mlx4_change_port_types() argument 976 for (port = 0; port < dev->caps.num_ports; port++) { mlx4_change_port_types() 979 if (port_types[port] != dev->caps.port_type[port + 1]) mlx4_change_port_types() 983 mlx4_unregister_device(dev); mlx4_change_port_types() 984 for (port = 1; port <= dev->caps.num_ports; port++) { mlx4_change_port_types() 985 mlx4_CLOSE_PORT(dev, port); mlx4_change_port_types() 986 dev->caps.port_type[port] = port_types[port - 1]; mlx4_change_port_types() 987 err = mlx4_SET_PORT(dev, port, -1); mlx4_change_port_types() 989 mlx4_err(dev, "Failed to set port %d, aborting\n", mlx4_change_port_types() 994 mlx4_set_port_mask(dev); mlx4_change_port_types() 995 err = mlx4_register_device(dev); mlx4_change_port_types() 997 mlx4_err(dev, "Failed to register device\n"); mlx4_change_port_types() 1000 mlx4_request_modules(dev); mlx4_change_port_types() 1007 static ssize_t show_port_type(struct device dev, show_port_type() argument 1013 struct mlx4_dev mdev = info->dev; show_port_type() 1027 static ssize_t set_port_type(struct device dev, set_port_type() argument 1033 struct mlx4_dev mdev = info->dev; set_port_type() 1136 static ssize_t show_port_ib_mtu(struct device dev, show_port_ib_mtu() argument 1142 struct mlx4_dev mdev = info->dev; show_port_ib_mtu() 1152 static ssize_t set_port_ib_mtu(struct device dev, set_port_ib_mtu() argument 1158 struct mlx4_dev mdev = info->dev; set_port_ib_mtu() 1197 int mlx4_bond(struct mlx4_dev dev) mlx4_bond() argument 1200 struct mlx4_priv priv = mlx4_priv(dev); mlx4_bond() 1204 if (!mlx4_is_bonded(dev)) mlx4_bond() 1205 ret = mlx4_do_bond(dev, true); mlx4_bond() 1211 mlx4_err(dev, "Failed to bond device: %d\n", ret); mlx4_bond() 1213 mlx4_dbg(dev, "Device is bonded\n"); mlx4_bond() 1218 int mlx4_unbond(struct mlx4_dev dev) mlx4_unbond() argument 1221 struct mlx4_priv priv = mlx4_priv(dev); mlx4_unbond() 1225 if (mlx4_is_bonded(dev)) mlx4_unbond() 1226 ret = mlx4_do_bond(dev, false); mlx4_unbond() 1230 mlx4_err(dev, "Failed to unbond device: %d\n", ret); mlx4_unbond() 1232 mlx4_dbg(dev, "Device is unbonded\n"); mlx4_unbond() 1238 int mlx4_port_map_set(struct mlx4_dev dev, struct mlx4_port_map v2p) mlx4_port_map_set() argument 1242 struct mlx4_priv priv = mlx4_priv(dev); mlx4_port_map_set() 1245 if (!(dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_PORT_REMAP)) mlx4_port_map_set() 1266 err = mlx4_virt2phy_port_map(dev, port1, port2); mlx4_port_map_set() 1268 mlx4_dbg(dev, "port map changed: [%d][%d]\n", mlx4_port_map_set() 1273 mlx4_err(dev, "Failed to change port mape: %d\n", err); mlx4_port_map_set() 1282 static int mlx4_load_fw(struct mlx4_dev dev) mlx4_load_fw() argument 1284 struct mlx4_priv priv = mlx4_priv(dev); mlx4_load_fw() 1287 priv->fw.fw_icm = mlx4_alloc_icm(dev, priv->fw.fw_pages, mlx4_load_fw() 1290 mlx4_err(dev, "Couldn't allocate FW area, aborting\n"); mlx4_load_fw() 1294 err = mlx4_MAP_FA(dev, priv->fw.fw_icm); mlx4_load_fw() 1296 mlx4_err(dev, "MAP_FA command failed, aborting\n"); mlx4_load_fw() 1300 err = mlx4_RUN_FW(dev); mlx4_load_fw() 1302 mlx4_err(dev, "RUN_FW command failed, aborting\n"); mlx4_load_fw() 1309 mlx4_UNMAP_FA(dev); mlx4_load_fw() 1312 mlx4_free_icm(dev, priv->fw.fw_icm, 0); mlx4_load_fw() 1316 static int mlx4_init_cmpt_table(struct mlx4_dev dev, u64 cmpt_base, mlx4_init_cmpt_table() argument 1319 struct mlx4_priv priv = mlx4_priv(dev); mlx4_init_cmpt_table() 1323 err = mlx4_init_icm_table(dev, &priv->qp_table.cmpt_table, mlx4_init_cmpt_table() 1327 cmpt_entry_sz, dev->caps.num_qps, mlx4_init_cmpt_table() 1328 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW], mlx4_init_cmpt_table() 1333 err = mlx4_init_icm_table(dev, &priv->srq_table.cmpt_table, mlx4_init_cmpt_table() 1337 cmpt_entry_sz, dev->caps.num_srqs, mlx4_init_cmpt_table() 1338 dev->caps.reserved_srqs, 0, 0); mlx4_init_cmpt_table() 1342 err = mlx4_init_icm_table(dev, &priv->cq_table.cmpt_table, mlx4_init_cmpt_table() 1346 cmpt_entry_sz, dev->caps.num_cqs, mlx4_init_cmpt_table() 1347 dev->caps.reserved_cqs, 0, 0); mlx4_init_cmpt_table() 1351 num_eqs = dev->phys_caps.num_phys_eqs; mlx4_init_cmpt_table() 1352 err = mlx4_init_icm_table(dev, &priv->eq_table.cmpt_table, mlx4_init_cmpt_table() 1363 mlx4_cleanup_icm_table(dev, &priv->cq_table.cmpt_table); mlx4_init_cmpt_table() 1366 mlx4_cleanup_icm_table(dev, &priv->srq_table.cmpt_table); mlx4_init_cmpt_table() 1369 mlx4_cleanup_icm_table(dev, &priv->qp_table.cmpt_table); mlx4_init_cmpt_table() 1375 static int mlx4_init_icm(struct mlx4_dev dev, struct mlx4_dev_cap dev_cap, mlx4_init_icm() argument 1378 struct mlx4_priv priv = mlx4_priv(dev); mlx4_init_icm() 1383 err = mlx4_SET_ICM_SIZE(dev, icm_size, &aux_pages); mlx4_init_icm() 1385 mlx4_err(dev, "SET_ICM_SIZE command failed, aborting\n"); mlx4_init_icm() 1389 mlx4_dbg(dev, "%lld KB of HCA context requires %lld KB aux memory\n", mlx4_init_icm() 1393 priv->fw.aux_icm = mlx4_alloc_icm(dev, aux_pages, mlx4_init_icm() 1396 mlx4_err(dev, "Couldn't allocate aux memory, aborting\n"); mlx4_init_icm() 1400 err = mlx4_MAP_ICM_AUX(dev, priv->fw.aux_icm); mlx4_init_icm() 1402 mlx4_err(dev, "MAP_ICM_AUX command failed, aborting\n"); mlx4_init_icm() 1406 err = mlx4_init_cmpt_table(dev, init_hca->cmpt_base, dev_cap->cmpt_entry_sz); mlx4_init_icm() 1408 mlx4_err(dev, "Failed to map cMPT context memory, aborting\n"); mlx4_init_icm() 1413 num_eqs = dev->phys_caps.num_phys_eqs; mlx4_init_icm() 1414 err = mlx4_init_icm_table(dev, &priv->eq_table.table, mlx4_init_icm() 1418 mlx4_err(dev, "Failed to map EQ context memory, aborting\n"); mlx4_init_icm() 1426 * dev->caps.mtt_entry_sz below is really the MTT segment mlx4_init_icm() 1429 dev->caps.reserved_mtts = mlx4_init_icm() 1430 ALIGN(dev->caps.reserved_mtts * dev->caps.mtt_entry_sz, mlx4_init_icm() 1431 dma_get_cache_alignment()) / dev->caps.mtt_entry_sz; mlx4_init_icm() 1433 err = mlx4_init_icm_table(dev, &priv->mr_table.mtt_table, mlx4_init_icm() 1435 dev->caps.mtt_entry_sz, mlx4_init_icm() 1436 dev->caps.num_mtts, mlx4_init_icm() 1437 dev->caps.reserved_mtts, 1, 0); mlx4_init_icm() 1439 mlx4_err(dev, "Failed to map MTT context memory, aborting\n"); mlx4_init_icm() 1443 err = mlx4_init_icm_table(dev, &priv->mr_table.dmpt_table, mlx4_init_icm() 1446 dev->caps.num_mpts, mlx4_init_icm() 1447 dev->caps.reserved_mrws, 1, 1); mlx4_init_icm() 1449 mlx4_err(dev, "Failed to map dMPT context memory, aborting\n"); mlx4_init_icm() 1453 err = mlx4_init_icm_table(dev, &priv->qp_table.qp_table, mlx4_init_icm() 1456 dev->caps.num_qps, mlx4_init_icm() 1457 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW], mlx4_init_icm() 1460 mlx4_err(dev, "Failed to map QP context memory, aborting\n"); mlx4_init_icm() 1464 err = mlx4_init_icm_table(dev, &priv->qp_table.auxc_table, mlx4_init_icm() 1467 dev->caps.num_qps, mlx4_init_icm() 1468 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW], mlx4_init_icm() 1471 mlx4_err(dev, "Failed to map AUXC context memory, aborting\n"); mlx4_init_icm() 1475 err = mlx4_init_icm_table(dev, &priv->qp_table.altc_table, mlx4_init_icm() 1478 dev->caps.num_qps, mlx4_init_icm() 1479 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW], mlx4_init_icm() 1482 mlx4_err(dev, "Failed to map ALTC context memory, aborting\n"); mlx4_init_icm() 1486 err = mlx4_init_icm_table(dev, &priv->qp_table.rdmarc_table, mlx4_init_icm() 1489 dev->caps.num_qps, mlx4_init_icm() 1490 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW], mlx4_init_icm() 1493 mlx4_err(dev, "Failed to map RDMARC context memory, aborting\n"); mlx4_init_icm() 1497 err = mlx4_init_icm_table(dev, &priv->cq_table.table, mlx4_init_icm() 1500 dev->caps.num_cqs, mlx4_init_icm() 1501 dev->caps.reserved_cqs, 0, 0); mlx4_init_icm() 1503 mlx4_err(dev, "Failed to map CQ context memory, aborting\n"); mlx4_init_icm() 1507 err = mlx4_init_icm_table(dev, &priv->srq_table.table, mlx4_init_icm() 1510 dev->caps.num_srqs, mlx4_init_icm() 1511 dev->caps.reserved_srqs, 0, 0); mlx4_init_icm() 1513 mlx4_err(dev, "Failed to map SRQ context memory, aborting\n"); mlx4_init_icm() 1524 err = mlx4_init_icm_table(dev, &priv->mcg_table.table, mlx4_init_icm() 1526 mlx4_get_mgm_entry_size(dev), mlx4_init_icm() 1527 dev->caps.num_mgms + dev->caps.num_amgms, mlx4_init_icm() 1528 dev->caps.num_mgms + dev->caps.num_amgms, mlx4_init_icm() 1531 mlx4_err(dev, "Failed to map MCG context memory, aborting\n"); mlx4_init_icm() 1538 mlx4_cleanup_icm_table(dev, &priv->srq_table.table); mlx4_init_icm() 1541 mlx4_cleanup_icm_table(dev, &priv->cq_table.table); mlx4_init_icm() 1544 mlx4_cleanup_icm_table(dev, &priv->qp_table.rdmarc_table); mlx4_init_icm() 1547 mlx4_cleanup_icm_table(dev, &priv->qp_table.altc_table); mlx4_init_icm() 1550 mlx4_cleanup_icm_table(dev, &priv->qp_table.auxc_table); mlx4_init_icm() 1553 mlx4_cleanup_icm_table(dev, &priv->qp_table.qp_table); mlx4_init_icm() 1556 mlx4_cleanup_icm_table(dev, &priv->mr_table.dmpt_table); mlx4_init_icm() 1559 mlx4_cleanup_icm_table(dev, &priv->mr_table.mtt_table); mlx4_init_icm() 1562 mlx4_cleanup_icm_table(dev, &priv->eq_table.table); mlx4_init_icm() 1565 mlx4_cleanup_icm_table(dev, &priv->eq_table.cmpt_table); mlx4_init_icm() 1566 mlx4_cleanup_icm_table(dev, &priv->cq_table.cmpt_table); mlx4_init_icm() 1567 mlx4_cleanup_icm_table(dev, &priv->srq_table.cmpt_table); mlx4_init_icm() 1568 mlx4_cleanup_icm_table(dev, &priv->qp_table.cmpt_table); mlx4_init_icm() 1571 mlx4_UNMAP_ICM_AUX(dev); mlx4_init_icm() 1574 mlx4_free_icm(dev, priv->fw.aux_icm, 0); mlx4_init_icm() 1579 static void mlx4_free_icms(struct mlx4_dev dev) mlx4_free_icms() argument 1581 struct mlx4_priv priv = mlx4_priv(dev); mlx4_free_icms() 1583 mlx4_cleanup_icm_table(dev, &priv->mcg_table.table); mlx4_free_icms() 1584 mlx4_cleanup_icm_table(dev, &priv->srq_table.table); mlx4_free_icms() 1585 mlx4_cleanup_icm_table(dev, &priv->cq_table.table); mlx4_free_icms() 1586 mlx4_cleanup_icm_table(dev, &priv->qp_table.rdmarc_table); mlx4_free_icms() 1587 mlx4_cleanup_icm_table(dev, &priv->qp_table.altc_table); mlx4_free_icms() 1588 mlx4_cleanup_icm_table(dev, &priv->qp_table.auxc_table); mlx4_free_icms() 1589 mlx4_cleanup_icm_table(dev, &priv->qp_table.qp_table); mlx4_free_icms() 1590 mlx4_cleanup_icm_table(dev, &priv->mr_table.dmpt_table); mlx4_free_icms() 1591 mlx4_cleanup_icm_table(dev, &priv->mr_table.mtt_table); mlx4_free_icms() 1592 mlx4_cleanup_icm_table(dev, &priv->eq_table.table); mlx4_free_icms() 1593 mlx4_cleanup_icm_table(dev, &priv->eq_table.cmpt_table); mlx4_free_icms() 1594 mlx4_cleanup_icm_table(dev, &priv->cq_table.cmpt_table); mlx4_free_icms() 1595 mlx4_cleanup_icm_table(dev, &priv->srq_table.cmpt_table); mlx4_free_icms() 1596 mlx4_cleanup_icm_table(dev, &priv->qp_table.cmpt_table); mlx4_free_icms() 1598 mlx4_UNMAP_ICM_AUX(dev); mlx4_free_icms() 1599 mlx4_free_icm(dev, priv->fw.aux_icm, 0); mlx4_free_icms() 1602 static void mlx4_slave_exit(struct mlx4_dev dev) mlx4_slave_exit() argument 1604 struct mlx4_priv priv = mlx4_priv(dev); mlx4_slave_exit() 1607 if (mlx4_comm_cmd(dev, MLX4_COMM_CMD_RESET, 0, MLX4_COMM_CMD_NA_OP, mlx4_slave_exit() 1609 mlx4_warn(dev, "Failed to close slave function\n"); mlx4_slave_exit() 1613 static int map_bf_area(struct mlx4_dev dev) map_bf_area() argument 1615 struct mlx4_priv priv = mlx4_priv(dev); map_bf_area() 1620 if (!dev->caps.bf_reg_size) map_bf_area() 1623 bf_start = pci_resource_start(dev->persist->pdev, 2) + map_bf_area() 1624 (dev->caps.num_uars << PAGE_SHIFT); map_bf_area() 1625 bf_len = pci_resource_len(dev->persist->pdev, 2) - map_bf_area() 1626 (dev->caps.num_uars << PAGE_SHIFT); map_bf_area() 1634 static void unmap_bf_area(struct mlx4_dev dev) unmap_bf_area() argument 1636 if (mlx4_priv(dev)->bf_mapping) unmap_bf_area() 1637 io_mapping_free(mlx4_priv(dev)->bf_mapping); unmap_bf_area() 1640 cycle_t mlx4_read_clock(struct mlx4_dev dev) mlx4_read_clock() argument 1645 struct mlx4_priv priv = mlx4_priv(dev); mlx4_read_clock() 1662 static int map_internal_clock(struct mlx4_dev dev) map_internal_clock() argument 1664 struct mlx4_priv priv = mlx4_priv(dev); map_internal_clock() 1667 ioremap(pci_resource_start(dev->persist->pdev, map_internal_clock() 1677 static void unmap_internal_clock(struct mlx4_dev dev) unmap_internal_clock() argument 1679 struct mlx4_priv priv = mlx4_priv(dev); unmap_internal_clock() 1685 static void mlx4_close_hca(struct mlx4_dev dev) mlx4_close_hca() argument 1687 unmap_internal_clock(dev); mlx4_close_hca() 1688 unmap_bf_area(dev); mlx4_close_hca() 1689 if (mlx4_is_slave(dev)) mlx4_close_hca() 1690 mlx4_slave_exit(dev); mlx4_close_hca() 1692 mlx4_CLOSE_HCA(dev, 0); mlx4_close_hca() 1693 mlx4_free_icms(dev); mlx4_close_hca() 1697 static void mlx4_close_fw(struct mlx4_dev dev) mlx4_close_fw() argument 1699 if (!mlx4_is_slave(dev)) { mlx4_close_fw() 1700 mlx4_UNMAP_FA(dev); mlx4_close_fw() 1701 mlx4_free_icm(dev, mlx4_priv(dev)->fw.fw_icm, 0); mlx4_close_fw() 1705 static int mlx4_comm_check_offline(struct mlx4_dev dev) mlx4_comm_check_offline() argument 1712 struct mlx4_priv priv = mlx4_priv(dev); mlx4_comm_check_offline() 1729 mlx4_err(dev, "Communication channel is offline.\n"); mlx4_comm_check_offline() 1733 static void mlx4_reset_vf_support(struct mlx4_dev dev) mlx4_reset_vf_support() argument 1737 struct mlx4_priv priv = mlx4_priv(dev); mlx4_reset_vf_support() 1746 dev->caps.vf_caps \|= MLX4_VF_CAP_FLAG_RESET; mlx4_reset_vf_support() 1749 static int mlx4_init_slave(struct mlx4_dev dev) mlx4_init_slave() argument 1751 struct mlx4_priv priv = mlx4_priv(dev); mlx4_init_slave() 1758 mlx4_warn(dev, "PF is not ready - Deferring probe\n"); mlx4_init_slave() 1764 if (mlx4_comm_check_offline(dev)) { mlx4_init_slave() 1765 mlx4_err(dev, "PF is not responsive, skipping initialization\n"); mlx4_init_slave() 1769 mlx4_reset_vf_support(dev); mlx4_init_slave() 1770 mlx4_warn(dev, "Sending reset\n"); mlx4_init_slave() 1771 ret_from_reset = mlx4_comm_cmd(dev, MLX4_COMM_CMD_RESET, 0, mlx4_init_slave() 1777 mlx4_warn(dev, "slave is currently in the middle of FLR - Deferring probe\n"); mlx4_init_slave() 1791 mlx4_err(dev, "slave driver version is not supported by the master\n"); mlx4_init_slave() 1795 mlx4_warn(dev, "Sending vhcr0\n"); mlx4_init_slave() 1796 if (mlx4_comm_cmd(dev, MLX4_COMM_CMD_VHCR0, dma >> 48, mlx4_init_slave() 1799 if (mlx4_comm_cmd(dev, MLX4_COMM_CMD_VHCR1, dma >> 32, mlx4_init_slave() 1802 if (mlx4_comm_cmd(dev, MLX4_COMM_CMD_VHCR2, dma >> 16, mlx4_init_slave() 1805 if (mlx4_comm_cmd(dev, MLX4_COMM_CMD_VHCR_EN, dma, mlx4_init_slave() 1813 mlx4_comm_cmd(dev, MLX4_COMM_CMD_RESET, 0, MLX4_COMM_CMD_NA_OP, 0); mlx4_init_slave() 1819 static void mlx4_parav_master_pf_caps(struct mlx4_dev dev) mlx4_parav_master_pf_caps() argument 1823 for (i = 1; i <= dev->caps.num_ports; i++) { mlx4_parav_master_pf_caps() 1824 if (dev->caps.port_type[i] == MLX4_PORT_TYPE_ETH) mlx4_parav_master_pf_caps() 1825 dev->caps.gid_table_len[i] = mlx4_parav_master_pf_caps() 1826 mlx4_get_slave_num_gids(dev, 0, i); mlx4_parav_master_pf_caps() 1828 dev->caps.gid_table_len[i] = 1; mlx4_parav_master_pf_caps() 1829 dev->caps.pkey_table_len[i] = mlx4_parav_master_pf_caps() 1830 dev->phys_caps.pkey_phys_table_len[i] - 1; mlx4_parav_master_pf_caps() 1872 static void choose_steering_mode(struct mlx4_dev dev, choose_steering_mode() argument 1877 if (dev->caps.dmfs_high_steer_mode == choose_steering_mode() 1879 mlx4_err(dev, "DMFS high rate mode not supported\n"); choose_steering_mode() 1881 dev->caps.dmfs_high_steer_mode = choose_steering_mode() 1888 (!mlx4_is_mfunc(dev) \|\| choose_steering_mode() 1890 (dev->persist->num_vfs + 1))) && choose_steering_mode() 1893 dev->oper_log_mgm_entry_size = choose_steering_mode() 1895 dev->caps.steering_mode = MLX4_STEERING_MODE_DEVICE_MANAGED; choose_steering_mode() 1896 dev->caps.num_qp_per_mgm = dev_cap->fs_max_num_qp_per_entry; choose_steering_mode() 1897 dev->caps.fs_log_max_ucast_qp_range_size = choose_steering_mode() 1900 if (dev->caps.dmfs_high_steer_mode != choose_steering_mode() 1902 dev->caps.dmfs_high_steer_mode = MLX4_STEERING_DMFS_A0_DISABLE; choose_steering_mode() 1903 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_VEP_UC_STEER && choose_steering_mode() 1904 dev->caps.flags & MLX4_DEV_CAP_FLAG_VEP_MC_STEER) choose_steering_mode() 1905 dev->caps.steering_mode = MLX4_STEERING_MODE_B0; choose_steering_mode() 1907 dev->caps.steering_mode = MLX4_STEERING_MODE_A0; choose_steering_mode() 1909 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_VEP_UC_STEER \|\| choose_steering_mode() 1910 dev->caps.flags & MLX4_DEV_CAP_FLAG_VEP_MC_STEER) choose_steering_mode() 1911 mlx4_warn(dev, "Must have both UC_STEER and MC_STEER flags set to use B0 steering - falling back to A0 steering mode\n"); choose_steering_mode() 1913 dev->oper_log_mgm_entry_size = choose_steering_mode() 1917 dev->caps.num_qp_per_mgm = mlx4_get_qp_per_mgm(dev); choose_steering_mode() 1919 mlx4_dbg(dev, "Steering mode is: %s, oper_log_mgm_entry_size = %d, modparam log_num_mgm_entry_size = %d\n", choose_steering_mode() 1920 mlx4_steering_mode_str(dev->caps.steering_mode), choose_steering_mode() 1921 dev->oper_log_mgm_entry_size, choose_steering_mode() 1925 static void choose_tunnel_offload_mode(struct mlx4_dev dev, choose_tunnel_offload_mode() argument 1928 if (dev->caps.steering_mode == MLX4_STEERING_MODE_DEVICE_MANAGED && choose_tunnel_offload_mode() 1930 dev->caps.tunnel_offload_mode = MLX4_TUNNEL_OFFLOAD_MODE_VXLAN; choose_tunnel_offload_mode() 1932 dev->caps.tunnel_offload_mode = MLX4_TUNNEL_OFFLOAD_MODE_NONE; choose_tunnel_offload_mode() 1934 mlx4_dbg(dev, "Tunneling offload mode is: %s\n", (dev->caps.tunnel_offload_mode choose_tunnel_offload_mode() 1938 static int mlx4_validate_optimized_steering(struct mlx4_dev dev) mlx4_validate_optimized_steering() argument 1943 if (dev->caps.dmfs_high_steer_mode == MLX4_STEERING_DMFS_A0_NOT_SUPPORTED) mlx4_validate_optimized_steering() 1946 for (i = 1; i <= dev->caps.num_ports; i++) { mlx4_validate_optimized_steering() 1947 if (mlx4_dev_port(dev, i, &port_cap)) { mlx4_validate_optimized_steering() 1948 mlx4_err(dev, mlx4_validate_optimized_steering() 1950 } else if ((dev->caps.dmfs_high_steer_mode != mlx4_validate_optimized_steering() 1953 !!(dev->caps.dmfs_high_steer_mode == mlx4_validate_optimized_steering() 1955 mlx4_err(dev, mlx4_validate_optimized_steering() 1958 dev->caps.dmfs_high_steer_mode), mlx4_validate_optimized_steering() 1967 static int mlx4_init_fw(struct mlx4_dev dev) mlx4_init_fw() argument 1972 if (!mlx4_is_slave(dev)) { mlx4_init_fw() 1973 err = mlx4_QUERY_FW(dev); mlx4_init_fw() 1976 mlx4_info(dev, "non-primary physical function, skipping\n"); mlx4_init_fw() 1978 mlx4_err(dev, "QUERY_FW command failed, aborting\n"); mlx4_init_fw() 1982 err = mlx4_load_fw(dev); mlx4_init_fw() 1984 mlx4_err(dev, "Failed to start FW, aborting\n"); mlx4_init_fw() 1990 err = mlx4_MOD_STAT_CFG(dev, &mlx4_cfg); mlx4_init_fw() 1992 mlx4_warn(dev, "Failed to override log_pg_sz parameter\n"); mlx4_init_fw() 1998 static int mlx4_init_hca(struct mlx4_dev dev) mlx4_init_hca() argument 2000 struct mlx4_priv priv = mlx4_priv(dev); mlx4_init_hca() 2009 if (!mlx4_is_slave(dev)) { mlx4_init_hca() 2010 err = mlx4_dev_cap(dev, &dev_cap); mlx4_init_hca() 2012 mlx4_err(dev, "QUERY_DEV_CAP command failed, aborting\n"); mlx4_init_hca() 2016 choose_steering_mode(dev, &dev_cap); mlx4_init_hca() 2017 choose_tunnel_offload_mode(dev, &dev_cap); mlx4_init_hca() 2019 if (dev->caps.dmfs_high_steer_mode == MLX4_STEERING_DMFS_A0_STATIC && mlx4_init_hca() 2020 mlx4_is_master(dev)) mlx4_init_hca() 2021 dev->caps.function_caps \|= MLX4_FUNC_CAP_DMFS_A0_STATIC; mlx4_init_hca() 2023 err = mlx4_get_phys_port_id(dev); mlx4_init_hca() 2025 mlx4_err(dev, "Fail to get physical port id\n"); mlx4_init_hca() 2027 if (mlx4_is_master(dev)) mlx4_init_hca() 2028 mlx4_parav_master_pf_caps(dev); mlx4_init_hca() 2031 mlx4_info(dev, "Running from within kdump kernel. Using low memory profile\n"); mlx4_init_hca() 2036 if (dev->caps.steering_mode == mlx4_init_hca() 2040 icm_size = mlx4_make_profile(dev, &profile, &dev_cap, mlx4_init_hca() 2047 dev->caps.max_fmr_maps = (1 << (32 - ilog2(dev->caps.num_mpts))) - 1; mlx4_init_hca() 2049 init_hca.log_uar_sz = ilog2(dev->caps.num_uars); mlx4_init_hca() 2052 if (dev->caps.flags & MLX4_DEV_CAP_FLAG_MEM_WINDOW \|\| mlx4_init_hca() 2053 dev->caps.bmme_flags & MLX4_BMME_FLAG_TYPE_2_WIN) mlx4_init_hca() 2056 err = mlx4_init_icm(dev, &dev_cap, &init_hca, icm_size); mlx4_init_hca() 2060 err = mlx4_INIT_HCA(dev, &init_hca); mlx4_init_hca() 2062 mlx4_err(dev, "INIT_HCA command failed, aborting\n"); mlx4_init_hca() 2067 err = mlx4_query_func(dev, &dev_cap); mlx4_init_hca() 2069 mlx4_err(dev, "QUERY_FUNC command failed, aborting.\n"); mlx4_init_hca() 2072 dev->caps.num_eqs = dev_cap.max_eqs; mlx4_init_hca() 2073 dev->caps.reserved_eqs = dev_cap.reserved_eqs; mlx4_init_hca() 2074 dev->caps.reserved_uars = dev_cap.reserved_uars; mlx4_init_hca() 2082 if (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS) { mlx4_init_hca() 2084 err = mlx4_QUERY_HCA(dev, &init_hca); mlx4_init_hca() 2086 mlx4_err(dev, "QUERY_HCA command failed, disable timestamp\n"); mlx4_init_hca() 2087 dev->caps.flags2 &= ~MLX4_DEV_CAP_FLAG2_TS; mlx4_init_hca() 2089 dev->caps.hca_core_clock = mlx4_init_hca() 2096 if (!dev->caps.hca_core_clock) { mlx4_init_hca() 2097 dev->caps.flags2 &= ~MLX4_DEV_CAP_FLAG2_TS; mlx4_init_hca() 2098 mlx4_err(dev, mlx4_init_hca() 2100 } else if (map_internal_clock(dev)) { mlx4_init_hca() 2105 dev->caps.flags2 &= ~MLX4_DEV_CAP_FLAG2_TS; mlx4_init_hca() 2106 mlx4_err(dev, "Failed to map internal clock. Timestamping is not supported\n"); mlx4_init_hca() 2110 if (dev->caps.dmfs_high_steer_mode != mlx4_init_hca() 2112 if (mlx4_validate_optimized_steering(dev)) mlx4_init_hca() 2113 mlx4_warn(dev, "Optimized steering validation failed\n"); mlx4_init_hca() 2115 if (dev->caps.dmfs_high_steer_mode == mlx4_init_hca() 2117 dev->caps.dmfs_high_rate_qpn_base = mlx4_init_hca() 2118 dev->caps.reserved_qps_cnt[MLX4_QP_REGION_FW]; mlx4_init_hca() 2119 dev->caps.dmfs_high_rate_qpn_range = mlx4_init_hca() 2123 mlx4_dbg(dev, "DMFS high rate steer mode is: %s\n", mlx4_init_hca() 2125 dev->caps.dmfs_high_steer_mode)); mlx4_init_hca() 2128 err = mlx4_init_slave(dev); mlx4_init_hca() 2131 mlx4_err(dev, "Failed to initialize slave\n"); mlx4_init_hca() 2135 err = mlx4_slave_cap(dev); mlx4_init_hca() 2137 mlx4_err(dev, "Failed to obtain slave caps\n"); mlx4_init_hca() 2142 if (map_bf_area(dev)) mlx4_init_hca() 2143 mlx4_dbg(dev, "Failed to map blue flame area\n"); mlx4_init_hca() 2146 if (!mlx4_is_slave(dev)) mlx4_init_hca() 2147 mlx4_set_port_mask(dev); mlx4_init_hca() 2149 err = mlx4_QUERY_ADAPTER(dev, &adapter); mlx4_init_hca() 2151 mlx4_err(dev, "QUERY_ADAPTER command failed, aborting\n"); mlx4_init_hca() 2156 err = mlx4_config_dev_retrieval(dev, &params); mlx4_init_hca() 2158 mlx4_err(dev, "Failed to query CONFIG_DEV parameters\n"); mlx4_init_hca() 2160 dev->caps.rx_checksum_flags_port[1] = params.rx_csum_flags_port_1; mlx4_init_hca() 2161 dev->caps.rx_checksum_flags_port[2] = params.rx_csum_flags_port_2; mlx4_init_hca() 2164 memcpy(dev->board_id, adapter.board_id, sizeof dev->board_id); mlx4_init_hca() 2169 unmap_internal_clock(dev); mlx4_init_hca() 2170 unmap_bf_area(dev); mlx4_init_hca() 2172 if (mlx4_is_slave(dev)) { mlx4_init_hca() 2173 kfree(dev->caps.qp0_qkey); mlx4_init_hca() 2174 kfree(dev->caps.qp0_tunnel); mlx4_init_hca() 2175 kfree(dev->caps.qp0_proxy); mlx4_init_hca() 2176 kfree(dev->caps.qp1_tunnel); mlx4_init_hca() 2177 kfree(dev->caps.qp1_proxy); mlx4_init_hca() 2181 if (mlx4_is_slave(dev)) mlx4_init_hca() 2182 mlx4_slave_exit(dev); mlx4_init_hca() 2184 mlx4_CLOSE_HCA(dev, 0); mlx4_init_hca() 2187 if (!mlx4_is_slave(dev)) mlx4_init_hca() 2188 mlx4_free_icms(dev); mlx4_init_hca() 2193 static int mlx4_init_counters_table(struct mlx4_dev dev) mlx4_init_counters_table() argument 2195 struct mlx4_priv priv = mlx4_priv(dev); mlx4_init_counters_table() 2198 if (!(dev->caps.flags & MLX4_DEV_CAP_FLAG_COUNTERS)) mlx4_init_counters_table() 2201 nent = dev->caps.max_counters; mlx4_init_counters_table() 2205 static void mlx4_cleanup_counters_table(struct mlx4_dev dev) mlx4_cleanup_counters_table() argument 2207 mlx4_bitmap_cleanup(&mlx4_priv(dev)->counters_bitmap); mlx4_cleanup_counters_table() 2210 int __mlx4_counter_alloc(struct mlx4_dev dev, u32 idx) __mlx4_counter_alloc() argument 2212 struct mlx4_priv priv = mlx4_priv(dev); __mlx4_counter_alloc() 2214 if (!(dev->caps.flags & MLX4_DEV_CAP_FLAG_COUNTERS)) __mlx4_counter_alloc() 2224 int mlx4_counter_alloc(struct mlx4_dev dev, u32 idx) mlx4_counter_alloc() argument 2229 if (mlx4_is_mfunc(dev)) { mlx4_counter_alloc() 2230 err = mlx4_cmd_imm(dev, 0, &out_param, RES_COUNTER, mlx4_counter_alloc() 2238 return __mlx4_counter_alloc(dev, idx); mlx4_counter_alloc() 2242 void __mlx4_counter_free(struct mlx4_dev dev, u32 idx) __mlx4_counter_free() argument 2244 mlx4_bitmap_free(&mlx4_priv(dev)->counters_bitmap, idx, MLX4_USE_RR); __mlx4_counter_free() 2248 void mlx4_counter_free(struct mlx4_dev dev, u32 idx) mlx4_counter_free() argument 2252 if (mlx4_is_mfunc(dev)) { mlx4_counter_free() 2254 mlx4_cmd(dev, in_param, RES_COUNTER, RES_OP_RESERVE, mlx4_counter_free() 2259 __mlx4_counter_free(dev, idx); mlx4_counter_free() 2263 void mlx4_set_admin_guid(struct mlx4_dev dev, __be64 guid, int entry, int port) mlx4_set_admin_guid() argument 2265 struct mlx4_priv priv = mlx4_priv(dev); mlx4_set_admin_guid() 2271 __be64 mlx4_get_admin_guid(struct mlx4_dev dev, int entry, int port) mlx4_get_admin_guid() argument 2273 struct mlx4_priv priv = mlx4_priv(dev); mlx4_get_admin_guid() 2279 void mlx4_set_random_admin_guid(struct mlx4_dev dev, int entry, int port) mlx4_set_random_admin_guid() argument 2281 struct mlx4_priv priv = mlx4_priv(dev); mlx4_set_random_admin_guid() 2294 static int mlx4_setup_hca(struct mlx4_dev dev) mlx4_setup_hca() argument 2296 struct mlx4_priv priv = mlx4_priv(dev); mlx4_setup_hca() 2301 err = mlx4_init_uar_table(dev); mlx4_setup_hca() 2303 mlx4_err(dev, "Failed to initialize user access region table, aborting\n"); mlx4_setup_hca() 2307 err = mlx4_uar_alloc(dev, &priv->driver_uar); mlx4_setup_hca() 2309 mlx4_err(dev, "Failed to allocate driver access region, aborting\n"); mlx4_setup_hca() 2315 mlx4_err(dev, "Couldn't map kernel access region, aborting\n"); mlx4_setup_hca() 2320 err = mlx4_init_pd_table(dev); mlx4_setup_hca() 2322 mlx4_err(dev, "Failed to initialize protection domain table, aborting\n"); mlx4_setup_hca() 2326 err = mlx4_init_xrcd_table(dev); mlx4_setup_hca() 2328 mlx4_err(dev, "Failed to initialize reliable connection domain table, aborting\n"); mlx4_setup_hca() 2332 err = mlx4_init_mr_table(dev); mlx4_setup_hca() 2334 mlx4_err(dev, "Failed to initialize memory region table, aborting\n"); mlx4_setup_hca() 2338 if (!mlx4_is_slave(dev)) { mlx4_setup_hca() 2339 err = mlx4_init_mcg_table(dev); mlx4_setup_hca() 2341 mlx4_err(dev, "Failed to initialize multicast group table, aborting\n"); mlx4_setup_hca() 2344 err = mlx4_config_mad_demux(dev); mlx4_setup_hca() 2346 mlx4_err(dev, "Failed in config_mad_demux, aborting\n"); mlx4_setup_hca() 2351 err = mlx4_init_eq_table(dev); mlx4_setup_hca() 2353 mlx4_err(dev, "Failed to initialize event queue table, aborting\n"); mlx4_setup_hca() 2357 err = mlx4_cmd_use_events(dev); mlx4_setup_hca() 2359 mlx4_err(dev, "Failed to switch to event-driven firmware commands, aborting\n"); mlx4_setup_hca() 2363 err = mlx4_NOP(dev); mlx4_setup_hca() 2365 if (dev->flags & MLX4_FLAG_MSI_X) { mlx4_setup_hca() 2366 mlx4_warn(dev, "NOP command failed to generate MSI-X interrupt IRQ %d)\n", mlx4_setup_hca() 2367 priv->eq_table.eq[dev->caps.num_comp_vectors].irq); mlx4_setup_hca() 2368 mlx4_warn(dev, "Trying again without MSI-X\n"); mlx4_setup_hca() 2370 mlx4_err(dev, "NOP command failed to generate interrupt (IRQ %d), aborting\n", mlx4_setup_hca() 2371 priv->eq_table.eq[dev->caps.num_comp_vectors].irq); mlx4_setup_hca() 2372 mlx4_err(dev, "BIOS or ACPI interrupt routing problem?\n"); mlx4_setup_hca() 2378 mlx4_dbg(dev, "NOP command IRQ test passed\n"); mlx4_setup_hca() 2380 err = mlx4_init_cq_table(dev); mlx4_setup_hca() 2382 mlx4_err(dev, "Failed to initialize completion queue table, aborting\n"); mlx4_setup_hca() 2386 err = mlx4_init_srq_table(dev); mlx4_setup_hca() 2388 mlx4_err(dev, "Failed to initialize shared receive queue table, aborting\n"); mlx4_setup_hca() 2392 err = mlx4_init_qp_table(dev); mlx4_setup_hca() 2394 mlx4_err(dev, "Failed to initialize queue pair table, aborting\n"); mlx4_setup_hca() 2398 err = mlx4_init_counters_table(dev); mlx4_setup_hca() 2400 mlx4_err(dev, "Failed to initialize counters table, aborting\n"); mlx4_setup_hca() 2404 if (!mlx4_is_slave(dev)) { mlx4_setup_hca() 2405 for (port = 1; port <= dev->caps.num_ports; port++) { mlx4_setup_hca() 2407 err = mlx4_get_port_ib_caps(dev, port, mlx4_setup_hca() 2410 mlx4_warn(dev, "failed to get port %d default ib capabilities (%d). Continuing with caps = 0\n", mlx4_setup_hca() 2412 dev->caps.ib_port_def_cap[port] = ib_port_default_caps; mlx4_setup_hca() 2415 if (mlx4_is_master(dev)) { mlx4_setup_hca() 2417 for (i = 0; i < dev->num_slaves; i++) { mlx4_setup_hca() 2418 if (i == mlx4_master_func_num(dev)) mlx4_setup_hca() 2425 if (mlx4_is_mfunc(dev)) mlx4_setup_hca() 2426 dev->caps.port_ib_mtu[port] = IB_MTU_2048; mlx4_setup_hca() 2428 dev->caps.port_ib_mtu[port] = IB_MTU_4096; mlx4_setup_hca() 2430 err = mlx4_SET_PORT(dev, port, mlx4_is_master(dev) ? mlx4_setup_hca() 2431 dev->caps.pkey_table_len[port] : -1); mlx4_setup_hca() 2433 mlx4_err(dev, "Failed to set port %d, aborting\n", mlx4_setup_hca() 2443 mlx4_cleanup_counters_table(dev); mlx4_setup_hca() 2446 mlx4_cleanup_qp_table(dev); mlx4_setup_hca() 2449 mlx4_cleanup_srq_table(dev); mlx4_setup_hca() 2452 mlx4_cleanup_cq_table(dev); mlx4_setup_hca() 2455 mlx4_cmd_use_polling(dev); mlx4_setup_hca() 2458 mlx4_cleanup_eq_table(dev); mlx4_setup_hca() 2461 if (!mlx4_is_slave(dev)) mlx4_setup_hca() 2462 mlx4_cleanup_mcg_table(dev); mlx4_setup_hca() 2465 mlx4_cleanup_mr_table(dev); mlx4_setup_hca() 2468 mlx4_cleanup_xrcd_table(dev); mlx4_setup_hca() 2471 mlx4_cleanup_pd_table(dev); mlx4_setup_hca() 2477 mlx4_uar_free(dev, &priv->driver_uar); mlx4_setup_hca() 2480 mlx4_cleanup_uar_table(dev); mlx4_setup_hca() 2484 static void mlx4_enable_msi_x(struct mlx4_dev dev) mlx4_enable_msi_x() argument 2486 struct mlx4_priv priv = mlx4_priv(dev); mlx4_enable_msi_x() 2491 int nreq = dev->caps.num_ports * num_online_cpus() + MSIX_LEGACY_SZ; mlx4_enable_msi_x() 2493 nreq = min_t(int, dev->caps.num_eqs - dev->caps.reserved_eqs, mlx4_enable_msi_x() 2503 nreq = pci_enable_msix_range(dev->persist->pdev, entries, 2, mlx4_enable_msi_x() 2510 dev->caps.num_ports * MIN_MSIX_P_PORT) { mlx4_enable_msi_x() 2512 dev->caps.comp_pool = 0; mlx4_enable_msi_x() 2513 dev->caps.num_comp_vectors = nreq - 1; mlx4_enable_msi_x() 2515 dev->caps.comp_pool = nreq - MSIX_LEGACY_SZ; mlx4_enable_msi_x() 2516 dev->caps.num_comp_vectors = MSIX_LEGACY_SZ - 1; mlx4_enable_msi_x() 2521 dev->flags \|= MLX4_FLAG_MSI_X; mlx4_enable_msi_x() 2528 dev->caps.num_comp_vectors = 1; mlx4_enable_msi_x() 2529 dev->caps.comp_pool = 0; mlx4_enable_msi_x() 2532 priv->eq_table.eq[i].irq = dev->persist->pdev->irq; mlx4_enable_msi_x() 2535 static int mlx4_init_port_info(struct mlx4_dev dev, int port) mlx4_init_port_info() argument 2537 struct mlx4_port_info info = &mlx4_priv(dev)->port[port]; mlx4_init_port_info() 2540 info->dev = dev; mlx4_init_port_info() 2542 if (!mlx4_is_slave(dev)) { mlx4_init_port_info() 2543 mlx4_init_mac_table(dev, &info->mac_table); mlx4_init_port_info() 2544 mlx4_init_vlan_table(dev, &info->vlan_table); mlx4_init_port_info() 2545 mlx4_init_roce_gid_table(dev, &info->gid_table); mlx4_init_port_info() 2546 info->base_qpn = mlx4_get_base_qpn(dev, port); mlx4_init_port_info() 2551 if (mlx4_is_mfunc(dev)) mlx4_init_port_info() 2560 err = device_create_file(&dev->persist->pdev->dev, &info->port_attr); mlx4_init_port_info() 2562 mlx4_err(dev, "Failed to create file for port %d\n", port); mlx4_init_port_info() 2568 if (mlx4_is_mfunc(dev)) mlx4_init_port_info() 2577 err = device_create_file(&dev->persist->pdev->dev, mlx4_init_port_info() 2580 mlx4_err(dev, "Failed to create mtu file for port %d\n", port); mlx4_init_port_info() 2581 device_remove_file(&info->dev->persist->pdev->dev, mlx4_init_port_info() 2594 device_remove_file(&info->dev->persist->pdev->dev, &info->port_attr); mlx4_cleanup_port_info() 2595 device_remove_file(&info->dev->persist->pdev->dev, mlx4_cleanup_port_info() 2599 static int mlx4_init_steering(struct mlx4_dev dev) mlx4_init_steering() argument 2601 struct mlx4_priv priv = mlx4_priv(dev); mlx4_init_steering() 2602 int num_entries = dev->caps.num_ports; mlx4_init_steering() 2617 static void mlx4_clear_steering(struct mlx4_dev dev) mlx4_clear_steering() argument 2619 struct mlx4_priv priv = mlx4_priv(dev); mlx4_clear_steering() 2622 int num_entries = dev->caps.num_ports; mlx4_clear_steering() 2658 static int mlx4_get_ownership(struct mlx4_dev dev) mlx4_get_ownership() argument 2663 if (pci_channel_offline(dev->persist->pdev)) mlx4_get_ownership() 2666 owner = ioremap(pci_resource_start(dev->persist->pdev, 0) + mlx4_get_ownership() 2670 mlx4_err(dev, "Failed to obtain ownership bit\n"); mlx4_get_ownership() 2679 static void mlx4_free_ownership(struct mlx4_dev dev) mlx4_free_ownership() argument 2683 if (pci_channel_offline(dev->persist->pdev)) mlx4_free_ownership() 2686 owner = ioremap(pci_resource_start(dev->persist->pdev, 0) + mlx4_free_ownership() 2690 mlx4_err(dev, "Failed to obtain ownership bit\n"); mlx4_free_ownership() 2701 static u64 mlx4_enable_sriov(struct mlx4_dev dev, struct pci_dev pdev, mlx4_enable_sriov() argument 2704 u64 dev_flags = dev->flags; mlx4_enable_sriov() 2708 dev->dev_vfs = kcalloc(total_vfs, sizeof(dev->dev_vfs), mlx4_enable_sriov() 2710 if (!dev->dev_vfs) mlx4_enable_sriov() 2716 if (dev->flags & MLX4_FLAG_SRIOV) { mlx4_enable_sriov() 2718 mlx4_err(dev, "SR-IOV was already enabled, but with num_vfs (%d) different than requested (%d)\n", mlx4_enable_sriov() 2724 dev->dev_vfs = kzalloc(total_vfs sizeof(dev->dev_vfs), GFP_KERNEL); mlx4_enable_sriov() 2725 if (NULL == dev->dev_vfs) { mlx4_enable_sriov() 2726 mlx4_err(dev, "Failed to allocate memory for VFs\n"); mlx4_enable_sriov() 2730 if (!(dev->flags & MLX4_FLAG_SRIOV)) { mlx4_enable_sriov() 2731 mlx4_warn(dev, "Enabling SR-IOV with %d VFs\n", total_vfs); mlx4_enable_sriov() 2735 mlx4_err(dev, "Failed to enable SR-IOV, continuing without SR-IOV (err = %d)\n", mlx4_enable_sriov() 2739 mlx4_warn(dev, "Running in master mode\n"); mlx4_enable_sriov() 2743 dev->persist->num_vfs = total_vfs; mlx4_enable_sriov() 2750 dev->persist->num_vfs = 0; mlx4_enable_sriov() 2751 kfree(dev->dev_vfs); mlx4_enable_sriov() 2759 static int mlx4_check_dev_cap(struct mlx4_dev dev, struct mlx4_dev_cap dev_cap, mlx4_check_dev_cap() argument 2766 mlx4_err(dev, "Requested %d VFs, but FW does not support more than 64\n", mlx4_check_dev_cap() 2777 struct mlx4_dev dev; mlx4_load_one() local 2785 dev = &priv->dev; mlx4_load_one() 2799 dev->rev_id = pdev->revision; mlx4_load_one() 2800 dev->numa_node = dev_to_node(&pdev->dev); mlx4_load_one() 2804 mlx4_warn(dev, "Detected virtual function - running in slave mode\n"); mlx4_load_one() 2805 dev->flags \|= MLX4_FLAG_SLAVE; mlx4_load_one() 2810 err = mlx4_get_ownership(dev); mlx4_load_one() 2815 mlx4_warn(dev, "Multiple PFs not yet supported - Skipping PF\n"); mlx4_load_one() 2828 err = mlx4_reset(dev); mlx4_load_one() 2830 mlx4_err(dev, "Failed to reset HCA, aborting\n"); mlx4_load_one() 2835 dev->flags = MLX4_FLAG_MASTER; mlx4_load_one() 2838 dev->flags \|= MLX4_FLAG_SRIOV; mlx4_load_one() 2839 dev->persist->num_vfs = total_vfs; mlx4_load_one() 2846 dev->persist->state = MLX4_DEVICE_STATE_UP; mlx4_load_one() 2849 err = mlx4_cmd_init(dev); mlx4_load_one() 2851 mlx4_err(dev, "Failed to init command interface, aborting\n"); mlx4_load_one() 2858 if (mlx4_is_mfunc(dev)) { mlx4_load_one() 2859 if (mlx4_is_master(dev)) { mlx4_load_one() 2860 dev->num_slaves = MLX4_MAX_NUM_SLAVES; mlx4_load_one() 2863 dev->num_slaves = 0; mlx4_load_one() 2864 err = mlx4_multi_func_init(dev); mlx4_load_one() 2866 mlx4_err(dev, "Failed to init slave mfunc interface, aborting\n"); mlx4_load_one() 2872 err = mlx4_init_fw(dev); mlx4_load_one() 2874 mlx4_err(dev, "Failed to init fw, aborting.\n"); mlx4_load_one() 2878 if (mlx4_is_master(dev)) { mlx4_load_one() 2888 err = mlx4_QUERY_DEV_CAP(dev, dev_cap); mlx4_load_one() 2890 mlx4_err(dev, "QUERY_DEV_CAP command failed, aborting.\n"); mlx4_load_one() 2894 if (mlx4_check_dev_cap(dev, dev_cap, nvfs)) mlx4_load_one() 2898 u64 dev_flags = mlx4_enable_sriov(dev, pdev, mlx4_load_one() 2903 mlx4_cmd_cleanup(dev, MLX4_CMD_CLEANUP_ALL); mlx4_load_one() 2904 dev->flags = dev_flags; mlx4_load_one() 2905 if (!SRIOV_VALID_STATE(dev->flags)) { mlx4_load_one() 2906 mlx4_err(dev, "Invalid SRIOV state\n"); mlx4_load_one() 2909 err = mlx4_reset(dev); mlx4_load_one() 2911 mlx4_err(dev, "Failed to reset HCA, aborting.\n"); mlx4_load_one() 2922 err = mlx4_QUERY_DEV_CAP(dev, dev_cap); mlx4_load_one() 2924 mlx4_err(dev, "QUERY_DEV_CAP command failed, aborting.\n"); mlx4_load_one() 2928 if (mlx4_check_dev_cap(dev, dev_cap, nvfs)) mlx4_load_one() 2933 err = mlx4_init_hca(dev); mlx4_load_one() 2938 mlx4_cmd_cleanup(dev, MLX4_CMD_CLEANUP_ALL); mlx4_load_one() 2940 if (dev->flags & MLX4_FLAG_SRIOV) { mlx4_load_one() 2943 if (mlx4_is_master(dev) && !reset_flow) mlx4_load_one() 2945 dev->flags &= ~MLX4_FLAG_SRIOV; mlx4_load_one() 2947 if (!mlx4_is_slave(dev)) mlx4_load_one() 2948 mlx4_free_ownership(dev); mlx4_load_one() 2949 dev->flags \|= MLX4_FLAG_SLAVE; mlx4_load_one() 2950 dev->flags &= ~MLX4_FLAG_MASTER; mlx4_load_one() 2956 if (mlx4_is_master(dev) && (dev_cap->flags2 & MLX4_DEV_CAP_FLAG2_SYS_EQS)) { mlx4_load_one() 2957 u64 dev_flags = mlx4_enable_sriov(dev, pdev, total_vfs, mlx4_load_one() 2960 if ((dev->flags ^ dev_flags) & (MLX4_FLAG_MASTER \| MLX4_FLAG_SLAVE)) { mlx4_load_one() 2961 mlx4_cmd_cleanup(dev, MLX4_CMD_CLEANUP_VHCR); mlx4_load_one() 2962 dev->flags = dev_flags; mlx4_load_one() 2963 err = mlx4_cmd_init(dev); mlx4_load_one() 2968 mlx4_err(dev, "Failed to init VHCR command interface, aborting\n"); mlx4_load_one() 2972 dev->flags = dev_flags; mlx4_load_one() 2975 if (!SRIOV_VALID_STATE(dev->flags)) { mlx4_load_one() 2976 mlx4_err(dev, "Invalid SRIOV state\n"); mlx4_load_one() 2985 if (!mlx4_is_slave(dev)) mlx4_load_one() 2986 mlx4_check_pcie_caps(dev); mlx4_load_one() 2990 if (mlx4_is_master(dev)) { mlx4_load_one() 2993 mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_IB) mlx4_load_one() 2998 mlx4_err(dev, mlx4_load_one() 3003 if (dev->caps.num_ports < 2 && mlx4_load_one() 3006 mlx4_err(dev, mlx4_load_one() 3008 dev->caps.num_ports); mlx4_load_one() 3011 memcpy(dev->persist->nvfs, nvfs, sizeof(dev->persist->nvfs)); mlx4_load_one() 3014 i < sizeof(dev->persist->nvfs)/ mlx4_load_one() 3015 sizeof(dev->persist->nvfs[0]); i++) { mlx4_load_one() 3018 for (j = 0; j < dev->persist->nvfs[i]; ++sum, ++j) { mlx4_load_one() 3019 dev->dev_vfs[sum].min_port = i < 2 ? i + 1 : 1; mlx4_load_one() 3020 dev->dev_vfs[sum].n_ports = i < 2 ? 1 : mlx4_load_one() 3021 dev->caps.num_ports; mlx4_load_one() 3028 err = mlx4_multi_func_init(dev); mlx4_load_one() 3030 mlx4_err(dev, "Failed to init master mfunc interface, aborting.\n"); mlx4_load_one() 3035 err = mlx4_alloc_eq_table(dev); mlx4_load_one() 3042 mlx4_enable_msi_x(dev); mlx4_load_one() 3043 if ((mlx4_is_mfunc(dev)) && mlx4_load_one() 3044 !(dev->flags & MLX4_FLAG_MSI_X)) { mlx4_load_one() 3046 mlx4_err(dev, "INTx is not supported in multi-function mode, aborting\n"); mlx4_load_one() 3050 if (!mlx4_is_slave(dev)) { mlx4_load_one() 3051 err = mlx4_init_steering(dev); mlx4_load_one() 3056 err = mlx4_setup_hca(dev); mlx4_load_one() 3057 if (err == -EBUSY && (dev->flags & MLX4_FLAG_MSI_X) && mlx4_load_one() 3058 !mlx4_is_mfunc(dev)) { mlx4_load_one() 3059 dev->flags &= ~MLX4_FLAG_MSI_X; mlx4_load_one() 3060 dev->caps.num_comp_vectors = 1; mlx4_load_one() 3061 dev->caps.comp_pool = 0; mlx4_load_one() 3063 err = mlx4_setup_hca(dev); mlx4_load_one() 3069 mlx4_init_quotas(dev); mlx4_load_one() 3073 if (mlx4_is_master(dev)) { mlx4_load_one() 3074 err = mlx4_ARM_COMM_CHANNEL(dev); mlx4_load_one() 3076 mlx4_err(dev, " Failed to arm comm channel eq: %x\n", mlx4_load_one() 3082 for (port = 1; port <= dev->caps.num_ports; port++) { mlx4_load_one() 3083 err = mlx4_init_port_info(dev, port); mlx4_load_one() 3091 err = mlx4_register_device(dev); mlx4_load_one() 3095 mlx4_request_modules(dev); mlx4_load_one() 3097 mlx4_sense_init(dev); mlx4_load_one() 3098 mlx4_start_sense(dev); mlx4_load_one() 3102 if (mlx4_is_master(dev) && dev->persist->num_vfs && !reset_flow) mlx4_load_one() 3112 mlx4_cleanup_counters_table(dev); mlx4_load_one() 3113 mlx4_cleanup_qp_table(dev); mlx4_load_one() 3114 mlx4_cleanup_srq_table(dev); mlx4_load_one() 3115 mlx4_cleanup_cq_table(dev); mlx4_load_one() 3116 mlx4_cmd_use_polling(dev); mlx4_load_one() 3117 mlx4_cleanup_eq_table(dev); mlx4_load_one() 3118 mlx4_cleanup_mcg_table(dev); mlx4_load_one() 3119 mlx4_cleanup_mr_table(dev); mlx4_load_one() 3120 mlx4_cleanup_xrcd_table(dev); mlx4_load_one() 3121 mlx4_cleanup_pd_table(dev); mlx4_load_one() 3122 mlx4_cleanup_uar_table(dev); mlx4_load_one() 3125 if (!mlx4_is_slave(dev)) mlx4_load_one() 3126 mlx4_clear_steering(dev); mlx4_load_one() 3129 if (dev->flags & MLX4_FLAG_MSI_X) mlx4_load_one() 3133 mlx4_free_eq_table(dev); mlx4_load_one() 3136 if (mlx4_is_master(dev)) { mlx4_load_one() 3137 mlx4_free_resource_tracker(dev, RES_TR_FREE_STRUCTS_ONLY); mlx4_load_one() 3138 mlx4_multi_func_cleanup(dev); mlx4_load_one() 3141 if (mlx4_is_slave(dev)) { mlx4_load_one() 3142 kfree(dev->caps.qp0_qkey); mlx4_load_one() 3143 kfree(dev->caps.qp0_tunnel); mlx4_load_one() 3144 kfree(dev->caps.qp0_proxy); mlx4_load_one() 3145 kfree(dev->caps.qp1_tunnel); mlx4_load_one() 3146 kfree(dev->caps.qp1_proxy); mlx4_load_one() 3150 mlx4_close_hca(dev); mlx4_load_one() 3153 mlx4_close_fw(dev); mlx4_load_one() 3156 if (mlx4_is_slave(dev)) mlx4_load_one() 3157 mlx4_multi_func_cleanup(dev); mlx4_load_one() 3160 mlx4_cmd_cleanup(dev, MLX4_CMD_CLEANUP_ALL); mlx4_load_one() 3163 if (dev->flags & MLX4_FLAG_SRIOV && !existing_vfs) { mlx4_load_one() 3165 dev->flags &= ~MLX4_FLAG_SRIOV; mlx4_load_one() 3168 if (mlx4_is_master(dev) && dev->persist->num_vfs && !reset_flow) mlx4_load_one() 3171 kfree(priv->dev.dev_vfs); mlx4_load_one() 3173 if (!mlx4_is_slave(dev)) mlx4_load_one() 3174 mlx4_free_ownership(dev); mlx4_load_one() 3195 dev_err(&pdev->dev, "Cannot enable PCI device, aborting\n"); __mlx4_init_one() 3207 dev_err(&pdev->dev, "num_vfs module parameter cannot be negative\n"); __mlx4_init_one() 3216 dev_err(&pdev->dev, "probe_vf module parameter cannot be negative or greater than num_vfs\n"); __mlx4_init_one() 3222 dev_err(&pdev->dev, __mlx4_init_one() 3231 dev_err(&pdev->dev, __mlx4_init_one() 3243 dev_err(&pdev->dev, "Missing DCS, aborting (driver_data: 0x%x, pci_resource_flags(pdev, 0):0x%lx)\n", __mlx4_init_one() 3249 dev_err(&pdev->dev, "Missing UAR, aborting\n"); __mlx4_init_one() 3256 dev_err(&pdev->dev, "Couldn't get PCI resources, aborting\n"); __mlx4_init_one() 3264 dev_warn(&pdev->dev, "Warning: couldn't set 64-bit PCI DMA mask\n"); __mlx4_init_one() 3267 dev_err(&pdev->dev, "Can't set PCI DMA mask, aborting\n"); __mlx4_init_one() 3273 dev_warn(&pdev->dev, "Warning: couldn't set 64-bit consistent PCI DMA mask\n"); __mlx4_init_one() 3276 dev_err(&pdev->dev, "Can't set consistent PCI DMA mask, aborting\n"); __mlx4_init_one() 3282 dma_set_max_seg_size(&pdev->dev, 1024 * 1024 * 1024); __mlx4_init_one() 3301 dev_warn(&pdev->dev, "Skipping virtual function:%d\n", __mlx4_init_one() 3309 err = mlx4_catas_init(&priv->dev); __mlx4_init_one() 3320 mlx4_catas_end(&priv->dev); __mlx4_init_one() 3334 struct mlx4_dev dev; mlx4_init_one() local 3343 dev = &priv->dev; mlx4_init_one() 3344 dev->persist = kzalloc(sizeof(dev->persist), GFP_KERNEL); mlx4_init_one() 3345 if (!dev->persist) { mlx4_init_one() 3349 dev->persist->pdev = pdev; mlx4_init_one() 3350 dev->persist->dev = dev; mlx4_init_one() 3351 pci_set_drvdata(pdev, dev->persist); mlx4_init_one() 3353 mutex_init(&dev->persist->device_state_mutex); mlx4_init_one() 3354 mutex_init(&dev->persist->interface_state_mutex); mlx4_init_one() 3358 kfree(dev->persist); mlx4_init_one() 3367 static void mlx4_clean_dev(struct mlx4_dev dev) mlx4_clean_dev() argument 3369 struct mlx4_dev_persistent persist = dev->persist; mlx4_clean_dev() 3370 struct mlx4_priv priv = mlx4_priv(dev); mlx4_clean_dev() 3371 unsigned long flags = (dev->flags & RESET_PERSIST_MASK_FLAGS); mlx4_clean_dev() 3374 priv->dev.persist = persist; mlx4_clean_dev() 3375 priv->dev.flags = flags; mlx4_clean_dev() 3381 struct mlx4_dev dev = persist->dev; mlx4_unload_one() local 3382 struct mlx4_priv priv = mlx4_priv(dev); mlx4_unload_one() 3390 for (i = 0; i < dev->caps.num_ports; i++) { mlx4_unload_one() 3391 dev->persist->curr_port_type[i] = dev->caps.port_type[i + 1]; mlx4_unload_one() 3392 dev->persist->curr_port_poss_type[i] = dev->caps. mlx4_unload_one() 3398 mlx4_stop_sense(dev); mlx4_unload_one() 3399 mlx4_unregister_device(dev); mlx4_unload_one() 3401 for (p = 1; p <= dev->caps.num_ports; p++) { mlx4_unload_one() 3403 mlx4_CLOSE_PORT(dev, p); mlx4_unload_one() 3406 if (mlx4_is_master(dev)) mlx4_unload_one() 3407 mlx4_free_resource_tracker(dev, mlx4_unload_one() 3410 mlx4_cleanup_counters_table(dev); mlx4_unload_one() 3411 mlx4_cleanup_qp_table(dev); mlx4_unload_one() 3412 mlx4_cleanup_srq_table(dev); mlx4_unload_one() 3413 mlx4_cleanup_cq_table(dev); mlx4_unload_one() 3414 mlx4_cmd_use_polling(dev); mlx4_unload_one() 3415 mlx4_cleanup_eq_table(dev); mlx4_unload_one() 3416 mlx4_cleanup_mcg_table(dev); mlx4_unload_one() 3417 mlx4_cleanup_mr_table(dev); mlx4_unload_one() 3418 mlx4_cleanup_xrcd_table(dev); mlx4_unload_one() 3419 mlx4_cleanup_pd_table(dev); mlx4_unload_one() 3421 if (mlx4_is_master(dev)) mlx4_unload_one() 3422 mlx4_free_resource_tracker(dev, mlx4_unload_one() 3426 mlx4_uar_free(dev, &priv->driver_uar); mlx4_unload_one() 3427 mlx4_cleanup_uar_table(dev); mlx4_unload_one() 3428 if (!mlx4_is_slave(dev)) mlx4_unload_one() 3429 mlx4_clear_steering(dev); mlx4_unload_one() 3430 mlx4_free_eq_table(dev); mlx4_unload_one() 3431 if (mlx4_is_master(dev)) mlx4_unload_one() 3432 mlx4_multi_func_cleanup(dev); mlx4_unload_one() 3433 mlx4_close_hca(dev); mlx4_unload_one() 3434 mlx4_close_fw(dev); mlx4_unload_one() 3435 if (mlx4_is_slave(dev)) mlx4_unload_one() 3436 mlx4_multi_func_cleanup(dev); mlx4_unload_one() 3437 mlx4_cmd_cleanup(dev, MLX4_CMD_CLEANUP_ALL); mlx4_unload_one() 3439 if (dev->flags & MLX4_FLAG_MSI_X) mlx4_unload_one() 3442 if (!mlx4_is_slave(dev)) mlx4_unload_one() 3443 mlx4_free_ownership(dev); mlx4_unload_one() 3445 kfree(dev->caps.qp0_qkey); mlx4_unload_one() 3446 kfree(dev->caps.qp0_tunnel); mlx4_unload_one() 3447 kfree(dev->caps.qp0_proxy); mlx4_unload_one() 3448 kfree(dev->caps.qp1_tunnel); mlx4_unload_one() 3449 kfree(dev->caps.qp1_proxy); mlx4_unload_one() 3450 kfree(dev->dev_vfs); mlx4_unload_one() 3452 mlx4_clean_dev(dev); mlx4_unload_one() 3460 struct mlx4_dev dev = persist->dev; mlx4_remove_one() local 3461 struct mlx4_priv priv = mlx4_priv(dev); mlx4_remove_one() 3469 if (mlx4_is_master(dev) && dev->flags & MLX4_FLAG_SRIOV) { mlx4_remove_one() 3470 active_vfs = mlx4_how_many_lives_vf(dev); mlx4_remove_one() 3483 mlx4_info(dev, "%s: interface is down\n", __func__); mlx4_remove_one() 3484 mlx4_catas_end(dev); mlx4_remove_one() 3485 if (dev->flags & MLX4_FLAG_SRIOV && !active_vfs) { mlx4_remove_one() 3486 mlx4_warn(dev, "Disabling SR-IOV\n"); mlx4_remove_one() 3492 kfree(dev->persist); mlx4_remove_one() 3497 static int restore_current_port_types(struct mlx4_dev dev, restore_current_port_types() argument 3501 struct mlx4_priv priv = mlx4_priv(dev); restore_current_port_types() 3504 mlx4_stop_sense(dev); restore_current_port_types() 3507 for (i = 0; i < dev->caps.num_ports; i++) restore_current_port_types() 3508 dev->caps.possible_type[i + 1] = poss_types[i]; restore_current_port_types() 3509 err = mlx4_change_port_types(dev, types); restore_current_port_types() 3510 mlx4_start_sense(dev); restore_current_port_types() 3519 struct mlx4_dev dev = persist->dev; mlx4_restart_one() local 3520 struct mlx4_priv priv = mlx4_priv(dev); mlx4_restart_one() 3525 total_vfs = dev->persist->num_vfs; mlx4_restart_one() 3526 memcpy(nvfs, dev->persist->nvfs, sizeof(dev->persist->nvfs)); mlx4_restart_one() 3531 mlx4_err(dev, "%s: ERROR: mlx4_load_one failed, pci_name=%s, err=%d\n", mlx4_restart_one() 3536 err = restore_current_port_types(dev, dev->persist->curr_port_type, mlx4_restart_one() 3537 dev->persist->curr_port_poss_type); mlx4_restart_one() 3539 mlx4_err(dev, "could not restore original port types (%d)\n", mlx4_restart_one() 3598 mlx4_err(persist->dev, "mlx4_pci_err_detected was called\n"); mlx4_pci_err_detected() 3616 struct mlx4_dev dev = persist->dev; mlx4_pci_slot_reset() local 3617 struct mlx4_priv *priv = mlx4_priv(dev); mlx4_pci_slot_reset() 3622 mlx4_err(dev, "mlx4_pci_slot_reset was called\n"); mlx4_pci_slot_reset() 3625 mlx4_err(dev, "Can not re-enable device, ret=%d\n", ret); mlx4_pci_slot_reset() 3633 total_vfs = dev->persist->num_vfs; mlx4_pci_slot_reset() 3634 memcpy(nvfs, dev->persist->nvfs, sizeof(dev->persist->nvfs)); mlx4_pci_slot_reset() 3641 mlx4_err(dev, "%s: mlx4_load_one failed, ret=%d\n", mlx4_pci_slot_reset() 3646 ret = restore_current_port_types(dev, dev->persist-> mlx4_pci_slot_reset() 3647 curr_port_type, dev->persist-> mlx4_pci_slot_reset() 3650 mlx4_err(dev, "could not restore original port types (%d)\n", ret); mlx4_pci_slot_reset() 3662 mlx4_info(persist->dev, "mlx4_shutdown was called\n"); mlx4_shutdown()
/linux-4.1.27/drivers/usb/misc/
H A D	adutux.c	109 static inline void adu_debug_data(struct device dev, const char function, adu_debug_data() argument 112 dev_dbg(dev, "%s - length = %d, data = %ph\n", adu_debug_data() 120 static void adu_abort_transfers(struct adu_device dev) adu_abort_transfers() argument 124 if (dev->udev == NULL) adu_abort_transfers() 130 spin_lock_irqsave(&dev->buflock, flags); adu_abort_transfers() 131 if (!dev->read_urb_finished) { adu_abort_transfers() 132 spin_unlock_irqrestore(&dev->buflock, flags); adu_abort_transfers() 133 usb_kill_urb(dev->interrupt_in_urb); adu_abort_transfers() 135 spin_unlock_irqrestore(&dev->buflock, flags); adu_abort_transfers() 137 spin_lock_irqsave(&dev->buflock, flags); adu_abort_transfers() 138 if (!dev->out_urb_finished) { adu_abort_transfers() 139 spin_unlock_irqrestore(&dev->buflock, flags); adu_abort_transfers() 140 usb_kill_urb(dev->interrupt_out_urb); adu_abort_transfers() 142 spin_unlock_irqrestore(&dev->buflock, flags); adu_abort_transfers() 145 static void adu_delete(struct adu_device dev) adu_delete() argument 148 usb_free_urb(dev->interrupt_in_urb); adu_delete() 149 usb_free_urb(dev->interrupt_out_urb); adu_delete() 150 kfree(dev->read_buffer_primary); adu_delete() 151 kfree(dev->read_buffer_secondary); adu_delete() 152 kfree(dev->interrupt_in_buffer); adu_delete() 153 kfree(dev->interrupt_out_buffer); adu_delete() 154 kfree(dev); adu_delete() 159 struct adu_device dev = urb->context; adu_interrupt_in_callback() local 162 adu_debug_data(&dev->udev->dev, __func__, adu_interrupt_in_callback() 165 spin_lock(&dev->buflock); adu_interrupt_in_callback() 170 dev_dbg(&dev->udev->dev, adu_interrupt_in_callback() 177 if (urb->actual_length > 0 && dev->interrupt_in_buffer[0] != 0x00) { adu_interrupt_in_callback() 178 if (dev->read_buffer_length < adu_interrupt_in_callback() 179 (4 * usb_endpoint_maxp(dev->interrupt_in_endpoint)) - adu_interrupt_in_callback() 181 memcpy (dev->read_buffer_primary + adu_interrupt_in_callback() 182 dev->read_buffer_length, adu_interrupt_in_callback() 183 dev->interrupt_in_buffer, urb->actual_length); adu_interrupt_in_callback() 185 dev->read_buffer_length += urb->actual_length; adu_interrupt_in_callback() 186 dev_dbg(&dev->udev->dev,"%s reading %d\n", __func__, adu_interrupt_in_callback() 189 dev_dbg(&dev->udev->dev,"%s : read_buffer overflow\n", adu_interrupt_in_callback() 195 dev->read_urb_finished = 1; adu_interrupt_in_callback() 196 spin_unlock(&dev->buflock); adu_interrupt_in_callback() 198 wake_up_interruptible(&dev->read_wait); adu_interrupt_in_callback() 203 struct adu_device dev = urb->context; adu_interrupt_out_callback() local 206 adu_debug_data(&dev->udev->dev, __func__, adu_interrupt_out_callback() 212 dev_dbg(&dev->udev->dev, adu_interrupt_out_callback() 219 spin_lock(&dev->buflock); adu_interrupt_out_callback() 220 dev->out_urb_finished = 1; adu_interrupt_out_callback() 221 wake_up(&dev->write_wait); adu_interrupt_out_callback() 222 spin_unlock(&dev->buflock); adu_interrupt_out_callback() 227 struct adu_device dev = NULL; adu_open() local 246 dev = usb_get_intfdata(interface); adu_open() 247 if (!dev \|\| !dev->udev) { adu_open() 253 if (dev->open_count) { adu_open() 258 ++dev->open_count; adu_open() 259 dev_dbg(&dev->udev->dev, "%s: open count %d\n", __func__, adu_open() 260 dev->open_count); adu_open() 263 file->private_data = dev; adu_open() 266 dev->read_buffer_length = 0; adu_open() 269 usb_fill_int_urb(dev->interrupt_in_urb, dev->udev, adu_open() 270 usb_rcvintpipe(dev->udev, adu_open() 271 dev->interrupt_in_endpoint->bEndpointAddress), adu_open() 272 dev->interrupt_in_buffer, adu_open() 273 usb_endpoint_maxp(dev->interrupt_in_endpoint), adu_open() 274 adu_interrupt_in_callback, dev, adu_open() 275 dev->interrupt_in_endpoint->bInterval); adu_open() 276 dev->read_urb_finished = 0; adu_open() 277 if (usb_submit_urb(dev->interrupt_in_urb, GFP_KERNEL)) adu_open() 278 dev->read_urb_finished = 1; adu_open() 283 dev->out_urb_finished = 1; adu_open() 293 static void adu_release_internal(struct adu_device dev) adu_release_internal() argument 296 --dev->open_count; adu_release_internal() 297 dev_dbg(&dev->udev->dev, "%s : open count %d\n", __func__, adu_release_internal() 298 dev->open_count); adu_release_internal() 299 if (dev->open_count <= 0) { adu_release_internal() 300 adu_abort_transfers(dev); adu_release_internal() 301 dev->open_count = 0; adu_release_internal() 307 struct adu_device dev; adu_release() local 315 dev = file->private_data; adu_release() 316 if (dev == NULL) { adu_release() 323 if (dev->open_count <= 0) { adu_release() 324 dev_dbg(&dev->udev->dev, "%s : device not opened\n", __func__); adu_release() 329 adu_release_internal(dev); adu_release() 330 if (dev->udev == NULL) { adu_release() 332 if (!dev->open_count) /* ... and we're the last user / adu_release() 333 adu_delete(dev); adu_release() 344 struct adu_device dev; adu_read() local 354 dev = file->private_data; adu_read() 355 if (mutex_lock_interruptible(&dev->mtx)) adu_read() 359 if (dev->udev == NULL) { adu_read() 367 dev_dbg(&dev->udev->dev, "%s : read request of 0 bytes\n", adu_read() 373 dev_dbg(&dev->udev->dev, "%s : about to start looping\n", __func__); adu_read() 375 int data_in_secondary = dev->secondary_tail - dev->secondary_head; adu_read() 376 dev_dbg(&dev->udev->dev, adu_read() 379 dev->interrupt_in_urb->status); adu_read() 384 i = copy_to_user(buffer, dev->read_buffer_secondary+dev->secondary_head, amount); adu_read() 389 dev->secondary_head += (amount - i); adu_read() 398 spin_lock_irqsave (&dev->buflock, flags); adu_read() 399 if (dev->read_buffer_length) { adu_read() 402 dev_dbg(&dev->udev->dev, adu_read() 404 __func__, dev->read_buffer_length); adu_read() 405 tmp = dev->read_buffer_secondary; adu_read() 406 dev->read_buffer_secondary = dev->read_buffer_primary; adu_read() 407 dev->read_buffer_primary = tmp; adu_read() 408 dev->secondary_head = 0; adu_read() 409 dev->secondary_tail = dev->read_buffer_length; adu_read() 410 dev->read_buffer_length = 0; adu_read() 411 spin_unlock_irqrestore(&dev->buflock, flags); adu_read() 416 if (!dev->read_urb_finished) { adu_read() 418 spin_unlock_irqrestore(&dev->buflock, flags); adu_read() 419 dev_dbg(&dev->udev->dev, adu_read() 424 dev_dbg(&dev->udev->dev, adu_read() 427 dev->read_urb_finished = 0; adu_read() 428 spin_unlock_irqrestore(&dev->buflock, flags); adu_read() 430 usb_fill_int_urb(dev->interrupt_in_urb, dev->udev, adu_read() 431 usb_rcvintpipe(dev->udev, adu_read() 432 dev->interrupt_in_endpoint->bEndpointAddress), adu_read() 433 dev->interrupt_in_buffer, adu_read() 434 usb_endpoint_maxp(dev->interrupt_in_endpoint), adu_read() 436 dev, adu_read() 437 dev->interrupt_in_endpoint->bInterval); adu_read() 438 retval = usb_submit_urb(dev->interrupt_in_urb, GFP_KERNEL); adu_read() 440 dev->read_urb_finished = 1; adu_read() 444 dev_dbg(&dev->udev->dev, adu_read() 453 add_wait_queue(&dev->read_wait, &wait); adu_read() 454 spin_lock_irqsave(&dev->buflock, flags); adu_read() 455 if (!dev->read_urb_finished) { adu_read() 456 spin_unlock_irqrestore(&dev->buflock, flags); adu_read() 459 spin_unlock_irqrestore(&dev->buflock, flags); adu_read() 462 remove_wait_queue(&dev->read_wait, &wait); adu_read() 465 dev_dbg(&dev->udev->dev, adu_read() 472 dev_dbg(&dev->udev->dev, adu_read() 484 spin_lock_irqsave(&dev->buflock, flags); adu_read() 485 if (should_submit && dev->read_urb_finished) { adu_read() 486 dev->read_urb_finished = 0; adu_read() 487 spin_unlock_irqrestore(&dev->buflock, flags); adu_read() 488 usb_fill_int_urb(dev->interrupt_in_urb, dev->udev, adu_read() 489 usb_rcvintpipe(dev->udev, adu_read() 490 dev->interrupt_in_endpoint->bEndpointAddress), adu_read() 491 dev->interrupt_in_buffer, adu_read() 492 usb_endpoint_maxp(dev->interrupt_in_endpoint), adu_read() 494 dev, adu_read() 495 dev->interrupt_in_endpoint->bInterval); adu_read() 496 if (usb_submit_urb(dev->interrupt_in_urb, GFP_KERNEL) != 0) adu_read() 497 dev->read_urb_finished = 1; adu_read() 500 spin_unlock_irqrestore(&dev->buflock, flags); adu_read() 505 mutex_unlock(&dev->mtx); adu_read() 514 struct adu_device dev; adu_write() local 521 dev = file->private_data; adu_write() 523 retval = mutex_lock_interruptible(&dev->mtx); adu_write() 528 if (dev->udev == NULL) { adu_write() 536 dev_dbg(&dev->udev->dev, "%s : write request of 0 bytes\n", adu_write() 542 add_wait_queue(&dev->write_wait, &waita); adu_write() 544 spin_lock_irqsave(&dev->buflock, flags); adu_write() 545 if (!dev->out_urb_finished) { adu_write() 546 spin_unlock_irqrestore(&dev->buflock, flags); adu_write() 548 mutex_unlock(&dev->mtx); adu_write() 550 dev_dbg(&dev->udev->dev, "%s : interrupted\n", adu_write() 557 dev_dbg(&dev->udev->dev, adu_write() 562 remove_wait_queue(&dev->write_wait, &waita); adu_write() 563 retval = mutex_lock_interruptible(&dev->mtx); adu_write() 569 dev_dbg(&dev->udev->dev, adu_write() 573 spin_unlock_irqrestore(&dev->buflock, flags); adu_write() 575 remove_wait_queue(&dev->write_wait, &waita); adu_write() 576 dev_dbg(&dev->udev->dev, "%s : sending, count = %Zd\n", adu_write() 580 buffer_size = usb_endpoint_maxp(dev->interrupt_out_endpoint); adu_write() 582 dev_dbg(&dev->udev->dev, adu_write() 586 if (copy_from_user(dev->interrupt_out_buffer, buffer, bytes_to_write) != 0) { adu_write() 593 dev->interrupt_out_urb, adu_write() 594 dev->udev, adu_write() 595 usb_sndintpipe(dev->udev, dev->interrupt_out_endpoint->bEndpointAddress), adu_write() 596 dev->interrupt_out_buffer, adu_write() 599 dev, adu_write() 600 dev->interrupt_out_endpoint->bInterval); adu_write() 601 dev->interrupt_out_urb->actual_length = bytes_to_write; adu_write() 602 dev->out_urb_finished = 0; adu_write() 603 retval = usb_submit_urb(dev->interrupt_out_urb, GFP_KERNEL); adu_write() 605 dev->out_urb_finished = 1; adu_write() 606 dev_err(&dev->udev->dev, "Couldn't submit " adu_write() 617 mutex_unlock(&dev->mtx); adu_write() 621 mutex_unlock(&dev->mtx); adu_write() 626 remove_wait_queue(&dev->write_wait, &waita); adu_write() 660 struct adu_device dev = NULL; adu_probe() local 669 dev_err(&interface->dev, "udev is NULL.\n"); adu_probe() 674 dev = kzalloc(sizeof(struct adu_device), GFP_KERNEL); adu_probe() 675 if (dev == NULL) { adu_probe() 676 dev_err(&interface->dev, "Out of memory\n"); adu_probe() 681 mutex_init(&dev->mtx); adu_probe() 682 spin_lock_init(&dev->buflock); adu_probe() 683 dev->udev = udev; adu_probe() 684 init_waitqueue_head(&dev->read_wait); adu_probe() 685 init_waitqueue_head(&dev->write_wait); adu_probe() 694 dev->interrupt_in_endpoint = endpoint; adu_probe() 697 dev->interrupt_out_endpoint = endpoint; adu_probe() 699 if (dev->interrupt_in_endpoint == NULL) { adu_probe() 700 dev_err(&interface->dev, "interrupt in endpoint not found\n"); adu_probe() 703 if (dev->interrupt_out_endpoint == NULL) { adu_probe() 704 dev_err(&interface->dev, "interrupt out endpoint not found\n"); adu_probe() 708 in_end_size = usb_endpoint_maxp(dev->interrupt_in_endpoint); adu_probe() 709 out_end_size = usb_endpoint_maxp(dev->interrupt_out_endpoint); adu_probe() 711 dev->read_buffer_primary = kmalloc((4 * in_end_size), GFP_KERNEL); adu_probe() 712 if (!dev->read_buffer_primary) { adu_probe() 713 dev_err(&interface->dev, "Couldn't allocate read_buffer_primary\n"); adu_probe() 719 memset(dev->read_buffer_primary, 'a', in_end_size); adu_probe() 720 memset(dev->read_buffer_primary + in_end_size, 'b', in_end_size); adu_probe() 721 memset(dev->read_buffer_primary + (2 * in_end_size), 'c', in_end_size); adu_probe() 722 memset(dev->read_buffer_primary + (3 * in_end_size), 'd', in_end_size); adu_probe() 724 dev->read_buffer_secondary = kmalloc((4 * in_end_size), GFP_KERNEL); adu_probe() 725 if (!dev->read_buffer_secondary) { adu_probe() 726 dev_err(&interface->dev, "Couldn't allocate read_buffer_secondary\n"); adu_probe() 732 memset(dev->read_buffer_secondary, 'e', in_end_size); adu_probe() 733 memset(dev->read_buffer_secondary + in_end_size, 'f', in_end_size); adu_probe() 734 memset(dev->read_buffer_secondary + (2 * in_end_size), 'g', in_end_size); adu_probe() 735 memset(dev->read_buffer_secondary + (3 * in_end_size), 'h', in_end_size); adu_probe() 737 dev->interrupt_in_buffer = kmalloc(in_end_size, GFP_KERNEL); adu_probe() 738 if (!dev->interrupt_in_buffer) { adu_probe() 739 dev_err(&interface->dev, "Couldn't allocate interrupt_in_buffer\n"); adu_probe() 744 memset(dev->interrupt_in_buffer, 'i', in_end_size); adu_probe() 746 dev->interrupt_in_urb = usb_alloc_urb(0, GFP_KERNEL); adu_probe() 747 if (!dev->interrupt_in_urb) { adu_probe() 748 dev_err(&interface->dev, "Couldn't allocate interrupt_in_urb\n"); adu_probe() 751 dev->interrupt_out_buffer = kmalloc(out_end_size, GFP_KERNEL); adu_probe() 752 if (!dev->interrupt_out_buffer) { adu_probe() 753 dev_err(&interface->dev, "Couldn't allocate interrupt_out_buffer\n"); adu_probe() 756 dev->interrupt_out_urb = usb_alloc_urb(0, GFP_KERNEL); adu_probe() 757 if (!dev->interrupt_out_urb) { adu_probe() 758 dev_err(&interface->dev, "Couldn't allocate interrupt_out_urb\n"); adu_probe() 762 if (!usb_string(udev, udev->descriptor.iSerialNumber, dev->serial_number, adu_probe() 763 sizeof(dev->serial_number))) { adu_probe() 764 dev_err(&interface->dev, "Could not retrieve serial number\n"); adu_probe() 767 dev_dbg(&interface->dev,"serial_number=%s", dev->serial_number); adu_probe() 770 usb_set_intfdata(interface, dev); adu_probe() 776 dev_err(&interface->dev, "Not able to get a minor for this device.\n"); adu_probe() 781 dev->minor = interface->minor; adu_probe() 784 dev_info(&interface->dev, "ADU%d %s now attached to /dev/usb/adutux%d\n", adu_probe() 785 le16_to_cpu(udev->descriptor.idProduct), dev->serial_number, adu_probe() 786 (dev->minor - ADU_MINOR_BASE)); adu_probe() 791 adu_delete(dev); adu_probe() 802 struct adu_device dev; adu_disconnect() local 805 dev = usb_get_intfdata(interface); adu_disconnect() 807 mutex_lock(&dev->mtx); / not interruptible / adu_disconnect() 808 dev->udev = NULL; / poison */ adu_disconnect() 809 minor = dev->minor; adu_disconnect() 811 mutex_unlock(&dev->mtx); adu_disconnect() 817 if (!dev->open_count) adu_disconnect() 818 adu_delete(dev); adu_disconnect()
H A D	yurex.c	81 struct usb_yurex dev = urb->context; yurex_control_callback() local 85 dev_err(&urb->dev->dev, "%s - control failed: %d\n", yurex_control_callback() 87 wake_up_interruptible(&dev->waitq); yurex_control_callback() 95 struct usb_yurex dev = to_yurex_dev(kref); yurex_delete() local 97 dev_dbg(&dev->interface->dev, "%s\n", __func__); yurex_delete() 99 usb_put_dev(dev->udev); yurex_delete() 100 if (dev->cntl_urb) { yurex_delete() 101 usb_kill_urb(dev->cntl_urb); yurex_delete() 102 kfree(dev->cntl_req); yurex_delete() 103 if (dev->cntl_buffer) yurex_delete() 104 usb_free_coherent(dev->udev, YUREX_BUF_SIZE, yurex_delete() 105 dev->cntl_buffer, dev->cntl_urb->transfer_dma); yurex_delete() 106 usb_free_urb(dev->cntl_urb); yurex_delete() 108 if (dev->urb) { yurex_delete() 109 usb_kill_urb(dev->urb); yurex_delete() 110 if (dev->int_buffer) yurex_delete() 111 usb_free_coherent(dev->udev, YUREX_BUF_SIZE, yurex_delete() 112 dev->int_buffer, dev->urb->transfer_dma); yurex_delete() 113 usb_free_urb(dev->urb); yurex_delete() 115 kfree(dev); yurex_delete() 130 struct usb_yurex dev = urb->context; yurex_interrupt() local 131 unsigned char buf = dev->int_buffer; yurex_interrupt() 140 dev_err(&dev->interface->dev, yurex_interrupt() 142 __func__, YUREX_BUF_SIZE, dev->urb->actual_length); yurex_interrupt() 150 dev_err(&dev->interface->dev, yurex_interrupt() 160 spin_lock_irqsave(&dev->lock, flags); yurex_interrupt() 161 dev->bbu = 0; yurex_interrupt() 163 dev->bbu += buf[i]; yurex_interrupt() 165 dev->bbu <<= 8; yurex_interrupt() 167 dev_dbg(&dev->interface->dev, "%s count: %lld\n", yurex_interrupt() 168 __func__, dev->bbu); yurex_interrupt() 169 spin_unlock_irqrestore(&dev->lock, flags); yurex_interrupt() 171 kill_fasync(&dev->async_queue, SIGIO, POLL_IN); yurex_interrupt() 174 dev_dbg(&dev->interface->dev, yurex_interrupt() 178 dev_dbg(&dev->interface->dev, "%s ack: %c\n", yurex_interrupt() 180 wake_up_interruptible(&dev->waitq); yurex_interrupt() 185 retval = usb_submit_urb(dev->urb, GFP_ATOMIC); yurex_interrupt() 187 dev_err(&dev->interface->dev, "%s - usb_submit_urb failed: %d\n", yurex_interrupt() 194 struct usb_yurex dev; yurex_probe() local 202 dev = kzalloc(sizeof(dev), GFP_KERNEL); yurex_probe() 203 if (!dev) { yurex_probe() 204 dev_err(&interface->dev, "Out of memory\n"); yurex_probe() 207 kref_init(&dev->kref); yurex_probe() 208 mutex_init(&dev->io_mutex); yurex_probe() 209 spin_lock_init(&dev->lock); yurex_probe() 210 init_waitqueue_head(&dev->waitq); yurex_probe() 212 dev->udev = usb_get_dev(interface_to_usbdev(interface)); yurex_probe() 213 dev->interface = interface; yurex_probe() 221 dev->int_in_endpointAddr = endpoint->bEndpointAddress; yurex_probe() 225 if (!dev->int_in_endpointAddr) { yurex_probe() 227 dev_err(&interface->dev, "Could not find endpoints\n"); yurex_probe() 233 dev->cntl_urb = usb_alloc_urb(0, GFP_KERNEL); yurex_probe() 234 if (!dev->cntl_urb) { yurex_probe() 235 dev_err(&interface->dev, "Could not allocate control URB\n"); yurex_probe() 240 dev->cntl_req = kmalloc(YUREX_BUF_SIZE, GFP_KERNEL); yurex_probe() 241 if (!dev->cntl_req) { yurex_probe() 242 dev_err(&interface->dev, "Could not allocate cntl_req\n"); yurex_probe() 247 dev->cntl_buffer = usb_alloc_coherent(dev->udev, YUREX_BUF_SIZE, yurex_probe() 249 &dev->cntl_urb->transfer_dma); yurex_probe() 250 if (!dev->cntl_buffer) { yurex_probe() 251 dev_err(&interface->dev, "Could not allocate cntl_buffer\n"); yurex_probe() 256 dev->cntl_req->bRequestType = USB_DIR_OUT \| USB_TYPE_CLASS \| yurex_probe() 258 dev->cntl_req->bRequest = HID_REQ_SET_REPORT; yurex_probe() 259 dev->cntl_req->wValue = cpu_to_le16((HID_OUTPUT_REPORT + 1) << 8); yurex_probe() 260 dev->cntl_req->wIndex = cpu_to_le16(iface_desc->desc.bInterfaceNumber); yurex_probe() 261 dev->cntl_req->wLength = cpu_to_le16(YUREX_BUF_SIZE); yurex_probe() 263 usb_fill_control_urb(dev->cntl_urb, dev->udev, yurex_probe() 264 usb_sndctrlpipe(dev->udev, 0), yurex_probe() 265 (void )dev->cntl_req, dev->cntl_buffer, yurex_probe() 266 YUREX_BUF_SIZE, yurex_control_callback, dev); yurex_probe() 267 dev->cntl_urb->transfer_flags \|= URB_NO_TRANSFER_DMA_MAP; yurex_probe() 271 dev->urb = usb_alloc_urb(0, GFP_KERNEL); yurex_probe() 272 if (!dev->urb) { yurex_probe() 273 dev_err(&interface->dev, "Could not allocate URB\n"); yurex_probe() 278 dev->int_buffer = usb_alloc_coherent(dev->udev, YUREX_BUF_SIZE, yurex_probe() 279 GFP_KERNEL, &dev->urb->transfer_dma); yurex_probe() 280 if (!dev->int_buffer) { yurex_probe() 281 dev_err(&interface->dev, "Could not allocate int_buffer\n"); yurex_probe() 286 usb_fill_int_urb(dev->urb, dev->udev, yurex_probe() 287 usb_rcvintpipe(dev->udev, dev->int_in_endpointAddr), yurex_probe() 288 dev->int_buffer, YUREX_BUF_SIZE, yurex_interrupt, yurex_probe() 289 dev, 1); yurex_probe() 290 dev->urb->transfer_flags \|= URB_NO_TRANSFER_DMA_MAP; yurex_probe() 291 if (usb_submit_urb(dev->urb, GFP_KERNEL)) { yurex_probe() 293 dev_err(&interface->dev, "Could not submitting URB\n"); yurex_probe() 298 usb_set_intfdata(interface, dev); yurex_probe() 299 dev->bbu = -1; yurex_probe() 304 dev_err(&interface->dev, yurex_probe() 310 dev_info(&interface->dev, yurex_probe() 317 if (dev) yurex_probe() 319 kref_put(&dev->kref, yurex_delete); yurex_probe() 325 struct usb_yurex dev; yurex_disconnect() local 328 dev = usb_get_intfdata(interface); yurex_disconnect() 335 mutex_lock(&dev->io_mutex); yurex_disconnect() 336 dev->interface = NULL; yurex_disconnect() 337 mutex_unlock(&dev->io_mutex); yurex_disconnect() 340 kill_fasync(&dev->async_queue, SIGIO, POLL_IN); yurex_disconnect() 341 wake_up_interruptible(&dev->waitq); yurex_disconnect() 344 kref_put(&dev->kref, yurex_delete); yurex_disconnect() 346 dev_info(&interface->dev, "USB YUREX #%d now disconnected\n", minor); yurex_disconnect() 359 struct usb_yurex dev; yurex_fasync() local 361 dev = file->private_data; yurex_fasync() 362 return fasync_helper(fd, file, on, &dev->async_queue); yurex_fasync() 367 struct usb_yurex dev; yurex_open() local 382 dev = usb_get_intfdata(interface); yurex_open() 383 if (!dev) { yurex_open() 389 kref_get(&dev->kref); yurex_open() 392 mutex_lock(&dev->io_mutex); yurex_open() 393 file->private_data = dev; yurex_open() 394 mutex_unlock(&dev->io_mutex); yurex_open() 402 struct usb_yurex dev; yurex_release() local 404 dev = file->private_data; yurex_release() 405 if (dev == NULL) yurex_release() 409 kref_put(&dev->kref, yurex_delete); yurex_release() 416 struct usb_yurex dev; yurex_read() local 422 dev = file->private_data; yurex_read() 424 mutex_lock(&dev->io_mutex); yurex_read() 425 if (!dev->interface) { /* already disconnected / yurex_read() 430 spin_lock_irqsave(&dev->lock, flags); yurex_read() 431 bytes_read = snprintf(in_buffer, 20, "%lld\n", dev->bbu); yurex_read() 432 spin_unlock_irqrestore(&dev->lock, flags); yurex_read() 444 mutex_unlock(&dev->io_mutex); yurex_read() 451 struct usb_yurex dev; yurex_write() local 460 dev = file->private_data; yurex_write() 466 mutex_lock(&dev->io_mutex); yurex_write() 467 if (!dev->interface) { /* already disconnected */ yurex_write() 468 mutex_unlock(&dev->io_mutex); yurex_write() 474 mutex_unlock(&dev->io_mutex); yurex_write() 478 memset(dev->cntl_buffer, CMD_PADDING, YUREX_BUF_SIZE); yurex_write() 483 dev->cntl_buffer[0] = buffer[0]; yurex_write() 484 dev->cntl_buffer[1] = buffer[1]; yurex_write() 485 dev->cntl_buffer[2] = CMD_EOF; yurex_write() 489 dev->cntl_buffer[0] = buffer[0]; yurex_write() 490 dev->cntl_buffer[1] = 0x00; yurex_write() 491 dev->cntl_buffer[2] = CMD_EOF; yurex_write() 499 dev->cntl_buffer[0] = CMD_SET; yurex_write() 501 dev->cntl_buffer[i] = (c>>32) & 0xff; yurex_write() 507 mutex_unlock(&dev->io_mutex); yurex_write() 512 prepare_to_wait(&dev->waitq, &wait, TASK_INTERRUPTIBLE); yurex_write() 513 dev_dbg(&dev->interface->dev, "%s - submit %c\n", __func__, yurex_write() 514 dev->cntl_buffer[0]); yurex_write() 515 retval = usb_submit_urb(dev->cntl_urb, GFP_KERNEL); yurex_write() 518 finish_wait(&dev->waitq, &wait); yurex_write() 520 mutex_unlock(&dev->io_mutex); yurex_write() 523 dev_err(&dev->interface->dev, yurex_write() 529 dev->bbu = c2; yurex_write()
H A D	ldusb.c	199 static void ld_usb_abort_transfers(struct ld_usb dev) ld_usb_abort_transfers() argument 202 if (dev->interrupt_in_running) { ld_usb_abort_transfers() 203 dev->interrupt_in_running = 0; ld_usb_abort_transfers() 204 if (dev->intf) ld_usb_abort_transfers() 205 usb_kill_urb(dev->interrupt_in_urb); ld_usb_abort_transfers() 207 if (dev->interrupt_out_busy) ld_usb_abort_transfers() 208 if (dev->intf) ld_usb_abort_transfers() 209 usb_kill_urb(dev->interrupt_out_urb); ld_usb_abort_transfers() 215 static void ld_usb_delete(struct ld_usb dev) ld_usb_delete() argument 217 ld_usb_abort_transfers(dev); ld_usb_delete() 220 usb_free_urb(dev->interrupt_in_urb); ld_usb_delete() 221 usb_free_urb(dev->interrupt_out_urb); ld_usb_delete() 222 kfree(dev->ring_buffer); ld_usb_delete() 223 kfree(dev->interrupt_in_buffer); ld_usb_delete() 224 kfree(dev->interrupt_out_buffer); ld_usb_delete() 225 kfree(dev); ld_usb_delete() 233 struct ld_usb dev = urb->context; ld_usb_interrupt_in_callback() local 245 dev_dbg(&dev->intf->dev, ld_usb_interrupt_in_callback() 248 spin_lock(&dev->rbsl); ld_usb_interrupt_in_callback() 253 spin_lock(&dev->rbsl); ld_usb_interrupt_in_callback() 255 next_ring_head = (dev->ring_head+1) % ring_buffer_size; ld_usb_interrupt_in_callback() 256 if (next_ring_head != dev->ring_tail) { ld_usb_interrupt_in_callback() 257 actual_buffer = (size_t)(dev->ring_buffer + dev->ring_head(sizeof(size_t)+dev->interrupt_in_endpoint_size)); ld_usb_interrupt_in_callback() 260 memcpy(actual_buffer+1, dev->interrupt_in_buffer, urb->actual_length); ld_usb_interrupt_in_callback() 261 dev->ring_head = next_ring_head; ld_usb_interrupt_in_callback() 262 dev_dbg(&dev->intf->dev, "%s: received %d bytes\n", ld_usb_interrupt_in_callback() 265 dev_warn(&dev->intf->dev, ld_usb_interrupt_in_callback() 268 dev->buffer_overflow = 1; ld_usb_interrupt_in_callback() 274 if (dev->interrupt_in_running && !dev->buffer_overflow && dev->intf) { ld_usb_interrupt_in_callback() 275 retval = usb_submit_urb(dev->interrupt_in_urb, GFP_ATOMIC); ld_usb_interrupt_in_callback() 277 dev_err(&dev->intf->dev, ld_usb_interrupt_in_callback() 279 dev->buffer_overflow = 1; ld_usb_interrupt_in_callback() 282 spin_unlock(&dev->rbsl); ld_usb_interrupt_in_callback() 284 dev->interrupt_in_done = 1; ld_usb_interrupt_in_callback() 285 wake_up_interruptible(&dev->read_wait); ld_usb_interrupt_in_callback() 293 struct ld_usb dev = urb->context; ld_usb_interrupt_out_callback() local 300 dev_dbg(&dev->intf->dev, ld_usb_interrupt_out_callback() 304 dev->interrupt_out_busy = 0; ld_usb_interrupt_out_callback() 305 wake_up_interruptible(&dev->write_wait); ld_usb_interrupt_out_callback() 313 struct ld_usb dev; ld_usb_open() local 329 dev = usb_get_intfdata(interface); ld_usb_open() 331 if (!dev) ld_usb_open() 335 if (mutex_lock_interruptible(&dev->mutex)) ld_usb_open() 339 if (dev->open_count) { ld_usb_open() 343 dev->open_count = 1; ld_usb_open() 346 dev->ring_head = 0; ld_usb_open() 347 dev->ring_tail = 0; ld_usb_open() 348 dev->buffer_overflow = 0; ld_usb_open() 349 usb_fill_int_urb(dev->interrupt_in_urb, ld_usb_open() 352 dev->interrupt_in_endpoint->bEndpointAddress), ld_usb_open() 353 dev->interrupt_in_buffer, ld_usb_open() 354 dev->interrupt_in_endpoint_size, ld_usb_open() 356 dev, ld_usb_open() 357 dev->interrupt_in_interval); ld_usb_open() 359 dev->interrupt_in_running = 1; ld_usb_open() 360 dev->interrupt_in_done = 0; ld_usb_open() 362 retval = usb_submit_urb(dev->interrupt_in_urb, GFP_KERNEL); ld_usb_open() 364 dev_err(&interface->dev, "Couldn't submit interrupt_in_urb %d\n", retval); ld_usb_open() 365 dev->interrupt_in_running = 0; ld_usb_open() 366 dev->open_count = 0; ld_usb_open() 371 file->private_data = dev; ld_usb_open() 374 mutex_unlock(&dev->mutex); ld_usb_open() 384 struct ld_usb dev; ld_usb_release() local 387 dev = file->private_data; ld_usb_release() 389 if (dev == NULL) { ld_usb_release() 394 if (mutex_lock_interruptible(&dev->mutex)) { ld_usb_release() 399 if (dev->open_count != 1) { ld_usb_release() 403 if (dev->intf == NULL) { ld_usb_release() 405 mutex_unlock(&dev->mutex); ld_usb_release() 406 /* unlock here as ld_usb_delete frees dev / ld_usb_release() 407 ld_usb_delete(dev); ld_usb_release() 412 if (dev->interrupt_out_busy) ld_usb_release() 413 wait_event_interruptible_timeout(dev->write_wait, !dev->interrupt_out_busy, 2 HZ); ld_usb_release() 414 ld_usb_abort_transfers(dev); ld_usb_release() 415 dev->open_count = 0; ld_usb_release() 418 mutex_unlock(&dev->mutex); ld_usb_release() 429 struct ld_usb dev; ld_usb_poll() local 432 dev = file->private_data; ld_usb_poll() 434 if (!dev->intf) ld_usb_poll() 437 poll_wait(file, &dev->read_wait, wait); ld_usb_poll() 438 poll_wait(file, &dev->write_wait, wait); ld_usb_poll() 440 if (dev->ring_head != dev->ring_tail) ld_usb_poll() 442 if (!dev->interrupt_out_busy) ld_usb_poll() 454 struct ld_usb dev; ld_usb_read() local 460 dev = file->private_data; ld_usb_read() 467 if (mutex_lock_interruptible(&dev->mutex)) { ld_usb_read() 473 if (dev->intf == NULL) { ld_usb_read() 480 spin_lock_irq(&dev->rbsl); ld_usb_read() 481 if (dev->ring_head == dev->ring_tail) { ld_usb_read() 482 dev->interrupt_in_done = 0; ld_usb_read() 483 spin_unlock_irq(&dev->rbsl); ld_usb_read() 488 retval = wait_event_interruptible(dev->read_wait, dev->interrupt_in_done); ld_usb_read() 492 spin_unlock_irq(&dev->rbsl); ld_usb_read() 496 actual_buffer = (size_t)(dev->ring_buffer + dev->ring_tail(sizeof(size_t)+dev->interrupt_in_endpoint_size)); ld_usb_read() 499 dev_warn(&dev->intf->dev, "Read buffer overflow, %zd bytes dropped\n", ld_usb_read() 507 dev->ring_tail = (dev->ring_tail+1) % ring_buffer_size; ld_usb_read() 511 spin_lock_irq(&dev->rbsl); ld_usb_read() 512 if (dev->buffer_overflow) { ld_usb_read() 513 dev->buffer_overflow = 0; ld_usb_read() 514 spin_unlock_irq(&dev->rbsl); ld_usb_read() 515 rv = usb_submit_urb(dev->interrupt_in_urb, GFP_KERNEL); ld_usb_read() 517 dev->buffer_overflow = 1; ld_usb_read() 519 spin_unlock_irq(&dev->rbsl); ld_usb_read() 524 mutex_unlock(&dev->mutex); ld_usb_read() 536 struct ld_usb dev; ld_usb_write() local 540 dev = file->private_data; ld_usb_write() 547 if (mutex_lock_interruptible(&dev->mutex)) { ld_usb_write() 553 if (dev->intf == NULL) { ld_usb_write() 560 if (dev->interrupt_out_busy) { ld_usb_write() 565 retval = wait_event_interruptible(dev->write_wait, !dev->interrupt_out_busy); ld_usb_write() 572 bytes_to_write = min(count, write_buffer_sizedev->interrupt_out_endpoint_size); ld_usb_write() 574 dev_warn(&dev->intf->dev, "Write buffer overflow, %zd bytes dropped\n",count-bytes_to_write); ld_usb_write() 575 dev_dbg(&dev->intf->dev, "%s: count = %zd, bytes_to_write = %zd\n", ld_usb_write() 578 if (copy_from_user(dev->interrupt_out_buffer, buffer, bytes_to_write)) { ld_usb_write() 583 if (dev->interrupt_out_endpoint == NULL) { ld_usb_write() 585 retval = usb_control_msg(interface_to_usbdev(dev->intf), ld_usb_write() 586 usb_sndctrlpipe(interface_to_usbdev(dev->intf), 0), ld_usb_write() 590 dev->interrupt_out_buffer, ld_usb_write() 594 dev_err(&dev->intf->dev, ld_usb_write() 601 usb_fill_int_urb(dev->interrupt_out_urb, ld_usb_write() 602 interface_to_usbdev(dev->intf), ld_usb_write() 603 usb_sndintpipe(interface_to_usbdev(dev->intf), ld_usb_write() 604 dev->interrupt_out_endpoint->bEndpointAddress), ld_usb_write() 605 dev->interrupt_out_buffer, ld_usb_write() 608 dev, ld_usb_write() 609 dev->interrupt_out_interval); ld_usb_write() 611 dev->interrupt_out_busy = 1; ld_usb_write() 614 retval = usb_submit_urb(dev->interrupt_out_urb, GFP_KERNEL); ld_usb_write() 616 dev->interrupt_out_busy = 0; ld_usb_write() 617 dev_err(&dev->intf->dev, ld_usb_write() 625 mutex_unlock(&dev->mutex); ld_usb_write() 661 struct ld_usb dev = NULL; ld_usb_probe() local 670 dev = kzalloc(sizeof(dev), GFP_KERNEL); ld_usb_probe() 671 if (dev == NULL) { ld_usb_probe() 672 dev_err(&intf->dev, "Out of memory\n"); ld_usb_probe() 675 mutex_init(&dev->mutex); ld_usb_probe() 676 spin_lock_init(&dev->rbsl); ld_usb_probe() 677 dev->intf = intf; ld_usb_probe() 678 init_waitqueue_head(&dev->read_wait); ld_usb_probe() 679 init_waitqueue_head(&dev->write_wait); ld_usb_probe() 688 dev_err(&intf->dev, "Couldn't allocate string buffer\n"); ld_usb_probe() 703 dev->interrupt_in_endpoint = endpoint; ld_usb_probe() 706 dev->interrupt_out_endpoint = endpoint; ld_usb_probe() 708 if (dev->interrupt_in_endpoint == NULL) { ld_usb_probe() 709 dev_err(&intf->dev, "Interrupt in endpoint not found\n"); ld_usb_probe() 712 if (dev->interrupt_out_endpoint == NULL) ld_usb_probe() 713 dev_warn(&intf->dev, "Interrupt out endpoint not found (using control endpoint instead)\n"); ld_usb_probe() 715 dev->interrupt_in_endpoint_size = usb_endpoint_maxp(dev->interrupt_in_endpoint); ld_usb_probe() 716 dev->ring_buffer = kmalloc(ring_buffer_size(sizeof(size_t)+dev->interrupt_in_endpoint_size), GFP_KERNEL); ld_usb_probe() 717 if (!dev->ring_buffer) { ld_usb_probe() 718 dev_err(&intf->dev, "Couldn't allocate ring_buffer\n"); ld_usb_probe() 721 dev->interrupt_in_buffer = kmalloc(dev->interrupt_in_endpoint_size, GFP_KERNEL); ld_usb_probe() 722 if (!dev->interrupt_in_buffer) { ld_usb_probe() 723 dev_err(&intf->dev, "Couldn't allocate interrupt_in_buffer\n"); ld_usb_probe() 726 dev->interrupt_in_urb = usb_alloc_urb(0, GFP_KERNEL); ld_usb_probe() 727 if (!dev->interrupt_in_urb) { ld_usb_probe() 728 dev_err(&intf->dev, "Couldn't allocate interrupt_in_urb\n"); ld_usb_probe() 731 dev->interrupt_out_endpoint_size = dev->interrupt_out_endpoint ? usb_endpoint_maxp(dev->interrupt_out_endpoint) : ld_usb_probe() 733 dev->interrupt_out_buffer = kmalloc(write_buffer_sizedev->interrupt_out_endpoint_size, GFP_KERNEL); ld_usb_probe() 734 if (!dev->interrupt_out_buffer) { ld_usb_probe() 735 dev_err(&intf->dev, "Couldn't allocate interrupt_out_buffer\n"); ld_usb_probe() 738 dev->interrupt_out_urb = usb_alloc_urb(0, GFP_KERNEL); ld_usb_probe() 739 if (!dev->interrupt_out_urb) { ld_usb_probe() 740 dev_err(&intf->dev, "Couldn't allocate interrupt_out_urb\n"); ld_usb_probe() 743 dev->interrupt_in_interval = min_interrupt_in_interval > dev->interrupt_in_endpoint->bInterval ? min_interrupt_in_interval : dev->interrupt_in_endpoint->bInterval; ld_usb_probe() 744 if (dev->interrupt_out_endpoint) ld_usb_probe() 745 dev->interrupt_out_interval = min_interrupt_out_interval > dev->interrupt_out_endpoint->bInterval ? min_interrupt_out_interval : dev->interrupt_out_endpoint->bInterval; ld_usb_probe() 748 usb_set_intfdata(intf, dev); ld_usb_probe() 753 dev_err(&intf->dev, "Not able to get a minor for this device.\n"); ld_usb_probe() 759 dev_info(&intf->dev, "LD USB Device #%d now attached to major %d minor %d\n", ld_usb_probe() 766 ld_usb_delete(dev); ld_usb_probe() 778 struct ld_usb *dev; ld_usb_disconnect() local 781 dev = usb_get_intfdata(intf); ld_usb_disconnect() 789 mutex_lock(&dev->mutex); ld_usb_disconnect() 792 if (!dev->open_count) { ld_usb_disconnect() 793 mutex_unlock(&dev->mutex); ld_usb_disconnect() 794 ld_usb_delete(dev); ld_usb_disconnect() 796 dev->intf = NULL; ld_usb_disconnect() 798 wake_up_interruptible_all(&dev->read_wait); ld_usb_disconnect() 799 wake_up_interruptible_all(&dev->write_wait); ld_usb_disconnect() 800 mutex_unlock(&dev->mutex); ld_usb_disconnect() 803 dev_info(&intf->dev, "LD USB Device #%d now disconnected\n", ld_usb_disconnect()
H A D	chaoskey.c	9 * entropy for /dev/random and other kernel activities. It also offers 10 * a separate /dev/ entry to allow for direct access to the random 39 dev_dbg(&(usb_if)->dev, format, ## arg) 42 dev_err(&(usb_if)->dev, format, ## arg) 94 static void chaoskey_free(struct chaoskey dev) chaoskey_free() argument 96 usb_dbg(dev->interface, "free"); chaoskey_free() 97 kfree(dev->name); chaoskey_free() 98 kfree(dev->buf); chaoskey_free() 99 kfree(dev); chaoskey_free() 109 struct chaoskey dev; chaoskey_probe() local 142 dev = kzalloc(sizeof(struct chaoskey), GFP_KERNEL); chaoskey_probe() 144 if (dev == NULL) chaoskey_probe() 147 dev->buf = kmalloc(size, GFP_KERNEL); chaoskey_probe() 149 if (dev->buf == NULL) { chaoskey_probe() 150 kfree(dev); chaoskey_probe() 159 dev->name = kmalloc(strlen(udev->product) + 1 + chaoskey_probe() 161 if (dev->name == NULL) { chaoskey_probe() 162 kfree(dev->buf); chaoskey_probe() 163 kfree(dev); chaoskey_probe() 167 strcpy(dev->name, udev->product); chaoskey_probe() 168 strcat(dev->name, "-"); chaoskey_probe() 169 strcat(dev->name, udev->serial); chaoskey_probe() 172 dev->interface = interface; chaoskey_probe() 174 dev->in_ep = in_ep; chaoskey_probe() 176 dev->size = size; chaoskey_probe() 177 dev->present = 1; chaoskey_probe() 179 init_waitqueue_head(&dev->wait_q); chaoskey_probe() 181 mutex_init(&dev->lock); chaoskey_probe() 182 mutex_init(&dev->rng_lock); chaoskey_probe() 184 usb_set_intfdata(interface, dev); chaoskey_probe() 190 chaoskey_free(dev); chaoskey_probe() 194 dev->hwrng.name = dev->name ? dev->name : chaoskey_driver.name; chaoskey_probe() 195 dev->hwrng.read = chaoskey_rng_read; chaoskey_probe() 208 dev->hwrng.quality = 1024 + 1023; chaoskey_probe() 210 dev->hwrng_registered = (hwrng_register(&dev->hwrng) == 0); chaoskey_probe() 211 if (!dev->hwrng_registered) chaoskey_probe() 216 usb_dbg(interface, "chaoskey probe success, size %d", dev->size); chaoskey_probe() 222 struct chaoskey dev; chaoskey_disconnect() local 225 dev = usb_get_intfdata(interface); chaoskey_disconnect() 226 if (!dev) { chaoskey_disconnect() 227 usb_dbg(interface, "disconnect failed - no dev"); chaoskey_disconnect() 231 if (dev->hwrng_registered) chaoskey_disconnect() 232 hwrng_unregister(&dev->hwrng); chaoskey_disconnect() 237 mutex_lock(&dev->lock); chaoskey_disconnect() 239 dev->present = 0; chaoskey_disconnect() 241 if (!dev->open) { chaoskey_disconnect() 242 mutex_unlock(&dev->lock); chaoskey_disconnect() 243 chaoskey_free(dev); chaoskey_disconnect() 245 mutex_unlock(&dev->lock); chaoskey_disconnect() 252 struct chaoskey dev; chaoskey_open() local 262 dev = usb_get_intfdata(interface); chaoskey_open() 263 if (!dev) { chaoskey_open() 264 usb_dbg(interface, "open (dev)"); chaoskey_open() 268 file->private_data = dev; chaoskey_open() 269 mutex_lock(&dev->lock); chaoskey_open() 270 ++dev->open; chaoskey_open() 271 mutex_unlock(&dev->lock); chaoskey_open() 279 struct chaoskey dev = file->private_data; chaoskey_release() local 282 if (dev == NULL) chaoskey_release() 285 interface = dev->interface; chaoskey_release() 289 mutex_lock(&dev->lock); chaoskey_release() 291 usb_dbg(interface, "open count at release is %d", dev->open); chaoskey_release() 293 if (dev->open <= 0) { chaoskey_release() 294 usb_dbg(interface, "invalid open count (%d)", dev->open); chaoskey_release() 295 mutex_unlock(&dev->lock); chaoskey_release() 299 --dev->open; chaoskey_release() 301 if (!dev->present) { chaoskey_release() 302 if (dev->open == 0) { chaoskey_release() 303 mutex_unlock(&dev->lock); chaoskey_release() 304 chaoskey_free(dev); chaoskey_release() 306 mutex_unlock(&dev->lock); chaoskey_release() 308 mutex_unlock(&dev->lock); chaoskey_release() 314 / Fill the buffer. Called with dev->lock held 316 static int _chaoskey_fill(struct chaoskey dev) _chaoskey_fill() argument 321 struct usb_device udev = interface_to_usbdev(dev->interface); _chaoskey_fill() 323 usb_dbg(dev->interface, "fill"); _chaoskey_fill() 327 if (dev->valid != dev->used) { _chaoskey_fill() 328 usb_dbg(dev->interface, "not empty yet (valid %d used %d)", _chaoskey_fill() 329 dev->valid, dev->used); _chaoskey_fill() 334 if (!dev->present) { _chaoskey_fill() 335 usb_dbg(dev->interface, "device not present"); _chaoskey_fill() 340 result = usb_autopm_get_interface(dev->interface); _chaoskey_fill() 342 usb_dbg(dev->interface, "wakeup failed (result %d)", result); _chaoskey_fill() 347 usb_rcvbulkpipe(udev, dev->in_ep), _chaoskey_fill() 348 dev->buf, dev->size, &this_read, _chaoskey_fill() 352 usb_autopm_put_interface(dev->interface); _chaoskey_fill() 355 dev->valid = this_read; _chaoskey_fill() 356 dev->used = 0; _chaoskey_fill() 359 usb_dbg(dev->interface, "bulk_msg result %d this_read %d", _chaoskey_fill() 370 struct chaoskey dev; chaoskey_read() local 376 dev = file->private_data; chaoskey_read() 378 if (dev == NULL \|\| !dev->present) chaoskey_read() 381 usb_dbg(dev->interface, "read %zu", count); chaoskey_read() 388 result = mutex_lock_interruptible(&dev->rng_lock); chaoskey_read() 391 mutex_unlock(&dev->rng_lock); chaoskey_read() 393 result = mutex_lock_interruptible(&dev->lock); chaoskey_read() 396 if (dev->valid == dev->used) { chaoskey_read() 397 result = _chaoskey_fill(dev); chaoskey_read() 399 mutex_unlock(&dev->lock); chaoskey_read() 404 if (dev->used == dev->valid) { chaoskey_read() 405 mutex_unlock(&dev->lock); chaoskey_read() 410 this_time = dev->valid - dev->used; chaoskey_read() 414 remain = copy_to_user(buffer, dev->buf + dev->used, this_time); chaoskey_read() 421 dev->used += this_time - remain; chaoskey_read() 422 mutex_unlock(&dev->lock); chaoskey_read() 429 dev->used += this_time; chaoskey_read() 430 mutex_unlock(&dev->lock); chaoskey_read() 434 usb_dbg(dev->interface, "read %zu bytes", read_count); chaoskey_read() 437 usb_dbg(dev->interface, "empty read, result %d", result); chaoskey_read() 444 struct chaoskey dev = container_of(rng, struct chaoskey, hwrng); chaoskey_rng_read() local 447 usb_dbg(dev->interface, "rng_read max %zu wait %d", max, wait); chaoskey_rng_read() 449 if (!dev->present) { chaoskey_rng_read() 450 usb_dbg(dev->interface, "device not present"); chaoskey_rng_read() 458 mutex_lock(&dev->rng_lock); chaoskey_rng_read() 460 mutex_lock(&dev->lock); chaoskey_rng_read() 462 mutex_unlock(&dev->rng_lock); chaoskey_rng_read() 468 if (dev->valid == dev->used) chaoskey_rng_read() 469 (void) _chaoskey_fill(dev); chaoskey_rng_read() 471 this_time = dev->valid - dev->used; chaoskey_rng_read() 475 memcpy(data, dev->buf + dev->used, this_time); chaoskey_rng_read() 477 dev->used += this_time; chaoskey_rng_read() 479 mutex_unlock(&dev->lock); chaoskey_rng_read() 481 usb_dbg(dev->interface, "rng_read this_time %d\n", this_time); chaoskey_rng_read()
/linux-4.1.27/drivers/char/pcmcia/
H A D	cm4000_cs.c	46 #define reader_to_dev(x) (&x->p_dev->dev) 145 #define ZERO_DEV(dev) \ 146 memset(&dev->atr_csum,0, \ 204 #define ATRLENCK(dev,pos) \ 205 if (pos>=dev->atr_len \|\| pos>=MAX_ATR) \ 319 static int parse_atr(struct cm4000_dev dev) parse_atr() argument 325 DEBUGP(3, dev, "-> parse_atr: dev->atr_len = %i\n", dev->atr_len); parse_atr() 327 if (dev->atr_len < 3) { parse_atr() 328 DEBUGP(5, dev, "parse_atr: atr_len < 3\n"); parse_atr() 332 if (dev->atr[0] == 0x3f) parse_atr() 333 set_bit(IS_INVREV, &dev->flags); parse_atr() 335 clear_bit(IS_INVREV, &dev->flags); parse_atr() 338 ch = dev->atr[1]; parse_atr() 339 dev->proto = 0; / XXX PROTO / parse_atr() 341 dev->ta1 = 0x11; / defaults to 9600 baud / parse_atr() 345 dev->ta1 = dev->atr[2]; parse_atr() 346 DEBUGP(5, dev, "Card says FiDi is 0x%.2x\n", dev->ta1); parse_atr() 349 dev->ta1 = 0x11; parse_atr() 353 DEBUGP(5, dev, "Yi=%.2x\n", ch & 0xf0); parse_atr() 358 / ATRLENCK(dev,ix); / parse_atr() 360 ch = dev->atr[ix]; parse_atr() 363 DEBUGP(5, dev, "card is capable of T=1\n"); parse_atr() 366 DEBUGP(5, dev, "card is capable of T=0\n"); parse_atr() 372 DEBUGP(5, dev, "ix=%d noHist=%d any_t1=%d\n", parse_atr() 373 ix, dev->atr[1] & 15, any_t1); parse_atr() 374 if (ix + 1 + (dev->atr[1] & 0x0f) + any_t1 != dev->atr_len) { parse_atr() 375 DEBUGP(5, dev, "length error\n"); parse_atr() 379 set_bit(IS_ANY_T0, &dev->flags); parse_atr() 382 dev->atr_csum = 0; parse_atr() 384 for (i = 1; i < dev->atr_len; i++) parse_atr() 385 dev->atr_csum ^= dev->atr[i]; parse_atr() 386 if (dev->atr_csum) { parse_atr() 387 set_bit(IS_BAD_CSUM, &dev->flags); parse_atr() 388 DEBUGP(5, dev, "bad checksum\n"); parse_atr() 393 dev->proto = 1; / XXX PROTO / parse_atr() 394 set_bit(IS_ANY_T1, &dev->flags); parse_atr() 420 static void set_cardparameter(struct cm4000_dev dev) set_cardparameter() argument 423 unsigned int iobase = dev->p_dev->resource[0]->start; set_cardparameter() 426 DEBUGP(3, dev, "-> set_cardparameter\n"); set_cardparameter() 428 dev->flags1 = dev->flags1 \| (((dev->baudv - 1) & 0x0100) >> 8); set_cardparameter() 429 xoutb(dev->flags1, REG_FLAGS1(iobase)); set_cardparameter() 430 DEBUGP(5, dev, "flags1 = 0x%02x\n", dev->flags1); set_cardparameter() 433 xoutb((unsigned char)((dev->baudv - 1) & 0xFF), REG_BAUDRATE(iobase)); set_cardparameter() 435 DEBUGP(5, dev, "baudv = %i -> write 0x%02x\n", dev->baudv, set_cardparameter() 436 ((dev->baudv - 1) & 0xFF)); set_cardparameter() 440 if (!memcmp(dev->atr, card_fixups[i].atr, set_cardparameter() 446 DEBUGP(3, dev, "<- set_cardparameter\n"); set_cardparameter() 449 static int set_protocol(struct cm4000_dev dev, struct ptsreq ptsreq) set_protocol() argument 456 unsigned int iobase = dev->p_dev->resource[0]->start; set_protocol() 460 DEBUGP(3, dev, "-> set_protocol\n"); set_protocol() 461 DEBUGP(5, dev, "ptsreq->Protocol = 0x%.8x, ptsreq->Flags=0x%.8x, " set_protocol() 468 dev->pts[0] = 0xff; set_protocol() 469 dev->pts[1] = 0x00; set_protocol() 472 dev->pts[1]++; set_protocol() 473 dev->proto = dev->pts[1]; /* Set new protocol / set_protocol() 474 dev->pts[1] = (0x01 << 4) \| (dev->pts[1]); set_protocol() 477 DEBUGP(5, dev, "Ta(1) from ATR is 0x%.2x\n", dev->ta1); set_protocol() 479 dev->pts[2] = fi_di_table[dev->ta1 & 0x0F][(dev->ta1 >> 4) & 0x0F]; set_protocol() 482 dev->pts[3] = dev->pts[0] ^ dev->pts[1] ^ dev->pts[2]; set_protocol() 484 DEBUGP(5, dev, "pts0=%.2x, pts1=%.2x, pts2=%.2x, pts3=%.2x\n", set_protocol() 485 dev->pts[0], dev->pts[1], dev->pts[2], dev->pts[3]); set_protocol() 488 if (test_bit(IS_INVREV, &dev->flags)) set_protocol() 489 str_invert_revert(dev->pts, 4); set_protocol() 495 DEBUGP(5, dev, "Enable access to the messages buffer\n"); set_protocol() 496 dev->flags1 = 0x20 / T_Active / set_protocol() 497 \| (test_bit(IS_INVREV, &dev->flags) ? 0x02 : 0x00) / inv parity / set_protocol() 498 \| ((dev->baudv >> 8) & 0x01); / MSB-baud / set_protocol() 499 xoutb(dev->flags1, REG_FLAGS1(iobase)); set_protocol() 501 DEBUGP(5, dev, "Enable message buffer -> flags1 = 0x%.2x\n", set_protocol() 502 dev->flags1); set_protocol() 505 DEBUGP(5, dev, "Write challenge to buffer: "); set_protocol() 508 xoutb(dev->pts[i], REG_BUF_DATA(iobase)); / buf data / set_protocol() 510 pr_debug("0x%.2x ", dev->pts[i]); set_protocol() 518 DEBUGP(5, dev, "Set number of bytes to write\n"); 526 DEBUGP(5, dev, "Waiting for NumRecBytes getting valid\n"); 530 DEBUGP(5, dev, "NumRecBytes is valid\n"); 536 DEBUGP(5, dev, "Timeout waiting for NumRecBytes getting " 542 DEBUGP(5, dev, "Reading NumRecBytes\n"); 546 DEBUGP(2, dev, "NumRecBytes = %i\n", num_bytes_read); 557 DEBUGP(5, dev, "Timeout reading num_bytes_read\n"); 562 DEBUGP(5, dev, "Reset the CARDMAN CONTROLLER\n"); 566 DEBUGP(5, dev, "Read PPS reply\n"); 573 DEBUGP(2, dev, "PTSreply: "); 580 DEBUGP(5, dev, "Clear Tactive in Flags1\n"); 584 if ((dev->pts[0] == pts_reply[0]) && 585 (dev->pts[1] == pts_reply[1]) && 586 (dev->pts[2] == pts_reply[2]) && (dev->pts[3] == pts_reply[3])) { 588 dev->baudv = calc_baudv(dev->pts[2]); 589 set_cardparameter(dev); variable 590 } else if ((dev->pts[0] == pts_reply[0]) && 591 ((dev->pts[1] & 0xef) == pts_reply[1]) && 594 dev->baudv = calc_baudv(0x11); 595 set_cardparameter(dev); variable 600 DEBUGP(3, dev, "<- set_protocol\n"); 604 static int io_detect_cm4000(unsigned int iobase, struct cm4000_dev dev) 609 clear_bit(IS_ATR_VALID, &dev->flags); 610 set_bit(IS_CMM_ABSENT, &dev->flags); 614 xoutb(dev->flags1 \| 0x40, REG_FLAGS1(iobase)); 616 clear_bit(IS_ATR_VALID, &dev->flags); 617 set_bit(IS_CMM_ABSENT, &dev->flags); 621 xoutb(dev->flags1, REG_FLAGS1(iobase)); 625 static void terminate_monitor(struct cm4000_dev dev) 631 DEBUGP(3, dev, "-> terminate_monitor\n"); 632 wait_event_interruptible(dev->devq, 634 (void )&dev->flags)); 641 DEBUGP(5, dev, "Now allow last cycle of monitor!\n"); 642 while (test_bit(LOCK_MONITOR, (void )&dev->flags)) 645 DEBUGP(5, dev, "Delete timer\n"); 646 del_timer_sync(&dev->timer); 648 dev->monitor_running = 0; 651 DEBUGP(3, dev, "<- terminate_monitor\n"); 664 struct cm4000_dev dev = (struct cm4000_dev ) p; 665 unsigned int iobase = dev->p_dev->resource[0]->start; 670 DEBUGP(7, dev, "-> monitor_card\n"); 673 if (test_and_set_bit(LOCK_MONITOR, &dev->flags)) { 674 DEBUGP(4, dev, "About to stop monitor\n"); 676 dev->rlen = 677 dev->rpos = 678 dev->atr_csum = dev->atr_len_retry = dev->cwarn = 0; 679 dev->mstate = M_FETCH_ATR; 680 clear_bit(LOCK_MONITOR, &dev->flags); 682 wake_up_interruptible(&dev->devq); 683 DEBUGP(2, dev, "<- monitor_card (we are done now)\n"); 688 if (test_and_set_bit(LOCK_IO, (void )&dev->flags)) { 689 DEBUGP(4, dev, "Couldn't get IO lock\n"); 694 dev->flags0 = xinb(REG_FLAGS0(iobase)); 695 DEBUGP(7, dev, "dev->flags0 = 0x%2x\n", dev->flags0); 696 DEBUGP(7, dev, "smartcard present: %s\n", 697 dev->flags0 & 1 ? "yes" : "no"); 698 DEBUGP(7, dev, "cardman present: %s\n", 699 dev->flags0 == 0xff ? "no" : "yes"); 701 if ((dev->flags0 & 1) == 0 /* no smartcard inserted / 702 \|\| dev->flags0 == 0xff) { / no cardman inserted / 704 dev->rlen = 705 dev->rpos = 706 dev->atr_csum = dev->atr_len_retry = dev->cwarn = 0; 707 dev->mstate = M_FETCH_ATR; 709 dev->flags &= 0x000000ff; / only keep IO and MONITOR locks / 711 if (dev->flags0 == 0xff) { 712 DEBUGP(4, dev, "set IS_CMM_ABSENT bit\n"); 713 set_bit(IS_CMM_ABSENT, &dev->flags); 714 } else if (test_bit(IS_CMM_ABSENT, &dev->flags)) { 715 DEBUGP(4, dev, "clear IS_CMM_ABSENT bit " 717 clear_bit(IS_CMM_ABSENT, &dev->flags); 721 } else if ((dev->flags0 & 1) && test_bit(IS_CMM_ABSENT, &dev->flags)) { 724 DEBUGP(4, dev, "clear IS_CMM_ABSENT bit (card is inserted)\n"); 725 clear_bit(IS_CMM_ABSENT, &dev->flags); 728 if (test_bit(IS_ATR_VALID, &dev->flags) == 1) { 729 DEBUGP(7, dev, "believe ATR is already valid (do nothing)\n"); 733 switch (dev->mstate) { 736 DEBUGP(4, dev, "M_CARDOFF\n"); 740 dev->mdelay = T_10MSEC; 748 dev->rlen = 749 dev->rpos = 750 dev->atr_csum = 751 dev->atr_len_retry = dev->cwarn = 0; 752 dev->mstate = M_FETCH_ATR; 755 dev->mdelay = T_50MSEC; 759 DEBUGP(4, dev, "M_FETCH_ATR\n"); 761 DEBUGP(4, dev, "Reset BAUDV to 9600\n"); 762 dev->baudv = 0x173; / 9600 / 768 xoutb(dev->flags0 & 2 ? 0x46 : 0x44, REG_FLAGS0(iobase)); 769 dev->mdelay = T_40MSEC; 770 dev->mstate = M_TIMEOUT_WAIT; 773 DEBUGP(4, dev, "M_TIMEOUT_WAIT\n"); 775 io_read_num_rec_bytes(iobase, &dev->atr_len); 776 dev->mdelay = T_10MSEC; 777 dev->mstate = M_READ_ATR_LEN; 780 DEBUGP(4, dev, "M_READ_ATR_LEN\n"); 785 if (dev->atr_len == io_read_num_rec_bytes(iobase, &s)) { 786 if (dev->atr_len_retry++ >= MAX_ATR_LEN_RETRY) { / + XX msec / 787 dev->mdelay = T_10MSEC; 788 dev->mstate = M_READ_ATR; 791 dev->atr_len = s; 792 dev->atr_len_retry = 0; / set new timeout / 795 DEBUGP(4, dev, "Current ATR_LEN = %i\n", dev->atr_len); 798 DEBUGP(4, dev, "M_READ_ATR\n"); 800 for (i = 0; i < dev->atr_len; i++) { 802 dev->atr[i] = inb(REG_BUF_DATA(iobase)); 805 DEBUGP(4, dev, "Deactivate T_Active flags\n"); 806 dev->flags1 = 0x01; 807 xoutb(dev->flags1, REG_FLAGS1(iobase)); 810 set_bit(IS_ATR_PRESENT, &dev->flags); 811 if (dev->atr[0] == 0x03) 812 str_invert_revert(dev->atr, dev->atr_len); 813 atrc = parse_atr(dev); 815 dev->mdelay = 0; 816 dev->mstate = M_BAD_CARD; 818 dev->mdelay = T_50MSEC; 819 dev->mstate = M_ATR_PRESENT; 820 set_bit(IS_ATR_VALID, &dev->flags); 823 if (test_bit(IS_ATR_VALID, &dev->flags) == 1) { 824 DEBUGP(4, dev, "monitor_card: ATR valid\n"); 827 if ((test_bit(IS_AUTOPPS_ACT, &dev->flags) == 0) && 828 (dev->ta1 != 0x11) && 829 !(test_bit(IS_ANY_T0, &dev->flags) && 830 test_bit(IS_ANY_T1, &dev->flags))) { 831 DEBUGP(4, dev, "Perform AUTOPPS\n"); 832 set_bit(IS_AUTOPPS_ACT, &dev->flags); 833 ptsreq.protocol = (0x01 << dev->proto); 838 if (set_protocol(dev, &ptsreq) == 0) { 839 DEBUGP(4, dev, "AUTOPPS ret SUCC\n"); 840 clear_bit(IS_AUTOPPS_ACT, &dev->flags); 841 wake_up_interruptible(&dev->atrq); 843 DEBUGP(4, dev, "AUTOPPS failed: " 846 clear_bit(IS_ATR_PRESENT, &dev->flags); 847 clear_bit(IS_ATR_VALID, &dev->flags); 848 dev->rlen = 849 dev->rpos = 850 dev->atr_csum = 851 dev->atr_len_retry = dev->cwarn = 0; 852 dev->mstate = M_FETCH_ATR; 854 dev->mdelay = T_50MSEC; 859 set_cardparameter(dev); 860 if (test_bit(IS_AUTOPPS_ACT, &dev->flags) == 1) 861 DEBUGP(4, dev, "AUTOPPS already active " 863 if (dev->ta1 == 0x11) 864 DEBUGP(4, dev, "No AUTOPPS necessary " 866 if (test_bit(IS_ANY_T0, &dev->flags) 867 && test_bit(IS_ANY_T1, &dev->flags)) 868 DEBUGP(4, dev, "Do NOT perform AUTOPPS " 870 clear_bit(IS_AUTOPPS_ACT, &dev->flags); 871 wake_up_interruptible(&dev->atrq); 874 DEBUGP(4, dev, "ATR invalid\n"); 875 wake_up_interruptible(&dev->atrq); 879 DEBUGP(4, dev, "M_BAD_CARD\n"); 881 if (dev->cwarn == 0 \|\| dev->cwarn == 10) { 882 set_bit(IS_BAD_CARD, &dev->flags); 883 dev_warn(&dev->p_dev->dev, MODULE_NAME ": "); 884 if (test_bit(IS_BAD_CSUM, &dev->flags)) { 885 DEBUGP(4, dev, "ATR checksum (0x%.2x, should " 886 "be zero) failed\n", dev->atr_csum); 889 else if (test_bit(IS_BAD_LENGTH, &dev->flags)) { 890 DEBUGP(4, dev, "ATR length error\n"); 892 DEBUGP(4, dev, "card damaged or wrong way " 896 dev->cwarn = 0; 897 wake_up_interruptible(&dev->atrq); / wake open / 899 dev->cwarn++; 900 dev->mdelay = T_100MSEC; 901 dev->mstate = M_FETCH_ATR; 904 DEBUGP(7, dev, "Unknown action\n"); 909 DEBUGP(7, dev, "release_io\n"); 910 clear_bit(LOCK_IO, &dev->flags); 911 wake_up_interruptible(&dev->ioq); / whoever needs IO / 914 DEBUGP(7, dev, "<- monitor_card (returns with timer)\n"); 915 mod_timer(&dev->timer, jiffies + dev->mdelay); 916 clear_bit(LOCK_MONITOR, &dev->flags); 924 struct cm4000_dev dev = filp->private_data; 925 unsigned int iobase = dev->p_dev->resource[0]->start; 929 DEBUGP(2, dev, "-> cmm_read(%s,%d)\n", current->comm, current->pid); 934 if (!pcmcia_dev_present(dev->p_dev) \|\| /* device removed / 935 test_bit(IS_CMM_ABSENT, &dev->flags)) 938 if (test_bit(IS_BAD_CSUM, &dev->flags)) 943 (dev->atrq, 945 \|\| (test_bit(IS_ATR_PRESENT, (void )&dev->flags) != 0)))) { 951 if (test_bit(IS_ATR_VALID, &dev->flags) == 0) 956 (dev->readq, 957 ((filp->f_flags & O_NONBLOCK) \|\| (dev->rpos < dev->rlen)))) { 965 (dev->ioq, 967 \|\| (test_and_set_bit(LOCK_IO, (void )&dev->flags) == 0)))) { 974 dev->flags0 = inb(REG_FLAGS0(iobase)); 975 if ((dev->flags0 & 1) == 0 / no smartcard inserted / 976 \|\| dev->flags0 == 0xff) { / no cardman inserted / 977 clear_bit(IS_ATR_VALID, &dev->flags); 978 if (dev->flags0 & 1) { 979 set_bit(IS_CMM_ABSENT, &dev->flags); 987 DEBUGP(4, dev, "begin read answer\n"); 988 j = min(count, (size_t)(dev->rlen - dev->rpos)); 989 k = dev->rpos; 992 DEBUGP(4, dev, "read1 j=%d\n", j); 995 dev->rbuf[i] = xinb(REG_BUF_DATA(iobase)); 997 j = min(count, (size_t)(dev->rlen - dev->rpos)); 999 DEBUGP(4, dev, "read2 j=%d\n", j); 1000 dev->flags1 \|= 0x10; / MSB buf addr set / 1001 xoutb(dev->flags1, REG_FLAGS1(iobase)); 1004 dev->rbuf[i] = xinb(REG_BUF_DATA(iobase)); 1008 if (dev->proto == 0 && count > dev->rlen - dev->rpos && i) { 1009 DEBUGP(4, dev, "T=0 and count > buffer\n"); 1010 dev->rbuf[i] = dev->rbuf[i - 1]; 1011 dev->rbuf[i - 1] = dev->procbyte; 1016 dev->rpos = dev->rlen + 1; 1019 DEBUGP(4, dev, "Clear T1Active\n"); 1020 dev->flags1 &= 0xdf; 1021 xoutb(dev->flags1, REG_FLAGS1(iobase)); 1025 if (!io_detect_cm4000(iobase, dev)) { 1030 if (test_bit(IS_INVREV, &dev->flags) && count > 0) 1031 str_invert_revert(dev->rbuf, count); 1033 if (copy_to_user(buf, dev->rbuf, count)) 1037 clear_bit(LOCK_IO, &dev->flags); 1038 wake_up_interruptible(&dev->ioq); 1040 DEBUGP(2, dev, "<- cmm_read returns: rc = %Zi\n", 1048 struct cm4000_dev dev = filp->private_data; 1049 unsigned int iobase = dev->p_dev->resource[0]->start; 1059 DEBUGP(2, dev, "-> cmm_write(%s,%d)\n", current->comm, current->pid); 1064 if (dev->proto == 0 && count < 4) { 1066 DEBUGP(4, dev, "T0 short write\n"); 1072 sendT0 = dev->proto ? 0 : nr > 5 ? 0x08 : 0; 1074 if (!pcmcia_dev_present(dev->p_dev) \|\| /* device removed / 1075 test_bit(IS_CMM_ABSENT, &dev->flags)) 1078 if (test_bit(IS_BAD_CSUM, &dev->flags)) { 1079 DEBUGP(4, dev, "bad csum\n"); 1095 (dev->atrq, 1097 \|\| (test_bit(IS_ATR_PRESENT, (void )&dev->flags) != 0)))) { 1103 if (test_bit(IS_ATR_VALID, &dev->flags) == 0) { /* invalid atr / 1104 DEBUGP(4, dev, "invalid ATR\n"); 1110 (dev->ioq, 1112 \|\| (test_and_set_bit(LOCK_IO, (void )&dev->flags) == 0)))) { 1118 if (copy_from_user(dev->sbuf, buf, ((count > 512) ? 512 : count))) 1122 dev->flags0 = inb(REG_FLAGS0(iobase)); 1123 if ((dev->flags0 & 1) == 0 /* no smartcard inserted / 1124 \|\| dev->flags0 == 0xff) { / no cardman inserted / 1125 clear_bit(IS_ATR_VALID, &dev->flags); 1126 if (dev->flags0 & 1) { 1127 set_bit(IS_CMM_ABSENT, &dev->flags); 1130 DEBUGP(4, dev, "IO error\n"); 1138 if (!io_detect_cm4000(iobase, dev)) { 1144 dev->flags1 \|= (sendT0); 1146 set_cardparameter(dev); 1151 dev->flags1 = 0x20 / T_Active / 1153 \| (test_bit(IS_INVREV, &dev->flags) ? 2 : 0)/ inverse parity / 1154 \| (((dev->baudv - 1) & 0x0100) >> 8); / MSB-Baud / 1155 DEBUGP(1, dev, "set dev->flags1 = 0x%.2x\n", dev->flags1); 1156 xoutb(dev->flags1, REG_FLAGS1(iobase)); 1159 DEBUGP(4, dev, "Xmit data\n"); 1162 dev->flags1 = 0x20 / T_Active / 1165 \| (test_bit(IS_INVREV, &dev->flags) ? 2 : 0) 1166 \| (((dev->baudv - 1) & 0x0100) >> 8) / MSB-Baud / 1168 DEBUGP(4, dev, "dev->flags = 0x%.2x - set address " 1169 "high\n", dev->flags1); 1170 xoutb(dev->flags1, REG_FLAGS1(iobase)); 1172 if (test_bit(IS_INVREV, &dev->flags)) { 1173 DEBUGP(4, dev, "Apply inverse convention for 0x%.2x " 1174 "-> 0x%.2x\n", (unsigned char)dev->sbuf[i], 1175 invert_revert(dev->sbuf[i])); 1177 xoutb(invert_revert(dev->sbuf[i]), 1181 xoutb(dev->sbuf[i], REG_BUF_DATA(iobase)); 1184 DEBUGP(4, dev, "Xmit done\n"); 1186 if (dev->proto == 0) { 1189 DEBUGP(4, dev, "T=0 assumes 0 byte reply\n"); 1191 if (test_bit(IS_INVREV, &dev->flags)) 1204 nsend = 5 + (unsigned char)dev->sbuf[4]; 1205 if (dev->sbuf[4] == 0) 1213 if (test_bit(IS_INVREV, &dev->flags)) { 1214 DEBUGP(4, dev, "T=0 set Procedure byte (inverse-reverse) " 1215 "0x%.2x\n", invert_revert(dev->sbuf[1])); 1216 xoutb(invert_revert(dev->sbuf[1]), REG_NUM_BYTES(iobase)); 1218 DEBUGP(4, dev, "T=0 set Procedure byte 0x%.2x\n", dev->sbuf[1]); 1219 xoutb(dev->sbuf[1], REG_NUM_BYTES(iobase)); 1222 DEBUGP(1, dev, "set NumSendBytes = 0x%.2x\n", 1226 DEBUGP(1, dev, "Trigger CARDMAN CONTROLLER (0x%.2x)\n", 1228 \| (dev->flags0 & 2 ? 0 : 4) / power on if needed / 1229 \|(dev->proto ? 0x10 : 0x08) / T=1/T=0 / 1232 \| (dev->flags0 & 2 ? 0 : 4) / power on if needed / 1233 \|(dev->proto ? 0x10 : 0x08) / T=1/T=0 / 1238 if (dev->proto == 1) { 1239 DEBUGP(4, dev, "Wait for xmit done\n"); 1246 DEBUGP(4, dev, "timeout waiting for xmit done\n"); 1255 if (dev->proto) { 1261 DEBUGP(4, dev, "infolen=%d\n", infolen); 1267 DEBUGP(4, dev, "timeout waiting for infoLen\n"); 1272 clear_bit(IS_PROCBYTE_PRESENT, &dev->flags); 1275 io_read_num_rec_bytes(iobase, &dev->rlen); 1277 if (dev->proto) { 1278 if (dev->rlen >= infolen + 4) 1284 if (s > dev->rlen) { 1285 DEBUGP(1, dev, "NumRecBytes inc (reset timeout)\n"); 1287 dev->rlen = s; 1296 else if (dev->proto == 0) { 1299 DEBUGP(1, dev, "NoProcedure byte set\n"); 1303 DEBUGP(1, dev, "NoProcedure byte unset " 1305 dev->procbyte = inb(REG_FLAGS1(iobase)); 1306 DEBUGP(1, dev, "Read procedure byte 0x%.2x\n", 1307 dev->procbyte); 1311 DEBUGP(1, dev, "T0Done flag (read reply)\n"); 1315 if (dev->proto) 1319 DEBUGP(1, dev, "timeout waiting for numRecBytes\n"); 1323 if (dev->proto == 0) { 1324 DEBUGP(1, dev, "Wait for T0Done bit to be set\n"); 1331 DEBUGP(1, dev, "timeout waiting for T0Done\n"); 1336 dev->procbyte = inb(REG_FLAGS1(iobase)); 1337 DEBUGP(4, dev, "Read procedure byte 0x%.2x\n", 1338 dev->procbyte); 1340 io_read_num_rec_bytes(iobase, &dev->rlen); 1341 DEBUGP(4, dev, "Read NumRecBytes = %i\n", dev->rlen); 1346 dev->rpos = dev->proto ? 0 : nr == 4 ? 5 : nr > dev->rlen ? 5 : nr; 1347 DEBUGP(4, dev, "dev->rlen = %i, dev->rpos = %i, nr = %i\n", 1348 dev->rlen, dev->rpos, nr); 1351 DEBUGP(4, dev, "Reset SM\n"); 1355 DEBUGP(4, dev, "Write failed but clear T_Active\n"); 1356 dev->flags1 &= 0xdf; 1357 xoutb(dev->flags1, REG_FLAGS1(iobase)); 1360 clear_bit(LOCK_IO, &dev->flags); 1361 wake_up_interruptible(&dev->ioq); 1362 wake_up_interruptible(&dev->readq); / tell read we have data / 1365 memset((char )dev->sbuf, 0, 512); 1368 DEBUGP(2, dev, "<- cmm_write\n"); 1372 static void start_monitor(struct cm4000_dev dev) 1374 DEBUGP(3, dev, "-> start_monitor\n"); 1375 if (!dev->monitor_running) { 1376 DEBUGP(5, dev, "create, init and add timer\n"); 1377 setup_timer(&dev->timer, monitor_card, (unsigned long)dev); 1378 dev->monitor_running = 1; 1379 mod_timer(&dev->timer, jiffies); 1381 DEBUGP(5, dev, "monitor already running\n"); 1382 DEBUGP(3, dev, "<- start_monitor\n"); 1385 static void stop_monitor(struct cm4000_dev dev) 1387 DEBUGP(3, dev, "-> stop_monitor\n"); 1388 if (dev->monitor_running) { 1389 DEBUGP(5, dev, "stopping monitor\n"); 1390 terminate_monitor(dev); 1392 clear_bit(IS_ATR_VALID, &dev->flags); 1393 clear_bit(IS_ATR_PRESENT, &dev->flags); 1395 DEBUGP(5, dev, "monitor already stopped\n"); 1396 DEBUGP(3, dev, "<- stop_monitor\n"); 1401 struct cm4000_dev dev = filp->private_data; 1402 unsigned int iobase = dev->p_dev->resource[0]->start; 1416 DEBUGP(3, dev, "cmm_ioctl(device=%d.%d) %s\n", imajor(inode), 1424 DEBUGP(4, dev, "DEV_OK false\n"); 1428 if (test_bit(IS_CMM_ABSENT, &dev->flags)) { 1429 DEBUGP(4, dev, "CMM_ABSENT flag set\n"); 1435 DEBUGP(4, dev, "ioctype mismatch\n"); 1439 DEBUGP(4, dev, "iocnr mismatch\n"); 1444 DEBUGP(4, dev, "iocdir=%.4x iocr=%.4x iocw=%.4x iocsize=%d cmd=%.4x\n", 1459 DEBUGP(4, dev, " ... in CM_IOCGSTATUS\n"); 1465 status = dev->flags0 & 3; 1466 if (test_bit(IS_ATR_PRESENT, &dev->flags)) 1468 if (test_bit(IS_ATR_VALID, &dev->flags)) 1470 if (test_bit(IS_CMM_ABSENT, &dev->flags)) 1472 if (test_bit(IS_BAD_CARD, &dev->flags)) 1479 DEBUGP(4, dev, "... in CM_IOCGATR\n"); 1485 (dev->atrq, 1487 \|\| (test_bit(IS_ATR_PRESENT, (void )&dev->flags) 1497 if (test_bit(IS_ATR_VALID, &dev->flags) == 0) { 1503 if (copy_to_user(atreq->atr, dev->atr, 1504 dev->atr_len)) 1507 tmp = dev->atr_len; 1517 DEBUGP(4, dev, "... in CM_IOCARDOFF\n"); 1518 if (dev->flags0 & 0x01) { 1519 DEBUGP(4, dev, " Card inserted\n"); 1521 DEBUGP(2, dev, " No card inserted\n"); 1523 if (dev->flags0 & 0x02) { 1524 DEBUGP(4, dev, " Card powered\n"); 1526 DEBUGP(2, dev, " Card not powered\n"); 1531 if ((dev->flags0 & 0x01) && (dev->flags0 & 0x02)) { 1535 (dev->ioq, 1537 \|\| (test_and_set_bit(LOCK_IO, (void )&dev->flags) 1546 DEBUGP(4, dev, "Set Flags0=0x42 \n"); 1548 clear_bit(IS_ATR_PRESENT, &dev->flags); 1549 clear_bit(IS_ATR_VALID, &dev->flags); 1550 dev->mstate = M_CARDOFF; 1551 clear_bit(LOCK_IO, &dev->flags); 1553 (dev->atrq, 1555 \|\| (test_bit(IS_ATR_VALID, (void )&dev->flags) != 1565 clear_bit(LOCK_IO, &dev->flags); 1566 wake_up_interruptible(&dev->ioq); 1581 DEBUGP(4, dev, "... in CM_IOCSPTS\n"); 1584 (dev->atrq, 1586 \|\| (test_bit(IS_ATR_PRESENT, (void )&dev->flags) 1596 (dev->ioq, 1598 \|\| (test_and_set_bit(LOCK_IO, (void )&dev->flags) 1607 if ((rc = set_protocol(dev, &krnptsreq)) != 0) { 1609 dev->mstate = M_FETCH_ATR; 1610 clear_bit(IS_ATR_VALID, &dev->flags); 1613 clear_bit(LOCK_IO, &dev->flags); 1614 wake_up_interruptible(&dev->ioq); 1624 DEBUGP(4, dev, "... in default (unknown IOCTL code)\n"); 1634 struct cm4000_dev dev; 1654 dev = link->priv; 1655 filp->private_data = dev; 1657 DEBUGP(2, dev, "-> cmm_open(device=%d.%d process=%s,%d)\n", 1664 ZERO_DEV(dev); 1677 dev->mdelay = T_50MSEC; 1680 start_monitor(dev); 1684 DEBUGP(2, dev, "<- cmm_open\n"); 1693 struct cm4000_dev dev; 1704 dev = link->priv; 1706 DEBUGP(2, dev, "-> cmm_close(maj/min=%d.%d)\n", 1709 stop_monitor(dev); 1711 ZERO_DEV(dev); 1714 wake_up(&dev->devq); /* socket removed? / 1716 DEBUGP(2, dev, "cmm_close\n"); 1722 struct cm4000_dev dev = link->priv; 1727 DEBUGP(3, dev, "-> cmm_cm4000_release\n"); 1735 wait_event(dev->devq, (link->open == 0)); 1737 /* dev->devq=NULL; this cannot be zeroed earlier / 1738 DEBUGP(3, dev, "<- cmm_cm4000_release\n"); 1751 struct cm4000_dev dev; 1762 dev = link->priv; 1773 struct cm4000_dev dev; 1775 dev = link->priv; 1776 stop_monitor(dev); 1783 struct cm4000_dev dev; 1785 dev = link->priv; 1787 start_monitor(dev); 1800 struct cm4000_dev dev; 1813 dev = kzalloc(sizeof(struct cm4000_dev), GFP_KERNEL); 1814 if (dev == NULL) 1817 dev->p_dev = link; 1818 link->priv = dev; 1821 init_waitqueue_head(&dev->devq); 1822 init_waitqueue_head(&dev->ioq); 1823 init_waitqueue_head(&dev->atrq); 1824 init_waitqueue_head(&dev->readq); 1829 kfree(dev); 1840 struct cm4000_dev dev = link->priv; 1850 stop_monitor(dev); 1855 kfree(dev);
H A D	cm4040_cs.c	40 #define reader_to_dev(x) (&x->p_dev->dev) 109 struct reader_dev dev = (struct reader_dev ) dummy; cm4040_do_poll() local 110 unsigned int obs = xinb(dev->p_dev->resource[0]->start cm4040_do_poll() 114 set_bit(BS_READABLE, &dev->buffer_status); cm4040_do_poll() 115 DEBUGP(4, dev, "waking up read_wait\n"); cm4040_do_poll() 116 wake_up_interruptible(&dev->read_wait); cm4040_do_poll() 118 clear_bit(BS_READABLE, &dev->buffer_status); cm4040_do_poll() 121 set_bit(BS_WRITABLE, &dev->buffer_status); cm4040_do_poll() 122 DEBUGP(4, dev, "waking up write_wait\n"); cm4040_do_poll() 123 wake_up_interruptible(&dev->write_wait); cm4040_do_poll() 125 clear_bit(BS_WRITABLE, &dev->buffer_status); cm4040_do_poll() 127 if (dev->buffer_status) cm4040_do_poll() 128 wake_up_interruptible(&dev->poll_wait); cm4040_do_poll() 130 mod_timer(&dev->poll_timer, jiffies + POLL_PERIOD); cm4040_do_poll() 133 static void cm4040_stop_poll(struct reader_dev dev) cm4040_stop_poll() argument 135 del_timer_sync(&dev->poll_timer); cm4040_stop_poll() 138 static int wait_for_bulk_out_ready(struct reader_dev dev) wait_for_bulk_out_ready() argument 141 int iobase = dev->p_dev->resource[0]->start; wait_for_bulk_out_ready() 146 DEBUGP(4, dev, "BulkOut empty (i=%d)\n", i); wait_for_bulk_out_ready() 151 DEBUGP(4, dev, "wait_event_interruptible_timeout(timeout=%ld\n", wait_for_bulk_out_ready() 152 dev->timeout); wait_for_bulk_out_ready() 153 rc = wait_event_interruptible_timeout(dev->write_wait, wait_for_bulk_out_ready() 155 &dev->buffer_status), wait_for_bulk_out_ready() 156 dev->timeout); wait_for_bulk_out_ready() 159 DEBUGP(4, dev, "woke up: BulkOut empty\n"); wait_for_bulk_out_ready() 161 DEBUGP(4, dev, "woke up: BulkOut full, returning 0 :(\n"); wait_for_bulk_out_ready() 163 DEBUGP(4, dev, "woke up: signal arrived\n"); wait_for_bulk_out_ready() 169 static int write_sync_reg(unsigned char val, struct reader_dev dev) write_sync_reg() argument 171 int iobase = dev->p_dev->resource[0]->start; write_sync_reg() 174 rc = wait_for_bulk_out_ready(dev); write_sync_reg() 179 rc = wait_for_bulk_out_ready(dev); write_sync_reg() 186 static int wait_for_bulk_in_ready(struct reader_dev dev) wait_for_bulk_in_ready() argument 189 int iobase = dev->p_dev->resource[0]->start; wait_for_bulk_in_ready() 194 DEBUGP(3, dev, "BulkIn full (i=%d)\n", i); wait_for_bulk_in_ready() 199 DEBUGP(4, dev, "wait_event_interruptible_timeout(timeout=%ld\n", wait_for_bulk_in_ready() 200 dev->timeout); wait_for_bulk_in_ready() 201 rc = wait_event_interruptible_timeout(dev->read_wait, wait_for_bulk_in_ready() 203 &dev->buffer_status), wait_for_bulk_in_ready() 204 dev->timeout); wait_for_bulk_in_ready() 206 DEBUGP(4, dev, "woke up: BulkIn full\n"); wait_for_bulk_in_ready() 208 DEBUGP(4, dev, "woke up: BulkIn not full, returning 0 :(\n"); wait_for_bulk_in_ready() 210 DEBUGP(4, dev, "woke up: signal arrived\n"); wait_for_bulk_in_ready() 218 struct reader_dev dev = filp->private_data; cm4040_read() local 219 int iobase = dev->p_dev->resource[0]->start; cm4040_read() 226 DEBUGP(2, dev, "-> cm4040_read(%s,%d)\n", current->comm, current->pid); cm4040_read() 235 DEBUGP(4, dev, "filep->f_flags O_NONBLOCK set\n"); cm4040_read() 236 DEBUGP(2, dev, "<- cm4040_read (failure)\n"); cm4040_read() 240 if (!pcmcia_dev_present(dev->p_dev)) cm4040_read() 244 rc = wait_for_bulk_in_ready(dev); cm4040_read() 246 DEBUGP(5, dev, "wait_for_bulk_in_ready rc=%.2x\n", rc); cm4040_read() 247 DEBUGP(2, dev, "<- cm4040_read (failed)\n"); cm4040_read() 252 dev->r_buf[i] = xinb(iobase + REG_OFFSET_BULK_IN); cm4040_read() 254 pr_debug("%lu:%2x ", i, dev->r_buf[i]); cm4040_read() 261 bytes_to_read = 5 + le32_to_cpu((__le32 )&dev->r_buf[1]); 263 DEBUGP(6, dev, "BytesToRead=%zu\n", bytes_to_read); 268 DEBUGP(6, dev, "Min=%zu\n", min_bytes_to_read); 271 rc = wait_for_bulk_in_ready(dev); 273 DEBUGP(5, dev, "wait_for_bulk_in_ready rc=%.2x\n", rc); 274 DEBUGP(2, dev, "<- cm4040_read (failed)\n"); 279 dev->r_buf[i+5] = xinb(iobase + REG_OFFSET_BULK_IN); 281 pr_debug("%lu:%2x ", i, dev->r_buf[i]); 289 if (copy_to_user(buf, dev->r_buf, min_bytes_to_read)) 292 rc = wait_for_bulk_in_ready(dev); 294 DEBUGP(5, dev, "wait_for_bulk_in_ready rc=%.2x\n", rc); 295 DEBUGP(2, dev, "<- cm4040_read (failed)\n"); 301 rc = write_sync_reg(SCR_READER_TO_HOST_DONE, dev); 303 DEBUGP(5, dev, "write_sync_reg c=%.2x\n", rc); 304 DEBUGP(2, dev, "<- cm4040_read (failed)\n"); 313 DEBUGP(2, dev, "<- cm4040_read (successfully)\n"); 320 struct reader_dev dev = filp->private_data; 321 int iobase = dev->p_dev->resource[0]->start; 326 DEBUGP(2, dev, "-> cm4040_write(%s,%d)\n", current->comm, current->pid); 329 DEBUGP(2, dev, "<- cm4040_write empty read (successfully)\n"); 334 DEBUGP(2, dev, "<- cm4040_write buffersize=%Zd < 5\n", count); 339 DEBUGP(4, dev, "filep->f_flags O_NONBLOCK set\n"); 340 DEBUGP(4, dev, "<- cm4040_write (failure)\n"); 344 if (!pcmcia_dev_present(dev->p_dev)) 348 if (copy_from_user(dev->s_buf, buf, bytes_to_write)) 351 switch (dev->s_buf[0]) { 356 dev->timeout = CCID_DRIVER_BULK_DEFAULT_TIMEOUT; 360 dev->timeout = CCID_DRIVER_ASYNC_POWERUP_TIMEOUT; 371 dev->timeout = CCID_DRIVER_MINIMUM_TIMEOUT; 375 rc = write_sync_reg(SCR_HOST_TO_READER_START, dev); 377 DEBUGP(5, dev, "write_sync_reg c=%.2Zx\n", rc); 378 DEBUGP(2, dev, "<- cm4040_write (failed)\n"); 385 DEBUGP(4, dev, "start \n"); 388 rc = wait_for_bulk_out_ready(dev); 390 DEBUGP(5, dev, "wait_for_bulk_out_ready rc=%.2Zx\n", 392 DEBUGP(2, dev, "<- cm4040_write (failed)\n"); 399 xoutb(dev->s_buf[i],iobase + REG_OFFSET_BULK_OUT); 401 DEBUGP(4, dev, "end\n"); 403 rc = write_sync_reg(SCR_HOST_TO_READER_DONE, dev); 406 DEBUGP(5, dev, "write_sync_reg c=%.2Zx\n", rc); 407 DEBUGP(2, dev, "<- cm4040_write (failed)\n"); 414 DEBUGP(2, dev, "<- cm4040_write (successfully)\n"); 420 struct reader_dev dev = filp->private_data; 423 poll_wait(filp, &dev->poll_wait, wait); 425 if (test_and_clear_bit(BS_READABLE, &dev->buffer_status)) 427 if (test_and_clear_bit(BS_WRITABLE, &dev->buffer_status)) 430 DEBUGP(2, dev, "<- cm4040_poll(%u)\n", mask); 437 struct reader_dev dev; 457 dev = link->priv; 458 filp->private_data = dev; 461 DEBUGP(4, dev, "filep->f_flags O_NONBLOCK set\n"); 468 dev->poll_timer.data = (unsigned long) dev; 469 mod_timer(&dev->poll_timer, jiffies + POLL_PERIOD); 471 DEBUGP(2, dev, "<- cm4040_open (successfully)\n"); 480 struct reader_dev dev = filp->private_data; 484 DEBUGP(2, dev, "-> cm4040_close(maj/min=%d.%d)\n", imajor(inode), 494 cm4040_stop_poll(dev); 497 wake_up(&dev->devq); 499 DEBUGP(2, dev, "<- cm4040_close\n"); 505 struct reader_dev dev = link->priv; 507 DEBUGP(3, dev, "-> cm4040_reader_release\n"); 509 DEBUGP(3, dev, KERN_INFO MODULE_NAME ": delaying release " 511 wait_event(dev->devq, (link->open == 0)); 513 DEBUGP(3, dev, "<- cm4040_reader_release\n"); 525 struct reader_dev dev; 535 dev_printk(KERN_INFO, &link->dev, 541 dev = link->priv; 543 DEBUGP(2, dev, "device " DEVICE_NAME "%d at %pR\n", devno, 545 DEBUGP(2, dev, "<- reader_config (succ)\n"); 562 struct reader_dev dev; 573 dev = kzalloc(sizeof(struct reader_dev), GFP_KERNEL); 574 if (dev == NULL) 577 dev->timeout = CCID_DRIVER_MINIMUM_TIMEOUT; 578 dev->buffer_status = 0; 580 link->priv = dev; 581 dev->p_dev = link; 585 init_waitqueue_head(&dev->devq); 586 init_waitqueue_head(&dev->poll_wait); 587 init_waitqueue_head(&dev->read_wait); 588 init_waitqueue_head(&dev->write_wait); 589 setup_timer(&dev->poll_timer, cm4040_do_poll, 0); 594 kfree(dev); 605 struct reader_dev *dev = link->priv; 619 kfree(dev);
/linux-4.1.27/net/nfc/
H A D	core.c	45 int nfc_fw_download(struct nfc_dev dev, const char firmware_name) nfc_fw_download() argument 49 pr_debug("%s do firmware %s\n", dev_name(&dev->dev), firmware_name); nfc_fw_download() 51 device_lock(&dev->dev); nfc_fw_download() 53 if (!device_is_registered(&dev->dev)) { nfc_fw_download() 58 if (dev->dev_up) { nfc_fw_download() 63 if (!dev->ops->fw_download) { nfc_fw_download() 68 dev->fw_download_in_progress = true; nfc_fw_download() 69 rc = dev->ops->fw_download(dev, firmware_name); nfc_fw_download() 71 dev->fw_download_in_progress = false; nfc_fw_download() 74 device_unlock(&dev->dev); nfc_fw_download() 81 * @dev: The nfc device to which firmware was downloaded 85 int nfc_fw_download_done(struct nfc_dev dev, const char firmware_name, nfc_fw_download_done() argument 88 dev->fw_download_in_progress = false; nfc_fw_download_done() 90 return nfc_genl_fw_download_done(dev, firmware_name, result); nfc_fw_download_done() 97 * @dev: The nfc device to be turned on 101 int nfc_dev_up(struct nfc_dev dev) nfc_dev_up() argument 105 pr_debug("dev_name=%s\n", dev_name(&dev->dev)); nfc_dev_up() 107 device_lock(&dev->dev); nfc_dev_up() 109 if (dev->rfkill && rfkill_blocked(dev->rfkill)) { nfc_dev_up() 114 if (!device_is_registered(&dev->dev)) { nfc_dev_up() 119 if (dev->fw_download_in_progress) { nfc_dev_up() 124 if (dev->dev_up) { nfc_dev_up() 129 if (dev->ops->dev_up) nfc_dev_up() 130 rc = dev->ops->dev_up(dev); nfc_dev_up() 133 dev->dev_up = true; nfc_dev_up() 136 if (dev->ops->discover_se && dev->ops->discover_se(dev)) nfc_dev_up() 140 device_unlock(&dev->dev); nfc_dev_up() 147 @dev: The nfc device to be turned off 149 int nfc_dev_down(struct nfc_dev dev) nfc_dev_down() argument 153 pr_debug("dev_name=%s\n", dev_name(&dev->dev)); nfc_dev_down() 155 device_lock(&dev->dev); nfc_dev_down() 157 if (!device_is_registered(&dev->dev)) { nfc_dev_down() 162 if (!dev->dev_up) { nfc_dev_down() 167 if (dev->polling \|\| dev->active_target) { nfc_dev_down() 172 if (dev->ops->dev_down) nfc_dev_down() 173 dev->ops->dev_down(dev); nfc_dev_down() 175 dev->dev_up = false; nfc_dev_down() 178 device_unlock(&dev->dev); nfc_dev_down() 184 struct nfc_dev dev = data; nfc_rfkill_set_block() local 186 pr_debug("%s blocked %d", dev_name(&dev->dev), blocked); nfc_rfkill_set_block() 191 nfc_dev_down(dev); nfc_rfkill_set_block() 203 * @dev: The nfc device that must start polling 209 int nfc_start_poll(struct nfc_dev dev, u32 im_protocols, u32 tm_protocols) nfc_start_poll() argument 214 dev_name(&dev->dev), im_protocols, tm_protocols); nfc_start_poll() 219 device_lock(&dev->dev); nfc_start_poll() 221 if (!device_is_registered(&dev->dev)) { nfc_start_poll() 226 if (!dev->dev_up) { nfc_start_poll() 231 if (dev->polling) { nfc_start_poll() 236 rc = dev->ops->start_poll(dev, im_protocols, tm_protocols); nfc_start_poll() 238 dev->polling = true; nfc_start_poll() 239 dev->rf_mode = NFC_RF_NONE; nfc_start_poll() 243 device_unlock(&dev->dev); nfc_start_poll() 250 @dev: The nfc device that must stop polling 252 int nfc_stop_poll(struct nfc_dev dev) nfc_stop_poll() argument 256 pr_debug("dev_name=%s\n", dev_name(&dev->dev)); nfc_stop_poll() 258 device_lock(&dev->dev); nfc_stop_poll() 260 if (!device_is_registered(&dev->dev)) { nfc_stop_poll() 265 if (!dev->polling) { nfc_stop_poll() 270 dev->ops->stop_poll(dev); nfc_stop_poll() 271 dev->polling = false; nfc_stop_poll() 272 dev->rf_mode = NFC_RF_NONE; nfc_stop_poll() 275 device_unlock(&dev->dev); nfc_stop_poll() 279 static struct nfc_target nfc_find_target(struct nfc_dev dev, u32 target_idx) nfc_find_target() argument 283 for (i = 0; i < dev->n_targets; i++) { nfc_find_target() 284 if (dev->targets[i].idx == target_idx) nfc_find_target() 285 return &dev->targets[i]; nfc_find_target() 291 int nfc_dep_link_up(struct nfc_dev dev, int target_index, u8 comm_mode) nfc_dep_link_up() argument 298 pr_debug("dev_name=%s comm %d\n", dev_name(&dev->dev), comm_mode); nfc_dep_link_up() 300 if (!dev->ops->dep_link_up) nfc_dep_link_up() 303 device_lock(&dev->dev); nfc_dep_link_up() 305 if (!device_is_registered(&dev->dev)) { nfc_dep_link_up() 310 if (dev->dep_link_up == true) { nfc_dep_link_up() 315 gb = nfc_llcp_general_bytes(dev, &gb_len); nfc_dep_link_up() 321 target = nfc_find_target(dev, target_index); nfc_dep_link_up() 327 rc = dev->ops->dep_link_up(dev, target, comm_mode, gb, gb_len); nfc_dep_link_up() 329 dev->active_target = target; nfc_dep_link_up() 330 dev->rf_mode = NFC_RF_INITIATOR; nfc_dep_link_up() 334 device_unlock(&dev->dev); nfc_dep_link_up() 338 int nfc_dep_link_down(struct nfc_dev dev) nfc_dep_link_down() argument 342 pr_debug("dev_name=%s\n", dev_name(&dev->dev)); nfc_dep_link_down() 344 if (!dev->ops->dep_link_down) nfc_dep_link_down() 347 device_lock(&dev->dev); nfc_dep_link_down() 349 if (!device_is_registered(&dev->dev)) { nfc_dep_link_down() 354 if (dev->dep_link_up == false) { nfc_dep_link_down() 359 rc = dev->ops->dep_link_down(dev); nfc_dep_link_down() 361 dev->dep_link_up = false; nfc_dep_link_down() 362 dev->active_target = NULL; nfc_dep_link_down() 363 dev->rf_mode = NFC_RF_NONE; nfc_dep_link_down() 364 nfc_llcp_mac_is_down(dev); nfc_dep_link_down() 365 nfc_genl_dep_link_down_event(dev); nfc_dep_link_down() 369 device_unlock(&dev->dev); nfc_dep_link_down() 374 int nfc_dep_link_is_up(struct nfc_dev dev, u32 target_idx, nfc_dep_link_is_up() argument 377 dev->dep_link_up = true; nfc_dep_link_is_up() 379 if (!dev->active_target && rf_mode == NFC_RF_INITIATOR) { nfc_dep_link_is_up() 382 target = nfc_find_target(dev, target_idx); nfc_dep_link_is_up() 386 dev->active_target = target; nfc_dep_link_is_up() 389 dev->polling = false; nfc_dep_link_is_up() 390 dev->rf_mode = rf_mode; nfc_dep_link_is_up() 392 nfc_llcp_mac_is_up(dev, target_idx, comm_mode, rf_mode); nfc_dep_link_is_up() 394 return nfc_genl_dep_link_up_event(dev, target_idx, comm_mode, rf_mode); nfc_dep_link_is_up() 401 * @dev: The nfc device that found the target 405 int nfc_activate_target(struct nfc_dev dev, u32 target_idx, u32 protocol) nfc_activate_target() argument 411 dev_name(&dev->dev), target_idx, protocol); nfc_activate_target() 413 device_lock(&dev->dev); nfc_activate_target() 415 if (!device_is_registered(&dev->dev)) { nfc_activate_target() 420 if (dev->active_target) { nfc_activate_target() 425 target = nfc_find_target(dev, target_idx); nfc_activate_target() 431 rc = dev->ops->activate_target(dev, target, protocol); nfc_activate_target() 433 dev->active_target = target; nfc_activate_target() 434 dev->rf_mode = NFC_RF_INITIATOR; nfc_activate_target() 436 if (dev->ops->check_presence && !dev->shutting_down) nfc_activate_target() 437 mod_timer(&dev->check_pres_timer, jiffies + nfc_activate_target() 442 device_unlock(&dev->dev); nfc_activate_target() 449 @dev: The nfc device that found the target 452 int nfc_deactivate_target(struct nfc_dev dev, u32 target_idx) nfc_deactivate_target() argument 457 dev_name(&dev->dev), target_idx); nfc_deactivate_target() 459 device_lock(&dev->dev); nfc_deactivate_target() 461 if (!device_is_registered(&dev->dev)) { nfc_deactivate_target() 466 if (dev->active_target == NULL) { nfc_deactivate_target() 471 if (dev->active_target->idx != target_idx) { nfc_deactivate_target() 476 if (dev->ops->check_presence) nfc_deactivate_target() 477 del_timer_sync(&dev->check_pres_timer); nfc_deactivate_target() 479 dev->ops->deactivate_target(dev, dev->active_target); nfc_deactivate_target() 480 dev->active_target = NULL; nfc_deactivate_target() 483 device_unlock(&dev->dev); nfc_deactivate_target() 490 @dev: The nfc device that found the target 498 int nfc_data_exchange(struct nfc_dev dev, u32 target_idx, struct sk_buff skb, nfc_data_exchange() argument 504 dev_name(&dev->dev), target_idx, skb->len); nfc_data_exchange() 506 device_lock(&dev->dev); nfc_data_exchange() 508 if (!device_is_registered(&dev->dev)) { nfc_data_exchange() 514 if (dev->rf_mode == NFC_RF_INITIATOR && dev->active_target != NULL) { nfc_data_exchange() 515 if (dev->active_target->idx != target_idx) { nfc_data_exchange() 521 if (dev->ops->check_presence) nfc_data_exchange() 522 del_timer_sync(&dev->check_pres_timer); nfc_data_exchange() 524 rc = dev->ops->im_transceive(dev, dev->active_target, skb, cb, nfc_data_exchange() 527 if (!rc && dev->ops->check_presence && !dev->shutting_down) nfc_data_exchange() 528 mod_timer(&dev->check_pres_timer, jiffies + nfc_data_exchange() 530 } else if (dev->rf_mode == NFC_RF_TARGET && dev->ops->tm_send != NULL) { nfc_data_exchange() 531 rc = dev->ops->tm_send(dev, skb); nfc_data_exchange() 540 device_unlock(&dev->dev); nfc_data_exchange() 544 struct nfc_se nfc_find_se(struct nfc_dev dev, u32 se_idx) nfc_find_se() argument 548 list_for_each_entry(se, &dev->secure_elements, list) nfc_find_se() 556 int nfc_enable_se(struct nfc_dev dev, u32 se_idx) nfc_enable_se() argument 561 pr_debug("%s se index %d\n", dev_name(&dev->dev), se_idx); nfc_enable_se() 563 device_lock(&dev->dev); nfc_enable_se() 565 if (!device_is_registered(&dev->dev)) { nfc_enable_se() 570 if (!dev->dev_up) { nfc_enable_se() 575 if (dev->polling) { nfc_enable_se() 580 if (!dev->ops->enable_se \|\| !dev->ops->disable_se) { nfc_enable_se() 585 se = nfc_find_se(dev, se_idx); nfc_enable_se() 596 rc = dev->ops->enable_se(dev, se_idx); nfc_enable_se() 601 device_unlock(&dev->dev); nfc_enable_se() 605 int nfc_disable_se(struct nfc_dev dev, u32 se_idx) nfc_disable_se() argument 610 pr_debug("%s se index %d\n", dev_name(&dev->dev), se_idx); nfc_disable_se() 612 device_lock(&dev->dev); nfc_disable_se() 614 if (!device_is_registered(&dev->dev)) { nfc_disable_se() 619 if (!dev->dev_up) { nfc_disable_se() 624 if (!dev->ops->enable_se \|\| !dev->ops->disable_se) { nfc_disable_se() 629 se = nfc_find_se(dev, se_idx); nfc_disable_se() 640 rc = dev->ops->disable_se(dev, se_idx); nfc_disable_se() 645 device_unlock(&dev->dev); nfc_disable_se() 649 int nfc_set_remote_general_bytes(struct nfc_dev dev, u8 gb, u8 gb_len) nfc_set_remote_general_bytes() argument 651 pr_debug("dev_name=%s gb_len=%d\n", dev_name(&dev->dev), gb_len); nfc_set_remote_general_bytes() 653 return nfc_llcp_set_remote_gb(dev, gb, gb_len); nfc_set_remote_general_bytes() 657 u8 nfc_get_local_general_bytes(struct nfc_dev dev, size_t gb_len) nfc_get_local_general_bytes() argument 659 pr_debug("dev_name=%s\n", dev_name(&dev->dev)); nfc_get_local_general_bytes() 661 return nfc_llcp_general_bytes(dev, gb_len); nfc_get_local_general_bytes() 665 int nfc_tm_data_received(struct nfc_dev dev, struct sk_buff skb) nfc_tm_data_received() argument 668 if (dev->dep_link_up == false) { nfc_tm_data_received() 673 return nfc_llcp_data_received(dev, skb); nfc_tm_data_received() 677 int nfc_tm_activated(struct nfc_dev dev, u32 protocol, u8 comm_mode, nfc_tm_activated() argument 682 device_lock(&dev->dev); nfc_tm_activated() 684 dev->polling = false; nfc_tm_activated() 687 rc = nfc_set_remote_general_bytes(dev, gb, gb_len); nfc_tm_activated() 692 dev->rf_mode = NFC_RF_TARGET; nfc_tm_activated() 695 nfc_dep_link_is_up(dev, 0, comm_mode, NFC_RF_TARGET); nfc_tm_activated() 697 rc = nfc_genl_tm_activated(dev, protocol); nfc_tm_activated() 700 device_unlock(&dev->dev); nfc_tm_activated() 706 int nfc_tm_deactivated(struct nfc_dev dev) nfc_tm_deactivated() argument 708 dev->dep_link_up = false; nfc_tm_deactivated() 709 dev->rf_mode = NFC_RF_NONE; nfc_tm_deactivated() 711 return nfc_genl_tm_deactivated(dev); nfc_tm_deactivated() 721 struct sk_buff nfc_alloc_send_skb(struct nfc_dev dev, struct sock sk, nfc_alloc_send_skb() argument 729 dev->tx_headroom + dev->tx_tailroom + NFC_HEADER_SIZE; nfc_alloc_send_skb() 733 skb_reserve(skb, dev->tx_headroom + NFC_HEADER_SIZE); nfc_alloc_send_skb() 762 * @dev: The nfc device that found the targets 775 int nfc_targets_found(struct nfc_dev dev, nfc_targets_found() argument 780 pr_debug("dev_name=%s n_targets=%d\n", dev_name(&dev->dev), n_targets); nfc_targets_found() 783 targets[i].idx = dev->target_next_idx++; nfc_targets_found() 785 device_lock(&dev->dev); nfc_targets_found() 787 if (dev->polling == false) { nfc_targets_found() 788 device_unlock(&dev->dev); nfc_targets_found() 792 dev->polling = false; nfc_targets_found() 794 dev->targets_generation++; nfc_targets_found() 796 kfree(dev->targets); nfc_targets_found() 797 dev->targets = NULL; nfc_targets_found() 800 dev->targets = kmemdup(targets, nfc_targets_found() 804 if (!dev->targets) { nfc_targets_found() 805 dev->n_targets = 0; nfc_targets_found() 806 device_unlock(&dev->dev); nfc_targets_found() 811 dev->n_targets = n_targets; nfc_targets_found() 812 device_unlock(&dev->dev); nfc_targets_found() 814 nfc_genl_targets_found(dev); nfc_targets_found() 823 @dev: The nfc device that had the activated target in field 832 int nfc_target_lost(struct nfc_dev dev, u32 target_idx) nfc_target_lost() argument 837 pr_debug("dev_name %s n_target %d\n", dev_name(&dev->dev), target_idx); nfc_target_lost() 839 device_lock(&dev->dev); nfc_target_lost() 841 for (i = 0; i < dev->n_targets; i++) { nfc_target_lost() 842 tg = &dev->targets[i]; nfc_target_lost() 847 if (i == dev->n_targets) { nfc_target_lost() 848 device_unlock(&dev->dev); nfc_target_lost() 852 dev->targets_generation++; nfc_target_lost() 853 dev->n_targets--; nfc_target_lost() 854 dev->active_target = NULL; nfc_target_lost() 856 if (dev->n_targets) { nfc_target_lost() 857 memcpy(&dev->targets[i], &dev->targets[i + 1], nfc_target_lost() 858 (dev->n_targets - i) sizeof(struct nfc_target)); nfc_target_lost() 860 kfree(dev->targets); nfc_target_lost() 861 dev->targets = NULL; nfc_target_lost() 864 device_unlock(&dev->dev); nfc_target_lost() 866 nfc_genl_target_lost(dev, target_idx); nfc_target_lost() 872 inline void nfc_driver_failure(struct nfc_dev dev, int err) nfc_driver_failure() argument 874 nfc_targets_found(dev, NULL, 0); nfc_driver_failure() 878 int nfc_add_se(struct nfc_dev dev, u32 se_idx, u16 type) nfc_add_se() argument 883 pr_debug("%s se index %d\n", dev_name(&dev->dev), se_idx); nfc_add_se() 885 se = nfc_find_se(dev, se_idx); nfc_add_se() 898 list_add(&se->list, &dev->secure_elements); nfc_add_se() 900 rc = nfc_genl_se_added(dev, se_idx, type); nfc_add_se() 912 int nfc_remove_se(struct nfc_dev dev, u32 se_idx) nfc_remove_se() argument 917 pr_debug("%s se index %d\n", dev_name(&dev->dev), se_idx); nfc_remove_se() 919 list_for_each_entry_safe(se, n, &dev->secure_elements, list) nfc_remove_se() 921 rc = nfc_genl_se_removed(dev, se_idx); nfc_remove_se() 935 int nfc_se_transaction(struct nfc_dev dev, u8 se_idx, nfc_se_transaction() argument 942 device_lock(&dev->dev); nfc_se_transaction() 949 rc = nfc_genl_se_transaction(dev, se_idx, evt_transaction); nfc_se_transaction() 951 device_unlock(&dev->dev); nfc_se_transaction() 958 struct nfc_dev dev = to_nfc_dev(d); nfc_release() local 961 pr_debug("dev_name=%s\n", dev_name(&dev->dev)); nfc_release() 963 nfc_genl_data_exit(&dev->genl_data); nfc_release() 964 kfree(dev->targets); nfc_release() 966 list_for_each_entry_safe(se, n, &dev->secure_elements, list) { nfc_release() 967 nfc_genl_se_removed(dev, se->idx); nfc_release() 972 kfree(dev); nfc_release() 977 struct nfc_dev dev = container_of(work, struct nfc_dev, nfc_check_pres_work() local 981 device_lock(&dev->dev); nfc_check_pres_work() 983 if (dev->active_target && timer_pending(&dev->check_pres_timer) == 0) { nfc_check_pres_work() 984 rc = dev->ops->check_presence(dev, dev->active_target); nfc_check_pres_work() 988 u32 active_target_idx = dev->active_target->idx; nfc_check_pres_work() 989 device_unlock(&dev->dev); nfc_check_pres_work() 990 nfc_target_lost(dev, active_target_idx); nfc_check_pres_work() 994 if (!dev->shutting_down) nfc_check_pres_work() 995 mod_timer(&dev->check_pres_timer, jiffies + nfc_check_pres_work() 1000 device_unlock(&dev->dev); nfc_check_pres_work() 1005 struct nfc_dev dev = (struct nfc_dev )data; nfc_check_pres_timeout() local 1007 schedule_work(&dev->check_pres_work); nfc_check_pres_timeout() 1018 struct nfc_dev dev = to_nfc_dev(d); match_idx() local 1021 return dev->idx == idx; match_idx() 1045 struct nfc_dev dev; nfc_allocate_device() local 1054 dev = kzalloc(sizeof(struct nfc_dev), GFP_KERNEL); nfc_allocate_device() 1055 if (!dev) nfc_allocate_device() 1058 dev->ops = ops; nfc_allocate_device() 1059 dev->supported_protocols = supported_protocols; nfc_allocate_device() 1060 dev->tx_headroom = tx_headroom; nfc_allocate_device() 1061 dev->tx_tailroom = tx_tailroom; nfc_allocate_device() 1062 INIT_LIST_HEAD(&dev->secure_elements); nfc_allocate_device() 1064 nfc_genl_data_init(&dev->genl_data); nfc_allocate_device() 1066 dev->rf_mode = NFC_RF_NONE; nfc_allocate_device() 1069 dev->targets_generation = 1; nfc_allocate_device() 1072 init_timer(&dev->check_pres_timer); nfc_allocate_device() 1073 dev->check_pres_timer.data = (unsigned long)dev; nfc_allocate_device() 1074 dev->check_pres_timer.function = nfc_check_pres_timeout; nfc_allocate_device() 1076 INIT_WORK(&dev->check_pres_work, nfc_check_pres_work); nfc_allocate_device() 1079 return dev; nfc_allocate_device() 1086 @dev: The nfc device to register 1088 int nfc_register_device(struct nfc_dev dev) nfc_register_device() argument 1092 pr_debug("dev_name=%s\n", dev_name(&dev->dev)); nfc_register_device() 1094 dev->idx = ida_simple_get(&nfc_index_ida, 0, 0, GFP_KERNEL); nfc_register_device() 1095 if (dev->idx < 0) nfc_register_device() 1096 return dev->idx; nfc_register_device() 1098 dev->dev.class = &nfc_class; nfc_register_device() 1099 dev_set_name(&dev->dev, "nfc%d", dev->idx); nfc_register_device() 1100 device_initialize(&dev->dev); nfc_register_device() 1104 rc = device_add(&dev->dev); nfc_register_device() 1110 rc = nfc_llcp_register_device(dev); nfc_register_device() 1114 rc = nfc_genl_device_added(dev); nfc_register_device() 1117 dev_name(&dev->dev)); nfc_register_device() 1119 dev->rfkill = rfkill_alloc(dev_name(&dev->dev), &dev->dev, nfc_register_device() 1120 RFKILL_TYPE_NFC, &nfc_rfkill_ops, dev); nfc_register_device() 1121 if (dev->rfkill) { nfc_register_device() 1122 if (rfkill_register(dev->rfkill) < 0) { nfc_register_device() 1123 rfkill_destroy(dev->rfkill); nfc_register_device() 1124 dev->rfkill = NULL; nfc_register_device() 1135 @dev: The nfc device to unregister 1137 void nfc_unregister_device(struct nfc_dev *dev) nfc_unregister_device() argument 1141 pr_debug("dev_name=%s\n", dev_name(&dev->dev)); nfc_unregister_device() 1143 id = dev->idx; nfc_unregister_device() 1145 if (dev->rfkill) { nfc_unregister_device() 1146 rfkill_unregister(dev->rfkill); nfc_unregister_device() 1147 rfkill_destroy(dev->rfkill); nfc_unregister_device() 1150 if (dev->ops->check_presence) { nfc_unregister_device() 1151 device_lock(&dev->dev); nfc_unregister_device() 1152 dev->shutting_down = true; nfc_unregister_device() 1153 device_unlock(&dev->dev); nfc_unregister_device() 1154 del_timer_sync(&dev->check_pres_timer); nfc_unregister_device() 1155 cancel_work_sync(&dev->check_pres_work); nfc_unregister_device() 1158 rc = nfc_genl_device_removed(dev); nfc_unregister_device() 1161 "was removed\n", dev_name(&dev->dev)); nfc_unregister_device() 1163 nfc_llcp_unregister_device(dev); nfc_unregister_device() 1167 device_del(&dev->dev); nfc_unregister_device()
/linux-4.1.27/drivers/infiniband/hw/ocrdma/
H A D	ocrdma_main.c	56 void ocrdma_get_guid(struct ocrdma_dev dev, u8 guid) ocrdma_get_guid() argument 60 memcpy(&mac_addr[0], &dev->nic_info.mac_addr[0], ETH_ALEN); ocrdma_get_guid() 71 static bool ocrdma_add_sgid(struct ocrdma_dev dev, union ib_gid new_sgid) ocrdma_add_sgid() argument 79 spin_lock_irqsave(&dev->sgid_lock, flags); ocrdma_add_sgid() 81 if (!memcmp(&dev->sgid_tbl[i], &ocrdma_zero_sgid, ocrdma_add_sgid() 84 memcpy(&dev->sgid_tbl[i], new_sgid, ocrdma_add_sgid() 86 spin_unlock_irqrestore(&dev->sgid_lock, flags); ocrdma_add_sgid() 88 } else if (!memcmp(&dev->sgid_tbl[i], new_sgid, ocrdma_add_sgid() 91 spin_unlock_irqrestore(&dev->sgid_lock, flags); ocrdma_add_sgid() 95 spin_unlock_irqrestore(&dev->sgid_lock, flags); ocrdma_add_sgid() 99 static bool ocrdma_del_sgid(struct ocrdma_dev dev, union ib_gid sgid) ocrdma_del_sgid() argument 106 spin_lock_irqsave(&dev->sgid_lock, flags); ocrdma_del_sgid() 109 if (!memcmp(&dev->sgid_tbl[i], sgid, sizeof(union ib_gid))) { ocrdma_del_sgid() 111 memset(&dev->sgid_tbl[i], 0, sizeof(union ib_gid)); ocrdma_del_sgid() 116 spin_unlock_irqrestore(&dev->sgid_lock, flags); ocrdma_del_sgid() 124 struct ocrdma_dev dev; ocrdma_addr_event() local 134 list_for_each_entry_rcu(dev, &ocrdma_dev_list, entry) { ocrdma_addr_event() 135 if (dev->nic_info.netdev == netdev) { ocrdma_addr_event() 145 mutex_lock(&dev->dev_lock); ocrdma_addr_event() 148 updated = ocrdma_add_sgid(dev, gid); ocrdma_addr_event() 151 updated = ocrdma_del_sgid(dev, gid); ocrdma_addr_event() 158 gid_event.device = &dev->ibdev; ocrdma_addr_event() 163 mutex_unlock(&dev->dev_lock); ocrdma_addr_event() 172 struct net_device netdev = ifa->ifa_dev->dev; ocrdma_inetaddr_event() 189 struct net_device netdev = ifa->idev->dev; ocrdma_inet6addr_event() 205 static int ocrdma_register_device(struct ocrdma_dev dev) ocrdma_register_device() argument 207 strlcpy(dev->ibdev.name, "ocrdma%d", IB_DEVICE_NAME_MAX); ocrdma_register_device() 208 ocrdma_get_guid(dev, (u8 )&dev->ibdev.node_guid); ocrdma_register_device() 209 memcpy(dev->ibdev.node_desc, OCRDMA_NODE_DESC, ocrdma_register_device() 211 dev->ibdev.owner = THIS_MODULE; ocrdma_register_device() 212 dev->ibdev.uverbs_abi_ver = OCRDMA_ABI_VERSION; ocrdma_register_device() 213 dev->ibdev.uverbs_cmd_mask = ocrdma_register_device() 234 dev->ibdev.uverbs_cmd_mask \|= ocrdma_register_device() 240 dev->ibdev.node_type = RDMA_NODE_IB_CA; ocrdma_register_device() 241 dev->ibdev.phys_port_cnt = 1; ocrdma_register_device() 242 dev->ibdev.num_comp_vectors = dev->eq_cnt; ocrdma_register_device() 245 dev->ibdev.query_device = ocrdma_query_device; ocrdma_register_device() 246 dev->ibdev.query_port = ocrdma_query_port; ocrdma_register_device() 247 dev->ibdev.modify_port = ocrdma_modify_port; ocrdma_register_device() 248 dev->ibdev.query_gid = ocrdma_query_gid; ocrdma_register_device() 249 dev->ibdev.get_link_layer = ocrdma_link_layer; ocrdma_register_device() 250 dev->ibdev.alloc_pd = ocrdma_alloc_pd; ocrdma_register_device() 251 dev->ibdev.dealloc_pd = ocrdma_dealloc_pd; ocrdma_register_device() 253 dev->ibdev.create_cq = ocrdma_create_cq; ocrdma_register_device() 254 dev->ibdev.destroy_cq = ocrdma_destroy_cq; ocrdma_register_device() 255 dev->ibdev.resize_cq = ocrdma_resize_cq; ocrdma_register_device() 257 dev->ibdev.create_qp = ocrdma_create_qp; ocrdma_register_device() 258 dev->ibdev.modify_qp = ocrdma_modify_qp; ocrdma_register_device() 259 dev->ibdev.query_qp = ocrdma_query_qp; ocrdma_register_device() 260 dev->ibdev.destroy_qp = ocrdma_destroy_qp; ocrdma_register_device() 262 dev->ibdev.query_pkey = ocrdma_query_pkey; ocrdma_register_device() 263 dev->ibdev.create_ah = ocrdma_create_ah; ocrdma_register_device() 264 dev->ibdev.destroy_ah = ocrdma_destroy_ah; ocrdma_register_device() 265 dev->ibdev.query_ah = ocrdma_query_ah; ocrdma_register_device() 266 dev->ibdev.modify_ah = ocrdma_modify_ah; ocrdma_register_device() 268 dev->ibdev.poll_cq = ocrdma_poll_cq; ocrdma_register_device() 269 dev->ibdev.post_send = ocrdma_post_send; ocrdma_register_device() 270 dev->ibdev.post_recv = ocrdma_post_recv; ocrdma_register_device() 271 dev->ibdev.req_notify_cq = ocrdma_arm_cq; ocrdma_register_device() 273 dev->ibdev.get_dma_mr = ocrdma_get_dma_mr; ocrdma_register_device() 274 dev->ibdev.reg_phys_mr = ocrdma_reg_kernel_mr; ocrdma_register_device() 275 dev->ibdev.dereg_mr = ocrdma_dereg_mr; ocrdma_register_device() 276 dev->ibdev.reg_user_mr = ocrdma_reg_user_mr; ocrdma_register_device() 278 dev->ibdev.alloc_fast_reg_mr = ocrdma_alloc_frmr; ocrdma_register_device() 279 dev->ibdev.alloc_fast_reg_page_list = ocrdma_alloc_frmr_page_list; ocrdma_register_device() 280 dev->ibdev.free_fast_reg_page_list = ocrdma_free_frmr_page_list; ocrdma_register_device() 283 dev->ibdev.alloc_ucontext = ocrdma_alloc_ucontext; ocrdma_register_device() 284 dev->ibdev.dealloc_ucontext = ocrdma_dealloc_ucontext; ocrdma_register_device() 285 dev->ibdev.mmap = ocrdma_mmap; ocrdma_register_device() 286 dev->ibdev.dma_device = &dev->nic_info.pdev->dev; ocrdma_register_device() 288 dev->ibdev.process_mad = ocrdma_process_mad; ocrdma_register_device() 290 if (ocrdma_get_asic_type(dev) == OCRDMA_ASIC_GEN_SKH_R) { ocrdma_register_device() 291 dev->ibdev.uverbs_cmd_mask \|= ocrdma_register_device() 298 dev->ibdev.create_srq = ocrdma_create_srq; ocrdma_register_device() 299 dev->ibdev.modify_srq = ocrdma_modify_srq; ocrdma_register_device() 300 dev->ibdev.query_srq = ocrdma_query_srq; ocrdma_register_device() 301 dev->ibdev.destroy_srq = ocrdma_destroy_srq; ocrdma_register_device() 302 dev->ibdev.post_srq_recv = ocrdma_post_srq_recv; ocrdma_register_device() 304 return ib_register_device(&dev->ibdev, NULL); ocrdma_register_device() 307 static int ocrdma_alloc_resources(struct ocrdma_dev dev) ocrdma_alloc_resources() argument 309 mutex_init(&dev->dev_lock); ocrdma_alloc_resources() 310 dev->sgid_tbl = kzalloc(sizeof(union ib_gid) * ocrdma_alloc_resources() 312 if (!dev->sgid_tbl) ocrdma_alloc_resources() 314 spin_lock_init(&dev->sgid_lock); ocrdma_alloc_resources() 316 dev->cq_tbl = kzalloc(sizeof(struct ocrdma_cq ) ocrdma_alloc_resources() 318 if (!dev->cq_tbl) ocrdma_alloc_resources() 321 if (dev->attr.max_qp) { ocrdma_alloc_resources() 322 dev->qp_tbl = kzalloc(sizeof(struct ocrdma_qp ) ocrdma_alloc_resources() 324 if (!dev->qp_tbl) ocrdma_alloc_resources() 328 dev->stag_arr = kzalloc(sizeof(u64) * OCRDMA_MAX_STAG, GFP_KERNEL); ocrdma_alloc_resources() 329 if (dev->stag_arr == NULL) ocrdma_alloc_resources() 332 ocrdma_alloc_pd_pool(dev); ocrdma_alloc_resources() 334 spin_lock_init(&dev->av_tbl.lock); ocrdma_alloc_resources() 335 spin_lock_init(&dev->flush_q_lock); ocrdma_alloc_resources() 338 pr_err("%s(%d) error.\n", __func__, dev->id); ocrdma_alloc_resources() 342 static void ocrdma_free_resources(struct ocrdma_dev dev) ocrdma_free_resources() argument 344 kfree(dev->stag_arr); ocrdma_free_resources() 345 kfree(dev->qp_tbl); ocrdma_free_resources() 346 kfree(dev->cq_tbl); ocrdma_free_resources() 347 kfree(dev->sgid_tbl); ocrdma_free_resources() 354 struct ocrdma_dev dev = dev_get_drvdata(device); show_rev() local 356 return scnprintf(buf, PAGE_SIZE, "0x%x\n", dev->nic_info.pdev->vendor); show_rev() 362 struct ocrdma_dev dev = dev_get_drvdata(device); show_fw_ver() local 364 return scnprintf(buf, PAGE_SIZE, "%s\n", &dev->attr.fw_ver[0]); show_fw_ver() 370 struct ocrdma_dev dev = dev_get_drvdata(device); show_hca_type() local 372 return scnprintf(buf, PAGE_SIZE, "%s\n", &dev->model_number[0]); show_hca_type() 385 static void ocrdma_remove_sysfiles(struct ocrdma_dev dev) ocrdma_remove_sysfiles() argument 390 device_remove_file(&dev->ibdev.dev, ocrdma_attributes[i]); ocrdma_remove_sysfiles() 393 static void ocrdma_add_default_sgid(struct ocrdma_dev dev) ocrdma_add_default_sgid() argument 396 union ib_gid sgid = &dev->sgid_tbl[0]; ocrdma_add_default_sgid() 399 ocrdma_get_guid(dev, &sgid->raw[8]); ocrdma_add_default_sgid() 402 static void ocrdma_init_ipv4_gids(struct ocrdma_dev dev, ocrdma_init_ipv4_gids() argument 412 ocrdma_add_sgid(dev, &gid); for_ifa() 419 static void ocrdma_init_ipv6_gids(struct ocrdma_dev dev, ocrdma_init_ipv6_gids() argument 431 ocrdma_add_sgid(dev, pgid); ocrdma_init_ipv6_gids() 439 static void ocrdma_init_gid_table(struct ocrdma_dev dev) ocrdma_init_gid_table() argument 447 if (real_dev == dev->nic_info.netdev) { ocrdma_init_gid_table() 448 ocrdma_add_default_sgid(dev); ocrdma_init_gid_table() 449 ocrdma_init_ipv4_gids(dev, net_dev); ocrdma_init_gid_table() 450 ocrdma_init_ipv6_gids(dev, net_dev); ocrdma_init_gid_table() 458 struct ocrdma_dev dev; ocrdma_add() local 460 dev = (struct ocrdma_dev )ib_alloc_device(sizeof(struct ocrdma_dev)); ocrdma_add() 461 if (!dev) { ocrdma_add() 465 dev->mbx_cmd = kzalloc(sizeof(struct ocrdma_mqe_emb_cmd), GFP_KERNEL); ocrdma_add() 466 if (!dev->mbx_cmd) ocrdma_add() 469 memcpy(&dev->nic_info, dev_info, sizeof(dev_info)); ocrdma_add() 470 dev->id = idr_alloc(&ocrdma_dev_id, NULL, 0, 0, GFP_KERNEL); ocrdma_add() 471 if (dev->id < 0) ocrdma_add() 474 status = ocrdma_init_hw(dev); ocrdma_add() 478 status = ocrdma_alloc_resources(dev); ocrdma_add() 482 ocrdma_init_service_level(dev); ocrdma_add() 483 ocrdma_init_gid_table(dev); ocrdma_add() 484 status = ocrdma_register_device(dev); ocrdma_add() 489 if (device_create_file(&dev->ibdev.dev, ocrdma_attributes[i])) ocrdma_add() 492 list_add_tail_rcu(&dev->entry, &ocrdma_dev_list); ocrdma_add() 495 ocrdma_add_port_stats(dev); ocrdma_add() 497 INIT_DELAYED_WORK(&dev->eqd_work, ocrdma_eqd_set_task); ocrdma_add() 498 schedule_delayed_work(&dev->eqd_work, msecs_to_jiffies(1000)); ocrdma_add() 501 dev_name(&dev->nic_info.pdev->dev), hca_name(dev), ocrdma_add() 502 port_speed_string(dev), dev->model_number, ocrdma_add() 503 dev->hba_port_num); ocrdma_add() 505 dev_name(&dev->nic_info.pdev->dev), dev->id); ocrdma_add() 506 return dev; ocrdma_add() 509 ocrdma_remove_sysfiles(dev); ocrdma_add() 511 ocrdma_free_resources(dev); ocrdma_add() 512 ocrdma_cleanup_hw(dev); ocrdma_add() 514 idr_remove(&ocrdma_dev_id, dev->id); ocrdma_add() 516 kfree(dev->mbx_cmd); ocrdma_add() 517 ib_dealloc_device(&dev->ibdev); ocrdma_add() 524 struct ocrdma_dev dev = container_of(rcu, struct ocrdma_dev, rcu); ocrdma_remove_free() local 526 idr_remove(&ocrdma_dev_id, dev->id); ocrdma_remove_free() 527 kfree(dev->mbx_cmd); ocrdma_remove_free() 528 ib_dealloc_device(&dev->ibdev); ocrdma_remove_free() 531 static void ocrdma_remove(struct ocrdma_dev dev) ocrdma_remove() argument 536 cancel_delayed_work_sync(&dev->eqd_work); ocrdma_remove() 537 ocrdma_remove_sysfiles(dev); ocrdma_remove() 538 ib_unregister_device(&dev->ibdev); ocrdma_remove() 540 ocrdma_rem_port_stats(dev); ocrdma_remove() 543 list_del_rcu(&dev->entry); ocrdma_remove() 546 ocrdma_free_resources(dev); ocrdma_remove() 547 ocrdma_cleanup_hw(dev); ocrdma_remove() 549 call_rcu(&dev->rcu, ocrdma_remove_free); ocrdma_remove() 552 static int ocrdma_open(struct ocrdma_dev dev) ocrdma_open() argument 558 port_event.device = &dev->ibdev; ocrdma_open() 563 static int ocrdma_close(struct ocrdma_dev dev) ocrdma_close() argument 572 mutex_lock(&dev->dev_lock); ocrdma_close() 573 if (dev->qp_tbl) { ocrdma_close() 574 cur_qp = dev->qp_tbl; ocrdma_close() 583 err_event.device = &dev->ibdev; ocrdma_close() 588 mutex_unlock(&dev->dev_lock); ocrdma_close() 592 err_event.device = &dev->ibdev; ocrdma_close() 597 static void ocrdma_shutdown(struct ocrdma_dev dev) ocrdma_shutdown() argument 599 ocrdma_close(dev); ocrdma_shutdown() 600 ocrdma_remove(dev); ocrdma_shutdown() 607 static void ocrdma_event_handler(struct ocrdma_dev *dev, u32 event) ocrdma_event_handler() argument 611 ocrdma_open(dev); ocrdma_event_handler() 614 ocrdma_close(dev); ocrdma_event_handler() 617 ocrdma_shutdown(dev); ocrdma_event_handler()
H A D	ocrdma_stats.c	52 static bool ocrdma_alloc_stats_mem(struct ocrdma_dev dev) ocrdma_alloc_stats_mem() argument 54 struct stats_mem mem = &dev->stats_mem; ocrdma_alloc_stats_mem() 60 mem->va = dma_alloc_coherent(&dev->nic_info.pdev->dev, mem->size, ocrdma_alloc_stats_mem() 79 static void ocrdma_release_stats_mem(struct ocrdma_dev dev) ocrdma_release_stats_mem() argument 81 struct stats_mem mem = &dev->stats_mem; ocrdma_release_stats_mem() 84 dma_free_coherent(&dev->nic_info.pdev->dev, mem->size, ocrdma_release_stats_mem() 89 static char ocrdma_resource_stats(struct ocrdma_dev dev) ocrdma_resource_stats() argument 91 char stats = dev->stats_mem.debugfs_mem, pcur; ocrdma_resource_stats() 93 (struct ocrdma_rdma_stats_resp )dev->stats_mem.va; ocrdma_resource_stats() 206 static char ocrdma_rx_stats(struct ocrdma_dev dev) ocrdma_rx_stats() argument 208 char stats = dev->stats_mem.debugfs_mem, pcur; ocrdma_rx_stats() 210 (struct ocrdma_rdma_stats_resp )dev->stats_mem.va; ocrdma_rx_stats() 253 static u64 ocrdma_sysfs_rcv_pkts(struct ocrdma_dev dev) ocrdma_sysfs_rcv_pkts() argument 256 (struct ocrdma_rdma_stats_resp )dev->stats_mem.va; ocrdma_sysfs_rcv_pkts() 264 static u64 ocrdma_sysfs_rcv_data(struct ocrdma_dev dev) ocrdma_sysfs_rcv_data() argument 267 (struct ocrdma_rdma_stats_resp )dev->stats_mem.va; ocrdma_sysfs_rcv_data() 274 static char ocrdma_tx_stats(struct ocrdma_dev dev) ocrdma_tx_stats() argument 276 char stats = dev->stats_mem.debugfs_mem, pcur; ocrdma_tx_stats() 278 (struct ocrdma_rdma_stats_resp )dev->stats_mem.va; ocrdma_tx_stats() 317 static u64 ocrdma_sysfs_xmit_pkts(struct ocrdma_dev dev) ocrdma_sysfs_xmit_pkts() argument 320 (struct ocrdma_rdma_stats_resp )dev->stats_mem.va; ocrdma_sysfs_xmit_pkts() 332 static u64 ocrdma_sysfs_xmit_data(struct ocrdma_dev dev) ocrdma_sysfs_xmit_data() argument 335 (struct ocrdma_rdma_stats_resp )dev->stats_mem.va; ocrdma_sysfs_xmit_data() 348 static char ocrdma_wqe_stats(struct ocrdma_dev dev) ocrdma_wqe_stats() argument 350 char stats = dev->stats_mem.debugfs_mem, pcur; ocrdma_wqe_stats() 352 (struct ocrdma_rdma_stats_resp )dev->stats_mem.va; ocrdma_wqe_stats() 381 static char ocrdma_db_errstats(struct ocrdma_dev dev) ocrdma_db_errstats() argument 383 char stats = dev->stats_mem.debugfs_mem, pcur; ocrdma_db_errstats() 385 (struct ocrdma_rdma_stats_resp )dev->stats_mem.va; ocrdma_db_errstats() 402 static char ocrdma_rxqp_errstats(struct ocrdma_dev dev) ocrdma_rxqp_errstats() argument 404 char stats = dev->stats_mem.debugfs_mem, pcur; ocrdma_rxqp_errstats() 406 (struct ocrdma_rdma_stats_resp )dev->stats_mem.va; ocrdma_rxqp_errstats() 428 static char ocrdma_txqp_errstats(struct ocrdma_dev dev) ocrdma_txqp_errstats() argument 430 char stats = dev->stats_mem.debugfs_mem, pcur; ocrdma_txqp_errstats() 432 (struct ocrdma_rdma_stats_resp )dev->stats_mem.va; ocrdma_txqp_errstats() 452 static char ocrdma_tx_dbg_stats(struct ocrdma_dev dev) ocrdma_tx_dbg_stats() argument 455 char pstats = dev->stats_mem.debugfs_mem; ocrdma_tx_dbg_stats() 457 (struct ocrdma_rdma_stats_resp )dev->stats_mem.va; ocrdma_tx_dbg_stats() 467 return dev->stats_mem.debugfs_mem; ocrdma_tx_dbg_stats() 470 static char ocrdma_rx_dbg_stats(struct ocrdma_dev dev) ocrdma_rx_dbg_stats() argument 473 char pstats = dev->stats_mem.debugfs_mem; ocrdma_rx_dbg_stats() 475 (struct ocrdma_rdma_stats_resp )dev->stats_mem.va; ocrdma_rx_dbg_stats() 485 return dev->stats_mem.debugfs_mem; ocrdma_rx_dbg_stats() 488 static char ocrdma_driver_dbg_stats(struct ocrdma_dev dev) ocrdma_driver_dbg_stats() argument 490 char stats = dev->stats_mem.debugfs_mem, pcur; ocrdma_driver_dbg_stats() 497 (u64)(dev->async_err_stats ocrdma_driver_dbg_stats() 500 (u64)dev->async_err_stats ocrdma_driver_dbg_stats() 503 (u64)dev->async_err_stats ocrdma_driver_dbg_stats() 506 (u64)dev->async_err_stats ocrdma_driver_dbg_stats() 509 (u64)dev->async_err_stats ocrdma_driver_dbg_stats() 512 (u64)dev->async_err_stats ocrdma_driver_dbg_stats() 515 (u64)dev->async_err_stats ocrdma_driver_dbg_stats() 518 (u64)dev->async_err_stats ocrdma_driver_dbg_stats() 521 (u64)dev->async_err_stats ocrdma_driver_dbg_stats() 524 (u64)dev->async_err_stats ocrdma_driver_dbg_stats() 528 (u64)dev->cqe_err_stats ocrdma_driver_dbg_stats() 531 (u64)dev->cqe_err_stats ocrdma_driver_dbg_stats() 534 (u64)dev->cqe_err_stats ocrdma_driver_dbg_stats() 537 (u64)dev->cqe_err_stats ocrdma_driver_dbg_stats() 540 (u64)dev->cqe_err_stats ocrdma_driver_dbg_stats() 543 (u64)dev->cqe_err_stats ocrdma_driver_dbg_stats() 546 (u64)dev->cqe_err_stats ocrdma_driver_dbg_stats() 549 (u64)dev->cqe_err_stats ocrdma_driver_dbg_stats() 552 (u64)dev->cqe_err_stats ocrdma_driver_dbg_stats() 555 (u64)dev->cqe_err_stats ocrdma_driver_dbg_stats() 558 (u64)dev->cqe_err_stats ocrdma_driver_dbg_stats() 561 (u64)dev->cqe_err_stats ocrdma_driver_dbg_stats() 564 (u64)dev->cqe_err_stats ocrdma_driver_dbg_stats() 567 (u64)dev->cqe_err_stats ocrdma_driver_dbg_stats() 570 (u64)dev->cqe_err_stats ocrdma_driver_dbg_stats() 573 (u64)dev->cqe_err_stats ocrdma_driver_dbg_stats() 576 (u64)dev->cqe_err_stats ocrdma_driver_dbg_stats() 579 (u64)dev->cqe_err_stats ocrdma_driver_dbg_stats() 582 (u64)dev->cqe_err_stats ocrdma_driver_dbg_stats() 585 (u64)dev->cqe_err_stats ocrdma_driver_dbg_stats() 588 (u64)dev->cqe_err_stats ocrdma_driver_dbg_stats() 593 static void ocrdma_update_stats(struct ocrdma_dev dev) ocrdma_update_stats() argument 598 (struct ocrdma_rdma_stats_resp )dev->stats_mem.va; ocrdma_update_stats() 601 secs = jiffies_to_msecs(now - dev->last_stats_time) / 1000U; ocrdma_update_stats() 604 status = ocrdma_mbx_rdma_stats(dev, false); ocrdma_update_stats() 609 if (dev->pd_mgr->pd_prealloc_valid) { ocrdma_update_stats() 610 rsrc_stats->dpp_pds = dev->pd_mgr->pd_dpp_count; ocrdma_update_stats() 611 rsrc_stats->non_dpp_pds = dev->pd_mgr->pd_norm_count; ocrdma_update_stats() 614 rsrc_stats->dpp_pds = dev->pd_mgr->pd_dpp_thrsh; ocrdma_update_stats() 615 rsrc_stats->non_dpp_pds = dev->pd_mgr->pd_norm_thrsh; ocrdma_update_stats() 617 dev->last_stats_time = jiffies; ocrdma_update_stats() 629 struct ocrdma_dev dev = pstats->dev; ocrdma_dbgfs_ops_write() local 644 status = ocrdma_mbx_rdma_stats(dev, true); ocrdma_dbgfs_ops_write() 660 int ocrdma_pma_counters(struct ocrdma_dev dev, ocrdma_pma_counters() argument 667 ocrdma_update_stats(dev); ocrdma_pma_counters() 669 pma_cnt->port_xmit_data = cpu_to_be32(ocrdma_sysfs_xmit_data(dev)); ocrdma_pma_counters() 670 pma_cnt->port_rcv_data = cpu_to_be32(ocrdma_sysfs_rcv_data(dev)); ocrdma_pma_counters() 671 pma_cnt->port_xmit_packets = cpu_to_be32(ocrdma_sysfs_xmit_pkts(dev)); ocrdma_pma_counters() 672 pma_cnt->port_rcv_packets = cpu_to_be32(ocrdma_sysfs_rcv_pkts(dev)); ocrdma_pma_counters() 680 struct ocrdma_dev dev = pstats->dev; ocrdma_dbgfs_ops_read() local 688 mutex_lock(&dev->stats_lock); ocrdma_dbgfs_ops_read() 690 ocrdma_update_stats(dev); ocrdma_dbgfs_ops_read() 694 data = ocrdma_resource_stats(dev); ocrdma_dbgfs_ops_read() 697 data = ocrdma_rx_stats(dev); ocrdma_dbgfs_ops_read() 700 data = ocrdma_wqe_stats(dev); ocrdma_dbgfs_ops_read() 703 data = ocrdma_tx_stats(dev); ocrdma_dbgfs_ops_read() 706 data = ocrdma_db_errstats(dev); ocrdma_dbgfs_ops_read() 709 data = ocrdma_rxqp_errstats(dev); ocrdma_dbgfs_ops_read() 712 data = ocrdma_txqp_errstats(dev); ocrdma_dbgfs_ops_read() 715 data = ocrdma_tx_dbg_stats(dev); ocrdma_dbgfs_ops_read() 718 data = ocrdma_rx_dbg_stats(dev); ocrdma_dbgfs_ops_read() 721 data = ocrdma_driver_dbg_stats(dev); ocrdma_dbgfs_ops_read() 737 mutex_unlock(&dev->stats_lock); ocrdma_dbgfs_ops_read() 748 void ocrdma_add_port_stats(struct ocrdma_dev dev) ocrdma_add_port_stats() argument 754 dev->dir = debugfs_create_dir(dev->ibdev.name, ocrdma_dbgfs_dir); ocrdma_add_port_stats() 755 if (!dev->dir) ocrdma_add_port_stats() 758 dev->rsrc_stats.type = OCRDMA_RSRC_STATS; ocrdma_add_port_stats() 759 dev->rsrc_stats.dev = dev; ocrdma_add_port_stats() 760 if (!debugfs_create_file("resource_stats", S_IRUSR, dev->dir, ocrdma_add_port_stats() 761 &dev->rsrc_stats, &ocrdma_dbg_ops)) ocrdma_add_port_stats() 764 dev->rx_stats.type = OCRDMA_RXSTATS; ocrdma_add_port_stats() 765 dev->rx_stats.dev = dev; ocrdma_add_port_stats() 766 if (!debugfs_create_file("rx_stats", S_IRUSR, dev->dir, ocrdma_add_port_stats() 767 &dev->rx_stats, &ocrdma_dbg_ops)) ocrdma_add_port_stats() 770 dev->wqe_stats.type = OCRDMA_WQESTATS; ocrdma_add_port_stats() 771 dev->wqe_stats.dev = dev; ocrdma_add_port_stats() 772 if (!debugfs_create_file("wqe_stats", S_IRUSR, dev->dir, ocrdma_add_port_stats() 773 &dev->wqe_stats, &ocrdma_dbg_ops)) ocrdma_add_port_stats() 776 dev->tx_stats.type = OCRDMA_TXSTATS; ocrdma_add_port_stats() 777 dev->tx_stats.dev = dev; ocrdma_add_port_stats() 778 if (!debugfs_create_file("tx_stats", S_IRUSR, dev->dir, ocrdma_add_port_stats() 779 &dev->tx_stats, &ocrdma_dbg_ops)) ocrdma_add_port_stats() 782 dev->db_err_stats.type = OCRDMA_DB_ERRSTATS; ocrdma_add_port_stats() 783 dev->db_err_stats.dev = dev; ocrdma_add_port_stats() 784 if (!debugfs_create_file("db_err_stats", S_IRUSR, dev->dir, ocrdma_add_port_stats() 785 &dev->db_err_stats, &ocrdma_dbg_ops)) ocrdma_add_port_stats() 789 dev->tx_qp_err_stats.type = OCRDMA_TXQP_ERRSTATS; ocrdma_add_port_stats() 790 dev->tx_qp_err_stats.dev = dev; ocrdma_add_port_stats() 791 if (!debugfs_create_file("tx_qp_err_stats", S_IRUSR, dev->dir, ocrdma_add_port_stats() 792 &dev->tx_qp_err_stats, &ocrdma_dbg_ops)) ocrdma_add_port_stats() 795 dev->rx_qp_err_stats.type = OCRDMA_RXQP_ERRSTATS; ocrdma_add_port_stats() 796 dev->rx_qp_err_stats.dev = dev; ocrdma_add_port_stats() 797 if (!debugfs_create_file("rx_qp_err_stats", S_IRUSR, dev->dir, ocrdma_add_port_stats() 798 &dev->rx_qp_err_stats, &ocrdma_dbg_ops)) ocrdma_add_port_stats() 802 dev->tx_dbg_stats.type = OCRDMA_TX_DBG_STATS; ocrdma_add_port_stats() 803 dev->tx_dbg_stats.dev = dev; ocrdma_add_port_stats() 804 if (!debugfs_create_file("tx_dbg_stats", S_IRUSR, dev->dir, ocrdma_add_port_stats() 805 &dev->tx_dbg_stats, &ocrdma_dbg_ops)) ocrdma_add_port_stats() 808 dev->rx_dbg_stats.type = OCRDMA_RX_DBG_STATS; ocrdma_add_port_stats() 809 dev->rx_dbg_stats.dev = dev; ocrdma_add_port_stats() 810 if (!debugfs_create_file("rx_dbg_stats", S_IRUSR, dev->dir, ocrdma_add_port_stats() 811 &dev->rx_dbg_stats, &ocrdma_dbg_ops)) ocrdma_add_port_stats() 814 dev->driver_stats.type = OCRDMA_DRV_STATS; ocrdma_add_port_stats() 815 dev->driver_stats.dev = dev; ocrdma_add_port_stats() 816 if (!debugfs_create_file("driver_dbg_stats", S_IRUSR, dev->dir, ocrdma_add_port_stats() 817 &dev->driver_stats, &ocrdma_dbg_ops)) ocrdma_add_port_stats() 820 dev->reset_stats.type = OCRDMA_RESET_STATS; ocrdma_add_port_stats() 821 dev->reset_stats.dev = dev; ocrdma_add_port_stats() 822 if (!debugfs_create_file("reset_stats", S_IRUSR, dev->dir, ocrdma_add_port_stats() 823 &dev->reset_stats, &ocrdma_dbg_ops)) ocrdma_add_port_stats() 827 if (!ocrdma_alloc_stats_mem(dev)) ocrdma_add_port_stats() 830 mutex_init(&dev->stats_lock); ocrdma_add_port_stats() 834 ocrdma_release_stats_mem(dev); ocrdma_add_port_stats() 835 debugfs_remove_recursive(dev->dir); ocrdma_add_port_stats() 836 dev->dir = NULL; ocrdma_add_port_stats() 839 void ocrdma_rem_port_stats(struct ocrdma_dev dev) ocrdma_rem_port_stats() argument 841 if (!dev->dir) ocrdma_rem_port_stats() 843 mutex_destroy(&dev->stats_lock); ocrdma_rem_port_stats() 844 ocrdma_release_stats_mem(dev); ocrdma_rem_port_stats() 845 debugfs_remove(dev->dir); ocrdma_rem_port_stats()
/linux-4.1.27/drivers/net/wireless/rtl818x/rtl8180/
H A D	grf5101.c	36 static void write_grf5101(struct ieee80211_hw dev, u8 addr, u32 data) write_grf5101() argument 38 struct rtl8180_priv priv = dev->priv; write_grf5101() 57 static void grf5101_write_phy_antenna(struct ieee80211_hw dev, short chan) grf5101_write_phy_antenna() argument 59 struct rtl8180_priv priv = dev->priv; grf5101_write_phy_antenna() 68 rtl8180_write_phy(dev, 0x10, ant); grf5101_write_phy_antenna() 80 static void grf5101_rf_set_channel(struct ieee80211_hw dev, grf5101_rf_set_channel() argument 83 struct rtl8180_priv priv = dev->priv; grf5101_rf_set_channel() 90 write_grf5101(dev, 0x15, 0x0); grf5101_rf_set_channel() 91 write_grf5101(dev, 0x06, txpw); grf5101_rf_set_channel() 92 write_grf5101(dev, 0x15, 0x10); grf5101_rf_set_channel() 93 write_grf5101(dev, 0x15, 0x0); grf5101_rf_set_channel() 96 write_grf5101(dev, 0x07, 0x0); grf5101_rf_set_channel() 97 write_grf5101(dev, 0x0B, chan); grf5101_rf_set_channel() 98 write_grf5101(dev, 0x07, 0x1000); grf5101_rf_set_channel() 100 grf5101_write_phy_antenna(dev, channel); grf5101_rf_set_channel() 103 static void grf5101_rf_stop(struct ieee80211_hw dev) grf5101_rf_stop() argument 105 struct rtl8180_priv priv = dev->priv; grf5101_rf_stop() 113 write_grf5101(dev, 0x07, 0x0); grf5101_rf_stop() 114 write_grf5101(dev, 0x1f, 0x45); grf5101_rf_stop() 115 write_grf5101(dev, 0x1f, 0x5); grf5101_rf_stop() 116 write_grf5101(dev, 0x00, 0x8e4); grf5101_rf_stop() 119 static void grf5101_rf_init(struct ieee80211_hw dev) grf5101_rf_init() argument 121 struct rtl8180_priv priv = dev->priv; grf5101_rf_init() 125 write_grf5101(dev, 0x1f, 0x0); grf5101_rf_init() 126 write_grf5101(dev, 0x1f, 0x0); grf5101_rf_init() 127 write_grf5101(dev, 0x1f, 0x40); grf5101_rf_init() 128 write_grf5101(dev, 0x1f, 0x60); grf5101_rf_init() 129 write_grf5101(dev, 0x1f, 0x61); grf5101_rf_init() 130 write_grf5101(dev, 0x1f, 0x61); grf5101_rf_init() 131 write_grf5101(dev, 0x00, 0xae4); grf5101_rf_init() 132 write_grf5101(dev, 0x1f, 0x1); grf5101_rf_init() 133 write_grf5101(dev, 0x1f, 0x41); grf5101_rf_init() 134 write_grf5101(dev, 0x1f, 0x61); grf5101_rf_init() 136 write_grf5101(dev, 0x01, 0x1a23); grf5101_rf_init() 137 write_grf5101(dev, 0x02, 0x4971); grf5101_rf_init() 138 write_grf5101(dev, 0x03, 0x41de); grf5101_rf_init() 139 write_grf5101(dev, 0x04, 0x2d80); grf5101_rf_init() 140 write_grf5101(dev, 0x05, 0x68ff); /* 0x61ff original value / grf5101_rf_init() 141 write_grf5101(dev, 0x06, 0x0); grf5101_rf_init() 142 write_grf5101(dev, 0x07, 0x0); grf5101_rf_init() 143 write_grf5101(dev, 0x08, 0x7533); grf5101_rf_init() 144 write_grf5101(dev, 0x09, 0xc401); grf5101_rf_init() 145 write_grf5101(dev, 0x0a, 0x0); grf5101_rf_init() 146 write_grf5101(dev, 0x0c, 0x1c7); grf5101_rf_init() 147 write_grf5101(dev, 0x0d, 0x29d3); grf5101_rf_init() 148 write_grf5101(dev, 0x0e, 0x2e8); grf5101_rf_init() 149 write_grf5101(dev, 0x10, 0x192); grf5101_rf_init() 150 write_grf5101(dev, 0x11, 0x248); grf5101_rf_init() 151 write_grf5101(dev, 0x12, 0x0); grf5101_rf_init() 152 write_grf5101(dev, 0x13, 0x20c4); grf5101_rf_init() 153 write_grf5101(dev, 0x14, 0xf4fc); grf5101_rf_init() 154 write_grf5101(dev, 0x15, 0x0); grf5101_rf_init() 155 write_grf5101(dev, 0x16, 0x1500); grf5101_rf_init() 157 write_grf5101(dev, 0x07, 0x1000); grf5101_rf_init() 160 rtl8180_write_phy(dev, 0, 0xa8); grf5101_rf_init() 161 rtl8180_write_phy(dev, 3, 0x0); grf5101_rf_init() 162 rtl8180_write_phy(dev, 4, 0xc0); grf5101_rf_init() 163 rtl8180_write_phy(dev, 5, 0x90); grf5101_rf_init() 164 rtl8180_write_phy(dev, 6, 0x1e); grf5101_rf_init() 165 rtl8180_write_phy(dev, 7, 0x64); grf5101_rf_init() 167 grf5101_write_phy_antenna(dev, 1); grf5101_rf_init() 169 rtl8180_write_phy(dev, 0x11, 0x88); grf5101_rf_init() 173 rtl8180_write_phy(dev, 0x12, 0xc0); / enable ant diversity / grf5101_rf_init() 175 rtl8180_write_phy(dev, 0x12, 0x40); / disable ant diversity */ grf5101_rf_init() 177 rtl8180_write_phy(dev, 0x13, 0x90 \| priv->csthreshold); grf5101_rf_init() 179 rtl8180_write_phy(dev, 0x19, 0x0); grf5101_rf_init() 180 rtl8180_write_phy(dev, 0x1a, 0xa0); grf5101_rf_init() 181 rtl8180_write_phy(dev, 0x1b, 0x44); grf5101_rf_init()
H A D	rtl8225se.c	120 static void rtl8187se_three_wire_io(struct ieee80211_hw dev, u8 data, rtl8187se_three_wire_io() argument 123 struct rtl8180_priv priv = dev->priv; rtl8187se_three_wire_io() 135 wiphy_err(dev->wiphy, PFX rtl8187se_three_wire_io() 153 wiphy_err(dev->wiphy, PFX rtl8187se_three_wire_io() 177 static u32 rtl8187se_rf_readreg(struct ieee80211_hw dev, u8 addr) rtl8187se_rf_readreg() argument 180 rtl8187se_three_wire_io(dev, (u8 )&dataread, 16, 0); rtl8187se_rf_readreg() 184 static void rtl8187se_rf_writereg(struct ieee80211_hw dev, u8 addr, u32 data) rtl8187se_rf_writereg() argument 187 rtl8187se_three_wire_io(dev, (u8 )&outdata, 16, 1); rtl8187se_rf_writereg() 191 static void rtl8225se_write_zebra_agc(struct ieee80211_hw dev) rtl8225se_write_zebra_agc() argument 196 rtl8225se_write_phy_ofdm(dev, 0xF, ZEBRA_AGC[i]); rtl8225se_write_zebra_agc() 197 rtl8225se_write_phy_ofdm(dev, 0xE, i+0x80); rtl8225se_write_zebra_agc() 198 rtl8225se_write_phy_ofdm(dev, 0xE, 0); rtl8225se_write_zebra_agc() 202 static void rtl8187se_write_ofdm_config(struct ieee80211_hw dev) rtl8187se_write_ofdm_config() argument 208 rtl8225se_write_phy_ofdm(dev, i, OFDM_CONFIG[i]); rtl8187se_write_ofdm_config() 212 static void rtl8225sez2_rf_set_tx_power(struct ieee80211_hw dev, int channel) rtl8225sez2_rf_set_tx_power() argument 214 struct rtl8180_priv priv = dev->priv; rtl8225sez2_rf_set_tx_power() 231 rtl8225se_write_phy_ofdm(dev, 7, 0x5C); rtl8225sez2_rf_set_tx_power() 232 rtl8225se_write_phy_ofdm(dev, 9, 0x5C); rtl8225sez2_rf_set_tx_power() 235 rtl8225se_write_phy_ofdm(dev, 7, 0x54); rtl8225sez2_rf_set_tx_power() 236 rtl8225se_write_phy_ofdm(dev, 9, 0x54); rtl8225sez2_rf_set_tx_power() 238 rtl8225se_write_phy_ofdm(dev, 7, 0x50); rtl8225sez2_rf_set_tx_power() 239 rtl8225se_write_phy_ofdm(dev, 9, 0x50); rtl8225sez2_rf_set_tx_power() 245 static void rtl8187se_write_rf_gain(struct ieee80211_hw dev) rtl8187se_write_rf_gain() argument 250 rtl8187se_rf_writereg(dev, 0x01, i); mdelay(1); rtl8187se_write_rf_gain() 251 rtl8187se_rf_writereg(dev, 0x02, RF_GAIN_TABLE[i]); mdelay(1); rtl8187se_write_rf_gain() 255 static void rtl8187se_write_initial_gain(struct ieee80211_hw dev, rtl8187se_write_initial_gain() argument 260 rtl8225se_write_phy_ofdm(dev, 0x17, 0x26); mdelay(1); rtl8187se_write_initial_gain() 261 rtl8225se_write_phy_ofdm(dev, 0x24, 0x86); mdelay(1); rtl8187se_write_initial_gain() 262 rtl8225se_write_phy_ofdm(dev, 0x05, 0xFA); mdelay(1); rtl8187se_write_initial_gain() 265 rtl8225se_write_phy_ofdm(dev, 0x17, 0x36); mdelay(1); rtl8187se_write_initial_gain() 266 rtl8225se_write_phy_ofdm(dev, 0x24, 0x86); mdelay(1); rtl8187se_write_initial_gain() 267 rtl8225se_write_phy_ofdm(dev, 0x05, 0xFA); mdelay(1); rtl8187se_write_initial_gain() 270 rtl8225se_write_phy_ofdm(dev, 0x17, 0x36); mdelay(1); rtl8187se_write_initial_gain() 271 rtl8225se_write_phy_ofdm(dev, 0x24, 0x86); mdelay(1); rtl8187se_write_initial_gain() 272 rtl8225se_write_phy_ofdm(dev, 0x05, 0xFB); mdelay(1); rtl8187se_write_initial_gain() 275 rtl8225se_write_phy_ofdm(dev, 0x17, 0x46); mdelay(1); rtl8187se_write_initial_gain() 276 rtl8225se_write_phy_ofdm(dev, 0x24, 0x86); mdelay(1); rtl8187se_write_initial_gain() 277 rtl8225se_write_phy_ofdm(dev, 0x05, 0xFB); mdelay(1); rtl8187se_write_initial_gain() 280 rtl8225se_write_phy_ofdm(dev, 0x17, 0x46); mdelay(1); rtl8187se_write_initial_gain() 281 rtl8225se_write_phy_ofdm(dev, 0x24, 0x96); mdelay(1); rtl8187se_write_initial_gain() 282 rtl8225se_write_phy_ofdm(dev, 0x05, 0xFB); mdelay(1); rtl8187se_write_initial_gain() 285 rtl8225se_write_phy_ofdm(dev, 0x17, 0x56); mdelay(1); rtl8187se_write_initial_gain() 286 rtl8225se_write_phy_ofdm(dev, 0x24, 0x96); mdelay(1); rtl8187se_write_initial_gain() 287 rtl8225se_write_phy_ofdm(dev, 0x05, 0xFC); mdelay(1); rtl8187se_write_initial_gain() 290 rtl8225se_write_phy_ofdm(dev, 0x17, 0x56); mdelay(1); rtl8187se_write_initial_gain() 291 rtl8225se_write_phy_ofdm(dev, 0x24, 0xA6); mdelay(1); rtl8187se_write_initial_gain() 292 rtl8225se_write_phy_ofdm(dev, 0x05, 0xFC); mdelay(1); rtl8187se_write_initial_gain() 295 rtl8225se_write_phy_ofdm(dev, 0x17, 0x66); mdelay(1); rtl8187se_write_initial_gain() 296 rtl8225se_write_phy_ofdm(dev, 0x24, 0xB6); mdelay(1); rtl8187se_write_initial_gain() 297 rtl8225se_write_phy_ofdm(dev, 0x05, 0xFC); mdelay(1); rtl8187se_write_initial_gain() 302 void rtl8225se_rf_init(struct ieee80211_hw dev) rtl8225se_rf_init() argument 304 struct rtl8180_priv priv = dev->priv; rtl8225se_rf_init() 310 rtl8187se_rf_writereg(dev, 0x00, 0x013F); mdelay(1); rtl8225se_rf_init() 311 rf23 = rtl8187se_rf_readreg(dev, 0x08); mdelay(1); rtl8225se_rf_init() 312 rf24 = rtl8187se_rf_readreg(dev, 0x09); mdelay(1); rtl8225se_rf_init() 316 wiphy_info(dev->wiphy, "RTL8225-SE version %s\n", rtl8225se_rf_init() 320 rtl8187se_rf_writereg(dev, 0x00, 0x009F); mdelay(1); rtl8225se_rf_init() 321 rtl8187se_rf_writereg(dev, 0x01, 0x06E0); mdelay(1); rtl8225se_rf_init() 322 rtl8187se_rf_writereg(dev, 0x02, 0x004D); mdelay(1); rtl8225se_rf_init() 323 rtl8187se_rf_writereg(dev, 0x03, 0x07F1); mdelay(1); rtl8225se_rf_init() 324 rtl8187se_rf_writereg(dev, 0x04, 0x0975); mdelay(1); rtl8225se_rf_init() 325 rtl8187se_rf_writereg(dev, 0x05, 0x0C72); mdelay(1); rtl8225se_rf_init() 326 rtl8187se_rf_writereg(dev, 0x06, 0x0AE6); mdelay(1); rtl8225se_rf_init() 327 rtl8187se_rf_writereg(dev, 0x07, 0x00CA); mdelay(1); rtl8225se_rf_init() 328 rtl8187se_rf_writereg(dev, 0x08, 0x0E1C); mdelay(1); rtl8225se_rf_init() 329 rtl8187se_rf_writereg(dev, 0x09, 0x02F0); mdelay(1); rtl8225se_rf_init() 330 rtl8187se_rf_writereg(dev, 0x0A, 0x09D0); mdelay(1); rtl8225se_rf_init() 331 rtl8187se_rf_writereg(dev, 0x0B, 0x01BA); mdelay(1); rtl8225se_rf_init() 332 rtl8187se_rf_writereg(dev, 0x0C, 0x0640); mdelay(1); rtl8225se_rf_init() 333 rtl8187se_rf_writereg(dev, 0x0D, 0x08DF); mdelay(1); rtl8225se_rf_init() 334 rtl8187se_rf_writereg(dev, 0x0E, 0x0020); mdelay(1); rtl8225se_rf_init() 335 rtl8187se_rf_writereg(dev, 0x0F, 0x0990); mdelay(1); rtl8225se_rf_init() 337 rtl8187se_rf_writereg(dev, 0x00, 0x013F); mdelay(1); rtl8225se_rf_init() 338 rtl8187se_rf_writereg(dev, 0x03, 0x0806); mdelay(1); rtl8225se_rf_init() 339 rtl8187se_rf_writereg(dev, 0x04, 0x03A7); mdelay(1); rtl8225se_rf_init() 340 rtl8187se_rf_writereg(dev, 0x05, 0x059B); mdelay(1); rtl8225se_rf_init() 341 rtl8187se_rf_writereg(dev, 0x06, 0x0081); mdelay(1); rtl8225se_rf_init() 342 rtl8187se_rf_writereg(dev, 0x07, 0x01A0); mdelay(1); rtl8225se_rf_init() 343 rtl8187se_rf_writereg(dev, 0x0A, 0x0001); mdelay(1); rtl8225se_rf_init() 344 rtl8187se_rf_writereg(dev, 0x0B, 0x0418); mdelay(1); rtl8225se_rf_init() 345 rtl8187se_rf_writereg(dev, 0x0C, 0x0FBE); mdelay(1); rtl8225se_rf_init() 346 rtl8187se_rf_writereg(dev, 0x0D, 0x0008); mdelay(1); rtl8225se_rf_init() 348 rtl8187se_rf_writereg(dev, 0x0E, 0x0807); rtl8225se_rf_init() 350 rtl8187se_rf_writereg(dev, 0x0E, 0x0806); rtl8225se_rf_init() 352 rtl8187se_rf_writereg(dev, 0x0F, 0x0ACC); mdelay(1); rtl8225se_rf_init() 353 rtl8187se_rf_writereg(dev, 0x00, 0x01D7); mdelay(1); rtl8225se_rf_init() 354 rtl8187se_rf_writereg(dev, 0x03, 0x0E00); mdelay(1); rtl8225se_rf_init() 355 rtl8187se_rf_writereg(dev, 0x04, 0x0E50); mdelay(1); rtl8225se_rf_init() 357 rtl8187se_write_rf_gain(dev); rtl8225se_rf_init() 359 rtl8187se_rf_writereg(dev, 0x05, 0x0203); mdelay(1); rtl8225se_rf_init() 360 rtl8187se_rf_writereg(dev, 0x06, 0x0200); mdelay(1); rtl8225se_rf_init() 361 rtl8187se_rf_writereg(dev, 0x00, 0x0137); mdelay(11); rtl8225se_rf_init() 362 rtl8187se_rf_writereg(dev, 0x0D, 0x0008); mdelay(11); rtl8225se_rf_init() 363 rtl8187se_rf_writereg(dev, 0x00, 0x0037); mdelay(11); rtl8225se_rf_init() 364 rtl8187se_rf_writereg(dev, 0x04, 0x0160); mdelay(11); rtl8225se_rf_init() 365 rtl8187se_rf_writereg(dev, 0x07, 0x0080); mdelay(11); rtl8225se_rf_init() 366 rtl8187se_rf_writereg(dev, 0x02, 0x088D); mdelay(221); rtl8225se_rf_init() 367 rtl8187se_rf_writereg(dev, 0x00, 0x0137); mdelay(11); rtl8225se_rf_init() 368 rtl8187se_rf_writereg(dev, 0x07, 0x0000); mdelay(1); rtl8225se_rf_init() 369 rtl8187se_rf_writereg(dev, 0x07, 0x0180); mdelay(1); rtl8225se_rf_init() 370 rtl8187se_rf_writereg(dev, 0x07, 0x0220); mdelay(1); rtl8225se_rf_init() 371 rtl8187se_rf_writereg(dev, 0x07, 0x03E0); mdelay(1); rtl8225se_rf_init() 372 rtl8187se_rf_writereg(dev, 0x06, 0x00C1); mdelay(1); rtl8225se_rf_init() 373 rtl8187se_rf_writereg(dev, 0x0A, 0x0001); mdelay(1); rtl8225se_rf_init() 377 rtl8187se_rf_writereg(dev, 0x0F, tmp); rtl8225se_rf_init() 378 wiphy_info(dev->wiphy, "Xtal cal\n"); rtl8225se_rf_init() 381 wiphy_info(dev->wiphy, "NO Xtal cal\n"); rtl8225se_rf_init() 382 rtl8187se_rf_writereg(dev, 0x0F, 0x0ACC); rtl8225se_rf_init() 386 rtl8187se_rf_writereg(dev, 0x00, 0x00BF); mdelay(1); rtl8225se_rf_init() 387 rtl8187se_rf_writereg(dev, 0x0D, 0x08DF); mdelay(1); rtl8225se_rf_init() 388 rtl8187se_rf_writereg(dev, 0x02, 0x004D); mdelay(1); rtl8225se_rf_init() 389 rtl8187se_rf_writereg(dev, 0x04, 0x0975); mdelay(31); rtl8225se_rf_init() 390 rtl8187se_rf_writereg(dev, 0x00, 0x0197); mdelay(1); rtl8225se_rf_init() 391 rtl8187se_rf_writereg(dev, 0x05, 0x05AB); mdelay(1); rtl8225se_rf_init() 393 rtl8187se_rf_writereg(dev, 0x00, 0x009F); mdelay(1); rtl8225se_rf_init() 394 rtl8187se_rf_writereg(dev, 0x01, 0x0000); mdelay(1); rtl8225se_rf_init() 395 rtl8187se_rf_writereg(dev, 0x02, 0x0000); mdelay(1); rtl8225se_rf_init() 397 / TODO: move to dev.c / rtl8225se_rf_init() 400 rtl8225se_write_phy_cck(dev, 0x00, 0xC8); rtl8225se_rf_init() 401 rtl8225se_write_phy_cck(dev, 0x06, 0x1C); rtl8225se_rf_init() 402 rtl8225se_write_phy_cck(dev, 0x10, 0x78); rtl8225se_rf_init() 403 rtl8225se_write_phy_cck(dev, 0x2E, 0xD0); rtl8225se_rf_init() 404 rtl8225se_write_phy_cck(dev, 0x2F, 0x06); rtl8225se_rf_init() 405 rtl8225se_write_phy_cck(dev, 0x01, 0x46); rtl8225se_rf_init() 412 rtl8225se_write_phy_ofdm(dev, 0x00, 0x12); rtl8225se_rf_init() 414 rtl8225se_write_zebra_agc(dev); rtl8225se_rf_init() 416 rtl8225se_write_phy_ofdm(dev, 0x10, 0x00); rtl8225se_rf_init() 418 rtl8187se_write_ofdm_config(dev); rtl8225se_rf_init() 421 rtl8187se_rf_writereg(dev, 0x00, 0x009F); udelay(500); rtl8225se_rf_init() 422 rtl8187se_rf_writereg(dev, 0x04, 0x0972); udelay(500); rtl8225se_rf_init() 424 rtl8187se_rf_writereg(dev, 0x00, 0x009F); udelay(500); rtl8225se_rf_init() 425 rtl8187se_rf_writereg(dev, 0x04, 0x0972); udelay(500); rtl8225se_rf_init() 427 rtl8225se_write_phy_ofdm(dev, 0x10, 0x40); rtl8225se_rf_init() 428 rtl8225se_write_phy_ofdm(dev, 0x12, 0x40); rtl8225se_rf_init() 430 rtl8187se_write_initial_gain(dev, 4); rtl8225se_rf_init() 433 void rtl8225se_rf_stop(struct ieee80211_hw dev) rtl8225se_rf_stop() argument 436 struct rtl8180_priv priv = dev->priv; rtl8225se_rf_stop() 439 rtl8225se_write_phy_ofdm(dev, 0x10, 0x00); rtl8225se_rf_stop() 440 rtl8225se_write_phy_ofdm(dev, 0x12, 0x00); rtl8225se_rf_stop() 442 rtl8187se_rf_writereg(dev, 0x04, 0x0000); rtl8225se_rf_stop() 443 rtl8187se_rf_writereg(dev, 0x00, 0x0000); rtl8225se_rf_stop() 451 void rtl8225se_rf_set_channel(struct ieee80211_hw dev, rtl8225se_rf_set_channel() argument 457 rtl8225sez2_rf_set_tx_power(dev, chan); rtl8225se_rf_set_channel() 458 rtl8187se_rf_writereg(dev, 0x7, rtl8225se_chan[chan - 1]); rtl8225se_rf_set_channel() 459 if ((rtl8187se_rf_readreg(dev, 0x7) & 0x0F80) != rtl8225se_rf_set_channel() 461 rtl8187se_rf_writereg(dev, 0x7, rtl8225se_chan[chan - 1]); rtl8225se_rf_set_channel() 472 const struct rtl818x_rf_ops rtl8187se_detect_rf(struct ieee80211_hw dev) rtl8187se_detect_rf() argument
H A D	max2820.c	45 static void write_max2820(struct ieee80211_hw dev, u8 addr, u32 data) write_max2820() argument 47 struct rtl8180_priv priv = dev->priv; write_max2820() 62 static void max2820_write_phy_antenna(struct ieee80211_hw dev, short chan) max2820_write_phy_antenna() argument 64 struct rtl8180_priv priv = dev->priv; max2820_write_phy_antenna() 73 rtl8180_write_phy(dev, 0x10, ant); max2820_write_phy_antenna() 92 static void max2820_rf_set_channel(struct ieee80211_hw dev, max2820_rf_set_channel() argument 95 struct rtl8180_priv priv = dev->priv; max2820_rf_set_channel() 104 rtl8180_write_phy(dev, 3, txpw); max2820_rf_set_channel() 106 max2820_write_phy_antenna(dev, channel); max2820_rf_set_channel() 107 write_max2820(dev, 3, chan); max2820_rf_set_channel() 110 static void max2820_rf_stop(struct ieee80211_hw dev) max2820_rf_stop() argument 112 rtl8180_write_phy(dev, 3, 0x8); max2820_rf_stop() 113 write_max2820(dev, 1, 0); max2820_rf_stop() 117 static void max2820_rf_init(struct ieee80211_hw dev) max2820_rf_init() argument 119 struct rtl8180_priv priv = dev->priv; max2820_rf_init() 122 write_max2820(dev, 0, 0x007); / test mode as indicated in datasheet / max2820_rf_init() 123 write_max2820(dev, 1, 0x01e); / enable register / max2820_rf_init() 124 write_max2820(dev, 2, 0x001); / synt register / max2820_rf_init() 126 max2820_rf_set_channel(dev, NULL); max2820_rf_init() 128 write_max2820(dev, 4, 0x313); / rx register / max2820_rf_init() 134 write_max2820(dev, 5, 0x00f); max2820_rf_init() 137 rtl8180_write_phy(dev, 0, 0x88); / sys1 / max2820_rf_init() 138 rtl8180_write_phy(dev, 3, 0x08); / txagc / max2820_rf_init() 139 rtl8180_write_phy(dev, 4, 0xf8); / lnadet / max2820_rf_init() 140 rtl8180_write_phy(dev, 5, 0x90); / ifagcinit / max2820_rf_init() 141 rtl8180_write_phy(dev, 6, 0x1a); / ifagclimit / max2820_rf_init() 142 rtl8180_write_phy(dev, 7, 0x64); / ifagcdet / max2820_rf_init() 144 max2820_write_phy_antenna(dev, 1); max2820_rf_init() 146 rtl8180_write_phy(dev, 0x11, 0x88); / trl / max2820_rf_init() 150 rtl8180_write_phy(dev, 0x12, 0xc7); max2820_rf_init() 152 rtl8180_write_phy(dev, 0x12, 0x47); max2820_rf_init() 154 rtl8180_write_phy(dev, 0x13, 0x9b); max2820_rf_init() 156 rtl8180_write_phy(dev, 0x19, 0x0); / CHESTLIM / max2820_rf_init() 157 rtl8180_write_phy(dev, 0x1a, 0x9f); / CHSQLIM */ max2820_rf_init() 159 max2820_rf_set_channel(dev, NULL); max2820_rf_init()
H A D	sa2400.c	46 static void write_sa2400(struct ieee80211_hw dev, u8 addr, u32 data) write_sa2400() argument 48 struct rtl8180_priv priv = dev->priv; write_sa2400() 63 static void sa2400_write_phy_antenna(struct ieee80211_hw dev, short chan) sa2400_write_phy_antenna() argument 65 struct rtl8180_priv priv = dev->priv; sa2400_write_phy_antenna() 74 rtl8180_write_phy(dev, 0x10, ant); sa2400_write_phy_antenna() 103 static void sa2400_rf_set_channel(struct ieee80211_hw dev, sa2400_rf_set_channel() argument 106 struct rtl8180_priv priv = dev->priv; sa2400_rf_set_channel() 112 write_sa2400(dev, 7, txpw); sa2400_rf_set_channel() 114 sa2400_write_phy_antenna(dev, channel); sa2400_rf_set_channel() 116 write_sa2400(dev, 0, chan); sa2400_rf_set_channel() 117 write_sa2400(dev, 1, 0xbb50); sa2400_rf_set_channel() 118 write_sa2400(dev, 2, 0x80); sa2400_rf_set_channel() 119 write_sa2400(dev, 3, 0); sa2400_rf_set_channel() 122 static void sa2400_rf_stop(struct ieee80211_hw dev) sa2400_rf_stop() argument 124 write_sa2400(dev, 4, 0); sa2400_rf_stop() 127 static void sa2400_rf_init(struct ieee80211_hw dev) sa2400_rf_init() argument 129 struct rtl8180_priv priv = dev->priv; sa2400_rf_init() 150 write_sa2400(dev, 0, sa2400_chan[0]); sa2400_rf_init() 151 write_sa2400(dev, 1, 0xbb50); sa2400_rf_init() 152 write_sa2400(dev, 2, 0x80); sa2400_rf_init() 153 write_sa2400(dev, 3, 0); sa2400_rf_init() 154 write_sa2400(dev, 4, 0x19340 \| firdac); sa2400_rf_init() 155 write_sa2400(dev, 5, 0x1dfb \| (SA2400_MAX_SENS - 54) << 15); sa2400_rf_init() 156 write_sa2400(dev, 4, 0x19348 \| firdac); / calibrate VCO / sa2400_rf_init() 159 write_sa2400(dev, 4, 0x1938c); /???/ sa2400_rf_init() 161 write_sa2400(dev, 4, 0x19340 \| firdac); sa2400_rf_init() 163 write_sa2400(dev, 0, sa2400_chan[0]); sa2400_rf_init() 164 write_sa2400(dev, 1, 0xbb50); sa2400_rf_init() 165 write_sa2400(dev, 2, 0x80); sa2400_rf_init() 166 write_sa2400(dev, 3, 0); sa2400_rf_init() 167 write_sa2400(dev, 4, 0x19344 \| firdac); / calibrate filter / sa2400_rf_init() 170 write_sa2400(dev, 6, 0x13ff \| (1 << 23)); / MANRX / sa2400_rf_init() 171 write_sa2400(dev, 8, 0); / VCO / sa2400_rf_init() 181 write_sa2400(dev, 4, 0x19341); / calibrates DC / sa2400_rf_init() 185 write_sa2400(dev, 4, 0x19345); sa2400_rf_init() 196 write_sa2400(dev, 4, 0x19341 \| firdac); / RTX MODE / sa2400_rf_init() 199 rtl8180_write_phy(dev, 0, 0x98); sa2400_rf_init() 200 rtl8180_write_phy(dev, 3, 0x38); sa2400_rf_init() 201 rtl8180_write_phy(dev, 4, 0xe0); sa2400_rf_init() 202 rtl8180_write_phy(dev, 5, 0x90); sa2400_rf_init() 203 rtl8180_write_phy(dev, 6, 0x1a); sa2400_rf_init() 204 rtl8180_write_phy(dev, 7, 0x64); sa2400_rf_init() 206 sa2400_write_phy_antenna(dev, 1); sa2400_rf_init() 208 rtl8180_write_phy(dev, 0x11, 0x80); sa2400_rf_init() 212 rtl8180_write_phy(dev, 0x12, 0xc7); / enable ant diversity / sa2400_rf_init() 214 rtl8180_write_phy(dev, 0x12, 0x47); / disable ant diversity */ sa2400_rf_init() 216 rtl8180_write_phy(dev, 0x13, 0x90 \| priv->csthreshold); sa2400_rf_init() 218 rtl8180_write_phy(dev, 0x19, 0x0); sa2400_rf_init() 219 rtl8180_write_phy(dev, 0x1a, 0xa0); sa2400_rf_init()
/linux-4.1.27/arch/alpha/include/asm/
H A D	dma-mapping.h	8 static inline struct dma_map_ops get_dma_ops(struct device dev) get_dma_ops() argument 17 static inline void dma_alloc_attrs(struct device dev, size_t size, dma_alloc_attrs() argument 21 return get_dma_ops(dev)->alloc(dev, size, dma_handle, gfp, attrs); dma_alloc_attrs() 26 static inline void dma_free_attrs(struct device dev, size_t size, dma_free_attrs() argument 30 get_dma_ops(dev)->free(dev, size, vaddr, dma_handle, attrs); dma_free_attrs() 33 static inline int dma_mapping_error(struct device dev, dma_addr_t dma_addr) dma_mapping_error() argument 35 return get_dma_ops(dev)->mapping_error(dev, dma_addr); dma_mapping_error() 38 static inline int dma_supported(struct device dev, u64 mask) dma_supported() argument 40 return get_dma_ops(dev)->dma_supported(dev, mask); dma_supported() 43 static inline int dma_set_mask(struct device dev, u64 mask) dma_set_mask() argument 45 return get_dma_ops(dev)->set_dma_mask(dev, mask); dma_set_mask() 51 #define dma_cache_sync(dev, va, size, dir) ((void)0)
/linux-4.1.27/drivers/gpio/
H A D	gpio-adp5520.c	27 struct adp5520_gpio dev; adp5520_gpio_get_value() local 30 dev = container_of(chip, struct adp5520_gpio, gpio_chip); adp5520_gpio_get_value() 37 if (test_bit(off, &dev->output)) adp5520_gpio_get_value() 38 adp5520_read(dev->master, ADP5520_GPIO_OUT, &reg_val); adp5520_gpio_get_value() 40 adp5520_read(dev->master, ADP5520_GPIO_IN, &reg_val); adp5520_gpio_get_value() 42 return !!(reg_val & dev->lut[off]); adp5520_gpio_get_value() 48 struct adp5520_gpio dev; adp5520_gpio_set_value() local 49 dev = container_of(chip, struct adp5520_gpio, gpio_chip); adp5520_gpio_set_value() 52 adp5520_set_bits(dev->master, ADP5520_GPIO_OUT, dev->lut[off]); adp5520_gpio_set_value() 54 adp5520_clr_bits(dev->master, ADP5520_GPIO_OUT, dev->lut[off]); adp5520_gpio_set_value() 59 struct adp5520_gpio dev; adp5520_gpio_direction_input() local 60 dev = container_of(chip, struct adp5520_gpio, gpio_chip); adp5520_gpio_direction_input() 62 clear_bit(off, &dev->output); adp5520_gpio_direction_input() 64 return adp5520_clr_bits(dev->master, ADP5520_GPIO_CFG_2, adp5520_gpio_direction_input() 65 dev->lut[off]); adp5520_gpio_direction_input() 71 struct adp5520_gpio dev; adp5520_gpio_direction_output() local 73 dev = container_of(chip, struct adp5520_gpio, gpio_chip); adp5520_gpio_direction_output() 75 set_bit(off, &dev->output); adp5520_gpio_direction_output() 78 ret \|= adp5520_set_bits(dev->master, ADP5520_GPIO_OUT, adp5520_gpio_direction_output() 79 dev->lut[off]); adp5520_gpio_direction_output() 81 ret \|= adp5520_clr_bits(dev->master, ADP5520_GPIO_OUT, adp5520_gpio_direction_output() 82 dev->lut[off]); adp5520_gpio_direction_output() 84 ret \|= adp5520_set_bits(dev->master, ADP5520_GPIO_CFG_2, adp5520_gpio_direction_output() 85 dev->lut[off]); adp5520_gpio_direction_output() 92 struct adp5520_gpio_platform_data pdata = dev_get_platdata(&pdev->dev); adp5520_gpio_probe() 93 struct adp5520_gpio dev; adp5520_gpio_probe() local 99 dev_err(&pdev->dev, "missing platform data\n"); adp5520_gpio_probe() 104 dev_err(&pdev->dev, "only ADP5520 supports GPIO\n"); adp5520_gpio_probe() 108 dev = devm_kzalloc(&pdev->dev, sizeof(dev), GFP_KERNEL); adp5520_gpio_probe() 109 if (dev == NULL) adp5520_gpio_probe() 112 dev->master = pdev->dev.parent; adp5520_gpio_probe() 116 dev->lut[gpios++] = 1 << i; adp5520_gpio_probe() 123 gc = &dev->gpio_chip; adp5520_gpio_probe() 135 ret = adp5520_clr_bits(dev->master, ADP5520_GPIO_CFG_1, adp5520_gpio_probe() 145 ret = adp5520_set_bits(dev->master, ADP5520_LED_CONTROL, adp5520_gpio_probe() 148 ret \|= adp5520_set_bits(dev->master, ADP5520_GPIO_PULLUP, adp5520_gpio_probe() 152 dev_err(&pdev->dev, "failed to write\n"); adp5520_gpio_probe() 156 ret = gpiochip_add(&dev->gpio_chip); adp5520_gpio_probe() 160 platform_set_drvdata(pdev, dev); adp5520_gpio_probe() 169 struct adp5520_gpio dev; adp5520_gpio_remove() local 171 dev = platform_get_drvdata(pdev); adp5520_gpio_remove() 172 gpiochip_remove(&dev->gpio_chip); adp5520_gpio_remove()
H A D	gpio-adp5588.c	51 dev_err(&client->dev, "Read Error\n"); adp5588_gpio_read() 61 dev_err(&client->dev, "Write Error\n"); adp5588_gpio_write() 68 struct adp5588_gpio dev = adp5588_gpio_get_value() local 74 mutex_lock(&dev->lock); adp5588_gpio_get_value() 76 if (dev->dir[bank] & bit) adp5588_gpio_get_value() 77 val = dev->dat_out[bank]; adp5588_gpio_get_value() 79 val = adp5588_gpio_read(dev->client, GPIO_DAT_STAT1 + bank); adp5588_gpio_get_value() 81 mutex_unlock(&dev->lock); adp5588_gpio_get_value() 90 struct adp5588_gpio dev = adp5588_gpio_set_value() local 96 mutex_lock(&dev->lock); adp5588_gpio_set_value() 98 dev->dat_out[bank] \|= bit; adp5588_gpio_set_value() 100 dev->dat_out[bank] &= ~bit; adp5588_gpio_set_value() 102 adp5588_gpio_write(dev->client, GPIO_DAT_OUT1 + bank, adp5588_gpio_set_value() 103 dev->dat_out[bank]); adp5588_gpio_set_value() 104 mutex_unlock(&dev->lock); adp5588_gpio_set_value() 111 struct adp5588_gpio dev = adp5588_gpio_direction_input() local 116 mutex_lock(&dev->lock); adp5588_gpio_direction_input() 117 dev->dir[bank] &= ~ADP5588_BIT(off); adp5588_gpio_direction_input() 118 ret = adp5588_gpio_write(dev->client, GPIO_DIR1 + bank, dev->dir[bank]); adp5588_gpio_direction_input() 119 mutex_unlock(&dev->lock); adp5588_gpio_direction_input() 129 struct adp5588_gpio dev = adp5588_gpio_direction_output() local 135 mutex_lock(&dev->lock); adp5588_gpio_direction_output() 136 dev->dir[bank] \|= bit; adp5588_gpio_direction_output() 139 dev->dat_out[bank] \|= bit; adp5588_gpio_direction_output() 141 dev->dat_out[bank] &= ~bit; adp5588_gpio_direction_output() 143 ret = adp5588_gpio_write(dev->client, GPIO_DAT_OUT1 + bank, adp5588_gpio_direction_output() 144 dev->dat_out[bank]); adp5588_gpio_direction_output() 145 ret \|= adp5588_gpio_write(dev->client, GPIO_DIR1 + bank, adp5588_gpio_direction_output() 146 dev->dir[bank]); adp5588_gpio_direction_output() 147 mutex_unlock(&dev->lock); adp5588_gpio_direction_output() 155 struct adp5588_gpio dev = adp5588_gpio_to_irq() local 157 return dev->irq_base + off; adp5588_gpio_to_irq() 162 struct adp5588_gpio dev = irq_data_get_irq_chip_data(d); adp5588_irq_bus_lock() local 164 mutex_lock(&dev->irq_lock); adp5588_irq_bus_lock() 177 struct adp5588_gpio dev = irq_data_get_irq_chip_data(d); adp5588_irq_bus_sync_unlock() local 181 if (dev->int_en[i] ^ dev->irq_mask[i]) { adp5588_irq_bus_sync_unlock() 182 dev->int_en[i] = dev->irq_mask[i]; adp5588_irq_bus_sync_unlock() 183 adp5588_gpio_write(dev->client, GPIO_INT_EN1 + i, adp5588_irq_bus_sync_unlock() 184 dev->int_en[i]); adp5588_irq_bus_sync_unlock() 187 mutex_unlock(&dev->irq_lock); adp5588_irq_bus_sync_unlock() 192 struct adp5588_gpio dev = irq_data_get_irq_chip_data(d); adp5588_irq_mask() local 193 unsigned gpio = d->irq - dev->irq_base; adp5588_irq_mask() 195 dev->irq_mask[ADP5588_BANK(gpio)] &= ~ADP5588_BIT(gpio); adp5588_irq_mask() 200 struct adp5588_gpio dev = irq_data_get_irq_chip_data(d); adp5588_irq_unmask() local 201 unsigned gpio = d->irq - dev->irq_base; adp5588_irq_unmask() 203 dev->irq_mask[ADP5588_BANK(gpio)] \|= ADP5588_BIT(gpio); adp5588_irq_unmask() 208 struct adp5588_gpio dev = irq_data_get_irq_chip_data(d); adp5588_irq_set_type() local 209 uint16_t gpio = d->irq - dev->irq_base; adp5588_irq_set_type() 213 dev_err(&dev->client->dev, "irq %d: unsupported type %d\n", adp5588_irq_set_type() 222 dev->int_lvl[bank] \|= bit; adp5588_irq_set_type() 224 dev->int_lvl[bank] &= ~bit; adp5588_irq_set_type() 228 adp5588_gpio_direction_input(&dev->gpio_chip, gpio); adp5588_irq_set_type() 229 adp5588_gpio_write(dev->client, GPIO_INT_LVL1 + bank, adp5588_irq_set_type() 230 dev->int_lvl[bank]); adp5588_irq_set_type() 249 dev_err(&client->dev, "Read INT_STAT Error\n"); adp5588_gpio_read_intstat() 256 struct adp5588_gpio dev = devid; adp5588_irq_handler() local 259 status = adp5588_gpio_read(dev->client, INT_STAT); adp5588_irq_handler() 262 ret = adp5588_gpio_read_intstat(dev->client, dev->irq_stat); adp5588_irq_handler() 264 memset(dev->irq_stat, 0, ARRAY_SIZE(dev->irq_stat)); adp5588_irq_handler() 268 pending = dev->irq_stat[bank] & dev->irq_mask[bank]; adp5588_irq_handler() 272 handle_nested_irq(dev->irq_base + adp5588_irq_handler() 282 adp5588_gpio_write(dev->client, INT_STAT, status); / Status is W1C / adp5588_irq_handler() 287 static int adp5588_irq_setup(struct adp5588_gpio dev) adp5588_irq_setup() argument 289 struct i2c_client client = dev->client; adp5588_irq_setup() 291 dev_get_platdata(&client->dev); adp5588_irq_setup() 297 adp5588_gpio_read_intstat(client, dev->irq_stat); / read to clear / adp5588_irq_setup() 299 dev->irq_base = pdata->irq_base; adp5588_irq_setup() 300 mutex_init(&dev->irq_lock); adp5588_irq_setup() 302 for (gpio = 0; gpio < dev->gpio_chip.ngpio; gpio++) { adp5588_irq_setup() 303 int irq = gpio + dev->irq_base; adp5588_irq_setup() 304 irq_set_chip_data(irq, dev); adp5588_irq_setup() 323 dev_name(&client->dev), dev); adp5588_irq_setup() 325 dev_err(&client->dev, "failed to request irq %d\n", adp5588_irq_setup() 330 dev->gpio_chip.to_irq = adp5588_gpio_to_irq; adp5588_irq_setup() 337 dev->irq_base = 0; adp5588_irq_setup() 341 static void adp5588_irq_teardown(struct adp5588_gpio dev) adp5588_irq_teardown() argument 343 if (dev->irq_base) adp5588_irq_teardown() 344 free_irq(dev->client->irq, dev); adp5588_irq_teardown() 348 static int adp5588_irq_setup(struct adp5588_gpio dev) adp5588_irq_setup() argument 350 struct i2c_client client = dev->client; adp5588_irq_setup() 351 dev_warn(&client->dev, "interrupt support not compiled in\n"); adp5588_irq_setup() 356 static void adp5588_irq_teardown(struct adp5588_gpio dev) adp5588_irq_teardown() argument 365 dev_get_platdata(&client->dev); adp5588_gpio_probe() 366 struct adp5588_gpio dev; adp5588_gpio_probe() local 371 dev_err(&client->dev, "missing platform data\n"); adp5588_gpio_probe() 377 dev_err(&client->dev, "SMBUS Byte Data not Supported\n"); adp5588_gpio_probe() 381 dev = devm_kzalloc(&client->dev, sizeof(dev), GFP_KERNEL); adp5588_gpio_probe() 382 if (!dev) adp5588_gpio_probe() 385 dev->client = client; adp5588_gpio_probe() 387 gc = &dev->gpio_chip; adp5588_gpio_probe() 400 mutex_init(&dev->lock); adp5588_gpio_probe() 402 ret = adp5588_gpio_read(dev->client, DEV_ID); adp5588_gpio_probe() 409 dev->dat_out[i] = adp5588_gpio_read(client, GPIO_DAT_OUT1 + i); adp5588_gpio_probe() 410 dev->dir[i] = adp5588_gpio_read(client, GPIO_DIR1 + i); adp5588_gpio_probe() 421 dev_warn(&client->dev, "GPIO int not supported\n"); adp5588_gpio_probe() 423 ret = adp5588_irq_setup(dev); adp5588_gpio_probe() 429 ret = gpiochip_add(&dev->gpio_chip); adp5588_gpio_probe() 433 dev_info(&client->dev, "IRQ Base: %d Rev.: %d\n", adp5588_gpio_probe() 439 dev_warn(&client->dev, "setup failed, %d\n", ret); adp5588_gpio_probe() 442 i2c_set_clientdata(client, dev); adp5588_gpio_probe() 447 adp5588_irq_teardown(dev); adp5588_gpio_probe() 455 dev_get_platdata(&client->dev); adp5588_gpio_remove() 456 struct adp5588_gpio dev = i2c_get_clientdata(client); adp5588_gpio_remove() local 461 dev->gpio_chip.base, dev->gpio_chip.ngpio, adp5588_gpio_remove() 464 dev_err(&client->dev, "teardown failed %d\n", ret); adp5588_gpio_remove() 469 if (dev->irq_base) adp5588_gpio_remove() 470 free_irq(dev->client->irq, dev); adp5588_gpio_remove() 472 gpiochip_remove(&dev->gpio_chip); adp5588_gpio_remove()
/linux-4.1.27/drivers/base/
H A D	isa.c	18 struct device dev; member in struct:isa_dev 23 #define to_isa_dev(x) container_of((x), struct isa_dev, dev) 25 static int isa_bus_match(struct device dev, struct device_driver driver) isa_bus_match() argument 29 if (dev->platform_data == isa_driver) { isa_bus_match() 31 isa_driver->match(dev, to_isa_dev(dev)->id)) isa_bus_match() 33 dev->platform_data = NULL; isa_bus_match() 38 static int isa_bus_probe(struct device dev) isa_bus_probe() argument 40 struct isa_driver isa_driver = dev->platform_data; isa_bus_probe() 43 return isa_driver->probe(dev, to_isa_dev(dev)->id); isa_bus_probe() 48 static int isa_bus_remove(struct device dev) isa_bus_remove() argument 50 struct isa_driver isa_driver = dev->platform_data; isa_bus_remove() 53 return isa_driver->remove(dev, to_isa_dev(dev)->id); isa_bus_remove() 58 static void isa_bus_shutdown(struct device dev) isa_bus_shutdown() argument 60 struct isa_driver isa_driver = dev->platform_data; isa_bus_shutdown() 63 isa_driver->shutdown(dev, to_isa_dev(dev)->id); isa_bus_shutdown() 66 static int isa_bus_suspend(struct device dev, pm_message_t state) isa_bus_suspend() argument 68 struct isa_driver isa_driver = dev->platform_data; isa_bus_suspend() 71 return isa_driver->suspend(dev, to_isa_dev(dev)->id, state); isa_bus_suspend() 76 static int isa_bus_resume(struct device dev) isa_bus_resume() argument 78 struct isa_driver isa_driver = dev->platform_data; isa_bus_resume() 81 return isa_driver->resume(dev, to_isa_dev(dev)->id); isa_bus_resume() 96 static void isa_dev_release(struct device dev) isa_dev_release() argument 98 kfree(to_isa_dev(dev)); isa_dev_release() 103 struct device dev = isa_driver->devices; isa_unregister_driver() local 105 while (dev) { isa_unregister_driver() 106 struct device *tmp = to_isa_dev(dev)->next; isa_unregister_driver() 107 device_unregister(dev); isa_unregister_driver() 108 dev = tmp; isa_unregister_driver() 135 isa_dev->dev.parent = &isa_bus; isa_register_driver() 136 isa_dev->dev.bus = &isa_bus_type; isa_register_driver() 138 dev_set_name(&isa_dev->dev, "%s.%u", isa_register_driver() 140 isa_dev->dev.platform_data = isa_driver; isa_register_driver() 141 isa_dev->dev.release = isa_dev_release; isa_register_driver() 144 isa_dev->dev.coherent_dma_mask = DMA_BIT_MASK(24); isa_register_driver() 145 isa_dev->dev.dma_mask = &isa_dev->dev.coherent_dma_mask; isa_register_driver() 147 error = device_register(&isa_dev->dev); isa_register_driver() 149 put_device(&isa_dev->dev); isa_register_driver() 153 if (isa_dev->dev.platform_data) { isa_register_driver() 155 isa_driver->devices = &isa_dev->dev; isa_register_driver() 157 device_unregister(&isa_dev->dev); isa_register_driver()
H A D	pinctrl.c	20 * @dev: the device that is just about to probe 22 int pinctrl_bind_pins(struct device dev) pinctrl_bind_pins() argument 26 dev->pins = devm_kzalloc(dev, sizeof((dev->pins)), GFP_KERNEL); pinctrl_bind_pins() 27 if (!dev->pins) pinctrl_bind_pins() 30 dev->pins->p = devm_pinctrl_get(dev); pinctrl_bind_pins() 31 if (IS_ERR(dev->pins->p)) { pinctrl_bind_pins() 32 dev_dbg(dev, "no pinctrl handle\n"); pinctrl_bind_pins() 33 ret = PTR_ERR(dev->pins->p); pinctrl_bind_pins() 37 dev->pins->default_state = pinctrl_lookup_state(dev->pins->p, pinctrl_bind_pins() 39 if (IS_ERR(dev->pins->default_state)) { pinctrl_bind_pins() 40 dev_dbg(dev, "no default pinctrl state\n"); pinctrl_bind_pins() 45 ret = pinctrl_select_state(dev->pins->p, dev->pins->default_state); pinctrl_bind_pins() 47 dev_dbg(dev, "failed to activate default pinctrl state\n"); pinctrl_bind_pins() 57 dev->pins->sleep_state = pinctrl_lookup_state(dev->pins->p, pinctrl_bind_pins() 59 if (IS_ERR(dev->pins->sleep_state)) pinctrl_bind_pins() 61 dev_dbg(dev, "no sleep pinctrl state\n"); pinctrl_bind_pins() 63 dev->pins->idle_state = pinctrl_lookup_state(dev->pins->p, pinctrl_bind_pins() 65 if (IS_ERR(dev->pins->idle_state)) pinctrl_bind_pins() 67 dev_dbg(dev, "no idle pinctrl state\n"); pinctrl_bind_pins() 78 devm_pinctrl_put(dev->pins->p); pinctrl_bind_pins() 80 devm_kfree(dev, dev->pins); pinctrl_bind_pins() 81 dev->pins = NULL; pinctrl_bind_pins()
H A D	core.c	47 int (platform_notify)(struct device dev) = NULL; 48 int (platform_notify_remove)(struct device dev) = NULL; 76 static inline int device_is_not_partition(struct device dev) device_is_not_partition() argument 78 return !(dev->type == &part_type); device_is_not_partition() 81 static inline int device_is_not_partition(struct device dev) device_is_not_partition() argument 89 * @dev: struct device to get the name of 96 const char dev_driver_string(const struct device dev) dev_driver_string() argument 100 /* dev->driver can change to NULL underneath us because of unbinding, dev_driver_string() 101 * so be careful about accessing it. dev->bus and dev->class should dev_driver_string() 104 drv = ACCESS_ONCE(dev->driver); dev_driver_string() 106 (dev->bus ? dev->bus->name : dev_driver_string() 107 (dev->class ? dev->class->name : "")); dev_driver_string() 117 struct device dev = kobj_to_dev(kobj); dev_attr_show() local 121 ret = dev_attr->show(dev, dev_attr, buf); dev_attr_show() 133 struct device dev = kobj_to_dev(kobj); dev_attr_store() local 137 ret = dev_attr->store(dev, dev_attr, buf, count); dev_attr_store() 148 ssize_t device_store_ulong(struct device dev, device_store_ulong() argument 163 ssize_t device_show_ulong(struct device dev, device_show_ulong() argument 172 ssize_t device_store_int(struct device dev, device_store_int() argument 187 ssize_t device_show_int(struct device dev, device_show_int() argument 197 ssize_t device_store_bool(struct device dev, struct device_attribute attr, device_store_bool() argument 209 ssize_t device_show_bool(struct device dev, struct device_attribute attr, device_show_bool() argument 228 struct device dev = kobj_to_dev(kobj); device_release() local 229 struct device_private p = dev->p; device_release() 240 devres_release_all(dev); device_release() 242 if (dev->release) device_release() 243 dev->release(dev); device_release() 244 else if (dev->type && dev->type->release) device_release() 245 dev->type->release(dev); device_release() 246 else if (dev->class && dev->class->dev_release) device_release() 247 dev->class->dev_release(dev); device_release() 251 dev_name(dev)); device_release() 257 struct device dev = kobj_to_dev(kobj); device_namespace() local 260 if (dev->class && dev->class->ns_type) device_namespace() 261 ns = dev->class->namespace(dev); device_namespace() 278 struct device dev = kobj_to_dev(kobj); dev_uevent_filter() local 279 if (dev->bus) dev_uevent_filter() 281 if (dev->class) dev_uevent_filter() 289 struct device dev = kobj_to_dev(kobj); dev_uevent_name() local 291 if (dev->bus) dev_uevent_name() 292 return dev->bus->name; dev_uevent_name() 293 if (dev->class) dev_uevent_name() 294 return dev->class->name; dev_uevent_name() 301 struct device dev = kobj_to_dev(kobj); dev_uevent() local 305 if (MAJOR(dev->devt)) { dev_uevent() 312 add_uevent_var(env, "MAJOR=%u", MAJOR(dev->devt)); dev_uevent() 313 add_uevent_var(env, "MINOR=%u", MINOR(dev->devt)); dev_uevent() 314 name = device_get_devnode(dev, &mode, &uid, &gid, &tmp); dev_uevent() 327 if (dev->type && dev->type->name) dev_uevent() 328 add_uevent_var(env, "DEVTYPE=%s", dev->type->name); dev_uevent() 330 if (dev->driver) dev_uevent() 331 add_uevent_var(env, "DRIVER=%s", dev->driver->name); dev_uevent() 334 of_device_uevent(dev, env); dev_uevent() 337 if (dev->bus && dev->bus->uevent) { dev_uevent() 338 retval = dev->bus->uevent(dev, env); dev_uevent() 341 dev_name(dev), __func__, retval); dev_uevent() 345 if (dev->class && dev->class->dev_uevent) { dev_uevent() 346 retval = dev->class->dev_uevent(dev, env); dev_uevent() 349 "returned %d\n", dev_name(dev), dev_uevent() 354 if (dev->type && dev->type->uevent) { dev_uevent() 355 retval = dev->type->uevent(dev, env); dev_uevent() 358 "returned %d\n", dev_name(dev), dev_uevent() 371 static ssize_t uevent_show(struct device dev, struct device_attribute attr, uevent_show() argument 382 top_kobj = &dev->kobj; uevent_show() 394 if (!kset->uevent_ops->filter(kset, &dev->kobj)) uevent_show() 402 retval = kset->uevent_ops->uevent(kset, &dev->kobj, env); uevent_show() 414 static ssize_t uevent_store(struct device dev, struct device_attribute attr, uevent_store() argument 420 kobject_uevent(&dev->kobj, action); uevent_store() 422 dev_err(dev, "uevent: unknown action-string\n"); uevent_store() 427 static ssize_t online_show(struct device dev, struct device_attribute attr, online_show() argument 432 device_lock(dev); online_show() 433 val = !dev->offline; online_show() 434 device_unlock(dev); online_show() 438 static ssize_t online_store(struct device dev, struct device_attribute attr, online_store() argument 452 ret = val ? device_online(dev) : device_offline(dev); online_store() 458 int device_add_groups(struct device dev, const struct attribute_group groups) device_add_groups() argument 460 return sysfs_create_groups(&dev->kobj, groups); device_add_groups() 463 void device_remove_groups(struct device dev, device_remove_groups() argument 466 sysfs_remove_groups(&dev->kobj, groups); device_remove_groups() 469 static int device_add_attrs(struct device dev) device_add_attrs() argument 471 struct class class = dev->class; device_add_attrs() 472 const struct device_type type = dev->type; device_add_attrs() 476 error = device_add_groups(dev, class->dev_groups); device_add_attrs() 482 error = device_add_groups(dev, type->groups); device_add_attrs() 487 error = device_add_groups(dev, dev->groups); device_add_attrs() 491 if (device_supports_offline(dev) && !dev->offline_disabled) { device_add_attrs() 492 error = device_create_file(dev, &dev_attr_online); device_add_attrs() 500 device_remove_groups(dev, dev->groups); device_add_attrs() 503 device_remove_groups(dev, type->groups); device_add_attrs() 506 device_remove_groups(dev, class->dev_groups); device_add_attrs() 511 static void device_remove_attrs(struct device dev) device_remove_attrs() argument 513 struct class class = dev->class; device_remove_attrs() 514 const struct device_type type = dev->type; device_remove_attrs() 516 device_remove_file(dev, &dev_attr_online); device_remove_attrs() 517 device_remove_groups(dev, dev->groups); device_remove_attrs() 520 device_remove_groups(dev, type->groups); device_remove_attrs() 523 device_remove_groups(dev, class->dev_groups); device_remove_attrs() 526 static ssize_t dev_show(struct device dev, struct device_attribute attr, dev_show() argument 529 return print_dev_t(buf, dev->devt); dev_show() 531 static DEVICE_ATTR_RO(dev); 538 * @dev: device. 541 int device_create_file(struct device dev, device_create_file() argument 546 if (dev) { device_create_file() 553 error = sysfs_create_file(&dev->kobj, &attr->attr); device_create_file() 562 @dev: device. 565 void device_remove_file(struct device dev, device_remove_file() argument 568 if (dev) device_remove_file() 569 sysfs_remove_file(&dev->kobj, &attr->attr); device_remove_file() 575 @dev: device. 580 bool device_remove_file_self(struct device dev, device_remove_file_self() argument 583 if (dev) device_remove_file_self() 584 return sysfs_remove_file_self(&dev->kobj, &attr->attr); device_remove_file_self() 592 @dev: device. 595 int device_create_bin_file(struct device dev, device_create_bin_file() argument 599 if (dev) device_create_bin_file() 600 error = sysfs_create_bin_file(&dev->kobj, attr); device_create_bin_file() 607 @dev: device. 610 void device_remove_bin_file(struct device dev, device_remove_bin_file() argument 613 if (dev) device_remove_bin_file() 614 sysfs_remove_bin_file(&dev->kobj, attr); device_remove_bin_file() 621 struct device dev = p->device; klist_children_get() local 623 get_device(dev); klist_children_get() 629 struct device dev = p->device; klist_children_put() local 631 put_device(dev); klist_children_put() 636 @dev: device. 642 * may use @dev's fields. In particular, get_device()/put_device() 643 * may be used for reference counting of @dev after calling this 646 * All fields in @dev must be initialized by the caller to 0, except 649 * @dev. 652 * @dev directly once you have called this function. 654 void device_initialize(struct device dev) device_initialize() argument 656 dev->kobj.kset = devices_kset; device_initialize() 657 kobject_init(&dev->kobj, &device_ktype); device_initialize() 658 INIT_LIST_HEAD(&dev->dma_pools); device_initialize() 659 mutex_init(&dev->mutex); device_initialize() 660 lockdep_set_novalidate_class(&dev->mutex); device_initialize() 661 spin_lock_init(&dev->devres_lock); device_initialize() 662 INIT_LIST_HEAD(&dev->devres_head); device_initialize() 663 device_pm_init(dev); device_initialize() 664 set_dev_node(dev, -1); device_initialize() 668 struct kobject virtual_device_parent(struct device dev) virtual_device_parent() argument 730 static struct kobject get_device_parent(struct device dev, get_device_parent() argument 733 if (dev->class) { get_device_parent() 740 if (sysfs_deprecated && dev->class == &block_class) { get_device_parent() 753 parent_kobj = virtual_device_parent(dev); get_device_parent() 754 else if (parent->class && !dev->class->ns_type) get_device_parent() 762 spin_lock(&dev->class->p->glue_dirs.list_lock); get_device_parent() 763 list_for_each_entry(k, &dev->class->p->glue_dirs.list, entry) get_device_parent() 768 spin_unlock(&dev->class->p->glue_dirs.list_lock); get_device_parent() 775 k = class_dir_create_and_add(dev->class, parent_kobj); get_device_parent() 782 if (!parent && dev->bus && dev->bus->dev_root) get_device_parent() 783 return &dev->bus->dev_root->kobj; get_device_parent() 790 static void cleanup_glue_dir(struct device dev, struct kobject glue_dir) cleanup_glue_dir() argument 793 if (!glue_dir \|\| !dev->class \|\| cleanup_glue_dir() 794 glue_dir->kset != &dev->class->p->glue_dirs) cleanup_glue_dir() 802 static void cleanup_device_parent(struct device dev) cleanup_device_parent() argument 804 cleanup_glue_dir(dev, dev->kobj.parent); cleanup_device_parent() 807 static int device_add_class_symlinks(struct device dev) device_add_class_symlinks() argument 809 struct device_node of_node = dev_of_node(dev); device_add_class_symlinks() 813 error = sysfs_create_link(&dev->kobj, &of_node->kobj,"of_node"); device_add_class_symlinks() 815 dev_warn(dev, "Error %d creating of_node link\n",error); device_add_class_symlinks() 819 if (!dev->class) device_add_class_symlinks() 822 error = sysfs_create_link(&dev->kobj, device_add_class_symlinks() 823 &dev->class->p->subsys.kobj, device_add_class_symlinks() 828 if (dev->parent && device_is_not_partition(dev)) { device_add_class_symlinks() 829 error = sysfs_create_link(&dev->kobj, &dev->parent->kobj, device_add_class_symlinks() 837 if (sysfs_deprecated && dev->class == &block_class) device_add_class_symlinks() 842 error = sysfs_create_link(&dev->class->p->subsys.kobj, device_add_class_symlinks() 843 &dev->kobj, dev_name(dev)); device_add_class_symlinks() 850 sysfs_remove_link(&dev->kobj, "device"); device_add_class_symlinks() 853 sysfs_remove_link(&dev->kobj, "subsystem"); device_add_class_symlinks() 855 sysfs_remove_link(&dev->kobj, "of_node"); device_add_class_symlinks() 859 static void device_remove_class_symlinks(struct device dev) device_remove_class_symlinks() argument 861 if (dev_of_node(dev)) device_remove_class_symlinks() 862 sysfs_remove_link(&dev->kobj, "of_node"); device_remove_class_symlinks() 864 if (!dev->class) device_remove_class_symlinks() 867 if (dev->parent && device_is_not_partition(dev)) device_remove_class_symlinks() 868 sysfs_remove_link(&dev->kobj, "device"); device_remove_class_symlinks() 869 sysfs_remove_link(&dev->kobj, "subsystem"); device_remove_class_symlinks() 871 if (sysfs_deprecated && dev->class == &block_class) device_remove_class_symlinks() 874 sysfs_delete_link(&dev->class->p->subsys.kobj, &dev->kobj, dev_name(dev)); device_remove_class_symlinks() 879 @dev: device 882 int dev_set_name(struct device dev, const char fmt, ...) dev_set_name() argument 888 err = kobject_set_name_vargs(&dev->kobj, fmt, vargs); dev_set_name() 895 * device_to_dev_kobj - select a /sys/dev/ directory for the device 896 * @dev: device 905 static struct kobject device_to_dev_kobj(struct device dev) device_to_dev_kobj() argument 909 if (dev->class) device_to_dev_kobj() 910 kobj = dev->class->dev_kobj; device_to_dev_kobj() 917 static int device_create_sys_dev_entry(struct device dev) device_create_sys_dev_entry() argument 919 struct kobject kobj = device_to_dev_kobj(dev); device_create_sys_dev_entry() 924 format_dev_t(devt_str, dev->devt); device_create_sys_dev_entry() 925 error = sysfs_create_link(kobj, &dev->kobj, devt_str); device_create_sys_dev_entry() 931 static void device_remove_sys_dev_entry(struct device dev) device_remove_sys_dev_entry() argument 933 struct kobject kobj = device_to_dev_kobj(dev); device_remove_sys_dev_entry() 937 format_dev_t(devt_str, dev->devt); device_remove_sys_dev_entry() 942 int device_private_init(struct device dev) device_private_init() argument 944 dev->p = kzalloc(sizeof(dev->p), GFP_KERNEL); device_private_init() 945 if (!dev->p) device_private_init() 947 dev->p->device = dev; device_private_init() 948 klist_init(&dev->p->klist_children, klist_children_get, device_private_init() 950 INIT_LIST_HEAD(&dev->p->deferred_probe); device_private_init() 956 * @dev: device. 961 * This adds @dev to the kobject hierarchy via kobject_add(), adds it 969 * to the previous incarnation of @dev have been dropped.) Allocate 972 * NOTE: _Never_ directly free @dev after calling this function, even 976 int device_add(struct device dev) device_add() argument 983 dev = get_device(dev); device_add() 984 if (!dev) device_add() 987 if (!dev->p) { device_add() 988 error = device_private_init(dev); device_add() 998 if (dev->init_name) { device_add() 999 dev_set_name(dev, "%s", dev->init_name); device_add() 1000 dev->init_name = NULL; device_add() 1004 if (!dev_name(dev) && dev->bus && dev->bus->dev_name) device_add() 1005 dev_set_name(dev, "%s%u", dev->bus->dev_name, dev->id); device_add() 1007 if (!dev_name(dev)) { device_add() 1012 pr_debug("device: '%s': %s\n", dev_name(dev), __func__); device_add() 1014 parent = get_device(dev->parent); device_add() 1015 kobj = get_device_parent(dev, parent); device_add() 1017 dev->kobj.parent = kobj; device_add() 1021 set_dev_node(dev, dev_to_node(parent)); device_add() 1025 error = kobject_add(&dev->kobj, dev->kobj.parent, NULL); device_add() 1031 platform_notify(dev); device_add() 1033 error = device_create_file(dev, &dev_attr_uevent); device_add() 1037 error = device_add_class_symlinks(dev); device_add() 1040 error = device_add_attrs(dev); device_add() 1043 error = bus_add_device(dev); device_add() 1046 error = dpm_sysfs_add(dev); device_add() 1049 device_pm_add(dev); device_add() 1051 if (MAJOR(dev->devt)) { device_add() 1052 error = device_create_file(dev, &dev_attr_dev); device_add() 1056 error = device_create_sys_dev_entry(dev); device_add() 1060 devtmpfs_create_node(dev); device_add() 1066 if (dev->bus) device_add() 1067 blocking_notifier_call_chain(&dev->bus->p->bus_notifier, device_add() 1068 BUS_NOTIFY_ADD_DEVICE, dev); device_add() 1070 kobject_uevent(&dev->kobj, KOBJ_ADD); device_add() 1071 bus_probe_device(dev); device_add() 1073 klist_add_tail(&dev->p->knode_parent, device_add() 1076 if (dev->class) { device_add() 1077 mutex_lock(&dev->class->p->mutex); device_add() 1079 klist_add_tail(&dev->knode_class, device_add() 1080 &dev->class->p->klist_devices); device_add() 1084 &dev->class->p->interfaces, node) device_add() 1086 class_intf->add_dev(dev, class_intf); device_add() 1087 mutex_unlock(&dev->class->p->mutex); device_add() 1090 put_device(dev); device_add() 1093 if (MAJOR(dev->devt)) device_add() 1094 device_remove_file(dev, &dev_attr_dev); device_add() 1096 device_pm_remove(dev); device_add() 1097 dpm_sysfs_remove(dev); device_add() 1099 bus_remove_device(dev); device_add() 1101 device_remove_attrs(dev); device_add() 1103 device_remove_class_symlinks(dev); device_add() 1105 device_remove_file(dev, &dev_attr_uevent); device_add() 1107 kobject_uevent(&dev->kobj, KOBJ_REMOVE); device_add() 1108 kobject_del(&dev->kobj); device_add() 1110 cleanup_device_parent(dev); device_add() 1113 kfree(dev->p); device_add() 1114 dev->p = NULL; device_add() 1121 @dev: pointer to the device structure 1133 * NOTE: _Never_ directly free @dev after calling this function, even 1137 int device_register(struct device dev) device_register() argument 1139 device_initialize(dev); device_register() 1140 return device_add(dev); device_register() 1146 @dev: device. 1152 struct device get_device(struct device dev) get_device() argument 1154 return dev ? kobj_to_dev(kobject_get(&dev->kobj)) : NULL; get_device() 1160 * @dev: device in question. 1162 void put_device(struct device dev) put_device() argument 1165 if (dev) put_device() 1166 kobject_put(&dev->kobj); put_device() 1172 @dev: device. 1183 void device_del(struct device dev) device_del() argument 1185 struct device parent = dev->parent; device_del() 1191 if (dev->bus) device_del() 1192 blocking_notifier_call_chain(&dev->bus->p->bus_notifier, device_del() 1193 BUS_NOTIFY_DEL_DEVICE, dev); device_del() 1194 dpm_sysfs_remove(dev); device_del() 1196 klist_del(&dev->p->knode_parent); device_del() 1197 if (MAJOR(dev->devt)) { device_del() 1198 devtmpfs_delete_node(dev); device_del() 1199 device_remove_sys_dev_entry(dev); device_del() 1200 device_remove_file(dev, &dev_attr_dev); device_del() 1202 if (dev->class) { device_del() 1203 device_remove_class_symlinks(dev); device_del() 1205 mutex_lock(&dev->class->p->mutex); device_del() 1208 &dev->class->p->interfaces, node) device_del() 1210 class_intf->remove_dev(dev, class_intf); device_del() 1212 klist_del(&dev->knode_class); device_del() 1213 mutex_unlock(&dev->class->p->mutex); device_del() 1215 device_remove_file(dev, &dev_attr_uevent); device_del() 1216 device_remove_attrs(dev); device_del() 1217 bus_remove_device(dev); device_del() 1218 device_pm_remove(dev); device_del() 1219 driver_deferred_probe_del(dev); device_del() 1225 platform_notify_remove(dev); device_del() 1226 if (dev->bus) device_del() 1227 blocking_notifier_call_chain(&dev->bus->p->bus_notifier, device_del() 1228 BUS_NOTIFY_REMOVED_DEVICE, dev); device_del() 1229 kobject_uevent(&dev->kobj, KOBJ_REMOVE); device_del() 1230 cleanup_device_parent(dev); device_del() 1231 kobject_del(&dev->kobj); device_del() 1238 * @dev: device going away. 1247 void device_unregister(struct device dev) device_unregister() argument 1249 pr_debug("device: '%s': %s\n", dev_name(dev), __func__); device_unregister() 1250 device_del(dev); device_unregister() 1251 put_device(dev); device_unregister() 1258 struct device dev = NULL; next_device() local 1263 dev = p->device; next_device() 1265 return dev; next_device() 1270 * @dev: device 1281 const char device_get_devnode(struct device dev, device_get_devnode() argument 1290 if (dev->type && dev->type->devnode) device_get_devnode() 1291 tmp = dev->type->devnode(dev, mode, uid, gid); device_get_devnode() 1296 if (dev->class && dev->class->devnode) device_get_devnode() 1297 tmp = dev->class->devnode(dev, mode); device_get_devnode() 1302 if (strchr(dev_name(dev), '!') == NULL) device_get_devnode() 1303 return dev_name(dev); device_get_devnode() 1306 tmp = kstrdup(dev_name(dev), GFP_KERNEL); device_get_devnode() 1327 int (fn)(struct device dev, void data)) device_for_each_child() 1362 int (match)(struct device dev, void data)) device_find_child() 1384 dev_kobj = kobject_create_and_add("dev", NULL); devices_init() 1405 static int device_check_offline(struct device dev, void not_used) device_check_offline() argument 1409 ret = device_for_each_child(dev, NULL, device_check_offline); device_check_offline() 1413 return device_supports_offline(dev) && !dev->offline ? -EBUSY : 0; device_check_offline() 1418 @dev: Device to be put offline. 1427 int device_offline(struct device dev) device_offline() argument 1431 if (dev->offline_disabled) device_offline() 1434 ret = device_for_each_child(dev, NULL, device_check_offline); device_offline() 1438 device_lock(dev); device_offline() 1439 if (device_supports_offline(dev)) { device_offline() 1440 if (dev->offline) { device_offline() 1443 ret = dev->bus->offline(dev); device_offline() 1445 kobject_uevent(&dev->kobj, KOBJ_OFFLINE); device_offline() 1446 dev->offline = true; device_offline() 1450 device_unlock(dev); device_offline() 1457 @dev: Device to be put back online. 1459 * If device_offline() has been successfully executed for @dev, but the device 1465 int device_online(struct device dev) device_online() argument 1469 device_lock(dev); device_online() 1470 if (device_supports_offline(dev)) { device_online() 1471 if (dev->offline) { device_online() 1472 ret = dev->bus->online(dev); device_online() 1474 kobject_uevent(&dev->kobj, KOBJ_ONLINE); device_online() 1475 dev->offline = false; device_online() 1481 device_unlock(dev); device_online() 1487 struct device dev; member in struct:root_device 1493 return container_of(d, struct root_device, dev); to_root_device() 1496 static void root_device_release(struct device dev) root_device_release() argument 1498 kfree(to_root_device(dev)); root_device_release() 1532 err = dev_set_name(&root->dev, "%s", name); __root_device_register() 1538 root->dev.release = root_device_release; __root_device_register() 1540 err = device_register(&root->dev); __root_device_register() 1542 put_device(&root->dev); __root_device_register() 1550 err = sysfs_create_link(&root->dev.kobj, &mk->kobj, "module"); __root_device_register() 1552 device_unregister(&root->dev); __root_device_register() 1559 return &root->dev; __root_device_register() 1565 * @dev: device going away 1570 void root_device_unregister(struct device dev) root_device_unregister() argument 1572 struct root_device root = to_root_device(dev); root_device_unregister() 1575 sysfs_remove_link(&root->dev.kobj, "module"); root_device_unregister() 1577 device_unregister(dev); root_device_unregister() 1582 static void device_create_release(struct device dev) device_create_release() argument 1584 pr_debug("device: '%s': %s\n", dev_name(dev), __func__); device_create_release() 1585 kfree(dev); device_create_release() 1594 struct device dev = NULL; device_create_groups_vargs() local 1600 dev = kzalloc(sizeof(dev), GFP_KERNEL); device_create_groups_vargs() 1601 if (!dev) { device_create_groups_vargs() 1606 device_initialize(dev); device_create_groups_vargs() 1607 dev->devt = devt; device_create_groups_vargs() 1608 dev->class = class; device_create_groups_vargs() 1609 dev->parent = parent; device_create_groups_vargs() 1610 dev->groups = groups; device_create_groups_vargs() 1611 dev->release = device_create_release; device_create_groups_vargs() 1612 dev_set_drvdata(dev, drvdata); device_create_groups_vargs() 1614 retval = kobject_set_name_vargs(&dev->kobj, fmt, args); device_create_groups_vargs() 1618 retval = device_add(dev); device_create_groups_vargs() 1622 return dev; device_create_groups_vargs() 1625 put_device(dev); device_create_groups_vargs() 1641 A "dev" file will be created, showing the dev_t for the device, if 1674 * A "dev" file will be created, showing the dev_t for the device, if 1691 struct device dev; device_create() local 1694 dev = device_create_vargs(class, parent, devt, drvdata, fmt, vargs); device_create() 1696 return dev; device_create() 1714 A "dev" file will be created, showing the dev_t for the device, if 1734 struct device dev; device_create_with_groups() local 1737 dev = device_create_groups_vargs(class, parent, devt, drvdata, groups, device_create_with_groups() 1740 return dev; device_create_with_groups() 1744 static int __match_devt(struct device dev, const void data) __match_devt() argument 1748 return dev->devt == devt; __match_devt() 1761 struct device dev; device_destroy() local 1763 dev = class_find_device(class, NULL, &devt, __match_devt); device_destroy() 1764 if (dev) { device_destroy() 1765 put_device(dev); device_destroy() 1766 device_unregister(dev); device_destroy() 1773 @dev: the pointer to the struct device to be renamed 1810 int device_rename(struct device dev, const char new_name) device_rename() argument 1812 struct kobject kobj = &dev->kobj; device_rename() 1816 dev = get_device(dev); device_rename() 1817 if (!dev) device_rename() 1820 dev_dbg(dev, "renaming to %s\n", new_name); device_rename() 1822 old_device_name = kstrdup(dev_name(dev), GFP_KERNEL); device_rename() 1828 if (dev->class) { device_rename() 1829 error = sysfs_rename_link_ns(&dev->class->p->subsys.kobj, device_rename() 1841 put_device(dev); device_rename() 1849 static int device_move_class_links(struct device dev, device_move_class_links() argument 1856 sysfs_remove_link(&dev->kobj, "device"); device_move_class_links() 1858 error = sysfs_create_link(&dev->kobj, &new_parent->kobj, device_move_class_links() 1865 * @dev: the pointer to the struct device to be moved 1869 int device_move(struct device dev, struct device new_parent, device_move() argument 1876 dev = get_device(dev); device_move() 1877 if (!dev) device_move() 1882 new_parent_kobj = get_device_parent(dev, new_parent); device_move() 1884 pr_debug("device: '%s': %s: moving to '%s'\n", dev_name(dev), device_move() 1886 error = kobject_move(&dev->kobj, new_parent_kobj); device_move() 1888 cleanup_glue_dir(dev, new_parent_kobj); device_move() 1892 old_parent = dev->parent; device_move() 1893 dev->parent = new_parent; device_move() 1895 klist_remove(&dev->p->knode_parent); device_move() 1897 klist_add_tail(&dev->p->knode_parent, device_move() 1899 set_dev_node(dev, dev_to_node(new_parent)); device_move() 1902 if (dev->class) { device_move() 1903 error = device_move_class_links(dev, old_parent, new_parent); device_move() 1906 device_move_class_links(dev, new_parent, old_parent); device_move() 1907 if (!kobject_move(&dev->kobj, &old_parent->kobj)) { device_move() 1909 klist_remove(&dev->p->knode_parent); device_move() 1910 dev->parent = old_parent; device_move() 1912 klist_add_tail(&dev->p->knode_parent, device_move() 1914 set_dev_node(dev, dev_to_node(old_parent)); device_move() 1917 cleanup_glue_dir(dev, new_parent_kobj); device_move() 1926 device_pm_move_after(dev, new_parent); device_move() 1929 device_pm_move_before(new_parent, dev); device_move() 1932 device_pm_move_last(dev); device_move() 1939 put_device(dev); device_move() 1949 struct device dev, parent; device_shutdown() local 1958 dev = list_entry(devices_kset->list.prev, struct device, device_shutdown() 1966 parent = get_device(dev->parent); device_shutdown() 1967 get_device(dev); device_shutdown() 1970 * event that dev->->shutdown() doesn't remove it. device_shutdown() 1972 list_del_init(&dev->kobj.entry); device_shutdown() 1978 device_lock(dev); device_shutdown() 1981 pm_runtime_get_noresume(dev); device_shutdown() 1982 pm_runtime_barrier(dev); device_shutdown() 1984 if (dev->bus && dev->bus->shutdown) { device_shutdown() 1986 dev_info(dev, "shutdown\n"); device_shutdown() 1987 dev->bus->shutdown(dev); device_shutdown() 1988 } else if (dev->driver && dev->driver->shutdown) { device_shutdown() 1990 dev_info(dev, "shutdown\n"); device_shutdown() 1991 dev->driver->shutdown(dev); device_shutdown() 1994 device_unlock(dev); device_shutdown() 1998 put_device(dev); device_shutdown() 2012 create_syslog_header(const struct device dev, char hdr, size_t hdrlen) create_syslog_header() argument 2017 if (dev->class) create_syslog_header() 2018 subsys = dev->class->name; create_syslog_header() 2019 else if (dev->bus) create_syslog_header() 2020 subsys = dev->bus->name; create_syslog_header() 2035 if (MAJOR(dev->devt)) { create_syslog_header() 2045 c, MAJOR(dev->devt), MINOR(dev->devt)); create_syslog_header() 2047 struct net_device net = to_net_dev(dev); create_syslog_header() 2055 "DEVICE=+%s:%s", subsys, dev_name(dev)); create_syslog_header() 2064 dev_WARN(dev, "device/subsystem name too long"); create_syslog_header() 2068 int dev_vprintk_emit(int level, const struct device dev, dev_vprintk_emit() argument 2074 hdrlen = create_syslog_header(dev, hdr, sizeof(hdr)); dev_vprintk_emit() 2080 int dev_printk_emit(int level, const struct device dev, const char fmt, ...) dev_printk_emit() argument 2087 r = dev_vprintk_emit(level, dev, fmt, args); dev_printk_emit() 2095 static void __dev_printk(const char level, const struct device dev, __dev_printk() argument 2098 if (dev) __dev_printk() 2099 dev_printk_emit(level[1] - '0', dev, "%s %s: %pV", __dev_printk() 2100 dev_driver_string(dev), dev_name(dev), vaf); __dev_printk() 2105 void dev_printk(const char level, const struct device dev, dev_printk() argument 2116 __dev_printk(level, dev, &vaf); dev_printk() 2123 void func(const struct device dev, const char fmt, ...) \ 2133 __dev_printk(kern_level, dev, &vaf); \ 2156 @dev: Device to handle. 2162 void set_primary_fwnode(struct device dev, struct fwnode_handle fwnode) set_primary_fwnode() argument 2165 struct fwnode_handle fn = dev->fwnode; set_primary_fwnode() 2171 dev->fwnode = fwnode; set_primary_fwnode() 2173 dev->fwnode = fwnode_is_primary(dev->fwnode) ? set_primary_fwnode() 2174 dev->fwnode->secondary : NULL; set_primary_fwnode() 2181 @dev: Device to handle. 2188 void set_secondary_fwnode(struct device dev, struct fwnode_handle fwnode) set_secondary_fwnode() argument 2193 if (fwnode_is_primary(dev->fwnode)) set_secondary_fwnode() 2194 dev->fwnode->secondary = fwnode; set_secondary_fwnode() 2196 dev->fwnode = fwnode; set_secondary_fwnode() 1326 device_for_each_child(struct device parent, void data, int (fn)(struct device dev, void data)) device_for_each_child() argument 1361 device_find_child(struct device parent, void data, int (match)(struct device dev, void data)) device_find_child() argument
/linux-4.1.27/drivers/media/rc/
H A D	ene_ir.c	50 static void ene_set_reg_addr(struct ene_device dev, u16 reg) ene_set_reg_addr() argument 52 outb(reg >> 8, dev->hw_io + ENE_ADDR_HI); ene_set_reg_addr() 53 outb(reg & 0xFF, dev->hw_io + ENE_ADDR_LO); ene_set_reg_addr() 57 static u8 ene_read_reg(struct ene_device dev, u16 reg) ene_read_reg() argument 60 ene_set_reg_addr(dev, reg); ene_read_reg() 61 retval = inb(dev->hw_io + ENE_IO); ene_read_reg() 67 static void ene_write_reg(struct ene_device dev, u16 reg, u8 value) ene_write_reg() argument 70 ene_set_reg_addr(dev, reg); ene_write_reg() 71 outb(value, dev->hw_io + ENE_IO); ene_write_reg() 75 static void ene_set_reg_mask(struct ene_device dev, u16 reg, u8 mask) ene_set_reg_mask() argument 78 ene_set_reg_addr(dev, reg); ene_set_reg_mask() 79 outb(inb(dev->hw_io + ENE_IO) \| mask, dev->hw_io + ENE_IO); ene_set_reg_mask() 83 static void ene_clear_reg_mask(struct ene_device dev, u16 reg, u8 mask) ene_clear_reg_mask() argument 86 ene_set_reg_addr(dev, reg); ene_clear_reg_mask() 87 outb(inb(dev->hw_io + ENE_IO) & ~mask, dev->hw_io + ENE_IO); ene_clear_reg_mask() 91 static void ene_set_clear_reg_mask(struct ene_device dev, u16 reg, u8 mask, ene_set_clear_reg_mask() argument 95 ene_set_reg_mask(dev, reg, mask); ene_set_clear_reg_mask() 97 ene_clear_reg_mask(dev, reg, mask); ene_set_clear_reg_mask() 101 static int ene_hw_detect(struct ene_device dev) ene_hw_detect() argument 107 ene_clear_reg_mask(dev, ENE_ECSTS, ENE_ECSTS_RSRVD); ene_hw_detect() 108 chip_major = ene_read_reg(dev, ENE_ECVER_MAJOR); ene_hw_detect() 109 chip_minor = ene_read_reg(dev, ENE_ECVER_MINOR); ene_hw_detect() 110 ene_set_reg_mask(dev, ENE_ECSTS, ENE_ECSTS_RSRVD); ene_hw_detect() 112 hw_revision = ene_read_reg(dev, ENE_ECHV); ene_hw_detect() 113 old_ver = ene_read_reg(dev, ENE_HW_VER_OLD); ene_hw_detect() 115 dev->pll_freq = (ene_read_reg(dev, ENE_PLLFRH) << 4) + ene_hw_detect() 116 (ene_read_reg(dev, ENE_PLLFRL) >> 4); ene_hw_detect() 119 dev->rx_period_adjust = ene_hw_detect() 120 dev->pll_freq == ENE_DEFAULT_PLL_FREQ ? 2 : 4; ene_hw_detect() 132 pr_notice("PLL freq = %d\n", dev->pll_freq); ene_hw_detect() 140 dev->hw_revision = ENE_HW_C; ene_hw_detect() 143 dev->hw_revision = ENE_HW_B; ene_hw_detect() 146 dev->hw_revision = ENE_HW_D; ene_hw_detect() 151 if (dev->hw_revision < ENE_HW_C) ene_hw_detect() 154 fw_reg1 = ene_read_reg(dev, ENE_FW1); ene_hw_detect() 155 fw_reg2 = ene_read_reg(dev, ENE_FW2); ene_hw_detect() 159 dev->hw_use_gpio_0a = !!(fw_reg2 & ENE_FW2_GP0A); ene_hw_detect() 160 dev->hw_learning_and_tx_capable = !!(fw_reg2 & ENE_FW2_LEARNING); ene_hw_detect() 161 dev->hw_extra_buffer = !!(fw_reg1 & ENE_FW1_HAS_EXTRA_BUF); ene_hw_detect() 163 if (dev->hw_learning_and_tx_capable) ene_hw_detect() 164 dev->hw_fan_input = !!(fw_reg2 & ENE_FW2_FAN_INPUT); ene_hw_detect() 168 if (dev->hw_learning_and_tx_capable) { ene_hw_detect() 177 dev->hw_use_gpio_0a ? "40" : "0A"); ene_hw_detect() 179 if (dev->hw_fan_input) ene_hw_detect() 183 if (!dev->hw_fan_input) ene_hw_detect() 185 dev->hw_use_gpio_0a ? "0A" : "40"); ene_hw_detect() 187 if (dev->hw_extra_buffer) ene_hw_detect() 193 static void ene_rx_setup_hw_buffer(struct ene_device dev) ene_rx_setup_hw_buffer() argument 197 ene_rx_read_hw_pointer(dev); ene_rx_setup_hw_buffer() 198 dev->r_pointer = dev->w_pointer; ene_rx_setup_hw_buffer() 200 if (!dev->hw_extra_buffer) { ene_rx_setup_hw_buffer() 201 dev->buffer_len = ENE_FW_PACKET_SIZE * 2; ene_rx_setup_hw_buffer() 205 tmp = ene_read_reg(dev, ENE_FW_SAMPLE_BUFFER); ene_rx_setup_hw_buffer() 206 tmp \|= ene_read_reg(dev, ENE_FW_SAMPLE_BUFFER+1) << 8; ene_rx_setup_hw_buffer() 207 dev->extra_buf1_address = tmp; ene_rx_setup_hw_buffer() 209 dev->extra_buf1_len = ene_read_reg(dev, ENE_FW_SAMPLE_BUFFER + 2); ene_rx_setup_hw_buffer() 211 tmp = ene_read_reg(dev, ENE_FW_SAMPLE_BUFFER + 3); ene_rx_setup_hw_buffer() 212 tmp \|= ene_read_reg(dev, ENE_FW_SAMPLE_BUFFER + 4) << 8; ene_rx_setup_hw_buffer() 213 dev->extra_buf2_address = tmp; ene_rx_setup_hw_buffer() 215 dev->extra_buf2_len = ene_read_reg(dev, ENE_FW_SAMPLE_BUFFER + 5); ene_rx_setup_hw_buffer() 217 dev->buffer_len = dev->extra_buf1_len + dev->extra_buf2_len + 8; ene_rx_setup_hw_buffer() 221 dev->extra_buf1_address, dev->extra_buf1_len); ene_rx_setup_hw_buffer() 223 dev->extra_buf2_address, dev->extra_buf2_len); ene_rx_setup_hw_buffer() 225 pr_notice("Total buffer len = %d\n", dev->buffer_len); ene_rx_setup_hw_buffer() 227 if (dev->buffer_len > 64 \|\| dev->buffer_len < 16) ene_rx_setup_hw_buffer() 230 if (dev->extra_buf1_address > 0xFBFC \|\| ene_rx_setup_hw_buffer() 231 dev->extra_buf1_address < 0xEC00) ene_rx_setup_hw_buffer() 234 if (dev->extra_buf2_address > 0xFBFC \|\| ene_rx_setup_hw_buffer() 235 dev->extra_buf2_address < 0xEC00) ene_rx_setup_hw_buffer() 238 if (dev->r_pointer > dev->buffer_len) ene_rx_setup_hw_buffer() 241 ene_set_reg_mask(dev, ENE_FW1, ENE_FW1_EXTRA_BUF_HND); ene_rx_setup_hw_buffer() 245 dev->hw_extra_buffer = false; ene_rx_setup_hw_buffer() 246 ene_clear_reg_mask(dev, ENE_FW1, ENE_FW1_EXTRA_BUF_HND); ene_rx_setup_hw_buffer() 251 static void ene_rx_restore_hw_buffer(struct ene_device dev) ene_rx_restore_hw_buffer() argument 253 if (!dev->hw_extra_buffer) ene_rx_restore_hw_buffer() 256 ene_write_reg(dev, ENE_FW_SAMPLE_BUFFER + 0, ene_rx_restore_hw_buffer() 257 dev->extra_buf1_address & 0xFF); ene_rx_restore_hw_buffer() 258 ene_write_reg(dev, ENE_FW_SAMPLE_BUFFER + 1, ene_rx_restore_hw_buffer() 259 dev->extra_buf1_address >> 8); ene_rx_restore_hw_buffer() 260 ene_write_reg(dev, ENE_FW_SAMPLE_BUFFER + 2, dev->extra_buf1_len); ene_rx_restore_hw_buffer() 262 ene_write_reg(dev, ENE_FW_SAMPLE_BUFFER + 3, ene_rx_restore_hw_buffer() 263 dev->extra_buf2_address & 0xFF); ene_rx_restore_hw_buffer() 264 ene_write_reg(dev, ENE_FW_SAMPLE_BUFFER + 4, ene_rx_restore_hw_buffer() 265 dev->extra_buf2_address >> 8); ene_rx_restore_hw_buffer() 266 ene_write_reg(dev, ENE_FW_SAMPLE_BUFFER + 5, ene_rx_restore_hw_buffer() 267 dev->extra_buf2_len); ene_rx_restore_hw_buffer() 268 ene_clear_reg_mask(dev, ENE_FW1, ENE_FW1_EXTRA_BUF_HND); ene_rx_restore_hw_buffer() 272 static void ene_rx_read_hw_pointer(struct ene_device dev) ene_rx_read_hw_pointer() argument 274 if (dev->hw_extra_buffer) ene_rx_read_hw_pointer() 275 dev->w_pointer = ene_read_reg(dev, ENE_FW_RX_POINTER); ene_rx_read_hw_pointer() 277 dev->w_pointer = ene_read_reg(dev, ENE_FW2) ene_rx_read_hw_pointer() 281 dev->w_pointer, dev->r_pointer); ene_rx_read_hw_pointer() 285 static int ene_rx_get_sample_reg(struct ene_device dev) ene_rx_get_sample_reg() argument 289 if (dev->r_pointer == dev->w_pointer) { ene_rx_get_sample_reg() 291 ene_rx_read_hw_pointer(dev); ene_rx_get_sample_reg() 294 if (dev->r_pointer == dev->w_pointer) { ene_rx_get_sample_reg() 295 dbg_verbose("RB: end of data at %d", dev->r_pointer); ene_rx_get_sample_reg() 299 dbg_verbose("RB: reading at offset %d", dev->r_pointer); ene_rx_get_sample_reg() 300 r_pointer = dev->r_pointer; ene_rx_get_sample_reg() 302 dev->r_pointer++; ene_rx_get_sample_reg() 303 if (dev->r_pointer == dev->buffer_len) ene_rx_get_sample_reg() 304 dev->r_pointer = 0; ene_rx_get_sample_reg() 306 dbg_verbose("RB: next read will be from offset %d", dev->r_pointer); ene_rx_get_sample_reg() 315 if (r_pointer < dev->extra_buf1_len) { ene_rx_get_sample_reg() 317 return dev->extra_buf1_address + r_pointer; ene_rx_get_sample_reg() 320 r_pointer -= dev->extra_buf1_len; ene_rx_get_sample_reg() 322 if (r_pointer < dev->extra_buf2_len) { ene_rx_get_sample_reg() 324 return dev->extra_buf2_address + r_pointer; ene_rx_get_sample_reg() 332 static void ene_rx_sense_carrier(struct ene_device dev) ene_rx_sense_carrier() argument 337 int period = ene_read_reg(dev, ENE_CIRCAR_PRD); ene_rx_sense_carrier() 338 int hperiod = ene_read_reg(dev, ENE_CIRCAR_HPRD); ene_rx_sense_carrier() 355 if (dev->carrier_detect_enabled) { ene_rx_sense_carrier() 359 ir_raw_event_store(dev->rdev, &ev); ene_rx_sense_carrier() 364 static void ene_rx_enable_cir_engine(struct ene_device dev, bool enable) ene_rx_enable_cir_engine() argument 366 ene_set_clear_reg_mask(dev, ENE_CIRCFG, ene_rx_enable_cir_engine() 371 static void ene_rx_select_input(struct ene_device dev, bool gpio_0a) ene_rx_select_input() argument 373 ene_set_clear_reg_mask(dev, ENE_CIRCFG2, ENE_CIRCFG2_GPIO0A, gpio_0a); ene_rx_select_input() 380 static void ene_rx_enable_fan_input(struct ene_device dev, bool enable) ene_rx_enable_fan_input() argument 382 if (!dev->hw_fan_input) ene_rx_enable_fan_input() 386 ene_write_reg(dev, ENE_FAN_AS_IN1, 0); ene_rx_enable_fan_input() 388 ene_write_reg(dev, ENE_FAN_AS_IN1, ENE_FAN_AS_IN1_EN); ene_rx_enable_fan_input() 389 ene_write_reg(dev, ENE_FAN_AS_IN2, ENE_FAN_AS_IN2_EN); ene_rx_enable_fan_input() 394 static void ene_rx_setup(struct ene_device dev) ene_rx_setup() argument 396 bool learning_mode = dev->learning_mode_enabled \|\| ene_rx_setup() 397 dev->carrier_detect_enabled; ene_rx_setup() 404 ene_write_reg(dev, ENE_CIRCFG2, 0x00); ene_rx_setup() 409 dev->pll_freq == ENE_DEFAULT_PLL_FREQ ? 1 : 2; ene_rx_setup() 411 ene_write_reg(dev, ENE_CIRRLC_CFG, ene_rx_setup() 415 if (dev->hw_revision < ENE_HW_C) ene_rx_setup() 420 WARN_ON(!dev->hw_learning_and_tx_capable); ene_rx_setup() 427 ene_rx_select_input(dev, !dev->hw_use_gpio_0a); ene_rx_setup() 428 dev->rx_fan_input_inuse = false; ene_rx_setup() 431 ene_set_reg_mask(dev, ENE_CIRCFG, ENE_CIRCFG_CARR_DEMOD); ene_rx_setup() 434 ene_write_reg(dev, ENE_CIRCAR_PULS, 0x63); ene_rx_setup() 435 ene_set_clear_reg_mask(dev, ENE_CIRCFG2, ENE_CIRCFG2_CARR_DETECT, ene_rx_setup() 436 dev->carrier_detect_enabled \|\| debug); ene_rx_setup() 438 if (dev->hw_fan_input) ene_rx_setup() 439 dev->rx_fan_input_inuse = true; ene_rx_setup() 441 ene_rx_select_input(dev, dev->hw_use_gpio_0a); ene_rx_setup() 444 ene_clear_reg_mask(dev, ENE_CIRCFG, ENE_CIRCFG_CARR_DEMOD); ene_rx_setup() 445 ene_clear_reg_mask(dev, ENE_CIRCFG2, ENE_CIRCFG2_CARR_DETECT); ene_rx_setup() 449 if (dev->rx_fan_input_inuse) { ene_rx_setup() 450 dev->rdev->rx_resolution = US_TO_NS(ENE_FW_SAMPLE_PERIOD_FAN); ene_rx_setup() 454 dev->rdev->min_timeout = dev->rdev->max_timeout = ene_rx_setup() 458 dev->rdev->rx_resolution = US_TO_NS(sample_period); ene_rx_setup() 465 dev->rdev->min_timeout = US_TO_NS(127 * sample_period); ene_rx_setup() 466 dev->rdev->max_timeout = US_TO_NS(200000); ene_rx_setup() 469 if (dev->hw_learning_and_tx_capable) ene_rx_setup() 470 dev->rdev->tx_resolution = US_TO_NS(sample_period); ene_rx_setup() 472 if (dev->rdev->timeout > dev->rdev->max_timeout) ene_rx_setup() 473 dev->rdev->timeout = dev->rdev->max_timeout; ene_rx_setup() 474 if (dev->rdev->timeout < dev->rdev->min_timeout) ene_rx_setup() 475 dev->rdev->timeout = dev->rdev->min_timeout; ene_rx_setup() 479 static void ene_rx_enable_hw(struct ene_device dev) ene_rx_enable_hw() argument 484 if (dev->hw_revision < ENE_HW_C) { ene_rx_enable_hw() 485 ene_write_reg(dev, ENEB_IRQ, dev->irq << 1); ene_rx_enable_hw() 486 ene_write_reg(dev, ENEB_IRQ_UNK1, 0x01); ene_rx_enable_hw() 488 reg_value = ene_read_reg(dev, ENE_IRQ) & 0xF0; ene_rx_enable_hw() 491 reg_value \|= (dev->irq & ENE_IRQ_MASK); ene_rx_enable_hw() 492 ene_write_reg(dev, ENE_IRQ, reg_value); ene_rx_enable_hw() 496 ene_rx_enable_fan_input(dev, dev->rx_fan_input_inuse); ene_rx_enable_hw() 497 ene_rx_enable_cir_engine(dev, !dev->rx_fan_input_inuse); ene_rx_enable_hw() 500 ene_irq_status(dev); ene_rx_enable_hw() 503 ene_set_reg_mask(dev, ENE_FW1, ENE_FW1_ENABLE \| ENE_FW1_IRQ); ene_rx_enable_hw() 506 ir_raw_event_set_idle(dev->rdev, true); ene_rx_enable_hw() 510 static void ene_rx_enable(struct ene_device dev) ene_rx_enable() argument 512 ene_rx_enable_hw(dev); ene_rx_enable() 513 dev->rx_enabled = true; ene_rx_enable() 517 static void ene_rx_disable_hw(struct ene_device dev) ene_rx_disable_hw() argument 520 ene_rx_enable_cir_engine(dev, false); ene_rx_disable_hw() 521 ene_rx_enable_fan_input(dev, false); ene_rx_disable_hw() 524 ene_clear_reg_mask(dev, ENE_FW1, ENE_FW1_ENABLE \| ENE_FW1_IRQ); ene_rx_disable_hw() 525 ir_raw_event_set_idle(dev->rdev, true); ene_rx_disable_hw() 529 static void ene_rx_disable(struct ene_device dev) ene_rx_disable() argument 531 ene_rx_disable_hw(dev); ene_rx_disable() 532 dev->rx_enabled = false; ene_rx_disable() 538 static void ene_rx_reset(struct ene_device dev) ene_rx_reset() argument 540 ene_clear_reg_mask(dev, ENE_CIRCFG, ENE_CIRCFG_RX_EN); ene_rx_reset() 541 ene_set_reg_mask(dev, ENE_CIRCFG, ENE_CIRCFG_RX_EN); ene_rx_reset() 545 static void ene_tx_set_carrier(struct ene_device dev) ene_tx_set_carrier() argument 550 spin_lock_irqsave(&dev->hw_lock, flags); ene_tx_set_carrier() 552 ene_set_clear_reg_mask(dev, ENE_CIRCFG, ene_tx_set_carrier() 553 ENE_CIRCFG_TX_CARR, dev->tx_period > 0); ene_tx_set_carrier() 555 if (!dev->tx_period) ene_tx_set_carrier() 558 BUG_ON(dev->tx_duty_cycle >= 100 \|\| dev->tx_duty_cycle <= 0); ene_tx_set_carrier() 560 tx_puls_width = dev->tx_period / (100 / dev->tx_duty_cycle); ene_tx_set_carrier() 565 dbg("TX: pulse distance = %d * 500 ns", dev->tx_period); ene_tx_set_carrier() 568 ene_write_reg(dev, ENE_CIRMOD_PRD, dev->tx_period \| ENE_CIRMOD_PRD_POL); ene_tx_set_carrier() 569 ene_write_reg(dev, ENE_CIRMOD_HPRD, tx_puls_width); ene_tx_set_carrier() 571 spin_unlock_irqrestore(&dev->hw_lock, flags); ene_tx_set_carrier() 575 static void ene_tx_set_transmitters(struct ene_device dev) ene_tx_set_transmitters() argument 579 spin_lock_irqsave(&dev->hw_lock, flags); ene_tx_set_transmitters() 580 ene_set_clear_reg_mask(dev, ENE_GPIOFS8, ENE_GPIOFS8_GPIO41, ene_tx_set_transmitters() 581 !!(dev->transmitter_mask & 0x01)); ene_tx_set_transmitters() 582 ene_set_clear_reg_mask(dev, ENE_GPIOFS1, ENE_GPIOFS1_GPIO0D, ene_tx_set_transmitters() 583 !!(dev->transmitter_mask & 0x02)); ene_tx_set_transmitters() 584 spin_unlock_irqrestore(&dev->hw_lock, flags); ene_tx_set_transmitters() 588 static void ene_tx_enable(struct ene_device dev) ene_tx_enable() argument 590 u8 conf1 = ene_read_reg(dev, ENE_CIRCFG); ene_tx_enable() 591 u8 fwreg2 = ene_read_reg(dev, ENE_FW2); ene_tx_enable() 593 dev->saved_conf1 = conf1; ene_tx_enable() 606 if (dev->hw_revision == ENE_HW_C) ene_tx_enable() 611 ene_write_reg(dev, ENE_CIRCFG, conf1); ene_tx_enable() 615 static void ene_tx_disable(struct ene_device dev) ene_tx_disable() argument 617 ene_write_reg(dev, ENE_CIRCFG, dev->saved_conf1); ene_tx_disable() 618 dev->tx_buffer = NULL; ene_tx_disable() 622 / TX one sample - must be called with dev->hw_lock/ ene_tx_sample() 623 static void ene_tx_sample(struct ene_device dev) ene_tx_sample() argument 627 bool pulse = dev->tx_sample_pulse; ene_tx_sample() 629 if (!dev->tx_buffer) { ene_tx_sample() 635 if (!dev->tx_sample) { ene_tx_sample() 637 if (dev->tx_pos == dev->tx_len) { ene_tx_sample() 638 if (!dev->tx_done) { ene_tx_sample() 640 dev->tx_done = true; ene_tx_sample() 644 ene_tx_disable(dev); ene_tx_sample() 645 complete(&dev->tx_complete); ene_tx_sample() 650 sample = dev->tx_buffer[dev->tx_pos++]; ene_tx_sample() 651 dev->tx_sample_pulse = !dev->tx_sample_pulse; ene_tx_sample() 653 dev->tx_sample = DIV_ROUND_CLOSEST(sample, sample_period); ene_tx_sample() 655 if (!dev->tx_sample) ene_tx_sample() 656 dev->tx_sample = 1; ene_tx_sample() 659 raw_tx = min(dev->tx_sample , (unsigned int)ENE_CIRRLC_OUT_MASK); ene_tx_sample() 660 dev->tx_sample -= raw_tx; ene_tx_sample() 667 ene_write_reg(dev, ene_tx_sample() 668 dev->tx_reg ? ENE_CIRRLC_OUT1 : ENE_CIRRLC_OUT0, raw_tx); ene_tx_sample() 670 dev->tx_reg = !dev->tx_reg; ene_tx_sample() 674 mod_timer(&dev->tx_sim_timer, jiffies + HZ / 500); ene_tx_sample() 680 struct ene_device dev = (struct ene_device )data; ene_tx_irqsim() local 683 spin_lock_irqsave(&dev->hw_lock, flags); ene_tx_irqsim() 684 ene_tx_sample(dev); ene_tx_irqsim() 685 spin_unlock_irqrestore(&dev->hw_lock, flags); ene_tx_irqsim() 690 static int ene_irq_status(struct ene_device dev) ene_irq_status() argument 696 fw_flags2 = ene_read_reg(dev, ENE_FW2); ene_irq_status() 698 if (dev->hw_revision < ENE_HW_C) { ene_irq_status() 699 irq_status = ene_read_reg(dev, ENEB_IRQ_STATUS); ene_irq_status() 704 ene_clear_reg_mask(dev, ENEB_IRQ_STATUS, ENEB_IRQ_STATUS_IR); ene_irq_status() 708 irq_status = ene_read_reg(dev, ENE_IRQ); ene_irq_status() 713 ene_write_reg(dev, ENE_IRQ, irq_status & ~ENE_IRQ_STATUS); ene_irq_status() 714 ene_write_reg(dev, ENE_IRQ, irq_status & ~ENE_IRQ_STATUS); ene_irq_status() 719 ene_write_reg(dev, ENE_FW2, fw_flags2 & ~ENE_FW2_RXIRQ); ene_irq_status() 723 fw_flags1 = ene_read_reg(dev, ENE_FW1); ene_irq_status() 725 ene_write_reg(dev, ENE_FW1, fw_flags1 & ~ENE_FW1_TXIRQ); ene_irq_status() 740 struct ene_device dev = (struct ene_device )data; ene_isr() local 743 spin_lock_irqsave(&dev->hw_lock, flags); ene_isr() 746 ene_rx_read_hw_pointer(dev); ene_isr() 747 irq_status = ene_irq_status(dev); ene_isr() 756 if (!dev->hw_learning_and_tx_capable) { ene_isr() 760 ene_tx_sample(dev); ene_isr() 768 if (dev->hw_learning_and_tx_capable) ene_isr() 769 ene_rx_sense_carrier(dev); ene_isr() 773 if (!dev->hw_extra_buffer) ene_isr() 774 dev->r_pointer = dev->w_pointer == 0 ? ENE_FW_PACKET_SIZE : 0; ene_isr() 778 reg = ene_rx_get_sample_reg(dev); ene_isr() 784 hw_value = ene_read_reg(dev, reg); ene_isr() 786 if (dev->rx_fan_input_inuse) { ene_isr() 791 hw_value \|= ene_read_reg(dev, reg + offset) << 8; ene_isr() 803 if (dev->rx_period_adjust) { ene_isr() 805 hw_sample /= (100 + dev->rx_period_adjust); ene_isr() 809 if (!dev->hw_extra_buffer && !hw_sample) { ene_isr() 810 dev->r_pointer = dev->w_pointer; ene_isr() 818 ir_raw_event_store_with_filter(dev->rdev, &ev); ene_isr() 821 ir_raw_event_handle(dev->rdev); ene_isr() 823 spin_unlock_irqrestore(&dev->hw_lock, flags); ene_isr() 828 static void ene_setup_default_settings(struct ene_device dev) ene_setup_default_settings() argument 830 dev->tx_period = 32; ene_setup_default_settings() 831 dev->tx_duty_cycle = 50; /%/ ene_setup_default_settings() 832 dev->transmitter_mask = 0x03; ene_setup_default_settings() 833 dev->learning_mode_enabled = learning_mode_force; ene_setup_default_settings() 836 dev->rdev->timeout = US_TO_NS(150000); ene_setup_default_settings() 840 static void ene_setup_hw_settings(struct ene_device dev) ene_setup_hw_settings() argument 842 if (dev->hw_learning_and_tx_capable) { ene_setup_hw_settings() 843 ene_tx_set_carrier(dev); ene_setup_hw_settings() 844 ene_tx_set_transmitters(dev); ene_setup_hw_settings() 847 ene_rx_setup(dev); ene_setup_hw_settings() 853 struct ene_device dev = rdev->priv; ene_open() local 856 spin_lock_irqsave(&dev->hw_lock, flags); ene_open() 857 ene_rx_enable(dev); ene_open() 858 spin_unlock_irqrestore(&dev->hw_lock, flags); ene_open() 865 struct ene_device dev = rdev->priv; ene_close() local 867 spin_lock_irqsave(&dev->hw_lock, flags); ene_close() 869 ene_rx_disable(dev); ene_close() 870 spin_unlock_irqrestore(&dev->hw_lock, flags); ene_close() 876 struct ene_device dev = rdev->priv; ene_set_tx_mask() local 886 dev->transmitter_mask = tx_mask; ene_set_tx_mask() 887 ene_tx_set_transmitters(dev); ene_set_tx_mask() 894 struct ene_device dev = rdev->priv; ene_set_tx_carrier() local 910 dev->tx_period = period; ene_set_tx_carrier() 911 ene_tx_set_carrier(dev); ene_set_tx_carrier() 918 struct ene_device dev = rdev->priv; ene_set_tx_duty_cycle() local 920 dev->tx_duty_cycle = duty_cycle; ene_set_tx_duty_cycle() 921 ene_tx_set_carrier(dev); ene_set_tx_duty_cycle() 928 struct ene_device dev = rdev->priv; ene_set_learning_mode() local 930 if (enable == dev->learning_mode_enabled) ene_set_learning_mode() 933 spin_lock_irqsave(&dev->hw_lock, flags); ene_set_learning_mode() 934 dev->learning_mode_enabled = enable; ene_set_learning_mode() 935 ene_rx_disable(dev); ene_set_learning_mode() 936 ene_rx_setup(dev); ene_set_learning_mode() 937 ene_rx_enable(dev); ene_set_learning_mode() 938 spin_unlock_irqrestore(&dev->hw_lock, flags); ene_set_learning_mode() 944 struct ene_device dev = rdev->priv; ene_set_carrier_report() local 947 if (enable == dev->carrier_detect_enabled) ene_set_carrier_report() 950 spin_lock_irqsave(&dev->hw_lock, flags); ene_set_carrier_report() 951 dev->carrier_detect_enabled = enable; ene_set_carrier_report() 952 ene_rx_disable(dev); ene_set_carrier_report() 953 ene_rx_setup(dev); ene_set_carrier_report() 954 ene_rx_enable(dev); ene_set_carrier_report() 955 spin_unlock_irqrestore(&dev->hw_lock, flags); ene_set_carrier_report() 962 struct ene_device dev = rdev->priv; ene_set_idle() local 965 ene_rx_reset(dev); ene_set_idle() 973 struct ene_device dev = rdev->priv; ene_transmit() local 976 dev->tx_buffer = buf; ene_transmit() 977 dev->tx_len = n; ene_transmit() 978 dev->tx_pos = 0; ene_transmit() 979 dev->tx_reg = 0; ene_transmit() 980 dev->tx_done = 0; ene_transmit() 981 dev->tx_sample = 0; ene_transmit() 982 dev->tx_sample_pulse = false; ene_transmit() 984 dbg("TX: %d samples", dev->tx_len); ene_transmit() 986 spin_lock_irqsave(&dev->hw_lock, flags); ene_transmit() 988 ene_tx_enable(dev); ene_transmit() 991 ene_tx_sample(dev); ene_transmit() 992 ene_tx_sample(dev); ene_transmit() 994 spin_unlock_irqrestore(&dev->hw_lock, flags); ene_transmit() 996 if (wait_for_completion_timeout(&dev->tx_complete, 2 * HZ) == 0) { ene_transmit() 998 spin_lock_irqsave(&dev->hw_lock, flags); ene_transmit() 999 ene_tx_disable(dev); ene_transmit() 1000 spin_unlock_irqrestore(&dev->hw_lock, flags); ene_transmit() 1011 struct ene_device dev; ene_probe() local 1014 dev = kzalloc(sizeof(struct ene_device), GFP_KERNEL); ene_probe() 1016 if (!dev \|\| !rdev) ene_probe() 1023 dev->hw_io = -1; ene_probe() 1024 dev->irq = -1; ene_probe() 1033 spin_lock_init(&dev->hw_lock); ene_probe() 1035 dev->hw_io = pnp_port_start(pnp_dev, 0); ene_probe() 1036 dev->irq = pnp_irq(pnp_dev, 0); ene_probe() 1039 pnp_set_drvdata(pnp_dev, dev); ene_probe() 1040 dev->pnp_dev = pnp_dev; ene_probe() 1047 error = ene_hw_detect(dev); ene_probe() 1051 if (!dev->hw_learning_and_tx_capable && txsim) { ene_probe() 1052 dev->hw_learning_and_tx_capable = true; ene_probe() 1053 setup_timer(&dev->tx_sim_timer, ene_tx_irqsim, ene_probe() 1054 (long unsigned int)dev); ene_probe() 1058 if (!dev->hw_learning_and_tx_capable) ene_probe() 1063 rdev->priv = dev; ene_probe() 1071 if (dev->hw_learning_and_tx_capable) { ene_probe() 1073 init_completion(&dev->tx_complete); ene_probe() 1082 dev->rdev = rdev; ene_probe() 1084 ene_rx_setup_hw_buffer(dev); ene_probe() 1085 ene_setup_default_settings(dev); ene_probe() 1086 ene_setup_hw_settings(dev); ene_probe() 1088 device_set_wakeup_capable(&pnp_dev->dev, true); ene_probe() 1089 device_set_wakeup_enable(&pnp_dev->dev, true); ene_probe() 1097 if (!request_region(dev->hw_io, ENE_IO_SIZE, ENE_DRIVER_NAME)) { ene_probe() 1101 if (request_irq(dev->irq, ene_isr, ene_probe() 1102 IRQF_SHARED, ENE_DRIVER_NAME, (void )dev)) { ene_probe() 1110 release_region(dev->hw_io, ENE_IO_SIZE); ene_probe() 1116 kfree(dev); ene_probe() 1123 struct ene_device dev = pnp_get_drvdata(pnp_dev); ene_remove() local 1126 spin_lock_irqsave(&dev->hw_lock, flags); ene_remove() 1127 ene_rx_disable(dev); ene_remove() 1128 ene_rx_restore_hw_buffer(dev); ene_remove() 1129 spin_unlock_irqrestore(&dev->hw_lock, flags); ene_remove() 1131 free_irq(dev->irq, dev); ene_remove() 1132 release_region(dev->hw_io, ENE_IO_SIZE); ene_remove() 1133 rc_unregister_device(dev->rdev); ene_remove() 1134 kfree(dev); ene_remove() 1138 static void ene_enable_wake(struct ene_device dev, bool enable) ene_enable_wake() argument 1141 ene_set_clear_reg_mask(dev, ENE_FW1, ENE_FW1_WAKE, enable); ene_enable_wake() 1147 struct ene_device dev = pnp_get_drvdata(pnp_dev); ene_suspend() local 1148 bool wake = device_may_wakeup(&dev->pnp_dev->dev); ene_suspend() 1150 if (!wake && dev->rx_enabled) ene_suspend() 1151 ene_rx_disable_hw(dev); ene_suspend() 1153 ene_enable_wake(dev, wake); ene_suspend() 1159 struct ene_device dev = pnp_get_drvdata(pnp_dev); ene_resume() local 1160 ene_setup_hw_settings(dev); ene_resume() 1162 if (dev->rx_enabled) ene_resume() 1163 ene_rx_enable(dev); ene_resume() 1165 ene_enable_wake(dev, false); ene_resume() 1172 struct ene_device *dev = pnp_get_drvdata(pnp_dev); ene_shutdown() local 1173 ene_enable_wake(dev, true); ene_shutdown()
/linux-4.1.27/drivers/media/platform/vivid/
H A D	vivid-kthread-out.c	54 static void vivid_thread_vid_out_tick(struct vivid_dev dev) vivid_thread_vid_out_tick() argument 59 dprintk(dev, 1, "Video Output Thread Tick\n"); vivid_thread_vid_out_tick() 62 if (dev->perc_dropped_buffers && vivid_thread_vid_out_tick() 63 prandom_u32_max(100) < dev->perc_dropped_buffers) vivid_thread_vid_out_tick() 66 spin_lock(&dev->slock); vivid_thread_vid_out_tick() 71 if (!list_empty(&dev->vid_out_active) && vivid_thread_vid_out_tick() 72 !list_is_singular(&dev->vid_out_active)) { vivid_thread_vid_out_tick() 73 vid_out_buf = list_entry(dev->vid_out_active.next, vivid_thread_vid_out_tick() 77 if (!list_empty(&dev->vbi_out_active) && vivid_thread_vid_out_tick() 78 (dev->field_out != V4L2_FIELD_ALTERNATE \|\| vivid_thread_vid_out_tick() 79 (dev->vbi_out_seq_count & 1))) { vivid_thread_vid_out_tick() 80 vbi_out_buf = list_entry(dev->vbi_out_active.next, vivid_thread_vid_out_tick() 84 spin_unlock(&dev->slock); vivid_thread_vid_out_tick() 90 vid_out_buf->vb.v4l2_buf.sequence = dev->vid_out_seq_count; vivid_thread_vid_out_tick() 91 if (dev->field_out == V4L2_FIELD_ALTERNATE) { vivid_thread_vid_out_tick() 99 vid_out_buf->vb.v4l2_buf.timestamp.tv_sec += dev->time_wrap_offset; vivid_thread_vid_out_tick() 100 vb2_buffer_done(&vid_out_buf->vb, dev->dqbuf_error ? vivid_thread_vid_out_tick() 102 dprintk(dev, 2, "vid_out buffer %d done\n", vivid_thread_vid_out_tick() 107 if (dev->stream_sliced_vbi_out) vivid_thread_vid_out_tick() 108 vivid_sliced_vbi_out_process(dev, vbi_out_buf); vivid_thread_vid_out_tick() 110 vbi_out_buf->vb.v4l2_buf.sequence = dev->vbi_out_seq_count; vivid_thread_vid_out_tick() 112 vbi_out_buf->vb.v4l2_buf.timestamp.tv_sec += dev->time_wrap_offset; vivid_thread_vid_out_tick() 113 vb2_buffer_done(&vbi_out_buf->vb, dev->dqbuf_error ? vivid_thread_vid_out_tick() 115 dprintk(dev, 2, "vbi_out buffer %d done\n", vivid_thread_vid_out_tick() 118 dev->dqbuf_error = false; vivid_thread_vid_out_tick() 123 struct vivid_dev dev = data; vivid_thread_vid_out() local 133 dprintk(dev, 1, "Video Output Thread Start\n"); vivid_thread_vid_out() 138 dev->out_seq_offset = 0; vivid_thread_vid_out() 139 if (dev->seq_wrap) vivid_thread_vid_out() 140 dev->out_seq_count = 0xffffff80U; vivid_thread_vid_out() 141 dev->jiffies_vid_out = jiffies; vivid_thread_vid_out() 142 dev->vid_out_seq_start = dev->vbi_out_seq_start = 0; vivid_thread_vid_out() 143 dev->out_seq_resync = false; vivid_thread_vid_out() 150 mutex_lock(&dev->mutex); vivid_thread_vid_out() 152 if (dev->out_seq_resync) { vivid_thread_vid_out() 153 dev->jiffies_vid_out = cur_jiffies; vivid_thread_vid_out() 154 dev->out_seq_offset = dev->out_seq_count + 1; vivid_thread_vid_out() 155 dev->out_seq_count = 0; vivid_thread_vid_out() 156 dev->out_seq_resync = false; vivid_thread_vid_out() 158 numerator = dev->timeperframe_vid_out.numerator; vivid_thread_vid_out() 159 denominator = dev->timeperframe_vid_out.denominator; vivid_thread_vid_out() 161 if (dev->field_out == V4L2_FIELD_ALTERNATE) vivid_thread_vid_out() 165 jiffies_since_start = cur_jiffies - dev->jiffies_vid_out; vivid_thread_vid_out() 178 dev->jiffies_vid_out = cur_jiffies; vivid_thread_vid_out() 179 dev->out_seq_offset = buffers_since_start; vivid_thread_vid_out() 182 dev->out_seq_count = buffers_since_start + dev->out_seq_offset; vivid_thread_vid_out() 183 dev->vid_out_seq_count = dev->out_seq_count - dev->vid_out_seq_start; vivid_thread_vid_out() 184 dev->vbi_out_seq_count = dev->out_seq_count - dev->vbi_out_seq_start; vivid_thread_vid_out() 186 vivid_thread_vid_out_tick(dev); vivid_thread_vid_out() 187 mutex_unlock(&dev->mutex); vivid_thread_vid_out() 196 jiffies_since_start = jiffies - dev->jiffies_vid_out; vivid_thread_vid_out() 214 dprintk(dev, 1, "Video Output Thread End\n"); vivid_thread_vid_out() 218 static void vivid_grab_controls(struct vivid_dev dev, bool grab) vivid_grab_controls() argument 220 v4l2_ctrl_grab(dev->ctrl_has_crop_out, grab); vivid_grab_controls() 221 v4l2_ctrl_grab(dev->ctrl_has_compose_out, grab); vivid_grab_controls() 222 v4l2_ctrl_grab(dev->ctrl_has_scaler_out, grab); vivid_grab_controls() 223 v4l2_ctrl_grab(dev->ctrl_tx_mode, grab); vivid_grab_controls() 224 v4l2_ctrl_grab(dev->ctrl_tx_rgb_range, grab); vivid_grab_controls() 227 int vivid_start_generating_vid_out(struct vivid_dev dev, bool pstreaming) vivid_start_generating_vid_out() argument 229 dprintk(dev, 1, "%s\n", __func__); vivid_start_generating_vid_out() 231 if (dev->kthread_vid_out) { vivid_start_generating_vid_out() 232 u32 seq_count = dev->out_seq_count + dev->seq_wrap 128; vivid_start_generating_vid_out() 234 if (pstreaming == &dev->vid_out_streaming) vivid_start_generating_vid_out() 235 dev->vid_out_seq_start = seq_count; vivid_start_generating_vid_out() 237 dev->vbi_out_seq_start = seq_count; vivid_start_generating_vid_out() 243 dev->jiffies_vid_out = jiffies; vivid_start_generating_vid_out() 244 dev->vid_out_seq_start = dev->seq_wrap * 128; vivid_start_generating_vid_out() 245 dev->vbi_out_seq_start = dev->seq_wrap * 128; vivid_start_generating_vid_out() 247 dev->kthread_vid_out = kthread_run(vivid_thread_vid_out, dev, vivid_start_generating_vid_out() 248 "%s-vid-out", dev->v4l2_dev.name); vivid_start_generating_vid_out() 250 if (IS_ERR(dev->kthread_vid_out)) { vivid_start_generating_vid_out() 251 v4l2_err(&dev->v4l2_dev, "kernel_thread() failed\n"); vivid_start_generating_vid_out() 252 return PTR_ERR(dev->kthread_vid_out); vivid_start_generating_vid_out() 255 vivid_grab_controls(dev, true); vivid_start_generating_vid_out() 257 dprintk(dev, 1, "returning from %s\n", __func__); vivid_start_generating_vid_out() 261 void vivid_stop_generating_vid_out(struct vivid_dev dev, bool pstreaming) vivid_stop_generating_vid_out() argument 263 dprintk(dev, 1, "%s\n", __func__); vivid_stop_generating_vid_out() 265 if (dev->kthread_vid_out == NULL) vivid_stop_generating_vid_out() 269 if (pstreaming == &dev->vid_out_streaming) { vivid_stop_generating_vid_out() 271 while (!list_empty(&dev->vid_out_active)) { vivid_stop_generating_vid_out() 274 buf = list_entry(dev->vid_out_active.next, vivid_stop_generating_vid_out() 278 dprintk(dev, 2, "vid_out buffer %d done\n", vivid_stop_generating_vid_out() 283 if (pstreaming == &dev->vbi_out_streaming) { vivid_stop_generating_vid_out() 284 while (!list_empty(&dev->vbi_out_active)) { vivid_stop_generating_vid_out() 287 buf = list_entry(dev->vbi_out_active.next, vivid_stop_generating_vid_out() 291 dprintk(dev, 2, "vbi_out buffer %d done\n", vivid_stop_generating_vid_out() 296 if (dev->vid_out_streaming \|\| dev->vbi_out_streaming) vivid_stop_generating_vid_out() 300 vivid_grab_controls(dev, false); vivid_stop_generating_vid_out() 301 mutex_unlock(&dev->mutex); vivid_stop_generating_vid_out() 302 kthread_stop(dev->kthread_vid_out); vivid_stop_generating_vid_out() 303 dev->kthread_vid_out = NULL; vivid_stop_generating_vid_out() 304 mutex_lock(&dev->mutex); vivid_stop_generating_vid_out()
H A D	vivid-vid-cap.c	102 struct vivid_dev dev = vb2_get_drv_priv(vq); vid_cap_queue_setup() local 103 unsigned buffers = tpg_g_buffers(&dev->tpg); vid_cap_queue_setup() 104 unsigned h = dev->fmt_cap_rect.height; vid_cap_queue_setup() 107 if (dev->field_cap == V4L2_FIELD_ALTERNATE) { vid_cap_queue_setup() 116 if (dev->queue_setup_error) { vid_cap_queue_setup() 121 dev->queue_setup_error = false; vid_cap_queue_setup() 140 vfmt = vivid_get_format(dev, mp->pixelformat); vid_cap_queue_setup() 143 if (sizes[p] < tpg_g_line_width(&dev->tpg, p) h + vid_cap_queue_setup() 149 sizes[p] = tpg_g_line_width(&dev->tpg, p) * h + vid_cap_queue_setup() 150 dev->fmt_cap->data_offset[p]; vid_cap_queue_setup() 163 dprintk(dev, 1, "%s: count=%d\n", __func__, nbuffers); vid_cap_queue_setup() 165 dprintk(dev, 1, "%s: size[%u]=%u\n", __func__, p, sizes[p]); vid_cap_queue_setup() 172 struct vivid_dev dev = vb2_get_drv_priv(vb->vb2_queue); vid_cap_buf_prepare() local 174 unsigned buffers = tpg_g_buffers(&dev->tpg); vid_cap_buf_prepare() 177 dprintk(dev, 1, "%s\n", __func__); vid_cap_buf_prepare() 179 if (WARN_ON(NULL == dev->fmt_cap)) vid_cap_buf_prepare() 182 if (dev->buf_prepare_error) { vid_cap_buf_prepare() 187 dev->buf_prepare_error = false; vid_cap_buf_prepare() 191 size = tpg_g_line_width(&dev->tpg, p) * dev->fmt_cap_rect.height + vid_cap_buf_prepare() 192 dev->fmt_cap->data_offset[p]; vid_cap_buf_prepare() 195 dprintk(dev, 1, "%s data will not fit into plane %u (%lu < %lu)\n", vid_cap_buf_prepare() 201 vb->v4l2_planes[p].data_offset = dev->fmt_cap->data_offset[p]; vid_cap_buf_prepare() 209 struct vivid_dev dev = vb2_get_drv_priv(vb->vb2_queue); vid_cap_buf_finish() local 214 if (!vivid_is_sdtv_cap(dev)) vid_cap_buf_finish() 222 if (dev->std_cap & V4L2_STD_525_60) vid_cap_buf_finish() 234 struct vivid_dev dev = vb2_get_drv_priv(vb->vb2_queue); vid_cap_buf_queue() local 237 dprintk(dev, 1, "%s\n", __func__); vid_cap_buf_queue() 239 spin_lock(&dev->slock); vid_cap_buf_queue() 240 list_add_tail(&buf->list, &dev->vid_cap_active); vid_cap_buf_queue() 241 spin_unlock(&dev->slock); vid_cap_buf_queue() 246 struct vivid_dev dev = vb2_get_drv_priv(vq); vid_cap_start_streaming() local 250 if (vb2_is_streaming(&dev->vb_vid_out_q)) vid_cap_start_streaming() 251 dev->can_loop_video = vivid_vid_can_loop(dev); vid_cap_start_streaming() 253 if (dev->kthread_vid_cap) vid_cap_start_streaming() 256 dev->vid_cap_seq_count = 0; vid_cap_start_streaming() 257 dprintk(dev, 1, "%s\n", __func__); vid_cap_start_streaming() 259 dev->must_blank[i] = tpg_g_perc_fill(&dev->tpg) < 100; vid_cap_start_streaming() 260 if (dev->start_streaming_error) { vid_cap_start_streaming() 261 dev->start_streaming_error = false; vid_cap_start_streaming() 264 err = vivid_start_generating_vid_cap(dev, &dev->vid_cap_streaming); vid_cap_start_streaming() 269 list_for_each_entry_safe(buf, tmp, &dev->vid_cap_active, list) { vid_cap_start_streaming() 280 struct vivid_dev dev = vb2_get_drv_priv(vq); vid_cap_stop_streaming() local 282 dprintk(dev, 1, "%s\n", __func__); vid_cap_stop_streaming() 283 vivid_stop_generating_vid_cap(dev, &dev->vid_cap_streaming); vid_cap_stop_streaming() 284 dev->can_loop_video = false; vid_cap_stop_streaming() 303 void vivid_update_quality(struct vivid_dev dev) vivid_update_quality() argument 307 if (dev->loop_video && (vivid_is_svid_cap(dev) \|\| vivid_is_hdmi_cap(dev))) { vivid_update_quality() 312 tpg_s_quality(&dev->tpg, TPG_QUAL_NOISE, 0); vivid_update_quality() 315 if (vivid_is_hdmi_cap(dev) && VIVID_INVALID_SIGNAL(dev->dv_timings_signal_mode)) { vivid_update_quality() 316 tpg_s_quality(&dev->tpg, TPG_QUAL_NOISE, 0); vivid_update_quality() 319 if (vivid_is_sdtv_cap(dev) && VIVID_INVALID_SIGNAL(dev->std_signal_mode)) { vivid_update_quality() 320 tpg_s_quality(&dev->tpg, TPG_QUAL_NOISE, 0); vivid_update_quality() 323 if (!vivid_is_tv_cap(dev)) { vivid_update_quality() 324 tpg_s_quality(&dev->tpg, TPG_QUAL_COLOR, 0); vivid_update_quality() 334 freq_modulus = (dev->tv_freq - 676 / (43.25-1) * 16 /) % (6 16); vivid_update_quality() 336 tpg_s_quality(&dev->tpg, TPG_QUAL_NOISE, vivid_update_quality() 337 next_pseudo_random32(dev->tv_freq ^ 0x55) & 0x3f); vivid_update_quality() 341 tpg_s_quality(&dev->tpg, TPG_QUAL_GRAY, 0); vivid_update_quality() 343 tpg_s_quality(&dev->tpg, TPG_QUAL_COLOR, 0); vivid_update_quality() 349 static enum tpg_quality vivid_get_quality(struct vivid_dev dev, s32 afc) vivid_get_quality() argument 355 if (tpg_g_quality(&dev->tpg) == TPG_QUAL_COLOR \|\| vivid_get_quality() 356 tpg_g_quality(&dev->tpg) == TPG_QUAL_NOISE) vivid_get_quality() 357 return tpg_g_quality(&dev->tpg); vivid_get_quality() 365 freq_modulus = (dev->tv_freq - 676 /* (43.25-1) * 16 /) % (6 16); vivid_get_quality() 371 enum tpg_video_aspect vivid_get_video_aspect(const struct vivid_dev dev) vivid_get_video_aspect() argument 373 if (vivid_is_sdtv_cap(dev)) vivid_get_video_aspect() 374 return dev->std_aspect_ratio; vivid_get_video_aspect() 376 if (vivid_is_hdmi_cap(dev)) vivid_get_video_aspect() 377 return dev->dv_timings_aspect_ratio; vivid_get_video_aspect() 382 static enum tpg_pixel_aspect vivid_get_pixel_aspect(const struct vivid_dev dev) vivid_get_pixel_aspect() argument 384 if (vivid_is_sdtv_cap(dev)) vivid_get_pixel_aspect() 385 return (dev->std_cap & V4L2_STD_525_60) ? vivid_get_pixel_aspect() 388 if (vivid_is_hdmi_cap(dev) && vivid_get_pixel_aspect() 389 dev->src_rect.width == 720 && dev->src_rect.height <= 576) vivid_get_pixel_aspect() 390 return dev->src_rect.height == 480 ? vivid_get_pixel_aspect() 400 void vivid_update_format_cap(struct vivid_dev dev, bool keep_controls) vivid_update_format_cap() argument 402 struct v4l2_bt_timings bt = &dev->dv_timings_cap.bt; vivid_update_format_cap() 405 switch (dev->input_type[dev->input]) { vivid_update_format_cap() 408 dev->src_rect.width = webcam_sizes[dev->webcam_size_idx].width; vivid_update_format_cap() 409 dev->src_rect.height = webcam_sizes[dev->webcam_size_idx].height; vivid_update_format_cap() 410 dev->timeperframe_vid_cap = webcam_intervals[dev->webcam_ival_idx]; vivid_update_format_cap() 411 dev->field_cap = V4L2_FIELD_NONE; vivid_update_format_cap() 412 tpg_s_rgb_range(&dev->tpg, V4L2_DV_RGB_RANGE_AUTO); vivid_update_format_cap() 416 dev->field_cap = dev->tv_field_cap; vivid_update_format_cap() 417 dev->src_rect.width = 720; vivid_update_format_cap() 418 if (dev->std_cap & V4L2_STD_525_60) { vivid_update_format_cap() 419 dev->src_rect.height = 480; vivid_update_format_cap() 420 dev->timeperframe_vid_cap = (struct v4l2_fract) { 1001, 30000 }; vivid_update_format_cap() 421 dev->service_set_cap = V4L2_SLICED_CAPTION_525; vivid_update_format_cap() 423 dev->src_rect.height = 576; vivid_update_format_cap() 424 dev->timeperframe_vid_cap = (struct v4l2_fract) { 1000, 25000 }; vivid_update_format_cap() 425 dev->service_set_cap = V4L2_SLICED_WSS_625 \| V4L2_SLICED_TELETEXT_B; vivid_update_format_cap() 427 tpg_s_rgb_range(&dev->tpg, V4L2_DV_RGB_RANGE_AUTO); vivid_update_format_cap() 430 dev->src_rect.width = bt->width; vivid_update_format_cap() 431 dev->src_rect.height = bt->height; vivid_update_format_cap() 433 dev->timeperframe_vid_cap = (struct v4l2_fract) { vivid_update_format_cap() 437 dev->field_cap = V4L2_FIELD_ALTERNATE; vivid_update_format_cap() 439 dev->field_cap = V4L2_FIELD_NONE; vivid_update_format_cap() 445 if (keep_controls \|\| !dev->colorspace) vivid_update_format_cap() 449 v4l2_ctrl_s_ctrl(dev->colorspace, VIVID_CS_170M); vivid_update_format_cap() 451 v4l2_ctrl_s_ctrl(dev->colorspace, VIVID_CS_709); vivid_update_format_cap() 452 v4l2_ctrl_s_ctrl(dev->real_rgb_range_cap, 1); vivid_update_format_cap() 454 v4l2_ctrl_s_ctrl(dev->colorspace, VIVID_CS_SRGB); vivid_update_format_cap() 455 v4l2_ctrl_s_ctrl(dev->real_rgb_range_cap, 0); vivid_update_format_cap() 457 tpg_s_rgb_range(&dev->tpg, v4l2_ctrl_g_ctrl(dev->rgb_range_cap)); vivid_update_format_cap() 460 vivid_update_quality(dev); vivid_update_format_cap() 461 tpg_reset_source(&dev->tpg, dev->src_rect.width, dev->src_rect.height, dev->field_cap); vivid_update_format_cap() 462 dev->crop_cap = dev->src_rect; vivid_update_format_cap() 463 dev->crop_bounds_cap = dev->src_rect; vivid_update_format_cap() 464 dev->compose_cap = dev->crop_cap; vivid_update_format_cap() 465 if (V4L2_FIELD_HAS_T_OR_B(dev->field_cap)) vivid_update_format_cap() 466 dev->compose_cap.height /= 2; vivid_update_format_cap() 467 dev->fmt_cap_rect = dev->compose_cap; vivid_update_format_cap() 468 tpg_s_video_aspect(&dev->tpg, vivid_get_video_aspect(dev)); vivid_update_format_cap() 469 tpg_s_pixel_aspect(&dev->tpg, vivid_get_pixel_aspect(dev)); vivid_update_format_cap() 470 tpg_update_mv_step(&dev->tpg); vivid_update_format_cap() 474 static enum v4l2_field vivid_field_cap(struct vivid_dev dev, enum v4l2_field field) vivid_field_cap() argument 476 if (vivid_is_sdtv_cap(dev)) { vivid_field_cap() 491 if (vivid_is_hdmi_cap(dev)) vivid_field_cap() 492 return dev->dv_timings_cap.bt.interlaced ? V4L2_FIELD_ALTERNATE : vivid_field_cap() 497 static unsigned vivid_colorspace_cap(struct vivid_dev dev) vivid_colorspace_cap() argument 499 if (!dev->loop_video \|\| vivid_is_webcam(dev) \|\| vivid_is_tv_cap(dev)) vivid_colorspace_cap() 500 return tpg_g_colorspace(&dev->tpg); vivid_colorspace_cap() 501 return dev->colorspace_out; vivid_colorspace_cap() 504 static unsigned vivid_ycbcr_enc_cap(struct vivid_dev dev) vivid_ycbcr_enc_cap() argument 506 if (!dev->loop_video \|\| vivid_is_webcam(dev) \|\| vivid_is_tv_cap(dev)) vivid_ycbcr_enc_cap() 507 return tpg_g_ycbcr_enc(&dev->tpg); vivid_ycbcr_enc_cap() 508 return dev->ycbcr_enc_out; vivid_ycbcr_enc_cap() 511 static unsigned vivid_quantization_cap(struct vivid_dev dev) vivid_quantization_cap() argument 513 if (!dev->loop_video \|\| vivid_is_webcam(dev) \|\| vivid_is_tv_cap(dev)) vivid_quantization_cap() 514 return tpg_g_quantization(&dev->tpg); vivid_quantization_cap() 515 return dev->quantization_out; vivid_quantization_cap() 521 struct vivid_dev dev = video_drvdata(file); vivid_g_fmt_vid_cap() local 525 mp->width = dev->fmt_cap_rect.width; vivid_g_fmt_vid_cap() 526 mp->height = dev->fmt_cap_rect.height; vivid_g_fmt_vid_cap() 527 mp->field = dev->field_cap; vivid_g_fmt_vid_cap() 528 mp->pixelformat = dev->fmt_cap->fourcc; vivid_g_fmt_vid_cap() 529 mp->colorspace = vivid_colorspace_cap(dev); vivid_g_fmt_vid_cap() 530 mp->ycbcr_enc = vivid_ycbcr_enc_cap(dev); vivid_g_fmt_vid_cap() 531 mp->quantization = vivid_quantization_cap(dev); vivid_g_fmt_vid_cap() 532 mp->num_planes = dev->fmt_cap->buffers; vivid_g_fmt_vid_cap() 534 mp->plane_fmt[p].bytesperline = tpg_g_bytesperline(&dev->tpg, p); vivid_g_fmt_vid_cap() 536 tpg_g_line_width(&dev->tpg, p) mp->height + vivid_g_fmt_vid_cap() 537 dev->fmt_cap->data_offset[p]; vivid_g_fmt_vid_cap() 547 struct vivid_dev dev = video_drvdata(file); vivid_try_fmt_vid_cap() local 554 fmt = vivid_get_format(dev, mp->pixelformat); vivid_try_fmt_vid_cap() 556 dprintk(dev, 1, "Fourcc format (0x%08x) unknown.\n", vivid_try_fmt_vid_cap() 559 fmt = vivid_get_format(dev, mp->pixelformat); vivid_try_fmt_vid_cap() 562 mp->field = vivid_field_cap(dev, mp->field); vivid_try_fmt_vid_cap() 563 if (vivid_is_webcam(dev)) { vivid_try_fmt_vid_cap() 569 } else if (vivid_is_sdtv_cap(dev)) { vivid_try_fmt_vid_cap() 571 h = (dev->std_cap & V4L2_STD_525_60) ? 480 : 576; vivid_try_fmt_vid_cap() 573 w = dev->src_rect.width; vivid_try_fmt_vid_cap() 574 h = dev->src_rect.height; vivid_try_fmt_vid_cap() 578 if (vivid_is_webcam(dev) \|\| vivid_try_fmt_vid_cap() 579 (!dev->has_scaler_cap && !dev->has_crop_cap && !dev->has_compose_cap)) { vivid_try_fmt_vid_cap() 587 if (dev->has_scaler_cap && !dev->has_compose_cap) { vivid_try_fmt_vid_cap() 591 } else if (!dev->has_scaler_cap && dev->has_crop_cap && !dev->has_compose_cap) { vivid_try_fmt_vid_cap() 592 rect_set_max_size(&r, &dev->src_rect); vivid_try_fmt_vid_cap() 593 } else if (!dev->has_scaler_cap && !dev->has_crop_cap) { vivid_try_fmt_vid_cap() 594 rect_set_min_size(&r, &dev->src_rect); vivid_try_fmt_vid_cap() 613 pfmt[p].sizeimage = tpg_calc_line_width(&dev->tpg, p, pfmt[p].bytesperline) vivid_try_fmt_vid_cap() 617 mp->colorspace = vivid_colorspace_cap(dev); vivid_try_fmt_vid_cap() 618 mp->ycbcr_enc = vivid_ycbcr_enc_cap(dev); vivid_try_fmt_vid_cap() 619 mp->quantization = vivid_quantization_cap(dev); vivid_try_fmt_vid_cap() 628 struct vivid_dev dev = video_drvdata(file); vivid_s_fmt_vid_cap() local 629 struct v4l2_rect crop = &dev->crop_cap; vivid_s_fmt_vid_cap() 630 struct v4l2_rect compose = &dev->compose_cap; vivid_s_fmt_vid_cap() 631 struct vb2_queue q = &dev->vb_vid_cap_q; vivid_s_fmt_vid_cap() 641 dprintk(dev, 1, "%s device busy\n", __func__); vivid_s_fmt_vid_cap() 645 if (dev->overlay_cap_owner && dev->fb_cap.fmt.pixelformat != mp->pixelformat) { vivid_s_fmt_vid_cap() 646 dprintk(dev, 1, "overlay is active, can't change pixelformat\n"); vivid_s_fmt_vid_cap() 650 dev->fmt_cap = vivid_get_format(dev, mp->pixelformat); vivid_s_fmt_vid_cap() 656 if (!vivid_is_webcam(dev) && vivid_s_fmt_vid_cap() 657 (dev->has_scaler_cap \|\| dev->has_crop_cap \|\| dev->has_compose_cap)) { vivid_s_fmt_vid_cap() 660 if (dev->has_scaler_cap) { vivid_s_fmt_vid_cap() 661 if (dev->has_compose_cap) vivid_s_fmt_vid_cap() 665 if (dev->has_crop_cap && !dev->has_compose_cap) { vivid_s_fmt_vid_cap() 679 rect_map_inside(crop, &dev->crop_bounds_cap); vivid_s_fmt_vid_cap() 680 } else if (dev->has_crop_cap) { vivid_s_fmt_vid_cap() 694 rect_map_inside(crop, &dev->crop_bounds_cap); vivid_s_fmt_vid_cap() 696 } else if (dev->has_crop_cap && !dev->has_compose_cap) { vivid_s_fmt_vid_cap() 699 rect_map_inside(crop, &dev->crop_bounds_cap); vivid_s_fmt_vid_cap() 703 } else if (!dev->has_crop_cap) { vivid_s_fmt_vid_cap() 708 rect_map_inside(crop, &dev->crop_bounds_cap); vivid_s_fmt_vid_cap() 716 } else if (vivid_is_webcam(dev)) { vivid_s_fmt_vid_cap() 722 dev->webcam_size_idx = i; vivid_s_fmt_vid_cap() 723 if (dev->webcam_ival_idx >= 2 * (3 - i)) vivid_s_fmt_vid_cap() 724 dev->webcam_ival_idx = 2 * (3 - i) - 1; vivid_s_fmt_vid_cap() 725 vivid_update_format_cap(dev, false); vivid_s_fmt_vid_cap() 734 dev->fmt_cap_rect.width = mp->width; vivid_s_fmt_vid_cap() 735 dev->fmt_cap_rect.height = mp->height; vivid_s_fmt_vid_cap() 736 tpg_s_buf_height(&dev->tpg, mp->height); vivid_s_fmt_vid_cap() 737 tpg_s_fourcc(&dev->tpg, dev->fmt_cap->fourcc); vivid_s_fmt_vid_cap() 738 for (p = 0; p < tpg_g_buffers(&dev->tpg); p++) vivid_s_fmt_vid_cap() 739 tpg_s_bytesperline(&dev->tpg, p, mp->plane_fmt[p].bytesperline); vivid_s_fmt_vid_cap() 740 dev->field_cap = mp->field; vivid_s_fmt_vid_cap() 741 if (dev->field_cap == V4L2_FIELD_ALTERNATE) vivid_s_fmt_vid_cap() 742 tpg_s_field(&dev->tpg, V4L2_FIELD_TOP, true); vivid_s_fmt_vid_cap() 744 tpg_s_field(&dev->tpg, dev->field_cap, false); vivid_s_fmt_vid_cap() 745 tpg_s_crop_compose(&dev->tpg, &dev->crop_cap, &dev->compose_cap); vivid_s_fmt_vid_cap() 746 if (vivid_is_sdtv_cap(dev)) vivid_s_fmt_vid_cap() 747 dev->tv_field_cap = mp->field; vivid_s_fmt_vid_cap() 748 tpg_update_mv_step(&dev->tpg); vivid_s_fmt_vid_cap() 755 struct vivid_dev dev = video_drvdata(file); vidioc_g_fmt_vid_cap_mplane() local 757 if (!dev->multiplanar) vidioc_g_fmt_vid_cap_mplane() 765 struct vivid_dev dev = video_drvdata(file); vidioc_try_fmt_vid_cap_mplane() local 767 if (!dev->multiplanar) vidioc_try_fmt_vid_cap_mplane() 775 struct vivid_dev dev = video_drvdata(file); vidioc_s_fmt_vid_cap_mplane() local 777 if (!dev->multiplanar) vidioc_s_fmt_vid_cap_mplane() 785 struct vivid_dev dev = video_drvdata(file); vidioc_g_fmt_vid_cap() local 787 if (dev->multiplanar) vidioc_g_fmt_vid_cap() 795 struct vivid_dev dev = video_drvdata(file); vidioc_try_fmt_vid_cap() local 797 if (dev->multiplanar) vidioc_try_fmt_vid_cap() 805 struct vivid_dev dev = video_drvdata(file); vidioc_s_fmt_vid_cap() local 807 if (dev->multiplanar) vidioc_s_fmt_vid_cap() 815 struct vivid_dev dev = video_drvdata(file); vivid_vid_cap_g_selection() local 817 if (!dev->has_crop_cap && !dev->has_compose_cap) vivid_vid_cap_g_selection() 821 if (vivid_is_webcam(dev)) vivid_vid_cap_g_selection() 827 if (!dev->has_crop_cap) vivid_vid_cap_g_selection() 829 sel->r = dev->crop_cap; vivid_vid_cap_g_selection() 833 if (!dev->has_crop_cap) vivid_vid_cap_g_selection() 835 sel->r = dev->src_rect; vivid_vid_cap_g_selection() 838 if (!dev->has_compose_cap) vivid_vid_cap_g_selection() 843 if (!dev->has_compose_cap) vivid_vid_cap_g_selection() 845 sel->r = dev->compose_cap; vivid_vid_cap_g_selection() 848 if (!dev->has_compose_cap) vivid_vid_cap_g_selection() 850 sel->r = dev->fmt_cap_rect; vivid_vid_cap_g_selection() 860 struct vivid_dev dev = video_drvdata(file); vivid_vid_cap_s_selection() local 861 struct v4l2_rect crop = &dev->crop_cap; vivid_vid_cap_s_selection() 862 struct v4l2_rect compose = &dev->compose_cap; vivid_vid_cap_s_selection() 863 unsigned factor = V4L2_FIELD_HAS_T_OR_B(dev->field_cap) ? 2 : 1; vivid_vid_cap_s_selection() 866 if (!dev->has_crop_cap && !dev->has_compose_cap) vivid_vid_cap_s_selection() 870 if (vivid_is_webcam(dev)) vivid_vid_cap_s_selection() 875 if (!dev->has_crop_cap) vivid_vid_cap_s_selection() 881 rect_set_max_size(&s->r, &dev->src_rect); vivid_vid_cap_s_selection() 882 rect_map_inside(&s->r, &dev->crop_bounds_cap); vivid_vid_cap_s_selection() 885 if (dev->has_scaler_cap) { vivid_vid_cap_s_selection() 886 struct v4l2_rect fmt = dev->fmt_cap_rect; vivid_vid_cap_s_selection() 899 if (!dev->has_compose_cap) vivid_vid_cap_s_selection() 901 if (!rect_same_size(&dev->fmt_cap_rect, &fmt) && vivid_vid_cap_s_selection() 902 vb2_is_busy(&dev->vb_vid_cap_q)) vivid_vid_cap_s_selection() 904 if (dev->has_compose_cap) { vivid_vid_cap_s_selection() 908 dev->fmt_cap_rect = fmt; vivid_vid_cap_s_selection() 909 tpg_s_buf_height(&dev->tpg, fmt.height); vivid_vid_cap_s_selection() 910 } else if (dev->has_compose_cap) { vivid_vid_cap_s_selection() 911 struct v4l2_rect fmt = dev->fmt_cap_rect; vivid_vid_cap_s_selection() 914 if (!rect_same_size(&dev->fmt_cap_rect, &fmt) && vivid_vid_cap_s_selection() 915 vb2_is_busy(&dev->vb_vid_cap_q)) vivid_vid_cap_s_selection() 917 dev->fmt_cap_rect = fmt; vivid_vid_cap_s_selection() 918 tpg_s_buf_height(&dev->tpg, fmt.height); vivid_vid_cap_s_selection() 920 rect_map_inside(compose, &dev->fmt_cap_rect); vivid_vid_cap_s_selection() 922 if (!rect_same_size(&s->r, &dev->fmt_cap_rect) && vivid_vid_cap_s_selection() 923 vb2_is_busy(&dev->vb_vid_cap_q)) vivid_vid_cap_s_selection() 925 rect_set_size_to(&dev->fmt_cap_rect, &s->r); vivid_vid_cap_s_selection() 927 rect_map_inside(compose, &dev->fmt_cap_rect); vivid_vid_cap_s_selection() 928 tpg_s_buf_height(&dev->tpg, dev->fmt_cap_rect.height); vivid_vid_cap_s_selection() 935 if (!dev->has_compose_cap) vivid_vid_cap_s_selection() 941 rect_set_max_size(&s->r, &dev->fmt_cap_rect); vivid_vid_cap_s_selection() 942 if (dev->has_scaler_cap) { vivid_vid_cap_s_selection() 945 dev->src_rect.width * MAX_ZOOM, vivid_vid_cap_s_selection() 946 (dev->src_rect.height / factor) * MAX_ZOOM vivid_vid_cap_s_selection() 950 if (dev->has_crop_cap) { vivid_vid_cap_s_selection() 964 rect_map_inside(crop, &dev->crop_bounds_cap); vivid_vid_cap_s_selection() 966 } else if (dev->has_crop_cap) { vivid_vid_cap_s_selection() 969 rect_set_max_size(&s->r, &dev->src_rect); vivid_vid_cap_s_selection() 971 rect_map_inside(crop, &dev->crop_bounds_cap); vivid_vid_cap_s_selection() 975 rect_set_size_to(&s->r, &dev->src_rect); vivid_vid_cap_s_selection() 978 rect_map_inside(&s->r, &dev->fmt_cap_rect); vivid_vid_cap_s_selection() 979 if (dev->bitmap_cap && (compose->width != s->r.width \|\| vivid_vid_cap_s_selection() 981 kfree(dev->bitmap_cap); vivid_vid_cap_s_selection() 982 dev->bitmap_cap = NULL; vivid_vid_cap_s_selection() 990 tpg_s_crop_compose(&dev->tpg, crop, compose); vivid_vid_cap_s_selection() 997 struct vivid_dev dev = video_drvdata(file); vivid_vid_cap_cropcap() local 1002 switch (vivid_get_pixel_aspect(dev)) { vivid_vid_cap_cropcap() 1022 struct vivid_dev dev = video_drvdata(file); vidioc_enum_fmt_vid_overlay() local 1025 if (dev->multiplanar) vidioc_enum_fmt_vid_overlay() 1041 struct vivid_dev dev = video_drvdata(file); vidioc_g_fmt_vid_overlay() local 1042 const struct v4l2_rect compose = &dev->compose_cap; vidioc_g_fmt_vid_overlay() 1046 if (dev->multiplanar) vidioc_g_fmt_vid_overlay() 1049 win->w.top = dev->overlay_cap_top; vidioc_g_fmt_vid_overlay() 1050 win->w.left = dev->overlay_cap_left; vidioc_g_fmt_vid_overlay() 1053 win->field = dev->overlay_cap_field; vidioc_g_fmt_vid_overlay() 1054 win->clipcount = dev->clipcount_cap; vidioc_g_fmt_vid_overlay() 1055 if (clipcount > dev->clipcount_cap) vidioc_g_fmt_vid_overlay() 1056 clipcount = dev->clipcount_cap; vidioc_g_fmt_vid_overlay() 1057 if (dev->bitmap_cap == NULL) vidioc_g_fmt_vid_overlay() 1060 if (copy_to_user(win->bitmap, dev->bitmap_cap, vidioc_g_fmt_vid_overlay() 1065 if (copy_to_user(win->clips, dev->clips_cap, vidioc_g_fmt_vid_overlay() 1066 clipcount * sizeof(dev->clips_cap[0]))) vidioc_g_fmt_vid_overlay() 1075 struct vivid_dev dev = video_drvdata(file); vidioc_try_fmt_vid_overlay() local 1076 const struct v4l2_rect compose = &dev->compose_cap; vidioc_try_fmt_vid_overlay() 1080 if (dev->multiplanar) vidioc_try_fmt_vid_overlay() 1084 -dev->fb_cap.fmt.width, dev->fb_cap.fmt.width); vidioc_try_fmt_vid_overlay() 1086 -dev->fb_cap.fmt.height, dev->fb_cap.fmt.height); vidioc_try_fmt_vid_overlay() 1098 if (copy_from_user(dev->try_clips_cap, win->clips, vidioc_try_fmt_vid_overlay() 1099 win->clipcount * sizeof(dev->clips_cap[0]))) vidioc_try_fmt_vid_overlay() 1102 struct v4l2_rect r = &dev->try_clips_cap[i].c; vidioc_try_fmt_vid_overlay() 1104 r->top = clamp_t(s32, r->top, 0, dev->fb_cap.fmt.height - 1); vidioc_try_fmt_vid_overlay() 1105 r->height = clamp_t(s32, r->height, 1, dev->fb_cap.fmt.height - r->top); vidioc_try_fmt_vid_overlay() 1106 r->left = clamp_t(u32, r->left, 0, dev->fb_cap.fmt.width - 1); vidioc_try_fmt_vid_overlay() 1107 r->width = clamp_t(u32, r->width, 1, dev->fb_cap.fmt.width - r->left); vidioc_try_fmt_vid_overlay() 1114 struct v4l2_rect r1 = &dev->try_clips_cap[i].c; vidioc_try_fmt_vid_overlay() 1117 struct v4l2_rect r2 = &dev->try_clips_cap[j].c; vidioc_try_fmt_vid_overlay() 1123 if (copy_to_user(win->clips, dev->try_clips_cap, vidioc_try_fmt_vid_overlay() 1124 win->clipcount sizeof(dev->clips_cap[0]))) vidioc_try_fmt_vid_overlay() 1133 struct vivid_dev dev = video_drvdata(file); vidioc_s_fmt_vid_overlay() local 1134 const struct v4l2_rect compose = &dev->compose_cap; vidioc_s_fmt_vid_overlay() 1138 unsigned clips_size = win->clipcount * sizeof(dev->clips_cap[0]); vidioc_s_fmt_vid_overlay() 1155 dev->overlay_cap_top = win->w.top; vidioc_s_fmt_vid_overlay() 1156 dev->overlay_cap_left = win->w.left; vidioc_s_fmt_vid_overlay() 1157 dev->overlay_cap_field = win->field; vidioc_s_fmt_vid_overlay() 1158 vfree(dev->bitmap_cap); vidioc_s_fmt_vid_overlay() 1159 dev->bitmap_cap = new_bitmap; vidioc_s_fmt_vid_overlay() 1160 dev->clipcount_cap = win->clipcount; vidioc_s_fmt_vid_overlay() 1161 if (dev->clipcount_cap) vidioc_s_fmt_vid_overlay() 1162 memcpy(dev->clips_cap, dev->try_clips_cap, clips_size); vidioc_s_fmt_vid_overlay() 1168 struct vivid_dev dev = video_drvdata(file); vivid_vid_cap_overlay() local 1170 if (dev->multiplanar) vivid_vid_cap_overlay() 1173 if (i && dev->fb_vbase_cap == NULL) vivid_vid_cap_overlay() 1176 if (i && dev->fb_cap.fmt.pixelformat != dev->fmt_cap->fourcc) { vivid_vid_cap_overlay() 1177 dprintk(dev, 1, "mismatch between overlay and video capture pixelformats\n"); vivid_vid_cap_overlay() 1181 if (dev->overlay_cap_owner && dev->overlay_cap_owner != fh) vivid_vid_cap_overlay() 1183 dev->overlay_cap_owner = i ? fh : NULL; vivid_vid_cap_overlay() 1190 struct vivid_dev dev = video_drvdata(file); vivid_vid_cap_g_fbuf() local 1192 if (dev->multiplanar) vivid_vid_cap_g_fbuf() 1195 a = dev->fb_cap; vivid_vid_cap_g_fbuf() 1208 struct vivid_dev dev = video_drvdata(file); vivid_vid_cap_s_fbuf() local 1211 if (dev->multiplanar) vivid_vid_cap_s_fbuf() 1217 if (dev->overlay_cap_owner) vivid_vid_cap_s_fbuf() 1221 dev->fb_cap.base = NULL; vivid_vid_cap_s_fbuf() 1222 dev->fb_vbase_cap = NULL; vivid_vid_cap_s_fbuf() 1228 fmt = vivid_get_format(dev, a->fmt.pixelformat); vivid_vid_cap_s_fbuf() 1236 dev->fb_vbase_cap = phys_to_virt((unsigned long)a->base); vivid_vid_cap_s_fbuf() 1237 dev->fb_cap = a; vivid_vid_cap_s_fbuf() 1238 dev->overlay_cap_left = clamp_t(int, dev->overlay_cap_left, vivid_vid_cap_s_fbuf() 1239 -dev->fb_cap.fmt.width, dev->fb_cap.fmt.width); vivid_vid_cap_s_fbuf() 1240 dev->overlay_cap_top = clamp_t(int, dev->overlay_cap_top, vivid_vid_cap_s_fbuf() 1241 -dev->fb_cap.fmt.height, dev->fb_cap.fmt.height); vivid_vid_cap_s_fbuf() 1253 struct vivid_dev dev = video_drvdata(file); vidioc_enum_input() local 1255 if (inp->index >= dev->num_inputs) vidioc_enum_input() 1259 switch (dev->input_type[inp->index]) { vidioc_enum_input() 1262 dev->input_name_counter[inp->index]); vidioc_enum_input() 1267 dev->input_name_counter[inp->index]); vidioc_enum_input() 1270 if (dev->has_audio_inputs) vidioc_enum_input() 1276 dev->input_name_counter[inp->index]); vidioc_enum_input() 1278 if (dev->has_audio_inputs) vidioc_enum_input() 1284 dev->input_name_counter[inp->index]); vidioc_enum_input() 1286 if (dev->edid_blocks == 0 \|\| vidioc_enum_input() 1287 dev->dv_timings_signal_mode == NO_SIGNAL) vidioc_enum_input() 1289 else if (dev->dv_timings_signal_mode == NO_LOCK \|\| vidioc_enum_input() 1290 dev->dv_timings_signal_mode == OUT_OF_RANGE) vidioc_enum_input() 1294 if (dev->sensor_hflip) vidioc_enum_input() 1296 if (dev->sensor_vflip) vidioc_enum_input() 1298 if (dev->input == inp->index && vivid_is_sdtv_cap(dev)) { vidioc_enum_input() 1299 if (dev->std_signal_mode == NO_SIGNAL) { vidioc_enum_input() 1301 } else if (dev->std_signal_mode == NO_LOCK) { vidioc_enum_input() 1303 } else if (vivid_is_tv_cap(dev)) { vidioc_enum_input() 1304 switch (tpg_g_quality(&dev->tpg)) { vidioc_enum_input() 1321 struct vivid_dev dev = video_drvdata(file); vidioc_g_input() local 1323 i = dev->input; vidioc_g_input() 1329 struct vivid_dev dev = video_drvdata(file); vidioc_s_input() local 1330 struct v4l2_bt_timings bt = &dev->dv_timings_cap.bt; vidioc_s_input() 1333 if (i >= dev->num_inputs) vidioc_s_input() 1336 if (i == dev->input) vidioc_s_input() 1339 if (vb2_is_busy(&dev->vb_vid_cap_q) \|\| vb2_is_busy(&dev->vb_vbi_cap_q)) vidioc_s_input() 1342 dev->input = i; vidioc_s_input() 1343 dev->vid_cap_dev.tvnorms = 0; vidioc_s_input() 1344 if (dev->input_type[i] == TV \|\| dev->input_type[i] == SVID) { vidioc_s_input() 1345 dev->tv_audio_input = (dev->input_type[i] == TV) ? 0 : 1; vidioc_s_input() 1346 dev->vid_cap_dev.tvnorms = V4L2_STD_ALL; vidioc_s_input() 1348 dev->vbi_cap_dev.tvnorms = dev->vid_cap_dev.tvnorms; vidioc_s_input() 1349 vivid_update_format_cap(dev, false); vidioc_s_input() 1351 if (dev->colorspace) { vidioc_s_input() 1352 switch (dev->input_type[i]) { vidioc_s_input() 1354 v4l2_ctrl_s_ctrl(dev->colorspace, VIVID_CS_SRGB); vidioc_s_input() 1358 v4l2_ctrl_s_ctrl(dev->colorspace, VIVID_CS_170M); vidioc_s_input() 1362 if (dev->src_rect.width == 720 && dev->src_rect.height <= 576) vidioc_s_input() 1363 v4l2_ctrl_s_ctrl(dev->colorspace, VIVID_CS_170M); vidioc_s_input() 1365 v4l2_ctrl_s_ctrl(dev->colorspace, VIVID_CS_709); vidioc_s_input() 1367 v4l2_ctrl_s_ctrl(dev->colorspace, VIVID_CS_SRGB); vidioc_s_input() 1380 brightness = 128 * i + dev->input_brightness[i]; vidioc_s_input() 1381 v4l2_ctrl_modify_range(dev->brightness, vidioc_s_input() 1383 v4l2_ctrl_s_ctrl(dev->brightness, brightness); vidioc_s_input() 1397 struct vivid_dev dev = video_drvdata(file); vidioc_g_audio() local 1399 if (!vivid_is_sdtv_cap(dev)) vidioc_g_audio() 1401 vin = vivid_audio_inputs[dev->tv_audio_input]; vidioc_g_audio() 1407 struct vivid_dev dev = video_drvdata(file); vidioc_s_audio() local 1409 if (!vivid_is_sdtv_cap(dev)) vidioc_s_audio() 1413 dev->tv_audio_input = vin->index; vidioc_s_audio() 1419 struct vivid_dev dev = video_drvdata(file); vivid_video_g_frequency() local 1423 vf->frequency = dev->tv_freq; vivid_video_g_frequency() 1429 struct vivid_dev dev = video_drvdata(file); vivid_video_s_frequency() local 1433 dev->tv_freq = clamp_t(unsigned, vf->frequency, MIN_TV_FREQ, MAX_TV_FREQ); vivid_video_s_frequency() 1434 if (vivid_is_tv_cap(dev)) vivid_video_s_frequency() 1435 vivid_update_quality(dev); vivid_video_s_frequency() 1441 struct vivid_dev dev = video_drvdata(file); vivid_video_s_tuner() local 1447 dev->tv_audmode = vt->audmode; vivid_video_s_tuner() 1453 struct vivid_dev dev = video_drvdata(file); vivid_video_g_tuner() local 1461 vt->audmode = dev->tv_audmode; vivid_video_g_tuner() 1464 qual = vivid_get_quality(dev, &vt->afc); vivid_video_g_tuner() 1476 unsigned channel_nr = dev->tv_freq / (6 16); vivid_video_g_tuner() 1477 unsigned options = (dev->std_cap & V4L2_STD_NTSC_M) ? 4 : 3; vivid_video_g_tuner() 1487 if (dev->std_cap & V4L2_STD_NTSC_M) vivid_video_g_tuner() 1543 struct vivid_dev dev = video_drvdata(file); vidioc_querystd() local 1545 if (!vivid_is_sdtv_cap(dev)) vidioc_querystd() 1547 if (dev->std_signal_mode == NO_SIGNAL \|\| vidioc_querystd() 1548 dev->std_signal_mode == NO_LOCK) { vidioc_querystd() 1552 if (vivid_is_tv_cap(dev) && tpg_g_quality(&dev->tpg) == TPG_QUAL_NOISE) { vidioc_querystd() 1554 } else if (dev->std_signal_mode == CURRENT_STD) { vidioc_querystd() 1555 id = dev->std_cap; vidioc_querystd() 1556 } else if (dev->std_signal_mode == SELECTED_STD) { vidioc_querystd() 1557 id = dev->query_std; vidioc_querystd() 1559 id = vivid_standard[dev->query_std_last]; vidioc_querystd() 1560 dev->query_std_last = (dev->query_std_last + 1) % ARRAY_SIZE(vivid_standard); vidioc_querystd() 1568 struct vivid_dev dev = video_drvdata(file); vivid_vid_cap_s_std() local 1570 if (!vivid_is_sdtv_cap(dev)) vivid_vid_cap_s_std() 1572 if (dev->std_cap == id) vivid_vid_cap_s_std() 1574 if (vb2_is_busy(&dev->vb_vid_cap_q) \|\| vb2_is_busy(&dev->vb_vbi_cap_q)) vivid_vid_cap_s_std() 1576 dev->std_cap = id; vivid_vid_cap_s_std() 1577 vivid_update_format_cap(dev, false); vivid_vid_cap_s_std() 1643 struct vivid_dev dev = video_drvdata(file); vivid_vid_cap_s_dv_timings() local 1645 if (!vivid_is_hdmi_cap(dev)) vivid_vid_cap_s_dv_timings() 1652 if (v4l2_match_dv_timings(timings, &dev->dv_timings_cap, 0)) vivid_vid_cap_s_dv_timings() 1654 if (vb2_is_busy(&dev->vb_vid_cap_q)) vivid_vid_cap_s_dv_timings() 1657 dev->dv_timings_cap = timings; vivid_vid_cap_s_dv_timings() 1658 vivid_update_format_cap(dev, false); vivid_vid_cap_s_dv_timings() 1665 struct vivid_dev dev = video_drvdata(file); vidioc_query_dv_timings() local 1667 if (!vivid_is_hdmi_cap(dev)) vidioc_query_dv_timings() 1669 if (dev->dv_timings_signal_mode == NO_SIGNAL \|\| vidioc_query_dv_timings() 1670 dev->edid_blocks == 0) vidioc_query_dv_timings() 1672 if (dev->dv_timings_signal_mode == NO_LOCK) vidioc_query_dv_timings() 1674 if (dev->dv_timings_signal_mode == OUT_OF_RANGE) { vidioc_query_dv_timings() 1678 if (dev->dv_timings_signal_mode == CURRENT_DV_TIMINGS) { vidioc_query_dv_timings() 1679 timings = dev->dv_timings_cap; vidioc_query_dv_timings() 1680 } else if (dev->dv_timings_signal_mode == SELECTED_DV_TIMINGS) { vidioc_query_dv_timings() 1681 timings = v4l2_dv_timings_presets[dev->query_dv_timings]; vidioc_query_dv_timings() 1683 timings = v4l2_dv_timings_presets[dev->query_dv_timings_last]; vidioc_query_dv_timings() 1684 dev->query_dv_timings_last = (dev->query_dv_timings_last + 1) % vidioc_query_dv_timings() 1685 dev->query_dv_timings_size; vidioc_query_dv_timings() 1693 struct vivid_dev dev = video_drvdata(file); vidioc_s_edid() local 1696 if (edid->pad >= dev->num_inputs) vidioc_s_edid() 1698 if (dev->input_type[edid->pad] != HDMI \|\| edid->start_block) vidioc_s_edid() 1701 dev->edid_blocks = 0; vidioc_s_edid() 1704 if (edid->blocks > dev->edid_max_blocks) { vidioc_s_edid() 1705 edid->blocks = dev->edid_max_blocks; vidioc_s_edid() 1708 dev->edid_blocks = edid->blocks; vidioc_s_edid() 1709 memcpy(dev->edid, edid->edid, edid->blocks * 128); vidioc_s_edid() 1716 struct vivid_dev dev = video_drvdata(file); vidioc_enum_framesizes() local 1718 if (!vivid_is_webcam(dev) && !dev->has_scaler_cap) vidioc_enum_framesizes() 1720 if (vivid_get_format(dev, fsize->pixel_format) == NULL) vidioc_enum_framesizes() 1722 if (vivid_is_webcam(dev)) { vidioc_enum_framesizes() 1745 struct vivid_dev dev = video_drvdata(file); vidioc_enum_frameintervals() local 1749 fmt = vivid_get_format(dev, fival->pixel_format); vidioc_enum_frameintervals() 1753 if (!vivid_is_webcam(dev)) { vidioc_enum_frameintervals() 1761 fival->discrete = dev->timeperframe_vid_cap; vidioc_enum_frameintervals() 1781 struct vivid_dev dev = video_drvdata(file); vivid_vid_cap_g_parm() local 1783 if (parm->type != (dev->multiplanar ? vivid_vid_cap_g_parm() 1789 parm->parm.capture.timeperframe = dev->timeperframe_vid_cap; vivid_vid_cap_g_parm() 1800 struct vivid_dev dev = video_drvdata(file); vivid_vid_cap_s_parm() local 1801 unsigned ival_sz = 2 * (3 - dev->webcam_size_idx); vivid_vid_cap_s_parm() 1805 if (parm->type != (dev->multiplanar ? vivid_vid_cap_s_parm() 1809 if (!vivid_is_webcam(dev)) vivid_vid_cap_s_parm() 1821 dev->webcam_ival_idx = i; vivid_vid_cap_s_parm() 1822 tpf = webcam_intervals[dev->webcam_ival_idx]; vivid_vid_cap_s_parm() 1827 dev->cap_seq_resync = true; vivid_vid_cap_s_parm() 1828 dev->timeperframe_vid_cap = tpf; vivid_vid_cap_s_parm()
H A D	vivid-kthread-cap.c	54 static inline v4l2_std_id vivid_get_std_cap(const struct vivid_dev dev) vivid_get_std_cap() argument 56 if (vivid_is_sdtv_cap(dev)) vivid_get_std_cap() 57 return dev->std_cap; vivid_get_std_cap() 61 static void copy_pix(struct vivid_dev dev, int win_y, int win_x, copy_pix() argument 65 int left = dev->overlay_out_left; copy_pix() 66 int top = dev->overlay_out_top; copy_pix() 73 if (dev->bitmap_out) { copy_pix() 74 const u8 p = dev->bitmap_out; copy_pix() 75 unsigned stride = (dev->compose_out.width + 7) / 8; copy_pix() 77 win_x -= dev->compose_out.left; copy_pix() 78 win_y -= dev->compose_out.top; copy_pix() 83 for (i = 0; i < dev->clipcount_out; i++) { copy_pix() 84 struct v4l2_rect r = &dev->clips_out[i].c; copy_pix() 90 if ((dev->fbuf_out_flags & V4L2_FBUF_FLAG_CHROMAKEY) && copy_pix() 91 osd != dev->chromakey_out) copy_pix() 93 if ((dev->fbuf_out_flags & V4L2_FBUF_FLAG_SRC_CHROMAKEY) && copy_pix() 94 out == dev->chromakey_out) copy_pix() 96 if (dev->fmt_cap->alpha_mask) { copy_pix() 97 if ((dev->fbuf_out_flags & V4L2_FBUF_FLAG_GLOBAL_ALPHA) && copy_pix() 98 dev->global_alpha_out) copy_pix() 100 if ((dev->fbuf_out_flags & V4L2_FBUF_FLAG_LOCAL_ALPHA) && copy_pix() 101 cap & dev->fmt_cap->alpha_mask) copy_pix() 103 if ((dev->fbuf_out_flags & V4L2_FBUF_FLAG_LOCAL_INV_ALPHA) && copy_pix() 104 !(cap & dev->fmt_cap->alpha_mask)) copy_pix() 110 static void blend_line(struct vivid_dev dev, unsigned y_offset, unsigned x_offset, blend_line() argument 117 copy_pix(dev, y_offset, x_offset + x, blend_line() 175 static void vivid_precalc_copy_rects(struct vivid_dev dev) vivid_precalc_copy_rects() argument 179 0, 0, dev->display_width, dev->display_height vivid_precalc_copy_rects() 183 dev->overlay_out_left, dev->overlay_out_top, vivid_precalc_copy_rects() 184 dev->compose_out.width, dev->compose_out.height vivid_precalc_copy_rects() 187 dev->loop_vid_copy = rect_intersect(&dev->crop_cap, &dev->compose_out); vivid_precalc_copy_rects() 189 dev->loop_vid_out = dev->loop_vid_copy; vivid_precalc_copy_rects() 190 rect_scale(&dev->loop_vid_out, &dev->compose_out, &dev->crop_out); vivid_precalc_copy_rects() 191 dev->loop_vid_out.left += dev->crop_out.left; vivid_precalc_copy_rects() 192 dev->loop_vid_out.top += dev->crop_out.top; vivid_precalc_copy_rects() 194 dev->loop_vid_cap = dev->loop_vid_copy; vivid_precalc_copy_rects() 195 rect_scale(&dev->loop_vid_cap, &dev->crop_cap, &dev->compose_cap); vivid_precalc_copy_rects() 197 dprintk(dev, 1, vivid_precalc_copy_rects() 199 dev->loop_vid_copy.width, dev->loop_vid_copy.height, vivid_precalc_copy_rects() 200 dev->loop_vid_copy.left, dev->loop_vid_copy.top, vivid_precalc_copy_rects() 201 dev->loop_vid_out.width, dev->loop_vid_out.height, vivid_precalc_copy_rects() 202 dev->loop_vid_out.left, dev->loop_vid_out.top, vivid_precalc_copy_rects() 203 dev->loop_vid_cap.width, dev->loop_vid_cap.height, vivid_precalc_copy_rects() 204 dev->loop_vid_cap.left, dev->loop_vid_cap.top); vivid_precalc_copy_rects() 209 r_overlay.left += dev->compose_out.left - dev->overlay_out_left; vivid_precalc_copy_rects() 210 r_overlay.top += dev->compose_out.top - dev->overlay_out_top; vivid_precalc_copy_rects() 212 dev->loop_vid_overlay = rect_intersect(&r_overlay, &dev->loop_vid_copy); vivid_precalc_copy_rects() 213 dev->loop_fb_copy = dev->loop_vid_overlay; vivid_precalc_copy_rects() 215 / shift dev->loop_fb_copy back again to the fb origin / vivid_precalc_copy_rects() 216 dev->loop_fb_copy.left -= dev->compose_out.left - dev->overlay_out_left; vivid_precalc_copy_rects() 217 dev->loop_fb_copy.top -= dev->compose_out.top - dev->overlay_out_top; vivid_precalc_copy_rects() 219 dev->loop_vid_overlay_cap = dev->loop_vid_overlay; vivid_precalc_copy_rects() 220 rect_scale(&dev->loop_vid_overlay_cap, &dev->crop_cap, &dev->compose_cap); vivid_precalc_copy_rects() 222 dprintk(dev, 1, vivid_precalc_copy_rects() 224 dev->loop_fb_copy.width, dev->loop_fb_copy.height, vivid_precalc_copy_rects() 225 dev->loop_fb_copy.left, dev->loop_fb_copy.top, vivid_precalc_copy_rects() 226 dev->loop_vid_overlay.width, dev->loop_vid_overlay.height, vivid_precalc_copy_rects() 227 dev->loop_vid_overlay.left, dev->loop_vid_overlay.top, vivid_precalc_copy_rects() 228 dev->loop_vid_overlay_cap.width, dev->loop_vid_overlay_cap.height, vivid_precalc_copy_rects() 229 dev->loop_vid_overlay_cap.left, dev->loop_vid_overlay_cap.top); vivid_precalc_copy_rects() 246 static int vivid_copy_buffer(struct vivid_dev dev, unsigned p, u8 vcapbuf, vivid_copy_buffer() argument 249 bool blank = dev->must_blank[vid_cap_buf->vb.v4l2_buf.index]; vivid_copy_buffer() 250 struct tpg_data tpg = &dev->tpg; vivid_copy_buffer() 252 unsigned vdiv = dev->fmt_out->vdownsampling[p]; vivid_copy_buffer() 254 unsigned img_width = tpg_hdiv(tpg, p, dev->compose_cap.width); vivid_copy_buffer() 255 unsigned img_height = dev->compose_cap.height; vivid_copy_buffer() 257 unsigned stride_out = dev->bytesperline_out[p]; vivid_copy_buffer() 258 unsigned stride_osd = dev->display_byte_stride; vivid_copy_buffer() 263 bool blend = dev->bitmap_out \|\| dev->clipcount_out \|\| dev->fbuf_out_flags; vivid_copy_buffer() 273 unsigned vid_cap_left = tpg_hdiv(tpg, p, dev->loop_vid_cap.left); vivid_copy_buffer() 277 vid_out_int_part = dev->loop_vid_out.height / dev->loop_vid_cap.height; vivid_copy_buffer() 278 vid_out_fract_part = dev->loop_vid_out.height % dev->loop_vid_cap.height; vivid_copy_buffer() 280 if (!list_empty(&dev->vid_out_active)) vivid_copy_buffer() 281 vid_out_buf = list_entry(dev->vid_out_active.next, vivid_copy_buffer() 289 dev->bytesperline_out, dev->fmt_out_rect.height); vivid_copy_buffer() 290 if (p < dev->fmt_out->buffers) vivid_copy_buffer() 292 voutbuf += tpg_hdiv(tpg, p, dev->loop_vid_out.left) + vivid_copy_buffer() 293 (dev->loop_vid_out.top / vdiv) * stride_out; vivid_copy_buffer() 294 vcapbuf += tpg_hdiv(tpg, p, dev->compose_cap.left) + vivid_copy_buffer() 295 (dev->compose_cap.top / vdiv) * stride_cap; vivid_copy_buffer() 297 if (dev->loop_vid_copy.width == 0 \|\| dev->loop_vid_copy.height == 0) { vivid_copy_buffer() 307 if (dev->overlay_out_enabled && vivid_copy_buffer() 308 dev->loop_vid_overlay.width && dev->loop_vid_overlay.height) { vivid_copy_buffer() 309 vosdbuf = dev->video_vbase; vivid_copy_buffer() 310 vosdbuf += (dev->loop_fb_copy.left * twopixsize) / 2 + vivid_copy_buffer() 311 dev->loop_fb_copy.top * stride_osd; vivid_copy_buffer() 312 vid_overlay_int_part = dev->loop_vid_overlay.height / vivid_copy_buffer() 313 dev->loop_vid_overlay_cap.height; vivid_copy_buffer() 314 vid_overlay_fract_part = dev->loop_vid_overlay.height % vivid_copy_buffer() 315 dev->loop_vid_overlay_cap.height; vivid_copy_buffer() 318 vid_cap_right = tpg_hdiv(tpg, p, dev->loop_vid_cap.left + dev->loop_vid_cap.width); vivid_copy_buffer() 320 quick = dev->loop_vid_out.width == dev->loop_vid_cap.width; vivid_copy_buffer() 322 dev->cur_scaled_line = dev->loop_vid_out.height; vivid_copy_buffer() 325 bool osdline = vosdbuf && y >= dev->loop_vid_overlay_cap.top && vivid_copy_buffer() 326 y < dev->loop_vid_overlay_cap.top + dev->loop_vid_overlay_cap.height; vivid_copy_buffer() 332 if (y < dev->loop_vid_cap.top \|\| vivid_copy_buffer() 333 y >= dev->loop_vid_cap.top + dev->loop_vid_cap.height) { vivid_copy_buffer() 339 if (dev->loop_vid_cap.left) vivid_copy_buffer() 350 tpg_hdiv(tpg, p, dev->loop_vid_cap.width)); vivid_copy_buffer() 353 if (dev->cur_scaled_line == vid_out_y) { vivid_copy_buffer() 354 memcpy(vcapbuf + vid_cap_left, dev->scaled_line, vivid_copy_buffer() 355 tpg_hdiv(tpg, p, dev->loop_vid_cap.width)); vivid_copy_buffer() 359 scale_line(voutbuf + vid_out_y * stride_out, dev->scaled_line, vivid_copy_buffer() 360 tpg_hdiv(tpg, p, dev->loop_vid_out.width), vivid_copy_buffer() 361 tpg_hdiv(tpg, p, dev->loop_vid_cap.width), vivid_copy_buffer() 369 ((dev->loop_vid_overlay.left - dev->loop_vid_copy.left) * vivid_copy_buffer() 373 scale_line(voutbuf + vid_out_y * stride_out, dev->blended_line, vivid_copy_buffer() 374 dev->loop_vid_out.width, dev->loop_vid_copy.width, vivid_copy_buffer() 377 blend_line(dev, vid_overlay_y + dev->loop_vid_overlay.top, vivid_copy_buffer() 378 dev->loop_vid_overlay.left, vivid_copy_buffer() 379 dev->blended_line + offset, osd, vivid_copy_buffer() 380 dev->loop_vid_overlay.width, twopixsize / 2); vivid_copy_buffer() 382 memcpy(dev->blended_line + offset, vivid_copy_buffer() 383 osd, (dev->loop_vid_overlay.width * twopixsize) / 2); vivid_copy_buffer() 384 scale_line(dev->blended_line, dev->scaled_line, vivid_copy_buffer() 385 dev->loop_vid_copy.width, dev->loop_vid_cap.width, vivid_copy_buffer() 388 dev->cur_scaled_line = vid_out_y; vivid_copy_buffer() 389 memcpy(vcapbuf + vid_cap_left, dev->scaled_line, vivid_copy_buffer() 390 tpg_hdiv(tpg, p, dev->loop_vid_cap.width)); vivid_copy_buffer() 396 if (vid_overlay_error >= dev->loop_vid_overlay_cap.height) { vivid_copy_buffer() 397 vid_overlay_error -= dev->loop_vid_overlay_cap.height; vivid_copy_buffer() 403 if (vid_out_error >= dev->loop_vid_cap.height / vdiv) { vivid_copy_buffer() 404 vid_out_error -= dev->loop_vid_cap.height / vdiv; vivid_copy_buffer() 416 static void vivid_fillbuff(struct vivid_dev dev, struct vivid_buffer buf) vivid_fillbuff() argument 418 struct tpg_data tpg = &dev->tpg; vivid_fillbuff() 419 unsigned factor = V4L2_FIELD_HAS_T_OR_B(dev->field_cap) ? 2 : 1; vivid_fillbuff() 421 bool is_tv = vivid_is_sdtv_cap(dev); vivid_fillbuff() 422 bool is_60hz = is_tv && (dev->std_cap & V4L2_STD_525_60); vivid_fillbuff() 431 if (dev->loop_video && dev->can_loop_video && vivid_fillbuff() 432 ((vivid_is_svid_cap(dev) && !VIVID_INVALID_SIGNAL(dev->std_signal_mode)) \|\| vivid_fillbuff() 433 (vivid_is_hdmi_cap(dev) && !VIVID_INVALID_SIGNAL(dev->dv_timings_signal_mode)))) vivid_fillbuff() 436 buf->vb.v4l2_buf.sequence = dev->vid_cap_seq_count; vivid_fillbuff() 441 if (dev->tstamp_src_is_soe) vivid_fillbuff() 443 if (dev->field_cap == V4L2_FIELD_ALTERNATE) { vivid_fillbuff() 450 buf->vb.v4l2_buf.field = ((dev->vid_cap_seq_count & 1) ^ is_60hz) ? vivid_fillbuff() 458 buf->vb.v4l2_buf.field = dev->field_cap; vivid_fillbuff() 461 dev->field_cap == V4L2_FIELD_ALTERNATE); vivid_fillbuff() 462 tpg_s_perc_fill_blank(tpg, dev->must_blank[buf->vb.v4l2_buf.index]); vivid_fillbuff() 464 vivid_precalc_copy_rects(dev); vivid_fillbuff() 475 if (p < tpg_g_buffers(tpg) && dev->fmt_cap->data_offset[p]) { vivid_fillbuff() 476 memset(vbuf, dev->fmt_cap->data_offset[p] & 0xff, vivid_fillbuff() 477 dev->fmt_cap->data_offset[p]); vivid_fillbuff() 478 vbuf += dev->fmt_cap->data_offset[p]; vivid_fillbuff() 481 if (!is_loop \|\| vivid_copy_buffer(dev, p, vbuf, buf)) vivid_fillbuff() 482 tpg_fill_plane_buffer(tpg, vivid_get_std_cap(dev), p, vbuf); vivid_fillbuff() 484 dev->must_blank[buf->vb.v4l2_buf.index] = false; vivid_fillbuff() 487 if (dev->field_cap != V4L2_FIELD_ALTERNATE \|\| (buf->vb.v4l2_buf.sequence & 1) == 0) vivid_fillbuff() 488 dev->ms_vid_cap = jiffies_to_msecs(jiffies - dev->jiffies_vid_cap); vivid_fillbuff() 490 ms = dev->ms_vid_cap; vivid_fillbuff() 491 if (dev->osd_mode <= 1) { vivid_fillbuff() 498 (dev->field_cap == V4L2_FIELD_ALTERNATE) ? vivid_fillbuff() 503 if (dev->osd_mode == 0) { vivid_fillbuff() 505 dev->src_rect.width, dev->src_rect.height, dev->input); vivid_fillbuff() 508 gain = v4l2_ctrl_g_ctrl(dev->gain); vivid_fillbuff() 509 mutex_lock(dev->ctrl_hdl_user_vid.lock); vivid_fillbuff() 512 dev->brightness->cur.val, vivid_fillbuff() 513 dev->contrast->cur.val, vivid_fillbuff() 514 dev->saturation->cur.val, vivid_fillbuff() 515 dev->hue->cur.val); vivid_fillbuff() 519 dev->autogain->cur.val, gain, dev->alpha->cur.val); vivid_fillbuff() 520 mutex_unlock(dev->ctrl_hdl_user_vid.lock); vivid_fillbuff() 522 mutex_lock(dev->ctrl_hdl_user_aud.lock); vivid_fillbuff() 525 dev->volume->cur.val, dev->mute->cur.val); vivid_fillbuff() 526 mutex_unlock(dev->ctrl_hdl_user_aud.lock); vivid_fillbuff() 528 mutex_lock(dev->ctrl_hdl_user_gen.lock); vivid_fillbuff() 530 dev->int32->cur.val, vivid_fillbuff() 531 dev->int64->p_cur.p_s64, vivid_fillbuff() 532 dev->bitmask->cur.val); vivid_fillbuff() 535 dev->boolean->cur.val, vivid_fillbuff() 536 dev->menu->qmenu[dev->menu->cur.val], vivid_fillbuff() 537 dev->string->p_cur.p_char); vivid_fillbuff() 540 dev->int_menu->qmenu_int[dev->int_menu->cur.val], vivid_fillbuff() 541 dev->int_menu->cur.val); vivid_fillbuff() 542 mutex_unlock(dev->ctrl_hdl_user_gen.lock); vivid_fillbuff() 544 if (dev->button_pressed) { vivid_fillbuff() 545 dev->button_pressed--; vivid_fillbuff() 555 if (!dev->tstamp_src_is_soe) vivid_fillbuff() 557 buf->vb.v4l2_buf.timestamp.tv_sec += dev->time_wrap_offset; vivid_fillbuff() 563 static bool valid_pix(struct vivid_dev dev, int win_y, int win_x, int fb_y, int fb_x) valid_pix() argument 567 if (dev->bitmap_cap) { valid_pix() 573 const u8 p = dev->bitmap_cap; valid_pix() 574 unsigned stride = (dev->compose_cap.width + 7) / 8; valid_pix() 580 for (i = 0; i < dev->clipcount_cap; i++) { valid_pix() 585 struct v4l2_rect r = &dev->clips_cap[i].c; valid_pix() 598 static void vivid_overlay(struct vivid_dev dev, struct vivid_buffer buf) vivid_overlay() argument 600 struct tpg_data tpg = &dev->tpg; vivid_overlay() 602 void vbase = dev->fb_vbase_cap; vivid_overlay() 604 unsigned img_width = dev->compose_cap.width; vivid_overlay() 605 unsigned img_height = dev->compose_cap.height; vivid_overlay() 608 bool quick = dev->bitmap_cap == NULL && dev->clipcount_cap == 0; vivid_overlay() 617 if ((dev->overlay_cap_field == V4L2_FIELD_TOP \|\| vivid_overlay() 618 dev->overlay_cap_field == V4L2_FIELD_BOTTOM) && vivid_overlay() 619 dev->overlay_cap_field != buf->vb.v4l2_buf.field) vivid_overlay() 622 vbuf += dev->compose_cap.left pixsize + dev->compose_cap.top * stride; vivid_overlay() 623 x = dev->overlay_cap_left; vivid_overlay() 630 w = dev->fb_cap.fmt.width - x; vivid_overlay() 636 if (dev->overlay_cap_top >= 0) vivid_overlay() 637 vbase += dev->overlay_cap_top * dev->fb_cap.fmt.bytesperline; vivid_overlay() 638 for (y = dev->overlay_cap_top; vivid_overlay() 639 y < dev->overlay_cap_top + (int)img_height; vivid_overlay() 643 if (y < 0 \|\| y > dev->fb_cap.fmt.height) vivid_overlay() 648 vbase += dev->fb_cap.fmt.bytesperline; vivid_overlay() 652 if (!valid_pix(dev, y - dev->overlay_cap_top, vivid_overlay() 659 vbase += dev->fb_cap.fmt.bytesperline; vivid_overlay() 663 static void vivid_thread_vid_cap_tick(struct vivid_dev dev, int dropped_bufs) vivid_thread_vid_cap_tick() argument 668 dprintk(dev, 1, "Video Capture Thread Tick\n"); vivid_thread_vid_cap_tick() 671 tpg_update_mv_count(&dev->tpg, vivid_thread_vid_cap_tick() 672 dev->field_cap == V4L2_FIELD_NONE \|\| vivid_thread_vid_cap_tick() 673 dev->field_cap == V4L2_FIELD_ALTERNATE); vivid_thread_vid_cap_tick() 676 if (dev->perc_dropped_buffers && vivid_thread_vid_cap_tick() 677 prandom_u32_max(100) < dev->perc_dropped_buffers) vivid_thread_vid_cap_tick() 680 spin_lock(&dev->slock); vivid_thread_vid_cap_tick() 681 if (!list_empty(&dev->vid_cap_active)) { vivid_thread_vid_cap_tick() 682 vid_cap_buf = list_entry(dev->vid_cap_active.next, struct vivid_buffer, list); vivid_thread_vid_cap_tick() 685 if (!list_empty(&dev->vbi_cap_active)) { vivid_thread_vid_cap_tick() 686 if (dev->field_cap != V4L2_FIELD_ALTERNATE \|\| vivid_thread_vid_cap_tick() 687 (dev->vbi_cap_seq_count & 1)) { vivid_thread_vid_cap_tick() 688 vbi_cap_buf = list_entry(dev->vbi_cap_active.next, vivid_thread_vid_cap_tick() 693 spin_unlock(&dev->slock); vivid_thread_vid_cap_tick() 700 vivid_fillbuff(dev, vid_cap_buf); vivid_thread_vid_cap_tick() 701 dprintk(dev, 1, "filled buffer %d\n", vivid_thread_vid_cap_tick() 705 if (dev->overlay_cap_owner && dev->fb_cap.base && vivid_thread_vid_cap_tick() 706 dev->fb_cap.fmt.pixelformat == dev->fmt_cap->fourcc) vivid_thread_vid_cap_tick() 707 vivid_overlay(dev, vid_cap_buf); vivid_thread_vid_cap_tick() 709 vb2_buffer_done(&vid_cap_buf->vb, dev->dqbuf_error ? vivid_thread_vid_cap_tick() 711 dprintk(dev, 2, "vid_cap buffer %d done\n", vivid_thread_vid_cap_tick() 716 if (dev->stream_sliced_vbi_cap) vivid_thread_vid_cap_tick() 717 vivid_sliced_vbi_cap_process(dev, vbi_cap_buf); vivid_thread_vid_cap_tick() 719 vivid_raw_vbi_cap_process(dev, vbi_cap_buf); vivid_thread_vid_cap_tick() 720 vb2_buffer_done(&vbi_cap_buf->vb, dev->dqbuf_error ? vivid_thread_vid_cap_tick() 722 dprintk(dev, 2, "vbi_cap %d done\n", vivid_thread_vid_cap_tick() 725 dev->dqbuf_error = false; vivid_thread_vid_cap_tick() 729 tpg_update_mv_count(&dev->tpg, dev->field_cap == V4L2_FIELD_NONE \|\| vivid_thread_vid_cap_tick() 730 dev->field_cap == V4L2_FIELD_ALTERNATE); vivid_thread_vid_cap_tick() 735 struct vivid_dev dev = data; vivid_thread_vid_cap() local 746 dprintk(dev, 1, "Video Capture Thread Start\n"); vivid_thread_vid_cap() 751 dev->cap_seq_offset = 0; vivid_thread_vid_cap() 752 dev->cap_seq_count = 0; vivid_thread_vid_cap() 753 dev->cap_seq_resync = false; vivid_thread_vid_cap() 754 dev->jiffies_vid_cap = jiffies; vivid_thread_vid_cap() 761 mutex_lock(&dev->mutex); vivid_thread_vid_cap() 763 if (dev->cap_seq_resync) { vivid_thread_vid_cap() 764 dev->jiffies_vid_cap = cur_jiffies; vivid_thread_vid_cap() 765 dev->cap_seq_offset = dev->cap_seq_count + 1; vivid_thread_vid_cap() 766 dev->cap_seq_count = 0; vivid_thread_vid_cap() 767 dev->cap_seq_resync = false; vivid_thread_vid_cap() 769 numerator = dev->timeperframe_vid_cap.numerator; vivid_thread_vid_cap() 770 denominator = dev->timeperframe_vid_cap.denominator; vivid_thread_vid_cap() 772 if (dev->field_cap == V4L2_FIELD_ALTERNATE) vivid_thread_vid_cap() 776 jiffies_since_start = cur_jiffies - dev->jiffies_vid_cap; vivid_thread_vid_cap() 789 dev->jiffies_vid_cap = cur_jiffies; vivid_thread_vid_cap() 790 dev->cap_seq_offset = buffers_since_start; vivid_thread_vid_cap() 793 dropped_bufs = buffers_since_start + dev->cap_seq_offset - dev->cap_seq_count; vivid_thread_vid_cap() 794 dev->cap_seq_count = buffers_since_start + dev->cap_seq_offset; vivid_thread_vid_cap() 795 dev->vid_cap_seq_count = dev->cap_seq_count - dev->vid_cap_seq_start; vivid_thread_vid_cap() 796 dev->vbi_cap_seq_count = dev->cap_seq_count - dev->vbi_cap_seq_start; vivid_thread_vid_cap() 798 vivid_thread_vid_cap_tick(dev, dropped_bufs); vivid_thread_vid_cap() 807 jiffies_since_start = jiffies - dev->jiffies_vid_cap; vivid_thread_vid_cap() 809 mutex_unlock(&dev->mutex); vivid_thread_vid_cap() 825 dprintk(dev, 1, "Video Capture Thread End\n"); vivid_thread_vid_cap() 829 static void vivid_grab_controls(struct vivid_dev dev, bool grab) vivid_grab_controls() argument 831 v4l2_ctrl_grab(dev->ctrl_has_crop_cap, grab); vivid_grab_controls() 832 v4l2_ctrl_grab(dev->ctrl_has_compose_cap, grab); vivid_grab_controls() 833 v4l2_ctrl_grab(dev->ctrl_has_scaler_cap, grab); vivid_grab_controls() 836 int vivid_start_generating_vid_cap(struct vivid_dev dev, bool pstreaming) vivid_start_generating_vid_cap() argument 838 dprintk(dev, 1, "%s\n", __func__); vivid_start_generating_vid_cap() 840 if (dev->kthread_vid_cap) { vivid_start_generating_vid_cap() 841 u32 seq_count = dev->cap_seq_count + dev->seq_wrap 128; vivid_start_generating_vid_cap() 843 if (pstreaming == &dev->vid_cap_streaming) vivid_start_generating_vid_cap() 844 dev->vid_cap_seq_start = seq_count; vivid_start_generating_vid_cap() 846 dev->vbi_cap_seq_start = seq_count; vivid_start_generating_vid_cap() 852 tpg_init_mv_count(&dev->tpg); vivid_start_generating_vid_cap() 854 dev->vid_cap_seq_start = dev->seq_wrap * 128; vivid_start_generating_vid_cap() 855 dev->vbi_cap_seq_start = dev->seq_wrap * 128; vivid_start_generating_vid_cap() 857 dev->kthread_vid_cap = kthread_run(vivid_thread_vid_cap, dev, vivid_start_generating_vid_cap() 858 "%s-vid-cap", dev->v4l2_dev.name); vivid_start_generating_vid_cap() 860 if (IS_ERR(dev->kthread_vid_cap)) { vivid_start_generating_vid_cap() 861 v4l2_err(&dev->v4l2_dev, "kernel_thread() failed\n"); vivid_start_generating_vid_cap() 862 return PTR_ERR(dev->kthread_vid_cap); vivid_start_generating_vid_cap() 865 vivid_grab_controls(dev, true); vivid_start_generating_vid_cap() 867 dprintk(dev, 1, "returning from %s\n", __func__); vivid_start_generating_vid_cap() 871 void vivid_stop_generating_vid_cap(struct vivid_dev dev, bool pstreaming) vivid_stop_generating_vid_cap() argument 873 dprintk(dev, 1, "%s\n", __func__); vivid_stop_generating_vid_cap() 875 if (dev->kthread_vid_cap == NULL) vivid_stop_generating_vid_cap() 879 if (pstreaming == &dev->vid_cap_streaming) { vivid_stop_generating_vid_cap() 881 while (!list_empty(&dev->vid_cap_active)) { vivid_stop_generating_vid_cap() 884 buf = list_entry(dev->vid_cap_active.next, vivid_stop_generating_vid_cap() 888 dprintk(dev, 2, "vid_cap buffer %d done\n", vivid_stop_generating_vid_cap() 893 if (pstreaming == &dev->vbi_cap_streaming) { vivid_stop_generating_vid_cap() 894 while (!list_empty(&dev->vbi_cap_active)) { vivid_stop_generating_vid_cap() 897 buf = list_entry(dev->vbi_cap_active.next, vivid_stop_generating_vid_cap() 901 dprintk(dev, 2, "vbi_cap buffer %d done\n", vivid_stop_generating_vid_cap() 906 if (dev->vid_cap_streaming \|\| dev->vbi_cap_streaming) vivid_stop_generating_vid_cap() 910 vivid_grab_controls(dev, false); vivid_stop_generating_vid_cap() 911 mutex_unlock(&dev->mutex); vivid_stop_generating_vid_cap() 912 kthread_stop(dev->kthread_vid_cap); vivid_stop_generating_vid_cap() 913 dev->kthread_vid_cap = NULL; vivid_stop_generating_vid_cap() 914 mutex_lock(&dev->mutex); vivid_stop_generating_vid_cap()
H A D	vivid-vid-out.c	38 struct vivid_dev dev = vb2_get_drv_priv(vq); vid_out_queue_setup() local 39 const struct vivid_fmt vfmt = dev->fmt_out; vid_out_queue_setup() 41 unsigned h = dev->fmt_out_rect.height; vid_out_queue_setup() 42 unsigned size = dev->bytesperline_out[0] * h; vid_out_queue_setup() 46 size += dev->bytesperline_out[p] * h / vfmt->vdownsampling[p]; vid_out_queue_setup() 48 if (dev->field_out == V4L2_FIELD_ALTERNATE) { vid_out_queue_setup() 57 if (dev->queue_setup_error) { vid_out_queue_setup() 62 dev->queue_setup_error = false; vid_out_queue_setup() 86 if (sizes[p] < dev->bytesperline_out[p] * h) vid_out_queue_setup() 91 sizes[p] = p ? dev->bytesperline_out[p] * h : size; vid_out_queue_setup() 104 dprintk(dev, 1, "%s: count=%d\n", __func__, nbuffers); vid_out_queue_setup() 106 dprintk(dev, 1, "%s: size[%u]=%u\n", __func__, p, sizes[p]); vid_out_queue_setup() 112 struct vivid_dev dev = vb2_get_drv_priv(vb->vb2_queue); vid_out_buf_prepare() local 117 dprintk(dev, 1, "%s\n", __func__); vid_out_buf_prepare() 119 if (WARN_ON(NULL == dev->fmt_out)) vid_out_buf_prepare() 122 planes = dev->fmt_out->planes; vid_out_buf_prepare() 124 if (dev->buf_prepare_error) { vid_out_buf_prepare() 129 dev->buf_prepare_error = false; vid_out_buf_prepare() 133 if (dev->field_out != V4L2_FIELD_ALTERNATE) vid_out_buf_prepare() 134 vb->v4l2_buf.field = dev->field_out; vid_out_buf_prepare() 140 size = dev->bytesperline_out[p] * dev->fmt_out_rect.height + vid_out_buf_prepare() 144 dprintk(dev, 1, "%s the payload is too small for plane %u (%lu < %lu)\n", vid_out_buf_prepare() 155 struct vivid_dev dev = vb2_get_drv_priv(vb->vb2_queue); vid_out_buf_queue() local 158 dprintk(dev, 1, "%s\n", __func__); vid_out_buf_queue() 160 spin_lock(&dev->slock); vid_out_buf_queue() 161 list_add_tail(&buf->list, &dev->vid_out_active); vid_out_buf_queue() 162 spin_unlock(&dev->slock); vid_out_buf_queue() 167 struct vivid_dev dev = vb2_get_drv_priv(vq); vid_out_start_streaming() local 170 if (vb2_is_streaming(&dev->vb_vid_cap_q)) vid_out_start_streaming() 171 dev->can_loop_video = vivid_vid_can_loop(dev); vid_out_start_streaming() 173 if (dev->kthread_vid_out) vid_out_start_streaming() 176 dev->vid_out_seq_count = 0; vid_out_start_streaming() 177 dprintk(dev, 1, "%s\n", __func__); vid_out_start_streaming() 178 if (dev->start_streaming_error) { vid_out_start_streaming() 179 dev->start_streaming_error = false; vid_out_start_streaming() 182 err = vivid_start_generating_vid_out(dev, &dev->vid_out_streaming); vid_out_start_streaming() 187 list_for_each_entry_safe(buf, tmp, &dev->vid_out_active, list) { vid_out_start_streaming() 198 struct vivid_dev dev = vb2_get_drv_priv(vq); vid_out_stop_streaming() local 200 dprintk(dev, 1, "%s\n", __func__); vid_out_stop_streaming() 201 vivid_stop_generating_vid_out(dev, &dev->vid_out_streaming); vid_out_stop_streaming() 202 dev->can_loop_video = false; vid_out_stop_streaming() 219 void vivid_update_format_out(struct vivid_dev dev) vivid_update_format_out() argument 221 struct v4l2_bt_timings bt = &dev->dv_timings_out.bt; vivid_update_format_out() 224 switch (dev->output_type[dev->output]) { vivid_update_format_out() 227 dev->field_out = dev->tv_field_out; vivid_update_format_out() 228 dev->sink_rect.width = 720; vivid_update_format_out() 229 if (dev->std_out & V4L2_STD_525_60) { vivid_update_format_out() 230 dev->sink_rect.height = 480; vivid_update_format_out() 231 dev->timeperframe_vid_out = (struct v4l2_fract) { 1001, 30000 }; vivid_update_format_out() 232 dev->service_set_out = V4L2_SLICED_CAPTION_525; vivid_update_format_out() 234 dev->sink_rect.height = 576; vivid_update_format_out() 235 dev->timeperframe_vid_out = (struct v4l2_fract) { 1000, 25000 }; vivid_update_format_out() 236 dev->service_set_out = V4L2_SLICED_WSS_625 \| V4L2_SLICED_TELETEXT_B; vivid_update_format_out() 238 dev->colorspace_out = V4L2_COLORSPACE_SMPTE170M; vivid_update_format_out() 241 dev->sink_rect.width = bt->width; vivid_update_format_out() 242 dev->sink_rect.height = bt->height; vivid_update_format_out() 244 dev->timeperframe_vid_out = (struct v4l2_fract) { vivid_update_format_out() 248 dev->field_out = V4L2_FIELD_ALTERNATE; vivid_update_format_out() 250 dev->field_out = V4L2_FIELD_NONE; vivid_update_format_out() 251 if (!dev->dvi_d_out && (bt->flags & V4L2_DV_FL_IS_CE_VIDEO)) { vivid_update_format_out() 253 dev->colorspace_out = V4L2_COLORSPACE_SMPTE170M; vivid_update_format_out() 255 dev->colorspace_out = V4L2_COLORSPACE_REC709; vivid_update_format_out() 257 dev->colorspace_out = V4L2_COLORSPACE_SRGB; vivid_update_format_out() 261 dev->ycbcr_enc_out = V4L2_YCBCR_ENC_DEFAULT; vivid_update_format_out() 262 dev->quantization_out = V4L2_QUANTIZATION_DEFAULT; vivid_update_format_out() 263 dev->compose_out = dev->sink_rect; vivid_update_format_out() 264 dev->compose_bounds_out = dev->sink_rect; vivid_update_format_out() 265 dev->crop_out = dev->compose_out; vivid_update_format_out() 266 if (V4L2_FIELD_HAS_T_OR_B(dev->field_out)) vivid_update_format_out() 267 dev->crop_out.height /= 2; vivid_update_format_out() 268 dev->fmt_out_rect = dev->crop_out; vivid_update_format_out() 269 for (p = 0; p < dev->fmt_out->planes; p++) vivid_update_format_out() 270 dev->bytesperline_out[p] = vivid_update_format_out() 271 (dev->sink_rect.width dev->fmt_out->bit_depth[p]) / 8; vivid_update_format_out() 275 static enum v4l2_field vivid_field_out(struct vivid_dev dev, enum v4l2_field field) vivid_field_out() argument 277 if (vivid_is_svid_out(dev)) { vivid_field_out() 290 if (vivid_is_hdmi_out(dev)) vivid_field_out() 291 return dev->dv_timings_out.bt.interlaced ? V4L2_FIELD_ALTERNATE : vivid_field_out() 296 static enum tpg_pixel_aspect vivid_get_pixel_aspect(const struct vivid_dev dev) vivid_get_pixel_aspect() argument 298 if (vivid_is_svid_out(dev)) vivid_get_pixel_aspect() 299 return (dev->std_out & V4L2_STD_525_60) ? vivid_get_pixel_aspect() 302 if (vivid_is_hdmi_out(dev) && vivid_get_pixel_aspect() 303 dev->sink_rect.width == 720 && dev->sink_rect.height <= 576) vivid_get_pixel_aspect() 304 return dev->sink_rect.height == 480 ? vivid_get_pixel_aspect() 313 struct vivid_dev dev = video_drvdata(file); vivid_g_fmt_vid_out() local 315 const struct vivid_fmt fmt = dev->fmt_out; vivid_g_fmt_vid_out() 318 mp->width = dev->fmt_out_rect.width; vivid_g_fmt_vid_out() 319 mp->height = dev->fmt_out_rect.height; vivid_g_fmt_vid_out() 320 mp->field = dev->field_out; vivid_g_fmt_vid_out() 322 mp->colorspace = dev->colorspace_out; vivid_g_fmt_vid_out() 323 mp->ycbcr_enc = dev->ycbcr_enc_out; vivid_g_fmt_vid_out() 324 mp->quantization = dev->quantization_out; vivid_g_fmt_vid_out() 327 mp->plane_fmt[p].bytesperline = dev->bytesperline_out[p]; vivid_g_fmt_vid_out() 332 unsigned stride = dev->bytesperline_out[p]; vivid_g_fmt_vid_out() 343 struct vivid_dev dev = video_drvdata(file); vivid_try_fmt_vid_out() local 344 struct v4l2_bt_timings bt = &dev->dv_timings_out.bt; vivid_try_fmt_vid_out() 353 fmt = vivid_get_format(dev, mp->pixelformat); vivid_try_fmt_vid_out() 355 dprintk(dev, 1, "Fourcc format (0x%08x) unknown.\n", vivid_try_fmt_vid_out() 358 fmt = vivid_get_format(dev, mp->pixelformat); vivid_try_fmt_vid_out() 361 mp->field = vivid_field_out(dev, mp->field); vivid_try_fmt_vid_out() 362 if (vivid_is_svid_out(dev)) { vivid_try_fmt_vid_out() 364 h = (dev->std_out & V4L2_STD_525_60) ? 480 : 576; vivid_try_fmt_vid_out() 366 w = dev->sink_rect.width; vivid_try_fmt_vid_out() 367 h = dev->sink_rect.height; vivid_try_fmt_vid_out() 371 if (!dev->has_scaler_out && !dev->has_crop_out && !dev->has_compose_out) { vivid_try_fmt_vid_out() 379 if (dev->has_scaler_out && !dev->has_crop_out) { vivid_try_fmt_vid_out() 383 } else if (!dev->has_scaler_out && dev->has_compose_out && !dev->has_crop_out) { vivid_try_fmt_vid_out() 384 rect_set_max_size(&r, &dev->sink_rect); vivid_try_fmt_vid_out() 385 } else if (!dev->has_scaler_out && !dev->has_compose_out) { vivid_try_fmt_vid_out() 386 rect_set_min_size(&r, &dev->sink_rect); vivid_try_fmt_vid_out() 412 if (vivid_is_svid_out(dev)) { vivid_try_fmt_vid_out() 414 } else if (dev->dvi_d_out \|\| !(bt->flags & V4L2_DV_FL_IS_CE_VIDEO)) { vivid_try_fmt_vid_out() 416 if (dev->dvi_d_out) vivid_try_fmt_vid_out() 435 struct vivid_dev dev = video_drvdata(file); vivid_s_fmt_vid_out() local 436 struct v4l2_rect crop = &dev->crop_out; vivid_s_fmt_vid_out() 437 struct v4l2_rect compose = &dev->compose_out; vivid_s_fmt_vid_out() 438 struct vb2_queue q = &dev->vb_vid_out_q; vivid_s_fmt_vid_out() 447 (vivid_is_svid_out(dev) \|\| vivid_s_fmt_vid_out() 448 mp->width != dev->fmt_out_rect.width \|\| vivid_s_fmt_vid_out() 449 mp->height != dev->fmt_out_rect.height \|\| vivid_s_fmt_vid_out() 450 mp->pixelformat != dev->fmt_out->fourcc \|\| vivid_s_fmt_vid_out() 451 mp->field != dev->field_out)) { vivid_s_fmt_vid_out() 452 dprintk(dev, 1, "%s device busy\n", __func__); vivid_s_fmt_vid_out() 464 dev->fmt_out = vivid_get_format(dev, mp->pixelformat); vivid_s_fmt_vid_out() 468 if (dev->has_scaler_out \|\| dev->has_crop_out \|\| dev->has_compose_out) { vivid_s_fmt_vid_out() 471 if (dev->has_scaler_out) { vivid_s_fmt_vid_out() 472 if (dev->has_crop_out) vivid_s_fmt_vid_out() 476 if (dev->has_compose_out && !dev->has_crop_out) { vivid_s_fmt_vid_out() 490 rect_map_inside(compose, &dev->compose_bounds_out); vivid_s_fmt_vid_out() 491 } else if (dev->has_compose_out) { vivid_s_fmt_vid_out() 505 rect_map_inside(compose, &dev->compose_bounds_out); vivid_s_fmt_vid_out() 507 } else if (dev->has_compose_out && !dev->has_crop_out) { vivid_s_fmt_vid_out() 511 rect_map_inside(compose, &dev->compose_bounds_out); vivid_s_fmt_vid_out() 512 } else if (!dev->has_compose_out) { vivid_s_fmt_vid_out() 519 rect_map_inside(compose, &dev->compose_bounds_out); vivid_s_fmt_vid_out() 535 dev->fmt_out_rect.width = mp->width; vivid_s_fmt_vid_out() 536 dev->fmt_out_rect.height = mp->height; vivid_s_fmt_vid_out() 538 dev->bytesperline_out[p] = mp->plane_fmt[p].bytesperline; vivid_s_fmt_vid_out() 539 for (p = dev->fmt_out->buffers; p < dev->fmt_out->planes; p++) vivid_s_fmt_vid_out() 540 dev->bytesperline_out[p] = vivid_s_fmt_vid_out() 541 (dev->bytesperline_out[0] * dev->fmt_out->bit_depth[p]) / vivid_s_fmt_vid_out() 542 dev->fmt_out->bit_depth[0]; vivid_s_fmt_vid_out() 543 dev->field_out = mp->field; vivid_s_fmt_vid_out() 544 if (vivid_is_svid_out(dev)) vivid_s_fmt_vid_out() 545 dev->tv_field_out = mp->field; vivid_s_fmt_vid_out() 548 dev->colorspace_out = mp->colorspace; vivid_s_fmt_vid_out() 549 dev->ycbcr_enc_out = mp->ycbcr_enc; vivid_s_fmt_vid_out() 550 dev->quantization_out = mp->quantization; vivid_s_fmt_vid_out() 551 if (dev->loop_video) { vivid_s_fmt_vid_out() 552 vivid_send_source_change(dev, SVID); vivid_s_fmt_vid_out() 553 vivid_send_source_change(dev, HDMI); vivid_s_fmt_vid_out() 561 struct vivid_dev dev = video_drvdata(file); vidioc_g_fmt_vid_out_mplane() local 563 if (!dev->multiplanar) vidioc_g_fmt_vid_out_mplane() 571 struct vivid_dev dev = video_drvdata(file); vidioc_try_fmt_vid_out_mplane() local 573 if (!dev->multiplanar) vidioc_try_fmt_vid_out_mplane() 581 struct vivid_dev dev = video_drvdata(file); vidioc_s_fmt_vid_out_mplane() local 583 if (!dev->multiplanar) vidioc_s_fmt_vid_out_mplane() 591 struct vivid_dev dev = video_drvdata(file); vidioc_g_fmt_vid_out() local 593 if (dev->multiplanar) vidioc_g_fmt_vid_out() 601 struct vivid_dev dev = video_drvdata(file); vidioc_try_fmt_vid_out() local 603 if (dev->multiplanar) vidioc_try_fmt_vid_out() 611 struct vivid_dev dev = video_drvdata(file); vidioc_s_fmt_vid_out() local 613 if (dev->multiplanar) vidioc_s_fmt_vid_out() 621 struct vivid_dev dev = video_drvdata(file); vivid_vid_out_g_selection() local 623 if (!dev->has_crop_out && !dev->has_compose_out) vivid_vid_out_g_selection() 631 if (!dev->has_crop_out) vivid_vid_out_g_selection() 633 sel->r = dev->crop_out; vivid_vid_out_g_selection() 636 if (!dev->has_crop_out) vivid_vid_out_g_selection() 638 sel->r = dev->fmt_out_rect; vivid_vid_out_g_selection() 641 if (!dev->has_crop_out) vivid_vid_out_g_selection() 646 if (!dev->has_compose_out) vivid_vid_out_g_selection() 648 sel->r = dev->compose_out; vivid_vid_out_g_selection() 652 if (!dev->has_compose_out) vivid_vid_out_g_selection() 654 sel->r = dev->sink_rect; vivid_vid_out_g_selection() 664 struct vivid_dev dev = video_drvdata(file); vivid_vid_out_s_selection() local 665 struct v4l2_rect crop = &dev->crop_out; vivid_vid_out_s_selection() 666 struct v4l2_rect compose = &dev->compose_out; vivid_vid_out_s_selection() 667 unsigned factor = V4L2_FIELD_HAS_T_OR_B(dev->field_out) ? 2 : 1; vivid_vid_out_s_selection() 670 if (!dev->has_crop_out && !dev->has_compose_out) vivid_vid_out_s_selection() 677 if (!dev->has_crop_out) vivid_vid_out_s_selection() 683 rect_set_max_size(&s->r, &dev->fmt_out_rect); vivid_vid_out_s_selection() 684 if (dev->has_scaler_out) { vivid_vid_out_s_selection() 687 dev->sink_rect.width * MAX_ZOOM, vivid_vid_out_s_selection() 688 (dev->sink_rect.height / factor) * MAX_ZOOM vivid_vid_out_s_selection() 692 if (dev->has_compose_out) { vivid_vid_out_s_selection() 706 rect_map_inside(compose, &dev->compose_bounds_out); vivid_vid_out_s_selection() 708 } else if (dev->has_compose_out) { vivid_vid_out_s_selection() 711 rect_set_max_size(&s->r, &dev->sink_rect); vivid_vid_out_s_selection() 713 rect_map_inside(compose, &dev->compose_bounds_out); vivid_vid_out_s_selection() 717 rect_set_size_to(&s->r, &dev->sink_rect); vivid_vid_out_s_selection() 720 rect_map_inside(&s->r, &dev->fmt_out_rect); vivid_vid_out_s_selection() 724 if (!dev->has_compose_out) vivid_vid_out_s_selection() 730 rect_set_max_size(&s->r, &dev->sink_rect); vivid_vid_out_s_selection() 731 rect_map_inside(&s->r, &dev->compose_bounds_out); vivid_vid_out_s_selection() 734 if (dev->has_scaler_out) { vivid_vid_out_s_selection() 735 struct v4l2_rect fmt = dev->fmt_out_rect; vivid_vid_out_s_selection() 748 if (!dev->has_crop_out) vivid_vid_out_s_selection() 750 if (!rect_same_size(&dev->fmt_out_rect, &fmt) && vivid_vid_out_s_selection() 751 vb2_is_busy(&dev->vb_vid_out_q)) vivid_vid_out_s_selection() 753 if (dev->has_crop_out) { vivid_vid_out_s_selection() 757 dev->fmt_out_rect = fmt; vivid_vid_out_s_selection() 758 } else if (dev->has_crop_out) { vivid_vid_out_s_selection() 759 struct v4l2_rect fmt = dev->fmt_out_rect; vivid_vid_out_s_selection() 762 if (!rect_same_size(&dev->fmt_out_rect, &fmt) && vivid_vid_out_s_selection() 763 vb2_is_busy(&dev->vb_vid_out_q)) vivid_vid_out_s_selection() 765 dev->fmt_out_rect = fmt; vivid_vid_out_s_selection() 767 rect_map_inside(crop, &dev->fmt_out_rect); vivid_vid_out_s_selection() 769 if (!rect_same_size(&s->r, &dev->fmt_out_rect) && vivid_vid_out_s_selection() 770 vb2_is_busy(&dev->vb_vid_out_q)) vivid_vid_out_s_selection() 772 rect_set_size_to(&dev->fmt_out_rect, &s->r); vivid_vid_out_s_selection() 775 rect_map_inside(crop, &dev->fmt_out_rect); vivid_vid_out_s_selection() 779 if (dev->bitmap_out && (compose->width != s->r.width \|\| vivid_vid_out_s_selection() 781 kfree(dev->bitmap_out); vivid_vid_out_s_selection() 782 dev->bitmap_out = NULL; vivid_vid_out_s_selection() 796 struct vivid_dev dev = video_drvdata(file); vivid_vid_out_cropcap() local 801 switch (vivid_get_pixel_aspect(dev)) { vivid_vid_out_cropcap() 821 struct vivid_dev dev = video_drvdata(file); vidioc_g_fmt_vid_out_overlay() local 822 const struct v4l2_rect compose = &dev->compose_out; vidioc_g_fmt_vid_out_overlay() 826 if (!dev->has_fb) vidioc_g_fmt_vid_out_overlay() 828 win->w.top = dev->overlay_out_top; vidioc_g_fmt_vid_out_overlay() 829 win->w.left = dev->overlay_out_left; vidioc_g_fmt_vid_out_overlay() 832 win->clipcount = dev->clipcount_out; vidioc_g_fmt_vid_out_overlay() 834 win->chromakey = dev->chromakey_out; vidioc_g_fmt_vid_out_overlay() 835 win->global_alpha = dev->global_alpha_out; vidioc_g_fmt_vid_out_overlay() 836 if (clipcount > dev->clipcount_out) vidioc_g_fmt_vid_out_overlay() 837 clipcount = dev->clipcount_out; vidioc_g_fmt_vid_out_overlay() 838 if (dev->bitmap_out == NULL) vidioc_g_fmt_vid_out_overlay() 841 if (copy_to_user(win->bitmap, dev->bitmap_out, vidioc_g_fmt_vid_out_overlay() 842 ((dev->compose_out.width + 7) / 8) dev->compose_out.height)) vidioc_g_fmt_vid_out_overlay() 846 if (copy_to_user(win->clips, dev->clips_out, vidioc_g_fmt_vid_out_overlay() 847 clipcount * sizeof(dev->clips_out[0]))) vidioc_g_fmt_vid_out_overlay() 856 struct vivid_dev dev = video_drvdata(file); vidioc_try_fmt_vid_out_overlay() local 857 const struct v4l2_rect compose = &dev->compose_out; vidioc_try_fmt_vid_out_overlay() 861 if (!dev->has_fb) vidioc_try_fmt_vid_out_overlay() 864 -dev->display_width, dev->display_width); vidioc_try_fmt_vid_out_overlay() 866 -dev->display_height, dev->display_height); vidioc_try_fmt_vid_out_overlay() 879 if (copy_from_user(dev->try_clips_out, win->clips, vidioc_try_fmt_vid_out_overlay() 880 win->clipcount * sizeof(dev->clips_out[0]))) vidioc_try_fmt_vid_out_overlay() 883 struct v4l2_rect r = &dev->try_clips_out[i].c; vidioc_try_fmt_vid_out_overlay() 885 r->top = clamp_t(s32, r->top, 0, dev->display_height - 1); vidioc_try_fmt_vid_out_overlay() 886 r->height = clamp_t(s32, r->height, 1, dev->display_height - r->top); vidioc_try_fmt_vid_out_overlay() 887 r->left = clamp_t(u32, r->left, 0, dev->display_width - 1); vidioc_try_fmt_vid_out_overlay() 888 r->width = clamp_t(u32, r->width, 1, dev->display_width - r->left); vidioc_try_fmt_vid_out_overlay() 895 struct v4l2_rect r1 = &dev->try_clips_out[i].c; vidioc_try_fmt_vid_out_overlay() 898 struct v4l2_rect r2 = &dev->try_clips_out[j].c; vidioc_try_fmt_vid_out_overlay() 904 if (copy_to_user(win->clips, dev->try_clips_out, vidioc_try_fmt_vid_out_overlay() 905 win->clipcount sizeof(dev->clips_out[0]))) vidioc_try_fmt_vid_out_overlay() 914 struct vivid_dev dev = video_drvdata(file); vidioc_s_fmt_vid_out_overlay() local 915 const struct v4l2_rect compose = &dev->compose_out; vidioc_s_fmt_vid_out_overlay() 919 unsigned clips_size = win->clipcount * sizeof(dev->clips_out[0]); vidioc_s_fmt_vid_out_overlay() 932 dev->overlay_out_top = win->w.top; vidioc_s_fmt_vid_out_overlay() 933 dev->overlay_out_left = win->w.left; vidioc_s_fmt_vid_out_overlay() 934 kfree(dev->bitmap_out); vidioc_s_fmt_vid_out_overlay() 935 dev->bitmap_out = new_bitmap; vidioc_s_fmt_vid_out_overlay() 936 dev->clipcount_out = win->clipcount; vidioc_s_fmt_vid_out_overlay() 937 if (dev->clipcount_out) vidioc_s_fmt_vid_out_overlay() 938 memcpy(dev->clips_out, dev->try_clips_out, clips_size); vidioc_s_fmt_vid_out_overlay() 939 dev->chromakey_out = win->chromakey; vidioc_s_fmt_vid_out_overlay() 940 dev->global_alpha_out = win->global_alpha; vidioc_s_fmt_vid_out_overlay() 946 struct vivid_dev dev = video_drvdata(file); vivid_vid_out_overlay() local 948 if (i && !dev->fmt_out->can_do_overlay) { vivid_vid_out_overlay() 949 dprintk(dev, 1, "unsupported output format for output overlay\n"); vivid_vid_out_overlay() 953 dev->overlay_out_enabled = i; vivid_vid_out_overlay() 960 struct vivid_dev dev = video_drvdata(file); vivid_vid_out_g_fbuf() local 970 a->flags = V4L2_FBUF_FLAG_OVERLAY \| dev->fbuf_out_flags; vivid_vid_out_g_fbuf() 971 a->base = (void )dev->video_pbase; vivid_vid_out_g_fbuf() 972 a->fmt.width = dev->display_width; vivid_vid_out_g_fbuf() 973 a->fmt.height = dev->display_height; vivid_vid_out_g_fbuf() 974 if (dev->fb_defined.green.length == 5) vivid_vid_out_g_fbuf() 978 a->fmt.bytesperline = dev->display_byte_stride; vivid_vid_out_g_fbuf() 989 struct vivid_dev dev = video_drvdata(file); vivid_vid_out_s_fbuf() local 1008 dev->fbuf_out_flags &= ~(chroma_flags \| alpha_flags); vivid_vid_out_s_fbuf() 1009 dev->fbuf_out_flags = a->flags & (chroma_flags \| alpha_flags); vivid_vid_out_s_fbuf() 1021 struct vivid_dev dev = video_drvdata(file); vidioc_enum_output() local 1023 if (out->index >= dev->num_outputs) vidioc_enum_output() 1027 switch (dev->output_type[out->index]) { vidioc_enum_output() 1030 dev->output_name_counter[out->index]); vidioc_enum_output() 1032 if (dev->has_audio_outputs) vidioc_enum_output() 1038 dev->output_name_counter[out->index]); vidioc_enum_output() 1047 struct vivid_dev dev = video_drvdata(file); vidioc_g_output() local 1049 o = dev->output; vidioc_g_output() 1055 struct vivid_dev dev = video_drvdata(file); vidioc_s_output() local 1057 if (o >= dev->num_outputs) vidioc_s_output() 1060 if (o == dev->output) vidioc_s_output() 1063 if (vb2_is_busy(&dev->vb_vid_out_q) \|\| vb2_is_busy(&dev->vb_vbi_out_q)) vidioc_s_output() 1066 dev->output = o; vidioc_s_output() 1067 dev->tv_audio_output = 0; vidioc_s_output() 1068 if (dev->output_type[o] == SVID) vidioc_s_output() 1069 dev->vid_out_dev.tvnorms = V4L2_STD_ALL; vidioc_s_output() 1071 dev->vid_out_dev.tvnorms = 0; vidioc_s_output() 1073 dev->vbi_out_dev.tvnorms = dev->vid_out_dev.tvnorms; vidioc_s_output() 1074 vivid_update_format_out(dev); vidioc_s_output() 1088 struct vivid_dev dev = video_drvdata(file); vidioc_g_audout() local 1090 if (!vivid_is_svid_out(dev)) vidioc_g_audout() 1092 vout = vivid_audio_outputs[dev->tv_audio_output]; vidioc_g_audout() 1098 struct vivid_dev dev = video_drvdata(file); vidioc_s_audout() local 1100 if (!vivid_is_svid_out(dev)) vidioc_s_audout() 1104 dev->tv_audio_output = vout->index; vidioc_s_audout() 1110 struct vivid_dev dev = video_drvdata(file); vivid_vid_out_s_std() local 1112 if (!vivid_is_svid_out(dev)) vivid_vid_out_s_std() 1114 if (dev->std_out == id) vivid_vid_out_s_std() 1116 if (vb2_is_busy(&dev->vb_vid_out_q) \|\| vb2_is_busy(&dev->vb_vbi_out_q)) vivid_vid_out_s_std() 1118 dev->std_out = id; vivid_vid_out_s_std() 1119 vivid_update_format_out(dev); vivid_vid_out_s_std() 1126 struct vivid_dev dev = video_drvdata(file); vivid_vid_out_s_dv_timings() local 1128 if (!vivid_is_hdmi_out(dev)) vivid_vid_out_s_dv_timings() 1133 if (v4l2_match_dv_timings(timings, &dev->dv_timings_out, 0)) vivid_vid_out_s_dv_timings() 1135 if (vb2_is_busy(&dev->vb_vid_out_q)) vivid_vid_out_s_dv_timings() 1137 dev->dv_timings_out = timings; vivid_vid_out_s_dv_timings() 1138 vivid_update_format_out(dev); vivid_vid_out_s_dv_timings() 1145 struct vivid_dev *dev = video_drvdata(file); vivid_vid_out_g_parm() local 1147 if (parm->type != (dev->multiplanar ? vivid_vid_out_g_parm() 1153 parm->parm.output.timeperframe = dev->timeperframe_vid_out; vivid_vid_out_g_parm()
H A D	vivid-core.c	202 struct vivid_dev dev = video_drvdata(file); vidioc_querycap() local 208 "platform:%s", dev->v4l2_dev.name); vidioc_querycap() 211 cap->device_caps = dev->vid_cap_caps; vidioc_querycap() 213 cap->device_caps = dev->vid_out_caps; vidioc_querycap() 215 cap->device_caps = dev->vbi_cap_caps; vidioc_querycap() 217 cap->device_caps = dev->vbi_out_caps; vidioc_querycap() 219 cap->device_caps = dev->sdr_cap_caps; vidioc_querycap() 221 cap->device_caps = dev->radio_rx_caps; vidioc_querycap() 223 cap->device_caps = dev->radio_tx_caps; vidioc_querycap() 224 cap->capabilities = dev->vid_cap_caps \| dev->vid_out_caps \| vidioc_querycap() 225 dev->vbi_cap_caps \| dev->vbi_out_caps \| vidioc_querycap() 226 dev->radio_rx_caps \| dev->radio_tx_caps \| vidioc_querycap() 227 dev->sdr_cap_caps \| V4L2_CAP_DEVICE_CAPS; vidioc_querycap() 275 struct vivid_dev dev = video_drvdata(file); vidioc_g_frequency() local 281 &dev->radio_rx_freq : &dev->radio_tx_freq, vf); vidioc_g_frequency() 289 struct vivid_dev dev = video_drvdata(file); vidioc_s_frequency() local 295 &dev->radio_rx_freq : &dev->radio_tx_freq, vf); vidioc_s_frequency() 435 static bool vivid_is_last_user(struct vivid_dev dev) vivid_is_last_user() argument 437 unsigned uses = vivid_is_in_use(&dev->vid_cap_dev) + vivid_is_last_user() 438 vivid_is_in_use(&dev->vid_out_dev) + vivid_is_last_user() 439 vivid_is_in_use(&dev->vbi_cap_dev) + vivid_is_last_user() 440 vivid_is_in_use(&dev->vbi_out_dev) + vivid_is_last_user() 441 vivid_is_in_use(&dev->sdr_cap_dev) + vivid_is_last_user() 442 vivid_is_in_use(&dev->radio_rx_dev) + vivid_is_last_user() 443 vivid_is_in_use(&dev->radio_tx_dev); vivid_is_last_user() 450 struct vivid_dev dev = video_drvdata(file); vivid_fop_release() local 453 mutex_lock(&dev->mutex); vivid_fop_release() 455 !video_is_registered(vdev) && vivid_is_last_user(dev)) { vivid_fop_release() 461 v4l2_info(&dev->v4l2_dev, "reconnect\n"); vivid_fop_release() 462 set_bit(V4L2_FL_REGISTERED, &dev->vid_cap_dev.flags); vivid_fop_release() 463 set_bit(V4L2_FL_REGISTERED, &dev->vid_out_dev.flags); vivid_fop_release() 464 set_bit(V4L2_FL_REGISTERED, &dev->vbi_cap_dev.flags); vivid_fop_release() 465 set_bit(V4L2_FL_REGISTERED, &dev->vbi_out_dev.flags); vivid_fop_release() 466 set_bit(V4L2_FL_REGISTERED, &dev->sdr_cap_dev.flags); vivid_fop_release() 467 set_bit(V4L2_FL_REGISTERED, &dev->radio_rx_dev.flags); vivid_fop_release() 468 set_bit(V4L2_FL_REGISTERED, &dev->radio_tx_dev.flags); vivid_fop_release() 470 mutex_unlock(&dev->mutex); vivid_fop_release() 471 if (file->private_data == dev->overlay_cap_owner) vivid_fop_release() 472 dev->overlay_cap_owner = NULL; vivid_fop_release() 473 if (file->private_data == dev->radio_rx_rds_owner) { vivid_fop_release() 474 dev->radio_rx_rds_last_block = 0; vivid_fop_release() 475 dev->radio_rx_rds_owner = NULL; vivid_fop_release() 477 if (file->private_data == dev->radio_tx_rds_owner) { vivid_fop_release() 478 dev->radio_tx_rds_last_block = 0; vivid_fop_release() 479 dev->radio_tx_rds_owner = NULL; vivid_fop_release() 624 struct vivid_dev dev = container_of(v4l2_dev, struct vivid_dev, v4l2_dev); vivid_dev_release() local 626 vivid_free_controls(dev); vivid_dev_release() 627 v4l2_device_unregister(&dev->v4l2_dev); vivid_dev_release() 628 vfree(dev->scaled_line); vivid_dev_release() 629 vfree(dev->blended_line); vivid_dev_release() 630 vfree(dev->edid); vivid_dev_release() 631 vfree(dev->bitmap_cap); vivid_dev_release() 632 vfree(dev->bitmap_out); vivid_dev_release() 633 tpg_free(&dev->tpg); vivid_dev_release() 634 kfree(dev->query_dv_timings_qmenu); vivid_dev_release() 635 kfree(dev); vivid_dev_release() 648 struct vivid_dev dev; vivid_create_instance() local 657 dev = kzalloc(sizeof(dev), GFP_KERNEL); vivid_create_instance() 658 if (!dev) vivid_create_instance() 661 dev->inst = inst; vivid_create_instance() 664 snprintf(dev->v4l2_dev.name, sizeof(dev->v4l2_dev.name), vivid_create_instance() 666 ret = v4l2_device_register(&pdev->dev, &dev->v4l2_dev); vivid_create_instance() 668 kfree(dev); vivid_create_instance() 671 dev->v4l2_dev.release = vivid_dev_release; vivid_create_instance() 676 dev->multiplanar = multiplanar[inst] > 1; vivid_create_instance() 677 v4l2_info(&dev->v4l2_dev, "using %splanar format API\n", vivid_create_instance() 678 dev->multiplanar ? "multi" : "single "); vivid_create_instance() 681 dev->num_inputs = num_inputs[inst]; vivid_create_instance() 682 if (dev->num_inputs < 1) vivid_create_instance() 683 dev->num_inputs = 1; vivid_create_instance() 684 if (dev->num_inputs >= MAX_INPUTS) vivid_create_instance() 685 dev->num_inputs = MAX_INPUTS; vivid_create_instance() 686 for (i = 0; i < dev->num_inputs; i++) { vivid_create_instance() 687 dev->input_type[i] = (input_types[inst] >> (i * 2)) & 0x3; vivid_create_instance() 688 dev->input_name_counter[i] = in_type_counter[dev->input_type[i]]++; vivid_create_instance() 690 dev->has_audio_inputs = in_type_counter[TV] && in_type_counter[SVID]; vivid_create_instance() 693 dev->num_outputs = num_outputs[inst]; vivid_create_instance() 694 if (dev->num_outputs < 1) vivid_create_instance() 695 dev->num_outputs = 1; vivid_create_instance() 696 if (dev->num_outputs >= MAX_OUTPUTS) vivid_create_instance() 697 dev->num_outputs = MAX_OUTPUTS; vivid_create_instance() 698 for (i = 0; i < dev->num_outputs; i++) { vivid_create_instance() 699 dev->output_type[i] = ((output_types[inst] >> i) & 1) ? HDMI : SVID; vivid_create_instance() 700 dev->output_name_counter[i] = out_type_counter[dev->output_type[i]]++; vivid_create_instance() 702 dev->has_audio_outputs = out_type_counter[SVID]; vivid_create_instance() 705 dev->has_vid_cap = node_type & 0x0001; vivid_create_instance() 709 dev->has_raw_vbi_cap = node_type & 0x0004; vivid_create_instance() 710 dev->has_sliced_vbi_cap = node_type & 0x0008; vivid_create_instance() 711 dev->has_vbi_cap = dev->has_raw_vbi_cap \| dev->has_sliced_vbi_cap; vivid_create_instance() 715 dev->has_vid_out = node_type & 0x0100; vivid_create_instance() 719 dev->has_raw_vbi_out = node_type & 0x0400; vivid_create_instance() 720 dev->has_sliced_vbi_out = node_type & 0x0800; vivid_create_instance() 721 dev->has_vbi_out = dev->has_raw_vbi_out \| dev->has_sliced_vbi_out; vivid_create_instance() 725 dev->has_radio_rx = node_type & 0x0010; vivid_create_instance() 728 dev->has_radio_tx = node_type & 0x1000; vivid_create_instance() 731 dev->has_sdr_cap = node_type & 0x0020; vivid_create_instance() 734 has_tuner = ((dev->has_vid_cap \|\| dev->has_vbi_cap) && in_type_counter[TV]) \|\| vivid_create_instance() 735 dev->has_radio_rx \|\| dev->has_sdr_cap; vivid_create_instance() 738 has_modulator = dev->has_radio_tx; vivid_create_instance() 740 if (dev->has_vid_cap) vivid_create_instance() 742 dev->has_fb = node_type & 0x10000; vivid_create_instance() 750 dev->has_crop_cap = ccs_cap & 1; vivid_create_instance() 751 dev->has_compose_cap = ccs_cap & 2; vivid_create_instance() 752 dev->has_scaler_cap = ccs_cap & 4; vivid_create_instance() 753 v4l2_info(&dev->v4l2_dev, "Capture Crop: %c Compose: %c Scaler: %c\n", vivid_create_instance() 754 dev->has_crop_cap ? 'Y' : 'N', vivid_create_instance() 755 dev->has_compose_cap ? 'Y' : 'N', vivid_create_instance() 756 dev->has_scaler_cap ? 'Y' : 'N'); vivid_create_instance() 765 dev->has_crop_out = ccs_out & 1; vivid_create_instance() 766 dev->has_compose_out = ccs_out & 2; vivid_create_instance() 767 dev->has_scaler_out = ccs_out & 4; vivid_create_instance() 768 v4l2_info(&dev->v4l2_dev, "Output Crop: %c Compose: %c Scaler: %c\n", vivid_create_instance() 769 dev->has_crop_out ? 'Y' : 'N', vivid_create_instance() 770 dev->has_compose_out ? 'Y' : 'N', vivid_create_instance() 771 dev->has_scaler_out ? 'Y' : 'N'); vivid_create_instance() 776 if (dev->has_vid_cap) { vivid_create_instance() 778 dev->vid_cap_caps = dev->multiplanar ? vivid_create_instance() 781 dev->vid_cap_caps \|= V4L2_CAP_STREAMING \| V4L2_CAP_READWRITE; vivid_create_instance() 782 if (dev->has_audio_inputs) vivid_create_instance() 783 dev->vid_cap_caps \|= V4L2_CAP_AUDIO; vivid_create_instance() 785 dev->vid_cap_caps \|= V4L2_CAP_TUNER; vivid_create_instance() 787 if (dev->has_vid_out) { vivid_create_instance() 789 dev->vid_out_caps = dev->multiplanar ? vivid_create_instance() 792 if (dev->has_fb) vivid_create_instance() 793 dev->vid_out_caps \|= V4L2_CAP_VIDEO_OUTPUT_OVERLAY; vivid_create_instance() 794 dev->vid_out_caps \|= V4L2_CAP_STREAMING \| V4L2_CAP_READWRITE; vivid_create_instance() 795 if (dev->has_audio_outputs) vivid_create_instance() 796 dev->vid_out_caps \|= V4L2_CAP_AUDIO; vivid_create_instance() 798 if (dev->has_vbi_cap) { vivid_create_instance() 800 dev->vbi_cap_caps = (dev->has_raw_vbi_cap ? V4L2_CAP_VBI_CAPTURE : 0) \| vivid_create_instance() 801 (dev->has_sliced_vbi_cap ? V4L2_CAP_SLICED_VBI_CAPTURE : 0); vivid_create_instance() 802 dev->vbi_cap_caps \|= V4L2_CAP_STREAMING \| V4L2_CAP_READWRITE; vivid_create_instance() 803 if (dev->has_audio_inputs) vivid_create_instance() 804 dev->vbi_cap_caps \|= V4L2_CAP_AUDIO; vivid_create_instance() 806 dev->vbi_cap_caps \|= V4L2_CAP_TUNER; vivid_create_instance() 808 if (dev->has_vbi_out) { vivid_create_instance() 810 dev->vbi_out_caps = (dev->has_raw_vbi_out ? V4L2_CAP_VBI_OUTPUT : 0) \| vivid_create_instance() 811 (dev->has_sliced_vbi_out ? V4L2_CAP_SLICED_VBI_OUTPUT : 0); vivid_create_instance() 812 dev->vbi_out_caps \|= V4L2_CAP_STREAMING \| V4L2_CAP_READWRITE; vivid_create_instance() 813 if (dev->has_audio_outputs) vivid_create_instance() 814 dev->vbi_out_caps \|= V4L2_CAP_AUDIO; vivid_create_instance() 816 if (dev->has_sdr_cap) { vivid_create_instance() 818 dev->sdr_cap_caps = V4L2_CAP_SDR_CAPTURE \| V4L2_CAP_TUNER; vivid_create_instance() 819 dev->sdr_cap_caps \|= V4L2_CAP_STREAMING \| V4L2_CAP_READWRITE; vivid_create_instance() 822 if (dev->has_radio_rx) vivid_create_instance() 823 dev->radio_rx_caps = V4L2_CAP_RADIO \| V4L2_CAP_RDS_CAPTURE \| vivid_create_instance() 827 if (dev->has_radio_tx) vivid_create_instance() 828 dev->radio_tx_caps = V4L2_CAP_RDS_OUTPUT \| V4L2_CAP_MODULATOR \| vivid_create_instance() 832 tpg_init(&dev->tpg, 640, 360); vivid_create_instance() 833 if (tpg_alloc(&dev->tpg, MAX_ZOOM * MAX_WIDTH)) vivid_create_instance() 835 dev->scaled_line = vzalloc(MAX_ZOOM * MAX_WIDTH); vivid_create_instance() 836 if (!dev->scaled_line) vivid_create_instance() 838 dev->blended_line = vzalloc(MAX_ZOOM * MAX_WIDTH); vivid_create_instance() 839 if (!dev->blended_line) vivid_create_instance() 843 dev->edid = vmalloc(256 * 128); vivid_create_instance() 844 if (!dev->edid) vivid_create_instance() 848 while (v4l2_dv_timings_presets[dev->query_dv_timings_size].bt.width) vivid_create_instance() 849 dev->query_dv_timings_size++; vivid_create_instance() 850 dev->query_dv_timings_qmenu = kmalloc(dev->query_dv_timings_size * vivid_create_instance() 852 if (dev->query_dv_timings_qmenu == NULL) vivid_create_instance() 854 for (i = 0; i < dev->query_dv_timings_size; i++) { vivid_create_instance() 856 char p = (char )&dev->query_dv_timings_qmenu[dev->query_dv_timings_size]; vivid_create_instance() 860 dev->query_dv_timings_qmenu[i] = p; vivid_create_instance() 870 if (!dev->has_audio_inputs) { vivid_create_instance() 871 v4l2_disable_ioctl(&dev->vid_cap_dev, VIDIOC_S_AUDIO); vivid_create_instance() 872 v4l2_disable_ioctl(&dev->vid_cap_dev, VIDIOC_G_AUDIO); vivid_create_instance() 873 v4l2_disable_ioctl(&dev->vid_cap_dev, VIDIOC_ENUMAUDIO); vivid_create_instance() 874 v4l2_disable_ioctl(&dev->vbi_cap_dev, VIDIOC_S_AUDIO); vivid_create_instance() 875 v4l2_disable_ioctl(&dev->vbi_cap_dev, VIDIOC_G_AUDIO); vivid_create_instance() 876 v4l2_disable_ioctl(&dev->vbi_cap_dev, VIDIOC_ENUMAUDIO); vivid_create_instance() 878 if (!dev->has_audio_outputs) { vivid_create_instance() 879 v4l2_disable_ioctl(&dev->vid_out_dev, VIDIOC_S_AUDOUT); vivid_create_instance() 880 v4l2_disable_ioctl(&dev->vid_out_dev, VIDIOC_G_AUDOUT); vivid_create_instance() 881 v4l2_disable_ioctl(&dev->vid_out_dev, VIDIOC_ENUMAUDOUT); vivid_create_instance() 882 v4l2_disable_ioctl(&dev->vbi_out_dev, VIDIOC_S_AUDOUT); vivid_create_instance() 883 v4l2_disable_ioctl(&dev->vbi_out_dev, VIDIOC_G_AUDOUT); vivid_create_instance() 884 v4l2_disable_ioctl(&dev->vbi_out_dev, VIDIOC_ENUMAUDOUT); vivid_create_instance() 887 v4l2_disable_ioctl(&dev->vid_cap_dev, VIDIOC_S_STD); vivid_create_instance() 888 v4l2_disable_ioctl(&dev->vid_cap_dev, VIDIOC_G_STD); vivid_create_instance() 889 v4l2_disable_ioctl(&dev->vid_cap_dev, VIDIOC_ENUMSTD); vivid_create_instance() 890 v4l2_disable_ioctl(&dev->vid_cap_dev, VIDIOC_QUERYSTD); vivid_create_instance() 893 v4l2_disable_ioctl(&dev->vid_out_dev, VIDIOC_S_STD); vivid_create_instance() 894 v4l2_disable_ioctl(&dev->vid_out_dev, VIDIOC_G_STD); vivid_create_instance() 895 v4l2_disable_ioctl(&dev->vid_out_dev, VIDIOC_ENUMSTD); vivid_create_instance() 898 v4l2_disable_ioctl(&dev->vid_cap_dev, VIDIOC_S_FREQUENCY); vivid_create_instance() 899 v4l2_disable_ioctl(&dev->vid_cap_dev, VIDIOC_G_FREQUENCY); vivid_create_instance() 900 v4l2_disable_ioctl(&dev->vbi_cap_dev, VIDIOC_S_FREQUENCY); vivid_create_instance() 901 v4l2_disable_ioctl(&dev->vbi_cap_dev, VIDIOC_G_FREQUENCY); vivid_create_instance() 904 v4l2_disable_ioctl(&dev->vid_cap_dev, VIDIOC_S_TUNER); vivid_create_instance() 905 v4l2_disable_ioctl(&dev->vid_cap_dev, VIDIOC_G_TUNER); vivid_create_instance() 906 v4l2_disable_ioctl(&dev->vbi_cap_dev, VIDIOC_S_TUNER); vivid_create_instance() 907 v4l2_disable_ioctl(&dev->vbi_cap_dev, VIDIOC_G_TUNER); vivid_create_instance() 910 v4l2_disable_ioctl(&dev->vid_cap_dev, VIDIOC_S_EDID); vivid_create_instance() 911 v4l2_disable_ioctl(&dev->vid_cap_dev, VIDIOC_G_EDID); vivid_create_instance() 912 v4l2_disable_ioctl(&dev->vid_cap_dev, VIDIOC_DV_TIMINGS_CAP); vivid_create_instance() 913 v4l2_disable_ioctl(&dev->vid_cap_dev, VIDIOC_G_DV_TIMINGS); vivid_create_instance() 914 v4l2_disable_ioctl(&dev->vid_cap_dev, VIDIOC_S_DV_TIMINGS); vivid_create_instance() 915 v4l2_disable_ioctl(&dev->vid_cap_dev, VIDIOC_ENUM_DV_TIMINGS); vivid_create_instance() 916 v4l2_disable_ioctl(&dev->vid_cap_dev, VIDIOC_QUERY_DV_TIMINGS); vivid_create_instance() 919 v4l2_disable_ioctl(&dev->vid_out_dev, VIDIOC_G_EDID); vivid_create_instance() 920 v4l2_disable_ioctl(&dev->vid_out_dev, VIDIOC_DV_TIMINGS_CAP); vivid_create_instance() 921 v4l2_disable_ioctl(&dev->vid_out_dev, VIDIOC_G_DV_TIMINGS); vivid_create_instance() 922 v4l2_disable_ioctl(&dev->vid_out_dev, VIDIOC_S_DV_TIMINGS); vivid_create_instance() 923 v4l2_disable_ioctl(&dev->vid_out_dev, VIDIOC_ENUM_DV_TIMINGS); vivid_create_instance() 925 if (!dev->has_fb) { vivid_create_instance() 926 v4l2_disable_ioctl(&dev->vid_out_dev, VIDIOC_G_FBUF); vivid_create_instance() 927 v4l2_disable_ioctl(&dev->vid_out_dev, VIDIOC_S_FBUF); vivid_create_instance() 928 v4l2_disable_ioctl(&dev->vid_out_dev, VIDIOC_OVERLAY); vivid_create_instance() 930 v4l2_disable_ioctl(&dev->vid_cap_dev, VIDIOC_S_HW_FREQ_SEEK); vivid_create_instance() 931 v4l2_disable_ioctl(&dev->vbi_cap_dev, VIDIOC_S_HW_FREQ_SEEK); vivid_create_instance() 932 v4l2_disable_ioctl(&dev->sdr_cap_dev, VIDIOC_S_HW_FREQ_SEEK); vivid_create_instance() 933 v4l2_disable_ioctl(&dev->vid_out_dev, VIDIOC_S_FREQUENCY); vivid_create_instance() 934 v4l2_disable_ioctl(&dev->vid_out_dev, VIDIOC_G_FREQUENCY); vivid_create_instance() 935 v4l2_disable_ioctl(&dev->vid_out_dev, VIDIOC_ENUM_FRAMESIZES); vivid_create_instance() 936 v4l2_disable_ioctl(&dev->vid_out_dev, VIDIOC_ENUM_FRAMEINTERVALS); vivid_create_instance() 937 v4l2_disable_ioctl(&dev->vbi_out_dev, VIDIOC_S_FREQUENCY); vivid_create_instance() 938 v4l2_disable_ioctl(&dev->vbi_out_dev, VIDIOC_G_FREQUENCY); vivid_create_instance() 941 dev->fmt_cap = &vivid_formats[0]; vivid_create_instance() 942 dev->fmt_out = &vivid_formats[0]; vivid_create_instance() 943 if (!dev->multiplanar) vivid_create_instance() 945 dev->webcam_size_idx = 1; vivid_create_instance() 946 dev->webcam_ival_idx = 3; vivid_create_instance() 947 tpg_s_fourcc(&dev->tpg, dev->fmt_cap->fourcc); vivid_create_instance() 948 dev->std_cap = V4L2_STD_PAL; vivid_create_instance() 949 dev->std_out = V4L2_STD_PAL; vivid_create_instance() 950 if (dev->input_type[0] == TV \|\| dev->input_type[0] == SVID) vivid_create_instance() 952 if (dev->output_type[0] == SVID) vivid_create_instance() 954 dev->dv_timings_cap = def_dv_timings; vivid_create_instance() 955 dev->dv_timings_out = def_dv_timings; vivid_create_instance() 956 dev->tv_freq = 2804 /* 175.25 * 16 /; vivid_create_instance() 957 dev->tv_audmode = V4L2_TUNER_MODE_STEREO; vivid_create_instance() 958 dev->tv_field_cap = V4L2_FIELD_INTERLACED; vivid_create_instance() 959 dev->tv_field_out = V4L2_FIELD_INTERLACED; vivid_create_instance() 960 dev->radio_rx_freq = 95000 16; vivid_create_instance() 961 dev->radio_rx_audmode = V4L2_TUNER_MODE_STEREO; vivid_create_instance() 962 if (dev->has_radio_tx) { vivid_create_instance() 963 dev->radio_tx_freq = 95500 * 16; vivid_create_instance() 964 dev->radio_rds_loop = false; vivid_create_instance() 966 dev->radio_tx_subchans = V4L2_TUNER_SUB_STEREO \| V4L2_TUNER_SUB_RDS; vivid_create_instance() 967 dev->sdr_adc_freq = 300000; vivid_create_instance() 968 dev->sdr_fm_freq = 50000000; vivid_create_instance() 969 dev->edid_max_blocks = dev->edid_blocks = 2; vivid_create_instance() 970 memcpy(dev->edid, vivid_hdmi_edid, sizeof(vivid_hdmi_edid)); vivid_create_instance() 971 ktime_get_ts(&dev->radio_rds_init_ts); vivid_create_instance() 974 ret = vivid_create_controls(dev, ccs_cap == -1, ccs_out == -1, no_error_inj, vivid_create_instance() 985 vivid_update_format_cap(dev, false); vivid_create_instance() 986 vivid_update_format_out(dev); vivid_create_instance() 988 v4l2_ctrl_handler_setup(&dev->ctrl_hdl_vid_cap); vivid_create_instance() 989 v4l2_ctrl_handler_setup(&dev->ctrl_hdl_vid_out); vivid_create_instance() 990 v4l2_ctrl_handler_setup(&dev->ctrl_hdl_vbi_cap); vivid_create_instance() 991 v4l2_ctrl_handler_setup(&dev->ctrl_hdl_vbi_out); vivid_create_instance() 992 v4l2_ctrl_handler_setup(&dev->ctrl_hdl_radio_rx); vivid_create_instance() 993 v4l2_ctrl_handler_setup(&dev->ctrl_hdl_radio_tx); vivid_create_instance() 994 v4l2_ctrl_handler_setup(&dev->ctrl_hdl_sdr_cap); vivid_create_instance() 997 dev->fb_cap.fmt.width = dev->src_rect.width; vivid_create_instance() 998 dev->fb_cap.fmt.height = dev->src_rect.height; vivid_create_instance() 999 dev->fb_cap.fmt.pixelformat = dev->fmt_cap->fourcc; vivid_create_instance() 1000 dev->fb_cap.fmt.bytesperline = dev->src_rect.width * tpg_g_twopixelsize(&dev->tpg, 0) / 2; vivid_create_instance() 1001 dev->fb_cap.fmt.sizeimage = dev->src_rect.height * dev->fb_cap.fmt.bytesperline; vivid_create_instance() 1004 spin_lock_init(&dev->slock); vivid_create_instance() 1005 mutex_init(&dev->mutex); vivid_create_instance() 1008 INIT_LIST_HEAD(&dev->vid_cap_active); vivid_create_instance() 1009 INIT_LIST_HEAD(&dev->vid_out_active); vivid_create_instance() 1010 INIT_LIST_HEAD(&dev->vbi_cap_active); vivid_create_instance() 1011 INIT_LIST_HEAD(&dev->vbi_out_active); vivid_create_instance() 1012 INIT_LIST_HEAD(&dev->sdr_cap_active); vivid_create_instance() 1015 if (dev->has_vid_cap) { vivid_create_instance() 1017 q = &dev->vb_vid_cap_q; vivid_create_instance() 1018 q->type = dev->multiplanar ? V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE : vivid_create_instance() 1021 q->drv_priv = dev; vivid_create_instance() 1027 q->lock = &dev->mutex; vivid_create_instance() 1034 if (dev->has_vid_out) { vivid_create_instance() 1036 q = &dev->vb_vid_out_q; vivid_create_instance() 1037 q->type = dev->multiplanar ? V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE : vivid_create_instance() 1040 q->drv_priv = dev; vivid_create_instance() 1046 q->lock = &dev->mutex; vivid_create_instance() 1053 if (dev->has_vbi_cap) { vivid_create_instance() 1055 q = &dev->vb_vbi_cap_q; vivid_create_instance() 1056 q->type = dev->has_raw_vbi_cap ? V4L2_BUF_TYPE_VBI_CAPTURE : vivid_create_instance() 1059 q->drv_priv = dev; vivid_create_instance() 1065 q->lock = &dev->mutex; vivid_create_instance() 1072 if (dev->has_vbi_out) { vivid_create_instance() 1074 q = &dev->vb_vbi_out_q; vivid_create_instance() 1075 q->type = dev->has_raw_vbi_out ? V4L2_BUF_TYPE_VBI_OUTPUT : vivid_create_instance() 1078 q->drv_priv = dev; vivid_create_instance() 1084 q->lock = &dev->mutex; vivid_create_instance() 1091 if (dev->has_sdr_cap) { vivid_create_instance() 1093 q = &dev->vb_sdr_cap_q; vivid_create_instance() 1096 q->drv_priv = dev; vivid_create_instance() 1102 q->lock = &dev->mutex; vivid_create_instance() 1109 if (dev->has_fb) { vivid_create_instance() 1111 ret = vivid_fb_init(dev); vivid_create_instance() 1114 v4l2_info(&dev->v4l2_dev, "Framebuffer device registered as fb%d\n", vivid_create_instance() 1115 dev->fb_info.node); vivid_create_instance() 1119 if (dev->has_vid_cap) { vivid_create_instance() 1120 vfd = &dev->vid_cap_dev; vivid_create_instance() 1125 vfd->v4l2_dev = &dev->v4l2_dev; vivid_create_instance() 1126 vfd->queue = &dev->vb_vid_cap_q; vivid_create_instance() 1133 vfd->lock = &dev->mutex; vivid_create_instance() 1134 video_set_drvdata(vfd, dev); vivid_create_instance() 1139 v4l2_info(&dev->v4l2_dev, "V4L2 capture device registered as %s\n", vivid_create_instance() 1143 if (dev->has_vid_out) { vivid_create_instance() 1144 vfd = &dev->vid_out_dev; vivid_create_instance() 1150 vfd->v4l2_dev = &dev->v4l2_dev; vivid_create_instance() 1151 vfd->queue = &dev->vb_vid_out_q; vivid_create_instance() 1158 vfd->lock = &dev->mutex; vivid_create_instance() 1159 video_set_drvdata(vfd, dev); vivid_create_instance() 1164 v4l2_info(&dev->v4l2_dev, "V4L2 output device registered as %s\n", vivid_create_instance() 1168 if (dev->has_vbi_cap) { vivid_create_instance() 1169 vfd = &dev->vbi_cap_dev; vivid_create_instance() 1174 vfd->v4l2_dev = &dev->v4l2_dev; vivid_create_instance() 1175 vfd->queue = &dev->vb_vbi_cap_q; vivid_create_instance() 1176 vfd->lock = &dev->mutex; vivid_create_instance() 1178 video_set_drvdata(vfd, dev); vivid_create_instance() 1183 v4l2_info(&dev->v4l2_dev, "V4L2 capture device registered as %s, supports %s VBI\n", vivid_create_instance() 1185 (dev->has_raw_vbi_cap && dev->has_sliced_vbi_cap) ? vivid_create_instance() 1187 (dev->has_raw_vbi_cap ? "raw" : "sliced")); vivid_create_instance() 1190 if (dev->has_vbi_out) { vivid_create_instance() 1191 vfd = &dev->vbi_out_dev; vivid_create_instance() 1197 vfd->v4l2_dev = &dev->v4l2_dev; vivid_create_instance() 1198 vfd->queue = &dev->vb_vbi_out_q; vivid_create_instance() 1199 vfd->lock = &dev->mutex; vivid_create_instance() 1201 video_set_drvdata(vfd, dev); vivid_create_instance() 1206 v4l2_info(&dev->v4l2_dev, "V4L2 output device registered as %s, supports %s VBI\n", vivid_create_instance() 1208 (dev->has_raw_vbi_out && dev->has_sliced_vbi_out) ? vivid_create_instance() 1210 (dev->has_raw_vbi_out ? "raw" : "sliced")); vivid_create_instance() 1213 if (dev->has_sdr_cap) { vivid_create_instance() 1214 vfd = &dev->sdr_cap_dev; vivid_create_instance() 1219 vfd->v4l2_dev = &dev->v4l2_dev; vivid_create_instance() 1220 vfd->queue = &dev->vb_sdr_cap_q; vivid_create_instance() 1221 vfd->lock = &dev->mutex; vivid_create_instance() 1222 video_set_drvdata(vfd, dev); vivid_create_instance() 1227 v4l2_info(&dev->v4l2_dev, "V4L2 capture device registered as %s\n", vivid_create_instance() 1231 if (dev->has_radio_rx) { vivid_create_instance() 1232 vfd = &dev->radio_rx_dev; vivid_create_instance() 1237 vfd->v4l2_dev = &dev->v4l2_dev; vivid_create_instance() 1238 vfd->lock = &dev->mutex; vivid_create_instance() 1239 video_set_drvdata(vfd, dev); vivid_create_instance() 1244 v4l2_info(&dev->v4l2_dev, "V4L2 receiver device registered as %s\n", vivid_create_instance() 1248 if (dev->has_radio_tx) { vivid_create_instance() 1249 vfd = &dev->radio_tx_dev; vivid_create_instance() 1255 vfd->v4l2_dev = &dev->v4l2_dev; vivid_create_instance() 1256 vfd->lock = &dev->mutex; vivid_create_instance() 1257 video_set_drvdata(vfd, dev); vivid_create_instance() 1262 v4l2_info(&dev->v4l2_dev, "V4L2 transmitter device registered as %s\n", vivid_create_instance() 1267 vivid_devs[inst] = dev; vivid_create_instance() 1272 video_unregister_device(&dev->radio_tx_dev); vivid_create_instance() 1273 video_unregister_device(&dev->radio_rx_dev); vivid_create_instance() 1274 video_unregister_device(&dev->sdr_cap_dev); vivid_create_instance() 1275 video_unregister_device(&dev->vbi_out_dev); vivid_create_instance() 1276 video_unregister_device(&dev->vbi_cap_dev); vivid_create_instance() 1277 video_unregister_device(&dev->vid_out_dev); vivid_create_instance() 1278 video_unregister_device(&dev->vid_cap_dev); vivid_create_instance() 1280 v4l2_device_put(&dev->v4l2_dev); vivid_create_instance() 1327 struct vivid_dev dev; vivid_remove() local 1331 dev = vivid_devs[i]; vivid_remove() 1333 if (dev->has_vid_cap) { vivid_remove() 1334 v4l2_info(&dev->v4l2_dev, "unregistering %s\n", vivid_remove() 1335 video_device_node_name(&dev->vid_cap_dev)); vivid_remove() 1336 video_unregister_device(&dev->vid_cap_dev); vivid_remove() 1338 if (dev->has_vid_out) { vivid_remove() 1339 v4l2_info(&dev->v4l2_dev, "unregistering %s\n", vivid_remove() 1340 video_device_node_name(&dev->vid_out_dev)); vivid_remove() 1341 video_unregister_device(&dev->vid_out_dev); vivid_remove() 1343 if (dev->has_vbi_cap) { vivid_remove() 1344 v4l2_info(&dev->v4l2_dev, "unregistering %s\n", vivid_remove() 1345 video_device_node_name(&dev->vbi_cap_dev)); vivid_remove() 1346 video_unregister_device(&dev->vbi_cap_dev); vivid_remove() 1348 if (dev->has_vbi_out) { vivid_remove() 1349 v4l2_info(&dev->v4l2_dev, "unregistering %s\n", vivid_remove() 1350 video_device_node_name(&dev->vbi_out_dev)); vivid_remove() 1351 video_unregister_device(&dev->vbi_out_dev); vivid_remove() 1353 if (dev->has_sdr_cap) { vivid_remove() 1354 v4l2_info(&dev->v4l2_dev, "unregistering %s\n", vivid_remove() 1355 video_device_node_name(&dev->sdr_cap_dev)); vivid_remove() 1356 video_unregister_device(&dev->sdr_cap_dev); vivid_remove() 1358 if (dev->has_radio_rx) { vivid_remove() 1359 v4l2_info(&dev->v4l2_dev, "unregistering %s\n", vivid_remove() 1360 video_device_node_name(&dev->radio_rx_dev)); vivid_remove() 1361 video_unregister_device(&dev->radio_rx_dev); vivid_remove() 1363 if (dev->has_radio_tx) { vivid_remove() 1364 v4l2_info(&dev->v4l2_dev, "unregistering %s\n", vivid_remove() 1365 video_device_node_name(&dev->radio_tx_dev)); vivid_remove() 1366 video_unregister_device(&dev->radio_tx_dev); vivid_remove() 1368 if (dev->has_fb) { vivid_remove() 1369 v4l2_info(&dev->v4l2_dev, "unregistering fb%d\n", vivid_remove() 1370 dev->fb_info.node); vivid_remove() 1371 unregister_framebuffer(&dev->fb_info); vivid_remove() 1372 vivid_fb_release_buffers(dev); vivid_remove() 1374 v4l2_device_put(&dev->v4l2_dev); vivid_remove() 1380 static void vivid_pdev_release(struct device dev) vivid_pdev_release() argument 1386 .dev.release = vivid_pdev_release,
H A D	vivid-ctrls.c	106 struct vivid_dev dev = container_of(ctrl->handler, struct vivid_dev, ctrl_hdl_user_gen); vivid_user_gen_s_ctrl() local 110 v4l2_info(&dev->v4l2_dev, "disconnect\n"); vivid_user_gen_s_ctrl() 111 clear_bit(V4L2_FL_REGISTERED, &dev->vid_cap_dev.flags); vivid_user_gen_s_ctrl() 112 clear_bit(V4L2_FL_REGISTERED, &dev->vid_out_dev.flags); vivid_user_gen_s_ctrl() 113 clear_bit(V4L2_FL_REGISTERED, &dev->vbi_cap_dev.flags); vivid_user_gen_s_ctrl() 114 clear_bit(V4L2_FL_REGISTERED, &dev->vbi_out_dev.flags); vivid_user_gen_s_ctrl() 115 clear_bit(V4L2_FL_REGISTERED, &dev->sdr_cap_dev.flags); vivid_user_gen_s_ctrl() 116 clear_bit(V4L2_FL_REGISTERED, &dev->radio_rx_dev.flags); vivid_user_gen_s_ctrl() 117 clear_bit(V4L2_FL_REGISTERED, &dev->radio_tx_dev.flags); vivid_user_gen_s_ctrl() 120 vivid_clear_fb(dev); vivid_user_gen_s_ctrl() 123 dev->button_pressed = 30; vivid_user_gen_s_ctrl() 285 struct vivid_dev dev = container_of(ctrl->handler, struct vivid_dev, ctrl_hdl_user_vid); vivid_user_vid_g_volatile_ctrl() local 289 dev->gain->val = dev->jiffies_vid_cap & 0xff; vivid_user_vid_g_volatile_ctrl() 297 struct vivid_dev dev = container_of(ctrl->handler, struct vivid_dev, ctrl_hdl_user_vid); vivid_user_vid_s_ctrl() local 301 dev->input_brightness[dev->input] = ctrl->val - dev->input 128; vivid_user_vid_s_ctrl() 302 tpg_s_brightness(&dev->tpg, dev->input_brightness[dev->input]); vivid_user_vid_s_ctrl() 305 tpg_s_contrast(&dev->tpg, ctrl->val); vivid_user_vid_s_ctrl() 308 tpg_s_saturation(&dev->tpg, ctrl->val); vivid_user_vid_s_ctrl() 311 tpg_s_hue(&dev->tpg, ctrl->val); vivid_user_vid_s_ctrl() 314 dev->hflip = ctrl->val; vivid_user_vid_s_ctrl() 315 tpg_s_hflip(&dev->tpg, dev->sensor_hflip ^ dev->hflip); vivid_user_vid_s_ctrl() 318 dev->vflip = ctrl->val; vivid_user_vid_s_ctrl() 319 tpg_s_vflip(&dev->tpg, dev->sensor_vflip ^ dev->vflip); vivid_user_vid_s_ctrl() 322 tpg_s_alpha_component(&dev->tpg, ctrl->val); vivid_user_vid_s_ctrl() 348 struct vivid_dev dev = container_of(ctrl->handler, struct vivid_dev, ctrl_hdl_vid_cap); vivid_vid_cap_s_ctrl() local 353 vivid_update_quality(dev); vivid_vid_cap_s_ctrl() 354 tpg_s_pattern(&dev->tpg, ctrl->val); vivid_vid_cap_s_ctrl() 357 tpg_s_colorspace(&dev->tpg, colorspaces[ctrl->val]); vivid_vid_cap_s_ctrl() 358 vivid_send_source_change(dev, TV); vivid_vid_cap_s_ctrl() 359 vivid_send_source_change(dev, SVID); vivid_vid_cap_s_ctrl() 360 vivid_send_source_change(dev, HDMI); vivid_vid_cap_s_ctrl() 361 vivid_send_source_change(dev, WEBCAM); vivid_vid_cap_s_ctrl() 364 tpg_s_ycbcr_enc(&dev->tpg, ctrl->val); vivid_vid_cap_s_ctrl() 365 vivid_send_source_change(dev, TV); vivid_vid_cap_s_ctrl() 366 vivid_send_source_change(dev, SVID); vivid_vid_cap_s_ctrl() 367 vivid_send_source_change(dev, HDMI); vivid_vid_cap_s_ctrl() 368 vivid_send_source_change(dev, WEBCAM); vivid_vid_cap_s_ctrl() 371 tpg_s_quantization(&dev->tpg, ctrl->val); vivid_vid_cap_s_ctrl() 372 vivid_send_source_change(dev, TV); vivid_vid_cap_s_ctrl() 373 vivid_send_source_change(dev, SVID); vivid_vid_cap_s_ctrl() 374 vivid_send_source_change(dev, HDMI); vivid_vid_cap_s_ctrl() 375 vivid_send_source_change(dev, WEBCAM); vivid_vid_cap_s_ctrl() 378 if (!vivid_is_hdmi_cap(dev)) vivid_vid_cap_s_ctrl() 380 tpg_s_rgb_range(&dev->tpg, ctrl->val); vivid_vid_cap_s_ctrl() 383 tpg_s_real_rgb_range(&dev->tpg, ctrl->val ? vivid_vid_cap_s_ctrl() 387 tpg_s_alpha_mode(&dev->tpg, ctrl->val); vivid_vid_cap_s_ctrl() 390 tpg_s_mv_hor_mode(&dev->tpg, ctrl->val); vivid_vid_cap_s_ctrl() 393 tpg_s_mv_vert_mode(&dev->tpg, ctrl->val); vivid_vid_cap_s_ctrl() 396 dev->osd_mode = ctrl->val; vivid_vid_cap_s_ctrl() 399 tpg_s_perc_fill(&dev->tpg, ctrl->val); vivid_vid_cap_s_ctrl() 401 dev->must_blank[i] = ctrl->val < 100; vivid_vid_cap_s_ctrl() 404 tpg_s_insert_sav(&dev->tpg, ctrl->val); vivid_vid_cap_s_ctrl() 407 tpg_s_insert_eav(&dev->tpg, ctrl->val); vivid_vid_cap_s_ctrl() 410 dev->sensor_hflip = ctrl->val; vivid_vid_cap_s_ctrl() 411 tpg_s_hflip(&dev->tpg, dev->sensor_hflip ^ dev->hflip); vivid_vid_cap_s_ctrl() 414 dev->sensor_vflip = ctrl->val; vivid_vid_cap_s_ctrl() 415 tpg_s_vflip(&dev->tpg, dev->sensor_vflip ^ dev->vflip); vivid_vid_cap_s_ctrl() 418 dev->has_crop_cap = ctrl->val; vivid_vid_cap_s_ctrl() 419 vivid_update_format_cap(dev, true); vivid_vid_cap_s_ctrl() 422 dev->has_compose_cap = ctrl->val; vivid_vid_cap_s_ctrl() 423 vivid_update_format_cap(dev, true); vivid_vid_cap_s_ctrl() 426 dev->has_scaler_cap = ctrl->val; vivid_vid_cap_s_ctrl() 427 vivid_update_format_cap(dev, true); vivid_vid_cap_s_ctrl() 430 tpg_s_show_border(&dev->tpg, ctrl->val); vivid_vid_cap_s_ctrl() 433 tpg_s_show_square(&dev->tpg, ctrl->val); vivid_vid_cap_s_ctrl() 436 dev->std_aspect_ratio = ctrl->val; vivid_vid_cap_s_ctrl() 437 tpg_s_video_aspect(&dev->tpg, vivid_get_video_aspect(dev)); vivid_vid_cap_s_ctrl() 440 dev->dv_timings_signal_mode = dev->ctrl_dv_timings_signal_mode->val; vivid_vid_cap_s_ctrl() 441 if (dev->dv_timings_signal_mode == SELECTED_DV_TIMINGS) vivid_vid_cap_s_ctrl() 442 dev->query_dv_timings = dev->ctrl_dv_timings->val; vivid_vid_cap_s_ctrl() 443 v4l2_ctrl_activate(dev->ctrl_dv_timings, vivid_vid_cap_s_ctrl() 444 dev->dv_timings_signal_mode == SELECTED_DV_TIMINGS); vivid_vid_cap_s_ctrl() 445 vivid_update_quality(dev); vivid_vid_cap_s_ctrl() 446 vivid_send_source_change(dev, HDMI); vivid_vid_cap_s_ctrl() 449 dev->dv_timings_aspect_ratio = ctrl->val; vivid_vid_cap_s_ctrl() 450 tpg_s_video_aspect(&dev->tpg, vivid_get_video_aspect(dev)); vivid_vid_cap_s_ctrl() 453 dev->tstamp_src_is_soe = ctrl->val; vivid_vid_cap_s_ctrl() 454 dev->vb_vid_cap_q.timestamp_flags &= ~V4L2_BUF_FLAG_TSTAMP_SRC_MASK; vivid_vid_cap_s_ctrl() 455 if (dev->tstamp_src_is_soe) vivid_vid_cap_s_ctrl() 456 dev->vb_vid_cap_q.timestamp_flags \|= V4L2_BUF_FLAG_TSTAMP_SRC_SOE; vivid_vid_cap_s_ctrl() 459 dev->edid_max_blocks = ctrl->val; vivid_vid_cap_s_ctrl() 460 if (dev->edid_blocks > dev->edid_max_blocks) vivid_vid_cap_s_ctrl() 461 dev->edid_blocks = dev->edid_max_blocks; vivid_vid_cap_s_ctrl() 773 struct vivid_dev dev = container_of(ctrl->handler, struct vivid_dev, ctrl_hdl_vbi_cap); vivid_vbi_cap_s_ctrl() local 777 dev->vbi_cap_interlaced = ctrl->val; vivid_vbi_cap_s_ctrl() 801 struct vivid_dev dev = container_of(ctrl->handler, struct vivid_dev, ctrl_hdl_vid_out); vivid_vid_out_s_ctrl() local 802 struct v4l2_bt_timings bt = &dev->dv_timings_out.bt; vivid_vid_out_s_ctrl() 806 dev->has_crop_out = ctrl->val; vivid_vid_out_s_ctrl() 807 vivid_update_format_out(dev); vivid_vid_out_s_ctrl() 810 dev->has_compose_out = ctrl->val; vivid_vid_out_s_ctrl() 811 vivid_update_format_out(dev); vivid_vid_out_s_ctrl() 814 dev->has_scaler_out = ctrl->val; vivid_vid_out_s_ctrl() 815 vivid_update_format_out(dev); vivid_vid_out_s_ctrl() 818 dev->dvi_d_out = ctrl->val == V4L2_DV_TX_MODE_DVI_D; vivid_vid_out_s_ctrl() 819 if (!vivid_is_hdmi_out(dev)) vivid_vid_out_s_ctrl() 821 if (!dev->dvi_d_out && (bt->flags & V4L2_DV_FL_IS_CE_VIDEO)) { vivid_vid_out_s_ctrl() 823 dev->colorspace_out = V4L2_COLORSPACE_SMPTE170M; vivid_vid_out_s_ctrl() 825 dev->colorspace_out = V4L2_COLORSPACE_REC709; vivid_vid_out_s_ctrl() 826 dev->quantization_out = V4L2_QUANTIZATION_DEFAULT; vivid_vid_out_s_ctrl() 828 dev->colorspace_out = V4L2_COLORSPACE_SRGB; vivid_vid_out_s_ctrl() 829 dev->quantization_out = dev->dvi_d_out ? vivid_vid_out_s_ctrl() 833 if (dev->loop_video) vivid_vid_out_s_ctrl() 834 vivid_send_source_change(dev, HDMI); vivid_vid_out_s_ctrl() 879 struct vivid_dev dev = container_of(ctrl->handler, struct vivid_dev, ctrl_hdl_streaming); vivid_streaming_s_ctrl() local 884 dev->dqbuf_error = true; vivid_streaming_s_ctrl() 887 dev->perc_dropped_buffers = ctrl->val; vivid_streaming_s_ctrl() 890 dev->queue_setup_error = true; vivid_streaming_s_ctrl() 893 dev->buf_prepare_error = true; vivid_streaming_s_ctrl() 896 dev->start_streaming_error = true; vivid_streaming_s_ctrl() 899 if (vb2_start_streaming_called(&dev->vb_vid_cap_q)) vivid_streaming_s_ctrl() 900 vb2_queue_error(&dev->vb_vid_cap_q); vivid_streaming_s_ctrl() 901 if (vb2_start_streaming_called(&dev->vb_vbi_cap_q)) vivid_streaming_s_ctrl() 902 vb2_queue_error(&dev->vb_vbi_cap_q); vivid_streaming_s_ctrl() 903 if (vb2_start_streaming_called(&dev->vb_vid_out_q)) vivid_streaming_s_ctrl() 904 vb2_queue_error(&dev->vb_vid_out_q); vivid_streaming_s_ctrl() 905 if (vb2_start_streaming_called(&dev->vb_vbi_out_q)) vivid_streaming_s_ctrl() 906 vb2_queue_error(&dev->vb_vbi_out_q); vivid_streaming_s_ctrl() 907 if (vb2_start_streaming_called(&dev->vb_sdr_cap_q)) vivid_streaming_s_ctrl() 908 vb2_queue_error(&dev->vb_sdr_cap_q); vivid_streaming_s_ctrl() 911 dev->seq_wrap = ctrl->val; vivid_streaming_s_ctrl() 914 dev->time_wrap = ctrl->val; vivid_streaming_s_ctrl() 916 dev->time_wrap_offset = 0; vivid_streaming_s_ctrl() 920 dev->time_wrap_offset = -tv.tv_sec - 16; vivid_streaming_s_ctrl() 998 struct vivid_dev dev = container_of(ctrl->handler, struct vivid_dev, ctrl_hdl_sdtv_cap); vivid_sdtv_cap_s_ctrl() local 1002 dev->std_signal_mode = dev->ctrl_std_signal_mode->val; vivid_sdtv_cap_s_ctrl() 1003 if (dev->std_signal_mode == SELECTED_STD) vivid_sdtv_cap_s_ctrl() 1004 dev->query_std = vivid_standard[dev->ctrl_standard->val]; vivid_sdtv_cap_s_ctrl() 1005 v4l2_ctrl_activate(dev->ctrl_standard, dev->std_signal_mode == SELECTED_STD); vivid_sdtv_cap_s_ctrl() 1006 vivid_update_quality(dev); vivid_sdtv_cap_s_ctrl() 1007 vivid_send_source_change(dev, TV); vivid_sdtv_cap_s_ctrl() 1008 vivid_send_source_change(dev, SVID); vivid_sdtv_cap_s_ctrl() 1053 struct vivid_dev dev = container_of(ctrl->handler, struct vivid_dev, ctrl_hdl_radio_rx); vivid_radio_rx_s_ctrl() local 1057 dev->radio_rx_hw_seek_mode = ctrl->val; vivid_radio_rx_s_ctrl() 1060 dev->radio_rx_hw_seek_prog_lim = ctrl->val; vivid_radio_rx_s_ctrl() 1063 dev->rds_gen.use_rbds = ctrl->val; vivid_radio_rx_s_ctrl() 1066 dev->radio_rx_rds_controls = ctrl->val; vivid_radio_rx_s_ctrl() 1067 dev->radio_rx_caps &= ~V4L2_CAP_READWRITE; vivid_radio_rx_s_ctrl() 1068 dev->radio_rx_rds_use_alternates = false; vivid_radio_rx_s_ctrl() 1069 if (!dev->radio_rx_rds_controls) { vivid_radio_rx_s_ctrl() 1070 dev->radio_rx_caps \|= V4L2_CAP_READWRITE; vivid_radio_rx_s_ctrl() 1071 __v4l2_ctrl_s_ctrl(dev->radio_rx_rds_pty, 0); vivid_radio_rx_s_ctrl() 1072 __v4l2_ctrl_s_ctrl(dev->radio_rx_rds_ta, 0); vivid_radio_rx_s_ctrl() 1073 __v4l2_ctrl_s_ctrl(dev->radio_rx_rds_tp, 0); vivid_radio_rx_s_ctrl() 1074 __v4l2_ctrl_s_ctrl(dev->radio_rx_rds_ms, 0); vivid_radio_rx_s_ctrl() 1075 __v4l2_ctrl_s_ctrl_string(dev->radio_rx_rds_psname, ""); vivid_radio_rx_s_ctrl() 1076 __v4l2_ctrl_s_ctrl_string(dev->radio_rx_rds_radiotext, ""); vivid_radio_rx_s_ctrl() 1078 v4l2_ctrl_activate(dev->radio_rx_rds_pty, dev->radio_rx_rds_controls); vivid_radio_rx_s_ctrl() 1079 v4l2_ctrl_activate(dev->radio_rx_rds_psname, dev->radio_rx_rds_controls); vivid_radio_rx_s_ctrl() 1080 v4l2_ctrl_activate(dev->radio_rx_rds_radiotext, dev->radio_rx_rds_controls); vivid_radio_rx_s_ctrl() 1081 v4l2_ctrl_activate(dev->radio_rx_rds_ta, dev->radio_rx_rds_controls); vivid_radio_rx_s_ctrl() 1082 v4l2_ctrl_activate(dev->radio_rx_rds_tp, dev->radio_rx_rds_controls); vivid_radio_rx_s_ctrl() 1083 v4l2_ctrl_activate(dev->radio_rx_rds_ms, dev->radio_rx_rds_controls); vivid_radio_rx_s_ctrl() 1086 dev->radio_rx_rds_enabled = ctrl->val; vivid_radio_rx_s_ctrl() 1150 struct vivid_dev dev = container_of(ctrl->handler, struct vivid_dev, ctrl_hdl_radio_tx); vivid_radio_tx_s_ctrl() local 1154 dev->radio_tx_rds_controls = ctrl->val; vivid_radio_tx_s_ctrl() 1155 dev->radio_tx_caps &= ~V4L2_CAP_READWRITE; vivid_radio_tx_s_ctrl() 1156 if (!dev->radio_tx_rds_controls) vivid_radio_tx_s_ctrl() 1157 dev->radio_tx_caps \|= V4L2_CAP_READWRITE; vivid_radio_tx_s_ctrl() 1160 if (dev->radio_rx_rds_controls) vivid_radio_tx_s_ctrl() 1161 v4l2_ctrl_s_ctrl(dev->radio_rx_rds_pty, ctrl->val); vivid_radio_tx_s_ctrl() 1164 if (dev->radio_rx_rds_controls) vivid_radio_tx_s_ctrl() 1165 v4l2_ctrl_s_ctrl_string(dev->radio_rx_rds_psname, ctrl->p_new.p_char); vivid_radio_tx_s_ctrl() 1168 if (dev->radio_rx_rds_controls) vivid_radio_tx_s_ctrl() 1169 v4l2_ctrl_s_ctrl_string(dev->radio_rx_rds_radiotext, ctrl->p_new.p_char); vivid_radio_tx_s_ctrl() 1172 if (dev->radio_rx_rds_controls) vivid_radio_tx_s_ctrl() 1173 v4l2_ctrl_s_ctrl(dev->radio_rx_rds_ta, ctrl->val); vivid_radio_tx_s_ctrl() 1176 if (dev->radio_rx_rds_controls) vivid_radio_tx_s_ctrl() 1177 v4l2_ctrl_s_ctrl(dev->radio_rx_rds_tp, ctrl->val); vivid_radio_tx_s_ctrl() 1180 if (dev->radio_rx_rds_controls) vivid_radio_tx_s_ctrl() 1181 v4l2_ctrl_s_ctrl(dev->radio_rx_rds_ms, ctrl->val); vivid_radio_tx_s_ctrl() 1207 struct vivid_dev dev = container_of(ctrl->handler, struct vivid_dev, ctrl_hdl_loop_out); vivid_loop_out_s_ctrl() local 1211 dev->loop_video = ctrl->val; vivid_loop_out_s_ctrl() 1212 vivid_update_quality(dev); vivid_loop_out_s_ctrl() 1213 vivid_send_source_change(dev, SVID); vivid_loop_out_s_ctrl() 1214 vivid_send_source_change(dev, HDMI); vivid_loop_out_s_ctrl() 1242 int vivid_create_controls(struct vivid_dev dev, bool show_ccs_cap, vivid_create_controls() argument 1246 struct v4l2_ctrl_handler hdl_user_gen = &dev->ctrl_hdl_user_gen; vivid_create_controls() 1247 struct v4l2_ctrl_handler hdl_user_vid = &dev->ctrl_hdl_user_vid; vivid_create_controls() 1248 struct v4l2_ctrl_handler hdl_user_aud = &dev->ctrl_hdl_user_aud; vivid_create_controls() 1249 struct v4l2_ctrl_handler hdl_streaming = &dev->ctrl_hdl_streaming; vivid_create_controls() 1250 struct v4l2_ctrl_handler hdl_sdtv_cap = &dev->ctrl_hdl_sdtv_cap; vivid_create_controls() 1251 struct v4l2_ctrl_handler hdl_loop_out = &dev->ctrl_hdl_loop_out; vivid_create_controls() 1252 struct v4l2_ctrl_handler hdl_vid_cap = &dev->ctrl_hdl_vid_cap; vivid_create_controls() 1253 struct v4l2_ctrl_handler hdl_vid_out = &dev->ctrl_hdl_vid_out; vivid_create_controls() 1254 struct v4l2_ctrl_handler hdl_vbi_cap = &dev->ctrl_hdl_vbi_cap; vivid_create_controls() 1255 struct v4l2_ctrl_handler hdl_vbi_out = &dev->ctrl_hdl_vbi_out; vivid_create_controls() 1256 struct v4l2_ctrl_handler hdl_radio_rx = &dev->ctrl_hdl_radio_rx; vivid_create_controls() 1257 struct v4l2_ctrl_handler hdl_radio_tx = &dev->ctrl_hdl_radio_tx; vivid_create_controls() 1258 struct v4l2_ctrl_handler hdl_sdr_cap = &dev->ctrl_hdl_sdr_cap; vivid_create_controls() 1295 dev->volume = v4l2_ctrl_new_std(hdl_user_aud, NULL, vivid_create_controls() 1297 dev->mute = v4l2_ctrl_new_std(hdl_user_aud, NULL, vivid_create_controls() 1299 if (dev->has_vid_cap) { vivid_create_controls() 1300 dev->brightness = v4l2_ctrl_new_std(hdl_user_vid, &vivid_user_vid_ctrl_ops, vivid_create_controls() 1303 dev->input_brightness[i] = 128; vivid_create_controls() 1304 dev->contrast = v4l2_ctrl_new_std(hdl_user_vid, &vivid_user_vid_ctrl_ops, vivid_create_controls() 1306 dev->saturation = v4l2_ctrl_new_std(hdl_user_vid, &vivid_user_vid_ctrl_ops, vivid_create_controls() 1308 dev->hue = v4l2_ctrl_new_std(hdl_user_vid, &vivid_user_vid_ctrl_ops, vivid_create_controls() 1314 dev->autogain = v4l2_ctrl_new_std(hdl_user_vid, &vivid_user_vid_ctrl_ops, vivid_create_controls() 1316 dev->gain = v4l2_ctrl_new_std(hdl_user_vid, &vivid_user_vid_ctrl_ops, vivid_create_controls() 1318 dev->alpha = v4l2_ctrl_new_std(hdl_user_vid, &vivid_user_vid_ctrl_ops, vivid_create_controls() 1321 dev->button = v4l2_ctrl_new_custom(hdl_user_gen, &vivid_ctrl_button, NULL); vivid_create_controls() 1322 dev->int32 = v4l2_ctrl_new_custom(hdl_user_gen, &vivid_ctrl_int32, NULL); vivid_create_controls() 1323 dev->int64 = v4l2_ctrl_new_custom(hdl_user_gen, &vivid_ctrl_int64, NULL); vivid_create_controls() 1324 dev->boolean = v4l2_ctrl_new_custom(hdl_user_gen, &vivid_ctrl_boolean, NULL); vivid_create_controls() 1325 dev->menu = v4l2_ctrl_new_custom(hdl_user_gen, &vivid_ctrl_menu, NULL); vivid_create_controls() 1326 dev->string = v4l2_ctrl_new_custom(hdl_user_gen, &vivid_ctrl_string, NULL); vivid_create_controls() 1327 dev->bitmask = v4l2_ctrl_new_custom(hdl_user_gen, &vivid_ctrl_bitmask, NULL); vivid_create_controls() 1328 dev->int_menu = v4l2_ctrl_new_custom(hdl_user_gen, &vivid_ctrl_int_menu, NULL); vivid_create_controls() 1333 if (dev->has_vid_cap) { vivid_create_controls() 1344 dev->test_pattern = v4l2_ctrl_new_custom(hdl_vid_cap, vivid_create_controls() 1357 dev->ctrl_has_crop_cap = v4l2_ctrl_new_custom(hdl_vid_cap, vivid_create_controls() 1359 dev->ctrl_has_compose_cap = v4l2_ctrl_new_custom(hdl_vid_cap, vivid_create_controls() 1361 dev->ctrl_has_scaler_cap = v4l2_ctrl_new_custom(hdl_vid_cap, vivid_create_controls() 1366 dev->colorspace = v4l2_ctrl_new_custom(hdl_vid_cap, vivid_create_controls() 1373 if (dev->has_vid_out && show_ccs_out) { vivid_create_controls() 1374 dev->ctrl_has_crop_out = v4l2_ctrl_new_custom(hdl_vid_out, vivid_create_controls() 1376 dev->ctrl_has_compose_out = v4l2_ctrl_new_custom(hdl_vid_out, vivid_create_controls() 1378 dev->ctrl_has_scaler_out = v4l2_ctrl_new_custom(hdl_vid_out, vivid_create_controls() 1400 if (has_sdtv && (dev->has_vid_cap \|\| dev->has_vbi_cap)) { vivid_create_controls() 1401 if (dev->has_vid_cap) vivid_create_controls() 1403 dev->ctrl_std_signal_mode = v4l2_ctrl_new_custom(hdl_sdtv_cap, vivid_create_controls() 1405 dev->ctrl_standard = v4l2_ctrl_new_custom(hdl_sdtv_cap, vivid_create_controls() 1407 if (dev->ctrl_std_signal_mode) vivid_create_controls() 1408 v4l2_ctrl_cluster(2, &dev->ctrl_std_signal_mode); vivid_create_controls() 1409 if (dev->has_raw_vbi_cap) vivid_create_controls() 1413 if (has_hdmi && dev->has_vid_cap) { vivid_create_controls() 1414 dev->ctrl_dv_timings_signal_mode = v4l2_ctrl_new_custom(hdl_vid_cap, vivid_create_controls() 1417 vivid_ctrl_dv_timings.max = dev->query_dv_timings_size - 1; vivid_create_controls() 1419 (const char const )dev->query_dv_timings_qmenu; vivid_create_controls() 1420 dev->ctrl_dv_timings = v4l2_ctrl_new_custom(hdl_vid_cap, vivid_create_controls() 1422 if (dev->ctrl_dv_timings_signal_mode) vivid_create_controls() 1423 v4l2_ctrl_cluster(2, &dev->ctrl_dv_timings_signal_mode); vivid_create_controls() 1427 dev->real_rgb_range_cap = v4l2_ctrl_new_custom(hdl_vid_cap, vivid_create_controls() 1429 dev->rgb_range_cap = v4l2_ctrl_new_std_menu(hdl_vid_cap, vivid_create_controls() 1434 if (has_hdmi && dev->has_vid_out) { vivid_create_controls() 1439 dev->ctrl_tx_rgb_range = v4l2_ctrl_new_std_menu(hdl_vid_out, NULL, vivid_create_controls() 1442 dev->ctrl_tx_mode = v4l2_ctrl_new_std_menu(hdl_vid_out, NULL, vivid_create_controls() 1446 if ((dev->has_vid_cap && dev->has_vid_out) \|\| vivid_create_controls() 1447 (dev->has_vbi_cap && dev->has_vbi_out)) vivid_create_controls() 1450 if (dev->has_fb) vivid_create_controls() 1453 if (dev->has_radio_rx) { vivid_create_controls() 1460 dev->radio_rx_rds_pty = v4l2_ctrl_new_std(hdl_radio_rx, vivid_create_controls() 1463 dev->radio_rx_rds_psname = v4l2_ctrl_new_std(hdl_radio_rx, vivid_create_controls() 1466 dev->radio_rx_rds_radiotext = v4l2_ctrl_new_std(hdl_radio_rx, vivid_create_controls() 1469 dev->radio_rx_rds_ta = v4l2_ctrl_new_std(hdl_radio_rx, vivid_create_controls() 1472 dev->radio_rx_rds_tp = v4l2_ctrl_new_std(hdl_radio_rx, vivid_create_controls() 1475 dev->radio_rx_rds_ms = v4l2_ctrl_new_std(hdl_radio_rx, vivid_create_controls() 1479 if (dev->has_radio_tx) { vivid_create_controls() 1482 dev->radio_tx_rds_pi = v4l2_ctrl_new_std(hdl_radio_tx, vivid_create_controls() 1485 dev->radio_tx_rds_pty = v4l2_ctrl_new_std(hdl_radio_tx, vivid_create_controls() 1488 dev->radio_tx_rds_psname = v4l2_ctrl_new_std(hdl_radio_tx, vivid_create_controls() 1491 if (dev->radio_tx_rds_psname) vivid_create_controls() 1492 v4l2_ctrl_s_ctrl_string(dev->radio_tx_rds_psname, "VIVID-TX"); vivid_create_controls() 1493 dev->radio_tx_rds_radiotext = v4l2_ctrl_new_std(hdl_radio_tx, vivid_create_controls() 1496 if (dev->radio_tx_rds_radiotext) vivid_create_controls() 1497 v4l2_ctrl_s_ctrl_string(dev->radio_tx_rds_radiotext, vivid_create_controls() 1499 dev->radio_tx_rds_mono_stereo = v4l2_ctrl_new_std(hdl_radio_tx, vivid_create_controls() 1502 dev->radio_tx_rds_art_head = v4l2_ctrl_new_std(hdl_radio_tx, vivid_create_controls() 1505 dev->radio_tx_rds_compressed = v4l2_ctrl_new_std(hdl_radio_tx, vivid_create_controls() 1508 dev->radio_tx_rds_dyn_pty = v4l2_ctrl_new_std(hdl_radio_tx, vivid_create_controls() 1511 dev->radio_tx_rds_ta = v4l2_ctrl_new_std(hdl_radio_tx, vivid_create_controls() 1514 dev->radio_tx_rds_tp = v4l2_ctrl_new_std(hdl_radio_tx, vivid_create_controls() 1517 dev->radio_tx_rds_ms = v4l2_ctrl_new_std(hdl_radio_tx, vivid_create_controls() 1534 if (dev->autogain) vivid_create_controls() 1535 v4l2_ctrl_auto_cluster(2, &dev->autogain, 0, true); vivid_create_controls() 1537 if (dev->has_vid_cap) { vivid_create_controls() 1545 dev->vid_cap_dev.ctrl_handler = hdl_vid_cap; vivid_create_controls() 1547 if (dev->has_vid_out) { vivid_create_controls() 1554 dev->vid_out_dev.ctrl_handler = hdl_vid_out; vivid_create_controls() 1556 if (dev->has_vbi_cap) { vivid_create_controls() 1562 dev->vbi_cap_dev.ctrl_handler = hdl_vbi_cap; vivid_create_controls() 1564 if (dev->has_vbi_out) { vivid_create_controls() 1570 dev->vbi_out_dev.ctrl_handler = hdl_vbi_out; vivid_create_controls() 1572 if (dev->has_radio_rx) { vivid_create_controls() 1577 dev->radio_rx_dev.ctrl_handler = hdl_radio_rx; vivid_create_controls() 1579 if (dev->has_radio_tx) { vivid_create_controls() 1584 dev->radio_tx_dev.ctrl_handler = hdl_radio_tx; vivid_create_controls() 1586 if (dev->has_sdr_cap) { vivid_create_controls() 1591 dev->sdr_cap_dev.ctrl_handler = hdl_sdr_cap; vivid_create_controls() 1596 void vivid_free_controls(struct vivid_dev dev) vivid_free_controls() argument 1598 v4l2_ctrl_handler_free(&dev->ctrl_hdl_vid_cap); vivid_free_controls() 1599 v4l2_ctrl_handler_free(&dev->ctrl_hdl_vid_out); vivid_free_controls() 1600 v4l2_ctrl_handler_free(&dev->ctrl_hdl_vbi_cap); vivid_free_controls() 1601 v4l2_ctrl_handler_free(&dev->ctrl_hdl_vbi_out); vivid_free_controls() 1602 v4l2_ctrl_handler_free(&dev->ctrl_hdl_radio_rx); vivid_free_controls() 1603 v4l2_ctrl_handler_free(&dev->ctrl_hdl_radio_tx); vivid_free_controls() 1604 v4l2_ctrl_handler_free(&dev->ctrl_hdl_sdr_cap); vivid_free_controls() 1605 v4l2_ctrl_handler_free(&dev->ctrl_hdl_user_gen); vivid_free_controls() 1606 v4l2_ctrl_handler_free(&dev->ctrl_hdl_user_vid); vivid_free_controls() 1607 v4l2_ctrl_handler_free(&dev->ctrl_hdl_user_aud); vivid_free_controls() 1608 v4l2_ctrl_handler_free(&dev->ctrl_hdl_streaming); vivid_free_controls() 1609 v4l2_ctrl_handler_free(&dev->ctrl_hdl_sdtv_cap); vivid_free_controls() 1610 v4l2_ctrl_handler_free(&dev->ctrl_hdl_loop_out); vivid_free_controls()
H A D	vivid-osd.c	60 void vivid_clear_fb(struct vivid_dev dev) vivid_clear_fb() argument 62 void p = dev->video_vbase; vivid_clear_fb() 66 if (dev->fb_defined.green.length == 6) vivid_clear_fb() 69 for (y = 0; y < dev->display_height; y++) { vivid_clear_fb() 72 for (x = 0; x < dev->display_width; x++) vivid_clear_fb() 74 p += dev->display_byte_stride; vivid_clear_fb() 82 struct vivid_dev dev = (struct vivid_dev )info->par; vivid_fb_ioctl() local 100 dprintk(dev, 1, "Unknown ioctl %08x\n", cmd); vivid_fb_ioctl() 108 static int vivid_fb_set_var(struct vivid_dev dev, struct fb_var_screeninfo var) vivid_fb_set_var() argument 110 dprintk(dev, 1, "vivid_fb_set_var\n"); vivid_fb_set_var() 113 dprintk(dev, 1, "vivid_fb_set_var - Invalid bpp\n"); vivid_fb_set_var() 116 dev->display_byte_stride = var->xres * dev->bytes_per_pixel; vivid_fb_set_var() 121 static int vivid_fb_get_fix(struct vivid_dev dev, struct fb_fix_screeninfo fix) vivid_fb_get_fix() argument 123 dprintk(dev, 1, "vivid_fb_get_fix\n"); vivid_fb_get_fix() 126 fix->smem_start = dev->video_pbase; vivid_fb_get_fix() 127 fix->smem_len = dev->video_buffer_size; vivid_fb_get_fix() 133 fix->line_length = dev->display_byte_stride; vivid_fb_get_fix() 141 static int _vivid_fb_check_var(struct fb_var_screeninfo var, struct vivid_dev dev) _vivid_fb_check_var() argument 143 dprintk(dev, 1, "vivid_fb_check_var\n"); _vivid_fb_check_var() 183 struct vivid_dev dev = (struct vivid_dev ) info->par; vivid_fb_check_var() local 185 dprintk(dev, 1, "vivid_fb_check_var\n"); vivid_fb_check_var() 186 return _vivid_fb_check_var(var, dev); vivid_fb_check_var() 197 struct vivid_dev dev = (struct vivid_dev ) info->par; vivid_fb_set_par() local 199 dprintk(dev, 1, "vivid_fb_set_par\n"); vivid_fb_set_par() 201 rc = vivid_fb_set_var(dev, &info->var); vivid_fb_set_par() 202 vivid_fb_get_fix(dev, &info->fix); vivid_fb_set_par() 244 struct vivid_dev dev = (struct vivid_dev )info->par; vivid_fb_blank() local 246 dprintk(dev, 1, "Set blanking mode : %d\n", blank_mode); vivid_fb_blank() 277 static int vivid_fb_init_vidmode(struct vivid_dev dev) vivid_fb_init_vidmode() argument 283 dev->bits_per_pixel = 16; vivid_fb_init_vidmode() 284 dev->bytes_per_pixel = dev->bits_per_pixel / 8; vivid_fb_init_vidmode() 289 dev->display_byte_stride = start_window.width dev->bytes_per_pixel; vivid_fb_init_vidmode() 296 dev->display_width = start_window.width; vivid_fb_init_vidmode() 297 dev->display_height = start_window.height; vivid_fb_init_vidmode() 301 dev->fb_defined.xres = dev->display_width; vivid_fb_init_vidmode() 302 dev->fb_defined.yres = dev->display_height; vivid_fb_init_vidmode() 303 dev->fb_defined.xres_virtual = dev->display_width; vivid_fb_init_vidmode() 304 dev->fb_defined.yres_virtual = dev->display_height; vivid_fb_init_vidmode() 305 dev->fb_defined.bits_per_pixel = dev->bits_per_pixel; vivid_fb_init_vidmode() 306 dev->fb_defined.vmode = FB_VMODE_NONINTERLACED; vivid_fb_init_vidmode() 307 dev->fb_defined.left_margin = start_window.left + 1; vivid_fb_init_vidmode() 308 dev->fb_defined.upper_margin = start_window.top + 1; vivid_fb_init_vidmode() 309 dev->fb_defined.accel_flags = FB_ACCEL_NONE; vivid_fb_init_vidmode() 310 dev->fb_defined.nonstd = 0; vivid_fb_init_vidmode() 312 dev->fb_defined.green.length = 5; vivid_fb_init_vidmode() 316 _vivid_fb_check_var(&dev->fb_defined, dev); vivid_fb_init_vidmode() 320 vivid_fb_get_fix(dev, &dev->fb_fix); vivid_fb_init_vidmode() 324 dev->fb_info.node = -1; vivid_fb_init_vidmode() 325 dev->fb_info.flags = FBINFO_FLAG_DEFAULT; vivid_fb_init_vidmode() 326 dev->fb_info.fbops = &vivid_fb_ops; vivid_fb_init_vidmode() 327 dev->fb_info.par = dev; vivid_fb_init_vidmode() 328 dev->fb_info.var = dev->fb_defined; vivid_fb_init_vidmode() 329 dev->fb_info.fix = dev->fb_fix; vivid_fb_init_vidmode() 330 dev->fb_info.screen_base = (u8 __iomem )dev->video_vbase; vivid_fb_init_vidmode() 331 dev->fb_info.fbops = &vivid_fb_ops; vivid_fb_init_vidmode() 334 dev->fb_info.monspecs.hfmin = 8000; vivid_fb_init_vidmode() 335 dev->fb_info.monspecs.hfmax = 70000; vivid_fb_init_vidmode() 336 dev->fb_info.monspecs.vfmin = 10; vivid_fb_init_vidmode() 337 dev->fb_info.monspecs.vfmax = 100; vivid_fb_init_vidmode() 340 if (fb_alloc_cmap(&dev->fb_info.cmap, 256, 1)) { vivid_fb_init_vidmode() 346 dev->fb_info.pseudo_palette = kmalloc_array(16, sizeof(u32), GFP_KERNEL); vivid_fb_init_vidmode() 348 return dev->fb_info.pseudo_palette ? 0 : -ENOMEM; vivid_fb_init_vidmode() 352 void vivid_fb_release_buffers(struct vivid_dev dev) vivid_fb_release_buffers() argument 354 if (dev->video_vbase == NULL) vivid_fb_release_buffers() 358 if (dev->fb_info.cmap.len) vivid_fb_release_buffers() 359 fb_dealloc_cmap(&dev->fb_info.cmap); vivid_fb_release_buffers() 362 kfree(dev->fb_info.pseudo_palette); vivid_fb_release_buffers() 363 kfree((void )dev->video_vbase); vivid_fb_release_buffers() 368 int vivid_fb_init(struct vivid_dev dev) vivid_fb_init() argument 372 dev->video_buffer_size = MAX_OSD_HEIGHT * MAX_OSD_WIDTH * 2; vivid_fb_init() 373 dev->video_vbase = kzalloc(dev->video_buffer_size, GFP_KERNEL \| GFP_DMA32); vivid_fb_init() 374 if (dev->video_vbase == NULL) vivid_fb_init() 376 dev->video_pbase = virt_to_phys(dev->video_vbase); vivid_fb_init() 379 dev->video_pbase, dev->video_vbase, vivid_fb_init() 380 dev->video_buffer_size / 1024); vivid_fb_init() 383 ret = vivid_fb_init_vidmode(dev); vivid_fb_init() 385 vivid_fb_release_buffers(dev); vivid_fb_init() 389 vivid_clear_fb(dev); vivid_fb_init() 392 if (register_framebuffer(&dev->fb_info) < 0) { vivid_fb_init() 393 vivid_fb_release_buffers(dev); vivid_fb_init() 398 vivid_fb_set_par(&dev->fb_info); vivid_fb_init()
H A D	vivid-radio-common.c	71 void vivid_radio_rds_init(struct vivid_dev dev) vivid_radio_rds_init() argument 73 struct vivid_rds_gen rds = &dev->rds_gen; vivid_radio_rds_init() 74 bool alt = dev->radio_rx_rds_use_alternates; vivid_radio_rds_init() 77 if (dev->radio_rds_loop && !dev->radio_tx_rds_controls) vivid_radio_rds_init() 80 if (dev->radio_rds_loop) { vivid_radio_rds_init() 81 v4l2_ctrl_lock(dev->radio_tx_rds_pi); vivid_radio_rds_init() 82 rds->picode = dev->radio_tx_rds_pi->cur.val; vivid_radio_rds_init() 83 rds->pty = dev->radio_tx_rds_pty->cur.val; vivid_radio_rds_init() 84 rds->mono_stereo = dev->radio_tx_rds_mono_stereo->cur.val; vivid_radio_rds_init() 85 rds->art_head = dev->radio_tx_rds_art_head->cur.val; vivid_radio_rds_init() 86 rds->compressed = dev->radio_tx_rds_compressed->cur.val; vivid_radio_rds_init() 87 rds->dyn_pty = dev->radio_tx_rds_dyn_pty->cur.val; vivid_radio_rds_init() 88 rds->ta = dev->radio_tx_rds_ta->cur.val; vivid_radio_rds_init() 89 rds->tp = dev->radio_tx_rds_tp->cur.val; vivid_radio_rds_init() 90 rds->ms = dev->radio_tx_rds_ms->cur.val; vivid_radio_rds_init() 92 dev->radio_tx_rds_psname->p_cur.p_char, vivid_radio_rds_init() 95 dev->radio_tx_rds_radiotext->p_cur.p_char + alt * 64, vivid_radio_rds_init() 97 v4l2_ctrl_unlock(dev->radio_tx_rds_pi); vivid_radio_rds_init() 99 vivid_rds_gen_fill(rds, dev->radio_rx_freq, alt); vivid_radio_rds_init() 101 if (dev->radio_rx_rds_controls) { vivid_radio_rds_init() 102 v4l2_ctrl_s_ctrl(dev->radio_rx_rds_pty, rds->pty); vivid_radio_rds_init() 103 v4l2_ctrl_s_ctrl(dev->radio_rx_rds_ta, rds->ta); vivid_radio_rds_init() 104 v4l2_ctrl_s_ctrl(dev->radio_rx_rds_tp, rds->tp); vivid_radio_rds_init() 105 v4l2_ctrl_s_ctrl(dev->radio_rx_rds_ms, rds->ms); vivid_radio_rds_init() 106 v4l2_ctrl_s_ctrl_string(dev->radio_rx_rds_psname, rds->psname); vivid_radio_rds_init() 107 v4l2_ctrl_s_ctrl_string(dev->radio_rx_rds_radiotext, rds->radiotext); vivid_radio_rds_init() 108 if (!dev->radio_rds_loop) vivid_radio_rds_init() 109 dev->radio_rx_rds_use_alternates = !dev->radio_rx_rds_use_alternates; vivid_radio_rds_init() 118 static void vivid_radio_calc_sig_qual(struct vivid_dev dev) vivid_radio_calc_sig_qual() argument 128 if (dev->radio_rx_freq <= AM_FREQ_RANGE_HIGH) { vivid_radio_calc_sig_qual() 132 sig_qual = (dev->radio_rx_freq + delta) % mod - delta; vivid_radio_calc_sig_qual() 133 if (dev->has_radio_tx) vivid_radio_calc_sig_qual() 134 sig_qual_tx = dev->radio_rx_freq - dev->radio_tx_freq; vivid_radio_calc_sig_qual() 141 if (!dev->radio_rds_loop && !dev->radio_tx_rds_controls) vivid_radio_calc_sig_qual() 142 memset(dev->rds_gen.data, 0, vivid_radio_calc_sig_qual() 143 sizeof(dev->rds_gen.data)); vivid_radio_calc_sig_qual() 144 dev->radio_rds_loop = dev->radio_rx_freq >= FM_FREQ_RANGE_LOW; vivid_radio_calc_sig_qual() 146 dev->radio_rds_loop = false; vivid_radio_calc_sig_qual() 148 if (dev->radio_rx_freq <= AM_FREQ_RANGE_HIGH) vivid_radio_calc_sig_qual() 150 dev->radio_rx_sig_qual = sig_qual; vivid_radio_calc_sig_qual() 163 struct vivid_dev dev = video_drvdata(file); vivid_radio_s_frequency() local 186 vivid_radio_calc_sig_qual(dev); vivid_radio_s_frequency() 187 vivid_radio_rds_init(dev); vivid_radio_s_frequency()
/linux-4.1.27/drivers/watchdog/
H A D	orion_wdt.c	77 struct orion_watchdog dev) orion_wdt_clock_init() 81 dev->clk = clk_get(&pdev->dev, NULL); orion_wdt_clock_init() 82 if (IS_ERR(dev->clk)) orion_wdt_clock_init() 83 return PTR_ERR(dev->clk); orion_wdt_clock_init() 84 ret = clk_prepare_enable(dev->clk); orion_wdt_clock_init() 86 clk_put(dev->clk); orion_wdt_clock_init() 90 dev->clk_rate = clk_get_rate(dev->clk); orion_wdt_clock_init() 95 struct orion_watchdog dev) armada370_wdt_clock_init() 99 dev->clk = clk_get(&pdev->dev, NULL); armada370_wdt_clock_init() 100 if (IS_ERR(dev->clk)) armada370_wdt_clock_init() 101 return PTR_ERR(dev->clk); armada370_wdt_clock_init() 102 ret = clk_prepare_enable(dev->clk); armada370_wdt_clock_init() 104 clk_put(dev->clk); armada370_wdt_clock_init() 109 atomic_io_modify(dev->reg + TIMER_CTRL, armada370_wdt_clock_init() 113 dev->clk_rate = clk_get_rate(dev->clk) / WDT_A370_RATIO; armada370_wdt_clock_init() 118 struct orion_watchdog dev) armada375_wdt_clock_init() 122 dev->clk = of_clk_get_by_name(pdev->dev.of_node, "fixed"); armada375_wdt_clock_init() 123 if (!IS_ERR(dev->clk)) { armada375_wdt_clock_init() 124 ret = clk_prepare_enable(dev->clk); armada375_wdt_clock_init() 126 clk_put(dev->clk); armada375_wdt_clock_init() 130 atomic_io_modify(dev->reg + TIMER_CTRL, armada375_wdt_clock_init() 133 dev->clk_rate = clk_get_rate(dev->clk); armada375_wdt_clock_init() 139 dev->clk = clk_get(&pdev->dev, NULL); armada375_wdt_clock_init() 140 if (IS_ERR(dev->clk)) armada375_wdt_clock_init() 141 return PTR_ERR(dev->clk); armada375_wdt_clock_init() 143 ret = clk_prepare_enable(dev->clk); armada375_wdt_clock_init() 145 clk_put(dev->clk); armada375_wdt_clock_init() 149 atomic_io_modify(dev->reg + TIMER_CTRL, armada375_wdt_clock_init() 152 dev->clk_rate = clk_get_rate(dev->clk) / WDT_A370_RATIO; armada375_wdt_clock_init() 158 struct orion_watchdog dev) armadaxp_wdt_clock_init() 162 dev->clk = of_clk_get_by_name(pdev->dev.of_node, "fixed"); armadaxp_wdt_clock_init() 163 if (IS_ERR(dev->clk)) armadaxp_wdt_clock_init() 164 return PTR_ERR(dev->clk); armadaxp_wdt_clock_init() 165 ret = clk_prepare_enable(dev->clk); armadaxp_wdt_clock_init() 167 clk_put(dev->clk); armadaxp_wdt_clock_init() 172 atomic_io_modify(dev->reg + TIMER_CTRL, armadaxp_wdt_clock_init() 176 dev->clk_rate = clk_get_rate(dev->clk); armadaxp_wdt_clock_init() 182 struct orion_watchdog dev = watchdog_get_drvdata(wdt_dev); orion_wdt_ping() local 184 writel(dev->clk_rate wdt_dev->timeout, orion_wdt_ping() 185 dev->reg + dev->data->wdt_counter_offset); orion_wdt_ping() 191 struct orion_watchdog dev = watchdog_get_drvdata(wdt_dev); armada375_start() local 195 writel(dev->clk_rate wdt_dev->timeout, armada375_start() 196 dev->reg + dev->data->wdt_counter_offset); armada375_start() 199 atomic_io_modify(dev->reg + TIMER_A370_STATUS, WDT_A370_EXPIRED, 0); armada375_start() 202 atomic_io_modify(dev->reg + TIMER_CTRL, dev->data->wdt_enable_bit, armada375_start() 203 dev->data->wdt_enable_bit); armada375_start() 206 reg = readl(dev->rstout); armada375_start() 207 reg \|= dev->data->rstout_enable_bit; armada375_start() 208 writel(reg, dev->rstout); armada375_start() 210 atomic_io_modify(dev->rstout_mask, dev->data->rstout_mask_bit, 0); armada375_start() 216 struct orion_watchdog dev = watchdog_get_drvdata(wdt_dev); armada370_start() local 220 writel(dev->clk_rate wdt_dev->timeout, armada370_start() 221 dev->reg + dev->data->wdt_counter_offset); armada370_start() 224 atomic_io_modify(dev->reg + TIMER_A370_STATUS, WDT_A370_EXPIRED, 0); armada370_start() 227 atomic_io_modify(dev->reg + TIMER_CTRL, dev->data->wdt_enable_bit, armada370_start() 228 dev->data->wdt_enable_bit); armada370_start() 231 reg = readl(dev->rstout); armada370_start() 232 reg \|= dev->data->rstout_enable_bit; armada370_start() 233 writel(reg, dev->rstout); armada370_start() 239 struct orion_watchdog dev = watchdog_get_drvdata(wdt_dev); orion_start() local 242 writel(dev->clk_rate wdt_dev->timeout, orion_start() 243 dev->reg + dev->data->wdt_counter_offset); orion_start() 246 atomic_io_modify(dev->reg + TIMER_CTRL, dev->data->wdt_enable_bit, orion_start() 247 dev->data->wdt_enable_bit); orion_start() 250 atomic_io_modify(dev->rstout, dev->data->rstout_enable_bit, orion_start() 251 dev->data->rstout_enable_bit); orion_start() 258 struct orion_watchdog dev = watchdog_get_drvdata(wdt_dev); orion_wdt_start() local 261 return dev->data->start(wdt_dev); orion_wdt_start() 266 struct orion_watchdog dev = watchdog_get_drvdata(wdt_dev); orion_stop() local 269 atomic_io_modify(dev->rstout, dev->data->rstout_enable_bit, 0); orion_stop() 272 atomic_io_modify(dev->reg + TIMER_CTRL, dev->data->wdt_enable_bit, 0); orion_stop() 279 struct orion_watchdog dev = watchdog_get_drvdata(wdt_dev); armada375_stop() local 283 atomic_io_modify(dev->rstout_mask, dev->data->rstout_mask_bit, armada375_stop() 284 dev->data->rstout_mask_bit); armada375_stop() 285 reg = readl(dev->rstout); armada375_stop() 286 reg &= ~dev->data->rstout_enable_bit; armada375_stop() 287 writel(reg, dev->rstout); armada375_stop() 290 atomic_io_modify(dev->reg + TIMER_CTRL, dev->data->wdt_enable_bit, 0); armada375_stop() 297 struct orion_watchdog dev = watchdog_get_drvdata(wdt_dev); armada370_stop() local 301 reg = readl(dev->rstout); armada370_stop() 302 reg &= ~dev->data->rstout_enable_bit; armada370_stop() 303 writel(reg, dev->rstout); armada370_stop() 306 atomic_io_modify(dev->reg + TIMER_CTRL, dev->data->wdt_enable_bit, 0); armada370_stop() 313 struct orion_watchdog dev = watchdog_get_drvdata(wdt_dev); orion_wdt_stop() local 315 return dev->data->stop(wdt_dev); orion_wdt_stop() 318 static int orion_enabled(struct orion_watchdog dev) orion_enabled() argument 322 enabled = readl(dev->rstout) & dev->data->rstout_enable_bit; orion_enabled() 323 running = readl(dev->reg + TIMER_CTRL) & dev->data->wdt_enable_bit; orion_enabled() 328 static int armada375_enabled(struct orion_watchdog dev) armada375_enabled() argument 332 masked = readl(dev->rstout_mask) & dev->data->rstout_mask_bit; armada375_enabled() 333 enabled = readl(dev->rstout) & dev->data->rstout_enable_bit; armada375_enabled() 334 running = readl(dev->reg + TIMER_CTRL) & dev->data->wdt_enable_bit; armada375_enabled() 341 struct orion_watchdog dev = watchdog_get_drvdata(wdt_dev); orion_wdt_enabled() local 343 return dev->data->enabled(dev); orion_wdt_enabled() 348 struct orion_watchdog dev = watchdog_get_drvdata(wdt_dev); orion_wdt_get_timeleft() local 349 return readl(dev->reg + dev->data->wdt_counter_offset) / dev->clk_rate; orion_wdt_get_timeleft() 393 return devm_ioremap(&pdev->dev, res->start, orion_wdt_ioremap_rstout() 399 return devm_ioremap(&pdev->dev, rstout, 0x4); orion_wdt_ioremap_rstout() 480 struct orion_watchdog dev) orion_wdt_get_regs() 482 struct device_node node = pdev->dev.of_node; orion_wdt_get_regs() 488 dev->reg = devm_ioremap(&pdev->dev, res->start, orion_wdt_get_regs() 490 if (!dev->reg) orion_wdt_get_regs() 496 dev->rstout = orion_wdt_ioremap_rstout(pdev, res->start & orion_wdt_get_regs() 498 if (!dev->rstout) orion_wdt_get_regs() 506 dev->rstout = devm_ioremap_resource(&pdev->dev, res); orion_wdt_get_regs() 507 if (IS_ERR(dev->rstout)) orion_wdt_get_regs() 508 return PTR_ERR(dev->rstout); orion_wdt_get_regs() 515 dev->rstout = devm_ioremap_resource(&pdev->dev, res); orion_wdt_get_regs() 516 if (IS_ERR(dev->rstout)) orion_wdt_get_regs() 517 return PTR_ERR(dev->rstout); orion_wdt_get_regs() 522 dev->rstout_mask = devm_ioremap(&pdev->dev, res->start, orion_wdt_get_regs() 524 if (!dev->rstout_mask) orion_wdt_get_regs() 536 struct orion_watchdog dev; orion_wdt_probe() local 541 dev = devm_kzalloc(&pdev->dev, sizeof(struct orion_watchdog), orion_wdt_probe() 543 if (!dev) orion_wdt_probe() 546 match = of_match_device(orion_wdt_of_match_table, &pdev->dev); orion_wdt_probe() 551 dev->wdt.info = &orion_wdt_info; orion_wdt_probe() 552 dev->wdt.ops = &orion_wdt_ops; orion_wdt_probe() 553 dev->wdt.min_timeout = 1; orion_wdt_probe() 554 dev->data = match->data; orion_wdt_probe() 556 ret = orion_wdt_get_regs(pdev, dev); orion_wdt_probe() 560 ret = dev->data->clock_init(pdev, dev); orion_wdt_probe() 562 dev_err(&pdev->dev, "cannot initialize clock\n"); orion_wdt_probe() 566 wdt_max_duration = WDT_MAX_CYCLE_COUNT / dev->clk_rate; orion_wdt_probe() 568 dev->wdt.timeout = wdt_max_duration; orion_wdt_probe() 569 dev->wdt.max_timeout = wdt_max_duration; orion_wdt_probe() 570 watchdog_init_timeout(&dev->wdt, heartbeat, &pdev->dev); orion_wdt_probe() 572 platform_set_drvdata(pdev, &dev->wdt); orion_wdt_probe() 573 watchdog_set_drvdata(&dev->wdt, dev); orion_wdt_probe() 581 if (!orion_wdt_enabled(&dev->wdt)) orion_wdt_probe() 582 orion_wdt_stop(&dev->wdt); orion_wdt_probe() 591 ret = devm_request_irq(&pdev->dev, irq, orion_wdt_irq, 0, orion_wdt_probe() 592 pdev->name, dev); orion_wdt_probe() 594 dev_err(&pdev->dev, "failed to request IRQ\n"); orion_wdt_probe() 599 watchdog_set_nowayout(&dev->wdt, nowayout); orion_wdt_probe() 600 ret = watchdog_register_device(&dev->wdt); orion_wdt_probe() 605 dev->wdt.timeout, nowayout ? ", nowayout" : ""); orion_wdt_probe() 609 clk_disable_unprepare(dev->clk); orion_wdt_probe() 610 clk_put(dev->clk); orion_wdt_probe() 617 struct orion_watchdog dev = watchdog_get_drvdata(wdt_dev); orion_wdt_remove() local 620 clk_disable_unprepare(dev->clk); orion_wdt_remove() 621 clk_put(dev->clk); orion_wdt_remove() 76 orion_wdt_clock_init(struct platform_device pdev, struct orion_watchdog dev) orion_wdt_clock_init() argument 94 armada370_wdt_clock_init(struct platform_device pdev, struct orion_watchdog dev) armada370_wdt_clock_init() argument 117 armada375_wdt_clock_init(struct platform_device pdev, struct orion_watchdog dev) armada375_wdt_clock_init() argument 157 armadaxp_wdt_clock_init(struct platform_device pdev, struct orion_watchdog dev) armadaxp_wdt_clock_init() argument 479 orion_wdt_get_regs(struct platform_device pdev, struct orion_watchdog *dev) orion_wdt_get_regs() argument
/linux-4.1.27/drivers/net/usb/
H A D	rtl8150.c	156 static int get_registers(rtl8150_t * dev, u16 indx, u16 size, void data) get_registers() argument 158 return usb_control_msg(dev->udev, usb_rcvctrlpipe(dev->udev, 0), get_registers() 163 static int set_registers(rtl8150_t dev, u16 indx, u16 size, void data) set_registers() argument 165 return usb_control_msg(dev->udev, usb_sndctrlpipe(dev->udev, 0), set_registers() 176 dev_dbg(&urb->dev->dev, "%s failed with %d", __func__, status); async_set_reg_cb() 181 static int async_set_registers(rtl8150_t dev, u16 indx, u16 size, u16 reg) async_set_registers() argument 201 usb_fill_control_urb(async_urb, dev->udev, async_set_registers() 202 usb_sndctrlpipe(dev->udev, 0), (void )&req->dr, async_set_registers() 207 netif_device_detach(dev->netdev); async_set_registers() 208 dev_err(&dev->udev->dev, "%s failed with %d\n", __func__, res); async_set_registers() 213 static int read_mii_word(rtl8150_t dev, u8 phy, __u8 indx, u16 * reg) read_mii_word() argument 223 set_registers(dev, PHYADD, sizeof(data), data); read_mii_word() 224 set_registers(dev, PHYCNT, 1, &tmp); read_mii_word() 226 get_registers(dev, PHYCNT, 1, data); read_mii_word() 230 get_registers(dev, PHYDAT, 2, data); read_mii_word() 237 static int write_mii_word(rtl8150_t * dev, u8 phy, __u8 indx, u16 reg) write_mii_word() argument 248 set_registers(dev, PHYADD, sizeof(data), data); write_mii_word() 249 set_registers(dev, PHYCNT, 1, &tmp); write_mii_word() 251 get_registers(dev, PHYCNT, 1, data); write_mii_word() 260 static inline void set_ethernet_addr(rtl8150_t * dev) set_ethernet_addr() argument 264 get_registers(dev, IDR, sizeof(node_id), node_id); set_ethernet_addr() 265 memcpy(dev->netdev->dev_addr, node_id, sizeof(node_id)); set_ethernet_addr() 271 rtl8150_t dev = netdev_priv(netdev); rtl8150_set_mac_address() local 279 set_registers(dev, IDR, netdev->addr_len, netdev->dev_addr); rtl8150_set_mac_address() 285 get_registers(dev, CR, 1, &cr); rtl8150_set_mac_address() 288 set_registers(dev, CR, 1, &cr); rtl8150_set_mac_address() 292 set_registers(dev, IDR_EEPROM + (i 2), 2, rtl8150_set_mac_address() 297 set_registers(dev, CR, 1, &cr); rtl8150_set_mac_address() 303 static int rtl8150_reset(rtl8150_t * dev) rtl8150_reset() argument 308 set_registers(dev, CR, 1, &data); rtl8150_reset() 310 get_registers(dev, CR, 1, &data); rtl8150_reset() 316 static int alloc_all_urbs(rtl8150_t * dev) alloc_all_urbs() argument 318 dev->rx_urb = usb_alloc_urb(0, GFP_KERNEL); alloc_all_urbs() 319 if (!dev->rx_urb) alloc_all_urbs() 321 dev->tx_urb = usb_alloc_urb(0, GFP_KERNEL); alloc_all_urbs() 322 if (!dev->tx_urb) { alloc_all_urbs() 323 usb_free_urb(dev->rx_urb); alloc_all_urbs() 326 dev->intr_urb = usb_alloc_urb(0, GFP_KERNEL); alloc_all_urbs() 327 if (!dev->intr_urb) { alloc_all_urbs() 328 usb_free_urb(dev->rx_urb); alloc_all_urbs() 329 usb_free_urb(dev->tx_urb); alloc_all_urbs() 336 static void free_all_urbs(rtl8150_t * dev) free_all_urbs() argument 338 usb_free_urb(dev->rx_urb); free_all_urbs() 339 usb_free_urb(dev->tx_urb); free_all_urbs() 340 usb_free_urb(dev->intr_urb); free_all_urbs() 343 static void unlink_all_urbs(rtl8150_t * dev) unlink_all_urbs() argument 345 usb_kill_urb(dev->rx_urb); unlink_all_urbs() 346 usb_kill_urb(dev->tx_urb); unlink_all_urbs() 347 usb_kill_urb(dev->intr_urb); unlink_all_urbs() 350 static inline struct sk_buff pull_skb(rtl8150_t dev) pull_skb() argument 356 if (dev->rx_skb_pool[i]) { pull_skb() 357 skb = dev->rx_skb_pool[i]; pull_skb() 358 dev->rx_skb_pool[i] = NULL; pull_skb() 367 rtl8150_t dev; read_bulk_callback() local 375 dev = urb->context; read_bulk_callback() 376 if (!dev) read_bulk_callback() 378 if (test_bit(RTL8150_UNPLUG, &dev->flags)) read_bulk_callback() 380 netdev = dev->netdev; read_bulk_callback() 391 dev_warn(&urb->dev->dev, "may be reset is needed?..\n"); read_bulk_callback() 395 dev_warn(&urb->dev->dev, "Rx status %d\n", status); read_bulk_callback() 399 if (!dev->rx_skb) read_bulk_callback() 409 skb_put(dev->rx_skb, pkt_len); read_bulk_callback() 410 dev->rx_skb->protocol = eth_type_trans(dev->rx_skb, netdev); read_bulk_callback() 411 netif_rx(dev->rx_skb); read_bulk_callback() 415 spin_lock(&dev->rx_pool_lock); read_bulk_callback() 416 skb = pull_skb(dev); read_bulk_callback() 417 spin_unlock(&dev->rx_pool_lock); read_bulk_callback() 421 dev->rx_skb = skb; read_bulk_callback() 423 usb_fill_bulk_urb(dev->rx_urb, dev->udev, usb_rcvbulkpipe(dev->udev, 1), read_bulk_callback() 424 dev->rx_skb->data, RTL8150_MTU, read_bulk_callback, dev); read_bulk_callback() 425 result = usb_submit_urb(dev->rx_urb, GFP_ATOMIC); read_bulk_callback() 427 netif_device_detach(dev->netdev); read_bulk_callback() 429 set_bit(RX_URB_FAIL, &dev->flags); read_bulk_callback() 432 clear_bit(RX_URB_FAIL, &dev->flags); read_bulk_callback() 437 tasklet_schedule(&dev->tl); read_bulk_callback() 442 rtl8150_t dev; write_bulk_callback() local 445 dev = urb->context; write_bulk_callback() 446 if (!dev) write_bulk_callback() 448 dev_kfree_skb_irq(dev->tx_skb); write_bulk_callback() 449 if (!netif_device_present(dev->netdev)) write_bulk_callback() 452 dev_info(&urb->dev->dev, "%s: Tx status %d\n", write_bulk_callback() 453 dev->netdev->name, status); write_bulk_callback() 454 dev->netdev->trans_start = jiffies; write_bulk_callback() 455 netif_wake_queue(dev->netdev); write_bulk_callback() 460 rtl8150_t dev; intr_callback() local 465 dev = urb->context; intr_callback() 466 if (!dev) intr_callback() 477 dev_info(&urb->dev->dev, "%s: intr status %d\n", intr_callback() 478 dev->netdev->name, status); intr_callback() 484 dev->netdev->stats.tx_errors++; intr_callback() 486 dev->netdev->stats.tx_aborted_errors++; intr_callback() 488 dev->netdev->stats.tx_window_errors++; intr_callback() 490 dev->netdev->stats.tx_carrier_errors++; intr_callback() 494 if (netif_carrier_ok(dev->netdev)) { intr_callback() 495 netif_carrier_off(dev->netdev); intr_callback() 496 netdev_dbg(dev->netdev, "%s: LINK LOST\n", __func__); intr_callback() 499 if (!netif_carrier_ok(dev->netdev)) { intr_callback() 500 netif_carrier_on(dev->netdev); intr_callback() 501 netdev_dbg(dev->netdev, "%s: LINK CAME BACK\n", __func__); intr_callback() 508 netif_device_detach(dev->netdev); intr_callback() 510 dev_err(&dev->udev->dev, intr_callback() 512 dev->udev->bus->bus_name, dev->udev->devpath, res); intr_callback() 517 rtl8150_t dev = usb_get_intfdata(intf); rtl8150_suspend() local 519 netif_device_detach(dev->netdev); rtl8150_suspend() 521 if (netif_running(dev->netdev)) { rtl8150_suspend() 522 usb_kill_urb(dev->rx_urb); rtl8150_suspend() 523 usb_kill_urb(dev->intr_urb); rtl8150_suspend() 530 rtl8150_t dev = usb_get_intfdata(intf); rtl8150_resume() local 532 netif_device_attach(dev->netdev); rtl8150_resume() 533 if (netif_running(dev->netdev)) { rtl8150_resume() 534 dev->rx_urb->status = 0; rtl8150_resume() 535 dev->rx_urb->actual_length = 0; rtl8150_resume() 536 read_bulk_callback(dev->rx_urb); rtl8150_resume() 538 dev->intr_urb->status = 0; rtl8150_resume() 539 dev->intr_urb->actual_length = 0; rtl8150_resume() 540 intr_callback(dev->intr_urb); rtl8150_resume() 551 static void fill_skb_pool(rtl8150_t dev) fill_skb_pool() argument 557 if (dev->rx_skb_pool[i]) fill_skb_pool() 564 dev->rx_skb_pool[i] = skb; fill_skb_pool() 568 static void free_skb_pool(rtl8150_t dev) free_skb_pool() argument 573 if (dev->rx_skb_pool[i]) free_skb_pool() 574 dev_kfree_skb(dev->rx_skb_pool[i]); free_skb_pool() 579 struct rtl8150 dev = (struct rtl8150 )data; rx_fixup() local 583 spin_lock_irq(&dev->rx_pool_lock); rx_fixup() 584 fill_skb_pool(dev); rx_fixup() 585 spin_unlock_irq(&dev->rx_pool_lock); rx_fixup() 586 if (test_bit(RX_URB_FAIL, &dev->flags)) rx_fixup() 587 if (dev->rx_skb) rx_fixup() 589 spin_lock_irq(&dev->rx_pool_lock); rx_fixup() 590 skb = pull_skb(dev); rx_fixup() 591 spin_unlock_irq(&dev->rx_pool_lock); rx_fixup() 594 dev->rx_skb = skb; rx_fixup() 595 usb_fill_bulk_urb(dev->rx_urb, dev->udev, usb_rcvbulkpipe(dev->udev, 1), rx_fixup() 596 dev->rx_skb->data, RTL8150_MTU, read_bulk_callback, dev); rx_fixup() 598 status = usb_submit_urb(dev->rx_urb, GFP_ATOMIC); rx_fixup() 600 netif_device_detach(dev->netdev); rx_fixup() 602 set_bit(RX_URB_FAIL, &dev->flags); rx_fixup() 605 clear_bit(RX_URB_FAIL, &dev->flags); rx_fixup() 610 tasklet_schedule(&dev->tl); rx_fixup() 613 static int enable_net_traffic(rtl8150_t dev) enable_net_traffic() argument 617 if (!rtl8150_reset(dev)) { enable_net_traffic() 618 dev_warn(&dev->udev->dev, "device reset failed\n"); enable_net_traffic() 625 set_bit(RTL8150_HW_CRC, &dev->flags); enable_net_traffic() 626 set_registers(dev, RCR, 1, &rcr); enable_net_traffic() 627 set_registers(dev, TCR, 1, &tcr); enable_net_traffic() 628 set_registers(dev, CR, 1, &cr); enable_net_traffic() 629 get_registers(dev, MSR, 1, &msr); enable_net_traffic() 634 static void disable_net_traffic(rtl8150_t * dev) disable_net_traffic() argument 638 get_registers(dev, CR, 1, &cr); disable_net_traffic() 640 set_registers(dev, CR, 1, &cr); disable_net_traffic() 645 rtl8150_t dev = netdev_priv(netdev); rtl8150_tx_timeout() local 646 dev_warn(&netdev->dev, "Tx timeout.\n"); rtl8150_tx_timeout() 647 usb_unlink_urb(dev->tx_urb); rtl8150_tx_timeout() 653 rtl8150_t dev = netdev_priv(netdev); rtl8150_set_multicast() local 659 dev_info(&netdev->dev, "%s: promiscuous mode\n", netdev->name); rtl8150_set_multicast() 664 dev_info(&netdev->dev, "%s: allmulti set\n", netdev->name); rtl8150_set_multicast() 669 async_set_registers(dev, RCR, sizeof(rx_creg), rx_creg); rtl8150_set_multicast() 676 rtl8150_t dev = netdev_priv(netdev); rtl8150_start_xmit() local 682 dev->tx_skb = skb; rtl8150_start_xmit() 683 usb_fill_bulk_urb(dev->tx_urb, dev->udev, usb_sndbulkpipe(dev->udev, 2), rtl8150_start_xmit() 684 skb->data, count, write_bulk_callback, dev); rtl8150_start_xmit() 685 if ((res = usb_submit_urb(dev->tx_urb, GFP_ATOMIC))) { rtl8150_start_xmit() 688 netif_device_detach(dev->netdev); rtl8150_start_xmit() 690 dev_warn(&netdev->dev, "failed tx_urb %d\n", res); rtl8150_start_xmit() 706 rtl8150_t dev = netdev_priv(netdev); set_carrier() local 709 get_registers(dev, CSCR, 2, &tmp); set_carrier() 718 rtl8150_t dev = netdev_priv(netdev); rtl8150_open() local 721 if (dev->rx_skb == NULL) rtl8150_open() 722 dev->rx_skb = pull_skb(dev); rtl8150_open() 723 if (!dev->rx_skb) rtl8150_open() 726 set_registers(dev, IDR, 6, netdev->dev_addr); rtl8150_open() 728 usb_fill_bulk_urb(dev->rx_urb, dev->udev, usb_rcvbulkpipe(dev->udev, 1), rtl8150_open() 729 dev->rx_skb->data, RTL8150_MTU, read_bulk_callback, dev); rtl8150_open() 730 if ((res = usb_submit_urb(dev->rx_urb, GFP_KERNEL))) { rtl8150_open() 732 netif_device_detach(dev->netdev); rtl8150_open() 733 dev_warn(&netdev->dev, "rx_urb submit failed: %d\n", res); rtl8150_open() 736 usb_fill_int_urb(dev->intr_urb, dev->udev, usb_rcvintpipe(dev->udev, 3), rtl8150_open() 737 dev->intr_buff, INTBUFSIZE, intr_callback, rtl8150_open() 738 dev, dev->intr_interval); rtl8150_open() 739 if ((res = usb_submit_urb(dev->intr_urb, GFP_KERNEL))) { rtl8150_open() 741 netif_device_detach(dev->netdev); rtl8150_open() 742 dev_warn(&netdev->dev, "intr_urb submit failed: %d\n", res); rtl8150_open() 743 usb_kill_urb(dev->rx_urb); rtl8150_open() 746 enable_net_traffic(dev); rtl8150_open() 755 rtl8150_t dev = netdev_priv(netdev); rtl8150_close() local 758 if (!test_bit(RTL8150_UNPLUG, &dev->flags)) rtl8150_close() 759 disable_net_traffic(dev); rtl8150_close() 760 unlink_all_urbs(dev); rtl8150_close() 767 rtl8150_t dev = netdev_priv(netdev); rtl8150_get_drvinfo() local 771 usb_make_path(dev->udev, info->bus_info, sizeof(info->bus_info)); rtl8150_get_drvinfo() 776 rtl8150_t dev = netdev_priv(netdev); rtl8150_get_settings() local 787 ecmd->phy_address = dev->phy; rtl8150_get_settings() 788 get_registers(dev, BMCR, 2, &bmcr); rtl8150_get_settings() 789 get_registers(dev, ANLP, 2, &lpa); rtl8150_get_settings() 819 rtl8150_t dev = netdev_priv(netdev); rtl8150_ioctl() local 825 data[0] = dev->phy; rtl8150_ioctl() 827 read_mii_word(dev, dev->phy, (data[1] & 0x1f), &data[3]); rtl8150_ioctl() 832 write_mii_word(dev, dev->phy, (data[1] & 0x1f), data[2]); rtl8150_ioctl() 858 rtl8150_t dev; rtl8150_probe() local 865 dev = netdev_priv(netdev); rtl8150_probe() 867 dev->intr_buff = kmalloc(INTBUFSIZE, GFP_KERNEL); rtl8150_probe() 868 if (!dev->intr_buff) { rtl8150_probe() 873 tasklet_init(&dev->tl, rx_fixup, (unsigned long)dev); rtl8150_probe() 874 spin_lock_init(&dev->rx_pool_lock); rtl8150_probe() 876 dev->udev = udev; rtl8150_probe() 877 dev->netdev = netdev; rtl8150_probe() 881 dev->intr_interval = 100; /* 100ms / rtl8150_probe() 883 if (!alloc_all_urbs(dev)) { rtl8150_probe() 884 dev_err(&intf->dev, "out of memory\n"); rtl8150_probe() 887 if (!rtl8150_reset(dev)) { rtl8150_probe() 888 dev_err(&intf->dev, "couldn't reset the device\n"); rtl8150_probe() 891 fill_skb_pool(dev); rtl8150_probe() 892 set_ethernet_addr(dev); rtl8150_probe() 894 usb_set_intfdata(intf, dev); rtl8150_probe() 895 SET_NETDEV_DEV(netdev, &intf->dev); rtl8150_probe() 897 dev_err(&intf->dev, "couldn't register the device\n"); rtl8150_probe() 901 dev_info(&intf->dev, "%s: rtl8150 is detected\n", netdev->name); rtl8150_probe() 907 free_skb_pool(dev); rtl8150_probe() 909 free_all_urbs(dev); rtl8150_probe() 911 kfree(dev->intr_buff); rtl8150_probe() 918 rtl8150_t dev = usb_get_intfdata(intf); rtl8150_disconnect() local 921 if (dev) { rtl8150_disconnect() 922 set_bit(RTL8150_UNPLUG, &dev->flags); rtl8150_disconnect() 923 tasklet_kill(&dev->tl); rtl8150_disconnect() 924 unregister_netdev(dev->netdev); rtl8150_disconnect() 925 unlink_all_urbs(dev); rtl8150_disconnect() 926 free_all_urbs(dev); rtl8150_disconnect() 927 free_skb_pool(dev); rtl8150_disconnect() 928 if (dev->rx_skb) rtl8150_disconnect() 929 dev_kfree_skb(dev->rx_skb); rtl8150_disconnect() 930 kfree(dev->intr_buff); rtl8150_disconnect() 931 free_netdev(dev->netdev); rtl8150_disconnect()
H A D	usbnet.c	66 #define RX_QLEN(dev) ((dev)->rx_qlen) 67 #define TX_QLEN(dev) ((dev)->tx_qlen) 95 int usbnet_get_endpoints(struct usbnet dev, struct usb_interface intf) usbnet_get_endpoints() argument 145 !(dev->driver_info->flags & FLAG_NO_SETINT)) { usbnet_get_endpoints() 146 tmp = usb_set_interface (dev->udev, alt->desc.bInterfaceNumber, usbnet_get_endpoints() 152 dev->in = usb_rcvbulkpipe (dev->udev, usbnet_get_endpoints() 154 dev->out = usb_sndbulkpipe (dev->udev, usbnet_get_endpoints() 156 dev->status = status; usbnet_get_endpoints() 161 int usbnet_get_ethernet_addr(struct usbnet dev, int iMACAddress) usbnet_get_ethernet_addr() argument 166 ret = usb_string(dev->udev, iMACAddress, buf, sizeof buf); usbnet_get_ethernet_addr() 168 tmp = hex2bin(dev->net->dev_addr, buf, 6); usbnet_get_ethernet_addr() 170 dev_dbg(&dev->udev->dev, usbnet_get_ethernet_addr() 182 struct usbnet dev = urb->context; intr_complete() local 188 dev->driver_info->status(dev, urb); intr_complete() 194 netif_dbg(dev, ifdown, dev->net, intr_complete() 202 netdev_dbg(dev->net, "intr status %d\n", status); intr_complete() 208 netif_err(dev, timer, dev->net, intr_complete() 212 static int init_status (struct usbnet dev, struct usb_interface intf) init_status() argument 219 if (!dev->driver_info->status) init_status() 222 pipe = usb_rcvintpipe (dev->udev, init_status() 223 dev->status->desc.bEndpointAddress init_status() 225 maxp = usb_maxpacket (dev->udev, pipe, 0); init_status() 228 period = max ((int) dev->status->desc.bInterval, init_status() 229 (dev->udev->speed == USB_SPEED_HIGH) ? 7 : 3); init_status() 233 dev->interrupt = usb_alloc_urb (0, GFP_KERNEL); init_status() 234 if (!dev->interrupt) { init_status() 238 usb_fill_int_urb(dev->interrupt, dev->udev, pipe, init_status() 239 buf, maxp, intr_complete, dev, period); init_status() 240 dev->interrupt->transfer_flags \|= URB_FREE_BUFFER; init_status() 241 dev_dbg(&intf->dev, init_status() 250 int usbnet_status_start(struct usbnet dev, gfp_t mem_flags) usbnet_status_start() argument 254 WARN_ON_ONCE(dev->interrupt == NULL); usbnet_status_start() 255 if (dev->interrupt) { usbnet_status_start() 256 mutex_lock(&dev->interrupt_mutex); usbnet_status_start() 258 if (++dev->interrupt_count == 1) usbnet_status_start() 259 ret = usb_submit_urb(dev->interrupt, mem_flags); usbnet_status_start() 261 dev_dbg(&dev->udev->dev, "incremented interrupt URB count to %d\n", usbnet_status_start() 262 dev->interrupt_count); usbnet_status_start() 263 mutex_unlock(&dev->interrupt_mutex); usbnet_status_start() 270 static int __usbnet_status_start_force(struct usbnet dev, gfp_t mem_flags) __usbnet_status_start_force() argument 274 mutex_lock(&dev->interrupt_mutex); __usbnet_status_start_force() 275 if (dev->interrupt_count) { __usbnet_status_start_force() 276 ret = usb_submit_urb(dev->interrupt, mem_flags); __usbnet_status_start_force() 277 dev_dbg(&dev->udev->dev, __usbnet_status_start_force() 280 mutex_unlock(&dev->interrupt_mutex); __usbnet_status_start_force() 285 void usbnet_status_stop(struct usbnet dev) usbnet_status_stop() argument 287 if (dev->interrupt) { usbnet_status_stop() 288 mutex_lock(&dev->interrupt_mutex); usbnet_status_stop() 289 WARN_ON(dev->interrupt_count == 0); usbnet_status_stop() 291 if (dev->interrupt_count && --dev->interrupt_count == 0) usbnet_status_stop() 292 usb_kill_urb(dev->interrupt); usbnet_status_stop() 294 dev_dbg(&dev->udev->dev, usbnet_status_stop() 296 dev->interrupt_count); usbnet_status_stop() 297 mutex_unlock(&dev->interrupt_mutex); usbnet_status_stop() 303 static void __usbnet_status_stop_force(struct usbnet dev) __usbnet_status_stop_force() argument 305 if (dev->interrupt) { __usbnet_status_stop_force() 306 mutex_lock(&dev->interrupt_mutex); __usbnet_status_stop_force() 307 usb_kill_urb(dev->interrupt); __usbnet_status_stop_force() 308 dev_dbg(&dev->udev->dev, "killed interrupt URB for suspend\n"); __usbnet_status_stop_force() 309 mutex_unlock(&dev->interrupt_mutex); __usbnet_status_stop_force() 317 void usbnet_skb_return (struct usbnet dev, struct sk_buff skb) usbnet_skb_return() argument 321 if (test_bit(EVENT_RX_PAUSED, &dev->flags)) { usbnet_skb_return() 322 skb_queue_tail(&dev->rxq_pause, skb); usbnet_skb_return() 326 skb->protocol = eth_type_trans (skb, dev->net); usbnet_skb_return() 327 dev->net->stats.rx_packets++; usbnet_skb_return() 328 dev->net->stats.rx_bytes += skb->len; usbnet_skb_return() 330 netif_dbg(dev, rx_status, dev->net, "< rx, len %zu, type 0x%x\n", usbnet_skb_return() 339 netif_dbg(dev, rx_err, dev->net, usbnet_skb_return() 345 void usbnet_update_max_qlen(struct usbnet dev) usbnet_update_max_qlen() argument 347 enum usb_device_speed speed = dev->udev->speed; usbnet_update_max_qlen() 351 dev->rx_qlen = MAX_QUEUE_MEMORY / dev->rx_urb_size; usbnet_update_max_qlen() 352 dev->tx_qlen = MAX_QUEUE_MEMORY / dev->hard_mtu; usbnet_update_max_qlen() 360 dev->rx_qlen = 5 MAX_QUEUE_MEMORY / dev->rx_urb_size; usbnet_update_max_qlen() 361 dev->tx_qlen = 5 * MAX_QUEUE_MEMORY / dev->hard_mtu; usbnet_update_max_qlen() 364 dev->rx_qlen = dev->tx_qlen = 4; usbnet_update_max_qlen() 379 struct usbnet dev = netdev_priv(net); usbnet_change_mtu() 381 int old_hard_mtu = dev->hard_mtu; usbnet_change_mtu() 382 int old_rx_urb_size = dev->rx_urb_size; usbnet_change_mtu() 387 if ((ll_mtu % dev->maxpacket) == 0) usbnet_change_mtu() 391 dev->hard_mtu = net->mtu + net->hard_header_len; usbnet_change_mtu() 392 if (dev->rx_urb_size == old_hard_mtu) { usbnet_change_mtu() 393 dev->rx_urb_size = dev->hard_mtu; usbnet_change_mtu() 394 if (dev->rx_urb_size > old_rx_urb_size) usbnet_change_mtu() 395 usbnet_unlink_rx_urbs(dev); usbnet_change_mtu() 399 usbnet_update_max_qlen(dev); usbnet_change_mtu() 421 static enum skb_state defer_bh(struct usbnet dev, struct sk_buff skb, defer_bh() 433 spin_lock(&dev->done.lock); defer_bh() 434 __skb_queue_tail(&dev->done, skb); defer_bh() 435 if (dev->done.qlen == 1) defer_bh() 436 tasklet_schedule(&dev->bh); defer_bh() 437 spin_unlock_irqrestore(&dev->done.lock, flags); defer_bh() 446 void usbnet_defer_kevent (struct usbnet dev, int work) usbnet_defer_kevent() 448 set_bit (work, &dev->flags); usbnet_defer_kevent() 449 if (!schedule_work (&dev->kevent)) { usbnet_defer_kevent() 451 netdev_err(dev->net, "kevent %d may have been dropped\n", work); usbnet_defer_kevent() 453 netdev_dbg(dev->net, "kevent %d scheduled\n", work); usbnet_defer_kevent() 462 static int rx_submit (struct usbnet dev, struct urb urb, gfp_t flags) rx_submit() 468 size_t size = dev->rx_urb_size; rx_submit() 471 if (test_bit(EVENT_RX_KILL, &dev->flags)) { rx_submit() 476 skb = __netdev_alloc_skb_ip_align(dev->net, size, flags); rx_submit() 478 netif_dbg(dev, rx_err, dev->net, "no rx skb\n"); rx_submit() 479 usbnet_defer_kevent (dev, EVENT_RX_MEMORY); rx_submit() 486 entry->dev = dev; rx_submit() 489 usb_fill_bulk_urb (urb, dev->udev, dev->in, rx_submit() 492 spin_lock_irqsave (&dev->rxq.lock, lockflags); rx_submit() 494 if (netif_running (dev->net) && rx_submit() 495 netif_device_present (dev->net) && rx_submit() 496 !test_bit (EVENT_RX_HALT, &dev->flags) && rx_submit() 497 !test_bit (EVENT_DEV_ASLEEP, &dev->flags)) { rx_submit() 500 usbnet_defer_kevent (dev, EVENT_RX_HALT); rx_submit() 503 usbnet_defer_kevent (dev, EVENT_RX_MEMORY); rx_submit() 506 netif_dbg(dev, ifdown, dev->net, "device gone\n"); rx_submit() 507 netif_device_detach (dev->net); rx_submit() 513 netif_dbg(dev, rx_err, dev->net, rx_submit() 515 tasklet_schedule (&dev->bh); rx_submit() 518 __usbnet_queue_skb(&dev->rxq, skb, rx_start); rx_submit() 521 netif_dbg(dev, ifdown, dev->net, "rx: stopped\n"); rx_submit() 524 spin_unlock_irqrestore (&dev->rxq.lock, lockflags); rx_submit() 535 static inline void rx_process (struct usbnet dev, struct sk_buff skb) rx_process() 537 if (dev->driver_info->rx_fixup && rx_process() 538 !dev->driver_info->rx_fixup (dev, skb)) { rx_process() 540 if (!(dev->driver_info->flags & FLAG_RX_ASSEMBLE)) rx_process() 541 dev->net->stats.rx_errors++; rx_process() 547 if (dev->driver_info->flags & FLAG_MULTI_PACKET) rx_process() 551 dev->net->stats.rx_errors++; rx_process() 552 dev->net->stats.rx_length_errors++; rx_process() 553 netif_dbg(dev, rx_err, dev->net, "rx length %d\n", skb->len); rx_process() 555 usbnet_skb_return(dev, skb); rx_process() 560 skb_queue_tail(&dev->done, skb); 569 struct usbnet dev = entry->dev; rx_complete() 588 dev->net->stats.rx_errors++; rx_complete() 589 usbnet_defer_kevent (dev, EVENT_RX_HALT); rx_complete() 595 netif_dbg(dev, ifdown, dev->net, rx_complete() 606 dev->net->stats.rx_errors++; rx_complete() 607 if (!timer_pending (&dev->delay)) { rx_complete() 608 mod_timer (&dev->delay, jiffies + THROTTLE_JIFFIES); rx_complete() 609 netif_dbg(dev, link, dev->net, rx_complete() 620 dev->net->stats.rx_over_errors++; rx_complete() 625 dev->net->stats.rx_errors++; rx_complete() 626 netif_dbg(dev, rx_err, dev->net, "rx status %d\n", urb_status); rx_complete() 631 if (++dev->pkt_cnt > 30) { rx_complete() 632 dev->pkt_cnt = 0; rx_complete() 633 dev->pkt_err = 0; rx_complete() 636 dev->pkt_err++; rx_complete() 637 if (dev->pkt_err > 20) rx_complete() 638 set_bit(EVENT_RX_KILL, &dev->flags); rx_complete() 641 state = defer_bh(dev, skb, &dev->rxq, state); rx_complete() 644 if (netif_running (dev->net) && rx_complete() 645 !test_bit (EVENT_RX_HALT, &dev->flags) && rx_complete() 647 rx_submit (dev, urb, GFP_ATOMIC); rx_complete() 648 usb_mark_last_busy(dev->udev); rx_complete() 653 netif_dbg(dev, rx_err, dev->net, "no read resubmitted\n"); 657 void usbnet_pause_rx(struct usbnet dev) usbnet_pause_rx() 659 set_bit(EVENT_RX_PAUSED, &dev->flags); usbnet_pause_rx() 661 netif_dbg(dev, rx_status, dev->net, "paused rx queue enabled\n"); 665 void usbnet_resume_rx(struct usbnet dev) usbnet_resume_rx() 670 clear_bit(EVENT_RX_PAUSED, &dev->flags); usbnet_resume_rx() 672 while ((skb = skb_dequeue(&dev->rxq_pause)) != NULL) { usbnet_resume_rx() 673 usbnet_skb_return(dev, skb); usbnet_resume_rx() 677 tasklet_schedule(&dev->bh); usbnet_resume_rx() 679 netif_dbg(dev, rx_status, dev->net, usbnet_resume_rx() 684 void usbnet_purge_paused_rxq(struct usbnet dev) usbnet_purge_paused_rxq() 686 skb_queue_purge(&dev->rxq_pause); 694 static int unlink_urbs (struct usbnet dev, struct sk_buff_head q) unlink_urbs() 729 netdev_dbg(dev->net, "unlink urb err, %d\n", retval); 742 void usbnet_unlink_rx_urbs(struct usbnet dev) usbnet_unlink_rx_urbs() 744 if (netif_running(dev->net)) { usbnet_unlink_rx_urbs() 745 (void) unlink_urbs (dev, &dev->rxq); usbnet_unlink_rx_urbs() 746 tasklet_schedule(&dev->bh); usbnet_unlink_rx_urbs() 754 static void usbnet_terminate_urbs(struct usbnet dev) usbnet_terminate_urbs() 760 add_wait_queue(&dev->wait, &wait); usbnet_terminate_urbs() 762 temp = unlink_urbs(dev, &dev->txq) + usbnet_terminate_urbs() 763 unlink_urbs(dev, &dev->rxq); usbnet_terminate_urbs() 766 while (!skb_queue_empty(&dev->rxq) usbnet_terminate_urbs() 767 && !skb_queue_empty(&dev->txq) usbnet_terminate_urbs() 768 && !skb_queue_empty(&dev->done)) { usbnet_terminate_urbs() 771 netif_dbg(dev, ifdown, dev->net, usbnet_terminate_urbs() 775 remove_wait_queue(&dev->wait, &wait); 780 struct usbnet dev = netdev_priv(net); usbnet_stop() 781 struct driver_info info = dev->driver_info; usbnet_stop() 784 clear_bit(EVENT_DEV_OPEN, &dev->flags); usbnet_stop() 787 netif_info(dev, ifdown, dev->net, usbnet_stop() 793 pm = usb_autopm_get_interface(dev->intf); usbnet_stop() 797 retval = info->stop(dev); usbnet_stop() 799 netif_info(dev, ifdown, dev->net, usbnet_stop() 802 dev->udev->bus->bus_name, dev->udev->devpath, usbnet_stop() 807 usbnet_terminate_urbs(dev); usbnet_stop() 809 usbnet_status_stop(dev); usbnet_stop() 811 usbnet_purge_paused_rxq(dev); usbnet_stop() 813 mpn = !test_and_clear_bit(EVENT_NO_RUNTIME_PM, &dev->flags); usbnet_stop() 819 dev->flags = 0; usbnet_stop() 820 del_timer_sync (&dev->delay); usbnet_stop() 821 tasklet_kill (&dev->bh); usbnet_stop() 823 usb_autopm_put_interface(dev->intf); usbnet_stop() 826 info->manage_power(dev, 0); usbnet_stop() 828 usb_autopm_put_interface(dev->intf); usbnet_stop() 842 struct usbnet dev = netdev_priv(net); usbnet_open() 844 struct driver_info info = dev->driver_info; usbnet_open() 846 if ((retval = usb_autopm_get_interface(dev->intf)) < 0) { usbnet_open() 847 netif_info(dev, ifup, dev->net, usbnet_open() 850 dev->udev->bus->bus_name, usbnet_open() 851 dev->udev->devpath, usbnet_open() 857 if (info->reset && (retval = info->reset (dev)) < 0) { usbnet_open() 858 netif_info(dev, ifup, dev->net, usbnet_open() 861 dev->udev->bus->bus_name, usbnet_open() 862 dev->udev->devpath, usbnet_open() 868 usbnet_update_max_qlen(dev); usbnet_open() 871 if (info->check_connect && (retval = info->check_connect (dev)) < 0) { usbnet_open() 872 netif_dbg(dev, ifup, dev->net, "can't open; %d\n", retval); usbnet_open() 877 if (dev->interrupt) { usbnet_open() 878 retval = usbnet_status_start(dev, GFP_KERNEL); usbnet_open() 880 netif_err(dev, ifup, dev->net, usbnet_open() 886 set_bit(EVENT_DEV_OPEN, &dev->flags); usbnet_open() 888 netif_info(dev, ifup, dev->net, usbnet_open() 890 (int)RX_QLEN(dev), (int)TX_QLEN(dev), usbnet_open() 891 dev->net->mtu, usbnet_open() 892 (dev->driver_info->flags & FLAG_FRAMING_NC) ? "NetChip" : usbnet_open() 893 (dev->driver_info->flags & FLAG_FRAMING_GL) ? "GeneSys" : usbnet_open() 894 (dev->driver_info->flags & FLAG_FRAMING_Z) ? "Zaurus" : usbnet_open() 895 (dev->driver_info->flags & FLAG_FRAMING_RN) ? "RNDIS" : usbnet_open() 896 (dev->driver_info->flags & FLAG_FRAMING_AX) ? "ASIX" : usbnet_open() 900 dev->pkt_cnt = 0; usbnet_open() 901 dev->pkt_err = 0; usbnet_open() 902 clear_bit(EVENT_RX_KILL, &dev->flags); usbnet_open() 905 tasklet_schedule (&dev->bh); usbnet_open() 907 retval = info->manage_power(dev, 1); usbnet_open() 910 set_bit(EVENT_NO_RUNTIME_PM, &dev->flags); usbnet_open() 912 usb_autopm_put_interface(dev->intf); usbnet_open() 917 usb_autopm_put_interface(dev->intf); usbnet_open() 931 struct usbnet dev = netdev_priv(net); usbnet_get_settings() 933 if (!dev->mii.mdio_read) usbnet_get_settings() 936 return mii_ethtool_gset(&dev->mii, cmd); 942 struct usbnet dev = netdev_priv(net); usbnet_set_settings() 945 if (!dev->mii.mdio_write) usbnet_set_settings() 948 retval = mii_ethtool_sset(&dev->mii, cmd); usbnet_set_settings() 951 if (dev->driver_info->link_reset) usbnet_set_settings() 952 dev->driver_info->link_reset(dev); usbnet_set_settings() 955 usbnet_update_max_qlen(dev); usbnet_set_settings() 964 struct usbnet dev = netdev_priv(net); usbnet_get_link() 967 if (dev->driver_info->check_connect) usbnet_get_link() 968 return dev->driver_info->check_connect (dev) == 0; usbnet_get_link() 971 if (dev->mii.mdio_read) usbnet_get_link() 972 return mii_link_ok(&dev->mii); usbnet_get_link() 981 struct usbnet dev = netdev_priv(net); usbnet_nway_reset() 983 if (!dev->mii.mdio_write) usbnet_nway_reset() 986 return mii_nway_restart(&dev->mii); 992 struct usbnet dev = netdev_priv(net); usbnet_get_drvinfo() 994 strlcpy (info->driver, dev->driver_name, sizeof info->driver); usbnet_get_drvinfo() 996 strlcpy (info->fw_version, dev->driver_info->description, usbnet_get_drvinfo() 998 usb_make_path (dev->udev, info->bus_info, sizeof info->bus_info); 1004 struct usbnet dev = netdev_priv(net); usbnet_get_msglevel() 1006 return dev->msg_enable; 1012 struct usbnet dev = netdev_priv(net); usbnet_set_msglevel() 1014 dev->msg_enable = level; 1032 static void __handle_link_change(struct usbnet dev) __handle_link_change() 1034 if (!test_bit(EVENT_DEV_OPEN, &dev->flags)) __handle_link_change() 1037 if (!netif_carrier_ok(dev->net)) { __handle_link_change() 1039 unlink_urbs(dev, &dev->rxq); __handle_link_change() 1047 tasklet_schedule(&dev->bh); __handle_link_change() 1051 usbnet_update_max_qlen(dev); __handle_link_change() 1053 clear_bit(EVENT_LINK_CHANGE, &dev->flags); 1058 struct usbnet dev = netdev_priv(net); usbnet_set_rx_mode() 1060 usbnet_defer_kevent(dev, EVENT_SET_RX_MODE); 1063 static void __handle_set_rx_mode(struct usbnet dev) __handle_set_rx_mode() 1065 if (dev->driver_info->set_rx_mode) __handle_set_rx_mode() 1066 (dev->driver_info->set_rx_mode)(dev); __handle_set_rx_mode() 1068 clear_bit(EVENT_SET_RX_MODE, &dev->flags); 1079 struct usbnet dev = usbnet_deferred_kevent() 1084 if (test_bit (EVENT_TX_HALT, &dev->flags)) { usbnet_deferred_kevent() 1085 unlink_urbs (dev, &dev->txq); usbnet_deferred_kevent() 1086 status = usb_autopm_get_interface(dev->intf); usbnet_deferred_kevent() 1089 status = usb_clear_halt (dev->udev, dev->out); usbnet_deferred_kevent() 1090 usb_autopm_put_interface(dev->intf); usbnet_deferred_kevent() 1094 if (netif_msg_tx_err (dev)) usbnet_deferred_kevent() 1096 netdev_err(dev->net, "can't clear tx halt, status %d\n", usbnet_deferred_kevent() 1099 clear_bit (EVENT_TX_HALT, &dev->flags); usbnet_deferred_kevent() 1101 netif_wake_queue (dev->net); usbnet_deferred_kevent() 1104 if (test_bit (EVENT_RX_HALT, &dev->flags)) { usbnet_deferred_kevent() 1105 unlink_urbs (dev, &dev->rxq); usbnet_deferred_kevent() 1106 status = usb_autopm_get_interface(dev->intf); usbnet_deferred_kevent() 1109 status = usb_clear_halt (dev->udev, dev->in); usbnet_deferred_kevent() 1110 usb_autopm_put_interface(dev->intf); usbnet_deferred_kevent() 1114 if (netif_msg_rx_err (dev)) usbnet_deferred_kevent() 1116 netdev_err(dev->net, "can't clear rx halt, status %d\n", usbnet_deferred_kevent() 1119 clear_bit (EVENT_RX_HALT, &dev->flags); usbnet_deferred_kevent() 1120 tasklet_schedule (&dev->bh); usbnet_deferred_kevent() 1125 if (test_bit (EVENT_RX_MEMORY, &dev->flags)) { usbnet_deferred_kevent() 1129 if (netif_running (dev->net)) usbnet_deferred_kevent() 1132 clear_bit (EVENT_RX_MEMORY, &dev->flags); usbnet_deferred_kevent() 1134 clear_bit (EVENT_RX_MEMORY, &dev->flags); usbnet_deferred_kevent() 1135 status = usb_autopm_get_interface(dev->intf); usbnet_deferred_kevent() 1140 if (rx_submit (dev, urb, GFP_KERNEL) == -ENOLINK) usbnet_deferred_kevent() 1142 usb_autopm_put_interface(dev->intf); usbnet_deferred_kevent() 1145 tasklet_schedule (&dev->bh); usbnet_deferred_kevent() 1149 if (test_bit (EVENT_LINK_RESET, &dev->flags)) { usbnet_deferred_kevent() 1150 struct driver_info info = dev->driver_info; usbnet_deferred_kevent() 1153 clear_bit (EVENT_LINK_RESET, &dev->flags); usbnet_deferred_kevent() 1154 status = usb_autopm_get_interface(dev->intf); usbnet_deferred_kevent() 1157 if(info->link_reset && (retval = info->link_reset(dev)) < 0) { usbnet_deferred_kevent() 1158 usb_autopm_put_interface(dev->intf); usbnet_deferred_kevent() 1160 netdev_info(dev->net, "link reset failed (%d) usbnet usb-%s-%s, %s\n", usbnet_deferred_kevent() 1162 dev->udev->bus->bus_name, usbnet_deferred_kevent() 1163 dev->udev->devpath, usbnet_deferred_kevent() 1166 usb_autopm_put_interface(dev->intf); usbnet_deferred_kevent() 1170 __handle_link_change(dev); usbnet_deferred_kevent() 1173 if (test_bit (EVENT_LINK_CHANGE, &dev->flags)) usbnet_deferred_kevent() 1174 __handle_link_change(dev); usbnet_deferred_kevent() 1176 if (test_bit (EVENT_SET_RX_MODE, &dev->flags)) usbnet_deferred_kevent() 1177 __handle_set_rx_mode(dev); usbnet_deferred_kevent() 1180 if (dev->flags) usbnet_deferred_kevent() 1181 netdev_dbg(dev->net, "kevent done, flags = 0x%lx\n", dev->flags); 1190 struct usbnet dev = entry->dev; tx_complete() 1193 dev->net->stats.tx_packets += entry->packets; tx_complete() 1194 dev->net->stats.tx_bytes += entry->length; tx_complete() 1196 dev->net->stats.tx_errors++; tx_complete() 1200 usbnet_defer_kevent (dev, EVENT_TX_HALT); tx_complete() 1214 usb_mark_last_busy(dev->udev); tx_complete() 1215 if (!timer_pending (&dev->delay)) { tx_complete() 1216 mod_timer (&dev->delay, tx_complete() 1218 netif_dbg(dev, link, dev->net, tx_complete() 1221 netif_stop_queue (dev->net); tx_complete() 1224 netif_dbg(dev, tx_err, dev->net, tx_complete() 1230 usb_autopm_put_interface_async(dev->intf); tx_complete() 1231 (void) defer_bh(dev, skb, &dev->txq, tx_done); 1238 struct usbnet dev = netdev_priv(net); usbnet_tx_timeout() 1240 unlink_urbs (dev, &dev->txq); usbnet_tx_timeout() 1241 tasklet_schedule (&dev->bh); usbnet_tx_timeout() 1246 if (dev->driver_info->recover) usbnet_tx_timeout() 1247 (dev->driver_info->recover)(dev); 1289 struct usbnet dev = netdev_priv(net); usbnet_start_xmit() 1293 struct driver_info info = dev->driver_info; usbnet_start_xmit() 1303 skb = info->tx_fixup (dev, skb, GFP_ATOMIC); usbnet_start_xmit() 1308 netif_dbg(dev, tx_err, dev->net, "can't tx_fixup skb\n"); usbnet_start_xmit() 1314 netif_dbg(dev, tx_err, dev->net, "no urb\n"); usbnet_start_xmit() 1320 entry->dev = dev; usbnet_start_xmit() 1322 usb_fill_bulk_urb (urb, dev->udev, dev->out, usbnet_start_xmit() 1324 if (dev->can_dma_sg) { usbnet_start_xmit() 1337 if (length % dev->maxpacket == 0) { usbnet_start_xmit() 1346 dev->padding_pkt, 1); usbnet_start_xmit() 1365 spin_lock_irqsave(&dev->txq.lock, flags); usbnet_start_xmit() 1366 retval = usb_autopm_get_interface_async(dev->intf); usbnet_start_xmit() 1368 spin_unlock_irqrestore(&dev->txq.lock, flags); usbnet_start_xmit() 1374 if (test_bit(EVENT_DEV_ASLEEP, &dev->flags)) { usbnet_start_xmit() 1376 usb_anchor_urb(urb, &dev->deferred); usbnet_start_xmit() 1380 spin_unlock_irqrestore(&dev->txq.lock, flags); usbnet_start_xmit() 1381 netdev_dbg(dev->net, "Delaying transmission for resumption\n"); usbnet_start_xmit() 1389 usbnet_defer_kevent (dev, EVENT_TX_HALT); usbnet_start_xmit() 1390 usb_autopm_put_interface_async(dev->intf); usbnet_start_xmit() 1393 usb_autopm_put_interface_async(dev->intf); usbnet_start_xmit() 1394 netif_dbg(dev, tx_err, dev->net, usbnet_start_xmit() 1399 __usbnet_queue_skb(&dev->txq, skb, tx_start); usbnet_start_xmit() 1400 if (dev->txq.qlen >= TX_QLEN (dev)) usbnet_start_xmit() 1403 spin_unlock_irqrestore (&dev->txq.lock, flags); usbnet_start_xmit() 1406 netif_dbg(dev, tx_err, dev->net, "drop, code %d\n", retval); usbnet_start_xmit() 1408 dev->net->stats.tx_dropped++; usbnet_start_xmit() 1417 netif_dbg(dev, tx_queued, dev->net, usbnet_start_xmit() 1426 static int rx_alloc_submit(struct usbnet dev, gfp_t flags) rx_alloc_submit() 1433 for (i = 0; i < 10 && dev->rxq.qlen < RX_QLEN(dev); i++) { rx_alloc_submit() 1436 ret = rx_submit(dev, urb, flags); rx_alloc_submit() 1454 struct usbnet dev = (struct usbnet ) param; usbnet_bh() 1458 while ((skb = skb_dequeue (&dev->done))) { usbnet_bh() 1463 rx_process (dev, skb); usbnet_bh() 1472 netdev_dbg(dev->net, "bogus skb state %d\n", entry->state); usbnet_bh() 1477 clear_bit(EVENT_RX_KILL, &dev->flags); usbnet_bh() 1482 if (waitqueue_active(&dev->wait)) { usbnet_bh() 1483 if (dev->txq.qlen + dev->rxq.qlen + dev->done.qlen == 0) usbnet_bh() 1484 wake_up_all(&dev->wait); usbnet_bh() 1487 } else if (netif_running (dev->net) && usbnet_bh() 1488 netif_device_present (dev->net) && usbnet_bh() 1489 netif_carrier_ok(dev->net) && usbnet_bh() 1490 !timer_pending (&dev->delay) && usbnet_bh() 1491 !test_bit (EVENT_RX_HALT, &dev->flags)) { usbnet_bh() 1492 int temp = dev->rxq.qlen; usbnet_bh() 1494 if (temp < RX_QLEN(dev)) { usbnet_bh() 1495 if (rx_alloc_submit(dev, GFP_ATOMIC) == -ENOLINK) usbnet_bh() 1497 if (temp != dev->rxq.qlen) usbnet_bh() 1498 netif_dbg(dev, link, dev->net, usbnet_bh() 1500 temp, dev->rxq.qlen); usbnet_bh() 1501 if (dev->rxq.qlen < RX_QLEN(dev)) usbnet_bh() 1502 tasklet_schedule (&dev->bh); usbnet_bh() 1504 if (dev->txq.qlen < TX_QLEN (dev)) usbnet_bh() 1505 netif_wake_queue (dev->net); usbnet_bh() 1520 struct usbnet dev; usbnet_disconnect() 1524 dev = usb_get_intfdata(intf); usbnet_disconnect() 1526 if (!dev) usbnet_disconnect() 1531 netif_info(dev, probe, dev->net, "unregister '%s' usb-%s-%s, %s\n", usbnet_disconnect() 1532 intf->dev.driver->name, usbnet_disconnect() 1534 dev->driver_info->description); usbnet_disconnect() 1536 net = dev->net; usbnet_disconnect() 1539 cancel_work_sync(&dev->kevent); usbnet_disconnect() 1541 usb_scuttle_anchored_urbs(&dev->deferred); usbnet_disconnect() 1543 if (dev->driver_info->unbind) usbnet_disconnect() 1544 dev->driver_info->unbind (dev, intf); usbnet_disconnect() 1546 usb_kill_urb(dev->interrupt); usbnet_disconnect() 1547 usb_free_urb(dev->interrupt); usbnet_disconnect() 1548 kfree(dev->padding_pkt); usbnet_disconnect() 1580 struct usbnet dev; usbnet_probe() 1587 struct usb_driver driver = to_usb_driver(udev->dev.driver); usbnet_probe() 1595 pm_runtime_enable(&udev->dev); usbnet_probe() 1598 name = udev->dev.driver->name; usbnet_probe() 1601 dev_dbg (&udev->dev, "blacklisted by %s\n", name); usbnet_probe() 1610 net = alloc_etherdev(sizeof(dev)); usbnet_probe() 1615 SET_NETDEV_DEV(net, &udev->dev); usbnet_probe() 1617 dev = netdev_priv(net); usbnet_probe() 1618 dev->udev = xdev; usbnet_probe() 1619 dev->intf = udev; usbnet_probe() 1620 dev->driver_info = info; usbnet_probe() 1621 dev->driver_name = name; usbnet_probe() 1622 dev->msg_enable = netif_msg_init (msg_level, NETIF_MSG_DRV usbnet_probe() 1624 init_waitqueue_head(&dev->wait); usbnet_probe() 1625 skb_queue_head_init (&dev->rxq); usbnet_probe() 1626 skb_queue_head_init (&dev->txq); usbnet_probe() 1627 skb_queue_head_init (&dev->done); usbnet_probe() 1628 skb_queue_head_init(&dev->rxq_pause); usbnet_probe() 1629 dev->bh.func = usbnet_bh; usbnet_probe() 1630 dev->bh.data = (unsigned long) dev; usbnet_probe() 1631 INIT_WORK (&dev->kevent, usbnet_deferred_kevent); usbnet_probe() 1632 init_usb_anchor(&dev->deferred); usbnet_probe() 1633 dev->delay.function = usbnet_bh; usbnet_probe() 1634 dev->delay.data = (unsigned long) dev; usbnet_probe() 1635 init_timer (&dev->delay); usbnet_probe() 1636 mutex_init (&dev->phy_mutex); usbnet_probe() 1637 mutex_init(&dev->interrupt_mutex); usbnet_probe() 1638 dev->interrupt_count = 0; usbnet_probe() 1640 dev->net = net; usbnet_probe() 1647 dev->hard_mtu = net->mtu + net->hard_header_len; usbnet_probe() 1651 if (dma_supported (&udev->dev, DMA_BIT_MASK(64))) usbnet_probe() 1662 status = info->bind (dev, udev); usbnet_probe() 1669 if ((dev->driver_info->flags & FLAG_ETHER) != 0 && usbnet_probe() 1670 ((dev->driver_info->flags & FLAG_POINTTOPOINT) == 0 \|\| usbnet_probe() 1674 if ((dev->driver_info->flags & FLAG_WLAN) != 0) usbnet_probe() 1677 if ((dev->driver_info->flags & FLAG_WWAN) != 0) usbnet_probe() 1681 if ((dev->driver_info->flags & FLAG_NOARP) != 0) usbnet_probe() 1685 if (net->mtu > (dev->hard_mtu - net->hard_header_len)) usbnet_probe() 1686 net->mtu = dev->hard_mtu - net->hard_header_len; usbnet_probe() 1688 status = usbnet_get_endpoints (dev, udev); usbnet_probe() 1690 dev->in = usb_rcvbulkpipe (xdev, info->in); usbnet_probe() 1691 dev->out = usb_sndbulkpipe (xdev, info->out); usbnet_probe() 1700 if (status >= 0 && dev->status) usbnet_probe() 1701 status = init_status (dev, udev); usbnet_probe() 1705 if (!dev->rx_urb_size) usbnet_probe() 1706 dev->rx_urb_size = dev->hard_mtu; usbnet_probe() 1707 dev->maxpacket = usb_maxpacket (dev->udev, dev->out, 1); usbnet_probe() 1713 if ((dev->driver_info->flags & FLAG_WLAN) != 0) usbnet_probe() 1715 if ((dev->driver_info->flags & FLAG_WWAN) != 0) usbnet_probe() 1719 usbnet_update_max_qlen(dev); usbnet_probe() 1721 if (dev->can_dma_sg && !(info->flags & FLAG_SEND_ZLP) && usbnet_probe() 1723 dev->padding_pkt = kzalloc(1, GFP_KERNEL); usbnet_probe() 1724 if (!dev->padding_pkt) { usbnet_probe() 1733 netif_info(dev, probe, dev->net, usbnet_probe() 1735 udev->dev.driver->name, usbnet_probe() 1737 dev->driver_info->description, usbnet_probe() 1741 usb_set_intfdata (udev, dev); usbnet_probe() 1745 if (dev->driver_info->flags & FLAG_LINK_INTR) usbnet_probe() 1746 usbnet_link_change(dev, 0, 0); usbnet_probe() 1751 kfree(dev->padding_pkt); usbnet_probe() 1753 usb_free_urb(dev->interrupt); usbnet_probe() 1756 info->unbind (dev, udev); usbnet_probe() 1773 struct usbnet dev = usb_get_intfdata(intf); usbnet_suspend() 1775 if (!dev->suspend_count++) { usbnet_suspend() 1776 spin_lock_irq(&dev->txq.lock); usbnet_suspend() 1778 if (dev->txq.qlen && PMSG_IS_AUTO(message)) { usbnet_suspend() 1779 dev->suspend_count--; usbnet_suspend() 1780 spin_unlock_irq(&dev->txq.lock); usbnet_suspend() 1783 set_bit(EVENT_DEV_ASLEEP, &dev->flags); usbnet_suspend() 1784 spin_unlock_irq(&dev->txq.lock); usbnet_suspend() 1790 netif_device_detach (dev->net); usbnet_suspend() 1791 usbnet_terminate_urbs(dev); usbnet_suspend() 1792 __usbnet_status_stop_force(dev); usbnet_suspend() 1798 netif_device_attach (dev->net); usbnet_suspend() 1806 struct usbnet dev = usb_get_intfdata(intf); usbnet_resume() 1811 if (!--dev->suspend_count) { usbnet_resume() 1813 __usbnet_status_start_force(dev, GFP_NOIO); usbnet_resume() 1815 spin_lock_irq(&dev->txq.lock); usbnet_resume() 1816 while ((res = usb_get_from_anchor(&dev->deferred))) { usbnet_resume() 1824 usb_autopm_put_interface_async(dev->intf); usbnet_resume() 1826 dev->net->trans_start = jiffies; usbnet_resume() 1827 __skb_queue_tail(&dev->txq, skb); usbnet_resume() 1832 clear_bit(EVENT_DEV_ASLEEP, &dev->flags); usbnet_resume() 1833 spin_unlock_irq(&dev->txq.lock); usbnet_resume() 1835 if (test_bit(EVENT_DEV_OPEN, &dev->flags)) { usbnet_resume() 1839 if (netif_device_present(dev->net) && usbnet_resume() 1840 !timer_pending(&dev->delay) && usbnet_resume() 1841 !test_bit(EVENT_RX_HALT, &dev->flags)) usbnet_resume() 1842 rx_alloc_submit(dev, GFP_NOIO); usbnet_resume() 1844 if (!(dev->txq.qlen >= TX_QLEN(dev))) usbnet_resume() 1845 netif_tx_wake_all_queues(dev->net); usbnet_resume() 1846 tasklet_schedule (&dev->bh); usbnet_resume() 1850 if (test_and_clear_bit(EVENT_DEVICE_REPORT_IDLE, &dev->flags)) usbnet_resume() 1862 void usbnet_device_suggests_idle(struct usbnet dev) usbnet_device_suggests_idle() 1864 if (!test_and_set_bit(EVENT_DEVICE_REPORT_IDLE, &dev->flags)) { usbnet_device_suggests_idle() 1865 dev->intf->needs_remote_wakeup = 1; usbnet_device_suggests_idle() 1866 usb_autopm_put_interface_async(dev->intf); usbnet_device_suggests_idle() 1874 int usbnet_manage_power(struct usbnet dev, int on) usbnet_manage_power() 1876 dev->intf->needs_remote_wakeup = on; usbnet_manage_power() 1881 void usbnet_link_change(struct usbnet dev, bool link, bool need_reset) usbnet_link_change() 1885 netif_carrier_on(dev->net); usbnet_link_change() 1887 netif_carrier_off(dev->net); usbnet_link_change() 1890 usbnet_defer_kevent(dev, EVENT_LINK_RESET); usbnet_link_change() 1892 usbnet_defer_kevent(dev, EVENT_LINK_CHANGE); 1897 static int __usbnet_read_cmd(struct usbnet dev, u8 cmd, u8 reqtype, __usbnet_read_cmd() 1903 netdev_dbg(dev->net, "usbnet_read_cmd cmd=0x%02x reqtype=%02x" __usbnet_read_cmd() 1913 err = usb_control_msg(dev->udev, usb_rcvctrlpipe(dev->udev, 0), __usbnet_read_cmd() 1923 static int __usbnet_write_cmd(struct usbnet dev, u8 cmd, u8 reqtype, __usbnet_write_cmd() 1930 netdev_dbg(dev->net, "usbnet_write_cmd cmd=0x%02x reqtype=%02x" __usbnet_write_cmd() 1940 err = usb_control_msg(dev->udev, usb_sndctrlpipe(dev->udev, 0), __usbnet_write_cmd() 1953 int usbnet_read_cmd(struct usbnet dev, u8 cmd, u8 reqtype, usbnet_read_cmd() 1958 if (usb_autopm_get_interface(dev->intf) < 0) usbnet_read_cmd() 1960 ret = __usbnet_read_cmd(dev, cmd, reqtype, value, index, usbnet_read_cmd() 1962 usb_autopm_put_interface(dev->intf); usbnet_read_cmd() 1971 int usbnet_write_cmd(struct usbnet dev, u8 cmd, u8 reqtype, usbnet_write_cmd() 1976 if (usb_autopm_get_interface(dev->intf) < 0) usbnet_write_cmd() 1978 ret = __usbnet_write_cmd(dev, cmd, reqtype, value, index, usbnet_write_cmd() 1980 usb_autopm_put_interface(dev->intf); usbnet_write_cmd() 1989 int usbnet_read_cmd_nopm(struct usbnet dev, u8 cmd, u8 reqtype, usbnet_read_cmd_nopm() 1992 return __usbnet_read_cmd(dev, cmd, reqtype, value, index, usbnet_read_cmd_nopm() 2001 int usbnet_write_cmd_nopm(struct usbnet dev, u8 cmd, u8 reqtype, usbnet_write_cmd_nopm() 2005 return __usbnet_write_cmd(dev, cmd, reqtype, value, index, usbnet_write_cmd_nopm() 2016 dev_dbg(&urb->dev->dev, "%s failed with %d", usbnet_async_cmd_cb() 2027 int usbnet_write_cmd_async(struct usbnet dev, u8 cmd, u8 reqtype, usbnet_write_cmd_async() 2035 netdev_dbg(dev->net, "usbnet_write_cmd cmd=0x%02x reqtype=%02x" usbnet_write_cmd_async() 2041 netdev_err(dev->net, "Error allocating URB in" usbnet_write_cmd_async() 2049 netdev_err(dev->net, "Error allocating buffer" usbnet_write_cmd_async() 2065 usb_fill_control_urb(urb, dev->udev, usbnet_write_cmd_async() 2066 usb_sndctrlpipe(dev->udev, 0), usbnet_write_cmd_async() 2073 netdev_err(dev->net, "Error submitting the control" usbnet_write_cmd_async() 378 struct usbnet dev = netdev_priv(net); usbnet_change_mtu() local 420 defer_bh(struct usbnet dev, struct sk_buff skb, struct sk_buff_head list, enum skb_state state) defer_bh() argument 445 usbnet_defer_kevent(struct usbnet dev, int work) usbnet_defer_kevent() argument 461 rx_submit(struct usbnet dev, struct urb urb, gfp_t flags) rx_submit() argument 534 rx_process(struct usbnet dev, struct sk_buff skb) rx_process() argument 568 struct usbnet dev = entry->dev; rx_complete() local 656 usbnet_pause_rx(struct usbnet dev) usbnet_pause_rx() argument 664 usbnet_resume_rx(struct usbnet dev) usbnet_resume_rx() argument 683 usbnet_purge_paused_rxq(struct usbnet dev) usbnet_purge_paused_rxq() argument 693 unlink_urbs(struct usbnet dev, struct sk_buff_head q) unlink_urbs() argument 741 usbnet_unlink_rx_urbs(struct usbnet dev) usbnet_unlink_rx_urbs() argument 753 usbnet_terminate_urbs(struct usbnet dev) usbnet_terminate_urbs() argument 779 struct usbnet dev = netdev_priv(net); usbnet_stop() local 841 struct usbnet dev = netdev_priv(net); usbnet_open() local 930 struct usbnet dev = netdev_priv(net); usbnet_get_settings() local 941 struct usbnet dev = netdev_priv(net); usbnet_set_settings() local 963 struct usbnet dev = netdev_priv(net); usbnet_get_link() local 980 struct usbnet dev = netdev_priv(net); usbnet_nway_reset() local 991 struct usbnet dev = netdev_priv(net); usbnet_get_drvinfo() local 1003 struct usbnet dev = netdev_priv(net); usbnet_get_msglevel() local 1011 struct usbnet dev = netdev_priv(net); usbnet_set_msglevel() local 1031 __handle_link_change(struct usbnet dev) __handle_link_change() argument 1057 struct usbnet dev = netdev_priv(net); usbnet_set_rx_mode() local 1062 __handle_set_rx_mode(struct usbnet dev) __handle_set_rx_mode() argument 1078 struct usbnet dev = usbnet_deferred_kevent() local 1189 struct usbnet dev = entry->dev; tx_complete() local 1237 struct usbnet dev = netdev_priv(net); usbnet_tx_timeout() local 1288 struct usbnet dev = netdev_priv(net); usbnet_start_xmit() local 1425 rx_alloc_submit(struct usbnet dev, gfp_t flags) rx_alloc_submit() argument 1453 struct usbnet dev = (struct usbnet ) param; usbnet_bh() local 1519 struct usbnet dev; usbnet_disconnect() local 1579 struct usbnet dev; usbnet_probe() local 1772 struct usbnet dev = usb_get_intfdata(intf); usbnet_suspend() local 1805 struct usbnet dev = usb_get_intfdata(intf); usbnet_resume() local 1861 usbnet_device_suggests_idle(struct usbnet dev) usbnet_device_suggests_idle() argument 1873 usbnet_manage_power(struct usbnet dev, int on) usbnet_manage_power() argument 1880 usbnet_link_change(struct usbnet dev, bool link, bool need_reset) usbnet_link_change() argument 1896 __usbnet_read_cmd(struct usbnet dev, u8 cmd, u8 reqtype, u16 value, u16 index, void data, u16 size) __usbnet_read_cmd() argument 1922 __usbnet_write_cmd(struct usbnet dev, u8 cmd, u8 reqtype, u16 value, u16 index, const void data, u16 size) __usbnet_write_cmd() argument 1952 usbnet_read_cmd(struct usbnet dev, u8 cmd, u8 reqtype, u16 value, u16 index, void data, u16 size) usbnet_read_cmd() argument 1970 usbnet_write_cmd(struct usbnet dev, u8 cmd, u8 reqtype, u16 value, u16 index, const void data, u16 size) usbnet_write_cmd() argument 1988 usbnet_read_cmd_nopm(struct usbnet dev, u8 cmd, u8 reqtype, u16 value, u16 index, void data, u16 size) usbnet_read_cmd_nopm() argument 2000 usbnet_write_cmd_nopm(struct usbnet dev, u8 cmd, u8 reqtype, u16 value, u16 index, const void data, u16 size) usbnet_write_cmd_nopm() argument 2026 usbnet_write_cmd_async(struct usbnet dev, u8 cmd, u8 reqtype, u16 value, u16 index, const void data, u16 size) usbnet_write_cmd_async() argument
H A D	smsc75xx.c	65 struct usbnet dev; member in struct:smsc75xx_priv 77 struct usbnet dev; member in struct:usb_context 84 static int __must_check __smsc75xx_read_reg(struct usbnet dev, u32 index, __smsc75xx_read_reg() argument 91 BUG_ON(!dev); __smsc75xx_read_reg() 98 ret = fn(dev, USB_VENDOR_REQUEST_READ_REGISTER, USB_DIR_IN __smsc75xx_read_reg() 102 netdev_warn(dev->net, "Failed to read reg index 0x%08x: %d\n", __smsc75xx_read_reg() 111 static int __must_check __smsc75xx_write_reg(struct usbnet dev, u32 index, __smsc75xx_write_reg() argument 118 BUG_ON(!dev); __smsc75xx_write_reg() 128 ret = fn(dev, USB_VENDOR_REQUEST_WRITE_REGISTER, USB_DIR_OUT __smsc75xx_write_reg() 132 netdev_warn(dev->net, "Failed to write reg index 0x%08x: %d\n", __smsc75xx_write_reg() 138 static int __must_check smsc75xx_read_reg_nopm(struct usbnet dev, u32 index, smsc75xx_read_reg_nopm() argument 141 return __smsc75xx_read_reg(dev, index, data, 1); smsc75xx_read_reg_nopm() 144 static int __must_check smsc75xx_write_reg_nopm(struct usbnet dev, u32 index, smsc75xx_write_reg_nopm() argument 147 return __smsc75xx_write_reg(dev, index, data, 1); smsc75xx_write_reg_nopm() 150 static int __must_check smsc75xx_read_reg(struct usbnet dev, u32 index, smsc75xx_read_reg() argument 153 return __smsc75xx_read_reg(dev, index, data, 0); smsc75xx_read_reg() 156 static int __must_check smsc75xx_write_reg(struct usbnet dev, u32 index, smsc75xx_write_reg() argument 159 return __smsc75xx_write_reg(dev, index, data, 0); smsc75xx_write_reg() 164 static __must_check int __smsc75xx_phy_wait_not_busy(struct usbnet dev, __smsc75xx_phy_wait_not_busy() argument 172 ret = __smsc75xx_read_reg(dev, MII_ACCESS, &val, in_pm); __smsc75xx_phy_wait_not_busy() 174 netdev_warn(dev->net, "Error reading MII_ACCESS\n"); __smsc75xx_phy_wait_not_busy() 188 struct usbnet dev = netdev_priv(netdev); __smsc75xx_mdio_read() local 192 mutex_lock(&dev->phy_mutex); __smsc75xx_mdio_read() 195 ret = __smsc75xx_phy_wait_not_busy(dev, in_pm); __smsc75xx_mdio_read() 197 netdev_warn(dev->net, "MII is busy in smsc75xx_mdio_read\n"); __smsc75xx_mdio_read() 202 phy_id &= dev->mii.phy_id_mask; __smsc75xx_mdio_read() 203 idx &= dev->mii.reg_num_mask; __smsc75xx_mdio_read() 207 ret = __smsc75xx_write_reg(dev, MII_ACCESS, addr, in_pm); __smsc75xx_mdio_read() 209 netdev_warn(dev->net, "Error writing MII_ACCESS\n"); __smsc75xx_mdio_read() 213 ret = __smsc75xx_phy_wait_not_busy(dev, in_pm); __smsc75xx_mdio_read() 215 netdev_warn(dev->net, "Timed out reading MII reg %02X\n", idx); __smsc75xx_mdio_read() 219 ret = __smsc75xx_read_reg(dev, MII_DATA, &val, in_pm); __smsc75xx_mdio_read() 221 netdev_warn(dev->net, "Error reading MII_DATA\n"); __smsc75xx_mdio_read() 228 mutex_unlock(&dev->phy_mutex); __smsc75xx_mdio_read() 235 struct usbnet dev = netdev_priv(netdev); __smsc75xx_mdio_write() local 239 mutex_lock(&dev->phy_mutex); __smsc75xx_mdio_write() 242 ret = __smsc75xx_phy_wait_not_busy(dev, in_pm); __smsc75xx_mdio_write() 244 netdev_warn(dev->net, "MII is busy in smsc75xx_mdio_write\n"); __smsc75xx_mdio_write() 249 ret = __smsc75xx_write_reg(dev, MII_DATA, val, in_pm); __smsc75xx_mdio_write() 251 netdev_warn(dev->net, "Error writing MII_DATA\n"); __smsc75xx_mdio_write() 256 phy_id &= dev->mii.phy_id_mask; __smsc75xx_mdio_write() 257 idx &= dev->mii.reg_num_mask; __smsc75xx_mdio_write() 261 ret = __smsc75xx_write_reg(dev, MII_ACCESS, addr, in_pm); __smsc75xx_mdio_write() 263 netdev_warn(dev->net, "Error writing MII_ACCESS\n"); __smsc75xx_mdio_write() 267 ret = __smsc75xx_phy_wait_not_busy(dev, in_pm); __smsc75xx_mdio_write() 269 netdev_warn(dev->net, "Timed out writing MII reg %02X\n", idx); __smsc75xx_mdio_write() 274 mutex_unlock(&dev->phy_mutex); __smsc75xx_mdio_write() 300 static int smsc75xx_wait_eeprom(struct usbnet dev) smsc75xx_wait_eeprom() argument 307 ret = smsc75xx_read_reg(dev, E2P_CMD, &val); smsc75xx_wait_eeprom() 309 netdev_warn(dev->net, "Error reading E2P_CMD\n"); smsc75xx_wait_eeprom() 319 netdev_warn(dev->net, "EEPROM read operation timeout\n"); smsc75xx_wait_eeprom() 326 static int smsc75xx_eeprom_confirm_not_busy(struct usbnet dev) smsc75xx_eeprom_confirm_not_busy() argument 333 ret = smsc75xx_read_reg(dev, E2P_CMD, &val); smsc75xx_eeprom_confirm_not_busy() 335 netdev_warn(dev->net, "Error reading E2P_CMD\n"); smsc75xx_eeprom_confirm_not_busy() 345 netdev_warn(dev->net, "EEPROM is busy\n"); smsc75xx_eeprom_confirm_not_busy() 349 static int smsc75xx_read_eeprom(struct usbnet dev, u32 offset, u32 length, smsc75xx_read_eeprom() argument 355 BUG_ON(!dev); smsc75xx_read_eeprom() 358 ret = smsc75xx_eeprom_confirm_not_busy(dev); smsc75xx_read_eeprom() 364 ret = smsc75xx_write_reg(dev, E2P_CMD, val); smsc75xx_read_eeprom() 366 netdev_warn(dev->net, "Error writing E2P_CMD\n"); smsc75xx_read_eeprom() 370 ret = smsc75xx_wait_eeprom(dev); smsc75xx_read_eeprom() 374 ret = smsc75xx_read_reg(dev, E2P_DATA, &val); smsc75xx_read_eeprom() 376 netdev_warn(dev->net, "Error reading E2P_DATA\n"); smsc75xx_read_eeprom() 387 static int smsc75xx_write_eeprom(struct usbnet dev, u32 offset, u32 length, smsc75xx_write_eeprom() argument 393 BUG_ON(!dev); smsc75xx_write_eeprom() 396 ret = smsc75xx_eeprom_confirm_not_busy(dev); smsc75xx_write_eeprom() 402 ret = smsc75xx_write_reg(dev, E2P_CMD, val); smsc75xx_write_eeprom() 404 netdev_warn(dev->net, "Error writing E2P_CMD\n"); smsc75xx_write_eeprom() 408 ret = smsc75xx_wait_eeprom(dev); smsc75xx_write_eeprom() 416 ret = smsc75xx_write_reg(dev, E2P_DATA, val); smsc75xx_write_eeprom() 418 netdev_warn(dev->net, "Error writing E2P_DATA\n"); smsc75xx_write_eeprom() 424 ret = smsc75xx_write_reg(dev, E2P_CMD, val); smsc75xx_write_eeprom() 426 netdev_warn(dev->net, "Error writing E2P_CMD\n"); smsc75xx_write_eeprom() 430 ret = smsc75xx_wait_eeprom(dev); smsc75xx_write_eeprom() 440 static int smsc75xx_dataport_wait_not_busy(struct usbnet dev) smsc75xx_dataport_wait_not_busy() argument 446 ret = smsc75xx_read_reg(dev, DP_SEL, &dp_sel); smsc75xx_dataport_wait_not_busy() 448 netdev_warn(dev->net, "Error reading DP_SEL\n"); smsc75xx_dataport_wait_not_busy() 458 netdev_warn(dev->net, "smsc75xx_dataport_wait_not_busy timed out\n"); smsc75xx_dataport_wait_not_busy() 463 static int smsc75xx_dataport_write(struct usbnet dev, u32 ram_select, u32 addr, smsc75xx_dataport_write() argument 466 struct smsc75xx_priv pdata = (struct smsc75xx_priv )(dev->data[0]); smsc75xx_dataport_write() 472 ret = smsc75xx_dataport_wait_not_busy(dev); smsc75xx_dataport_write() 474 netdev_warn(dev->net, "smsc75xx_dataport_write busy on entry\n"); smsc75xx_dataport_write() 478 ret = smsc75xx_read_reg(dev, DP_SEL, &dp_sel); smsc75xx_dataport_write() 480 netdev_warn(dev->net, "Error reading DP_SEL\n"); smsc75xx_dataport_write() 486 ret = smsc75xx_write_reg(dev, DP_SEL, dp_sel); smsc75xx_dataport_write() 488 netdev_warn(dev->net, "Error writing DP_SEL\n"); smsc75xx_dataport_write() 493 ret = smsc75xx_write_reg(dev, DP_ADDR, addr + i); smsc75xx_dataport_write() 495 netdev_warn(dev->net, "Error writing DP_ADDR\n"); smsc75xx_dataport_write() 499 ret = smsc75xx_write_reg(dev, DP_DATA, buf[i]); smsc75xx_dataport_write() 501 netdev_warn(dev->net, "Error writing DP_DATA\n"); smsc75xx_dataport_write() 505 ret = smsc75xx_write_reg(dev, DP_CMD, DP_CMD_WRITE); smsc75xx_dataport_write() 507 netdev_warn(dev->net, "Error writing DP_CMD\n"); smsc75xx_dataport_write() 511 ret = smsc75xx_dataport_wait_not_busy(dev); smsc75xx_dataport_write() 513 netdev_warn(dev->net, "smsc75xx_dataport_write timeout\n"); smsc75xx_dataport_write() 533 struct usbnet dev = pdata->dev; smsc75xx_deferred_multicast_write() local 536 netif_dbg(dev, drv, dev->net, "deferred multicast write 0x%08x\n", smsc75xx_deferred_multicast_write() 539 smsc75xx_dataport_write(dev, DP_SEL_VHF, DP_SEL_VHF_VLAN_LEN, smsc75xx_deferred_multicast_write() 542 ret = smsc75xx_write_reg(dev, RFE_CTL, pdata->rfe_ctl); smsc75xx_deferred_multicast_write() 544 netdev_warn(dev->net, "Error writing RFE_CRL\n"); smsc75xx_deferred_multicast_write() 549 struct usbnet dev = netdev_priv(netdev); smsc75xx_set_multicast() local 550 struct smsc75xx_priv pdata = (struct smsc75xx_priv )(dev->data[0]); smsc75xx_set_multicast() 563 if (dev->net->flags & IFF_PROMISC) { smsc75xx_set_multicast() 564 netif_dbg(dev, drv, dev->net, "promiscuous mode enabled\n"); smsc75xx_set_multicast() 566 } else if (dev->net->flags & IFF_ALLMULTI) { smsc75xx_set_multicast() 567 netif_dbg(dev, drv, dev->net, "receive all multicast enabled\n"); smsc75xx_set_multicast() 569 } else if (!netdev_mc_empty(dev->net)) { smsc75xx_set_multicast() 572 netif_dbg(dev, drv, dev->net, "receive multicast hash filter\n"); smsc75xx_set_multicast() 582 netif_dbg(dev, drv, dev->net, "receive own packets only\n"); 592 static int smsc75xx_update_flowcontrol(struct usbnet dev, u8 duplex, smsc75xx_update_flowcontrol() argument 610 netif_dbg(dev, link, dev->net, "rx pause %s, tx pause %s\n", smsc75xx_update_flowcontrol() 614 netif_dbg(dev, link, dev->net, "half duplex\n"); smsc75xx_update_flowcontrol() 617 ret = smsc75xx_write_reg(dev, FLOW, flow); smsc75xx_update_flowcontrol() 619 netdev_warn(dev->net, "Error writing FLOW\n"); smsc75xx_update_flowcontrol() 623 ret = smsc75xx_write_reg(dev, FCT_FLOW, fct_flow); smsc75xx_update_flowcontrol() 625 netdev_warn(dev->net, "Error writing FCT_FLOW\n"); smsc75xx_update_flowcontrol() 632 static int smsc75xx_link_reset(struct usbnet dev) smsc75xx_link_reset() argument 634 struct mii_if_info mii = &dev->mii; smsc75xx_link_reset() 640 smsc75xx_mdio_write(dev->net, mii->phy_id, PHY_INT_SRC, smsc75xx_link_reset() 643 ret = smsc75xx_write_reg(dev, INT_STS, INT_STS_CLEAR_ALL); smsc75xx_link_reset() 645 netdev_warn(dev->net, "Error writing INT_STS\n"); smsc75xx_link_reset() 650 mii_ethtool_gset(&dev->mii, &ecmd); smsc75xx_link_reset() 651 lcladv = smsc75xx_mdio_read(dev->net, mii->phy_id, MII_ADVERTISE); smsc75xx_link_reset() 652 rmtadv = smsc75xx_mdio_read(dev->net, mii->phy_id, MII_LPA); smsc75xx_link_reset() 654 netif_dbg(dev, link, dev->net, "speed: %u duplex: %d lcladv: %04x rmtadv: %04x\n", smsc75xx_link_reset() 657 return smsc75xx_update_flowcontrol(dev, ecmd.duplex, lcladv, rmtadv); smsc75xx_link_reset() 660 static void smsc75xx_status(struct usbnet dev, struct urb urb) smsc75xx_status() argument 665 netdev_warn(dev->net, "unexpected urb length %d\n", smsc75xx_status() 673 netif_dbg(dev, link, dev->net, "intdata: 0x%08X\n", intdata); smsc75xx_status() 676 usbnet_defer_kevent(dev, EVENT_LINK_RESET); smsc75xx_status() 678 netdev_warn(dev->net, "unexpected interrupt, intdata=0x%08X\n", smsc75xx_status() 690 struct usbnet dev = netdev_priv(netdev); smsc75xx_ethtool_get_eeprom() local 694 return smsc75xx_read_eeprom(dev, ee->offset, ee->len, data); smsc75xx_ethtool_get_eeprom() 700 struct usbnet dev = netdev_priv(netdev); smsc75xx_ethtool_set_eeprom() local 703 netdev_warn(dev->net, "EEPROM: magic value mismatch: 0x%x\n", smsc75xx_ethtool_set_eeprom() 708 return smsc75xx_write_eeprom(dev, ee->offset, ee->len, data); smsc75xx_ethtool_set_eeprom() 714 struct usbnet dev = netdev_priv(net); smsc75xx_ethtool_get_wol() local 715 struct smsc75xx_priv pdata = (struct smsc75xx_priv )(dev->data[0]); smsc75xx_ethtool_get_wol() 724 struct usbnet dev = netdev_priv(net); smsc75xx_ethtool_set_wol() local 725 struct smsc75xx_priv pdata = (struct smsc75xx_priv )(dev->data[0]); smsc75xx_ethtool_set_wol() 730 ret = device_set_wakeup_enable(&dev->udev->dev, pdata->wolopts); smsc75xx_ethtool_set_wol() 732 netdev_warn(dev->net, "device_set_wakeup_enable error %d\n", ret); smsc75xx_ethtool_set_wol() 754 struct usbnet dev = netdev_priv(netdev); smsc75xx_ioctl() local 759 return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL); smsc75xx_ioctl() 762 static void smsc75xx_init_mac_address(struct usbnet dev) smsc75xx_init_mac_address() argument 765 if (smsc75xx_read_eeprom(dev, EEPROM_MAC_OFFSET, ETH_ALEN, smsc75xx_init_mac_address() 766 dev->net->dev_addr) == 0) { smsc75xx_init_mac_address() 767 if (is_valid_ether_addr(dev->net->dev_addr)) { smsc75xx_init_mac_address() 769 netif_dbg(dev, ifup, dev->net, smsc75xx_init_mac_address() 776 eth_hw_addr_random(dev->net); smsc75xx_init_mac_address() 777 netif_dbg(dev, ifup, dev->net, "MAC address set to eth_random_addr\n"); smsc75xx_init_mac_address() 780 static int smsc75xx_set_mac_address(struct usbnet dev) smsc75xx_set_mac_address() argument 782 u32 addr_lo = dev->net->dev_addr[0] \| dev->net->dev_addr[1] << 8 \| smsc75xx_set_mac_address() 783 dev->net->dev_addr[2] << 16 \| dev->net->dev_addr[3] << 24; smsc75xx_set_mac_address() 784 u32 addr_hi = dev->net->dev_addr[4] \| dev->net->dev_addr[5] << 8; smsc75xx_set_mac_address() 786 int ret = smsc75xx_write_reg(dev, RX_ADDRH, addr_hi); smsc75xx_set_mac_address() 788 netdev_warn(dev->net, "Failed to write RX_ADDRH: %d\n", ret); smsc75xx_set_mac_address() 792 ret = smsc75xx_write_reg(dev, RX_ADDRL, addr_lo); smsc75xx_set_mac_address() 794 netdev_warn(dev->net, "Failed to write RX_ADDRL: %d\n", ret); smsc75xx_set_mac_address() 799 ret = smsc75xx_write_reg(dev, ADDR_FILTX, addr_hi); smsc75xx_set_mac_address() 801 netdev_warn(dev->net, "Failed to write ADDR_FILTX: %d\n", ret); smsc75xx_set_mac_address() 805 ret = smsc75xx_write_reg(dev, ADDR_FILTX + 4, addr_lo); smsc75xx_set_mac_address() 807 netdev_warn(dev->net, "Failed to write ADDR_FILTX+4: %d\n", ret); smsc75xx_set_mac_address() 812 static int smsc75xx_phy_initialize(struct usbnet dev) smsc75xx_phy_initialize() argument 817 dev->mii.dev = dev->net; smsc75xx_phy_initialize() 818 dev->mii.mdio_read = smsc75xx_mdio_read; smsc75xx_phy_initialize() 819 dev->mii.mdio_write = smsc75xx_mdio_write; smsc75xx_phy_initialize() 820 dev->mii.phy_id_mask = 0x1f; smsc75xx_phy_initialize() 821 dev->mii.reg_num_mask = 0x1f; smsc75xx_phy_initialize() 822 dev->mii.supports_gmii = 1; smsc75xx_phy_initialize() 823 dev->mii.phy_id = SMSC75XX_INTERNAL_PHY_ID; smsc75xx_phy_initialize() 826 smsc75xx_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET); smsc75xx_phy_initialize() 830 bmcr = smsc75xx_mdio_read(dev->net, dev->mii.phy_id, MII_BMCR); smsc75xx_phy_initialize() 832 netdev_warn(dev->net, "Error reading MII_BMCR\n"); smsc75xx_phy_initialize() 839 netdev_warn(dev->net, "timeout on PHY Reset\n"); smsc75xx_phy_initialize() 843 smsc75xx_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE, smsc75xx_phy_initialize() 846 smsc75xx_mdio_write(dev->net, dev->mii.phy_id, MII_CTRL1000, smsc75xx_phy_initialize() 850 ret = smsc75xx_mdio_read(dev->net, dev->mii.phy_id, PHY_INT_SRC); smsc75xx_phy_initialize() 852 netdev_warn(dev->net, "Error reading PHY_INT_SRC\n"); smsc75xx_phy_initialize() 856 smsc75xx_mdio_write(dev->net, dev->mii.phy_id, PHY_INT_SRC, 0xffff); smsc75xx_phy_initialize() 858 smsc75xx_mdio_write(dev->net, dev->mii.phy_id, PHY_INT_MASK, smsc75xx_phy_initialize() 860 mii_nway_restart(&dev->mii); smsc75xx_phy_initialize() 862 netif_dbg(dev, ifup, dev->net, "phy initialised successfully\n"); smsc75xx_phy_initialize() 866 static int smsc75xx_set_rx_max_frame_length(struct usbnet dev, int size) smsc75xx_set_rx_max_frame_length() argument 872 ret = smsc75xx_read_reg(dev, MAC_RX, &buf); smsc75xx_set_rx_max_frame_length() 874 netdev_warn(dev->net, "Failed to read MAC_RX: %d\n", ret); smsc75xx_set_rx_max_frame_length() 882 ret = smsc75xx_write_reg(dev, MAC_RX, buf); smsc75xx_set_rx_max_frame_length() 884 netdev_warn(dev->net, "Failed to write MAC_RX: %d\n", ret); smsc75xx_set_rx_max_frame_length() 893 ret = smsc75xx_write_reg(dev, MAC_RX, buf); smsc75xx_set_rx_max_frame_length() 895 netdev_warn(dev->net, "Failed to write MAC_RX: %d\n", ret); smsc75xx_set_rx_max_frame_length() 901 ret = smsc75xx_write_reg(dev, MAC_RX, buf); smsc75xx_set_rx_max_frame_length() 903 netdev_warn(dev->net, "Failed to write MAC_RX: %d\n", ret); smsc75xx_set_rx_max_frame_length() 913 struct usbnet dev = netdev_priv(netdev); smsc75xx_change_mtu() local 919 ret = smsc75xx_set_rx_max_frame_length(dev, new_mtu + ETH_HLEN); smsc75xx_change_mtu() 921 netdev_warn(dev->net, "Failed to set mac rx frame length\n"); smsc75xx_change_mtu() 932 struct usbnet dev = netdev_priv(netdev); smsc75xx_set_features() local 933 struct smsc75xx_priv pdata = (struct smsc75xx_priv )(dev->data[0]); smsc75xx_set_features() 947 ret = smsc75xx_write_reg(dev, RFE_CTL, pdata->rfe_ctl); smsc75xx_set_features() 949 netdev_warn(dev->net, "Error writing RFE_CTL\n"); smsc75xx_set_features() 954 static int smsc75xx_wait_ready(struct usbnet dev, int in_pm) smsc75xx_wait_ready() argument 962 ret = __smsc75xx_read_reg(dev, PMT_CTL, &buf, in_pm); smsc75xx_wait_ready() 965 netdev_warn(dev->net, "Failed to read PMT_CTL: %d\n", ret); smsc75xx_wait_ready() 976 netdev_warn(dev->net, "timeout waiting for device ready\n"); smsc75xx_wait_ready() 980 static int smsc75xx_reset(struct usbnet dev) smsc75xx_reset() argument 982 struct smsc75xx_priv pdata = (struct smsc75xx_priv )(dev->data[0]); smsc75xx_reset() 986 netif_dbg(dev, ifup, dev->net, "entering smsc75xx_reset\n"); smsc75xx_reset() 988 ret = smsc75xx_wait_ready(dev, 0); smsc75xx_reset() 990 netdev_warn(dev->net, "device not ready in smsc75xx_reset\n"); smsc75xx_reset() 994 ret = smsc75xx_read_reg(dev, HW_CFG, &buf); smsc75xx_reset() 996 netdev_warn(dev->net, "Failed to read HW_CFG: %d\n", ret); smsc75xx_reset() 1002 ret = smsc75xx_write_reg(dev, HW_CFG, buf); smsc75xx_reset() 1004 netdev_warn(dev->net, "Failed to write HW_CFG: %d\n", ret); smsc75xx_reset() 1011 ret = smsc75xx_read_reg(dev, HW_CFG, &buf); smsc75xx_reset() 1013 netdev_warn(dev->net, "Failed to read HW_CFG: %d\n", ret); smsc75xx_reset() 1020 netdev_warn(dev->net, "timeout on completion of Lite Reset\n"); smsc75xx_reset() 1024 netif_dbg(dev, ifup, dev->net, "Lite reset complete, resetting PHY\n"); smsc75xx_reset() 1026 ret = smsc75xx_read_reg(dev, PMT_CTL, &buf); smsc75xx_reset() 1028 netdev_warn(dev->net, "Failed to read PMT_CTL: %d\n", ret); smsc75xx_reset() 1034 ret = smsc75xx_write_reg(dev, PMT_CTL, buf); smsc75xx_reset() 1036 netdev_warn(dev->net, "Failed to write PMT_CTL: %d\n", ret); smsc75xx_reset() 1043 ret = smsc75xx_read_reg(dev, PMT_CTL, &buf); smsc75xx_reset() 1045 netdev_warn(dev->net, "Failed to read PMT_CTL: %d\n", ret); smsc75xx_reset() 1052 netdev_warn(dev->net, "timeout waiting for PHY Reset\n"); smsc75xx_reset() 1056 netif_dbg(dev, ifup, dev->net, "PHY reset complete\n"); smsc75xx_reset() 1058 ret = smsc75xx_set_mac_address(dev); smsc75xx_reset() 1060 netdev_warn(dev->net, "Failed to set mac address\n"); smsc75xx_reset() 1064 netif_dbg(dev, ifup, dev->net, "MAC Address: %pM\n", smsc75xx_reset() 1065 dev->net->dev_addr); smsc75xx_reset() 1067 ret = smsc75xx_read_reg(dev, HW_CFG, &buf); smsc75xx_reset() 1069 netdev_warn(dev->net, "Failed to read HW_CFG: %d\n", ret); smsc75xx_reset() 1073 netif_dbg(dev, ifup, dev->net, "Read Value from HW_CFG : 0x%08x\n", smsc75xx_reset() 1078 ret = smsc75xx_write_reg(dev, HW_CFG, buf); smsc75xx_reset() 1080 netdev_warn(dev->net, "Failed to write HW_CFG: %d\n", ret); smsc75xx_reset() 1084 ret = smsc75xx_read_reg(dev, HW_CFG, &buf); smsc75xx_reset() 1086 netdev_warn(dev->net, "Failed to read HW_CFG: %d\n", ret); smsc75xx_reset() 1090 netif_dbg(dev, ifup, dev->net, "Read Value from HW_CFG after writing HW_CFG_BIR: 0x%08x\n", smsc75xx_reset() 1095 dev->rx_urb_size = MAX_SINGLE_PACKET_SIZE; smsc75xx_reset() 1096 } else if (dev->udev->speed == USB_SPEED_HIGH) { smsc75xx_reset() 1098 dev->rx_urb_size = DEFAULT_HS_BURST_CAP_SIZE; smsc75xx_reset() 1101 dev->rx_urb_size = DEFAULT_FS_BURST_CAP_SIZE; smsc75xx_reset() 1104 netif_dbg(dev, ifup, dev->net, "rx_urb_size=%ld\n", smsc75xx_reset() 1105 (ulong)dev->rx_urb_size); smsc75xx_reset() 1107 ret = smsc75xx_write_reg(dev, BURST_CAP, buf); smsc75xx_reset() 1109 netdev_warn(dev->net, "Failed to write BURST_CAP: %d\n", ret); smsc75xx_reset() 1113 ret = smsc75xx_read_reg(dev, BURST_CAP, &buf); smsc75xx_reset() 1115 netdev_warn(dev->net, "Failed to read BURST_CAP: %d\n", ret); smsc75xx_reset() 1119 netif_dbg(dev, ifup, dev->net, smsc75xx_reset() 1122 ret = smsc75xx_write_reg(dev, BULK_IN_DLY, DEFAULT_BULK_IN_DELAY); smsc75xx_reset() 1124 netdev_warn(dev->net, "Failed to write BULK_IN_DLY: %d\n", ret); smsc75xx_reset() 1128 ret = smsc75xx_read_reg(dev, BULK_IN_DLY, &buf); smsc75xx_reset() 1130 netdev_warn(dev->net, "Failed to read BULK_IN_DLY: %d\n", ret); smsc75xx_reset() 1134 netif_dbg(dev, ifup, dev->net, smsc75xx_reset() 1138 ret = smsc75xx_read_reg(dev, HW_CFG, &buf); smsc75xx_reset() 1140 netdev_warn(dev->net, "Failed to read HW_CFG: %d\n", ret); smsc75xx_reset() 1144 netif_dbg(dev, ifup, dev->net, "HW_CFG: 0x%08x\n", buf); smsc75xx_reset() 1148 ret = smsc75xx_write_reg(dev, HW_CFG, buf); smsc75xx_reset() 1150 netdev_warn(dev->net, "Failed to write HW_CFG: %d\n", ret); smsc75xx_reset() 1154 ret = smsc75xx_read_reg(dev, HW_CFG, &buf); smsc75xx_reset() 1156 netdev_warn(dev->net, "Failed to read HW_CFG: %d\n", ret); smsc75xx_reset() 1160 netif_dbg(dev, ifup, dev->net, "HW_CFG: 0x%08x\n", buf); smsc75xx_reset() 1165 ret = smsc75xx_write_reg(dev, FCT_RX_FIFO_END, buf); smsc75xx_reset() 1167 netdev_warn(dev->net, "Failed to write FCT_RX_FIFO_END: %d\n", ret); smsc75xx_reset() 1171 netif_dbg(dev, ifup, dev->net, "FCT_RX_FIFO_END set to 0x%08x\n", buf); smsc75xx_reset() 1174 ret = smsc75xx_write_reg(dev, FCT_TX_FIFO_END, buf); smsc75xx_reset() 1176 netdev_warn(dev->net, "Failed to write FCT_TX_FIFO_END: %d\n", ret); smsc75xx_reset() 1180 netif_dbg(dev, ifup, dev->net, "FCT_TX_FIFO_END set to 0x%08x\n", buf); smsc75xx_reset() 1182 ret = smsc75xx_write_reg(dev, INT_STS, INT_STS_CLEAR_ALL); smsc75xx_reset() 1184 netdev_warn(dev->net, "Failed to write INT_STS: %d\n", ret); smsc75xx_reset() 1188 ret = smsc75xx_read_reg(dev, ID_REV, &buf); smsc75xx_reset() 1190 netdev_warn(dev->net, "Failed to read ID_REV: %d\n", ret); smsc75xx_reset() 1194 netif_dbg(dev, ifup, dev->net, "ID_REV = 0x%08x\n", buf); smsc75xx_reset() 1196 ret = smsc75xx_read_reg(dev, E2P_CMD, &buf); smsc75xx_reset() 1198 netdev_warn(dev->net, "Failed to read E2P_CMD: %d\n", ret); smsc75xx_reset() 1204 ret = smsc75xx_read_reg(dev, LED_GPIO_CFG, &buf); smsc75xx_reset() 1206 netdev_warn(dev->net, "Failed to read LED_GPIO_CFG: %d\n", ret); smsc75xx_reset() 1213 ret = smsc75xx_write_reg(dev, LED_GPIO_CFG, buf); smsc75xx_reset() 1215 netdev_warn(dev->net, "Failed to write LED_GPIO_CFG: %d\n", ret); smsc75xx_reset() 1220 ret = smsc75xx_write_reg(dev, FLOW, 0); smsc75xx_reset() 1222 netdev_warn(dev->net, "Failed to write FLOW: %d\n", ret); smsc75xx_reset() 1226 ret = smsc75xx_write_reg(dev, FCT_FLOW, 0); smsc75xx_reset() 1228 netdev_warn(dev->net, "Failed to write FCT_FLOW: %d\n", ret); smsc75xx_reset() 1233 ret = smsc75xx_read_reg(dev, RFE_CTL, &pdata->rfe_ctl); smsc75xx_reset() 1235 netdev_warn(dev->net, "Failed to read RFE_CTL: %d\n", ret); smsc75xx_reset() 1241 ret = smsc75xx_write_reg(dev, RFE_CTL, pdata->rfe_ctl); smsc75xx_reset() 1243 netdev_warn(dev->net, "Failed to write RFE_CTL: %d\n", ret); smsc75xx_reset() 1247 ret = smsc75xx_read_reg(dev, RFE_CTL, &pdata->rfe_ctl); smsc75xx_reset() 1249 netdev_warn(dev->net, "Failed to read RFE_CTL: %d\n", ret); smsc75xx_reset() 1253 netif_dbg(dev, ifup, dev->net, "RFE_CTL set to 0x%08x\n", smsc75xx_reset() 1257 smsc75xx_set_features(dev->net, dev->net->features); smsc75xx_reset() 1259 smsc75xx_set_multicast(dev->net); smsc75xx_reset() 1261 ret = smsc75xx_phy_initialize(dev); smsc75xx_reset() 1263 netdev_warn(dev->net, "Failed to initialize PHY: %d\n", ret); smsc75xx_reset() 1267 ret = smsc75xx_read_reg(dev, INT_EP_CTL, &buf); smsc75xx_reset() 1269 netdev_warn(dev->net, "Failed to read INT_EP_CTL: %d\n", ret); smsc75xx_reset() 1276 ret = smsc75xx_write_reg(dev, INT_EP_CTL, buf); smsc75xx_reset() 1278 netdev_warn(dev->net, "Failed to write INT_EP_CTL: %d\n", ret); smsc75xx_reset() 1283 ret = smsc75xx_read_reg(dev, MAC_CR, &buf); smsc75xx_reset() 1285 netdev_warn(dev->net, "Failed to read MAC_CR: %d\n", ret); smsc75xx_reset() 1290 ret = smsc75xx_write_reg(dev, MAC_CR, buf); smsc75xx_reset() 1292 netdev_warn(dev->net, "Failed to write MAC_CR: %d\n", ret); smsc75xx_reset() 1296 ret = smsc75xx_read_reg(dev, MAC_TX, &buf); smsc75xx_reset() 1298 netdev_warn(dev->net, "Failed to read MAC_TX: %d\n", ret); smsc75xx_reset() 1304 ret = smsc75xx_write_reg(dev, MAC_TX, buf); smsc75xx_reset() 1306 netdev_warn(dev->net, "Failed to write MAC_TX: %d\n", ret); smsc75xx_reset() 1310 netif_dbg(dev, ifup, dev->net, "MAC_TX set to 0x%08x\n", buf); smsc75xx_reset() 1312 ret = smsc75xx_read_reg(dev, FCT_TX_CTL, &buf); smsc75xx_reset() 1314 netdev_warn(dev->net, "Failed to read FCT_TX_CTL: %d\n", ret); smsc75xx_reset() 1320 ret = smsc75xx_write_reg(dev, FCT_TX_CTL, buf); smsc75xx_reset() 1322 netdev_warn(dev->net, "Failed to write FCT_TX_CTL: %d\n", ret); smsc75xx_reset() 1326 netif_dbg(dev, ifup, dev->net, "FCT_TX_CTL set to 0x%08x\n", buf); smsc75xx_reset() 1328 ret = smsc75xx_set_rx_max_frame_length(dev, dev->net->mtu + ETH_HLEN); smsc75xx_reset() 1330 netdev_warn(dev->net, "Failed to set max rx frame length\n"); smsc75xx_reset() 1334 ret = smsc75xx_read_reg(dev, MAC_RX, &buf); smsc75xx_reset() 1336 netdev_warn(dev->net, "Failed to read MAC_RX: %d\n", ret); smsc75xx_reset() 1342 ret = smsc75xx_write_reg(dev, MAC_RX, buf); smsc75xx_reset() 1344 netdev_warn(dev->net, "Failed to write MAC_RX: %d\n", ret); smsc75xx_reset() 1348 netif_dbg(dev, ifup, dev->net, "MAC_RX set to 0x%08x\n", buf); smsc75xx_reset() 1350 ret = smsc75xx_read_reg(dev, FCT_RX_CTL, &buf); smsc75xx_reset() 1352 netdev_warn(dev->net, "Failed to read FCT_RX_CTL: %d\n", ret); smsc75xx_reset() 1358 ret = smsc75xx_write_reg(dev, FCT_RX_CTL, buf); smsc75xx_reset() 1360 netdev_warn(dev->net, "Failed to write FCT_RX_CTL: %d\n", ret); smsc75xx_reset() 1364 netif_dbg(dev, ifup, dev->net, "FCT_RX_CTL set to 0x%08x\n", buf); smsc75xx_reset() 1366 netif_dbg(dev, ifup, dev->net, "smsc75xx_reset, return 0\n"); smsc75xx_reset() 1383 static int smsc75xx_bind(struct usbnet dev, struct usb_interface intf) smsc75xx_bind() argument 1390 ret = usbnet_get_endpoints(dev, intf); smsc75xx_bind() 1392 netdev_warn(dev->net, "usbnet_get_endpoints failed: %d\n", ret); smsc75xx_bind() 1396 dev->data[0] = (unsigned long)kzalloc(sizeof(struct smsc75xx_priv), smsc75xx_bind() 1399 pdata = (struct smsc75xx_priv )(dev->data[0]); smsc75xx_bind() 1403 pdata->dev = dev; smsc75xx_bind() 1411 dev->net->features \|= NETIF_F_IP_CSUM \| NETIF_F_IPV6_CSUM; smsc75xx_bind() 1414 dev->net->features \|= NETIF_F_RXCSUM; smsc75xx_bind() 1416 dev->net->hw_features = NETIF_F_IP_CSUM \| NETIF_F_IPV6_CSUM \| smsc75xx_bind() 1419 ret = smsc75xx_wait_ready(dev, 0); smsc75xx_bind() 1421 netdev_warn(dev->net, "device not ready in smsc75xx_bind\n"); smsc75xx_bind() 1425 smsc75xx_init_mac_address(dev); smsc75xx_bind() 1428 ret = smsc75xx_reset(dev); smsc75xx_bind() 1430 netdev_warn(dev->net, "smsc75xx_reset error %d\n", ret); smsc75xx_bind() 1434 dev->net->netdev_ops = &smsc75xx_netdev_ops; smsc75xx_bind() 1435 dev->net->ethtool_ops = &smsc75xx_ethtool_ops; smsc75xx_bind() 1436 dev->net->flags \|= IFF_MULTICAST; smsc75xx_bind() 1437 dev->net->hard_header_len += SMSC75XX_TX_OVERHEAD; smsc75xx_bind() 1438 dev->hard_mtu = dev->net->mtu + dev->net->hard_header_len; smsc75xx_bind() 1442 static void smsc75xx_unbind(struct usbnet dev, struct usb_interface intf) smsc75xx_unbind() argument 1444 struct smsc75xx_priv pdata = (struct smsc75xx_priv )(dev->data[0]); smsc75xx_unbind() 1446 netif_dbg(dev, ifdown, dev->net, "free pdata\n"); smsc75xx_unbind() 1449 dev->data[0] = 0; smsc75xx_unbind() 1458 static int smsc75xx_write_wuff(struct usbnet dev, int filter, u32 wuf_cfg, smsc75xx_write_wuff() argument 1465 ret = smsc75xx_write_reg(dev, cfg_base, wuf_cfg); smsc75xx_write_wuff() 1467 netdev_warn(dev->net, "Error writing WUF_CFGX\n"); smsc75xx_write_wuff() 1471 ret = smsc75xx_write_reg(dev, mask_base, wuf_mask1); smsc75xx_write_wuff() 1473 netdev_warn(dev->net, "Error writing WUF_MASKX\n"); smsc75xx_write_wuff() 1477 ret = smsc75xx_write_reg(dev, mask_base + 4, 0); smsc75xx_write_wuff() 1479 netdev_warn(dev->net, "Error writing WUF_MASKX\n"); smsc75xx_write_wuff() 1483 ret = smsc75xx_write_reg(dev, mask_base + 8, 0); smsc75xx_write_wuff() 1485 netdev_warn(dev->net, "Error writing WUF_MASKX\n"); smsc75xx_write_wuff() 1489 ret = smsc75xx_write_reg(dev, mask_base + 12, 0); smsc75xx_write_wuff() 1491 netdev_warn(dev->net, "Error writing WUF_MASKX\n"); smsc75xx_write_wuff() 1498 static int smsc75xx_enter_suspend0(struct usbnet dev) smsc75xx_enter_suspend0() argument 1500 struct smsc75xx_priv pdata = (struct smsc75xx_priv )(dev->data[0]); smsc75xx_enter_suspend0() 1504 ret = smsc75xx_read_reg_nopm(dev, PMT_CTL, &val); smsc75xx_enter_suspend0() 1506 netdev_warn(dev->net, "Error reading PMT_CTL\n"); smsc75xx_enter_suspend0() 1513 ret = smsc75xx_write_reg_nopm(dev, PMT_CTL, val); smsc75xx_enter_suspend0() 1515 netdev_warn(dev->net, "Error writing PMT_CTL\n"); smsc75xx_enter_suspend0() 1524 static int smsc75xx_enter_suspend1(struct usbnet dev) smsc75xx_enter_suspend1() argument 1526 struct smsc75xx_priv pdata = (struct smsc75xx_priv )(dev->data[0]); smsc75xx_enter_suspend1() 1530 ret = smsc75xx_read_reg_nopm(dev, PMT_CTL, &val); smsc75xx_enter_suspend1() 1532 netdev_warn(dev->net, "Error reading PMT_CTL\n"); smsc75xx_enter_suspend1() 1539 ret = smsc75xx_write_reg_nopm(dev, PMT_CTL, val); smsc75xx_enter_suspend1() 1541 netdev_warn(dev->net, "Error writing PMT_CTL\n"); smsc75xx_enter_suspend1() 1549 ret = smsc75xx_write_reg_nopm(dev, PMT_CTL, val); smsc75xx_enter_suspend1() 1551 netdev_warn(dev->net, "Error writing PMT_CTL\n"); smsc75xx_enter_suspend1() 1560 static int smsc75xx_enter_suspend2(struct usbnet dev) smsc75xx_enter_suspend2() argument 1562 struct smsc75xx_priv pdata = (struct smsc75xx_priv )(dev->data[0]); smsc75xx_enter_suspend2() 1566 ret = smsc75xx_read_reg_nopm(dev, PMT_CTL, &val); smsc75xx_enter_suspend2() 1568 netdev_warn(dev->net, "Error reading PMT_CTL\n"); smsc75xx_enter_suspend2() 1575 ret = smsc75xx_write_reg_nopm(dev, PMT_CTL, val); smsc75xx_enter_suspend2() 1577 netdev_warn(dev->net, "Error writing PMT_CTL\n"); smsc75xx_enter_suspend2() 1586 static int smsc75xx_enter_suspend3(struct usbnet dev) smsc75xx_enter_suspend3() argument 1588 struct smsc75xx_priv pdata = (struct smsc75xx_priv )(dev->data[0]); smsc75xx_enter_suspend3() 1592 ret = smsc75xx_read_reg_nopm(dev, FCT_RX_CTL, &val); smsc75xx_enter_suspend3() 1594 netdev_warn(dev->net, "Error reading FCT_RX_CTL\n"); smsc75xx_enter_suspend3() 1599 netdev_dbg(dev->net, "rx fifo not empty in autosuspend\n"); smsc75xx_enter_suspend3() 1603 ret = smsc75xx_read_reg_nopm(dev, PMT_CTL, &val); smsc75xx_enter_suspend3() 1605 netdev_warn(dev->net, "Error reading PMT_CTL\n"); smsc75xx_enter_suspend3() 1612 ret = smsc75xx_write_reg_nopm(dev, PMT_CTL, val); smsc75xx_enter_suspend3() 1614 netdev_warn(dev->net, "Error writing PMT_CTL\n"); smsc75xx_enter_suspend3() 1622 ret = smsc75xx_write_reg_nopm(dev, PMT_CTL, val); smsc75xx_enter_suspend3() 1624 netdev_warn(dev->net, "Error writing PMT_CTL\n"); smsc75xx_enter_suspend3() 1633 static int smsc75xx_enable_phy_wakeup_interrupts(struct usbnet dev, u16 mask) smsc75xx_enable_phy_wakeup_interrupts() argument 1635 struct mii_if_info mii = &dev->mii; smsc75xx_enable_phy_wakeup_interrupts() 1638 netdev_dbg(dev->net, "enabling PHY wakeup interrupts\n"); smsc75xx_enable_phy_wakeup_interrupts() 1641 ret = smsc75xx_mdio_read_nopm(dev->net, mii->phy_id, PHY_INT_SRC); smsc75xx_enable_phy_wakeup_interrupts() 1643 netdev_warn(dev->net, "Error reading PHY_INT_SRC\n"); smsc75xx_enable_phy_wakeup_interrupts() 1648 ret = smsc75xx_mdio_read_nopm(dev->net, mii->phy_id, PHY_INT_MASK); smsc75xx_enable_phy_wakeup_interrupts() 1650 netdev_warn(dev->net, "Error reading PHY_INT_MASK\n"); smsc75xx_enable_phy_wakeup_interrupts() 1656 smsc75xx_mdio_write_nopm(dev->net, mii->phy_id, PHY_INT_MASK, ret); smsc75xx_enable_phy_wakeup_interrupts() 1661 static int smsc75xx_link_ok_nopm(struct usbnet dev) smsc75xx_link_ok_nopm() argument 1663 struct mii_if_info mii = &dev->mii; smsc75xx_link_ok_nopm() 1667 ret = smsc75xx_mdio_read_nopm(dev->net, mii->phy_id, MII_BMSR); smsc75xx_link_ok_nopm() 1669 netdev_warn(dev->net, "Error reading MII_BMSR\n"); smsc75xx_link_ok_nopm() 1673 ret = smsc75xx_mdio_read_nopm(dev->net, mii->phy_id, MII_BMSR); smsc75xx_link_ok_nopm() 1675 netdev_warn(dev->net, "Error reading MII_BMSR\n"); smsc75xx_link_ok_nopm() 1682 static int smsc75xx_autosuspend(struct usbnet dev, u32 link_up) smsc75xx_autosuspend() argument 1686 if (!netif_running(dev->net)) { smsc75xx_autosuspend() 1688 netdev_dbg(dev->net, "autosuspend entering SUSPEND2\n"); smsc75xx_autosuspend() 1689 return smsc75xx_enter_suspend2(dev); smsc75xx_autosuspend() 1694 netdev_dbg(dev->net, "autosuspend entering SUSPEND1\n"); smsc75xx_autosuspend() 1697 ret = smsc75xx_enable_phy_wakeup_interrupts(dev, smsc75xx_autosuspend() 1700 netdev_warn(dev->net, "error enabling PHY wakeup ints\n"); smsc75xx_autosuspend() 1704 netdev_info(dev->net, "entering SUSPEND1 mode\n"); smsc75xx_autosuspend() 1705 return smsc75xx_enter_suspend1(dev); smsc75xx_autosuspend() 1709 ret = smsc75xx_enable_phy_wakeup_interrupts(dev, smsc75xx_autosuspend() 1712 netdev_warn(dev->net, "error enabling PHY wakeup ints\n"); smsc75xx_autosuspend() 1716 netdev_dbg(dev->net, "autosuspend entering SUSPEND3\n"); smsc75xx_autosuspend() 1717 return smsc75xx_enter_suspend3(dev); smsc75xx_autosuspend() 1722 struct usbnet dev = usb_get_intfdata(intf); smsc75xx_suspend() local 1723 struct smsc75xx_priv pdata = (struct smsc75xx_priv )(dev->data[0]); smsc75xx_suspend() 1729 netdev_warn(dev->net, "usbnet_suspend error\n"); smsc75xx_suspend() 1734 netdev_warn(dev->net, "error during last resume\n"); smsc75xx_suspend() 1739 link_up = smsc75xx_link_ok_nopm(dev); smsc75xx_suspend() 1742 ret = smsc75xx_autosuspend(dev, link_up); smsc75xx_suspend() 1752 netdev_info(dev->net, "entering SUSPEND2 mode\n"); smsc75xx_suspend() 1755 ret = smsc75xx_read_reg_nopm(dev, WUCSR, &val); smsc75xx_suspend() 1757 netdev_warn(dev->net, "Error reading WUCSR\n"); smsc75xx_suspend() 1763 ret = smsc75xx_write_reg_nopm(dev, WUCSR, val); smsc75xx_suspend() 1765 netdev_warn(dev->net, "Error writing WUCSR\n"); smsc75xx_suspend() 1769 ret = smsc75xx_read_reg_nopm(dev, PMT_CTL, &val); smsc75xx_suspend() 1771 netdev_warn(dev->net, "Error reading PMT_CTL\n"); smsc75xx_suspend() 1777 ret = smsc75xx_write_reg_nopm(dev, PMT_CTL, val); smsc75xx_suspend() 1779 netdev_warn(dev->net, "Error writing PMT_CTL\n"); smsc75xx_suspend() 1783 ret = smsc75xx_enter_suspend2(dev); smsc75xx_suspend() 1788 ret = smsc75xx_enable_phy_wakeup_interrupts(dev, smsc75xx_suspend() 1791 netdev_warn(dev->net, "error enabling PHY wakeup ints\n"); smsc75xx_suspend() 1799 struct mii_if_info mii = &dev->mii; smsc75xx_suspend() 1800 netdev_info(dev->net, "entering SUSPEND1 mode\n"); smsc75xx_suspend() 1803 ret = smsc75xx_mdio_read_nopm(dev->net, mii->phy_id, smsc75xx_suspend() 1806 netdev_warn(dev->net, "Error reading PHY_MODE_CTRL_STS\n"); smsc75xx_suspend() 1812 smsc75xx_mdio_write_nopm(dev->net, mii->phy_id, smsc75xx_suspend() 1816 ret = smsc75xx_enter_suspend1(dev); smsc75xx_suspend() 1826 ret = smsc75xx_write_reg_nopm(dev, WUF_CFGX + i * 4, 0); smsc75xx_suspend() 1828 netdev_warn(dev->net, "Error writing WUF_CFGX\n"); smsc75xx_suspend() 1835 netdev_info(dev->net, "enabling multicast detection\n"); smsc75xx_suspend() 1839 ret = smsc75xx_write_wuff(dev, filter++, val, 0x0007); smsc75xx_suspend() 1841 netdev_warn(dev->net, "Error writing wakeup filter\n"); smsc75xx_suspend() 1848 netdev_info(dev->net, "enabling ARP detection\n"); smsc75xx_suspend() 1852 ret = smsc75xx_write_wuff(dev, filter++, val, 0x0003); smsc75xx_suspend() 1854 netdev_warn(dev->net, "Error writing wakeup filter\n"); smsc75xx_suspend() 1860 ret = smsc75xx_read_reg_nopm(dev, WUCSR, &val); smsc75xx_suspend() 1862 netdev_warn(dev->net, "Error reading WUCSR\n"); smsc75xx_suspend() 1868 ret = smsc75xx_write_reg_nopm(dev, WUCSR, val); smsc75xx_suspend() 1870 netdev_warn(dev->net, "Error writing WUCSR\n"); smsc75xx_suspend() 1874 netdev_info(dev->net, "enabling packet match detection\n"); smsc75xx_suspend() 1875 ret = smsc75xx_read_reg_nopm(dev, WUCSR, &val); smsc75xx_suspend() 1877 netdev_warn(dev->net, "Error reading WUCSR\n"); smsc75xx_suspend() 1883 ret = smsc75xx_write_reg_nopm(dev, WUCSR, val); smsc75xx_suspend() 1885 netdev_warn(dev->net, "Error writing WUCSR\n"); smsc75xx_suspend() 1889 netdev_info(dev->net, "disabling packet match detection\n"); smsc75xx_suspend() 1890 ret = smsc75xx_read_reg_nopm(dev, WUCSR, &val); smsc75xx_suspend() 1892 netdev_warn(dev->net, "Error reading WUCSR\n"); smsc75xx_suspend() 1898 ret = smsc75xx_write_reg_nopm(dev, WUCSR, val); smsc75xx_suspend() 1900 netdev_warn(dev->net, "Error writing WUCSR\n"); smsc75xx_suspend() 1906 ret = smsc75xx_read_reg_nopm(dev, WUCSR, &val); smsc75xx_suspend() 1908 netdev_warn(dev->net, "Error reading WUCSR\n"); smsc75xx_suspend() 1914 ret = smsc75xx_write_reg_nopm(dev, WUCSR, val); smsc75xx_suspend() 1916 netdev_warn(dev->net, "Error writing WUCSR\n"); smsc75xx_suspend() 1921 netdev_info(dev->net, "enabling PHY wakeup\n"); smsc75xx_suspend() 1923 ret = smsc75xx_read_reg_nopm(dev, PMT_CTL, &val); smsc75xx_suspend() 1925 netdev_warn(dev->net, "Error reading PMT_CTL\n"); smsc75xx_suspend() 1933 ret = smsc75xx_write_reg_nopm(dev, PMT_CTL, val); smsc75xx_suspend() 1935 netdev_warn(dev->net, "Error writing PMT_CTL\n"); smsc75xx_suspend() 1941 netdev_info(dev->net, "enabling magic packet wakeup\n"); smsc75xx_suspend() 1942 ret = smsc75xx_read_reg_nopm(dev, WUCSR, &val); smsc75xx_suspend() 1944 netdev_warn(dev->net, "Error reading WUCSR\n"); smsc75xx_suspend() 1951 ret = smsc75xx_write_reg_nopm(dev, WUCSR, val); smsc75xx_suspend() 1953 netdev_warn(dev->net, "Error writing WUCSR\n"); smsc75xx_suspend() 1959 netdev_info(dev->net, "enabling broadcast detection\n"); smsc75xx_suspend() 1960 ret = smsc75xx_read_reg_nopm(dev, WUCSR, &val); smsc75xx_suspend() 1962 netdev_warn(dev->net, "Error reading WUCSR\n"); smsc75xx_suspend() 1968 ret = smsc75xx_write_reg_nopm(dev, WUCSR, val); smsc75xx_suspend() 1970 netdev_warn(dev->net, "Error writing WUCSR\n"); smsc75xx_suspend() 1976 netdev_info(dev->net, "enabling unicast detection\n"); smsc75xx_suspend() 1977 ret = smsc75xx_read_reg_nopm(dev, WUCSR, &val); smsc75xx_suspend() 1979 netdev_warn(dev->net, "Error reading WUCSR\n"); smsc75xx_suspend() 1985 ret = smsc75xx_write_reg_nopm(dev, WUCSR, val); smsc75xx_suspend() 1987 netdev_warn(dev->net, "Error writing WUCSR\n"); smsc75xx_suspend() 1993 ret = smsc75xx_read_reg_nopm(dev, MAC_RX, &val); smsc75xx_suspend() 1995 netdev_warn(dev->net, "Failed to read MAC_RX: %d\n", ret); smsc75xx_suspend() 2001 ret = smsc75xx_write_reg_nopm(dev, MAC_RX, val); smsc75xx_suspend() 2003 netdev_warn(dev->net, "Failed to write MAC_RX: %d\n", ret); smsc75xx_suspend() 2008 netdev_info(dev->net, "entering SUSPEND0 mode\n"); smsc75xx_suspend() 2009 ret = smsc75xx_enter_suspend0(dev); smsc75xx_suspend() 2023 struct usbnet dev = usb_get_intfdata(intf); smsc75xx_resume() local 2024 struct smsc75xx_priv pdata = (struct smsc75xx_priv )(dev->data[0]); smsc75xx_resume() 2029 netdev_dbg(dev->net, "resume suspend_flags=0x%02x\n", suspend_flags); smsc75xx_resume() 2036 ret = smsc75xx_read_reg_nopm(dev, WUCSR, &val); smsc75xx_resume() 2038 netdev_warn(dev->net, "Error reading WUCSR\n"); smsc75xx_resume() 2045 ret = smsc75xx_write_reg_nopm(dev, WUCSR, val); smsc75xx_resume() 2047 netdev_warn(dev->net, "Error writing WUCSR\n"); smsc75xx_resume() 2052 ret = smsc75xx_read_reg_nopm(dev, PMT_CTL, &val); smsc75xx_resume() 2054 netdev_warn(dev->net, "Error reading PMT_CTL\n"); smsc75xx_resume() 2061 ret = smsc75xx_write_reg_nopm(dev, PMT_CTL, val); smsc75xx_resume() 2063 netdev_warn(dev->net, "Error writing PMT_CTL\n"); smsc75xx_resume() 2069 netdev_info(dev->net, "resuming from SUSPEND2\n"); smsc75xx_resume() 2071 ret = smsc75xx_read_reg_nopm(dev, PMT_CTL, &val); smsc75xx_resume() 2073 netdev_warn(dev->net, "Error reading PMT_CTL\n"); smsc75xx_resume() 2079 ret = smsc75xx_write_reg_nopm(dev, PMT_CTL, val); smsc75xx_resume() 2081 netdev_warn(dev->net, "Error writing PMT_CTL\n"); smsc75xx_resume() 2086 ret = smsc75xx_wait_ready(dev, 1); smsc75xx_resume() 2088 netdev_warn(dev->net, "device not ready in smsc75xx_resume\n"); smsc75xx_resume() 2095 static void smsc75xx_rx_csum_offload(struct usbnet dev, struct sk_buff skb, smsc75xx_rx_csum_offload() argument 2098 if (!(dev->net->features & NETIF_F_RXCSUM) \|\| smsc75xx_rx_csum_offload() 2107 static int smsc75xx_rx_fixup(struct usbnet dev, struct sk_buff skb) smsc75xx_rx_fixup() argument 2110 if (skb->len < dev->net->hard_header_len) smsc75xx_rx_fixup() 2133 netif_dbg(dev, rx_err, dev->net, smsc75xx_rx_fixup() 2135 dev->net->stats.rx_errors++; smsc75xx_rx_fixup() 2136 dev->net->stats.rx_dropped++; smsc75xx_rx_fixup() 2139 dev->net->stats.rx_crc_errors++; smsc75xx_rx_fixup() 2141 dev->net->stats.rx_frame_errors++; smsc75xx_rx_fixup() 2145 netif_dbg(dev, rx_err, dev->net, smsc75xx_rx_fixup() 2153 smsc75xx_rx_csum_offload(dev, skb, rx_cmd_a, smsc75xx_rx_fixup() 2164 netdev_warn(dev->net, "Error allocating skb\n"); smsc75xx_rx_fixup() 2172 smsc75xx_rx_csum_offload(dev, ax_skb, rx_cmd_a, smsc75xx_rx_fixup() 2178 usbnet_skb_return(dev, ax_skb); smsc75xx_rx_fixup() 2189 netdev_warn(dev->net, "invalid rx length<0 %d\n", skb->len); smsc75xx_rx_fixup() 2196 static struct sk_buff smsc75xx_tx_fixup(struct usbnet dev, smsc75xx_tx_fixup() argument 2235 static int smsc75xx_manage_power(struct usbnet dev, int on) smsc75xx_manage_power() argument 2237 dev->intf->needs_remote_wakeup = on; smsc75xx_manage_power()
H A D	smsc95xx.c	77 static int __must_check __smsc95xx_read_reg(struct usbnet dev, u32 index, __smsc95xx_read_reg() argument 84 BUG_ON(!dev); __smsc95xx_read_reg() 91 ret = fn(dev, USB_VENDOR_REQUEST_READ_REGISTER, USB_DIR_IN __smsc95xx_read_reg() 95 netdev_warn(dev->net, "Failed to read reg index 0x%08x: %d\n", __smsc95xx_read_reg() 104 static int __must_check __smsc95xx_write_reg(struct usbnet dev, u32 index, __smsc95xx_write_reg() argument 111 BUG_ON(!dev); __smsc95xx_write_reg() 121 ret = fn(dev, USB_VENDOR_REQUEST_WRITE_REGISTER, USB_DIR_OUT __smsc95xx_write_reg() 125 netdev_warn(dev->net, "Failed to write reg index 0x%08x: %d\n", __smsc95xx_write_reg() 131 static int __must_check smsc95xx_read_reg_nopm(struct usbnet dev, u32 index, smsc95xx_read_reg_nopm() argument 134 return __smsc95xx_read_reg(dev, index, data, 1); smsc95xx_read_reg_nopm() 137 static int __must_check smsc95xx_write_reg_nopm(struct usbnet dev, u32 index, smsc95xx_write_reg_nopm() argument 140 return __smsc95xx_write_reg(dev, index, data, 1); smsc95xx_write_reg_nopm() 143 static int __must_check smsc95xx_read_reg(struct usbnet dev, u32 index, smsc95xx_read_reg() argument 146 return __smsc95xx_read_reg(dev, index, data, 0); smsc95xx_read_reg() 149 static int __must_check smsc95xx_write_reg(struct usbnet dev, u32 index, smsc95xx_write_reg() argument 152 return __smsc95xx_write_reg(dev, index, data, 0); smsc95xx_write_reg() 157 static int __must_check __smsc95xx_phy_wait_not_busy(struct usbnet dev, __smsc95xx_phy_wait_not_busy() argument 165 ret = __smsc95xx_read_reg(dev, MII_ADDR, &val, in_pm); __smsc95xx_phy_wait_not_busy() 167 netdev_warn(dev->net, "Error reading MII_ACCESS\n"); __smsc95xx_phy_wait_not_busy() 181 struct usbnet dev = netdev_priv(netdev); __smsc95xx_mdio_read() local 185 mutex_lock(&dev->phy_mutex); __smsc95xx_mdio_read() 188 ret = __smsc95xx_phy_wait_not_busy(dev, in_pm); __smsc95xx_mdio_read() 190 netdev_warn(dev->net, "MII is busy in smsc95xx_mdio_read\n"); __smsc95xx_mdio_read() 195 phy_id &= dev->mii.phy_id_mask; __smsc95xx_mdio_read() 196 idx &= dev->mii.reg_num_mask; __smsc95xx_mdio_read() 198 ret = __smsc95xx_write_reg(dev, MII_ADDR, addr, in_pm); __smsc95xx_mdio_read() 200 netdev_warn(dev->net, "Error writing MII_ADDR\n"); __smsc95xx_mdio_read() 204 ret = __smsc95xx_phy_wait_not_busy(dev, in_pm); __smsc95xx_mdio_read() 206 netdev_warn(dev->net, "Timed out reading MII reg %02X\n", idx); __smsc95xx_mdio_read() 210 ret = __smsc95xx_read_reg(dev, MII_DATA, &val, in_pm); __smsc95xx_mdio_read() 212 netdev_warn(dev->net, "Error reading MII_DATA\n"); __smsc95xx_mdio_read() 219 mutex_unlock(&dev->phy_mutex); __smsc95xx_mdio_read() 226 struct usbnet dev = netdev_priv(netdev); __smsc95xx_mdio_write() local 230 mutex_lock(&dev->phy_mutex); __smsc95xx_mdio_write() 233 ret = __smsc95xx_phy_wait_not_busy(dev, in_pm); __smsc95xx_mdio_write() 235 netdev_warn(dev->net, "MII is busy in smsc95xx_mdio_write\n"); __smsc95xx_mdio_write() 240 ret = __smsc95xx_write_reg(dev, MII_DATA, val, in_pm); __smsc95xx_mdio_write() 242 netdev_warn(dev->net, "Error writing MII_DATA\n"); __smsc95xx_mdio_write() 247 phy_id &= dev->mii.phy_id_mask; __smsc95xx_mdio_write() 248 idx &= dev->mii.reg_num_mask; __smsc95xx_mdio_write() 250 ret = __smsc95xx_write_reg(dev, MII_ADDR, addr, in_pm); __smsc95xx_mdio_write() 252 netdev_warn(dev->net, "Error writing MII_ADDR\n"); __smsc95xx_mdio_write() 256 ret = __smsc95xx_phy_wait_not_busy(dev, in_pm); __smsc95xx_mdio_write() 258 netdev_warn(dev->net, "Timed out writing MII reg %02X\n", idx); __smsc95xx_mdio_write() 263 mutex_unlock(&dev->phy_mutex); __smsc95xx_mdio_write() 289 static int __must_check smsc95xx_wait_eeprom(struct usbnet dev) smsc95xx_wait_eeprom() argument 296 ret = smsc95xx_read_reg(dev, E2P_CMD, &val); smsc95xx_wait_eeprom() 298 netdev_warn(dev->net, "Error reading E2P_CMD\n"); smsc95xx_wait_eeprom() 308 netdev_warn(dev->net, "EEPROM read operation timeout\n"); smsc95xx_wait_eeprom() 315 static int __must_check smsc95xx_eeprom_confirm_not_busy(struct usbnet dev) smsc95xx_eeprom_confirm_not_busy() argument 322 ret = smsc95xx_read_reg(dev, E2P_CMD, &val); smsc95xx_eeprom_confirm_not_busy() 324 netdev_warn(dev->net, "Error reading E2P_CMD\n"); smsc95xx_eeprom_confirm_not_busy() 334 netdev_warn(dev->net, "EEPROM is busy\n"); smsc95xx_eeprom_confirm_not_busy() 338 static int smsc95xx_read_eeprom(struct usbnet dev, u32 offset, u32 length, smsc95xx_read_eeprom() argument 344 BUG_ON(!dev); smsc95xx_read_eeprom() 347 ret = smsc95xx_eeprom_confirm_not_busy(dev); smsc95xx_read_eeprom() 353 ret = smsc95xx_write_reg(dev, E2P_CMD, val); smsc95xx_read_eeprom() 355 netdev_warn(dev->net, "Error writing E2P_CMD\n"); smsc95xx_read_eeprom() 359 ret = smsc95xx_wait_eeprom(dev); smsc95xx_read_eeprom() 363 ret = smsc95xx_read_reg(dev, E2P_DATA, &val); smsc95xx_read_eeprom() 365 netdev_warn(dev->net, "Error reading E2P_DATA\n"); smsc95xx_read_eeprom() 376 static int smsc95xx_write_eeprom(struct usbnet dev, u32 offset, u32 length, smsc95xx_write_eeprom() argument 382 BUG_ON(!dev); smsc95xx_write_eeprom() 385 ret = smsc95xx_eeprom_confirm_not_busy(dev); smsc95xx_write_eeprom() 391 ret = smsc95xx_write_reg(dev, E2P_CMD, val); smsc95xx_write_eeprom() 393 netdev_warn(dev->net, "Error writing E2P_DATA\n"); smsc95xx_write_eeprom() 397 ret = smsc95xx_wait_eeprom(dev); smsc95xx_write_eeprom() 405 ret = smsc95xx_write_reg(dev, E2P_DATA, val); smsc95xx_write_eeprom() 407 netdev_warn(dev->net, "Error writing E2P_DATA\n"); smsc95xx_write_eeprom() 413 ret = smsc95xx_write_reg(dev, E2P_CMD, val); smsc95xx_write_eeprom() 415 netdev_warn(dev->net, "Error writing E2P_CMD\n"); smsc95xx_write_eeprom() 419 ret = smsc95xx_wait_eeprom(dev); smsc95xx_write_eeprom() 429 static int __must_check smsc95xx_write_reg_async(struct usbnet dev, u16 index, smsc95xx_write_reg_async() argument 439 ret = usbnet_write_cmd_async(dev, USB_VENDOR_REQUEST_WRITE_REGISTER, smsc95xx_write_reg_async() 444 netdev_warn(dev->net, "Error write async cmd, sts=%d\n", smsc95xx_write_reg_async() 459 struct usbnet dev = netdev_priv(netdev); smsc95xx_set_multicast() local 460 struct smsc95xx_priv pdata = (struct smsc95xx_priv )(dev->data[0]); smsc95xx_set_multicast() 469 if (dev->net->flags & IFF_PROMISC) { smsc95xx_set_multicast() 470 netif_dbg(dev, drv, dev->net, "promiscuous mode enabled\n"); smsc95xx_set_multicast() 473 } else if (dev->net->flags & IFF_ALLMULTI) { smsc95xx_set_multicast() 474 netif_dbg(dev, drv, dev->net, "receive all multicast enabled\n"); smsc95xx_set_multicast() 477 } else if (!netdev_mc_empty(dev->net)) { smsc95xx_set_multicast() 492 netif_dbg(dev, drv, dev->net, "HASHH=0x%08X, HASHL=0x%08X\n", 495 netif_dbg(dev, drv, dev->net, "receive own packets only\n"); 503 ret = smsc95xx_write_reg_async(dev, HASHH, pdata->hash_hi); 505 netdev_warn(dev->net, "failed to initiate async write to HASHH\n"); 507 ret = smsc95xx_write_reg_async(dev, HASHL, pdata->hash_lo); 509 netdev_warn(dev->net, "failed to initiate async write to HASHL\n"); 511 ret = smsc95xx_write_reg_async(dev, MAC_CR, pdata->mac_cr); 513 netdev_warn(dev->net, "failed to initiate async write to MAC_CR\n"); 516 static int smsc95xx_phy_update_flowcontrol(struct usbnet dev, u8 duplex, smsc95xx_phy_update_flowcontrol() argument 521 int ret = smsc95xx_read_reg(dev, AFC_CFG, &afc_cfg); smsc95xx_phy_update_flowcontrol() 538 netif_dbg(dev, link, dev->net, "rx pause %s, tx pause %s\n", smsc95xx_phy_update_flowcontrol() 542 netif_dbg(dev, link, dev->net, "half duplex\n"); smsc95xx_phy_update_flowcontrol() 547 ret = smsc95xx_write_reg(dev, FLOW, flow); smsc95xx_phy_update_flowcontrol() 551 return smsc95xx_write_reg(dev, AFC_CFG, afc_cfg); smsc95xx_phy_update_flowcontrol() 554 static int smsc95xx_link_reset(struct usbnet dev) smsc95xx_link_reset() argument 556 struct smsc95xx_priv pdata = (struct smsc95xx_priv )(dev->data[0]); smsc95xx_link_reset() 557 struct mii_if_info mii = &dev->mii; smsc95xx_link_reset() 564 ret = smsc95xx_mdio_read(dev->net, mii->phy_id, PHY_INT_SRC); smsc95xx_link_reset() 568 ret = smsc95xx_write_reg(dev, INT_STS, INT_STS_CLEAR_ALL_); smsc95xx_link_reset() 573 mii_ethtool_gset(&dev->mii, &ecmd); smsc95xx_link_reset() 574 lcladv = smsc95xx_mdio_read(dev->net, mii->phy_id, MII_ADVERTISE); smsc95xx_link_reset() 575 rmtadv = smsc95xx_mdio_read(dev->net, mii->phy_id, MII_LPA); smsc95xx_link_reset() 577 netif_dbg(dev, link, dev->net, smsc95xx_link_reset() 591 ret = smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr); smsc95xx_link_reset() 595 ret = smsc95xx_phy_update_flowcontrol(dev, ecmd.duplex, lcladv, rmtadv); smsc95xx_link_reset() 597 netdev_warn(dev->net, "Error updating PHY flow control\n"); smsc95xx_link_reset() 602 static void smsc95xx_status(struct usbnet dev, struct urb urb) smsc95xx_status() argument 607 netdev_warn(dev->net, "unexpected urb length %d\n", smsc95xx_status() 615 netif_dbg(dev, link, dev->net, "intdata: 0x%08X\n", intdata); smsc95xx_status() 618 usbnet_defer_kevent(dev, EVENT_LINK_RESET); smsc95xx_status() 620 netdev_warn(dev->net, "unexpected interrupt, intdata=0x%08X\n", smsc95xx_status() 628 struct usbnet dev = netdev_priv(netdev); smsc95xx_set_features() local 632 ret = smsc95xx_read_reg(dev, COE_CR, &read_buf); smsc95xx_set_features() 646 ret = smsc95xx_write_reg(dev, COE_CR, read_buf); smsc95xx_set_features() 650 netif_dbg(dev, hw, dev->net, "COE_CR = 0x%08x\n", read_buf); smsc95xx_set_features() 662 struct usbnet dev = netdev_priv(netdev); smsc95xx_ethtool_get_eeprom() local 666 return smsc95xx_read_eeprom(dev, ee->offset, ee->len, data); smsc95xx_ethtool_get_eeprom() 672 struct usbnet dev = netdev_priv(netdev); smsc95xx_ethtool_set_eeprom() local 675 netdev_warn(dev->net, "EEPROM: magic value mismatch, magic = 0x%x\n", smsc95xx_ethtool_set_eeprom() 680 return smsc95xx_write_eeprom(dev, ee->offset, ee->len, data); smsc95xx_ethtool_set_eeprom() 693 struct usbnet dev = netdev_priv(netdev); smsc95xx_ethtool_getregs() local 698 retval = smsc95xx_read_reg(dev, ID_REV, &regs->version); smsc95xx_ethtool_getregs() 705 retval = smsc95xx_read_reg(dev, i, &data[j]); smsc95xx_ethtool_getregs() 716 struct usbnet dev = netdev_priv(net); smsc95xx_ethtool_get_wol() local 717 struct smsc95xx_priv pdata = (struct smsc95xx_priv )(dev->data[0]); smsc95xx_ethtool_get_wol() 726 struct usbnet dev = netdev_priv(net); smsc95xx_ethtool_set_wol() local 727 struct smsc95xx_priv pdata = (struct smsc95xx_priv )(dev->data[0]); smsc95xx_ethtool_set_wol() 732 ret = device_set_wakeup_enable(&dev->udev->dev, pdata->wolopts); smsc95xx_ethtool_set_wol() 734 netdev_warn(dev->net, "device_set_wakeup_enable error %d\n", ret); smsc95xx_ethtool_set_wol() 758 struct usbnet dev = netdev_priv(netdev); smsc95xx_ioctl() local 763 return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL); smsc95xx_ioctl() 766 static void smsc95xx_init_mac_address(struct usbnet dev) smsc95xx_init_mac_address() argument 769 if (smsc95xx_read_eeprom(dev, EEPROM_MAC_OFFSET, ETH_ALEN, smsc95xx_init_mac_address() 770 dev->net->dev_addr) == 0) { smsc95xx_init_mac_address() 771 if (is_valid_ether_addr(dev->net->dev_addr)) { smsc95xx_init_mac_address() 773 netif_dbg(dev, ifup, dev->net, "MAC address read from EEPROM\n"); smsc95xx_init_mac_address() 779 eth_hw_addr_random(dev->net); smsc95xx_init_mac_address() 780 netif_dbg(dev, ifup, dev->net, "MAC address set to eth_random_addr\n"); smsc95xx_init_mac_address() 783 static int smsc95xx_set_mac_address(struct usbnet dev) smsc95xx_set_mac_address() argument 785 u32 addr_lo = dev->net->dev_addr[0] \| dev->net->dev_addr[1] << 8 \| smsc95xx_set_mac_address() 786 dev->net->dev_addr[2] << 16 \| dev->net->dev_addr[3] << 24; smsc95xx_set_mac_address() 787 u32 addr_hi = dev->net->dev_addr[4] \| dev->net->dev_addr[5] << 8; smsc95xx_set_mac_address() 790 ret = smsc95xx_write_reg(dev, ADDRL, addr_lo); smsc95xx_set_mac_address() 794 return smsc95xx_write_reg(dev, ADDRH, addr_hi); smsc95xx_set_mac_address() 798 static int smsc95xx_start_tx_path(struct usbnet dev) smsc95xx_start_tx_path() argument 800 struct smsc95xx_priv pdata = (struct smsc95xx_priv )(dev->data[0]); smsc95xx_start_tx_path() 809 ret = smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr); smsc95xx_start_tx_path() 814 return smsc95xx_write_reg(dev, TX_CFG, TX_CFG_ON_); smsc95xx_start_tx_path() 818 static int smsc95xx_start_rx_path(struct usbnet dev, int in_pm) smsc95xx_start_rx_path() argument 820 struct smsc95xx_priv pdata = (struct smsc95xx_priv )(dev->data[0]); smsc95xx_start_rx_path() 827 return __smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr, in_pm); smsc95xx_start_rx_path() 830 static int smsc95xx_phy_initialize(struct usbnet dev) smsc95xx_phy_initialize() argument 835 dev->mii.dev = dev->net; smsc95xx_phy_initialize() 836 dev->mii.mdio_read = smsc95xx_mdio_read; smsc95xx_phy_initialize() 837 dev->mii.mdio_write = smsc95xx_mdio_write; smsc95xx_phy_initialize() 838 dev->mii.phy_id_mask = 0x1f; smsc95xx_phy_initialize() 839 dev->mii.reg_num_mask = 0x1f; smsc95xx_phy_initialize() 840 dev->mii.phy_id = SMSC95XX_INTERNAL_PHY_ID; smsc95xx_phy_initialize() 843 smsc95xx_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET); smsc95xx_phy_initialize() 847 bmcr = smsc95xx_mdio_read(dev->net, dev->mii.phy_id, MII_BMCR); smsc95xx_phy_initialize() 852 netdev_warn(dev->net, "timeout on PHY Reset"); smsc95xx_phy_initialize() 856 smsc95xx_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE, smsc95xx_phy_initialize() 861 ret = smsc95xx_mdio_read(dev->net, dev->mii.phy_id, PHY_INT_SRC); smsc95xx_phy_initialize() 863 netdev_warn(dev->net, "Failed to read PHY_INT_SRC during init\n"); smsc95xx_phy_initialize() 867 smsc95xx_mdio_write(dev->net, dev->mii.phy_id, PHY_INT_MASK, smsc95xx_phy_initialize() 869 mii_nway_restart(&dev->mii); smsc95xx_phy_initialize() 871 netif_dbg(dev, ifup, dev->net, "phy initialised successfully\n"); smsc95xx_phy_initialize() 875 static int smsc95xx_reset(struct usbnet dev) smsc95xx_reset() argument 877 struct smsc95xx_priv pdata = (struct smsc95xx_priv )(dev->data[0]); smsc95xx_reset() 881 netif_dbg(dev, ifup, dev->net, "entering smsc95xx_reset\n"); smsc95xx_reset() 883 ret = smsc95xx_write_reg(dev, HW_CFG, HW_CFG_LRST_); smsc95xx_reset() 890 ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf); smsc95xx_reset() 897 netdev_warn(dev->net, "timeout waiting for completion of Lite Reset\n"); smsc95xx_reset() 901 ret = smsc95xx_write_reg(dev, PM_CTRL, PM_CTL_PHY_RST_); smsc95xx_reset() 908 ret = smsc95xx_read_reg(dev, PM_CTRL, &read_buf); smsc95xx_reset() 915 netdev_warn(dev->net, "timeout waiting for PHY Reset\n"); smsc95xx_reset() 919 ret = smsc95xx_set_mac_address(dev); smsc95xx_reset() 923 netif_dbg(dev, ifup, dev->net, "MAC Address: %pM\n", smsc95xx_reset() 924 dev->net->dev_addr); smsc95xx_reset() 926 ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf); smsc95xx_reset() 930 netif_dbg(dev, ifup, dev->net, "Read Value from HW_CFG : 0x%08x\n", smsc95xx_reset() 935 ret = smsc95xx_write_reg(dev, HW_CFG, read_buf); smsc95xx_reset() 939 ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf); smsc95xx_reset() 943 netif_dbg(dev, ifup, dev->net, smsc95xx_reset() 949 dev->rx_urb_size = MAX_SINGLE_PACKET_SIZE; smsc95xx_reset() 950 } else if (dev->udev->speed == USB_SPEED_HIGH) { smsc95xx_reset() 952 dev->rx_urb_size = DEFAULT_HS_BURST_CAP_SIZE; smsc95xx_reset() 955 dev->rx_urb_size = DEFAULT_FS_BURST_CAP_SIZE; smsc95xx_reset() 958 netif_dbg(dev, ifup, dev->net, "rx_urb_size=%ld\n", smsc95xx_reset() 959 (ulong)dev->rx_urb_size); smsc95xx_reset() 961 ret = smsc95xx_write_reg(dev, BURST_CAP, burst_cap); smsc95xx_reset() 965 ret = smsc95xx_read_reg(dev, BURST_CAP, &read_buf); smsc95xx_reset() 969 netif_dbg(dev, ifup, dev->net, smsc95xx_reset() 973 ret = smsc95xx_write_reg(dev, BULK_IN_DLY, DEFAULT_BULK_IN_DELAY); smsc95xx_reset() 977 ret = smsc95xx_read_reg(dev, BULK_IN_DLY, &read_buf); smsc95xx_reset() 981 netif_dbg(dev, ifup, dev->net, smsc95xx_reset() 985 ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf); smsc95xx_reset() 989 netif_dbg(dev, ifup, dev->net, "Read Value from HW_CFG: 0x%08x\n", smsc95xx_reset() 1000 ret = smsc95xx_write_reg(dev, HW_CFG, read_buf); smsc95xx_reset() 1004 ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf); smsc95xx_reset() 1008 netif_dbg(dev, ifup, dev->net, smsc95xx_reset() 1011 ret = smsc95xx_write_reg(dev, INT_STS, INT_STS_CLEAR_ALL_); smsc95xx_reset() 1015 ret = smsc95xx_read_reg(dev, ID_REV, &read_buf); smsc95xx_reset() 1018 netif_dbg(dev, ifup, dev->net, "ID_REV = 0x%08x\n", read_buf); smsc95xx_reset() 1023 ret = smsc95xx_write_reg(dev, LED_GPIO_CFG, write_buf); smsc95xx_reset() 1028 ret = smsc95xx_write_reg(dev, FLOW, 0); smsc95xx_reset() 1032 ret = smsc95xx_write_reg(dev, AFC_CFG, AFC_CFG_DEFAULT); smsc95xx_reset() 1037 ret = smsc95xx_read_reg(dev, MAC_CR, &pdata->mac_cr); smsc95xx_reset() 1043 ret = smsc95xx_write_reg(dev, VLAN1, (u32)ETH_P_8021Q); smsc95xx_reset() 1048 ret = smsc95xx_set_features(dev->net, dev->net->features); smsc95xx_reset() 1050 netdev_warn(dev->net, "Failed to set checksum offload features\n"); smsc95xx_reset() 1054 smsc95xx_set_multicast(dev->net); smsc95xx_reset() 1056 ret = smsc95xx_phy_initialize(dev); smsc95xx_reset() 1058 netdev_warn(dev->net, "Failed to init PHY\n"); smsc95xx_reset() 1062 ret = smsc95xx_read_reg(dev, INT_EP_CTL, &read_buf); smsc95xx_reset() 1069 ret = smsc95xx_write_reg(dev, INT_EP_CTL, read_buf); smsc95xx_reset() 1073 ret = smsc95xx_start_tx_path(dev); smsc95xx_reset() 1075 netdev_warn(dev->net, "Failed to start TX path\n"); smsc95xx_reset() 1079 ret = smsc95xx_start_rx_path(dev, 0); smsc95xx_reset() 1081 netdev_warn(dev->net, "Failed to start RX path\n"); smsc95xx_reset() 1085 netif_dbg(dev, ifup, dev->net, "smsc95xx_reset, return 0\n"); smsc95xx_reset() 1102 static int smsc95xx_bind(struct usbnet dev, struct usb_interface intf) smsc95xx_bind() argument 1110 ret = usbnet_get_endpoints(dev, intf); smsc95xx_bind() 1112 netdev_warn(dev->net, "usbnet_get_endpoints failed: %d\n", ret); smsc95xx_bind() 1116 dev->data[0] = (unsigned long)kzalloc(sizeof(struct smsc95xx_priv), smsc95xx_bind() 1119 pdata = (struct smsc95xx_priv )(dev->data[0]); smsc95xx_bind() 1126 dev->net->features \|= NETIF_F_HW_CSUM; smsc95xx_bind() 1128 dev->net->features \|= NETIF_F_RXCSUM; smsc95xx_bind() 1130 dev->net->hw_features = NETIF_F_HW_CSUM \| NETIF_F_RXCSUM; smsc95xx_bind() 1132 smsc95xx_init_mac_address(dev); smsc95xx_bind() 1135 ret = smsc95xx_reset(dev); smsc95xx_bind() 1138 ret = smsc95xx_read_reg(dev, ID_REV, &val); smsc95xx_bind() 1151 dev->net->netdev_ops = &smsc95xx_netdev_ops; smsc95xx_bind() 1152 dev->net->ethtool_ops = &smsc95xx_ethtool_ops; smsc95xx_bind() 1153 dev->net->flags \|= IFF_MULTICAST; smsc95xx_bind() 1154 dev->net->hard_header_len += SMSC95XX_TX_OVERHEAD_CSUM; smsc95xx_bind() 1155 dev->hard_mtu = dev->net->mtu + dev->net->hard_header_len; smsc95xx_bind() 1159 static void smsc95xx_unbind(struct usbnet dev, struct usb_interface intf) smsc95xx_unbind() argument 1161 struct smsc95xx_priv pdata = (struct smsc95xx_priv )(dev->data[0]); smsc95xx_unbind() 1163 netif_dbg(dev, ifdown, dev->net, "free pdata\n"); smsc95xx_unbind() 1166 dev->data[0] = 0; smsc95xx_unbind() 1176 static int smsc95xx_enable_phy_wakeup_interrupts(struct usbnet dev, u16 mask) smsc95xx_enable_phy_wakeup_interrupts() argument 1178 struct mii_if_info mii = &dev->mii; smsc95xx_enable_phy_wakeup_interrupts() 1181 netdev_dbg(dev->net, "enabling PHY wakeup interrupts\n"); smsc95xx_enable_phy_wakeup_interrupts() 1184 ret = smsc95xx_mdio_read_nopm(dev->net, mii->phy_id, PHY_INT_SRC); smsc95xx_enable_phy_wakeup_interrupts() 1189 ret = smsc95xx_mdio_read_nopm(dev->net, mii->phy_id, PHY_INT_MASK); smsc95xx_enable_phy_wakeup_interrupts() 1195 smsc95xx_mdio_write_nopm(dev->net, mii->phy_id, PHY_INT_MASK, ret); smsc95xx_enable_phy_wakeup_interrupts() 1200 static int smsc95xx_link_ok_nopm(struct usbnet dev) smsc95xx_link_ok_nopm() argument 1202 struct mii_if_info mii = &dev->mii; smsc95xx_link_ok_nopm() 1206 ret = smsc95xx_mdio_read_nopm(dev->net, mii->phy_id, MII_BMSR); smsc95xx_link_ok_nopm() 1210 ret = smsc95xx_mdio_read_nopm(dev->net, mii->phy_id, MII_BMSR); smsc95xx_link_ok_nopm() 1217 static int smsc95xx_enter_suspend0(struct usbnet dev) smsc95xx_enter_suspend0() argument 1219 struct smsc95xx_priv pdata = (struct smsc95xx_priv )(dev->data[0]); smsc95xx_enter_suspend0() 1223 ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val); smsc95xx_enter_suspend0() 1230 ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val); smsc95xx_enter_suspend0() 1242 ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val); smsc95xx_enter_suspend0() 1247 ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val); smsc95xx_enter_suspend0() 1256 static int smsc95xx_enter_suspend1(struct usbnet dev) smsc95xx_enter_suspend1() argument 1258 struct smsc95xx_priv pdata = (struct smsc95xx_priv )(dev->data[0]); smsc95xx_enter_suspend1() 1259 struct mii_if_info mii = &dev->mii; smsc95xx_enter_suspend1() 1267 smsc95xx_mdio_write_nopm(dev->net, mii->phy_id, PHY_EDPD_CONFIG, smsc95xx_enter_suspend1() 1271 ret = smsc95xx_mdio_read_nopm(dev->net, mii->phy_id, PHY_MODE_CTRL_STS); smsc95xx_enter_suspend1() 1277 smsc95xx_mdio_write_nopm(dev->net, mii->phy_id, PHY_MODE_CTRL_STS, ret); smsc95xx_enter_suspend1() 1280 ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val); smsc95xx_enter_suspend1() 1287 ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val); smsc95xx_enter_suspend1() 1295 ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val); smsc95xx_enter_suspend1() 1304 static int smsc95xx_enter_suspend2(struct usbnet dev) smsc95xx_enter_suspend2() argument 1306 struct smsc95xx_priv pdata = (struct smsc95xx_priv )(dev->data[0]); smsc95xx_enter_suspend2() 1310 ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val); smsc95xx_enter_suspend2() 1317 ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val); smsc95xx_enter_suspend2() 1326 static int smsc95xx_enter_suspend3(struct usbnet dev) smsc95xx_enter_suspend3() argument 1328 struct smsc95xx_priv pdata = (struct smsc95xx_priv )(dev->data[0]); smsc95xx_enter_suspend3() 1332 ret = smsc95xx_read_reg_nopm(dev, RX_FIFO_INF, &val); smsc95xx_enter_suspend3() 1337 netdev_info(dev->net, "rx fifo not empty in autosuspend\n"); smsc95xx_enter_suspend3() 1341 ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val); smsc95xx_enter_suspend3() 1348 ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val); smsc95xx_enter_suspend3() 1356 ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val); smsc95xx_enter_suspend3() 1365 static int smsc95xx_autosuspend(struct usbnet dev, u32 link_up) smsc95xx_autosuspend() argument 1367 struct smsc95xx_priv pdata = (struct smsc95xx_priv )(dev->data[0]); smsc95xx_autosuspend() 1370 if (!netif_running(dev->net)) { smsc95xx_autosuspend() 1372 netdev_dbg(dev->net, "autosuspend entering SUSPEND2\n"); smsc95xx_autosuspend() 1373 return smsc95xx_enter_suspend2(dev); smsc95xx_autosuspend() 1382 netdev_warn(dev->net, "EDPD not supported\n"); smsc95xx_autosuspend() 1386 netdev_dbg(dev->net, "autosuspend entering SUSPEND1\n"); smsc95xx_autosuspend() 1389 ret = smsc95xx_enable_phy_wakeup_interrupts(dev, smsc95xx_autosuspend() 1392 netdev_warn(dev->net, "error enabling PHY wakeup ints\n"); smsc95xx_autosuspend() 1396 netdev_info(dev->net, "entering SUSPEND1 mode\n"); smsc95xx_autosuspend() 1397 return smsc95xx_enter_suspend1(dev); smsc95xx_autosuspend() 1401 ret = smsc95xx_enable_phy_wakeup_interrupts(dev, smsc95xx_autosuspend() 1404 netdev_warn(dev->net, "error enabling PHY wakeup ints\n"); smsc95xx_autosuspend() 1408 netdev_dbg(dev->net, "autosuspend entering SUSPEND3\n"); smsc95xx_autosuspend() 1409 return smsc95xx_enter_suspend3(dev); smsc95xx_autosuspend() 1414 struct usbnet dev = usb_get_intfdata(intf); smsc95xx_suspend() local 1415 struct smsc95xx_priv pdata = (struct smsc95xx_priv )(dev->data[0]); smsc95xx_suspend() 1421 netdev_warn(dev->net, "usbnet_suspend error\n"); smsc95xx_suspend() 1426 netdev_warn(dev->net, "error during last resume\n"); smsc95xx_suspend() 1431 link_up = smsc95xx_link_ok_nopm(dev); smsc95xx_suspend() 1435 ret = smsc95xx_autosuspend(dev, link_up); smsc95xx_suspend() 1445 netdev_info(dev->net, "entering SUSPEND2 mode\n"); smsc95xx_suspend() 1448 ret = smsc95xx_read_reg_nopm(dev, WUCSR, &val); smsc95xx_suspend() 1454 ret = smsc95xx_write_reg_nopm(dev, WUCSR, val); smsc95xx_suspend() 1458 ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val); smsc95xx_suspend() 1464 ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val); smsc95xx_suspend() 1468 ret = smsc95xx_enter_suspend2(dev); smsc95xx_suspend() 1473 ret = smsc95xx_enable_phy_wakeup_interrupts(dev, smsc95xx_suspend() 1476 netdev_warn(dev->net, "error enabling PHY wakeup ints\n"); smsc95xx_suspend() 1484 netdev_info(dev->net, "entering SUSPEND1 mode\n"); smsc95xx_suspend() 1485 ret = smsc95xx_enter_suspend1(dev); smsc95xx_suspend() 1501 netdev_warn(dev->net, "Unable to allocate filter_mask\n"); smsc95xx_suspend() 1512 netdev_info(dev->net, "enabling broadcast detection\n"); smsc95xx_suspend() 1525 netdev_info(dev->net, "enabling multicast detection\n"); smsc95xx_suspend() 1538 netdev_info(dev->net, "enabling ARP detection\n"); smsc95xx_suspend() 1550 netdev_info(dev->net, "enabling unicast detection\n"); smsc95xx_suspend() 1557 crc[filter/2] \|= smsc_crc(dev->net->dev_addr, ETH_ALEN, filter); smsc95xx_suspend() 1562 ret = smsc95xx_write_reg_nopm(dev, WUFF, filter_mask[i]); smsc95xx_suspend() 1571 ret = smsc95xx_write_reg_nopm(dev, WUFF, command[i]); smsc95xx_suspend() 1577 ret = smsc95xx_write_reg_nopm(dev, WUFF, offset[i]); smsc95xx_suspend() 1583 ret = smsc95xx_write_reg_nopm(dev, WUFF, crc[i]); smsc95xx_suspend() 1589 ret = smsc95xx_read_reg_nopm(dev, WUCSR, &val); smsc95xx_suspend() 1595 ret = smsc95xx_write_reg_nopm(dev, WUCSR, val); smsc95xx_suspend() 1602 ret = smsc95xx_read_reg_nopm(dev, WUCSR, &val); smsc95xx_suspend() 1608 ret = smsc95xx_write_reg_nopm(dev, WUCSR, val); smsc95xx_suspend() 1614 ret = smsc95xx_read_reg_nopm(dev, WUCSR, &val); smsc95xx_suspend() 1619 netdev_info(dev->net, "enabling pattern match wakeup\n"); smsc95xx_suspend() 1622 netdev_info(dev->net, "disabling pattern match wakeup\n"); smsc95xx_suspend() 1627 netdev_info(dev->net, "enabling magic packet wakeup\n"); smsc95xx_suspend() 1630 netdev_info(dev->net, "disabling magic packet wakeup\n"); smsc95xx_suspend() 1634 ret = smsc95xx_write_reg_nopm(dev, WUCSR, val); smsc95xx_suspend() 1639 ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val); smsc95xx_suspend() 1649 ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val); smsc95xx_suspend() 1654 smsc95xx_start_rx_path(dev, 1); smsc95xx_suspend() 1657 netdev_info(dev->net, "entering SUSPEND0 mode\n"); smsc95xx_suspend() 1658 ret = smsc95xx_enter_suspend0(dev); smsc95xx_suspend() 1672 struct usbnet dev = usb_get_intfdata(intf); smsc95xx_resume() local 1678 BUG_ON(!dev); smsc95xx_resume() 1679 pdata = (struct smsc95xx_priv )(dev->data[0]); smsc95xx_resume() 1682 netdev_dbg(dev->net, "resume suspend_flags=0x%02x\n", suspend_flags); smsc95xx_resume() 1689 ret = smsc95xx_read_reg_nopm(dev, WUCSR, &val); smsc95xx_resume() 1695 ret = smsc95xx_write_reg_nopm(dev, WUCSR, val); smsc95xx_resume() 1700 ret = smsc95xx_read_reg_nopm(dev, PM_CTRL, &val); smsc95xx_resume() 1707 ret = smsc95xx_write_reg_nopm(dev, PM_CTRL, val); smsc95xx_resume() 1714 netdev_warn(dev->net, "usbnet_resume error\n"); smsc95xx_resume() 1721 struct usbnet dev = usb_get_intfdata(intf); smsc95xx_reset_resume() local 1724 ret = smsc95xx_reset(dev); smsc95xx_reset_resume() 1738 static int smsc95xx_rx_fixup(struct usbnet dev, struct sk_buff skb) smsc95xx_rx_fixup() argument 1741 if (skb->len < dev->net->hard_header_len) smsc95xx_rx_fixup() 1760 netif_dbg(dev, rx_err, dev->net, smsc95xx_rx_fixup() 1762 dev->net->stats.rx_errors++; smsc95xx_rx_fixup() 1763 dev->net->stats.rx_dropped++; smsc95xx_rx_fixup() 1766 dev->net->stats.rx_crc_errors++; smsc95xx_rx_fixup() 1769 dev->net->stats.rx_frame_errors++; smsc95xx_rx_fixup() 1773 dev->net->stats.rx_length_errors++; smsc95xx_rx_fixup() 1778 netif_dbg(dev, rx_err, dev->net, smsc95xx_rx_fixup() 1785 if (dev->net->features & NETIF_F_RXCSUM) smsc95xx_rx_fixup() 1795 netdev_warn(dev->net, "Error allocating skb\n"); smsc95xx_rx_fixup() 1803 if (dev->net->features & NETIF_F_RXCSUM) smsc95xx_rx_fixup() 1808 usbnet_skb_return(dev, ax_skb); smsc95xx_rx_fixup() 1819 netdev_warn(dev->net, "invalid rx length<0 %d\n", skb->len); smsc95xx_rx_fixup() 1833 static struct sk_buff smsc95xx_tx_fixup(struct usbnet dev, smsc95xx_tx_fixup() argument 1887 static int smsc95xx_manage_power(struct usbnet dev, int on) smsc95xx_manage_power() argument 1889 struct smsc95xx_priv pdata = (struct smsc95xx_priv *)(dev->data[0]); smsc95xx_manage_power() 1891 dev->intf->needs_remote_wakeup = on; smsc95xx_manage_power() 1897 netdev_info(dev->net, "hardware isn't capable of remote wakeup\n"); smsc95xx_manage_power() 1900 usb_autopm_get_interface_no_resume(dev->intf); smsc95xx_manage_power() 1902 usb_autopm_put_interface(dev->intf); smsc95xx_manage_power()
/linux-4.1.27/drivers/ipack/
H A D	ipack.c	18 #define to_ipack_dev(device) container_of(device, struct ipack_device, dev) 23 static void ipack_device_release(struct device dev) ipack_device_release() argument 25 struct ipack_device device = to_ipack_dev(dev); ipack_device_release() 55 static int ipack_bus_match(struct device dev, struct device_driver drv) ipack_bus_match() argument 57 struct ipack_device idev = to_ipack_dev(dev); ipack_bus_match() 67 struct ipack_device dev = to_ipack_dev(device); ipack_bus_probe() local 73 return drv->ops->probe(dev); ipack_bus_probe() 78 struct ipack_device dev = to_ipack_dev(device); ipack_bus_remove() local 84 drv->ops->remove(dev); ipack_bus_remove() 88 static int ipack_uevent(struct device dev, struct kobj_uevent_env env) ipack_uevent() argument 92 if (!dev) ipack_uevent() 95 idev = to_ipack_dev(dev); ipack_uevent() 107 field##_show(struct device dev, struct device_attribute attr, \ 110 struct ipack_device idev = to_ipack_dev(dev); \ 114 static ssize_t id_show(struct device dev, id_show() argument 118 struct ipack_device idev = to_ipack_dev(dev); id_show() 145 id_vendor_show(struct device dev, struct device_attribute attr, char buf) id_vendor_show() argument 147 struct ipack_device idev = to_ipack_dev(dev); id_vendor_show() 159 id_device_show(struct device dev, struct device_attribute attr, char buf) id_device_show() argument 161 struct ipack_device idev = to_ipack_dev(dev); id_device_show() 172 static ssize_t modalias_show(struct device dev, struct device_attribute attr, modalias_show() argument 175 struct ipack_device idev = to_ipack_dev(dev); modalias_show() 234 static int ipack_unregister_bus_member(struct device dev, void data) ipack_unregister_bus_member() argument 236 struct ipack_device idev = to_ipack_dev(dev); ipack_unregister_bus_member() 285 static u8 ipack_calc_crc1(struct ipack_device dev) ipack_calc_crc1() argument 292 for (i = 0; i < dev->id_avail; i++) { ipack_calc_crc1() 293 c = (i != 11) ? dev->id[i] : 0; ipack_calc_crc1() 300 static u16 ipack_calc_crc2(struct ipack_device dev) ipack_calc_crc2() argument 307 for (i = 0; i < dev->id_avail; i++) { ipack_calc_crc2() 308 c = ((i != 0x18) && (i != 0x19)) ? dev->id[i] : 0; ipack_calc_crc2() 315 static void ipack_parse_id1(struct ipack_device dev) ipack_parse_id1() argument 317 u8 id = dev->id; ipack_parse_id1() 320 dev->id_vendor = id[4]; ipack_parse_id1() 321 dev->id_device = id[5]; ipack_parse_id1() 322 dev->speed_8mhz = 1; ipack_parse_id1() 323 dev->speed_32mhz = (id[7] == 'H'); ipack_parse_id1() 324 crc = ipack_calc_crc1(dev); ipack_parse_id1() 325 dev->id_crc_correct = (crc == id[11]); ipack_parse_id1() 326 if (!dev->id_crc_correct) { ipack_parse_id1() 327 dev_warn(&dev->dev, "ID CRC invalid found 0x%x, expected 0x%x.\n", ipack_parse_id1() 332 static void ipack_parse_id2(struct ipack_device dev) ipack_parse_id2() argument 334 __be16 id = (__be16 ) dev->id; ipack_parse_id2() 337 dev->id_vendor = ((be16_to_cpu(id[3]) & 0xff) << 16) ipack_parse_id2() 339 dev->id_device = be16_to_cpu(id[5]); ipack_parse_id2() 341 dev->speed_8mhz = !!(flags & 2); ipack_parse_id2() 342 dev->speed_32mhz = !!(flags & 4); ipack_parse_id2() 343 crc = ipack_calc_crc2(dev); ipack_parse_id2() 344 dev->id_crc_correct = (crc == be16_to_cpu(id[12])); ipack_parse_id2() 345 if (!dev->id_crc_correct) { ipack_parse_id2() 346 dev_warn(&dev->dev, "ID CRC invalid found 0x%x, expected 0x%x.\n", ipack_parse_id2() 351 static int ipack_device_read_id(struct ipack_device dev) ipack_device_read_id() argument 357 idmem = ioremap(dev->region[IPACK_ID_SPACE].start, ipack_device_read_id() 358 dev->region[IPACK_ID_SPACE].size); ipack_device_read_id() 360 dev_err(&dev->dev, "error mapping memory\n"); ipack_device_read_id() 373 dev->id_format = IPACK_ID_VERSION_1; ipack_device_read_id() 374 dev->id_avail = ioread8(idmem + 0x15); ipack_device_read_id() 375 if ((dev->id_avail < 0x0c) \|\| (dev->id_avail > 0x40)) { ipack_device_read_id() 376 dev_warn(&dev->dev, "invalid id size"); ipack_device_read_id() 377 dev->id_avail = 0x0c; ipack_device_read_id() 385 dev->id_format = IPACK_ID_VERSION_2; ipack_device_read_id() 386 dev->id_avail = ioread16be(idmem + 0x16); ipack_device_read_id() 387 if ((dev->id_avail < 0x1a) \|\| (dev->id_avail > 0x40)) { ipack_device_read_id() 388 dev_warn(&dev->dev, "invalid id size"); ipack_device_read_id() 389 dev->id_avail = 0x1a; ipack_device_read_id() 392 dev->id_format = IPACK_ID_VERSION_INVALID; ipack_device_read_id() 393 dev->id_avail = 0; ipack_device_read_id() 396 if (!dev->id_avail) { ipack_device_read_id() 403 dev->id = kmalloc(dev->id_avail, GFP_KERNEL); ipack_device_read_id() 404 if (!dev->id) { ipack_device_read_id() 405 dev_err(&dev->dev, "dev->id alloc failed.\n"); ipack_device_read_id() 409 for (i = 0; i < dev->id_avail; i++) { ipack_device_read_id() 410 if (dev->id_format == IPACK_ID_VERSION_1) ipack_device_read_id() 411 dev->id[i] = ioread8(idmem + (i << 1) + 1); ipack_device_read_id() 413 dev->id[i] = ioread8(idmem + i); ipack_device_read_id() 417 switch (dev->id_format) { ipack_device_read_id() 419 ipack_parse_id1(dev); ipack_device_read_id() 422 ipack_parse_id2(dev); ipack_device_read_id() 432 int ipack_device_init(struct ipack_device dev) ipack_device_init() argument 436 dev->dev.bus = &ipack_bus_type; ipack_device_init() 437 dev->dev.release = ipack_device_release; ipack_device_init() 438 dev->dev.parent = dev->bus->parent; ipack_device_init() 439 dev_set_name(&dev->dev, ipack_device_init() 440 "ipack-dev.%u.%u", dev->bus->bus_nr, dev->slot); ipack_device_init() 441 device_initialize(&dev->dev); ipack_device_init() 443 if (dev->bus->ops->set_clockrate(dev, 8)) ipack_device_init() 444 dev_warn(&dev->dev, "failed to switch to 8 MHz operation for reading of device ID.\n"); ipack_device_init() 445 if (dev->bus->ops->reset_timeout(dev)) ipack_device_init() 446 dev_warn(&dev->dev, "failed to reset potential timeout."); ipack_device_init() 448 ret = ipack_device_read_id(dev); ipack_device_init() 450 dev_err(&dev->dev, "error reading device id section.\n"); ipack_device_init() 455 if (dev->speed_32mhz) { ipack_device_init() 456 ret = dev->bus->ops->set_clockrate(dev, 32); ipack_device_init() 458 dev_err(&dev->dev, "failed to switch to 32 MHz operation.\n"); ipack_device_init() 465 int ipack_device_add(struct ipack_device dev) ipack_device_add() argument 467 return device_add(&dev->dev); ipack_device_add() 471 void ipack_device_del(struct ipack_device dev) ipack_device_del() argument 473 device_del(&dev->dev); ipack_device_del() 474 ipack_put_device(dev); ipack_device_del() 478 void ipack_get_device(struct ipack_device dev) ipack_get_device() argument 480 get_device(&dev->dev); ipack_get_device() 484 void ipack_put_device(struct ipack_device *dev) ipack_put_device() argument 486 put_device(&dev->dev); ipack_put_device()
/linux-4.1.27/drivers/i2c/busses/
H A D	i2c-highlander.c	44 struct device dev; member in struct:highlander_i2c_dev 57 static inline void highlander_i2c_irq_enable(struct highlander_i2c_dev dev) highlander_i2c_irq_enable() argument 59 iowrite16(ioread16(dev->base + SMCR) \| SMCR_IEIC, dev->base + SMCR); highlander_i2c_irq_enable() 62 static inline void highlander_i2c_irq_disable(struct highlander_i2c_dev dev) highlander_i2c_irq_disable() argument 64 iowrite16(ioread16(dev->base + SMCR) & ~SMCR_IEIC, dev->base + SMCR); highlander_i2c_irq_disable() 67 static inline void highlander_i2c_start(struct highlander_i2c_dev dev) highlander_i2c_start() argument 69 iowrite16(ioread16(dev->base + SMCR) \| SMCR_START, dev->base + SMCR); highlander_i2c_start() 72 static inline void highlander_i2c_done(struct highlander_i2c_dev dev) highlander_i2c_done() argument 74 iowrite16(ioread16(dev->base + SMCR) \| SMCR_IRIC, dev->base + SMCR); highlander_i2c_done() 77 static void highlander_i2c_setup(struct highlander_i2c_dev dev) highlander_i2c_setup() argument 81 smmr = ioread16(dev->base + SMMR); highlander_i2c_setup() 89 iowrite16(smmr, dev->base + SMMR); highlander_i2c_setup() 114 static void highlander_i2c_command(struct highlander_i2c_dev dev, highlander_i2c_command() argument 123 iowrite16(cmd, dev->base + SMSADR + i); highlander_i2c_command() 124 dev_dbg(dev->dev, "command data[%x] 0x%04x\n", i/2, cmd); highlander_i2c_command() 128 static int highlander_i2c_wait_for_bbsy(struct highlander_i2c_dev dev) highlander_i2c_wait_for_bbsy() argument 133 while (ioread16(dev->base + SMCR) & SMCR_BBSY) { highlander_i2c_wait_for_bbsy() 135 dev_warn(dev->dev, "timeout waiting for bus ready\n"); highlander_i2c_wait_for_bbsy() 145 static int highlander_i2c_reset(struct highlander_i2c_dev dev) highlander_i2c_reset() argument 147 iowrite16(ioread16(dev->base + SMCR) \| SMCR_RST, dev->base + SMCR); highlander_i2c_reset() 148 return highlander_i2c_wait_for_bbsy(dev); highlander_i2c_reset() 151 static int highlander_i2c_wait_for_ack(struct highlander_i2c_dev dev) highlander_i2c_wait_for_ack() argument 153 u16 tmp = ioread16(dev->base + SMCR); highlander_i2c_wait_for_ack() 156 dev_warn(dev->dev, "ack abnormality\n"); highlander_i2c_wait_for_ack() 157 return highlander_i2c_reset(dev); highlander_i2c_wait_for_ack() 165 struct highlander_i2c_dev dev = dev_id; highlander_i2c_irq() local 167 highlander_i2c_done(dev); highlander_i2c_irq() 168 complete(&dev->cmd_complete); highlander_i2c_irq() 173 static void highlander_i2c_poll(struct highlander_i2c_dev dev) highlander_i2c_poll() argument 180 smcr = ioread16(dev->base + SMCR); highlander_i2c_poll() 197 dev_err(dev->dev, "polling timed out\n"); highlander_i2c_poll() 200 static inline int highlander_i2c_wait_xfer_done(struct highlander_i2c_dev dev) highlander_i2c_wait_xfer_done() argument 202 if (dev->irq) highlander_i2c_wait_xfer_done() 203 wait_for_completion_timeout(&dev->cmd_complete, highlander_i2c_wait_xfer_done() 207 highlander_i2c_poll(dev); highlander_i2c_wait_xfer_done() 209 return highlander_i2c_wait_for_ack(dev); highlander_i2c_wait_xfer_done() 212 static int highlander_i2c_read(struct highlander_i2c_dev dev) highlander_i2c_read() argument 217 if (highlander_i2c_wait_for_bbsy(dev)) highlander_i2c_read() 220 highlander_i2c_start(dev); highlander_i2c_read() 222 if (highlander_i2c_wait_xfer_done(dev)) { highlander_i2c_read() 223 dev_err(dev->dev, "Arbitration loss\n"); highlander_i2c_read() 239 if (iic_read_delay && time_before(jiffies, dev->last_read_time + highlander_i2c_read() 241 msleep(jiffies_to_msecs((dev->last_read_time + highlander_i2c_read() 244 cnt = (dev->buf_len + 1) >> 1; highlander_i2c_read() 246 data[i] = ioread16(dev->base + SMTRDR + (i * sizeof(u16))); highlander_i2c_read() 247 dev_dbg(dev->dev, "read data[%x] 0x%04x\n", i, data[i]); highlander_i2c_read() 250 smbus_read_data(data, dev->buf, dev->buf_len); highlander_i2c_read() 252 dev->last_read_time = jiffies; highlander_i2c_read() 257 static int highlander_i2c_write(struct highlander_i2c_dev dev) highlander_i2c_write() argument 262 smbus_write_data(dev->buf, data, dev->buf_len); highlander_i2c_write() 264 cnt = (dev->buf_len + 1) >> 1; highlander_i2c_write() 266 iowrite16(data[i], dev->base + SMTRDR + (i sizeof(u16))); highlander_i2c_write() 267 dev_dbg(dev->dev, "write data[%x] 0x%04x\n", i, data[i]); highlander_i2c_write() 270 if (highlander_i2c_wait_for_bbsy(dev)) highlander_i2c_write() 273 highlander_i2c_start(dev); highlander_i2c_write() 275 return highlander_i2c_wait_xfer_done(dev); highlander_i2c_write() 283 struct highlander_i2c_dev dev = i2c_get_adapdata(adap); highlander_i2c_smbus_xfer() local 286 init_completion(&dev->cmd_complete); highlander_i2c_smbus_xfer() 288 dev_dbg(dev->dev, "addr %04x, command %02x, read_write %d, size %d\n", highlander_i2c_smbus_xfer() 296 dev->buf = &data->byte; highlander_i2c_smbus_xfer() 297 dev->buf_len = 1; highlander_i2c_smbus_xfer() 300 dev->buf = &data->block[1]; highlander_i2c_smbus_xfer() 301 dev->buf_len = data->block[0]; highlander_i2c_smbus_xfer() 304 dev_err(dev->dev, "unsupported command %d\n", size); highlander_i2c_smbus_xfer() 311 tmp = ioread16(dev->base + SMMR); highlander_i2c_smbus_xfer() 314 switch (dev->buf_len) { highlander_i2c_smbus_xfer() 328 dev_err(dev->dev, "unsupported xfer size %d\n", dev->buf_len); highlander_i2c_smbus_xfer() 332 iowrite16(tmp, dev->base + SMMR); highlander_i2c_smbus_xfer() 335 highlander_i2c_done(dev); highlander_i2c_smbus_xfer() 338 iowrite16((addr << 1) \| read_write, dev->base + SMSMADR); highlander_i2c_smbus_xfer() 340 highlander_i2c_command(dev, command, dev->buf_len); highlander_i2c_smbus_xfer() 343 return highlander_i2c_read(dev); highlander_i2c_smbus_xfer() 345 return highlander_i2c_write(dev); highlander_i2c_smbus_xfer() 360 struct highlander_i2c_dev dev; highlander_i2c_probe() local 367 dev_err(&pdev->dev, "no mem resource\n"); highlander_i2c_probe() 371 dev = kzalloc(sizeof(struct highlander_i2c_dev), GFP_KERNEL); highlander_i2c_probe() 372 if (unlikely(!dev)) highlander_i2c_probe() 375 dev->base = ioremap_nocache(res->start, resource_size(res)); highlander_i2c_probe() 376 if (unlikely(!dev->base)) { highlander_i2c_probe() 381 dev->dev = &pdev->dev; highlander_i2c_probe() 382 platform_set_drvdata(pdev, dev); highlander_i2c_probe() 384 dev->irq = platform_get_irq(pdev, 0); highlander_i2c_probe() 386 dev->irq = 0; highlander_i2c_probe() 388 if (dev->irq) { highlander_i2c_probe() 389 ret = request_irq(dev->irq, highlander_i2c_irq, 0, highlander_i2c_probe() 390 pdev->name, dev); highlander_i2c_probe() 394 highlander_i2c_irq_enable(dev); highlander_i2c_probe() 396 dev_notice(&pdev->dev, "no IRQ, using polling mode\n"); highlander_i2c_probe() 397 highlander_i2c_irq_disable(dev); highlander_i2c_probe() 400 dev->last_read_time = jiffies; /* initial read jiffies / highlander_i2c_probe() 402 highlander_i2c_setup(dev); highlander_i2c_probe() 404 adap = &dev->adapter; highlander_i2c_probe() 405 i2c_set_adapdata(adap, dev); highlander_i2c_probe() 410 adap->dev.parent = &pdev->dev; highlander_i2c_probe() 416 ret = highlander_i2c_reset(dev); highlander_i2c_probe() 418 dev_err(&pdev->dev, "controller didn't come up\n"); highlander_i2c_probe() 424 dev_err(&pdev->dev, "failure adding adapter\n"); highlander_i2c_probe() 431 if (dev->irq) highlander_i2c_probe() 432 free_irq(dev->irq, dev); highlander_i2c_probe() 434 iounmap(dev->base); highlander_i2c_probe() 436 kfree(dev); highlander_i2c_probe() 443 struct highlander_i2c_dev dev = platform_get_drvdata(pdev); highlander_i2c_remove() local 445 i2c_del_adapter(&dev->adapter); highlander_i2c_remove() 447 if (dev->irq) highlander_i2c_remove() 448 free_irq(dev->irq, dev); highlander_i2c_remove() 450 iounmap(dev->base); highlander_i2c_remove() 451 kfree(dev); highlander_i2c_remove()
H A D	i2c-designware-baytrail.c	32 static int get_sem(struct device dev, u32 sem) get_sem() argument 40 dev_err(dev, "iosf failed to read punit semaphore\n"); get_sem() 49 static void reset_semaphore(struct device dev) reset_semaphore() argument 55 dev_err(dev, "iosf failed to reset punit semaphore during read\n"); reset_semaphore() 62 dev_err(dev, "iosf failed to reset punit semaphore during write\n"); reset_semaphore() 65 static int baytrail_i2c_acquire(struct dw_i2c_dev dev) baytrail_i2c_acquire() argument 73 if (!dev \|\| !dev->dev) baytrail_i2c_acquire() 76 if (!dev->release_lock) baytrail_i2c_acquire() 83 dev_err(dev->dev, "iosf punit semaphore request failed\n"); baytrail_i2c_acquire() 91 ret = get_sem(dev->dev, &sem); baytrail_i2c_acquire() 94 dev_dbg(dev->dev, "punit semaphore acquired after %ums\n", baytrail_i2c_acquire() 102 dev_err(dev->dev, "punit semaphore timed out, resetting\n"); baytrail_i2c_acquire() 103 reset_semaphore(dev->dev); baytrail_i2c_acquire() 108 dev_err(dev->dev, "iosf failed to read punit semaphore\n"); baytrail_i2c_acquire() 110 dev_err(dev->dev, "PUNIT SEM: %d\n", sem); baytrail_i2c_acquire() 117 static void baytrail_i2c_release(struct dw_i2c_dev dev) baytrail_i2c_release() argument 119 if (!dev \|\| !dev->dev) baytrail_i2c_release() 122 if (!dev->acquire_lock) baytrail_i2c_release() 125 reset_semaphore(dev->dev); baytrail_i2c_release() 126 dev_dbg(dev->dev, "punit semaphore held for %ums\n", baytrail_i2c_release() 130 int i2c_dw_eval_lock_support(struct dw_i2c_dev dev) i2c_dw_eval_lock_support() argument 136 if (!dev \|\| !dev->dev) i2c_dw_eval_lock_support() 139 handle = ACPI_HANDLE(dev->dev); i2c_dw_eval_lock_support() 148 dev_info(dev->dev, "I2C bus managed by PUNIT\n"); i2c_dw_eval_lock_support() 149 dev->acquire_lock = baytrail_i2c_acquire; i2c_dw_eval_lock_support() 150 dev->release_lock = baytrail_i2c_release; i2c_dw_eval_lock_support() 151 dev->pm_runtime_disabled = true; i2c_dw_eval_lock_support()
H A D	i2c-designware-platdrv.c	49 static u32 i2c_dw_get_clk_rate_khz(struct dw_i2c_dev dev) i2c_dw_get_clk_rate_khz() argument 51 return clk_get_rate(dev->clk)/1000; i2c_dw_get_clk_rate_khz() 75 acpi_handle handle = ACPI_HANDLE(&pdev->dev); dw_i2c_acpi_params() 99 struct dw_i2c_dev dev = platform_get_drvdata(pdev); dw_i2c_acpi_configure() local 102 dev->adapter.nr = -1; dw_i2c_acpi_configure() 103 dev->tx_fifo_depth = 32; dw_i2c_acpi_configure() 104 dev->rx_fifo_depth = 32; dw_i2c_acpi_configure() 110 dw_i2c_acpi_params(pdev, "SSCN", &dev->ss_hcnt, &dev->ss_lcnt, NULL); dw_i2c_acpi_configure() 111 dw_i2c_acpi_params(pdev, "FMCN", &dev->fs_hcnt, &dev->fs_lcnt, dw_i2c_acpi_configure() 112 &dev->sda_hold_time); dw_i2c_acpi_configure() 119 id = acpi_match_device(pdev->dev.driver->acpi_match_table, &pdev->dev); dw_i2c_acpi_configure() 121 clk_register_fixed_rate(&pdev->dev, dev_name(&pdev->dev), NULL, dw_i2c_acpi_configure() 129 struct dw_i2c_dev dev = platform_get_drvdata(pdev); dw_i2c_acpi_unconfigure() local 132 id = acpi_match_device(pdev->dev.driver->acpi_match_table, &pdev->dev); dw_i2c_acpi_unconfigure() 134 clk_unregister(dev->clk); dw_i2c_acpi_unconfigure() 158 struct dw_i2c_dev dev; dw_i2c_probe() local 169 dev = devm_kzalloc(&pdev->dev, sizeof(struct dw_i2c_dev), GFP_KERNEL); dw_i2c_probe() 170 if (!dev) dw_i2c_probe() 174 dev->base = devm_ioremap_resource(&pdev->dev, mem); dw_i2c_probe() 175 if (IS_ERR(dev->base)) dw_i2c_probe() 176 return PTR_ERR(dev->base); dw_i2c_probe() 178 init_completion(&dev->cmd_complete); dw_i2c_probe() 179 mutex_init(&dev->lock); dw_i2c_probe() 180 dev->dev = &pdev->dev; dw_i2c_probe() 181 dev->irq = irq; dw_i2c_probe() 182 platform_set_drvdata(pdev, dev); dw_i2c_probe() 187 if (has_acpi_companion(&pdev->dev)) { dw_i2c_probe() 189 } else if (pdev->dev.of_node) { dw_i2c_probe() 190 of_property_read_u32(pdev->dev.of_node, dw_i2c_probe() 193 of_property_read_u32(pdev->dev.of_node, dw_i2c_probe() 195 &dev->sda_falling_time); dw_i2c_probe() 196 of_property_read_u32(pdev->dev.of_node, dw_i2c_probe() 198 &dev->scl_falling_time); dw_i2c_probe() 200 of_property_read_u32(pdev->dev.of_node, "clock-frequency", dw_i2c_probe() 207 dev_err(&pdev->dev, "Only 100kHz and 400kHz supported"); dw_i2c_probe() 211 pdata = dev_get_platdata(&pdev->dev); dw_i2c_probe() 216 r = i2c_dw_eval_lock_support(dev); dw_i2c_probe() 220 dev->functionality = dw_i2c_probe() 228 dev->master_cfg = DW_IC_CON_MASTER \| DW_IC_CON_SLAVE_DISABLE \| dw_i2c_probe() 231 dev->master_cfg = DW_IC_CON_MASTER \| DW_IC_CON_SLAVE_DISABLE \| dw_i2c_probe() 234 dev->clk = devm_clk_get(&pdev->dev, NULL); dw_i2c_probe() 235 dev->get_clk_rate_khz = i2c_dw_get_clk_rate_khz; dw_i2c_probe() 236 if (IS_ERR(dev->clk)) dw_i2c_probe() 237 return PTR_ERR(dev->clk); dw_i2c_probe() 238 clk_prepare_enable(dev->clk); dw_i2c_probe() 240 if (!dev->sda_hold_time && ht) { dw_i2c_probe() 241 u32 ic_clk = dev->get_clk_rate_khz(dev); dw_i2c_probe() 243 dev->sda_hold_time = div_u64((u64)ic_clk * ht + 500000, dw_i2c_probe() 247 if (!dev->tx_fifo_depth) { dw_i2c_probe() 248 u32 param1 = i2c_dw_read_comp_param(dev); dw_i2c_probe() 250 dev->tx_fifo_depth = ((param1 >> 16) & 0xff) + 1; dw_i2c_probe() 251 dev->rx_fifo_depth = ((param1 >> 8) & 0xff) + 1; dw_i2c_probe() 252 dev->adapter.nr = pdev->id; dw_i2c_probe() 254 r = i2c_dw_init(dev); dw_i2c_probe() 258 i2c_dw_disable_int(dev); dw_i2c_probe() 259 r = devm_request_irq(&pdev->dev, dev->irq, i2c_dw_isr, IRQF_SHARED, dw_i2c_probe() 260 pdev->name, dev); dw_i2c_probe() 262 dev_err(&pdev->dev, "failure requesting irq %i\n", dev->irq); dw_i2c_probe() 266 adap = &dev->adapter; dw_i2c_probe() 267 i2c_set_adapdata(adap, dev); dw_i2c_probe() 273 adap->dev.parent = &pdev->dev; dw_i2c_probe() 274 adap->dev.of_node = pdev->dev.of_node; dw_i2c_probe() 276 if (dev->pm_runtime_disabled) { dw_i2c_probe() 277 pm_runtime_forbid(&pdev->dev); dw_i2c_probe() 279 pm_runtime_set_autosuspend_delay(&pdev->dev, 1000); dw_i2c_probe() 280 pm_runtime_use_autosuspend(&pdev->dev); dw_i2c_probe() 281 pm_runtime_set_active(&pdev->dev); dw_i2c_probe() 282 pm_runtime_enable(&pdev->dev); dw_i2c_probe() 287 dev_err(&pdev->dev, "failure adding adapter\n"); dw_i2c_probe() 288 pm_runtime_disable(&pdev->dev); dw_i2c_probe() 297 struct dw_i2c_dev dev = platform_get_drvdata(pdev); dw_i2c_remove() local 299 pm_runtime_get_sync(&pdev->dev); dw_i2c_remove() 301 i2c_del_adapter(&dev->adapter); dw_i2c_remove() 303 i2c_dw_disable(dev); dw_i2c_remove() 305 pm_runtime_put(&pdev->dev); dw_i2c_remove() 306 pm_runtime_disable(&pdev->dev); dw_i2c_remove() 308 if (has_acpi_companion(&pdev->dev)) dw_i2c_remove() 323 static int dw_i2c_suspend(struct device dev) dw_i2c_suspend() argument 325 struct platform_device pdev = to_platform_device(dev); dw_i2c_suspend() 334 static int dw_i2c_resume(struct device dev) dw_i2c_resume() argument 336 struct platform_device *pdev = to_platform_device(dev); dw_i2c_resume()
H A D	i2c-designware-core.c	168 u32 dw_readl(struct dw_i2c_dev dev, int offset) dw_readl() argument 172 if (dev->accessor_flags & ACCESS_16BIT) dw_readl() 173 value = readw_relaxed(dev->base + offset) \| dw_readl() 174 (readw_relaxed(dev->base + offset + 2) << 16); dw_readl() 176 value = readl_relaxed(dev->base + offset); dw_readl() 178 if (dev->accessor_flags & ACCESS_SWAP) dw_readl() 184 void dw_writel(struct dw_i2c_dev dev, u32 b, int offset) dw_writel() argument 186 if (dev->accessor_flags & ACCESS_SWAP) dw_writel() 189 if (dev->accessor_flags & ACCESS_16BIT) { dw_writel() 190 writew_relaxed((u16)b, dev->base + offset); dw_writel() 191 writew_relaxed((u16)(b >> 16), dev->base + offset + 2); dw_writel() 193 writel_relaxed(b, dev->base + offset); dw_writel() 253 static void __i2c_dw_enable(struct dw_i2c_dev dev, bool enable) __i2c_dw_enable() argument 258 dw_writel(dev, enable, DW_IC_ENABLE); __i2c_dw_enable() 259 if ((dw_readl(dev, DW_IC_ENABLE_STATUS) & 1) == enable) __i2c_dw_enable() 270 dev_warn(dev->dev, "timeout in %sabling adapter\n", __i2c_dw_enable() 276 @dev: device private data 282 int i2c_dw_init(struct dw_i2c_dev dev) i2c_dw_init() argument 290 if (dev->acquire_lock) { i2c_dw_init() 291 ret = dev->acquire_lock(dev); i2c_dw_init() 293 dev_err(dev->dev, "couldn't acquire bus ownership\n"); i2c_dw_init() 298 input_clock_khz = dev->get_clk_rate_khz(dev); i2c_dw_init() 300 reg = dw_readl(dev, DW_IC_COMP_TYPE); i2c_dw_init() 303 dev->accessor_flags \|= ACCESS_SWAP; i2c_dw_init() 306 dev->accessor_flags \|= ACCESS_16BIT; i2c_dw_init() 308 dev_err(dev->dev, "Unknown Synopsys component type: " i2c_dw_init() 310 if (dev->release_lock) i2c_dw_init() 311 dev->release_lock(dev); i2c_dw_init() 316 __i2c_dw_enable(dev, false); i2c_dw_init() 320 sda_falling_time = dev->sda_falling_time ?: 300; / ns / i2c_dw_init() 321 scl_falling_time = dev->scl_falling_time ?: 300; / ns / i2c_dw_init() 324 if (dev->ss_hcnt && dev->ss_lcnt) { i2c_dw_init() 325 hcnt = dev->ss_hcnt; i2c_dw_init() 326 lcnt = dev->ss_lcnt; i2c_dw_init() 338 dw_writel(dev, hcnt, DW_IC_SS_SCL_HCNT); i2c_dw_init() 339 dw_writel(dev, lcnt, DW_IC_SS_SCL_LCNT); i2c_dw_init() 340 dev_dbg(dev->dev, "Standard-mode HCNT:LCNT = %d:%d\n", hcnt, lcnt); i2c_dw_init() 343 if (dev->fs_hcnt && dev->fs_lcnt) { i2c_dw_init() 344 hcnt = dev->fs_hcnt; i2c_dw_init() 345 lcnt = dev->fs_lcnt; i2c_dw_init() 357 dw_writel(dev, hcnt, DW_IC_FS_SCL_HCNT); i2c_dw_init() 358 dw_writel(dev, lcnt, DW_IC_FS_SCL_LCNT); i2c_dw_init() 359 dev_dbg(dev->dev, "Fast-mode HCNT:LCNT = %d:%d\n", hcnt, lcnt); i2c_dw_init() 362 if (dev->sda_hold_time) { i2c_dw_init() 363 reg = dw_readl(dev, DW_IC_COMP_VERSION); i2c_dw_init() 365 dw_writel(dev, dev->sda_hold_time, DW_IC_SDA_HOLD); i2c_dw_init() 367 dev_warn(dev->dev, i2c_dw_init() 372 dw_writel(dev, dev->tx_fifo_depth / 2, DW_IC_TX_TL); i2c_dw_init() 373 dw_writel(dev, 0, DW_IC_RX_TL); i2c_dw_init() 376 dw_writel(dev, dev->master_cfg , DW_IC_CON); i2c_dw_init() 378 if (dev->release_lock) i2c_dw_init() 379 dev->release_lock(dev); i2c_dw_init() 387 static int i2c_dw_wait_bus_not_busy(struct dw_i2c_dev dev) i2c_dw_wait_bus_not_busy() argument 391 while (dw_readl(dev, DW_IC_STATUS) & DW_IC_STATUS_ACTIVITY) { i2c_dw_wait_bus_not_busy() 393 dev_warn(dev->dev, "timeout waiting for bus ready\n"); i2c_dw_wait_bus_not_busy() 403 static void i2c_dw_xfer_init(struct dw_i2c_dev dev) i2c_dw_xfer_init() argument 405 struct i2c_msg msgs = dev->msgs; i2c_dw_xfer_init() 409 __i2c_dw_enable(dev, false); i2c_dw_xfer_init() 412 ic_con = dw_readl(dev, DW_IC_CON); i2c_dw_xfer_init() 413 if (msgs[dev->msg_write_idx].flags & I2C_M_TEN) { i2c_dw_xfer_init() 426 dw_writel(dev, ic_con, DW_IC_CON); i2c_dw_xfer_init() 432 dw_writel(dev, msgs[dev->msg_write_idx].addr \| ic_tar, DW_IC_TAR); i2c_dw_xfer_init() 435 i2c_dw_disable_int(dev); i2c_dw_xfer_init() 438 __i2c_dw_enable(dev, true); i2c_dw_xfer_init() 441 i2c_dw_clear_int(dev); i2c_dw_xfer_init() 442 dw_writel(dev, DW_IC_INTR_DEFAULT_MASK, DW_IC_INTR_MASK); i2c_dw_xfer_init() 452 i2c_dw_xfer_msg(struct dw_i2c_dev dev) i2c_dw_xfer_msg() argument 454 struct i2c_msg msgs = dev->msgs; i2c_dw_xfer_msg() 457 u32 addr = msgs[dev->msg_write_idx].addr; i2c_dw_xfer_msg() 458 u32 buf_len = dev->tx_buf_len; i2c_dw_xfer_msg() 459 u8 buf = dev->tx_buf; i2c_dw_xfer_msg() 464 for (; dev->msg_write_idx < dev->msgs_num; dev->msg_write_idx++) { i2c_dw_xfer_msg() 470 if (msgs[dev->msg_write_idx].addr != addr) { i2c_dw_xfer_msg() 471 dev_err(dev->dev, i2c_dw_xfer_msg() 473 dev->msg_err = -EINVAL; i2c_dw_xfer_msg() 477 if (msgs[dev->msg_write_idx].len == 0) { i2c_dw_xfer_msg() 478 dev_err(dev->dev, i2c_dw_xfer_msg() 480 dev->msg_err = -EINVAL; i2c_dw_xfer_msg() 484 if (!(dev->status & STATUS_WRITE_IN_PROGRESS)) { i2c_dw_xfer_msg() 486 buf = msgs[dev->msg_write_idx].buf; i2c_dw_xfer_msg() 487 buf_len = msgs[dev->msg_write_idx].len; i2c_dw_xfer_msg() 493 if ((dev->master_cfg & DW_IC_CON_RESTART_EN) && i2c_dw_xfer_msg() 494 (dev->msg_write_idx > 0)) i2c_dw_xfer_msg() 498 tx_limit = dev->tx_fifo_depth - dw_readl(dev, DW_IC_TXFLR); i2c_dw_xfer_msg() 499 rx_limit = dev->rx_fifo_depth - dw_readl(dev, DW_IC_RXFLR); i2c_dw_xfer_msg() 510 if (dev->msg_write_idx == dev->msgs_num - 1 && i2c_dw_xfer_msg() 519 if (msgs[dev->msg_write_idx].flags & I2C_M_RD) { i2c_dw_xfer_msg() 522 if (rx_limit - dev->rx_outstanding <= 0) i2c_dw_xfer_msg() 525 dw_writel(dev, cmd \| 0x100, DW_IC_DATA_CMD); i2c_dw_xfer_msg() 527 dev->rx_outstanding++; i2c_dw_xfer_msg() 529 dw_writel(dev, cmd \| buf++, DW_IC_DATA_CMD); i2c_dw_xfer_msg() 533 dev->tx_buf = buf; i2c_dw_xfer_msg() 534 dev->tx_buf_len = buf_len; i2c_dw_xfer_msg() 538 dev->status \|= STATUS_WRITE_IN_PROGRESS; i2c_dw_xfer_msg() 541 dev->status &= ~STATUS_WRITE_IN_PROGRESS; i2c_dw_xfer_msg() 548 if (dev->msg_write_idx == dev->msgs_num) i2c_dw_xfer_msg() 551 if (dev->msg_err) i2c_dw_xfer_msg() 554 dw_writel(dev, intr_mask, DW_IC_INTR_MASK); i2c_dw_xfer_msg() 558 i2c_dw_read(struct dw_i2c_dev dev) i2c_dw_read() argument 560 struct i2c_msg msgs = dev->msgs; i2c_dw_read() 563 for (; dev->msg_read_idx < dev->msgs_num; dev->msg_read_idx++) { i2c_dw_read() 567 if (!(msgs[dev->msg_read_idx].flags & I2C_M_RD)) i2c_dw_read() 570 if (!(dev->status & STATUS_READ_IN_PROGRESS)) { i2c_dw_read() 571 len = msgs[dev->msg_read_idx].len; i2c_dw_read() 572 buf = msgs[dev->msg_read_idx].buf; i2c_dw_read() 574 len = dev->rx_buf_len; i2c_dw_read() 575 buf = dev->rx_buf; i2c_dw_read() 578 rx_valid = dw_readl(dev, DW_IC_RXFLR); i2c_dw_read() 581 buf++ = dw_readl(dev, DW_IC_DATA_CMD); i2c_dw_read() 582 dev->rx_outstanding--; i2c_dw_read() 586 dev->status \|= STATUS_READ_IN_PROGRESS; i2c_dw_read() 587 dev->rx_buf_len = len; i2c_dw_read() 588 dev->rx_buf = buf; i2c_dw_read() 591 dev->status &= ~STATUS_READ_IN_PROGRESS; i2c_dw_read() 595 static int i2c_dw_handle_tx_abort(struct dw_i2c_dev dev) i2c_dw_handle_tx_abort() argument 597 unsigned long abort_source = dev->abort_source; i2c_dw_handle_tx_abort() 602 dev_dbg(dev->dev, i2c_dw_handle_tx_abort() 608 dev_err(dev->dev, "%s: %s\n", __func__, abort_sources[i]); i2c_dw_handle_tx_abort() 624 struct dw_i2c_dev dev = i2c_get_adapdata(adap); i2c_dw_xfer() local 627 dev_dbg(dev->dev, "%s: msgs: %d\n", __func__, num); i2c_dw_xfer() 629 mutex_lock(&dev->lock); i2c_dw_xfer() 630 pm_runtime_get_sync(dev->dev); i2c_dw_xfer() 632 reinit_completion(&dev->cmd_complete); i2c_dw_xfer() 633 dev->msgs = msgs; i2c_dw_xfer() 634 dev->msgs_num = num; i2c_dw_xfer() 635 dev->cmd_err = 0; i2c_dw_xfer() 636 dev->msg_write_idx = 0; i2c_dw_xfer() 637 dev->msg_read_idx = 0; i2c_dw_xfer() 638 dev->msg_err = 0; i2c_dw_xfer() 639 dev->status = STATUS_IDLE; i2c_dw_xfer() 640 dev->abort_source = 0; i2c_dw_xfer() 641 dev->rx_outstanding = 0; i2c_dw_xfer() 643 if (dev->acquire_lock) { i2c_dw_xfer() 644 ret = dev->acquire_lock(dev); i2c_dw_xfer() 646 dev_err(dev->dev, "couldn't acquire bus ownership\n"); i2c_dw_xfer() 651 ret = i2c_dw_wait_bus_not_busy(dev); i2c_dw_xfer() 656 i2c_dw_xfer_init(dev); i2c_dw_xfer() 659 if (!wait_for_completion_timeout(&dev->cmd_complete, HZ)) { i2c_dw_xfer() 660 dev_err(dev->dev, "controller timed out\n"); i2c_dw_xfer() 662 i2c_dw_init(dev); i2c_dw_xfer() 668 We must disable the adapter before unlocking the &dev->lock mutex i2c_dw_xfer() 674 __i2c_dw_enable(dev, false); i2c_dw_xfer() 676 if (dev->msg_err) { i2c_dw_xfer() 677 ret = dev->msg_err; i2c_dw_xfer() 682 if (likely(!dev->cmd_err)) { i2c_dw_xfer() 688 if (dev->cmd_err == DW_IC_ERR_TX_ABRT) { i2c_dw_xfer() 689 ret = i2c_dw_handle_tx_abort(dev); i2c_dw_xfer() 695 if (dev->release_lock) i2c_dw_xfer() 696 dev->release_lock(dev); i2c_dw_xfer() 699 pm_runtime_mark_last_busy(dev->dev); i2c_dw_xfer() 700 pm_runtime_put_autosuspend(dev->dev); i2c_dw_xfer() 701 mutex_unlock(&dev->lock); i2c_dw_xfer() 709 struct dw_i2c_dev dev = i2c_get_adapdata(adap); i2c_dw_func() local 710 return dev->functionality; i2c_dw_func() 714 static u32 i2c_dw_read_clear_intrbits(struct dw_i2c_dev dev) i2c_dw_read_clear_intrbits() argument 730 stat = dw_readl(dev, DW_IC_INTR_STAT); i2c_dw_read_clear_intrbits() 740 dw_readl(dev, DW_IC_CLR_RX_UNDER); i2c_dw_read_clear_intrbits() 742 dw_readl(dev, DW_IC_CLR_RX_OVER); i2c_dw_read_clear_intrbits() 744 dw_readl(dev, DW_IC_CLR_TX_OVER); i2c_dw_read_clear_intrbits() 746 dw_readl(dev, DW_IC_CLR_RD_REQ); i2c_dw_read_clear_intrbits() 752 dev->abort_source = dw_readl(dev, DW_IC_TX_ABRT_SOURCE); i2c_dw_read_clear_intrbits() 753 dw_readl(dev, DW_IC_CLR_TX_ABRT); i2c_dw_read_clear_intrbits() 756 dw_readl(dev, DW_IC_CLR_RX_DONE); i2c_dw_read_clear_intrbits() 758 dw_readl(dev, DW_IC_CLR_ACTIVITY); i2c_dw_read_clear_intrbits() 760 dw_readl(dev, DW_IC_CLR_STOP_DET); i2c_dw_read_clear_intrbits() 762 dw_readl(dev, DW_IC_CLR_START_DET); i2c_dw_read_clear_intrbits() 764 dw_readl(dev, DW_IC_CLR_GEN_CALL); i2c_dw_read_clear_intrbits() 775 struct dw_i2c_dev dev = dev_id; i2c_dw_isr() local 778 enabled = dw_readl(dev, DW_IC_ENABLE); i2c_dw_isr() 779 stat = dw_readl(dev, DW_IC_RAW_INTR_STAT); i2c_dw_isr() 780 dev_dbg(dev->dev, "%s: %s enabled= 0x%x stat=0x%x\n", __func__, i2c_dw_isr() 781 dev->adapter.name, enabled, stat); i2c_dw_isr() 785 stat = i2c_dw_read_clear_intrbits(dev); i2c_dw_isr() 788 dev->cmd_err \|= DW_IC_ERR_TX_ABRT; i2c_dw_isr() 789 dev->status = STATUS_IDLE; i2c_dw_isr() 795 dw_writel(dev, 0, DW_IC_INTR_MASK); i2c_dw_isr() 800 i2c_dw_read(dev); i2c_dw_isr() 803 i2c_dw_xfer_msg(dev); i2c_dw_isr() 812 if ((stat & (DW_IC_INTR_TX_ABRT \| DW_IC_INTR_STOP_DET)) \|\| dev->msg_err) i2c_dw_isr() 813 complete(&dev->cmd_complete); i2c_dw_isr() 819 void i2c_dw_enable(struct dw_i2c_dev dev) i2c_dw_enable() argument 822 __i2c_dw_enable(dev, true); i2c_dw_enable() 826 u32 i2c_dw_is_enabled(struct dw_i2c_dev dev) i2c_dw_is_enabled() argument 828 return dw_readl(dev, DW_IC_ENABLE); i2c_dw_is_enabled() 832 void i2c_dw_disable(struct dw_i2c_dev dev) i2c_dw_disable() argument 835 __i2c_dw_enable(dev, false); i2c_dw_disable() 838 dw_writel(dev, 0, DW_IC_INTR_MASK); i2c_dw_disable() 839 dw_readl(dev, DW_IC_CLR_INTR); i2c_dw_disable() 843 void i2c_dw_clear_int(struct dw_i2c_dev dev) i2c_dw_clear_int() argument 845 dw_readl(dev, DW_IC_CLR_INTR); i2c_dw_clear_int() 849 void i2c_dw_disable_int(struct dw_i2c_dev dev) i2c_dw_disable_int() argument 851 dw_writel(dev, 0, DW_IC_INTR_MASK); i2c_dw_disable_int() 855 u32 i2c_dw_read_comp_param(struct dw_i2c_dev *dev) i2c_dw_read_comp_param() argument 857 return dw_readl(dev, DW_IC_COMP_PARAM_1); i2c_dw_read_comp_param()
H A D	i2c-davinci.c	126 struct device dev; member in struct:davinci_i2c_dev 175 static void i2c_davinci_calc_clk_dividers(struct davinci_i2c_dev dev) i2c_davinci_calc_clk_dividers() argument 177 struct davinci_i2c_platform_data pdata = dev->pdata; i2c_davinci_calc_clk_dividers() 183 u32 input_clock = clk_get_rate(dev->clk); i2c_davinci_calc_clk_dividers() 211 davinci_i2c_write_reg(dev, DAVINCI_I2C_PSC_REG, psc); i2c_davinci_calc_clk_dividers() 212 davinci_i2c_write_reg(dev, DAVINCI_I2C_CLKH_REG, clkh); i2c_davinci_calc_clk_dividers() 213 davinci_i2c_write_reg(dev, DAVINCI_I2C_CLKL_REG, clkl); i2c_davinci_calc_clk_dividers() 215 dev_dbg(dev->dev, "input_clock = %d, CLK = %d\n", input_clock, clk); i2c_davinci_calc_clk_dividers() 223 static int i2c_davinci_init(struct davinci_i2c_dev dev) i2c_davinci_init() argument 225 struct davinci_i2c_platform_data pdata = dev->pdata; i2c_davinci_init() 228 davinci_i2c_reset_ctrl(dev, 0); i2c_davinci_init() 231 i2c_davinci_calc_clk_dividers(dev); i2c_davinci_init() 236 davinci_i2c_write_reg(dev, DAVINCI_I2C_OAR_REG, 0x08); i2c_davinci_init() 238 dev_dbg(dev->dev, "PSC = %d\n", i2c_davinci_init() 239 davinci_i2c_read_reg(dev, DAVINCI_I2C_PSC_REG)); i2c_davinci_init() 240 dev_dbg(dev->dev, "CLKL = %d\n", i2c_davinci_init() 241 davinci_i2c_read_reg(dev, DAVINCI_I2C_CLKL_REG)); i2c_davinci_init() 242 dev_dbg(dev->dev, "CLKH = %d\n", i2c_davinci_init() 243 davinci_i2c_read_reg(dev, DAVINCI_I2C_CLKH_REG)); i2c_davinci_init() 244 dev_dbg(dev->dev, "bus_freq = %dkHz, bus_delay = %d\n", i2c_davinci_init() 249 davinci_i2c_reset_ctrl(dev, 1); i2c_davinci_init() 252 davinci_i2c_write_reg(dev, DAVINCI_I2C_IMR_REG, I2C_DAVINCI_INTR_ALL); i2c_davinci_init() 263 struct davinci_i2c_dev dev = i2c_get_adapdata(adap); davinci_i2c_prepare_recovery() local 266 davinci_i2c_write_reg(dev, DAVINCI_I2C_IMR_REG, 0); davinci_i2c_prepare_recovery() 269 davinci_i2c_reset_ctrl(dev, 0); davinci_i2c_prepare_recovery() 274 struct davinci_i2c_dev dev = i2c_get_adapdata(adap); davinci_i2c_unprepare_recovery() local 276 i2c_davinci_init(dev); davinci_i2c_unprepare_recovery() 287 struct davinci_i2c_dev dev = i2c_get_adapdata(adap); davinci_i2c_set_scl() local 290 davinci_i2c_write_reg(dev, DAVINCI_I2C_DSET_REG, davinci_i2c_set_scl() 293 davinci_i2c_write_reg(dev, DAVINCI_I2C_DCLR_REG, davinci_i2c_set_scl() 299 struct davinci_i2c_dev dev = i2c_get_adapdata(adap); davinci_i2c_get_scl() local 303 val = davinci_i2c_read_reg(dev, DAVINCI_I2C_DIN_REG); davinci_i2c_get_scl() 309 struct davinci_i2c_dev dev = i2c_get_adapdata(adap); davinci_i2c_get_sda() local 313 val = davinci_i2c_read_reg(dev, DAVINCI_I2C_DIN_REG); davinci_i2c_get_sda() 319 struct davinci_i2c_dev dev = i2c_get_adapdata(adap); davinci_i2c_scl_prepare_recovery() local 324 davinci_i2c_write_reg(dev, DAVINCI_I2C_DIR_REG, DAVINCI_I2C_DIR_PDIR0); davinci_i2c_scl_prepare_recovery() 327 davinci_i2c_write_reg(dev, DAVINCI_I2C_FUNC_REG, davinci_i2c_scl_prepare_recovery() 333 struct davinci_i2c_dev dev = i2c_get_adapdata(adap); davinci_i2c_scl_unprepare_recovery() local 336 davinci_i2c_write_reg(dev, DAVINCI_I2C_FUNC_REG, 0); davinci_i2c_scl_unprepare_recovery() 353 static int i2c_davinci_wait_bus_not_busy(struct davinci_i2c_dev dev, i2c_davinci_wait_bus_not_busy() argument 359 timeout = jiffies + dev->adapter.timeout; i2c_davinci_wait_bus_not_busy() 360 while (davinci_i2c_read_reg(dev, DAVINCI_I2C_STR_REG) i2c_davinci_wait_bus_not_busy() 364 dev_warn(dev->dev, i2c_davinci_wait_bus_not_busy() 370 i2c_recover_bus(&dev->adapter); i2c_davinci_wait_bus_not_busy() 387 struct davinci_i2c_dev dev = i2c_get_adapdata(adap); i2c_davinci_xfer_msg() local 388 struct davinci_i2c_platform_data pdata = dev->pdata; i2c_davinci_xfer_msg() 398 davinci_i2c_write_reg(dev, DAVINCI_I2C_SAR_REG, msg->addr); i2c_davinci_xfer_msg() 400 dev->buf = msg->buf; i2c_davinci_xfer_msg() 401 dev->buf_len = msg->len; i2c_davinci_xfer_msg() 402 dev->stop = stop; i2c_davinci_xfer_msg() 404 davinci_i2c_write_reg(dev, DAVINCI_I2C_CNT_REG, dev->buf_len); i2c_davinci_xfer_msg() 406 reinit_completion(&dev->cmd_complete); i2c_davinci_xfer_msg() 407 dev->cmd_err = 0; i2c_davinci_xfer_msg() 421 w = davinci_i2c_read_reg(dev, DAVINCI_I2C_IMR_REG); i2c_davinci_xfer_msg() 426 davinci_i2c_write_reg(dev, DAVINCI_I2C_IMR_REG, w); i2c_davinci_xfer_msg() 428 dev->terminate = 0; i2c_davinci_xfer_msg() 435 davinci_i2c_write_reg(dev, DAVINCI_I2C_MDR_REG, flag); i2c_davinci_xfer_msg() 444 if ((!(msg->flags & I2C_M_RD)) && dev->buf_len) { i2c_davinci_xfer_msg() 445 davinci_i2c_write_reg(dev, DAVINCI_I2C_DXR_REG, dev->buf++); i2c_davinci_xfer_msg() 446 dev->buf_len--; i2c_davinci_xfer_msg() 453 davinci_i2c_write_reg(dev, DAVINCI_I2C_MDR_REG, flag); i2c_davinci_xfer_msg() 455 time_left = wait_for_completion_timeout(&dev->cmd_complete, i2c_davinci_xfer_msg() 456 dev->adapter.timeout); i2c_davinci_xfer_msg() 458 dev_err(dev->dev, "controller timed out\n"); i2c_davinci_xfer_msg() 460 dev->buf_len = 0; i2c_davinci_xfer_msg() 463 if (dev->buf_len) { i2c_davinci_xfer_msg() 465 * or dev->cmd_err denotes an error. i2c_davinci_xfer_msg() 467 dev_err(dev->dev, "abnormal termination buf_len=%i\n", i2c_davinci_xfer_msg() 468 dev->buf_len); i2c_davinci_xfer_msg() 469 dev->terminate = 1; i2c_davinci_xfer_msg() 471 dev->buf_len = 0; i2c_davinci_xfer_msg() 476 if (likely(!dev->cmd_err)) i2c_davinci_xfer_msg() 480 if (dev->cmd_err & DAVINCI_I2C_STR_AL) { i2c_davinci_xfer_msg() 481 i2c_davinci_init(dev); i2c_davinci_xfer_msg() 485 if (dev->cmd_err & DAVINCI_I2C_STR_NACK) { i2c_davinci_xfer_msg() 488 w = davinci_i2c_read_reg(dev, DAVINCI_I2C_MDR_REG); i2c_davinci_xfer_msg() 490 davinci_i2c_write_reg(dev, DAVINCI_I2C_MDR_REG, w); i2c_davinci_xfer_msg() 502 struct davinci_i2c_dev dev = i2c_get_adapdata(adap); i2c_davinci_xfer() local 506 dev_dbg(dev->dev, "%s: msgs: %d\n", __func__, num); i2c_davinci_xfer() 508 ret = i2c_davinci_wait_bus_not_busy(dev, 1); i2c_davinci_xfer() 510 dev_warn(dev->dev, "timeout waiting for bus ready\n"); i2c_davinci_xfer() 516 dev_dbg(dev->dev, "%s [%d/%d] ret: %d\n", __func__, i + 1, num, i2c_davinci_xfer() 523 complete(&dev->xfr_complete); i2c_davinci_xfer() 534 static void terminate_read(struct davinci_i2c_dev dev) terminate_read() argument 536 u16 w = davinci_i2c_read_reg(dev, DAVINCI_I2C_MDR_REG); terminate_read() 538 davinci_i2c_write_reg(dev, DAVINCI_I2C_MDR_REG, w); terminate_read() 541 davinci_i2c_read_reg(dev, DAVINCI_I2C_DRR_REG); terminate_read() 542 if (!dev->terminate) terminate_read() 543 dev_err(dev->dev, "RDR IRQ while no data requested\n"); terminate_read() 545 static void terminate_write(struct davinci_i2c_dev dev) terminate_write() argument 547 u16 w = davinci_i2c_read_reg(dev, DAVINCI_I2C_MDR_REG); terminate_write() 549 davinci_i2c_write_reg(dev, DAVINCI_I2C_MDR_REG, w); terminate_write() 551 if (!dev->terminate) terminate_write() 552 dev_dbg(dev->dev, "TDR IRQ while no data to send\n"); terminate_write() 561 struct davinci_i2c_dev dev = dev_id; i2c_davinci_isr() local 566 while ((stat = davinci_i2c_read_reg(dev, DAVINCI_I2C_IVR_REG))) { i2c_davinci_isr() 567 dev_dbg(dev->dev, "%s: stat=0x%x\n", __func__, stat); i2c_davinci_isr() 569 dev_warn(dev->dev, "Too much work in one IRQ\n"); i2c_davinci_isr() 576 dev->cmd_err \|= DAVINCI_I2C_STR_AL; i2c_davinci_isr() 577 dev->buf_len = 0; i2c_davinci_isr() 578 complete(&dev->cmd_complete); i2c_davinci_isr() 582 dev->cmd_err \|= DAVINCI_I2C_STR_NACK; i2c_davinci_isr() 583 dev->buf_len = 0; i2c_davinci_isr() 584 complete(&dev->cmd_complete); i2c_davinci_isr() 588 davinci_i2c_write_reg(dev, i2c_davinci_isr() 590 if (((dev->buf_len == 0) && (dev->stop != 0)) \|\| i2c_davinci_isr() 591 (dev->cmd_err & DAVINCI_I2C_STR_NACK)) { i2c_davinci_isr() 592 w = davinci_i2c_read_reg(dev, i2c_davinci_isr() 595 davinci_i2c_write_reg(dev, i2c_davinci_isr() 598 complete(&dev->cmd_complete); i2c_davinci_isr() 602 if (dev->buf_len) { i2c_davinci_isr() 603 dev->buf++ = i2c_davinci_isr() 604 davinci_i2c_read_reg(dev, i2c_davinci_isr() 606 dev->buf_len--; i2c_davinci_isr() 607 if (dev->buf_len) i2c_davinci_isr() 610 davinci_i2c_write_reg(dev, i2c_davinci_isr() 615 terminate_read(dev); i2c_davinci_isr() 620 if (dev->buf_len) { i2c_davinci_isr() 621 davinci_i2c_write_reg(dev, DAVINCI_I2C_DXR_REG, i2c_davinci_isr() 622 dev->buf++); i2c_davinci_isr() 623 dev->buf_len--; i2c_davinci_isr() 624 if (dev->buf_len) i2c_davinci_isr() 627 w = davinci_i2c_read_reg(dev, i2c_davinci_isr() 630 davinci_i2c_write_reg(dev, i2c_davinci_isr() 635 terminate_write(dev); i2c_davinci_isr() 640 davinci_i2c_write_reg(dev, i2c_davinci_isr() 642 complete(&dev->cmd_complete); i2c_davinci_isr() 646 dev_dbg(dev->dev, "Address as slave interrupt\n"); i2c_davinci_isr() 650 dev_warn(dev->dev, "Unrecognized irq stat %d\n", stat); i2c_davinci_isr() 662 struct davinci_i2c_dev dev; i2c_davinci_cpufreq_transition() local 664 dev = container_of(nb, struct davinci_i2c_dev, freq_transition); i2c_davinci_cpufreq_transition() 666 wait_for_completion(&dev->xfr_complete); i2c_davinci_cpufreq_transition() 667 davinci_i2c_reset_ctrl(dev, 0); i2c_davinci_cpufreq_transition() 669 i2c_davinci_calc_clk_dividers(dev); i2c_davinci_cpufreq_transition() 670 davinci_i2c_reset_ctrl(dev, 1); i2c_davinci_cpufreq_transition() 676 static inline int i2c_davinci_cpufreq_register(struct davinci_i2c_dev dev) i2c_davinci_cpufreq_register() argument 678 dev->freq_transition.notifier_call = i2c_davinci_cpufreq_transition; i2c_davinci_cpufreq_register() 680 return cpufreq_register_notifier(&dev->freq_transition, i2c_davinci_cpufreq_register() 684 static inline void i2c_davinci_cpufreq_deregister(struct davinci_i2c_dev dev) i2c_davinci_cpufreq_deregister() argument 686 cpufreq_unregister_notifier(&dev->freq_transition, i2c_davinci_cpufreq_deregister() 690 static inline int i2c_davinci_cpufreq_register(struct davinci_i2c_dev dev) i2c_davinci_cpufreq_register() argument 695 static inline void i2c_davinci_cpufreq_deregister(struct davinci_i2c_dev dev) i2c_davinci_cpufreq_deregister() argument 713 struct davinci_i2c_dev dev; davinci_i2c_probe() local 723 dev_err(&pdev->dev, davinci_i2c_probe() 728 dev = devm_kzalloc(&pdev->dev, sizeof(struct davinci_i2c_dev), davinci_i2c_probe() 730 if (!dev) { davinci_i2c_probe() 731 dev_err(&pdev->dev, "Memory allocation failed\n"); davinci_i2c_probe() 735 init_completion(&dev->cmd_complete); davinci_i2c_probe() 737 init_completion(&dev->xfr_complete); davinci_i2c_probe() 739 dev->dev = &pdev->dev; davinci_i2c_probe() 740 dev->irq = irq; davinci_i2c_probe() 741 dev->pdata = dev_get_platdata(&pdev->dev); davinci_i2c_probe() 742 platform_set_drvdata(pdev, dev); davinci_i2c_probe() 744 if (!dev->pdata && pdev->dev.of_node) { davinci_i2c_probe() 747 dev->pdata = devm_kzalloc(&pdev->dev, davinci_i2c_probe() 749 if (!dev->pdata) davinci_i2c_probe() 752 memcpy(dev->pdata, &davinci_i2c_platform_data_default, davinci_i2c_probe() 754 if (!of_property_read_u32(pdev->dev.of_node, "clock-frequency", davinci_i2c_probe() 756 dev->pdata->bus_freq = prop / 1000; davinci_i2c_probe() 758 dev->pdata->has_pfunc = davinci_i2c_probe() 759 of_property_read_bool(pdev->dev.of_node, davinci_i2c_probe() 761 } else if (!dev->pdata) { davinci_i2c_probe() 762 dev->pdata = &davinci_i2c_platform_data_default; davinci_i2c_probe() 765 dev->clk = devm_clk_get(&pdev->dev, NULL); davinci_i2c_probe() 766 if (IS_ERR(dev->clk)) davinci_i2c_probe() 768 clk_prepare_enable(dev->clk); davinci_i2c_probe() 771 dev->base = devm_ioremap_resource(&pdev->dev, mem); davinci_i2c_probe() 772 if (IS_ERR(dev->base)) { davinci_i2c_probe() 773 r = PTR_ERR(dev->base); davinci_i2c_probe() 777 i2c_davinci_init(dev); davinci_i2c_probe() 779 r = devm_request_irq(&pdev->dev, dev->irq, i2c_davinci_isr, 0, davinci_i2c_probe() 780 pdev->name, dev); davinci_i2c_probe() 782 dev_err(&pdev->dev, "failure requesting irq %i\n", dev->irq); davinci_i2c_probe() 786 r = i2c_davinci_cpufreq_register(dev); davinci_i2c_probe() 788 dev_err(&pdev->dev, "failed to register cpufreq\n"); davinci_i2c_probe() 792 adap = &dev->adapter; davinci_i2c_probe() 793 i2c_set_adapdata(adap, dev); davinci_i2c_probe() 798 adap->dev.parent = &pdev->dev; davinci_i2c_probe() 800 adap->dev.of_node = pdev->dev.of_node; davinci_i2c_probe() 802 if (dev->pdata->has_pfunc) davinci_i2c_probe() 804 else if (dev->pdata->scl_pin) { davinci_i2c_probe() 806 adap->bus_recovery_info->scl_gpio = dev->pdata->scl_pin; davinci_i2c_probe() 807 adap->bus_recovery_info->sda_gpio = dev->pdata->sda_pin; davinci_i2c_probe() 813 dev_err(&pdev->dev, "failure adding adapter\n"); davinci_i2c_probe() 820 clk_disable_unprepare(dev->clk); davinci_i2c_probe() 821 dev->clk = NULL; davinci_i2c_probe() 827 struct davinci_i2c_dev dev = platform_get_drvdata(pdev); davinci_i2c_remove() local 829 i2c_davinci_cpufreq_deregister(dev); davinci_i2c_remove() 831 i2c_del_adapter(&dev->adapter); davinci_i2c_remove() 833 clk_disable_unprepare(dev->clk); davinci_i2c_remove() 834 dev->clk = NULL; davinci_i2c_remove() 836 davinci_i2c_write_reg(dev, DAVINCI_I2C_MDR_REG, 0); davinci_i2c_remove() 842 static int davinci_i2c_suspend(struct device dev) davinci_i2c_suspend() argument 844 struct platform_device pdev = to_platform_device(dev); davinci_i2c_suspend() 854 static int davinci_i2c_resume(struct device dev) davinci_i2c_resume() argument 856 struct platform_device *pdev = to_platform_device(dev); davinci_i2c_resume()
H A D	i2c-omap.c	188 struct device dev; member in struct:omap_i2c_dev 195 void (set_mpu_wkup_lat)(struct device dev, 285 static void __omap_i2c_init(struct omap_i2c_dev dev) __omap_i2c_init() argument 288 omap_i2c_write_reg(dev, OMAP_I2C_CON_REG, 0); __omap_i2c_init() 291 omap_i2c_write_reg(dev, OMAP_I2C_PSC_REG, dev->pscstate); __omap_i2c_init() 294 omap_i2c_write_reg(dev, OMAP_I2C_SCLL_REG, dev->scllstate); __omap_i2c_init() 295 omap_i2c_write_reg(dev, OMAP_I2C_SCLH_REG, dev->sclhstate); __omap_i2c_init() 296 if (dev->rev >= OMAP_I2C_REV_ON_3430_3530) __omap_i2c_init() 297 omap_i2c_write_reg(dev, OMAP_I2C_WE_REG, dev->westate); __omap_i2c_init() 300 omap_i2c_write_reg(dev, OMAP_I2C_CON_REG, OMAP_I2C_CON_EN); __omap_i2c_init() 312 if (dev->iestate) __omap_i2c_init() 313 omap_i2c_write_reg(dev, OMAP_I2C_IE_REG, dev->iestate); __omap_i2c_init() 316 static int omap_i2c_reset(struct omap_i2c_dev dev) omap_i2c_reset() argument 321 if (dev->rev >= OMAP_I2C_OMAP1_REV_2) { omap_i2c_reset() 322 sysc = omap_i2c_read_reg(dev, OMAP_I2C_SYSC_REG); omap_i2c_reset() 325 omap_i2c_write_reg(dev, OMAP_I2C_CON_REG, omap_i2c_reset() 326 omap_i2c_read_reg(dev, OMAP_I2C_CON_REG) & omap_i2c_reset() 329 omap_i2c_write_reg(dev, OMAP_I2C_SYSC_REG, SYSC_SOFTRESET_MASK); omap_i2c_reset() 333 omap_i2c_write_reg(dev, OMAP_I2C_CON_REG, OMAP_I2C_CON_EN); omap_i2c_reset() 334 while (!(omap_i2c_read_reg(dev, OMAP_I2C_SYSS_REG) & omap_i2c_reset() 337 dev_warn(dev->dev, "timeout waiting " omap_i2c_reset() 345 omap_i2c_write_reg(dev, OMAP_I2C_SYSC_REG, sysc); omap_i2c_reset() 347 if (dev->rev > OMAP_I2C_REV_ON_3430_3530) { omap_i2c_reset() 349 dev->bb_valid = 0; omap_i2c_reset() 356 static int omap_i2c_init(struct omap_i2c_dev dev) omap_i2c_init() argument 364 if (dev->rev >= OMAP_I2C_REV_ON_3430_3530) { omap_i2c_init() 370 dev->westate = OMAP_I2C_WE_ALL; omap_i2c_init() 373 if (dev->flags & OMAP_I2C_FLAG_ALWAYS_ARMXOR_CLK) { omap_i2c_init() 380 fclk = clk_get(dev->dev, "fck"); omap_i2c_init() 397 if (!(dev->flags & OMAP_I2C_FLAG_SIMPLE_CLOCK)) { omap_i2c_init() 405 if (dev->speed > 400 \|\| omap_i2c_init() 406 dev->flags & OMAP_I2C_FLAG_FORCE_19200_INT_CLK) omap_i2c_init() 408 else if (dev->speed > 100) omap_i2c_init() 412 fclk = clk_get(dev->dev, "fck"); omap_i2c_init() 421 if (dev->speed > 400) { omap_i2c_init() 430 scl = fclk_rate / dev->speed; omap_i2c_init() 433 } else if (dev->speed > 100) { omap_i2c_init() 437 scl = internal_clk / dev->speed; omap_i2c_init() 442 fsscll = internal_clk / (dev->speed * 2) - 7; omap_i2c_init() 443 fssclh = internal_clk / (dev->speed * 2) - 5; omap_i2c_init() 452 scll = fclk_rate / (dev->speed * 2) - 7 + psc; omap_i2c_init() 453 sclh = fclk_rate / (dev->speed * 2) - 7 + psc; omap_i2c_init() 456 dev->iestate = (OMAP_I2C_IE_XRDY \| OMAP_I2C_IE_RRDY \| omap_i2c_init() 458 OMAP_I2C_IE_AL) \| ((dev->fifo_size) ? omap_i2c_init() 461 dev->pscstate = psc; omap_i2c_init() 462 dev->scllstate = scll; omap_i2c_init() 463 dev->sclhstate = sclh; omap_i2c_init() 465 if (dev->rev <= OMAP_I2C_REV_ON_3430_3530) { omap_i2c_init() 467 dev->bb_valid = 1; omap_i2c_init() 470 __omap_i2c_init(dev); omap_i2c_init() 478 static int omap_i2c_wait_for_bb(struct omap_i2c_dev dev) omap_i2c_wait_for_bb() argument 483 while (omap_i2c_read_reg(dev, OMAP_I2C_STAT_REG) & OMAP_I2C_STAT_BB) { omap_i2c_wait_for_bb() 485 dev_warn(dev->dev, "timeout waiting for bus ready\n"); omap_i2c_wait_for_bb() 522 static int omap_i2c_wait_for_bb_valid(struct omap_i2c_dev dev) omap_i2c_wait_for_bb_valid() argument 529 if (dev->bb_valid) omap_i2c_wait_for_bb_valid() 534 stat = omap_i2c_read_reg(dev, OMAP_I2C_STAT_REG); omap_i2c_wait_for_bb_valid() 547 systest = omap_i2c_read_reg(dev, OMAP_I2C_SYSTEST_REG); omap_i2c_wait_for_bb_valid() 568 dev_warn(dev->dev, "timeout waiting for bus ready\n"); omap_i2c_wait_for_bb_valid() 575 dev->bb_valid = 1; omap_i2c_wait_for_bb_valid() 579 static void omap_i2c_resize_fifo(struct omap_i2c_dev dev, u8 size, bool is_rx) omap_i2c_resize_fifo() argument 583 if (dev->flags & OMAP_I2C_FLAG_NO_FIFO) omap_i2c_resize_fifo() 593 dev->threshold = clamp(size, (u8) 1, dev->fifo_size); omap_i2c_resize_fifo() 595 buf = omap_i2c_read_reg(dev, OMAP_I2C_BUF_REG); omap_i2c_resize_fifo() 600 buf \|= ((dev->threshold - 1) << 8) \| OMAP_I2C_BUF_RXFIF_CLR; omap_i2c_resize_fifo() 604 buf \|= (dev->threshold - 1) \| OMAP_I2C_BUF_TXFIF_CLR; omap_i2c_resize_fifo() 607 omap_i2c_write_reg(dev, OMAP_I2C_BUF_REG, buf); omap_i2c_resize_fifo() 609 if (dev->rev < OMAP_I2C_REV_ON_3630) omap_i2c_resize_fifo() 610 dev->b_hw = 1; / Enable hardware fixes / omap_i2c_resize_fifo() 613 if (dev->set_mpu_wkup_lat != NULL) omap_i2c_resize_fifo() 614 dev->latency = (1000000 dev->threshold) / omap_i2c_resize_fifo() 615 (1000 * dev->speed / 8); omap_i2c_resize_fifo() 624 struct omap_i2c_dev dev = i2c_get_adapdata(adap); omap_i2c_xfer_msg() local 628 dev_dbg(dev->dev, "addr: 0x%04x, len: %d, flags: 0x%x, stop: %d\n", omap_i2c_xfer_msg() 634 dev->receiver = !!(msg->flags & I2C_M_RD); omap_i2c_xfer_msg() 635 omap_i2c_resize_fifo(dev, msg->len, dev->receiver); omap_i2c_xfer_msg() 637 omap_i2c_write_reg(dev, OMAP_I2C_SA_REG, msg->addr); omap_i2c_xfer_msg() 640 dev->buf = msg->buf; omap_i2c_xfer_msg() 641 dev->buf_len = msg->len; omap_i2c_xfer_msg() 643 / make sure writes to dev->buf_len are ordered / omap_i2c_xfer_msg() 646 omap_i2c_write_reg(dev, OMAP_I2C_CNT_REG, dev->buf_len); omap_i2c_xfer_msg() 649 w = omap_i2c_read_reg(dev, OMAP_I2C_BUF_REG); omap_i2c_xfer_msg() 651 omap_i2c_write_reg(dev, OMAP_I2C_BUF_REG, w); omap_i2c_xfer_msg() 653 reinit_completion(&dev->cmd_complete); omap_i2c_xfer_msg() 654 dev->cmd_err = 0; omap_i2c_xfer_msg() 659 if (dev->speed > 400) omap_i2c_xfer_msg() 669 if (!dev->b_hw && stop) omap_i2c_xfer_msg() 676 omap_i2c_write_reg(dev, OMAP_I2C_CON_REG, w); omap_i2c_xfer_msg() 681 if (dev->b_hw && stop) { omap_i2c_xfer_msg() 683 u16 con = omap_i2c_read_reg(dev, OMAP_I2C_CON_REG); omap_i2c_xfer_msg() 685 con = omap_i2c_read_reg(dev, OMAP_I2C_CON_REG); omap_i2c_xfer_msg() 689 dev_err(dev->dev, "controller timed out " omap_i2c_xfer_msg() 698 omap_i2c_write_reg(dev, OMAP_I2C_CON_REG, w); omap_i2c_xfer_msg() 705 timeout = wait_for_completion_timeout(&dev->cmd_complete, omap_i2c_xfer_msg() 708 dev_err(dev->dev, "controller timed out\n"); omap_i2c_xfer_msg() 709 omap_i2c_reset(dev); omap_i2c_xfer_msg() 710 __omap_i2c_init(dev); omap_i2c_xfer_msg() 714 if (likely(!dev->cmd_err)) omap_i2c_xfer_msg() 718 if (dev->cmd_err & (OMAP_I2C_STAT_ROVR \| OMAP_I2C_STAT_XUDF)) { omap_i2c_xfer_msg() 719 omap_i2c_reset(dev); omap_i2c_xfer_msg() 720 __omap_i2c_init(dev); omap_i2c_xfer_msg() 724 if (dev->cmd_err & OMAP_I2C_STAT_AL) omap_i2c_xfer_msg() 727 if (dev->cmd_err & OMAP_I2C_STAT_NACK) { omap_i2c_xfer_msg() 731 w = omap_i2c_read_reg(dev, OMAP_I2C_CON_REG); omap_i2c_xfer_msg() 733 omap_i2c_write_reg(dev, OMAP_I2C_CON_REG, w); omap_i2c_xfer_msg() 747 struct omap_i2c_dev dev = i2c_get_adapdata(adap); omap_i2c_xfer() local 751 r = pm_runtime_get_sync(dev->dev); omap_i2c_xfer() 755 r = omap_i2c_wait_for_bb_valid(dev); omap_i2c_xfer() 759 r = omap_i2c_wait_for_bb(dev); omap_i2c_xfer() 763 if (dev->set_mpu_wkup_lat != NULL) omap_i2c_xfer() 764 dev->set_mpu_wkup_lat(dev->dev, dev->latency); omap_i2c_xfer() 775 omap_i2c_wait_for_bb(dev); omap_i2c_xfer() 777 if (dev->set_mpu_wkup_lat != NULL) omap_i2c_xfer() 778 dev->set_mpu_wkup_lat(dev->dev, -1); omap_i2c_xfer() 781 pm_runtime_mark_last_busy(dev->dev); omap_i2c_xfer() 782 pm_runtime_put_autosuspend(dev->dev); omap_i2c_xfer() 794 omap_i2c_complete_cmd(struct omap_i2c_dev dev, u16 err) omap_i2c_complete_cmd() argument 796 dev->cmd_err \|= err; omap_i2c_complete_cmd() 797 complete(&dev->cmd_complete); omap_i2c_complete_cmd() 801 omap_i2c_ack_stat(struct omap_i2c_dev dev, u16 stat) omap_i2c_ack_stat() argument 803 omap_i2c_write_reg(dev, OMAP_I2C_STAT_REG, stat); omap_i2c_ack_stat() 806 static inline void i2c_omap_errata_i207(struct omap_i2c_dev dev, u16 stat) i2c_omap_errata_i207() argument 817 omap_i2c_ack_stat(dev, OMAP_I2C_STAT_RDR); i2c_omap_errata_i207() 820 if (!(omap_i2c_read_reg(dev, OMAP_I2C_STAT_REG) i2c_omap_errata_i207() 824 if (omap_i2c_read_reg(dev, OMAP_I2C_STAT_REG) i2c_omap_errata_i207() 826 omap_i2c_ack_stat(dev, OMAP_I2C_STAT_RDR); i2c_omap_errata_i207() 827 dev_dbg(dev->dev, "RDR when bus is busy.\n"); i2c_omap_errata_i207() 840 struct omap_i2c_dev dev = dev_id; omap_i2c_omap1_isr() local 843 if (pm_runtime_suspended(dev->dev)) omap_i2c_omap1_isr() 846 iv = omap_i2c_read_reg(dev, OMAP_I2C_IV_REG); omap_i2c_omap1_isr() 851 dev_err(dev->dev, "Arbitration lost\n"); omap_i2c_omap1_isr() 852 omap_i2c_complete_cmd(dev, OMAP_I2C_STAT_AL); omap_i2c_omap1_isr() 855 omap_i2c_complete_cmd(dev, OMAP_I2C_STAT_NACK); omap_i2c_omap1_isr() 856 omap_i2c_write_reg(dev, OMAP_I2C_CON_REG, OMAP_I2C_CON_STP); omap_i2c_omap1_isr() 859 omap_i2c_complete_cmd(dev, 0); omap_i2c_omap1_isr() 862 if (dev->buf_len) { omap_i2c_omap1_isr() 863 w = omap_i2c_read_reg(dev, OMAP_I2C_DATA_REG); omap_i2c_omap1_isr() 864 dev->buf++ = w; omap_i2c_omap1_isr() 865 dev->buf_len--; omap_i2c_omap1_isr() 866 if (dev->buf_len) { omap_i2c_omap1_isr() 867 dev->buf++ = w >> 8; omap_i2c_omap1_isr() 868 dev->buf_len--; omap_i2c_omap1_isr() 871 dev_err(dev->dev, "RRDY IRQ while no data requested\n"); omap_i2c_omap1_isr() 874 if (dev->buf_len) { omap_i2c_omap1_isr() 875 w = dev->buf++; omap_i2c_omap1_isr() 876 dev->buf_len--; omap_i2c_omap1_isr() 877 if (dev->buf_len) { omap_i2c_omap1_isr() 878 w \|= dev->buf++ << 8; omap_i2c_omap1_isr() 879 dev->buf_len--; omap_i2c_omap1_isr() 881 omap_i2c_write_reg(dev, OMAP_I2C_DATA_REG, w); omap_i2c_omap1_isr() 883 dev_err(dev->dev, "XRDY IRQ while no data to send\n"); omap_i2c_omap1_isr() 900 static int errata_omap3_i462(struct omap_i2c_dev dev) errata_omap3_i462() argument 906 stat = omap_i2c_read_reg(dev, OMAP_I2C_STAT_REG); errata_omap3_i462() 911 omap_i2c_ack_stat(dev, (OMAP_I2C_STAT_XRDY \| errata_omap3_i462() 914 dev->cmd_err \|= OMAP_I2C_STAT_NACK; errata_omap3_i462() 915 omap_i2c_ack_stat(dev, OMAP_I2C_STAT_NACK); errata_omap3_i462() 919 dev_err(dev->dev, "Arbitration lost\n"); errata_omap3_i462() 920 dev->cmd_err \|= OMAP_I2C_STAT_AL; errata_omap3_i462() 921 omap_i2c_ack_stat(dev, OMAP_I2C_STAT_AL); errata_omap3_i462() 931 dev_err(dev->dev, "timeout waiting on XUDF bit\n"); errata_omap3_i462() 938 static void omap_i2c_receive_data(struct omap_i2c_dev dev, u8 num_bytes, omap_i2c_receive_data() argument 944 w = omap_i2c_read_reg(dev, OMAP_I2C_DATA_REG); omap_i2c_receive_data() 945 dev->buf++ = w; omap_i2c_receive_data() 946 dev->buf_len--; omap_i2c_receive_data() 952 if (dev->flags & OMAP_I2C_FLAG_16BIT_DATA_REG) { omap_i2c_receive_data() 953 dev->buf++ = w >> 8; omap_i2c_receive_data() 954 dev->buf_len--; omap_i2c_receive_data() 959 static int omap_i2c_transmit_data(struct omap_i2c_dev dev, u8 num_bytes, omap_i2c_transmit_data() argument 965 w = dev->buf++; omap_i2c_transmit_data() 966 dev->buf_len--; omap_i2c_transmit_data() 972 if (dev->flags & OMAP_I2C_FLAG_16BIT_DATA_REG) { omap_i2c_transmit_data() 973 w \|= dev->buf++ << 8; omap_i2c_transmit_data() 974 dev->buf_len--; omap_i2c_transmit_data() 977 if (dev->errata & I2C_OMAP_ERRATA_I462) { omap_i2c_transmit_data() 980 ret = errata_omap3_i462(dev); omap_i2c_transmit_data() 985 omap_i2c_write_reg(dev, OMAP_I2C_DATA_REG, w); omap_i2c_transmit_data() 994 struct omap_i2c_dev dev = dev_id; omap_i2c_isr() local 999 spin_lock(&dev->lock); omap_i2c_isr() 1000 mask = omap_i2c_read_reg(dev, OMAP_I2C_IE_REG); omap_i2c_isr() 1001 stat = omap_i2c_read_reg(dev, OMAP_I2C_STAT_REG); omap_i2c_isr() 1006 spin_unlock(&dev->lock); omap_i2c_isr() 1014 struct omap_i2c_dev dev = dev_id; omap_i2c_isr_thread() local 1020 spin_lock_irqsave(&dev->lock, flags); omap_i2c_isr_thread() 1022 bits = omap_i2c_read_reg(dev, OMAP_I2C_IE_REG); omap_i2c_isr_thread() 1023 stat = omap_i2c_read_reg(dev, OMAP_I2C_STAT_REG); omap_i2c_isr_thread() 1027 if (dev->receiver) omap_i2c_isr_thread() 1037 dev_dbg(dev->dev, "IRQ (ISR = 0x%04x)\n", stat); omap_i2c_isr_thread() 1039 dev_warn(dev->dev, "Too much work in one IRQ\n"); omap_i2c_isr_thread() 1045 omap_i2c_ack_stat(dev, OMAP_I2C_STAT_NACK); omap_i2c_isr_thread() 1049 dev_err(dev->dev, "Arbitration lost\n"); omap_i2c_isr_thread() 1051 omap_i2c_ack_stat(dev, OMAP_I2C_STAT_AL); omap_i2c_isr_thread() 1058 omap_i2c_ack_stat(dev, OMAP_I2C_STAT_ARDY); omap_i2c_isr_thread() 1062 omap_i2c_ack_stat(dev, (OMAP_I2C_STAT_RRDY \| omap_i2c_isr_thread() 1073 if (dev->fifo_size) omap_i2c_isr_thread() 1074 num_bytes = dev->buf_len; omap_i2c_isr_thread() 1076 if (dev->errata & I2C_OMAP_ERRATA_I207) { omap_i2c_isr_thread() 1077 i2c_omap_errata_i207(dev, stat); omap_i2c_isr_thread() 1078 num_bytes = (omap_i2c_read_reg(dev, omap_i2c_isr_thread() 1082 omap_i2c_receive_data(dev, num_bytes, true); omap_i2c_isr_thread() 1083 omap_i2c_ack_stat(dev, OMAP_I2C_STAT_RDR); omap_i2c_isr_thread() 1090 if (dev->threshold) omap_i2c_isr_thread() 1091 num_bytes = dev->threshold; omap_i2c_isr_thread() 1093 omap_i2c_receive_data(dev, num_bytes, false); omap_i2c_isr_thread() 1094 omap_i2c_ack_stat(dev, OMAP_I2C_STAT_RRDY); omap_i2c_isr_thread() 1102 if (dev->fifo_size) omap_i2c_isr_thread() 1103 num_bytes = dev->buf_len; omap_i2c_isr_thread() 1105 ret = omap_i2c_transmit_data(dev, num_bytes, true); omap_i2c_isr_thread() 1109 omap_i2c_ack_stat(dev, OMAP_I2C_STAT_XDR); omap_i2c_isr_thread() 1117 if (dev->threshold) omap_i2c_isr_thread() 1118 num_bytes = dev->threshold; omap_i2c_isr_thread() 1120 ret = omap_i2c_transmit_data(dev, num_bytes, false); omap_i2c_isr_thread() 1124 omap_i2c_ack_stat(dev, OMAP_I2C_STAT_XRDY); omap_i2c_isr_thread() 1129 dev_err(dev->dev, "Receive overrun\n"); omap_i2c_isr_thread() 1131 omap_i2c_ack_stat(dev, OMAP_I2C_STAT_ROVR); omap_i2c_isr_thread() 1136 dev_err(dev->dev, "Transmit underflow\n"); omap_i2c_isr_thread() 1138 omap_i2c_ack_stat(dev, OMAP_I2C_STAT_XUDF); omap_i2c_isr_thread() 1143 omap_i2c_complete_cmd(dev, err); omap_i2c_isr_thread() 1146 spin_unlock_irqrestore(&dev->lock, flags); omap_i2c_isr_thread() 1215 struct omap_i2c_dev dev; omap_i2c_probe() local 1219 dev_get_platdata(&pdev->dev); omap_i2c_probe() 1220 struct device_node node = pdev->dev.of_node; omap_i2c_probe() 1229 dev_err(&pdev->dev, "no irq resource?\n"); omap_i2c_probe() 1233 dev = devm_kzalloc(&pdev->dev, sizeof(struct omap_i2c_dev), GFP_KERNEL); omap_i2c_probe() 1234 if (!dev) omap_i2c_probe() 1238 dev->base = devm_ioremap_resource(&pdev->dev, mem); omap_i2c_probe() 1239 if (IS_ERR(dev->base)) omap_i2c_probe() 1240 return PTR_ERR(dev->base); omap_i2c_probe() 1242 match = of_match_device(of_match_ptr(omap_i2c_of_match), &pdev->dev); omap_i2c_probe() 1247 dev->flags = pdata->flags; omap_i2c_probe() 1251 dev->speed = freq / 1000; omap_i2c_probe() 1253 dev->speed = pdata->clkrate; omap_i2c_probe() 1254 dev->flags = pdata->flags; omap_i2c_probe() 1255 dev->set_mpu_wkup_lat = pdata->set_mpu_wkup_lat; omap_i2c_probe() 1258 dev->dev = &pdev->dev; omap_i2c_probe() 1259 dev->irq = irq; omap_i2c_probe() 1261 spin_lock_init(&dev->lock); omap_i2c_probe() 1263 platform_set_drvdata(pdev, dev); omap_i2c_probe() 1264 init_completion(&dev->cmd_complete); omap_i2c_probe() 1266 dev->reg_shift = (dev->flags >> OMAP_I2C_FLAG_BUS_SHIFT__SHIFT) & 3; omap_i2c_probe() 1268 pm_runtime_enable(dev->dev); omap_i2c_probe() 1269 pm_runtime_set_autosuspend_delay(dev->dev, OMAP_I2C_PM_TIMEOUT); omap_i2c_probe() 1270 pm_runtime_use_autosuspend(dev->dev); omap_i2c_probe() 1272 r = pm_runtime_get_sync(dev->dev); omap_i2c_probe() 1282 rev = readw_relaxed(dev->base + 0x04); omap_i2c_probe() 1284 dev->scheme = OMAP_I2C_SCHEME(rev); omap_i2c_probe() 1285 switch (dev->scheme) { omap_i2c_probe() 1287 dev->regs = (u8 )reg_map_ip_v1; omap_i2c_probe() 1288 dev->rev = omap_i2c_read_reg(dev, OMAP_I2C_REV_REG); omap_i2c_probe() 1289 minor = OMAP_I2C_REV_SCHEME_0_MAJOR(dev->rev); omap_i2c_probe() 1290 major = OMAP_I2C_REV_SCHEME_0_MAJOR(dev->rev); omap_i2c_probe() 1295 dev->regs = (u8 )reg_map_ip_v2; omap_i2c_probe() 1297 omap_i2c_read_reg(dev, OMAP_I2C_IP_V2_REVNB_LO); omap_i2c_probe() 1300 dev->rev = rev; omap_i2c_probe() 1303 dev->errata = 0; omap_i2c_probe() 1305 if (dev->rev >= OMAP_I2C_REV_ON_2430 && omap_i2c_probe() 1306 dev->rev < OMAP_I2C_REV_ON_4430_PLUS) omap_i2c_probe() 1307 dev->errata \|= I2C_OMAP_ERRATA_I207; omap_i2c_probe() 1309 if (dev->rev <= OMAP_I2C_REV_ON_3430_3530) omap_i2c_probe() 1310 dev->errata \|= I2C_OMAP_ERRATA_I462; omap_i2c_probe() 1312 if (!(dev->flags & OMAP_I2C_FLAG_NO_FIFO)) { omap_i2c_probe() 1316 s = (omap_i2c_read_reg(dev, OMAP_I2C_BUFSTAT_REG) >> 14) & 0x3; omap_i2c_probe() 1317 dev->fifo_size = 0x8 << s; omap_i2c_probe() 1325 dev->fifo_size = (dev->fifo_size / 2); omap_i2c_probe() 1327 if (dev->rev < OMAP_I2C_REV_ON_3630) omap_i2c_probe() 1328 dev->b_hw = 1; / Enable hardware fixes / omap_i2c_probe() 1331 if (dev->set_mpu_wkup_lat != NULL) omap_i2c_probe() 1332 dev->latency = (1000000 dev->fifo_size) / omap_i2c_probe() 1333 (1000 * dev->speed / 8); omap_i2c_probe() 1337 omap_i2c_init(dev); omap_i2c_probe() 1339 if (dev->rev < OMAP_I2C_OMAP1_REV_2) omap_i2c_probe() 1340 r = devm_request_irq(&pdev->dev, dev->irq, omap_i2c_omap1_isr, omap_i2c_probe() 1341 IRQF_NO_SUSPEND, pdev->name, dev); omap_i2c_probe() 1343 r = devm_request_threaded_irq(&pdev->dev, dev->irq, omap_i2c_probe() 1346 pdev->name, dev); omap_i2c_probe() 1349 dev_err(dev->dev, "failure requesting irq %i\n", dev->irq); omap_i2c_probe() 1353 adap = &dev->adapter; omap_i2c_probe() 1354 i2c_set_adapdata(adap, dev); omap_i2c_probe() 1359 adap->dev.parent = &pdev->dev; omap_i2c_probe() 1360 adap->dev.of_node = pdev->dev.of_node; omap_i2c_probe() 1366 dev_err(dev->dev, "failure adding adapter\n"); omap_i2c_probe() 1370 dev_info(dev->dev, "bus %d rev%d.%d at %d kHz\n", adap->nr, omap_i2c_probe() 1371 major, minor, dev->speed); omap_i2c_probe() 1373 pm_runtime_mark_last_busy(dev->dev); omap_i2c_probe() 1374 pm_runtime_put_autosuspend(dev->dev); omap_i2c_probe() 1379 omap_i2c_write_reg(dev, OMAP_I2C_CON_REG, 0); omap_i2c_probe() 1380 pm_runtime_put(dev->dev); omap_i2c_probe() 1381 pm_runtime_disable(&pdev->dev); omap_i2c_probe() 1389 struct omap_i2c_dev dev = platform_get_drvdata(pdev); omap_i2c_remove() local 1392 i2c_del_adapter(&dev->adapter); omap_i2c_remove() 1393 ret = pm_runtime_get_sync(&pdev->dev); omap_i2c_remove() 1397 omap_i2c_write_reg(dev, OMAP_I2C_CON_REG, 0); omap_i2c_remove() 1398 pm_runtime_put(&pdev->dev); omap_i2c_remove() 1399 pm_runtime_disable(&pdev->dev); omap_i2c_remove() 1404 static int omap_i2c_runtime_suspend(struct device dev) omap_i2c_runtime_suspend() argument 1406 struct platform_device pdev = to_platform_device(dev); omap_i2c_runtime_suspend() 1429 static int omap_i2c_runtime_resume(struct device dev) omap_i2c_runtime_resume() argument 1431 struct platform_device *pdev = to_platform_device(dev); omap_i2c_runtime_resume()
H A D	i2c-at91.c	95 struct device dev; member in struct:at91_twi_dev 113 static unsigned at91_twi_read(struct at91_twi_dev dev, unsigned reg) at91_twi_read() argument 115 return readl_relaxed(dev->base + reg); at91_twi_read() 118 static void at91_twi_write(struct at91_twi_dev dev, unsigned reg, unsigned val) at91_twi_write() argument 120 writel_relaxed(val, dev->base + reg); at91_twi_write() 123 static void at91_disable_twi_interrupts(struct at91_twi_dev dev) at91_disable_twi_interrupts() argument 125 at91_twi_write(dev, AT91_TWI_IDR, AT91_TWI_INT_MASK); at91_disable_twi_interrupts() 128 static void at91_twi_irq_save(struct at91_twi_dev dev) at91_twi_irq_save() argument 130 dev->imr = at91_twi_read(dev, AT91_TWI_IMR) & AT91_TWI_INT_MASK; at91_twi_irq_save() 131 at91_disable_twi_interrupts(dev); at91_twi_irq_save() 134 static void at91_twi_irq_restore(struct at91_twi_dev dev) at91_twi_irq_restore() argument 136 at91_twi_write(dev, AT91_TWI_IER, dev->imr); at91_twi_irq_restore() 139 static void at91_init_twi_bus(struct at91_twi_dev dev) at91_init_twi_bus() argument 141 at91_disable_twi_interrupts(dev); at91_init_twi_bus() 142 at91_twi_write(dev, AT91_TWI_CR, AT91_TWI_SWRST); at91_init_twi_bus() 143 at91_twi_write(dev, AT91_TWI_CR, AT91_TWI_MSEN); at91_init_twi_bus() 144 at91_twi_write(dev, AT91_TWI_CR, AT91_TWI_SVDIS); at91_init_twi_bus() 145 at91_twi_write(dev, AT91_TWI_CWGR, dev->twi_cwgr_reg); at91_init_twi_bus() 152 static void at91_calc_twi_clock(struct at91_twi_dev dev, int twi_clk) at91_calc_twi_clock() argument 155 struct at91_twi_pdata pdata = dev->pdata; at91_calc_twi_clock() 159 div = max(0, (int)DIV_ROUND_UP(clk_get_rate(dev->clk), at91_calc_twi_clock() 165 dev_warn(dev->dev, "%d exceeds ckdiv max value which is %d.\n", at91_calc_twi_clock() 171 dev->twi_cwgr_reg = (ckdiv << 16) \| (cdiv << 8) \| cdiv; at91_calc_twi_clock() 172 dev_dbg(dev->dev, "cdiv %d ckdiv %d\n", cdiv, ckdiv); at91_calc_twi_clock() 175 static void at91_twi_dma_cleanup(struct at91_twi_dev dev) at91_twi_dma_cleanup() argument 177 struct at91_twi_dma dma = &dev->dma; at91_twi_dma_cleanup() 179 at91_twi_irq_save(dev); at91_twi_dma_cleanup() 189 dma_unmap_single(dev->dev, sg_dma_address(&dma->sg), at91_twi_dma_cleanup() 190 dev->buf_len, dma->direction); at91_twi_dma_cleanup() 194 at91_twi_irq_restore(dev); at91_twi_dma_cleanup() 197 static void at91_twi_write_next_byte(struct at91_twi_dev dev) at91_twi_write_next_byte() argument 199 if (dev->buf_len <= 0) at91_twi_write_next_byte() 202 at91_twi_write(dev, AT91_TWI_THR, dev->buf); at91_twi_write_next_byte() 205 if (--dev->buf_len == 0) at91_twi_write_next_byte() 206 at91_twi_write(dev, AT91_TWI_CR, AT91_TWI_STOP); at91_twi_write_next_byte() 208 dev_dbg(dev->dev, "wrote 0x%x, to go %d\n", dev->buf, dev->buf_len); at91_twi_write_next_byte() 210 ++dev->buf; at91_twi_write_next_byte() 215 struct at91_twi_dev dev = (struct at91_twi_dev )data; at91_twi_write_data_dma_callback() local 217 dma_unmap_single(dev->dev, sg_dma_address(&dev->dma.sg), at91_twi_write_data_dma_callback() 218 dev->buf_len, DMA_TO_DEVICE); at91_twi_write_data_dma_callback() 227 at91_twi_write(dev, AT91_TWI_IER, AT91_TWI_TXCOMP); at91_twi_write_data_dma_callback() 228 at91_twi_write(dev, AT91_TWI_CR, AT91_TWI_STOP); at91_twi_write_data_dma_callback() 231 static void at91_twi_write_data_dma(struct at91_twi_dev dev) at91_twi_write_data_dma() argument 235 struct at91_twi_dma dma = &dev->dma; at91_twi_write_data_dma() 238 if (dev->buf_len <= 0) at91_twi_write_data_dma() 243 at91_twi_irq_save(dev); at91_twi_write_data_dma() 244 dma_addr = dma_map_single(dev->dev, dev->buf, dev->buf_len, at91_twi_write_data_dma() 246 if (dma_mapping_error(dev->dev, dma_addr)) { at91_twi_write_data_dma() 247 dev_err(dev->dev, "dma map failed\n"); at91_twi_write_data_dma() 251 at91_twi_irq_restore(dev); at91_twi_write_data_dma() 252 sg_dma_len(&dma->sg) = dev->buf_len; at91_twi_write_data_dma() 258 dev_err(dev->dev, "dma prep slave sg failed\n"); at91_twi_write_data_dma() 263 txdesc->callback_param = dev; at91_twi_write_data_dma() 272 at91_twi_dma_cleanup(dev); at91_twi_write_data_dma() 275 static void at91_twi_read_next_byte(struct at91_twi_dev dev) at91_twi_read_next_byte() argument 277 if (dev->buf_len <= 0) at91_twi_read_next_byte() 280 dev->buf = at91_twi_read(dev, AT91_TWI_RHR) & 0xff; at91_twi_read_next_byte() 281 --dev->buf_len; at91_twi_read_next_byte() 284 if (dev->recv_len_abort) at91_twi_read_next_byte() 288 if (unlikely(dev->msg->flags & I2C_M_RECV_LEN)) { at91_twi_read_next_byte() 290 if (dev->buf <= I2C_SMBUS_BLOCK_MAX && dev->buf > 0) { at91_twi_read_next_byte() 291 dev->msg->flags &= ~I2C_M_RECV_LEN; at91_twi_read_next_byte() 292 dev->buf_len += dev->buf; at91_twi_read_next_byte() 293 dev->msg->len = dev->buf_len + 1; at91_twi_read_next_byte() 294 dev_dbg(dev->dev, "received block length %d\n", at91_twi_read_next_byte() 295 dev->buf_len); at91_twi_read_next_byte() 298 dev->recv_len_abort = true; at91_twi_read_next_byte() 299 dev->buf_len = 1; at91_twi_read_next_byte() 304 if (dev->buf_len == 1) at91_twi_read_next_byte() 305 at91_twi_write(dev, AT91_TWI_CR, AT91_TWI_STOP); at91_twi_read_next_byte() 307 dev_dbg(dev->dev, "read 0x%x, to go %d\n", dev->buf, dev->buf_len); at91_twi_read_next_byte() 309 ++dev->buf; at91_twi_read_next_byte() 314 struct at91_twi_dev dev = (struct at91_twi_dev )data; at91_twi_read_data_dma_callback() local 316 dma_unmap_single(dev->dev, sg_dma_address(&dev->dma.sg), at91_twi_read_data_dma_callback() 317 dev->buf_len, DMA_FROM_DEVICE); at91_twi_read_data_dma_callback() 320 dev->buf += dev->buf_len - 2; at91_twi_read_data_dma_callback() 321 dev->buf_len = 2; at91_twi_read_data_dma_callback() 322 at91_twi_write(dev, AT91_TWI_IER, AT91_TWI_RXRDY \| AT91_TWI_TXCOMP); at91_twi_read_data_dma_callback() 325 static void at91_twi_read_data_dma(struct at91_twi_dev dev) at91_twi_read_data_dma() argument 329 struct at91_twi_dma dma = &dev->dma; at91_twi_read_data_dma() 335 at91_twi_irq_save(dev); at91_twi_read_data_dma() 336 dma_addr = dma_map_single(dev->dev, dev->buf, dev->buf_len - 2, at91_twi_read_data_dma() 338 if (dma_mapping_error(dev->dev, dma_addr)) { at91_twi_read_data_dma() 339 dev_err(dev->dev, "dma map failed\n"); at91_twi_read_data_dma() 343 at91_twi_irq_restore(dev); at91_twi_read_data_dma() 345 sg_dma_len(&dma->sg) = dev->buf_len - 2; at91_twi_read_data_dma() 350 dev_err(dev->dev, "dma prep slave sg failed\n"); at91_twi_read_data_dma() 355 rxdesc->callback_param = dev; at91_twi_read_data_dma() 364 at91_twi_dma_cleanup(dev); at91_twi_read_data_dma() 369 struct at91_twi_dev dev = dev_id; atmel_twi_interrupt() local 370 const unsigned status = at91_twi_read(dev, AT91_TWI_SR); atmel_twi_interrupt() 371 const unsigned irqstatus = status & at91_twi_read(dev, AT91_TWI_IMR); atmel_twi_interrupt() 376 at91_twi_read_next_byte(dev); atmel_twi_interrupt() 378 at91_twi_write_next_byte(dev); atmel_twi_interrupt() 381 dev->transfer_status \|= status; atmel_twi_interrupt() 384 at91_disable_twi_interrupts(dev); atmel_twi_interrupt() 385 complete(&dev->cmd_complete); atmel_twi_interrupt() 391 static int at91_do_twi_transfer(struct at91_twi_dev dev) at91_do_twi_transfer() argument 395 bool has_unre_flag = dev->pdata->has_unre_flag; at91_do_twi_transfer() 425 dev_dbg(dev->dev, "transfer: %s %d bytes.\n", at91_do_twi_transfer() 426 (dev->msg->flags & I2C_M_RD) ? "read" : "write", dev->buf_len); at91_do_twi_transfer() 428 reinit_completion(&dev->cmd_complete); at91_do_twi_transfer() 429 dev->transfer_status = 0; at91_do_twi_transfer() 431 if (!dev->buf_len) { at91_do_twi_transfer() 432 at91_twi_write(dev, AT91_TWI_CR, AT91_TWI_QUICK); at91_do_twi_transfer() 433 at91_twi_write(dev, AT91_TWI_IER, AT91_TWI_TXCOMP); at91_do_twi_transfer() 434 } else if (dev->msg->flags & I2C_M_RD) { at91_do_twi_transfer() 437 if (at91_twi_read(dev, AT91_TWI_SR) & AT91_TWI_RXRDY) { at91_do_twi_transfer() 438 dev_err(dev->dev, "RXRDY still set!"); at91_do_twi_transfer() 439 at91_twi_read(dev, AT91_TWI_RHR); at91_do_twi_transfer() 443 if (dev->buf_len <= 1 && !(dev->msg->flags & I2C_M_RECV_LEN)) at91_do_twi_transfer() 445 at91_twi_write(dev, AT91_TWI_CR, start_flags); at91_do_twi_transfer() 454 if (dev->use_dma && (dev->buf_len > AT91_I2C_DMA_THRESHOLD)) { at91_do_twi_transfer() 455 at91_twi_write(dev, AT91_TWI_IER, AT91_TWI_NACK); at91_do_twi_transfer() 456 at91_twi_read_data_dma(dev); at91_do_twi_transfer() 458 at91_twi_write(dev, AT91_TWI_IER, at91_do_twi_transfer() 464 if (dev->use_dma && (dev->buf_len > AT91_I2C_DMA_THRESHOLD)) { at91_do_twi_transfer() 465 at91_twi_write(dev, AT91_TWI_IER, AT91_TWI_NACK); at91_do_twi_transfer() 466 at91_twi_write_data_dma(dev); at91_do_twi_transfer() 468 at91_twi_write_next_byte(dev); at91_do_twi_transfer() 469 at91_twi_write(dev, AT91_TWI_IER, at91_do_twi_transfer() 476 time_left = wait_for_completion_timeout(&dev->cmd_complete, at91_do_twi_transfer() 477 dev->adapter.timeout); at91_do_twi_transfer() 479 dev_err(dev->dev, "controller timed out\n"); at91_do_twi_transfer() 480 at91_init_twi_bus(dev); at91_do_twi_transfer() 484 if (dev->transfer_status & AT91_TWI_NACK) { at91_do_twi_transfer() 485 dev_dbg(dev->dev, "received nack\n"); at91_do_twi_transfer() 489 if (dev->transfer_status & AT91_TWI_OVRE) { at91_do_twi_transfer() 490 dev_err(dev->dev, "overrun while reading\n"); at91_do_twi_transfer() 494 if (has_unre_flag && dev->transfer_status & AT91_TWI_UNRE) { at91_do_twi_transfer() 495 dev_err(dev->dev, "underrun while writing\n"); at91_do_twi_transfer() 499 if (dev->recv_len_abort) { at91_do_twi_transfer() 500 dev_err(dev->dev, "invalid smbus block length recvd\n"); at91_do_twi_transfer() 505 dev_dbg(dev->dev, "transfer complete\n"); at91_do_twi_transfer() 510 at91_twi_dma_cleanup(dev); at91_do_twi_transfer() 516 struct at91_twi_dev dev = i2c_get_adapdata(adap); at91_twi_xfer() local 521 dev_dbg(&adap->dev, "at91_xfer: processing %d messages:\n", num); at91_twi_xfer() 523 ret = pm_runtime_get_sync(dev->dev); at91_twi_xfer() 539 at91_twi_write(dev, AT91_TWI_IADR, internal_address); at91_twi_xfer() 542 at91_twi_write(dev, AT91_TWI_MMR, (m_start->addr << 16) \| int_addr_flag at91_twi_xfer() 545 dev->buf_len = m_start->len; at91_twi_xfer() 546 dev->buf = m_start->buf; at91_twi_xfer() 547 dev->msg = m_start; at91_twi_xfer() 548 dev->recv_len_abort = false; at91_twi_xfer() 550 ret = at91_do_twi_transfer(dev); at91_twi_xfer() 554 pm_runtime_mark_last_busy(dev->dev); at91_twi_xfer() 555 pm_runtime_put_autosuspend(dev->dev); at91_twi_xfer() 664 static int at91_twi_configure_dma(struct at91_twi_dev dev, u32 phy_addr) at91_twi_configure_dma() argument 668 struct at91_twi_dma dma = &dev->dma; at91_twi_configure_dma() 679 dma->chan_tx = dma_request_slave_channel_reason(dev->dev, "tx"); at91_twi_configure_dma() 686 dma->chan_rx = dma_request_slave_channel_reason(dev->dev, "rx"); at91_twi_configure_dma() 695 dev_err(dev->dev, "failed to configure tx channel\n"); at91_twi_configure_dma() 702 dev_err(dev->dev, "failed to configure rx channel\n"); at91_twi_configure_dma() 710 dev->use_dma = true; at91_twi_configure_dma() 712 dev_info(dev->dev, "using %s (tx) and %s (rx) for DMA transfers\n", at91_twi_configure_dma() 719 dev_info(dev->dev, "can't use DMA, error %d\n", ret); at91_twi_configure_dma() 730 if (pdev->dev.of_node) { at91_twi_get_driver_data() 732 match = of_match_node(atmel_twi_dt_ids, pdev->dev.of_node); at91_twi_get_driver_data() 742 struct at91_twi_dev dev; at91_twi_probe() local 748 dev = devm_kzalloc(&pdev->dev, sizeof(dev), GFP_KERNEL); at91_twi_probe() 749 if (!dev) at91_twi_probe() 751 init_completion(&dev->cmd_complete); at91_twi_probe() 752 dev->dev = &pdev->dev; at91_twi_probe() 759 dev->pdata = at91_twi_get_driver_data(pdev); at91_twi_probe() 760 if (!dev->pdata) at91_twi_probe() 763 dev->base = devm_ioremap_resource(&pdev->dev, mem); at91_twi_probe() 764 if (IS_ERR(dev->base)) at91_twi_probe() 765 return PTR_ERR(dev->base); at91_twi_probe() 767 dev->irq = platform_get_irq(pdev, 0); at91_twi_probe() 768 if (dev->irq < 0) at91_twi_probe() 769 return dev->irq; at91_twi_probe() 771 rc = devm_request_irq(&pdev->dev, dev->irq, atmel_twi_interrupt, 0, at91_twi_probe() 772 dev_name(dev->dev), dev); at91_twi_probe() 774 dev_err(dev->dev, "Cannot get irq %d: %d\n", dev->irq, rc); at91_twi_probe() 778 platform_set_drvdata(pdev, dev); at91_twi_probe() 780 dev->clk = devm_clk_get(dev->dev, NULL); at91_twi_probe() 781 if (IS_ERR(dev->clk)) { at91_twi_probe() 782 dev_err(dev->dev, "no clock defined\n"); at91_twi_probe() 785 clk_prepare_enable(dev->clk); at91_twi_probe() 787 if (dev->dev->of_node) { at91_twi_probe() 788 rc = at91_twi_configure_dma(dev, phy_addr); at91_twi_probe() 793 rc = of_property_read_u32(dev->dev->of_node, "clock-frequency", at91_twi_probe() 798 at91_calc_twi_clock(dev, bus_clk_rate); at91_twi_probe() 799 at91_init_twi_bus(dev); at91_twi_probe() 801 snprintf(dev->adapter.name, sizeof(dev->adapter.name), "AT91"); at91_twi_probe() 802 i2c_set_adapdata(&dev->adapter, dev); at91_twi_probe() 803 dev->adapter.owner = THIS_MODULE; at91_twi_probe() 804 dev->adapter.class = I2C_CLASS_DEPRECATED; at91_twi_probe() 805 dev->adapter.algo = &at91_twi_algorithm; at91_twi_probe() 806 dev->adapter.quirks = &at91_twi_quirks; at91_twi_probe() 807 dev->adapter.dev.parent = dev->dev; at91_twi_probe() 808 dev->adapter.nr = pdev->id; at91_twi_probe() 809 dev->adapter.timeout = AT91_I2C_TIMEOUT; at91_twi_probe() 810 dev->adapter.dev.of_node = pdev->dev.of_node; at91_twi_probe() 812 pm_runtime_set_autosuspend_delay(dev->dev, AUTOSUSPEND_TIMEOUT); at91_twi_probe() 813 pm_runtime_use_autosuspend(dev->dev); at91_twi_probe() 814 pm_runtime_set_active(dev->dev); at91_twi_probe() 815 pm_runtime_enable(dev->dev); at91_twi_probe() 817 rc = i2c_add_numbered_adapter(&dev->adapter); at91_twi_probe() 819 dev_err(dev->dev, "Adapter %s registration failed\n", at91_twi_probe() 820 dev->adapter.name); at91_twi_probe() 821 clk_disable_unprepare(dev->clk); at91_twi_probe() 823 pm_runtime_disable(dev->dev); at91_twi_probe() 824 pm_runtime_set_suspended(dev->dev); at91_twi_probe() 829 dev_info(dev->dev, "AT91 i2c bus driver.\n"); at91_twi_probe() 835 struct at91_twi_dev dev = platform_get_drvdata(pdev); at91_twi_remove() local 837 i2c_del_adapter(&dev->adapter); at91_twi_remove() 838 clk_disable_unprepare(dev->clk); at91_twi_remove() 840 pm_runtime_disable(dev->dev); at91_twi_remove() 841 pm_runtime_set_suspended(dev->dev); at91_twi_remove() 848 static int at91_twi_runtime_suspend(struct device dev) at91_twi_runtime_suspend() argument 850 struct at91_twi_dev twi_dev = dev_get_drvdata(dev); at91_twi_runtime_suspend() 854 pinctrl_pm_select_sleep_state(dev); at91_twi_runtime_suspend() 859 static int at91_twi_runtime_resume(struct device dev) at91_twi_runtime_resume() argument 861 struct at91_twi_dev twi_dev = dev_get_drvdata(dev); at91_twi_runtime_resume() 863 pinctrl_pm_select_default_state(dev); at91_twi_runtime_resume() 868 static int at91_twi_suspend_noirq(struct device dev) at91_twi_suspend_noirq() argument 870 if (!pm_runtime_status_suspended(dev)) at91_twi_suspend_noirq() 871 at91_twi_runtime_suspend(dev); at91_twi_suspend_noirq() 876 static int at91_twi_resume_noirq(struct device dev) at91_twi_resume_noirq() argument 880 if (!pm_runtime_status_suspended(dev)) { at91_twi_resume_noirq() 881 ret = at91_twi_runtime_resume(dev); at91_twi_resume_noirq() 886 pm_runtime_mark_last_busy(dev); at91_twi_resume_noirq() 887 pm_request_autosuspend(dev); at91_twi_resume_noirq()
H A D	i2c-bcm-kona.c	169 static void bcm_kona_i2c_send_cmd_to_ctrl(struct bcm_kona_i2c_dev dev, bcm_kona_i2c_send_cmd_to_ctrl() argument 172 dev_dbg(dev->device, "%s, %d\n", __func__, cmd); bcm_kona_i2c_send_cmd_to_ctrl() 178 dev->base + CS_OFFSET); bcm_kona_i2c_send_cmd_to_ctrl() 185 dev->base + CS_OFFSET); bcm_kona_i2c_send_cmd_to_ctrl() 192 dev->base + CS_OFFSET); bcm_kona_i2c_send_cmd_to_ctrl() 198 dev->base + CS_OFFSET); bcm_kona_i2c_send_cmd_to_ctrl() 202 dev_err(dev->device, "Unknown command %d\n", cmd); bcm_kona_i2c_send_cmd_to_ctrl() 206 static void bcm_kona_i2c_enable_clock(struct bcm_kona_i2c_dev dev) bcm_kona_i2c_enable_clock() argument 208 writel(readl(dev->base + CLKEN_OFFSET) \| CLKEN_CLKEN_MASK, bcm_kona_i2c_enable_clock() 209 dev->base + CLKEN_OFFSET); bcm_kona_i2c_enable_clock() 212 static void bcm_kona_i2c_disable_clock(struct bcm_kona_i2c_dev dev) bcm_kona_i2c_disable_clock() argument 214 writel(readl(dev->base + CLKEN_OFFSET) & ~CLKEN_CLKEN_MASK, bcm_kona_i2c_disable_clock() 215 dev->base + CLKEN_OFFSET); bcm_kona_i2c_disable_clock() 220 struct bcm_kona_i2c_dev dev = devid; bcm_kona_i2c_isr() local 221 uint32_t status = readl(dev->base + ISR_OFFSET); bcm_kona_i2c_isr() 229 dev->base + TXFCR_OFFSET); bcm_kona_i2c_isr() 231 writel(status & ~ISR_RESERVED_MASK, dev->base + ISR_OFFSET); bcm_kona_i2c_isr() 232 complete_all(&dev->done); bcm_kona_i2c_isr() 238 static int bcm_kona_i2c_wait_if_busy(struct bcm_kona_i2c_dev dev) bcm_kona_i2c_wait_if_busy() argument 242 while (readl(dev->base + ISR_OFFSET) & ISR_CMDBUSY_MASK) bcm_kona_i2c_wait_if_busy() 244 dev_err(dev->device, "CMDBUSY timeout\n"); bcm_kona_i2c_wait_if_busy() 252 static int bcm_kona_send_i2c_cmd(struct bcm_kona_i2c_dev dev, bcm_kona_send_i2c_cmd() argument 259 rc = bcm_kona_i2c_wait_if_busy(dev); bcm_kona_send_i2c_cmd() 264 writel(IER_I2C_INT_EN_MASK, dev->base + IER_OFFSET); bcm_kona_send_i2c_cmd() 267 reinit_completion(&dev->done); bcm_kona_send_i2c_cmd() 270 bcm_kona_i2c_send_cmd_to_ctrl(dev, cmd); bcm_kona_send_i2c_cmd() 273 time_left = wait_for_completion_timeout(&dev->done, time_left); bcm_kona_send_i2c_cmd() 276 writel(0, dev->base + IER_OFFSET); bcm_kona_send_i2c_cmd() 279 dev_err(dev->device, "controller timed out\n"); bcm_kona_send_i2c_cmd() 284 bcm_kona_i2c_send_cmd_to_ctrl(dev, BCM_CMD_NOACTION); bcm_kona_send_i2c_cmd() 290 static int bcm_kona_i2c_read_fifo_single(struct bcm_kona_i2c_dev dev, bcm_kona_i2c_read_fifo_single() argument 297 reinit_completion(&dev->done); bcm_kona_i2c_read_fifo_single() 300 writel(IER_READ_COMPLETE_INT_MASK, dev->base + IER_OFFSET); bcm_kona_i2c_read_fifo_single() 305 dev->base + RXFCR_OFFSET); bcm_kona_i2c_read_fifo_single() 308 time_left = wait_for_completion_timeout(&dev->done, time_left); bcm_kona_i2c_read_fifo_single() 311 writel(0, dev->base + IER_OFFSET); bcm_kona_i2c_read_fifo_single() 314 dev_err(dev->device, "RX FIFO time out\n"); bcm_kona_i2c_read_fifo_single() 320 buf = readl(dev->base + RXFIFORDOUT_OFFSET); bcm_kona_i2c_read_fifo_single() 326 static int bcm_kona_i2c_read_fifo(struct bcm_kona_i2c_dev dev, bcm_kona_i2c_read_fifo() argument 342 rc = bcm_kona_i2c_read_fifo_single(dev, tmp_buf, bytes_to_read, bcm_kona_i2c_read_fifo() 355 static int bcm_kona_i2c_write_byte(struct bcm_kona_i2c_dev dev, uint8_t data, bcm_kona_i2c_write_byte() argument 363 rc = bcm_kona_i2c_wait_if_busy(dev); bcm_kona_i2c_write_byte() 368 writel(ISR_SES_DONE_MASK, dev->base + ISR_OFFSET); bcm_kona_i2c_write_byte() 371 writel(IER_I2C_INT_EN_MASK, dev->base + IER_OFFSET); bcm_kona_i2c_write_byte() 374 reinit_completion(&dev->done); bcm_kona_i2c_write_byte() 377 writel(data, dev->base + DAT_OFFSET); bcm_kona_i2c_write_byte() 380 time_left = wait_for_completion_timeout(&dev->done, time_left); bcm_kona_i2c_write_byte() 383 writel(0, dev->base + IER_OFFSET); bcm_kona_i2c_write_byte() 386 dev_dbg(dev->device, "controller timed out\n"); bcm_kona_i2c_write_byte() 390 nak_received = readl(dev->base + CS_OFFSET) & CS_ACK_MASK ? 1 : 0; bcm_kona_i2c_write_byte() 393 dev_dbg(dev->device, "unexpected NAK/ACK\n"); bcm_kona_i2c_write_byte() 401 static int bcm_kona_i2c_write_fifo_single(struct bcm_kona_i2c_dev dev, bcm_kona_i2c_write_fifo_single() argument 409 reinit_completion(&dev->done); bcm_kona_i2c_write_fifo_single() 413 dev->base + IER_OFFSET); bcm_kona_i2c_write_fifo_single() 416 disable_irq(dev->irq); bcm_kona_i2c_write_fifo_single() 420 writel(buf[k], (dev->base + DAT_OFFSET)); bcm_kona_i2c_write_fifo_single() 423 enable_irq(dev->irq); bcm_kona_i2c_write_fifo_single() 427 time_left = wait_for_completion_timeout(&dev->done, time_left); bcm_kona_i2c_write_fifo_single() 428 fifo_status = readl(dev->base + FIFO_STATUS_OFFSET); bcm_kona_i2c_write_fifo_single() 432 writel(0, dev->base + IER_OFFSET); bcm_kona_i2c_write_fifo_single() 435 if (readl(dev->base + CS_OFFSET) & CS_ACK_MASK) { bcm_kona_i2c_write_fifo_single() 436 dev_err(dev->device, "unexpected NAK\n"); bcm_kona_i2c_write_fifo_single() 442 dev_err(dev->device, "completion timed out\n"); bcm_kona_i2c_write_fifo_single() 451 static int bcm_kona_i2c_write_fifo(struct bcm_kona_i2c_dev dev, bcm_kona_i2c_write_fifo() argument 464 rc = bcm_kona_i2c_write_fifo_single(dev, tmp_buf, bcm_kona_i2c_write_fifo() 477 static int bcm_kona_i2c_do_addr(struct bcm_kona_i2c_dev dev, bcm_kona_i2c_do_addr() argument 485 if (bcm_kona_i2c_write_byte(dev, addr, 0) < 0) bcm_kona_i2c_do_addr() 490 if (bcm_kona_i2c_write_byte(dev, addr, 0) < 0) bcm_kona_i2c_do_addr() 495 if (bcm_kona_send_i2c_cmd(dev, BCM_CMD_RESTART) < 0) bcm_kona_i2c_do_addr() 500 if (bcm_kona_i2c_write_byte(dev, addr, 0) < 0) bcm_kona_i2c_do_addr() 509 if (bcm_kona_i2c_write_byte(dev, addr, 0) < 0) bcm_kona_i2c_do_addr() 516 static void bcm_kona_i2c_enable_autosense(struct bcm_kona_i2c_dev dev) bcm_kona_i2c_enable_autosense() argument 518 writel(readl(dev->base + CLKEN_OFFSET) & ~CLKEN_AUTOSENSE_OFF_MASK, bcm_kona_i2c_enable_autosense() 519 dev->base + CLKEN_OFFSET); bcm_kona_i2c_enable_autosense() 522 static void bcm_kona_i2c_config_timing(struct bcm_kona_i2c_dev dev) bcm_kona_i2c_config_timing() argument 524 writel(readl(dev->base + HSTIM_OFFSET) & ~HSTIM_HS_MODE_MASK, bcm_kona_i2c_config_timing() 525 dev->base + HSTIM_OFFSET); bcm_kona_i2c_config_timing() 527 writel((dev->std_cfg->prescale << TIM_PRESCALE_SHIFT) \| bcm_kona_i2c_config_timing() 528 (dev->std_cfg->time_p << TIM_P_SHIFT) \| bcm_kona_i2c_config_timing() 529 (dev->std_cfg->no_div << TIM_NO_DIV_SHIFT) \| bcm_kona_i2c_config_timing() 530 (dev->std_cfg->time_div << TIM_DIV_SHIFT), bcm_kona_i2c_config_timing() 531 dev->base + TIM_OFFSET); bcm_kona_i2c_config_timing() 533 writel((dev->std_cfg->time_m << CLKEN_M_SHIFT) \| bcm_kona_i2c_config_timing() 534 (dev->std_cfg->time_n << CLKEN_N_SHIFT) \| bcm_kona_i2c_config_timing() 536 dev->base + CLKEN_OFFSET); bcm_kona_i2c_config_timing() 539 static void bcm_kona_i2c_config_timing_hs(struct bcm_kona_i2c_dev dev) bcm_kona_i2c_config_timing_hs() argument 541 writel((dev->hs_cfg->prescale << TIM_PRESCALE_SHIFT) \| bcm_kona_i2c_config_timing_hs() 542 (dev->hs_cfg->time_p << TIM_P_SHIFT) \| bcm_kona_i2c_config_timing_hs() 543 (dev->hs_cfg->no_div << TIM_NO_DIV_SHIFT) \| bcm_kona_i2c_config_timing_hs() 544 (dev->hs_cfg->time_div << TIM_DIV_SHIFT), bcm_kona_i2c_config_timing_hs() 545 dev->base + TIM_OFFSET); bcm_kona_i2c_config_timing_hs() 547 writel((dev->hs_cfg->hs_hold << HSTIM_HS_HOLD_SHIFT) \| bcm_kona_i2c_config_timing_hs() 548 (dev->hs_cfg->hs_high_phase << HSTIM_HS_HIGH_PHASE_SHIFT) \| bcm_kona_i2c_config_timing_hs() 549 (dev->hs_cfg->hs_setup << HSTIM_HS_SETUP_SHIFT), bcm_kona_i2c_config_timing_hs() 550 dev->base + HSTIM_OFFSET); bcm_kona_i2c_config_timing_hs() 552 writel(readl(dev->base + HSTIM_OFFSET) \| HSTIM_HS_MODE_MASK, bcm_kona_i2c_config_timing_hs() 553 dev->base + HSTIM_OFFSET); bcm_kona_i2c_config_timing_hs() 556 static int bcm_kona_i2c_switch_to_hs(struct bcm_kona_i2c_dev dev) bcm_kona_i2c_switch_to_hs() argument 561 rc = bcm_kona_i2c_write_byte(dev, MASTERCODE, 1); bcm_kona_i2c_switch_to_hs() 568 rc = clk_set_rate(dev->external_clk, HS_EXT_CLK_FREQ); bcm_kona_i2c_switch_to_hs() 570 dev_err(dev->device, "%s: clk_set_rate returned %d\n", bcm_kona_i2c_switch_to_hs() 576 bcm_kona_i2c_config_timing_hs(dev); bcm_kona_i2c_switch_to_hs() 579 rc = bcm_kona_send_i2c_cmd(dev, BCM_CMD_RESTART); bcm_kona_i2c_switch_to_hs() 581 dev_err(dev->device, "High speed restart command failed\n"); bcm_kona_i2c_switch_to_hs() 586 static int bcm_kona_i2c_switch_to_std(struct bcm_kona_i2c_dev dev) bcm_kona_i2c_switch_to_std() argument 591 bcm_kona_i2c_config_timing(dev); bcm_kona_i2c_switch_to_std() 594 rc = clk_set_rate(dev->external_clk, STD_EXT_CLK_FREQ); bcm_kona_i2c_switch_to_std() 596 dev_err(dev->device, "%s: clk_set_rate returned %d\n", bcm_kona_i2c_switch_to_std() 607 struct bcm_kona_i2c_dev dev = i2c_get_adapdata(adapter); bcm_kona_i2c_xfer() local 612 rc = clk_prepare_enable(dev->external_clk); bcm_kona_i2c_xfer() 614 dev_err(dev->device, "%s: peri clock enable failed. err %d\n", bcm_kona_i2c_xfer() 620 writel(0, dev->base + PADCTL_OFFSET); bcm_kona_i2c_xfer() 623 bcm_kona_i2c_enable_clock(dev); bcm_kona_i2c_xfer() 626 rc = bcm_kona_send_i2c_cmd(dev, BCM_CMD_START); bcm_kona_i2c_xfer() 628 dev_err(dev->device, "Start command failed rc = %d\n", rc); bcm_kona_i2c_xfer() 633 if (dev->hs_cfg) { bcm_kona_i2c_xfer() 634 rc = bcm_kona_i2c_switch_to_hs(dev); bcm_kona_i2c_xfer() 645 rc = bcm_kona_send_i2c_cmd(dev, BCM_CMD_RESTART); bcm_kona_i2c_xfer() 647 dev_err(dev->device, bcm_kona_i2c_xfer() 655 rc = bcm_kona_i2c_do_addr(dev, pmsg); bcm_kona_i2c_xfer() 657 dev_err(dev->device, bcm_kona_i2c_xfer() 666 rc = bcm_kona_i2c_read_fifo(dev, pmsg); bcm_kona_i2c_xfer() 668 dev_err(dev->device, "read failure\n"); bcm_kona_i2c_xfer() 672 rc = bcm_kona_i2c_write_fifo(dev, pmsg); bcm_kona_i2c_xfer() 674 dev_err(dev->device, "write failure"); bcm_kona_i2c_xfer() 684 bcm_kona_send_i2c_cmd(dev, BCM_CMD_STOP); bcm_kona_i2c_xfer() 687 if (dev->hs_cfg) { bcm_kona_i2c_xfer() 688 int hs_rc = bcm_kona_i2c_switch_to_std(dev); bcm_kona_i2c_xfer() 696 writel(PADCTL_PAD_OUT_EN_MASK, dev->base + PADCTL_OFFSET); bcm_kona_i2c_xfer() 699 bcm_kona_i2c_disable_clock(dev); bcm_kona_i2c_xfer() 701 clk_disable_unprepare(dev->external_clk); bcm_kona_i2c_xfer() 717 static int bcm_kona_i2c_assign_bus_speed(struct bcm_kona_i2c_dev dev) bcm_kona_i2c_assign_bus_speed() argument 720 int ret = of_property_read_u32(dev->device->of_node, "clock-frequency", bcm_kona_i2c_assign_bus_speed() 723 dev_err(dev->device, "missing clock-frequency property\n"); bcm_kona_i2c_assign_bus_speed() 729 dev->std_cfg = &std_cfg_table[BCM_SPD_100K]; bcm_kona_i2c_assign_bus_speed() 732 dev->std_cfg = &std_cfg_table[BCM_SPD_400K]; bcm_kona_i2c_assign_bus_speed() 735 dev->std_cfg = &std_cfg_table[BCM_SPD_1MHZ]; bcm_kona_i2c_assign_bus_speed() 739 dev->std_cfg = &std_cfg_table[BCM_SPD_100K]; bcm_kona_i2c_assign_bus_speed() 740 dev->hs_cfg = &hs_cfg_table[BCM_SPD_3P4MHZ]; bcm_kona_i2c_assign_bus_speed() 754 struct bcm_kona_i2c_dev dev; bcm_kona_i2c_probe() local 759 dev = devm_kzalloc(&pdev->dev, sizeof(dev), GFP_KERNEL); bcm_kona_i2c_probe() 760 if (!dev) bcm_kona_i2c_probe() 763 platform_set_drvdata(pdev, dev); bcm_kona_i2c_probe() 764 dev->device = &pdev->dev; bcm_kona_i2c_probe() 765 init_completion(&dev->done); bcm_kona_i2c_probe() 769 dev->base = devm_ioremap_resource(dev->device, iomem); bcm_kona_i2c_probe() 770 if (IS_ERR(dev->base)) bcm_kona_i2c_probe() 774 dev->external_clk = devm_clk_get(dev->device, NULL); bcm_kona_i2c_probe() 775 if (IS_ERR(dev->external_clk)) { bcm_kona_i2c_probe() 776 dev_err(dev->device, "couldn't get clock\n"); bcm_kona_i2c_probe() 780 rc = clk_set_rate(dev->external_clk, STD_EXT_CLK_FREQ); bcm_kona_i2c_probe() 782 dev_err(dev->device, "%s: clk_set_rate returned %d\n", bcm_kona_i2c_probe() 787 rc = clk_prepare_enable(dev->external_clk); bcm_kona_i2c_probe() 789 dev_err(dev->device, "couldn't enable clock\n"); bcm_kona_i2c_probe() 794 rc = bcm_kona_i2c_assign_bus_speed(dev); bcm_kona_i2c_probe() 799 bcm_kona_i2c_enable_clock(dev); bcm_kona_i2c_probe() 802 bcm_kona_i2c_config_timing(dev); bcm_kona_i2c_probe() 805 writel(0, dev->base + TOUT_OFFSET); bcm_kona_i2c_probe() 808 bcm_kona_i2c_enable_autosense(dev); bcm_kona_i2c_probe() 812 dev->base + TXFCR_OFFSET); bcm_kona_i2c_probe() 815 writel(0, dev->base + IER_OFFSET); bcm_kona_i2c_probe() 824 dev->base + ISR_OFFSET); bcm_kona_i2c_probe() 827 dev->irq = platform_get_irq(pdev, 0); bcm_kona_i2c_probe() 828 if (dev->irq < 0) { bcm_kona_i2c_probe() 829 dev_err(dev->device, "no irq resource\n"); bcm_kona_i2c_probe() 835 rc = devm_request_irq(&pdev->dev, dev->irq, bcm_kona_i2c_isr, bcm_kona_i2c_probe() 836 IRQF_SHARED, pdev->name, dev); bcm_kona_i2c_probe() 838 dev_err(dev->device, "failed to request irq %i\n", dev->irq); bcm_kona_i2c_probe() 843 bcm_kona_i2c_send_cmd_to_ctrl(dev, BCM_CMD_NOACTION); bcm_kona_i2c_probe() 846 writel(PADCTL_PAD_OUT_EN_MASK, dev->base + PADCTL_OFFSET); bcm_kona_i2c_probe() 849 bcm_kona_i2c_disable_clock(dev); bcm_kona_i2c_probe() 852 clk_disable_unprepare(dev->external_clk); bcm_kona_i2c_probe() 855 adap = &dev->adapter; bcm_kona_i2c_probe() 856 i2c_set_adapdata(adap, dev); bcm_kona_i2c_probe() 860 adap->dev.parent = &pdev->dev; bcm_kona_i2c_probe() 861 adap->dev.of_node = pdev->dev.of_node; bcm_kona_i2c_probe() 865 dev_err(dev->device, "failed to add adapter\n"); bcm_kona_i2c_probe() 869 dev_info(dev->device, "device registered successfully\n"); bcm_kona_i2c_probe() 874 bcm_kona_i2c_disable_clock(dev); bcm_kona_i2c_probe() 875 clk_disable_unprepare(dev->external_clk); bcm_kona_i2c_probe() 882 struct bcm_kona_i2c_dev *dev = platform_get_drvdata(pdev); bcm_kona_i2c_remove() local 884 i2c_del_adapter(&dev->adapter); bcm_kona_i2c_remove()
H A D	i2c-diolan-u2c.c	101 static int diolan_usb_transfer(struct i2c_diolan_u2c dev) diolan_usb_transfer() argument 107 if (!dev->olen \|\| !dev->ocount) diolan_usb_transfer() 110 ret = usb_bulk_msg(dev->usb_dev, diolan_usb_transfer() 111 usb_sndbulkpipe(dev->usb_dev, dev->ep_out), diolan_usb_transfer() 112 dev->obuffer, dev->olen, &actual, diolan_usb_transfer() 115 for (i = 0; i < dev->ocount; i++) { diolan_usb_transfer() 118 tmpret = usb_bulk_msg(dev->usb_dev, diolan_usb_transfer() 119 usb_rcvbulkpipe(dev->usb_dev, diolan_usb_transfer() 120 dev->ep_in), diolan_usb_transfer() 121 dev->ibuffer, diolan_usb_transfer() 122 sizeof(dev->ibuffer), &actual, diolan_usb_transfer() 133 switch (dev->ibuffer[actual - 1]) { diolan_usb_transfer() 156 dev->olen = 0; diolan_usb_transfer() 157 dev->ocount = 0; diolan_usb_transfer() 161 static int diolan_write_cmd(struct i2c_diolan_u2c dev, bool flush) diolan_write_cmd() argument 163 if (flush \|\| dev->olen >= DIOLAN_FLUSH_LEN) diolan_write_cmd() 164 return diolan_usb_transfer(dev); diolan_write_cmd() 169 static int diolan_usb_cmd(struct i2c_diolan_u2c dev, u8 command, bool flush) diolan_usb_cmd() argument 171 dev->obuffer[dev->olen++] = command; diolan_usb_cmd() 172 dev->ocount++; diolan_usb_cmd() 173 return diolan_write_cmd(dev, flush); diolan_usb_cmd() 177 static int diolan_usb_cmd_data(struct i2c_diolan_u2c dev, u8 command, u8 data, diolan_usb_cmd_data() argument 180 dev->obuffer[dev->olen++] = command; diolan_usb_cmd_data() 181 dev->obuffer[dev->olen++] = data; diolan_usb_cmd_data() 182 dev->ocount++; diolan_usb_cmd_data() 183 return diolan_write_cmd(dev, flush); diolan_usb_cmd_data() 187 static int diolan_usb_cmd_data2(struct i2c_diolan_u2c dev, u8 command, u8 d1, diolan_usb_cmd_data2() argument 190 dev->obuffer[dev->olen++] = command; diolan_usb_cmd_data2() 191 dev->obuffer[dev->olen++] = d1; diolan_usb_cmd_data2() 192 dev->obuffer[dev->olen++] = d2; diolan_usb_cmd_data2() 193 dev->ocount++; diolan_usb_cmd_data2() 194 return diolan_write_cmd(dev, flush); diolan_usb_cmd_data2() 203 static void diolan_flush_input(struct i2c_diolan_u2c dev) diolan_flush_input() argument 211 ret = usb_bulk_msg(dev->usb_dev, diolan_flush_input() 212 usb_rcvbulkpipe(dev->usb_dev, dev->ep_in), diolan_flush_input() 213 dev->ibuffer, sizeof(dev->ibuffer), &actual, diolan_flush_input() 219 dev_err(&dev->interface->dev, "Failed to flush input buffer\n"); diolan_flush_input() 222 static int diolan_i2c_start(struct i2c_diolan_u2c dev) diolan_i2c_start() argument 224 return diolan_usb_cmd(dev, CMD_I2C_START, false); diolan_i2c_start() 227 static int diolan_i2c_repeated_start(struct i2c_diolan_u2c dev) diolan_i2c_repeated_start() argument 229 return diolan_usb_cmd(dev, CMD_I2C_REPEATED_START, false); diolan_i2c_repeated_start() 232 static int diolan_i2c_stop(struct i2c_diolan_u2c dev) diolan_i2c_stop() argument 234 return diolan_usb_cmd(dev, CMD_I2C_STOP, true); diolan_i2c_stop() 237 static int diolan_i2c_get_byte_ack(struct i2c_diolan_u2c dev, bool ack, diolan_i2c_get_byte_ack() argument 242 ret = diolan_usb_cmd_data(dev, CMD_I2C_GET_BYTE_ACK, ack, true); diolan_i2c_get_byte_ack() 244 byte = dev->ibuffer[0]; diolan_i2c_get_byte_ack() 251 static int diolan_i2c_put_byte_ack(struct i2c_diolan_u2c dev, u8 byte) diolan_i2c_put_byte_ack() argument 253 return diolan_usb_cmd_data(dev, CMD_I2C_PUT_BYTE_ACK, byte, false); diolan_i2c_put_byte_ack() 256 static int diolan_set_speed(struct i2c_diolan_u2c dev, u8 speed) diolan_set_speed() argument 258 return diolan_usb_cmd_data(dev, CMD_I2C_SET_SPEED, speed, true); diolan_set_speed() 262 static int diolan_set_clock_synch(struct i2c_diolan_u2c dev, bool enable) diolan_set_clock_synch() argument 264 return diolan_usb_cmd_data(dev, CMD_I2C_SET_CLK_SYNC, enable, true); diolan_set_clock_synch() 268 static int diolan_set_clock_synch_timeout(struct i2c_diolan_u2c dev, int ms) diolan_set_clock_synch_timeout() argument 272 return diolan_usb_cmd_data2(dev, CMD_I2C_SET_CLK_SYNC_TO, diolan_set_clock_synch_timeout() 276 static void diolan_fw_version(struct i2c_diolan_u2c dev) diolan_fw_version() argument 280 ret = diolan_usb_cmd(dev, CMD_GET_FW_VERSION, true); diolan_fw_version() 282 dev_info(&dev->interface->dev, diolan_fw_version() 284 (unsigned int)dev->ibuffer[0], diolan_fw_version() 285 (unsigned int)dev->ibuffer[1]); diolan_fw_version() 288 static void diolan_get_serial(struct i2c_diolan_u2c dev) diolan_get_serial() argument 293 ret = diolan_usb_cmd(dev, CMD_GET_SERIAL, true); diolan_get_serial() 295 serial = le32_to_cpu((u32 )dev->ibuffer); diolan_get_serial() 296 dev_info(&dev->interface->dev, diolan_get_serial() 301 static int diolan_init(struct i2c_diolan_u2c dev) diolan_init() argument 318 dev_info(&dev->interface->dev, diolan_init() 320 dev->usb_dev->bus->busnum, dev->usb_dev->devnum, frequency); diolan_init() 322 diolan_flush_input(dev); diolan_init() 323 diolan_fw_version(dev); diolan_init() 324 diolan_get_serial(dev); diolan_init() 327 ret = diolan_set_speed(dev, speed); diolan_init() 332 ret = diolan_set_clock_synch(dev, speed != U2C_I2C_SPEED_FAST); diolan_init() 337 ret = diolan_set_clock_synch_timeout(dev, DIOLAN_SYNC_TIMEOUT); diolan_init() 347 struct i2c_diolan_u2c dev = i2c_get_adapdata(adapter); diolan_usb_xfer() local 352 ret = diolan_i2c_start(dev); diolan_usb_xfer() 359 ret = diolan_i2c_repeated_start(dev); diolan_usb_xfer() 365 diolan_i2c_put_byte_ack(dev, (pmsg->addr << 1) \| 1); diolan_usb_xfer() 379 ret = diolan_i2c_get_byte_ack(dev, ack, &byte); diolan_usb_xfer() 396 ret = diolan_i2c_put_byte_ack(dev, pmsg->addr << 1); diolan_usb_xfer() 400 ret = diolan_i2c_put_byte_ack(dev, diolan_usb_xfer() 409 sret = diolan_i2c_stop(dev); diolan_usb_xfer() 438 static void diolan_u2c_free(struct i2c_diolan_u2c dev) diolan_u2c_free() argument 440 usb_put_dev(dev->usb_dev); diolan_u2c_free() 441 kfree(dev); diolan_u2c_free() 448 struct i2c_diolan_u2c dev; diolan_u2c_probe() local 456 dev = kzalloc(sizeof(dev), GFP_KERNEL); diolan_u2c_probe() 457 if (dev == NULL) { diolan_u2c_probe() 461 dev->ep_out = hostif->endpoint[0].desc.bEndpointAddress; diolan_u2c_probe() 462 dev->ep_in = hostif->endpoint[1].desc.bEndpointAddress; diolan_u2c_probe() 464 dev->usb_dev = usb_get_dev(interface_to_usbdev(interface)); diolan_u2c_probe() 465 dev->interface = interface; diolan_u2c_probe() 468 usb_set_intfdata(interface, dev); diolan_u2c_probe() 471 dev->adapter.owner = THIS_MODULE; diolan_u2c_probe() 472 dev->adapter.class = I2C_CLASS_HWMON; diolan_u2c_probe() 473 dev->adapter.algo = &diolan_usb_algorithm; diolan_u2c_probe() 474 i2c_set_adapdata(&dev->adapter, dev); diolan_u2c_probe() 475 snprintf(dev->adapter.name, sizeof(dev->adapter.name), diolan_u2c_probe() 477 dev->usb_dev->bus->busnum, dev->usb_dev->devnum); diolan_u2c_probe() 479 dev->adapter.dev.parent = &dev->interface->dev; diolan_u2c_probe() 482 ret = diolan_init(dev); diolan_u2c_probe() 484 dev_err(&interface->dev, "failed to initialize adapter\n"); diolan_u2c_probe() 489 ret = i2c_add_adapter(&dev->adapter); diolan_u2c_probe() 491 dev_err(&interface->dev, "failed to add I2C adapter\n"); diolan_u2c_probe() 495 dev_dbg(&interface->dev, "connected " DRIVER_NAME "\n"); diolan_u2c_probe() 501 diolan_u2c_free(dev); diolan_u2c_probe() 508 struct i2c_diolan_u2c *dev = usb_get_intfdata(interface); diolan_u2c_disconnect() local 510 i2c_del_adapter(&dev->adapter); diolan_u2c_disconnect() 512 diolan_u2c_free(dev); diolan_u2c_disconnect() 514 dev_dbg(&interface->dev, "disconnected\n"); diolan_u2c_disconnect()
/linux-4.1.27/drivers/nfc/
H A D	nfcsim.c	22 #define DEV_ERR(_dev, fmt, args...) nfc_err(&_dev->nfc_dev->dev, \ 25 #define DEV_DBG(_dev, fmt, args...) dev_dbg(&_dev->nfc_dev->dev, \ 65 static void nfcsim_cleanup_dev(struct nfcsim dev, u8 shutdown) nfcsim_cleanup_dev() argument 67 DEV_DBG(dev, "shutdown=%d\n", shutdown); nfcsim_cleanup_dev() 69 mutex_lock(&dev->lock); nfcsim_cleanup_dev() 71 dev->polling_mode = NFCSIM_POLL_NONE; nfcsim_cleanup_dev() 72 dev->shutting_down = shutdown; nfcsim_cleanup_dev() 73 dev->cb = NULL; nfcsim_cleanup_dev() 74 dev_kfree_skb(dev->clone_skb); nfcsim_cleanup_dev() 75 dev->clone_skb = NULL; nfcsim_cleanup_dev() 77 mutex_unlock(&dev->lock); nfcsim_cleanup_dev() 79 cancel_delayed_work_sync(&dev->poll_work); nfcsim_cleanup_dev() 80 cancel_delayed_work_sync(&dev->recv_work); nfcsim_cleanup_dev() 83 static int nfcsim_target_found(struct nfcsim dev) nfcsim_target_found() argument 87 DEV_DBG(dev, "\n"); nfcsim_target_found() 92 nfc_targets_found(dev->nfc_dev, &nfc_tgt, 1); nfcsim_target_found() 99 struct nfcsim dev = nfc_get_drvdata(nfc_dev); nfcsim_dev_up() local 101 DEV_DBG(dev, "\n"); nfcsim_dev_up() 103 mutex_lock(&dev->lock); nfcsim_dev_up() 105 dev->up = 1; nfcsim_dev_up() 107 mutex_unlock(&dev->lock); nfcsim_dev_up() 114 struct nfcsim dev = nfc_get_drvdata(nfc_dev); nfcsim_dev_down() local 116 DEV_DBG(dev, "\n"); nfcsim_dev_down() 118 mutex_lock(&dev->lock); nfcsim_dev_down() 120 dev->up = 0; nfcsim_dev_down() 122 mutex_unlock(&dev->lock); nfcsim_dev_down() 132 struct nfcsim dev = nfc_get_drvdata(nfc_dev); nfcsim_dep_link_up() local 133 struct nfcsim peer = dev->peer_dev; nfcsim_dep_link_up() 137 DEV_DBG(dev, "target_idx: %d, comm_mode: %d\n", target->idx, comm_mode); nfcsim_dep_link_up() 154 mutex_lock(&dev->lock); nfcsim_dep_link_up() 158 DEV_ERR(dev, "Can't set remote general bytes\n"); nfcsim_dep_link_up() 159 mutex_unlock(&dev->lock); nfcsim_dep_link_up() 166 mutex_unlock(&dev->lock); nfcsim_dep_link_up() 173 struct nfcsim dev = nfc_get_drvdata(nfc_dev); nfcsim_dep_link_down() local 175 DEV_DBG(dev, "\n"); nfcsim_dep_link_down() 177 nfcsim_cleanup_dev(dev, 0); nfcsim_dep_link_down() 185 struct nfcsim dev = nfc_get_drvdata(nfc_dev); nfcsim_start_poll() local 188 mutex_lock(&dev->lock); nfcsim_start_poll() 190 if (dev->polling_mode != NFCSIM_POLL_NONE) { nfcsim_start_poll() 191 DEV_ERR(dev, "Already in polling mode\n"); nfcsim_start_poll() 197 dev->polling_mode \|= NFCSIM_POLL_INITIATOR; nfcsim_start_poll() 200 dev->polling_mode \|= NFCSIM_POLL_TARGET; nfcsim_start_poll() 202 if (dev->polling_mode == NFCSIM_POLL_NONE) { nfcsim_start_poll() 203 DEV_ERR(dev, "Unsupported polling mode\n"); nfcsim_start_poll() 208 dev->initiator = 0; nfcsim_start_poll() 209 dev->curr_polling_mode = NFCSIM_POLL_NONE; nfcsim_start_poll() 211 queue_delayed_work(wq, &dev->poll_work, 0); nfcsim_start_poll() 213 DEV_DBG(dev, "Start polling: im: 0x%X, tm: 0x%X\n", im_protocols, nfcsim_start_poll() 218 mutex_unlock(&dev->lock); nfcsim_start_poll() 225 struct nfcsim dev = nfc_get_drvdata(nfc_dev); nfcsim_stop_poll() local 227 DEV_DBG(dev, "Stop poll\n"); nfcsim_stop_poll() 229 mutex_lock(&dev->lock); nfcsim_stop_poll() 231 dev->polling_mode = NFCSIM_POLL_NONE; nfcsim_stop_poll() 233 mutex_unlock(&dev->lock); nfcsim_stop_poll() 235 cancel_delayed_work_sync(&dev->poll_work); nfcsim_stop_poll() 241 struct nfcsim dev = nfc_get_drvdata(nfc_dev); nfcsim_activate_target() local 243 DEV_DBG(dev, "\n"); nfcsim_activate_target() 251 struct nfcsim dev = nfc_get_drvdata(nfc_dev); nfcsim_deactivate_target() local 253 DEV_DBG(dev, "\n"); nfcsim_deactivate_target() 258 struct nfcsim dev = container_of(work, struct nfcsim, nfcsim_wq_recv() local 261 mutex_lock(&dev->lock); nfcsim_wq_recv() 263 if (dev->shutting_down \|\| !dev->up \|\| !dev->clone_skb) { nfcsim_wq_recv() 264 dev_kfree_skb(dev->clone_skb); nfcsim_wq_recv() 268 if (dev->initiator) { nfcsim_wq_recv() 269 if (!dev->cb) { nfcsim_wq_recv() 270 DEV_ERR(dev, "Null recv callback\n"); nfcsim_wq_recv() 271 dev_kfree_skb(dev->clone_skb); nfcsim_wq_recv() 275 dev->cb(dev->cb_context, dev->clone_skb, 0); nfcsim_wq_recv() 276 dev->cb = NULL; nfcsim_wq_recv() 278 nfc_tm_data_received(dev->nfc_dev, dev->clone_skb); nfcsim_wq_recv() 282 dev->clone_skb = NULL; nfcsim_wq_recv() 284 mutex_unlock(&dev->lock); nfcsim_wq_recv() 291 struct nfcsim dev = nfc_get_drvdata(nfc_dev); nfcsim_tx() local 292 struct nfcsim peer = dev->peer_dev; nfcsim_tx() 295 mutex_lock(&dev->lock); nfcsim_tx() 297 if (dev->shutting_down \|\| !dev->up) { nfcsim_tx() 298 mutex_unlock(&dev->lock); nfcsim_tx() 303 dev->cb = cb; nfcsim_tx() 304 dev->cb_context = cb_context; nfcsim_tx() 306 mutex_unlock(&dev->lock); nfcsim_tx() 313 DEV_ERR(dev, "skb_clone failed\n"); nfcsim_tx() 362 static void nfcsim_set_polling_mode(struct nfcsim dev) nfcsim_set_polling_mode() argument 364 if (dev->polling_mode == NFCSIM_POLL_NONE) { nfcsim_set_polling_mode() 365 dev->curr_polling_mode = NFCSIM_POLL_NONE; nfcsim_set_polling_mode() 369 if (dev->curr_polling_mode == NFCSIM_POLL_NONE) { nfcsim_set_polling_mode() 370 if (dev->polling_mode & NFCSIM_POLL_INITIATOR) nfcsim_set_polling_mode() 371 dev->curr_polling_mode = NFCSIM_POLL_INITIATOR; nfcsim_set_polling_mode() 373 dev->curr_polling_mode = NFCSIM_POLL_TARGET; nfcsim_set_polling_mode() 378 if (dev->polling_mode == NFCSIM_POLL_DUAL) { nfcsim_set_polling_mode() 379 if (dev->curr_polling_mode == NFCSIM_POLL_TARGET) nfcsim_set_polling_mode() 380 dev->curr_polling_mode = NFCSIM_POLL_INITIATOR; nfcsim_set_polling_mode() 382 dev->curr_polling_mode = NFCSIM_POLL_TARGET; nfcsim_set_polling_mode() 388 struct nfcsim dev = container_of(work, struct nfcsim, poll_work.work); nfcsim_wq_poll() local 389 struct nfcsim peer = dev->peer_dev; nfcsim_wq_poll() 394 mutex_lock(&dev->lock); nfcsim_wq_poll() 397 nfcsim_set_polling_mode(dev); nfcsim_wq_poll() 399 if (dev->curr_polling_mode == NFCSIM_POLL_NONE) { nfcsim_wq_poll() 400 DEV_DBG(dev, "Not polling\n"); nfcsim_wq_poll() 404 DEV_DBG(dev, "Polling as %s", nfcsim_wq_poll() 405 dev->curr_polling_mode == NFCSIM_POLL_INITIATOR ? nfcsim_wq_poll() 408 if (dev->curr_polling_mode == NFCSIM_POLL_TARGET) nfcsim_wq_poll() 413 dev->polling_mode = NFCSIM_POLL_NONE; nfcsim_wq_poll() 415 dev->initiator = 1; nfcsim_wq_poll() 417 nfcsim_target_found(dev); nfcsim_wq_poll() 431 queue_delayed_work(wq, &dev->poll_work, msecs_to_jiffies(200)); nfcsim_wq_poll() 435 mutex_unlock(&dev->lock); nfcsim_wq_poll() 440 struct nfcsim dev; nfcsim_init_dev() local 443 dev = kzalloc(sizeof(dev), GFP_KERNEL); nfcsim_init_dev() 444 if (dev == NULL) nfcsim_init_dev() 447 mutex_init(&dev->lock); nfcsim_init_dev() 449 INIT_DELAYED_WORK(&dev->recv_work, nfcsim_wq_recv); nfcsim_init_dev() 450 INIT_DELAYED_WORK(&dev->poll_work, nfcsim_wq_poll); nfcsim_init_dev() 452 dev->nfc_dev = nfc_allocate_device(&nfcsim_nfc_ops, nfcsim_init_dev() 455 if (!dev->nfc_dev) nfcsim_init_dev() 458 nfc_set_drvdata(dev->nfc_dev, dev); nfcsim_init_dev() 460 rc = nfc_register_device(dev->nfc_dev); nfcsim_init_dev() 464 return dev; nfcsim_init_dev() 467 nfc_free_device(dev->nfc_dev); nfcsim_init_dev() 470 kfree(dev); nfcsim_init_dev() 475 static void nfcsim_free_device(struct nfcsim dev) nfcsim_free_device() argument 477 nfc_unregister_device(dev->nfc_dev); nfcsim_free_device() 479 nfc_free_device(dev->nfc_dev); nfcsim_free_device() 481 kfree(dev); nfcsim_free_device()
/linux-4.1.27/drivers/block/rsxx/
H A D	Makefile	`2 rsxx-objs := config.o core.o cregs.o dev.o dma.o`
/linux-4.1.27/arch/arm/mach-integrator/
H A D	lm.c	17 #define to_lm_device(d) container_of(d, struct lm_device, dev) 20 static int lm_match(struct device dev, struct device_driver drv) lm_match() argument 25 static int lm_bus_probe(struct device dev) lm_bus_probe() argument 27 struct lm_device lmdev = to_lm_device(dev); lm_bus_probe() 28 struct lm_driver lmdrv = to_lm_driver(dev->driver); lm_bus_probe() 33 static int lm_bus_remove(struct device dev) lm_bus_remove() argument 35 struct lm_device lmdev = to_lm_device(dev); lm_bus_remove() 36 struct lm_driver lmdrv = to_lm_driver(dev->driver); lm_bus_remove() 70 static void lm_device_release(struct device dev) lm_device_release() argument 72 struct lm_device d = to_lm_device(dev); lm_device_release() 77 int lm_device_register(struct lm_device *dev) lm_device_register() argument 81 dev->dev.release = lm_device_release; lm_device_register() 82 dev->dev.bus = &lm_bustype; lm_device_register() 84 ret = dev_set_name(&dev->dev, "lm%d", dev->id); lm_device_register() 87 dev->resource.name = dev_name(&dev->dev); lm_device_register() 89 ret = request_resource(&iomem_resource, &dev->resource); lm_device_register() 91 ret = device_register(&dev->dev); lm_device_register() 93 release_resource(&dev->resource); lm_device_register()
/linux-4.1.27/drivers/vlynq/
H A D	vlynq.c	81 static void vlynq_dump_regs(struct vlynq_device dev) vlynq_dump_regs() argument 86 dev->local, dev->remote); vlynq_dump_regs() 89 i + 1, ((u32 )dev->local)[i]); vlynq_dump_regs() 91 i + 1, ((u32 )dev->remote)[i]); vlynq_dump_regs() 109 static int vlynq_linked(struct vlynq_device dev) vlynq_linked() argument 114 if (readl(&dev->local->status) & VLYNQ_STATUS_LINK) vlynq_linked() 122 static void vlynq_reset(struct vlynq_device dev) vlynq_reset() argument 124 writel(readl(&dev->local->control) \| VLYNQ_CTRL_RESET, vlynq_reset() 125 &dev->local->control); vlynq_reset() 131 writel(readl(&dev->local->control) & ~VLYNQ_CTRL_RESET, vlynq_reset() 132 &dev->local->control); vlynq_reset() 140 struct vlynq_device dev = irq_data_get_irq_chip_data(d); vlynq_irq_unmask() local 144 BUG_ON(!dev); vlynq_irq_unmask() 145 virq = d->irq - dev->irq_start; vlynq_irq_unmask() 146 val = readl(&dev->remote->int_device[virq >> 2]); vlynq_irq_unmask() 148 writel(val, &dev->remote->int_device[virq >> 2]); vlynq_irq_unmask() 153 struct vlynq_device dev = irq_data_get_irq_chip_data(d); vlynq_irq_mask() local 157 BUG_ON(!dev); vlynq_irq_mask() 158 virq = d->irq - dev->irq_start; vlynq_irq_mask() 159 val = readl(&dev->remote->int_device[virq >> 2]); vlynq_irq_mask() 161 writel(val, &dev->remote->int_device[virq >> 2]); vlynq_irq_mask() 166 struct vlynq_device dev = irq_data_get_irq_chip_data(d); vlynq_irq_type() local 170 BUG_ON(!dev); vlynq_irq_type() 171 virq = d->irq - dev->irq_start; vlynq_irq_type() 172 val = readl(&dev->remote->int_device[virq >> 2]); vlynq_irq_type() 191 writel(val, &dev->remote->int_device[virq >> 2]); vlynq_irq_type() 197 struct vlynq_device dev = irq_data_get_irq_chip_data(d); vlynq_local_ack() local 198 u32 status = readl(&dev->local->status); vlynq_local_ack() 201 dev_name(&dev->dev), status); vlynq_local_ack() 202 writel(status, &dev->local->status); vlynq_local_ack() 207 struct vlynq_device dev = irq_data_get_irq_chip_data(d); vlynq_remote_ack() local 208 u32 status = readl(&dev->remote->status); vlynq_remote_ack() 211 dev_name(&dev->dev), status); vlynq_remote_ack() 212 writel(status, &dev->remote->status); vlynq_remote_ack() 217 struct vlynq_device dev = dev_id; vlynq_irq() local 221 status = readl(&dev->local->int_status); vlynq_irq() 222 writel(status, &dev->local->int_status); vlynq_irq() 229 do_IRQ(dev->irq_start + virq); vlynq_irq() 258 static int vlynq_setup_irq(struct vlynq_device dev) vlynq_setup_irq() argument 263 if (dev->local_irq == dev->remote_irq) { vlynq_setup_irq() 266 dev_name(&dev->dev)); vlynq_setup_irq() 271 writel(readl(&dev->local->status), &dev->local->status); vlynq_setup_irq() 272 writel(readl(&dev->remote->status), &dev->remote->status); vlynq_setup_irq() 275 val = VLYNQ_CTRL_INT_VECTOR(dev->local_irq); vlynq_setup_irq() 278 val \|= readl(&dev->local->control); vlynq_setup_irq() 279 writel(VLYNQ_INT_OFFSET, &dev->local->int_ptr); vlynq_setup_irq() 280 writel(val, &dev->local->control); vlynq_setup_irq() 282 val = VLYNQ_CTRL_INT_VECTOR(dev->remote_irq); vlynq_setup_irq() 284 val \|= readl(&dev->remote->control); vlynq_setup_irq() 285 writel(VLYNQ_INT_OFFSET, &dev->remote->int_ptr); vlynq_setup_irq() 286 writel(val, &dev->remote->int_ptr); vlynq_setup_irq() 287 writel(val, &dev->remote->control); vlynq_setup_irq() 289 for (i = dev->irq_start; i <= dev->irq_end; i++) { vlynq_setup_irq() 290 virq = i - dev->irq_start; vlynq_setup_irq() 291 if (virq == dev->local_irq) { vlynq_setup_irq() 294 irq_set_chip_data(i, dev); vlynq_setup_irq() 295 } else if (virq == dev->remote_irq) { vlynq_setup_irq() 298 irq_set_chip_data(i, dev); vlynq_setup_irq() 302 irq_set_chip_data(i, dev); vlynq_setup_irq() 303 writel(0, &dev->remote->int_device[virq >> 2]); vlynq_setup_irq() 307 if (request_irq(dev->irq, vlynq_irq, IRQF_SHARED, "vlynq", dev)) { vlynq_setup_irq() 309 dev_name(&dev->dev)); vlynq_setup_irq() 316 static void vlynq_device_release(struct device dev) vlynq_device_release() argument 318 struct vlynq_device vdev = to_vlynq_device(dev); vlynq_device_release() 322 static int vlynq_device_match(struct device dev, vlynq_device_match() argument 325 struct vlynq_device vdev = to_vlynq_device(dev); vlynq_device_match() 344 static int vlynq_device_probe(struct device dev) vlynq_device_probe() argument 346 struct vlynq_device vdev = to_vlynq_device(dev); vlynq_device_probe() 347 struct vlynq_driver drv = to_vlynq_driver(dev->driver); vlynq_device_probe() 354 put_device(dev); vlynq_device_probe() 358 static int vlynq_device_remove(struct device dev) vlynq_device_remove() argument 360 struct vlynq_driver drv = to_vlynq_driver(dev->driver); vlynq_device_remove() 363 drv->remove(to_vlynq_device(dev)); vlynq_device_remove() 390 static int __vlynq_try_remote(struct vlynq_device dev) __vlynq_try_remote() argument 394 vlynq_reset(dev); __vlynq_try_remote() 395 for (i = dev->dev_id ? vlynq_rdiv2 : vlynq_rdiv8; dev->dev_id ? __vlynq_try_remote() 397 dev->dev_id ? i++ : i--) { __vlynq_try_remote() 399 if (!vlynq_linked(dev)) __vlynq_try_remote() 402 writel((readl(&dev->remote->control) & __vlynq_try_remote() 406 &dev->remote->control); __vlynq_try_remote() 407 writel((readl(&dev->local->control) __vlynq_try_remote() 411 &dev->local->control); __vlynq_try_remote() 413 if (vlynq_linked(dev)) { __vlynq_try_remote() 416 dev_name(&dev->dev), i - vlynq_rdiv1 + 1); __vlynq_try_remote() 417 dev->divisor = i; __vlynq_try_remote() 420 vlynq_reset(dev); __vlynq_try_remote() 434 static int __vlynq_try_local(struct vlynq_device dev) __vlynq_try_local() argument 438 vlynq_reset(dev); __vlynq_try_local() 440 for (i = dev->dev_id ? vlynq_ldiv2 : vlynq_ldiv8; dev->dev_id ? __vlynq_try_local() 442 dev->dev_id ? i++ : i--) { __vlynq_try_local() 444 writel((readl(&dev->local->control) & __vlynq_try_local() 448 &dev->local->control); __vlynq_try_local() 450 if (vlynq_linked(dev)) { __vlynq_try_local() 453 dev_name(&dev->dev), i - vlynq_ldiv1 + 1); __vlynq_try_local() 454 dev->divisor = i; __vlynq_try_local() 457 vlynq_reset(dev); __vlynq_try_local() 470 static int __vlynq_try_external(struct vlynq_device dev) __vlynq_try_external() argument 472 vlynq_reset(dev); __vlynq_try_external() 473 if (!vlynq_linked(dev)) __vlynq_try_external() 476 writel((readl(&dev->remote->control) & __vlynq_try_external() 478 &dev->remote->control); __vlynq_try_external() 480 writel((readl(&dev->local->control) & __vlynq_try_external() 482 &dev->local->control); __vlynq_try_external() 484 if (vlynq_linked(dev)) { __vlynq_try_external() 486 dev_name(&dev->dev)); __vlynq_try_external() 487 dev->divisor = vlynq_div_external; __vlynq_try_external() 494 static int __vlynq_enable_device(struct vlynq_device dev) __vlynq_enable_device() argument 497 struct plat_vlynq_ops ops = dev->dev.platform_data; __vlynq_enable_device() 499 result = ops->on(dev); __vlynq_enable_device() 503 switch (dev->divisor) { __vlynq_enable_device() 510 if (vlynq_linked(dev) && readl(&dev->remote->control) & __vlynq_enable_device() 512 if (!__vlynq_try_remote(dev) \|\| __vlynq_enable_device() 513 !__vlynq_try_local(dev) \|\| __vlynq_enable_device() 514 !__vlynq_try_external(dev)) __vlynq_enable_device() 517 if (!__vlynq_try_external(dev) \|\| __vlynq_enable_device() 518 !__vlynq_try_local(dev) \|\| __vlynq_enable_device() 519 !__vlynq_try_remote(dev)) __vlynq_enable_device() 532 VLYNQ_CTRL_CLOCK_DIV(dev->divisor - __vlynq_enable_device() 533 vlynq_ldiv1), &dev->local->control); __vlynq_enable_device() 534 writel(0, &dev->remote->control); __vlynq_enable_device() 535 if (vlynq_linked(dev)) { __vlynq_enable_device() 538 dev_name(&dev->dev), __vlynq_enable_device() 539 dev->divisor - vlynq_ldiv1 + 1); __vlynq_enable_device() 551 writel(0, &dev->local->control); __vlynq_enable_device() 553 VLYNQ_CTRL_CLOCK_DIV(dev->divisor - __vlynq_enable_device() 554 vlynq_rdiv1), &dev->remote->control); __vlynq_enable_device() 555 if (vlynq_linked(dev)) { __vlynq_enable_device() 558 dev_name(&dev->dev), __vlynq_enable_device() 559 dev->divisor - vlynq_rdiv1 + 1); __vlynq_enable_device() 565 ops->off(dev); __vlynq_enable_device() 569 int vlynq_enable_device(struct vlynq_device dev) vlynq_enable_device() argument 571 struct plat_vlynq_ops ops = dev->dev.platform_data; vlynq_enable_device() 574 result = __vlynq_enable_device(dev); vlynq_enable_device() 578 result = vlynq_setup_irq(dev); vlynq_enable_device() 580 ops->off(dev); vlynq_enable_device() 582 dev->enabled = !result; vlynq_enable_device() 588 void vlynq_disable_device(struct vlynq_device dev) vlynq_disable_device() argument 590 struct plat_vlynq_ops ops = dev->dev.platform_data; vlynq_disable_device() 592 dev->enabled = 0; vlynq_disable_device() 593 free_irq(dev->irq, dev); vlynq_disable_device() 594 ops->off(dev); vlynq_disable_device() 598 int vlynq_set_local_mapping(struct vlynq_device dev, u32 tx_offset, vlynq_set_local_mapping() argument 603 if (!dev->enabled) vlynq_set_local_mapping() 606 writel(tx_offset, &dev->local->tx_offset); vlynq_set_local_mapping() 608 writel(mapping[i].offset, &dev->local->rx_mapping[i].offset); vlynq_set_local_mapping() 609 writel(mapping[i].size, &dev->local->rx_mapping[i].size); vlynq_set_local_mapping() 615 int vlynq_set_remote_mapping(struct vlynq_device dev, u32 tx_offset, vlynq_set_remote_mapping() argument 620 if (!dev->enabled) vlynq_set_remote_mapping() 623 writel(tx_offset, &dev->remote->tx_offset); vlynq_set_remote_mapping() 625 writel(mapping[i].offset, &dev->remote->rx_mapping[i].offset); vlynq_set_remote_mapping() 626 writel(mapping[i].size, &dev->remote->rx_mapping[i].size); vlynq_set_remote_mapping() 632 int vlynq_set_local_irq(struct vlynq_device dev, int virq) vlynq_set_local_irq() argument 634 int irq = dev->irq_start + virq; vlynq_set_local_irq() 635 if (dev->enabled) vlynq_set_local_irq() 638 if ((irq < dev->irq_start) \|\| (irq > dev->irq_end)) vlynq_set_local_irq() 641 if (virq == dev->remote_irq) vlynq_set_local_irq() 644 dev->local_irq = virq; vlynq_set_local_irq() 650 int vlynq_set_remote_irq(struct vlynq_device dev, int virq) vlynq_set_remote_irq() argument 652 int irq = dev->irq_start + virq; vlynq_set_remote_irq() 653 if (dev->enabled) vlynq_set_remote_irq() 656 if ((irq < dev->irq_start) \|\| (irq > dev->irq_end)) vlynq_set_remote_irq() 659 if (virq == dev->local_irq) vlynq_set_remote_irq() 662 dev->remote_irq = virq; vlynq_set_remote_irq() 670 struct vlynq_device dev; vlynq_probe() local 686 dev = kzalloc(sizeof(dev), GFP_KERNEL); vlynq_probe() 687 if (!dev) { vlynq_probe() 693 dev->id = pdev->id; vlynq_probe() 694 dev->dev.bus = &vlynq_bus_type; vlynq_probe() 695 dev->dev.parent = &pdev->dev; vlynq_probe() 696 dev_set_name(&dev->dev, "vlynq%d", dev->id); vlynq_probe() 697 dev->dev.platform_data = pdev->dev.platform_data; vlynq_probe() 698 dev->dev.release = vlynq_device_release; vlynq_probe() 700 dev->regs_start = regs_res->start; vlynq_probe() 701 dev->regs_end = regs_res->end; vlynq_probe() 702 dev->mem_start = mem_res->start; vlynq_probe() 703 dev->mem_end = mem_res->end; vlynq_probe() 706 if (!request_mem_region(regs_res->start, len, dev_name(&dev->dev))) { vlynq_probe() 708 dev_name(&dev->dev)); vlynq_probe() 713 dev->local = ioremap(regs_res->start, len); vlynq_probe() 714 if (!dev->local) { vlynq_probe() 716 dev_name(&dev->dev)); vlynq_probe() 721 dev->remote = (struct vlynq_regs )((void )dev->local + vlynq_probe() 724 dev->irq = platform_get_irq_byname(pdev, "irq"); vlynq_probe() 725 dev->irq_start = irq_res->start; vlynq_probe() 726 dev->irq_end = irq_res->end; vlynq_probe() 727 dev->local_irq = dev->irq_end - dev->irq_start; vlynq_probe() 728 dev->remote_irq = dev->local_irq - 1; vlynq_probe() 730 if (device_register(&dev->dev)) vlynq_probe() 732 platform_set_drvdata(pdev, dev); vlynq_probe() 735 dev_name(&dev->dev), (void )dev->regs_start, dev->irq, vlynq_probe() 736 (void )dev->mem_start); vlynq_probe() 738 dev->dev_id = 0; vlynq_probe() 739 dev->divisor = vlynq_div_auto; vlynq_probe() 740 result = __vlynq_enable_device(dev); vlynq_probe() 742 dev->dev_id = readl(&dev->remote->chip); vlynq_probe() 743 ((struct plat_vlynq_ops )(dev->dev.platform_data))->off(dev); vlynq_probe() 745 if (dev->dev_id) vlynq_probe() 746 printk(KERN_INFO "Found a VLYNQ device: %08x\n", dev->dev_id); vlynq_probe() 751 iounmap(dev->local); vlynq_probe() 755 kfree(dev); vlynq_probe() 761 struct vlynq_device dev = platform_get_drvdata(pdev); vlynq_remove() local 763 device_unregister(&dev->dev); vlynq_remove() 764 iounmap(dev->local); vlynq_remove() 765 release_mem_region(dev->regs_start, vlynq_remove() 766 dev->regs_end - dev->regs_start + 1); vlynq_remove() 768 kfree(dev); vlynq_remove()
/linux-4.1.27/drivers/media/radio/
H A D	radio-cadet.c	114 static int cadet_getstereo(struct cadet dev) cadet_getstereo() argument 118 if (!dev->is_fm_band) / Only FM has stereo capability! / cadet_getstereo() 121 outb(7, dev->io); / Select tuner control / cadet_getstereo() 122 if ((inb(dev->io + 1) & 0x40) == 0) cadet_getstereo() 127 static unsigned cadet_gettune(struct cadet dev) cadet_gettune() argument 136 outb(7, dev->io); /* Select tuner control / cadet_gettune() 137 curvol = inb(dev->io + 1); / Save current volume/mute setting / cadet_gettune() 138 outb(0x00, dev->io + 1); / Ensure WRITE-ENABLE is LOW / cadet_gettune() 139 dev->tunestat = 0xffff; cadet_gettune() 145 fifo = (fifo << 1) \| ((inb(dev->io + 1) >> 7) & 0x01); cadet_gettune() 147 outb(0x01, dev->io + 1); cadet_gettune() 148 dev->tunestat &= inb(dev->io + 1); cadet_gettune() 149 outb(0x00, dev->io + 1); cadet_gettune() 156 outb(curvol, dev->io + 1); cadet_gettune() 160 static unsigned cadet_getfreq(struct cadet dev) cadet_getfreq() argument 168 fifo = cadet_gettune(dev); cadet_getfreq() 173 if (!dev->is_fm_band) /* AM / cadet_getfreq() 188 static void cadet_settune(struct cadet dev, unsigned fifo) cadet_settune() argument 193 outb(7, dev->io); /* Select tuner control / cadet_settune() 200 outb(7, dev->io); / Select tuner control / cadet_settune() 201 outb(test, dev->io + 1); / Initialize for write / cadet_settune() 204 outb(test, dev->io + 1); cadet_settune() 206 outb(test, dev->io + 1); cadet_settune() 209 outb(test, dev->io + 1); cadet_settune() 213 static void cadet_setfreq(struct cadet dev, unsigned freq) cadet_setfreq() argument 219 freq = clamp(freq, bands[dev->is_fm_band].rangelow, cadet_setfreq() 220 bands[dev->is_fm_band].rangehigh); cadet_setfreq() 221 dev->curfreq = freq; cadet_setfreq() 226 if (dev->is_fm_band) { /* FM / cadet_setfreq() 247 outb(7, dev->io); / Select tuner control / cadet_setfreq() 248 curvol = inb(dev->io + 1); cadet_setfreq() 254 cadet_settune(dev, fifo \| (j << 16)); cadet_setfreq() 256 outb(7, dev->io); / Select tuner control / cadet_setfreq() 257 outb(curvol, dev->io + 1); cadet_setfreq() 261 cadet_gettune(dev); cadet_setfreq() 262 if ((dev->tunestat & 0x40) == 0) { / Tuned / cadet_setfreq() 263 dev->sigstrength = sigtable[dev->is_fm_band][j]; cadet_setfreq() 267 dev->sigstrength = 0; cadet_setfreq() 269 outb(3, dev->io); cadet_setfreq() 270 outb(inb(dev->io + 1) & 0x7f, dev->io + 1); cadet_setfreq() 273 static bool cadet_has_rds_data(struct cadet dev) cadet_has_rds_data() argument 277 mutex_lock(&dev->lock); cadet_has_rds_data() 278 result = dev->rdsin != dev->rdsout; cadet_has_rds_data() 279 mutex_unlock(&dev->lock); cadet_has_rds_data() 286 struct cadet dev = (void )data; cadet_handler() local 289 if (mutex_trylock(&dev->lock)) { cadet_handler() 290 outb(0x3, dev->io); /* Select RDS Decoder Control / cadet_handler() 291 if ((inb(dev->io + 1) & 0x20) != 0) cadet_handler() 293 outb(0x80, dev->io); / Select RDS fifo / cadet_handler() 295 while ((inb(dev->io) & 0x80) != 0) { cadet_handler() 296 dev->rdsbuf[dev->rdsin] = inb(dev->io + 1); cadet_handler() 297 if (dev->rdsin + 1 != dev->rdsout) cadet_handler() 298 dev->rdsin++; cadet_handler() 300 mutex_unlock(&dev->lock); cadet_handler() 306 if (cadet_has_rds_data(dev)) cadet_handler() 307 wake_up_interruptible(&dev->read_queue); cadet_handler() 312 init_timer(&dev->readtimer); cadet_handler() 313 dev->readtimer.function = cadet_handler; cadet_handler() 314 dev->readtimer.data = data; cadet_handler() 315 dev->readtimer.expires = jiffies + msecs_to_jiffies(50); cadet_handler() 316 add_timer(&dev->readtimer); cadet_handler() 319 static void cadet_start_rds(struct cadet dev) cadet_start_rds() argument 321 dev->rdsstat = 1; cadet_start_rds() 322 outb(0x80, dev->io); /* Select RDS fifo / cadet_start_rds() 323 init_timer(&dev->readtimer); cadet_start_rds() 324 dev->readtimer.function = cadet_handler; cadet_start_rds() 325 dev->readtimer.data = (unsigned long)dev; cadet_start_rds() 326 dev->readtimer.expires = jiffies + msecs_to_jiffies(50); cadet_start_rds() 327 add_timer(&dev->readtimer); cadet_start_rds() 332 struct cadet dev = video_drvdata(file); cadet_read() local 336 mutex_lock(&dev->lock); cadet_read() 337 if (dev->rdsstat == 0) cadet_read() 338 cadet_start_rds(dev); cadet_read() 339 mutex_unlock(&dev->lock); cadet_read() 341 if (!cadet_has_rds_data(dev) && (file->f_flags & O_NONBLOCK)) cadet_read() 343 i = wait_event_interruptible(dev->read_queue, cadet_has_rds_data(dev)); cadet_read() 347 mutex_lock(&dev->lock); cadet_read() 348 while (i < count && dev->rdsin != dev->rdsout) cadet_read() 349 readbuf[i++] = dev->rdsbuf[dev->rdsout++]; cadet_read() 350 mutex_unlock(&dev->lock); cadet_read() 373 struct cadet dev = video_drvdata(file); vidioc_g_tuner() local 382 if (dev->is_fm_band) { vidioc_g_tuner() 383 v->rxsubchans = cadet_getstereo(dev); vidioc_g_tuner() 384 outb(3, dev->io); vidioc_g_tuner() 385 outb(inb(dev->io + 1) & 0x7f, dev->io + 1); vidioc_g_tuner() 387 outb(3, dev->io); vidioc_g_tuner() 388 if (inb(dev->io + 1) & 0x80) vidioc_g_tuner() 396 v->signal = dev->sigstrength; / We might need to modify scaling of this / vidioc_g_tuner() 420 struct cadet dev = video_drvdata(file); vidioc_g_frequency() local 425 f->frequency = dev->curfreq; vidioc_g_frequency() 433 struct cadet dev = video_drvdata(file); vidioc_s_frequency() local 437 dev->is_fm_band = vidioc_s_frequency() 439 cadet_setfreq(dev, f->frequency); vidioc_s_frequency() 445 struct cadet dev = container_of(ctrl->handler, struct cadet, ctrl_handler); cadet_s_ctrl() local 449 outb(7, dev->io); /* Select tuner control / cadet_s_ctrl() 451 outb(0x00, dev->io + 1); cadet_s_ctrl() 453 outb(0x20, dev->io + 1); cadet_s_ctrl() 461 struct cadet dev = video_drvdata(file); cadet_open() local 464 mutex_lock(&dev->lock); cadet_open() 469 init_waitqueue_head(&dev->read_queue); cadet_open() 471 mutex_unlock(&dev->lock); cadet_open() 477 struct cadet dev = video_drvdata(file); cadet_release() local 479 mutex_lock(&dev->lock); cadet_release() 480 if (v4l2_fh_is_singular_file(file) && dev->rdsstat) { cadet_release() 481 del_timer_sync(&dev->readtimer); cadet_release() 482 dev->rdsstat = 0; cadet_release() 485 mutex_unlock(&dev->lock); cadet_release() 491 struct cadet dev = video_drvdata(file); cadet_poll() local 495 poll_wait(file, &dev->read_queue, wait); cadet_poll() 496 if (dev->rdsstat == 0 && (req_events & (POLLIN \| POLLRDNORM))) { cadet_poll() 497 mutex_lock(&dev->lock); cadet_poll() 498 if (dev->rdsstat == 0) cadet_poll() 499 cadet_start_rds(dev); cadet_poll() 500 mutex_unlock(&dev->lock); cadet_poll() 502 if (cadet_has_rds_data(dev)) cadet_poll() 543 static int cadet_pnp_probe(struct pnp_dev dev, const struct pnp_device_id dev_id) cadet_pnp_probe() argument 545 if (!dev) cadet_pnp_probe() 551 if (!pnp_port_valid(dev, 0)) cadet_pnp_probe() 554 io = pnp_port_start(dev, 0); cadet_pnp_probe() 572 static void cadet_probe(struct cadet dev) cadet_probe() argument 578 dev->io = iovals[i]; cadet_probe() 579 if (request_region(dev->io, 2, "cadet-probe")) { cadet_probe() 580 cadet_setfreq(dev, bands[1].rangelow); cadet_probe() 581 if (cadet_getfreq(dev) == bands[1].rangelow) { cadet_probe() 582 release_region(dev->io, 2); cadet_probe() 585 release_region(dev->io, 2); cadet_probe() 588 dev->io = -1; cadet_probe() 598 struct cadet dev = &cadet_card; cadet_init() local 599 struct v4l2_device v4l2_dev = &dev->v4l2_dev; cadet_init() 604 mutex_init(&dev->lock); cadet_init() 609 dev->io = io; cadet_init() 612 if (dev->io < 0) cadet_init() 613 cadet_probe(dev); cadet_init() 616 if (dev->io < 0) { cadet_init() 623 if (!request_region(dev->io, 2, "cadet")) cadet_init() 628 release_region(dev->io, 2); cadet_init() 633 hdl = &dev->ctrl_handler; cadet_init() 644 dev->is_fm_band = true; cadet_init() 645 dev->curfreq = bands[dev->is_fm_band].rangelow; cadet_init() 646 cadet_setfreq(dev, dev->curfreq); cadet_init() 647 strlcpy(dev->vdev.name, v4l2_dev->name, sizeof(dev->vdev.name)); cadet_init() 648 dev->vdev.v4l2_dev = v4l2_dev; cadet_init() 649 dev->vdev.fops = &cadet_fops; cadet_init() 650 dev->vdev.ioctl_ops = &cadet_ioctl_ops; cadet_init() 651 dev->vdev.release = video_device_release_empty; cadet_init() 652 dev->vdev.lock = &dev->lock; cadet_init() 653 video_set_drvdata(&dev->vdev, dev); cadet_init() 655 res = video_register_device(&dev->vdev, VFL_TYPE_RADIO, radio_nr); cadet_init() 658 v4l2_info(v4l2_dev, "ADS Cadet Radio Card at 0x%x\n", dev->io); cadet_init() 663 release_region(dev->io, 2); cadet_init() 671 struct cadet dev = &cadet_card; cadet_exit() local 673 video_unregister_device(&dev->vdev); cadet_exit() 674 v4l2_ctrl_handler_free(&dev->ctrl_handler); cadet_exit() 675 v4l2_device_unregister(&dev->v4l2_dev); cadet_exit() 676 outb(7, dev->io); /* Mute */ cadet_exit() 677 outb(0x00, dev->io + 1); cadet_exit() 678 release_region(dev->io, 2); cadet_exit()
/linux-4.1.27/drivers/net/ethernet/ibm/emac/
H A D	core.c	127 static inline void emac_report_timeout_error(struct emac_instance dev, emac_report_timeout_error() argument 130 if (emac_has_feature(dev, EMAC_FTR_440GX_PHY_CLK_FIX \| emac_report_timeout_error() 133 DBG(dev, "%s" NL, error); emac_report_timeout_error() 135 printk(KERN_ERR "%s: %s\n", dev->ofdev->dev.of_node->full_name, emac_report_timeout_error() 143 static inline void emac_rx_clk_tx(struct emac_instance dev) emac_rx_clk_tx() argument 146 if (emac_has_feature(dev, EMAC_FTR_440EP_PHY_CLK_FIX)) emac_rx_clk_tx() 148 0, SDR0_MFR_ECS >> dev->cell_index); emac_rx_clk_tx() 152 static inline void emac_rx_clk_default(struct emac_instance dev) emac_rx_clk_default() argument 155 if (emac_has_feature(dev, EMAC_FTR_440EP_PHY_CLK_FIX)) emac_rx_clk_default() 157 SDR0_MFR_ECS >> dev->cell_index, 0); emac_rx_clk_default() 197 static void emac_clean_tx_ring(struct emac_instance dev); 198 static void __emac_set_multicast_list(struct emac_instance dev); 216 static inline void emac_tx_enable(struct emac_instance dev) emac_tx_enable() argument 218 struct emac_regs __iomem p = dev->emacp; emac_tx_enable() 221 DBG(dev, "tx_enable" NL); emac_tx_enable() 228 static void emac_tx_disable(struct emac_instance dev) emac_tx_disable() argument 230 struct emac_regs __iomem p = dev->emacp; emac_tx_disable() 233 DBG(dev, "tx_disable" NL); emac_tx_disable() 237 int n = dev->stop_timeout; emac_tx_disable() 244 emac_report_timeout_error(dev, "TX disable timeout"); emac_tx_disable() 248 static void emac_rx_enable(struct emac_instance dev) emac_rx_enable() argument 250 struct emac_regs __iomem p = dev->emacp; emac_rx_enable() 253 if (unlikely(test_bit(MAL_COMMAC_RX_STOPPED, &dev->commac.flags))) emac_rx_enable() 256 DBG(dev, "rx_enable" NL); emac_rx_enable() 262 int n = dev->stop_timeout; emac_rx_enable() 268 emac_report_timeout_error(dev, emac_rx_enable() 277 static void emac_rx_disable(struct emac_instance dev) emac_rx_disable() argument 279 struct emac_regs __iomem p = dev->emacp; emac_rx_disable() 282 DBG(dev, "rx_disable" NL); emac_rx_disable() 286 int n = dev->stop_timeout; emac_rx_disable() 293 emac_report_timeout_error(dev, "RX disable timeout"); emac_rx_disable() 297 static inline void emac_netif_stop(struct emac_instance dev) emac_netif_stop() argument 299 netif_tx_lock_bh(dev->ndev); emac_netif_stop() 300 netif_addr_lock(dev->ndev); emac_netif_stop() 301 dev->no_mcast = 1; emac_netif_stop() 302 netif_addr_unlock(dev->ndev); emac_netif_stop() 303 netif_tx_unlock_bh(dev->ndev); emac_netif_stop() 304 dev->ndev->trans_start = jiffies; /* prevent tx timeout / emac_netif_stop() 305 mal_poll_disable(dev->mal, &dev->commac); emac_netif_stop() 306 netif_tx_disable(dev->ndev); emac_netif_stop() 309 static inline void emac_netif_start(struct emac_instance dev) emac_netif_start() argument 311 netif_tx_lock_bh(dev->ndev); emac_netif_start() 312 netif_addr_lock(dev->ndev); emac_netif_start() 313 dev->no_mcast = 0; emac_netif_start() 314 if (dev->mcast_pending && netif_running(dev->ndev)) emac_netif_start() 315 __emac_set_multicast_list(dev); emac_netif_start() 316 netif_addr_unlock(dev->ndev); emac_netif_start() 317 netif_tx_unlock_bh(dev->ndev); emac_netif_start() 319 netif_wake_queue(dev->ndev); emac_netif_start() 326 mal_poll_enable(dev->mal, &dev->commac); emac_netif_start() 329 static inline void emac_rx_disable_async(struct emac_instance dev) emac_rx_disable_async() argument 331 struct emac_regs __iomem p = dev->emacp; emac_rx_disable_async() 334 DBG(dev, "rx_disable_async" NL); emac_rx_disable_async() 341 static int emac_reset(struct emac_instance dev) emac_reset() argument 343 struct emac_regs __iomem p = dev->emacp; emac_reset() 346 DBG(dev, "reset" NL); emac_reset() 348 if (!dev->reset_failed) { emac_reset() 352 emac_rx_disable(dev); emac_reset() 353 emac_tx_disable(dev); emac_reset() 365 if (emac_has_feature(dev, EMAC_FTR_460EX_PHY_CLK_FIX)) { emac_reset() 366 if (dev->phy_address == 0xffffffff && emac_reset() 367 dev->phy_map == 0xffffffff) { emac_reset() 370 0, SDR0_ETH_CFG_ECS << dev->cell_index); emac_reset() 374 SDR0_ETH_CFG_ECS << dev->cell_index, 0); emac_reset() 384 if (emac_has_feature(dev, EMAC_FTR_460EX_PHY_CLK_FIX)) { emac_reset() 385 if (dev->phy_address == 0xffffffff && emac_reset() 386 dev->phy_map == 0xffffffff) { emac_reset() 389 SDR0_ETH_CFG_ECS << dev->cell_index, 0); emac_reset() 395 dev->reset_failed = 0; emac_reset() 398 emac_report_timeout_error(dev, "reset timeout"); emac_reset() 399 dev->reset_failed = 1; emac_reset() 404 static void emac_hash_mc(struct emac_instance dev) emac_hash_mc() argument 406 const int regs = EMAC_XAHT_REGS(dev); emac_hash_mc() 407 u32 gaht_base = emac_gaht_base(dev); emac_hash_mc() 412 DBG(dev, "hash_mc %d" NL, netdev_mc_count(dev->ndev)); emac_hash_mc() 416 netdev_for_each_mc_addr(ha, dev->ndev) { emac_hash_mc() 418 DBG2(dev, "mc %pM" NL, ha->addr); emac_hash_mc() 420 slot = EMAC_XAHT_CRC_TO_SLOT(dev, emac_hash_mc() 422 reg = EMAC_XAHT_SLOT_TO_REG(dev, slot); emac_hash_mc() 423 mask = EMAC_XAHT_SLOT_TO_MASK(dev, slot); emac_hash_mc() 434 struct emac_instance dev = netdev_priv(ndev); emac_iff2rmr() local 439 if (emac_has_feature(dev, EMAC_FTR_EMAC4)) emac_iff2rmr() 447 (netdev_mc_count(ndev) > EMAC_XAHT_SLOTS(dev))) emac_iff2rmr() 452 if (emac_has_feature(dev, EMAC_APM821XX_REQ_JUMBO_FRAME_SIZE)) { emac_iff2rmr() 460 static u32 __emac_calc_base_mr1(struct emac_instance dev, int tx_size, int rx_size) __emac_calc_base_mr1() argument 464 DBG2(dev, "__emac_calc_base_mr1" NL); __emac_calc_base_mr1() 472 dev->ndev->name, tx_size); __emac_calc_base_mr1() 484 dev->ndev->name, rx_size); __emac_calc_base_mr1() 490 static u32 __emac4_calc_base_mr1(struct emac_instance dev, int tx_size, int rx_size) __emac4_calc_base_mr1() argument 493 EMAC4_MR1_OBCI(dev->opb_bus_freq / 1000000); __emac4_calc_base_mr1() 495 DBG2(dev, "__emac4_calc_base_mr1" NL); __emac4_calc_base_mr1() 509 dev->ndev->name, tx_size); __emac4_calc_base_mr1() 524 dev->ndev->name, rx_size); __emac4_calc_base_mr1() 530 static u32 emac_calc_base_mr1(struct emac_instance dev, int tx_size, int rx_size) emac_calc_base_mr1() argument 532 return emac_has_feature(dev, EMAC_FTR_EMAC4) ? emac_calc_base_mr1() 533 __emac4_calc_base_mr1(dev, tx_size, rx_size) : emac_calc_base_mr1() 534 __emac_calc_base_mr1(dev, tx_size, rx_size); emac_calc_base_mr1() 537 static inline u32 emac_calc_trtr(struct emac_instance dev, unsigned int size) emac_calc_trtr() argument 539 if (emac_has_feature(dev, EMAC_FTR_EMAC4)) emac_calc_trtr() 545 static inline u32 emac_calc_rwmr(struct emac_instance dev, emac_calc_rwmr() argument 548 if (emac_has_feature(dev, EMAC_FTR_EMAC4)) emac_calc_rwmr() 554 static int emac_configure(struct emac_instance dev) emac_configure() argument 556 struct emac_regs __iomem p = dev->emacp; emac_configure() 557 struct net_device ndev = dev->ndev; emac_configure() 558 int tx_size, rx_size, link = netif_carrier_ok(dev->ndev); emac_configure() 561 DBG(dev, "configure" NL); emac_configure() 567 } else if (emac_reset(dev) < 0) emac_configure() 570 if (emac_has_feature(dev, EMAC_FTR_HAS_TAH)) emac_configure() 571 tah_reset(dev->tah_dev); emac_configure() 573 DBG(dev, " link = %d duplex = %d, pause = %d, asym_pause = %d\n", emac_configure() 574 link, dev->phy.duplex, dev->phy.pause, dev->phy.asym_pause); emac_configure() 577 tx_size = dev->tx_fifo_size; emac_configure() 578 rx_size = dev->rx_fifo_size; emac_configure() 585 else if (dev->phy.duplex == DUPLEX_FULL) emac_configure() 589 dev->stop_timeout = STOP_TIMEOUT_10; emac_configure() 590 switch (dev->phy.speed) { emac_configure() 592 if (emac_phy_gpcs(dev->phy.mode)) { emac_configure() 594 (dev->phy.gpcs_address != 0xffffffff) ? emac_configure() 595 dev->phy.gpcs_address : dev->phy.address); emac_configure() 605 tx_size = dev->tx_fifo_size_gige; emac_configure() 606 rx_size = dev->rx_fifo_size_gige; emac_configure() 608 if (dev->ndev->mtu > ETH_DATA_LEN) { emac_configure() 609 if (emac_has_feature(dev, EMAC_FTR_EMAC4)) emac_configure() 613 dev->stop_timeout = STOP_TIMEOUT_1000_JUMBO; emac_configure() 615 dev->stop_timeout = STOP_TIMEOUT_1000; emac_configure() 619 dev->stop_timeout = STOP_TIMEOUT_100; emac_configure() 625 if (emac_has_feature(dev, EMAC_FTR_HAS_RGMII)) emac_configure() 626 rgmii_set_speed(dev->rgmii_dev, dev->rgmii_port, emac_configure() 627 dev->phy.speed); emac_configure() 628 if (emac_has_feature(dev, EMAC_FTR_HAS_ZMII)) emac_configure() 629 zmii_set_speed(dev->zmii_dev, dev->zmii_port, dev->phy.speed); emac_configure() 634 if (!emac_has_feature(dev, EMAC_FTR_NO_FLOW_CONTROL_40x) && emac_configure() 635 dev->phy.duplex == DUPLEX_FULL) { emac_configure() 636 if (dev->phy.pause) emac_configure() 638 else if (dev->phy.asym_pause) emac_configure() 643 mr1 \|= emac_calc_base_mr1(dev, tx_size, rx_size); emac_configure() 658 emac_hash_mc(dev); emac_configure() 662 if (emac_has_feature(dev, EMAC_FTR_EMAC4)) emac_configure() 663 r = EMAC4_TMR1((dev->mal_burst_size / dev->fifo_entry_size) + 1, emac_configure() 664 tx_size / 2 / dev->fifo_entry_size); emac_configure() 666 r = EMAC_TMR1((dev->mal_burst_size / dev->fifo_entry_size) + 1, emac_configure() 667 tx_size / 2 / dev->fifo_entry_size); emac_configure() 669 out_be32(&p->trtr, emac_calc_trtr(dev, tx_size / 2)); emac_configure() 690 r = emac_calc_rwmr(dev, rx_size / 8 / dev->fifo_entry_size, emac_configure() 691 rx_size / 4 / dev->fifo_entry_size); emac_configure() 701 if (emac_has_feature(dev, EMAC_FTR_EMAC4)) emac_configure() 707 if (emac_phy_gpcs(dev->phy.mode)) { emac_configure() 708 if (dev->phy.gpcs_address != 0xffffffff) emac_configure() 709 emac_mii_reset_gpcs(&dev->phy); emac_configure() 711 emac_mii_reset_phy(&dev->phy); emac_configure() 717 static void emac_reinitialize(struct emac_instance dev) emac_reinitialize() argument 719 DBG(dev, "reinitialize" NL); emac_reinitialize() 721 emac_netif_stop(dev); emac_reinitialize() 722 if (!emac_configure(dev)) { emac_reinitialize() 723 emac_tx_enable(dev); emac_reinitialize() 724 emac_rx_enable(dev); emac_reinitialize() 726 emac_netif_start(dev); emac_reinitialize() 729 static void emac_full_tx_reset(struct emac_instance dev) emac_full_tx_reset() argument 731 DBG(dev, "full_tx_reset" NL); emac_full_tx_reset() 733 emac_tx_disable(dev); emac_full_tx_reset() 734 mal_disable_tx_channel(dev->mal, dev->mal_tx_chan); emac_full_tx_reset() 735 emac_clean_tx_ring(dev); emac_full_tx_reset() 736 dev->tx_cnt = dev->tx_slot = dev->ack_slot = 0; emac_full_tx_reset() 738 emac_configure(dev); emac_full_tx_reset() 740 mal_enable_tx_channel(dev->mal, dev->mal_tx_chan); emac_full_tx_reset() 741 emac_tx_enable(dev); emac_full_tx_reset() 742 emac_rx_enable(dev); emac_full_tx_reset() 747 struct emac_instance dev = container_of(work, struct emac_instance, reset_work); emac_reset_work() local 749 DBG(dev, "reset_work" NL); emac_reset_work() 751 mutex_lock(&dev->link_lock); emac_reset_work() 752 if (dev->opened) { emac_reset_work() 753 emac_netif_stop(dev); emac_reset_work() 754 emac_full_tx_reset(dev); emac_reset_work() 755 emac_netif_start(dev); emac_reset_work() 757 mutex_unlock(&dev->link_lock); emac_reset_work() 762 struct emac_instance dev = netdev_priv(ndev); emac_tx_timeout() local 764 DBG(dev, "tx_timeout" NL); emac_tx_timeout() 766 schedule_work(&dev->reset_work); emac_tx_timeout() 770 static inline int emac_phy_done(struct emac_instance dev, u32 stacr) emac_phy_done() argument 774 if (emac_has_feature(dev, EMAC_FTR_STACR_OC_INVERT)) emac_phy_done() 780 static int __emac_mdio_read(struct emac_instance dev, u8 id, u8 reg) __emac_mdio_read() argument 782 struct emac_regs __iomem p = dev->emacp; __emac_mdio_read() 786 mutex_lock(&dev->mdio_lock); __emac_mdio_read() 788 DBG2(dev, "mdio_read(%02x,%02x)" NL, id, reg); __emac_mdio_read() 791 if (emac_has_feature(dev, EMAC_FTR_HAS_ZMII)) __emac_mdio_read() 792 zmii_get_mdio(dev->zmii_dev, dev->zmii_port); __emac_mdio_read() 793 if (emac_has_feature(dev, EMAC_FTR_HAS_RGMII)) __emac_mdio_read() 794 rgmii_get_mdio(dev->rgmii_dev, dev->rgmii_port); __emac_mdio_read() 798 while (!emac_phy_done(dev, in_be32(&p->stacr))) { __emac_mdio_read() 801 DBG2(dev, " -> timeout wait idle\n"); __emac_mdio_read() 807 if (emac_has_feature(dev, EMAC_FTR_EMAC4)) __emac_mdio_read() 808 r = EMAC4_STACR_BASE(dev->opb_bus_freq); __emac_mdio_read() 810 r = EMAC_STACR_BASE(dev->opb_bus_freq); __emac_mdio_read() 811 if (emac_has_feature(dev, EMAC_FTR_STACR_OC_INVERT)) __emac_mdio_read() 813 if (emac_has_feature(dev, EMAC_FTR_HAS_NEW_STACR)) __emac_mdio_read() 823 while (!emac_phy_done(dev, (r = in_be32(&p->stacr)))) { __emac_mdio_read() 826 DBG2(dev, " -> timeout wait complete\n"); __emac_mdio_read() 832 DBG(dev, "mdio_read(%02x, %02x) failed" NL, id, reg); __emac_mdio_read() 839 DBG2(dev, "mdio_read -> %04x" NL, r); __emac_mdio_read() 842 if (emac_has_feature(dev, EMAC_FTR_HAS_RGMII)) __emac_mdio_read() 843 rgmii_put_mdio(dev->rgmii_dev, dev->rgmii_port); __emac_mdio_read() 844 if (emac_has_feature(dev, EMAC_FTR_HAS_ZMII)) __emac_mdio_read() 845 zmii_put_mdio(dev->zmii_dev, dev->zmii_port); __emac_mdio_read() 846 mutex_unlock(&dev->mdio_lock); __emac_mdio_read() 851 static void __emac_mdio_write(struct emac_instance dev, u8 id, u8 reg, __emac_mdio_write() argument 854 struct emac_regs __iomem p = dev->emacp; __emac_mdio_write() 858 mutex_lock(&dev->mdio_lock); __emac_mdio_write() 860 DBG2(dev, "mdio_write(%02x,%02x,%04x)" NL, id, reg, val); __emac_mdio_write() 863 if (emac_has_feature(dev, EMAC_FTR_HAS_ZMII)) __emac_mdio_write() 864 zmii_get_mdio(dev->zmii_dev, dev->zmii_port); __emac_mdio_write() 865 if (emac_has_feature(dev, EMAC_FTR_HAS_RGMII)) __emac_mdio_write() 866 rgmii_get_mdio(dev->rgmii_dev, dev->rgmii_port); __emac_mdio_write() 870 while (!emac_phy_done(dev, in_be32(&p->stacr))) { __emac_mdio_write() 873 DBG2(dev, " -> timeout wait idle\n"); __emac_mdio_write() 879 if (emac_has_feature(dev, EMAC_FTR_EMAC4)) __emac_mdio_write() 880 r = EMAC4_STACR_BASE(dev->opb_bus_freq); __emac_mdio_write() 882 r = EMAC_STACR_BASE(dev->opb_bus_freq); __emac_mdio_write() 883 if (emac_has_feature(dev, EMAC_FTR_STACR_OC_INVERT)) __emac_mdio_write() 885 if (emac_has_feature(dev, EMAC_FTR_HAS_NEW_STACR)) __emac_mdio_write() 896 while (!emac_phy_done(dev, in_be32(&p->stacr))) { __emac_mdio_write() 899 DBG2(dev, " -> timeout wait complete\n"); __emac_mdio_write() 905 if (emac_has_feature(dev, EMAC_FTR_HAS_RGMII)) __emac_mdio_write() 906 rgmii_put_mdio(dev->rgmii_dev, dev->rgmii_port); __emac_mdio_write() 907 if (emac_has_feature(dev, EMAC_FTR_HAS_ZMII)) __emac_mdio_write() 908 zmii_put_mdio(dev->zmii_dev, dev->zmii_port); __emac_mdio_write() 909 mutex_unlock(&dev->mdio_lock); __emac_mdio_write() 914 struct emac_instance dev = netdev_priv(ndev); emac_mdio_read() local 917 res = __emac_mdio_read((dev->mdio_instance && emac_mdio_read() 918 dev->phy.gpcs_address != id) ? emac_mdio_read() 919 dev->mdio_instance : dev, emac_mdio_read() 926 struct emac_instance dev = netdev_priv(ndev); emac_mdio_write() local 928 __emac_mdio_write((dev->mdio_instance && emac_mdio_write() 929 dev->phy.gpcs_address != id) ? emac_mdio_write() 930 dev->mdio_instance : dev, emac_mdio_write() 935 static void __emac_set_multicast_list(struct emac_instance dev) __emac_set_multicast_list() argument 937 struct emac_regs __iomem p = dev->emacp; __emac_set_multicast_list() 938 u32 rmr = emac_iff2rmr(dev->ndev); __emac_set_multicast_list() 940 DBG(dev, "__multicast %08x" NL, rmr); __emac_set_multicast_list() 959 dev->mcast_pending = 0; __emac_set_multicast_list() 960 emac_rx_disable(dev); __emac_set_multicast_list() 962 emac_hash_mc(dev); __emac_set_multicast_list() 964 emac_rx_enable(dev); __emac_set_multicast_list() 970 struct emac_instance dev = netdev_priv(ndev); emac_set_multicast_list() local 972 DBG(dev, "multicast" NL); emac_set_multicast_list() 974 BUG_ON(!netif_running(dev->ndev)); emac_set_multicast_list() 976 if (dev->no_mcast) { emac_set_multicast_list() 977 dev->mcast_pending = 1; emac_set_multicast_list() 980 __emac_set_multicast_list(dev); emac_set_multicast_list() 983 static int emac_resize_rx_ring(struct emac_instance dev, int new_mtu) emac_resize_rx_ring() argument 990 mutex_lock(&dev->link_lock); emac_resize_rx_ring() 991 emac_netif_stop(dev); emac_resize_rx_ring() 992 emac_rx_disable(dev); emac_resize_rx_ring() 993 mal_disable_rx_channel(dev->mal, dev->mal_rx_chan); emac_resize_rx_ring() 995 if (dev->rx_sg_skb) { emac_resize_rx_ring() 996 ++dev->estats.rx_dropped_resize; emac_resize_rx_ring() 997 dev_kfree_skb(dev->rx_sg_skb); emac_resize_rx_ring() 998 dev->rx_sg_skb = NULL; emac_resize_rx_ring() 1006 if (dev->rx_desc[i].ctrl & MAL_RX_CTRL_FIRST) emac_resize_rx_ring() 1007 ++dev->estats.rx_dropped_resize; emac_resize_rx_ring() 1009 dev->rx_desc[i].data_len = 0; emac_resize_rx_ring() 1010 dev->rx_desc[i].ctrl = MAL_RX_CTRL_EMPTY \| emac_resize_rx_ring() 1015 if (rx_skb_size <= dev->rx_skb_size) emac_resize_rx_ring() 1026 BUG_ON(!dev->rx_skb[i]); emac_resize_rx_ring() 1027 dev_kfree_skb(dev->rx_skb[i]); emac_resize_rx_ring() 1030 dev->rx_desc[i].data_ptr = emac_resize_rx_ring() 1031 dma_map_single(&dev->ofdev->dev, skb->data - 2, rx_sync_size, emac_resize_rx_ring() 1033 dev->rx_skb[i] = skb; emac_resize_rx_ring() 1037 if (emac_has_feature(dev, EMAC_APM821XX_REQ_JUMBO_FRAME_SIZE)) { emac_resize_rx_ring() 1039 (dev->ndev->mtu > ETH_DATA_LEN); emac_resize_rx_ring() 1042 (dev->ndev->mtu > ETH_DATA_LEN); emac_resize_rx_ring() 1047 set_bit(MAL_COMMAC_RX_STOPPED, &dev->commac.flags); emac_resize_rx_ring() 1049 dev->ndev->mtu = new_mtu; emac_resize_rx_ring() 1050 emac_full_tx_reset(dev); emac_resize_rx_ring() 1053 mal_set_rcbs(dev->mal, dev->mal_rx_chan, emac_rx_size(new_mtu)); emac_resize_rx_ring() 1056 clear_bit(MAL_COMMAC_RX_STOPPED, &dev->commac.flags); emac_resize_rx_ring() 1057 dev->rx_slot = 0; emac_resize_rx_ring() 1058 mal_enable_rx_channel(dev->mal, dev->mal_rx_chan); emac_resize_rx_ring() 1059 emac_rx_enable(dev); emac_resize_rx_ring() 1060 emac_netif_start(dev); emac_resize_rx_ring() 1061 mutex_unlock(&dev->link_lock); emac_resize_rx_ring() 1069 struct emac_instance dev = netdev_priv(ndev); emac_change_mtu() local 1072 if (new_mtu < EMAC_MIN_MTU \|\| new_mtu > dev->max_mtu) emac_change_mtu() 1075 DBG(dev, "change_mtu(%d)" NL, new_mtu); emac_change_mtu() 1080 ret = emac_resize_rx_ring(dev, new_mtu); emac_change_mtu() 1085 dev->rx_skb_size = emac_rx_skb_size(new_mtu); emac_change_mtu() 1086 dev->rx_sync_size = emac_rx_sync_size(new_mtu); emac_change_mtu() 1092 static void emac_clean_tx_ring(struct emac_instance dev) emac_clean_tx_ring() argument 1097 if (dev->tx_skb[i]) { emac_clean_tx_ring() 1098 dev_kfree_skb(dev->tx_skb[i]); emac_clean_tx_ring() 1099 dev->tx_skb[i] = NULL; emac_clean_tx_ring() 1100 if (dev->tx_desc[i].ctrl & MAL_TX_CTRL_READY) emac_clean_tx_ring() 1101 ++dev->estats.tx_dropped; emac_clean_tx_ring() 1103 dev->tx_desc[i].ctrl = 0; emac_clean_tx_ring() 1104 dev->tx_desc[i].data_ptr = 0; emac_clean_tx_ring() 1108 static void emac_clean_rx_ring(struct emac_instance dev) emac_clean_rx_ring() argument 1113 if (dev->rx_skb[i]) { emac_clean_rx_ring() 1114 dev->rx_desc[i].ctrl = 0; emac_clean_rx_ring() 1115 dev_kfree_skb(dev->rx_skb[i]); emac_clean_rx_ring() 1116 dev->rx_skb[i] = NULL; emac_clean_rx_ring() 1117 dev->rx_desc[i].data_ptr = 0; emac_clean_rx_ring() 1120 if (dev->rx_sg_skb) { emac_clean_rx_ring() 1121 dev_kfree_skb(dev->rx_sg_skb); emac_clean_rx_ring() 1122 dev->rx_sg_skb = NULL; emac_clean_rx_ring() 1126 static inline int emac_alloc_rx_skb(struct emac_instance dev, int slot, emac_alloc_rx_skb() argument 1129 struct sk_buff skb = alloc_skb(dev->rx_skb_size, flags); emac_alloc_rx_skb() 1133 dev->rx_skb[slot] = skb; emac_alloc_rx_skb() 1134 dev->rx_desc[slot].data_len = 0; emac_alloc_rx_skb() 1137 dev->rx_desc[slot].data_ptr = emac_alloc_rx_skb() 1138 dma_map_single(&dev->ofdev->dev, skb->data - 2, dev->rx_sync_size, emac_alloc_rx_skb() 1141 dev->rx_desc[slot].ctrl = MAL_RX_CTRL_EMPTY \| emac_alloc_rx_skb() 1147 static void emac_print_link_status(struct emac_instance dev) emac_print_link_status() argument 1149 if (netif_carrier_ok(dev->ndev)) emac_print_link_status() 1151 dev->ndev->name, dev->phy.speed, emac_print_link_status() 1152 dev->phy.duplex == DUPLEX_FULL ? "FDX" : "HDX", emac_print_link_status() 1153 dev->phy.pause ? ", pause enabled" : emac_print_link_status() 1154 dev->phy.asym_pause ? ", asymmetric pause enabled" : ""); emac_print_link_status() 1156 printk(KERN_INFO "%s: link is down\n", dev->ndev->name); emac_print_link_status() 1162 struct emac_instance dev = netdev_priv(ndev); emac_open() local 1165 DBG(dev, "open" NL); emac_open() 1168 err = request_irq(dev->emac_irq, emac_irq, 0, "EMAC", dev); emac_open() 1171 ndev->name, dev->emac_irq); emac_open() 1177 if (emac_alloc_rx_skb(dev, i, GFP_KERNEL)) { emac_open() 1183 dev->tx_cnt = dev->tx_slot = dev->ack_slot = dev->rx_slot = 0; emac_open() 1184 clear_bit(MAL_COMMAC_RX_STOPPED, &dev->commac.flags); emac_open() 1185 dev->rx_sg_skb = NULL; emac_open() 1187 mutex_lock(&dev->link_lock); emac_open() 1188 dev->opened = 1; emac_open() 1192 if (dev->phy.address >= 0) { emac_open() 1194 if (dev->phy.def->ops->poll_link(&dev->phy)) { emac_open() 1195 dev->phy.def->ops->read_link(&dev->phy); emac_open() 1196 emac_rx_clk_default(dev); emac_open() 1197 netif_carrier_on(dev->ndev); emac_open() 1200 emac_rx_clk_tx(dev); emac_open() 1201 netif_carrier_off(dev->ndev); emac_open() 1204 dev->link_polling = 1; emac_open() 1206 schedule_delayed_work(&dev->link_work, link_poll_interval); emac_open() 1207 emac_print_link_status(dev); emac_open() 1209 netif_carrier_on(dev->ndev); emac_open() 1214 emac_configure(dev); emac_open() 1215 mal_poll_add(dev->mal, &dev->commac); emac_open() 1216 mal_enable_tx_channel(dev->mal, dev->mal_tx_chan); emac_open() 1217 mal_set_rcbs(dev->mal, dev->mal_rx_chan, emac_rx_size(ndev->mtu)); emac_open() 1218 mal_enable_rx_channel(dev->mal, dev->mal_rx_chan); emac_open() 1219 emac_tx_enable(dev); emac_open() 1220 emac_rx_enable(dev); emac_open() 1221 emac_netif_start(dev); emac_open() 1223 mutex_unlock(&dev->link_lock); emac_open() 1227 emac_clean_rx_ring(dev); emac_open() 1228 free_irq(dev->emac_irq, dev); emac_open() 1235 static int emac_link_differs(struct emac_instance dev) 1237 u32 r = in_be32(&dev->emacp->mr1); 1261 return speed != dev->phy.speed \|\| duplex != dev->phy.duplex \|\| 1262 pause != dev->phy.pause \|\| asym_pause != dev->phy.asym_pause; 1268 struct emac_instance dev = emac_link_timer() local 1273 mutex_lock(&dev->link_lock); emac_link_timer() 1274 DBG2(dev, "link timer" NL); emac_link_timer() 1276 if (!dev->opened) emac_link_timer() 1279 if (dev->phy.def->ops->poll_link(&dev->phy)) { emac_link_timer() 1280 if (!netif_carrier_ok(dev->ndev)) { emac_link_timer() 1281 emac_rx_clk_default(dev); emac_link_timer() 1283 dev->phy.def->ops->read_link(&dev->phy); emac_link_timer() 1285 netif_carrier_on(dev->ndev); emac_link_timer() 1286 emac_netif_stop(dev); emac_link_timer() 1287 emac_full_tx_reset(dev); emac_link_timer() 1288 emac_netif_start(dev); emac_link_timer() 1289 emac_print_link_status(dev); emac_link_timer() 1293 if (netif_carrier_ok(dev->ndev)) { emac_link_timer() 1294 emac_rx_clk_tx(dev); emac_link_timer() 1295 netif_carrier_off(dev->ndev); emac_link_timer() 1296 netif_tx_disable(dev->ndev); emac_link_timer() 1297 emac_reinitialize(dev); emac_link_timer() 1298 emac_print_link_status(dev); emac_link_timer() 1302 schedule_delayed_work(&dev->link_work, link_poll_interval); emac_link_timer() 1304 mutex_unlock(&dev->link_lock); emac_link_timer() 1307 static void emac_force_link_update(struct emac_instance dev) emac_force_link_update() argument 1309 netif_carrier_off(dev->ndev); emac_force_link_update() 1311 if (dev->link_polling) { emac_force_link_update() 1312 cancel_delayed_work_sync(&dev->link_work); emac_force_link_update() 1313 if (dev->link_polling) emac_force_link_update() 1314 schedule_delayed_work(&dev->link_work, PHY_POLL_LINK_OFF); emac_force_link_update() 1321 struct emac_instance dev = netdev_priv(ndev); emac_close() local 1323 DBG(dev, "close" NL); emac_close() 1325 if (dev->phy.address >= 0) { emac_close() 1326 dev->link_polling = 0; emac_close() 1327 cancel_delayed_work_sync(&dev->link_work); emac_close() 1329 mutex_lock(&dev->link_lock); emac_close() 1330 emac_netif_stop(dev); emac_close() 1331 dev->opened = 0; emac_close() 1332 mutex_unlock(&dev->link_lock); emac_close() 1334 emac_rx_disable(dev); emac_close() 1335 emac_tx_disable(dev); emac_close() 1336 mal_disable_rx_channel(dev->mal, dev->mal_rx_chan); emac_close() 1337 mal_disable_tx_channel(dev->mal, dev->mal_tx_chan); emac_close() 1338 mal_poll_del(dev->mal, &dev->commac); emac_close() 1340 emac_clean_tx_ring(dev); emac_close() 1341 emac_clean_rx_ring(dev); emac_close() 1343 free_irq(dev->emac_irq, dev); emac_close() 1350 static inline u16 emac_tx_csum(struct emac_instance dev, emac_tx_csum() argument 1353 if (emac_has_feature(dev, EMAC_FTR_HAS_TAH) && emac_tx_csum() 1355 ++dev->stats.tx_packets_csum; emac_tx_csum() 1361 static inline int emac_xmit_finish(struct emac_instance dev, int len) emac_xmit_finish() argument 1363 struct emac_regs __iomem p = dev->emacp; emac_xmit_finish() 1364 struct net_device ndev = dev->ndev; emac_xmit_finish() 1367 difference, then we can store the TMR0 value in "dev" emac_xmit_finish() 1370 if (emac_has_feature(dev, EMAC_FTR_EMAC4)) emac_xmit_finish() 1375 if (unlikely(++dev->tx_cnt == NUM_TX_BUFF)) { emac_xmit_finish() 1377 DBG2(dev, "stopped TX queue" NL); emac_xmit_finish() 1381 ++dev->stats.tx_packets; emac_xmit_finish() 1382 dev->stats.tx_bytes += len; emac_xmit_finish() 1390 struct emac_instance dev = netdev_priv(ndev); emac_start_xmit() local 1395 MAL_TX_CTRL_LAST \| emac_tx_csum(dev, skb); emac_start_xmit() 1397 slot = dev->tx_slot++; emac_start_xmit() 1398 if (dev->tx_slot == NUM_TX_BUFF) { emac_start_xmit() 1399 dev->tx_slot = 0; emac_start_xmit() 1403 DBG2(dev, "xmit(%u) %d" NL, len, slot); emac_start_xmit() 1405 dev->tx_skb[slot] = skb; emac_start_xmit() 1406 dev->tx_desc[slot].data_ptr = dma_map_single(&dev->ofdev->dev, emac_start_xmit() 1409 dev->tx_desc[slot].data_len = (u16) len; emac_start_xmit() 1411 dev->tx_desc[slot].ctrl = ctrl; emac_start_xmit() 1413 return emac_xmit_finish(dev, len); emac_start_xmit() 1416 static inline int emac_xmit_split(struct emac_instance dev, int slot, emac_xmit_split() argument 1431 dev->tx_skb[slot] = NULL; emac_xmit_split() 1432 dev->tx_desc[slot].data_ptr = pd; emac_xmit_split() 1433 dev->tx_desc[slot].data_len = (u16) chunk; emac_xmit_split() 1434 dev->tx_desc[slot].ctrl = ctrl; emac_xmit_split() 1435 ++dev->tx_cnt; emac_xmit_split() 1448 struct emac_instance dev = netdev_priv(ndev); emac_start_xmit_sg() local 1465 if (unlikely(dev->tx_cnt + nr_frags + mal_tx_chunks(len) > NUM_TX_BUFF)) emac_start_xmit_sg() 1469 emac_tx_csum(dev, skb); emac_start_xmit_sg() 1470 slot = dev->tx_slot; emac_start_xmit_sg() 1473 dev->tx_skb[slot] = NULL; emac_start_xmit_sg() 1475 dev->tx_desc[slot].data_ptr = pd = emac_start_xmit_sg() 1476 dma_map_single(&dev->ofdev->dev, skb->data, len, DMA_TO_DEVICE); emac_start_xmit_sg() 1477 dev->tx_desc[slot].data_len = (u16) chunk; emac_start_xmit_sg() 1480 slot = emac_xmit_split(dev, slot, pd + chunk, len, !nr_frags, emac_start_xmit_sg() 1487 if (unlikely(dev->tx_cnt + mal_tx_chunks(len) >= NUM_TX_BUFF)) emac_start_xmit_sg() 1490 pd = skb_frag_dma_map(&dev->ofdev->dev, frag, 0, len, emac_start_xmit_sg() 1493 slot = emac_xmit_split(dev, slot, pd, len, i == nr_frags - 1, emac_start_xmit_sg() 1497 DBG2(dev, "xmit_sg(%u) %d - %d" NL, skb->len, dev->tx_slot, slot); emac_start_xmit_sg() 1500 dev->tx_skb[slot] = skb; emac_start_xmit_sg() 1503 if (dev->tx_slot == NUM_TX_BUFF - 1) emac_start_xmit_sg() 1506 dev->tx_desc[dev->tx_slot].ctrl = ctrl; emac_start_xmit_sg() 1507 dev->tx_slot = (slot + 1) % NUM_TX_BUFF; emac_start_xmit_sg() 1509 return emac_xmit_finish(dev, skb->len); emac_start_xmit_sg() 1515 while (slot != dev->tx_slot) { emac_start_xmit_sg() 1516 dev->tx_desc[slot].ctrl = 0; emac_start_xmit_sg() 1517 --dev->tx_cnt; emac_start_xmit_sg() 1521 ++dev->estats.tx_undo; emac_start_xmit_sg() 1525 DBG2(dev, "stopped TX queue" NL); emac_start_xmit_sg() 1530 static void emac_parse_tx_error(struct emac_instance dev, u16 ctrl) emac_parse_tx_error() argument 1532 struct emac_error_stats st = &dev->estats; emac_parse_tx_error() 1534 DBG(dev, "BD TX error %04x" NL, ctrl); emac_parse_tx_error() 1559 struct emac_instance dev = param; emac_poll_tx() local 1562 DBG2(dev, "poll_tx, %d %d" NL, dev->tx_cnt, dev->ack_slot); emac_poll_tx() 1564 if (emac_has_feature(dev, EMAC_FTR_HAS_TAH)) emac_poll_tx() 1569 netif_tx_lock_bh(dev->ndev); emac_poll_tx() 1570 if (dev->tx_cnt) { emac_poll_tx() 1572 int slot = dev->ack_slot, n = 0; emac_poll_tx() 1574 ctrl = dev->tx_desc[slot].ctrl; emac_poll_tx() 1576 struct sk_buff skb = dev->tx_skb[slot]; emac_poll_tx() 1581 dev->tx_skb[slot] = NULL; emac_poll_tx() 1586 emac_parse_tx_error(dev, ctrl); emac_poll_tx() 1588 if (--dev->tx_cnt) emac_poll_tx() 1592 dev->ack_slot = slot; emac_poll_tx() 1593 if (netif_queue_stopped(dev->ndev) && emac_poll_tx() 1594 dev->tx_cnt < EMAC_TX_WAKEUP_THRESH) emac_poll_tx() 1595 netif_wake_queue(dev->ndev); emac_poll_tx() 1597 DBG2(dev, "tx %d pkts" NL, n); emac_poll_tx() 1600 netif_tx_unlock_bh(dev->ndev); emac_poll_tx() 1603 static inline void emac_recycle_rx_skb(struct emac_instance dev, int slot, emac_recycle_rx_skb() argument 1606 struct sk_buff skb = dev->rx_skb[slot]; emac_recycle_rx_skb() 1608 DBG2(dev, "recycle %d %d" NL, slot, len); emac_recycle_rx_skb() 1611 dma_map_single(&dev->ofdev->dev, skb->data - 2, emac_recycle_rx_skb() 1614 dev->rx_desc[slot].data_len = 0; emac_recycle_rx_skb() 1616 dev->rx_desc[slot].ctrl = MAL_RX_CTRL_EMPTY \| emac_recycle_rx_skb() 1620 static void emac_parse_rx_error(struct emac_instance dev, u16 ctrl) emac_parse_rx_error() argument 1622 struct emac_error_stats st = &dev->estats; emac_parse_rx_error() 1624 DBG(dev, "BD RX error %04x" NL, ctrl); emac_parse_rx_error() 1647 static inline void emac_rx_csum(struct emac_instance dev, emac_rx_csum() argument 1651 if (!ctrl && dev->tah_dev) { emac_rx_csum() 1653 ++dev->stats.rx_packets_csum; emac_rx_csum() 1658 static inline int emac_rx_sg_append(struct emac_instance dev, int slot) emac_rx_sg_append() argument 1660 if (likely(dev->rx_sg_skb != NULL)) { emac_rx_sg_append() 1661 int len = dev->rx_desc[slot].data_len; emac_rx_sg_append() 1662 int tot_len = dev->rx_sg_skb->len + len; emac_rx_sg_append() 1664 if (unlikely(tot_len + 2 > dev->rx_skb_size)) { emac_rx_sg_append() 1665 ++dev->estats.rx_dropped_mtu; emac_rx_sg_append() 1666 dev_kfree_skb(dev->rx_sg_skb); emac_rx_sg_append() 1667 dev->rx_sg_skb = NULL; emac_rx_sg_append() 1669 memcpy(skb_tail_pointer(dev->rx_sg_skb), emac_rx_sg_append() 1670 dev->rx_skb[slot]->data, len); emac_rx_sg_append() 1671 skb_put(dev->rx_sg_skb, len); emac_rx_sg_append() 1672 emac_recycle_rx_skb(dev, slot, len); emac_rx_sg_append() 1676 emac_recycle_rx_skb(dev, slot, 0); emac_rx_sg_append() 1683 struct emac_instance dev = param; emac_poll_rx() local 1684 int slot = dev->rx_slot, received = 0; emac_poll_rx() 1686 DBG2(dev, "poll_rx(%d)" NL, budget); emac_poll_rx() 1692 u16 ctrl = dev->rx_desc[slot].ctrl; emac_poll_rx() 1697 skb = dev->rx_skb[slot]; emac_poll_rx() 1699 len = dev->rx_desc[slot].data_len; emac_poll_rx() 1706 emac_parse_rx_error(dev, ctrl); emac_poll_rx() 1707 ++dev->estats.rx_dropped_error; emac_poll_rx() 1708 emac_recycle_rx_skb(dev, slot, 0); emac_poll_rx() 1714 ++dev->estats.rx_dropped_stack; emac_poll_rx() 1715 emac_recycle_rx_skb(dev, slot, len); emac_poll_rx() 1727 emac_recycle_rx_skb(dev, slot, len); emac_poll_rx() 1729 } else if (unlikely(emac_alloc_rx_skb(dev, slot, GFP_ATOMIC))) emac_poll_rx() 1734 skb->protocol = eth_type_trans(skb, dev->ndev); emac_poll_rx() 1735 emac_rx_csum(dev, skb, ctrl); emac_poll_rx() 1738 ++dev->estats.rx_dropped_stack; emac_poll_rx() 1740 ++dev->stats.rx_packets; emac_poll_rx() 1742 dev->stats.rx_bytes += len; emac_poll_rx() 1749 BUG_ON(dev->rx_sg_skb); emac_poll_rx() 1750 if (unlikely(emac_alloc_rx_skb(dev, slot, GFP_ATOMIC))) { emac_poll_rx() 1751 DBG(dev, "rx OOM %d" NL, slot); emac_poll_rx() 1752 ++dev->estats.rx_dropped_oom; emac_poll_rx() 1753 emac_recycle_rx_skb(dev, slot, 0); emac_poll_rx() 1755 dev->rx_sg_skb = skb; emac_poll_rx() 1758 } else if (!emac_rx_sg_append(dev, slot) && emac_poll_rx() 1761 skb = dev->rx_sg_skb; emac_poll_rx() 1762 dev->rx_sg_skb = NULL; emac_poll_rx() 1766 emac_parse_rx_error(dev, ctrl); emac_poll_rx() 1767 ++dev->estats.rx_dropped_error; emac_poll_rx() 1775 DBG(dev, "rx OOM %d" NL, slot); emac_poll_rx() 1777 ++dev->estats.rx_dropped_oom; emac_poll_rx() 1778 emac_recycle_rx_skb(dev, slot, 0); emac_poll_rx() 1783 DBG2(dev, "rx %d BDs" NL, received); emac_poll_rx() 1784 dev->rx_slot = slot; emac_poll_rx() 1787 if (unlikely(budget && test_bit(MAL_COMMAC_RX_STOPPED, &dev->commac.flags))) { emac_poll_rx() 1789 if (!(dev->rx_desc[slot].ctrl & MAL_RX_CTRL_EMPTY)) { emac_poll_rx() 1790 DBG2(dev, "rx restart" NL); emac_poll_rx() 1795 if (dev->rx_sg_skb) { emac_poll_rx() 1796 DBG2(dev, "dropping partial rx packet" NL); emac_poll_rx() 1797 ++dev->estats.rx_dropped_error; emac_poll_rx() 1798 dev_kfree_skb(dev->rx_sg_skb); emac_poll_rx() 1799 dev->rx_sg_skb = NULL; emac_poll_rx() 1802 clear_bit(MAL_COMMAC_RX_STOPPED, &dev->commac.flags); emac_poll_rx() 1803 mal_enable_rx_channel(dev->mal, dev->mal_rx_chan); emac_poll_rx() 1804 emac_rx_enable(dev); emac_poll_rx() 1805 dev->rx_slot = 0; emac_poll_rx() 1813 struct emac_instance dev = param; emac_peek_rx() local 1815 return !(dev->rx_desc[dev->rx_slot].ctrl & MAL_RX_CTRL_EMPTY); emac_peek_rx() 1821 struct emac_instance dev = param; emac_peek_rx_sg() local 1823 int slot = dev->rx_slot; emac_peek_rx_sg() 1825 u16 ctrl = dev->rx_desc[slot].ctrl; emac_peek_rx_sg() 1834 if (unlikely(slot == dev->rx_slot)) emac_peek_rx_sg() 1842 struct emac_instance dev = param; emac_rxde() local 1844 ++dev->estats.rx_stopped; emac_rxde() 1845 emac_rx_disable_async(dev); emac_rxde() 1851 struct emac_instance dev = dev_instance; emac_irq() local 1852 struct emac_regs __iomem p = dev->emacp; emac_irq() 1853 struct emac_error_stats st = &dev->estats; emac_irq() 1856 spin_lock(&dev->lock); emac_irq() 1861 DBG(dev, "isr = %08x" NL, isr); emac_irq() 1894 spin_unlock(&dev->lock); emac_irq() 1901 struct emac_instance dev = netdev_priv(ndev); emac_stats() local 1902 struct emac_stats st = &dev->stats; emac_stats() 1903 struct emac_error_stats est = &dev->estats; emac_stats() 1904 struct net_device_stats nst = &dev->nstats; emac_stats() 1907 DBG2(dev, "stats" NL); emac_stats() 1910 spin_lock_irqsave(&dev->lock, flags); emac_stats() 1948 spin_unlock_irqrestore(&dev->lock, flags); emac_stats() 1970 struct emac_instance dev = netdev_priv(ndev); emac_ethtool_get_settings() local 1972 cmd->supported = dev->phy.features; emac_ethtool_get_settings() 1974 cmd->phy_address = dev->phy.address; emac_ethtool_get_settings() 1976 dev->phy.address >= 0 ? XCVR_EXTERNAL : XCVR_INTERNAL; emac_ethtool_get_settings() 1978 mutex_lock(&dev->link_lock); emac_ethtool_get_settings() 1979 cmd->advertising = dev->phy.advertising; emac_ethtool_get_settings() 1980 cmd->autoneg = dev->phy.autoneg; emac_ethtool_get_settings() 1981 cmd->speed = dev->phy.speed; emac_ethtool_get_settings() 1982 cmd->duplex = dev->phy.duplex; emac_ethtool_get_settings() 1983 mutex_unlock(&dev->link_lock); emac_ethtool_get_settings() 1991 struct emac_instance dev = netdev_priv(ndev); emac_ethtool_set_settings() local 1992 u32 f = dev->phy.features; emac_ethtool_set_settings() 1994 DBG(dev, "set_settings(%d, %d, %d, 0x%08x)" NL, emac_ethtool_set_settings() 1998 if (dev->phy.address < 0) emac_ethtool_set_settings() 2037 mutex_lock(&dev->link_lock); emac_ethtool_set_settings() 2038 dev->phy.def->ops->setup_forced(&dev->phy, cmd->speed, emac_ethtool_set_settings() 2040 mutex_unlock(&dev->link_lock); emac_ethtool_set_settings() 2046 mutex_lock(&dev->link_lock); emac_ethtool_set_settings() 2047 dev->phy.def->ops->setup_aneg(&dev->phy, emac_ethtool_set_settings() 2049 (dev->phy.advertising & emac_ethtool_set_settings() 2052 mutex_unlock(&dev->link_lock); emac_ethtool_set_settings() 2054 emac_force_link_update(dev); emac_ethtool_set_settings() 2069 struct emac_instance dev = netdev_priv(ndev); emac_ethtool_get_pauseparam() local 2071 mutex_lock(&dev->link_lock); emac_ethtool_get_pauseparam() 2072 if ((dev->phy.features & SUPPORTED_Autoneg) && emac_ethtool_get_pauseparam() 2073 (dev->phy.advertising & (ADVERTISED_Pause \| ADVERTISED_Asym_Pause))) emac_ethtool_get_pauseparam() 2076 if (dev->phy.duplex == DUPLEX_FULL) { emac_ethtool_get_pauseparam() 2077 if (dev->phy.pause) emac_ethtool_get_pauseparam() 2079 else if (dev->phy.asym_pause) emac_ethtool_get_pauseparam() 2082 mutex_unlock(&dev->link_lock); emac_ethtool_get_pauseparam() 2085 static int emac_get_regs_len(struct emac_instance dev) emac_get_regs_len() argument 2093 struct emac_instance dev = netdev_priv(ndev); emac_ethtool_get_regs_len() local 2097 emac_get_regs_len(dev) + mal_get_regs_len(dev->mal); emac_ethtool_get_regs_len() 2098 if (emac_has_feature(dev, EMAC_FTR_HAS_ZMII)) emac_ethtool_get_regs_len() 2099 size += zmii_get_regs_len(dev->zmii_dev); emac_ethtool_get_regs_len() 2100 if (emac_has_feature(dev, EMAC_FTR_HAS_RGMII)) emac_ethtool_get_regs_len() 2101 size += rgmii_get_regs_len(dev->rgmii_dev); emac_ethtool_get_regs_len() 2102 if (emac_has_feature(dev, EMAC_FTR_HAS_TAH)) emac_ethtool_get_regs_len() 2103 size += tah_get_regs_len(dev->tah_dev); emac_ethtool_get_regs_len() 2108 static void emac_dump_regs(struct emac_instance dev, void buf) emac_dump_regs() argument 2112 hdr->index = dev->cell_index; emac_dump_regs() 2113 if (emac_has_feature(dev, EMAC_FTR_EMAC4SYNC)) { emac_dump_regs() 2115 } else if (emac_has_feature(dev, EMAC_FTR_EMAC4)) { emac_dump_regs() 2120 memcpy_fromio(hdr + 1, dev->emacp, sizeof(struct emac_regs)); emac_dump_regs() 2127 struct emac_instance dev = netdev_priv(ndev); emac_ethtool_get_regs() local 2133 buf = mal_dump_regs(dev->mal, buf); emac_ethtool_get_regs() 2134 buf = emac_dump_regs(dev, buf); emac_ethtool_get_regs() 2135 if (emac_has_feature(dev, EMAC_FTR_HAS_ZMII)) { emac_ethtool_get_regs() 2137 buf = zmii_dump_regs(dev->zmii_dev, buf); emac_ethtool_get_regs() 2139 if (emac_has_feature(dev, EMAC_FTR_HAS_RGMII)) { emac_ethtool_get_regs() 2141 buf = rgmii_dump_regs(dev->rgmii_dev, buf); emac_ethtool_get_regs() 2143 if (emac_has_feature(dev, EMAC_FTR_HAS_TAH)) { emac_ethtool_get_regs() 2145 buf = tah_dump_regs(dev->tah_dev, buf); emac_ethtool_get_regs() 2151 struct emac_instance dev = netdev_priv(ndev); emac_ethtool_nway_reset() local 2154 DBG(dev, "nway_reset" NL); emac_ethtool_nway_reset() 2156 if (dev->phy.address < 0) emac_ethtool_nway_reset() 2159 mutex_lock(&dev->link_lock); emac_ethtool_nway_reset() 2160 if (!dev->phy.autoneg) { emac_ethtool_nway_reset() 2165 dev->phy.def->ops->setup_aneg(&dev->phy, dev->phy.advertising); emac_ethtool_nway_reset() 2167 mutex_unlock(&dev->link_lock); emac_ethtool_nway_reset() 2168 emac_force_link_update(dev); emac_ethtool_nway_reset() 2191 struct emac_instance dev = netdev_priv(ndev); emac_ethtool_get_ethtool_stats() local 2193 memcpy(tmp_stats, &dev->stats, sizeof(dev->stats)); emac_ethtool_get_ethtool_stats() 2194 tmp_stats += sizeof(dev->stats) / sizeof(u64); emac_ethtool_get_ethtool_stats() 2195 memcpy(tmp_stats, &dev->estats, sizeof(dev->estats)); emac_ethtool_get_ethtool_stats() 2201 struct emac_instance dev = netdev_priv(ndev); emac_ethtool_get_drvinfo() local 2206 dev->cell_index, dev->ofdev->dev.of_node->full_name); emac_ethtool_get_drvinfo() 2232 struct emac_instance dev = netdev_priv(ndev); emac_ioctl() local 2235 DBG(dev, "ioctl %08x" NL, cmd); emac_ioctl() 2237 if (dev->phy.address < 0) emac_ioctl() 2242 data->phy_id = dev->phy.address; emac_ioctl() 2245 data->val_out = emac_mdio_read(ndev, dev->phy.address, emac_ioctl() 2250 emac_mdio_write(ndev, dev->phy.address, data->reg_num, emac_ioctl() 2273 static int emac_check_deps(struct emac_instance dev, emac_check_deps() argument 2287 np = (dev->blist - 1); emac_check_deps() 2312 static void emac_put_deps(struct emac_instance dev) emac_put_deps() argument 2314 of_dev_put(dev->mal_dev); emac_put_deps() 2315 of_dev_put(dev->zmii_dev); emac_put_deps() 2316 of_dev_put(dev->rgmii_dev); emac_put_deps() 2317 of_dev_put(dev->mdio_dev); emac_put_deps() 2318 of_dev_put(dev->tah_dev); emac_put_deps() 2334 static int emac_wait_deps(struct emac_instance dev) emac_wait_deps() argument 2341 deps[EMAC_DEP_MAL_IDX].phandle = dev->mal_ph; emac_wait_deps() 2342 deps[EMAC_DEP_ZMII_IDX].phandle = dev->zmii_ph; emac_wait_deps() 2343 deps[EMAC_DEP_RGMII_IDX].phandle = dev->rgmii_ph; emac_wait_deps() 2344 if (dev->tah_ph) emac_wait_deps() 2345 deps[EMAC_DEP_TAH_IDX].phandle = dev->tah_ph; emac_wait_deps() 2346 if (dev->mdio_ph) emac_wait_deps() 2347 deps[EMAC_DEP_MDIO_IDX].phandle = dev->mdio_ph; emac_wait_deps() 2348 if (dev->blist && dev->blist > emac_boot_list) emac_wait_deps() 2352 emac_check_deps(dev, deps), emac_wait_deps() 2355 err = emac_check_deps(dev, deps) ? 0 : -ENODEV; emac_wait_deps() 2362 dev->mal_dev = deps[EMAC_DEP_MAL_IDX].ofdev; emac_wait_deps() 2363 dev->zmii_dev = deps[EMAC_DEP_ZMII_IDX].ofdev; emac_wait_deps() 2364 dev->rgmii_dev = deps[EMAC_DEP_RGMII_IDX].ofdev; emac_wait_deps() 2365 dev->tah_dev = deps[EMAC_DEP_TAH_IDX].ofdev; emac_wait_deps() 2366 dev->mdio_dev = deps[EMAC_DEP_MDIO_IDX].ofdev; emac_wait_deps() 2387 static int emac_init_phy(struct emac_instance dev) emac_init_phy() argument 2389 struct device_node np = dev->ofdev->dev.of_node; emac_init_phy() 2390 struct net_device ndev = dev->ndev; emac_init_phy() 2394 dev->phy.dev = ndev; emac_init_phy() 2395 dev->phy.mode = dev->phy_mode; emac_init_phy() 2398 * XXX I probably should move these settings to the dev tree emac_init_phy() 2400 if (dev->phy_address == 0xffffffff && dev->phy_map == 0xffffffff) { emac_init_phy() 2401 emac_reset(dev); emac_init_phy() 2404 * XXX I probably should move these settings to the dev tree emac_init_phy() 2406 dev->phy.address = -1; emac_init_phy() 2407 dev->phy.features = SUPPORTED_MII; emac_init_phy() 2408 if (emac_phy_supports_gige(dev->phy_mode)) emac_init_phy() 2409 dev->phy.features \|= SUPPORTED_1000baseT_Full; emac_init_phy() 2411 dev->phy.features \|= SUPPORTED_100baseT_Full; emac_init_phy() 2412 dev->phy.pause = 1; emac_init_phy() 2418 phy_map = dev->phy_map \| busy_phy_map; emac_init_phy() 2420 DBG(dev, "PHY maps %08x %08x" NL, dev->phy_map, busy_phy_map); emac_init_phy() 2422 dev->phy.mdio_read = emac_mdio_read; emac_init_phy() 2423 dev->phy.mdio_write = emac_mdio_write; emac_init_phy() 2427 if (emac_has_feature(dev, EMAC_FTR_440GX_PHY_CLK_FIX)) emac_init_phy() 2431 emac_rx_clk_tx(dev); emac_init_phy() 2435 if (emac_has_feature(dev, EMAC_FTR_440GX_PHY_CLK_FIX)) emac_init_phy() 2441 if (emac_phy_gpcs(dev->phy.mode)) { emac_init_phy() 2450 dev->phy.gpcs_address = dev->gpcs_address; emac_init_phy() 2451 if (dev->phy.gpcs_address == 0xffffffff) emac_init_phy() 2452 dev->phy.address = dev->cell_index; emac_init_phy() 2455 emac_configure(dev); emac_init_phy() 2457 if (dev->phy_address != 0xffffffff) emac_init_phy() 2458 phy_map = ~(1 << dev->phy_address); emac_init_phy() 2466 r = emac_mdio_read(dev->ndev, i, MII_BMCR); emac_init_phy() 2469 if (!emac_mii_phy_probe(&dev->phy, i)) emac_init_phy() 2475 if (emac_has_feature(dev, EMAC_FTR_440GX_PHY_CLK_FIX)) emac_init_phy() 2485 if (dev->phy.def->ops->init) emac_init_phy() 2486 dev->phy.def->ops->init(&dev->phy); emac_init_phy() 2489 dev->phy.def->features &= ~dev->phy_feat_exc; emac_init_phy() 2490 dev->phy.features &= ~dev->phy_feat_exc; emac_init_phy() 2493 if (dev->phy.features & SUPPORTED_Autoneg) { emac_init_phy() 2494 adv = dev->phy.features; emac_init_phy() 2495 if (!emac_has_feature(dev, EMAC_FTR_NO_FLOW_CONTROL_40x)) emac_init_phy() 2498 dev->phy.def->ops->setup_aneg(&dev->phy, adv); emac_init_phy() 2500 u32 f = dev->phy.def->features; emac_init_phy() 2518 dev->phy.def->ops->setup_forced(&dev->phy, speed, fd); emac_init_phy() 2523 static int emac_init_config(struct emac_instance dev) emac_init_config() argument 2525 struct device_node np = dev->ofdev->dev.of_node; emac_init_config() 2529 if (emac_read_uint_prop(np, "mal-device", &dev->mal_ph, 1)) emac_init_config() 2531 if (emac_read_uint_prop(np, "mal-tx-channel", &dev->mal_tx_chan, 1)) emac_init_config() 2533 if (emac_read_uint_prop(np, "mal-rx-channel", &dev->mal_rx_chan, 1)) emac_init_config() 2535 if (emac_read_uint_prop(np, "cell-index", &dev->cell_index, 1)) emac_init_config() 2537 if (emac_read_uint_prop(np, "max-frame-size", &dev->max_mtu, 0)) emac_init_config() 2538 dev->max_mtu = 1500; emac_init_config() 2539 if (emac_read_uint_prop(np, "rx-fifo-size", &dev->rx_fifo_size, 0)) emac_init_config() 2540 dev->rx_fifo_size = 2048; emac_init_config() 2541 if (emac_read_uint_prop(np, "tx-fifo-size", &dev->tx_fifo_size, 0)) emac_init_config() 2542 dev->tx_fifo_size = 2048; emac_init_config() 2543 if (emac_read_uint_prop(np, "rx-fifo-size-gige", &dev->rx_fifo_size_gige, 0)) emac_init_config() 2544 dev->rx_fifo_size_gige = dev->rx_fifo_size; emac_init_config() 2545 if (emac_read_uint_prop(np, "tx-fifo-size-gige", &dev->tx_fifo_size_gige, 0)) emac_init_config() 2546 dev->tx_fifo_size_gige = dev->tx_fifo_size; emac_init_config() 2547 if (emac_read_uint_prop(np, "phy-address", &dev->phy_address, 0)) emac_init_config() 2548 dev->phy_address = 0xffffffff; emac_init_config() 2549 if (emac_read_uint_prop(np, "phy-map", &dev->phy_map, 0)) emac_init_config() 2550 dev->phy_map = 0xffffffff; emac_init_config() 2551 if (emac_read_uint_prop(np, "gpcs-address", &dev->gpcs_address, 0)) emac_init_config() 2552 dev->gpcs_address = 0xffffffff; emac_init_config() 2553 if (emac_read_uint_prop(np->parent, "clock-frequency", &dev->opb_bus_freq, 1)) emac_init_config() 2555 if (emac_read_uint_prop(np, "tah-device", &dev->tah_ph, 0)) emac_init_config() 2556 dev->tah_ph = 0; emac_init_config() 2557 if (emac_read_uint_prop(np, "tah-channel", &dev->tah_port, 0)) emac_init_config() 2558 dev->tah_port = 0; emac_init_config() 2559 if (emac_read_uint_prop(np, "mdio-device", &dev->mdio_ph, 0)) emac_init_config() 2560 dev->mdio_ph = 0; emac_init_config() 2561 if (emac_read_uint_prop(np, "zmii-device", &dev->zmii_ph, 0)) emac_init_config() 2562 dev->zmii_ph = 0; emac_init_config() 2563 if (emac_read_uint_prop(np, "zmii-channel", &dev->zmii_port, 0)) emac_init_config() 2564 dev->zmii_port = 0xffffffff; emac_init_config() 2565 if (emac_read_uint_prop(np, "rgmii-device", &dev->rgmii_ph, 0)) emac_init_config() 2566 dev->rgmii_ph = 0; emac_init_config() 2567 if (emac_read_uint_prop(np, "rgmii-channel", &dev->rgmii_port, 0)) emac_init_config() 2568 dev->rgmii_port = 0xffffffff; emac_init_config() 2569 if (emac_read_uint_prop(np, "fifo-entry-size", &dev->fifo_entry_size, 0)) emac_init_config() 2570 dev->fifo_entry_size = 16; emac_init_config() 2571 if (emac_read_uint_prop(np, "mal-burst-size", &dev->mal_burst_size, 0)) emac_init_config() 2572 dev->mal_burst_size = 256; emac_init_config() 2575 dev->phy_mode = of_get_phy_mode(np); emac_init_config() 2576 if (dev->phy_mode < 0) emac_init_config() 2577 dev->phy_mode = PHY_MODE_NA; emac_init_config() 2581 dev->features \|= (EMAC_FTR_EMAC4 \| EMAC_FTR_EMAC4SYNC); emac_init_config() 2584 dev->features \|= EMAC_FTR_460EX_PHY_CLK_FIX; emac_init_config() 2587 dev->features \|= EMAC_FTR_440EP_PHY_CLK_FIX; emac_init_config() 2589 dev->features \|= (EMAC_APM821XX_REQ_JUMBO_FRAME_SIZE \| emac_init_config() 2594 dev->features \|= EMAC_FTR_EMAC4; emac_init_config() 2596 dev->features \|= EMAC_FTR_440GX_PHY_CLK_FIX; emac_init_config() 2600 dev->features \|= EMAC_FTR_440EP_PHY_CLK_FIX; emac_init_config() 2603 dev->features \|= EMAC_FTR_NO_FLOW_CONTROL_40x; emac_init_config() 2615 dev->features \|= EMAC_FTR_STACR_OC_INVERT; emac_init_config() 2617 dev->features \|= EMAC_FTR_HAS_NEW_STACR; emac_init_config() 2621 dev->features \|= EMAC_FTR_HAS_NEW_STACR \| emac_init_config() 2625 if (dev->tah_ph != 0) { emac_init_config() 2627 dev->features \|= EMAC_FTR_HAS_TAH; emac_init_config() 2635 if (dev->zmii_ph != 0) { emac_init_config() 2637 dev->features \|= EMAC_FTR_HAS_ZMII; emac_init_config() 2645 if (dev->rgmii_ph != 0) { emac_init_config() 2647 dev->features \|= EMAC_FTR_HAS_RGMII; emac_init_config() 2662 memcpy(dev->ndev->dev_addr, p, ETH_ALEN); emac_init_config() 2665 if (emac_has_feature(dev, EMAC_FTR_EMAC4SYNC)) { emac_init_config() 2666 dev->xaht_slots_shift = EMAC4SYNC_XAHT_SLOTS_SHIFT; emac_init_config() 2667 dev->xaht_width_shift = EMAC4SYNC_XAHT_WIDTH_SHIFT; emac_init_config() 2669 dev->xaht_slots_shift = EMAC4_XAHT_SLOTS_SHIFT; emac_init_config() 2670 dev->xaht_width_shift = EMAC4_XAHT_WIDTH_SHIFT; emac_init_config() 2673 DBG(dev, "features : 0x%08x / 0x%08x\n", dev->features, EMAC_FTRS_POSSIBLE); emac_init_config() 2674 DBG(dev, "tx_fifo_size : %d (%d gige)\n", dev->tx_fifo_size, dev->tx_fifo_size_gige); emac_init_config() 2675 DBG(dev, "rx_fifo_size : %d (%d gige)\n", dev->rx_fifo_size, dev->rx_fifo_size_gige); emac_init_config() 2676 DBG(dev, "max_mtu : %d\n", dev->max_mtu); emac_init_config() 2677 DBG(dev, "OPB freq : %d\n", dev->opb_bus_freq); emac_init_config() 2711 struct emac_instance dev; emac_probe() local 2712 struct device_node np = ofdev->dev.of_node; emac_probe() 2734 dev = netdev_priv(ndev); emac_probe() 2735 dev->ndev = ndev; emac_probe() 2736 dev->ofdev = ofdev; emac_probe() 2737 dev->blist = blist; emac_probe() 2738 SET_NETDEV_DEV(ndev, &ofdev->dev); emac_probe() 2741 mutex_init(&dev->mdio_lock); emac_probe() 2742 mutex_init(&dev->link_lock); emac_probe() 2743 spin_lock_init(&dev->lock); emac_probe() 2744 INIT_WORK(&dev->reset_work, emac_reset_work); emac_probe() 2747 err = emac_init_config(dev); emac_probe() 2752 dev->emac_irq = irq_of_parse_and_map(np, 0); emac_probe() 2753 dev->wol_irq = irq_of_parse_and_map(np, 1); emac_probe() 2754 if (dev->emac_irq == NO_IRQ) { emac_probe() 2758 ndev->irq = dev->emac_irq; emac_probe() 2761 if (of_address_to_resource(np, 0, &dev->rsrc_regs)) { emac_probe() 2767 dev->emacp = ioremap(dev->rsrc_regs.start, emac_probe() 2768 resource_size(&dev->rsrc_regs)); emac_probe() 2769 if (dev->emacp == NULL) { emac_probe() 2777 err = emac_wait_deps(dev); emac_probe() 2785 dev->mal = platform_get_drvdata(dev->mal_dev); emac_probe() 2786 if (dev->mdio_dev != NULL) emac_probe() 2787 dev->mdio_instance = platform_get_drvdata(dev->mdio_dev); emac_probe() 2790 dev->commac.ops = &emac_commac_ops; emac_probe() 2791 dev->commac.dev = dev; emac_probe() 2792 dev->commac.tx_chan_mask = MAL_CHAN_MASK(dev->mal_tx_chan); emac_probe() 2793 dev->commac.rx_chan_mask = MAL_CHAN_MASK(dev->mal_rx_chan); emac_probe() 2794 err = mal_register_commac(dev->mal, &dev->commac); emac_probe() 2797 np->full_name, dev->mal_dev->dev.of_node->full_name); emac_probe() 2800 dev->rx_skb_size = emac_rx_skb_size(ndev->mtu); emac_probe() 2801 dev->rx_sync_size = emac_rx_sync_size(ndev->mtu); emac_probe() 2804 dev->tx_desc = emac_probe() 2805 dev->mal->bd_virt + mal_tx_bd_offset(dev->mal, dev->mal_tx_chan); emac_probe() 2806 dev->rx_desc = emac_probe() 2807 dev->mal->bd_virt + mal_rx_bd_offset(dev->mal, dev->mal_rx_chan); emac_probe() 2809 DBG(dev, "tx_desc %p" NL, dev->tx_desc); emac_probe() 2810 DBG(dev, "rx_desc %p" NL, dev->rx_desc); emac_probe() 2813 memset(dev->tx_desc, 0, NUM_TX_BUFF * sizeof(struct mal_descriptor)); emac_probe() 2814 memset(dev->rx_desc, 0, NUM_RX_BUFF * sizeof(struct mal_descriptor)); emac_probe() 2815 memset(dev->tx_skb, 0, NUM_TX_BUFF * sizeof(struct sk_buff )); emac_probe() 2816 memset(dev->rx_skb, 0, NUM_RX_BUFF sizeof(struct sk_buff )); emac_probe() 2819 if (emac_has_feature(dev, EMAC_FTR_HAS_ZMII) && emac_probe() 2820 (err = zmii_attach(dev->zmii_dev, dev->zmii_port, &dev->phy_mode)) != 0) emac_probe() 2824 if (emac_has_feature(dev, EMAC_FTR_HAS_RGMII) && emac_probe() 2825 (err = rgmii_attach(dev->rgmii_dev, dev->rgmii_port, dev->phy_mode)) != 0) emac_probe() 2829 if (emac_has_feature(dev, EMAC_FTR_HAS_TAH) && emac_probe() 2830 (err = tah_attach(dev->tah_dev, dev->tah_port)) != 0) emac_probe() 2834 dev->phy.speed = SPEED_100; emac_probe() 2835 dev->phy.duplex = DUPLEX_FULL; emac_probe() 2836 dev->phy.autoneg = AUTONEG_DISABLE; emac_probe() 2837 dev->phy.pause = dev->phy.asym_pause = 0; emac_probe() 2838 dev->stop_timeout = STOP_TIMEOUT_100; emac_probe() 2839 INIT_DELAYED_WORK(&dev->link_work, emac_link_timer); emac_probe() 2842 if (emac_has_feature(dev, EMAC_FTR_APM821XX_NO_HALF_DUPLEX)) { emac_probe() 2843 dev->phy_feat_exc = (SUPPORTED_1000baseT_Half \| emac_probe() 2849 err = emac_init_phy(dev); emac_probe() 2853 if (dev->tah_dev) { emac_probe() 2858 if (emac_phy_supports_gige(dev->phy_mode)) { emac_probe() 2860 dev->commac.ops = &emac_commac_sg_ops; emac_probe() 2878 platform_set_drvdata(ofdev, dev); emac_probe() 2885 ndev->name, dev->cell_index, np->full_name, ndev->dev_addr); emac_probe() 2887 if (dev->phy_mode == PHY_MODE_SGMII) emac_probe() 2890 if (dev->phy.address >= 0) emac_probe() 2892 dev->phy.def->name, dev->phy.address); emac_probe() 2894 emac_dbg_register(dev); emac_probe() 2902 if (emac_has_feature(dev, EMAC_FTR_HAS_TAH)) emac_probe() 2903 tah_detach(dev->tah_dev, dev->tah_port); emac_probe() 2905 if (emac_has_feature(dev, EMAC_FTR_HAS_RGMII)) emac_probe() 2906 rgmii_detach(dev->rgmii_dev, dev->rgmii_port); emac_probe() 2908 if (emac_has_feature(dev, EMAC_FTR_HAS_ZMII)) emac_probe() 2909 zmii_detach(dev->zmii_dev, dev->zmii_port); emac_probe() 2911 mal_unregister_commac(dev->mal, &dev->commac); emac_probe() 2913 emac_put_deps(dev); emac_probe() 2915 iounmap(dev->emacp); emac_probe() 2917 if (dev->wol_irq != NO_IRQ) emac_probe() 2918 irq_dispose_mapping(dev->wol_irq); emac_probe() 2919 if (dev->emac_irq != NO_IRQ) emac_probe() 2920 irq_dispose_mapping(dev->emac_irq); emac_probe() 2937 struct emac_instance dev = platform_get_drvdata(ofdev); emac_remove() local 2939 DBG(dev, "remove" NL); emac_remove() 2941 unregister_netdev(dev->ndev); emac_remove() 2943 cancel_work_sync(&dev->reset_work); emac_remove() 2945 if (emac_has_feature(dev, EMAC_FTR_HAS_TAH)) emac_remove() 2946 tah_detach(dev->tah_dev, dev->tah_port); emac_remove() 2947 if (emac_has_feature(dev, EMAC_FTR_HAS_RGMII)) emac_remove() 2948 rgmii_detach(dev->rgmii_dev, dev->rgmii_port); emac_remove() 2949 if (emac_has_feature(dev, EMAC_FTR_HAS_ZMII)) emac_remove() 2950 zmii_detach(dev->zmii_dev, dev->zmii_port); emac_remove() 2952 busy_phy_map &= ~(1 << dev->phy.address); emac_remove() 2953 DBG(dev, "busy_phy_map now %#x" NL, busy_phy_map); emac_remove() 2955 mal_unregister_commac(dev->mal, &dev->commac); emac_remove() 2956 emac_put_deps(dev); emac_remove() 2958 emac_dbg_unregister(dev); emac_remove() 2959 iounmap(dev->emacp); emac_remove() 2961 if (dev->wol_irq != NO_IRQ) emac_remove() 2962 irq_dispose_mapping(dev->wol_irq); emac_remove() 2963 if (dev->emac_irq != NO_IRQ) emac_remove() 2964 irq_dispose_mapping(dev->emac_irq); emac_remove() 2966 free_netdev(dev->ndev); emac_remove()
/linux-4.1.27/drivers/infiniband/hw/mthca/
H A D	mthca_eq.c	166 static inline u64 async_mask(struct mthca_dev dev) async_mask() argument 168 return dev->mthca_flags & MTHCA_FLAG_SRQ ? async_mask() 173 static inline void tavor_set_eq_ci(struct mthca_dev dev, struct mthca_eq eq, u32 ci) tavor_set_eq_ci() argument 185 dev->kar + MTHCA_EQ_DOORBELL, tavor_set_eq_ci() 186 MTHCA_GET_DOORBELL_LOCK(&dev->doorbell_lock)); tavor_set_eq_ci() 189 static inline void arbel_set_eq_ci(struct mthca_dev dev, struct mthca_eq eq, u32 ci) arbel_set_eq_ci() argument 194 dev->eq_regs.arbel.eq_set_ci_base + eq->eqn 8); arbel_set_eq_ci() 199 static inline void set_eq_ci(struct mthca_dev dev, struct mthca_eq eq, u32 ci) set_eq_ci() argument 201 if (mthca_is_memfree(dev)) set_eq_ci() 202 arbel_set_eq_ci(dev, eq, ci); set_eq_ci() 204 tavor_set_eq_ci(dev, eq, ci); set_eq_ci() 207 static inline void tavor_eq_req_not(struct mthca_dev dev, int eqn) tavor_eq_req_not() argument 210 dev->kar + MTHCA_EQ_DOORBELL, tavor_eq_req_not() 211 MTHCA_GET_DOORBELL_LOCK(&dev->doorbell_lock)); tavor_eq_req_not() 214 static inline void arbel_eq_req_not(struct mthca_dev dev, u32 eqn_mask) arbel_eq_req_not() argument 216 writel(eqn_mask, dev->eq_regs.arbel.eq_arm); arbel_eq_req_not() 219 static inline void disarm_cq(struct mthca_dev dev, int eqn, int cqn) disarm_cq() argument 221 if (!mthca_is_memfree(dev)) { disarm_cq() 223 dev->kar + MTHCA_EQ_DOORBELL, disarm_cq() 224 MTHCA_GET_DOORBELL_LOCK(&dev->doorbell_lock)); disarm_cq() 246 static void port_change(struct mthca_dev dev, int port, int active) port_change() argument 250 mthca_dbg(dev, "Port change to %s for port %d\n", port_change() 253 record.device = &dev->ib_dev; port_change() 260 static int mthca_eq_int(struct mthca_dev dev, struct mthca_eq eq) mthca_eq_int() argument 277 disarm_cq(dev, eq->eqn, disarm_cqn); mthca_eq_int() 278 mthca_cq_completion(dev, disarm_cqn); mthca_eq_int() 282 mthca_qp_event(dev, be32_to_cpu(eqe->event.qp.qpn) & 0xffffff, mthca_eq_int() 287 mthca_qp_event(dev, be32_to_cpu(eqe->event.qp.qpn) & 0xffffff, mthca_eq_int() 292 mthca_qp_event(dev, be32_to_cpu(eqe->event.qp.qpn) & 0xffffff, mthca_eq_int() 297 mthca_qp_event(dev, be32_to_cpu(eqe->event.qp.qpn) & 0xffffff, mthca_eq_int() 302 mthca_srq_event(dev, be32_to_cpu(eqe->event.srq.srqn) & 0xffffff, mthca_eq_int() 307 mthca_qp_event(dev, be32_to_cpu(eqe->event.qp.qpn) & 0xffffff, mthca_eq_int() 312 mthca_qp_event(dev, be32_to_cpu(eqe->event.qp.qpn) & 0xffffff, mthca_eq_int() 317 mthca_qp_event(dev, be32_to_cpu(eqe->event.qp.qpn) & 0xffffff, mthca_eq_int() 322 mthca_qp_event(dev, be32_to_cpu(eqe->event.qp.qpn) & 0xffffff, mthca_eq_int() 327 mthca_cmd_event(dev, mthca_eq_int() 334 port_change(dev, mthca_eq_int() 340 mthca_warn(dev, "CQ %s on CQN %06x\n", mthca_eq_int() 344 mthca_cq_event(dev, be32_to_cpu(eqe->event.cq_err.cqn), mthca_eq_int() 349 mthca_warn(dev, "EQ overrun on EQN %d\n", eq->eqn); mthca_eq_int() 357 mthca_warn(dev, "Unhandled event %02x(%02x) on EQ %d\n", mthca_eq_int() 379 set_eq_ci(dev, eq, eq->cons_index); mthca_eq_int() 393 struct mthca_dev dev = dev_ptr; mthca_tavor_interrupt() local 397 if (dev->eq_table.clr_mask) mthca_tavor_interrupt() 398 writel(dev->eq_table.clr_mask, dev->eq_table.clr_int); mthca_tavor_interrupt() 400 ecr = readl(dev->eq_regs.tavor.ecr_base + 4); mthca_tavor_interrupt() 404 writel(ecr, dev->eq_regs.tavor.ecr_base + mthca_tavor_interrupt() 408 if (ecr & dev->eq_table.eq[i].eqn_mask) { mthca_tavor_interrupt() 409 if (mthca_eq_int(dev, &dev->eq_table.eq[i])) mthca_tavor_interrupt() 410 tavor_set_eq_ci(dev, &dev->eq_table.eq[i], mthca_tavor_interrupt() 411 dev->eq_table.eq[i].cons_index); mthca_tavor_interrupt() 412 tavor_eq_req_not(dev, dev->eq_table.eq[i].eqn); mthca_tavor_interrupt() 421 struct mthca_dev dev = eq->dev; mthca_tavor_msi_x_interrupt() local 423 mthca_eq_int(dev, eq); mthca_tavor_msi_x_interrupt() 424 tavor_set_eq_ci(dev, eq, eq->cons_index); mthca_tavor_msi_x_interrupt() 425 tavor_eq_req_not(dev, eq->eqn); mthca_tavor_msi_x_interrupt() 433 struct mthca_dev dev = dev_ptr; mthca_arbel_interrupt() local 437 if (dev->eq_table.clr_mask) mthca_arbel_interrupt() 438 writel(dev->eq_table.clr_mask, dev->eq_table.clr_int); mthca_arbel_interrupt() 441 if (mthca_eq_int(dev, &dev->eq_table.eq[i])) { mthca_arbel_interrupt() 443 arbel_set_eq_ci(dev, &dev->eq_table.eq[i], mthca_arbel_interrupt() 444 dev->eq_table.eq[i].cons_index); mthca_arbel_interrupt() 447 arbel_eq_req_not(dev, dev->eq_table.arm_mask); mthca_arbel_interrupt() 455 struct mthca_dev dev = eq->dev; mthca_arbel_msi_x_interrupt() local 457 mthca_eq_int(dev, eq); mthca_arbel_msi_x_interrupt() 458 arbel_set_eq_ci(dev, eq, eq->cons_index); mthca_arbel_msi_x_interrupt() 459 arbel_eq_req_not(dev, eq->eqn_mask); mthca_arbel_msi_x_interrupt() 465 static int mthca_create_eq(struct mthca_dev dev, mthca_create_eq() argument 478 eq->dev = dev; mthca_create_eq() 494 mailbox = mthca_alloc_mailbox(dev, GFP_KERNEL); mthca_create_eq() 500 eq->page_list[i].buf = dma_alloc_coherent(&dev->pdev->dev, mthca_create_eq() 514 eq->eqn = mthca_alloc(&dev->eq_table.alloc); mthca_create_eq() 518 err = mthca_mr_alloc_phys(dev, dev->driver_pd.pd_num, mthca_create_eq() 532 if (mthca_is_memfree(dev)) mthca_create_eq() 536 if (mthca_is_memfree(dev)) { mthca_create_eq() 537 eq_context->arbel_pd = cpu_to_be32(dev->driver_pd.pd_num); mthca_create_eq() 539 eq_context->logsize_usrpage \|= cpu_to_be32(dev->driver_uar.index); mthca_create_eq() 540 eq_context->tavor_pd = cpu_to_be32(dev->driver_pd.pd_num); mthca_create_eq() 545 err = mthca_SW2HW_EQ(dev, mailbox, eq->eqn); mthca_create_eq() 547 mthca_warn(dev, "SW2HW_EQ returned %d\n", err); mthca_create_eq() 552 mthca_free_mailbox(dev, mailbox); mthca_create_eq() 557 dev->eq_table.arm_mask \|= eq->eqn_mask; mthca_create_eq() 559 mthca_dbg(dev, "Allocated EQ %d with %d entries\n", mthca_create_eq() 565 mthca_free_mr(dev, &eq->mr); mthca_create_eq() 568 mthca_free(&dev->eq_table.alloc, eq->eqn); mthca_create_eq() 573 dma_free_coherent(&dev->pdev->dev, PAGE_SIZE, mthca_create_eq() 578 mthca_free_mailbox(dev, mailbox); mthca_create_eq() 588 static void mthca_free_eq(struct mthca_dev dev, mthca_free_eq() argument 597 mailbox = mthca_alloc_mailbox(dev, GFP_KERNEL); mthca_free_eq() 601 err = mthca_HW2SW_EQ(dev, mailbox, eq->eqn); mthca_free_eq() 603 mthca_warn(dev, "HW2SW_EQ returned %d\n", err); mthca_free_eq() 605 dev->eq_table.arm_mask &= ~eq->eqn_mask; mthca_free_eq() 608 mthca_dbg(dev, "Dumping EQ context %02x:\n", eq->eqn); mthca_free_eq() 618 mthca_free_mr(dev, &eq->mr); mthca_free_eq() 620 pci_free_consistent(dev->pdev, PAGE_SIZE, mthca_free_eq() 625 mthca_free_mailbox(dev, mailbox); mthca_free_eq() 628 static void mthca_free_irqs(struct mthca_dev dev) mthca_free_irqs() argument 632 if (dev->eq_table.have_irq) mthca_free_irqs() 633 free_irq(dev->pdev->irq, dev); mthca_free_irqs() 635 if (dev->eq_table.eq[i].have_irq) { mthca_free_irqs() 636 free_irq(dev->eq_table.eq[i].msi_x_vector, mthca_free_irqs() 637 dev->eq_table.eq + i); mthca_free_irqs() 638 dev->eq_table.eq[i].have_irq = 0; mthca_free_irqs() 642 static int mthca_map_reg(struct mthca_dev dev, mthca_map_reg() argument 646 phys_addr_t base = pci_resource_start(dev->pdev, 0); mthca_map_reg() 655 static int mthca_map_eq_regs(struct mthca_dev dev) mthca_map_eq_regs() argument 657 if (mthca_is_memfree(dev)) { mthca_map_eq_regs() 665 if (mthca_map_reg(dev, (pci_resource_len(dev->pdev, 0) - 1) & mthca_map_eq_regs() 666 dev->fw.arbel.clr_int_base, MTHCA_CLR_INT_SIZE, mthca_map_eq_regs() 667 &dev->clr_base)) { mthca_map_eq_regs() 668 mthca_err(dev, "Couldn't map interrupt clear register, " mthca_map_eq_regs() 677 if (mthca_map_reg(dev, ((pci_resource_len(dev->pdev, 0) - 1) & mthca_map_eq_regs() 678 dev->fw.arbel.eq_arm_base) + 4, 4, mthca_map_eq_regs() 679 &dev->eq_regs.arbel.eq_arm)) { mthca_map_eq_regs() 680 mthca_err(dev, "Couldn't map EQ arm register, aborting.\n"); mthca_map_eq_regs() 681 iounmap(dev->clr_base); mthca_map_eq_regs() 685 if (mthca_map_reg(dev, (pci_resource_len(dev->pdev, 0) - 1) & mthca_map_eq_regs() 686 dev->fw.arbel.eq_set_ci_base, mthca_map_eq_regs() 688 &dev->eq_regs.arbel.eq_set_ci_base)) { mthca_map_eq_regs() 689 mthca_err(dev, "Couldn't map EQ CI register, aborting.\n"); mthca_map_eq_regs() 690 iounmap(dev->eq_regs.arbel.eq_arm); mthca_map_eq_regs() 691 iounmap(dev->clr_base); mthca_map_eq_regs() 695 if (mthca_map_reg(dev, MTHCA_CLR_INT_BASE, MTHCA_CLR_INT_SIZE, mthca_map_eq_regs() 696 &dev->clr_base)) { mthca_map_eq_regs() 697 mthca_err(dev, "Couldn't map interrupt clear register, " mthca_map_eq_regs() 702 if (mthca_map_reg(dev, MTHCA_ECR_BASE, mthca_map_eq_regs() 704 &dev->eq_regs.tavor.ecr_base)) { mthca_map_eq_regs() 705 mthca_err(dev, "Couldn't map ecr register, " mthca_map_eq_regs() 707 iounmap(dev->clr_base); mthca_map_eq_regs() 716 static void mthca_unmap_eq_regs(struct mthca_dev dev) mthca_unmap_eq_regs() argument 718 if (mthca_is_memfree(dev)) { mthca_unmap_eq_regs() 719 iounmap(dev->eq_regs.arbel.eq_set_ci_base); mthca_unmap_eq_regs() 720 iounmap(dev->eq_regs.arbel.eq_arm); mthca_unmap_eq_regs() 721 iounmap(dev->clr_base); mthca_unmap_eq_regs() 723 iounmap(dev->eq_regs.tavor.ecr_base); mthca_unmap_eq_regs() 724 iounmap(dev->clr_base); mthca_unmap_eq_regs() 728 int mthca_map_eq_icm(struct mthca_dev dev, u64 icm_virt) mthca_map_eq_icm() argument 738 dev->eq_table.icm_virt = icm_virt; mthca_map_eq_icm() 739 dev->eq_table.icm_page = alloc_page(GFP_HIGHUSER); mthca_map_eq_icm() 740 if (!dev->eq_table.icm_page) mthca_map_eq_icm() 742 dev->eq_table.icm_dma = pci_map_page(dev->pdev, dev->eq_table.icm_page, 0, mthca_map_eq_icm() 744 if (pci_dma_mapping_error(dev->pdev, dev->eq_table.icm_dma)) { mthca_map_eq_icm() 745 __free_page(dev->eq_table.icm_page); mthca_map_eq_icm() 749 ret = mthca_MAP_ICM_page(dev, dev->eq_table.icm_dma, icm_virt); mthca_map_eq_icm() 751 pci_unmap_page(dev->pdev, dev->eq_table.icm_dma, PAGE_SIZE, mthca_map_eq_icm() 753 __free_page(dev->eq_table.icm_page); mthca_map_eq_icm() 759 void mthca_unmap_eq_icm(struct mthca_dev dev) mthca_unmap_eq_icm() argument 761 mthca_UNMAP_ICM(dev, dev->eq_table.icm_virt, 1); mthca_unmap_eq_icm() 762 pci_unmap_page(dev->pdev, dev->eq_table.icm_dma, PAGE_SIZE, mthca_unmap_eq_icm() 764 __free_page(dev->eq_table.icm_page); mthca_unmap_eq_icm() 767 int mthca_init_eq_table(struct mthca_dev dev) mthca_init_eq_table() argument 773 err = mthca_alloc_init(&dev->eq_table.alloc, mthca_init_eq_table() 774 dev->limits.num_eqs, mthca_init_eq_table() 775 dev->limits.num_eqs - 1, mthca_init_eq_table() 776 dev->limits.reserved_eqs); mthca_init_eq_table() 780 err = mthca_map_eq_regs(dev); mthca_init_eq_table() 784 if (dev->mthca_flags & MTHCA_FLAG_MSI_X) { mthca_init_eq_table() 785 dev->eq_table.clr_mask = 0; mthca_init_eq_table() 787 dev->eq_table.clr_mask = mthca_init_eq_table() 788 swab32(1 << (dev->eq_table.inta_pin & 31)); mthca_init_eq_table() 789 dev->eq_table.clr_int = dev->clr_base + mthca_init_eq_table() 790 (dev->eq_table.inta_pin < 32 ? 4 : 0); mthca_init_eq_table() 793 dev->eq_table.arm_mask = 0; mthca_init_eq_table() 795 intr = dev->eq_table.inta_pin; mthca_init_eq_table() 797 err = mthca_create_eq(dev, dev->limits.num_cqs + MTHCA_NUM_SPARE_EQE, mthca_init_eq_table() 798 (dev->mthca_flags & MTHCA_FLAG_MSI_X) ? 128 : intr, mthca_init_eq_table() 799 &dev->eq_table.eq[MTHCA_EQ_COMP]); mthca_init_eq_table() 803 err = mthca_create_eq(dev, MTHCA_NUM_ASYNC_EQE + MTHCA_NUM_SPARE_EQE, mthca_init_eq_table() 804 (dev->mthca_flags & MTHCA_FLAG_MSI_X) ? 129 : intr, mthca_init_eq_table() 805 &dev->eq_table.eq[MTHCA_EQ_ASYNC]); mthca_init_eq_table() 809 err = mthca_create_eq(dev, MTHCA_NUM_CMD_EQE + MTHCA_NUM_SPARE_EQE, mthca_init_eq_table() 810 (dev->mthca_flags & MTHCA_FLAG_MSI_X) ? 130 : intr, mthca_init_eq_table() 811 &dev->eq_table.eq[MTHCA_EQ_CMD]); mthca_init_eq_table() 815 if (dev->mthca_flags & MTHCA_FLAG_MSI_X) { mthca_init_eq_table() 823 snprintf(dev->eq_table.eq[i].irq_name, mthca_init_eq_table() 826 pci_name(dev->pdev)); mthca_init_eq_table() 827 err = request_irq(dev->eq_table.eq[i].msi_x_vector, mthca_init_eq_table() 828 mthca_is_memfree(dev) ? mthca_init_eq_table() 831 0, dev->eq_table.eq[i].irq_name, mthca_init_eq_table() 832 dev->eq_table.eq + i); mthca_init_eq_table() 835 dev->eq_table.eq[i].have_irq = 1; mthca_init_eq_table() 838 snprintf(dev->eq_table.eq[0].irq_name, IB_DEVICE_NAME_MAX, mthca_init_eq_table() 839 DRV_NAME "@pci:%s", pci_name(dev->pdev)); mthca_init_eq_table() 840 err = request_irq(dev->pdev->irq, mthca_init_eq_table() 841 mthca_is_memfree(dev) ? mthca_init_eq_table() 844 IRQF_SHARED, dev->eq_table.eq[0].irq_name, dev); mthca_init_eq_table() 847 dev->eq_table.have_irq = 1; mthca_init_eq_table() 850 err = mthca_MAP_EQ(dev, async_mask(dev), mthca_init_eq_table() 851 0, dev->eq_table.eq[MTHCA_EQ_ASYNC].eqn); mthca_init_eq_table() 853 mthca_warn(dev, "MAP_EQ for async EQ %d failed (%d)\n", mthca_init_eq_table() 854 dev->eq_table.eq[MTHCA_EQ_ASYNC].eqn, err); mthca_init_eq_table() 856 err = mthca_MAP_EQ(dev, MTHCA_CMD_EVENT_MASK, mthca_init_eq_table() 857 0, dev->eq_table.eq[MTHCA_EQ_CMD].eqn); mthca_init_eq_table() 859 mthca_warn(dev, "MAP_EQ for cmd EQ %d failed (%d)\n", mthca_init_eq_table() 860 dev->eq_table.eq[MTHCA_EQ_CMD].eqn, err); mthca_init_eq_table() 863 if (mthca_is_memfree(dev)) mthca_init_eq_table() 864 arbel_eq_req_not(dev, dev->eq_table.eq[i].eqn_mask); mthca_init_eq_table() 866 tavor_eq_req_not(dev, dev->eq_table.eq[i].eqn); mthca_init_eq_table() 871 mthca_free_irqs(dev); mthca_init_eq_table() 872 mthca_free_eq(dev, &dev->eq_table.eq[MTHCA_EQ_CMD]); mthca_init_eq_table() 875 mthca_free_eq(dev, &dev->eq_table.eq[MTHCA_EQ_ASYNC]); mthca_init_eq_table() 878 mthca_free_eq(dev, &dev->eq_table.eq[MTHCA_EQ_COMP]); mthca_init_eq_table() 881 mthca_unmap_eq_regs(dev); mthca_init_eq_table() 884 mthca_alloc_cleanup(&dev->eq_table.alloc); mthca_init_eq_table() 888 void mthca_cleanup_eq_table(struct mthca_dev dev) mthca_cleanup_eq_table() argument 892 mthca_free_irqs(dev); mthca_cleanup_eq_table() 894 mthca_MAP_EQ(dev, async_mask(dev), mthca_cleanup_eq_table() 895 1, dev->eq_table.eq[MTHCA_EQ_ASYNC].eqn); mthca_cleanup_eq_table() 896 mthca_MAP_EQ(dev, MTHCA_CMD_EVENT_MASK, mthca_cleanup_eq_table() 897 1, dev->eq_table.eq[MTHCA_EQ_CMD].eqn); mthca_cleanup_eq_table() 900 mthca_free_eq(dev, &dev->eq_table.eq[i]); mthca_cleanup_eq_table() 902 mthca_unmap_eq_regs(dev); mthca_cleanup_eq_table() 904 mthca_alloc_cleanup(&dev->eq_table.alloc); mthca_cleanup_eq_table()
H A D	mthca_mr.c	190 static u32 mthca_alloc_mtt_range(struct mthca_dev dev, int order, mthca_alloc_mtt_range() argument 198 if (mthca_is_memfree(dev)) mthca_alloc_mtt_range() 199 if (mthca_table_get_range(dev, dev->mr_table.mtt_table, seg, mthca_alloc_mtt_range() 208 static struct mthca_mtt __mthca_alloc_mtt(struct mthca_dev dev, int size, __mthca_alloc_mtt() argument 223 for (i = dev->limits.mtt_seg_size / 8; i < size; i <<= 1) __mthca_alloc_mtt() 226 mtt->first_seg = mthca_alloc_mtt_range(dev, mtt->order, buddy); __mthca_alloc_mtt() 235 struct mthca_mtt mthca_alloc_mtt(struct mthca_dev dev, int size) mthca_alloc_mtt() argument 237 return __mthca_alloc_mtt(dev, size, &dev->mr_table.mtt_buddy); mthca_alloc_mtt() 240 void mthca_free_mtt(struct mthca_dev dev, struct mthca_mtt mtt) mthca_free_mtt() argument 247 mthca_table_put_range(dev, dev->mr_table.mtt_table, mthca_free_mtt() 254 static int __mthca_write_mtt(struct mthca_dev dev, struct mthca_mtt mtt, __mthca_write_mtt() argument 262 mailbox = mthca_alloc_mailbox(dev, GFP_KERNEL); __mthca_write_mtt() 268 mtt_entry[0] = cpu_to_be64(dev->mr_table.mtt_base + __mthca_write_mtt() 269 mtt->first_seg dev->limits.mtt_seg_size + __mthca_write_mtt() 283 err = mthca_WRITE_MTT(dev, mailbox, (i + 1) & ~1); __mthca_write_mtt() 285 mthca_warn(dev, "WRITE_MTT failed (%d)\n", err); __mthca_write_mtt() 295 mthca_free_mailbox(dev, mailbox); __mthca_write_mtt() 299 int mthca_write_mtt_size(struct mthca_dev dev) mthca_write_mtt_size() argument 301 if (dev->mr_table.fmr_mtt_buddy != &dev->mr_table.mtt_buddy \|\| mthca_write_mtt_size() 302 !(dev->mthca_flags & MTHCA_FLAG_FMR)) mthca_write_mtt_size() 312 return mthca_is_memfree(dev) ? (PAGE_SIZE / sizeof (u64)) : 0x7ffffff; mthca_write_mtt_size() 315 static void mthca_tavor_write_mtt_seg(struct mthca_dev dev, mthca_tavor_write_mtt_seg() argument 322 mtts = dev->mr_table.tavor_fmr.mtt_base + mtt->first_seg * dev->limits.mtt_seg_size + mthca_tavor_write_mtt_seg() 329 static void mthca_arbel_write_mtt_seg(struct mthca_dev dev, mthca_arbel_write_mtt_seg() argument 341 BUG_ON(s % dev->limits.mtt_seg_size); mthca_arbel_write_mtt_seg() 343 mtts = mthca_table_find(dev->mr_table.mtt_table, mtt->first_seg + mthca_arbel_write_mtt_seg() 344 s / dev->limits.mtt_seg_size, &dma_handle); mthca_arbel_write_mtt_seg() 348 dma_sync_single_for_cpu(&dev->pdev->dev, dma_handle, mthca_arbel_write_mtt_seg() 354 dma_sync_single_for_device(&dev->pdev->dev, dma_handle, mthca_arbel_write_mtt_seg() 358 int mthca_write_mtt(struct mthca_dev dev, struct mthca_mtt mtt, mthca_write_mtt() argument 361 int size = mthca_write_mtt_size(dev); mthca_write_mtt() 364 if (dev->mr_table.fmr_mtt_buddy != &dev->mr_table.mtt_buddy \|\| mthca_write_mtt() 365 !(dev->mthca_flags & MTHCA_FLAG_FMR)) mthca_write_mtt() 366 return __mthca_write_mtt(dev, mtt, start_index, buffer_list, list_len); mthca_write_mtt() 370 if (mthca_is_memfree(dev)) mthca_write_mtt() 371 mthca_arbel_write_mtt_seg(dev, mtt, start_index, mthca_write_mtt() 374 mthca_tavor_write_mtt_seg(dev, mtt, start_index, mthca_write_mtt() 405 static inline u32 hw_index_to_key(struct mthca_dev dev, u32 ind) hw_index_to_key() argument 407 if (mthca_is_memfree(dev)) hw_index_to_key() 413 static inline u32 key_to_hw_index(struct mthca_dev dev, u32 key) key_to_hw_index() argument 415 if (mthca_is_memfree(dev)) key_to_hw_index() 421 static inline u32 adjust_key(struct mthca_dev dev, u32 key) adjust_key() argument 423 if (dev->mthca_flags & MTHCA_FLAG_SINAI_OPT) adjust_key() 429 int mthca_mr_alloc(struct mthca_dev dev, u32 pd, int buffer_size_shift, mthca_mr_alloc() argument 440 key = mthca_alloc(&dev->mr_table.mpt_alloc); mthca_mr_alloc() 443 key = adjust_key(dev, key); mthca_mr_alloc() 444 mr->ibmr.rkey = mr->ibmr.lkey = hw_index_to_key(dev, key); mthca_mr_alloc() 446 if (mthca_is_memfree(dev)) { mthca_mr_alloc() 447 err = mthca_table_get(dev, dev->mr_table.mpt_table, key); mthca_mr_alloc() 452 mailbox = mthca_alloc_mailbox(dev, GFP_KERNEL); mthca_mr_alloc() 477 cpu_to_be64(dev->mr_table.mtt_base + mthca_mr_alloc() 478 mr->mtt->first_seg dev->limits.mtt_seg_size); mthca_mr_alloc() 481 mthca_dbg(dev, "Dumping MPT entry %08x:\n", mr->ibmr.lkey); mthca_mr_alloc() 491 err = mthca_SW2HW_MPT(dev, mailbox, mthca_mr_alloc() 492 key & (dev->limits.num_mpts - 1)); mthca_mr_alloc() 494 mthca_warn(dev, "SW2HW_MPT failed (%d)\n", err); mthca_mr_alloc() 498 mthca_free_mailbox(dev, mailbox); mthca_mr_alloc() 502 mthca_free_mailbox(dev, mailbox); mthca_mr_alloc() 505 mthca_table_put(dev, dev->mr_table.mpt_table, key); mthca_mr_alloc() 508 mthca_free(&dev->mr_table.mpt_alloc, key); mthca_mr_alloc() 512 int mthca_mr_alloc_notrans(struct mthca_dev dev, u32 pd, mthca_mr_alloc_notrans() argument 516 return mthca_mr_alloc(dev, pd, 12, 0, ~0ULL, access, mr); mthca_mr_alloc_notrans() 519 int mthca_mr_alloc_phys(struct mthca_dev dev, u32 pd, mthca_mr_alloc_phys() argument 526 mr->mtt = mthca_alloc_mtt(dev, list_len); mthca_mr_alloc_phys() 530 err = mthca_write_mtt(dev, mr->mtt, 0, buffer_list, list_len); mthca_mr_alloc_phys() 532 mthca_free_mtt(dev, mr->mtt); mthca_mr_alloc_phys() 536 err = mthca_mr_alloc(dev, pd, buffer_size_shift, iova, mthca_mr_alloc_phys() 539 mthca_free_mtt(dev, mr->mtt); mthca_mr_alloc_phys() 545 static void mthca_free_region(struct mthca_dev dev, u32 lkey) mthca_free_region() argument 547 mthca_table_put(dev, dev->mr_table.mpt_table, mthca_free_region() 548 key_to_hw_index(dev, lkey)); mthca_free_region() 550 mthca_free(&dev->mr_table.mpt_alloc, key_to_hw_index(dev, lkey)); mthca_free_region() 553 void mthca_free_mr(struct mthca_dev dev, struct mthca_mr mr) mthca_free_mr() argument 557 err = mthca_HW2SW_MPT(dev, NULL, mthca_free_mr() 558 key_to_hw_index(dev, mr->ibmr.lkey) & mthca_free_mr() 559 (dev->limits.num_mpts - 1)); mthca_free_mr() 561 mthca_warn(dev, "HW2SW_MPT failed (%d)\n", err); mthca_free_mr() 563 mthca_free_region(dev, mr->ibmr.lkey); mthca_free_mr() 564 mthca_free_mtt(dev, mr->mtt); mthca_free_mr() 567 int mthca_fmr_alloc(struct mthca_dev dev, u32 pd, mthca_fmr_alloc() argument 582 if (mthca_is_memfree(dev) && mthca_fmr_alloc() 588 key = mthca_alloc(&dev->mr_table.mpt_alloc); mthca_fmr_alloc() 591 key = adjust_key(dev, key); mthca_fmr_alloc() 593 idx = key & (dev->limits.num_mpts - 1); mthca_fmr_alloc() 594 mr->ibmr.rkey = mr->ibmr.lkey = hw_index_to_key(dev, key); mthca_fmr_alloc() 596 if (mthca_is_memfree(dev)) { mthca_fmr_alloc() 597 err = mthca_table_get(dev, dev->mr_table.mpt_table, key); mthca_fmr_alloc() 601 mr->mem.arbel.mpt = mthca_table_find(dev->mr_table.mpt_table, key, NULL); mthca_fmr_alloc() 604 mr->mem.tavor.mpt = dev->mr_table.tavor_fmr.mpt_base + mthca_fmr_alloc() 607 mr->mtt = __mthca_alloc_mtt(dev, list_len, dev->mr_table.fmr_mtt_buddy); mthca_fmr_alloc() 613 mtt_seg = mr->mtt->first_seg * dev->limits.mtt_seg_size; mthca_fmr_alloc() 615 if (mthca_is_memfree(dev)) { mthca_fmr_alloc() 616 mr->mem.arbel.mtts = mthca_table_find(dev->mr_table.mtt_table, mthca_fmr_alloc() 621 mr->mem.tavor.mtts = dev->mr_table.tavor_fmr.mtt_base + mtt_seg; mthca_fmr_alloc() 623 mailbox = mthca_alloc_mailbox(dev, GFP_KERNEL); mthca_fmr_alloc() 641 mpt_entry->mtt_seg = cpu_to_be64(dev->mr_table.mtt_base + mtt_seg); mthca_fmr_alloc() 644 mthca_dbg(dev, "Dumping MPT entry %08x:\n", mr->ibmr.lkey); mthca_fmr_alloc() 654 err = mthca_SW2HW_MPT(dev, mailbox, mthca_fmr_alloc() 655 key & (dev->limits.num_mpts - 1)); mthca_fmr_alloc() 657 mthca_warn(dev, "SW2HW_MPT failed (%d)\n", err); mthca_fmr_alloc() 661 mthca_free_mailbox(dev, mailbox); mthca_fmr_alloc() 665 mthca_free_mailbox(dev, mailbox); mthca_fmr_alloc() 668 mthca_free_mtt(dev, mr->mtt); mthca_fmr_alloc() 671 mthca_table_put(dev, dev->mr_table.mpt_table, key); mthca_fmr_alloc() 674 mthca_free(&dev->mr_table.mpt_alloc, key); mthca_fmr_alloc() 678 int mthca_free_fmr(struct mthca_dev dev, struct mthca_fmr fmr) mthca_free_fmr() argument 683 mthca_free_region(dev, fmr->ibmr.lkey); mthca_free_fmr() 684 mthca_free_mtt(dev, fmr->mtt); mthca_free_fmr() 721 struct mthca_dev dev = to_mdev(ibfmr->device); mthca_tavor_map_phys_fmr() local 733 key += dev->limits.num_mpts; mthca_tavor_map_phys_fmr() 762 struct mthca_dev dev = to_mdev(ibfmr->device); mthca_arbel_map_phys_fmr() local 773 if (dev->mthca_flags & MTHCA_FLAG_SINAI_OPT) mthca_arbel_map_phys_fmr() 776 key += dev->limits.num_mpts; mthca_arbel_map_phys_fmr() 783 dma_sync_single_for_cpu(&dev->pdev->dev, fmr->mem.arbel.dma_handle, mthca_arbel_map_phys_fmr() 790 dma_sync_single_for_device(&dev->pdev->dev, fmr->mem.arbel.dma_handle, mthca_arbel_map_phys_fmr() 807 void mthca_tavor_fmr_unmap(struct mthca_dev dev, struct mthca_fmr fmr) mthca_tavor_fmr_unmap() argument 817 void mthca_arbel_fmr_unmap(struct mthca_dev dev, struct mthca_fmr fmr) mthca_arbel_fmr_unmap() argument 827 int mthca_init_mr_table(struct mthca_dev dev) mthca_init_mr_table() argument 832 err = mthca_alloc_init(&dev->mr_table.mpt_alloc, mthca_init_mr_table() 833 dev->limits.num_mpts, mthca_init_mr_table() 834 ~0, dev->limits.reserved_mrws); mthca_init_mr_table() 838 if (!mthca_is_memfree(dev) && mthca_init_mr_table() 839 (dev->mthca_flags & MTHCA_FLAG_DDR_HIDDEN)) mthca_init_mr_table() 840 dev->limits.fmr_reserved_mtts = 0; mthca_init_mr_table() 842 dev->mthca_flags \|= MTHCA_FLAG_FMR; mthca_init_mr_table() 844 if (dev->mthca_flags & MTHCA_FLAG_SINAI_OPT) mthca_init_mr_table() 845 mthca_dbg(dev, "Memory key throughput optimization activated.\n"); mthca_init_mr_table() 847 err = mthca_buddy_init(&dev->mr_table.mtt_buddy, mthca_init_mr_table() 848 fls(dev->limits.num_mtt_segs - 1)); mthca_init_mr_table() 853 dev->mr_table.tavor_fmr.mpt_base = NULL; mthca_init_mr_table() 854 dev->mr_table.tavor_fmr.mtt_base = NULL; mthca_init_mr_table() 856 if (dev->limits.fmr_reserved_mtts) { mthca_init_mr_table() 857 i = fls(dev->limits.fmr_reserved_mtts - 1); mthca_init_mr_table() 860 mthca_warn(dev, "Unable to reserve 2^31 FMR MTTs.\n"); mthca_init_mr_table() 866 mtts = dev->limits.num_mtt_segs; mthca_init_mr_table() 867 mpts = dev->limits.num_mpts; mthca_init_mr_table() 870 if (!mthca_is_memfree(dev) && mthca_init_mr_table() 871 (dev->mthca_flags & MTHCA_FLAG_FMR)) { mthca_init_mr_table() 873 addr = pci_resource_start(dev->pdev, 4) + mthca_init_mr_table() 874 ((pci_resource_len(dev->pdev, 4) - 1) & mthca_init_mr_table() 875 dev->mr_table.mpt_base); mthca_init_mr_table() 877 dev->mr_table.tavor_fmr.mpt_base = mthca_init_mr_table() 880 if (!dev->mr_table.tavor_fmr.mpt_base) { mthca_init_mr_table() 881 mthca_warn(dev, "MPT ioremap for FMR failed.\n"); mthca_init_mr_table() 886 addr = pci_resource_start(dev->pdev, 4) + mthca_init_mr_table() 887 ((pci_resource_len(dev->pdev, 4) - 1) & mthca_init_mr_table() 888 dev->mr_table.mtt_base); mthca_init_mr_table() 890 dev->mr_table.tavor_fmr.mtt_base = mthca_init_mr_table() 891 ioremap(addr, mtts dev->limits.mtt_seg_size); mthca_init_mr_table() 892 if (!dev->mr_table.tavor_fmr.mtt_base) { mthca_init_mr_table() 893 mthca_warn(dev, "MTT ioremap for FMR failed.\n"); mthca_init_mr_table() 899 if (dev->limits.fmr_reserved_mtts) { mthca_init_mr_table() 900 err = mthca_buddy_init(&dev->mr_table.tavor_fmr.mtt_buddy, fls(mtts - 1)); mthca_init_mr_table() 905 err = mthca_buddy_alloc(&dev->mr_table.mtt_buddy, fls(mtts - 1)); mthca_init_mr_table() 909 dev->mr_table.fmr_mtt_buddy = mthca_init_mr_table() 910 &dev->mr_table.tavor_fmr.mtt_buddy; mthca_init_mr_table() 912 dev->mr_table.fmr_mtt_buddy = &dev->mr_table.mtt_buddy; mthca_init_mr_table() 915 if (dev->limits.reserved_mtts) { mthca_init_mr_table() 916 i = fls(dev->limits.reserved_mtts - 1); mthca_init_mr_table() 918 if (mthca_alloc_mtt_range(dev, i, mthca_init_mr_table() 919 dev->mr_table.fmr_mtt_buddy) == -1) { mthca_init_mr_table() 920 mthca_warn(dev, "MTT table of order %d is too small.\n", mthca_init_mr_table() 921 dev->mr_table.fmr_mtt_buddy->max_order); mthca_init_mr_table() 931 if (dev->limits.fmr_reserved_mtts) mthca_init_mr_table() 932 mthca_buddy_cleanup(&dev->mr_table.tavor_fmr.mtt_buddy); mthca_init_mr_table() 935 if (dev->mr_table.tavor_fmr.mtt_base) mthca_init_mr_table() 936 iounmap(dev->mr_table.tavor_fmr.mtt_base); mthca_init_mr_table() 939 if (dev->mr_table.tavor_fmr.mpt_base) mthca_init_mr_table() 940 iounmap(dev->mr_table.tavor_fmr.mpt_base); mthca_init_mr_table() 943 mthca_buddy_cleanup(&dev->mr_table.mtt_buddy); mthca_init_mr_table() 946 mthca_alloc_cleanup(&dev->mr_table.mpt_alloc); mthca_init_mr_table() 951 void mthca_cleanup_mr_table(struct mthca_dev *dev) mthca_cleanup_mr_table() argument 954 if (dev->limits.fmr_reserved_mtts) mthca_cleanup_mr_table() 955 mthca_buddy_cleanup(&dev->mr_table.tavor_fmr.mtt_buddy); mthca_cleanup_mr_table() 957 mthca_buddy_cleanup(&dev->mr_table.mtt_buddy); mthca_cleanup_mr_table() 959 if (dev->mr_table.tavor_fmr.mtt_base) mthca_cleanup_mr_table() 960 iounmap(dev->mr_table.tavor_fmr.mtt_base); mthca_cleanup_mr_table() 961 if (dev->mr_table.tavor_fmr.mpt_base) mthca_cleanup_mr_table() 962 iounmap(dev->mr_table.tavor_fmr.mpt_base); mthca_cleanup_mr_table() 964 mthca_alloc_cleanup(&dev->mr_table.mpt_alloc); mthca_cleanup_mr_table()
/linux-4.1.27/drivers/virtio/
H A D	virtio.c	14 struct virtio_device dev = dev_to_virtio(_d); device_show() local 15 return sprintf(buf, "0x%04x\n", dev->id.device); device_show() 22 struct virtio_device dev = dev_to_virtio(_d); vendor_show() local 23 return sprintf(buf, "0x%04x\n", dev->id.vendor); vendor_show() 30 struct virtio_device dev = dev_to_virtio(_d); status_show() local 31 return sprintf(buf, "0x%08x\n", dev->config->get_status(dev)); status_show() 38 struct virtio_device dev = dev_to_virtio(_d); modalias_show() local 40 dev->id.device, dev->id.vendor); modalias_show() 47 struct virtio_device dev = dev_to_virtio(_d); features_show() local 53 for (i = 0; i < sizeof(dev->features)8; i++) features_show() 55 __virtio_test_bit(dev, i) ? '1' : '0'); features_show() 71 static inline int virtio_id_match(const struct virtio_device dev, virtio_id_match() argument 74 if (id->device != dev->id.device && id->device != VIRTIO_DEV_ANY_ID) virtio_id_match() 77 return id->vendor == VIRTIO_DEV_ANY_ID \|\| id->vendor == dev->id.vendor; virtio_id_match() 85 struct virtio_device dev = dev_to_virtio(_dv); virtio_dev_match() local 90 if (virtio_id_match(dev, &ids[i])) virtio_dev_match() 97 struct virtio_device dev = dev_to_virtio(_dv); virtio_uevent() local 100 dev->id.device, dev->id.vendor); virtio_uevent() 103 static void add_status(struct virtio_device dev, unsigned status) add_status() argument 105 dev->config->set_status(dev, dev->config->get_status(dev) \| status); add_status() 112 struct virtio_driver drv = drv_to_virtio(vdev->dev.driver); virtio_check_driver_offered_feature() 128 static void __virtio_config_changed(struct virtio_device dev) __virtio_config_changed() argument 130 struct virtio_driver drv = drv_to_virtio(dev->dev.driver); __virtio_config_changed() 132 if (!dev->config_enabled) __virtio_config_changed() 133 dev->config_change_pending = true; __virtio_config_changed() 135 drv->config_changed(dev); __virtio_config_changed() 138 void virtio_config_changed(struct virtio_device dev) virtio_config_changed() argument 142 spin_lock_irqsave(&dev->config_lock, flags); virtio_config_changed() 143 __virtio_config_changed(dev); virtio_config_changed() 144 spin_unlock_irqrestore(&dev->config_lock, flags); virtio_config_changed() 148 static void virtio_config_disable(struct virtio_device dev) virtio_config_disable() argument 150 spin_lock_irq(&dev->config_lock); virtio_config_disable() 151 dev->config_enabled = false; virtio_config_disable() 152 spin_unlock_irq(&dev->config_lock); virtio_config_disable() 155 static void virtio_config_enable(struct virtio_device dev) virtio_config_enable() argument 157 spin_lock_irq(&dev->config_lock); virtio_config_enable() 158 dev->config_enabled = true; virtio_config_enable() 159 if (dev->config_change_pending) virtio_config_enable() 160 __virtio_config_changed(dev); virtio_config_enable() 161 dev->config_change_pending = false; virtio_config_enable() 162 spin_unlock_irq(&dev->config_lock); virtio_config_enable() 165 static int virtio_finalize_features(struct virtio_device dev) virtio_finalize_features() argument 167 int ret = dev->config->finalize_features(dev); virtio_finalize_features() 173 if (!virtio_has_feature(dev, VIRTIO_F_VERSION_1)) virtio_finalize_features() 176 add_status(dev, VIRTIO_CONFIG_S_FEATURES_OK); virtio_finalize_features() 177 status = dev->config->get_status(dev); virtio_finalize_features() 179 dev_err(&dev->dev, "virtio: device refuses features: %x\n", virtio_finalize_features() 189 struct virtio_device dev = dev_to_virtio(_d); virtio_dev_probe() local 190 struct virtio_driver drv = drv_to_virtio(dev->dev.driver); virtio_dev_probe() 196 add_status(dev, VIRTIO_CONFIG_S_DRIVER); virtio_dev_probe() 199 device_features = dev->config->get_features(dev); virtio_dev_probe() 222 dev->features = driver_features & device_features; virtio_dev_probe() 224 dev->features = driver_features_legacy & device_features; virtio_dev_probe() 229 __virtio_set_bit(dev, i); virtio_dev_probe() 231 err = virtio_finalize_features(dev); virtio_dev_probe() 235 err = drv->probe(dev); virtio_dev_probe() 240 if (!(dev->config->get_status(dev) & VIRTIO_CONFIG_S_DRIVER_OK)) virtio_dev_probe() 241 virtio_device_ready(dev); virtio_dev_probe() 244 drv->scan(dev); virtio_dev_probe() 246 virtio_config_enable(dev); virtio_dev_probe() 250 add_status(dev, VIRTIO_CONFIG_S_FAILED); virtio_dev_probe() 257 struct virtio_device dev = dev_to_virtio(_d); virtio_dev_remove() local 258 struct virtio_driver drv = drv_to_virtio(dev->dev.driver); virtio_dev_remove() 260 virtio_config_disable(dev); virtio_dev_remove() 262 drv->remove(dev); virtio_dev_remove() 265 WARN_ON_ONCE(dev->config->get_status(dev)); virtio_dev_remove() 268 add_status(dev, VIRTIO_CONFIG_S_ACKNOWLEDGE); virtio_dev_remove() 296 int register_virtio_device(struct virtio_device dev) register_virtio_device() argument 300 dev->dev.bus = &virtio_bus; register_virtio_device() 307 dev->index = err; register_virtio_device() 308 dev_set_name(&dev->dev, "virtio%u", dev->index); register_virtio_device() 310 spin_lock_init(&dev->config_lock); register_virtio_device() 311 dev->config_enabled = false; register_virtio_device() 312 dev->config_change_pending = false; register_virtio_device() 316 dev->config->reset(dev); register_virtio_device() 319 add_status(dev, VIRTIO_CONFIG_S_ACKNOWLEDGE); register_virtio_device() 321 INIT_LIST_HEAD(&dev->vqs); register_virtio_device() 325 err = device_register(&dev->dev); register_virtio_device() 328 add_status(dev, VIRTIO_CONFIG_S_FAILED); register_virtio_device() 333 void unregister_virtio_device(struct virtio_device dev) unregister_virtio_device() argument 335 int index = dev->index; / save for after device release / unregister_virtio_device() 337 device_unregister(&dev->dev); unregister_virtio_device() 343 int virtio_device_freeze(struct virtio_device dev) virtio_device_freeze() argument 345 struct virtio_driver drv = drv_to_virtio(dev->dev.driver); virtio_device_freeze() 347 virtio_config_disable(dev); virtio_device_freeze() 349 dev->failed = dev->config->get_status(dev) & VIRTIO_CONFIG_S_FAILED; virtio_device_freeze() 352 return drv->freeze(dev); virtio_device_freeze() 358 int virtio_device_restore(struct virtio_device dev) virtio_device_restore() argument 360 struct virtio_driver *drv = drv_to_virtio(dev->dev.driver); virtio_device_restore() 365 dev->config->reset(dev); virtio_device_restore() 368 add_status(dev, VIRTIO_CONFIG_S_ACKNOWLEDGE); virtio_device_restore() 372 if (dev->failed) virtio_device_restore() 373 add_status(dev, VIRTIO_CONFIG_S_FAILED); virtio_device_restore() 379 add_status(dev, VIRTIO_CONFIG_S_DRIVER); virtio_device_restore() 381 ret = virtio_finalize_features(dev); virtio_device_restore() 386 ret = drv->restore(dev); virtio_device_restore() 392 add_status(dev, VIRTIO_CONFIG_S_DRIVER_OK); virtio_device_restore() 394 virtio_config_enable(dev); virtio_device_restore() 399 add_status(dev, VIRTIO_CONFIG_S_FAILED); virtio_device_restore()
/linux-4.1.27/arch/mips/include/asm/
H A D	dma-mapping.h	15 static inline struct dma_map_ops get_dma_ops(struct device dev) get_dma_ops() argument 17 if (dev && dev->archdata.dma_ops) get_dma_ops() 18 return dev->archdata.dma_ops; get_dma_ops() 23 static inline bool dma_capable(struct device dev, dma_addr_t addr, size_t size) dma_capable() argument 25 if (!dev->dma_mask) dma_capable() 28 return addr + size <= dev->dma_mask; dma_capable() 35 static inline int dma_supported(struct device dev, u64 mask) dma_supported() argument 37 struct dma_map_ops ops = get_dma_ops(dev); dma_supported() 38 return ops->dma_supported(dev, mask); dma_supported() 41 static inline int dma_mapping_error(struct device dev, u64 mask) dma_mapping_error() argument 43 struct dma_map_ops ops = get_dma_ops(dev); dma_mapping_error() 45 debug_dma_mapping_error(dev, mask); dma_mapping_error() 46 return ops->mapping_error(dev, mask); dma_mapping_error() 50 dma_set_mask(struct device dev, u64 mask) dma_set_mask() argument 52 struct dma_map_ops ops = get_dma_ops(dev); dma_set_mask() 54 if(!dev->dma_mask \|\| !dma_supported(dev, mask)) dma_set_mask() 58 return ops->set_dma_mask(dev, mask); dma_set_mask() 60 dev->dma_mask = mask; dma_set_mask() 65 extern void dma_cache_sync(struct device dev, void vaddr, size_t size, 70 static inline void dma_alloc_attrs(struct device dev, size_t size, dma_alloc_attrs() argument 75 struct dma_map_ops ops = get_dma_ops(dev); dma_alloc_attrs() 77 ret = ops->alloc(dev, size, dma_handle, gfp, attrs); dma_alloc_attrs() 79 debug_dma_alloc_coherent(dev, size, dma_handle, ret); dma_alloc_attrs() 86 static inline void dma_free_attrs(struct device dev, size_t size, dma_free_attrs() argument 90 struct dma_map_ops ops = get_dma_ops(dev); dma_free_attrs() 92 ops->free(dev, size, vaddr, dma_handle, attrs); dma_free_attrs() 94 debug_dma_free_coherent(dev, size, vaddr, dma_handle); dma_free_attrs() 98 void dma_alloc_noncoherent(struct device dev, size_t size, 101 void dma_free_noncoherent(struct device dev, size_t size,
/linux-4.1.27/drivers/w1/
H A D	w1_int.c	45 struct w1_master dev; w1_alloc_dev() local 51 dev = kzalloc(sizeof(struct w1_master) + sizeof(struct w1_bus_master), GFP_KERNEL); w1_alloc_dev() 52 if (!dev) { w1_alloc_dev() 59 dev->bus_master = (struct w1_bus_master )(dev + 1); w1_alloc_dev() 61 dev->owner = THIS_MODULE; w1_alloc_dev() 62 dev->max_slave_count = slave_count; w1_alloc_dev() 63 dev->slave_count = 0; w1_alloc_dev() 64 dev->attempts = 0; w1_alloc_dev() 65 dev->initialized = 0; w1_alloc_dev() 66 dev->id = id; w1_alloc_dev() 67 dev->slave_ttl = slave_ttl; w1_alloc_dev() 68 dev->search_count = w1_search_count; w1_alloc_dev() 69 dev->enable_pullup = w1_enable_pullup; w1_alloc_dev() 74 atomic_set(&dev->refcnt, 2); w1_alloc_dev() 76 INIT_LIST_HEAD(&dev->slist); w1_alloc_dev() 77 INIT_LIST_HEAD(&dev->async_list); w1_alloc_dev() 78 mutex_init(&dev->mutex); w1_alloc_dev() 79 mutex_init(&dev->bus_mutex); w1_alloc_dev() 80 mutex_init(&dev->list_mutex); w1_alloc_dev() 82 memcpy(&dev->dev, device, sizeof(struct device)); w1_alloc_dev() 83 dev_set_name(&dev->dev, "w1_bus_master%u", dev->id); w1_alloc_dev() 84 snprintf(dev->name, sizeof(dev->name), "w1_bus_master%u", dev->id); w1_alloc_dev() 85 dev->dev.init_name = dev->name; w1_alloc_dev() 87 dev->driver = driver; w1_alloc_dev() 89 dev->seq = 1; w1_alloc_dev() 91 err = device_register(&dev->dev); w1_alloc_dev() 94 memset(dev, 0, sizeof(struct w1_master)); w1_alloc_dev() 95 kfree(dev); w1_alloc_dev() 96 dev = NULL; w1_alloc_dev() 99 return dev; w1_alloc_dev() 102 static void w1_free_dev(struct w1_master dev) w1_free_dev() argument 104 device_unregister(&dev->dev); w1_free_dev() 113 struct w1_master dev, entry; w1_add_master_device() local 141 dev = w1_alloc_dev(id, w1_max_slave_count, w1_max_slave_ttl, w1_add_master_device() 143 if (!dev) { w1_add_master_device() 148 retval = w1_create_master_attributes(dev); w1_add_master_device() 154 memcpy(dev->bus_master, master, sizeof(struct w1_bus_master)); w1_add_master_device() 156 dev->initialized = 1; w1_add_master_device() 158 dev->thread = kthread_run(&w1_process, dev, "%s", dev->name); w1_add_master_device() 159 if (IS_ERR(dev->thread)) { w1_add_master_device() 160 retval = PTR_ERR(dev->thread); w1_add_master_device() 161 dev_err(&dev->dev, w1_add_master_device() 168 list_add(&dev->w1_master_entry, &w1_masters); w1_add_master_device() 172 msg.id.mst.id = dev->id; w1_add_master_device() 174 w1_netlink_send(dev, &msg); w1_add_master_device() 180 set_bit(W1_ABORT_SEARCH, &dev->flags); w1_add_master_device() 181 kthread_stop(dev->thread); w1_add_master_device() 184 w1_destroy_master_attributes(dev); w1_add_master_device() 186 w1_free_dev(dev); w1_add_master_device() 191 void __w1_remove_master_device(struct w1_master dev) __w1_remove_master_device() argument 197 list_del(&dev->w1_master_entry); __w1_remove_master_device() 200 set_bit(W1_ABORT_SEARCH, &dev->flags); __w1_remove_master_device() 201 kthread_stop(dev->thread); __w1_remove_master_device() 203 mutex_lock(&dev->mutex); __w1_remove_master_device() 204 mutex_lock(&dev->list_mutex); __w1_remove_master_device() 205 list_for_each_entry_safe(sl, sln, &dev->slist, w1_slave_entry) { __w1_remove_master_device() 206 mutex_unlock(&dev->list_mutex); __w1_remove_master_device() 208 mutex_lock(&dev->list_mutex); __w1_remove_master_device() 210 w1_destroy_master_attributes(dev); __w1_remove_master_device() 211 mutex_unlock(&dev->list_mutex); __w1_remove_master_device() 212 mutex_unlock(&dev->mutex); __w1_remove_master_device() 213 atomic_dec(&dev->refcnt); __w1_remove_master_device() 215 while (atomic_read(&dev->refcnt)) { __w1_remove_master_device() 216 dev_info(&dev->dev, "Waiting for %s to become free: refcnt=%d.\n", __w1_remove_master_device() 217 dev->name, atomic_read(&dev->refcnt)); __w1_remove_master_device() 221 mutex_lock(&dev->list_mutex); __w1_remove_master_device() 222 w1_process_callbacks(dev); __w1_remove_master_device() 223 mutex_unlock(&dev->list_mutex); __w1_remove_master_device() 225 mutex_lock(&dev->list_mutex); __w1_remove_master_device() 226 w1_process_callbacks(dev); __w1_remove_master_device() 227 mutex_unlock(&dev->list_mutex); __w1_remove_master_device() 230 msg.id.mst.id = dev->id; __w1_remove_master_device() 232 w1_netlink_send(dev, &msg); __w1_remove_master_device() 234 w1_free_dev(dev); __w1_remove_master_device() 243 struct w1_master dev, found = NULL; w1_remove_master_device() local 245 list_for_each_entry(dev, &w1_masters, w1_master_entry) { w1_remove_master_device() 246 if (!dev->initialized) w1_remove_master_device() 249 if (dev->bus_master->data == bm->data) { w1_remove_master_device() 250 found = dev; w1_remove_master_device()
/linux-4.1.27/drivers/media/usb/cx231xx/
H A D	cx231xx-avcore.c	58 static int verve_write_byte(struct cx231xx dev, u8 saddr, u8 data) verve_write_byte() argument 60 return cx231xx_write_i2c_data(dev, VERVE_I2C_ADDRESS, verve_write_byte() 64 static int verve_read_byte(struct cx231xx dev, u8 saddr, u8 data) verve_read_byte() argument 69 status = cx231xx_read_i2c_data(dev, VERVE_I2C_ADDRESS, verve_read_byte() 74 void initGPIO(struct cx231xx dev) initGPIO() argument 82 cx231xx_send_gpio_cmd(dev, _gpio_direction, (u8 )&value, 4, 0, 0); initGPIO() 84 verve_read_byte(dev, 0x07, &val); initGPIO() 85 dev_dbg(dev->dev, "verve_read_byte address0x07=0x%x\n", val); initGPIO() 86 verve_write_byte(dev, 0x07, 0xF4); initGPIO() 87 verve_read_byte(dev, 0x07, &val); initGPIO() 88 dev_dbg(dev->dev, "verve_read_byte address0x07=0x%x\n", val); initGPIO() 90 cx231xx_capture_start(dev, 1, Vbi); initGPIO() 92 cx231xx_mode_register(dev, EP_MODE_SET, 0x0500FE00); initGPIO() 93 cx231xx_mode_register(dev, GBULK_BIT_EN, 0xFFFDFFFF); initGPIO() 96 void uninitGPIO(struct cx231xx dev) uninitGPIO() argument 100 cx231xx_capture_start(dev, 0, Vbi); uninitGPIO() 101 verve_write_byte(dev, 0x07, 0x14); uninitGPIO() 102 cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, uninitGPIO() 110 static int afe_write_byte(struct cx231xx dev, u16 saddr, u8 data) afe_write_byte() argument 112 return cx231xx_write_i2c_data(dev, AFE_DEVICE_ADDRESS, afe_write_byte() 116 static int afe_read_byte(struct cx231xx dev, u16 saddr, u8 data) afe_read_byte() argument 121 status = cx231xx_read_i2c_data(dev, AFE_DEVICE_ADDRESS, afe_read_byte() 127 int cx231xx_afe_init_super_block(struct cx231xx dev, u32 ref_count) cx231xx_afe_init_super_block() argument 136 status = afe_write_byte(dev, SUP_BLK_TUNE2, temp); cx231xx_afe_init_super_block() 140 status = afe_read_byte(dev, SUP_BLK_TUNE2, &afe_power_status); cx231xx_afe_init_super_block() 146 status = afe_write_byte(dev, SUP_BLK_TUNE1, temp); cx231xx_afe_init_super_block() 150 status = afe_write_byte(dev, SUP_BLK_PLL2, 0x0f); cx231xx_afe_init_super_block() 156 status = afe_write_byte(dev, SUP_BLK_PWRDN, 0x18); cx231xx_afe_init_super_block() 158 dev_dbg(dev->dev, cx231xx_afe_init_super_block() 164 status = afe_read_byte(dev, SUP_BLK_PWRDN, &afe_power_status); cx231xx_afe_init_super_block() 167 dev_dbg(dev->dev, cx231xx_afe_init_super_block() 174 dev_dbg(dev->dev, cx231xx_afe_init_super_block() 186 status = afe_write_byte(dev, SUP_BLK_TUNE3, 0x40); cx231xx_afe_init_super_block() 193 status = afe_write_byte(dev, SUP_BLK_TUNE3, 0x00); cx231xx_afe_init_super_block() 198 int cx231xx_afe_init_channels(struct cx231xx dev) cx231xx_afe_init_channels() argument 203 status = afe_write_byte(dev, ADC_PWRDN_CLAMP_CH1, 0x00); cx231xx_afe_init_channels() 204 status = afe_write_byte(dev, ADC_PWRDN_CLAMP_CH2, 0x00); cx231xx_afe_init_channels() 205 status = afe_write_byte(dev, ADC_PWRDN_CLAMP_CH3, 0x00); cx231xx_afe_init_channels() 208 status = afe_write_byte(dev, ADC_COM_QUANT, 0x02); cx231xx_afe_init_channels() 211 status = afe_write_byte(dev, ADC_FB_FRCRST_CH1, 0x17); cx231xx_afe_init_channels() 212 status = afe_write_byte(dev, ADC_FB_FRCRST_CH2, 0x17); cx231xx_afe_init_channels() 213 status = afe_write_byte(dev, ADC_FB_FRCRST_CH3, 0x17); cx231xx_afe_init_channels() 216 status = afe_write_byte(dev, ADC_CAL_ATEST_CH1, 0x10); cx231xx_afe_init_channels() 217 status = afe_write_byte(dev, ADC_CAL_ATEST_CH2, 0x10); cx231xx_afe_init_channels() 218 status = afe_write_byte(dev, ADC_CAL_ATEST_CH3, 0x10); cx231xx_afe_init_channels() 222 status = afe_write_byte(dev, ADC_FB_FRCRST_CH1, 0x07); cx231xx_afe_init_channels() 223 status = afe_write_byte(dev, ADC_FB_FRCRST_CH2, 0x07); cx231xx_afe_init_channels() 224 status = afe_write_byte(dev, ADC_FB_FRCRST_CH3, 0x07); cx231xx_afe_init_channels() 227 status = afe_write_byte(dev, ADC_NTF_PRECLMP_EN_CH1, 0xf0); cx231xx_afe_init_channels() 228 status = afe_write_byte(dev, ADC_NTF_PRECLMP_EN_CH2, 0xf0); cx231xx_afe_init_channels() 229 status = afe_write_byte(dev, ADC_NTF_PRECLMP_EN_CH3, 0xf0); cx231xx_afe_init_channels() 232 status = cx231xx_reg_mask_write(dev, AFE_DEVICE_ADDRESS, 8, cx231xx_afe_init_channels() 234 status = cx231xx_reg_mask_write(dev, AFE_DEVICE_ADDRESS, 8, cx231xx_afe_init_channels() 236 status = cx231xx_reg_mask_write(dev, AFE_DEVICE_ADDRESS, 8, cx231xx_afe_init_channels() 240 status = afe_write_byte(dev, ADC_DCSERVO_DEM_CH1, 0x03); cx231xx_afe_init_channels() 241 status = afe_write_byte(dev, ADC_DCSERVO_DEM_CH2, 0x03); cx231xx_afe_init_channels() 242 status = afe_write_byte(dev, ADC_DCSERVO_DEM_CH3, 0x03); cx231xx_afe_init_channels() 247 int cx231xx_afe_setup_AFE_for_baseband(struct cx231xx dev) cx231xx_afe_setup_AFE_for_baseband() argument 252 status = afe_read_byte(dev, ADC_PWRDN_CLAMP_CH2, &c_value); cx231xx_afe_setup_AFE_for_baseband() 254 status = afe_write_byte(dev, ADC_PWRDN_CLAMP_CH2, c_value); cx231xx_afe_setup_AFE_for_baseband() 268 int cx231xx_afe_set_input_mux(struct cx231xx dev, u32 input_mux) cx231xx_afe_set_input_mux() argument 277 status = afe_read_byte(dev, ADC_INPUT_CH1, &value); cx231xx_afe_set_input_mux() 281 status = afe_write_byte(dev, ADC_INPUT_CH1, value); cx231xx_afe_set_input_mux() 285 status = afe_read_byte(dev, ADC_INPUT_CH2, &value); cx231xx_afe_set_input_mux() 289 status = afe_write_byte(dev, ADC_INPUT_CH2, value); cx231xx_afe_set_input_mux() 295 status = afe_read_byte(dev, ADC_INPUT_CH3, &value); cx231xx_afe_set_input_mux() 299 status = afe_write_byte(dev, ADC_INPUT_CH3, value); cx231xx_afe_set_input_mux() 305 int cx231xx_afe_set_mode(struct cx231xx dev, enum AFE_MODE mode) cx231xx_afe_set_mode() argument 316 cx231xx_Setup_AFE_for_LowIF(dev); cx231xx_afe_set_mode() 319 status = cx231xx_afe_setup_AFE_for_baseband(dev); cx231xx_afe_set_mode() 332 if ((mode != dev->afe_mode) && cx231xx_afe_set_mode() 333 (dev->video_input == CX231XX_VMUX_TELEVISION)) cx231xx_afe_set_mode() 334 status = cx231xx_afe_adjust_ref_count(dev, cx231xx_afe_set_mode() 337 dev->afe_mode = mode; cx231xx_afe_set_mode() 342 int cx231xx_afe_update_power_control(struct cx231xx dev, cx231xx_afe_update_power_control() argument 348 switch (dev->model) { cx231xx_afe_update_power_control() 366 status = afe_write_byte(dev, SUP_BLK_PWRDN, cx231xx_afe_update_power_control() 369 status \|= afe_read_byte(dev, SUP_BLK_PWRDN, cx231xx_afe_update_power_control() 375 status = afe_write_byte(dev, ADC_PWRDN_CLAMP_CH1, cx231xx_afe_update_power_control() 377 status \|= afe_write_byte(dev, ADC_PWRDN_CLAMP_CH2, cx231xx_afe_update_power_control() 379 status \|= afe_write_byte(dev, ADC_PWRDN_CLAMP_CH3, cx231xx_afe_update_power_control() 382 status = afe_write_byte(dev, ADC_PWRDN_CLAMP_CH1, cx231xx_afe_update_power_control() 384 status \|= afe_write_byte(dev, ADC_PWRDN_CLAMP_CH2, cx231xx_afe_update_power_control() 386 status \|= afe_write_byte(dev, ADC_PWRDN_CLAMP_CH3, cx231xx_afe_update_power_control() 389 status \|= afe_read_byte(dev, SUP_BLK_PWRDN, cx231xx_afe_update_power_control() 394 status \|= afe_write_byte(dev, SUP_BLK_PWRDN, cx231xx_afe_update_power_control() 399 status = afe_write_byte(dev, SUP_BLK_PWRDN, cx231xx_afe_update_power_control() 402 status \|= afe_read_byte(dev, SUP_BLK_PWRDN, cx231xx_afe_update_power_control() 408 status \|= afe_write_byte(dev, ADC_PWRDN_CLAMP_CH1, cx231xx_afe_update_power_control() 410 status \|= afe_write_byte(dev, ADC_PWRDN_CLAMP_CH2, cx231xx_afe_update_power_control() 412 status \|= afe_write_byte(dev, ADC_PWRDN_CLAMP_CH3, cx231xx_afe_update_power_control() 415 dev_dbg(dev->dev, "Invalid AV mode input\n"); cx231xx_afe_update_power_control() 423 status = afe_write_byte(dev, SUP_BLK_PWRDN, cx231xx_afe_update_power_control() 426 status \|= afe_read_byte(dev, SUP_BLK_PWRDN, cx231xx_afe_update_power_control() 432 status \|= afe_write_byte(dev, ADC_PWRDN_CLAMP_CH1, cx231xx_afe_update_power_control() 434 status \|= afe_write_byte(dev, ADC_PWRDN_CLAMP_CH2, cx231xx_afe_update_power_control() 436 status \|= afe_write_byte(dev, ADC_PWRDN_CLAMP_CH3, cx231xx_afe_update_power_control() 439 status = afe_write_byte(dev, ADC_PWRDN_CLAMP_CH1, cx231xx_afe_update_power_control() 441 status \|= afe_write_byte(dev, ADC_PWRDN_CLAMP_CH2, cx231xx_afe_update_power_control() 443 status \|= afe_write_byte(dev, ADC_PWRDN_CLAMP_CH3, cx231xx_afe_update_power_control() 446 status \|= afe_read_byte(dev, SUP_BLK_PWRDN, cx231xx_afe_update_power_control() 451 status \|= afe_write_byte(dev, SUP_BLK_PWRDN, cx231xx_afe_update_power_control() 456 status = afe_write_byte(dev, SUP_BLK_PWRDN, cx231xx_afe_update_power_control() 459 status \|= afe_read_byte(dev, SUP_BLK_PWRDN, cx231xx_afe_update_power_control() 465 status \|= afe_write_byte(dev, ADC_PWRDN_CLAMP_CH1, cx231xx_afe_update_power_control() 467 status \|= afe_write_byte(dev, ADC_PWRDN_CLAMP_CH2, cx231xx_afe_update_power_control() 469 status \|= afe_write_byte(dev, ADC_PWRDN_CLAMP_CH3, cx231xx_afe_update_power_control() 472 dev_dbg(dev->dev, "Invalid AV mode input\n"); cx231xx_afe_update_power_control() 480 int cx231xx_afe_adjust_ref_count(struct cx231xx dev, u32 video_input) cx231xx_afe_adjust_ref_count() argument 486 dev->video_input = video_input; cx231xx_afe_adjust_ref_count() 489 status = afe_read_byte(dev, ADC_INPUT_CH3, &input_mode); cx231xx_afe_adjust_ref_count() 490 status = afe_read_byte(dev, ADC_NTF_PRECLMP_EN_CH3, cx231xx_afe_adjust_ref_count() 493 status = afe_read_byte(dev, ADC_INPUT_CH1, &input_mode); cx231xx_afe_adjust_ref_count() 494 status = afe_read_byte(dev, ADC_NTF_PRECLMP_EN_CH1, cx231xx_afe_adjust_ref_count() 502 dev->afe_ref_count = 0x23C; cx231xx_afe_adjust_ref_count() 505 dev->afe_ref_count = 0x24C; cx231xx_afe_adjust_ref_count() 508 dev->afe_ref_count = 0x258; cx231xx_afe_adjust_ref_count() 511 dev->afe_ref_count = 0x260; cx231xx_afe_adjust_ref_count() 517 status = cx231xx_afe_init_super_block(dev, dev->afe_ref_count); cx231xx_afe_adjust_ref_count() 525 static int vid_blk_write_byte(struct cx231xx dev, u16 saddr, u8 data) vid_blk_write_byte() argument 527 return cx231xx_write_i2c_data(dev, VID_BLK_I2C_ADDRESS, vid_blk_write_byte() 531 static int vid_blk_read_byte(struct cx231xx dev, u16 saddr, u8 data) vid_blk_read_byte() argument 536 status = cx231xx_read_i2c_data(dev, VID_BLK_I2C_ADDRESS, vid_blk_read_byte() 542 static int vid_blk_write_word(struct cx231xx dev, u16 saddr, u32 data) vid_blk_write_word() argument 544 return cx231xx_write_i2c_data(dev, VID_BLK_I2C_ADDRESS, vid_blk_write_word() 548 static int vid_blk_read_word(struct cx231xx dev, u16 saddr, u32 data) vid_blk_read_word() argument 550 return cx231xx_read_i2c_data(dev, VID_BLK_I2C_ADDRESS, vid_blk_read_word() 553 int cx231xx_check_fw(struct cx231xx dev) cx231xx_check_fw() argument 557 status = vid_blk_read_byte(dev, DL_CTL_ADDRESS_LOW, &temp); cx231xx_check_fw() 565 int cx231xx_set_video_input_mux(struct cx231xx dev, u8 input) cx231xx_set_video_input_mux() argument 572 if ((dev->current_pcb_config.type == USB_BUS_POWER) && cx231xx_set_video_input_mux() 573 (dev->power_mode != POLARIS_AVMODE_ENXTERNAL_AV)) { cx231xx_set_video_input_mux() 575 status = cx231xx_set_power_mode(dev, cx231xx_set_video_input_mux() 578 dev_err(dev->dev, cx231xx_set_video_input_mux() 584 status = cx231xx_set_decoder_video_input(dev, cx231xx_set_video_input_mux() 590 if ((dev->current_pcb_config.type == USB_BUS_POWER) && cx231xx_set_video_input_mux() 591 (dev->power_mode != POLARIS_AVMODE_ANALOGT_TV)) { cx231xx_set_video_input_mux() 593 status = cx231xx_set_power_mode(dev, cx231xx_set_video_input_mux() 596 dev_err(dev->dev, cx231xx_set_video_input_mux() 602 if (dev->tuner_type == TUNER_NXP_TDA18271) cx231xx_set_video_input_mux() 603 status = cx231xx_set_decoder_video_input(dev, cx231xx_set_video_input_mux() 607 status = cx231xx_set_decoder_video_input(dev, cx231xx_set_video_input_mux() 613 dev_err(dev->dev, "%s: Unknown Input %d !\n", cx231xx_set_video_input_mux() 619 dev->video_input = input; cx231xx_set_video_input_mux() 624 int cx231xx_set_decoder_video_input(struct cx231xx dev, cx231xx_set_decoder_video_input() argument 630 if (pin_type != dev->video_input) { cx231xx_set_decoder_video_input() 631 status = cx231xx_afe_adjust_ref_count(dev, pin_type); cx231xx_set_decoder_video_input() 633 dev_err(dev->dev, cx231xx_set_decoder_video_input() 641 status = cx231xx_afe_set_input_mux(dev, input); cx231xx_set_decoder_video_input() 643 dev_err(dev->dev, cx231xx_set_decoder_video_input() 651 status = vid_blk_read_word(dev, AFE_CTRL, &value); cx231xx_set_decoder_video_input() 659 status = vid_blk_write_word(dev, AFE_CTRL, value); cx231xx_set_decoder_video_input() 661 status = vid_blk_read_word(dev, OUT_CTRL1, &value); cx231xx_set_decoder_video_input() 663 status = vid_blk_write_word(dev, OUT_CTRL1, value); cx231xx_set_decoder_video_input() 666 status = cx231xx_read_modify_write_i2c_dword(dev, cx231xx_set_decoder_video_input() 670 dev->board.output_mode); cx231xx_set_decoder_video_input() 673 status = cx231xx_dif_set_standard(dev, DIF_USE_BASEBAND); cx231xx_set_decoder_video_input() 675 dev_err(dev->dev, cx231xx_set_decoder_video_input() 682 status = vid_blk_read_word(dev, DFE_CTRL1, &value); cx231xx_set_decoder_video_input() 691 status = vid_blk_write_word(dev, DFE_CTRL1, value); cx231xx_set_decoder_video_input() 694 status = cx231xx_read_modify_write_i2c_dword(dev, cx231xx_set_decoder_video_input() 700 status = cx231xx_read_modify_write_i2c_dword(dev, cx231xx_set_decoder_video_input() 708 status = vid_blk_read_word(dev, AFE_CTRL, &value); cx231xx_set_decoder_video_input() 715 status = vid_blk_write_word(dev, AFE_CTRL, value); cx231xx_set_decoder_video_input() 718 status = cx231xx_dif_set_standard(dev, DIF_USE_BASEBAND); cx231xx_set_decoder_video_input() 720 dev_err(dev->dev, cx231xx_set_decoder_video_input() 727 status = vid_blk_read_word(dev, DFE_CTRL1, &value); cx231xx_set_decoder_video_input() 736 status = vid_blk_write_word(dev, DFE_CTRL1, value); cx231xx_set_decoder_video_input() 739 status = cx231xx_read_modify_write_i2c_dword(dev, cx231xx_set_decoder_video_input() 745 status = cx231xx_read_modify_write_i2c_dword(dev, cx231xx_set_decoder_video_input() 752 status = vid_blk_read_word(dev, AFE_CTRL, &value); cx231xx_set_decoder_video_input() 760 status = vid_blk_write_word(dev, AFE_CTRL, value); cx231xx_set_decoder_video_input() 762 status = cx231xx_afe_set_mode(dev, AFE_MODE_BASEBAND); cx231xx_set_decoder_video_input() 768 if (dev->board.tuner_type == TUNER_XC5000) { cx231xx_set_decoder_video_input() 771 status = vid_blk_read_word(dev, AFE_CTRL, &value); cx231xx_set_decoder_video_input() 779 status = vid_blk_write_word(dev, AFE_CTRL, value); cx231xx_set_decoder_video_input() 781 status = vid_blk_read_word(dev, OUT_CTRL1, &value); cx231xx_set_decoder_video_input() 783 status = vid_blk_write_word(dev, OUT_CTRL1, value); cx231xx_set_decoder_video_input() 786 status = cx231xx_read_modify_write_i2c_dword(dev, cx231xx_set_decoder_video_input() 789 dev->board.output_mode); cx231xx_set_decoder_video_input() 792 status = cx231xx_dif_set_standard(dev, cx231xx_set_decoder_video_input() 795 dev_err(dev->dev, cx231xx_set_decoder_video_input() 802 status = vid_blk_read_word(dev, DFE_CTRL1, &value); cx231xx_set_decoder_video_input() 811 status = vid_blk_write_word(dev, DFE_CTRL1, value); cx231xx_set_decoder_video_input() 814 status = cx231xx_read_modify_write_i2c_dword(dev, cx231xx_set_decoder_video_input() 820 status = cx231xx_read_modify_write_i2c_dword(dev, cx231xx_set_decoder_video_input() 829 status = cx231xx_dif_set_standard(dev, dev->norm); cx231xx_set_decoder_video_input() 831 dev_err(dev->dev, cx231xx_set_decoder_video_input() 838 status = vid_blk_read_word(dev, DIF_MISC_CTRL, &value); cx231xx_set_decoder_video_input() 844 status = vid_blk_write_word(dev, DIF_MISC_CTRL, value); cx231xx_set_decoder_video_input() 847 status = vid_blk_read_word(dev, DFE_CTRL1, &value); cx231xx_set_decoder_video_input() 857 status = vid_blk_write_word(dev, DFE_CTRL1, value); cx231xx_set_decoder_video_input() 866 status = vid_blk_write_word(dev, DFE_CTRL1, value); cx231xx_set_decoder_video_input() 869 status = vid_blk_read_word(dev, PIN_CTRL, &value); cx231xx_set_decoder_video_input() 873 status = vid_blk_write_word(dev, PIN_CTRL, value); cx231xx_set_decoder_video_input() 876 status = cx231xx_read_modify_write_i2c_dword(dev, cx231xx_set_decoder_video_input() 879 dev->board.output_mode); cx231xx_set_decoder_video_input() 882 status = cx231xx_read_modify_write_i2c_dword(dev, cx231xx_set_decoder_video_input() 888 status = cx231xx_read_modify_write_i2c_dword(dev, cx231xx_set_decoder_video_input() 899 status = vid_blk_read_word(dev, AFE_CTRL, &value); cx231xx_set_decoder_video_input() 907 status = vid_blk_write_word(dev, AFE_CTRL, value); cx231xx_set_decoder_video_input() 909 if (dev->tuner_type == TUNER_NXP_TDA18271) { cx231xx_set_decoder_video_input() 910 status = vid_blk_read_word(dev, PIN_CTRL, cx231xx_set_decoder_video_input() 912 status = vid_blk_write_word(dev, PIN_CTRL, cx231xx_set_decoder_video_input() 923 status = cx231xx_read_modify_write_i2c_dword(dev, cx231xx_set_decoder_video_input() 928 status = vid_blk_read_word(dev, OUT_CTRL1, &value); cx231xx_set_decoder_video_input() 931 status = vid_blk_write_word(dev, OUT_CTRL1, value); cx231xx_set_decoder_video_input() 937 void cx231xx_enable656(struct cx231xx dev) cx231xx_enable656() argument 942 vid_blk_write_byte(dev, TS1_PIN_CTL0, 0xFF); cx231xx_enable656() 946 vid_blk_read_byte(dev, TS1_PIN_CTL1, &temp); cx231xx_enable656() 949 vid_blk_write_byte(dev, TS1_PIN_CTL1, temp); cx231xx_enable656() 953 void cx231xx_disable656(struct cx231xx dev) cx231xx_disable656() argument 957 vid_blk_write_byte(dev, TS1_PIN_CTL0, 0x00); cx231xx_disable656() 959 vid_blk_read_byte(dev, TS1_PIN_CTL1, &temp); cx231xx_disable656() 962 vid_blk_write_byte(dev, TS1_PIN_CTL1, temp); cx231xx_disable656() 971 int cx231xx_do_mode_ctrl_overrides(struct cx231xx dev) cx231xx_do_mode_ctrl_overrides() argument 975 dev_dbg(dev->dev, "%s: 0x%x\n", cx231xx_do_mode_ctrl_overrides() 976 __func__, (unsigned int)dev->norm); cx231xx_do_mode_ctrl_overrides() 979 status = vid_blk_write_word(dev, DFE_CTRL3, 0xCD3F0280); cx231xx_do_mode_ctrl_overrides() 981 if (dev->norm & (V4L2_STD_NTSC \| V4L2_STD_PAL_M)) { cx231xx_do_mode_ctrl_overrides() 982 dev_dbg(dev->dev, "%s: NTSC\n", __func__); cx231xx_do_mode_ctrl_overrides() 986 status = cx231xx_read_modify_write_i2c_dword(dev, cx231xx_do_mode_ctrl_overrides() 990 status = cx231xx_read_modify_write_i2c_dword(dev, cx231xx_do_mode_ctrl_overrides() 995 status = cx231xx_read_modify_write_i2c_dword(dev, cx231xx_do_mode_ctrl_overrides() 1001 status = cx231xx_read_modify_write_i2c_dword(dev, cx231xx_do_mode_ctrl_overrides() 1008 } else if (dev->norm & V4L2_STD_SECAM) { cx231xx_do_mode_ctrl_overrides() 1009 dev_dbg(dev->dev, "%s: SECAM\n", __func__); cx231xx_do_mode_ctrl_overrides() 1010 status = cx231xx_read_modify_write_i2c_dword(dev, cx231xx_do_mode_ctrl_overrides() 1014 status = cx231xx_read_modify_write_i2c_dword(dev, cx231xx_do_mode_ctrl_overrides() 1021 status = cx231xx_read_modify_write_i2c_dword(dev, cx231xx_do_mode_ctrl_overrides() 1029 status = cx231xx_read_modify_write_i2c_dword(dev, cx231xx_do_mode_ctrl_overrides() 1036 dev_dbg(dev->dev, "%s: PAL\n", __func__); cx231xx_do_mode_ctrl_overrides() 1037 status = cx231xx_read_modify_write_i2c_dword(dev, cx231xx_do_mode_ctrl_overrides() 1041 status = cx231xx_read_modify_write_i2c_dword(dev, cx231xx_do_mode_ctrl_overrides() 1048 status = cx231xx_read_modify_write_i2c_dword(dev, cx231xx_do_mode_ctrl_overrides() 1056 status = cx231xx_read_modify_write_i2c_dword(dev, cx231xx_do_mode_ctrl_overrides() 1068 int cx231xx_unmute_audio(struct cx231xx dev) cx231xx_unmute_audio() argument 1070 return vid_blk_write_byte(dev, PATH1_VOL_CTL, 0x24); cx231xx_unmute_audio() 1074 static int stopAudioFirmware(struct cx231xx dev) stopAudioFirmware() argument 1076 return vid_blk_write_byte(dev, DL_CTL_CONTROL, 0x03); stopAudioFirmware() 1079 static int restartAudioFirmware(struct cx231xx dev) restartAudioFirmware() argument 1081 return vid_blk_write_byte(dev, DL_CTL_CONTROL, 0x13); restartAudioFirmware() 1084 int cx231xx_set_audio_input(struct cx231xx dev, u8 input) cx231xx_set_audio_input() argument 1094 status = cx231xx_i2s_blk_set_audio_input(dev, input); cx231xx_set_audio_input() 1101 status = cx231xx_set_audio_decoder_input(dev, ainput); cx231xx_set_audio_input() 1106 int cx231xx_set_audio_decoder_input(struct cx231xx dev, cx231xx_set_audio_decoder_input() argument 1115 status = vid_blk_read_byte(dev, GENERAL_CTL, &gen_ctrl); cx231xx_set_audio_decoder_input() 1117 status = vid_blk_write_byte(dev, GENERAL_CTL, gen_ctrl); cx231xx_set_audio_decoder_input() 1124 status = vid_blk_write_word(dev, AUD_IO_CTRL, value); cx231xx_set_audio_decoder_input() 1129 status = vid_blk_read_word(dev, AC97_CTL, &dwval); cx231xx_set_audio_decoder_input() 1131 status = vid_blk_write_word(dev, AC97_CTL, cx231xx_set_audio_decoder_input() 1135 status = vid_blk_write_word(dev, BAND_OUT_SEL, cx231xx_set_audio_decoder_input() 1142 status = vid_blk_write_word(dev, DL_CTL, 0x3000001); cx231xx_set_audio_decoder_input() 1143 status = vid_blk_write_word(dev, PATH1_CTL1, 0x00063073); cx231xx_set_audio_decoder_input() 1146 status = vid_blk_read_word(dev, PATH1_VOL_CTL, &dwval); cx231xx_set_audio_decoder_input() 1147 status = vid_blk_write_word(dev, PATH1_VOL_CTL, cx231xx_set_audio_decoder_input() 1151 status = vid_blk_read_word(dev, PATH1_SC_CTL, &dwval); cx231xx_set_audio_decoder_input() 1152 status = vid_blk_write_word(dev, PATH1_SC_CTL, cx231xx_set_audio_decoder_input() 1158 status = stopAudioFirmware(dev); cx231xx_set_audio_decoder_input() 1160 status = vid_blk_write_word(dev, BAND_OUT_SEL, cx231xx_set_audio_decoder_input() 1176 status = vid_blk_write_word(dev, AUD_IO_CTRL, cx231xx_set_audio_decoder_input() 1183 status = vid_blk_write_word(dev, PATH1_CTL1, 0x1F063870); cx231xx_set_audio_decoder_input() 1186 status = vid_blk_write_word(dev, PATH1_CTL1, 0x00063870); cx231xx_set_audio_decoder_input() 1188 status = restartAudioFirmware(dev); cx231xx_set_audio_decoder_input() 1190 switch (dev->board.tuner_type) { cx231xx_set_audio_decoder_input() 1193 status = cx231xx_read_modify_write_i2c_dword(dev, cx231xx_set_audio_decoder_input() 1201 status = cx231xx_read_modify_write_i2c_dword(dev, cx231xx_set_audio_decoder_input() 1211 dev_info(dev->dev, cx231xx_set_audio_decoder_input() 1225 status = vid_blk_write_word(dev, PATH1_CTL1, 0x1F011012); cx231xx_set_audio_decoder_input() 1230 status = vid_blk_read_byte(dev, GENERAL_CTL, &gen_ctrl); cx231xx_set_audio_decoder_input() 1232 status = vid_blk_write_byte(dev, GENERAL_CTL, gen_ctrl); cx231xx_set_audio_decoder_input() 1240 int cx231xx_init_ctrl_pin_status(struct cx231xx dev) cx231xx_init_ctrl_pin_status() argument 1245 status = vid_blk_read_word(dev, PIN_CTRL, &value); cx231xx_init_ctrl_pin_status() 1246 value \|= (~dev->board.ctl_pin_status_mask); cx231xx_init_ctrl_pin_status() 1247 status = vid_blk_write_word(dev, PIN_CTRL, value); cx231xx_init_ctrl_pin_status() 1252 int cx231xx_set_agc_analog_digital_mux_select(struct cx231xx dev, cx231xx_set_agc_analog_digital_mux_select() argument 1258 status = cx231xx_set_gpio_direction(dev, cx231xx_set_agc_analog_digital_mux_select() 1259 dev->board. cx231xx_set_agc_analog_digital_mux_select() 1263 status = cx231xx_set_gpio_value(dev, cx231xx_set_agc_analog_digital_mux_select() 1264 dev->board.agc_analog_digital_select_gpio, cx231xx_set_agc_analog_digital_mux_select() 1270 int cx231xx_enable_i2c_port_3(struct cx231xx dev, bool is_port_3) cx231xx_enable_i2c_port_3() argument 1277 * Should this code check dev->port_3_switch_enabled first cx231xx_enable_i2c_port_3() 1279 * If yes, the flag dev->port_3_switch_enabled must be initialized cx231xx_enable_i2c_port_3() 1283 status = cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, cx231xx_enable_i2c_port_3() 1299 status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, cx231xx_enable_i2c_port_3() 1304 dev->port_3_switch_enabled = is_port_3; cx231xx_enable_i2c_port_3() 1311 void update_HH_register_after_set_DIF(struct cx231xx dev) update_HH_register_after_set_DIF() argument 1317 vid_blk_write_word(dev, PIN_CTRL, 0xA0FFF82F); update_HH_register_after_set_DIF() 1318 vid_blk_write_word(dev, DIF_MISC_CTRL, 0x0A203F11); update_HH_register_after_set_DIF() 1319 vid_blk_write_word(dev, DIF_SRC_PHASE_INC, 0x1BEFBF06); update_HH_register_after_set_DIF() 1321 status = vid_blk_read_word(dev, AFE_CTRL_C2HH_SRC_CTRL, &value); update_HH_register_after_set_DIF() 1322 vid_blk_write_word(dev, AFE_CTRL_C2HH_SRC_CTRL, 0x4485D390); update_HH_register_after_set_DIF() 1323 status = vid_blk_read_word(dev, AFE_CTRL_C2HH_SRC_CTRL, &value); update_HH_register_after_set_DIF() 1327 void cx231xx_dump_HH_reg(struct cx231xx dev) cx231xx_dump_HH_reg() argument 1333 vid_blk_write_word(dev, 0x104, value); cx231xx_dump_HH_reg() 1336 vid_blk_read_word(dev, i, &value); cx231xx_dump_HH_reg() 1337 dev_dbg(dev->dev, "reg0x%x=0x%x\n", i, value); cx231xx_dump_HH_reg() 1342 vid_blk_read_word(dev, i, &value); cx231xx_dump_HH_reg() 1343 dev_dbg(dev->dev, "reg0x%x=0x%x\n", i, value); cx231xx_dump_HH_reg() 1348 vid_blk_read_word(dev, i, &value); cx231xx_dump_HH_reg() 1349 dev_dbg(dev->dev, "reg0x%x=0x%x\n", i, value); cx231xx_dump_HH_reg() 1353 vid_blk_read_word(dev, AFE_CTRL_C2HH_SRC_CTRL, &value); cx231xx_dump_HH_reg() 1354 dev_dbg(dev->dev, "AFE_CTRL_C2HH_SRC_CTRL=0x%x\n", value); cx231xx_dump_HH_reg() 1355 vid_blk_write_word(dev, AFE_CTRL_C2HH_SRC_CTRL, 0x4485D390); cx231xx_dump_HH_reg() 1356 vid_blk_read_word(dev, AFE_CTRL_C2HH_SRC_CTRL, &value); cx231xx_dump_HH_reg() 1357 dev_dbg(dev->dev, "AFE_CTRL_C2HH_SRC_CTRL=0x%x\n", value); cx231xx_dump_HH_reg() 1361 static void cx231xx_dump_SC_reg(struct cx231xx dev) 1364 dev_dbg(dev->dev, "%s!\n", __func__); 1366 cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, BOARD_CFG_STAT, 1368 dev_dbg(dev->dev, 1371 cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, TS_MODE_REG, 1373 dev_dbg(dev->dev, 1376 cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, TS1_CFG_REG, 1378 dev_dbg(dev->dev, 1381 cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, TS1_LENGTH_REG, 1383 dev_dbg(dev->dev, 1387 cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, TS2_CFG_REG, 1389 dev_dbg(dev->dev, 1392 cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, TS2_LENGTH_REG, 1394 dev_dbg(dev->dev, 1397 cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, EP_MODE_SET, 1399 dev_dbg(dev->dev, 1402 cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, CIR_PWR_PTN1, 1404 dev_dbg(dev->dev, 1408 cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, CIR_PWR_PTN2, 1410 dev_dbg(dev->dev, 1413 cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, CIR_PWR_PTN3, 1415 dev_dbg(dev->dev, 1418 cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, CIR_PWR_MASK0, 1420 dev_dbg(dev->dev, 1423 cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, CIR_PWR_MASK1, 1425 dev_dbg(dev->dev, 1429 cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, CIR_PWR_MASK2, 1431 dev_dbg(dev->dev, 1434 cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, CIR_GAIN, 1436 dev_dbg(dev->dev, 1439 cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, CIR_CAR_REG, 1441 dev_dbg(dev->dev, 1444 cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, CIR_OT_CFG1, 1446 dev_dbg(dev->dev, 1450 cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, CIR_OT_CFG2, 1452 dev_dbg(dev->dev, 1455 cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, PWR_CTL_EN, 1457 dev_dbg(dev->dev, 1463 void cx231xx_Setup_AFE_for_LowIF(struct cx231xx dev) cx231xx_Setup_AFE_for_LowIF() argument 1468 afe_read_byte(dev, ADC_STATUS2_CH3, &value); cx231xx_Setup_AFE_for_LowIF() 1470 afe_write_byte(dev, ADC_STATUS2_CH3, value); cx231xx_Setup_AFE_for_LowIF() 1472 afe_read_byte(dev, ADC_STATUS2_CH3, &value); cx231xx_Setup_AFE_for_LowIF() 1474 afe_write_byte(dev, ADC_STATUS2_CH3, value); cx231xx_Setup_AFE_for_LowIF() 1486 afe_read_byte(dev, ADC_NTF_PRECLMP_EN_CH3, &value); cx231xx_Setup_AFE_for_LowIF() 1488 afe_write_byte(dev, ADC_NTF_PRECLMP_EN_CH3, value); cx231xx_Setup_AFE_for_LowIF() 1490 afe_read_byte(dev, ADC_INPUT_CH3, &value); cx231xx_Setup_AFE_for_LowIF() 1492 afe_write_byte(dev, ADC_INPUT_CH3, value); cx231xx_Setup_AFE_for_LowIF() 1494 afe_read_byte(dev, ADC_FB_FRCRST_CH3, &value); cx231xx_Setup_AFE_for_LowIF() 1496 afe_write_byte(dev, ADC_FB_FRCRST_CH3, value); cx231xx_Setup_AFE_for_LowIF() 1498 afe_read_byte(dev, ADC_DCSERVO_DEM_CH3, &value); cx231xx_Setup_AFE_for_LowIF() 1500 afe_write_byte(dev, ADC_DCSERVO_DEM_CH3, value); cx231xx_Setup_AFE_for_LowIF() 1502 afe_read_byte(dev, ADC_CTRL_DAC1_CH3, &value); cx231xx_Setup_AFE_for_LowIF() 1504 afe_write_byte(dev, ADC_CTRL_DAC1_CH3, value); cx231xx_Setup_AFE_for_LowIF() 1506 afe_read_byte(dev, ADC_CTRL_DAC23_CH3, &value); cx231xx_Setup_AFE_for_LowIF() 1508 afe_write_byte(dev, ADC_CTRL_DAC23_CH3, value); cx231xx_Setup_AFE_for_LowIF() 1510 afe_read_byte(dev, ADC_CTRL_DAC23_CH3, &value); cx231xx_Setup_AFE_for_LowIF() 1512 afe_write_byte(dev, ADC_CTRL_DAC23_CH3, value); cx231xx_Setup_AFE_for_LowIF() 1514 afe_read_byte(dev, ADC_PWRDN_CLAMP_CH3, &value); cx231xx_Setup_AFE_for_LowIF() 1516 afe_write_byte(dev, ADC_PWRDN_CLAMP_CH3, value); cx231xx_Setup_AFE_for_LowIF() 1519 void cx231xx_set_Colibri_For_LowIF(struct cx231xx dev, u32 if_freq, cx231xx_set_Colibri_For_LowIF() argument 1527 dev_dbg(dev->dev, "Enter cx231xx_set_Colibri_For_LowIF()\n"); cx231xx_set_Colibri_For_LowIF() 1532 cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, cx231xx_set_Colibri_For_LowIF() 1536 cx231xx_afe_set_mode(dev, AFE_MODE_LOW_IF); cx231xx_set_Colibri_For_LowIF() 1539 standard = dev->norm; cx231xx_set_Colibri_For_LowIF() 1540 cx231xx_dif_configure_C2HH_for_low_IF(dev, dev->active_mode, cx231xx_set_Colibri_For_LowIF() 1547 dev_dbg(dev->dev, "colibri_carrier_offset=%d, standard=0x%x\n", cx231xx_set_Colibri_For_LowIF() 1551 cx231xx_set_DIF_bandpass(dev, (if_freq+colibri_carrier_offset), cx231xx_set_Colibri_For_LowIF() 1573 void cx231xx_set_DIF_bandpass(struct cx231xx dev, u32 if_freq, cx231xx_set_DIF_bandpass() argument 1581 dev_dbg(dev->dev, "if_freq=%d;spectral_invert=0x%x;mode=0x%x\n", cx231xx_set_DIF_bandpass() 1587 vid_blk_write_word(dev, DIF_PLL_FREQ_WORD, pll_freq_word); cx231xx_set_DIF_bandpass() 1596 vid_blk_write_word(dev, DIF_PLL_FREQ_WORD, pll_freq_word); cx231xx_set_DIF_bandpass() 1601 vid_blk_read_word(dev, DIF_MISC_CTRL, cx231xx_set_DIF_bandpass() 1604 vid_blk_write_word(dev, DIF_MISC_CTRL, cx231xx_set_DIF_bandpass() 1609 vid_blk_read_word(dev, DIF_MISC_CTRL, cx231xx_set_DIF_bandpass() 1612 vid_blk_write_word(dev, DIF_MISC_CTRL, cx231xx_set_DIF_bandpass() 1625 dev_dbg(dev->dev, "Enter IF=%zu\n", ARRAY_SIZE(Dif_set_array)); cx231xx_set_DIF_bandpass() 1628 vid_blk_write_word(dev, cx231xx_set_DIF_bandpass() 1637 int cx231xx_dif_configure_C2HH_for_low_IF(struct cx231xx dev, u32 mode, cx231xx_dif_configure_C2HH_for_low_IF() argument 1646 status = cx231xx_reg_mask_write(dev, cx231xx_dif_configure_C2HH_for_low_IF() 1650 status = cx231xx_reg_mask_write(dev, cx231xx_dif_configure_C2HH_for_low_IF() 1654 status = cx231xx_reg_mask_write(dev, cx231xx_dif_configure_C2HH_for_low_IF() 1658 status = cx231xx_reg_mask_write(dev, cx231xx_dif_configure_C2HH_for_low_IF() 1664 status = cx231xx_reg_mask_write(dev, cx231xx_dif_configure_C2HH_for_low_IF() 1668 status = cx231xx_reg_mask_write(dev, cx231xx_dif_configure_C2HH_for_low_IF() 1673 status = cx231xx_reg_mask_write(dev, cx231xx_dif_configure_C2HH_for_low_IF() 1677 status = cx231xx_reg_mask_write(dev, cx231xx_dif_configure_C2HH_for_low_IF() 1681 status = cx231xx_reg_mask_write(dev, cx231xx_dif_configure_C2HH_for_low_IF() 1689 status = cx231xx_reg_mask_write(dev, cx231xx_dif_configure_C2HH_for_low_IF() 1693 status = cx231xx_reg_mask_write(dev, cx231xx_dif_configure_C2HH_for_low_IF() 1698 status = cx231xx_reg_mask_write(dev, cx231xx_dif_configure_C2HH_for_low_IF() 1702 status = cx231xx_reg_mask_write(dev, cx231xx_dif_configure_C2HH_for_low_IF() 1709 status = cx231xx_reg_mask_write(dev, cx231xx_dif_configure_C2HH_for_low_IF() 1713 status = cx231xx_reg_mask_write(dev, cx231xx_dif_configure_C2HH_for_low_IF() 1718 status = cx231xx_reg_mask_write(dev, cx231xx_dif_configure_C2HH_for_low_IF() 1722 status = cx231xx_reg_mask_write(dev, cx231xx_dif_configure_C2HH_for_low_IF() 1731 int cx231xx_dif_set_standard(struct cx231xx dev, u32 standard) cx231xx_dif_set_standard() argument 1737 dev_dbg(dev->dev, "%s: setStandard to %x\n", __func__, standard); cx231xx_dif_set_standard() 1739 status = vid_blk_read_word(dev, DIF_MISC_CTRL, &dif_misc_ctrl_value); cx231xx_dif_set_standard() 1741 dev->norm = standard; cx231xx_dif_set_standard() 1743 switch (dev->model) { cx231xx_dif_set_standard() 1763 status = cx231xx_dif_configure_C2HH_for_low_IF(dev, dev->active_mode, cx231xx_dif_set_standard() 1769 status = vid_blk_write_word(dev, DIF_SRC_PHASE_INC, 0xDF7DF83); cx231xx_dif_set_standard() 1770 status = vid_blk_read_word(dev, DIF_MISC_CTRL, cx231xx_dif_set_standard() 1773 status = vid_blk_write_word(dev, DIF_MISC_CTRL, cx231xx_dif_set_standard() 1776 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, cx231xx_dif_set_standard() 1778 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, cx231xx_dif_set_standard() 1780 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, cx231xx_dif_set_standard() 1782 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, cx231xx_dif_set_standard() 1784 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, cx231xx_dif_set_standard() 1786 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, cx231xx_dif_set_standard() 1788 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, cx231xx_dif_set_standard() 1790 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, cx231xx_dif_set_standard() 1792 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, cx231xx_dif_set_standard() 1795 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, cx231xx_dif_set_standard() 1798 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, cx231xx_dif_set_standard() 1801 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, cx231xx_dif_set_standard() 1804 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, cx231xx_dif_set_standard() 1806 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, cx231xx_dif_set_standard() 1809 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, cx231xx_dif_set_standard() 1812 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, cx231xx_dif_set_standard() 1815 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, cx231xx_dif_set_standard() 1821 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, cx231xx_dif_set_standard() 1823 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, cx231xx_dif_set_standard() 1825 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, cx231xx_dif_set_standard() 1827 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, cx231xx_dif_set_standard() 1829 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, cx231xx_dif_set_standard() 1831 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, cx231xx_dif_set_standard() 1833 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, cx231xx_dif_set_standard() 1835 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, cx231xx_dif_set_standard() 1837 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, cx231xx_dif_set_standard() 1840 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, cx231xx_dif_set_standard() 1843 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, cx231xx_dif_set_standard() 1846 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, cx231xx_dif_set_standard() 1849 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, cx231xx_dif_set_standard() 1851 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, cx231xx_dif_set_standard() 1854 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, cx231xx_dif_set_standard() 1857 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, cx231xx_dif_set_standard() 1860 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, cx231xx_dif_set_standard() 1867 status = vid_blk_write_word(dev, DIF_PLL_CTRL, 0xFF01FF0C); cx231xx_dif_set_standard() 1868 status = vid_blk_write_word(dev, DIF_PLL_CTRL1, 0xbd038c85); cx231xx_dif_set_standard() 1869 status = vid_blk_write_word(dev, DIF_PLL_CTRL2, 0x1db4640a); cx231xx_dif_set_standard() 1870 status = vid_blk_write_word(dev, DIF_PLL_CTRL3, 0x00008800); cx231xx_dif_set_standard() 1871 status = vid_blk_write_word(dev, DIF_AGC_IF_REF, 0x444C1380); cx231xx_dif_set_standard() 1872 status = vid_blk_write_word(dev, DIF_AGC_IF_INT_CURRENT, cx231xx_dif_set_standard() 1874 status = vid_blk_write_word(dev, DIF_AGC_RF_CURRENT, cx231xx_dif_set_standard() 1876 status = vid_blk_write_word(dev, DIF_VIDEO_AGC_CTRL, cx231xx_dif_set_standard() 1878 status = vid_blk_write_word(dev, DIF_VID_AUD_OVERRIDE, cx231xx_dif_set_standard() 1880 status = vid_blk_write_word(dev, DIF_AV_SEP_CTRL, 0x012c405d); cx231xx_dif_set_standard() 1881 status = vid_blk_write_word(dev, DIF_COMP_FLT_CTRL, cx231xx_dif_set_standard() 1883 status = vid_blk_write_word(dev, DIF_SRC_PHASE_INC, cx231xx_dif_set_standard() 1885 status = vid_blk_write_word(dev, DIF_SRC_GAIN_CONTROL, cx231xx_dif_set_standard() 1887 status = vid_blk_write_word(dev, DIF_SOFT_RST_CTRL_REVB, cx231xx_dif_set_standard() 1894 status = vid_blk_write_word(dev, DIF_PLL_CTRL, 0xFF01FF0C); cx231xx_dif_set_standard() 1895 status = vid_blk_write_word(dev, DIF_PLL_CTRL1, 0xbd038c85); cx231xx_dif_set_standard() 1896 status = vid_blk_write_word(dev, DIF_PLL_CTRL2, 0x1db4640a); cx231xx_dif_set_standard() 1897 status = vid_blk_write_word(dev, DIF_PLL_CTRL3, 0x00008800); cx231xx_dif_set_standard() 1898 status = vid_blk_write_word(dev, DIF_AGC_IF_REF, 0x444C1380); cx231xx_dif_set_standard() 1899 status = vid_blk_write_word(dev, DIF_AGC_IF_INT_CURRENT, cx231xx_dif_set_standard() 1901 status = vid_blk_write_word(dev, DIF_AGC_RF_CURRENT, cx231xx_dif_set_standard() 1903 status = vid_blk_write_word(dev, DIF_VIDEO_AGC_CTRL, cx231xx_dif_set_standard() 1905 status = vid_blk_write_word(dev, DIF_VID_AUD_OVERRIDE, cx231xx_dif_set_standard() 1907 status = vid_blk_write_word(dev, DIF_AV_SEP_CTRL, cx231xx_dif_set_standard() 1909 status = vid_blk_write_word(dev, DIF_COMP_FLT_CTRL, cx231xx_dif_set_standard() 1911 status = vid_blk_write_word(dev, DIF_SRC_PHASE_INC, cx231xx_dif_set_standard() 1913 status = vid_blk_write_word(dev, DIF_SRC_GAIN_CONTROL, cx231xx_dif_set_standard() 1915 status = vid_blk_write_word(dev, DIF_SOFT_RST_CTRL_REVB, cx231xx_dif_set_standard() 1924 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, cx231xx_dif_set_standard() 1926 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, cx231xx_dif_set_standard() 1928 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, cx231xx_dif_set_standard() 1930 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, cx231xx_dif_set_standard() 1932 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, cx231xx_dif_set_standard() 1934 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, cx231xx_dif_set_standard() 1936 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, cx231xx_dif_set_standard() 1938 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, cx231xx_dif_set_standard() 1940 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, cx231xx_dif_set_standard() 1943 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, cx231xx_dif_set_standard() 1946 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, cx231xx_dif_set_standard() 1949 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, cx231xx_dif_set_standard() 1951 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, cx231xx_dif_set_standard() 1954 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, cx231xx_dif_set_standard() 1957 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, cx231xx_dif_set_standard() 1960 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, cx231xx_dif_set_standard() 1962 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, cx231xx_dif_set_standard() 1971 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, cx231xx_dif_set_standard() 1973 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, cx231xx_dif_set_standard() 1975 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, cx231xx_dif_set_standard() 1977 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, cx231xx_dif_set_standard() 1979 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, cx231xx_dif_set_standard() 1981 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, cx231xx_dif_set_standard() 1983 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, cx231xx_dif_set_standard() 1985 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, cx231xx_dif_set_standard() 1987 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, cx231xx_dif_set_standard() 1990 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, cx231xx_dif_set_standard() 1993 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, cx231xx_dif_set_standard() 1996 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, cx231xx_dif_set_standard() 1998 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, cx231xx_dif_set_standard() 2001 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, cx231xx_dif_set_standard() 2004 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, cx231xx_dif_set_standard() 2007 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, cx231xx_dif_set_standard() 2009 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, cx231xx_dif_set_standard() 2027 status = vid_blk_write_word(dev, DIF_PLL_CTRL, 0x6503BC0C); cx231xx_dif_set_standard() 2028 status = vid_blk_write_word(dev, DIF_PLL_CTRL1, 0xBD038C85); cx231xx_dif_set_standard() 2029 status = vid_blk_write_word(dev, DIF_PLL_CTRL2, 0x1DB4640A); cx231xx_dif_set_standard() 2030 status = vid_blk_write_word(dev, DIF_PLL_CTRL3, 0x00008800); cx231xx_dif_set_standard() 2031 status = vid_blk_write_word(dev, DIF_AGC_IF_REF, 0x444C0380); cx231xx_dif_set_standard() 2032 status = vid_blk_write_word(dev, DIF_AGC_IF_INT_CURRENT, cx231xx_dif_set_standard() 2034 status = vid_blk_write_word(dev, DIF_AGC_RF_CURRENT, cx231xx_dif_set_standard() 2036 status = vid_blk_write_word(dev, DIF_VIDEO_AGC_CTRL, cx231xx_dif_set_standard() 2038 status = vid_blk_write_word(dev, DIF_VID_AUD_OVERRIDE, cx231xx_dif_set_standard() 2040 status = vid_blk_write_word(dev, DIF_AV_SEP_CTRL, 0x01296e1f); cx231xx_dif_set_standard() 2042 status = vid_blk_write_word(dev, DIF_COMP_FLT_CTRL, cx231xx_dif_set_standard() 2044 status = vid_blk_write_word(dev, DIF_SRC_PHASE_INC, cx231xx_dif_set_standard() 2046 status = vid_blk_write_word(dev, DIF_SRC_GAIN_CONTROL, cx231xx_dif_set_standard() 2049 status = vid_blk_write_word(dev, DIF_AGC_CTRL_IF, 0xC2262600); cx231xx_dif_set_standard() 2050 status = vid_blk_write_word(dev, DIF_AGC_CTRL_INT, cx231xx_dif_set_standard() 2052 status = vid_blk_write_word(dev, DIF_AGC_CTRL_RF, 0xC2262600); cx231xx_dif_set_standard() 2059 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, cx231xx_dif_set_standard() 2061 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, cx231xx_dif_set_standard() 2063 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, cx231xx_dif_set_standard() 2065 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, cx231xx_dif_set_standard() 2067 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, cx231xx_dif_set_standard() 2069 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, cx231xx_dif_set_standard() 2071 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, cx231xx_dif_set_standard() 2073 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, cx231xx_dif_set_standard() 2075 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, cx231xx_dif_set_standard() 2078 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, cx231xx_dif_set_standard() 2081 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, cx231xx_dif_set_standard() 2084 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, cx231xx_dif_set_standard() 2087 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, cx231xx_dif_set_standard() 2089 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, cx231xx_dif_set_standard() 2092 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, cx231xx_dif_set_standard() 2095 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, cx231xx_dif_set_standard() 2098 status = cx231xx_reg_mask_write(dev, VID_BLK_I2C_ADDRESS, 32, cx231xx_dif_set_standard() 2112 if (dev->active_mode == V4L2_TUNER_RADIO) cx231xx_dif_set_standard() 2116 status = vid_blk_write_word(dev, DIF_MISC_CTRL, dif_misc_ctrl_value); cx231xx_dif_set_standard() 2121 int cx231xx_tuner_pre_channel_change(struct cx231xx dev) cx231xx_tuner_pre_channel_change() argument 2127 status = vid_blk_read_word(dev, DIF_AGC_IF_REF, &dwval); cx231xx_tuner_pre_channel_change() 2131 status = vid_blk_write_word(dev, DIF_AGC_IF_REF, dwval); cx231xx_tuner_pre_channel_change() 2136 int cx231xx_tuner_post_channel_change(struct cx231xx dev) cx231xx_tuner_post_channel_change() argument 2140 dev_dbg(dev->dev, "%s: dev->tuner_type =0%d\n", cx231xx_tuner_post_channel_change() 2141 __func__, dev->tuner_type); cx231xx_tuner_post_channel_change() 2144 status = vid_blk_read_word(dev, DIF_AGC_IF_REF, &dwval); cx231xx_tuner_post_channel_change() 2147 if (dev->norm & (V4L2_STD_SECAM_L \| V4L2_STD_SECAM_B \| cx231xx_tuner_post_channel_change() 2149 if (dev->tuner_type == TUNER_NXP_TDA18271) { cx231xx_tuner_post_channel_change() 2155 if (dev->tuner_type == TUNER_NXP_TDA18271) { cx231xx_tuner_post_channel_change() 2162 status = vid_blk_write_word(dev, DIF_AGC_IF_REF, dwval); cx231xx_tuner_post_channel_change() 2170 int cx231xx_i2s_blk_initialize(struct cx231xx dev) cx231xx_i2s_blk_initialize() argument 2175 status = cx231xx_read_i2c_data(dev, I2S_BLK_DEVICE_ADDRESS, cx231xx_i2s_blk_initialize() 2179 status = cx231xx_write_i2c_data(dev, I2S_BLK_DEVICE_ADDRESS, cx231xx_i2s_blk_initialize() 2182 status = cx231xx_write_i2c_data(dev, I2S_BLK_DEVICE_ADDRESS, cx231xx_i2s_blk_initialize() 2188 int cx231xx_i2s_blk_update_power_control(struct cx231xx dev, cx231xx_i2s_blk_update_power_control() argument 2195 status = cx231xx_read_i2c_data(dev, I2S_BLK_DEVICE_ADDRESS, cx231xx_i2s_blk_update_power_control() 2198 status = cx231xx_write_i2c_data(dev, I2S_BLK_DEVICE_ADDRESS, cx231xx_i2s_blk_update_power_control() 2201 status = cx231xx_write_i2c_data(dev, I2S_BLK_DEVICE_ADDRESS, cx231xx_i2s_blk_update_power_control() 2209 int cx231xx_i2s_blk_set_audio_input(struct cx231xx dev, u8 audio_input) cx231xx_i2s_blk_set_audio_input() argument 2215 status = cx231xx_write_i2c_data(dev, I2S_BLK_DEVICE_ADDRESS, cx231xx_i2s_blk_set_audio_input() 2217 status = cx231xx_write_i2c_data(dev, I2S_BLK_DEVICE_ADDRESS, cx231xx_i2s_blk_set_audio_input() 2225 dev->ctl_ainput = audio_input; cx231xx_i2s_blk_set_audio_input() 2233 int cx231xx_set_power_mode(struct cx231xx dev, enum AV_MODE mode) cx231xx_set_power_mode() argument 2239 if (dev->power_mode != mode) cx231xx_set_power_mode() 2240 dev->power_mode = mode; cx231xx_set_power_mode() 2242 dev_dbg(dev->dev, "%s: mode = %d, No Change req.\n", cx231xx_set_power_mode() 2247 status = cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, PWR_CTL_EN, value, cx231xx_set_power_mode() 2264 status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, cx231xx_set_power_mode() 2274 cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, PWR_CTL_EN, cx231xx_set_power_mode() 2283 status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, cx231xx_set_power_mode() 2287 dev->xc_fw_load_done = 0; cx231xx_set_power_mode() 2297 status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, cx231xx_set_power_mode() 2307 status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, cx231xx_set_power_mode() 2318 status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, cx231xx_set_power_mode() 2328 status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, cx231xx_set_power_mode() 2339 status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, cx231xx_set_power_mode() 2344 if (dev->board.tuner_type != TUNER_ABSENT) { cx231xx_set_power_mode() 2346 if (dev->board.tuner_gpio) cx231xx_set_power_mode() 2347 cx231xx_gpio_set(dev, dev->board.tuner_gpio); cx231xx_set_power_mode() 2349 if (dev->cx231xx_reset_analog_tuner) cx231xx_set_power_mode() 2350 dev->cx231xx_reset_analog_tuner(dev); cx231xx_set_power_mode() 2362 status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, cx231xx_set_power_mode() 2372 status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, cx231xx_set_power_mode() 2382 status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, cx231xx_set_power_mode() 2393 status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, cx231xx_set_power_mode() 2403 status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, cx231xx_set_power_mode() 2408 if (dev->board.tuner_type != TUNER_ABSENT) { cx231xx_set_power_mode() 2410 if (dev->board.tuner_gpio) cx231xx_set_power_mode() 2411 cx231xx_gpio_set(dev, dev->board.tuner_gpio); cx231xx_set_power_mode() 2413 if (dev->cx231xx_reset_analog_tuner) cx231xx_set_power_mode() 2414 dev->cx231xx_reset_analog_tuner(dev); cx231xx_set_power_mode() 2432 status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, cx231xx_set_power_mode() 2438 status = cx231xx_afe_update_power_control(dev, mode); cx231xx_set_power_mode() 2441 status = cx231xx_i2s_blk_update_power_control(dev, mode); cx231xx_set_power_mode() 2443 status = cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, PWR_CTL_EN, value, cx231xx_set_power_mode() 2449 int cx231xx_power_suspend(struct cx231xx dev) cx231xx_power_suspend() argument 2455 status = cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, PWR_CTL_EN, cx231xx_power_suspend() 2467 status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, PWR_CTL_EN, cx231xx_power_suspend() 2476 int cx231xx_start_stream(struct cx231xx dev, u32 ep_mask) cx231xx_start_stream() argument 2482 dev_dbg(dev->dev, "%s: ep_mask = %x\n", __func__, ep_mask); cx231xx_start_stream() 2483 status = cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, EP_MODE_SET, cx231xx_start_stream() 2495 status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, EP_MODE_SET, cx231xx_start_stream() 2501 int cx231xx_stop_stream(struct cx231xx dev, u32 ep_mask) cx231xx_stop_stream() argument 2507 dev_dbg(dev->dev, "%s: ep_mask = %x\n", __func__, ep_mask); cx231xx_stop_stream() 2509 cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, EP_MODE_SET, value, 4); cx231xx_stop_stream() 2520 status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, EP_MODE_SET, cx231xx_stop_stream() 2526 int cx231xx_initialize_stream_xfer(struct cx231xx dev, u32 media_type) cx231xx_initialize_stream_xfer() argument 2532 if (dev->udev->speed == USB_SPEED_HIGH) { cx231xx_initialize_stream_xfer() 2535 dev_dbg(dev->dev, cx231xx_initialize_stream_xfer() 2538 cx231xx_mode_register(dev, TS_MODE_REG, 0x9300); cx231xx_initialize_stream_xfer() 2542 dev_dbg(dev->dev, cx231xx_initialize_stream_xfer() 2544 status = cx231xx_mode_register(dev, TS_MODE_REG, 0x300); cx231xx_initialize_stream_xfer() 2548 dev_dbg(dev->dev, cx231xx_initialize_stream_xfer() 2551 cx231xx_mode_register(dev, TS_MODE_REG, 0x1300); cx231xx_initialize_stream_xfer() 2555 dev_dbg(dev->dev, cx231xx_initialize_stream_xfer() 2557 status = cx231xx_mode_register(dev, TS_MODE_REG, 0x100); cx231xx_initialize_stream_xfer() 2561 dev_dbg(dev->dev, cx231xx_initialize_stream_xfer() 2564 if (dev->board.has_417) { cx231xx_initialize_stream_xfer() 2565 dev_dbg(dev->dev, cx231xx_initialize_stream_xfer() 2570 status = cx231xx_mode_register(dev, cx231xx_initialize_stream_xfer() 2577 status = cx231xx_write_ctrl_reg(dev, cx231xx_initialize_stream_xfer() 2585 status = cx231xx_write_ctrl_reg(dev, cx231xx_initialize_stream_xfer() 2589 dev_dbg(dev->dev, "%s: BDA\n", __func__); cx231xx_initialize_stream_xfer() 2590 status = cx231xx_mode_register(dev, cx231xx_initialize_stream_xfer() 2592 status = cx231xx_mode_register(dev, cx231xx_initialize_stream_xfer() 2598 dev_dbg(dev->dev, cx231xx_initialize_stream_xfer() 2601 status = cx231xx_mode_register(dev, TS_MODE_REG, 0x100); cx231xx_initialize_stream_xfer() 2602 status = cx231xx_mode_register(dev, TS1_CFG_REG, 0x400); cx231xx_initialize_stream_xfer() 2606 status = cx231xx_mode_register(dev, TS_MODE_REG, 0x101); cx231xx_initialize_stream_xfer() 2612 int cx231xx_capture_start(struct cx231xx dev, int start, u8 media_type) cx231xx_capture_start() argument 2619 pcb_config = (struct pcb_config )&dev->current_pcb_config; cx231xx_capture_start() 2646 rc = cx231xx_initialize_stream_xfer(dev, media_type); cx231xx_capture_start() 2653 rc = cx231xx_start_stream(dev, ep_mask); cx231xx_capture_start() 2657 rc = cx231xx_stop_stream(dev, ep_mask); cx231xx_capture_start() 2667 static int cx231xx_set_gpio_bit(struct cx231xx dev, u32 gpio_bit, u32 gpio_val) cx231xx_set_gpio_bit() argument 2672 status = cx231xx_send_gpio_cmd(dev, gpio_bit, (u8 )&gpio_val, 4, 0, 0); cx231xx_set_gpio_bit() 2677 static int cx231xx_get_gpio_bit(struct cx231xx dev, u32 gpio_bit, u32 gpio_val) cx231xx_get_gpio_bit() argument 2682 status = cx231xx_send_gpio_cmd(dev, gpio_bit, (u8 )&tmp, 4, 0, 1); cx231xx_get_gpio_bit() 2699 int cx231xx_set_gpio_direction(struct cx231xx dev, cx231xx_set_gpio_direction() argument 2711 value = dev->gpio_dir & (~(1 << pin_number)); /* clear / cx231xx_set_gpio_direction() 2713 value = dev->gpio_dir \| (1 << pin_number); cx231xx_set_gpio_direction() 2715 status = cx231xx_set_gpio_bit(dev, value, dev->gpio_val); cx231xx_set_gpio_direction() 2718 dev->gpio_dir = value; cx231xx_set_gpio_direction() 2734 int cx231xx_set_gpio_value(struct cx231xx dev, int pin_number, int pin_value) cx231xx_set_gpio_value() argument 2744 if ((dev->gpio_dir & (1 << pin_number)) == 0x00) { cx231xx_set_gpio_value() 2746 value = dev->gpio_dir \| (1 << pin_number); cx231xx_set_gpio_value() 2747 dev->gpio_dir = value; cx231xx_set_gpio_value() 2748 status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, cx231xx_set_gpio_value() 2749 dev->gpio_val); cx231xx_set_gpio_value() 2754 value = dev->gpio_val & (~(1 << pin_number)); cx231xx_set_gpio_value() 2756 value = dev->gpio_val \| (1 << pin_number); cx231xx_set_gpio_value() 2759 dev->gpio_val = value; cx231xx_set_gpio_value() 2762 status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, dev->gpio_val); cx231xx_set_gpio_value() 2770 int cx231xx_gpio_i2c_start(struct cx231xx dev) cx231xx_gpio_i2c_start() argument 2775 dev->gpio_dir \|= 1 << dev->board.tuner_scl_gpio; cx231xx_gpio_i2c_start() 2776 dev->gpio_dir \|= 1 << dev->board.tuner_sda_gpio; cx231xx_gpio_i2c_start() 2777 dev->gpio_val \|= 1 << dev->board.tuner_scl_gpio; cx231xx_gpio_i2c_start() 2778 dev->gpio_val \|= 1 << dev->board.tuner_sda_gpio; cx231xx_gpio_i2c_start() 2780 status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, dev->gpio_val); cx231xx_gpio_i2c_start() 2785 dev->gpio_val \|= 1 << dev->board.tuner_scl_gpio; cx231xx_gpio_i2c_start() 2786 dev->gpio_val &= ~(1 << dev->board.tuner_sda_gpio); cx231xx_gpio_i2c_start() 2788 status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, dev->gpio_val); cx231xx_gpio_i2c_start() 2793 dev->gpio_val &= ~(1 << dev->board.tuner_scl_gpio); cx231xx_gpio_i2c_start() 2794 dev->gpio_val &= ~(1 << dev->board.tuner_sda_gpio); cx231xx_gpio_i2c_start() 2796 status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, dev->gpio_val); cx231xx_gpio_i2c_start() 2803 int cx231xx_gpio_i2c_end(struct cx231xx dev) cx231xx_gpio_i2c_end() argument 2808 dev->gpio_dir \|= 1 << dev->board.tuner_scl_gpio; cx231xx_gpio_i2c_end() 2809 dev->gpio_dir \|= 1 << dev->board.tuner_sda_gpio; cx231xx_gpio_i2c_end() 2811 dev->gpio_val &= ~(1 << dev->board.tuner_scl_gpio); cx231xx_gpio_i2c_end() 2812 dev->gpio_val &= ~(1 << dev->board.tuner_sda_gpio); cx231xx_gpio_i2c_end() 2814 status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, dev->gpio_val); cx231xx_gpio_i2c_end() 2819 dev->gpio_val \|= 1 << dev->board.tuner_scl_gpio; cx231xx_gpio_i2c_end() 2820 dev->gpio_val &= ~(1 << dev->board.tuner_sda_gpio); cx231xx_gpio_i2c_end() 2822 status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, dev->gpio_val); cx231xx_gpio_i2c_end() 2828 dev->gpio_dir &= ~(1 << dev->board.tuner_scl_gpio); cx231xx_gpio_i2c_end() 2829 dev->gpio_dir &= ~(1 << dev->board.tuner_sda_gpio); cx231xx_gpio_i2c_end() 2832 cx231xx_set_gpio_bit(dev, dev->gpio_dir, dev->gpio_val); cx231xx_gpio_i2c_end() 2839 int cx231xx_gpio_i2c_write_byte(struct cx231xx dev, u8 data) cx231xx_gpio_i2c_write_byte() argument 2845 dev->gpio_dir \|= 1 << dev->board.tuner_scl_gpio; cx231xx_gpio_i2c_write_byte() 2846 dev->gpio_dir \|= 1 << dev->board.tuner_sda_gpio; cx231xx_gpio_i2c_write_byte() 2851 dev->gpio_val &= ~(1 << dev->board.tuner_scl_gpio); cx231xx_gpio_i2c_write_byte() 2852 dev->gpio_val &= ~(1 << dev->board.tuner_sda_gpio); cx231xx_gpio_i2c_write_byte() 2853 status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, cx231xx_gpio_i2c_write_byte() 2854 dev->gpio_val); cx231xx_gpio_i2c_write_byte() 2857 dev->gpio_val \|= 1 << dev->board.tuner_scl_gpio; cx231xx_gpio_i2c_write_byte() 2858 status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, cx231xx_gpio_i2c_write_byte() 2859 dev->gpio_val); cx231xx_gpio_i2c_write_byte() 2862 dev->gpio_val &= ~(1 << dev->board.tuner_scl_gpio); cx231xx_gpio_i2c_write_byte() 2863 status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, cx231xx_gpio_i2c_write_byte() 2864 dev->gpio_val); cx231xx_gpio_i2c_write_byte() 2867 dev->gpio_val &= ~(1 << dev->board.tuner_scl_gpio); cx231xx_gpio_i2c_write_byte() 2868 dev->gpio_val \|= 1 << dev->board.tuner_sda_gpio; cx231xx_gpio_i2c_write_byte() 2869 status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, cx231xx_gpio_i2c_write_byte() 2870 dev->gpio_val); cx231xx_gpio_i2c_write_byte() 2873 dev->gpio_val \|= 1 << dev->board.tuner_scl_gpio; cx231xx_gpio_i2c_write_byte() 2874 status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, cx231xx_gpio_i2c_write_byte() 2875 dev->gpio_val); cx231xx_gpio_i2c_write_byte() 2878 dev->gpio_val &= ~(1 << dev->board.tuner_scl_gpio); cx231xx_gpio_i2c_write_byte() 2879 status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, cx231xx_gpio_i2c_write_byte() 2880 dev->gpio_val); cx231xx_gpio_i2c_write_byte() 2886 int cx231xx_gpio_i2c_read_byte(struct cx231xx dev, u8 buf) cx231xx_gpio_i2c_read_byte() argument 2897 dev->gpio_val &= ~(1 << dev->board.tuner_scl_gpio); cx231xx_gpio_i2c_read_byte() 2898 status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, cx231xx_gpio_i2c_read_byte() 2899 dev->gpio_val); cx231xx_gpio_i2c_read_byte() 2902 dev->gpio_val \|= 1 << dev->board.tuner_scl_gpio; cx231xx_gpio_i2c_read_byte() 2903 status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, cx231xx_gpio_i2c_read_byte() 2904 dev->gpio_val); cx231xx_gpio_i2c_read_byte() 2907 gpio_logic_value = dev->gpio_val; cx231xx_gpio_i2c_read_byte() 2908 status = cx231xx_get_gpio_bit(dev, dev->gpio_dir, cx231xx_gpio_i2c_read_byte() 2909 &dev->gpio_val); cx231xx_gpio_i2c_read_byte() 2910 if ((dev->gpio_val & (1 << dev->board.tuner_sda_gpio)) != 0) cx231xx_gpio_i2c_read_byte() 2913 dev->gpio_val = gpio_logic_value; cx231xx_gpio_i2c_read_byte() 2919 dev->gpio_val &= ~(1 << dev->board.tuner_scl_gpio); cx231xx_gpio_i2c_read_byte() 2920 status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, dev->gpio_val); cx231xx_gpio_i2c_read_byte() 2928 int cx231xx_gpio_i2c_read_ack(struct cx231xx dev) cx231xx_gpio_i2c_read_ack() argument 2937 dev->gpio_dir &= ~(1 << dev->board.tuner_sda_gpio); cx231xx_gpio_i2c_read_ack() 2938 dev->gpio_dir &= ~(1 << dev->board.tuner_scl_gpio); cx231xx_gpio_i2c_read_ack() 2940 gpio_logic_value = dev->gpio_val; cx231xx_gpio_i2c_read_ack() 2941 status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, dev->gpio_val); cx231xx_gpio_i2c_read_ack() 2945 status = cx231xx_get_gpio_bit(dev, dev->gpio_dir, cx231xx_gpio_i2c_read_ack() 2946 &dev->gpio_val); cx231xx_gpio_i2c_read_ack() 2948 } while (((dev->gpio_val & cx231xx_gpio_i2c_read_ack() 2949 (1 << dev->board.tuner_scl_gpio)) == 0) && cx231xx_gpio_i2c_read_ack() 2953 dev_dbg(dev->dev, cx231xx_gpio_i2c_read_ack() 2962 status = cx231xx_get_gpio_bit(dev, dev->gpio_dir, &dev->gpio_val); cx231xx_gpio_i2c_read_ack() 2964 if ((dev->gpio_val & 1 << dev->board.tuner_sda_gpio) == 0) { cx231xx_gpio_i2c_read_ack() 2965 dev->gpio_val = gpio_logic_value; cx231xx_gpio_i2c_read_ack() 2966 dev->gpio_val &= ~(1 << dev->board.tuner_sda_gpio); cx231xx_gpio_i2c_read_ack() 2969 dev->gpio_val = gpio_logic_value; cx231xx_gpio_i2c_read_ack() 2970 dev->gpio_val \|= (1 << dev->board.tuner_sda_gpio); cx231xx_gpio_i2c_read_ack() 2975 dev->gpio_val = gpio_logic_value; cx231xx_gpio_i2c_read_ack() 2976 dev->gpio_dir \|= (1 << dev->board.tuner_scl_gpio); cx231xx_gpio_i2c_read_ack() 2977 dev->gpio_val &= ~(1 << dev->board.tuner_scl_gpio); cx231xx_gpio_i2c_read_ack() 2978 status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, dev->gpio_val); cx231xx_gpio_i2c_read_ack() 2983 int cx231xx_gpio_i2c_write_ack(struct cx231xx dev) cx231xx_gpio_i2c_write_ack() argument 2988 dev->gpio_dir \|= 1 << dev->board.tuner_sda_gpio; cx231xx_gpio_i2c_write_ack() 2989 status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, dev->gpio_val); cx231xx_gpio_i2c_write_ack() 2992 dev->gpio_val &= ~(1 << dev->board.tuner_sda_gpio); cx231xx_gpio_i2c_write_ack() 2993 dev->gpio_val &= ~(1 << dev->board.tuner_scl_gpio); cx231xx_gpio_i2c_write_ack() 2994 status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, dev->gpio_val); cx231xx_gpio_i2c_write_ack() 2997 dev->gpio_val \|= 1 << dev->board.tuner_scl_gpio; cx231xx_gpio_i2c_write_ack() 2998 status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, dev->gpio_val); cx231xx_gpio_i2c_write_ack() 3001 dev->gpio_val &= ~(1 << dev->board.tuner_scl_gpio); cx231xx_gpio_i2c_write_ack() 3002 status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, dev->gpio_val); cx231xx_gpio_i2c_write_ack() 3005 dev->gpio_dir &= ~(1 << dev->board.tuner_sda_gpio); cx231xx_gpio_i2c_write_ack() 3006 status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, dev->gpio_val); cx231xx_gpio_i2c_write_ack() 3011 int cx231xx_gpio_i2c_write_nak(struct cx231xx dev) cx231xx_gpio_i2c_write_nak() argument 3016 dev->gpio_dir \|= 1 << dev->board.tuner_scl_gpio; cx231xx_gpio_i2c_write_nak() 3017 dev->gpio_dir &= ~(1 << dev->board.tuner_sda_gpio); cx231xx_gpio_i2c_write_nak() 3018 status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, dev->gpio_val); cx231xx_gpio_i2c_write_nak() 3021 dev->gpio_val &= ~(1 << dev->board.tuner_scl_gpio); cx231xx_gpio_i2c_write_nak() 3022 status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, dev->gpio_val); cx231xx_gpio_i2c_write_nak() 3025 dev->gpio_val \|= 1 << dev->board.tuner_scl_gpio; cx231xx_gpio_i2c_write_nak() 3026 status = cx231xx_set_gpio_bit(dev, dev->gpio_dir, dev->gpio_val); cx231xx_gpio_i2c_write_nak() 3037 int cx231xx_gpio_i2c_read(struct cx231xx dev, u8 dev_addr, u8 buf, u8 len) cx231xx_gpio_i2c_read() argument 3043 mutex_lock(&dev->gpio_i2c_lock); cx231xx_gpio_i2c_read() 3046 status = cx231xx_gpio_i2c_start(dev); cx231xx_gpio_i2c_read() 3049 status = cx231xx_gpio_i2c_write_byte(dev, (dev_addr << 1) + 1); cx231xx_gpio_i2c_read() 3052 status = cx231xx_gpio_i2c_read_ack(dev); cx231xx_gpio_i2c_read() 3058 status = cx231xx_gpio_i2c_read_byte(dev, &buf[i]); cx231xx_gpio_i2c_read() 3062 status = cx231xx_gpio_i2c_write_ack(dev); cx231xx_gpio_i2c_read() 3067 status = cx231xx_gpio_i2c_write_nak(dev); cx231xx_gpio_i2c_read() 3070 status = cx231xx_gpio_i2c_end(dev); cx231xx_gpio_i2c_read() 3073 mutex_unlock(&dev->gpio_i2c_lock); cx231xx_gpio_i2c_read() 3081 int cx231xx_gpio_i2c_write(struct cx231xx dev, u8 dev_addr, u8 buf, u8 len) cx231xx_gpio_i2c_write() argument 3086 mutex_lock(&dev->gpio_i2c_lock); cx231xx_gpio_i2c_write() 3089 cx231xx_gpio_i2c_start(dev); cx231xx_gpio_i2c_write() 3092 cx231xx_gpio_i2c_write_byte(dev, dev_addr << 1); cx231xx_gpio_i2c_write() 3095 cx231xx_gpio_i2c_read_ack(dev); cx231xx_gpio_i2c_write() 3099 cx231xx_gpio_i2c_write_byte(dev, buf[i]); cx231xx_gpio_i2c_write() 3102 cx231xx_gpio_i2c_read_ack(dev); cx231xx_gpio_i2c_write() 3106 cx231xx_gpio_i2c_end(dev); cx231xx_gpio_i2c_write() 3109 mutex_unlock(&dev->gpio_i2c_lock); cx231xx_gpio_i2c_write()
H A D	cx231xx-cards.c	895 struct cx231xx dev = ptr; cx231xx_tuner_callback() local 897 if (dev->tuner_type == TUNER_XC5000) { cx231xx_tuner_callback() 899 dev_dbg(dev->dev, cx231xx_tuner_callback() 901 command, dev->tuner_type); cx231xx_tuner_callback() 902 cx231xx_set_gpio_value(dev, dev->board.tuner_gpio->bit, cx231xx_tuner_callback() 905 cx231xx_set_gpio_value(dev, dev->board.tuner_gpio->bit, cx231xx_tuner_callback() 908 cx231xx_set_gpio_value(dev, dev->board.tuner_gpio->bit, cx231xx_tuner_callback() 912 } else if (dev->tuner_type == TUNER_NXP_TDA18271) { cx231xx_tuner_callback() 915 if (dev->model == CX231XX_BOARD_PV_PLAYTV_USB_HYBRID) cx231xx_tuner_callback() 916 rc = cx231xx_set_agc_analog_digital_mux_select(dev, arg); cx231xx_tuner_callback() 927 static void cx231xx_reset_out(struct cx231xx dev) cx231xx_reset_out() argument 929 cx231xx_set_gpio_value(dev, CX23417_RESET, 1); cx231xx_reset_out() 931 cx231xx_set_gpio_value(dev, CX23417_RESET, 0); cx231xx_reset_out() 933 cx231xx_set_gpio_value(dev, CX23417_RESET, 1); cx231xx_reset_out() 936 static void cx231xx_enable_OSC(struct cx231xx dev) cx231xx_enable_OSC() argument 938 cx231xx_set_gpio_value(dev, CX23417_OSC_EN, 1); cx231xx_enable_OSC() 941 static void cx231xx_sleep_s5h1432(struct cx231xx dev) cx231xx_sleep_s5h1432() argument 943 cx231xx_set_gpio_value(dev, SLEEP_S5H1432, 0); cx231xx_sleep_s5h1432() 946 static inline void cx231xx_set_model(struct cx231xx dev) cx231xx_set_model() argument 948 dev->board = cx231xx_boards[dev->model]; cx231xx_set_model() 951 / Since cx231xx_pre_card_setup() requires a proper dev->model, 954 void cx231xx_pre_card_setup(struct cx231xx dev) cx231xx_pre_card_setup() argument 956 dev_info(dev->dev, "Identified as %s (card=%d)\n", cx231xx_pre_card_setup() 957 dev->board.name, dev->model); cx231xx_pre_card_setup() 960 if (dev->board.tuner_gpio) { cx231xx_pre_card_setup() 961 cx231xx_set_gpio_direction(dev, dev->board.tuner_gpio->bit, 1); cx231xx_pre_card_setup() 962 cx231xx_set_gpio_value(dev, dev->board.tuner_gpio->bit, 1); cx231xx_pre_card_setup() 964 if (dev->board.tuner_sif_gpio >= 0) cx231xx_pre_card_setup() 965 cx231xx_set_gpio_direction(dev, dev->board.tuner_sif_gpio, 1); cx231xx_pre_card_setup() 970 cx231xx_set_mode(dev, CX231XX_ANALOG_MODE); cx231xx_pre_card_setup() 973 / cx231xx_set_mode(dev, CX231XX_SUSPEND); / cx231xx_pre_card_setup() 977 static void cx231xx_config_tuner(struct cx231xx dev) cx231xx_config_tuner() argument 982 if (dev->tuner_type == TUNER_ABSENT) cx231xx_config_tuner() 986 tun_setup.type = dev->tuner_type; cx231xx_config_tuner() 987 tun_setup.addr = dev->tuner_addr; cx231xx_config_tuner() 990 tuner_call(dev, tuner, s_type_addr, &tun_setup); cx231xx_config_tuner() 1000 .tuner = dev->tuner_type, cx231xx_config_tuner() 1003 tuner_call(dev, tuner, s_config, &cfg); cx231xx_config_tuner() 1010 dev->ctl_freq = f.frequency; cx231xx_config_tuner() 1011 call_all(dev, tuner, s_frequency, &f); cx231xx_config_tuner() 1015 static int read_eeprom(struct cx231xx dev, struct i2c_client client, read_eeprom() argument 1030 dev_err(dev->dev, "Can't read eeprom\n"); read_eeprom() 1040 dev_err(dev->dev, "Can't read eeprom\n"); read_eeprom() 1048 dev_dbg(dev->dev, "i2c eeprom %02x: %ph\n", read_eeprom() 1054 void cx231xx_card_setup(struct cx231xx dev) cx231xx_card_setup() argument 1057 cx231xx_set_model(dev); cx231xx_card_setup() 1059 dev->tuner_type = cx231xx_boards[dev->model].tuner_type; cx231xx_card_setup() 1060 if (cx231xx_boards[dev->model].tuner_addr) cx231xx_card_setup() 1061 dev->tuner_addr = cx231xx_boards[dev->model].tuner_addr; cx231xx_card_setup() 1064 if (dev->board.decoder == CX231XX_AVDECODER) { cx231xx_card_setup() 1065 dev->sd_cx25840 = v4l2_i2c_new_subdev(&dev->v4l2_dev, cx231xx_card_setup() 1066 cx231xx_get_i2c_adap(dev, I2C_0), cx231xx_card_setup() 1068 if (dev->sd_cx25840 == NULL) cx231xx_card_setup() 1069 dev_err(dev->dev, cx231xx_card_setup() 1071 cx25840_call(dev, core, load_fw); cx231xx_card_setup() 1076 if (dev->board.tuner_type != TUNER_ABSENT) { cx231xx_card_setup() 1077 struct i2c_adapter tuner_i2c = cx231xx_get_i2c_adap(dev, cx231xx_card_setup() 1078 dev->board.tuner_i2c_master); cx231xx_card_setup() 1079 dev->sd_tuner = v4l2_i2c_new_subdev(&dev->v4l2_dev, cx231xx_card_setup() 1082 dev->tuner_addr, NULL); cx231xx_card_setup() 1083 if (dev->sd_tuner == NULL) cx231xx_card_setup() 1084 dev_err(dev->dev, cx231xx_card_setup() 1087 cx231xx_config_tuner(dev); cx231xx_card_setup() 1090 switch (dev->model) { cx231xx_card_setup() 1100 client.adapter = cx231xx_get_i2c_adap(dev, I2C_1_MUX_1); cx231xx_card_setup() 1103 read_eeprom(dev, &client, eeprom, sizeof(eeprom)); cx231xx_card_setup() 1116 int cx231xx_config(struct cx231xx dev) cx231xx_config() argument 1127 void cx231xx_config_i2c(struct cx231xx dev) cx231xx_config_i2c() argument 1129 / u32 input = INPUT(dev->video_input)->vmux; / cx231xx_config_i2c() 1131 call_all(dev, video, s_stream, 1); cx231xx_config_i2c() 1134 static void cx231xx_unregister_media_device(struct cx231xx dev) cx231xx_unregister_media_device() argument 1137 if (dev->media_dev) { cx231xx_unregister_media_device() 1138 media_device_unregister(dev->media_dev); cx231xx_unregister_media_device() 1139 kfree(dev->media_dev); cx231xx_unregister_media_device() 1140 dev->media_dev = NULL; cx231xx_unregister_media_device() 1150 void cx231xx_release_resources(struct cx231xx dev) cx231xx_release_resources() argument 1152 cx231xx_unregister_media_device(dev); cx231xx_release_resources() 1154 cx231xx_release_analog_resources(dev); cx231xx_release_resources() 1156 cx231xx_remove_from_devlist(dev); cx231xx_release_resources() 1158 cx231xx_ir_exit(dev); cx231xx_release_resources() 1161 cx231xx_dev_uninit(dev); cx231xx_release_resources() 1164 v4l2_device_unregister(&dev->v4l2_dev); cx231xx_release_resources() 1166 usb_put_dev(dev->udev); cx231xx_release_resources() 1169 clear_bit(dev->devno, &cx231xx_devused); cx231xx_release_resources() 1172 static void cx231xx_media_device_register(struct cx231xx dev, cx231xx_media_device_register() argument 1183 mdev->dev = dev->dev; cx231xx_media_device_register() 1184 strlcpy(mdev->model, dev->board.name, sizeof(mdev->model)); cx231xx_media_device_register() 1193 dev_err(dev->dev, cx231xx_media_device_register() 1200 dev->media_dev = mdev; cx231xx_media_device_register() 1204 static void cx231xx_create_media_graph(struct cx231xx dev) cx231xx_create_media_graph() argument 1207 struct media_device mdev = dev->media_dev; cx231xx_create_media_graph() 1233 media_entity_create_link(decoder, 1, &dev->vdev.entity, 0, 1235 media_entity_create_link(decoder, 2, &dev->vbi_dev.entity, 0, 1244 static int cx231xx_init_dev(struct cx231xx dev, struct usb_device udev, cx231xx_init_dev() argument 1250 dev->udev = udev; cx231xx_init_dev() 1251 mutex_init(&dev->lock); cx231xx_init_dev() 1252 mutex_init(&dev->ctrl_urb_lock); cx231xx_init_dev() 1253 mutex_init(&dev->gpio_i2c_lock); cx231xx_init_dev() 1254 mutex_init(&dev->i2c_lock); cx231xx_init_dev() 1256 spin_lock_init(&dev->video_mode.slock); cx231xx_init_dev() 1257 spin_lock_init(&dev->vbi_mode.slock); cx231xx_init_dev() 1258 spin_lock_init(&dev->sliced_cc_mode.slock); cx231xx_init_dev() 1260 init_waitqueue_head(&dev->open); cx231xx_init_dev() 1261 init_waitqueue_head(&dev->wait_frame); cx231xx_init_dev() 1262 init_waitqueue_head(&dev->wait_stream); cx231xx_init_dev() 1264 dev->cx231xx_read_ctrl_reg = cx231xx_read_ctrl_reg; cx231xx_init_dev() 1265 dev->cx231xx_write_ctrl_reg = cx231xx_write_ctrl_reg; cx231xx_init_dev() 1266 dev->cx231xx_send_usb_command = cx231xx_send_usb_command; cx231xx_init_dev() 1267 dev->cx231xx_gpio_i2c_read = cx231xx_gpio_i2c_read; cx231xx_init_dev() 1268 dev->cx231xx_gpio_i2c_write = cx231xx_gpio_i2c_write; cx231xx_init_dev() 1271 retval = initialize_cx231xx(dev); cx231xx_init_dev() 1273 dev_err(dev->dev, "Failed to read PCB config\n"); cx231xx_init_dev() 1279 if (dev->model == CX231XX_BOARD_CNXT_VIDEO_GRABBER \|\| cx231xx_init_dev() 1280 dev->model == CX231XX_BOARD_HAUPPAUGE_USBLIVE2) { cx231xx_init_dev() 1281 cx231xx_set_alt_setting(dev, INDEX_VIDEO, 3); cx231xx_init_dev() 1282 cx231xx_set_alt_setting(dev, INDEX_VANC, 1); cx231xx_init_dev() 1285 cx231xx_pre_card_setup(dev); cx231xx_init_dev() 1287 retval = cx231xx_config(dev); cx231xx_init_dev() 1289 dev_err(dev->dev, "error configuring device\n"); cx231xx_init_dev() 1294 dev->norm = dev->board.norm; cx231xx_init_dev() 1297 retval = cx231xx_dev_init(dev); cx231xx_init_dev() 1299 dev_err(dev->dev, cx231xx_init_dev() 1306 cx231xx_card_setup(dev); cx231xx_init_dev() 1309 cx231xx_config_i2c(dev); cx231xx_init_dev() 1311 maxw = norm_maxw(dev); cx231xx_init_dev() 1312 maxh = norm_maxh(dev); cx231xx_init_dev() 1315 dev->width = maxw; cx231xx_init_dev() 1316 dev->height = maxh; cx231xx_init_dev() 1317 dev->interlaced = 0; cx231xx_init_dev() 1318 dev->video_input = 0; cx231xx_init_dev() 1320 retval = cx231xx_config(dev); cx231xx_init_dev() 1322 dev_err(dev->dev, "%s: cx231xx_config - errCode [%d]!\n", cx231xx_init_dev() 1328 INIT_LIST_HEAD(&dev->video_mode.vidq.active); cx231xx_init_dev() 1329 INIT_LIST_HEAD(&dev->video_mode.vidq.queued); cx231xx_init_dev() 1332 INIT_LIST_HEAD(&dev->vbi_mode.vidq.active); cx231xx_init_dev() 1333 INIT_LIST_HEAD(&dev->vbi_mode.vidq.queued); cx231xx_init_dev() 1336 cx231xx_add_into_devlist(dev); cx231xx_init_dev() 1338 if (dev->board.has_417) { cx231xx_init_dev() 1339 dev_info(dev->dev, "attach 417 %d\n", dev->model); cx231xx_init_dev() 1340 if (cx231xx_417_register(dev) < 0) { cx231xx_init_dev() 1341 dev_err(dev->dev, cx231xx_init_dev() 1347 retval = cx231xx_register_analog_devices(dev); cx231xx_init_dev() 1351 cx231xx_ir_init(dev); cx231xx_init_dev() 1353 cx231xx_init_extension(dev); cx231xx_init_dev() 1357 cx231xx_unregister_media_device(dev); cx231xx_init_dev() 1358 cx231xx_release_analog_resources(dev); cx231xx_init_dev() 1359 cx231xx_remove_from_devlist(dev); cx231xx_init_dev() 1361 cx231xx_dev_uninit(dev); cx231xx_init_dev() 1368 struct cx231xx dev = container_of(work, request_module_async() local 1371 if (dev->has_alsa_audio) request_module_async() 1374 if (dev->board.has_dvb) request_module_async() 1379 static void request_modules(struct cx231xx dev) request_modules() argument 1381 INIT_WORK(&dev->request_module_wk, request_module_async); request_modules() 1382 schedule_work(&dev->request_module_wk); request_modules() 1385 static void flush_request_modules(struct cx231xx dev) flush_request_modules() argument 1387 flush_work(&dev->request_module_wk); flush_request_modules() 1390 #define request_modules(dev) 1391 #define flush_request_modules(dev) 1394 static int cx231xx_init_v4l2(struct cx231xx dev, cx231xx_init_v4l2() argument 1405 idx = dev->current_pcb_config.hs_config_info[0].interface_info.video_index + 1; cx231xx_init_v4l2() 1406 if (idx >= dev->max_iad_interface_count) { cx231xx_init_v4l2() 1407 dev_err(dev->dev, cx231xx_init_v4l2() 1414 dev->video_mode.end_point_addr = uif->altsetting[0].endpoint[isoc_pipe].desc.bEndpointAddress; cx231xx_init_v4l2() 1415 dev->video_mode.num_alt = uif->num_altsetting; cx231xx_init_v4l2() 1417 dev_info(dev->dev, cx231xx_init_v4l2() 1419 dev->video_mode.end_point_addr, cx231xx_init_v4l2() 1420 dev->video_mode.num_alt); cx231xx_init_v4l2() 1422 dev->video_mode.alt_max_pkt_size = devm_kmalloc_array(&udev->dev, 32, dev->video_mode.num_alt, GFP_KERNEL); cx231xx_init_v4l2() 1423 if (dev->video_mode.alt_max_pkt_size == NULL) cx231xx_init_v4l2() 1426 for (i = 0; i < dev->video_mode.num_alt; i++) { cx231xx_init_v4l2() 1428 dev->video_mode.alt_max_pkt_size[i] = (tmp & 0x07ff) * (((tmp & 0x1800) >> 11) + 1); cx231xx_init_v4l2() 1429 dev_dbg(dev->dev, cx231xx_init_v4l2() 1431 dev->video_mode.alt_max_pkt_size[i]); cx231xx_init_v4l2() 1436 idx = dev->current_pcb_config.hs_config_info[0].interface_info.vanc_index + 1; cx231xx_init_v4l2() 1437 if (idx >= dev->max_iad_interface_count) { cx231xx_init_v4l2() 1438 dev_err(dev->dev, cx231xx_init_v4l2() 1444 dev->vbi_mode.end_point_addr = cx231xx_init_v4l2() 1448 dev->vbi_mode.num_alt = uif->num_altsetting; cx231xx_init_v4l2() 1449 dev_info(dev->dev, cx231xx_init_v4l2() 1451 dev->vbi_mode.end_point_addr, cx231xx_init_v4l2() 1452 dev->vbi_mode.num_alt); cx231xx_init_v4l2() 1455 dev->vbi_mode.alt_max_pkt_size = devm_kmalloc_array(&udev->dev, 32, dev->vbi_mode.num_alt, GFP_KERNEL); cx231xx_init_v4l2() 1456 if (dev->vbi_mode.alt_max_pkt_size == NULL) cx231xx_init_v4l2() 1459 for (i = 0; i < dev->vbi_mode.num_alt; i++) { cx231xx_init_v4l2() 1463 dev->vbi_mode.alt_max_pkt_size[i] = cx231xx_init_v4l2() 1465 dev_dbg(dev->dev, cx231xx_init_v4l2() 1467 dev->vbi_mode.alt_max_pkt_size[i]); cx231xx_init_v4l2() 1473 idx = dev->current_pcb_config.hs_config_info[0].interface_info.hanc_index + 1; cx231xx_init_v4l2() 1474 if (idx >= dev->max_iad_interface_count) { cx231xx_init_v4l2() 1475 dev_err(dev->dev, cx231xx_init_v4l2() 1481 dev->sliced_cc_mode.end_point_addr = cx231xx_init_v4l2() 1485 dev->sliced_cc_mode.num_alt = uif->num_altsetting; cx231xx_init_v4l2() 1486 dev_info(dev->dev, cx231xx_init_v4l2() 1488 dev->sliced_cc_mode.end_point_addr, cx231xx_init_v4l2() 1489 dev->sliced_cc_mode.num_alt); cx231xx_init_v4l2() 1490 dev->sliced_cc_mode.alt_max_pkt_size = devm_kmalloc_array(&udev->dev, 32, dev->sliced_cc_mode.num_alt, GFP_KERNEL); cx231xx_init_v4l2() 1491 if (dev->sliced_cc_mode.alt_max_pkt_size == NULL) cx231xx_init_v4l2() 1494 for (i = 0; i < dev->sliced_cc_mode.num_alt; i++) { cx231xx_init_v4l2() 1497 dev->sliced_cc_mode.alt_max_pkt_size[i] = cx231xx_init_v4l2() 1499 dev_dbg(dev->dev, cx231xx_init_v4l2() 1501 dev->sliced_cc_mode.alt_max_pkt_size[i]); cx231xx_init_v4l2() 1515 struct device d = &interface->dev; cx231xx_usb_probe() 1517 struct cx231xx dev = NULL; cx231xx_usb_probe() local 1549 dev = devm_kzalloc(&udev->dev, sizeof(dev), GFP_KERNEL); cx231xx_usb_probe() 1550 if (dev == NULL) { cx231xx_usb_probe() 1555 snprintf(dev->name, 29, "cx231xx #%d", nr); cx231xx_usb_probe() 1556 dev->devno = nr; cx231xx_usb_probe() 1557 dev->model = id->driver_info; cx231xx_usb_probe() 1558 dev->video_mode.alt = -1; cx231xx_usb_probe() 1559 dev->dev = d; cx231xx_usb_probe() 1561 cx231xx_set_model(dev); cx231xx_usb_probe() 1563 dev->interface_count++; cx231xx_usb_probe() 1565 dev->gpio_dir = 0; cx231xx_usb_probe() 1566 dev->gpio_val = 0; cx231xx_usb_probe() 1567 dev->xc_fw_load_done = 0; cx231xx_usb_probe() 1568 dev->has_alsa_audio = 1; cx231xx_usb_probe() 1569 dev->power_mode = -1; cx231xx_usb_probe() 1570 atomic_set(&dev->devlist_count, 0); cx231xx_usb_probe() 1573 dev->vbi_or_sliced_cc_mode = 0; cx231xx_usb_probe() 1576 dev->max_iad_interface_count = udev->config->desc.bNumInterfaces; cx231xx_usb_probe() 1581 dev->mode_tv = 0; cx231xx_usb_probe() 1583 dev->USE_ISO = transfer_mode; cx231xx_usb_probe() 1607 dev->max_iad_interface_count); cx231xx_usb_probe() 1610 dev->interface_count++; cx231xx_usb_probe() 1613 nr = dev->devno; cx231xx_usb_probe() 1625 usb_set_intfdata(interface, dev); cx231xx_usb_probe() 1628 cx231xx_media_device_register(dev, udev); cx231xx_usb_probe() 1632 dev->v4l2_dev.mdev = dev->media_dev; cx231xx_usb_probe() 1634 retval = v4l2_device_register(&interface->dev, &dev->v4l2_dev); cx231xx_usb_probe() 1641 retval = cx231xx_init_dev(dev, udev, nr); cx231xx_usb_probe() 1645 retval = cx231xx_init_v4l2(dev, udev, interface, isoc_pipe); cx231xx_usb_probe() 1649 if (dev->current_pcb_config.ts1_source != 0xff) { cx231xx_usb_probe() 1651 idx = dev->current_pcb_config.hs_config_info[0].interface_info.ts1_index + 1; cx231xx_usb_probe() 1652 if (idx >= dev->max_iad_interface_count) { cx231xx_usb_probe() 1660 dev->ts1_mode.end_point_addr = cx231xx_usb_probe() 1664 dev->ts1_mode.num_alt = uif->num_altsetting; cx231xx_usb_probe() 1667 dev->ts1_mode.end_point_addr, cx231xx_usb_probe() 1668 dev->ts1_mode.num_alt); cx231xx_usb_probe() 1670 dev->ts1_mode.alt_max_pkt_size = devm_kmalloc_array(&udev->dev, 32, dev->ts1_mode.num_alt, GFP_KERNEL); cx231xx_usb_probe() 1671 if (dev->ts1_mode.alt_max_pkt_size == NULL) { cx231xx_usb_probe() 1676 for (i = 0; i < dev->ts1_mode.num_alt; i++) { cx231xx_usb_probe() 1680 dev->ts1_mode.alt_max_pkt_size[i] = cx231xx_usb_probe() 1683 i, dev->ts1_mode.alt_max_pkt_size[i]); cx231xx_usb_probe() 1687 if (dev->model == CX231XX_BOARD_CNXT_VIDEO_GRABBER) { cx231xx_usb_probe() 1688 cx231xx_enable_OSC(dev); cx231xx_usb_probe() 1689 cx231xx_reset_out(dev); cx231xx_usb_probe() 1690 cx231xx_set_alt_setting(dev, INDEX_VIDEO, 3); cx231xx_usb_probe() 1693 if (dev->model == CX231XX_BOARD_CNXT_RDE_253S) cx231xx_usb_probe() 1694 cx231xx_sleep_s5h1432(dev); cx231xx_usb_probe() 1697 request_modules(dev); cx231xx_usb_probe() 1699 cx231xx_create_media_graph(dev); cx231xx_usb_probe() 1704 cx231xx_close_extension(dev); cx231xx_usb_probe() 1705 cx231xx_ir_exit(dev); cx231xx_usb_probe() 1706 cx231xx_release_analog_resources(dev); cx231xx_usb_probe() 1707 cx231xx_417_unregister(dev); cx231xx_usb_probe() 1708 cx231xx_remove_from_devlist(dev); cx231xx_usb_probe() 1709 cx231xx_dev_uninit(dev); cx231xx_usb_probe() 1711 v4l2_device_unregister(&dev->v4l2_dev); cx231xx_usb_probe() 1727 struct cx231xx dev; cx231xx_usb_disconnect() local 1729 dev = usb_get_intfdata(interface); cx231xx_usb_disconnect() 1732 if (!dev) cx231xx_usb_disconnect() 1735 if (!dev->udev) cx231xx_usb_disconnect() 1738 dev->state \|= DEV_DISCONNECTED; cx231xx_usb_disconnect() 1740 flush_request_modules(dev); cx231xx_usb_disconnect() 1744 mutex_lock(&dev->lock); cx231xx_usb_disconnect() 1746 wake_up_interruptible_all(&dev->open); cx231xx_usb_disconnect() 1748 if (dev->users) { cx231xx_usb_disconnect() 1749 dev_warn(dev->dev, cx231xx_usb_disconnect() 1751 video_device_node_name(&dev->vdev)); cx231xx_usb_disconnect() 1754 cx231xx_ir_exit(dev); cx231xx_usb_disconnect() 1756 if (dev->USE_ISO) cx231xx_usb_disconnect() 1757 cx231xx_uninit_isoc(dev); cx231xx_usb_disconnect() 1759 cx231xx_uninit_bulk(dev); cx231xx_usb_disconnect() 1760 wake_up_interruptible(&dev->wait_frame); cx231xx_usb_disconnect() 1761 wake_up_interruptible(&dev->wait_stream); cx231xx_usb_disconnect() 1765 cx231xx_close_extension(dev); cx231xx_usb_disconnect() 1767 mutex_unlock(&dev->lock); cx231xx_usb_disconnect() 1769 if (!dev->users) cx231xx_usb_disconnect() 1770 cx231xx_release_resources(dev); cx231xx_usb_disconnect()
H A D	cx231xx-core.c	43 dev->name, __func__ , ##arg); } while (0) 56 dev->name, __func__ , ##arg); } while (0) 70 void cx231xx_remove_from_devlist(struct cx231xx dev) cx231xx_remove_from_devlist() argument 72 if (dev == NULL) cx231xx_remove_from_devlist() 74 if (dev->udev == NULL) cx231xx_remove_from_devlist() 77 if (atomic_read(&dev->devlist_count) > 0) { cx231xx_remove_from_devlist() 79 list_del(&dev->devlist); cx231xx_remove_from_devlist() 80 atomic_dec(&dev->devlist_count); cx231xx_remove_from_devlist() 85 void cx231xx_add_into_devlist(struct cx231xx dev) cx231xx_add_into_devlist() argument 88 list_add_tail(&dev->devlist, &cx231xx_devlist); cx231xx_add_into_devlist() 89 atomic_inc(&dev->devlist_count); cx231xx_add_into_devlist() 97 struct cx231xx dev = NULL; cx231xx_register_extension() local 101 list_for_each_entry(dev, &cx231xx_devlist, devlist) { cx231xx_register_extension() 102 ops->init(dev); cx231xx_register_extension() 103 dev_info(dev->dev, "%s initialized\n", ops->name); cx231xx_register_extension() 112 struct cx231xx dev = NULL; cx231xx_unregister_extension() local 115 list_for_each_entry(dev, &cx231xx_devlist, devlist) { cx231xx_unregister_extension() 116 ops->fini(dev); cx231xx_unregister_extension() 117 dev_info(dev->dev, "%s removed\n", ops->name); cx231xx_unregister_extension() 125 void cx231xx_init_extension(struct cx231xx dev) cx231xx_init_extension() argument 133 ops->init(dev); cx231xx_init_extension() 139 void cx231xx_close_extension(struct cx231xx dev) cx231xx_close_extension() argument 147 ops->fini(dev); cx231xx_close_extension() 160 struct cx231xx dev = i2c_bus->dev; cx231xx_send_usb_command() local 168 if (dev->state & DEV_DISCONNECTED) cx231xx_send_usb_command() 221 status = cx231xx_send_vendor_cmd(dev, &ven_req); cx231xx_send_usb_command() 222 if (status < 0 && !dev->i2c_scan_running) { cx231xx_send_usb_command() 223 dev_err(dev->dev, "%s: failed with status -%d\n", cx231xx_send_usb_command() 233 for all operations (dev->urb_buf), to avoid using stacked buffers, as 237 static int __usb_control_msg(struct cx231xx dev, unsigned int pipe, __usb_control_msg() argument 246 dev->name, __usb_control_msg() 263 mutex_lock(&dev->ctrl_urb_lock); __usb_control_msg() 265 memcpy(dev->urb_buf, data, size); __usb_control_msg() 266 rc = usb_control_msg(dev->udev, pipe, request, requesttype, value, __usb_control_msg() 267 index, dev->urb_buf, size, timeout); __usb_control_msg() 269 memcpy(data, dev->urb_buf, size); __usb_control_msg() 270 mutex_unlock(&dev->ctrl_urb_lock); __usb_control_msg() 295 int cx231xx_read_ctrl_reg(struct cx231xx dev, u8 req, u16 reg, cx231xx_read_ctrl_reg() argument 300 int pipe = usb_rcvctrlpipe(dev->udev, 0); cx231xx_read_ctrl_reg() 302 if (dev->state & DEV_DISCONNECTED) cx231xx_read_ctrl_reg() 328 ret = __usb_control_msg(dev, pipe, req, cx231xx_read_ctrl_reg() 334 int cx231xx_send_vendor_cmd(struct cx231xx dev, cx231xx_send_vendor_cmd() argument 342 if (dev->state & DEV_DISCONNECTED) cx231xx_send_vendor_cmd() 349 pipe = usb_rcvctrlpipe(dev->udev, 0); cx231xx_send_vendor_cmd() 351 pipe = usb_sndctrlpipe(dev->udev, 0); cx231xx_send_vendor_cmd() 369 ret = __usb_control_msg(dev, pipe, ven_req->bRequest, cx231xx_send_vendor_cmd() 379 ret = __usb_control_msg(dev, pipe, cx231xx_send_vendor_cmd() 390 ret = __usb_control_msg(dev, pipe, ven_req->bRequest, cx231xx_send_vendor_cmd() 395 ret = __usb_control_msg(dev, pipe, ven_req->bRequest, cx231xx_send_vendor_cmd() 408 int cx231xx_write_ctrl_reg(struct cx231xx dev, u8 req, u16 reg, char buf, cx231xx_write_ctrl_reg() argument 413 int pipe = usb_sndctrlpipe(dev->udev, 0); cx231xx_write_ctrl_reg() 415 if (dev->state & DEV_DISCONNECTED) cx231xx_write_ctrl_reg() 456 ret = __usb_control_msg(dev, pipe, req, cx231xx_write_ctrl_reg() 467 int cx231xx_set_video_alternate(struct cx231xx dev) cx231xx_set_video_alternate() argument 469 int errCode, prev_alt = dev->video_mode.alt; cx231xx_set_video_alternate() 470 unsigned int min_pkt_size = dev->width * 2 + 4; cx231xx_set_video_alternate() 477 if (dev->width * 2 * dev->height > 720 * 240 * 2) cx231xx_set_video_alternate() 480 if (dev->width > 360) { cx231xx_set_video_alternate() 482 dev->video_mode.alt = 3; cx231xx_set_video_alternate() 483 } else if (dev->width > 180) { cx231xx_set_video_alternate() 485 dev->video_mode.alt = 2; cx231xx_set_video_alternate() 486 } else if (dev->width > 0) { cx231xx_set_video_alternate() 488 dev->video_mode.alt = 1; cx231xx_set_video_alternate() 491 dev->video_mode.alt = 0; cx231xx_set_video_alternate() 494 if (dev->USE_ISO == 0) cx231xx_set_video_alternate() 495 dev->video_mode.alt = 0; cx231xx_set_video_alternate() 497 cx231xx_coredbg("dev->video_mode.alt= %d\n", dev->video_mode.alt); cx231xx_set_video_alternate() 501 dev->current_pcb_config.hs_config_info[0].interface_info. cx231xx_set_video_alternate() 504 if (dev->video_mode.alt != prev_alt) { cx231xx_set_video_alternate() 506 min_pkt_size, dev->video_mode.alt); cx231xx_set_video_alternate() 508 if (dev->video_mode.alt_max_pkt_size != NULL) cx231xx_set_video_alternate() 509 dev->video_mode.max_pkt_size = cx231xx_set_video_alternate() 510 dev->video_mode.alt_max_pkt_size[dev->video_mode.alt]; cx231xx_set_video_alternate() 512 dev->video_mode.alt, cx231xx_set_video_alternate() 513 dev->video_mode.max_pkt_size); cx231xx_set_video_alternate() 515 usb_set_interface(dev->udev, usb_interface_index, cx231xx_set_video_alternate() 516 dev->video_mode.alt); cx231xx_set_video_alternate() 518 dev_err(dev->dev, cx231xx_set_video_alternate() 520 dev->video_mode.alt, errCode); cx231xx_set_video_alternate() 527 int cx231xx_set_alt_setting(struct cx231xx dev, u8 index, u8 alt) cx231xx_set_alt_setting() argument 536 dev->current_pcb_config.hs_config_info[0].interface_info. cx231xx_set_alt_setting() 538 dev->ts1_mode.alt = alt; cx231xx_set_alt_setting() 539 if (dev->ts1_mode.alt_max_pkt_size != NULL) cx231xx_set_alt_setting() 540 max_pkt_size = dev->ts1_mode.max_pkt_size = cx231xx_set_alt_setting() 541 dev->ts1_mode.alt_max_pkt_size[dev->ts1_mode.alt]; cx231xx_set_alt_setting() 545 dev->current_pcb_config.hs_config_info[0].interface_info. cx231xx_set_alt_setting() 550 dev->current_pcb_config.hs_config_info[0].interface_info. cx231xx_set_alt_setting() 552 dev->adev.alt = alt; cx231xx_set_alt_setting() 553 if (dev->adev.alt_max_pkt_size != NULL) cx231xx_set_alt_setting() 554 max_pkt_size = dev->adev.max_pkt_size = cx231xx_set_alt_setting() 555 dev->adev.alt_max_pkt_size[dev->adev.alt]; cx231xx_set_alt_setting() 559 dev->current_pcb_config.hs_config_info[0].interface_info. cx231xx_set_alt_setting() 561 dev->video_mode.alt = alt; cx231xx_set_alt_setting() 562 if (dev->video_mode.alt_max_pkt_size != NULL) cx231xx_set_alt_setting() 563 max_pkt_size = dev->video_mode.max_pkt_size = cx231xx_set_alt_setting() 564 dev->video_mode.alt_max_pkt_size[dev->video_mode. cx231xx_set_alt_setting() 568 if (dev->board.no_alt_vanc) cx231xx_set_alt_setting() 571 dev->current_pcb_config.hs_config_info[0].interface_info. cx231xx_set_alt_setting() 573 dev->vbi_mode.alt = alt; cx231xx_set_alt_setting() 574 if (dev->vbi_mode.alt_max_pkt_size != NULL) cx231xx_set_alt_setting() 575 max_pkt_size = dev->vbi_mode.max_pkt_size = cx231xx_set_alt_setting() 576 dev->vbi_mode.alt_max_pkt_size[dev->vbi_mode.alt]; cx231xx_set_alt_setting() 580 dev->current_pcb_config.hs_config_info[0].interface_info. cx231xx_set_alt_setting() 582 dev->sliced_cc_mode.alt = alt; cx231xx_set_alt_setting() 583 if (dev->sliced_cc_mode.alt_max_pkt_size != NULL) cx231xx_set_alt_setting() 584 max_pkt_size = dev->sliced_cc_mode.max_pkt_size = cx231xx_set_alt_setting() 585 dev->sliced_cc_mode.alt_max_pkt_size[dev-> cx231xx_set_alt_setting() 594 dev_err(dev->dev, cx231xx_set_alt_setting() 599 if (dev->board.no_alt_vanc) cx231xx_set_alt_setting() 608 status = usb_set_interface(dev->udev, usb_interface_index, alt); cx231xx_set_alt_setting() 610 dev_err(dev->dev, cx231xx_set_alt_setting() 621 int cx231xx_gpio_set(struct cx231xx dev, struct cx231xx_reg_seq gpio) cx231xx_gpio_set() argument 630 rc = cx231xx_set_gpio_value(dev, gpio->bit, gpio->val); cx231xx_gpio_set() 642 int cx231xx_demod_reset(struct cx231xx dev) cx231xx_demod_reset() argument 648 status = cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, PWR_CTL_EN, cx231xx_demod_reset() 657 status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, cx231xx_demod_reset() 662 status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, cx231xx_demod_reset() 667 status = cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, cx231xx_demod_reset() 673 status = cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, PWR_CTL_EN, cx231xx_demod_reset() 682 int is_fw_load(struct cx231xx dev) is_fw_load() argument 684 return cx231xx_check_fw(dev); is_fw_load() 688 int cx231xx_set_mode(struct cx231xx dev, enum cx231xx_mode set_mode) cx231xx_set_mode() argument 692 if (dev->mode == set_mode) cx231xx_set_mode() 697 dev->mode = set_mode; cx231xx_set_mode() 701 if (dev->mode != CX231XX_SUSPEND) cx231xx_set_mode() 704 dev->mode = set_mode; cx231xx_set_mode() 706 if (dev->mode == CX231XX_DIGITAL_MODE)/* Set Digital power mode / { cx231xx_set_mode() 708 switch (dev->model) { cx231xx_set_mode() 713 errCode = cx231xx_set_agc_analog_digital_mux_select(dev, 0); cx231xx_set_mode() 717 errCode = cx231xx_set_agc_analog_digital_mux_select(dev, 1); cx231xx_set_mode() 721 errCode = cx231xx_set_power_mode(dev, cx231xx_set_mode() 729 switch (dev->model) { cx231xx_set_mode() 734 errCode = cx231xx_set_agc_analog_digital_mux_select(dev, 1); cx231xx_set_mode() 743 errCode = cx231xx_set_agc_analog_digital_mux_select(dev, 0); cx231xx_set_mode() 754 int cx231xx_ep5_bulkout(struct cx231xx dev, u8 firmware, u16 size) cx231xx_ep5_bulkout() argument 765 ret = usb_bulk_msg(dev->udev, usb_sndbulkpipe(dev->udev, 5), cx231xx_ep5_bulkout() 769 dev_err(dev->dev, cx231xx_ep5_bulkout() 791 struct cx231xx dev = container_of(vmode, struct cx231xx, video_mode); cx231xx_isoc_irq_callback() local 808 spin_lock(&dev->video_mode.slock); cx231xx_isoc_irq_callback() 809 dev->video_mode.isoc_ctl.isoc_copy(dev, urb); cx231xx_isoc_irq_callback() 810 spin_unlock(&dev->video_mode.slock); cx231xx_isoc_irq_callback() 836 struct cx231xx dev = container_of(vmode, struct cx231xx, video_mode); cx231xx_bulk_irq_callback() local 852 spin_lock(&dev->video_mode.slock); cx231xx_bulk_irq_callback() 853 dev->video_mode.bulk_ctl.bulk_copy(dev, urb); cx231xx_bulk_irq_callback() 854 spin_unlock(&dev->video_mode.slock); cx231xx_bulk_irq_callback() 866 void cx231xx_uninit_isoc(struct cx231xx dev) cx231xx_uninit_isoc() argument 868 struct cx231xx_dmaqueue dma_q = &dev->video_mode.vidq; cx231xx_uninit_isoc() 874 dev->video_mode.isoc_ctl.nfields = -1; cx231xx_uninit_isoc() 875 for (i = 0; i < dev->video_mode.isoc_ctl.num_bufs; i++) { cx231xx_uninit_isoc() 876 urb = dev->video_mode.isoc_ctl.urb[i]; cx231xx_uninit_isoc() 883 if (dev->video_mode.isoc_ctl.transfer_buffer[i]) { cx231xx_uninit_isoc() 884 usb_free_coherent(dev->udev, cx231xx_uninit_isoc() 886 dev->video_mode.isoc_ctl. cx231xx_uninit_isoc() 891 dev->video_mode.isoc_ctl.urb[i] = NULL; cx231xx_uninit_isoc() 893 dev->video_mode.isoc_ctl.transfer_buffer[i] = NULL; cx231xx_uninit_isoc() 896 kfree(dev->video_mode.isoc_ctl.urb); cx231xx_uninit_isoc() 897 kfree(dev->video_mode.isoc_ctl.transfer_buffer); cx231xx_uninit_isoc() 900 dev->video_mode.isoc_ctl.urb = NULL; cx231xx_uninit_isoc() 901 dev->video_mode.isoc_ctl.transfer_buffer = NULL; cx231xx_uninit_isoc() 902 dev->video_mode.isoc_ctl.num_bufs = 0; cx231xx_uninit_isoc() 905 if (dev->mode_tv == 0) cx231xx_uninit_isoc() 906 cx231xx_capture_start(dev, 0, Raw_Video); cx231xx_uninit_isoc() 908 cx231xx_capture_start(dev, 0, TS1_serial_mode); cx231xx_uninit_isoc() 917 void cx231xx_uninit_bulk(struct cx231xx dev) cx231xx_uninit_bulk() argument 924 dev->video_mode.bulk_ctl.nfields = -1; cx231xx_uninit_bulk() 925 for (i = 0; i < dev->video_mode.bulk_ctl.num_bufs; i++) { cx231xx_uninit_bulk() 926 urb = dev->video_mode.bulk_ctl.urb[i]; cx231xx_uninit_bulk() 933 if (dev->video_mode.bulk_ctl.transfer_buffer[i]) { cx231xx_uninit_bulk() 934 usb_free_coherent(dev->udev, cx231xx_uninit_bulk() 936 dev->video_mode.isoc_ctl. cx231xx_uninit_bulk() 941 dev->video_mode.bulk_ctl.urb[i] = NULL; cx231xx_uninit_bulk() 943 dev->video_mode.bulk_ctl.transfer_buffer[i] = NULL; cx231xx_uninit_bulk() 946 kfree(dev->video_mode.bulk_ctl.urb); cx231xx_uninit_bulk() 947 kfree(dev->video_mode.bulk_ctl.transfer_buffer); cx231xx_uninit_bulk() 949 dev->video_mode.bulk_ctl.urb = NULL; cx231xx_uninit_bulk() 950 dev->video_mode.bulk_ctl.transfer_buffer = NULL; cx231xx_uninit_bulk() 951 dev->video_mode.bulk_ctl.num_bufs = 0; cx231xx_uninit_bulk() 953 if (dev->mode_tv == 0) cx231xx_uninit_bulk() 954 cx231xx_capture_start(dev, 0, Raw_Video); cx231xx_uninit_bulk() 956 cx231xx_capture_start(dev, 0, TS1_serial_mode); cx231xx_uninit_bulk() 965 int cx231xx_init_isoc(struct cx231xx dev, int max_packets, cx231xx_init_isoc() argument 967 int (isoc_copy) (struct cx231xx dev, struct urb urb)) cx231xx_init_isoc() 969 struct cx231xx_dmaqueue dma_q = &dev->video_mode.vidq; cx231xx_init_isoc() 977 cx231xx_uninit_isoc(dev); cx231xx_init_isoc() 983 dev->video_mode.isoc_ctl.isoc_copy = isoc_copy; cx231xx_init_isoc() 984 dev->video_mode.isoc_ctl.num_bufs = num_bufs; cx231xx_init_isoc() 990 dma_q->lines_per_field = dev->height / 2; cx231xx_init_isoc() 991 dma_q->bytes_left_in_line = dev->width << 1; cx231xx_init_isoc() 1004 dev->video_mode.isoc_ctl.urb = cx231xx_init_isoc() 1006 if (!dev->video_mode.isoc_ctl.urb) { cx231xx_init_isoc() 1007 dev_err(dev->dev, cx231xx_init_isoc() 1012 dev->video_mode.isoc_ctl.transfer_buffer = cx231xx_init_isoc() 1014 if (!dev->video_mode.isoc_ctl.transfer_buffer) { cx231xx_init_isoc() 1015 dev_err(dev->dev, cx231xx_init_isoc() 1017 kfree(dev->video_mode.isoc_ctl.urb); cx231xx_init_isoc() 1021 dev->video_mode.isoc_ctl.max_pkt_size = max_pkt_size; cx231xx_init_isoc() 1022 dev->video_mode.isoc_ctl.buf = NULL; cx231xx_init_isoc() 1024 sb_size = max_packets dev->video_mode.isoc_ctl.max_pkt_size; cx231xx_init_isoc() 1026 if (dev->mode_tv == 1) cx231xx_init_isoc() 1027 dev->video_mode.end_point_addr = 0x81; cx231xx_init_isoc() 1029 dev->video_mode.end_point_addr = 0x84; cx231xx_init_isoc() 1033 for (i = 0; i < dev->video_mode.isoc_ctl.num_bufs; i++) { cx231xx_init_isoc() 1036 dev_err(dev->dev, cx231xx_init_isoc() 1038 cx231xx_uninit_isoc(dev); cx231xx_init_isoc() 1041 dev->video_mode.isoc_ctl.urb[i] = urb; cx231xx_init_isoc() 1043 dev->video_mode.isoc_ctl.transfer_buffer[i] = cx231xx_init_isoc() 1044 usb_alloc_coherent(dev->udev, sb_size, GFP_KERNEL, cx231xx_init_isoc() 1046 if (!dev->video_mode.isoc_ctl.transfer_buffer[i]) { cx231xx_init_isoc() 1047 dev_err(dev->dev, cx231xx_init_isoc() 1051 cx231xx_uninit_isoc(dev); cx231xx_init_isoc() 1054 memset(dev->video_mode.isoc_ctl.transfer_buffer[i], 0, sb_size); cx231xx_init_isoc() 1057 usb_rcvisocpipe(dev->udev, dev->video_mode.end_point_addr); cx231xx_init_isoc() 1059 usb_fill_int_urb(urb, dev->udev, pipe, cx231xx_init_isoc() 1060 dev->video_mode.isoc_ctl.transfer_buffer[i], cx231xx_init_isoc() 1070 dev->video_mode.isoc_ctl.max_pkt_size; cx231xx_init_isoc() 1071 k += dev->video_mode.isoc_ctl.max_pkt_size; cx231xx_init_isoc() 1078 for (i = 0; i < dev->video_mode.isoc_ctl.num_bufs; i++) { cx231xx_init_isoc() 1079 rc = usb_submit_urb(dev->video_mode.isoc_ctl.urb[i], cx231xx_init_isoc() 1082 dev_err(dev->dev, cx231xx_init_isoc() 1085 cx231xx_uninit_isoc(dev); cx231xx_init_isoc() 1090 if (dev->mode_tv == 0) cx231xx_init_isoc() 1091 cx231xx_capture_start(dev, 1, Raw_Video); cx231xx_init_isoc() 1093 cx231xx_capture_start(dev, 1, TS1_serial_mode); cx231xx_init_isoc() 1102 int cx231xx_init_bulk(struct cx231xx dev, int max_packets, cx231xx_init_bulk() argument 1104 int (bulk_copy) (struct cx231xx dev, struct urb urb)) cx231xx_init_bulk() 1106 struct cx231xx_dmaqueue dma_q = &dev->video_mode.vidq; cx231xx_init_bulk() 1112 dev->video_input = dev->video_input > 2 ? 2 : dev->video_input; cx231xx_init_bulk() 1114 cx231xx_coredbg("Setting Video mux to %d\n", dev->video_input); cx231xx_init_bulk() 1116 video_mux(dev, dev->video_input); cx231xx_init_bulk() 1119 cx231xx_uninit_bulk(dev); cx231xx_init_bulk() 1121 dev->video_mode.bulk_ctl.bulk_copy = bulk_copy; cx231xx_init_bulk() 1122 dev->video_mode.bulk_ctl.num_bufs = num_bufs; cx231xx_init_bulk() 1128 dma_q->lines_per_field = dev->height / 2; cx231xx_init_bulk() 1129 dma_q->bytes_left_in_line = dev->width << 1; cx231xx_init_bulk() 1141 dev->video_mode.bulk_ctl.urb = cx231xx_init_bulk() 1143 if (!dev->video_mode.bulk_ctl.urb) { cx231xx_init_bulk() 1144 dev_err(dev->dev, cx231xx_init_bulk() 1149 dev->video_mode.bulk_ctl.transfer_buffer = cx231xx_init_bulk() 1151 if (!dev->video_mode.bulk_ctl.transfer_buffer) { cx231xx_init_bulk() 1152 dev_err(dev->dev, cx231xx_init_bulk() 1154 kfree(dev->video_mode.bulk_ctl.urb); cx231xx_init_bulk() 1158 dev->video_mode.bulk_ctl.max_pkt_size = max_pkt_size; cx231xx_init_bulk() 1159 dev->video_mode.bulk_ctl.buf = NULL; cx231xx_init_bulk() 1161 sb_size = max_packets dev->video_mode.bulk_ctl.max_pkt_size; cx231xx_init_bulk() 1163 if (dev->mode_tv == 1) cx231xx_init_bulk() 1164 dev->video_mode.end_point_addr = 0x81; cx231xx_init_bulk() 1166 dev->video_mode.end_point_addr = 0x84; cx231xx_init_bulk() 1170 for (i = 0; i < dev->video_mode.bulk_ctl.num_bufs; i++) { cx231xx_init_bulk() 1173 dev_err(dev->dev, cx231xx_init_bulk() 1175 cx231xx_uninit_bulk(dev); cx231xx_init_bulk() 1178 dev->video_mode.bulk_ctl.urb[i] = urb; cx231xx_init_bulk() 1181 dev->video_mode.bulk_ctl.transfer_buffer[i] = cx231xx_init_bulk() 1182 usb_alloc_coherent(dev->udev, sb_size, GFP_KERNEL, cx231xx_init_bulk() 1184 if (!dev->video_mode.bulk_ctl.transfer_buffer[i]) { cx231xx_init_bulk() 1185 dev_err(dev->dev, cx231xx_init_bulk() 1189 cx231xx_uninit_bulk(dev); cx231xx_init_bulk() 1192 memset(dev->video_mode.bulk_ctl.transfer_buffer[i], 0, sb_size); cx231xx_init_bulk() 1194 pipe = usb_rcvbulkpipe(dev->udev, cx231xx_init_bulk() 1195 dev->video_mode.end_point_addr); cx231xx_init_bulk() 1196 usb_fill_bulk_urb(urb, dev->udev, pipe, cx231xx_init_bulk() 1197 dev->video_mode.bulk_ctl.transfer_buffer[i], cx231xx_init_bulk() 1204 for (i = 0; i < dev->video_mode.bulk_ctl.num_bufs; i++) { cx231xx_init_bulk() 1205 rc = usb_submit_urb(dev->video_mode.bulk_ctl.urb[i], cx231xx_init_bulk() 1208 dev_err(dev->dev, cx231xx_init_bulk() 1210 cx231xx_uninit_bulk(dev); cx231xx_init_bulk() 1215 if (dev->mode_tv == 0) cx231xx_init_bulk() 1216 cx231xx_capture_start(dev, 1, Raw_Video); cx231xx_init_bulk() 1218 cx231xx_capture_start(dev, 1, TS1_serial_mode); cx231xx_init_bulk() 1223 void cx231xx_stop_TS1(struct cx231xx dev) cx231xx_stop_TS1() argument 1231 cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, cx231xx_stop_TS1() 1238 cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, cx231xx_stop_TS1() 1242 void cx231xx_start_TS1(struct cx231xx dev) cx231xx_start_TS1() argument 1250 cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, cx231xx_start_TS1() 1257 cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, cx231xx_start_TS1() 1264 int cx231xx_dev_init(struct cx231xx dev) cx231xx_dev_init() argument 1271 dev->i2c_bus[0].nr = 0; cx231xx_dev_init() 1272 dev->i2c_bus[0].dev = dev; cx231xx_dev_init() 1273 dev->i2c_bus[0].i2c_period = I2C_SPEED_100K; / 100 KHz / cx231xx_dev_init() 1274 dev->i2c_bus[0].i2c_nostop = 0; cx231xx_dev_init() 1275 dev->i2c_bus[0].i2c_reserve = 0; cx231xx_dev_init() 1278 dev->i2c_bus[1].nr = 1; cx231xx_dev_init() 1279 dev->i2c_bus[1].dev = dev; cx231xx_dev_init() 1280 dev->i2c_bus[1].i2c_period = I2C_SPEED_100K; / 100 KHz / cx231xx_dev_init() 1281 dev->i2c_bus[1].i2c_nostop = 0; cx231xx_dev_init() 1282 dev->i2c_bus[1].i2c_reserve = 0; cx231xx_dev_init() 1285 dev->i2c_bus[2].nr = 2; cx231xx_dev_init() 1286 dev->i2c_bus[2].dev = dev; cx231xx_dev_init() 1287 dev->i2c_bus[2].i2c_period = I2C_SPEED_100K; / 100kHz / cx231xx_dev_init() 1288 dev->i2c_bus[2].i2c_nostop = 0; cx231xx_dev_init() 1289 dev->i2c_bus[2].i2c_reserve = 0; cx231xx_dev_init() 1292 cx231xx_i2c_register(&dev->i2c_bus[0]); cx231xx_dev_init() 1293 cx231xx_i2c_register(&dev->i2c_bus[1]); cx231xx_dev_init() 1294 cx231xx_i2c_register(&dev->i2c_bus[2]); cx231xx_dev_init() 1296 cx231xx_i2c_mux_register(dev, 0); cx231xx_dev_init() 1297 cx231xx_i2c_mux_register(dev, 1); cx231xx_dev_init() 1300 cx231xx_do_i2c_scan(dev, I2C_0); cx231xx_dev_init() 1301 cx231xx_do_i2c_scan(dev, I2C_1_MUX_1); cx231xx_dev_init() 1302 cx231xx_do_i2c_scan(dev, I2C_2); cx231xx_dev_init() 1303 cx231xx_do_i2c_scan(dev, I2C_1_MUX_3); cx231xx_dev_init() 1308 if (dev->board.external_av) { cx231xx_dev_init() 1309 errCode = cx231xx_set_power_mode(dev, cx231xx_dev_init() 1312 dev_err(dev->dev, cx231xx_dev_init() 1318 errCode = cx231xx_set_power_mode(dev, cx231xx_dev_init() 1321 dev_err(dev->dev, cx231xx_dev_init() 1329 if ((dev->board.tuner_type == TUNER_XC5000) \|\| cx231xx_dev_init() 1330 (dev->board.tuner_type == TUNER_XC2028)) cx231xx_dev_init() 1331 cx231xx_gpio_set(dev, dev->board.tuner_gpio); cx231xx_dev_init() 1334 errCode = cx231xx_afe_init_super_block(dev, 0x23c); cx231xx_dev_init() 1336 dev_err(dev->dev, cx231xx_dev_init() 1341 errCode = cx231xx_afe_init_channels(dev); cx231xx_dev_init() 1343 dev_err(dev->dev, cx231xx_dev_init() 1350 errCode = cx231xx_dif_set_standard(dev, DIF_USE_BASEBAND); cx231xx_dev_init() 1352 dev_err(dev->dev, cx231xx_dev_init() 1359 errCode = cx231xx_i2s_blk_initialize(dev); cx231xx_dev_init() 1361 dev_err(dev->dev, cx231xx_dev_init() 1368 errCode = cx231xx_init_ctrl_pin_status(dev); cx231xx_dev_init() 1370 dev_err(dev->dev, cx231xx_dev_init() 1377 switch (dev->model) { cx231xx_dev_init() 1382 errCode = cx231xx_set_agc_analog_digital_mux_select(dev, 1); cx231xx_dev_init() 1391 errCode = cx231xx_set_agc_analog_digital_mux_select(dev, 0); cx231xx_dev_init() 1397 dev_err(dev->dev, cx231xx_dev_init() 1404 cx231xx_set_alt_setting(dev, INDEX_VIDEO, 0); cx231xx_dev_init() 1405 cx231xx_set_alt_setting(dev, INDEX_VANC, 0); cx231xx_dev_init() 1406 cx231xx_set_alt_setting(dev, INDEX_HANC, 0); cx231xx_dev_init() 1407 if (dev->board.has_dvb) cx231xx_dev_init() 1408 cx231xx_set_alt_setting(dev, INDEX_TS1, 0); cx231xx_dev_init() 1415 void cx231xx_dev_uninit(struct cx231xx dev) cx231xx_dev_uninit() argument 1418 cx231xx_i2c_mux_unregister(dev, 1); cx231xx_dev_uninit() 1419 cx231xx_i2c_mux_unregister(dev, 0); cx231xx_dev_uninit() 1420 cx231xx_i2c_unregister(&dev->i2c_bus[2]); cx231xx_dev_uninit() 1421 cx231xx_i2c_unregister(&dev->i2c_bus[1]); cx231xx_dev_uninit() 1422 cx231xx_i2c_unregister(&dev->i2c_bus[0]); cx231xx_dev_uninit() 1429 int cx231xx_send_gpio_cmd(struct cx231xx dev, u32 gpio_bit, u8 gpio_val, cx231xx_send_gpio_cmd() argument 1472 status = cx231xx_send_vendor_cmd(dev, &ven_req); cx231xx_send_gpio_cmd() 1474 dev_err(dev->dev, "%s: failed with status -%d\n", cx231xx_send_gpio_cmd() 1485 int cx231xx_mode_register(struct cx231xx dev, u16 address, u32 mode) cx231xx_mode_register() argument 1492 cx231xx_read_ctrl_reg(dev, VRT_GET_REGISTER, address, value, 4); cx231xx_mode_register() 1505 cx231xx_write_ctrl_reg(dev, VRT_SET_REGISTER, address, value, 4); cx231xx_mode_register() 1513 int cx231xx_read_i2c_master(struct cx231xx dev, u8 dev_addr, u16 saddr, cx231xx_read_i2c_master() argument 1535 status = dev->cx231xx_send_usb_command(&dev->i2c_bus[0], cx231xx_read_i2c_master() 1538 status = dev->cx231xx_send_usb_command(&dev->i2c_bus[1], cx231xx_read_i2c_master() 1541 status = dev->cx231xx_send_usb_command(&dev->i2c_bus[2], cx231xx_read_i2c_master() 1559 int cx231xx_write_i2c_master(struct cx231xx dev, u8 dev_addr, u16 saddr, cx231xx_write_i2c_master() argument 1586 status = dev->cx231xx_send_usb_command(&dev->i2c_bus[0], cx231xx_write_i2c_master() 1589 status = dev->cx231xx_send_usb_command(&dev->i2c_bus[1], cx231xx_write_i2c_master() 1592 status = dev->cx231xx_send_usb_command(&dev->i2c_bus[2], cx231xx_write_i2c_master() 1598 int cx231xx_read_i2c_data(struct cx231xx dev, u8 dev_addr, u16 saddr, cx231xx_read_i2c_data() argument 1619 status = dev->cx231xx_send_usb_command(&dev->i2c_bus[0], &req_data); cx231xx_read_i2c_data() 1634 int cx231xx_write_i2c_data(struct cx231xx dev, u8 dev_addr, u16 saddr, cx231xx_write_i2c_data() argument 1660 status = dev->cx231xx_send_usb_command(&dev->i2c_bus[0], &req_data); cx231xx_write_i2c_data() 1665 int cx231xx_reg_mask_write(struct cx231xx dev, u8 dev_addr, u8 size, cx231xx_reg_mask_write() argument 1679 cx231xx_read_i2c_data(dev, dev_addr, register_address, 2, cx231xx_reg_mask_write() 1683 cx231xx_read_i2c_data(dev, dev_addr, register_address, 2, cx231xx_reg_mask_write() 1701 cx231xx_write_i2c_data(dev, dev_addr, register_address, 2, cx231xx_reg_mask_write() 1707 cx231xx_write_i2c_data(dev, dev_addr, register_address, 2, cx231xx_reg_mask_write() 1714 int cx231xx_read_modify_write_i2c_dword(struct cx231xx *dev, u8 dev_addr, cx231xx_read_modify_write_i2c_dword() argument 1720 status = cx231xx_read_i2c_data(dev, dev_addr, saddr, 2, &temp, 4); cx231xx_read_modify_write_i2c_dword() 1728 status = cx231xx_write_i2c_data(dev, dev_addr, saddr, 2, temp, 4); cx231xx_read_modify_write_i2c_dword()
H A D	cx231xx-audio.c	47 static int cx231xx_isoc_audio_deinit(struct cx231xx dev) cx231xx_isoc_audio_deinit() argument 51 dev_dbg(dev->dev, "Stopping isoc\n"); cx231xx_isoc_audio_deinit() 54 if (dev->adev.urb[i]) { cx231xx_isoc_audio_deinit() 56 usb_kill_urb(dev->adev.urb[i]); cx231xx_isoc_audio_deinit() 58 usb_unlink_urb(dev->adev.urb[i]); cx231xx_isoc_audio_deinit() 60 usb_free_urb(dev->adev.urb[i]); cx231xx_isoc_audio_deinit() 61 dev->adev.urb[i] = NULL; cx231xx_isoc_audio_deinit() 63 kfree(dev->adev.transfer_buffer[i]); cx231xx_isoc_audio_deinit() 64 dev->adev.transfer_buffer[i] = NULL; cx231xx_isoc_audio_deinit() 71 static int cx231xx_bulk_audio_deinit(struct cx231xx dev) cx231xx_bulk_audio_deinit() argument 75 dev_dbg(dev->dev, "Stopping bulk\n"); cx231xx_bulk_audio_deinit() 78 if (dev->adev.urb[i]) { cx231xx_bulk_audio_deinit() 80 usb_kill_urb(dev->adev.urb[i]); cx231xx_bulk_audio_deinit() 82 usb_unlink_urb(dev->adev.urb[i]); cx231xx_bulk_audio_deinit() 84 usb_free_urb(dev->adev.urb[i]); cx231xx_bulk_audio_deinit() 85 dev->adev.urb[i] = NULL; cx231xx_bulk_audio_deinit() 87 kfree(dev->adev.transfer_buffer[i]); cx231xx_bulk_audio_deinit() 88 dev->adev.transfer_buffer[i] = NULL; cx231xx_bulk_audio_deinit() 97 struct cx231xx dev = urb->context; cx231xx_audio_isocirq() local 107 if (dev->state & DEV_DISCONNECTED) cx231xx_audio_isocirq() 119 dev_dbg(dev->dev, "urb completition error %d.\n", cx231xx_audio_isocirq() 124 if (atomic_read(&dev->stream_started) == 0) cx231xx_audio_isocirq() 127 if (dev->adev.capture_pcm_substream) { cx231xx_audio_isocirq() 128 substream = dev->adev.capture_pcm_substream; cx231xx_audio_isocirq() 141 oldptr = dev->adev.hwptr_done_capture; cx231xx_audio_isocirq() 157 dev->adev.hwptr_done_capture += length; cx231xx_audio_isocirq() 158 if (dev->adev.hwptr_done_capture >= cx231xx_audio_isocirq() 160 dev->adev.hwptr_done_capture -= cx231xx_audio_isocirq() 163 dev->adev.capture_transfer_done += length; cx231xx_audio_isocirq() 164 if (dev->adev.capture_transfer_done >= cx231xx_audio_isocirq() 166 dev->adev.capture_transfer_done -= cx231xx_audio_isocirq() 179 dev_err(dev->dev, cx231xx_audio_isocirq() 188 struct cx231xx dev = urb->context; cx231xx_audio_bulkirq() local 197 if (dev->state & DEV_DISCONNECTED) cx231xx_audio_bulkirq() 209 dev_dbg(dev->dev, "urb completition error %d.\n", cx231xx_audio_bulkirq() 214 if (atomic_read(&dev->stream_started) == 0) cx231xx_audio_bulkirq() 217 if (dev->adev.capture_pcm_substream) { cx231xx_audio_bulkirq() 218 substream = dev->adev.capture_pcm_substream; cx231xx_audio_bulkirq() 227 oldptr = dev->adev.hwptr_done_capture; cx231xx_audio_bulkirq() 243 dev->adev.hwptr_done_capture += length; cx231xx_audio_bulkirq() 244 if (dev->adev.hwptr_done_capture >= cx231xx_audio_bulkirq() 246 dev->adev.hwptr_done_capture -= cx231xx_audio_bulkirq() 249 dev->adev.capture_transfer_done += length; cx231xx_audio_bulkirq() 250 if (dev->adev.capture_transfer_done >= cx231xx_audio_bulkirq() 252 dev->adev.capture_transfer_done -= cx231xx_audio_bulkirq() 265 dev_err(dev->dev, cx231xx_audio_bulkirq() 272 static int cx231xx_init_audio_isoc(struct cx231xx dev) cx231xx_init_audio_isoc() argument 277 dev_dbg(dev->dev, cx231xx_init_audio_isoc() 280 if (dev->state & DEV_DISCONNECTED) cx231xx_init_audio_isoc() 283 sb_size = CX231XX_ISO_NUM_AUDIO_PACKETS dev->adev.max_pkt_size; cx231xx_init_audio_isoc() 289 dev->adev.transfer_buffer[i] = kmalloc(sb_size, GFP_ATOMIC); cx231xx_init_audio_isoc() 290 if (!dev->adev.transfer_buffer[i]) cx231xx_init_audio_isoc() 293 memset(dev->adev.transfer_buffer[i], 0x80, sb_size); cx231xx_init_audio_isoc() 296 dev_err(dev->dev, "usb_alloc_urb failed!\n"); cx231xx_init_audio_isoc() 298 usb_free_urb(dev->adev.urb[j]); cx231xx_init_audio_isoc() 299 kfree(dev->adev.transfer_buffer[j]); cx231xx_init_audio_isoc() 304 urb->dev = dev->udev; cx231xx_init_audio_isoc() 305 urb->context = dev; cx231xx_init_audio_isoc() 306 urb->pipe = usb_rcvisocpipe(dev->udev, cx231xx_init_audio_isoc() 307 dev->adev.end_point_addr); cx231xx_init_audio_isoc() 309 urb->transfer_buffer = dev->adev.transfer_buffer[i]; cx231xx_init_audio_isoc() 316 j++, k += dev->adev.max_pkt_size) { cx231xx_init_audio_isoc() 318 urb->iso_frame_desc[j].length = dev->adev.max_pkt_size; cx231xx_init_audio_isoc() 320 dev->adev.urb[i] = urb; cx231xx_init_audio_isoc() 324 errCode = usb_submit_urb(dev->adev.urb[i], GFP_ATOMIC); cx231xx_init_audio_isoc() 326 cx231xx_isoc_audio_deinit(dev); cx231xx_init_audio_isoc() 334 static int cx231xx_init_audio_bulk(struct cx231xx dev) cx231xx_init_audio_bulk() argument 339 dev_dbg(dev->dev, cx231xx_init_audio_bulk() 342 if (dev->state & DEV_DISCONNECTED) cx231xx_init_audio_bulk() 345 sb_size = CX231XX_NUM_AUDIO_PACKETS dev->adev.max_pkt_size; cx231xx_init_audio_bulk() 351 dev->adev.transfer_buffer[i] = kmalloc(sb_size, GFP_ATOMIC); cx231xx_init_audio_bulk() 352 if (!dev->adev.transfer_buffer[i]) cx231xx_init_audio_bulk() 355 memset(dev->adev.transfer_buffer[i], 0x80, sb_size); cx231xx_init_audio_bulk() 358 dev_err(dev->dev, "usb_alloc_urb failed!\n"); cx231xx_init_audio_bulk() 360 usb_free_urb(dev->adev.urb[j]); cx231xx_init_audio_bulk() 361 kfree(dev->adev.transfer_buffer[j]); cx231xx_init_audio_bulk() 366 urb->dev = dev->udev; cx231xx_init_audio_bulk() 367 urb->context = dev; cx231xx_init_audio_bulk() 368 urb->pipe = usb_rcvbulkpipe(dev->udev, cx231xx_init_audio_bulk() 369 dev->adev.end_point_addr); cx231xx_init_audio_bulk() 371 urb->transfer_buffer = dev->adev.transfer_buffer[i]; cx231xx_init_audio_bulk() 375 dev->adev.urb[i] = urb; cx231xx_init_audio_bulk() 380 errCode = usb_submit_urb(dev->adev.urb[i], GFP_ATOMIC); cx231xx_init_audio_bulk() 382 cx231xx_bulk_audio_deinit(dev); cx231xx_init_audio_bulk() 394 struct cx231xx dev = snd_pcm_substream_chip(subs); snd_pcm_alloc_vmalloc_buffer() local 396 dev_dbg(dev->dev, "Allocating vbuffer\n"); snd_pcm_alloc_vmalloc_buffer() 435 struct cx231xx dev = snd_pcm_substream_chip(substream); snd_cx231xx_capture_open() local 439 dev_dbg(dev->dev, snd_cx231xx_capture_open() 442 if (dev->state & DEV_DISCONNECTED) { snd_cx231xx_capture_open() 443 dev_err(dev->dev, snd_cx231xx_capture_open() 450 mutex_lock(&dev->lock); snd_cx231xx_capture_open() 451 if (dev->USE_ISO) snd_cx231xx_capture_open() 452 ret = cx231xx_set_alt_setting(dev, INDEX_AUDIO, 1); snd_cx231xx_capture_open() 454 ret = cx231xx_set_alt_setting(dev, INDEX_AUDIO, 0); snd_cx231xx_capture_open() 455 mutex_unlock(&dev->lock); snd_cx231xx_capture_open() 457 dev_err(dev->dev, snd_cx231xx_capture_open() 465 mutex_lock(&dev->lock); snd_cx231xx_capture_open() 467 ret = cx231xx_capture_start(dev, 1, Audio); snd_cx231xx_capture_open() 469 dev->adev.users++; snd_cx231xx_capture_open() 470 mutex_unlock(&dev->lock); snd_cx231xx_capture_open() 473 dev->adev.capture_pcm_substream = substream; snd_cx231xx_capture_open() 474 runtime->private_data = dev; snd_cx231xx_capture_open() 482 struct cx231xx dev = snd_pcm_substream_chip(substream); snd_cx231xx_pcm_close() local 484 dev_dbg(dev->dev, "closing device\n"); snd_cx231xx_pcm_close() 487 mutex_lock(&dev->lock); snd_cx231xx_pcm_close() 488 ret = cx231xx_capture_start(dev, 0, Audio); snd_cx231xx_pcm_close() 492 ret = cx231xx_set_alt_setting(dev, INDEX_AUDIO, 0); snd_cx231xx_pcm_close() 494 dev_err(dev->dev, snd_cx231xx_pcm_close() 497 mutex_unlock(&dev->lock); snd_cx231xx_pcm_close() 501 dev->adev.users--; snd_cx231xx_pcm_close() 502 mutex_unlock(&dev->lock); snd_cx231xx_pcm_close() 504 if (dev->adev.users == 0 && dev->adev.shutdown == 1) { snd_cx231xx_pcm_close() 505 dev_dbg(dev->dev, "audio users: %d\n", dev->adev.users); snd_cx231xx_pcm_close() 506 dev_dbg(dev->dev, "disabling audio stream!\n"); snd_cx231xx_pcm_close() 507 dev->adev.shutdown = 0; snd_cx231xx_pcm_close() 508 dev_dbg(dev->dev, "released lock\n"); snd_cx231xx_pcm_close() 509 if (atomic_read(&dev->stream_started) > 0) { snd_cx231xx_pcm_close() 510 atomic_set(&dev->stream_started, 0); snd_cx231xx_pcm_close() 511 schedule_work(&dev->wq_trigger); snd_cx231xx_pcm_close() 520 struct cx231xx dev = snd_pcm_substream_chip(substream); snd_cx231xx_hw_capture_params() local 523 dev_dbg(dev->dev, "Setting capture parameters\n"); snd_cx231xx_hw_capture_params() 543 struct cx231xx dev = snd_pcm_substream_chip(substream); snd_cx231xx_hw_capture_free() local 545 dev_dbg(dev->dev, "Stop capture, if needed\n"); snd_cx231xx_hw_capture_free() 547 if (atomic_read(&dev->stream_started) > 0) { snd_cx231xx_hw_capture_free() 548 atomic_set(&dev->stream_started, 0); snd_cx231xx_hw_capture_free() 549 schedule_work(&dev->wq_trigger); snd_cx231xx_hw_capture_free() 557 struct cx231xx dev = snd_pcm_substream_chip(substream); snd_cx231xx_prepare() local 559 dev->adev.hwptr_done_capture = 0; snd_cx231xx_prepare() 560 dev->adev.capture_transfer_done = 0; snd_cx231xx_prepare() 567 struct cx231xx dev = container_of(work, struct cx231xx, wq_trigger); audio_trigger() local 569 if (atomic_read(&dev->stream_started)) { audio_trigger() 570 dev_dbg(dev->dev, "starting capture"); audio_trigger() 571 if (is_fw_load(dev) == 0) audio_trigger() 572 cx25840_call(dev, core, load_fw); audio_trigger() 573 if (dev->USE_ISO) audio_trigger() 574 cx231xx_init_audio_isoc(dev); audio_trigger() 576 cx231xx_init_audio_bulk(dev); audio_trigger() 578 dev_dbg(dev->dev, "stopping capture"); audio_trigger() 579 cx231xx_isoc_audio_deinit(dev); audio_trigger() 586 struct cx231xx dev = snd_pcm_substream_chip(substream); snd_cx231xx_capture_trigger() local 589 if (dev->state & DEV_DISCONNECTED) snd_cx231xx_capture_trigger() 592 spin_lock(&dev->adev.slock); snd_cx231xx_capture_trigger() 595 atomic_set(&dev->stream_started, 1); snd_cx231xx_capture_trigger() 598 atomic_set(&dev->stream_started, 0); snd_cx231xx_capture_trigger() 604 spin_unlock(&dev->adev.slock); snd_cx231xx_capture_trigger() 606 schedule_work(&dev->wq_trigger); snd_cx231xx_capture_trigger() 614 struct cx231xx dev; snd_cx231xx_capture_pointer() local 618 dev = snd_pcm_substream_chip(substream); snd_cx231xx_capture_pointer() 620 spin_lock_irqsave(&dev->adev.slock, flags); snd_cx231xx_capture_pointer() 621 hwptr_done = dev->adev.hwptr_done_capture; snd_cx231xx_capture_pointer() 622 spin_unlock_irqrestore(&dev->adev.slock, flags); snd_cx231xx_capture_pointer() 647 static int cx231xx_audio_init(struct cx231xx dev) cx231xx_audio_init() argument 649 struct cx231xx_audio adev = &dev->adev; cx231xx_audio_init() 657 if (dev->has_alsa_audio != 1) { cx231xx_audio_init() 664 dev_dbg(dev->dev, cx231xx_audio_init() 667 err = snd_card_new(dev->dev, index[devnr], "Cx231xx Audio", cx231xx_audio_init() 682 pcm->private_data = dev; cx231xx_audio_init() 688 INIT_WORK(&dev->wq_trigger, audio_trigger); cx231xx_audio_init() 696 adev->udev = dev->udev; cx231xx_audio_init() 700 dev->udev->actconfig->interface[dev->current_pcb_config. cx231xx_audio_init() 709 dev_info(dev->dev, cx231xx_audio_init() 723 dev_dbg(dev->dev, cx231xx_audio_init() 731 static int cx231xx_audio_fini(struct cx231xx dev) cx231xx_audio_fini() argument 733 if (dev == NULL) cx231xx_audio_fini() 736 if (dev->has_alsa_audio != 1) { cx231xx_audio_fini() 743 if (dev->adev.sndcard) { cx231xx_audio_fini() 744 snd_card_free(dev->adev.sndcard); cx231xx_audio_fini() 745 kfree(dev->adev.alt_max_pkt_size); cx231xx_audio_fini() 746 dev->adev.sndcard = NULL; cx231xx_audio_fini()
H A D	cx231xx-dvb.c	176 static inline void print_err_status(struct cx231xx dev, int packet, int status) print_err_status() argument 207 dev_dbg(dev->dev, print_err_status() 210 dev_dbg(dev->dev, print_err_status() 216 static inline int dvb_isoc_copy(struct cx231xx dev, struct urb urb) dvb_isoc_copy() argument 220 if (!dev) dvb_isoc_copy() 223 if (dev->state & DEV_DISCONNECTED) dvb_isoc_copy() 227 print_err_status(dev, -1, urb->status); dvb_isoc_copy() 236 print_err_status(dev, i, status); dvb_isoc_copy() 241 dvb_dmx_swfilter(&dev->dvb->demux, dvb_isoc_copy() 250 static inline int dvb_bulk_copy(struct cx231xx dev, struct urb urb) dvb_bulk_copy() argument 252 if (!dev) dvb_bulk_copy() 255 if (dev->state & DEV_DISCONNECTED) dvb_bulk_copy() 259 print_err_status(dev, -1, urb->status); dvb_bulk_copy() 265 dvb_dmx_swfilter(&dev->dvb->demux, dvb_bulk_copy() 274 struct cx231xx dev = dvb->adapter.priv; start_streaming() local 276 if (dev->USE_ISO) { start_streaming() 277 dev_dbg(dev->dev, "DVB transfer mode is ISO.\n"); start_streaming() 278 cx231xx_set_alt_setting(dev, INDEX_TS1, 4); start_streaming() 279 rc = cx231xx_set_mode(dev, CX231XX_DIGITAL_MODE); start_streaming() 282 dev->mode_tv = 1; start_streaming() 283 return cx231xx_init_isoc(dev, CX231XX_DVB_MAX_PACKETS, start_streaming() 285 dev->ts1_mode.max_pkt_size, start_streaming() 288 dev_dbg(dev->dev, "DVB transfer mode is BULK.\n"); start_streaming() 289 cx231xx_set_alt_setting(dev, INDEX_TS1, 0); start_streaming() 290 rc = cx231xx_set_mode(dev, CX231XX_DIGITAL_MODE); start_streaming() 293 dev->mode_tv = 1; start_streaming() 294 return cx231xx_init_bulk(dev, CX231XX_DVB_MAX_PACKETS, start_streaming() 296 dev->ts1_mode.max_pkt_size, start_streaming() 304 struct cx231xx dev = dvb->adapter.priv; stop_streaming() local 306 if (dev->USE_ISO) stop_streaming() 307 cx231xx_uninit_isoc(dev); stop_streaming() 309 cx231xx_uninit_bulk(dev); stop_streaming() 311 cx231xx_set_mode(dev, CX231XX_SUSPEND); stop_streaming() 358 struct cx231xx dev = fe->dvb->priv; cx231xx_dvb_bus_ctrl() local 361 return cx231xx_set_mode(dev, CX231XX_DIGITAL_MODE); cx231xx_dvb_bus_ctrl() 363 return cx231xx_set_mode(dev, CX231XX_SUSPEND); cx231xx_dvb_bus_ctrl() 379 static int attach_xc5000(u8 addr, struct cx231xx dev) 386 cfg.i2c_adap = cx231xx_get_i2c_adap(dev, dev->board.tuner_i2c_master); 389 if (!dev->dvb->frontend) { 390 dev_err(dev->dev, "%s/2: dvb frontend not attached. " 391 "Can't attach xc5000\n", dev->name); 395 fe = dvb_attach(xc5000_attach, dev->dvb->frontend, &cfg); 397 dev_err(dev->dev, "%s/2: xc5000 attach failed\n", dev->name); 398 dvb_frontend_detach(dev->dvb->frontend); 399 dev->dvb->frontend = NULL; 403 dev_info(dev->dev, "%s/2: xc5000 attached\n", dev->name); 409 int cx231xx_set_analog_freq(struct cx231xx dev, u32 freq) cx231xx_set_analog_freq() argument 411 if ((dev->dvb != NULL) && (dev->dvb->frontend != NULL)) { cx231xx_set_analog_freq() 413 struct dvb_tuner_ops dops = &dev->dvb->frontend->ops.tuner_ops; cx231xx_set_analog_freq() 419 params.std = dev->norm; cx231xx_set_analog_freq() 424 dops->set_analog_params(dev->dvb->frontend, &params); cx231xx_set_analog_freq() 432 int cx231xx_reset_analog_tuner(struct cx231xx dev) cx231xx_reset_analog_tuner() argument 436 if ((dev->dvb != NULL) && (dev->dvb->frontend != NULL)) { cx231xx_reset_analog_tuner() 438 struct dvb_tuner_ops dops = &dev->dvb->frontend->ops.tuner_ops; cx231xx_reset_analog_tuner() 440 if (dops->init != NULL && !dev->xc_fw_load_done) { cx231xx_reset_analog_tuner() 442 dev_dbg(dev->dev, cx231xx_reset_analog_tuner() 444 status = dops->init(dev->dvb->frontend); cx231xx_reset_analog_tuner() 446 dev->xc_fw_load_done = 1; cx231xx_reset_analog_tuner() 447 dev_dbg(dev->dev, cx231xx_reset_analog_tuner() 450 dev->xc_fw_load_done = 0; cx231xx_reset_analog_tuner() 451 dev_dbg(dev->dev, cx231xx_reset_analog_tuner() 465 struct cx231xx dev, struct device device) register_dvb() 473 result = dvb_register_adapter(&dvb->adapter, dev->name, module, device, register_dvb() 476 dev_warn(dev->dev, register_dvb() 478 dev->name, result); register_dvb() 481 dvb_register_media_controller(&dvb->adapter, dev->media_dev); register_dvb() 486 dvb->adapter.priv = dev; register_dvb() 491 dev_warn(dev->dev, register_dvb() 493 dev->name, result); register_dvb() 509 dev_warn(dev->dev, register_dvb() 511 dev->name, result); register_dvb() 520 dev_warn(dev->dev, register_dvb() 522 dev->name, result); register_dvb() 529 dev_warn(dev->dev, register_dvb() 531 dev->name, result); register_dvb() 538 dev_warn(dev->dev, register_dvb() 540 dev->name, result); register_dvb() 546 dev_warn(dev->dev, register_dvb() 548 dev->name, result); register_dvb() 586 module_put(client->dev.driver->owner); unregister_dvb() 594 static int dvb_init(struct cx231xx dev) dvb_init() argument 601 if (!dev->board.has_dvb) { dvb_init() 609 dev_info(dev->dev, dvb_init() 613 dev->dvb = dvb; dvb_init() 614 dev->cx231xx_set_analog_freq = cx231xx_set_analog_freq; dvb_init() 615 dev->cx231xx_reset_analog_tuner = cx231xx_reset_analog_tuner; dvb_init() 617 tuner_i2c = cx231xx_get_i2c_adap(dev, dev->board.tuner_i2c_master); dvb_init() 618 demod_i2c = cx231xx_get_i2c_adap(dev, dev->board.demod_i2c_master); dvb_init() 619 mutex_lock(&dev->lock); dvb_init() 620 cx231xx_set_mode(dev, CX231XX_DIGITAL_MODE); dvb_init() 621 cx231xx_demod_reset(dev); dvb_init() 623 switch (dev->model) { dvb_init() 627 dev->dvb->frontend = dvb_attach(s5h1432_attach, dvb_init() 631 if (dev->dvb->frontend == NULL) { dvb_init() 632 dev_err(dev->dev, dvb_init() 641 if (!dvb_attach(xc5000_attach, dev->dvb->frontend, dvb_init() 652 dev->dvb->frontend = dvb_attach(s5h1411_attach, dvb_init() 656 if (dev->dvb->frontend == NULL) { dvb_init() 657 dev_err(dev->dev, dvb_init() 666 if (!dvb_attach(xc5000_attach, dev->dvb->frontend, dvb_init() 675 dev->dvb->frontend = dvb_attach(s5h1432_attach, dvb_init() 679 if (dev->dvb->frontend == NULL) { dvb_init() 680 dev_err(dev->dev, dvb_init() 689 if (!dvb_attach(tda18271_attach, dev->dvb->frontend, dvb_init() 699 dev->dvb->frontend = dvb_attach(s5h1411_attach, dvb_init() 703 if (dev->dvb->frontend == NULL) { dvb_init() 704 dev_err(dev->dev, dvb_init() 713 if (!dvb_attach(tda18271_attach, dev->dvb->frontend, dvb_init() 722 dev_info(dev->dev, dvb_init() 726 dev->dvb->frontend = dvb_attach(lgdt3305_attach, dvb_init() 730 if (dev->dvb->frontend == NULL) { dvb_init() 731 dev_err(dev->dev, dvb_init() 740 dvb_attach(tda18271_attach, dev->dvb->frontend, dvb_init() 747 dev->dvb->frontend = dvb_attach(si2165_attach, dvb_init() 752 if (dev->dvb->frontend == NULL) { dvb_init() 753 dev_err(dev->dev, dvb_init() 759 dev->dvb->frontend->ops.i2c_gate_ctrl = NULL; dvb_init() 764 dvb_attach(tda18271_attach, dev->dvb->frontend, dvb_init() 769 dev->cx231xx_reset_analog_tuner = NULL; dvb_init() 780 dev->dvb->frontend = dvb_attach(si2165_attach, dvb_init() 785 if (dev->dvb->frontend == NULL) { dvb_init() 786 dev_err(dev->dev, dvb_init() 792 dev->dvb->frontend->ops.i2c_gate_ctrl = NULL; dvb_init() 799 si2157_config.fe = dev->dvb->frontend; dvb_init() 809 if (client == NULL \|\| client->dev.driver == NULL) { dvb_init() 810 dvb_frontend_detach(dev->dvb->frontend); dvb_init() 815 if (!try_module_get(client->dev.driver->owner)) { dvb_init() 817 dvb_frontend_detach(dev->dvb->frontend); dvb_init() 822 dev->cx231xx_reset_analog_tuner = NULL; dvb_init() 824 dev->dvb->i2c_client_tuner = client; dvb_init() 835 dev->dvb->frontend = dvb_attach(lgdt3306a_attach, dvb_init() 840 if (dev->dvb->frontend == NULL) { dvb_init() 841 dev_err(dev->dev, dvb_init() 847 dev->dvb->frontend->ops.i2c_gate_ctrl = NULL; dvb_init() 854 si2157_config.fe = dev->dvb->frontend; dvb_init() 864 if (client == NULL \|\| client->dev.driver == NULL) { dvb_init() 865 dvb_frontend_detach(dev->dvb->frontend); dvb_init() 870 if (!try_module_get(client->dev.driver->owner)) { dvb_init() 872 dvb_frontend_detach(dev->dvb->frontend); dvb_init() 877 dev->cx231xx_reset_analog_tuner = NULL; dvb_init() 879 dev->dvb->i2c_client_tuner = client; dvb_init() 885 dev_info(dev->dev, dvb_init() 889 dev->dvb->frontend = dvb_attach(mb86a20s_attach, dvb_init() 893 if (dev->dvb->frontend == NULL) { dvb_init() 894 dev_err(dev->dev, dvb_init() 903 dvb_attach(tda18271_attach, dev->dvb->frontend, dvb_init() 909 dev_err(dev->dev, dvb_init() 911 dev->name); dvb_init() 915 dev_err(dev->dev, dvb_init() 916 "%s/2: frontend initialization failed\n", dev->name); dvb_init() 922 result = register_dvb(dvb, THIS_MODULE, dev, dev->dev); dvb_init() 928 dev_info(dev->dev, "Successfully loaded cx231xx-dvb\n"); dvb_init() 931 cx231xx_set_mode(dev, CX231XX_SUSPEND); dvb_init() 932 mutex_unlock(&dev->lock); dvb_init() 937 dev->dvb = NULL; dvb_init() 941 static int dvb_fini(struct cx231xx dev) dvb_fini() argument 943 if (!dev->board.has_dvb) { dvb_fini() 948 if (dev->dvb) { dvb_fini() 949 unregister_dvb(dev->dvb); dvb_fini() 950 dev->dvb = NULL; dvb_fini() 463 register_dvb(struct cx231xx_dvb dvb, struct module module, struct cx231xx dev, struct device *device) register_dvb() argument
/linux-4.1.27/drivers/media/usb/uvc/
H A D	uvc_status.c	26 static int uvc_input_init(struct uvc_device dev) uvc_input_init() argument 35 usb_make_path(dev->udev, dev->input_phys, sizeof(dev->input_phys)); uvc_input_init() 36 strlcat(dev->input_phys, "/button", sizeof(dev->input_phys)); uvc_input_init() 38 input->name = dev->name; uvc_input_init() 39 input->phys = dev->input_phys; uvc_input_init() 40 usb_to_input_id(dev->udev, &input->id); uvc_input_init() 41 input->dev.parent = &dev->intf->dev; uvc_input_init() 49 dev->input = input; uvc_input_init() 57 static void uvc_input_cleanup(struct uvc_device dev) uvc_input_cleanup() argument 59 if (dev->input) uvc_input_cleanup() 60 input_unregister_device(dev->input); uvc_input_cleanup() 63 static void uvc_input_report_key(struct uvc_device dev, unsigned int code, uvc_input_report_key() argument 66 if (dev->input) { uvc_input_report_key() 67 input_report_key(dev->input, code, value); uvc_input_report_key() 68 input_sync(dev->input); uvc_input_report_key() 73 #define uvc_input_init(dev) 74 #define uvc_input_cleanup(dev) 75 #define uvc_input_report_key(dev, code, value) 81 static void uvc_event_streaming(struct uvc_device dev, __u8 data, int len) uvc_event_streaming() argument 94 uvc_input_report_key(dev, KEY_CAMERA, data[3]); uvc_event_streaming() 101 static void uvc_event_control(struct uvc_device dev, __u8 data, int len) uvc_event_control() argument 117 struct uvc_device dev = urb->context; uvc_status_complete() local 139 switch (dev->status[0] & 0x0f) { uvc_status_complete() 141 uvc_event_control(dev, dev->status, len); uvc_status_complete() 145 uvc_event_streaming(dev, dev->status, len); uvc_status_complete() 150 "type %u.\n", dev->status[0]); uvc_status_complete() 156 urb->interval = dev->int_ep->desc.bInterval; uvc_status_complete() 163 int uvc_status_init(struct uvc_device dev) uvc_status_init() argument 165 struct usb_host_endpoint ep = dev->int_ep; uvc_status_init() 172 uvc_input_init(dev); uvc_status_init() 174 dev->status = kzalloc(UVC_MAX_STATUS_SIZE, GFP_KERNEL); uvc_status_init() 175 if (dev->status == NULL) uvc_status_init() 178 dev->int_urb = usb_alloc_urb(0, GFP_KERNEL); uvc_status_init() 179 if (dev->int_urb == NULL) { uvc_status_init() 180 kfree(dev->status); uvc_status_init() 184 pipe = usb_rcvintpipe(dev->udev, ep->desc.bEndpointAddress); uvc_status_init() 190 if (interval > 16 && dev->udev->speed == USB_SPEED_HIGH && uvc_status_init() 191 (dev->quirks & UVC_QUIRK_STATUS_INTERVAL)) uvc_status_init() 194 usb_fill_int_urb(dev->int_urb, dev->udev, pipe, uvc_status_init() 195 dev->status, UVC_MAX_STATUS_SIZE, uvc_status_complete, uvc_status_init() 196 dev, interval); uvc_status_init() 201 void uvc_status_cleanup(struct uvc_device dev) uvc_status_cleanup() argument 203 usb_kill_urb(dev->int_urb); uvc_status_cleanup() 204 usb_free_urb(dev->int_urb); uvc_status_cleanup() 205 kfree(dev->status); uvc_status_cleanup() 206 uvc_input_cleanup(dev); uvc_status_cleanup() 209 int uvc_status_start(struct uvc_device dev, gfp_t flags) uvc_status_start() argument 211 if (dev->int_urb == NULL) uvc_status_start() 214 return usb_submit_urb(dev->int_urb, flags); uvc_status_start() 217 void uvc_status_stop(struct uvc_device *dev) uvc_status_stop() argument 219 usb_kill_urb(dev->int_urb); uvc_status_stop()
/linux-4.1.27/drivers/ssb/
H A D	pcihost_wrapper.c	24 struct pci_dev dev = to_pci_dev(d); ssb_pcihost_suspend() local 25 struct ssb_bus ssb = pci_get_drvdata(dev); ssb_pcihost_suspend() 31 pci_save_state(dev); ssb_pcihost_suspend() 32 pci_disable_device(dev); ssb_pcihost_suspend() 38 pci_prepare_to_sleep(dev); ssb_pcihost_suspend() 45 struct pci_dev dev = to_pci_dev(d); ssb_pcihost_resume() local 46 struct ssb_bus ssb = pci_get_drvdata(dev); ssb_pcihost_resume() 49 pci_back_from_sleep(dev); ssb_pcihost_resume() 50 err = pci_enable_device(dev); ssb_pcihost_resume() 53 pci_restore_state(dev); ssb_pcihost_resume() 67 static int ssb_pcihost_probe(struct pci_dev dev, ssb_pcihost_probe() argument 78 err = pci_enable_device(dev); ssb_pcihost_probe() 81 name = dev_name(&dev->dev); ssb_pcihost_probe() 82 if (dev->driver && dev->driver->name) ssb_pcihost_probe() 83 name = dev->driver->name; ssb_pcihost_probe() 84 err = pci_request_regions(dev, name); ssb_pcihost_probe() 87 pci_set_master(dev); ssb_pcihost_probe() 91 pci_read_config_dword(dev, 0x40, &val); ssb_pcihost_probe() 93 pci_write_config_dword(dev, 0x40, val & 0xffff00ff); ssb_pcihost_probe() 95 err = ssb_bus_pcibus_register(ssb, dev); ssb_pcihost_probe() 99 pci_set_drvdata(dev, ssb); ssb_pcihost_probe() 105 pci_release_regions(dev); ssb_pcihost_probe() 107 pci_disable_device(dev); ssb_pcihost_probe() 113 static void ssb_pcihost_remove(struct pci_dev dev) ssb_pcihost_remove() argument 115 struct ssb_bus *ssb = pci_get_drvdata(dev); ssb_pcihost_remove() 118 pci_release_regions(dev); ssb_pcihost_remove() 119 pci_disable_device(dev); ssb_pcihost_remove() 121 pci_set_drvdata(dev, NULL); ssb_pcihost_remove()
H A D	driver_gige.c	32 static inline u8 gige_read8(struct ssb_gige dev, u16 offset) gige_read8() argument 34 return ssb_read8(dev->dev, offset); gige_read8() 37 static inline u16 gige_read16(struct ssb_gige dev, u16 offset) gige_read16() argument 39 return ssb_read16(dev->dev, offset); gige_read16() 42 static inline u32 gige_read32(struct ssb_gige dev, u16 offset) gige_read32() argument 44 return ssb_read32(dev->dev, offset); gige_read32() 47 static inline void gige_write8(struct ssb_gige dev, gige_write8() argument 50 ssb_write8(dev->dev, offset, value); gige_write8() 53 static inline void gige_write16(struct ssb_gige dev, gige_write16() argument 56 ssb_write16(dev->dev, offset, value); gige_write16() 59 static inline void gige_write32(struct ssb_gige dev, gige_write32() argument 62 ssb_write32(dev->dev, offset, value); gige_write32() 66 u8 gige_pcicfg_read8(struct ssb_gige dev, unsigned int offset) gige_pcicfg_read8() argument 69 return gige_read8(dev, SSB_GIGE_PCICFG + offset); gige_pcicfg_read8() 73 u16 gige_pcicfg_read16(struct ssb_gige dev, unsigned int offset) gige_pcicfg_read16() argument 76 return gige_read16(dev, SSB_GIGE_PCICFG + offset); gige_pcicfg_read16() 80 u32 gige_pcicfg_read32(struct ssb_gige dev, unsigned int offset) gige_pcicfg_read32() argument 83 return gige_read32(dev, SSB_GIGE_PCICFG + offset); gige_pcicfg_read32() 87 void gige_pcicfg_write8(struct ssb_gige dev, gige_pcicfg_write8() argument 91 gige_write8(dev, SSB_GIGE_PCICFG + offset, value); gige_pcicfg_write8() 95 void gige_pcicfg_write16(struct ssb_gige dev, gige_pcicfg_write16() argument 99 gige_write16(dev, SSB_GIGE_PCICFG + offset, value); gige_pcicfg_write16() 103 void gige_pcicfg_write32(struct ssb_gige dev, gige_pcicfg_write32() argument 107 gige_write32(dev, SSB_GIGE_PCICFG + offset, value); gige_pcicfg_write32() 113 struct ssb_gige dev = container_of(bus->ops, struct ssb_gige, pci_ops); ssb_gige_pci_read_config() local 121 spin_lock_irqsave(&dev->lock, flags); ssb_gige_pci_read_config() 124 val = gige_pcicfg_read8(dev, reg); ssb_gige_pci_read_config() 127 val = gige_pcicfg_read16(dev, reg); ssb_gige_pci_read_config() 130 val = gige_pcicfg_read32(dev, reg); ssb_gige_pci_read_config() 135 spin_unlock_irqrestore(&dev->lock, flags); ssb_gige_pci_read_config() 143 struct ssb_gige dev = container_of(bus->ops, struct ssb_gige, pci_ops); ssb_gige_pci_write_config() local 151 spin_lock_irqsave(&dev->lock, flags); ssb_gige_pci_write_config() 154 gige_pcicfg_write8(dev, reg, val); ssb_gige_pci_write_config() 157 gige_pcicfg_write16(dev, reg, val); ssb_gige_pci_write_config() 160 gige_pcicfg_write32(dev, reg, val); ssb_gige_pci_write_config() 165 spin_unlock_irqrestore(&dev->lock, flags); ssb_gige_pci_write_config() 173 struct ssb_gige dev; ssb_gige_probe() local 176 dev = kzalloc(sizeof(dev), GFP_KERNEL); ssb_gige_probe() 177 if (!dev) ssb_gige_probe() 179 dev->dev = sdev; ssb_gige_probe() 181 spin_lock_init(&dev->lock); ssb_gige_probe() 182 dev->pci_controller.pci_ops = &dev->pci_ops; ssb_gige_probe() 183 dev->pci_controller.io_resource = &dev->io_resource; ssb_gige_probe() 184 dev->pci_controller.mem_resource = &dev->mem_resource; ssb_gige_probe() 185 dev->pci_controller.io_map_base = 0x800; ssb_gige_probe() 186 dev->pci_ops.read = ssb_gige_pci_read_config; ssb_gige_probe() 187 dev->pci_ops.write = ssb_gige_pci_write_config; ssb_gige_probe() 189 dev->io_resource.name = SSB_GIGE_IO_RES_NAME; ssb_gige_probe() 190 dev->io_resource.start = 0x800; ssb_gige_probe() 191 dev->io_resource.end = 0x8FF; ssb_gige_probe() 192 dev->io_resource.flags = IORESOURCE_IO \| IORESOURCE_PCI_FIXED; ssb_gige_probe() 199 gige_pcicfg_write32(dev, PCI_BASE_ADDRESS_0, base); ssb_gige_probe() 200 gige_pcicfg_write32(dev, PCI_BASE_ADDRESS_1, 0); ssb_gige_probe() 202 dev->mem_resource.name = SSB_GIGE_MEM_RES_NAME; ssb_gige_probe() 203 dev->mem_resource.start = base; ssb_gige_probe() 204 dev->mem_resource.end = base + 0x10000 - 1; ssb_gige_probe() 205 dev->mem_resource.flags = IORESOURCE_MEM \| IORESOURCE_PCI_FIXED; ssb_gige_probe() 208 gige_pcicfg_write16(dev, PCI_COMMAND, ssb_gige_probe() 209 gige_pcicfg_read16(dev, PCI_COMMAND) ssb_gige_probe() 218 gige_write32(dev, SSB_GIGE_SHIM_FLUSHSTAT, 0x00000068); ssb_gige_probe() 227 dev->has_rgmii = 1; ssb_gige_probe() 231 dev->has_rgmii = 0; ssb_gige_probe() 236 ssb_set_drvdata(sdev, dev); ssb_gige_probe() 237 register_pci_controller(&dev->pci_controller); ssb_gige_probe() 253 struct ssb_gige dev = ssb_get_drvdata(sdev); ssb_gige_pcibios_plat_dev_init() local 256 if (pdev->bus->ops != &dev->pci_ops) { ssb_gige_pcibios_plat_dev_init() 264 res->name = dev->mem_resource.name; ssb_gige_pcibios_plat_dev_init() 265 res->start = dev->mem_resource.start; ssb_gige_pcibios_plat_dev_init() 266 res->end = dev->mem_resource.end; ssb_gige_pcibios_plat_dev_init() 278 struct ssb_gige *dev = ssb_get_drvdata(sdev); ssb_gige_map_irq() local 280 if (pdev->bus->ops != &dev->pci_ops) { ssb_gige_map_irq()
/linux-4.1.27/drivers/acpi/
H A D	proc.c	30 struct acpi_device dev = acpi_system_wakeup_device_seq_show() local 34 if (!dev->wakeup.flags.valid) acpi_system_wakeup_device_seq_show() 38 dev->pnp.bus_id, acpi_system_wakeup_device_seq_show() 39 (u32) dev->wakeup.sleep_state); acpi_system_wakeup_device_seq_show() 41 mutex_lock(&dev->physical_node_lock); acpi_system_wakeup_device_seq_show() 43 if (!dev->physical_node_count) { acpi_system_wakeup_device_seq_show() 45 dev->wakeup.flags.run_wake ? '' : ' ', acpi_system_wakeup_device_seq_show() 46 device_may_wakeup(&dev->dev) ? acpi_system_wakeup_device_seq_show() 50 list_for_each_entry(entry, &dev->physical_node_list, acpi_system_wakeup_device_seq_show() 52 ldev = get_device(entry->dev); acpi_system_wakeup_device_seq_show() 57 dev->physical_node_list.next) acpi_system_wakeup_device_seq_show() 61 dev->wakeup.flags.run_wake ? '' : ' ', acpi_system_wakeup_device_seq_show() 62 (device_may_wakeup(&dev->dev) \|\| acpi_system_wakeup_device_seq_show() 71 mutex_unlock(&dev->physical_node_lock); acpi_system_wakeup_device_seq_show() 85 if (entry->dev && device_can_wakeup(entry->dev)) { physical_device_enable_wakeup() 86 bool enable = !device_may_wakeup(entry->dev); physical_device_enable_wakeup() 87 device_set_wakeup_enable(entry->dev, enable); physical_device_enable_wakeup() 112 struct acpi_device dev = acpi_system_write_wakeup_device() local 114 if (!dev->wakeup.flags.valid) acpi_system_write_wakeup_device() 117 if (!strncmp(dev->pnp.bus_id, str, 4)) { acpi_system_write_wakeup_device() 118 if (device_can_wakeup(&dev->dev)) { acpi_system_write_wakeup_device() 119 bool enable = !device_may_wakeup(&dev->dev); acpi_system_write_wakeup_device() 120 device_set_wakeup_enable(&dev->dev, enable); acpi_system_write_wakeup_device() 122 physical_device_enable_wakeup(dev); acpi_system_write_wakeup_device()
H A D	wakeup.c	35 struct acpi_device dev = acpi_enable_wakeup_devices() local 38 if (!dev->wakeup.flags.valid acpi_enable_wakeup_devices() 39 \|\| sleep_state > (u32) dev->wakeup.sleep_state acpi_enable_wakeup_devices() 40 \|\| !(device_may_wakeup(&dev->dev) acpi_enable_wakeup_devices() 41 \|\| dev->wakeup.prepare_count)) acpi_enable_wakeup_devices() 44 if (device_may_wakeup(&dev->dev)) acpi_enable_wakeup_devices() 45 acpi_enable_wakeup_device_power(dev, sleep_state); acpi_enable_wakeup_devices() 48 acpi_set_gpe_wake_mask(dev->wakeup.gpe_device, dev->wakeup.gpe_number, acpi_enable_wakeup_devices() 62 struct acpi_device dev = acpi_disable_wakeup_devices() local 65 if (!dev->wakeup.flags.valid acpi_disable_wakeup_devices() 66 \|\| sleep_state > (u32) dev->wakeup.sleep_state acpi_disable_wakeup_devices() 67 \|\| !(device_may_wakeup(&dev->dev) acpi_disable_wakeup_devices() 68 \|\| dev->wakeup.prepare_count)) acpi_disable_wakeup_devices() 71 acpi_set_gpe_wake_mask(dev->wakeup.gpe_device, dev->wakeup.gpe_number, acpi_disable_wakeup_devices() 74 if (device_may_wakeup(&dev->dev)) acpi_disable_wakeup_devices() 75 acpi_disable_wakeup_device_power(dev); acpi_disable_wakeup_devices() 85 struct acpi_device *dev = container_of(node, acpi_wakeup_device_init() local 88 if (device_can_wakeup(&dev->dev)) { acpi_wakeup_device_init() 90 acpi_enable_gpe(dev->wakeup.gpe_device, acpi_wakeup_device_init() 91 dev->wakeup.gpe_number); acpi_wakeup_device_init() 92 device_set_wakeup_enable(&dev->dev, true); acpi_wakeup_device_init()
/linux-4.1.27/drivers/memstick/host/
H A D	r592.c	58 static inline u32 r592_read_reg(struct r592_device dev, int address) r592_read_reg() argument 60 u32 value = readl(dev->mmio + address); r592_read_reg() 66 static inline void r592_write_reg(struct r592_device dev, r592_write_reg() argument 70 writel(value, dev->mmio + address); r592_write_reg() 74 static inline u32 r592_read_reg_raw_be(struct r592_device dev, int address) r592_read_reg_raw_be() argument 76 u32 value = __raw_readl(dev->mmio + address); r592_read_reg_raw_be() 82 static inline void r592_write_reg_raw_be(struct r592_device dev, r592_write_reg_raw_be() argument 86 __raw_writel(cpu_to_be32(value), dev->mmio + address); r592_write_reg_raw_be() 90 static inline void r592_set_reg_mask(struct r592_device dev, r592_set_reg_mask() argument 93 u32 reg = readl(dev->mmio + address); r592_set_reg_mask() 95 writel(reg \| mask , dev->mmio + address); r592_set_reg_mask() 99 static inline void r592_clear_reg_mask(struct r592_device dev, r592_clear_reg_mask() argument 102 u32 reg = readl(dev->mmio + address); r592_clear_reg_mask() 105 writel(reg & ~mask, dev->mmio + address); r592_clear_reg_mask() 110 static int r592_wait_status(struct r592_device dev, u32 mask, u32 wanted_mask) r592_wait_status() argument 113 u32 reg = r592_read_reg(dev, R592_STATUS); r592_wait_status() 120 reg = r592_read_reg(dev, R592_STATUS); r592_wait_status() 135 static int r592_enable_device(struct r592_device dev, bool enable) r592_enable_device() argument 142 r592_write_reg(dev, R592_POWER, R592_POWER_0 \| R592_POWER_1); r592_enable_device() 145 r592_set_reg_mask(dev, R592_IO, R592_IO_RESET); r592_enable_device() 150 r592_write_reg(dev, R592_POWER, 0); r592_enable_device() 156 static int r592_set_mode(struct r592_device dev, bool parallel_mode) r592_set_mode() argument 162 r592_write_reg(dev, R592_IO_MODE, R592_IO_MODE_SERIAL); r592_set_mode() 164 r592_clear_reg_mask(dev, R592_POWER, R592_POWER_20); r592_set_mode() 170 r592_set_reg_mask(dev, R592_POWER, R592_POWER_20); r592_set_mode() 172 r592_clear_reg_mask(dev, R592_IO, r592_set_mode() 176 r592_write_reg(dev, R592_IO_MODE, R592_IO_MODE_PARALLEL); r592_set_mode() 179 dev->parallel_mode = parallel_mode; r592_set_mode() 184 static void r592_host_reset(struct r592_device dev) r592_host_reset() argument 186 r592_set_reg_mask(dev, R592_IO, R592_IO_RESET); r592_host_reset() 188 r592_set_mode(dev, dev->parallel_mode); r592_host_reset() 193 static void r592_clear_interrupts(struct r592_device dev) r592_clear_interrupts() argument 196 r592_clear_reg_mask(dev, R592_REG_MSC, IRQ_ALL_ACK_MASK); r592_clear_interrupts() 197 r592_clear_reg_mask(dev, R592_REG_MSC, IRQ_ALL_EN_MASK); r592_clear_interrupts() 202 static int r592_test_io_error(struct r592_device dev) r592_test_io_error() argument 204 if (!(r592_read_reg(dev, R592_STATUS) & r592_test_io_error() 212 static int r592_test_fifo_empty(struct r592_device dev) r592_test_fifo_empty() argument 214 if (r592_read_reg(dev, R592_REG_MSC) & R592_REG_MSC_FIFO_EMPTY) r592_test_fifo_empty() 218 r592_host_reset(dev); r592_test_fifo_empty() 220 if (r592_read_reg(dev, R592_REG_MSC) & R592_REG_MSC_FIFO_EMPTY) r592_test_fifo_empty() 228 static void r592_start_dma(struct r592_device dev, bool is_write) r592_start_dma() argument 232 spin_lock_irqsave(&dev->irq_lock, flags); r592_start_dma() 235 r592_clear_reg_mask(dev, R592_REG_MSC, DMA_IRQ_ACK_MASK); r592_start_dma() 236 r592_set_reg_mask(dev, R592_REG_MSC, DMA_IRQ_EN_MASK); r592_start_dma() 239 r592_write_reg(dev, R592_FIFO_DMA, sg_dma_address(&dev->req->sg)); r592_start_dma() 242 reg = r592_read_reg(dev, R592_FIFO_DMA_SETTINGS); r592_start_dma() 249 r592_write_reg(dev, R592_FIFO_DMA_SETTINGS, reg); r592_start_dma() 251 spin_unlock_irqrestore(&dev->irq_lock, flags); r592_start_dma() 255 static void r592_stop_dma(struct r592_device dev, int error) r592_stop_dma() argument 257 r592_clear_reg_mask(dev, R592_FIFO_DMA_SETTINGS, r592_stop_dma() 261 r592_write_reg(dev, R592_FIFO_DMA, r592_stop_dma() 262 dev->dummy_dma_page_physical_address); r592_stop_dma() 264 r592_clear_reg_mask(dev, R592_REG_MSC, DMA_IRQ_EN_MASK); r592_stop_dma() 265 r592_clear_reg_mask(dev, R592_REG_MSC, DMA_IRQ_ACK_MASK); r592_stop_dma() 266 dev->dma_error = error; r592_stop_dma() 270 static void r592_check_dma(struct r592_device dev) r592_check_dma() argument 272 dev->dma_capable = r592_enable_dma && r592_check_dma() 273 (r592_read_reg(dev, R592_FIFO_DMA_SETTINGS) & r592_check_dma() 278 static int r592_transfer_fifo_dma(struct r592_device dev) r592_transfer_fifo_dma() argument 283 if (!dev->dma_capable \|\| !dev->req->long_data) r592_transfer_fifo_dma() 286 len = dev->req->sg.length; r592_transfer_fifo_dma() 287 is_write = dev->req->data_dir == WRITE; r592_transfer_fifo_dma() 294 dev->dma_error = 0; r592_transfer_fifo_dma() 295 reinit_completion(&dev->dma_done); r592_transfer_fifo_dma() 298 sg_count = dma_map_sg(&dev->pci_dev->dev, &dev->req->sg, 1, is_write ? r592_transfer_fifo_dma() 302 (sg_dma_len(&dev->req->sg) < dev->req->sg.length)) { r592_transfer_fifo_dma() 307 r592_start_dma(dev, is_write); r592_transfer_fifo_dma() 311 &dev->dma_done, msecs_to_jiffies(1000))) { r592_transfer_fifo_dma() 313 r592_stop_dma(dev, -ETIMEDOUT); r592_transfer_fifo_dma() 316 dma_unmap_sg(&dev->pci_dev->dev, &dev->req->sg, 1, is_write ? r592_transfer_fifo_dma() 320 return dev->dma_error; r592_transfer_fifo_dma() 330 static void r592_write_fifo_pio(struct r592_device dev, r592_write_fifo_pio() argument 334 if (!kfifo_is_empty(&dev->pio_fifo)) { r592_write_fifo_pio() 337 int copy_len = kfifo_in(&dev->pio_fifo, buffer, len); r592_write_fifo_pio() 339 if (!kfifo_is_full(&dev->pio_fifo)) r592_write_fifo_pio() 344 copy_len = kfifo_out(&dev->pio_fifo, tmp, 4); r592_write_fifo_pio() 346 r592_write_reg_raw_be(dev, R592_FIFO_PIO, (u32 )tmp); r592_write_fifo_pio() 349 WARN_ON(!kfifo_is_empty(&dev->pio_fifo)); r592_write_fifo_pio() 353 r592_write_reg_raw_be(dev, R592_FIFO_PIO, (u32 )buffer); r592_write_fifo_pio() 360 kfifo_in(&dev->pio_fifo, buffer, len); r592_write_fifo_pio() 364 static void r592_flush_fifo_write(struct r592_device dev) r592_flush_fifo_write() argument 369 if (kfifo_is_empty(&dev->pio_fifo)) r592_flush_fifo_write() 372 len = kfifo_out(&dev->pio_fifo, buffer, 4); r592_flush_fifo_write() 373 r592_write_reg_raw_be(dev, R592_FIFO_PIO, (u32 )buffer); r592_flush_fifo_write() 381 static void r592_read_fifo_pio(struct r592_device dev, r592_read_fifo_pio() argument 387 if (!kfifo_is_empty(&dev->pio_fifo)) { r592_read_fifo_pio() 389 kfifo_out(&dev->pio_fifo, buffer, min(4, len)); r592_read_fifo_pio() 393 if (!kfifo_is_empty(&dev->pio_fifo)) r592_read_fifo_pio() 399 (u32 )buffer = r592_read_reg_raw_be(dev, R592_FIFO_PIO); r592_read_fifo_pio() 405 (u32 )tmp = r592_read_reg_raw_be(dev, R592_FIFO_PIO); r592_read_fifo_pio() 406 kfifo_in(&dev->pio_fifo, tmp, 4); r592_read_fifo_pio() 407 len -= kfifo_out(&dev->pio_fifo, buffer, len); r592_read_fifo_pio() 415 static int r592_transfer_fifo_pio(struct r592_device dev) r592_transfer_fifo_pio() argument 419 bool is_write = dev->req->tpc >= MS_TPC_SET_RW_REG_ADRS; r592_transfer_fifo_pio() 422 kfifo_reset(&dev->pio_fifo); r592_transfer_fifo_pio() 424 if (!dev->req->long_data) { r592_transfer_fifo_pio() 426 r592_write_fifo_pio(dev, dev->req->data, r592_transfer_fifo_pio() 427 dev->req->data_len); r592_transfer_fifo_pio() 428 r592_flush_fifo_write(dev); r592_transfer_fifo_pio() 430 r592_read_fifo_pio(dev, dev->req->data, r592_transfer_fifo_pio() 431 dev->req->data_len); r592_transfer_fifo_pio() 436 sg_miter_start(&miter, &dev->req->sg, 1, SG_MITER_ATOMIC \| r592_transfer_fifo_pio() 442 r592_write_fifo_pio(dev, miter.addr, miter.length); r592_transfer_fifo_pio() 444 r592_read_fifo_pio(dev, miter.addr, miter.length); r592_transfer_fifo_pio() 449 r592_flush_fifo_write(dev); r592_transfer_fifo_pio() 457 static void r592_execute_tpc(struct r592_device dev) r592_execute_tpc() argument 463 if (!dev->req) { r592_execute_tpc() 468 is_write = dev->req->tpc >= MS_TPC_SET_RW_REG_ADRS; r592_execute_tpc() 469 len = dev->req->long_data ? r592_execute_tpc() 470 dev->req->sg.length : dev->req->data_len; r592_execute_tpc() 479 if (!(r592_read_reg(dev, R592_REG_MSC) & R592_REG_MSC_PRSNT)) { r592_execute_tpc() 486 memstick_debug_get_tpc_name(dev->req->tpc), len); r592_execute_tpc() 490 r592_set_reg_mask(dev, R592_IO, R592_IO_DIRECTION); r592_execute_tpc() 492 r592_clear_reg_mask(dev, R592_IO, R592_IO_DIRECTION); r592_execute_tpc() 495 error = r592_test_fifo_empty(dev); r592_execute_tpc() 501 error = r592_transfer_fifo_dma(dev); r592_execute_tpc() 503 error = r592_transfer_fifo_pio(dev); r592_execute_tpc() 511 (dev->req->tpc << R592_TPC_EXEC_TPC_SHIFT) \| r592_execute_tpc() 514 r592_write_reg(dev, R592_TPC_EXEC, reg); r592_execute_tpc() 518 if (dev->req->need_card_int) r592_execute_tpc() 521 error = r592_wait_status(dev, status, status); r592_execute_tpc() 528 error = r592_test_io_error(dev); r592_execute_tpc() 536 error = r592_transfer_fifo_dma(dev); r592_execute_tpc() 538 error = r592_transfer_fifo_pio(dev); r592_execute_tpc() 543 if (dev->parallel_mode && dev->req->need_card_int) { r592_execute_tpc() 545 dev->req->int_reg = 0; r592_execute_tpc() 546 status = r592_read_reg(dev, R592_STATUS); r592_execute_tpc() 549 dev->req->int_reg \|= MEMSTICK_INT_CMDNAK; r592_execute_tpc() 551 dev->req->int_reg \|= MEMSTICK_INT_BREQ; r592_execute_tpc() 553 dev->req->int_reg \|= MEMSTICK_INT_ERR; r592_execute_tpc() 555 dev->req->int_reg \|= MEMSTICK_INT_CED; r592_execute_tpc() 561 dev->req->error = error; r592_execute_tpc() 562 r592_clear_reg_mask(dev, R592_REG_MSC, R592_REG_MSC_LED); r592_execute_tpc() 570 struct r592_device dev = (struct r592_device )data; r592_process_thread() local 574 spin_lock_irqsave(&dev->io_thread_lock, flags); r592_process_thread() 576 error = memstick_next_req(dev->host, &dev->req); r592_process_thread() 577 spin_unlock_irqrestore(&dev->io_thread_lock, flags); r592_process_thread() 593 r592_execute_tpc(dev); r592_process_thread() 601 static void r592_update_card_detect(struct r592_device dev) r592_update_card_detect() argument 603 u32 reg = r592_read_reg(dev, R592_REG_MSC); r592_update_card_detect() 616 r592_write_reg(dev, R592_REG_MSC, reg); r592_update_card_detect() 622 struct r592_device dev = (struct r592_device )data; r592_detect_timer() local 623 r592_update_card_detect(dev); r592_detect_timer() 624 memstick_detect_change(dev->host); r592_detect_timer() 630 struct r592_device dev = (struct r592_device )data; r592_irq() local 637 spin_lock_irqsave(&dev->irq_lock, flags); r592_irq() 639 reg = r592_read_reg(dev, R592_REG_MSC); r592_irq() 645 r592_write_reg(dev, R592_REG_MSC, reg); r592_irq() 659 mod_timer(&dev->detect_timer, r592_irq() 675 r592_stop_dma(dev, error); r592_irq() 676 complete(&dev->dma_done); r592_irq() 679 spin_unlock_irqrestore(&dev->irq_lock, flags); r592_irq() 687 struct r592_device dev = memstick_priv(host); r592_set_param() local 693 return r592_enable_device(dev, true); r592_set_param() 695 return r592_enable_device(dev, false); r592_set_param() 702 return r592_set_mode(dev, 0); r592_set_param() 704 return r592_set_mode(dev, 1); r592_set_param() 716 struct r592_device dev = memstick_priv(host); r592_submit_req() local 719 if (dev->req) r592_submit_req() 722 spin_lock_irqsave(&dev->io_thread_lock, flags); r592_submit_req() 723 if (wake_up_process(dev->io_thread)) r592_submit_req() 725 spin_unlock_irqrestore(&dev->io_thread_lock, flags); r592_submit_req() 739 struct r592_device dev; r592_probe() local 742 host = memstick_alloc_host(sizeof(struct r592_device), &pdev->dev); r592_probe() 746 dev = memstick_priv(host); r592_probe() 747 dev->host = host; r592_probe() 748 dev->pci_dev = pdev; r592_probe() 749 pci_set_drvdata(pdev, dev); r592_probe() 765 dev->mmio = pci_ioremap_bar(pdev, 0); r592_probe() 766 if (!dev->mmio) r592_probe() 769 dev->irq = pdev->irq; r592_probe() 770 spin_lock_init(&dev->irq_lock); r592_probe() 771 spin_lock_init(&dev->io_thread_lock); r592_probe() 772 init_completion(&dev->dma_done); r592_probe() 773 INIT_KFIFO(dev->pio_fifo); r592_probe() 774 setup_timer(&dev->detect_timer, r592_probe() 775 r592_detect_timer, (long unsigned int)dev); r592_probe() 781 r592_check_dma(dev); r592_probe() 783 dev->io_thread = kthread_run(r592_process_thread, dev, "r592_io"); r592_probe() 784 if (IS_ERR(dev->io_thread)) { r592_probe() 785 error = PTR_ERR(dev->io_thread); r592_probe() 790 dev->dummy_dma_page = pci_alloc_consistent(pdev, PAGE_SIZE, r592_probe() 791 &dev->dummy_dma_page_physical_address); r592_probe() 792 r592_stop_dma(dev , 0); r592_probe() 794 if (request_irq(dev->irq, &r592_irq, IRQF_SHARED, r592_probe() 795 DRV_NAME, dev)) r592_probe() 798 r592_update_card_detect(dev); r592_probe() 805 free_irq(dev->irq, dev); r592_probe() 807 if (dev->dummy_dma_page) r592_probe() 808 pci_free_consistent(pdev, PAGE_SIZE, dev->dummy_dma_page, r592_probe() 809 dev->dummy_dma_page_physical_address); r592_probe() 811 kthread_stop(dev->io_thread); r592_probe() 813 iounmap(dev->mmio); r592_probe() 827 struct r592_device dev = pci_get_drvdata(pdev); r592_remove() local 831 kthread_stop(dev->io_thread); r592_remove() 833 r592_enable_device(dev, false); r592_remove() 835 while (!error && dev->req) { r592_remove() 836 dev->req->error = -ETIME; r592_remove() 837 error = memstick_next_req(dev->host, &dev->req); r592_remove() 839 memstick_remove_host(dev->host); r592_remove() 841 free_irq(dev->irq, dev); r592_remove() 842 iounmap(dev->mmio); r592_remove() 845 memstick_free_host(dev->host); r592_remove() 847 if (dev->dummy_dma_page) r592_remove() 848 pci_free_consistent(pdev, PAGE_SIZE, dev->dummy_dma_page, r592_remove() 849 dev->dummy_dma_page_physical_address); r592_remove() 856 struct r592_device dev = pci_get_drvdata(pdev); r592_suspend() local 858 r592_clear_interrupts(dev); r592_suspend() 859 memstick_suspend_host(dev->host); r592_suspend() 860 del_timer_sync(&dev->detect_timer); r592_suspend() 867 struct r592_device *dev = pci_get_drvdata(pdev); r592_resume() local 869 r592_clear_interrupts(dev); r592_resume() 870 r592_enable_device(dev, false); r592_resume() 871 memstick_resume_host(dev->host); r592_resume() 872 r592_update_card_detect(dev); r592_resume()
/linux-4.1.27/drivers/usb/c67x00/
H A D	c67x00-ll-hpi.c	84 static inline u16 hpi_read_reg(struct c67x00_device dev, int reg) hpi_read_reg() argument 87 return __raw_readw(dev->hpi.base + reg dev->hpi.regstep); hpi_read_reg() 90 static inline void hpi_write_reg(struct c67x00_device dev, int reg, u16 value) hpi_write_reg() argument 93 __raw_writew(value, dev->hpi.base + reg dev->hpi.regstep); hpi_write_reg() 96 static inline u16 hpi_read_word_nolock(struct c67x00_device dev, u16 reg) hpi_read_word_nolock() argument 98 hpi_write_reg(dev, HPI_ADDR, reg); hpi_read_word_nolock() 99 return hpi_read_reg(dev, HPI_DATA); hpi_read_word_nolock() 102 static u16 hpi_read_word(struct c67x00_device dev, u16 reg) hpi_read_word() argument 107 spin_lock_irqsave(&dev->hpi.lock, flags); hpi_read_word() 108 value = hpi_read_word_nolock(dev, reg); hpi_read_word() 109 spin_unlock_irqrestore(&dev->hpi.lock, flags); hpi_read_word() 114 static void hpi_write_word_nolock(struct c67x00_device dev, u16 reg, u16 value) hpi_write_word_nolock() argument 116 hpi_write_reg(dev, HPI_ADDR, reg); hpi_write_word_nolock() 117 hpi_write_reg(dev, HPI_DATA, value); hpi_write_word_nolock() 120 static void hpi_write_word(struct c67x00_device dev, u16 reg, u16 value) hpi_write_word() argument 124 spin_lock_irqsave(&dev->hpi.lock, flags); hpi_write_word() 125 hpi_write_word_nolock(dev, reg, value); hpi_write_word() 126 spin_unlock_irqrestore(&dev->hpi.lock, flags); hpi_write_word() 132 static void hpi_write_words_le16(struct c67x00_device dev, u16 addr, hpi_write_words_le16() argument 138 spin_lock_irqsave(&dev->hpi.lock, flags); hpi_write_words_le16() 140 hpi_write_reg(dev, HPI_ADDR, addr); hpi_write_words_le16() 142 hpi_write_reg(dev, HPI_DATA, le16_to_cpu(data++)); hpi_write_words_le16() 144 spin_unlock_irqrestore(&dev->hpi.lock, flags); hpi_write_words_le16() 150 static void hpi_read_words_le16(struct c67x00_device dev, u16 addr, hpi_read_words_le16() argument 156 spin_lock_irqsave(&dev->hpi.lock, flags); hpi_read_words_le16() 157 hpi_write_reg(dev, HPI_ADDR, addr); hpi_read_words_le16() 159 data++ = cpu_to_le16(hpi_read_reg(dev, HPI_DATA)); hpi_read_words_le16() 161 spin_unlock_irqrestore(&dev->hpi.lock, flags); hpi_read_words_le16() 164 static void hpi_set_bits(struct c67x00_device dev, u16 reg, u16 mask) hpi_set_bits() argument 169 spin_lock_irqsave(&dev->hpi.lock, flags); hpi_set_bits() 170 value = hpi_read_word_nolock(dev, reg); hpi_set_bits() 171 hpi_write_word_nolock(dev, reg, value \| mask); hpi_set_bits() 172 spin_unlock_irqrestore(&dev->hpi.lock, flags); hpi_set_bits() 175 static void hpi_clear_bits(struct c67x00_device dev, u16 reg, u16 mask) hpi_clear_bits() argument 180 spin_lock_irqsave(&dev->hpi.lock, flags); hpi_clear_bits() 181 value = hpi_read_word_nolock(dev, reg); hpi_clear_bits() 182 hpi_write_word_nolock(dev, reg, value & ~mask); hpi_clear_bits() 183 spin_unlock_irqrestore(&dev->hpi.lock, flags); hpi_clear_bits() 186 static u16 hpi_recv_mbox(struct c67x00_device dev) hpi_recv_mbox() argument 191 spin_lock_irqsave(&dev->hpi.lock, flags); hpi_recv_mbox() 192 value = hpi_read_reg(dev, HPI_MAILBOX); hpi_recv_mbox() 193 spin_unlock_irqrestore(&dev->hpi.lock, flags); hpi_recv_mbox() 198 static u16 hpi_send_mbox(struct c67x00_device dev, u16 value) hpi_send_mbox() argument 202 spin_lock_irqsave(&dev->hpi.lock, flags); hpi_send_mbox() 203 hpi_write_reg(dev, HPI_MAILBOX, value); hpi_send_mbox() 204 spin_unlock_irqrestore(&dev->hpi.lock, flags); hpi_send_mbox() 209 u16 c67x00_ll_hpi_status(struct c67x00_device dev) c67x00_ll_hpi_status() argument 214 spin_lock_irqsave(&dev->hpi.lock, flags); c67x00_ll_hpi_status() 215 value = hpi_read_reg(dev, HPI_STATUS); c67x00_ll_hpi_status() 216 spin_unlock_irqrestore(&dev->hpi.lock, flags); c67x00_ll_hpi_status() 221 void c67x00_ll_hpi_reg_init(struct c67x00_device dev) c67x00_ll_hpi_reg_init() argument 225 hpi_recv_mbox(dev); c67x00_ll_hpi_reg_init() 226 c67x00_ll_hpi_status(dev); c67x00_ll_hpi_reg_init() 227 hpi_write_word(dev, HPI_IRQ_ROUTING_REG, 0); c67x00_ll_hpi_reg_init() 230 hpi_write_word(dev, SIEMSG_REG(i), 0); c67x00_ll_hpi_reg_init() 231 hpi_read_word(dev, SIEMSG_REG(i)); c67x00_ll_hpi_reg_init() 237 hpi_set_bits(sie->dev, HPI_IRQ_ROUTING_REG, c67x00_ll_hpi_enable_sofeop() 243 hpi_clear_bits(sie->dev, HPI_IRQ_ROUTING_REG, c67x00_ll_hpi_disable_sofeop() 250 static inline int ll_recv_msg(struct c67x00_device dev) ll_recv_msg() argument 254 res = wait_for_completion_timeout(&dev->hpi.lcp.msg_received, 5 HZ); ll_recv_msg() 263 u16 c67x00_ll_fetch_siemsg(struct c67x00_device dev, int sie_num) c67x00_ll_fetch_siemsg() argument 267 val = hpi_read_word(dev, SIEMSG_REG(sie_num)); c67x00_ll_fetch_siemsg() 269 hpi_write_word(dev, SIEMSG_REG(sie_num), 0); c67x00_ll_fetch_siemsg() 276 return hpi_read_word(sie->dev, USB_CTL_REG(sie->sie_num)); c67x00_ll_get_usb_ctl() 284 hpi_write_word(sie->dev, USB_STAT_REG(sie->sie_num), bits); c67x00_ll_usb_clear_status() 289 return hpi_read_word(sie->dev, USB_STAT_REG(sie->sie_num)); c67x00_ll_usb_get_status() 294 static int c67x00_comm_exec_int(struct c67x00_device dev, u16 nr, c67x00_comm_exec_int() argument 299 mutex_lock(&dev->hpi.lcp.mutex); c67x00_comm_exec_int() 300 hpi_write_word(dev, COMM_INT_NUM, nr); c67x00_comm_exec_int() 302 hpi_write_word(dev, COMM_R(i), data->regs[i]); c67x00_comm_exec_int() 303 hpi_send_mbox(dev, COMM_EXEC_INT); c67x00_comm_exec_int() 304 rc = ll_recv_msg(dev); c67x00_comm_exec_int() 305 mutex_unlock(&dev->hpi.lcp.mutex); c67x00_comm_exec_int() 313 void c67x00_ll_set_husb_eot(struct c67x00_device dev, u16 value) c67x00_ll_set_husb_eot() argument 315 mutex_lock(&dev->hpi.lcp.mutex); c67x00_ll_set_husb_eot() 316 hpi_write_word(dev, HUSB_pEOT, value); c67x00_ll_set_husb_eot() 317 mutex_unlock(&dev->hpi.lcp.mutex); c67x00_ll_set_husb_eot() 322 struct c67x00_device dev = sie->dev; c67x00_ll_husb_sie_init() local 326 rc = c67x00_comm_exec_int(dev, HUSB_SIE_INIT_INT(sie->sie_num), &data); c67x00_ll_husb_sie_init() 332 struct c67x00_device dev = sie->dev; c67x00_ll_husb_reset() local 338 rc = c67x00_comm_exec_int(dev, HUSB_RESET_INT, &data); c67x00_ll_husb_reset() 344 hpi_write_word(sie->dev, HUSB_SIE_pCurrentTDPtr(sie->sie_num), addr); c67x00_ll_husb_set_current_td() 349 return hpi_read_word(sie->dev, HUSB_SIE_pCurrentTDPtr(sie->sie_num)); c67x00_ll_husb_get_current_td() 354 return hpi_read_word(sie->dev, HOST_FRAME_REG(sie->sie_num)); c67x00_ll_husb_get_frame() 360 hpi_set_bits(sie->dev, USB_CTL_REG(sie->sie_num), HOST_MODE); c67x00_ll_husb_init_host_port() 365 if (!(hpi_read_word(sie->dev, USB_CTL_REG(sie->sie_num)) & HOST_MODE)) c67x00_ll_husb_init_host_port() 376 hpi_set_bits(sie->dev, HPI_IRQ_ROUTING_REG, c67x00_ll_husb_reset_port() 378 hpi_set_bits(sie->dev, HOST_IRQ_EN_REG(sie->sie_num), c67x00_ll_husb_reset_port() 382 hpi_set_bits(sie->dev, USB_CTL_REG(sie->sie_num), PORT_RES_EN(port)); c67x00_ll_husb_reset_port() 387 void c67x00_ll_irq(struct c67x00_device dev, u16 int_status) c67x00_ll_irq() argument 392 dev->hpi.lcp.last_msg = hpi_recv_mbox(dev); c67x00_ll_irq() 393 complete(&dev->hpi.lcp.msg_received); c67x00_ll_irq() 398 int c67x00_ll_reset(struct c67x00_device dev) c67x00_ll_reset() argument 402 mutex_lock(&dev->hpi.lcp.mutex); c67x00_ll_reset() 403 hpi_send_mbox(dev, COMM_RESET); c67x00_ll_reset() 404 rc = ll_recv_msg(dev); c67x00_ll_reset() 405 mutex_unlock(&dev->hpi.lcp.mutex); c67x00_ll_reset() 416 void c67x00_ll_write_mem_le16(struct c67x00_device dev, u16 addr, c67x00_ll_write_mem_le16() argument 423 dev_err(&dev->pdev->dev, c67x00_ll_write_mem_le16() 431 tmp = hpi_read_word(dev, addr - 1); c67x00_ll_write_mem_le16() 433 hpi_write_word(dev, addr - 1, tmp); c67x00_ll_write_mem_le16() 438 hpi_write_words_le16(dev, addr, (__le16 )buf, len / 2); c67x00_ll_write_mem_le16() 445 tmp = hpi_read_word(dev, addr); c67x00_ll_write_mem_le16() 447 hpi_write_word(dev, addr, tmp); c67x00_ll_write_mem_le16() 455 void c67x00_ll_read_mem_le16(struct c67x00_device dev, u16 addr, c67x00_ll_read_mem_le16() argument 463 tmp = hpi_read_word(dev, addr - 1); c67x00_ll_read_mem_le16() 469 hpi_read_words_le16(dev, addr, (__le16 )buf, len / 2); c67x00_ll_read_mem_le16() 476 tmp = hpi_read_word(dev, addr); c67x00_ll_read_mem_le16() 483 void c67x00_ll_init(struct c67x00_device dev) c67x00_ll_init() argument 485 mutex_init(&dev->hpi.lcp.mutex); c67x00_ll_init() 486 init_completion(&dev->hpi.lcp.msg_received); c67x00_ll_init() 489 void c67x00_ll_release(struct c67x00_device *dev) c67x00_ll_release() argument
/linux-4.1.27/drivers/staging/comedi/drivers/
H A D	ni_labpc_isadma.h	10 void labpc_init_dma_chan(struct comedi_device dev, unsigned int dma_chan); 11 void labpc_free_dma_chan(struct comedi_device dev); 12 void labpc_setup_dma(struct comedi_device dev, struct comedi_subdevice s); 13 void labpc_drain_dma(struct comedi_device dev); 14 void labpc_handle_dma_status(struct comedi_device dev); 18 static inline void labpc_init_dma_chan(struct comedi_device dev, labpc_init_dma_chan() argument 23 static inline void labpc_free_dma_chan(struct comedi_device dev) labpc_free_dma_chan() argument 27 static inline void labpc_setup_dma(struct comedi_device dev, labpc_setup_dma() argument 32 static inline void labpc_drain_dma(struct comedi_device dev) labpc_drain_dma() argument 36 static inline void labpc_handle_dma_status(struct comedi_device *dev) labpc_handle_dma_status() argument
/linux-4.1.27/drivers/media/usb/hackrf/
H A D	hackrf.c	98 struct device dev; member in struct:hackrf_dev 157 static int hackrf_ctrl_msg(struct hackrf_dev dev, u8 request, u16 value, hackrf_ctrl_msg() argument 169 pipe = usb_sndctrlpipe(dev->udev, 0); hackrf_ctrl_msg() 176 pipe = usb_rcvctrlpipe(dev->udev, 0); hackrf_ctrl_msg() 180 dev_err(dev->dev, "Unknown command %02x\n", request); hackrf_ctrl_msg() 187 memcpy(dev->buf, data, size); hackrf_ctrl_msg() 189 ret = usb_control_msg(dev->udev, pipe, request, requesttype, value, hackrf_ctrl_msg() 190 index, dev->buf, size, 1000); hackrf_ctrl_msg() 191 hackrf_dbg_usb_control_msg(dev->dev, request, requesttype, value, hackrf_ctrl_msg() 192 index, dev->buf, size); hackrf_ctrl_msg() 194 dev_err(dev->dev, "usb_control_msg() failed %d request %02x\n", hackrf_ctrl_msg() 201 memcpy(data, dev->buf, size); hackrf_ctrl_msg() 209 static struct hackrf_frame_buf hackrf_get_next_fill_buf(struct hackrf_dev dev) hackrf_get_next_fill_buf() argument 214 spin_lock_irqsave(&dev->queued_bufs_lock, flags); hackrf_get_next_fill_buf() 215 if (list_empty(&dev->queued_bufs)) hackrf_get_next_fill_buf() 218 buf = list_entry(dev->queued_bufs.next, struct hackrf_frame_buf, list); hackrf_get_next_fill_buf() 221 spin_unlock_irqrestore(&dev->queued_bufs_lock, flags); hackrf_get_next_fill_buf() 225 static unsigned int hackrf_convert_stream(struct hackrf_dev dev, hackrf_convert_stream() argument 231 if (unlikely(time_is_before_jiffies(dev->jiffies_next))) { hackrf_convert_stream() 234 dev->jiffies_next + msecs_to_jiffies(MSECS)); hackrf_convert_stream() 235 unsigned int samples = dev->sample - dev->sample_measured; hackrf_convert_stream() 237 dev->jiffies_next = jiffies + msecs_to_jiffies(MSECS); hackrf_convert_stream() 238 dev->sample_measured = dev->sample; hackrf_convert_stream() 239 dev_dbg(dev->dev, "slen=%u samples=%u msecs=%u sample rate=%lu\n", hackrf_convert_stream() 245 dev->sample += src_len / 2; hackrf_convert_stream() 256 struct hackrf_dev dev = urb->context; hackrf_urb_complete() local 259 dev_dbg_ratelimited(dev->dev, "status=%d length=%d/%d errors=%d\n", hackrf_urb_complete() 272 dev_err_ratelimited(dev->dev, "URB failed %d\n", urb->status); hackrf_urb_complete() 280 fbuf = hackrf_get_next_fill_buf(dev); hackrf_urb_complete() 282 dev->vb_full++; hackrf_urb_complete() 283 dev_notice_ratelimited(dev->dev, hackrf_urb_complete() 285 dev->vb_full); hackrf_urb_complete() 291 len = hackrf_convert_stream(dev, ptr, urb->transfer_buffer, hackrf_urb_complete() 295 fbuf->vb.v4l2_buf.sequence = dev->sequence++; hackrf_urb_complete() 302 static int hackrf_kill_urbs(struct hackrf_dev dev) hackrf_kill_urbs() argument 306 for (i = dev->urbs_submitted - 1; i >= 0; i--) { hackrf_kill_urbs() 307 dev_dbg(dev->dev, "kill urb=%d\n", i); hackrf_kill_urbs() 309 usb_kill_urb(dev->urb_list[i]); hackrf_kill_urbs() 311 dev->urbs_submitted = 0; hackrf_kill_urbs() 316 static int hackrf_submit_urbs(struct hackrf_dev dev) hackrf_submit_urbs() argument 320 for (i = 0; i < dev->urbs_initialized; i++) { hackrf_submit_urbs() 321 dev_dbg(dev->dev, "submit urb=%d\n", i); hackrf_submit_urbs() 322 ret = usb_submit_urb(dev->urb_list[i], GFP_ATOMIC); hackrf_submit_urbs() 324 dev_err(dev->dev, "Could not submit URB no. %d - get them all back\n", hackrf_submit_urbs() 326 hackrf_kill_urbs(dev); hackrf_submit_urbs() 329 dev->urbs_submitted++; hackrf_submit_urbs() 335 static int hackrf_free_stream_bufs(struct hackrf_dev dev) hackrf_free_stream_bufs() argument 337 if (dev->flags & USB_STATE_URB_BUF) { hackrf_free_stream_bufs() 338 while (dev->buf_num) { hackrf_free_stream_bufs() 339 dev->buf_num--; hackrf_free_stream_bufs() 340 dev_dbg(dev->dev, "free buf=%d\n", dev->buf_num); hackrf_free_stream_bufs() 341 usb_free_coherent(dev->udev, dev->buf_size, hackrf_free_stream_bufs() 342 dev->buf_list[dev->buf_num], hackrf_free_stream_bufs() 343 dev->dma_addr[dev->buf_num]); hackrf_free_stream_bufs() 346 dev->flags &= ~USB_STATE_URB_BUF; hackrf_free_stream_bufs() 351 static int hackrf_alloc_stream_bufs(struct hackrf_dev dev) hackrf_alloc_stream_bufs() argument 353 dev->buf_num = 0; hackrf_alloc_stream_bufs() 354 dev->buf_size = BULK_BUFFER_SIZE; hackrf_alloc_stream_bufs() 356 dev_dbg(dev->dev, "all in all I will use %u bytes for streaming\n", hackrf_alloc_stream_bufs() 359 for (dev->buf_num = 0; dev->buf_num < MAX_BULK_BUFS; dev->buf_num++) { hackrf_alloc_stream_bufs() 360 dev->buf_list[dev->buf_num] = usb_alloc_coherent(dev->udev, hackrf_alloc_stream_bufs() 362 &dev->dma_addr[dev->buf_num]); hackrf_alloc_stream_bufs() 363 if (!dev->buf_list[dev->buf_num]) { hackrf_alloc_stream_bufs() 364 dev_dbg(dev->dev, "alloc buf=%d failed\n", hackrf_alloc_stream_bufs() 365 dev->buf_num); hackrf_alloc_stream_bufs() 366 hackrf_free_stream_bufs(dev); hackrf_alloc_stream_bufs() 370 dev_dbg(dev->dev, "alloc buf=%d %p (dma %llu)\n", dev->buf_num, hackrf_alloc_stream_bufs() 371 dev->buf_list[dev->buf_num], hackrf_alloc_stream_bufs() 372 (long long)dev->dma_addr[dev->buf_num]); hackrf_alloc_stream_bufs() 373 dev->flags \|= USB_STATE_URB_BUF; hackrf_alloc_stream_bufs() 379 static int hackrf_free_urbs(struct hackrf_dev dev) hackrf_free_urbs() argument 383 hackrf_kill_urbs(dev); hackrf_free_urbs() 385 for (i = dev->urbs_initialized - 1; i >= 0; i--) { hackrf_free_urbs() 386 if (dev->urb_list[i]) { hackrf_free_urbs() 387 dev_dbg(dev->dev, "free urb=%d\n", i); hackrf_free_urbs() 389 usb_free_urb(dev->urb_list[i]); hackrf_free_urbs() 392 dev->urbs_initialized = 0; hackrf_free_urbs() 397 static int hackrf_alloc_urbs(struct hackrf_dev dev) hackrf_alloc_urbs() argument 403 dev_dbg(dev->dev, "alloc urb=%d\n", i); hackrf_alloc_urbs() 404 dev->urb_list[i] = usb_alloc_urb(0, GFP_ATOMIC); hackrf_alloc_urbs() 405 if (!dev->urb_list[i]) { hackrf_alloc_urbs() 406 dev_dbg(dev->dev, "failed\n"); hackrf_alloc_urbs() 408 usb_free_urb(dev->urb_list[j]); hackrf_alloc_urbs() 411 usb_fill_bulk_urb(dev->urb_list[i], hackrf_alloc_urbs() 412 dev->udev, hackrf_alloc_urbs() 413 usb_rcvbulkpipe(dev->udev, 0x81), hackrf_alloc_urbs() 414 dev->buf_list[i], hackrf_alloc_urbs() 416 hackrf_urb_complete, dev); hackrf_alloc_urbs() 418 dev->urb_list[i]->transfer_flags = URB_NO_TRANSFER_DMA_MAP; hackrf_alloc_urbs() 419 dev->urb_list[i]->transfer_dma = dev->dma_addr[i]; hackrf_alloc_urbs() 420 dev->urbs_initialized++; hackrf_alloc_urbs() 427 static void hackrf_cleanup_queued_bufs(struct hackrf_dev dev) hackrf_cleanup_queued_bufs() argument 431 dev_dbg(dev->dev, "\n"); hackrf_cleanup_queued_bufs() 433 spin_lock_irqsave(&dev->queued_bufs_lock, flags); hackrf_cleanup_queued_bufs() 434 while (!list_empty(&dev->queued_bufs)) { hackrf_cleanup_queued_bufs() 437 buf = list_entry(dev->queued_bufs.next, hackrf_cleanup_queued_bufs() 442 spin_unlock_irqrestore(&dev->queued_bufs_lock, flags); hackrf_cleanup_queued_bufs() 449 struct hackrf_dev dev = container_of(v, struct hackrf_dev, v4l2_dev); hackrf_disconnect() local 451 dev_dbg(dev->dev, "\n"); hackrf_disconnect() 453 mutex_lock(&dev->vb_queue_lock); hackrf_disconnect() 454 mutex_lock(&dev->v4l2_lock); hackrf_disconnect() 456 dev->udev = NULL; hackrf_disconnect() 457 v4l2_device_disconnect(&dev->v4l2_dev); hackrf_disconnect() 458 video_unregister_device(&dev->vdev); hackrf_disconnect() 459 mutex_unlock(&dev->v4l2_lock); hackrf_disconnect() 460 mutex_unlock(&dev->vb_queue_lock); hackrf_disconnect() 462 v4l2_device_put(&dev->v4l2_dev); hackrf_disconnect() 470 struct hackrf_dev dev = vb2_get_drv_priv(vq); hackrf_queue_setup() local 472 dev_dbg(dev->dev, "nbuffers=%d\n", nbuffers); hackrf_queue_setup() 478 sizes[0] = PAGE_ALIGN(dev->buffersize); hackrf_queue_setup() 480 dev_dbg(dev->dev, "nbuffers=%d sizes[0]=%d\n", nbuffers, sizes[0]); hackrf_queue_setup() 486 struct hackrf_dev dev = vb2_get_drv_priv(vb->vb2_queue); hackrf_buf_queue() local 491 spin_lock_irqsave(&dev->queued_bufs_lock, flags); hackrf_buf_queue() 492 list_add_tail(&buf->list, &dev->queued_bufs); hackrf_buf_queue() 493 spin_unlock_irqrestore(&dev->queued_bufs_lock, flags); hackrf_buf_queue() 498 struct hackrf_dev dev = vb2_get_drv_priv(vq); hackrf_start_streaming() local 501 dev_dbg(dev->dev, "\n"); hackrf_start_streaming() 503 if (!dev->udev) hackrf_start_streaming() 506 mutex_lock(&dev->v4l2_lock); hackrf_start_streaming() 508 dev->sequence = 0; hackrf_start_streaming() 510 set_bit(POWER_ON, &dev->flags); hackrf_start_streaming() 512 ret = hackrf_alloc_stream_bufs(dev); hackrf_start_streaming() 516 ret = hackrf_alloc_urbs(dev); hackrf_start_streaming() 520 ret = hackrf_submit_urbs(dev); hackrf_start_streaming() 525 ret = hackrf_ctrl_msg(dev, CMD_SET_TRANSCEIVER_MODE, 1, 0, NULL, 0); hackrf_start_streaming() 531 hackrf_kill_urbs(dev); hackrf_start_streaming() 532 hackrf_free_urbs(dev); hackrf_start_streaming() 533 hackrf_free_stream_bufs(dev); hackrf_start_streaming() 534 clear_bit(POWER_ON, &dev->flags); hackrf_start_streaming() 540 list_for_each_entry_safe(buf, tmp, &dev->queued_bufs, list) { hackrf_start_streaming() 547 mutex_unlock(&dev->v4l2_lock); hackrf_start_streaming() 554 struct hackrf_dev dev = vb2_get_drv_priv(vq); hackrf_stop_streaming() local 556 dev_dbg(dev->dev, "\n"); hackrf_stop_streaming() 558 mutex_lock(&dev->v4l2_lock); hackrf_stop_streaming() 561 hackrf_ctrl_msg(dev, CMD_SET_TRANSCEIVER_MODE, 0, 0, NULL, 0); hackrf_stop_streaming() 563 hackrf_kill_urbs(dev); hackrf_stop_streaming() 564 hackrf_free_urbs(dev); hackrf_stop_streaming() 565 hackrf_free_stream_bufs(dev); hackrf_stop_streaming() 567 hackrf_cleanup_queued_bufs(dev); hackrf_stop_streaming() 569 clear_bit(POWER_ON, &dev->flags); hackrf_stop_streaming() 571 mutex_unlock(&dev->v4l2_lock); hackrf_stop_streaming() 586 struct hackrf_dev dev = video_drvdata(file); hackrf_querycap() local 588 dev_dbg(dev->dev, "\n"); hackrf_querycap() 591 strlcpy(cap->card, dev->vdev.name, sizeof(cap->card)); hackrf_querycap() 592 usb_make_path(dev->udev, cap->bus_info, sizeof(cap->bus_info)); hackrf_querycap() 603 struct hackrf_dev dev = video_drvdata(file); hackrf_s_fmt_sdr_cap() local 604 struct vb2_queue q = &dev->vb_queue; hackrf_s_fmt_sdr_cap() 607 dev_dbg(dev->dev, "pixelformat fourcc %4.4s\n", hackrf_s_fmt_sdr_cap() 616 dev->pixelformat = formats[i].pixelformat; hackrf_s_fmt_sdr_cap() 617 dev->buffersize = formats[i].buffersize; hackrf_s_fmt_sdr_cap() 623 dev->pixelformat = formats[0].pixelformat; hackrf_s_fmt_sdr_cap() 624 dev->buffersize = formats[0].buffersize; hackrf_s_fmt_sdr_cap() 634 struct hackrf_dev dev = video_drvdata(file); hackrf_g_fmt_sdr_cap() local 636 dev_dbg(dev->dev, "pixelformat fourcc %4.4s\n", hackrf_g_fmt_sdr_cap() 637 (char )&dev->pixelformat); hackrf_g_fmt_sdr_cap() 640 f->fmt.sdr.pixelformat = dev->pixelformat; hackrf_g_fmt_sdr_cap() 641 f->fmt.sdr.buffersize = dev->buffersize; hackrf_g_fmt_sdr_cap() 649 struct hackrf_dev dev = video_drvdata(file); hackrf_try_fmt_sdr_cap() local 652 dev_dbg(dev->dev, "pixelformat fourcc %4.4s\n", hackrf_try_fmt_sdr_cap() 672 struct hackrf_dev dev = video_drvdata(file); hackrf_enum_fmt_sdr_cap() local 674 dev_dbg(dev->dev, "index=%d\n", f->index); hackrf_enum_fmt_sdr_cap() 688 struct hackrf_dev dev = video_drvdata(file); hackrf_s_tuner() local 691 dev_dbg(dev->dev, "index=%d\n", v->index); hackrf_s_tuner() 705 struct hackrf_dev dev = video_drvdata(file); hackrf_g_tuner() local 708 dev_dbg(dev->dev, "index=%d\n", v->index); hackrf_g_tuner() 734 struct hackrf_dev dev = video_drvdata(file); hackrf_s_frequency() local 739 dev_dbg(dev->dev, "tuner=%d type=%d frequency=%u\n", hackrf_s_frequency() 743 dev->f_adc = clamp_t(unsigned int, f->frequency, hackrf_s_frequency() 745 dev_dbg(dev->dev, "ADC frequency=%u Hz\n", dev->f_adc); hackrf_s_frequency() 746 upper = dev->f_adc; hackrf_s_frequency() 756 ret = hackrf_ctrl_msg(dev, CMD_SAMPLE_RATE_SET, 0, 0, buf, 8); hackrf_s_frequency() 758 dev->f_rf = clamp_t(unsigned int, f->frequency, hackrf_s_frequency() 760 dev_dbg(dev->dev, "RF frequency=%u Hz\n", dev->f_rf); hackrf_s_frequency() 761 upper = dev->f_rf / 1000000; hackrf_s_frequency() 762 lower = dev->f_rf % 1000000; hackrf_s_frequency() 771 ret = hackrf_ctrl_msg(dev, CMD_SET_FREQ, 0, 0, buf, 8); hackrf_s_frequency() 782 struct hackrf_dev dev = video_drvdata(file); hackrf_g_frequency() local 785 dev_dbg(dev->dev, "tuner=%d type=%d\n", f->tuner, f->type); hackrf_g_frequency() 789 f->frequency = dev->f_adc; hackrf_g_frequency() 793 f->frequency = dev->f_rf; hackrf_g_frequency() 805 struct hackrf_dev dev = video_drvdata(file); hackrf_enum_freq_bands() local 808 dev_dbg(dev->dev, "tuner=%d type=%d index=%d\n", hackrf_enum_freq_bands() 881 struct hackrf_dev dev = container_of(v, struct hackrf_dev, v4l2_dev); hackrf_video_release() local 883 v4l2_ctrl_handler_free(&dev->hdl); hackrf_video_release() 884 v4l2_device_unregister(&dev->v4l2_dev); hackrf_video_release() 885 kfree(dev); hackrf_video_release() 888 static int hackrf_set_bandwidth(struct hackrf_dev dev) hackrf_set_bandwidth() argument 915 dev_dbg(dev->dev, "bandwidth auto=%d->%d val=%d->%d f_adc=%u\n", hackrf_set_bandwidth() 916 dev->bandwidth_auto->cur.val, hackrf_set_bandwidth() 917 dev->bandwidth_auto->val, dev->bandwidth->cur.val, hackrf_set_bandwidth() 918 dev->bandwidth->val, dev->f_adc); hackrf_set_bandwidth() 920 if (dev->bandwidth_auto->val == true) hackrf_set_bandwidth() 921 bandwidth = dev->f_adc; hackrf_set_bandwidth() 923 bandwidth = dev->bandwidth->val; hackrf_set_bandwidth() 932 dev->bandwidth->val = bandwidth; hackrf_set_bandwidth() 933 dev->bandwidth->cur.val = bandwidth; hackrf_set_bandwidth() 935 dev_dbg(dev->dev, "bandwidth selected=%d\n", bandwidth); hackrf_set_bandwidth() 944 ret = hackrf_ctrl_msg(dev, CMD_BASEBAND_FILTER_BANDWIDTH_SET, hackrf_set_bandwidth() 947 dev_dbg(dev->dev, "failed=%d\n", ret); hackrf_set_bandwidth() 952 static int hackrf_set_lna_gain(struct hackrf_dev dev) hackrf_set_lna_gain() argument 957 dev_dbg(dev->dev, "lna val=%d->%d\n", hackrf_set_lna_gain() 958 dev->lna_gain->cur.val, dev->lna_gain->val); hackrf_set_lna_gain() 960 ret = hackrf_ctrl_msg(dev, CMD_SET_LNA_GAIN, 0, dev->lna_gain->val, hackrf_set_lna_gain() 963 dev_dbg(dev->dev, "failed=%d\n", ret); hackrf_set_lna_gain() 968 static int hackrf_set_if_gain(struct hackrf_dev dev) hackrf_set_if_gain() argument 973 dev_dbg(dev->dev, "val=%d->%d\n", hackrf_set_if_gain() 974 dev->if_gain->cur.val, dev->if_gain->val); hackrf_set_if_gain() 976 ret = hackrf_ctrl_msg(dev, CMD_SET_VGA_GAIN, 0, dev->if_gain->val, hackrf_set_if_gain() 979 dev_dbg(dev->dev, "failed=%d\n", ret); hackrf_set_if_gain() 986 struct hackrf_dev dev = container_of(ctrl->handler, hackrf_s_ctrl() local 993 ret = hackrf_set_bandwidth(dev); hackrf_s_ctrl() 996 ret = hackrf_set_lna_gain(dev); hackrf_s_ctrl() 999 ret = hackrf_set_if_gain(dev); hackrf_s_ctrl() 1002 dev_dbg(dev->dev, "unknown ctrl: id=%d name=%s\n", hackrf_s_ctrl() 1017 struct hackrf_dev dev; hackrf_probe() local 1021 dev = kzalloc(sizeof(*dev), GFP_KERNEL); hackrf_probe() 1022 if (dev == NULL) hackrf_probe() 1025 mutex_init(&dev->v4l2_lock); hackrf_probe() 1026 mutex_init(&dev->vb_queue_lock); hackrf_probe() 1027 spin_lock_init(&dev->queued_bufs_lock); hackrf_probe() 1028 INIT_LIST_HEAD(&dev->queued_bufs); hackrf_probe() 1029 dev->dev = &intf->dev; hackrf_probe() 1030 dev->udev = interface_to_usbdev(intf); hackrf_probe() 1031 dev->f_adc = bands_adc[0].rangelow; hackrf_probe() 1032 dev->f_rf = bands_rf[0].rangelow; hackrf_probe() 1033 dev->pixelformat = formats[0].pixelformat; hackrf_probe() 1034 dev->buffersize = formats[0].buffersize; hackrf_probe() 1037 ret = hackrf_ctrl_msg(dev, CMD_BOARD_ID_READ, 0, 0, &u8tmp, 1); hackrf_probe() 1039 ret = hackrf_ctrl_msg(dev, CMD_VERSION_STRING_READ, 0, 0, hackrf_probe() 1042 dev_err(dev->dev, "Could not detect board\n"); hackrf_probe() 1048 dev_info(dev->dev, "Board ID: %02x\n", u8tmp); hackrf_probe() 1049 dev_info(dev->dev, "Firmware version: %s\n", buf); hackrf_probe() 1052 dev->vb_queue.type = V4L2_BUF_TYPE_SDR_CAPTURE; hackrf_probe() 1053 dev->vb_queue.io_modes = VB2_MMAP \| VB2_USERPTR \| VB2_READ; hackrf_probe() 1054 dev->vb_queue.drv_priv = dev; hackrf_probe() 1055 dev->vb_queue.buf_struct_size = sizeof(struct hackrf_frame_buf); hackrf_probe() 1056 dev->vb_queue.ops = &hackrf_vb2_ops; hackrf_probe() 1057 dev->vb_queue.mem_ops = &vb2_vmalloc_memops; hackrf_probe() 1058 dev->vb_queue.timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC; hackrf_probe() 1059 ret = vb2_queue_init(&dev->vb_queue); hackrf_probe() 1061 dev_err(dev->dev, "Could not initialize vb2 queue\n"); hackrf_probe() 1066 dev->vdev = hackrf_template; hackrf_probe() 1067 dev->vdev.queue = &dev->vb_queue; hackrf_probe() 1068 dev->vdev.queue->lock = &dev->vb_queue_lock; hackrf_probe() 1069 video_set_drvdata(&dev->vdev, dev); hackrf_probe() 1072 dev->v4l2_dev.release = hackrf_video_release; hackrf_probe() 1073 ret = v4l2_device_register(&intf->dev, &dev->v4l2_dev); hackrf_probe() 1075 dev_err(dev->dev, "Failed to register v4l2-device (%d)\n", ret); hackrf_probe() 1080 v4l2_ctrl_handler_init(&dev->hdl, 4); hackrf_probe() 1081 dev->bandwidth_auto = v4l2_ctrl_new_std(&dev->hdl, &hackrf_ctrl_ops, hackrf_probe() 1083 dev->bandwidth = v4l2_ctrl_new_std(&dev->hdl, &hackrf_ctrl_ops, hackrf_probe() 1086 v4l2_ctrl_auto_cluster(2, &dev->bandwidth_auto, 0, false); hackrf_probe() 1087 dev->lna_gain = v4l2_ctrl_new_std(&dev->hdl, &hackrf_ctrl_ops, hackrf_probe() 1089 dev->if_gain = v4l2_ctrl_new_std(&dev->hdl, &hackrf_ctrl_ops, hackrf_probe() 1091 if (dev->hdl.error) { hackrf_probe() 1092 ret = dev->hdl.error; hackrf_probe() 1093 dev_err(dev->dev, "Could not initialize controls\n"); hackrf_probe() 1097 v4l2_ctrl_handler_setup(&dev->hdl); hackrf_probe() 1099 dev->v4l2_dev.ctrl_handler = &dev->hdl; hackrf_probe() 1100 dev->vdev.v4l2_dev = &dev->v4l2_dev; hackrf_probe() 1101 dev->vdev.lock = &dev->v4l2_lock; hackrf_probe() 1103 ret = video_register_device(&dev->vdev, VFL_TYPE_SDR, -1); hackrf_probe() 1105 dev_err(dev->dev, "Failed to register as video device (%d)\n", hackrf_probe() 1109 dev_info(dev->dev, "Registered as %s\n", hackrf_probe() 1110 video_device_node_name(&dev->vdev)); hackrf_probe() 1111 dev_notice(dev->dev, "SDR API is still slightly experimental and functionality changes may follow\n"); hackrf_probe() 1115 v4l2_ctrl_handler_free(&dev->hdl); hackrf_probe() 1117 v4l2_device_unregister(&dev->v4l2_dev); hackrf_probe() 1119 kfree(dev); hackrf_probe()
/linux-4.1.27/drivers/media/platform/s5p-mfc/
H A D	s5p_mfc_ctrl.c	27 int s5p_mfc_alloc_firmware(struct s5p_mfc_dev dev) s5p_mfc_alloc_firmware() argument 32 dev->fw_size = dev->variant->buf_size->fw; s5p_mfc_alloc_firmware() 34 if (dev->fw_virt_addr) { s5p_mfc_alloc_firmware() 39 dev->fw_virt_addr = dma_alloc_coherent(dev->mem_dev_l, dev->fw_size, s5p_mfc_alloc_firmware() 40 &dev->bank1, GFP_KERNEL); s5p_mfc_alloc_firmware() 42 if (!dev->fw_virt_addr) { s5p_mfc_alloc_firmware() 47 if (HAS_PORTNUM(dev) && IS_TWOPORT(dev)) { s5p_mfc_alloc_firmware() 48 bank2_virt = dma_alloc_coherent(dev->mem_dev_r, 1 << MFC_BASE_ALIGN_ORDER, s5p_mfc_alloc_firmware() 53 dma_free_coherent(dev->mem_dev_l, dev->fw_size, s5p_mfc_alloc_firmware() 54 dev->fw_virt_addr, dev->bank1); s5p_mfc_alloc_firmware() 55 dev->fw_virt_addr = NULL; s5p_mfc_alloc_firmware() 63 dev->bank2 = bank2_dma_addr - (1 << MFC_BASE_ALIGN_ORDER); s5p_mfc_alloc_firmware() 65 dma_free_coherent(dev->mem_dev_r, 1 << MFC_BASE_ALIGN_ORDER, s5p_mfc_alloc_firmware() 72 dev->bank2 = dev->bank1; s5p_mfc_alloc_firmware() 78 int s5p_mfc_load_firmware(struct s5p_mfc_dev dev) s5p_mfc_load_firmware() argument 88 if (!dev->variant->fw_name[i]) s5p_mfc_load_firmware() 91 dev->variant->fw_name[i], dev->v4l2_dev.dev); s5p_mfc_load_firmware() 93 dev->fw_ver = (enum s5p_mfc_fw_ver) i; s5p_mfc_load_firmware() 102 if (fw_blob->size > dev->fw_size) { s5p_mfc_load_firmware() 107 if (!dev->fw_virt_addr) { s5p_mfc_load_firmware() 112 memcpy(dev->fw_virt_addr, fw_blob->data, fw_blob->size); s5p_mfc_load_firmware() 120 int s5p_mfc_release_firmware(struct s5p_mfc_dev dev) s5p_mfc_release_firmware() argument 124 if (!dev->fw_virt_addr) s5p_mfc_release_firmware() 126 dma_free_coherent(dev->mem_dev_l, dev->fw_size, dev->fw_virt_addr, s5p_mfc_release_firmware() 127 dev->bank1); s5p_mfc_release_firmware() 128 dev->fw_virt_addr = NULL; s5p_mfc_release_firmware() 132 static int s5p_mfc_bus_reset(struct s5p_mfc_dev dev) s5p_mfc_bus_reset() argument 138 mfc_write(dev, 0x1, S5P_FIMV_MFC_BUS_RESET_CTRL); s5p_mfc_bus_reset() 146 status = mfc_read(dev, S5P_FIMV_MFC_BUS_RESET_CTRL); s5p_mfc_bus_reset() 152 int s5p_mfc_reset(struct s5p_mfc_dev dev) s5p_mfc_reset() argument 160 if (IS_MFCV6_PLUS(dev)) { s5p_mfc_reset() 162 mfc_write(dev, 0, S5P_FIMV_RISC2HOST_CMD_V6); s5p_mfc_reset() 163 mfc_write(dev, 0, S5P_FIMV_HOST2RISC_CMD_V6); s5p_mfc_reset() 164 mfc_write(dev, 0, S5P_FIMV_FW_VERSION_V6); s5p_mfc_reset() 167 mfc_write(dev, 0, S5P_FIMV_REG_CLEAR_BEGIN_V6 + (i4)); s5p_mfc_reset() 170 if (dev->risc_on) s5p_mfc_reset() 171 if (s5p_mfc_bus_reset(dev)) s5p_mfc_reset() 177 if ((!dev->risc_on) \|\| (!IS_MFCV7_PLUS(dev))) s5p_mfc_reset() 178 mfc_write(dev, 0, S5P_FIMV_RISC_ON_V6); s5p_mfc_reset() 180 mfc_write(dev, 0x1FFF, S5P_FIMV_MFC_RESET_V6); s5p_mfc_reset() 181 mfc_write(dev, 0, S5P_FIMV_MFC_RESET_V6); s5p_mfc_reset() 185 mfc_write(dev, 0x3f6, S5P_FIMV_SW_RESET); s5p_mfc_reset() 187 mfc_write(dev, 0x3e2, S5P_FIMV_SW_RESET); s5p_mfc_reset() 198 mc_status = mfc_read(dev, S5P_FIMV_MC_STATUS); s5p_mfc_reset() 202 mfc_write(dev, 0x0, S5P_FIMV_SW_RESET); s5p_mfc_reset() 203 mfc_write(dev, 0x3fe, S5P_FIMV_SW_RESET); s5p_mfc_reset() 210 static inline void s5p_mfc_init_memctrl(struct s5p_mfc_dev dev) s5p_mfc_init_memctrl() argument 212 if (IS_MFCV6_PLUS(dev)) { s5p_mfc_init_memctrl() 213 mfc_write(dev, dev->bank1, S5P_FIMV_RISC_BASE_ADDRESS_V6); s5p_mfc_init_memctrl() 214 mfc_debug(2, "Base Address : %pad\n", &dev->bank1); s5p_mfc_init_memctrl() 216 mfc_write(dev, dev->bank1, S5P_FIMV_MC_DRAMBASE_ADR_A); s5p_mfc_init_memctrl() 217 mfc_write(dev, dev->bank2, S5P_FIMV_MC_DRAMBASE_ADR_B); s5p_mfc_init_memctrl() 219 &dev->bank1, &dev->bank2); s5p_mfc_init_memctrl() 223 static inline void s5p_mfc_clear_cmds(struct s5p_mfc_dev dev) s5p_mfc_clear_cmds() argument 225 if (IS_MFCV6_PLUS(dev)) { s5p_mfc_clear_cmds() 229 mfc_write(dev, 0xffffffff, S5P_FIMV_SI_CH0_INST_ID); s5p_mfc_clear_cmds() 230 mfc_write(dev, 0xffffffff, S5P_FIMV_SI_CH1_INST_ID); s5p_mfc_clear_cmds() 231 mfc_write(dev, 0, S5P_FIMV_RISC2HOST_CMD); s5p_mfc_clear_cmds() 232 mfc_write(dev, 0, S5P_FIMV_HOST2RISC_CMD); s5p_mfc_clear_cmds() 237 int s5p_mfc_init_hw(struct s5p_mfc_dev dev) s5p_mfc_init_hw() argument 243 if (!dev->fw_virt_addr) { s5p_mfc_init_hw() 251 dev->risc_on = 0; s5p_mfc_init_hw() 252 ret = s5p_mfc_reset(dev); s5p_mfc_init_hw() 259 s5p_mfc_init_memctrl(dev); s5p_mfc_init_hw() 261 s5p_mfc_clear_cmds(dev); s5p_mfc_init_hw() 263 s5p_mfc_clean_dev_int_flags(dev); s5p_mfc_init_hw() 264 if (IS_MFCV6_PLUS(dev)) { s5p_mfc_init_hw() 265 dev->risc_on = 1; s5p_mfc_init_hw() 266 mfc_write(dev, 0x1, S5P_FIMV_RISC_ON_V6); s5p_mfc_init_hw() 269 mfc_write(dev, 0x3ff, S5P_FIMV_SW_RESET); s5p_mfc_init_hw() 271 if (s5p_mfc_wait_for_done_dev(dev, S5P_MFC_R2H_CMD_FW_STATUS_RET)) { s5p_mfc_init_hw() 273 s5p_mfc_reset(dev); s5p_mfc_init_hw() 277 s5p_mfc_clean_dev_int_flags(dev); s5p_mfc_init_hw() 279 ret = s5p_mfc_hw_call(dev->mfc_cmds, sys_init_cmd, dev); s5p_mfc_init_hw() 282 s5p_mfc_reset(dev); s5p_mfc_init_hw() 287 if (s5p_mfc_wait_for_done_dev(dev, S5P_MFC_R2H_CMD_SYS_INIT_RET)) { s5p_mfc_init_hw() 289 s5p_mfc_reset(dev); s5p_mfc_init_hw() 293 dev->int_cond = 0; s5p_mfc_init_hw() 294 if (dev->int_err != 0 \|\| dev->int_type != s5p_mfc_init_hw() 298 dev->int_err, dev->int_type); s5p_mfc_init_hw() 299 s5p_mfc_reset(dev); s5p_mfc_init_hw() 303 if (IS_MFCV6_PLUS(dev)) s5p_mfc_init_hw() 304 ver = mfc_read(dev, S5P_FIMV_FW_VERSION_V6); s5p_mfc_init_hw() 306 ver = mfc_read(dev, S5P_FIMV_FW_VERSION); s5p_mfc_init_hw() 317 void s5p_mfc_deinit_hw(struct s5p_mfc_dev dev) s5p_mfc_deinit_hw() argument 321 s5p_mfc_reset(dev); s5p_mfc_deinit_hw() 322 s5p_mfc_hw_call_void(dev->mfc_ops, release_dev_context_buffer, dev); s5p_mfc_deinit_hw() 327 int s5p_mfc_sleep(struct s5p_mfc_dev dev) s5p_mfc_sleep() argument 333 s5p_mfc_clean_dev_int_flags(dev); s5p_mfc_sleep() 334 ret = s5p_mfc_hw_call(dev->mfc_cmds, sleep_cmd, dev); s5p_mfc_sleep() 339 if (s5p_mfc_wait_for_done_dev(dev, S5P_MFC_R2H_CMD_SLEEP_RET)) { s5p_mfc_sleep() 344 dev->int_cond = 0; s5p_mfc_sleep() 345 if (dev->int_err != 0 \|\| dev->int_type != s5p_mfc_sleep() 348 mfc_err("Failed to sleep - error: %d int: %d\n", dev->int_err, s5p_mfc_sleep() 349 dev->int_type); s5p_mfc_sleep() 356 static int s5p_mfc_v8_wait_wakeup(struct s5p_mfc_dev dev) s5p_mfc_v8_wait_wakeup() argument 361 dev->risc_on = 1; s5p_mfc_v8_wait_wakeup() 362 mfc_write(dev, 0x1, S5P_FIMV_RISC_ON_V6); s5p_mfc_v8_wait_wakeup() 364 if (s5p_mfc_wait_for_done_dev(dev, S5P_MFC_R2H_CMD_FW_STATUS_RET)) { s5p_mfc_v8_wait_wakeup() 369 ret = s5p_mfc_hw_call(dev->mfc_cmds, wakeup_cmd, dev); s5p_mfc_v8_wait_wakeup() 375 if (s5p_mfc_wait_for_done_dev(dev, S5P_MFC_R2H_CMD_WAKEUP_RET)) { s5p_mfc_v8_wait_wakeup() 382 static int s5p_mfc_wait_wakeup(struct s5p_mfc_dev dev) s5p_mfc_wait_wakeup() argument 387 ret = s5p_mfc_hw_call(dev->mfc_cmds, wakeup_cmd, dev); s5p_mfc_wait_wakeup() 394 if (IS_MFCV6_PLUS(dev)) { s5p_mfc_wait_wakeup() 395 dev->risc_on = 1; s5p_mfc_wait_wakeup() 396 mfc_write(dev, 0x1, S5P_FIMV_RISC_ON_V6); s5p_mfc_wait_wakeup() 398 mfc_write(dev, 0x3ff, S5P_FIMV_SW_RESET); s5p_mfc_wait_wakeup() 401 if (s5p_mfc_wait_for_done_dev(dev, S5P_MFC_R2H_CMD_WAKEUP_RET)) { s5p_mfc_wait_wakeup() 408 int s5p_mfc_wakeup(struct s5p_mfc_dev dev) s5p_mfc_wakeup() argument 416 dev->risc_on = 0; s5p_mfc_wakeup() 417 ret = s5p_mfc_reset(dev); s5p_mfc_wakeup() 425 s5p_mfc_init_memctrl(dev); s5p_mfc_wakeup() 427 s5p_mfc_clear_cmds(dev); s5p_mfc_wakeup() 428 s5p_mfc_clean_dev_int_flags(dev); s5p_mfc_wakeup() 430 if (IS_MFCV8(dev)) s5p_mfc_wakeup() 431 ret = s5p_mfc_v8_wait_wakeup(dev); s5p_mfc_wakeup() 433 ret = s5p_mfc_wait_wakeup(dev); s5p_mfc_wakeup() 439 dev->int_cond = 0; s5p_mfc_wakeup() 440 if (dev->int_err != 0 \|\| dev->int_type != s5p_mfc_wakeup() 443 mfc_err("Failed to wakeup - error: %d int: %d\n", dev->int_err, s5p_mfc_wakeup() 444 dev->int_type); s5p_mfc_wakeup() 451 int s5p_mfc_open_mfc_inst(struct s5p_mfc_dev dev, struct s5p_mfc_ctx ctx) s5p_mfc_open_mfc_inst() argument 455 ret = s5p_mfc_hw_call(dev->mfc_ops, alloc_instance_buffer, ctx); s5p_mfc_open_mfc_inst() 462 ret = s5p_mfc_hw_call(dev->mfc_ops, s5p_mfc_open_mfc_inst() 471 s5p_mfc_hw_call_void(dev->mfc_ops, try_run, dev); s5p_mfc_open_mfc_inst() 485 s5p_mfc_hw_call_void(dev->mfc_ops, release_dec_desc_buffer, ctx); s5p_mfc_open_mfc_inst() 487 s5p_mfc_hw_call_void(dev->mfc_ops, release_instance_buffer, ctx); s5p_mfc_open_mfc_inst() 492 void s5p_mfc_close_mfc_inst(struct s5p_mfc_dev dev, struct s5p_mfc_ctx ctx) s5p_mfc_close_mfc_inst() argument 496 s5p_mfc_hw_call_void(dev->mfc_ops, try_run, dev); s5p_mfc_close_mfc_inst() 503 s5p_mfc_hw_call_void(dev->mfc_ops, release_codec_buffers, ctx); s5p_mfc_close_mfc_inst() 504 s5p_mfc_hw_call_void(dev->mfc_ops, release_instance_buffer, ctx); s5p_mfc_close_mfc_inst() 506 s5p_mfc_hw_call_void(dev->mfc_ops, release_dec_desc_buffer, ctx); s5p_mfc_close_mfc_inst()
H A D	s5p_mfc_opr.c	22 void s5p_mfc_init_hw_ops(struct s5p_mfc_dev dev) s5p_mfc_init_hw_ops() argument 24 if (IS_MFCV6_PLUS(dev)) { s5p_mfc_init_hw_ops() 26 dev->warn_start = S5P_FIMV_ERR_WARNINGS_START_V6; s5p_mfc_init_hw_ops() 29 dev->warn_start = S5P_FIMV_ERR_WARNINGS_START; s5p_mfc_init_hw_ops() 31 dev->mfc_ops = s5p_mfc_ops; s5p_mfc_init_hw_ops() 34 void s5p_mfc_init_regs(struct s5p_mfc_dev dev) s5p_mfc_init_regs() argument 36 if (IS_MFCV6_PLUS(dev)) s5p_mfc_init_regs() 37 dev->mfc_regs = s5p_mfc_init_regs_v6_plus(dev); s5p_mfc_init_regs() 40 int s5p_mfc_alloc_priv_buf(struct device dev, s5p_mfc_alloc_priv_buf() argument 46 b->virt = dma_alloc_coherent(dev, b->size, &b->dma, GFP_KERNEL); s5p_mfc_alloc_priv_buf() 57 void s5p_mfc_release_priv_buf(struct device dev, s5p_mfc_release_priv_buf() argument 61 dma_free_coherent(dev, b->size, b->virt, b->dma); s5p_mfc_release_priv_buf()
/linux-4.1.27/drivers/input/misc/
H A D	cm109.c	297 static void report_key(struct cm109_dev dev, int key) report_key() argument 299 struct input_dev idev = dev->idev; report_key() 301 if (dev->key_code >= 0) { report_key() 303 input_report_key(idev, dev->key_code, 0); report_key() 306 dev->key_code = key; report_key() 319 static void cm109_submit_buzz_toggle(struct cm109_dev dev) cm109_submit_buzz_toggle() argument 323 if (dev->buzzer_state) cm109_submit_buzz_toggle() 324 dev->ctl_data->byte[HID_OR0] \|= BUZZER_ON; cm109_submit_buzz_toggle() 326 dev->ctl_data->byte[HID_OR0] &= ~BUZZER_ON; cm109_submit_buzz_toggle() 328 error = usb_submit_urb(dev->urb_ctl, GFP_ATOMIC); cm109_submit_buzz_toggle() 330 dev_err(&dev->intf->dev, cm109_submit_buzz_toggle() 340 struct cm109_dev dev = urb->context; cm109_urb_irq_callback() local 344 dev_dbg(&dev->intf->dev, "### URB IRQ: [0x%02x 0x%02x 0x%02x 0x%02x] keybit=0x%02x\n", cm109_urb_irq_callback() 345 dev->irq_data->byte[0], cm109_urb_irq_callback() 346 dev->irq_data->byte[1], cm109_urb_irq_callback() 347 dev->irq_data->byte[2], cm109_urb_irq_callback() 348 dev->irq_data->byte[3], cm109_urb_irq_callback() 349 dev->keybit); cm109_urb_irq_callback() 354 dev_err_ratelimited(&dev->intf->dev, "%s: urb status %d\n", cm109_urb_irq_callback() 360 if (dev->irq_data->byte[HID_IR0] & 0x0f) { cm109_urb_irq_callback() 361 const int code = (dev->irq_data->byte[HID_IR0] & 0x0f); cm109_urb_irq_callback() 362 report_key(dev, dev->keymap[0xff + code]); cm109_urb_irq_callback() 366 if (dev->keybit == 0xf) { cm109_urb_irq_callback() 369 if ((dev->gpi & 0xf0) == (dev->irq_data->byte[HID_IR1] & 0xf0)) cm109_urb_irq_callback() 372 dev->gpi = dev->irq_data->byte[HID_IR1] & 0xf0; cm109_urb_irq_callback() 373 dev->keybit = 0x1; cm109_urb_irq_callback() 375 report_key(dev, dev->keymap[dev->irq_data->byte[HID_IR1]]); cm109_urb_irq_callback() 377 dev->keybit <<= 1; cm109_urb_irq_callback() 378 if (dev->keybit > 0x8) cm109_urb_irq_callback() 379 dev->keybit = 0xf; cm109_urb_irq_callback() 384 spin_lock(&dev->ctl_submit_lock); cm109_urb_irq_callback() 386 dev->irq_urb_pending = 0; cm109_urb_irq_callback() 388 if (likely(!dev->shutdown)) { cm109_urb_irq_callback() 390 if (dev->buzzer_state) cm109_urb_irq_callback() 391 dev->ctl_data->byte[HID_OR0] \|= BUZZER_ON; cm109_urb_irq_callback() 393 dev->ctl_data->byte[HID_OR0] &= ~BUZZER_ON; cm109_urb_irq_callback() 395 dev->ctl_data->byte[HID_OR1] = dev->keybit; cm109_urb_irq_callback() 396 dev->ctl_data->byte[HID_OR2] = dev->keybit; cm109_urb_irq_callback() 398 dev->buzzer_pending = 0; cm109_urb_irq_callback() 399 dev->ctl_urb_pending = 1; cm109_urb_irq_callback() 401 error = usb_submit_urb(dev->urb_ctl, GFP_ATOMIC); cm109_urb_irq_callback() 403 dev_err(&dev->intf->dev, cm109_urb_irq_callback() 408 spin_unlock(&dev->ctl_submit_lock); cm109_urb_irq_callback() 413 struct cm109_dev dev = urb->context; cm109_urb_ctl_callback() local 417 dev_dbg(&dev->intf->dev, "### URB CTL: [0x%02x 0x%02x 0x%02x 0x%02x]\n", cm109_urb_ctl_callback() 418 dev->ctl_data->byte[0], cm109_urb_ctl_callback() 419 dev->ctl_data->byte[1], cm109_urb_ctl_callback() 420 dev->ctl_data->byte[2], cm109_urb_ctl_callback() 421 dev->ctl_data->byte[3]); cm109_urb_ctl_callback() 426 dev_err_ratelimited(&dev->intf->dev, "%s: urb status %d\n", cm109_urb_ctl_callback() 430 spin_lock(&dev->ctl_submit_lock); cm109_urb_ctl_callback() 432 dev->ctl_urb_pending = 0; cm109_urb_ctl_callback() 434 if (likely(!dev->shutdown)) { cm109_urb_ctl_callback() 436 if (dev->buzzer_pending \|\| status) { cm109_urb_ctl_callback() 437 dev->buzzer_pending = 0; cm109_urb_ctl_callback() 438 dev->ctl_urb_pending = 1; cm109_urb_ctl_callback() 439 cm109_submit_buzz_toggle(dev); cm109_urb_ctl_callback() 440 } else if (likely(!dev->irq_urb_pending)) { cm109_urb_ctl_callback() 442 dev->irq_urb_pending = 1; cm109_urb_ctl_callback() 443 error = usb_submit_urb(dev->urb_irq, GFP_ATOMIC); cm109_urb_ctl_callback() 445 dev_err(&dev->intf->dev, cm109_urb_ctl_callback() 451 spin_unlock(&dev->ctl_submit_lock); cm109_urb_ctl_callback() 454 static void cm109_toggle_buzzer_async(struct cm109_dev dev) cm109_toggle_buzzer_async() argument 458 spin_lock_irqsave(&dev->ctl_submit_lock, flags); cm109_toggle_buzzer_async() 460 if (dev->ctl_urb_pending) { cm109_toggle_buzzer_async() 462 dev->buzzer_pending = 1; cm109_toggle_buzzer_async() 464 dev->ctl_urb_pending = 1; cm109_toggle_buzzer_async() 465 cm109_submit_buzz_toggle(dev); cm109_toggle_buzzer_async() 468 spin_unlock_irqrestore(&dev->ctl_submit_lock, flags); cm109_toggle_buzzer_async() 471 static void cm109_toggle_buzzer_sync(struct cm109_dev dev, int on) cm109_toggle_buzzer_sync() argument 476 dev->ctl_data->byte[HID_OR0] \|= BUZZER_ON; cm109_toggle_buzzer_sync() 478 dev->ctl_data->byte[HID_OR0] &= ~BUZZER_ON; cm109_toggle_buzzer_sync() 480 error = usb_control_msg(dev->udev, cm109_toggle_buzzer_sync() 481 usb_sndctrlpipe(dev->udev, 0), cm109_toggle_buzzer_sync() 482 dev->ctl_req->bRequest, cm109_toggle_buzzer_sync() 483 dev->ctl_req->bRequestType, cm109_toggle_buzzer_sync() 484 le16_to_cpu(dev->ctl_req->wValue), cm109_toggle_buzzer_sync() 485 le16_to_cpu(dev->ctl_req->wIndex), cm109_toggle_buzzer_sync() 486 dev->ctl_data, cm109_toggle_buzzer_sync() 489 dev_err(&dev->intf->dev, "%s: usb_control_msg() failed %d\n", cm109_toggle_buzzer_sync() 493 static void cm109_stop_traffic(struct cm109_dev dev) cm109_stop_traffic() argument 495 dev->shutdown = 1; cm109_stop_traffic() 501 usb_kill_urb(dev->urb_ctl); cm109_stop_traffic() 502 usb_kill_urb(dev->urb_irq); cm109_stop_traffic() 504 cm109_toggle_buzzer_sync(dev, 0); cm109_stop_traffic() 506 dev->shutdown = 0; cm109_stop_traffic() 510 static void cm109_restore_state(struct cm109_dev dev) cm109_restore_state() argument 512 if (dev->open) { cm109_restore_state() 517 cm109_toggle_buzzer_async(dev); cm109_restore_state() 527 struct cm109_dev dev = input_get_drvdata(idev); cm109_input_open() local 530 error = usb_autopm_get_interface(dev->intf); cm109_input_open() 532 dev_err(&idev->dev, "%s - cannot autoresume, result %d\n", cm109_input_open() 537 mutex_lock(&dev->pm_mutex); cm109_input_open() 539 dev->buzzer_state = 0; cm109_input_open() 540 dev->key_code = -1; /* no keys pressed / cm109_input_open() 541 dev->keybit = 0xf; cm109_input_open() 544 dev->ctl_data->byte[HID_OR0] = HID_OR_GPO_BUZ_SPDIF; cm109_input_open() 545 dev->ctl_data->byte[HID_OR1] = dev->keybit; cm109_input_open() 546 dev->ctl_data->byte[HID_OR2] = dev->keybit; cm109_input_open() 547 dev->ctl_data->byte[HID_OR3] = 0x00; cm109_input_open() 549 error = usb_submit_urb(dev->urb_ctl, GFP_KERNEL); cm109_input_open() 551 dev_err(&dev->intf->dev, "%s: usb_submit_urb (urb_ctl) failed %d\n", cm109_input_open() 554 dev->open = 1; cm109_input_open() 556 mutex_unlock(&dev->pm_mutex); cm109_input_open() 559 usb_autopm_put_interface(dev->intf); cm109_input_open() 566 struct cm109_dev dev = input_get_drvdata(idev); cm109_input_close() local 568 mutex_lock(&dev->pm_mutex); cm109_input_close() 575 cm109_stop_traffic(dev); cm109_input_close() 576 dev->open = 0; cm109_input_close() 578 mutex_unlock(&dev->pm_mutex); cm109_input_close() 580 usb_autopm_put_interface(dev->intf); cm109_input_close() 586 struct cm109_dev dev = input_get_drvdata(idev); cm109_input_ev() local 588 dev_dbg(&dev->intf->dev, cm109_input_ev() 597 dev->buzzer_state = !!value; cm109_input_ev() 598 if (!dev->resetting) cm109_input_ev() 599 cm109_toggle_buzzer_async(dev); cm109_input_ev() 641 static void cm109_usb_cleanup(struct cm109_dev dev) cm109_usb_cleanup() argument 643 kfree(dev->ctl_req); cm109_usb_cleanup() 644 if (dev->ctl_data) cm109_usb_cleanup() 645 usb_free_coherent(dev->udev, USB_PKT_LEN, cm109_usb_cleanup() 646 dev->ctl_data, dev->ctl_dma); cm109_usb_cleanup() 647 if (dev->irq_data) cm109_usb_cleanup() 648 usb_free_coherent(dev->udev, USB_PKT_LEN, cm109_usb_cleanup() 649 dev->irq_data, dev->irq_dma); cm109_usb_cleanup() 651 usb_free_urb(dev->urb_irq); /* parameter validation in core/urb / cm109_usb_cleanup() 652 usb_free_urb(dev->urb_ctl); / parameter validation in core/urb / cm109_usb_cleanup() 653 kfree(dev); cm109_usb_cleanup() 658 struct cm109_dev dev = usb_get_intfdata(interface); cm109_usb_disconnect() local 661 input_unregister_device(dev->idev); cm109_usb_disconnect() 662 cm109_usb_cleanup(dev); cm109_usb_disconnect() 672 struct cm109_dev dev; cm109_usb_probe() local 683 dev = kzalloc(sizeof(dev), GFP_KERNEL); cm109_usb_probe() 684 if (!dev) cm109_usb_probe() 687 spin_lock_init(&dev->ctl_submit_lock); cm109_usb_probe() 688 mutex_init(&dev->pm_mutex); cm109_usb_probe() 690 dev->udev = udev; cm109_usb_probe() 691 dev->intf = intf; cm109_usb_probe() 693 dev->idev = input_dev = input_allocate_device(); cm109_usb_probe() 698 dev->irq_data = usb_alloc_coherent(udev, USB_PKT_LEN, cm109_usb_probe() 699 GFP_KERNEL, &dev->irq_dma); cm109_usb_probe() 700 if (!dev->irq_data) cm109_usb_probe() 703 dev->ctl_data = usb_alloc_coherent(udev, USB_PKT_LEN, cm109_usb_probe() 704 GFP_KERNEL, &dev->ctl_dma); cm109_usb_probe() 705 if (!dev->ctl_data) cm109_usb_probe() 708 dev->ctl_req = kmalloc(sizeof((dev->ctl_req)), GFP_KERNEL); cm109_usb_probe() 709 if (!dev->ctl_req) cm109_usb_probe() 713 dev->urb_irq = usb_alloc_urb(0, GFP_KERNEL); cm109_usb_probe() 714 if (!dev->urb_irq) cm109_usb_probe() 717 dev->urb_ctl = usb_alloc_urb(0, GFP_KERNEL); cm109_usb_probe() 718 if (!dev->urb_ctl) cm109_usb_probe() 725 dev_err(&intf->dev, "invalid payload size %d, expected %d\n", cm109_usb_probe() 729 usb_fill_int_urb(dev->urb_irq, udev, pipe, dev->irq_data, cm109_usb_probe() 731 cm109_urb_irq_callback, dev, endpoint->bInterval); cm109_usb_probe() 732 dev->urb_irq->transfer_dma = dev->irq_dma; cm109_usb_probe() 733 dev->urb_irq->transfer_flags \|= URB_NO_TRANSFER_DMA_MAP; cm109_usb_probe() 734 dev->urb_irq->dev = udev; cm109_usb_probe() 737 dev->ctl_req->bRequestType = USB_TYPE_CLASS \| USB_RECIP_INTERFACE \| cm109_usb_probe() 739 dev->ctl_req->bRequest = USB_REQ_SET_CONFIGURATION; cm109_usb_probe() 740 dev->ctl_req->wValue = cpu_to_le16(0x200); cm109_usb_probe() 741 dev->ctl_req->wIndex = cpu_to_le16(interface->desc.bInterfaceNumber); cm109_usb_probe() 742 dev->ctl_req->wLength = cpu_to_le16(USB_PKT_LEN); cm109_usb_probe() 744 usb_fill_control_urb(dev->urb_ctl, udev, usb_sndctrlpipe(udev, 0), cm109_usb_probe() 745 (void )dev->ctl_req, dev->ctl_data, USB_PKT_LEN, cm109_usb_probe() 746 cm109_urb_ctl_callback, dev); cm109_usb_probe() 747 dev->urb_ctl->transfer_dma = dev->ctl_dma; cm109_usb_probe() 748 dev->urb_ctl->transfer_flags \|= URB_NO_TRANSFER_DMA_MAP; cm109_usb_probe() 749 dev->urb_ctl->dev = udev; cm109_usb_probe() 752 usb_make_path(udev, dev->phys, sizeof(dev->phys)); cm109_usb_probe() 753 strlcat(dev->phys, "/input0", sizeof(dev->phys)); cm109_usb_probe() 757 input_dev->phys = dev->phys; cm109_usb_probe() 759 input_dev->dev.parent = &intf->dev; cm109_usb_probe() 761 input_set_drvdata(input_dev, dev); cm109_usb_probe() 766 input_dev->keycode = dev->keymap; cm109_usb_probe() 768 input_dev->keycodemax = ARRAY_SIZE(dev->keymap); cm109_usb_probe() 776 dev->keymap[i] = k; cm109_usb_probe() 781 error = input_register_device(dev->idev); cm109_usb_probe() 785 usb_set_intfdata(intf, dev); cm109_usb_probe() 791 cm109_usb_cleanup(dev); cm109_usb_probe() 797 struct cm109_dev dev = usb_get_intfdata(intf); cm109_usb_suspend() local 799 dev_info(&intf->dev, "cm109: usb_suspend (event=%d)\n", message.event); cm109_usb_suspend() 801 mutex_lock(&dev->pm_mutex); cm109_usb_suspend() 802 cm109_stop_traffic(dev); cm109_usb_suspend() 803 mutex_unlock(&dev->pm_mutex); cm109_usb_suspend() 810 struct cm109_dev dev = usb_get_intfdata(intf); cm109_usb_resume() local 812 dev_info(&intf->dev, "cm109: usb_resume\n"); cm109_usb_resume() 814 mutex_lock(&dev->pm_mutex); cm109_usb_resume() 815 cm109_restore_state(dev); cm109_usb_resume() 816 mutex_unlock(&dev->pm_mutex); cm109_usb_resume() 823 struct cm109_dev dev = usb_get_intfdata(intf); cm109_usb_pre_reset() local 825 mutex_lock(&dev->pm_mutex); cm109_usb_pre_reset() 831 dev->resetting = 1; cm109_usb_pre_reset() 834 cm109_stop_traffic(dev); cm109_usb_pre_reset() 841 struct cm109_dev dev = usb_get_intfdata(intf); cm109_usb_post_reset() local 843 dev->resetting = 0; cm109_usb_post_reset() 846 cm109_restore_state(dev); cm109_usb_post_reset() 848 mutex_unlock(&dev->pm_mutex); cm109_usb_post_reset()
/linux-4.1.27/drivers/media/pci/cx25821/
H A D	cx25821-audio-upstream.c	47 static int cx25821_sram_channel_setup_upstream_audio(struct cx25821_dev dev, cx25821_sram_channel_setup_upstream_audio() argument 102 static __le32 cx25821_risc_field_upstream_audio(struct cx25821_dev dev, cx25821_risc_field_upstream_audio() argument 110 dev->channels[dev->_audio_upstream_channel].sram_channels; cx25821_risc_field_upstream_audio() 136 static int cx25821_risc_buffer_upstream_audio(struct cx25821_dev dev, cx25821_risc_buffer_upstream_audio() argument 149 rp = dev->_risc_virt_addr; cx25821_risc_buffer_upstream_audio() 168 dev->_risc_phys_start_addr + cx25821_risc_buffer_upstream_audio() 172 dev->_risc_phys_start_addr + cx25821_risc_buffer_upstream_audio() 177 rp = cx25821_risc_field_upstream_audio(dev, rp, cx25821_risc_buffer_upstream_audio() 178 dev->_audiodata_buf_phys_addr + databuf_offset, cx25821_risc_buffer_upstream_audio() 193 rp = dev->_risc_virt_addr + RISC_SYNC_INSTRUCTION_SIZE / 4 + cx25821_risc_buffer_upstream_audio() 200 static void cx25821_free_memory_audio(struct cx25821_dev dev) cx25821_free_memory_audio() argument 202 if (dev->_risc_virt_addr) { cx25821_free_memory_audio() 203 pci_free_consistent(dev->pci, dev->_audiorisc_size, cx25821_free_memory_audio() 204 dev->_risc_virt_addr, dev->_risc_phys_addr); cx25821_free_memory_audio() 205 dev->_risc_virt_addr = NULL; cx25821_free_memory_audio() 208 if (dev->_audiodata_buf_virt_addr) { cx25821_free_memory_audio() 209 pci_free_consistent(dev->pci, dev->_audiodata_buf_size, cx25821_free_memory_audio() 210 dev->_audiodata_buf_virt_addr, cx25821_free_memory_audio() 211 dev->_audiodata_buf_phys_addr); cx25821_free_memory_audio() 212 dev->_audiodata_buf_virt_addr = NULL; cx25821_free_memory_audio() 216 void cx25821_stop_upstream_audio(struct cx25821_dev dev) cx25821_stop_upstream_audio() argument 219 dev->channels[AUDIO_UPSTREAM_SRAM_CHANNEL_B].sram_channels; cx25821_stop_upstream_audio() 222 if (!dev->_audio_is_running) { cx25821_stop_upstream_audio() 236 if (dev->_audiodata_buf_virt_addr) cx25821_stop_upstream_audio() 237 memset(dev->_audiodata_buf_virt_addr, 0, cx25821_stop_upstream_audio() 238 dev->_audiodata_buf_size); cx25821_stop_upstream_audio() 240 dev->_audio_is_running = 0; cx25821_stop_upstream_audio() 241 dev->_is_first_audio_frame = 0; cx25821_stop_upstream_audio() 242 dev->_audioframe_count = 0; cx25821_stop_upstream_audio() 243 dev->_audiofile_status = END_OF_FILE; cx25821_stop_upstream_audio() 245 kfree(dev->_irq_audio_queues); cx25821_stop_upstream_audio() 246 dev->_irq_audio_queues = NULL; cx25821_stop_upstream_audio() 248 kfree(dev->_audiofilename); cx25821_stop_upstream_audio() 251 void cx25821_free_mem_upstream_audio(struct cx25821_dev dev) cx25821_free_mem_upstream_audio() argument 253 if (dev->_audio_is_running) cx25821_free_mem_upstream_audio() 254 cx25821_stop_upstream_audio(dev); cx25821_free_mem_upstream_audio() 256 cx25821_free_memory_audio(dev); cx25821_free_mem_upstream_audio() 259 static int cx25821_get_audio_data(struct cx25821_dev dev, cx25821_get_audio_data() argument 263 int frame_index_temp = dev->_audioframe_index; cx25821_get_audio_data() 268 loff_t file_offset = dev->_audioframe_count * frame_size; cx25821_get_audio_data() 271 if (dev->_audiofile_status == END_OF_FILE) cx25821_get_audio_data() 274 file = filp_open(dev->_audiofilename, O_RDONLY \| O_LARGEFILE, 0); cx25821_get_audio_data() 277 __func__, dev->_audiofilename, -PTR_ERR(file)); cx25821_get_audio_data() 281 if (dev->_audiodata_buf_virt_addr) cx25821_get_audio_data() 282 p = (char )dev->_audiodata_buf_virt_addr + frame_offset; cx25821_get_audio_data() 284 for (i = 0; i < dev->_audio_lines_count; i++) { cx25821_get_audio_data() 289 dev->_audiofile_status = END_OF_FILE; cx25821_get_audio_data() 293 dev->_audiofile_status = IN_PROGRESS; cx25821_get_audio_data() 300 dev->_audioframe_count++; cx25821_get_audio_data() 308 struct cx25821_dev dev = container_of(work, struct cx25821_dev, cx25821_audioups_handler() local 311 if (!dev) { cx25821_audioups_handler() 317 cx25821_get_audio_data(dev, dev->channels[dev->_audio_upstream_channel]. cx25821_audioups_handler() 321 static int cx25821_openfile_audio(struct cx25821_dev dev, cx25821_openfile_audio() argument 324 char p = (void )dev->_audiodata_buf_virt_addr; cx25821_openfile_audio() 329 file = filp_open(dev->_audiofilename, O_RDONLY \| O_LARGEFILE, 0); cx25821_openfile_audio() 332 __func__, dev->_audiofilename, PTR_ERR(file)); cx25821_openfile_audio() 337 for (i = 0; i < dev->_audio_lines_count; i++) { cx25821_openfile_audio() 345 dev->_audiofile_status = END_OF_FILE; cx25821_openfile_audio() 355 dev->_audioframe_count++; cx25821_openfile_audio() 357 dev->_audiofile_status = IN_PROGRESS; cx25821_openfile_audio() 362 static int cx25821_audio_upstream_buffer_prepare(struct cx25821_dev dev, cx25821_audio_upstream_buffer_prepare() argument 370 cx25821_free_memory_audio(dev); cx25821_audio_upstream_buffer_prepare() 372 dev->_risc_virt_addr = pci_alloc_consistent(dev->pci, cx25821_audio_upstream_buffer_prepare() 373 dev->audio_upstream_riscbuf_size, &dma_addr); cx25821_audio_upstream_buffer_prepare() 374 dev->_risc_virt_start_addr = dev->_risc_virt_addr; cx25821_audio_upstream_buffer_prepare() 375 dev->_risc_phys_start_addr = dma_addr; cx25821_audio_upstream_buffer_prepare() 376 dev->_risc_phys_addr = dma_addr; cx25821_audio_upstream_buffer_prepare() 377 dev->_audiorisc_size = dev->audio_upstream_riscbuf_size; cx25821_audio_upstream_buffer_prepare() 379 if (!dev->_risc_virt_addr) { cx25821_audio_upstream_buffer_prepare() 385 memset(dev->_risc_virt_addr, 0, dev->_audiorisc_size); cx25821_audio_upstream_buffer_prepare() 388 dev->_audiodata_buf_virt_addr = pci_alloc_consistent(dev->pci, cx25821_audio_upstream_buffer_prepare() 389 dev->audio_upstream_databuf_size, &data_dma_addr); cx25821_audio_upstream_buffer_prepare() 390 dev->_audiodata_buf_phys_addr = data_dma_addr; cx25821_audio_upstream_buffer_prepare() 391 dev->_audiodata_buf_size = dev->audio_upstream_databuf_size; cx25821_audio_upstream_buffer_prepare() 393 if (!dev->_audiodata_buf_virt_addr) { cx25821_audio_upstream_buffer_prepare() 399 memset(dev->_audiodata_buf_virt_addr, 0, dev->_audiodata_buf_size); cx25821_audio_upstream_buffer_prepare() 401 ret = cx25821_openfile_audio(dev, sram_ch); cx25821_audio_upstream_buffer_prepare() 406 ret = cx25821_risc_buffer_upstream_audio(dev, dev->pci, bpl, cx25821_audio_upstream_buffer_prepare() 407 dev->_audio_lines_count); cx25821_audio_upstream_buffer_prepare() 420 static int cx25821_audio_upstream_irq(struct cx25821_dev dev, int chan_num, cx25821_audio_upstream_irq() argument 425 const struct sram_channel channel = dev->channels[chan_num].sram_channels; cx25821_audio_upstream_irq() 438 spin_lock(&dev->slock); cx25821_audio_upstream_irq() 440 while (prog_cnt != dev->_last_index_irq) { cx25821_audio_upstream_irq() 442 if (dev->_last_index_irq < (NUMBER_OF_PROGRAMS - 1)) cx25821_audio_upstream_irq() 443 dev->_last_index_irq++; cx25821_audio_upstream_irq() 445 dev->_last_index_irq = 0; cx25821_audio_upstream_irq() 447 dev->_audioframe_index = dev->_last_index_irq; cx25821_audio_upstream_irq() 449 queue_work(dev->_irq_audio_queues, cx25821_audio_upstream_irq() 450 &dev->_audio_work_entry); cx25821_audio_upstream_irq() 453 if (dev->_is_first_audio_frame) { cx25821_audio_upstream_irq() 454 dev->_is_first_audio_frame = 0; cx25821_audio_upstream_irq() 456 if (dev->_risc_virt_start_addr != NULL) { cx25821_audio_upstream_irq() 458 dev->_risc_phys_start_addr + cx25821_audio_upstream_irq() 462 rp = cx25821_risc_field_upstream_audio(dev, cx25821_audio_upstream_irq() 463 dev->_risc_virt_start_addr + 1, cx25821_audio_upstream_irq() 464 dev->_audiodata_buf_phys_addr, cx25821_audio_upstream_irq() 481 spin_unlock(&dev->slock); cx25821_audio_upstream_irq() 500 if (dev->_audiofile_status == END_OF_FILE) { cx25821_audio_upstream_irq() 502 dev->_audioframe_count); cx25821_audio_upstream_irq() 514 struct cx25821_dev dev = dev_id; cx25821_upstream_irq_audio() local 519 if (!dev) cx25821_upstream_irq_audio() 522 sram_ch = dev->channels[dev->_audio_upstream_channel].sram_channels; cx25821_upstream_irq_audio() 528 handled = cx25821_audio_upstream_irq(dev, cx25821_upstream_irq_audio() 529 dev->_audio_upstream_channel, audio_status); cx25821_upstream_irq_audio() 533 cx25821_stop_upstream_audio(dev); cx25821_upstream_irq_audio() 540 static void cx25821_wait_fifo_enable(struct cx25821_dev dev, cx25821_wait_fifo_enable() argument 564 static int cx25821_start_audio_dma_upstream(struct cx25821_dev dev, cx25821_start_audio_dma_upstream() argument 572 cx_write(sram_ch->cmds_start + 0, dev->_risc_phys_addr); cx25821_start_audio_dma_upstream() 602 err = request_irq(dev->pci->irq, cx25821_upstream_irq_audio, cx25821_start_audio_dma_upstream() 603 IRQF_SHARED, dev->name, dev); cx25821_start_audio_dma_upstream() 605 pr_err("%s: can't get upstream IRQ %d\n", dev->name, cx25821_start_audio_dma_upstream() 606 dev->pci->irq); cx25821_start_audio_dma_upstream() 614 dev->_audio_is_running = 1; cx25821_start_audio_dma_upstream() 615 dev->_is_first_audio_frame = 1; cx25821_start_audio_dma_upstream() 618 cx25821_wait_fifo_enable(dev, sram_ch); cx25821_start_audio_dma_upstream() 623 cx25821_dev_unregister(dev); cx25821_start_audio_dma_upstream() 627 int cx25821_audio_upstream_init(struct cx25821_dev dev, int channel_select) cx25821_audio_upstream_init() argument 632 if (dev->_audio_is_running) { cx25821_audio_upstream_init() 637 dev->_audio_upstream_channel = channel_select; cx25821_audio_upstream_init() 638 sram_ch = dev->channels[channel_select].sram_channels; cx25821_audio_upstream_init() 641 INIT_WORK(&dev->_audio_work_entry, cx25821_audioups_handler); cx25821_audio_upstream_init() 642 dev->_irq_audio_queues = cx25821_audio_upstream_init() 645 if (!dev->_irq_audio_queues) { cx25821_audio_upstream_init() 651 dev->_last_index_irq = 0; cx25821_audio_upstream_init() 652 dev->_audio_is_running = 0; cx25821_audio_upstream_init() 653 dev->_audioframe_count = 0; cx25821_audio_upstream_init() 654 dev->_audiofile_status = RESET_STATUS; cx25821_audio_upstream_init() 655 dev->_audio_lines_count = LINES_PER_AUDIO_BUFFER; cx25821_audio_upstream_init() 658 if ((dev->input_audiofilename) && cx25821_audio_upstream_init() 659 (strcmp(dev->input_audiofilename, "") != 0)) cx25821_audio_upstream_init() 660 dev->_audiofilename = kstrdup(dev->input_audiofilename, cx25821_audio_upstream_init() 663 dev->_audiofilename = kstrdup(_defaultAudioName, cx25821_audio_upstream_init() 666 if (!dev->_audiofilename) { cx25821_audio_upstream_init() 671 cx25821_sram_channel_setup_upstream_audio(dev, sram_ch, cx25821_audio_upstream_init() 674 dev->audio_upstream_riscbuf_size = cx25821_audio_upstream_init() 677 dev->audio_upstream_databuf_size = AUDIO_DATA_BUF_SZ * NUM_AUDIO_PROGS; cx25821_audio_upstream_init() 680 err = cx25821_audio_upstream_buffer_prepare(dev, sram_ch, cx25821_audio_upstream_init() 684 dev->name); cx25821_audio_upstream_init() 688 cx25821_start_audio_dma_upstream(dev, sram_ch); cx25821_audio_upstream_init() 693 cx25821_dev_unregister(dev); cx25821_audio_upstream_init()
/linux-4.1.27/include/uapi/linux/
H A D	sound.h	10 #define SND_DEV_CTL 0 /* Control port /dev/mixer / 11 #define SND_DEV_SEQ 1 / Sequencer output /dev/sequencer (FM 14 #define SND_DEV_DSP 3 /* Digitized voice /dev/dsp / 15 #define SND_DEV_AUDIO 4 / Sparc compatible /dev/audio / 16 #define SND_DEV_DSP16 5 / Like /dev/dsp but 16 bits/sample / 17 / #define SND_DEV_STATUS 6 / / /dev/sndstat (obsolete) / 20 #define SND_DEV_SEQ2 8 / /dev/sequencer, level 2 interface / 21 / #define SND_DEV_SNDPROC 9 / / /dev/sndproc for programmable devices (not used) / 23 #define SND_DEV_SYNTH 9 / Raw synth access /dev/synth (same as /dev/dmfm) / 24 #define SND_DEV_DMFM 10 / Raw synth access /dev/dmfm / 26 #define SND_DEV_ADSP 12 / Like /dev/dsp (obsolete) / 27 #define SND_DEV_AMIDI 13 / Like /dev/midi (obsolete) / 28 #define SND_DEV_ADMMIDI 14 / Like /dev/dmmidi (onsolete) */
/linux-4.1.27/drivers/pci/
H A D	iov.c	22 int pci_iov_virtfn_bus(struct pci_dev dev, int vf_id) pci_iov_virtfn_bus() argument 24 if (!dev->is_physfn) pci_iov_virtfn_bus() 26 return dev->bus->number + ((dev->devfn + dev->sriov->offset + pci_iov_virtfn_bus() 27 dev->sriov->stride vf_id) >> 8); pci_iov_virtfn_bus() 30 int pci_iov_virtfn_devfn(struct pci_dev dev, int vf_id) pci_iov_virtfn_devfn() argument 32 if (!dev->is_physfn) pci_iov_virtfn_devfn() 34 return (dev->devfn + dev->sriov->offset + pci_iov_virtfn_devfn() 35 dev->sriov->stride vf_id) & 0xff; pci_iov_virtfn_devfn() 44 static inline void pci_iov_set_numvfs(struct pci_dev dev, int nr_virtfn) pci_iov_set_numvfs() argument 46 struct pci_sriov iov = dev->sriov; pci_iov_set_numvfs() 48 pci_write_config_word(dev, iov->pos + PCI_SRIOV_NUM_VF, nr_virtfn); pci_iov_set_numvfs() 49 pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_OFFSET, &iov->offset); pci_iov_set_numvfs() 50 pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_STRIDE, &iov->stride); pci_iov_set_numvfs() 60 static inline u8 virtfn_max_buses(struct pci_dev dev) virtfn_max_buses() argument 62 struct pci_sriov iov = dev->sriov; virtfn_max_buses() 68 pci_iov_set_numvfs(dev, nr_virtfn); virtfn_max_buses() 69 busnr = pci_iov_virtfn_bus(dev, nr_virtfn - 1); virtfn_max_buses() 103 resource_size_t pci_iov_resource_size(struct pci_dev dev, int resno) pci_iov_resource_size() argument 105 if (!dev->is_physfn) pci_iov_resource_size() 108 return dev->sriov->barsz[resno - PCI_IOV_RESOURCES]; pci_iov_resource_size() 111 static int virtfn_add(struct pci_dev dev, int id, int reset) virtfn_add() argument 119 struct pci_sriov iov = dev->sriov; virtfn_add() 122 mutex_lock(&iov->dev->sriov->lock); virtfn_add() 123 bus = virtfn_add_bus(dev->bus, pci_iov_virtfn_bus(dev, id)); virtfn_add() 131 virtfn->devfn = pci_iov_virtfn_devfn(dev, id); virtfn_add() 132 virtfn->vendor = dev->vendor; virtfn_add() 133 pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_DID, &virtfn->device); virtfn_add() 135 virtfn->dev.parent = dev->dev.parent; virtfn_add() 136 virtfn->physfn = pci_dev_get(dev); virtfn_add() 141 res = &dev->resource[i + PCI_IOV_RESOURCES]; virtfn_add() 146 size = pci_iov_resource_size(dev, i + PCI_IOV_RESOURCES); virtfn_add() 157 mutex_unlock(&iov->dev->sriov->lock); virtfn_add() 161 rc = sysfs_create_link(&dev->dev.kobj, &virtfn->dev.kobj, buf); virtfn_add() 164 rc = sysfs_create_link(&virtfn->dev.kobj, &dev->dev.kobj, "physfn"); virtfn_add() 168 kobject_uevent(&virtfn->dev.kobj, KOBJ_CHANGE); virtfn_add() 173 sysfs_remove_link(&dev->dev.kobj, buf); virtfn_add() 175 pci_dev_put(dev); virtfn_add() 176 mutex_lock(&iov->dev->sriov->lock); virtfn_add() 179 virtfn_remove_bus(dev->bus, bus); virtfn_add() 181 mutex_unlock(&iov->dev->sriov->lock); virtfn_add() 186 static void virtfn_remove(struct pci_dev dev, int id, int reset) virtfn_remove() argument 190 struct pci_sriov iov = dev->sriov; virtfn_remove() 192 virtfn = pci_get_domain_bus_and_slot(pci_domain_nr(dev->bus), virtfn_remove() 193 pci_iov_virtfn_bus(dev, id), virtfn_remove() 194 pci_iov_virtfn_devfn(dev, id)); virtfn_remove() 199 device_release_driver(&virtfn->dev); virtfn_remove() 204 sysfs_remove_link(&dev->dev.kobj, buf); virtfn_remove() 210 if (virtfn->dev.kobj.sd) virtfn_remove() 211 sysfs_remove_link(&virtfn->dev.kobj, "physfn"); virtfn_remove() 213 mutex_lock(&iov->dev->sriov->lock); virtfn_remove() 215 virtfn_remove_bus(dev->bus, virtfn->bus); virtfn_remove() 216 mutex_unlock(&iov->dev->sriov->lock); virtfn_remove() 220 pci_dev_put(dev); virtfn_remove() 228 static int sriov_enable(struct pci_dev dev, int nr_virtfn) sriov_enable() argument 236 struct pci_sriov iov = dev->sriov; sriov_enable() 247 pci_read_config_word(dev, iov->pos + PCI_SRIOV_INITIAL_VF, &initial); sriov_enable() 256 pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_OFFSET, &offset); sriov_enable() 257 pci_read_config_word(dev, iov->pos + PCI_SRIOV_VF_STRIDE, &stride); sriov_enable() 264 res = &dev->resource[i + PCI_IOV_RESOURCES]; sriov_enable() 269 dev_err(&dev->dev, "not enough MMIO resources for SR-IOV\n"); sriov_enable() 276 bus = pci_iov_virtfn_bus(dev, nr_virtfn - 1); sriov_enable() 277 if (bus > dev->bus->busn_res.end) { sriov_enable() 278 dev_err(&dev->dev, "can't enable %d VFs (bus %02x out of range of %pR)\n", sriov_enable() 279 nr_virtfn, bus, &dev->bus->busn_res); sriov_enable() 283 if (pci_enable_resources(dev, bars)) { sriov_enable() 284 dev_err(&dev->dev, "SR-IOV: IOV BARS not allocated\n"); sriov_enable() 288 if (iov->link != dev->devfn) { sriov_enable() 289 pdev = pci_get_slot(dev->bus, iov->link); sriov_enable() 298 rc = sysfs_create_link(&dev->dev.kobj, sriov_enable() 299 &pdev->dev.kobj, "dep_link"); sriov_enable() 305 pci_iov_set_numvfs(dev, nr_virtfn); sriov_enable() 307 pci_cfg_access_lock(dev); sriov_enable() 308 pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl); sriov_enable() 310 pci_cfg_access_unlock(dev); sriov_enable() 316 if ((retval = pcibios_sriov_enable(dev, initial))) { sriov_enable() 317 dev_err(&dev->dev, "failure %d from pcibios_sriov_enable()\n", sriov_enable() 323 rc = virtfn_add(dev, i, 0); sriov_enable() 328 kobject_uevent(&dev->dev.kobj, KOBJ_CHANGE); sriov_enable() 335 virtfn_remove(dev, j, 0); sriov_enable() 338 pci_cfg_access_lock(dev); sriov_enable() 339 pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl); sriov_enable() 340 pci_iov_set_numvfs(dev, 0); sriov_enable() 342 pci_cfg_access_unlock(dev); sriov_enable() 344 if (iov->link != dev->devfn) sriov_enable() 345 sysfs_remove_link(&dev->dev.kobj, "dep_link"); sriov_enable() 355 static void sriov_disable(struct pci_dev dev) sriov_disable() argument 358 struct pci_sriov iov = dev->sriov; sriov_disable() 364 virtfn_remove(dev, i, 0); sriov_disable() 366 pcibios_sriov_disable(dev); sriov_disable() 369 pci_cfg_access_lock(dev); sriov_disable() 370 pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl); sriov_disable() 372 pci_cfg_access_unlock(dev); sriov_disable() 374 if (iov->link != dev->devfn) sriov_disable() 375 sysfs_remove_link(&dev->dev.kobj, "dep_link"); sriov_disable() 378 pci_iov_set_numvfs(dev, 0); sriov_disable() 381 static int sriov_init(struct pci_dev dev, int pos) sriov_init() argument 392 if (pci_pcie_type(dev) != PCI_EXP_TYPE_RC_END && sriov_init() 393 pci_pcie_type(dev) != PCI_EXP_TYPE_ENDPOINT) sriov_init() 396 pci_read_config_word(dev, pos + PCI_SRIOV_CTRL, &ctrl); sriov_init() 398 pci_write_config_word(dev, pos + PCI_SRIOV_CTRL, 0); sriov_init() 402 pci_read_config_word(dev, pos + PCI_SRIOV_TOTAL_VF, &total); sriov_init() 407 list_for_each_entry(pdev, &dev->bus->devices, bus_list) sriov_init() 412 if (pci_ari_enabled(dev->bus)) sriov_init() 416 pci_write_config_word(dev, pos + PCI_SRIOV_CTRL, ctrl); sriov_init() 417 pci_write_config_word(dev, pos + PCI_SRIOV_NUM_VF, 0); sriov_init() 418 pci_read_config_word(dev, pos + PCI_SRIOV_VF_OFFSET, &offset); sriov_init() 419 pci_read_config_word(dev, pos + PCI_SRIOV_VF_STRIDE, &stride); sriov_init() 423 pci_read_config_dword(dev, pos + PCI_SRIOV_SUP_PGSIZE, &pgsz); sriov_init() 430 pci_write_config_dword(dev, pos + PCI_SRIOV_SYS_PGSIZE, pgsz); sriov_init() 438 res = &dev->resource[i + PCI_IOV_RESOURCES]; sriov_init() 439 bar64 = __pci_read_base(dev, pci_bar_unknown, res, sriov_init() 449 dev_info(&dev->dev, "VF(n) BAR%d space: %pR (contains BAR%d for %d VFs)\n", sriov_init() 462 iov->self = dev; sriov_init() 463 pci_read_config_dword(dev, pos + PCI_SRIOV_CAP, &iov->cap); sriov_init() 464 pci_read_config_byte(dev, pos + PCI_SRIOV_FUNC_LINK, &iov->link); sriov_init() 465 if (pci_pcie_type(dev) == PCI_EXP_TYPE_RC_END) sriov_init() 466 iov->link = PCI_DEVFN(PCI_SLOT(dev->devfn), iov->link); sriov_init() 469 iov->dev = pci_dev_get(pdev); sriov_init() 471 iov->dev = dev; sriov_init() 475 dev->sriov = iov; sriov_init() 476 dev->is_physfn = 1; sriov_init() 477 iov->max_VF_buses = virtfn_max_buses(dev); sriov_init() 483 res = &dev->resource[i + PCI_IOV_RESOURCES]; sriov_init() 491 static void sriov_release(struct pci_dev dev) sriov_release() argument 493 BUG_ON(dev->sriov->num_VFs); sriov_release() 495 if (dev != dev->sriov->dev) sriov_release() 496 pci_dev_put(dev->sriov->dev); sriov_release() 498 mutex_destroy(&dev->sriov->lock); sriov_release() 500 kfree(dev->sriov); sriov_release() 501 dev->sriov = NULL; sriov_release() 504 static void sriov_restore_state(struct pci_dev dev) sriov_restore_state() argument 508 struct pci_sriov iov = dev->sriov; sriov_restore_state() 510 pci_read_config_word(dev, iov->pos + PCI_SRIOV_CTRL, &ctrl); sriov_restore_state() 515 pci_update_resource(dev, i); sriov_restore_state() 517 pci_write_config_dword(dev, iov->pos + PCI_SRIOV_SYS_PGSIZE, iov->pgsz); sriov_restore_state() 518 pci_iov_set_numvfs(dev, iov->num_VFs); sriov_restore_state() 519 pci_write_config_word(dev, iov->pos + PCI_SRIOV_CTRL, iov->ctrl); sriov_restore_state() 526 @dev: the PCI device 530 int pci_iov_init(struct pci_dev dev) pci_iov_init() argument 534 if (!pci_is_pcie(dev)) pci_iov_init() 537 pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_SRIOV); pci_iov_init() 539 return sriov_init(dev, pos); pci_iov_init() 546 @dev: the PCI device 548 void pci_iov_release(struct pci_dev dev) pci_iov_release() argument 550 if (dev->is_physfn) pci_iov_release() 551 sriov_release(dev); pci_iov_release() 556 @dev: the PCI device 561 int pci_iov_resource_bar(struct pci_dev dev, int resno) pci_iov_resource_bar() argument 566 BUG_ON(!dev->is_physfn); pci_iov_resource_bar() 568 return dev->sriov->pos + PCI_SRIOV_BAR + pci_iov_resource_bar() 572 resource_size_t __weak pcibios_iov_resource_alignment(struct pci_dev dev, pcibios_iov_resource_alignment() argument 575 return pci_iov_resource_size(dev, resno); pcibios_iov_resource_alignment() 580 * @dev: the PCI device 588 resource_size_t pci_sriov_resource_alignment(struct pci_dev dev, int resno) pci_sriov_resource_alignment() argument 590 return pcibios_iov_resource_alignment(dev, resno); pci_sriov_resource_alignment() 595 @dev: the PCI device 597 void pci_restore_iov_state(struct pci_dev dev) pci_restore_iov_state() argument 599 if (dev->is_physfn) pci_restore_iov_state() 600 sriov_restore_state(dev); pci_restore_iov_state() 613 struct pci_dev dev; pci_iov_bus_range() local 615 list_for_each_entry(dev, &bus->devices, bus_list) { pci_iov_bus_range() 616 if (!dev->is_physfn) pci_iov_bus_range() 618 if (dev->sriov->max_VF_buses > max) pci_iov_bus_range() 619 max = dev->sriov->max_VF_buses; pci_iov_bus_range() 627 * @dev: the PCI device 632 int pci_enable_sriov(struct pci_dev dev, int nr_virtfn) pci_enable_sriov() argument 636 if (!dev->is_physfn) pci_enable_sriov() 639 return sriov_enable(dev, nr_virtfn); pci_enable_sriov() 645 @dev: the PCI device 647 void pci_disable_sriov(struct pci_dev dev) pci_disable_sriov() argument 651 if (!dev->is_physfn) pci_disable_sriov() 654 sriov_disable(dev); pci_disable_sriov() 660 @dev: the PCI device 664 int pci_num_vf(struct pci_dev dev) pci_num_vf() argument 666 if (!dev->is_physfn) pci_num_vf() 669 return dev->sriov->num_VFs; pci_num_vf() 675 @dev: the PCI device 680 int pci_vfs_assigned(struct pci_dev dev) pci_vfs_assigned() argument 687 if (!dev->is_physfn) pci_vfs_assigned() 694 pci_read_config_word(dev, dev->sriov->pos + PCI_SRIOV_VF_DID, &dev_id); pci_vfs_assigned() 697 vfdev = pci_get_device(dev->vendor, dev_id, NULL); pci_vfs_assigned() 701 our dev as the physical function and the assigned bit is set pci_vfs_assigned() 703 if (vfdev->is_virtfn && (vfdev->physfn == dev) && pci_vfs_assigned() 707 vfdev = pci_get_device(dev->vendor, dev_id, vfdev); pci_vfs_assigned() 716 * @dev: the PCI PF device 727 int pci_sriov_set_totalvfs(struct pci_dev dev, u16 numvfs) pci_sriov_set_totalvfs() argument 729 if (!dev->is_physfn) pci_sriov_set_totalvfs() 731 if (numvfs > dev->sriov->total_VFs) pci_sriov_set_totalvfs() 735 if (dev->sriov->ctrl & PCI_SRIOV_CTRL_VFE) pci_sriov_set_totalvfs() 738 dev->sriov->driver_max_VFs = numvfs; pci_sriov_set_totalvfs() 746 @dev: the PCI PF device 752 int pci_sriov_get_totalvfs(struct pci_dev *dev) pci_sriov_get_totalvfs() argument 754 if (!dev->is_physfn) pci_sriov_get_totalvfs() 757 if (dev->sriov->driver_max_VFs) pci_sriov_get_totalvfs() 758 return dev->sriov->driver_max_VFs; pci_sriov_get_totalvfs() 760 return dev->sriov->total_VFs; pci_sriov_get_totalvfs()
H A D	remove.c	6 static void pci_free_resources(struct pci_dev dev) pci_free_resources() argument 10 pci_cleanup_rom(dev); pci_free_resources() 12 struct resource res = dev->resource + i; pci_free_resources() 18 static void pci_stop_dev(struct pci_dev dev) pci_stop_dev() argument 20 pci_pme_active(dev, false); pci_stop_dev() 22 if (dev->is_added) { pci_stop_dev() 23 pci_proc_detach_device(dev); pci_stop_dev() 24 pci_remove_sysfs_dev_files(dev); pci_stop_dev() 25 device_release_driver(&dev->dev); pci_stop_dev() 26 dev->is_added = 0; pci_stop_dev() 29 if (dev->bus->self) pci_stop_dev() 30 pcie_aspm_exit_link_state(dev); pci_stop_dev() 33 static void pci_destroy_dev(struct pci_dev dev) pci_destroy_dev() argument 35 if (!dev->dev.kobj.parent) pci_destroy_dev() 38 device_del(&dev->dev); pci_destroy_dev() 41 list_del(&dev->bus_list); pci_destroy_dev() 44 pci_free_resources(dev); pci_destroy_dev() 45 put_device(&dev->dev); pci_destroy_dev() 58 device_unregister(&bus->dev); pci_remove_bus() 62 static void pci_stop_bus_device(struct pci_dev dev) pci_stop_bus_device() argument 64 struct pci_bus bus = dev->subordinate; pci_stop_bus_device() 79 pci_stop_dev(dev); pci_stop_bus_device() 82 static void pci_remove_bus_device(struct pci_dev dev) pci_remove_bus_device() argument 84 struct pci_bus bus = dev->subordinate; pci_remove_bus_device() 93 dev->subordinate = NULL; pci_remove_bus_device() 96 pci_destroy_dev(dev); pci_remove_bus_device() 101 * @dev: the device to remove 111 void pci_stop_and_remove_bus_device(struct pci_dev dev) pci_stop_and_remove_bus_device() argument 113 pci_stop_bus_device(dev); pci_stop_and_remove_bus_device() 114 pci_remove_bus_device(dev); pci_stop_and_remove_bus_device() 118 void pci_stop_and_remove_bus_device_locked(struct pci_dev dev) pci_stop_and_remove_bus_device_locked() argument 121 pci_stop_and_remove_bus_device(dev); pci_stop_and_remove_bus_device_locked() 140 device_release_driver(&host_bridge->dev); pci_stop_root_bus() 160 device_unregister(&host_bridge->dev); pci_remove_root_bus()
H A D	of.c	18 void pci_set_of_node(struct pci_dev dev) pci_set_of_node() argument 20 if (!dev->bus->dev.of_node) pci_set_of_node() 22 dev->dev.of_node = of_pci_find_child_device(dev->bus->dev.of_node, pci_set_of_node() 23 dev->devfn); pci_set_of_node() 26 void pci_release_of_node(struct pci_dev dev) pci_release_of_node() argument 28 of_node_put(dev->dev.of_node); pci_release_of_node() 29 dev->dev.of_node = NULL; pci_release_of_node() 35 bus->dev.of_node = pcibios_get_phb_of_node(bus); pci_set_bus_of_node() 37 bus->dev.of_node = of_node_get(bus->self->dev.of_node); pci_set_bus_of_node() 42 of_node_put(bus->dev.of_node); pci_release_bus_of_node() 43 bus->dev.of_node = NULL; pci_release_bus_of_node()
/linux-4.1.27/drivers/media/usb/stk1160/
H A D	stk1160-v4l.c	54 static void stk1160_set_std(struct stk1160 dev) stk1160_set_std() argument 97 if (dev->norm & V4L2_STD_525_60) { stk1160_set_std() 100 stk1160_write_reg(dev, std525[i].reg, std525[i].val); stk1160_set_std() 104 stk1160_write_reg(dev, std625[i].reg, std625[i].val); stk1160_set_std() 111 Returns true is dev->max_pkt_size has changed, false otherwise. 113 static bool stk1160_set_alternate(struct stk1160 dev) stk1160_set_alternate() argument 115 int i, prev_alt = dev->alt; stk1160_set_alternate() 125 for (i = 0; i < dev->num_alt; i++) { stk1160_set_alternate() 127 if (dev->alt_max_pkt_size[i] >= min_pkt_size) { stk1160_set_alternate() 128 dev->alt = i; stk1160_set_alternate() 134 } else if (dev->alt_max_pkt_size[i] > stk1160_set_alternate() 135 dev->alt_max_pkt_size[dev->alt]) stk1160_set_alternate() 136 dev->alt = i; stk1160_set_alternate() 139 stk1160_info("setting alternate %d\n", dev->alt); stk1160_set_alternate() 141 if (dev->alt != prev_alt) { stk1160_set_alternate() 143 min_pkt_size, dev->alt); stk1160_set_alternate() 145 dev->alt, dev->alt_max_pkt_size[dev->alt]); stk1160_set_alternate() 146 usb_set_interface(dev->udev, 0, dev->alt); stk1160_set_alternate() 149 new_pkt_size = dev->max_pkt_size != dev->alt_max_pkt_size[dev->alt]; stk1160_set_alternate() 150 dev->max_pkt_size = dev->alt_max_pkt_size[dev->alt]; stk1160_set_alternate() 155 static int stk1160_start_streaming(struct stk1160 dev) stk1160_start_streaming() argument 162 if (!dev->udev) stk1160_start_streaming() 165 if (mutex_lock_interruptible(&dev->v4l_lock)) stk1160_start_streaming() 172 new_pkt_size = stk1160_set_alternate(dev); stk1160_start_streaming() 177 * a new dev->max_pkt_size is detected stk1160_start_streaming() 179 if (!dev->isoc_ctl.num_bufs \|\| new_pkt_size) { stk1160_start_streaming() 180 rc = stk1160_alloc_isoc(dev); stk1160_start_streaming() 186 for (i = 0; i < dev->isoc_ctl.num_bufs; i++) { stk1160_start_streaming() 187 rc = usb_submit_urb(dev->isoc_ctl.urb[i], GFP_KERNEL); stk1160_start_streaming() 195 v4l2_device_call_all(&dev->v4l2_dev, 0, video, s_stream, 1); stk1160_start_streaming() 198 stk1160_write_reg(dev, STK1160_DCTRL, 0xb3); stk1160_start_streaming() 199 stk1160_write_reg(dev, STK1160_DCTRL+3, 0x00); stk1160_start_streaming() 203 mutex_unlock(&dev->v4l_lock); stk1160_start_streaming() 208 stk1160_uninit_isoc(dev); stk1160_start_streaming() 210 usb_set_interface(dev->udev, 0, 0); stk1160_start_streaming() 211 stk1160_clear_queue(dev); stk1160_start_streaming() 213 mutex_unlock(&dev->v4l_lock); stk1160_start_streaming() 219 static void stk1160_stop_hw(struct stk1160 dev) stk1160_stop_hw() argument 222 if (!dev->udev) stk1160_stop_hw() 226 dev->alt = 0; stk1160_stop_hw() 227 stk1160_info("setting alternate %d\n", dev->alt); stk1160_stop_hw() 228 usb_set_interface(dev->udev, 0, 0); stk1160_stop_hw() 231 stk1160_write_reg(dev, STK1160_DCTRL, 0x00); stk1160_stop_hw() 232 stk1160_write_reg(dev, STK1160_DCTRL+3, 0x00); stk1160_stop_hw() 235 v4l2_device_call_all(&dev->v4l2_dev, 0, video, s_stream, 0); stk1160_stop_hw() 238 static int stk1160_stop_streaming(struct stk1160 dev) stk1160_stop_streaming() argument 240 if (mutex_lock_interruptible(&dev->v4l_lock)) stk1160_stop_streaming() 246 * current buffer (dev->isoc_ctl.buf). stk1160_stop_streaming() 248 stk1160_cancel_isoc(dev); stk1160_stop_streaming() 255 stk1160_free_isoc(dev); stk1160_stop_streaming() 257 stk1160_stop_hw(dev); stk1160_stop_streaming() 259 stk1160_clear_queue(dev); stk1160_stop_streaming() 263 mutex_unlock(&dev->v4l_lock); stk1160_stop_streaming() 284 struct stk1160 dev = video_drvdata(file); vidioc_querycap() local 288 usb_make_path(dev->udev, cap->bus_info, sizeof(cap->bus_info)); vidioc_querycap() 311 struct stk1160 dev = video_drvdata(file); vidioc_g_fmt_vid_cap() local 313 f->fmt.pix.width = dev->width; vidioc_g_fmt_vid_cap() 314 f->fmt.pix.height = dev->height; vidioc_g_fmt_vid_cap() 316 f->fmt.pix.pixelformat = dev->fmt->fourcc; vidioc_g_fmt_vid_cap() 317 f->fmt.pix.bytesperline = dev->width * 2; vidioc_g_fmt_vid_cap() 318 f->fmt.pix.sizeimage = dev->height * f->fmt.pix.bytesperline; vidioc_g_fmt_vid_cap() 327 struct stk1160 dev = video_drvdata(file); vidioc_try_fmt_vid_cap() local 336 f->fmt.pix.pixelformat = dev->fmt->fourcc; vidioc_try_fmt_vid_cap() 337 f->fmt.pix.width = dev->width; vidioc_try_fmt_vid_cap() 338 f->fmt.pix.height = dev->height; vidioc_try_fmt_vid_cap() 340 f->fmt.pix.bytesperline = dev->width 2; vidioc_try_fmt_vid_cap() 341 f->fmt.pix.sizeimage = dev->height * f->fmt.pix.bytesperline; vidioc_try_fmt_vid_cap() 350 struct stk1160 dev = video_drvdata(file); vidioc_s_fmt_vid_cap() local 351 struct vb2_queue q = &dev->vb_vidq; vidioc_s_fmt_vid_cap() 365 struct stk1160 dev = video_drvdata(file); vidioc_querystd() local 366 v4l2_device_call_all(&dev->v4l2_dev, 0, video, querystd, norm); vidioc_querystd() 372 struct stk1160 dev = video_drvdata(file); vidioc_g_std() local 374 norm = dev->norm; vidioc_g_std() 380 struct stk1160 dev = video_drvdata(file); vidioc_s_std() local 381 struct vb2_queue q = &dev->vb_vidq; vidioc_s_std() 383 if (dev->norm == norm) vidioc_s_std() 390 if (!dev->udev) vidioc_s_std() 394 dev->norm = norm; vidioc_s_std() 397 if (dev->norm & V4L2_STD_525_60) { vidioc_s_std() 398 dev->width = 720; vidioc_s_std() 399 dev->height = 480; vidioc_s_std() 400 } else if (dev->norm & V4L2_STD_625_50) { vidioc_s_std() 401 dev->width = 720; vidioc_s_std() 402 dev->height = 576; vidioc_s_std() 408 stk1160_set_std(dev); vidioc_s_std() 410 v4l2_device_call_all(&dev->v4l2_dev, 0, video, s_std, vidioc_s_std() 411 dev->norm); vidioc_s_std() 420 struct stk1160 dev = video_drvdata(file); vidioc_enum_input() local 432 i->std = dev->vdev.tvnorms; vidioc_enum_input() 438 struct stk1160 dev = video_drvdata(file); vidioc_g_input() local 439 i = dev->ctl_input; vidioc_g_input() 445 struct stk1160 dev = video_drvdata(file); vidioc_s_input() local 450 dev->ctl_input = i; vidioc_s_input() 452 stk1160_select_input(dev); vidioc_s_input() 461 struct stk1160 dev = video_drvdata(file); vidioc_g_register() local 466 rc = stk1160_read_reg(dev, reg->reg, &val); vidioc_g_register() 476 struct stk1160 dev = video_drvdata(file); vidioc_s_register() local 479 return stk1160_write_reg(dev, reg->reg, reg->val); vidioc_s_register() 523 struct stk1160 dev = vb2_get_drv_priv(vq); queue_setup() local 526 size = dev->width * dev->height * 2; queue_setup() 549 struct stk1160 dev = vb2_get_drv_priv(vb->vb2_queue); buffer_queue() local 553 spin_lock_irqsave(&dev->buf_lock, flags); buffer_queue() 554 if (!dev->udev) { buffer_queue() 571 if (buf->length < dev->width dev->height * 2) buffer_queue() 574 list_add_tail(&buf->list, &dev->avail_bufs); buffer_queue() 577 spin_unlock_irqrestore(&dev->buf_lock, flags); buffer_queue() 582 struct stk1160 dev = vb2_get_drv_priv(vq); start_streaming() local 583 return stk1160_start_streaming(dev); start_streaming() 589 struct stk1160 dev = vb2_get_drv_priv(vq); stop_streaming() local 590 stk1160_stop_streaming(dev); stop_streaming() 613 void stk1160_clear_queue(struct stk1160 dev) stk1160_clear_queue() argument 619 spin_lock_irqsave(&dev->buf_lock, flags); stk1160_clear_queue() 620 while (!list_empty(&dev->avail_bufs)) { stk1160_clear_queue() 621 buf = list_first_entry(&dev->avail_bufs, stk1160_clear_queue() 630 if (dev->isoc_ctl.buf) { stk1160_clear_queue() 631 buf = dev->isoc_ctl.buf; stk1160_clear_queue() 632 dev->isoc_ctl.buf = NULL; stk1160_clear_queue() 638 spin_unlock_irqrestore(&dev->buf_lock, flags); stk1160_clear_queue() 641 int stk1160_vb2_setup(struct stk1160 dev) stk1160_vb2_setup() argument 646 q = &dev->vb_vidq; stk1160_vb2_setup() 649 q->drv_priv = dev; stk1160_vb2_setup() 660 INIT_LIST_HEAD(&dev->avail_bufs); stk1160_vb2_setup() 665 int stk1160_video_register(struct stk1160 *dev) stk1160_video_register() argument 670 dev->vdev = v4l_template; stk1160_video_register() 671 dev->vdev.queue = &dev->vb_vidq; stk1160_video_register() 677 dev->vdev.lock = &dev->v4l_lock; stk1160_video_register() 678 dev->vdev.queue->lock = &dev->vb_queue_lock; stk1160_video_register() 681 dev->vdev.v4l2_dev = &dev->v4l2_dev; stk1160_video_register() 684 dev->norm = V4L2_STD_NTSC_M; stk1160_video_register() 685 dev->width = 720; stk1160_video_register() 686 dev->height = 480; stk1160_video_register() 689 dev->fmt = &format[0]; stk1160_video_register() 690 stk1160_set_std(dev); stk1160_video_register() 692 v4l2_device_call_all(&dev->v4l2_dev, 0, video, s_std, stk1160_video_register() 693 dev->norm); stk1160_video_register() 695 video_set_drvdata(&dev->vdev, dev); stk1160_video_register() 696 rc = video_register_device(&dev->vdev, VFL_TYPE_GRABBER, -1); stk1160_video_register() 702 v4l2_info(&dev->v4l2_dev, "V4L2 device registered as %s\n", stk1160_video_register() 703 video_device_node_name(&dev->vdev)); stk1160_video_register()
/linux-4.1.27/drivers/gpu/drm/nouveau/
H A D	nouveau_vga.c	37 struct drm_device dev = pci_get_drvdata(pdev); nouveau_switcheroo_set_state() local 44 dev->switch_power_state = DRM_SWITCH_POWER_CHANGING; nouveau_switcheroo_set_state() 45 nouveau_pmops_resume(&pdev->dev); nouveau_switcheroo_set_state() 46 drm_kms_helper_poll_enable(dev); nouveau_switcheroo_set_state() 47 dev->switch_power_state = DRM_SWITCH_POWER_ON; nouveau_switcheroo_set_state() 50 dev->switch_power_state = DRM_SWITCH_POWER_CHANGING; nouveau_switcheroo_set_state() 51 drm_kms_helper_poll_disable(dev); nouveau_switcheroo_set_state() 53 nouveau_pmops_suspend(&pdev->dev); nouveau_switcheroo_set_state() 54 dev->switch_power_state = DRM_SWITCH_POWER_OFF; nouveau_switcheroo_set_state() 61 struct drm_device dev = pci_get_drvdata(pdev); nouveau_switcheroo_reprobe() local 62 nouveau_fbcon_output_poll_changed(dev); nouveau_switcheroo_reprobe() 68 struct drm_device dev = pci_get_drvdata(pdev); nouveau_switcheroo_can_switch() local 75 return dev->open_count == 0; nouveau_switcheroo_can_switch() 88 struct drm_device dev = drm->dev; nouveau_vga_init() local 92 if (!dev->pdev) nouveau_vga_init() 95 vga_client_register(dev->pdev, dev, NULL, nouveau_vga_set_decode); nouveau_vga_init() 101 vga_switcheroo_register_client(dev->pdev, &nouveau_switcheroo_ops, runtime); nouveau_vga_init() 104 vga_switcheroo_init_domain_pm_ops(drm->dev->dev, &drm->vga_pm_domain); nouveau_vga_init() 110 struct drm_device dev = drm->dev; nouveau_vga_fini() local 118 vga_switcheroo_unregister_client(dev->pdev); nouveau_vga_fini() 120 vga_switcheroo_fini_domain_pm_ops(drm->dev->dev); nouveau_vga_fini() 121 vga_client_register(dev->pdev, NULL, NULL, NULL); nouveau_vga_fini() 126 nouveau_vga_lastclose(struct drm_device dev) nouveau_vga_lastclose() argument
/linux-4.1.27/drivers/media/pci/saa7134/
H A D	saa7134-core.c	102 int (saa7134_dmasound_init)(struct saa7134_dev dev); 103 int (saa7134_dmasound_exit)(struct saa7134_dev dev); 106 printk(KERN_DEBUG "%s/core: " fmt, dev->name , ## arg) 108 void saa7134_track_gpio(struct saa7134_dev dev, char msg) saa7134_track_gpio() argument 121 dev->name, mode, (~mode) & status, mode & status, msg); saa7134_track_gpio() 124 void saa7134_set_gpio(struct saa7134_dev dev, int bit_no, int value) saa7134_set_gpio() argument 158 struct saa7134_dev dev = container_of(work, struct saa7134_dev, request_module_wk); request_module_async() local 159 if (card_is_empress(dev)) request_module_async() 161 if (card_is_dvb(dev)) request_module_async() 163 if (card_is_go7007(dev)) request_module_async() 166 if (dev->pci->device != PCI_DEVICE_ID_PHILIPS_SAA7130) request_module_async() 171 static void request_submodules(struct saa7134_dev dev) request_submodules() argument 173 INIT_WORK(&dev->request_module_wk, request_module_async); request_submodules() 174 schedule_work(&dev->request_module_wk); request_submodules() 177 static void flush_request_submodules(struct saa7134_dev dev) flush_request_submodules() argument 179 flush_work(&dev->request_module_wk); flush_request_submodules() 183 #define request_submodules(dev) 184 #define flush_request_submodules(dev) 269 int saa7134_buffer_queue(struct saa7134_dev dev, saa7134_buffer_queue() argument 276 spin_lock_irqsave(&dev->slock, flags); saa7134_buffer_queue() 281 buf->activate(dev, buf, NULL); saa7134_buffer_queue() 288 buf->activate(dev, buf, next); saa7134_buffer_queue() 293 spin_unlock_irqrestore(&dev->slock, flags); saa7134_buffer_queue() 297 void saa7134_buffer_finish(struct saa7134_dev dev, saa7134_buffer_finish() argument 310 void saa7134_buffer_next(struct saa7134_dev dev, saa7134_buffer_next() argument 315 assert_spin_locked(&dev->slock); saa7134_buffer_next() 327 buf->activate(dev, buf, next); saa7134_buffer_next() 333 saa7134_set_dmabits(dev); saa7134_buffer_next() 341 struct saa7134_dev dev = q->dev; saa7134_buffer_timeout() local 344 spin_lock_irqsave(&dev->slock, flags); saa7134_buffer_timeout() 355 saa7134_buffer_finish(dev, q, VB2_BUF_STATE_ERROR); saa7134_buffer_timeout() 357 saa7134_buffer_next(dev, q); saa7134_buffer_timeout() 358 spin_unlock_irqrestore(&dev->slock, flags); saa7134_buffer_timeout() 361 void saa7134_stop_streaming(struct saa7134_dev dev, struct saa7134_dmaqueue q) saa7134_stop_streaming() argument 367 spin_lock_irqsave(&dev->slock, flags); saa7134_stop_streaming() 376 spin_unlock_irqrestore(&dev->slock, flags); saa7134_stop_streaming() 383 int saa7134_set_dmabits(struct saa7134_dev dev) saa7134_set_dmabits() argument 389 assert_spin_locked(&dev->slock); saa7134_set_dmabits() 391 if (dev->insuspend) saa7134_set_dmabits() 395 if (dev->video_q.curr) { saa7134_set_dmabits() 400 cap = dev->field; saa7134_set_dmabits() 404 if (dev->video_q.curr && dev->fmt->planar) { saa7134_set_dmabits() 410 if (dev->ovenable) { saa7134_set_dmabits() 413 ov = dev->ovfield; saa7134_set_dmabits() 417 if (dev->vbi_q.curr) { saa7134_set_dmabits() 428 if (dev->dmasound.dma_running) { saa7134_set_dmabits() 435 if (dev->ts_q.curr) { saa7134_set_dmabits() 494 static void print_irqstatus(struct saa7134_dev dev, int loop, print_irqstatus() argument 500 dev->name,loop,jiffies,report,status); print_irqstatus() 518 struct saa7134_dev dev = (struct saa7134_dev) dev_id; saa7134_irq() local 522 if (dev->insuspend) saa7134_irq() 533 (dev->dmasound.priv_data != NULL) ) saa7134_irq() 537 dev->name); saa7134_irq() 544 dev->name); saa7134_irq() 551 print_irqstatus(dev,loop,report,status); saa7134_irq() 556 saa7134_irq_video_signalchange(dev); saa7134_irq() 561 saa7134_irq_video_done(dev,status); saa7134_irq() 565 saa7134_irq_vbi_done(dev,status); saa7134_irq() 568 card_has_mpeg(dev)) { saa7134_irq() 569 if (dev->mops->irq_ts_done != NULL) saa7134_irq() 570 dev->mops->irq_ts_done(dev, status); saa7134_irq() 572 saa7134_irq_ts_done(dev, status); saa7134_irq() 576 switch (dev->has_remote) { saa7134_irq() 578 if (!dev->remote) saa7134_irq() 580 if (dev->remote->mask_keydown & 0x10000) { saa7134_irq() 581 saa7134_input_irq(dev); saa7134_irq() 594 switch (dev->has_remote) { saa7134_irq() 596 if (!dev->remote) saa7134_irq() 598 if ((dev->remote->mask_keydown & 0x40000) \|\| saa7134_irq() 599 (dev->remote->mask_keyup & 0x40000)) { saa7134_irq() 600 saa7134_input_irq(dev); saa7134_irq() 614 print_irqstatus(dev,loop,report,status); saa7134_irq() 618 "clearing PE (parity error!) enable bit\n",dev->name); saa7134_irq() 623 "clearing GPIO16 enable bit\n",dev->name); saa7134_irq() 629 "clearing GPIO18 enable bit\n",dev->name); saa7134_irq() 635 "clearing all enable bits\n",dev->name); saa7134_irq() 649 static int saa7134_hw_enable1(struct saa7134_dev dev) saa7134_hw_enable1() argument 681 static int saa7134_hwinit1(struct saa7134_dev dev) saa7134_hwinit1() argument 691 mutex_init(&dev->lock); saa7134_hwinit1() 692 spin_lock_init(&dev->slock); saa7134_hwinit1() 694 saa7134_track_gpio(dev,"pre-init"); saa7134_hwinit1() 695 saa7134_video_init1(dev); saa7134_hwinit1() 696 saa7134_vbi_init1(dev); saa7134_hwinit1() 697 if (card_has_mpeg(dev)) saa7134_hwinit1() 698 saa7134_ts_init1(dev); saa7134_hwinit1() 699 saa7134_input_init1(dev); saa7134_hwinit1() 701 saa7134_hw_enable1(dev); saa7134_hwinit1() 707 static int saa7134_hw_enable2(struct saa7134_dev dev) saa7134_hw_enable2() argument 721 if (dev->has_remote == SAA7134_REMOTE_GPIO && dev->remote) { saa7134_hw_enable2() 722 if (dev->remote->mask_keydown & 0x10000) saa7134_hw_enable2() 725 if (dev->remote->mask_keydown & 0x40000) saa7134_hw_enable2() 727 if (dev->remote->mask_keyup & 0x40000) saa7134_hw_enable2() 732 if (dev->has_remote == SAA7134_REMOTE_I2C) { saa7134_hw_enable2() 742 static int saa7134_hwinit2(struct saa7134_dev dev) saa7134_hwinit2() argument 747 saa7134_video_init2(dev); saa7134_hwinit2() 748 saa7134_tvaudio_init2(dev); saa7134_hwinit2() 750 saa7134_hw_enable2(dev); saa7134_hwinit2() 757 static int saa7134_hwfini(struct saa7134_dev dev) saa7134_hwfini() argument 761 if (card_has_mpeg(dev)) saa7134_hwfini() 762 saa7134_ts_fini(dev); saa7134_hwfini() 763 saa7134_input_fini(dev); saa7134_hwfini() 764 saa7134_vbi_fini(dev); saa7134_hwfini() 765 saa7134_tvaudio_fini(dev); saa7134_hwfini() 766 saa7134_video_fini(dev); saa7134_hwfini() 806 static struct video_device vdev_init(struct saa7134_dev dev, vdev_init() argument 816 vfd->v4l2_dev = &dev->v4l2_dev; vdev_init() 819 dev->name, type, saa7134_boards[dev->board].name); vdev_init() 820 video_set_drvdata(vfd, dev); vdev_init() 824 static void saa7134_unregister_video(struct saa7134_dev dev) saa7134_unregister_video() argument 826 if (dev->video_dev) { saa7134_unregister_video() 827 if (video_is_registered(dev->video_dev)) saa7134_unregister_video() 828 video_unregister_device(dev->video_dev); saa7134_unregister_video() 830 video_device_release(dev->video_dev); saa7134_unregister_video() 831 dev->video_dev = NULL; saa7134_unregister_video() 833 if (dev->vbi_dev) { saa7134_unregister_video() 834 if (video_is_registered(dev->vbi_dev)) saa7134_unregister_video() 835 video_unregister_device(dev->vbi_dev); saa7134_unregister_video() 837 video_device_release(dev->vbi_dev); saa7134_unregister_video() 838 dev->vbi_dev = NULL; saa7134_unregister_video() 840 if (dev->radio_dev) { saa7134_unregister_video() 841 if (video_is_registered(dev->radio_dev)) saa7134_unregister_video() 842 video_unregister_device(dev->radio_dev); saa7134_unregister_video() 844 video_device_release(dev->radio_dev); saa7134_unregister_video() 845 dev->radio_dev = NULL; saa7134_unregister_video() 850 struct saa7134_dev dev) mpeg_ops_attach() 854 if (NULL != dev->mops) mpeg_ops_attach() 856 if (saa7134_boards[dev->board].mpeg != ops->type) mpeg_ops_attach() 858 err = ops->init(dev); mpeg_ops_attach() 861 dev->mops = ops; mpeg_ops_attach() 865 struct saa7134_dev dev) mpeg_ops_detach() 867 if (NULL == dev->mops) mpeg_ops_detach() 869 if (dev->mops != ops) mpeg_ops_detach() 871 dev->mops->fini(dev); mpeg_ops_detach() 872 dev->mops = NULL; mpeg_ops_detach() 878 struct saa7134_dev dev; saa7134_initdev() local 885 dev = kzalloc(sizeof(dev),GFP_KERNEL); saa7134_initdev() 886 if (NULL == dev) saa7134_initdev() 889 err = v4l2_device_register(&pci_dev->dev, &dev->v4l2_dev); saa7134_initdev() 894 dev->pci = pci_dev; saa7134_initdev() 900 dev->nr = saa7134_devcount; saa7134_initdev() 901 sprintf(dev->name,"saa%x[%d]",pci_dev->device,dev->nr); saa7134_initdev() 906 printk(KERN_INFO "%s: quirk: PCIPCI_TRITON\n", dev->name); saa7134_initdev() 908 printk(KERN_INFO "%s: quirk: PCIPCI_NATOMA\n", dev->name); saa7134_initdev() 910 printk(KERN_INFO "%s: quirk: PCIPCI_VIAETBF\n", dev->name); saa7134_initdev() 912 printk(KERN_INFO "%s: quirk: PCIPCI_VSFX\n",dev->name); saa7134_initdev() 916 dev->name); saa7134_initdev() 923 " in overlay mode.\n",dev->name); saa7134_initdev() 927 dev->name); saa7134_initdev() 933 dev->name); saa7134_initdev() 939 dev->name,latency); saa7134_initdev() 944 dev->pci_rev = pci_dev->revision; saa7134_initdev() 945 pci_read_config_byte(pci_dev, PCI_LATENCY_TIMER, &dev->pci_lat); saa7134_initdev() 947 "latency: %d, mmio: 0x%llx\n", dev->name, saa7134_initdev() 948 pci_name(pci_dev), dev->pci_rev, pci_dev->irq, saa7134_initdev() 949 dev->pci_lat,(unsigned long long)pci_resource_start(pci_dev,0)); saa7134_initdev() 952 printk("%s: Oops: no 32bit PCI DMA ???\n",dev->name); saa7134_initdev() 958 dev->board = pci_id->driver_data; saa7134_initdev() 959 if ((unsigned)card[dev->nr] < saa7134_bcount) saa7134_initdev() 960 dev->board = card[dev->nr]; saa7134_initdev() 961 if (SAA7134_BOARD_UNKNOWN == dev->board) saa7134_initdev() 963 else if (SAA7134_BOARD_NOAUTO == dev->board) { saa7134_initdev() 965 dev->board = SAA7134_BOARD_UNKNOWN; saa7134_initdev() 967 dev->autodetected = card[dev->nr] != dev->board; saa7134_initdev() 968 dev->tuner_type = saa7134_boards[dev->board].tuner_type; saa7134_initdev() 969 dev->tuner_addr = saa7134_boards[dev->board].tuner_addr; saa7134_initdev() 970 dev->radio_type = saa7134_boards[dev->board].radio_type; saa7134_initdev() 971 dev->radio_addr = saa7134_boards[dev->board].radio_addr; saa7134_initdev() 972 dev->tda9887_conf = saa7134_boards[dev->board].tda9887_conf; saa7134_initdev() 973 if (UNSET != tuner[dev->nr]) saa7134_initdev() 974 dev->tuner_type = tuner[dev->nr]; saa7134_initdev() 976 dev->name,pci_dev->subsystem_vendor, saa7134_initdev() 977 pci_dev->subsystem_device,saa7134_boards[dev->board].name, saa7134_initdev() 978 dev->board, dev->autodetected ? saa7134_initdev() 984 dev->name)) { saa7134_initdev() 987 dev->name,(unsigned long long)pci_resource_start(pci_dev,0)); saa7134_initdev() 990 dev->lmmio = ioremap(pci_resource_start(pci_dev, 0), saa7134_initdev() 992 dev->bmmio = (__u8 __iomem )dev->lmmio; saa7134_initdev() 993 if (NULL == dev->lmmio) { saa7134_initdev() 996 dev->name); saa7134_initdev() 1001 saa7134_board_init1(dev); saa7134_initdev() 1002 saa7134_hwinit1(dev); saa7134_initdev() 1004 dev->alloc_ctx = vb2_dma_sg_init_ctx(&pci_dev->dev); saa7134_initdev() 1005 if (IS_ERR(dev->alloc_ctx)) { saa7134_initdev() 1006 err = PTR_ERR(dev->alloc_ctx); saa7134_initdev() 1011 IRQF_SHARED, dev->name, dev); saa7134_initdev() 1014 dev->name,pci_dev->irq); saa7134_initdev() 1020 saa7134_i2c_register(dev); saa7134_initdev() 1021 saa7134_board_init2(dev); saa7134_initdev() 1023 saa7134_hwinit2(dev); saa7134_initdev() 1026 if (card_is_empress(dev)) { saa7134_initdev() 1027 dev->empress_sd = saa7134_initdev() 1028 v4l2_i2c_new_subdev(&dev->v4l2_dev, &dev->i2c_adap, saa7134_initdev() 1030 saa7134_boards[dev->board].empress_addr, NULL); saa7134_initdev() 1032 if (dev->empress_sd) saa7134_initdev() 1033 dev->empress_sd->grp_id = GRP_EMPRESS; saa7134_initdev() 1036 if (saa7134_boards[dev->board].rds_addr) { saa7134_initdev() 1039 sd = v4l2_i2c_new_subdev(&dev->v4l2_dev, saa7134_initdev() 1040 &dev->i2c_adap, "saa6588", saa7134_initdev() 1041 0, I2C_ADDRS(saa7134_boards[dev->board].rds_addr)); saa7134_initdev() 1043 printk(KERN_INFO "%s: found RDS decoder\n", dev->name); saa7134_initdev() 1044 dev->has_rds = 1; saa7134_initdev() 1050 mpeg_ops_attach(mops, dev); saa7134_initdev() 1051 list_add_tail(&dev->devlist, &saa7134_devlist); saa7134_initdev() 1055 saa7134_irq_video_signalchange(dev); saa7134_initdev() 1057 if (TUNER_ABSENT != dev->tuner_type) saa7134_initdev() 1058 saa_call_all(dev, core, s_power, 0); saa7134_initdev() 1062 printk(KERN_INFO "%s: Overlay support disabled.\n", dev->name); saa7134_initdev() 1064 dev->video_dev = vdev_init(dev,&saa7134_video_template,"video"); saa7134_initdev() 1065 dev->video_dev->ctrl_handler = &dev->ctrl_handler; saa7134_initdev() 1066 dev->video_dev->lock = &dev->lock; saa7134_initdev() 1067 dev->video_dev->queue = &dev->video_vbq; saa7134_initdev() 1068 err = video_register_device(dev->video_dev,VFL_TYPE_GRABBER, saa7134_initdev() 1069 video_nr[dev->nr]); saa7134_initdev() 1072 dev->name); saa7134_initdev() 1076 dev->name, video_device_node_name(dev->video_dev)); saa7134_initdev() 1078 dev->vbi_dev = vdev_init(dev, &saa7134_video_template, "vbi"); saa7134_initdev() 1079 dev->vbi_dev->ctrl_handler = &dev->ctrl_handler; saa7134_initdev() 1080 dev->vbi_dev->lock = &dev->lock; saa7134_initdev() 1081 dev->vbi_dev->queue = &dev->vbi_vbq; saa7134_initdev() 1083 err = video_register_device(dev->vbi_dev,VFL_TYPE_VBI, saa7134_initdev() 1084 vbi_nr[dev->nr]); saa7134_initdev() 1088 dev->name, video_device_node_name(dev->vbi_dev)); saa7134_initdev() 1090 if (card_has_radio(dev)) { saa7134_initdev() 1091 dev->radio_dev = vdev_init(dev,&saa7134_radio_template,"radio"); saa7134_initdev() 1092 dev->radio_dev->ctrl_handler = &dev->radio_ctrl_handler; saa7134_initdev() 1093 dev->radio_dev->lock = &dev->lock; saa7134_initdev() 1094 err = video_register_device(dev->radio_dev,VFL_TYPE_RADIO, saa7134_initdev() 1095 radio_nr[dev->nr]); saa7134_initdev() 1099 dev->name, video_device_node_name(dev->radio_dev)); saa7134_initdev() 1105 if (saa7134_dmasound_init && !dev->dmasound.priv_data) saa7134_initdev() 1106 saa7134_dmasound_init(dev); saa7134_initdev() 1108 request_submodules(dev); saa7134_initdev() 1112 saa7134_unregister_video(dev); saa7134_initdev() 1113 saa7134_i2c_unregister(dev); saa7134_initdev() 1114 free_irq(pci_dev->irq, dev); saa7134_initdev() 1116 vb2_dma_sg_cleanup_ctx(dev->alloc_ctx); saa7134_initdev() 1118 saa7134_hwfini(dev); saa7134_initdev() 1119 iounmap(dev->lmmio); saa7134_initdev() 1124 v4l2_device_unregister(&dev->v4l2_dev); saa7134_initdev() 1126 kfree(dev); saa7134_initdev() 1133 struct saa7134_dev dev = container_of(v4l2_dev, struct saa7134_dev, v4l2_dev); saa7134_finidev() local 1136 flush_request_submodules(dev); saa7134_finidev() 1139 if (saa7134_dmasound_exit && dev->dmasound.priv_data) { saa7134_finidev() 1140 saa7134_dmasound_exit(dev); saa7134_finidev() 1147 print_irqstatus(dev,42,report,status); saa7134_finidev() 1159 saa7134_hwfini(dev); saa7134_finidev() 1163 list_del(&dev->devlist); saa7134_finidev() 1165 mpeg_ops_detach(mops, dev); saa7134_finidev() 1169 saa7134_i2c_unregister(dev); saa7134_finidev() 1170 saa7134_unregister_video(dev); saa7134_finidev() 1175 if (dev->dmasound.priv_data != NULL) { saa7134_finidev() 1176 free_irq(pci_dev->irq, &dev->dmasound); saa7134_finidev() 1177 dev->dmasound.priv_data = NULL; saa7134_finidev() 1182 free_irq(pci_dev->irq, dev); saa7134_finidev() 1183 vb2_dma_sg_cleanup_ctx(dev->alloc_ctx); saa7134_finidev() 1184 iounmap(dev->lmmio); saa7134_finidev() 1189 v4l2_device_unregister(&dev->v4l2_dev); saa7134_finidev() 1192 kfree(dev); saa7134_finidev() 1198 static int saa7134_buffer_requeue(struct saa7134_dev dev, saa7134_buffer_requeue() argument 1203 assert_spin_locked(&dev->slock); saa7134_buffer_requeue() 1217 buf->activate(dev, buf, next); saa7134_buffer_requeue() 1225 struct saa7134_dev dev = container_of(v4l2_dev, struct saa7134_dev, v4l2_dev); saa7134_suspend() local 1228 dev->ovenable = 0; saa7134_suspend() 1235 dev->insuspend = 1; saa7134_suspend() 1246 del_timer(&dev->video_q.timeout); saa7134_suspend() 1247 del_timer(&dev->vbi_q.timeout); saa7134_suspend() 1248 del_timer(&dev->ts_q.timeout); saa7134_suspend() 1250 if (dev->remote) saa7134_suspend() 1251 saa7134_ir_stop(dev); saa7134_suspend() 1262 struct saa7134_dev dev = container_of(v4l2_dev, struct saa7134_dev, v4l2_dev); saa7134_resume() local 1271 saa7134_board_init1(dev); saa7134_resume() 1274 if (saa7134_boards[dev->board].video_out) saa7134_resume() 1275 saa7134_videoport_init(dev); saa7134_resume() 1276 if (card_has_mpeg(dev)) saa7134_resume() 1277 saa7134_ts_init_hw(dev); saa7134_resume() 1278 if (dev->remote) saa7134_resume() 1279 saa7134_ir_start(dev); saa7134_resume() 1280 saa7134_hw_enable1(dev); saa7134_resume() 1284 saa7134_board_init2(dev); saa7134_resume() 1287 saa7134_set_tvnorm_hw(dev); saa7134_resume() 1288 saa7134_tvaudio_setmute(dev); saa7134_resume() 1289 saa7134_tvaudio_setvolume(dev, dev->ctl_volume); saa7134_resume() 1290 saa7134_tvaudio_init(dev); saa7134_resume() 1291 saa7134_enable_i2s(dev); saa7134_resume() 1292 saa7134_hw_enable2(dev); saa7134_resume() 1294 saa7134_irq_video_signalchange(dev); saa7134_resume() 1297 spin_lock_irqsave(&dev->slock, flags); saa7134_resume() 1298 saa7134_buffer_requeue(dev, &dev->video_q); saa7134_resume() 1299 saa7134_buffer_requeue(dev, &dev->vbi_q); saa7134_resume() 1300 saa7134_buffer_requeue(dev, &dev->ts_q); saa7134_resume() 1305 dev->dmasound.dma_running = 0; saa7134_resume() 1308 dev->insuspend = 0; saa7134_resume() 1310 saa7134_set_dmabits(dev); saa7134_resume() 1311 spin_unlock_irqrestore(&dev->slock, flags); saa7134_resume() 1321 struct saa7134_dev dev; saa7134_ts_register() local 1324 list_for_each_entry(dev, &saa7134_devlist, devlist) saa7134_ts_register() 1325 mpeg_ops_attach(ops, dev); saa7134_ts_register() 1333 struct saa7134_dev dev; saa7134_ts_unregister() local 1337 list_for_each_entry(dev, &saa7134_devlist, devlist) saa7134_ts_unregister() 1338 mpeg_ops_detach(ops, dev); saa7134_ts_unregister() 849 mpeg_ops_attach(struct saa7134_mpeg_ops ops, struct saa7134_dev dev) mpeg_ops_attach() argument 864 mpeg_ops_detach(struct saa7134_mpeg_ops ops, struct saa7134_dev *dev) mpeg_ops_detach() argument
H A D	saa7134-ts.c	39 printk(KERN_DEBUG "%s/ts: " fmt, dev->name , ## arg) 42 static int buffer_activate(struct saa7134_dev dev, buffer_activate() argument 50 if (!dev->ts_started) buffer_activate() 51 dev->ts_field = V4L2_FIELD_TOP; buffer_activate() 55 if (V4L2_FIELD_TOP == dev->ts_field) { buffer_activate() 59 dev->ts_field = V4L2_FIELD_BOTTOM; buffer_activate() 64 dev->ts_field = V4L2_FIELD_TOP; buffer_activate() 68 saa7134_set_dmabits(dev); buffer_activate() 70 mod_timer(&dev->ts_q.timeout, jiffies+TS_BUFFER_TIMEOUT); buffer_activate() 72 if (!dev->ts_started) buffer_activate() 73 saa7134_ts_start(dev); buffer_activate() 93 struct saa7134_dev dev = dmaq->dev; saa7134_ts_buffer_prepare() local 101 lines = dev->ts.nr_packets; saa7134_ts_buffer_prepare() 108 vb2->v4l2_buf.field = dev->field; saa7134_ts_buffer_prepare() 110 return saa7134_pgtable_build(dev->pci, &dmaq->pt, dma->sgl, dma->nents, saa7134_ts_buffer_prepare() 120 struct saa7134_dev dev = dmaq->dev; saa7134_ts_queue_setup() local 121 int size = TS_PACKET_SIZE dev->ts.nr_packets; saa7134_ts_queue_setup() 124 nbuffers = dev->ts.nr_bufs; saa7134_ts_queue_setup() 130 alloc_ctxs[0] = dev->alloc_ctx; saa7134_ts_queue_setup() 138 struct saa7134_dev dev = dmaq->dev; saa7134_ts_start_streaming() local 144 if (vb2_is_busy(&dev->video_vbq) && dev->fmt->planar) { saa7134_ts_start_streaming() 165 struct saa7134_dev dev = dmaq->dev; saa7134_ts_stop_streaming() local 167 saa7134_ts_stop(dev); saa7134_ts_stop_streaming() 168 saa7134_stop_streaming(dev, dmaq); saa7134_ts_stop_streaming() 194 int saa7134_ts_init_hw(struct saa7134_dev dev) saa7134_ts_init_hw() argument 201 saa_writeb(SAA7134_TS_DMA0, ((dev->ts.nr_packets-1)&0xff)); saa7134_ts_init_hw() 202 saa_writeb(SAA7134_TS_DMA1, (((dev->ts.nr_packets-1)>>8)&0xff)); saa7134_ts_init_hw() 205 ((((dev->ts.nr_packets-1)>>16)&0x3f) \| 0x00)); saa7134_ts_init_hw() 210 int saa7134_ts_init1(struct saa7134_dev dev) saa7134_ts_init1() argument 221 dev->ts.nr_bufs = tsbufs; saa7134_ts_init1() 222 dev->ts.nr_packets = ts_nr_packets; saa7134_ts_init1() 224 INIT_LIST_HEAD(&dev->ts_q.queue); saa7134_ts_init1() 225 init_timer(&dev->ts_q.timeout); saa7134_ts_init1() 226 dev->ts_q.timeout.function = saa7134_buffer_timeout; saa7134_ts_init1() 227 dev->ts_q.timeout.data = (unsigned long)(&dev->ts_q); saa7134_ts_init1() 228 dev->ts_q.dev = dev; saa7134_ts_init1() 229 dev->ts_q.need_two = 1; saa7134_ts_init1() 230 dev->ts_started = 0; saa7134_ts_init1() 231 saa7134_pgtable_alloc(dev->pci, &dev->ts_q.pt); saa7134_ts_init1() 234 saa7134_ts_init_hw(dev); saa7134_ts_init1() 240 int saa7134_ts_stop(struct saa7134_dev dev) saa7134_ts_stop() argument 244 if (!dev->ts_started) saa7134_ts_stop() 248 switch (saa7134_boards[dev->board].ts_type) { saa7134_ts_stop() 251 dev->ts_started = 0; saa7134_ts_stop() 255 dev->ts_started = 0; saa7134_ts_stop() 262 int saa7134_ts_start(struct saa7134_dev dev) saa7134_ts_start() argument 266 if (WARN_ON(dev->ts_started)) saa7134_ts_start() 270 saa_writeb(SAA7134_TS_DMA0, (dev->ts.nr_packets - 1) & 0xff); saa7134_ts_start() 272 ((dev->ts.nr_packets - 1) >> 8) & 0xff); saa7134_ts_start() 275 (((dev->ts.nr_packets - 1) >> 16) & 0x3f) \| 0x00); saa7134_ts_start() 279 (dev->ts_q.pt.dma >> 12)); saa7134_ts_start() 291 switch (saa7134_boards[dev->board].ts_type) { saa7134_ts_start() 295 (saa7134_boards[dev->board].ts_force_val << 4)); saa7134_ts_start() 300 (saa7134_boards[dev->board].ts_force_val << 4)); saa7134_ts_start() 306 dev->ts_started = 1; saa7134_ts_start() 311 int saa7134_ts_fini(struct saa7134_dev dev) saa7134_ts_fini() argument 313 saa7134_pgtable_free(dev->pci, &dev->ts_q.pt); saa7134_ts_fini() 317 void saa7134_irq_ts_done(struct saa7134_dev *dev, unsigned long status) saa7134_irq_ts_done() argument 321 spin_lock(&dev->slock); saa7134_irq_ts_done() 322 if (dev->ts_q.curr) { saa7134_irq_ts_done() 323 field = dev->ts_field; saa7134_irq_ts_done() 331 saa7134_buffer_finish(dev, &dev->ts_q, VB2_BUF_STATE_DONE); saa7134_irq_ts_done() 333 saa7134_buffer_next(dev,&dev->ts_q); saa7134_irq_ts_done() 336 spin_unlock(&dev->slock); saa7134_irq_ts_done()
/linux-4.1.27/drivers/media/usb/stkwebcam/
H A D	stk-webcam.c	128 int stk_camera_write_reg(struct stk_camera dev, u16 index, u8 value) stk_camera_write_reg() argument 130 struct usb_device udev = dev->udev; stk_camera_write_reg() 147 int stk_camera_read_reg(struct stk_camera dev, u16 index, int value) stk_camera_read_reg() argument 149 struct usb_device udev = dev->udev; stk_camera_read_reg() 166 static int stk_start_stream(struct stk_camera dev) stk_start_stream() argument 172 if (!is_present(dev)) stk_start_stream() 174 if (!is_memallocd(dev) \|\| !is_initialised(dev)) { stk_start_stream() 178 ret = usb_set_interface(dev->udev, 0, 5); stk_start_stream() 182 if (stk_sensor_wakeup(dev)) stk_start_stream() 185 stk_camera_read_reg(dev, 0x0116, &value_116); stk_start_stream() 186 stk_camera_read_reg(dev, 0x0117, &value_117); stk_start_stream() 188 stk_camera_write_reg(dev, 0x0116, 0x0000); stk_start_stream() 189 stk_camera_write_reg(dev, 0x0117, 0x0000); stk_start_stream() 191 stk_camera_read_reg(dev, 0x0100, &value); stk_start_stream() 192 stk_camera_write_reg(dev, 0x0100, value \| 0x80); stk_start_stream() 194 stk_camera_write_reg(dev, 0x0116, value_116); stk_start_stream() 195 stk_camera_write_reg(dev, 0x0117, value_117); stk_start_stream() 197 if (dev->isobufs[i].urb) { stk_start_stream() 198 ret = usb_submit_urb(dev->isobufs[i].urb, GFP_KERNEL); stk_start_stream() 199 atomic_inc(&dev->urbs_used); stk_start_stream() 204 set_streaming(dev); stk_start_stream() 208 static int stk_stop_stream(struct stk_camera dev) stk_stop_stream() argument 212 if (is_present(dev)) { stk_stop_stream() 213 stk_camera_read_reg(dev, 0x0100, &value); stk_stop_stream() 214 stk_camera_write_reg(dev, 0x0100, value & ~0x80); stk_stop_stream() 215 if (dev->isobufs != NULL) { stk_stop_stream() 217 if (dev->isobufs[i].urb) stk_stop_stream() 218 usb_kill_urb(dev->isobufs[i].urb); stk_stop_stream() 221 unset_streaming(dev); stk_stop_stream() 223 if (usb_set_interface(dev->udev, 0, 0)) stk_stop_stream() 225 if (stk_sensor_sleep(dev)) stk_stop_stream() 269 static int stk_initialise(struct stk_camera dev) stk_initialise() argument 273 if (!is_present(dev)) stk_initialise() 275 if (is_initialised(dev)) stk_initialise() 279 ret = stk_camera_write_reg(dev, rv->reg, rv->val); stk_initialise() 284 if (stk_sensor_init(dev) == 0) { stk_initialise() 285 set_initialised(dev); stk_initialise() 307 struct stk_camera dev; stk_isoc_handler() local 310 dev = (struct stk_camera ) urb->context; stk_isoc_handler() 312 if (dev == NULL) { stk_isoc_handler() 319 atomic_dec(&dev->urbs_used); stk_isoc_handler() 323 spin_lock_irqsave(&dev->spinlock, flags); stk_isoc_handler() 330 if (list_empty(&dev->sio_avail)) { stk_isoc_handler() 336 fb = list_first_entry(&dev->sio_avail, stk_isoc_handler() 367 && fb->v4lbuf.bytesused != dev->frame_size) { stk_isoc_handler() 374 } else if (fb->v4lbuf.bytesused == dev->frame_size) { stk_isoc_handler() 375 if (list_is_singular(&dev->sio_avail)) { stk_isoc_handler() 380 list_move_tail(dev->sio_avail.next, stk_isoc_handler() 381 &dev->sio_full); stk_isoc_handler() 382 wake_up(&dev->wait_frame); stk_isoc_handler() 383 fb = list_first_entry(&dev->sio_avail, stk_isoc_handler() 395 if (framelen + fb->v4lbuf.bytesused > dev->frame_size) { stk_isoc_handler() 401 spin_unlock_irqrestore(&dev->spinlock, flags); stk_isoc_handler() 403 spin_lock_irqsave(&dev->spinlock, flags); stk_isoc_handler() 411 spin_unlock_irqrestore(&dev->spinlock, flags); stk_isoc_handler() 412 urb->dev = dev->udev; stk_isoc_handler() 422 static int stk_prepare_iso(struct stk_camera dev) stk_prepare_iso() argument 429 if (dev == NULL) stk_prepare_iso() 431 udev = dev->udev; stk_prepare_iso() 433 if (dev->isobufs) stk_prepare_iso() 436 dev->isobufs = kcalloc(MAX_ISO_BUFS, sizeof(dev->isobufs), stk_prepare_iso() 438 if (dev->isobufs == NULL) { stk_prepare_iso() 443 if (dev->isobufs[i].data == NULL) { stk_prepare_iso() 450 dev->isobufs[i].data = kbuf; stk_prepare_iso() 453 if (dev->isobufs[i].urb == NULL) { stk_prepare_iso() 459 dev->isobufs[i].urb = urb; stk_prepare_iso() 462 usb_kill_urb(dev->isobufs[i].urb); stk_prepare_iso() 463 urb = dev->isobufs[i].urb; stk_prepare_iso() 466 urb->dev = udev; stk_prepare_iso() 467 urb->pipe = usb_rcvisocpipe(udev, dev->isoc_ep); stk_prepare_iso() 469 urb->transfer_buffer = dev->isobufs[i].data; stk_prepare_iso() 472 urb->context = dev; stk_prepare_iso() 481 set_memallocd(dev); stk_prepare_iso() 485 for (i = 0; i < MAX_ISO_BUFS && dev->isobufs[i].data; i++) stk_prepare_iso() 486 kfree(dev->isobufs[i].data); stk_prepare_iso() 487 for (i = 0; i < MAX_ISO_BUFS && dev->isobufs[i].urb; i++) stk_prepare_iso() 488 usb_free_urb(dev->isobufs[i].urb); stk_prepare_iso() 489 kfree(dev->isobufs); stk_prepare_iso() 490 dev->isobufs = NULL; stk_prepare_iso() 494 static void stk_clean_iso(struct stk_camera dev) stk_clean_iso() argument 498 if (dev == NULL \|\| dev->isobufs == NULL) stk_clean_iso() 504 urb = dev->isobufs[i].urb; stk_clean_iso() 506 if (atomic_read(&dev->urbs_used) && is_present(dev)) stk_clean_iso() 510 kfree(dev->isobufs[i].data); stk_clean_iso() 512 kfree(dev->isobufs); stk_clean_iso() 513 dev->isobufs = NULL; stk_clean_iso() 514 unset_memallocd(dev); stk_clean_iso() 517 static int stk_setup_siobuf(struct stk_camera dev, int index) stk_setup_siobuf() argument 519 struct stk_sio_buffer buf = dev->sio_bufs + index; stk_setup_siobuf() 521 buf->v4lbuf.length = PAGE_ALIGN(dev->frame_size); stk_setup_siobuf() 526 buf->dev = dev; stk_setup_siobuf() 536 static int stk_free_sio_buffers(struct stk_camera dev) stk_free_sio_buffers() argument 541 if (dev->n_sbufs == 0 \|\| dev->sio_bufs == NULL) stk_free_sio_buffers() 546 for (i = 0; i < dev->n_sbufs; i++) { stk_free_sio_buffers() 547 if (dev->sio_bufs[i].mapcount > 0) stk_free_sio_buffers() 553 spin_lock_irqsave(&dev->spinlock, flags); stk_free_sio_buffers() 554 INIT_LIST_HEAD(&dev->sio_avail); stk_free_sio_buffers() 555 INIT_LIST_HEAD(&dev->sio_full); stk_free_sio_buffers() 556 nbufs = dev->n_sbufs; stk_free_sio_buffers() 557 dev->n_sbufs = 0; stk_free_sio_buffers() 558 spin_unlock_irqrestore(&dev->spinlock, flags); stk_free_sio_buffers() 560 vfree(dev->sio_bufs[i].buffer); stk_free_sio_buffers() 561 kfree(dev->sio_bufs); stk_free_sio_buffers() 562 dev->sio_bufs = NULL; stk_free_sio_buffers() 566 static int stk_prepare_sio_buffers(struct stk_camera dev, unsigned n_sbufs) stk_prepare_sio_buffers() argument 569 if (dev->sio_bufs != NULL) stk_prepare_sio_buffers() 572 dev->sio_bufs = kzalloc(n_sbufs sizeof(struct stk_sio_buffer), stk_prepare_sio_buffers() 574 if (dev->sio_bufs == NULL) stk_prepare_sio_buffers() 577 if (stk_setup_siobuf(dev, i)) stk_prepare_sio_buffers() 578 return (dev->n_sbufs > 1 ? 0 : -ENOMEM); stk_prepare_sio_buffers() 579 dev->n_sbufs = i+1; stk_prepare_sio_buffers() 585 static int stk_allocate_buffers(struct stk_camera dev, unsigned n_sbufs) stk_allocate_buffers() argument 588 err = stk_prepare_iso(dev); stk_allocate_buffers() 590 stk_clean_iso(dev); stk_allocate_buffers() 593 err = stk_prepare_sio_buffers(dev, n_sbufs); stk_allocate_buffers() 595 stk_free_sio_buffers(dev); stk_allocate_buffers() 601 static void stk_free_buffers(struct stk_camera dev) stk_free_buffers() argument 603 stk_clean_iso(dev); stk_free_buffers() 604 stk_free_sio_buffers(dev); stk_free_buffers() 612 struct stk_camera dev = video_drvdata(fp); v4l_stk_open() local 615 if (dev == NULL \|\| !is_present(dev)) v4l_stk_open() 618 if (mutex_lock_interruptible(&dev->lock)) v4l_stk_open() 620 if (!dev->first_init) v4l_stk_open() 621 stk_camera_write_reg(dev, 0x0, 0x24); v4l_stk_open() 623 dev->first_init = 0; v4l_stk_open() 627 usb_autopm_get_interface(dev->interface); v4l_stk_open() 628 mutex_unlock(&dev->lock); v4l_stk_open() 634 struct stk_camera dev = video_drvdata(fp); v4l_stk_release() local 636 mutex_lock(&dev->lock); v4l_stk_release() 637 if (dev->owner == fp) { v4l_stk_release() 638 stk_stop_stream(dev); v4l_stk_release() 639 stk_free_buffers(dev); v4l_stk_release() 640 stk_camera_write_reg(dev, 0x0, 0x49); /* turn off the LED / v4l_stk_release() 641 unset_initialised(dev); v4l_stk_release() 642 dev->owner = NULL; v4l_stk_release() 645 if (is_present(dev)) v4l_stk_release() 646 usb_autopm_put_interface(dev->interface); v4l_stk_release() 647 mutex_unlock(&dev->lock); v4l_stk_release() 658 struct stk_camera dev = video_drvdata(fp); stk_read() local 660 if (!is_present(dev)) stk_read() 662 if (dev->owner && (!dev->reading \|\| dev->owner != fp)) stk_read() 664 dev->owner = fp; stk_read() 665 if (!is_streaming(dev)) { stk_read() 666 if (stk_initialise(dev) stk_read() 667 \|\| stk_allocate_buffers(dev, 3) stk_read() 668 \|\| stk_start_stream(dev)) stk_read() 670 dev->reading = 1; stk_read() 671 spin_lock_irqsave(&dev->spinlock, flags); stk_read() 672 for (i = 0; i < dev->n_sbufs; i++) { stk_read() 673 list_add_tail(&dev->sio_bufs[i].list, &dev->sio_avail); stk_read() 674 dev->sio_bufs[i].v4lbuf.flags = V4L2_BUF_FLAG_QUEUED; stk_read() 676 spin_unlock_irqrestore(&dev->spinlock, flags); stk_read() 679 if (fp->f_flags & O_NONBLOCK && list_empty(&dev->sio_full)) stk_read() 681 ret = wait_event_interruptible(dev->wait_frame, stk_read() 682 !list_empty(&dev->sio_full) \|\| !is_present(dev)); stk_read() 685 if (!is_present(dev)) stk_read() 688 if (count + f_pos > dev->frame_size) stk_read() 689 count = dev->frame_size - f_pos; stk_read() 690 spin_lock_irqsave(&dev->spinlock, flags); stk_read() 691 if (list_empty(&dev->sio_full)) { stk_read() 692 spin_unlock_irqrestore(&dev->spinlock, flags); stk_read() 696 sbuf = list_first_entry(&dev->sio_full, struct stk_sio_buffer, list); stk_read() 697 spin_unlock_irqrestore(&dev->spinlock, flags); stk_read() 704 if (f_pos >= dev->frame_size) { stk_read() 706 spin_lock_irqsave(&dev->spinlock, flags); stk_read() 707 list_move_tail(&sbuf->list, &dev->sio_avail); stk_read() 708 spin_unlock_irqrestore(&dev->spinlock, flags); stk_read() 716 struct stk_camera dev = video_drvdata(fp); v4l_stk_read() local 719 if (mutex_lock_interruptible(&dev->lock)) v4l_stk_read() 722 mutex_unlock(&dev->lock); v4l_stk_read() 728 struct stk_camera dev = video_drvdata(fp); v4l_stk_poll() local 731 poll_wait(fp, &dev->wait_frame, wait); v4l_stk_poll() 733 if (!is_present(dev)) v4l_stk_poll() 736 if (!list_empty(&dev->sio_full)) v4l_stk_poll() 765 struct stk_camera dev = video_drvdata(fp); v4l_stk_mmap() local 771 for (i = 0; i < dev->n_sbufs; i++) { v4l_stk_mmap() 772 if (dev->sio_bufs[i].v4lbuf.m.offset == offset) { v4l_stk_mmap() 773 sbuf = dev->sio_bufs + i; v4l_stk_mmap() 795 struct stk_camera dev = video_drvdata(filp); stk_vidioc_querycap() local 799 usb_make_path(dev->udev, cap->bus_info, sizeof(cap->bus_info)); stk_vidioc_querycap() 832 struct stk_camera dev = stk_s_ctrl() local 837 return stk_sensor_set_brightness(dev, ctrl->val); stk_s_ctrl() 840 dev->vsettings.hflip = !ctrl->val; stk_s_ctrl() 842 dev->vsettings.hflip = ctrl->val; stk_s_ctrl() 846 dev->vsettings.vflip = !ctrl->val; stk_s_ctrl() 848 dev->vsettings.vflip = ctrl->val; stk_s_ctrl() 903 struct stk_camera dev = video_drvdata(filp); stk_vidioc_g_fmt_vid_cap() local 907 stk_sizes[i].m != dev->vsettings.mode; i++) stk_vidioc_g_fmt_vid_cap() 917 pix_format->pixelformat = dev->vsettings.palette; stk_vidioc_g_fmt_vid_cap() 918 if (dev->vsettings.palette == V4L2_PIX_FMT_SBGGR8) stk_vidioc_g_fmt_vid_cap() 976 static int stk_setup_format(struct stk_camera dev) stk_setup_format() argument 980 if (dev->vsettings.palette == V4L2_PIX_FMT_SBGGR8) stk_setup_format() 985 stk_sizes[i].m != dev->vsettings.mode) stk_setup_format() 992 stk_camera_write_reg(dev, 0x001b, 0x0e); stk_setup_format() 993 if (dev->vsettings.mode == MODE_SXGA) stk_setup_format() 994 stk_camera_write_reg(dev, 0x001c, 0x0e); stk_setup_format() 996 stk_camera_write_reg(dev, 0x001c, 0x46); stk_setup_format() 1001 stk_camera_write_reg(dev, 0x0115, stk_setup_format() 1003 stk_camera_write_reg(dev, 0x0114, stk_setup_format() 1005 stk_camera_write_reg(dev, 0x0117, stk_setup_format() 1007 stk_camera_write_reg(dev, 0x0116, stk_setup_format() 1009 return stk_sensor_configure(dev); stk_setup_format() 1017 struct stk_camera dev = video_drvdata(filp); stk_vidioc_s_fmt_vid_cap() local 1019 if (dev == NULL) stk_vidioc_s_fmt_vid_cap() 1021 if (!is_present(dev)) stk_vidioc_s_fmt_vid_cap() 1023 if (is_streaming(dev)) stk_vidioc_s_fmt_vid_cap() 1025 if (dev->owner) stk_vidioc_s_fmt_vid_cap() 1031 dev->vsettings.palette = fmtd->fmt.pix.pixelformat; stk_vidioc_s_fmt_vid_cap() 1032 stk_free_buffers(dev); stk_vidioc_s_fmt_vid_cap() 1033 dev->frame_size = fmtd->fmt.pix.sizeimage; stk_vidioc_s_fmt_vid_cap() 1034 dev->vsettings.mode = stk_sizes[idx].m; stk_vidioc_s_fmt_vid_cap() 1036 stk_initialise(dev); stk_vidioc_s_fmt_vid_cap() 1037 return stk_setup_format(dev); stk_vidioc_s_fmt_vid_cap() 1043 struct stk_camera dev = video_drvdata(filp); stk_vidioc_reqbufs() local 1045 if (dev == NULL) stk_vidioc_reqbufs() 1049 if (is_streaming(dev) stk_vidioc_reqbufs() 1050 \|\| (dev->owner && dev->owner != filp)) stk_vidioc_reqbufs() 1052 stk_free_buffers(dev); stk_vidioc_reqbufs() 1054 stk_camera_write_reg(dev, 0x0, 0x49); /* turn off the LED / stk_vidioc_reqbufs() 1055 unset_initialised(dev); stk_vidioc_reqbufs() 1056 dev->owner = NULL; stk_vidioc_reqbufs() 1059 dev->owner = filp; stk_vidioc_reqbufs() 1068 stk_allocate_buffers(dev, rb->count); stk_vidioc_reqbufs() 1069 rb->count = dev->n_sbufs; stk_vidioc_reqbufs() 1076 struct stk_camera dev = video_drvdata(filp); stk_vidioc_querybuf() local 1079 if (buf->index >= dev->n_sbufs) stk_vidioc_querybuf() 1081 sbuf = dev->sio_bufs + buf->index; stk_vidioc_querybuf() 1089 struct stk_camera dev = video_drvdata(filp); stk_vidioc_qbuf() local 1096 if (buf->index >= dev->n_sbufs) stk_vidioc_qbuf() 1098 sbuf = dev->sio_bufs + buf->index; stk_vidioc_qbuf() 1103 spin_lock_irqsave(&dev->spinlock, flags); stk_vidioc_qbuf() 1104 list_add_tail(&sbuf->list, &dev->sio_avail); stk_vidioc_qbuf() 1106 spin_unlock_irqrestore(&dev->spinlock, flags); stk_vidioc_qbuf() 1113 struct stk_camera dev = video_drvdata(filp); stk_vidioc_dqbuf() local 1118 if (!is_streaming(dev)) stk_vidioc_dqbuf() 1121 if (filp->f_flags & O_NONBLOCK && list_empty(&dev->sio_full)) stk_vidioc_dqbuf() 1123 ret = wait_event_interruptible(dev->wait_frame, stk_vidioc_dqbuf() 1124 !list_empty(&dev->sio_full) \|\| !is_present(dev)); stk_vidioc_dqbuf() 1127 if (!is_present(dev)) stk_vidioc_dqbuf() 1130 spin_lock_irqsave(&dev->spinlock, flags); stk_vidioc_dqbuf() 1131 sbuf = list_first_entry(&dev->sio_full, struct stk_sio_buffer, list); stk_vidioc_dqbuf() 1133 spin_unlock_irqrestore(&dev->spinlock, flags); stk_vidioc_dqbuf() 1136 sbuf->v4lbuf.sequence = ++dev->sequence; stk_vidioc_dqbuf() 1146 struct stk_camera dev = video_drvdata(filp); stk_vidioc_streamon() local 1147 if (is_streaming(dev)) stk_vidioc_streamon() 1149 if (dev->sio_bufs == NULL) stk_vidioc_streamon() 1151 dev->sequence = 0; stk_vidioc_streamon() 1152 return stk_start_stream(dev); stk_vidioc_streamon() 1158 struct stk_camera dev = video_drvdata(filp); stk_vidioc_streamoff() local 1161 stk_stop_stream(dev); stk_vidioc_streamoff() 1162 spin_lock_irqsave(&dev->spinlock, flags); stk_vidioc_streamoff() 1163 INIT_LIST_HEAD(&dev->sio_avail); stk_vidioc_streamoff() 1164 INIT_LIST_HEAD(&dev->sio_full); stk_vidioc_streamoff() 1165 for (i = 0; i < dev->n_sbufs; i++) { stk_vidioc_streamoff() 1166 INIT_LIST_HEAD(&dev->sio_bufs[i].list); stk_vidioc_streamoff() 1167 dev->sio_bufs[i].v4lbuf.flags = 0; stk_vidioc_streamoff() 1169 spin_unlock_irqrestore(&dev->spinlock, flags); stk_vidioc_streamoff() 1241 struct stk_camera dev = vdev_to_camera(vd); stk_v4l_dev_release() local 1243 if (dev->sio_bufs != NULL \|\| dev->isobufs != NULL) stk_v4l_dev_release() 1245 usb_put_intf(dev->interface); stk_v4l_dev_release() 1246 kfree(dev); stk_v4l_dev_release() 1257 static int stk_register_video_device(struct stk_camera dev) stk_register_video_device() argument 1261 dev->vdev = stk_v4l_data; stk_register_video_device() 1262 dev->vdev.lock = &dev->lock; stk_register_video_device() 1263 dev->vdev.v4l2_dev = &dev->v4l2_dev; stk_register_video_device() 1264 video_set_drvdata(&dev->vdev, dev); stk_register_video_device() 1265 err = video_register_device(&dev->vdev, VFL_TYPE_GRABBER, -1); stk_register_video_device() 1270 video_device_node_name(&dev->vdev)); stk_register_video_device() 1284 struct stk_camera dev = NULL; stk_camera_probe() local 1289 dev = kzalloc(sizeof(struct stk_camera), GFP_KERNEL); stk_camera_probe() 1290 if (dev == NULL) { stk_camera_probe() 1294 err = v4l2_device_register(&interface->dev, &dev->v4l2_dev); stk_camera_probe() 1296 dev_err(&udev->dev, "couldn't register v4l2_device\n"); stk_camera_probe() 1297 kfree(dev); stk_camera_probe() 1300 hdl = &dev->hdl; stk_camera_probe() 1310 dev_err(&udev->dev, "couldn't register control\n"); stk_camera_probe() 1313 dev->v4l2_dev.ctrl_handler = hdl; stk_camera_probe() 1315 spin_lock_init(&dev->spinlock); stk_camera_probe() 1316 mutex_init(&dev->lock); stk_camera_probe() 1317 init_waitqueue_head(&dev->wait_frame); stk_camera_probe() 1318 dev->first_init = 1; / webcam LED management / stk_camera_probe() 1320 dev->udev = udev; stk_camera_probe() 1321 dev->interface = interface; stk_camera_probe() 1325 dev->vsettings.hflip = hflip; stk_camera_probe() 1327 dev->vsettings.hflip = 1; stk_camera_probe() 1329 dev->vsettings.hflip = 0; stk_camera_probe() 1331 dev->vsettings.vflip = vflip; stk_camera_probe() 1333 dev->vsettings.vflip = 1; stk_camera_probe() 1335 dev->vsettings.vflip = 0; stk_camera_probe() 1336 dev->n_sbufs = 0; stk_camera_probe() 1337 set_present(dev); stk_camera_probe() 1347 if (!dev->isoc_ep stk_camera_probe() 1350 dev->isoc_ep = usb_endpoint_num(endpoint); stk_camera_probe() 1354 if (!dev->isoc_ep) { stk_camera_probe() 1359 dev->vsettings.palette = V4L2_PIX_FMT_RGB565; stk_camera_probe() 1360 dev->vsettings.mode = MODE_VGA; stk_camera_probe() 1361 dev->frame_size = 640 480 * 2; stk_camera_probe() 1363 INIT_LIST_HEAD(&dev->sio_avail); stk_camera_probe() 1364 INIT_LIST_HEAD(&dev->sio_full); stk_camera_probe() 1366 usb_set_intfdata(interface, dev); stk_camera_probe() 1368 err = stk_register_video_device(dev); stk_camera_probe() 1376 v4l2_device_unregister(&dev->v4l2_dev); stk_camera_probe() 1377 kfree(dev); stk_camera_probe() 1383 struct stk_camera dev = usb_get_intfdata(interface); stk_camera_disconnect() local 1386 unset_present(dev); stk_camera_disconnect() 1388 wake_up_interruptible(&dev->wait_frame); stk_camera_disconnect() 1391 video_device_node_name(&dev->vdev)); stk_camera_disconnect() 1393 video_unregister_device(&dev->vdev); stk_camera_disconnect() 1394 v4l2_ctrl_handler_free(&dev->hdl); stk_camera_disconnect() 1395 v4l2_device_unregister(&dev->v4l2_dev); stk_camera_disconnect() 1401 struct stk_camera dev = usb_get_intfdata(intf); stk_camera_suspend() local 1402 if (is_streaming(dev)) { stk_camera_suspend() 1403 stk_stop_stream(dev); stk_camera_suspend() 1405 set_streaming(dev); stk_camera_suspend() 1412 struct stk_camera *dev = usb_get_intfdata(intf); stk_camera_resume() local 1413 if (!is_initialised(dev)) stk_camera_resume() 1415 unset_initialised(dev); stk_camera_resume() 1416 stk_initialise(dev); stk_camera_resume() 1417 stk_camera_write_reg(dev, 0x0, 0x49); stk_camera_resume() 1418 stk_setup_format(dev); stk_camera_resume() 1419 if (is_streaming(dev)) stk_camera_resume() 1420 stk_start_stream(dev); stk_camera_resume()
/linux-4.1.27/drivers/w1/masters/
H A D	matrox_w1.c	106 static __inline__ u8 matrox_w1_read_reg(struct matrox_device dev, u8 reg) matrox_w1_read_reg() argument 110 writeb(reg, dev->port_index); matrox_w1_read_reg() 111 ret = readb(dev->port_data); matrox_w1_read_reg() 117 static __inline__ void matrox_w1_write_reg(struct matrox_device dev, u8 reg, u8 val) matrox_w1_write_reg() argument 119 writeb(reg, dev->port_index); matrox_w1_write_reg() 120 writeb(val, dev->port_data); matrox_w1_write_reg() 127 struct matrox_device dev = data; matrox_w1_write_ddc_bit() local 132 bit = dev->data_mask; matrox_w1_write_ddc_bit() 134 ret = matrox_w1_read_reg(dev, MATROX_GET_CONTROL); matrox_w1_write_ddc_bit() 135 matrox_w1_write_reg(dev, MATROX_GET_CONTROL, ((ret & ~dev->data_mask) \| bit)); matrox_w1_write_ddc_bit() 136 matrox_w1_write_reg(dev, MATROX_GET_DATA, 0x00); matrox_w1_write_ddc_bit() 142 struct matrox_device dev = data; matrox_w1_read_ddc_bit() local 144 ret = matrox_w1_read_reg(dev, MATROX_GET_DATA); matrox_w1_read_ddc_bit() 149 static void matrox_w1_hw_init(struct matrox_device dev) matrox_w1_hw_init() argument 151 matrox_w1_write_reg(dev, MATROX_GET_DATA, 0xFF); matrox_w1_hw_init() 152 matrox_w1_write_reg(dev, MATROX_GET_CONTROL, 0x00); matrox_w1_hw_init() 157 struct matrox_device dev; matrox_w1_probe() local 166 dev = kzalloc(sizeof(struct matrox_device) + matrox_w1_probe() 168 if (!dev) { matrox_w1_probe() 169 dev_err(&pdev->dev, matrox_w1_probe() 176 dev->bus_master = (struct w1_bus_master )(dev + 1); matrox_w1_probe() 182 dev->phys_addr = pci_resource_start(pdev, 1); matrox_w1_probe() 184 dev->virt_addr = ioremap_nocache(dev->phys_addr, 16384); matrox_w1_probe() 185 if (!dev->virt_addr) { matrox_w1_probe() 186 dev_err(&pdev->dev, "%s: failed to ioremap(0x%lx, %d).\n", matrox_w1_probe() 187 __func__, dev->phys_addr, 16384); matrox_w1_probe() 192 dev->base_addr = dev->virt_addr + MATROX_BASE; matrox_w1_probe() 193 dev->port_index = dev->base_addr + MATROX_PORT_INDEX_OFFSET; matrox_w1_probe() 194 dev->port_data = dev->base_addr + MATROX_PORT_DATA_OFFSET; matrox_w1_probe() 195 dev->data_mask = (MATROX_G400_DDC_DATA); matrox_w1_probe() 197 matrox_w1_hw_init(dev); matrox_w1_probe() 199 dev->bus_master->data = dev; matrox_w1_probe() 200 dev->bus_master->read_bit = &matrox_w1_read_ddc_bit; matrox_w1_probe() 201 dev->bus_master->write_bit = &matrox_w1_write_ddc_bit; matrox_w1_probe() 203 err = w1_add_master_device(dev->bus_master); matrox_w1_probe() 207 pci_set_drvdata(pdev, dev); matrox_w1_probe() 209 dev->found = 1; matrox_w1_probe() 211 dev_info(&pdev->dev, "Matrox G400 GPIO transport layer for 1-wire.\n"); matrox_w1_probe() 216 if (dev->virt_addr) matrox_w1_probe() 217 iounmap(dev->virt_addr); matrox_w1_probe() 218 kfree(dev); matrox_w1_probe() 225 struct matrox_device dev = pci_get_drvdata(pdev); matrox_w1_remove() local 227 assert(dev != NULL); matrox_w1_remove() 229 if (dev->found) { matrox_w1_remove() 230 w1_remove_master_device(dev->bus_master); matrox_w1_remove() 231 iounmap(dev->virt_addr); matrox_w1_remove() 233 kfree(dev); matrox_w1_remove()
/linux-4.1.27/drivers/media/usb/au0828/
H A D	au0828-video.c	60 static inline void i2c_gate_ctrl(struct au0828_dev dev, int val) i2c_gate_ctrl() argument 62 if (dev->dvb.frontend && dev->dvb.frontend->ops.analog_ops.i2c_gate_ctrl) i2c_gate_ctrl() 63 dev->dvb.frontend->ops.analog_ops.i2c_gate_ctrl(dev->dvb.frontend, val); i2c_gate_ctrl() 66 static inline void print_err_status(struct au0828_dev dev, print_err_status() argument 105 static int check_dev(struct au0828_dev dev) check_dev() argument 107 if (test_bit(DEV_DISCONNECTED, &dev->dev_state)) { check_dev() 112 if (test_bit(DEV_MISCONFIGURED, &dev->dev_state)) { check_dev() 125 struct au0828_dev dev = container_of(dma_q, struct au0828_dev, vidq); au0828_irq_callback() local 144 spin_lock_irqsave(&dev->slock, flags); au0828_irq_callback() 145 dev->isoc_ctl.isoc_copy(dev, urb); au0828_irq_callback() 146 spin_unlock_irqrestore(&dev->slock, flags); au0828_irq_callback() 160 dev->stream_state = STREAM_ON; au0828_irq_callback() 166 static void au0828_uninit_isoc(struct au0828_dev dev) au0828_uninit_isoc() argument 173 dev->isoc_ctl.nfields = -1; au0828_uninit_isoc() 174 for (i = 0; i < dev->isoc_ctl.num_bufs; i++) { au0828_uninit_isoc() 175 urb = dev->isoc_ctl.urb[i]; au0828_uninit_isoc() 182 if (dev->isoc_ctl.transfer_buffer[i]) { au0828_uninit_isoc() 183 usb_free_coherent(dev->usbdev, au0828_uninit_isoc() 185 dev->isoc_ctl.transfer_buffer[i], au0828_uninit_isoc() 189 dev->isoc_ctl.urb[i] = NULL; au0828_uninit_isoc() 191 dev->isoc_ctl.transfer_buffer[i] = NULL; au0828_uninit_isoc() 194 kfree(dev->isoc_ctl.urb); au0828_uninit_isoc() 195 kfree(dev->isoc_ctl.transfer_buffer); au0828_uninit_isoc() 197 dev->isoc_ctl.urb = NULL; au0828_uninit_isoc() 198 dev->isoc_ctl.transfer_buffer = NULL; au0828_uninit_isoc() 199 dev->isoc_ctl.num_bufs = 0; au0828_uninit_isoc() 201 dev->stream_state = STREAM_OFF; au0828_uninit_isoc() 207 static int au0828_init_isoc(struct au0828_dev dev, int max_packets, au0828_init_isoc() argument 209 int (isoc_copy) (struct au0828_dev dev, struct urb urb)) au0828_init_isoc() 211 struct au0828_dmaqueue dma_q = &dev->vidq; au0828_init_isoc() 220 dev->isoc_ctl.isoc_copy = isoc_copy; au0828_init_isoc() 221 dev->isoc_ctl.num_bufs = num_bufs; au0828_init_isoc() 223 dev->isoc_ctl.urb = kzalloc(sizeof(void )num_bufs, GFP_KERNEL); au0828_init_isoc() 224 if (!dev->isoc_ctl.urb) { au0828_init_isoc() 229 dev->isoc_ctl.transfer_buffer = kzalloc(sizeof(void )num_bufs, au0828_init_isoc() 231 if (!dev->isoc_ctl.transfer_buffer) { au0828_init_isoc() 233 kfree(dev->isoc_ctl.urb); au0828_init_isoc() 237 dev->isoc_ctl.max_pkt_size = max_pkt_size; au0828_init_isoc() 238 dev->isoc_ctl.buf = NULL; au0828_init_isoc() 240 sb_size = max_packets * dev->isoc_ctl.max_pkt_size; au0828_init_isoc() 243 for (i = 0; i < dev->isoc_ctl.num_bufs; i++) { au0828_init_isoc() 247 au0828_uninit_isoc(dev); au0828_init_isoc() 250 dev->isoc_ctl.urb[i] = urb; au0828_init_isoc() 252 dev->isoc_ctl.transfer_buffer[i] = usb_alloc_coherent(dev->usbdev, au0828_init_isoc() 254 if (!dev->isoc_ctl.transfer_buffer[i]) { au0828_init_isoc() 259 au0828_uninit_isoc(dev); au0828_init_isoc() 262 memset(dev->isoc_ctl.transfer_buffer[i], 0, sb_size); au0828_init_isoc() 264 pipe = usb_rcvisocpipe(dev->usbdev, au0828_init_isoc() 265 dev->isoc_in_endpointaddr), au0828_init_isoc() 267 usb_fill_int_urb(urb, dev->usbdev, pipe, au0828_init_isoc() 268 dev->isoc_ctl.transfer_buffer[i], sb_size, au0828_init_isoc() 278 dev->isoc_ctl.max_pkt_size; au0828_init_isoc() 279 k += dev->isoc_ctl.max_pkt_size; au0828_init_isoc() 284 for (i = 0; i < dev->isoc_ctl.num_bufs; i++) { au0828_init_isoc() 285 rc = usb_submit_urb(dev->isoc_ctl.urb[i], GFP_ATOMIC); au0828_init_isoc() 289 au0828_uninit_isoc(dev); au0828_init_isoc() 300 static inline void buffer_filled(struct au0828_dev dev, buffer_filled() argument 311 vb->v4l2_buf.sequence = dev->frame_count++; buffer_filled() 313 vb->v4l2_buf.sequence = dev->vbi_frame_count++; buffer_filled() 323 static void au0828_copy_video(struct au0828_dev dev, au0828_copy_video() argument 331 int bytesperline = dev->width << 1; /* Assumes 16-bit depth @@@@ / au0828_copy_video() 395 dev->greenscreen_detected = 1; au0828_copy_video() 407 struct au0828_dev dev = container_of(dma_q, struct au0828_dev, vidq); get_next_buf() local 411 dev->isoc_ctl.buf = NULL; get_next_buf() 422 dev->isoc_ctl.buf = buf; get_next_buf() 427 static void au0828_copy_vbi(struct au0828_dev dev, au0828_copy_vbi() argument 437 if (dev == NULL) { au0828_copy_vbi() 438 au0828_isocdbg("dev is null\n"); au0828_copy_vbi() 457 bytesperline = dev->vbi_width; au0828_copy_vbi() 467 startwrite += bytesperline * dev->vbi_height; au0828_copy_vbi() 482 struct au0828_dev dev = container_of(dma_q, struct au0828_dev, vbiq); vbi_get_next_buf() local 486 dev->isoc_ctl.vbi_buf = NULL; vbi_get_next_buf() 497 dev->isoc_ctl.vbi_buf = buf; vbi_get_next_buf() 504 static inline int au0828_isoc_copy(struct au0828_dev dev, struct urb urb) au0828_isoc_copy() argument 509 struct au0828_dmaqueue vbi_dma_q = &dev->vbiq; au0828_isoc_copy() 518 if (!dev) au0828_isoc_copy() 521 if (test_bit(DEV_DISCONNECTED, &dev->dev_state) \|\| au0828_isoc_copy() 522 test_bit(DEV_MISCONFIGURED, &dev->dev_state)) au0828_isoc_copy() 526 print_err_status(dev, -1, urb->status); au0828_isoc_copy() 531 buf = dev->isoc_ctl.buf; au0828_isoc_copy() 535 vbi_buf = dev->isoc_ctl.vbi_buf; au0828_isoc_copy() 543 print_err_status(dev, i, status); au0828_isoc_copy() 552 dev->max_pkt_size) { au0828_isoc_copy() 570 buffer_filled(dev, vbi_dma_q, vbi_buf); au0828_isoc_copy() 580 buffer_filled(dev, dma_q, buf); au0828_isoc_copy() 589 if (dev->vid_timeout_running) au0828_isoc_copy() 590 mod_timer(&dev->vid_timeout, au0828_isoc_copy() 592 if (dev->vbi_timeout_running) au0828_isoc_copy() 593 mod_timer(&dev->vbi_timeout, au0828_isoc_copy() 611 dev->vbi_read = 0; au0828_isoc_copy() 616 vbi_field_size = dev->vbi_width dev->vbi_height * 2; au0828_isoc_copy() 617 if (dev->vbi_read < vbi_field_size) { au0828_isoc_copy() 618 remain = vbi_field_size - dev->vbi_read; au0828_isoc_copy() 625 au0828_copy_vbi(dev, vbi_dma_q, vbi_buf, p, au0828_isoc_copy() 630 dev->vbi_read += lencopy; au0828_isoc_copy() 633 if (dev->vbi_read >= vbi_field_size && buf != NULL) au0828_isoc_copy() 634 au0828_copy_video(dev, dma_q, buf, p, outp, len); au0828_isoc_copy() 643 struct au0828_dev dev = vb2_get_drv_priv(vq); queue_setup() local 644 unsigned long img_size = dev->height dev->bytesperline; queue_setup() 661 struct au0828_dev dev = vb2_get_drv_priv(vb->vb2_queue); buffer_prepare() local 663 buf->length = dev->height dev->bytesperline; buffer_prepare() 680 struct au0828_dev dev = vb2_get_drv_priv(vb->vb2_queue); buffer_queue() local 681 struct au0828_dmaqueue vidq = &dev->vidq; buffer_queue() 687 spin_lock_irqsave(&dev->slock, flags); buffer_queue() 689 spin_unlock_irqrestore(&dev->slock, flags); buffer_queue() 692 static int au0828_i2s_init(struct au0828_dev dev) au0828_i2s_init() argument 695 au0828_writereg(dev, AU0828_AUDIOCTRL_50C, 0x01); au0828_i2s_init() 747 static void au0828_analog_stream_reset(struct au0828_dev dev) au0828_analog_stream_reset() argument 750 au0828_writereg(dev, AU0828_SENSORCTRL_100, 0x0); au0828_analog_stream_reset() 752 au0828_writereg(dev, AU0828_SENSORCTRL_100, 0xb3); au0828_analog_stream_reset() 758 static int au0828_stream_interrupt(struct au0828_dev dev) au0828_stream_interrupt() argument 762 dev->stream_state = STREAM_INTERRUPT; au0828_stream_interrupt() 763 if (test_bit(DEV_DISCONNECTED, &dev->dev_state)) au0828_stream_interrupt() 766 set_bit(DEV_MISCONFIGURED, &dev->dev_state); au0828_stream_interrupt() 775 struct au0828_dev dev = vb2_get_drv_priv(vq); au0828_start_analog_streaming() local 779 dev->streaming_users); au0828_start_analog_streaming() 782 dev->frame_count = 0; au0828_start_analog_streaming() 784 dev->vbi_frame_count = 0; au0828_start_analog_streaming() 786 if (dev->streaming_users == 0) { au0828_start_analog_streaming() 788 au0828_i2s_init(dev); au0828_start_analog_streaming() 789 rc = au0828_init_isoc(dev, AU0828_ISO_PACKETS_PER_URB, au0828_start_analog_streaming() 790 AU0828_MAX_ISO_BUFS, dev->max_pkt_size, au0828_start_analog_streaming() 798 v4l2_device_call_all(&dev->v4l2_dev, 0, video, au0828_start_analog_streaming() 800 dev->vid_timeout_running = 1; au0828_start_analog_streaming() 801 mod_timer(&dev->vid_timeout, jiffies + (HZ / 10)); au0828_start_analog_streaming() 803 dev->vbi_timeout_running = 1; au0828_start_analog_streaming() 804 mod_timer(&dev->vbi_timeout, jiffies + (HZ / 10)); au0828_start_analog_streaming() 807 dev->streaming_users++; au0828_start_analog_streaming() 813 struct au0828_dev dev = vb2_get_drv_priv(vq); au0828_stop_streaming() local 814 struct au0828_dmaqueue vidq = &dev->vidq; au0828_stop_streaming() 817 dprintk(1, "au0828_stop_streaming called %d\n", dev->streaming_users); au0828_stop_streaming() 819 if (dev->streaming_users-- == 1) au0828_stop_streaming() 820 au0828_uninit_isoc(dev); au0828_stop_streaming() 822 v4l2_device_call_all(&dev->v4l2_dev, 0, video, s_stream, 0); au0828_stop_streaming() 823 dev->vid_timeout_running = 0; au0828_stop_streaming() 824 del_timer_sync(&dev->vid_timeout); au0828_stop_streaming() 826 spin_lock_irqsave(&dev->slock, flags); au0828_stop_streaming() 827 if (dev->isoc_ctl.buf != NULL) { au0828_stop_streaming() 828 vb2_buffer_done(&dev->isoc_ctl.buf->vb, VB2_BUF_STATE_ERROR); au0828_stop_streaming() 829 dev->isoc_ctl.buf = NULL; au0828_stop_streaming() 838 spin_unlock_irqrestore(&dev->slock, flags); au0828_stop_streaming() 843 struct au0828_dev dev = vb2_get_drv_priv(vq); au0828_stop_vbi_streaming() local 844 struct au0828_dmaqueue vbiq = &dev->vbiq; au0828_stop_vbi_streaming() 848 dev->streaming_users); au0828_stop_vbi_streaming() 850 if (dev->streaming_users-- == 1) au0828_stop_vbi_streaming() 851 au0828_uninit_isoc(dev); au0828_stop_vbi_streaming() 853 spin_lock_irqsave(&dev->slock, flags); au0828_stop_vbi_streaming() 854 if (dev->isoc_ctl.vbi_buf != NULL) { au0828_stop_vbi_streaming() 855 vb2_buffer_done(&dev->isoc_ctl.vbi_buf->vb, au0828_stop_vbi_streaming() 857 dev->isoc_ctl.vbi_buf = NULL; au0828_stop_vbi_streaming() 866 spin_unlock_irqrestore(&dev->slock, flags); au0828_stop_vbi_streaming() 868 dev->vbi_timeout_running = 0; au0828_stop_vbi_streaming() 869 del_timer_sync(&dev->vbi_timeout); au0828_stop_vbi_streaming() 889 void au0828_analog_unregister(struct au0828_dev dev) au0828_analog_unregister() argument 893 video_unregister_device(&dev->vdev); au0828_analog_unregister() 894 video_unregister_device(&dev->vbi_dev); au0828_analog_unregister() 903 struct au0828_dev dev = (struct au0828_dev ) data; au0828_vid_buffer_timeout() local 904 struct au0828_dmaqueue dma_q = &dev->vidq; au0828_vid_buffer_timeout() 909 spin_lock_irqsave(&dev->slock, flags); au0828_vid_buffer_timeout() 911 buf = dev->isoc_ctl.buf; au0828_vid_buffer_timeout() 915 buffer_filled(dev, dma_q, buf); au0828_vid_buffer_timeout() 919 if (dev->vid_timeout_running == 1) au0828_vid_buffer_timeout() 920 mod_timer(&dev->vid_timeout, jiffies + (HZ / 10)); au0828_vid_buffer_timeout() 922 spin_unlock_irqrestore(&dev->slock, flags); au0828_vid_buffer_timeout() 927 struct au0828_dev dev = (struct au0828_dev ) data; au0828_vbi_buffer_timeout() local 928 struct au0828_dmaqueue dma_q = &dev->vbiq; au0828_vbi_buffer_timeout() 933 spin_lock_irqsave(&dev->slock, flags); au0828_vbi_buffer_timeout() 935 buf = dev->isoc_ctl.vbi_buf; au0828_vbi_buffer_timeout() 939 buffer_filled(dev, dma_q, buf); au0828_vbi_buffer_timeout() 943 if (dev->vbi_timeout_running == 1) au0828_vbi_buffer_timeout() 944 mod_timer(&dev->vbi_timeout, jiffies + (HZ / 10)); au0828_vbi_buffer_timeout() 945 spin_unlock_irqrestore(&dev->slock, flags); au0828_vbi_buffer_timeout() 950 struct au0828_dev dev = video_drvdata(filp); au0828_v4l2_open() local 955 __func__, dev->std_set_in_tuner_core, dev->dev_state, au0828_v4l2_open() 956 dev->streaming_users, dev->users); au0828_v4l2_open() 958 if (mutex_lock_interruptible(&dev->lock)) au0828_v4l2_open() 965 mutex_unlock(&dev->lock); au0828_v4l2_open() 969 if (dev->users == 0) { au0828_v4l2_open() 970 au0828_analog_stream_enable(dev); au0828_v4l2_open() 971 au0828_analog_stream_reset(dev); au0828_v4l2_open() 972 dev->stream_state = STREAM_OFF; au0828_v4l2_open() 973 set_bit(DEV_INITIALIZED, &dev->dev_state); au0828_v4l2_open() 975 dev->users++; au0828_v4l2_open() 976 mutex_unlock(&dev->lock); au0828_v4l2_open() 983 struct au0828_dev dev = video_drvdata(filp); au0828_v4l2_close() local 988 __func__, dev->std_set_in_tuner_core, dev->dev_state, au0828_v4l2_close() 989 dev->streaming_users, dev->users); au0828_v4l2_close() 991 mutex_lock(&dev->lock); au0828_v4l2_close() 992 if (vdev->vfl_type == VFL_TYPE_GRABBER && dev->vid_timeout_running) { au0828_v4l2_close() 994 dev->vid_timeout_running = 0; au0828_v4l2_close() 995 del_timer_sync(&dev->vid_timeout); au0828_v4l2_close() 997 dev->vbi_timeout_running) { au0828_v4l2_close() 999 dev->vbi_timeout_running = 0; au0828_v4l2_close() 1000 del_timer_sync(&dev->vbi_timeout); au0828_v4l2_close() 1003 if (test_bit(DEV_DISCONNECTED, &dev->dev_state)) au0828_v4l2_close() 1006 if (dev->users == 1) { au0828_v4l2_close() 1008 v4l2_device_call_all(&dev->v4l2_dev, 0, core, s_power, 0); au0828_v4l2_close() 1009 dev->std_set_in_tuner_core = 0; au0828_v4l2_close() 1013 ret = usb_set_interface(dev->usbdev, 0, 0); au0828_v4l2_close() 1019 dev->users--; au0828_v4l2_close() 1020 mutex_unlock(&dev->lock); au0828_v4l2_close() 1024 / Must be called with dev->lock held / au0828_init_tuner() 1025 static void au0828_init_tuner(struct au0828_dev dev) au0828_init_tuner() argument 1028 .frequency = dev->ctrl_freq, au0828_init_tuner() 1033 dev->std_set_in_tuner_core, dev->dev_state); au0828_init_tuner() 1035 if (dev->std_set_in_tuner_core) au0828_init_tuner() 1037 dev->std_set_in_tuner_core = 1; au0828_init_tuner() 1038 i2c_gate_ctrl(dev, 1); au0828_init_tuner() 1042 v4l2_device_call_all(&dev->v4l2_dev, 0, video, s_std, dev->std); au0828_init_tuner() 1043 v4l2_device_call_all(&dev->v4l2_dev, 0, tuner, s_frequency, &f); au0828_init_tuner() 1044 i2c_gate_ctrl(dev, 0); au0828_init_tuner() 1047 static int au0828_set_format(struct au0828_dev dev, unsigned int cmd, au0828_set_format() argument 1078 dev->width = width; au0828_set_format() 1079 dev->height = height; au0828_set_format() 1080 dev->frame_size = width height * 2; au0828_set_format() 1081 dev->field_size = width * height; au0828_set_format() 1082 dev->bytesperline = width * 2; au0828_set_format() 1084 if (dev->stream_state == STREAM_ON) { au0828_set_format() 1086 ret = au0828_stream_interrupt(dev); au0828_set_format() 1093 au0828_analog_stream_enable(dev); au0828_set_format() 1102 struct au0828_dev dev = video_drvdata(file); vidioc_querycap() local 1105 dev->std_set_in_tuner_core, dev->dev_state); vidioc_querycap() 1108 strlcpy(cap->card, dev->board.name, sizeof(cap->card)); vidioc_querycap() 1109 usb_make_path(dev->usbdev, cap->bus_info, sizeof(cap->bus_info)); vidioc_querycap() 1145 struct au0828_dev dev = video_drvdata(file); vidioc_g_fmt_vid_cap() local 1148 dev->std_set_in_tuner_core, dev->dev_state); vidioc_g_fmt_vid_cap() 1150 f->fmt.pix.width = dev->width; vidioc_g_fmt_vid_cap() 1151 f->fmt.pix.height = dev->height; vidioc_g_fmt_vid_cap() 1153 f->fmt.pix.bytesperline = dev->bytesperline; vidioc_g_fmt_vid_cap() 1154 f->fmt.pix.sizeimage = dev->frame_size; vidioc_g_fmt_vid_cap() 1164 struct au0828_dev dev = video_drvdata(file); vidioc_try_fmt_vid_cap() local 1167 dev->std_set_in_tuner_core, dev->dev_state); vidioc_try_fmt_vid_cap() 1169 return au0828_set_format(dev, VIDIOC_TRY_FMT, f); vidioc_try_fmt_vid_cap() 1175 struct au0828_dev dev = video_drvdata(file); vidioc_s_fmt_vid_cap() local 1179 dev->std_set_in_tuner_core, dev->dev_state); vidioc_s_fmt_vid_cap() 1181 rc = check_dev(dev); vidioc_s_fmt_vid_cap() 1185 if (vb2_is_busy(&dev->vb_vidq)) { vidioc_s_fmt_vid_cap() 1191 rc = au0828_set_format(dev, VIDIOC_S_FMT, f); vidioc_s_fmt_vid_cap() 1198 struct au0828_dev dev = video_drvdata(file); vidioc_s_std() local 1201 dev->std_set_in_tuner_core, dev->dev_state); vidioc_s_std() 1203 if (norm == dev->std) vidioc_s_std() 1206 if (dev->streaming_users > 0) vidioc_s_std() 1209 dev->std = norm; vidioc_s_std() 1211 au0828_init_tuner(dev); vidioc_s_std() 1213 i2c_gate_ctrl(dev, 1); vidioc_s_std() 1221 v4l2_device_call_all(&dev->v4l2_dev, 0, video, s_std, norm); vidioc_s_std() 1223 i2c_gate_ctrl(dev, 0); vidioc_s_std() 1230 struct au0828_dev dev = video_drvdata(file); vidioc_g_std() local 1233 dev->std_set_in_tuner_core, dev->dev_state); vidioc_g_std() 1235 norm = dev->std; vidioc_g_std() 1242 struct au0828_dev dev = video_drvdata(file); vidioc_enum_input() local 1256 dev->std_set_in_tuner_core, dev->dev_state); vidioc_enum_input() 1276 input->std = dev->vdev.tvnorms; vidioc_enum_input() 1283 struct au0828_dev dev = video_drvdata(file); vidioc_g_input() local 1286 dev->std_set_in_tuner_core, dev->dev_state); vidioc_g_input() 1288 i = dev->ctrl_input; vidioc_g_input() 1292 static void au0828_s_input(struct au0828_dev dev, int index) au0828_s_input() argument 1297 dev->std_set_in_tuner_core, dev->dev_state); au0828_s_input() 1301 dev->input_type = AU0828_VMUX_SVIDEO; au0828_s_input() 1302 dev->ctrl_ainput = 1; au0828_s_input() 1305 dev->input_type = AU0828_VMUX_COMPOSITE; au0828_s_input() 1306 dev->ctrl_ainput = 1; au0828_s_input() 1309 dev->input_type = AU0828_VMUX_TELEVISION; au0828_s_input() 1310 dev->ctrl_ainput = 0; au0828_s_input() 1318 v4l2_device_call_all(&dev->v4l2_dev, 0, video, s_routing, au0828_s_input() 1331 (AUVI_INPUT(i).audio_setup)(dev, enable); au0828_s_input() 1337 (AUVI_INPUT(i).audio_setup)(dev, enable); au0828_s_input() 1342 v4l2_device_call_all(&dev->v4l2_dev, 0, audio, s_routing, au0828_s_input() 1348 struct au0828_dev dev = video_drvdata(file); vidioc_s_input() local 1356 dev->ctrl_input = index; vidioc_s_input() 1357 au0828_s_input(dev, index); vidioc_s_input() 1379 struct au0828_dev dev = video_drvdata(file); vidioc_g_audio() local 1382 dev->std_set_in_tuner_core, dev->dev_state); vidioc_g_audio() 1384 a->index = dev->ctrl_ainput; vidioc_g_audio() 1396 struct au0828_dev dev = video_drvdata(file); vidioc_s_audio() local 1398 if (a->index != dev->ctrl_ainput) vidioc_s_audio() 1402 dev->std_set_in_tuner_core, dev->dev_state); vidioc_s_audio() 1408 struct au0828_dev dev = video_drvdata(file); vidioc_g_tuner() local 1414 dev->std_set_in_tuner_core, dev->dev_state); vidioc_g_tuner() 1418 au0828_init_tuner(dev); vidioc_g_tuner() 1419 i2c_gate_ctrl(dev, 1); vidioc_g_tuner() 1420 v4l2_device_call_all(&dev->v4l2_dev, 0, tuner, g_tuner, t); vidioc_g_tuner() 1421 i2c_gate_ctrl(dev, 0); vidioc_g_tuner() 1428 struct au0828_dev dev = video_drvdata(file); vidioc_s_tuner() local 1434 dev->std_set_in_tuner_core, dev->dev_state); vidioc_s_tuner() 1436 au0828_init_tuner(dev); vidioc_s_tuner() 1437 i2c_gate_ctrl(dev, 1); vidioc_s_tuner() 1438 v4l2_device_call_all(&dev->v4l2_dev, 0, tuner, s_tuner, t); vidioc_s_tuner() 1439 i2c_gate_ctrl(dev, 0); vidioc_s_tuner() 1451 struct au0828_dev dev = video_drvdata(file); vidioc_g_frequency() local 1456 dev->std_set_in_tuner_core, dev->dev_state); vidioc_g_frequency() 1457 freq->frequency = dev->ctrl_freq; vidioc_g_frequency() 1464 struct au0828_dev dev = video_drvdata(file); vidioc_s_frequency() local 1471 dev->std_set_in_tuner_core, dev->dev_state); vidioc_s_frequency() 1473 au0828_init_tuner(dev); vidioc_s_frequency() 1474 i2c_gate_ctrl(dev, 1); vidioc_s_frequency() 1476 v4l2_device_call_all(&dev->v4l2_dev, 0, tuner, s_frequency, freq); vidioc_s_frequency() 1478 v4l2_device_call_all(&dev->v4l2_dev, 0, tuner, g_frequency, &new_freq); vidioc_s_frequency() 1479 dev->ctrl_freq = new_freq.frequency; vidioc_s_frequency() 1481 i2c_gate_ctrl(dev, 0); vidioc_s_frequency() 1483 au0828_analog_stream_reset(dev); vidioc_s_frequency() 1494 struct au0828_dev dev = video_drvdata(file); vidioc_g_fmt_vbi_cap() local 1497 dev->std_set_in_tuner_core, dev->dev_state); vidioc_g_fmt_vbi_cap() 1499 format->fmt.vbi.samples_per_line = dev->vbi_width; vidioc_g_fmt_vbi_cap() 1505 format->fmt.vbi.count[0] = dev->vbi_height; vidioc_g_fmt_vbi_cap() 1506 format->fmt.vbi.count[1] = dev->vbi_height; vidioc_g_fmt_vbi_cap() 1517 struct au0828_dev dev = video_drvdata(file); vidioc_cropcap() local 1523 dev->std_set_in_tuner_core, dev->dev_state); vidioc_cropcap() 1527 cc->bounds.width = dev->width; vidioc_cropcap() 1528 cc->bounds.height = dev->height; vidioc_cropcap() 1542 struct au0828_dev dev = video_drvdata(file); vidioc_g_register() local 1545 dev->std_set_in_tuner_core, dev->dev_state); vidioc_g_register() 1547 reg->val = au0828_read(dev, reg->reg); vidioc_g_register() 1555 struct au0828_dev dev = video_drvdata(file); vidioc_s_register() local 1558 dev->std_set_in_tuner_core, dev->dev_state); vidioc_s_register() 1560 return au0828_writereg(dev, reg->reg, reg->val); vidioc_s_register() 1575 void au0828_v4l2_suspend(struct au0828_dev dev) au0828_v4l2_suspend() argument 1582 if (dev->stream_state == STREAM_ON) { au0828_v4l2_suspend() 1584 au0828_analog_stream_disable(dev); au0828_v4l2_suspend() 1586 for (i = 0; i < dev->isoc_ctl.num_bufs; i++) { au0828_v4l2_suspend() 1587 urb = dev->isoc_ctl.urb[i]; au0828_v4l2_suspend() 1597 if (dev->vid_timeout_running) au0828_v4l2_suspend() 1598 del_timer_sync(&dev->vid_timeout); au0828_v4l2_suspend() 1599 if (dev->vbi_timeout_running) au0828_v4l2_suspend() 1600 del_timer_sync(&dev->vbi_timeout); au0828_v4l2_suspend() 1603 void au0828_v4l2_resume(struct au0828_dev dev) au0828_v4l2_resume() argument 1609 if (dev->stream_state == STREAM_ON) { au0828_v4l2_resume() 1610 au0828_stream_interrupt(dev); au0828_v4l2_resume() 1611 au0828_init_tuner(dev); au0828_v4l2_resume() 1614 if (dev->vid_timeout_running) au0828_v4l2_resume() 1615 mod_timer(&dev->vid_timeout, jiffies + (HZ / 10)); au0828_v4l2_resume() 1616 if (dev->vbi_timeout_running) au0828_v4l2_resume() 1617 mod_timer(&dev->vbi_timeout, jiffies + (HZ / 10)); au0828_v4l2_resume() 1620 au0828_i2s_init(dev); au0828_v4l2_resume() 1622 au0828_analog_stream_enable(dev); au0828_v4l2_resume() 1624 if (!(dev->stream_state == STREAM_ON)) { au0828_v4l2_resume() 1625 au0828_analog_stream_reset(dev); au0828_v4l2_resume() 1627 for (i = 0; i < dev->isoc_ctl.num_bufs; i++) { au0828_v4l2_resume() 1628 rc = usb_submit_urb(dev->isoc_ctl.urb[i], GFP_ATOMIC); au0828_v4l2_resume() 1632 au0828_uninit_isoc(dev); au0828_v4l2_resume() 1699 static int au0828_vb2_setup(struct au0828_dev dev) au0828_vb2_setup() argument 1705 q = &dev->vb_vidq; au0828_vb2_setup() 1709 q->drv_priv = dev; au0828_vb2_setup() 1719 q = &dev->vb_vbiq; au0828_vb2_setup() 1723 q->drv_priv = dev; au0828_vb2_setup() 1737 int au0828_analog_register(struct au0828_dev dev, au0828_analog_register() argument 1749 retval = usb_set_interface(dev->usbdev, au0828_analog_register() 1767 dev->max_pkt_size = (tmp & 0x07ff) * au0828_analog_register() 1769 dev->isoc_in_endpointaddr = endpoint->bEndpointAddress; au0828_analog_register() 1772 dev->isoc_in_endpointaddr, dev->max_pkt_size); au0828_analog_register() 1775 if (!(dev->isoc_in_endpointaddr)) { au0828_analog_register() 1780 init_waitqueue_head(&dev->open); au0828_analog_register() 1781 spin_lock_init(&dev->slock); au0828_analog_register() 1784 INIT_LIST_HEAD(&dev->vidq.active); au0828_analog_register() 1785 INIT_LIST_HEAD(&dev->vbiq.active); au0828_analog_register() 1787 setup_timer(&dev->vid_timeout, au0828_vid_buffer_timeout, au0828_analog_register() 1788 (unsigned long)dev); au0828_analog_register() 1789 setup_timer(&dev->vbi_timeout, au0828_vbi_buffer_timeout, au0828_analog_register() 1790 (unsigned long)dev); au0828_analog_register() 1792 dev->width = NTSC_STD_W; au0828_analog_register() 1793 dev->height = NTSC_STD_H; au0828_analog_register() 1794 dev->field_size = dev->width * dev->height; au0828_analog_register() 1795 dev->frame_size = dev->field_size << 1; au0828_analog_register() 1796 dev->bytesperline = dev->width << 1; au0828_analog_register() 1797 dev->vbi_width = 720; au0828_analog_register() 1798 dev->vbi_height = 1; au0828_analog_register() 1799 dev->ctrl_ainput = 0; au0828_analog_register() 1800 dev->ctrl_freq = 960; au0828_analog_register() 1801 dev->std = V4L2_STD_NTSC_M; au0828_analog_register() 1802 au0828_s_input(dev, 0); au0828_analog_register() 1804 mutex_init(&dev->vb_queue_lock); au0828_analog_register() 1805 mutex_init(&dev->vb_vbi_queue_lock); au0828_analog_register() 1808 dev->vdev = au0828_video_template; au0828_analog_register() 1809 dev->vdev.v4l2_dev = &dev->v4l2_dev; au0828_analog_register() 1810 dev->vdev.lock = &dev->lock; au0828_analog_register() 1811 dev->vdev.queue = &dev->vb_vidq; au0828_analog_register() 1812 dev->vdev.queue->lock = &dev->vb_queue_lock; au0828_analog_register() 1813 strcpy(dev->vdev.name, "au0828a video"); au0828_analog_register() 1816 dev->vbi_dev = au0828_video_template; au0828_analog_register() 1817 dev->vbi_dev.v4l2_dev = &dev->v4l2_dev; au0828_analog_register() 1818 dev->vbi_dev.lock = &dev->lock; au0828_analog_register() 1819 dev->vbi_dev.queue = &dev->vb_vbiq; au0828_analog_register() 1820 dev->vbi_dev.queue->lock = &dev->vb_vbi_queue_lock; au0828_analog_register() 1821 strcpy(dev->vbi_dev.name, "au0828a vbi"); au0828_analog_register() 1824 retval = au0828_vb2_setup(dev); au0828_analog_register() 1832 video_set_drvdata(&dev->vdev, dev); au0828_analog_register() 1833 retval = video_register_device(&dev->vdev, VFL_TYPE_GRABBER, -1); au0828_analog_register() 1842 video_set_drvdata(&dev->vbi_dev, dev); au0828_analog_register() 1843 retval = video_register_device(&dev->vbi_dev, VFL_TYPE_VBI, -1); au0828_analog_register() 1856 video_unregister_device(&dev->vdev); au0828_analog_register() 1858 vb2_queue_release(&dev->vb_vidq); au0828_analog_register() 1859 vb2_queue_release(&dev->vb_vbiq); au0828_analog_register()
H A D	au0828-core.c	50 static int send_control_msg(struct au0828_dev dev, u16 request, u32 value, 52 static int recv_control_msg(struct au0828_dev dev, u16 request, u32 value, 59 u32 au0828_readreg(struct au0828_dev dev, u16 reg) au0828_readreg() argument 63 recv_control_msg(dev, CMD_REQUEST_IN, 0, reg, &result, 1); au0828_readreg() 69 u32 au0828_writereg(struct au0828_dev dev, u16 reg, u32 val) au0828_writereg() argument 72 return send_control_msg(dev, CMD_REQUEST_OUT, val, reg); au0828_writereg() 75 static int send_control_msg(struct au0828_dev dev, u16 request, u32 value, send_control_msg() argument 80 if (dev->usbdev) { send_control_msg() 83 status = usb_control_msg(dev->usbdev, send_control_msg() 84 usb_sndctrlpipe(dev->usbdev, 0), send_control_msg() 102 static int recv_control_msg(struct au0828_dev dev, u16 request, u32 value, recv_control_msg() argument 106 mutex_lock(&dev->mutex); recv_control_msg() 107 if (dev->usbdev) { recv_control_msg() 108 status = usb_control_msg(dev->usbdev, recv_control_msg() 109 usb_rcvctrlpipe(dev->usbdev, 0), recv_control_msg() 113 dev->ctrlmsg, size, 1000); recv_control_msg() 124 memcpy(cp, dev->ctrlmsg, size); recv_control_msg() 126 mutex_unlock(&dev->mutex); recv_control_msg() 130 static void au0828_usb_release(struct au0828_dev dev) au0828_usb_release() argument 133 au0828_i2c_unregister(dev); au0828_usb_release() 135 kfree(dev); au0828_usb_release() 141 struct au0828_dev dev = au0828_usb_v4l2_release() local 144 v4l2_ctrl_handler_free(&dev->v4l2_ctrl_hdl); au0828_usb_v4l2_release() 145 v4l2_device_unregister(&dev->v4l2_dev); au0828_usb_v4l2_release() 146 au0828_usb_release(dev); au0828_usb_v4l2_release() 152 struct au0828_dev dev = usb_get_intfdata(interface); au0828_usb_disconnect() local 157 dev->usbdev is NULL, for poll (e.g: IR) try to access au0828_usb_disconnect() 162 set_bit(DEV_DISCONNECTED, &dev->dev_state); au0828_usb_disconnect() 164 au0828_rc_unregister(dev); au0828_usb_disconnect() 166 au0828_dvb_unregister(dev); au0828_usb_disconnect() 169 mutex_lock(&dev->mutex); au0828_usb_disconnect() 170 dev->usbdev = NULL; au0828_usb_disconnect() 171 mutex_unlock(&dev->mutex); au0828_usb_disconnect() 174 au0828_analog_unregister(dev); au0828_usb_disconnect() 175 v4l2_device_disconnect(&dev->v4l2_dev); au0828_usb_disconnect() 176 v4l2_device_put(&dev->v4l2_dev); au0828_usb_disconnect() 180 au0828_usb_release(dev); au0828_usb_disconnect() 189 struct au0828_dev dev; au0828_usb_probe() local 213 dev = kzalloc(sizeof(dev), GFP_KERNEL); au0828_usb_probe() 214 if (dev == NULL) { au0828_usb_probe() 219 mutex_init(&dev->lock); au0828_usb_probe() 220 mutex_lock(&dev->lock); au0828_usb_probe() 221 mutex_init(&dev->mutex); au0828_usb_probe() 222 mutex_init(&dev->dvb.lock); au0828_usb_probe() 223 dev->usbdev = usbdev; au0828_usb_probe() 224 dev->boardnr = id->driver_info; au0828_usb_probe() 227 dev->v4l2_dev.release = au0828_usb_v4l2_release; au0828_usb_probe() 230 retval = v4l2_device_register(&interface->dev, &dev->v4l2_dev); au0828_usb_probe() 234 mutex_unlock(&dev->lock); au0828_usb_probe() 235 kfree(dev); au0828_usb_probe() 239 retval = v4l2_ctrl_handler_init(&dev->v4l2_ctrl_hdl, 4); au0828_usb_probe() 243 mutex_unlock(&dev->lock); au0828_usb_probe() 244 kfree(dev); au0828_usb_probe() 247 dev->v4l2_dev.ctrl_handler = &dev->v4l2_ctrl_hdl; au0828_usb_probe() 251 au0828_write(dev, REG_600, 1 << 4); au0828_usb_probe() 254 au0828_gpio_setup(dev); au0828_usb_probe() 257 au0828_i2c_register(dev); au0828_usb_probe() 260 au0828_card_setup(dev); au0828_usb_probe() 265 au0828_analog_register(dev, interface); au0828_usb_probe() 269 retval = au0828_dvb_register(dev); au0828_usb_probe() 275 au0828_rc_register(dev); au0828_usb_probe() 281 usb_set_intfdata(interface, dev); au0828_usb_probe() 284 dev->board.name == NULL ? "Unset" : dev->board.name); au0828_usb_probe() 286 mutex_unlock(&dev->lock); au0828_usb_probe() 294 struct au0828_dev dev = usb_get_intfdata(interface); au0828_suspend() local 296 if (!dev) au0828_suspend() 301 au0828_rc_suspend(dev); au0828_suspend() 302 au0828_v4l2_suspend(dev); au0828_suspend() 303 au0828_dvb_suspend(dev); au0828_suspend() 312 struct au0828_dev *dev = usb_get_intfdata(interface); au0828_resume() local 313 if (!dev) au0828_resume() 319 au0828_write(dev, REG_600, 1 << 4); au0828_resume() 322 au0828_gpio_setup(dev); au0828_resume() 324 au0828_rc_resume(dev); au0828_resume() 325 au0828_v4l2_resume(dev); au0828_resume() 326 au0828_dvb_resume(dev); au0828_resume()
/linux-4.1.27/drivers/scsi/
H A D	scsi_pm.c	21 static int do_scsi_suspend(struct device dev, const struct dev_pm_ops pm) do_scsi_suspend() argument 23 return pm && pm->suspend ? pm->suspend(dev) : 0; do_scsi_suspend() 26 static int do_scsi_freeze(struct device dev, const struct dev_pm_ops pm) do_scsi_freeze() argument 28 return pm && pm->freeze ? pm->freeze(dev) : 0; do_scsi_freeze() 31 static int do_scsi_poweroff(struct device dev, const struct dev_pm_ops pm) do_scsi_poweroff() argument 33 return pm && pm->poweroff ? pm->poweroff(dev) : 0; do_scsi_poweroff() 36 static int do_scsi_resume(struct device dev, const struct dev_pm_ops pm) do_scsi_resume() argument 38 return pm && pm->resume ? pm->resume(dev) : 0; do_scsi_resume() 41 static int do_scsi_thaw(struct device dev, const struct dev_pm_ops pm) do_scsi_thaw() argument 43 return pm && pm->thaw ? pm->thaw(dev) : 0; do_scsi_thaw() 46 static int do_scsi_restore(struct device dev, const struct dev_pm_ops pm) do_scsi_restore() argument 48 return pm && pm->restore ? pm->restore(dev) : 0; do_scsi_restore() 51 static int scsi_dev_type_suspend(struct device dev, scsi_dev_type_suspend() argument 54 const struct dev_pm_ops pm = dev->driver ? dev->driver->pm : NULL; scsi_dev_type_suspend() 60 err = scsi_device_quiesce(to_scsi_device(dev)); scsi_dev_type_suspend() 62 err = cb(dev, pm); scsi_dev_type_suspend() 64 scsi_device_resume(to_scsi_device(dev)); scsi_dev_type_suspend() 66 dev_dbg(dev, "scsi suspend: %d\n", err); scsi_dev_type_suspend() 70 static int scsi_dev_type_resume(struct device dev, scsi_dev_type_resume() argument 73 const struct dev_pm_ops pm = dev->driver ? dev->driver->pm : NULL; scsi_dev_type_resume() 76 err = cb(dev, pm); scsi_dev_type_resume() 77 scsi_device_resume(to_scsi_device(dev)); scsi_dev_type_resume() 78 dev_dbg(dev, "scsi resume: %d\n", err); scsi_dev_type_resume() 81 pm_runtime_disable(dev); scsi_dev_type_resume() 82 pm_runtime_set_active(dev); scsi_dev_type_resume() 83 pm_runtime_enable(dev); scsi_dev_type_resume() 90 scsi_bus_suspend_common(struct device dev, scsi_bus_suspend_common() argument 95 if (scsi_is_sdev_device(dev)) { scsi_bus_suspend_common() 102 if (pm_runtime_suspended(dev)) scsi_bus_suspend_common() 105 err = scsi_dev_type_suspend(dev, cb); scsi_bus_suspend_common() 111 static void async_sdev_resume(void dev, async_cookie_t cookie) async_sdev_resume() argument 113 scsi_dev_type_resume(dev, do_scsi_resume); async_sdev_resume() 116 static void async_sdev_thaw(void dev, async_cookie_t cookie) async_sdev_thaw() argument 118 scsi_dev_type_resume(dev, do_scsi_thaw); async_sdev_thaw() 121 static void async_sdev_restore(void dev, async_cookie_t cookie) async_sdev_restore() argument 123 scsi_dev_type_resume(dev, do_scsi_restore); async_sdev_restore() 126 static int scsi_bus_resume_common(struct device dev, scsi_bus_resume_common() argument 131 if (!scsi_is_sdev_device(dev)) scsi_bus_resume_common() 143 async_schedule_domain(fn, dev, &scsi_sd_pm_domain); scsi_bus_resume_common() 154 pm_runtime_disable(dev); scsi_bus_resume_common() 155 pm_runtime_set_active(dev); scsi_bus_resume_common() 156 pm_runtime_enable(dev); scsi_bus_resume_common() 161 static int scsi_bus_prepare(struct device dev) scsi_bus_prepare() argument 163 if (scsi_is_sdev_device(dev)) { scsi_bus_prepare() 167 } else if (scsi_is_host_device(dev)) { scsi_bus_prepare() 174 static int scsi_bus_suspend(struct device dev) scsi_bus_suspend() argument 176 return scsi_bus_suspend_common(dev, do_scsi_suspend); scsi_bus_suspend() 179 static int scsi_bus_resume(struct device dev) scsi_bus_resume() argument 181 return scsi_bus_resume_common(dev, do_scsi_resume); scsi_bus_resume() 184 static int scsi_bus_freeze(struct device dev) scsi_bus_freeze() argument 186 return scsi_bus_suspend_common(dev, do_scsi_freeze); scsi_bus_freeze() 189 static int scsi_bus_thaw(struct device dev) scsi_bus_thaw() argument 191 return scsi_bus_resume_common(dev, do_scsi_thaw); scsi_bus_thaw() 194 static int scsi_bus_poweroff(struct device dev) scsi_bus_poweroff() argument 196 return scsi_bus_suspend_common(dev, do_scsi_poweroff); scsi_bus_poweroff() 199 static int scsi_bus_restore(struct device dev) scsi_bus_restore() argument 201 return scsi_bus_resume_common(dev, do_scsi_restore); scsi_bus_restore() 216 static int sdev_runtime_suspend(struct device dev) sdev_runtime_suspend() argument 218 const struct dev_pm_ops pm = dev->driver ? dev->driver->pm : NULL; sdev_runtime_suspend() 219 struct scsi_device sdev = to_scsi_device(dev); sdev_runtime_suspend() 226 err = pm->runtime_suspend(dev); sdev_runtime_suspend() 232 static int scsi_runtime_suspend(struct device dev) scsi_runtime_suspend() argument 236 dev_dbg(dev, "scsi_runtime_suspend\n"); scsi_runtime_suspend() 237 if (scsi_is_sdev_device(dev)) scsi_runtime_suspend() 238 err = sdev_runtime_suspend(dev); scsi_runtime_suspend() 245 static int sdev_runtime_resume(struct device dev) sdev_runtime_resume() argument 247 struct scsi_device sdev = to_scsi_device(dev); sdev_runtime_resume() 248 const struct dev_pm_ops pm = dev->driver ? dev->driver->pm : NULL; sdev_runtime_resume() 253 err = pm->runtime_resume(dev); sdev_runtime_resume() 259 static int scsi_runtime_resume(struct device dev) scsi_runtime_resume() argument 263 dev_dbg(dev, "scsi_runtime_resume\n"); scsi_runtime_resume() 264 if (scsi_is_sdev_device(dev)) scsi_runtime_resume() 265 err = sdev_runtime_resume(dev); scsi_runtime_resume() 272 static int scsi_runtime_idle(struct device *dev) scsi_runtime_idle() argument 274 dev_dbg(dev, "scsi_runtime_idle\n"); scsi_runtime_idle() 278 if (scsi_is_sdev_device(dev)) { scsi_runtime_idle() 279 pm_runtime_mark_last_busy(dev); scsi_runtime_idle() 280 pm_runtime_autosuspend(dev); scsi_runtime_idle() 308 pm_runtime_get_sync(&starget->dev); scsi_autopm_get_target() 313 pm_runtime_put_sync(&starget->dev); scsi_autopm_put_target()
/linux-4.1.27/arch/xtensa/platforms/iss/
H A D	simdisk.c	72 static void simdisk_transfer(struct simdisk dev, unsigned long sector, simdisk_transfer() argument 78 if (offset > dev->size \|\| dev->size - offset < nbytes) { simdisk_transfer() 84 spin_lock(&dev->lock); simdisk_transfer() 88 simc_lseek(dev->fd, offset, SEEK_SET); simdisk_transfer() 90 io = simc_write(dev->fd, buffer, nbytes); simdisk_transfer() 92 io = simc_read(dev->fd, buffer, nbytes); simdisk_transfer() 101 spin_unlock(&dev->lock); simdisk_transfer() 104 static int simdisk_xfer_bio(struct simdisk dev, struct bio bio) simdisk_xfer_bio() argument 114 simdisk_transfer(dev, sector, len, buffer, bio_for_each_segment() 124 struct simdisk dev = q->queuedata; simdisk_make_request() local 125 int status = simdisk_xfer_bio(dev, bio); simdisk_make_request() 132 struct simdisk dev = bdev->bd_disk->private_data; simdisk_open() local 134 spin_lock(&dev->lock); simdisk_open() 135 if (!dev->users) simdisk_open() 137 ++dev->users; simdisk_open() 138 spin_unlock(&dev->lock); simdisk_open() 144 struct simdisk dev = disk->private_data; simdisk_release() local 145 spin_lock(&dev->lock); simdisk_release() 146 --dev->users; simdisk_release() 147 spin_unlock(&dev->lock); simdisk_release() 159 static int simdisk_attach(struct simdisk dev, const char filename) simdisk_attach() argument 167 spin_lock(&dev->lock); simdisk_attach() 169 if (dev->fd != -1) { simdisk_attach() 173 dev->fd = simc_open(filename, O_RDWR, 0); simdisk_attach() 174 if (dev->fd == -1) { simdisk_attach() 179 dev->size = simc_lseek(dev->fd, 0, SEEK_END); simdisk_attach() 180 set_capacity(dev->gd, dev->size >> SECTOR_SHIFT); simdisk_attach() 181 dev->filename = filename; simdisk_attach() 182 pr_info("SIMDISK: %s=%s\n", dev->gd->disk_name, dev->filename); simdisk_attach() 186 spin_unlock(&dev->lock); simdisk_attach() 191 static int simdisk_detach(struct simdisk dev) simdisk_detach() argument 195 spin_lock(&dev->lock); simdisk_detach() 197 if (dev->users != 0) { simdisk_detach() 199 } else if (dev->fd != -1) { simdisk_detach() 200 if (simc_close(dev->fd)) { simdisk_detach() 202 dev->filename, errno); simdisk_detach() 206 dev->gd->disk_name, dev->filename); simdisk_detach() 207 dev->fd = -1; simdisk_detach() 208 kfree(dev->filename); simdisk_detach() 209 dev->filename = NULL; simdisk_detach() 212 spin_unlock(&dev->lock); simdisk_detach() 219 struct simdisk dev = PDE_DATA(file_inode(file)); proc_read_simdisk() local 220 const char s = dev->filename; proc_read_simdisk() 236 struct simdisk dev = PDE_DATA(file_inode(file)); proc_write_simdisk() local 246 err = simdisk_detach(dev); proc_write_simdisk() 256 err = simdisk_attach(dev, tmp); proc_write_simdisk() 271 static int __init simdisk_setup(struct simdisk dev, int which, simdisk_setup() argument 276 dev->fd = -1; simdisk_setup() 277 dev->filename = NULL; simdisk_setup() 278 spin_lock_init(&dev->lock); simdisk_setup() 279 dev->users = 0; simdisk_setup() 281 dev->queue = blk_alloc_queue(GFP_KERNEL); simdisk_setup() 282 if (dev->queue == NULL) { simdisk_setup() 287 blk_queue_make_request(dev->queue, simdisk_make_request); simdisk_setup() 288 dev->queue->queuedata = dev; simdisk_setup() 290 dev->gd = alloc_disk(SIMDISK_MINORS); simdisk_setup() 291 if (dev->gd == NULL) { simdisk_setup() 295 dev->gd->major = simdisk_major; simdisk_setup() 296 dev->gd->first_minor = which; simdisk_setup() 297 dev->gd->fops = &simdisk_ops; simdisk_setup() 298 dev->gd->queue = dev->queue; simdisk_setup() 299 dev->gd->private_data = dev; simdisk_setup() 300 snprintf(dev->gd->disk_name, 32, "simdisk%d", which); simdisk_setup() 301 set_capacity(dev->gd, 0); simdisk_setup() 302 add_disk(dev->gd); simdisk_setup() 304 dev->procfile = proc_create_data(tmp, 0644, procdir, &fops, dev); simdisk_setup() 308 blk_cleanup_queue(dev->queue); simdisk_setup() 309 dev->queue = NULL; simdisk_setup() 311 simc_close(dev->fd); simdisk_setup() 357 static void simdisk_teardown(struct simdisk dev, int which, simdisk_teardown() argument 362 simdisk_detach(dev); simdisk_teardown() 363 if (dev->gd) simdisk_teardown() 364 del_gendisk(dev->gd); simdisk_teardown() 365 if (dev->queue) simdisk_teardown() 366 blk_cleanup_queue(dev->queue); simdisk_teardown()
/linux-4.1.27/arch/s390/include/asm/
H A D	dma-mapping.h	16 static inline struct dma_map_ops get_dma_ops(struct device dev) get_dma_ops() argument 21 extern int dma_set_mask(struct device dev, u64 mask); 23 static inline void dma_cache_sync(struct device dev, void vaddr, size_t size, dma_cache_sync() argument 33 static inline int dma_supported(struct device dev, u64 mask) dma_supported() argument 35 struct dma_map_ops dma_ops = get_dma_ops(dev); dma_supported() 39 return dma_ops->dma_supported(dev, mask); dma_supported() 42 static inline bool dma_capable(struct device dev, dma_addr_t addr, size_t size) dma_capable() argument 44 if (!dev->dma_mask) dma_capable() 46 return addr + size - 1 <= dev->dma_mask; dma_capable() 49 static inline int dma_mapping_error(struct device dev, dma_addr_t dma_addr) dma_mapping_error() argument 51 struct dma_map_ops dma_ops = get_dma_ops(dev); dma_mapping_error() 53 debug_dma_mapping_error(dev, dma_addr); dma_mapping_error() 55 return dma_ops->mapping_error(dev, dma_addr); dma_mapping_error() 61 static inline void dma_alloc_attrs(struct device dev, size_t size, dma_alloc_attrs() argument 65 struct dma_map_ops ops = get_dma_ops(dev); dma_alloc_attrs() 70 cpu_addr = ops->alloc(dev, size, dma_handle, flags, attrs); dma_alloc_attrs() 71 debug_dma_alloc_coherent(dev, size, dma_handle, cpu_addr); dma_alloc_attrs() 78 static inline void dma_free_attrs(struct device dev, size_t size, dma_free_attrs() argument 82 struct dma_map_ops *ops = get_dma_ops(dev); dma_free_attrs() 86 debug_dma_free_coherent(dev, size, cpu_addr, dma_handle); dma_free_attrs() 87 ops->free(dev, size, cpu_addr, dma_handle, attrs); dma_free_attrs()
/linux-4.1.27/virt/kvm/
H A D	coalesced_mmio.c	19 static inline struct kvm_coalesced_mmio_dev to_mmio(struct kvm_io_device dev) to_mmio() argument 21 return container_of(dev, struct kvm_coalesced_mmio_dev, dev); to_mmio() 24 static int coalesced_mmio_in_range(struct kvm_coalesced_mmio_dev dev, coalesced_mmio_in_range() argument 35 if (addr < dev->zone.addr) coalesced_mmio_in_range() 37 if (addr + len > dev->zone.addr + dev->zone.size) coalesced_mmio_in_range() 42 static int coalesced_mmio_has_room(struct kvm_coalesced_mmio_dev dev) coalesced_mmio_has_room() argument 53 ring = dev->kvm->coalesced_mmio_ring; coalesced_mmio_has_room() 67 struct kvm_coalesced_mmio_dev dev = to_mmio(this); coalesced_mmio_write() local 68 struct kvm_coalesced_mmio_ring ring = dev->kvm->coalesced_mmio_ring; coalesced_mmio_write() 70 if (!coalesced_mmio_in_range(dev, addr, len)) coalesced_mmio_write() 73 spin_lock(&dev->kvm->ring_lock); coalesced_mmio_write() 75 if (!coalesced_mmio_has_room(dev)) { coalesced_mmio_write() 76 spin_unlock(&dev->kvm->ring_lock); coalesced_mmio_write() 87 spin_unlock(&dev->kvm->ring_lock); coalesced_mmio_write() 93 struct kvm_coalesced_mmio_dev dev = to_mmio(this); coalesced_mmio_destructor() local 95 list_del(&dev->list); coalesced_mmio_destructor() 97 kfree(dev); coalesced_mmio_destructor() 140 struct kvm_coalesced_mmio_dev dev; kvm_vm_ioctl_register_coalesced_mmio() local 142 dev = kzalloc(sizeof(struct kvm_coalesced_mmio_dev), GFP_KERNEL); kvm_vm_ioctl_register_coalesced_mmio() 143 if (!dev) kvm_vm_ioctl_register_coalesced_mmio() 146 kvm_iodevice_init(&dev->dev, &coalesced_mmio_ops); kvm_vm_ioctl_register_coalesced_mmio() 147 dev->kvm = kvm; kvm_vm_ioctl_register_coalesced_mmio() 148 dev->zone = zone; kvm_vm_ioctl_register_coalesced_mmio() 152 zone->size, &dev->dev); kvm_vm_ioctl_register_coalesced_mmio() 155 list_add_tail(&dev->list, &kvm->coalesced_zones); kvm_vm_ioctl_register_coalesced_mmio() 162 kfree(dev); kvm_vm_ioctl_register_coalesced_mmio() 170 struct kvm_coalesced_mmio_dev dev, *tmp; kvm_vm_ioctl_unregister_coalesced_mmio() local 174 list_for_each_entry_safe(dev, tmp, &kvm->coalesced_zones, list) kvm_vm_ioctl_unregister_coalesced_mmio() 175 if (coalesced_mmio_in_range(dev, zone->addr, zone->size)) { kvm_vm_ioctl_unregister_coalesced_mmio() 176 kvm_io_bus_unregister_dev(kvm, KVM_MMIO_BUS, &dev->dev); kvm_vm_ioctl_unregister_coalesced_mmio() 177 kvm_iodevice_destructor(&dev->dev); kvm_vm_ioctl_unregister_coalesced_mmio()
/linux-4.1.27/drivers/media/tuners/
H A D	it913x.c	41 struct it913x_dev dev = fe->tuner_priv; it913x_init() local 48 dev_dbg(&dev->client->dev, "role %u\n", dev->role); it913x_init() 50 ret = regmap_write(dev->regmap, 0x80ec4c, 0x68); it913x_init() 56 ret = regmap_read(dev->regmap, 0x80ec86, &utmp); it913x_init() 63 dev->clk_mode = utmp; it913x_init() 64 dev->xtal = 2000; it913x_init() 65 dev->fdiv = 3; it913x_init() 70 dev->clk_mode = utmp; it913x_init() 71 dev->xtal = 640; it913x_init() 72 dev->fdiv = 1; it913x_init() 76 dev_err(&dev->client->dev, "unknown clock identifier %d\n", utmp); it913x_init() 80 ret = regmap_read(dev->regmap, 0x80ed03, &utmp); it913x_init() 92 ret = regmap_bulk_read(dev->regmap, 0x80ed23, buf, 2); it913x_init() 101 dev_dbg(&dev->client->dev, "r_fbc_m_bdry took %u ms, val %u\n", it913x_init() 105 dev->fn_min = dev->xtal utmp; it913x_init() 106 dev->fn_min /= (dev->fdiv * nv_val); it913x_init() 107 dev->fn_min = 1000; it913x_init() 108 dev_dbg(&dev->client->dev, "fn_min %u\n", dev->fn_min); it913x_init() 116 if (dev->chip_ver == 1) { it913x_init() 120 ret = regmap_read(dev->regmap, 0x80ec82, &utmp); it913x_init() 128 dev_dbg(&dev->client->dev, "p_tsm_init_mode took %u ms, val %u\n", it913x_init() 135 ret = regmap_write(dev->regmap, 0x80ed81, iqik_m_cal); it913x_init() 139 ret = regmap_write(dev->regmap, 0x80ec57, 0x00); it913x_init() 143 ret = regmap_write(dev->regmap, 0x80ec58, 0x00); it913x_init() 147 ret = regmap_write(dev->regmap, 0x80ec40, 0x01); it913x_init() 151 dev->active = true; it913x_init() 155 dev_dbg(&dev->client->dev, "failed %d\n", ret); it913x_init() 161 struct it913x_dev dev = fe->tuner_priv; it913x_sleep() local 164 dev_dbg(&dev->client->dev, "role %u\n", dev->role); it913x_sleep() 166 dev->active = false; it913x_sleep() 168 ret = regmap_bulk_write(dev->regmap, 0x80ec40, "\x00", 1); it913x_sleep() 176 if (dev->role == IT913X_ROLE_DUAL_MASTER) it913x_sleep() 181 dev_dbg(&dev->client->dev, "role %u, len %d\n", dev->role, len); it913x_sleep() 183 ret = regmap_bulk_write(dev->regmap, 0x80ec02, it913x_sleep() 189 ret = regmap_bulk_write(dev->regmap, 0x80ec12, "\x00\x00\x00\x00", 4); it913x_sleep() 193 ret = regmap_bulk_write(dev->regmap, 0x80ec17, it913x_sleep() 198 ret = regmap_bulk_write(dev->regmap, 0x80ec22, it913x_sleep() 203 ret = regmap_bulk_write(dev->regmap, 0x80ec20, "\x00", 1); it913x_sleep() 207 ret = regmap_bulk_write(dev->regmap, 0x80ec3f, "\x01", 1); it913x_sleep() 213 dev_dbg(&dev->client->dev, "failed %d\n", ret); it913x_sleep() 219 struct it913x_dev dev = fe->tuner_priv; it913x_set_params() local 227 dev_dbg(&dev->client->dev, "role=%u, frequency %u, bandwidth_hz %u\n", it913x_set_params() 228 dev->role, c->frequency, c->bandwidth_hz); it913x_set_params() 230 if (!dev->active) { it913x_set_params() 253 } else if (c->frequency <= dev->fn_min) { it913x_set_params() 264 ret = regmap_read(dev->regmap, 0x80ed81, &utmp); it913x_set_params() 271 if (dev->clk_mode == 0) it913x_set_params() 277 if (dev->clk_mode == 0) it913x_set_params() 283 t_cal_freq = (c->frequency / 1000) n_div * dev->fdiv; it913x_set_params() 284 pre_lo_freq = t_cal_freq / dev->xtal; it913x_set_params() 285 utmp = pre_lo_freq * dev->xtal; it913x_set_params() 287 if ((t_cal_freq - utmp) >= (dev->xtal >> 1)) it913x_set_params() 293 dev_dbg(&dev->client->dev, "t_cal_freq %u, pre_lo_freq %u\n", it913x_set_params() 332 ret = regmap_write(dev->regmap, 0x80ee06, lna_band); it913x_set_params() 345 ret = regmap_write(dev->regmap, 0x80ec56, u8tmp); it913x_set_params() 350 ret = regmap_write(dev->regmap, 0x80ec4c, 0xa0 \| (l_band << 3)); it913x_set_params() 354 ret = regmap_write(dev->regmap, 0x80ec4d, (t_cal_freq >> 0) & 0xff); it913x_set_params() 358 ret = regmap_write(dev->regmap, 0x80ec4e, (t_cal_freq >> 8) & 0xff); it913x_set_params() 362 ret = regmap_write(dev->regmap, 0x80011e, (pre_lo_freq >> 0) & 0xff); it913x_set_params() 366 ret = regmap_write(dev->regmap, 0x80011f, (pre_lo_freq >> 8) & 0xff); it913x_set_params() 372 dev_dbg(&dev->client->dev, "failed %d\n", ret); it913x_set_params() 391 struct it913x_config cfg = client->dev.platform_data; it913x_probe() 393 struct it913x_dev dev; it913x_probe() local 401 dev = kzalloc(sizeof(struct it913x_dev), GFP_KERNEL); it913x_probe() 402 if (dev == NULL) { it913x_probe() 404 dev_err(&client->dev, "kzalloc() failed\n"); it913x_probe() 408 dev->client = client; it913x_probe() 409 dev->fe = cfg->fe; it913x_probe() 410 dev->chip_ver = cfg->chip_ver; it913x_probe() 411 dev->role = cfg->role; it913x_probe() 412 dev->regmap = regmap_init_i2c(client, &regmap_config); it913x_probe() 413 if (IS_ERR(dev->regmap)) { it913x_probe() 414 ret = PTR_ERR(dev->regmap); it913x_probe() 418 fe->tuner_priv = dev; it913x_probe() 421 i2c_set_clientdata(client, dev); it913x_probe() 423 if (dev->chip_ver == 1) it913x_probe() 425 else if (dev->chip_ver == 2) it913x_probe() 430 dev_info(&dev->client->dev, "ITE IT913X %s successfully attached\n", it913x_probe() 432 dev_dbg(&dev->client->dev, "chip_ver %u, role %u\n", it913x_probe() 433 dev->chip_ver, dev->role); it913x_probe() 437 kfree(dev); it913x_probe() 439 dev_dbg(&client->dev, "failed %d\n", ret); it913x_probe() 445 struct it913x_dev dev = i2c_get_clientdata(client); it913x_remove() local 446 struct dvb_frontend fe = dev->fe; it913x_remove() 448 dev_dbg(&client->dev, "\n"); it913x_remove() 452 regmap_exit(dev->regmap); it913x_remove() 453 kfree(dev); it913x_remove()
/linux-4.1.27/arch/sh/include/asm/
H A D	dma-mapping.h	7 static inline struct dma_map_ops get_dma_ops(struct device dev) get_dma_ops() argument 15 static inline int dma_supported(struct device dev, u64 mask) dma_supported() argument 17 struct dma_map_ops ops = get_dma_ops(dev); dma_supported() 20 return ops->dma_supported(dev, mask); dma_supported() 25 static inline int dma_set_mask(struct device dev, u64 mask) dma_set_mask() argument 27 struct dma_map_ops ops = get_dma_ops(dev); dma_set_mask() 29 if (!dev->dma_mask \|\| !dma_supported(dev, mask)) dma_set_mask() 32 return ops->set_dma_mask(dev, mask); dma_set_mask() 34 dev->dma_mask = mask; dma_set_mask() 39 void dma_cache_sync(struct device dev, void vaddr, size_t size, 45 static inline int dma_mapping_error(struct device dev, dma_addr_t dma_addr) dma_mapping_error() argument 47 struct dma_map_ops ops = get_dma_ops(dev); dma_mapping_error() 49 debug_dma_mapping_error(dev, dma_addr); dma_mapping_error() 51 return ops->mapping_error(dev, dma_addr); dma_mapping_error() 58 static inline void dma_alloc_attrs(struct device dev, size_t size, dma_alloc_attrs() argument 62 struct dma_map_ops ops = get_dma_ops(dev); dma_alloc_attrs() 65 if (dma_alloc_from_coherent(dev, size, dma_handle, &memory)) dma_alloc_attrs() 70 memory = ops->alloc(dev, size, dma_handle, gfp, attrs); dma_alloc_attrs() 71 debug_dma_alloc_coherent(dev, size, dma_handle, memory); dma_alloc_attrs() 78 static inline void dma_free_attrs(struct device dev, size_t size, dma_free_attrs() argument 82 struct dma_map_ops ops = get_dma_ops(dev); dma_free_attrs() 84 if (dma_release_from_coherent(dev, get_order(size), vaddr)) dma_free_attrs() 87 debug_dma_free_coherent(dev, size, vaddr, dma_handle); dma_free_attrs() 89 ops->free(dev, size, vaddr, dma_handle, attrs); dma_free_attrs() 93 extern void dma_generic_alloc_coherent(struct device dev, size_t size, 96 extern void dma_generic_free_coherent(struct device dev, size_t size,
/linux-4.1.27/arch/ia64/include/asm/
H A D	dma-mapping.h	28 static inline void dma_alloc_attrs(struct device dev, size_t size, dma_alloc_attrs() argument 32 struct dma_map_ops ops = platform_dma_get_ops(dev); dma_alloc_attrs() 35 caddr = ops->alloc(dev, size, daddr, gfp, attrs); dma_alloc_attrs() 36 debug_dma_alloc_coherent(dev, size, daddr, caddr); dma_alloc_attrs() 42 static inline void dma_free_attrs(struct device dev, size_t size, dma_free_attrs() argument 46 struct dma_map_ops ops = platform_dma_get_ops(dev); dma_free_attrs() 47 debug_dma_free_coherent(dev, size, caddr, daddr); dma_free_attrs() 48 ops->free(dev, size, caddr, daddr, attrs); dma_free_attrs() 54 #define get_dma_ops(dev) platform_dma_get_ops(dev) 58 static inline int dma_mapping_error(struct device dev, dma_addr_t daddr) dma_mapping_error() argument 60 struct dma_map_ops ops = platform_dma_get_ops(dev); dma_mapping_error() 61 debug_dma_mapping_error(dev, daddr); dma_mapping_error() 62 return ops->mapping_error(dev, daddr); dma_mapping_error() 65 static inline int dma_supported(struct device dev, u64 mask) dma_supported() argument 67 struct dma_map_ops ops = platform_dma_get_ops(dev); dma_supported() 68 return ops->dma_supported(dev, mask); dma_supported() 72 dma_set_mask (struct device dev, u64 mask) dma_set_mask() argument 74 if (!dev->dma_mask \|\| !dma_supported(dev, mask)) dma_set_mask() 76 dev->dma_mask = mask; dma_set_mask() 80 static inline bool dma_capable(struct device dev, dma_addr_t addr, size_t size) dma_capable() argument 82 if (!dev->dma_mask) dma_capable() 85 return addr + size - 1 <= dev->dma_mask; dma_capable() 88 static inline dma_addr_t phys_to_dma(struct device dev, phys_addr_t paddr) phys_to_dma() argument 93 static inline phys_addr_t dma_to_phys(struct device dev, dma_addr_t daddr) dma_to_phys() argument 99 dma_cache_sync (struct device dev, void vaddr, size_t size, dma_cache_sync() argument
H A D	libata-portmap.h	`6 #define ATA_PRIMARY_IRQ(dev) isa_irq_to_vector(14) 10 #define ATA_SECONDARY_IRQ(dev) isa_irq_to_vector(15)`
/linux-4.1.27/drivers/net/ethernet/seeq/
H A D	ether3.c	76 static void ether3_setmulticastlist(struct net_device dev); 77 static int ether3_rx(struct net_device dev, unsigned int maxcnt); 78 static void ether3_tx(struct net_device dev); 79 static int ether3_open (struct net_device dev); 80 static int ether3_sendpacket (struct sk_buff skb, struct net_device dev); 82 static int ether3_close (struct net_device dev); 83 static void ether3_setmulticastlist (struct net_device dev); 84 static void ether3_timeout(struct net_device dev); 117 ether3_setbuffer(struct net_device dev, buffer_rw_t read, int start) ether3_setbuffer() argument 121 ether3_outw(priv(dev)->regs.config1 \| CFG1_LOCBUFMEM, REG_CONFIG1); ether3_setbuffer() 122 ether3_outw(priv(dev)->regs.command \| CMD_FIFOWRITE, REG_COMMAND); ether3_setbuffer() 126 printk("%s: setbuffer broken\n", dev->name); ether3_setbuffer() 127 priv(dev)->broken = 1; ether3_setbuffer() 135 ether3_outw(priv(dev)->regs.command \| CMD_FIFOREAD, REG_COMMAND); ether3_setbuffer() 137 ether3_outw(priv(dev)->regs.command \| CMD_FIFOWRITE, REG_COMMAND); ether3_setbuffer() 146 #define ether3_writebuffer(dev,data,length) \ 149 #define ether3_writeword(dev,data) \ 152 #define ether3_writelong(dev,data) { \ 161 #define ether3_readbuffer(dev,data,length) \ 164 #define ether3_readword(dev) \ 167 #define ether3_readlong(dev) \ 175 struct net_device dev = (struct net_device )data; ether3_ledoff() local 176 ether3_outw(priv(dev)->regs.config2 \|= CFG2_CTRLO, REG_CONFIG2); ether3_ledoff() 182 static inline void ether3_ledon(struct net_device dev) ether3_ledon() argument 184 del_timer(&priv(dev)->timer); ether3_ledon() 185 priv(dev)->timer.expires = jiffies + HZ / 50; / leave on for 1/50th second / ether3_ledon() 186 priv(dev)->timer.data = (unsigned long)dev; ether3_ledon() 187 priv(dev)->timer.function = ether3_ledoff; ether3_ledon() 188 add_timer(&priv(dev)->timer); ether3_ledon() 189 if (priv(dev)->regs.config2 & CFG2_CTRLO) ether3_ledon() 190 ether3_outw(priv(dev)->regs.config2 &= ~CFG2_CTRLO, REG_CONFIG2); ether3_ledon() 223 ether3_ramtest(struct net_device dev, unsigned char byte) ether3_ramtest() argument 234 ether3_setbuffer(dev, buffer_write, 0); ether3_ramtest() 235 ether3_writebuffer(dev, buffer, TX_END); ether3_ramtest() 236 ether3_setbuffer(dev, buffer_write, RX_START); ether3_ramtest() 237 ether3_writebuffer(dev, buffer + RX_START, RX_LEN); ether3_ramtest() 239 ether3_setbuffer(dev, buffer_read, 0); ether3_ramtest() 240 ether3_readbuffer(dev, buffer, TX_END); ether3_ramtest() 241 ether3_setbuffer(dev, buffer_read, RX_START); ether3_ramtest() 242 ether3_readbuffer(dev, buffer + RX_START, RX_LEN); ether3_ramtest() 248 dev->name, buffer[i], byte, i); ether3_ramtest() 271 static int ether3_init_2(struct net_device dev) ether3_init_2() argument 275 priv(dev)->regs.config1 = CFG1_RECVCOMPSTAT0\|CFG1_DMABURST8; ether3_init_2() 276 priv(dev)->regs.config2 = CFG2_CTRLO\|CFG2_RECVCRC\|CFG2_ERRENCRC; ether3_init_2() 277 priv(dev)->regs.command = 0; ether3_init_2() 282 ether3_outw(priv(dev)->regs.config1 \| CFG1_BUFSELSTAT0, REG_CONFIG1); ether3_init_2() 284 ether3_outb(dev->dev_addr[i], REG_BUFWIN); ether3_init_2() 286 if (dev->flags & IFF_PROMISC) ether3_init_2() 287 priv(dev)->regs.config1 \|= CFG1_RECVPROMISC; ether3_init_2() 288 else if (dev->flags & IFF_MULTICAST) ether3_init_2() 289 priv(dev)->regs.config1 \|= CFG1_RECVSPECBRMULTI; ether3_init_2() 291 priv(dev)->regs.config1 \|= CFG1_RECVSPECBROAD; ether3_init_2() 298 ether3_outw(priv(dev)->regs.config1 \| CFG1_TRANSEND, REG_CONFIG1); ether3_init_2() 300 ether3_outw(priv(dev)->rx_head, REG_RECVPTR); ether3_init_2() 302 ether3_outw(priv(dev)->rx_head >> 8, REG_RECVEND); ether3_init_2() 303 ether3_outw(priv(dev)->regs.config2, REG_CONFIG2); ether3_init_2() 304 ether3_outw(priv(dev)->regs.config1 \| CFG1_LOCBUFMEM, REG_CONFIG1); ether3_init_2() 305 ether3_outw(priv(dev)->regs.command, REG_COMMAND); ether3_init_2() 307 i = ether3_ramtest(dev, 0x5A); ether3_init_2() 310 i = ether3_ramtest(dev, 0x1E); ether3_init_2() 314 ether3_setbuffer(dev, buffer_write, 0); ether3_init_2() 315 ether3_writelong(dev, 0); ether3_init_2() 320 ether3_init_for_open(struct net_device dev) ether3_init_for_open() argument 328 priv(dev)->regs.command = 0; ether3_init_for_open() 333 ether3_outw(priv(dev)->regs.config1 \| CFG1_BUFSELSTAT0, REG_CONFIG1); ether3_init_for_open() 335 ether3_outb(dev->dev_addr[i], REG_BUFWIN); ether3_init_for_open() 337 priv(dev)->tx_head = 0; ether3_init_for_open() 338 priv(dev)->tx_tail = 0; ether3_init_for_open() 339 priv(dev)->regs.config2 \|= CFG2_CTRLO; ether3_init_for_open() 340 priv(dev)->rx_head = RX_START; ether3_init_for_open() 342 ether3_outw(priv(dev)->regs.config1 \| CFG1_TRANSEND, REG_CONFIG1); ether3_init_for_open() 344 ether3_outw(priv(dev)->rx_head, REG_RECVPTR); ether3_init_for_open() 345 ether3_outw(priv(dev)->rx_head >> 8, REG_RECVEND); ether3_init_for_open() 347 ether3_outw(priv(dev)->regs.config2, REG_CONFIG2); ether3_init_for_open() 348 ether3_outw(priv(dev)->regs.config1 \| CFG1_LOCBUFMEM, REG_CONFIG1); ether3_init_for_open() 350 ether3_setbuffer(dev, buffer_write, 0); ether3_init_for_open() 351 ether3_writelong(dev, 0); ether3_init_for_open() 353 priv(dev)->regs.command = CMD_ENINTRX \| CMD_ENINTTX; ether3_init_for_open() 354 ether3_outw(priv(dev)->regs.command \| CMD_RXON, REG_COMMAND); ether3_init_for_open() 358 ether3_probe_bus_8(struct net_device dev, int val) ether3_probe_bus_8() argument 379 ether3_probe_bus_16(struct net_device dev, int val) ether3_probe_bus_16() argument 400 ether3_open(struct net_device dev) ether3_open() argument 402 if (request_irq(dev->irq, ether3_interrupt, 0, "ether3", dev)) ether3_open() 405 ether3_init_for_open(dev); ether3_open() 407 netif_start_queue(dev); ether3_open() 416 ether3_close(struct net_device dev) ether3_close() argument 418 netif_stop_queue(dev); ether3_close() 420 disable_irq(dev->irq); ether3_close() 423 priv(dev)->regs.command = 0; ether3_close() 429 free_irq(dev->irq, dev); ether3_close() 440 static void ether3_setmulticastlist(struct net_device dev) ether3_setmulticastlist() argument 442 priv(dev)->regs.config1 &= ~CFG1_RECVPROMISC; ether3_setmulticastlist() 444 if (dev->flags & IFF_PROMISC) { ether3_setmulticastlist() 446 priv(dev)->regs.config1 \|= CFG1_RECVPROMISC; ether3_setmulticastlist() 447 } else if (dev->flags & IFF_ALLMULTI \|\| !netdev_mc_empty(dev)) { ether3_setmulticastlist() 448 priv(dev)->regs.config1 \|= CFG1_RECVSPECBRMULTI; ether3_setmulticastlist() 450 priv(dev)->regs.config1 \|= CFG1_RECVSPECBROAD; ether3_setmulticastlist() 452 ether3_outw(priv(dev)->regs.config1 \| CFG1_LOCBUFMEM, REG_CONFIG1); ether3_setmulticastlist() 455 static void ether3_timeout(struct net_device dev) ether3_timeout() argument 459 del_timer(&priv(dev)->timer); ether3_timeout() 462 printk(KERN_ERR "%s: transmit timed out, network cable problem?\n", dev->name); ether3_timeout() 463 printk(KERN_ERR "%s: state: { status=%04X cfg1=%04X cfg2=%04X }\n", dev->name, ether3_timeout() 465 printk(KERN_ERR "%s: { rpr=%04X rea=%04X tpr=%04X }\n", dev->name, ether3_timeout() 467 printk(KERN_ERR "%s: tx head=%X tx tail=%X\n", dev->name, ether3_timeout() 468 priv(dev)->tx_head, priv(dev)->tx_tail); ether3_timeout() 469 ether3_setbuffer(dev, buffer_read, priv(dev)->tx_tail); ether3_timeout() 470 printk(KERN_ERR "%s: packet status = %08X\n", dev->name, ether3_readlong(dev)); ether3_timeout() 473 priv(dev)->regs.config2 \|= CFG2_CTRLO; ether3_timeout() 474 dev->stats.tx_errors += 1; ether3_timeout() 475 ether3_outw(priv(dev)->regs.config2, REG_CONFIG2); ether3_timeout() 476 priv(dev)->tx_head = priv(dev)->tx_tail = 0; ether3_timeout() 478 netif_wake_queue(dev); ether3_timeout() 485 ether3_sendpacket(struct sk_buff skb, struct net_device dev) ether3_sendpacket() argument 491 if (priv(dev)->broken) { ether3_sendpacket() 493 dev->stats.tx_dropped++; ether3_sendpacket() 494 netif_start_queue(dev); ether3_sendpacket() 504 next_ptr = (priv(dev)->tx_head + 1) & 15; ether3_sendpacket() 508 if (priv(dev)->tx_tail == next_ptr) { ether3_sendpacket() 513 ptr = 0x600 * priv(dev)->tx_head; ether3_sendpacket() 514 priv(dev)->tx_head = next_ptr; ether3_sendpacket() 519 ether3_setbuffer(dev, buffer_write, next_ptr); ether3_sendpacket() 520 ether3_writelong(dev, 0); ether3_sendpacket() 521 ether3_setbuffer(dev, buffer_write, ptr); ether3_sendpacket() 522 ether3_writelong(dev, 0); ether3_sendpacket() 523 ether3_writebuffer(dev, skb->data, length); ether3_sendpacket() 524 ether3_writeword(dev, htons(next_ptr)); ether3_sendpacket() 525 ether3_writeword(dev, TXHDR_CHAINCONTINUE >> 16); ether3_sendpacket() 526 ether3_setbuffer(dev, buffer_write, ptr); ether3_sendpacket() 527 ether3_writeword(dev, htons((ptr + length + 4))); ether3_sendpacket() 528 ether3_writeword(dev, TXHDR_FLAGS >> 16); ether3_sendpacket() 529 ether3_ledon(dev); ether3_sendpacket() 533 ether3_outw(priv(dev)->regs.command \| CMD_TXON, REG_COMMAND); ether3_sendpacket() 536 next_ptr = (priv(dev)->tx_head + 1) & 15; ether3_sendpacket() 541 if (priv(dev)->tx_tail == next_ptr) ether3_sendpacket() 542 netif_stop_queue(dev); ether3_sendpacket() 551 struct net_device dev = (struct net_device )dev_id; ether3_interrupt() local 562 ether3_outw(CMD_ACKINTRX \| priv(dev)->regs.command, REG_COMMAND); ether3_interrupt() 563 ether3_rx(dev, 12); ether3_interrupt() 568 ether3_outw(CMD_ACKINTTX \| priv(dev)->regs.command, REG_COMMAND); ether3_interrupt() 569 ether3_tx(dev); ether3_interrupt() 583 static int ether3_rx(struct net_device dev, unsigned int maxcnt) ether3_rx() argument 585 unsigned int next_ptr = priv(dev)->rx_head, received = 0; ether3_rx() 587 ether3_ledon(dev); ether3_rx() 601 ether3_setbuffer(dev, buffer_read, next_ptr); ether3_rx() 602 temp_ptr = ether3_readword(dev); ether3_rx() 603 status = ether3_readword(dev); ether3_rx() 611 ether3_setbuffer(dev, buffer_read, this_ptr); ether3_rx() 612 ether3_readbuffer(dev, addrs+2, 12); ether3_rx() 616 printk("%s: bad next pointer @%04X: ", dev->name, priv(dev)->rx_head); ether3_rx() 621 next_ptr = priv(dev)->rx_head; ether3_rx() 627 if (!((unsigned long )&dev->dev_addr[0] ^ (unsigned long )&addrs[2+6]) && ether3_rx() 628 !((unsigned short )&dev->dev_addr[4] ^ (unsigned short )&addrs[2+10])) { ether3_rx() 639 skb = netdev_alloc_skb(dev, length + 2); ether3_rx() 645 ether3_readbuffer(dev, buf + 12, length - 12); ether3_rx() 651 skb->protocol = eth_type_trans(skb, dev); ether3_rx() 656 dev->stats.rx_dropped++; ether3_rx() 660 struct net_device_stats stats = &dev->stats; ether3_rx() 672 dev->stats.rx_packets += received; ether3_rx() 673 priv(dev)->rx_head = next_ptr; ether3_rx() 679 dev->stats.rx_dropped++; ether3_rx() 681 ether3_outw(priv(dev)->regs.command \| CMD_RXON, REG_COMMAND); ether3_rx() 690 static void ether3_tx(struct net_device dev) ether3_tx() argument 692 unsigned int tx_tail = priv(dev)->tx_tail; ether3_tx() 701 ether3_setbuffer(dev, buffer_read, tx_tail 0x600); ether3_tx() 702 status = ether3_readlong(dev); ether3_tx() 715 dev->stats.tx_packets++; ether3_tx() 717 dev->stats.tx_errors++; ether3_tx() 719 dev->stats.collisions += 16; ether3_tx() 721 dev->stats.tx_fifo_errors++; ether3_tx() 727 if (priv(dev)->tx_tail != tx_tail) { ether3_tx() 728 priv(dev)->tx_tail = tx_tail; ether3_tx() 729 netif_wake_queue(dev); ether3_tx() 756 struct net_device dev; ether3_probe() local 765 dev = alloc_etherdev(sizeof(struct dev_priv)); ether3_probe() 766 if (!dev) { ether3_probe() 771 SET_NETDEV_DEV(dev, &ec->dev); ether3_probe() 773 priv(dev)->base = ecardm_iomap(ec, ECARD_RES_MEMC, 0, 0); ether3_probe() 774 if (!priv(dev)->base) { ether3_probe() 779 ec->irqaddr = priv(dev)->base + data->base_offset; ether3_probe() 782 priv(dev)->seeq = priv(dev)->base + data->base_offset; ether3_probe() 783 dev->irq = ec->irq; ether3_probe() 785 ether3_addr(dev->dev_addr, ec); ether3_probe() 787 init_timer(&priv(dev)->timer); ether3_probe() 798 if (ether3_probe_bus_8(dev, 0x100) && ether3_probe() 799 ether3_probe_bus_8(dev, 0x201)) ether3_probe() 803 ether3_probe_bus_16(dev, 0x101) && ether3_probe() 804 ether3_probe_bus_16(dev, 0x201)) ether3_probe() 809 printk(KERN_ERR "%s: unable to identify bus width\n", dev->name); ether3_probe() 815 "8-bit card\n", dev->name, data->name); ether3_probe() 823 if (ether3_init_2(dev)) { ether3_probe() 828 dev->netdev_ops = &ether3_netdev_ops; ether3_probe() 829 dev->watchdog_timeo = 5 HZ / 100; ether3_probe() 831 ret = register_netdev(dev); ether3_probe() 836 dev->name, data->name, ec->slot_no, dev->dev_addr); ether3_probe() 838 ecard_set_drvdata(ec, dev); ether3_probe() 842 free_netdev(dev); ether3_probe() 851 struct net_device *dev = ecard_get_drvdata(ec); ether3_remove() local 855 unregister_netdev(dev); ether3_remove() 856 free_netdev(dev); ether3_remove()
/linux-4.1.27/drivers/ps3/
H A D	ps3stor_lib.c	87 static int ps3stor_probe_access(struct ps3_storage_device dev) ps3stor_probe_access() argument 93 if (dev->sbd.match_id == PS3_MATCH_ID_STOR_ROM) { ps3stor_probe_access() 95 dev->accessible_regions = 1; ps3stor_probe_access() 100 for (i = 0; i < dev->num_regions; i++) { ps3stor_probe_access() 101 dev_dbg(&dev->sbd.core, ps3stor_probe_access() 105 dev->region_idx = i; ps3stor_probe_access() 106 res = ps3stor_read_write_sectors(dev, dev->bounce_lpar, 0, 1, ps3stor_probe_access() 109 dev_dbg(&dev->sbd.core, "%s:%u: read failed, " ps3stor_probe_access() 115 dev_dbg(&dev->sbd.core, "%s:%u: region %u is accessible\n", ps3stor_probe_access() 117 set_bit(i, &dev->accessible_regions); ps3stor_probe_access() 125 n = hweight_long(dev->accessible_regions); ps3stor_probe_access() 127 dev_info(&dev->sbd.core, ps3stor_probe_access() 131 dev->region_idx = __ffs(dev->accessible_regions); ps3stor_probe_access() 132 dev_info(&dev->sbd.core, ps3stor_probe_access() 134 dev->region_idx, dev->regions[dev->region_idx].start, ps3stor_probe_access() 135 dev->regions[dev->region_idx].size); ps3stor_probe_access() 143 @dev: Pointer to a struct ps3_storage_device 148 int ps3stor_setup(struct ps3_storage_device dev, irq_handler_t handler) ps3stor_setup() argument 153 error = ps3stor_open_hv_device(&dev->sbd); ps3stor_setup() 155 dev_err(&dev->sbd.core, ps3stor_setup() 161 error = ps3_sb_event_receive_port_setup(&dev->sbd, PS3_BINDING_CPU_ANY, ps3stor_setup() 162 &dev->irq); ps3stor_setup() 164 dev_err(&dev->sbd.core, ps3stor_setup() 170 error = request_irq(dev->irq, handler, 0, ps3stor_setup() 171 dev->sbd.core.driver->name, dev); ps3stor_setup() 173 dev_err(&dev->sbd.core, "%s:%u: request_irq failed %d\n", ps3stor_setup() 178 alignment = min(__ffs(dev->bounce_size), ps3stor_setup() 179 __ffs((unsigned long)dev->bounce_buf)); ps3stor_setup() 181 dev_err(&dev->sbd.core, ps3stor_setup() 183 __func__, __LINE__, dev->bounce_size, dev->bounce_buf); ps3stor_setup() 190 dev->sbd.d_region = &dev->dma_region; ps3stor_setup() 191 ps3_dma_region_init(&dev->sbd, &dev->dma_region, page_size, ps3stor_setup() 192 PS3_DMA_OTHER, dev->bounce_buf, dev->bounce_size); ps3stor_setup() 193 res = ps3_dma_region_create(&dev->dma_region); ps3stor_setup() 195 dev_err(&dev->sbd.core, "%s:%u: cannot create DMA region\n", ps3stor_setup() 201 dev->bounce_lpar = ps3_mm_phys_to_lpar(__pa(dev->bounce_buf)); ps3stor_setup() 202 dev->bounce_dma = dma_map_single(&dev->sbd.core, dev->bounce_buf, ps3stor_setup() 203 dev->bounce_size, DMA_BIDIRECTIONAL); ps3stor_setup() 204 if (!dev->bounce_dma) { ps3stor_setup() 205 dev_err(&dev->sbd.core, "%s:%u: map DMA region failed\n", ps3stor_setup() 211 error = ps3stor_probe_access(dev); ps3stor_setup() 213 dev_err(&dev->sbd.core, "%s:%u: No accessible regions found\n", ps3stor_setup() 220 dma_unmap_single(&dev->sbd.core, dev->bounce_dma, dev->bounce_size, ps3stor_setup() 223 ps3_dma_region_free(&dev->dma_region); ps3stor_setup() 225 free_irq(dev->irq, dev); ps3stor_setup() 227 ps3_sb_event_receive_port_destroy(&dev->sbd, dev->irq); ps3stor_setup() 229 ps3stor_close_hv_device(&dev->sbd); ps3stor_setup() 238 @dev: Pointer to a struct ps3_storage_device 240 void ps3stor_teardown(struct ps3_storage_device dev) ps3stor_teardown() argument 244 dma_unmap_single(&dev->sbd.core, dev->bounce_dma, dev->bounce_size, ps3stor_teardown() 246 ps3_dma_region_free(&dev->dma_region); ps3stor_teardown() 248 free_irq(dev->irq, dev); ps3stor_teardown() 250 error = ps3_sb_event_receive_port_destroy(&dev->sbd, dev->irq); ps3stor_teardown() 252 dev_err(&dev->sbd.core, ps3stor_teardown() 256 error = ps3stor_close_hv_device(&dev->sbd); ps3stor_teardown() 258 dev_err(&dev->sbd.core, ps3stor_teardown() 267 @dev: Pointer to a struct ps3_storage_device 276 u64 ps3stor_read_write_sectors(struct ps3_storage_device dev, u64 lpar, ps3stor_read_write_sectors() argument 279 unsigned int region_id = dev->regions[dev->region_idx].id; ps3stor_read_write_sectors() 283 dev_dbg(&dev->sbd.core, "%s:%u: %s %llu sectors starting at %llu\n", ps3stor_read_write_sectors() 286 init_completion(&dev->done); ps3stor_read_write_sectors() 287 res = write ? lv1_storage_write(dev->sbd.dev_id, region_id, ps3stor_read_write_sectors() 289 &dev->tag) ps3stor_read_write_sectors() 290 : lv1_storage_read(dev->sbd.dev_id, region_id, ps3stor_read_write_sectors() 292 &dev->tag); ps3stor_read_write_sectors() 294 dev_dbg(&dev->sbd.core, "%s:%u: %s failed %d\n", __func__, ps3stor_read_write_sectors() 299 wait_for_completion(&dev->done); ps3stor_read_write_sectors() 300 if (dev->lv1_status) { ps3stor_read_write_sectors() 301 dev_dbg(&dev->sbd.core, "%s:%u: %s failed 0x%llx\n", __func__, ps3stor_read_write_sectors() 302 __LINE__, op, dev->lv1_status); ps3stor_read_write_sectors() 303 return dev->lv1_status; ps3stor_read_write_sectors() 306 dev_dbg(&dev->sbd.core, "%s:%u: %s completed\n", __func__, __LINE__, ps3stor_read_write_sectors() 316 @dev: Pointer to a struct ps3_storage_device 326 u64 ps3stor_send_command(struct ps3_storage_device *dev, u64 cmd, u64 arg1, ps3stor_send_command() argument 331 dev_dbg(&dev->sbd.core, "%s:%u: send device command 0x%llx\n", __func__, ps3stor_send_command() 334 init_completion(&dev->done); ps3stor_send_command() 336 res = lv1_storage_send_device_command(dev->sbd.dev_id, cmd, arg1, ps3stor_send_command() 337 arg2, arg3, arg4, &dev->tag); ps3stor_send_command() 339 dev_err(&dev->sbd.core, ps3stor_send_command() 345 wait_for_completion(&dev->done); ps3stor_send_command() 346 if (dev->lv1_status) { ps3stor_send_command() 347 dev_dbg(&dev->sbd.core, "%s:%u: command 0x%llx failed 0x%llx\n", ps3stor_send_command() 348 __func__, __LINE__, cmd, dev->lv1_status); ps3stor_send_command() 349 return dev->lv1_status; ps3stor_send_command() 352 dev_dbg(&dev->sbd.core, "%s:%u: command 0x%llx completed\n", __func__, ps3stor_send_command()
/linux-4.1.27/drivers/staging/media/mn88472/
H A D	mn88472.c	29 struct mn88472_dev dev = i2c_get_clientdata(client); mn88472_set_frontend() local 36 dev_dbg(&client->dev, mn88472_set_frontend() 41 if (!dev->warm) { mn88472_set_frontend() 93 dev_dbg(&client->dev, "get_if_frequency=%d\n", if_frequency); mn88472_set_frontend() 97 tmp = div_u64(if_frequency (u64)(1<<24) + (dev->xtal / 2), mn88472_set_frontend() 98 dev->xtal); mn88472_set_frontend() 103 ret = regmap_write(dev->regmap[2], 0xfb, 0x13); mn88472_set_frontend() 104 ret = regmap_write(dev->regmap[2], 0xef, 0x13); mn88472_set_frontend() 105 ret = regmap_write(dev->regmap[2], 0xf9, 0x13); mn88472_set_frontend() 109 ret = regmap_write(dev->regmap[2], 0x00, 0x66); mn88472_set_frontend() 112 ret = regmap_write(dev->regmap[2], 0x01, 0x00); mn88472_set_frontend() 115 ret = regmap_write(dev->regmap[2], 0x02, 0x01); mn88472_set_frontend() 118 ret = regmap_write(dev->regmap[2], 0x03, delivery_system_val); mn88472_set_frontend() 121 ret = regmap_write(dev->regmap[2], 0x04, bw_val2); mn88472_set_frontend() 126 ret = regmap_write(dev->regmap[2], 0x10 + i, if_val[i]); mn88472_set_frontend() 132 ret = regmap_write(dev->regmap[2], 0x13 + i, bw_val[i]); mn88472_set_frontend() 139 ret = regmap_write(dev->regmap[0], 0x07, 0x26); mn88472_set_frontend() 140 ret = regmap_write(dev->regmap[0], 0xb0, 0x0a); mn88472_set_frontend() 141 ret = regmap_write(dev->regmap[0], 0xb4, 0x00); mn88472_set_frontend() 142 ret = regmap_write(dev->regmap[0], 0xcd, 0x1f); mn88472_set_frontend() 143 ret = regmap_write(dev->regmap[0], 0xd4, 0x0a); mn88472_set_frontend() 144 ret = regmap_write(dev->regmap[0], 0xd6, 0x48); mn88472_set_frontend() 145 ret = regmap_write(dev->regmap[0], 0x00, 0xba); mn88472_set_frontend() 146 ret = regmap_write(dev->regmap[0], 0x01, 0x13); mn88472_set_frontend() 151 ret = regmap_write(dev->regmap[2], 0x2b, 0x13); mn88472_set_frontend() 152 ret = regmap_write(dev->regmap[2], 0x4f, 0x05); mn88472_set_frontend() 153 ret = regmap_write(dev->regmap[1], 0xf6, 0x05); mn88472_set_frontend() 154 ret = regmap_write(dev->regmap[0], 0xb0, 0x0a); mn88472_set_frontend() 155 ret = regmap_write(dev->regmap[0], 0xb4, 0xf6); mn88472_set_frontend() 156 ret = regmap_write(dev->regmap[0], 0xcd, 0x01); mn88472_set_frontend() 157 ret = regmap_write(dev->regmap[0], 0xd4, 0x09); mn88472_set_frontend() 158 ret = regmap_write(dev->regmap[0], 0xd6, 0x46); mn88472_set_frontend() 159 ret = regmap_write(dev->regmap[2], 0x30, 0x80); mn88472_set_frontend() 160 ret = regmap_write(dev->regmap[2], 0x32, 0x00); mn88472_set_frontend() 165 ret = regmap_write(dev->regmap[0], 0xb0, 0x0b); mn88472_set_frontend() 166 ret = regmap_write(dev->regmap[0], 0xb4, 0x00); mn88472_set_frontend() 167 ret = regmap_write(dev->regmap[0], 0xcd, 0x17); mn88472_set_frontend() 168 ret = regmap_write(dev->regmap[0], 0xd4, 0x09); mn88472_set_frontend() 169 ret = regmap_write(dev->regmap[0], 0xd6, 0x48); mn88472_set_frontend() 170 ret = regmap_write(dev->regmap[1], 0x00, 0xb0); mn88472_set_frontend() 179 ret = regmap_write(dev->regmap[0], 0x46, 0x00); mn88472_set_frontend() 180 ret = regmap_write(dev->regmap[0], 0xae, 0x00); mn88472_set_frontend() 182 switch (dev->ts_mode) { mn88472_set_frontend() 184 ret = regmap_write(dev->regmap[2], 0x08, 0x1d); mn88472_set_frontend() 187 ret = regmap_write(dev->regmap[2], 0x08, 0x00); mn88472_set_frontend() 190 dev_dbg(&client->dev, "ts_mode error: %d\n", dev->ts_mode); mn88472_set_frontend() 195 switch (dev->ts_clock) { mn88472_set_frontend() 197 ret = regmap_write(dev->regmap[0], 0xd9, 0xe3); mn88472_set_frontend() 200 ret = regmap_write(dev->regmap[0], 0xd9, 0xe1); mn88472_set_frontend() 203 dev_dbg(&client->dev, "ts_clock error: %d\n", dev->ts_clock); mn88472_set_frontend() 209 ret = regmap_write(dev->regmap[2], 0xf8, 0x9f); mn88472_set_frontend() 213 dev->delivery_system = c->delivery_system; mn88472_set_frontend() 217 dev_dbg(&client->dev, "failed=%d\n", ret); mn88472_set_frontend() 224 struct mn88472_dev dev = i2c_get_clientdata(client); mn88472_read_status() local 232 if (!dev->warm) { mn88472_read_status() 239 ret = regmap_read(dev->regmap[0], 0x7F, &utmp); mn88472_read_status() 246 ret = regmap_read(dev->regmap[2], 0x92, &utmp); mn88472_read_status() 257 ret = regmap_read(dev->regmap[1], 0x84, &utmp); mn88472_read_status() 274 dev_dbg(&client->dev, "failed=%d\n", ret); mn88472_read_status() 281 struct mn88472_dev dev = i2c_get_clientdata(client); mn88472_init() local 287 dev_dbg(&client->dev, "\n"); mn88472_init() 290 dev->warm = false; mn88472_init() 293 ret = regmap_write(dev->regmap[2], 0x05, 0x00); mn88472_init() 297 ret = regmap_bulk_write(dev->regmap[2], 0x0b, "\x00\x00", 2); mn88472_init() 302 ret = regmap_read(dev->regmap[0], 0xf5, &tmp); mn88472_init() 307 dev_info(&client->dev, "firmware already running\n"); mn88472_init() 308 dev->warm = true; mn88472_init() 313 ret = request_firmware(&fw, fw_file, &client->dev); mn88472_init() 315 dev_err(&client->dev, "firmare file '%s' not found\n", mn88472_init() 320 dev_info(&client->dev, "downloading firmware from file '%s'\n", mn88472_init() 323 ret = regmap_write(dev->regmap[0], 0xf5, 0x03); mn88472_init() 328 remaining -= (dev->i2c_wr_max - 1)) { mn88472_init() 330 if (len > (dev->i2c_wr_max - 1)) mn88472_init() 331 len = dev->i2c_wr_max - 1; mn88472_init() 333 ret = regmap_bulk_write(dev->regmap[0], 0xf6, mn88472_init() 336 dev_err(&client->dev, mn88472_init() 343 ret = regmap_read(dev->regmap[0], 0xf8, &tmp); mn88472_init() 345 dev_err(&client->dev, mn88472_init() 350 dev_err(&client->dev, mn88472_init() 354 dev_err(&client->dev, "firmware parity check succeeded=0x%x\n", tmp); mn88472_init() 356 ret = regmap_write(dev->regmap[0], 0xf5, 0x00); mn88472_init() 364 dev->warm = true; mn88472_init() 370 dev_dbg(&client->dev, "failed=%d\n", ret); mn88472_init() 377 struct mn88472_dev dev = i2c_get_clientdata(client); mn88472_sleep() local 380 dev_dbg(&client->dev, "\n"); mn88472_sleep() 383 ret = regmap_write(dev->regmap[2], 0x0b, 0x30); mn88472_sleep() 388 ret = regmap_write(dev->regmap[2], 0x05, 0x3e); mn88472_sleep() 392 dev->delivery_system = SYS_UNDEFINED; mn88472_sleep() 396 dev_dbg(&client->dev, "failed=%d\n", ret); mn88472_sleep() 440 struct mn88472_config config = client->dev.platform_data; mn88472_probe() 441 struct mn88472_dev dev; mn88472_probe() local 449 dev_dbg(&client->dev, "\n"); mn88472_probe() 453 dev_err(&client->dev, "frontend pointer not defined\n"); mn88472_probe() 458 dev = kzalloc(sizeof(dev), GFP_KERNEL); mn88472_probe() 459 if (dev == NULL) { mn88472_probe() 464 dev->i2c_wr_max = config->i2c_wr_max; mn88472_probe() 465 dev->xtal = config->xtal; mn88472_probe() 466 dev->ts_mode = config->ts_mode; mn88472_probe() 467 dev->ts_clock = config->ts_clock; mn88472_probe() 468 dev->client[0] = client; mn88472_probe() 469 dev->regmap[0] = regmap_init_i2c(dev->client[0], &regmap_config); mn88472_probe() 470 if (IS_ERR(dev->regmap[0])) { mn88472_probe() 471 ret = PTR_ERR(dev->regmap[0]); mn88472_probe() 476 ret = regmap_read(dev->regmap[0], 0x00, &utmp); mn88472_probe() 485 dev->client[1] = i2c_new_dummy(client->adapter, 0x1a); mn88472_probe() 486 if (dev->client[1] == NULL) { mn88472_probe() 488 dev_err(&client->dev, "I2C registration failed\n"); mn88472_probe() 492 dev->regmap[1] = regmap_init_i2c(dev->client[1], &regmap_config); mn88472_probe() 493 if (IS_ERR(dev->regmap[1])) { mn88472_probe() 494 ret = PTR_ERR(dev->regmap[1]); mn88472_probe() 497 i2c_set_clientdata(dev->client[1], dev); mn88472_probe() 499 dev->client[2] = i2c_new_dummy(client->adapter, 0x1c); mn88472_probe() 500 if (dev->client[2] == NULL) { mn88472_probe() 502 dev_err(&client->dev, "2nd I2C registration failed\n"); mn88472_probe() 506 dev->regmap[2] = regmap_init_i2c(dev->client[2], &regmap_config); mn88472_probe() 507 if (IS_ERR(dev->regmap[2])) { mn88472_probe() 508 ret = PTR_ERR(dev->regmap[2]); mn88472_probe() 511 i2c_set_clientdata(dev->client[2], dev); mn88472_probe() 514 memcpy(&dev->fe.ops, &mn88472_ops, sizeof(struct dvb_frontend_ops)); mn88472_probe() 515 dev->fe.demodulator_priv = client; mn88472_probe() 516 config->fe = &dev->fe; mn88472_probe() 517 i2c_set_clientdata(client, dev); mn88472_probe() 519 dev_info(&client->dev, "Panasonic MN88472 successfully attached\n"); mn88472_probe() 523 i2c_unregister_device(dev->client[2]); mn88472_probe() 525 regmap_exit(dev->regmap[1]); mn88472_probe() 527 i2c_unregister_device(dev->client[1]); mn88472_probe() 529 regmap_exit(dev->regmap[0]); mn88472_probe() 531 kfree(dev); mn88472_probe() 533 dev_dbg(&client->dev, "failed=%d\n", ret); mn88472_probe() 539 struct mn88472_dev dev = i2c_get_clientdata(client); mn88472_remove() local 541 dev_dbg(&client->dev, "\n"); mn88472_remove() 543 regmap_exit(dev->regmap[2]); mn88472_remove() 544 i2c_unregister_device(dev->client[2]); mn88472_remove() 546 regmap_exit(dev->regmap[1]); mn88472_remove() 547 i2c_unregister_device(dev->client[1]); mn88472_remove() 549 regmap_exit(dev->regmap[0]); mn88472_remove() 551 kfree(dev); mn88472_remove()
/linux-4.1.27/drivers/scsi/aacraid/
H A D	src.c	47 static int aac_src_get_sync_status(struct aac_dev dev); 52 struct aac_dev dev; aac_src_intr_message() local 59 dev = ctx->dev; aac_src_intr_message() 62 if (dev->msi_enabled) { aac_src_intr_message() 65 bellbits = src_readl(dev, MUnit.ODR_MSI); aac_src_intr_message() 73 bellbits = src_readl(dev, MUnit.ODR_R); aac_src_intr_message() 76 src_writel(dev, MUnit.ODR_C, bellbits); aac_src_intr_message() 77 src_readl(dev, MUnit.ODR_C); aac_src_intr_message() 80 src_writel(dev, MUnit.ODR_C, bellbits); aac_src_intr_message() 81 src_readl(dev, MUnit.ODR_C); aac_src_intr_message() 96 if (!aac_sync_mode && !dev->msi_enabled) { aac_src_intr_message() 97 src_writel(dev, MUnit.ODR_C, bellbits); aac_src_intr_message() 98 src_readl(dev, MUnit.ODR_C); aac_src_intr_message() 101 if (dev->sync_fib) { aac_src_intr_message() 102 if (dev->sync_fib->callback) aac_src_intr_message() 103 dev->sync_fib->callback(dev->sync_fib->callback_data, aac_src_intr_message() 104 dev->sync_fib); aac_src_intr_message() 105 spin_lock_irqsave(&dev->sync_fib->event_lock, sflags); aac_src_intr_message() 106 if (dev->sync_fib->flags & FIB_CONTEXT_FLAG_WAIT) { aac_src_intr_message() 107 dev->management_fib_count--; aac_src_intr_message() 108 up(&dev->sync_fib->event_wait); aac_src_intr_message() 110 spin_unlock_irqrestore(&dev->sync_fib->event_lock, aac_src_intr_message() 112 spin_lock_irqsave(&dev->sync_lock, sflags); aac_src_intr_message() 113 if (!list_empty(&dev->sync_fib_list)) { aac_src_intr_message() 114 entry = dev->sync_fib_list.next; aac_src_intr_message() 115 dev->sync_fib = list_entry(entry, aac_src_intr_message() 121 dev->sync_fib = NULL; aac_src_intr_message() 123 spin_unlock_irqrestore(&dev->sync_lock, sflags); aac_src_intr_message() 125 aac_adapter_sync_cmd(dev, SEND_SYNCHRONOUS_FIB, aac_src_intr_message() 126 (u32)dev->sync_fib->hw_fib_pa, aac_src_intr_message() 131 if (!dev->msi_enabled) aac_src_intr_message() 138 aac_intr_normal(dev, 0, 2, 0, NULL); aac_src_intr_message() 139 if (dev->msi_enabled) aac_src_intr_message() 140 aac_src_access_devreg(dev, AAC_CLEAR_AIF_BIT); aac_src_intr_message() 145 index = dev->host_rrq_idx[vector_no]; aac_src_intr_message() 150 handle = (dev->host_rrq[index] & 0x7fffffff); aac_src_intr_message() 157 if (dev->msi_enabled && dev->max_msix > 1) aac_src_intr_message() 158 atomic_dec(&dev->rrq_outstanding[vector_no]); aac_src_intr_message() 159 dev->host_rrq[index++] = 0; aac_src_intr_message() 160 aac_intr_normal(dev, handle-1, 0, isFastResponse, NULL); aac_src_intr_message() 161 if (index == (vector_no + 1) * dev->vector_cap) aac_src_intr_message() 162 index = vector_no * dev->vector_cap; aac_src_intr_message() 163 dev->host_rrq_idx[vector_no] = index; aac_src_intr_message() 173 * @dev: Adapter 176 static void aac_src_disable_interrupt(struct aac_dev dev) aac_src_disable_interrupt() argument 178 src_writel(dev, MUnit.OIMR, dev->OIMR = 0xffffffff); aac_src_disable_interrupt() 183 @dev: Adapter 186 static void aac_src_enable_interrupt_message(struct aac_dev dev) aac_src_enable_interrupt_message() argument 188 aac_src_access_devreg(dev, AAC_ENABLE_INTERRUPT); aac_src_enable_interrupt_message() 193 @dev: Adapter 202 static int src_sync_cmd(struct aac_dev dev, u32 command, src_sync_cmd() argument 213 writel(command, &dev->IndexRegs->Mailbox[0]); src_sync_cmd() 217 writel(p1, &dev->IndexRegs->Mailbox[1]); src_sync_cmd() 218 writel(p2, &dev->IndexRegs->Mailbox[2]); src_sync_cmd() 219 writel(p3, &dev->IndexRegs->Mailbox[3]); src_sync_cmd() 220 writel(p4, &dev->IndexRegs->Mailbox[4]); src_sync_cmd() 225 if (!dev->msi_enabled) src_sync_cmd() 226 src_writel(dev, src_sync_cmd() 233 src_writel(dev, MUnit.OIMR, dev->OIMR = 0xffffffff); src_sync_cmd() 239 src_readl(dev, MUnit.OIMR); src_sync_cmd() 244 src_writel(dev, MUnit.IDR, INBOUNDDOORBELL_0 << SRC_IDR_SHIFT); src_sync_cmd() 246 if (!dev->sync_mode \|\| command != SEND_SYNCHRONOUS_FIB) { src_sync_cmd() 262 if (aac_src_get_sync_status(dev) & OUTBOUNDDOORBELL_0) { src_sync_cmd() 266 if (dev->msi_enabled) src_sync_cmd() 267 aac_src_access_devreg(dev, src_sync_cmd() 270 src_writel(dev, src_sync_cmd() 285 aac_adapter_enable_int(dev); src_sync_cmd() 292 status = readl(&dev->IndexRegs->Mailbox[0]); src_sync_cmd() 294 r1 = readl(&dev->IndexRegs->Mailbox[1]); src_sync_cmd() 296 r2 = readl(&dev->IndexRegs->Mailbox[2]); src_sync_cmd() 298 r3 = readl(&dev->IndexRegs->Mailbox[3]); src_sync_cmd() 300 r4 = readl(&dev->IndexRegs->Mailbox[4]); src_sync_cmd() 302 dev->max_msix = src_sync_cmd() 303 readl(&dev->IndexRegs->Mailbox[5]) & 0xFFFF; src_sync_cmd() 307 if (!dev->msi_enabled) src_sync_cmd() 308 src_writel(dev, src_sync_cmd() 316 aac_adapter_enable_int(dev); src_sync_cmd() 322 * @dev: Adapter 327 static void aac_src_interrupt_adapter(struct aac_dev dev) aac_src_interrupt_adapter() argument 329 src_sync_cmd(dev, BREAKPOINT_REQUEST, aac_src_interrupt_adapter() 336 @dev: Adapter 343 static void aac_src_notify_adapter(struct aac_dev dev, u32 event) aac_src_notify_adapter() argument 348 src_writel(dev, MUnit.ODR_C, aac_src_notify_adapter() 352 src_writel(dev, MUnit.ODR_C, aac_src_notify_adapter() 356 src_writel(dev, MUnit.ODR_C, aac_src_notify_adapter() 360 src_writel(dev, MUnit.ODR_C, aac_src_notify_adapter() 364 src_writel(dev, MUnit.ODR_C, aac_src_notify_adapter() 368 src_writel(dev, MUnit.ODR_C, aac_src_notify_adapter() 379 @dev: Adapter 384 static void aac_src_start_adapter(struct aac_dev dev) aac_src_start_adapter() argument 390 for (i = 0; i < dev->max_msix; i++) { aac_src_start_adapter() 391 dev->host_rrq_idx[i] = i dev->vector_cap; aac_src_start_adapter() 392 atomic_set(&dev->rrq_outstanding[i], 0); aac_src_start_adapter() 394 dev->fibs_pushed_no = 0; aac_src_start_adapter() 396 init = dev->init; aac_src_start_adapter() 400 src_sync_cmd(dev, INIT_STRUCT_BASE_ADDRESS, (u32)(ulong)dev->init_pa, aac_src_start_adapter() 406 * @dev: device to check if healthy 411 static int aac_src_check_health(struct aac_dev dev) aac_src_check_health() argument 413 u32 status = src_readl(dev, MUnit.OMR); aac_src_check_health() 445 struct aac_dev dev = fib->dev; aac_src_deliver_message() local 446 struct aac_queue q = &dev->queues->queue[AdapNormCmdQueue]; aac_src_deliver_message() 455 if (dev->msi_enabled && fib->hw_fib_va->header.Command != AifRequest && aac_src_deliver_message() 456 dev->max_msix > 1) { aac_src_deliver_message() 463 atomic_inc(&dev->rrq_outstanding[vector_no]); aac_src_deliver_message() 465 if (dev->comm_interface == AAC_COMM_MESSAGE_TYPE2) { aac_src_deliver_message() 499 src_writel(dev, MUnit.IQ_H, upper_32_bits(address) & 0xffffffff); aac_src_deliver_message() 500 src_writel(dev, MUnit.IQ_L, address & 0xffffffff); aac_src_deliver_message() 510 static int aac_src_ioremap(struct aac_dev dev, u32 size) aac_src_ioremap() argument 513 iounmap(dev->regs.src.bar1); aac_src_ioremap() 514 dev->regs.src.bar1 = NULL; aac_src_ioremap() 515 iounmap(dev->regs.src.bar0); aac_src_ioremap() 516 dev->base = dev->regs.src.bar0 = NULL; aac_src_ioremap() 519 dev->regs.src.bar1 = ioremap(pci_resource_start(dev->pdev, 2), aac_src_ioremap() 521 dev->base = NULL; aac_src_ioremap() 522 if (dev->regs.src.bar1 == NULL) aac_src_ioremap() 524 dev->base = dev->regs.src.bar0 = ioremap(dev->base_start, size); aac_src_ioremap() 525 if (dev->base == NULL) { aac_src_ioremap() 526 iounmap(dev->regs.src.bar1); aac_src_ioremap() 527 dev->regs.src.bar1 = NULL; aac_src_ioremap() 530 dev->IndexRegs = &((struct src_registers __iomem ) aac_src_ioremap() 531 dev->base)->u.tupelo.IndexRegs; aac_src_ioremap() 540 static int aac_srcv_ioremap(struct aac_dev dev, u32 size) aac_srcv_ioremap() argument 543 iounmap(dev->regs.src.bar0); aac_srcv_ioremap() 544 dev->base = dev->regs.src.bar0 = NULL; aac_srcv_ioremap() 547 dev->base = dev->regs.src.bar0 = ioremap(dev->base_start, size); aac_srcv_ioremap() 548 if (dev->base == NULL) aac_srcv_ioremap() 550 dev->IndexRegs = &((struct src_registers __iomem ) aac_srcv_ioremap() 551 dev->base)->u.denali.IndexRegs; aac_srcv_ioremap() 555 static int aac_src_restart_adapter(struct aac_dev dev, int bled) aac_src_restart_adapter() argument 562 dev->name, dev->id, bled); aac_src_restart_adapter() 563 dev->a_ops.adapter_enable_int = aac_src_disable_interrupt; aac_src_restart_adapter() 564 bled = aac_adapter_sync_cmd(dev, IOP_RESET_ALWAYS, aac_src_restart_adapter() 567 !dev->doorbell_mask) aac_src_restart_adapter() 569 else if (dev->doorbell_mask) { aac_src_restart_adapter() 570 reset_mask = dev->doorbell_mask; aac_src_restart_adapter() 575 if ((dev->pdev->device == PMC_DEVICE_S7 \|\| aac_src_restart_adapter() 576 dev->pdev->device == PMC_DEVICE_S8 \|\| aac_src_restart_adapter() 577 dev->pdev->device == PMC_DEVICE_S9) && dev->msi_enabled) { aac_src_restart_adapter() 578 aac_src_access_devreg(dev, AAC_ENABLE_INTX); aac_src_restart_adapter() 579 dev->msi_enabled = 0; aac_src_restart_adapter() 583 if (!bled && (dev->supplement_adapter_info.SupportedOptions2 & aac_src_restart_adapter() 585 src_writel(dev, MUnit.IDR, reset_mask); aac_src_restart_adapter() 588 src_writel(dev, MUnit.IDR, 0x100); aac_src_restart_adapter() 593 if (src_readl(dev, MUnit.OMR) & KERNEL_PANIC) aac_src_restart_adapter() 604 * @dev: Adapter 607 int aac_src_select_comm(struct aac_dev dev, int comm) aac_src_select_comm() argument 611 dev->a_ops.adapter_intr = aac_src_intr_message; aac_src_select_comm() 612 dev->a_ops.adapter_deliver = aac_src_deliver_message; aac_src_select_comm() 622 @dev: device to configure 626 int aac_src_init(struct aac_dev dev) aac_src_init() argument 631 int instance = dev->id; aac_src_init() 632 const char name = dev->name; aac_src_init() 634 dev->a_ops.adapter_ioremap = aac_src_ioremap; aac_src_init() 635 dev->a_ops.adapter_comm = aac_src_select_comm; aac_src_init() 637 dev->base_size = AAC_MIN_SRC_BAR0_SIZE; aac_src_init() 638 if (aac_adapter_ioremap(dev, dev->base_size)) { aac_src_init() 644 dev->a_ops.adapter_sync_cmd = src_sync_cmd; aac_src_init() 645 dev->a_ops.adapter_enable_int = aac_src_disable_interrupt; aac_src_init() 647 !aac_src_restart_adapter(dev, 0)) aac_src_init() 652 status = src_readl(dev, MUnit.OMR); aac_src_init() 654 if (aac_src_restart_adapter(dev, aac_src_check_health(dev))) aac_src_init() 661 status = src_readl(dev, MUnit.OMR); aac_src_init() 664 dev->name, instance); aac_src_init() 672 dev->name, instance); aac_src_init() 679 while (!((status = src_readl(dev, MUnit.OMR)) & aac_src_init() 685 dev->name, instance, status); aac_src_init() 694 if (likely(!aac_src_restart_adapter(dev, aac_src_init() 695 aac_src_check_health(dev)))) aac_src_init() 706 dev->a_ops.adapter_interrupt = aac_src_interrupt_adapter; aac_src_init() 707 dev->a_ops.adapter_disable_int = aac_src_disable_interrupt; aac_src_init() 708 dev->a_ops.adapter_enable_int = aac_src_disable_interrupt; aac_src_init() 709 dev->a_ops.adapter_notify = aac_src_notify_adapter; aac_src_init() 710 dev->a_ops.adapter_sync_cmd = src_sync_cmd; aac_src_init() 711 dev->a_ops.adapter_check_health = aac_src_check_health; aac_src_init() 712 dev->a_ops.adapter_restart = aac_src_restart_adapter; aac_src_init() 718 aac_adapter_comm(dev, AAC_COMM_MESSAGE); aac_src_init() 719 aac_adapter_disable_int(dev); aac_src_init() 720 src_writel(dev, MUnit.ODR_C, 0xffffffff); aac_src_init() 721 aac_adapter_enable_int(dev); aac_src_init() 723 if (aac_init_adapter(dev) == NULL) aac_src_init() 725 if (dev->comm_interface != AAC_COMM_MESSAGE_TYPE1) aac_src_init() 728 dev->msi = aac_msi && !pci_enable_msi(dev->pdev); aac_src_init() 730 dev->aac_msix[0].vector_no = 0; aac_src_init() 731 dev->aac_msix[0].dev = dev; aac_src_init() 733 if (request_irq(dev->pdev->irq, dev->a_ops.adapter_intr, aac_src_init() 734 IRQF_SHARED, "aacraid", &(dev->aac_msix[0])) < 0) { aac_src_init() 736 if (dev->msi) aac_src_init() 737 pci_disable_msi(dev->pdev); aac_src_init() 743 dev->dbg_base = pci_resource_start(dev->pdev, 2); aac_src_init() 744 dev->dbg_base_mapped = dev->regs.src.bar1; aac_src_init() 745 dev->dbg_size = AAC_MIN_SRC_BAR1_SIZE; aac_src_init() 746 dev->a_ops.adapter_enable_int = aac_src_enable_interrupt_message; aac_src_init() 748 aac_adapter_enable_int(dev); aac_src_init() 750 if (!dev->sync_mode) { aac_src_init() 755 aac_src_start_adapter(dev); aac_src_init() 766 * @dev: device to configure 770 int aac_srcv_init(struct aac_dev dev) aac_srcv_init() argument 775 int instance = dev->id; aac_srcv_init() 777 const char name = dev->name; aac_srcv_init() 780 dev->a_ops.adapter_ioremap = aac_srcv_ioremap; aac_srcv_init() 781 dev->a_ops.adapter_comm = aac_src_select_comm; aac_srcv_init() 783 dev->base_size = AAC_MIN_SRCV_BAR0_SIZE; aac_srcv_init() 784 if (aac_adapter_ioremap(dev, dev->base_size)) { aac_srcv_init() 790 dev->a_ops.adapter_sync_cmd = src_sync_cmd; aac_srcv_init() 791 dev->a_ops.adapter_enable_int = aac_src_disable_interrupt; aac_srcv_init() 793 !aac_src_restart_adapter(dev, 0)) aac_srcv_init() 799 status = src_readl(dev, MUnit.OMR); aac_srcv_init() 803 status = src_readl(dev, MUnit.OMR); aac_srcv_init() 806 dev->name, instance); aac_srcv_init() 820 status = src_readl(dev, MUnit.OMR); aac_srcv_init() 822 if (aac_src_restart_adapter(dev, aac_src_check_health(dev))) aac_srcv_init() 829 status = src_readl(dev, MUnit.OMR); aac_srcv_init() 831 printk(KERN_ERR "%s%d: adapter self-test failed.\n", dev->name, instance); aac_srcv_init() 838 printk(KERN_ERR "%s%d: adapter monitor panic.\n", dev->name, instance); aac_srcv_init() 845 while (!((status = src_readl(dev, MUnit.OMR)) & aac_srcv_init() 852 dev->name, instance, status); aac_srcv_init() 861 if (likely(!aac_src_restart_adapter(dev, aac_src_check_health(dev)))) aac_srcv_init() 872 dev->a_ops.adapter_interrupt = aac_src_interrupt_adapter; aac_srcv_init() 873 dev->a_ops.adapter_disable_int = aac_src_disable_interrupt; aac_srcv_init() 874 dev->a_ops.adapter_enable_int = aac_src_disable_interrupt; aac_srcv_init() 875 dev->a_ops.adapter_notify = aac_src_notify_adapter; aac_srcv_init() 876 dev->a_ops.adapter_sync_cmd = src_sync_cmd; aac_srcv_init() 877 dev->a_ops.adapter_check_health = aac_src_check_health; aac_srcv_init() 878 dev->a_ops.adapter_restart = aac_src_restart_adapter; aac_srcv_init() 884 aac_adapter_comm(dev, AAC_COMM_MESSAGE); aac_srcv_init() 885 aac_adapter_disable_int(dev); aac_srcv_init() 886 src_writel(dev, MUnit.ODR_C, 0xffffffff); aac_srcv_init() 887 aac_adapter_enable_int(dev); aac_srcv_init() 889 if (aac_init_adapter(dev) == NULL) aac_srcv_init() 891 if (dev->comm_interface != AAC_COMM_MESSAGE_TYPE2) aac_srcv_init() 893 if (dev->msi_enabled) aac_srcv_init() 894 aac_src_access_devreg(dev, AAC_ENABLE_MSIX); aac_srcv_init() 895 if (!dev->sync_mode && dev->msi_enabled && dev->max_msix > 1) { aac_srcv_init() 897 for (i = 0; i < dev->max_msix; i++) { aac_srcv_init() 898 dev->aac_msix[i].vector_no = i; aac_srcv_init() 899 dev->aac_msix[i].dev = dev; aac_srcv_init() 901 if (request_irq(dev->msixentry[i].vector, aac_srcv_init() 902 dev->a_ops.adapter_intr, aac_srcv_init() 905 &(dev->aac_msix[i]))) { aac_srcv_init() 909 free_irq(dev->msixentry[j].vector, aac_srcv_init() 910 &(dev->aac_msix[j])); aac_srcv_init() 911 pci_disable_msix(dev->pdev); aac_srcv_init() 915 dev->msixentry[i].vector, aac_srcv_init() 923 dev->aac_msix[0].vector_no = 0; aac_srcv_init() 924 dev->aac_msix[0].dev = dev; aac_srcv_init() 926 if (request_irq(dev->pdev->irq, dev->a_ops.adapter_intr, aac_srcv_init() 929 &(dev->aac_msix[0])) < 0) { aac_srcv_init() 930 if (dev->msi) aac_srcv_init() 931 pci_disable_msi(dev->pdev); aac_srcv_init() 937 dev->dbg_base = dev->base_start; aac_srcv_init() 938 dev->dbg_base_mapped = dev->base; aac_srcv_init() 939 dev->dbg_size = dev->base_size; aac_srcv_init() 940 dev->a_ops.adapter_enable_int = aac_src_enable_interrupt_message; aac_srcv_init() 942 aac_adapter_enable_int(dev); aac_srcv_init() 944 if (!dev->sync_mode) { aac_srcv_init() 949 aac_src_start_adapter(dev); aac_srcv_init() 958 void aac_src_access_devreg(struct aac_dev dev, int mode) aac_src_access_devreg() argument 964 src_writel(dev, aac_src_access_devreg() 966 dev->OIMR = (dev->msi_enabled ? aac_src_access_devreg() 972 src_writel(dev, aac_src_access_devreg() 974 dev->OIMR = AAC_INT_DISABLE_ALL); aac_src_access_devreg() 979 val = src_readl(dev, MUnit.IDR); aac_src_access_devreg() 981 src_writel(dev, MUnit.IDR, val); aac_src_access_devreg() 982 src_readl(dev, MUnit.IDR); aac_src_access_devreg() 985 src_writel(dev, MUnit.IOAR, val); aac_src_access_devreg() 986 val = src_readl(dev, MUnit.OIMR); aac_src_access_devreg() 987 src_writel(dev, aac_src_access_devreg() 994 val = src_readl(dev, MUnit.IDR); aac_src_access_devreg() 996 src_writel(dev, MUnit.IDR, val); aac_src_access_devreg() 997 src_readl(dev, MUnit.IDR); aac_src_access_devreg() 1002 val = src_readl(dev, MUnit.IDR); aac_src_access_devreg() 1004 src_writel(dev, MUnit.IDR, val); aac_src_access_devreg() 1005 src_readl(dev, MUnit.IDR); aac_src_access_devreg() 1010 val = src_readl(dev, MUnit.IDR); aac_src_access_devreg() 1012 src_writel(dev, MUnit.IDR, val); aac_src_access_devreg() 1013 src_readl(dev, MUnit.IDR); aac_src_access_devreg() 1018 val = src_readl(dev, MUnit.IDR); aac_src_access_devreg() 1020 src_writel(dev, MUnit.IDR, val); aac_src_access_devreg() 1021 src_readl(dev, MUnit.IDR); aac_src_access_devreg() 1024 src_writel(dev, MUnit.IOAR, val); aac_src_access_devreg() 1025 src_readl(dev, MUnit.IOAR); aac_src_access_devreg() 1026 val = src_readl(dev, MUnit.OIMR); aac_src_access_devreg() 1027 src_writel(dev, MUnit.OIMR, aac_src_access_devreg() 1036 static int aac_src_get_sync_status(struct aac_dev dev) aac_src_get_sync_status() argument 1041 if (dev->msi_enabled) aac_src_get_sync_status() 1042 val = src_readl(dev, MUnit.ODR_MSI) & 0x1000 ? 1 : 0; aac_src_get_sync_status() 1044 val = src_readl(dev, MUnit.ODR_R) >> SRC_ODR_SHIFT; aac_src_get_sync_status()
H A D	sa.c	49 struct aac_dev dev = dev_id; aac_sa_intr() local 52 intstat = sa_readw(dev, DoorbellReg_p); aac_sa_intr() 57 mask = ~(sa_readw(dev, SaDbCSR.PRISETIRQMASK)); aac_sa_intr() 63 aac_printf(dev, sa_readl(dev, Mailbox5)); aac_sa_intr() 64 sa_writew(dev, DoorbellClrReg_p, PrintfReady); / clear PrintfReady / aac_sa_intr() 65 sa_writew(dev, DoorbellReg_s, PrintfDone); aac_sa_intr() 66 } else if (intstat & DOORBELL_1) { // dev -> Host Normal Command Ready aac_sa_intr() 67 sa_writew(dev, DoorbellClrReg_p, DOORBELL_1); aac_sa_intr() 68 aac_command_normal(&dev->queues->queue[HostNormCmdQueue]); aac_sa_intr() 69 } else if (intstat & DOORBELL_2) { // dev -> Host Normal Response Ready aac_sa_intr() 70 sa_writew(dev, DoorbellClrReg_p, DOORBELL_2); aac_sa_intr() 71 aac_response_normal(&dev->queues->queue[HostNormRespQueue]); aac_sa_intr() 72 } else if (intstat & DOORBELL_3) { // dev -> Host Normal Command Not Full aac_sa_intr() 73 sa_writew(dev, DoorbellClrReg_p, DOORBELL_3); aac_sa_intr() 74 } else if (intstat & DOORBELL_4) { // dev -> Host Normal Response Not Full aac_sa_intr() 75 sa_writew(dev, DoorbellClrReg_p, DOORBELL_4); aac_sa_intr() 84 @dev: Which adapter to enable. 87 static void aac_sa_disable_interrupt (struct aac_dev dev) aac_sa_disable_interrupt() argument 89 sa_writew(dev, SaDbCSR.PRISETIRQMASK, 0xffff); aac_sa_disable_interrupt() 94 @dev: Which adapter to enable. 97 static void aac_sa_enable_interrupt (struct aac_dev dev) aac_sa_enable_interrupt() argument 99 sa_writew(dev, SaDbCSR.PRICLEARIRQMASK, (PrintfReady \| DOORBELL_1 \| aac_sa_enable_interrupt() 105 @dev: Adapter that notification is for 111 static void aac_sa_notify_adapter(struct aac_dev dev, u32 event) aac_sa_notify_adapter() argument 116 sa_writew(dev, DoorbellReg_s,DOORBELL_1); aac_sa_notify_adapter() 119 sa_writew(dev, DoorbellReg_s,DOORBELL_4); aac_sa_notify_adapter() 122 sa_writew(dev, DoorbellReg_s,DOORBELL_2); aac_sa_notify_adapter() 125 sa_writew(dev, DoorbellReg_s,DOORBELL_3); aac_sa_notify_adapter() 129 sa_sync_cmd(dev, HOST_CRASHING, 0, 0, 0, 0, 0, 0, aac_sa_notify_adapter() 134 sa_writew(dev, DoorbellReg_s,DOORBELL_6); aac_sa_notify_adapter() 137 sa_writew(dev, DoorbellReg_s,DOORBELL_5); aac_sa_notify_adapter() 148 @dev: Adapter 157 static int sa_sync_cmd(struct aac_dev dev, u32 command, sa_sync_cmd() argument 166 sa_writel(dev, Mailbox0, command); sa_sync_cmd() 170 sa_writel(dev, Mailbox1, p1); sa_sync_cmd() 171 sa_writel(dev, Mailbox2, p2); sa_sync_cmd() 172 sa_writel(dev, Mailbox3, p3); sa_sync_cmd() 173 sa_writel(dev, Mailbox4, p4); sa_sync_cmd() 178 sa_writew(dev, DoorbellClrReg_p, DOORBELL_0); sa_sync_cmd() 182 sa_writew(dev, DoorbellReg_s, DOORBELL_0); sa_sync_cmd() 197 if(sa_readw(dev, DoorbellReg_p) & DOORBELL_0) { sa_sync_cmd() 209 sa_writew(dev, DoorbellClrReg_p, DOORBELL_0); sa_sync_cmd() 214 ret = sa_readl(dev, Mailbox0); sa_sync_cmd() 216 r1 = sa_readl(dev, Mailbox1); sa_sync_cmd() 218 r2 = sa_readl(dev, Mailbox2); sa_sync_cmd() 220 r3 = sa_readl(dev, Mailbox3); sa_sync_cmd() 222 r4 = sa_readl(dev, Mailbox4); sa_sync_cmd() 228 * @dev: Which adapter to enable. 233 static void aac_sa_interrupt_adapter (struct aac_dev dev) aac_sa_interrupt_adapter() argument 235 sa_sync_cmd(dev, BREAKPOINT_REQUEST, 0, 0, 0, 0, 0, 0, aac_sa_interrupt_adapter() 241 @dev: Adapter 246 static void aac_sa_start_adapter(struct aac_dev dev) aac_sa_start_adapter() argument 252 init = dev->init; aac_sa_start_adapter() 255 sa_sync_cmd(dev, INIT_STRUCT_BASE_ADDRESS, aac_sa_start_adapter() 256 (u32)(ulong)dev->init_pa, 0, 0, 0, 0, 0, aac_sa_start_adapter() 260 static int aac_sa_restart_adapter(struct aac_dev dev, int bled) aac_sa_restart_adapter() argument 267 * @dev: device to check if healthy 272 static int aac_sa_check_health(struct aac_dev dev) aac_sa_check_health() argument 274 long status = sa_readl(dev, Mailbox7); aac_sa_check_health() 302 static int aac_sa_ioremap(struct aac_dev dev, u32 size) aac_sa_ioremap() argument 305 iounmap(dev->regs.sa); aac_sa_ioremap() 308 dev->base = dev->regs.sa = ioremap(dev->base_start, size); aac_sa_ioremap() 309 return (dev->base == NULL) ? -1 : 0; aac_sa_ioremap() 314 * @dev: device to configure 321 int aac_sa_init(struct aac_dev dev) aac_sa_init() argument 328 instance = dev->id; aac_sa_init() 329 name = dev->name; aac_sa_init() 331 if (aac_sa_ioremap(dev, dev->base_size)) { aac_sa_init() 339 if (sa_readl(dev, Mailbox7) & SELF_TEST_FAILED) { aac_sa_init() 346 if (sa_readl(dev, Mailbox7) & KERNEL_PANIC) { aac_sa_init() 354 while (!(sa_readl(dev, Mailbox7) & KERNEL_UP_AND_RUNNING)) { aac_sa_init() 356 status = sa_readl(dev, Mailbox7); aac_sa_init() 368 dev->a_ops.adapter_interrupt = aac_sa_interrupt_adapter; aac_sa_init() 369 dev->a_ops.adapter_disable_int = aac_sa_disable_interrupt; aac_sa_init() 370 dev->a_ops.adapter_enable_int = aac_sa_enable_interrupt; aac_sa_init() 371 dev->a_ops.adapter_notify = aac_sa_notify_adapter; aac_sa_init() 372 dev->a_ops.adapter_sync_cmd = sa_sync_cmd; aac_sa_init() 373 dev->a_ops.adapter_check_health = aac_sa_check_health; aac_sa_init() 374 dev->a_ops.adapter_restart = aac_sa_restart_adapter; aac_sa_init() 375 dev->a_ops.adapter_intr = aac_sa_intr; aac_sa_init() 376 dev->a_ops.adapter_deliver = aac_rx_deliver_producer; aac_sa_init() 377 dev->a_ops.adapter_ioremap = aac_sa_ioremap; aac_sa_init() 383 aac_adapter_disable_int(dev); aac_sa_init() 384 aac_adapter_enable_int(dev); aac_sa_init() 386 if(aac_init_adapter(dev) == NULL) aac_sa_init() 388 dev->sync_mode = 0; / sync. mode not supported / aac_sa_init() 389 if (request_irq(dev->pdev->irq, dev->a_ops.adapter_intr, aac_sa_init() 390 IRQF_SHARED, "aacraid", (void )dev) < 0) { aac_sa_init() 395 dev->dbg_base = dev->base_start; aac_sa_init() 396 dev->dbg_base_mapped = dev->base; aac_sa_init() 397 dev->dbg_size = dev->base_size; aac_sa_init() 399 aac_adapter_enable_int(dev); aac_sa_init() 405 aac_sa_start_adapter(dev); aac_sa_init() 409 aac_sa_disable_interrupt(dev); aac_sa_init() 410 free_irq(dev->pdev->irq, (void *)dev); aac_sa_init()
H A D	nark.c	43 static int aac_nark_ioremap(struct aac_dev * dev, u32 size) aac_nark_ioremap() argument 46 iounmap(dev->regs.rx); aac_nark_ioremap() 47 dev->regs.rx = NULL; aac_nark_ioremap() 48 iounmap(dev->base); aac_nark_ioremap() 49 dev->base = NULL; aac_nark_ioremap() 52 dev->base_start = pci_resource_start(dev->pdev, 2); aac_nark_ioremap() 53 dev->regs.rx = ioremap((u64)pci_resource_start(dev->pdev, 0) \| aac_nark_ioremap() 54 ((u64)pci_resource_start(dev->pdev, 1) << 32), aac_nark_ioremap() 56 dev->base = NULL; aac_nark_ioremap() 57 if (dev->regs.rx == NULL) aac_nark_ioremap() 59 dev->base = ioremap(dev->base_start, size); aac_nark_ioremap() 60 if (dev->base == NULL) { aac_nark_ioremap() 61 iounmap(dev->regs.rx); aac_nark_ioremap() 62 dev->regs.rx = NULL; aac_nark_ioremap() 65 dev->IndexRegs = &((struct rx_registers __iomem )dev->base)->IndexRegs; aac_nark_ioremap() 71 @dev: device to configure 75 int aac_nark_init(struct aac_dev * dev) aac_nark_init() argument 80 dev->a_ops.adapter_ioremap = aac_nark_ioremap; aac_nark_init() 81 dev->a_ops.adapter_comm = aac_rx_select_comm; aac_nark_init() 83 return _aac_rx_init(dev); aac_nark_init()
/linux-4.1.27/drivers/staging/rtl8192u/
H A D	r8180_93cx6.c	23 static void eprom_cs(struct net_device dev, short bit) eprom_cs() argument 27 read_nic_byte_E(dev, EPROM_CMD, &cmdreg); eprom_cs() 30 write_nic_byte_E(dev, EPROM_CMD, cmdreg \| EPROM_CS_BIT); eprom_cs() 33 write_nic_byte_E(dev, EPROM_CMD, cmdreg & ~EPROM_CS_BIT); eprom_cs() 35 force_pci_posting(dev); eprom_cs() 40 static void eprom_ck_cycle(struct net_device dev) eprom_ck_cycle() argument 44 read_nic_byte_E(dev, EPROM_CMD, &cmdreg); eprom_ck_cycle() 45 write_nic_byte_E(dev, EPROM_CMD, cmdreg \| EPROM_CK_BIT); eprom_ck_cycle() 46 force_pci_posting(dev); eprom_ck_cycle() 49 read_nic_byte_E(dev, EPROM_CMD, &cmdreg); eprom_ck_cycle() 50 write_nic_byte_E(dev, EPROM_CMD, cmdreg & ~EPROM_CK_BIT); eprom_ck_cycle() 51 force_pci_posting(dev); eprom_ck_cycle() 56 static void eprom_w(struct net_device dev, short bit) eprom_w() argument 60 read_nic_byte_E(dev, EPROM_CMD, &cmdreg); eprom_w() 62 write_nic_byte_E(dev, EPROM_CMD, cmdreg \| EPROM_W_BIT); eprom_w() 64 write_nic_byte_E(dev, EPROM_CMD, cmdreg & ~EPROM_W_BIT); eprom_w() 66 force_pci_posting(dev); eprom_w() 71 static short eprom_r(struct net_device dev) eprom_r() argument 75 read_nic_byte_E(dev, EPROM_CMD, &bit); eprom_r() 85 static void eprom_send_bits_string(struct net_device dev, short b[], int len) eprom_send_bits_string() argument 90 eprom_w(dev, b[i]); eprom_send_bits_string() 91 eprom_ck_cycle(dev); eprom_send_bits_string() 96 u32 eprom_read(struct net_device dev, u32 addr) eprom_read() argument 98 struct r8192_priv *priv = ieee80211_priv(dev); eprom_read() 107 write_nic_byte_E(dev, EPROM_CMD, eprom_read() 109 force_pci_posting(dev); eprom_read() 131 eprom_cs(dev, 1); eprom_read() 132 eprom_ck_cycle(dev); eprom_read() 133 eprom_send_bits_string(dev, read_cmd, 3); eprom_read() 134 eprom_send_bits_string(dev, addr_str, addr_len); eprom_read() 140 eprom_w(dev, 0); eprom_read() 146 eprom_ck_cycle(dev); eprom_read() 147 ret \|= (eprom_r(dev)<<(15-i)); eprom_read() 150 eprom_cs(dev, 0); eprom_read() 151 eprom_ck_cycle(dev); eprom_read() 154 write_nic_byte_E(dev, EPROM_CMD, eprom_read()
/linux-4.1.27/arch/powerpc/platforms/44x/
H A D	virtex_ml510.c	8 static void ml510_ali_quirk(struct pci_dev *dev) ml510_ali_quirk() argument 11 pci_write_config_byte(dev, 0x58, 0x4c); ml510_ali_quirk() 13 pci_write_config_byte(dev, 0x44, 0x0d); ml510_ali_quirk() 15 pci_write_config_byte(dev, 0x75, 0x0f); ml510_ali_quirk() 17 pci_write_config_byte(dev, 0x09, 0xff); ml510_ali_quirk() 20 pci_write_config_byte(dev, 0x48, 0x00); ml510_ali_quirk() 22 pci_write_config_byte(dev, 0x4a, 0x00); ml510_ali_quirk() 24 pci_write_config_byte(dev, 0x4b, 0x60); ml510_ali_quirk() 26 pci_write_config_byte(dev, 0x74, 0x06); ml510_ali_quirk()
/linux-4.1.27/net/wireless/
H A D	ap.c	10 struct net_device dev, bool notify) __cfg80211_stop_ap() 12 struct wireless_dev wdev = dev->ieee80211_ptr; __cfg80211_stop_ap() 20 if (dev->ieee80211_ptr->iftype != NL80211_IFTYPE_AP && __cfg80211_stop_ap() 21 dev->ieee80211_ptr->iftype != NL80211_IFTYPE_P2P_GO) __cfg80211_stop_ap() 27 err = rdev_stop_ap(rdev, dev); __cfg80211_stop_ap() 32 rdev_set_qos_map(rdev, dev, NULL); __cfg80211_stop_ap() 41 struct net_device dev, bool notify) cfg80211_stop_ap() 43 struct wireless_dev wdev = dev->ieee80211_ptr; cfg80211_stop_ap() 47 err = __cfg80211_stop_ap(rdev, dev, notify); cfg80211_stop_ap() 9 __cfg80211_stop_ap(struct cfg80211_registered_device rdev, struct net_device dev, bool notify) __cfg80211_stop_ap() argument 40 cfg80211_stop_ap(struct cfg80211_registered_device rdev, struct net_device dev, bool notify) cfg80211_stop_ap() argument
/linux-4.1.27/drivers/staging/media/mn88473/
H A D	mn88473.c	29 struct mn88473_dev dev = i2c_get_clientdata(client); mn88473_set_frontend() local 36 dev_dbg(&client->dev, mn88473_set_frontend() 46 if (!dev->warm) { mn88473_set_frontend() 89 dev_dbg(&client->dev, "get_if_frequency=%d\n", if_frequency); mn88473_set_frontend() 95 tmp = div_u64(if_frequency (u64)(1<<24) + (dev->xtal / 2), mn88473_set_frontend() 96 dev->xtal); mn88473_set_frontend() 101 ret = regmap_write(dev->regmap[2], 0x05, 0x00); mn88473_set_frontend() 102 ret = regmap_write(dev->regmap[2], 0xfb, 0x13); mn88473_set_frontend() 103 ret = regmap_write(dev->regmap[2], 0xef, 0x13); mn88473_set_frontend() 104 ret = regmap_write(dev->regmap[2], 0xf9, 0x13); mn88473_set_frontend() 105 ret = regmap_write(dev->regmap[2], 0x00, 0x18); mn88473_set_frontend() 106 ret = regmap_write(dev->regmap[2], 0x01, 0x01); mn88473_set_frontend() 107 ret = regmap_write(dev->regmap[2], 0x02, 0x21); mn88473_set_frontend() 108 ret = regmap_write(dev->regmap[2], 0x03, delivery_system_val); mn88473_set_frontend() 109 ret = regmap_write(dev->regmap[2], 0x0b, 0x00); mn88473_set_frontend() 112 ret = regmap_write(dev->regmap[2], 0x10 + i, if_val[i]); mn88473_set_frontend() 118 ret = regmap_write(dev->regmap[2], 0x13 + i, bw_val[i]); mn88473_set_frontend() 123 ret = regmap_write(dev->regmap[2], 0x2d, 0x3b); mn88473_set_frontend() 124 ret = regmap_write(dev->regmap[2], 0x2e, 0x00); mn88473_set_frontend() 125 ret = regmap_write(dev->regmap[2], 0x56, 0x0d); mn88473_set_frontend() 126 ret = regmap_write(dev->regmap[0], 0x01, 0xba); mn88473_set_frontend() 127 ret = regmap_write(dev->regmap[0], 0x02, 0x13); mn88473_set_frontend() 128 ret = regmap_write(dev->regmap[0], 0x03, 0x80); mn88473_set_frontend() 129 ret = regmap_write(dev->regmap[0], 0x04, 0xba); mn88473_set_frontend() 130 ret = regmap_write(dev->regmap[0], 0x05, 0x91); mn88473_set_frontend() 131 ret = regmap_write(dev->regmap[0], 0x07, 0xe7); mn88473_set_frontend() 132 ret = regmap_write(dev->regmap[0], 0x08, 0x28); mn88473_set_frontend() 133 ret = regmap_write(dev->regmap[0], 0x0a, 0x1a); mn88473_set_frontend() 134 ret = regmap_write(dev->regmap[0], 0x13, 0x1f); mn88473_set_frontend() 135 ret = regmap_write(dev->regmap[0], 0x19, 0x03); mn88473_set_frontend() 136 ret = regmap_write(dev->regmap[0], 0x1d, 0xb0); mn88473_set_frontend() 137 ret = regmap_write(dev->regmap[0], 0x2a, 0x72); mn88473_set_frontend() 138 ret = regmap_write(dev->regmap[0], 0x2d, 0x00); mn88473_set_frontend() 139 ret = regmap_write(dev->regmap[0], 0x3c, 0x00); mn88473_set_frontend() 140 ret = regmap_write(dev->regmap[0], 0x3f, 0xf8); mn88473_set_frontend() 141 ret = regmap_write(dev->regmap[0], 0x40, 0xf4); mn88473_set_frontend() 142 ret = regmap_write(dev->regmap[0], 0x41, 0x08); mn88473_set_frontend() 143 ret = regmap_write(dev->regmap[0], 0xd2, 0x29); mn88473_set_frontend() 144 ret = regmap_write(dev->regmap[0], 0xd4, 0x55); mn88473_set_frontend() 145 ret = regmap_write(dev->regmap[1], 0x10, 0x10); mn88473_set_frontend() 146 ret = regmap_write(dev->regmap[1], 0x11, 0xab); mn88473_set_frontend() 147 ret = regmap_write(dev->regmap[1], 0x12, 0x0d); mn88473_set_frontend() 148 ret = regmap_write(dev->regmap[1], 0x13, 0xae); mn88473_set_frontend() 149 ret = regmap_write(dev->regmap[1], 0x14, 0x1d); mn88473_set_frontend() 150 ret = regmap_write(dev->regmap[1], 0x15, 0x9d); mn88473_set_frontend() 151 ret = regmap_write(dev->regmap[1], 0xbe, 0x08); mn88473_set_frontend() 152 ret = regmap_write(dev->regmap[2], 0x09, 0x08); mn88473_set_frontend() 153 ret = regmap_write(dev->regmap[2], 0x08, 0x1d); mn88473_set_frontend() 154 ret = regmap_write(dev->regmap[0], 0xb2, 0x37); mn88473_set_frontend() 155 ret = regmap_write(dev->regmap[0], 0xd7, 0x04); mn88473_set_frontend() 156 ret = regmap_write(dev->regmap[2], 0x32, 0x80); mn88473_set_frontend() 157 ret = regmap_write(dev->regmap[2], 0x36, 0x00); mn88473_set_frontend() 158 ret = regmap_write(dev->regmap[2], 0xf8, 0x9f); mn88473_set_frontend() 162 dev->delivery_system = c->delivery_system; mn88473_set_frontend() 166 dev_dbg(&client->dev, "failed=%d\n", ret); mn88473_set_frontend() 173 struct mn88473_dev dev = i2c_get_clientdata(client); mn88473_read_status() local 181 if (!dev->warm) { mn88473_read_status() 188 ret = regmap_read(dev->regmap[0], 0x62, &utmp); mn88473_read_status() 199 ret = regmap_read(dev->regmap[2], 0x8B, &utmp); mn88473_read_status() 212 ret = regmap_read(dev->regmap[1], 0x85, &utmp); mn88473_read_status() 216 ret = regmap_read(dev->regmap[1], 0x89, &utmp); mn88473_read_status() 234 dev_dbg(&client->dev, "failed=%d\n", ret); mn88473_read_status() 241 struct mn88473_dev dev = i2c_get_clientdata(client); mn88473_init() local 247 dev_dbg(&client->dev, "\n"); mn88473_init() 250 dev->warm = false; mn88473_init() 253 ret = regmap_read(dev->regmap[0], 0xf5, &tmp); mn88473_init() 258 dev_info(&client->dev, "firmware already running\n"); mn88473_init() 259 dev->warm = true; mn88473_init() 264 ret = request_firmware(&fw, fw_file, &client->dev); mn88473_init() 266 dev_err(&client->dev, "firmare file '%s' not found\n", fw_file); mn88473_init() 270 dev_info(&client->dev, "downloading firmware from file '%s'\n", mn88473_init() 273 ret = regmap_write(dev->regmap[0], 0xf5, 0x03); mn88473_init() 278 remaining -= (dev->i2c_wr_max - 1)) { mn88473_init() 280 if (len > (dev->i2c_wr_max - 1)) mn88473_init() 281 len = dev->i2c_wr_max - 1; mn88473_init() 283 ret = regmap_bulk_write(dev->regmap[0], 0xf6, mn88473_init() 286 dev_err(&client->dev, "firmware download failed=%d\n", mn88473_init() 293 ret = regmap_read(dev->regmap[0], 0xf8, &tmp); mn88473_init() 295 dev_err(&client->dev, mn88473_init() 300 dev_err(&client->dev, mn88473_init() 304 dev_err(&client->dev, "firmware parity check succeeded=0x%x\n", tmp); mn88473_init() 306 ret = regmap_write(dev->regmap[0], 0xf5, 0x00); mn88473_init() 314 dev->warm = true; mn88473_init() 321 dev_dbg(&client->dev, "failed=%d\n", ret); mn88473_init() 328 struct mn88473_dev dev = i2c_get_clientdata(client); mn88473_sleep() local 331 dev_dbg(&client->dev, "\n"); mn88473_sleep() 333 ret = regmap_write(dev->regmap[2], 0x05, 0x3e); mn88473_sleep() 337 dev->delivery_system = SYS_UNDEFINED; mn88473_sleep() 341 dev_dbg(&client->dev, "failed=%d\n", ret); mn88473_sleep() 385 struct mn88473_config config = client->dev.platform_data; mn88473_probe() 386 struct mn88473_dev dev; mn88473_probe() local 394 dev_dbg(&client->dev, "\n"); mn88473_probe() 398 dev_err(&client->dev, "frontend pointer not defined\n"); mn88473_probe() 403 dev = kzalloc(sizeof(dev), GFP_KERNEL); mn88473_probe() 404 if (dev == NULL) { mn88473_probe() 409 dev->i2c_wr_max = config->i2c_wr_max; mn88473_probe() 411 dev->xtal = 25000000; mn88473_probe() 413 dev->xtal = config->xtal; mn88473_probe() 414 dev->client[0] = client; mn88473_probe() 415 dev->regmap[0] = regmap_init_i2c(dev->client[0], &regmap_config); mn88473_probe() 416 if (IS_ERR(dev->regmap[0])) { mn88473_probe() 417 ret = PTR_ERR(dev->regmap[0]); mn88473_probe() 422 ret = regmap_read(dev->regmap[0], 0x00, &utmp); mn88473_probe() 431 dev->client[1] = i2c_new_dummy(client->adapter, 0x1a); mn88473_probe() 432 if (dev->client[1] == NULL) { mn88473_probe() 434 dev_err(&client->dev, "I2C registration failed\n"); mn88473_probe() 438 dev->regmap[1] = regmap_init_i2c(dev->client[1], &regmap_config); mn88473_probe() 439 if (IS_ERR(dev->regmap[1])) { mn88473_probe() 440 ret = PTR_ERR(dev->regmap[1]); mn88473_probe() 443 i2c_set_clientdata(dev->client[1], dev); mn88473_probe() 445 dev->client[2] = i2c_new_dummy(client->adapter, 0x1c); mn88473_probe() 446 if (dev->client[2] == NULL) { mn88473_probe() 448 dev_err(&client->dev, "2nd I2C registration failed\n"); mn88473_probe() 452 dev->regmap[2] = regmap_init_i2c(dev->client[2], &regmap_config); mn88473_probe() 453 if (IS_ERR(dev->regmap[2])) { mn88473_probe() 454 ret = PTR_ERR(dev->regmap[2]); mn88473_probe() 457 i2c_set_clientdata(dev->client[2], dev); mn88473_probe() 460 memcpy(&dev->fe.ops, &mn88473_ops, sizeof(struct dvb_frontend_ops)); mn88473_probe() 461 dev->fe.demodulator_priv = client; mn88473_probe() 462 config->fe = &dev->fe; mn88473_probe() 463 i2c_set_clientdata(client, dev); mn88473_probe() 465 dev_info(&dev->client[0]->dev, "Panasonic MN88473 successfully attached\n"); mn88473_probe() 469 i2c_unregister_device(dev->client[2]); mn88473_probe() 471 regmap_exit(dev->regmap[1]); mn88473_probe() 473 i2c_unregister_device(dev->client[1]); mn88473_probe() 475 regmap_exit(dev->regmap[0]); mn88473_probe() 477 kfree(dev); mn88473_probe() 479 dev_dbg(&client->dev, "failed=%d\n", ret); mn88473_probe() 485 struct mn88473_dev dev = i2c_get_clientdata(client); mn88473_remove() local 487 dev_dbg(&client->dev, "\n"); mn88473_remove() 489 regmap_exit(dev->regmap[2]); mn88473_remove() 490 i2c_unregister_device(dev->client[2]); mn88473_remove() 492 regmap_exit(dev->regmap[1]); mn88473_remove() 493 i2c_unregister_device(dev->client[1]); mn88473_remove() 495 regmap_exit(dev->regmap[0]); mn88473_remove() 497 kfree(dev); mn88473_remove()
/linux-4.1.27/drivers/net/ethernet/8390/
H A D	8390.c	8 int ei_open(struct net_device dev) ei_open() argument 10 return __ei_open(dev); ei_open() 14 int ei_close(struct net_device dev) ei_close() argument 16 return __ei_close(dev); ei_close() 20 netdev_tx_t ei_start_xmit(struct sk_buff skb, struct net_device dev) ei_start_xmit() argument 22 return __ei_start_xmit(skb, dev); ei_start_xmit() 26 struct net_device_stats ei_get_stats(struct net_device dev) ei_get_stats() argument 28 return __ei_get_stats(dev); ei_get_stats() 32 void ei_set_multicast_list(struct net_device dev) ei_set_multicast_list() argument 34 __ei_set_multicast_list(dev); ei_set_multicast_list() 38 void ei_tx_timeout(struct net_device dev) ei_tx_timeout() argument 40 __ei_tx_timeout(dev); ei_tx_timeout() 51 void ei_poll(struct net_device dev) ei_poll() argument 53 __ei_poll(dev); ei_poll() 76 struct net_device dev = ____alloc_ei_netdev(size); __alloc_ei_netdev() local 77 if (dev) __alloc_ei_netdev() 78 dev->netdev_ops = &ei_netdev_ops; __alloc_ei_netdev() 79 return dev; __alloc_ei_netdev() 83 void NS8390_init(struct net_device *dev, int startp) NS8390_init() argument 85 __NS8390_init(dev, startp); NS8390_init()
H A D	8390p.c	13 int eip_open(struct net_device dev) eip_open() argument 15 return __ei_open(dev); eip_open() 19 int eip_close(struct net_device dev) eip_close() argument 21 return __ei_close(dev); eip_close() 25 netdev_tx_t eip_start_xmit(struct sk_buff skb, struct net_device dev) eip_start_xmit() argument 27 return __ei_start_xmit(skb, dev); eip_start_xmit() 31 struct net_device_stats eip_get_stats(struct net_device dev) eip_get_stats() argument 33 return __ei_get_stats(dev); eip_get_stats() 37 void eip_set_multicast_list(struct net_device dev) eip_set_multicast_list() argument 39 __ei_set_multicast_list(dev); eip_set_multicast_list() 43 void eip_tx_timeout(struct net_device dev) eip_tx_timeout() argument 45 __ei_tx_timeout(dev); eip_tx_timeout() 56 void eip_poll(struct net_device dev) eip_poll() argument 58 __ei_poll(dev); eip_poll() 81 struct net_device dev = ____alloc_ei_netdev(size); __alloc_eip_netdev() local 82 if (dev) __alloc_eip_netdev() 83 dev->netdev_ops = &eip_netdev_ops; __alloc_eip_netdev() 84 return dev; __alloc_eip_netdev() 88 void NS8390p_init(struct net_device *dev, int startp) NS8390p_init() argument 90 __NS8390_init(dev, startp); NS8390p_init()
/linux-4.1.27/drivers/input/
H A D	input-polldev.c	25 static void input_polldev_queue_work(struct input_polled_dev dev) input_polldev_queue_work() argument 29 delay = msecs_to_jiffies(dev->poll_interval); input_polldev_queue_work() 33 queue_delayed_work(system_freezable_wq, &dev->work, delay); input_polldev_queue_work() 38 struct input_polled_dev dev = input_polled_device_work() local 41 dev->poll(dev); input_polled_device_work() 42 input_polldev_queue_work(dev); input_polled_device_work() 47 struct input_polled_dev dev = input_get_drvdata(input); input_open_polled_device() local 49 if (dev->open) input_open_polled_device() 50 dev->open(dev); input_open_polled_device() 53 if (dev->poll_interval > 0) { input_open_polled_device() 54 dev->poll(dev); input_open_polled_device() 55 input_polldev_queue_work(dev); input_open_polled_device() 63 struct input_polled_dev dev = input_get_drvdata(input); input_close_polled_device() local 65 cancel_delayed_work_sync(&dev->work); input_close_polled_device() 67 if (dev->close) input_close_polled_device() 68 dev->close(dev); input_close_polled_device() 73 static ssize_t input_polldev_get_poll(struct device dev, input_polldev_get_poll() argument 76 struct input_polled_dev polldev = dev_get_drvdata(dev); input_polldev_get_poll() 81 static ssize_t input_polldev_set_poll(struct device dev, input_polldev_set_poll() argument 85 struct input_polled_dev polldev = dev_get_drvdata(dev); input_polldev_set_poll() 119 static ssize_t input_polldev_get_max(struct device dev, input_polldev_get_max() argument 122 struct input_polled_dev polldev = dev_get_drvdata(dev); input_polldev_get_max() 129 static ssize_t input_polldev_get_min(struct device dev, input_polldev_get_min() argument 132 struct input_polled_dev polldev = dev_get_drvdata(dev); input_polldev_get_min() 163 struct input_polled_dev dev; input_allocate_polled_device() local 165 dev = kzalloc(sizeof(struct input_polled_dev), GFP_KERNEL); input_allocate_polled_device() 166 if (!dev) input_allocate_polled_device() 169 dev->input = input_allocate_device(); input_allocate_polled_device() 170 if (!dev->input) { input_allocate_polled_device() 171 kfree(dev); input_allocate_polled_device() 175 return dev; input_allocate_polled_device() 183 static int devm_input_polldev_match(struct device dev, void res, void data) devm_input_polldev_match() argument 190 static void devm_input_polldev_release(struct device dev, void res) devm_input_polldev_release() argument 195 dev_dbg(dev, "%s: dropping reference/freeing %s\n", devm_input_polldev_release() 196 __func__, dev_name(&polldev->input->dev)); devm_input_polldev_release() 202 static void devm_input_polldev_unregister(struct device dev, void res) devm_input_polldev_unregister() argument 207 dev_dbg(dev, "%s: unregistering device %s\n", devm_input_polldev_unregister() 208 __func__, dev_name(&polldev->input->dev)); devm_input_polldev_unregister() 220 * @dev: device owning the polled device being created 238 struct input_polled_dev devm_input_allocate_polled_device(struct device dev) devm_input_allocate_polled_device() argument 254 polldev->input->dev.parent = dev; devm_input_allocate_polled_device() 258 devres_add(dev, devres); devm_input_allocate_polled_device() 266 * @dev: device to free 271 void input_free_polled_device(struct input_polled_dev dev) input_free_polled_device() argument 273 if (dev) { input_free_polled_device() 274 if (dev->devres_managed) input_free_polled_device() 275 WARN_ON(devres_destroy(dev->input->dev.parent, input_free_polled_device() 278 dev)); input_free_polled_device() 279 input_put_device(dev->input); input_free_polled_device() 280 kfree(dev); input_free_polled_device() 287 @dev: device to register 295 int input_register_polled_device(struct input_polled_dev dev) input_register_polled_device() argument 298 struct input_dev input = dev->input; input_register_polled_device() 301 if (dev->devres_managed) { input_register_polled_device() 307 devres->polldev = dev; input_register_polled_device() 310 input_set_drvdata(input, dev); input_register_polled_device() 311 INIT_DELAYED_WORK(&dev->work, input_polled_device_work); input_register_polled_device() 313 if (!dev->poll_interval) input_register_polled_device() 314 dev->poll_interval = 500; input_register_polled_device() 315 if (!dev->poll_interval_max) input_register_polled_device() 316 dev->poll_interval_max = dev->poll_interval; input_register_polled_device() 321 input->dev.groups = input_polldev_attribute_groups; input_register_polled_device() 338 if (dev->devres_managed) { input_register_polled_device() 339 dev_dbg(input->dev.parent, "%s: registering %s with devres.\n", input_register_polled_device() 340 __func__, dev_name(&input->dev)); input_register_polled_device() 341 devres_add(input->dev.parent, devres); input_register_polled_device() 350 * @dev: device to unregister 356 void input_unregister_polled_device(struct input_polled_dev *dev) input_unregister_polled_device() argument 358 if (dev->devres_managed) input_unregister_polled_device() 359 WARN_ON(devres_destroy(dev->input->dev.parent, input_unregister_polled_device() 362 dev)); input_unregister_polled_device() 364 input_unregister_device(dev->input); input_unregister_polled_device()
/linux-4.1.27/drivers/gpu/drm/omapdrm/
H A D	omap_irq.c	31 static void omap_irq_update(struct drm_device dev) omap_irq_update() argument 33 struct omap_drm_private priv = dev->dev_private; omap_irq_update() 48 void __omap_irq_register(struct drm_device dev, struct omap_drm_irq irq) __omap_irq_register() argument 50 struct omap_drm_private priv = dev->dev_private; __omap_irq_register() 58 omap_irq_update(dev); __omap_irq_register() 64 void omap_irq_register(struct drm_device dev, struct omap_drm_irq irq) omap_irq_register() argument 68 __omap_irq_register(dev, irq); omap_irq_register() 73 void __omap_irq_unregister(struct drm_device dev, struct omap_drm_irq irq) __omap_irq_unregister() argument 82 omap_irq_update(dev); __omap_irq_unregister() 88 void omap_irq_unregister(struct drm_device dev, struct omap_drm_irq irq) omap_irq_unregister() argument 92 __omap_irq_unregister(dev, irq); omap_irq_unregister() 112 struct omap_irq_wait omap_irq_wait_init(struct drm_device dev, omap_irq_wait_init() argument 119 omap_irq_register(dev, &wait->irq); omap_irq_wait_init() 123 int omap_irq_wait(struct drm_device dev, struct omap_irq_wait wait, omap_irq_wait() argument 127 omap_irq_unregister(dev, &wait->irq); omap_irq_wait() 136 @dev: DRM device 147 int omap_irq_enable_vblank(struct drm_device dev, int crtc_id) omap_irq_enable_vblank() argument 149 struct omap_drm_private priv = dev->dev_private; omap_irq_enable_vblank() 153 DBG("dev=%p, crtc=%d", dev, crtc_id); omap_irq_enable_vblank() 158 omap_irq_update(dev); omap_irq_enable_vblank() 167 * @dev: DRM device 174 void omap_irq_disable_vblank(struct drm_device dev, int crtc_id) omap_irq_disable_vblank() argument 176 struct omap_drm_private priv = dev->dev_private; omap_irq_disable_vblank() 180 DBG("dev=%p, crtc=%d", dev, crtc_id); omap_irq_disable_vblank() 185 omap_irq_update(dev); omap_irq_disable_vblank() 192 struct drm_device dev = (struct drm_device ) arg; omap_irq_handler() local 193 struct omap_drm_private priv = dev->dev_private; omap_irq_handler() 209 drm_handle_vblank(dev, id); omap_irq_handler() 225 void omap_irq_preinstall(struct drm_device dev) omap_irq_preinstall() argument 227 DBG("dev=%p", dev); omap_irq_preinstall() 233 int omap_irq_postinstall(struct drm_device dev) omap_irq_postinstall() argument 235 struct omap_drm_private priv = dev->dev_private; omap_irq_postinstall() 238 DBG("dev=%p", dev); omap_irq_postinstall() 250 omap_irq_register(dev, error_handler); omap_irq_postinstall() 255 void omap_irq_uninstall(struct drm_device dev) omap_irq_uninstall() argument 257 DBG("dev=%p", dev); omap_irq_uninstall() 268 int omap_drm_irq_install(struct drm_device dev) omap_drm_irq_install() argument 272 mutex_lock(&dev->struct_mutex); omap_drm_irq_install() 274 if (dev->irq_enabled) { omap_drm_irq_install() 275 mutex_unlock(&dev->struct_mutex); omap_drm_irq_install() 278 dev->irq_enabled = true; omap_drm_irq_install() 279 mutex_unlock(&dev->struct_mutex); omap_drm_irq_install() 282 if (dev->driver->irq_preinstall) omap_drm_irq_install() 283 dev->driver->irq_preinstall(dev); omap_drm_irq_install() 285 ret = dispc_request_irq(dev->driver->irq_handler, dev); omap_drm_irq_install() 288 mutex_lock(&dev->struct_mutex); omap_drm_irq_install() 289 dev->irq_enabled = false; omap_drm_irq_install() 290 mutex_unlock(&dev->struct_mutex); omap_drm_irq_install() 295 if (dev->driver->irq_postinstall) omap_drm_irq_install() 296 ret = dev->driver->irq_postinstall(dev); omap_drm_irq_install() 299 mutex_lock(&dev->struct_mutex); omap_drm_irq_install() 300 dev->irq_enabled = false; omap_drm_irq_install() 301 mutex_unlock(&dev->struct_mutex); omap_drm_irq_install() 302 dispc_free_irq(dev); omap_drm_irq_install() 308 int omap_drm_irq_uninstall(struct drm_device *dev) omap_drm_irq_uninstall() argument 314 mutex_lock(&dev->struct_mutex); omap_drm_irq_uninstall() 315 irq_enabled = dev->irq_enabled; omap_drm_irq_uninstall() 316 dev->irq_enabled = false; omap_drm_irq_uninstall() 317 mutex_unlock(&dev->struct_mutex); omap_drm_irq_uninstall() 322 if (dev->num_crtcs) { omap_drm_irq_uninstall() 323 spin_lock_irqsave(&dev->vbl_lock, irqflags); omap_drm_irq_uninstall() 324 for (i = 0; i < dev->num_crtcs; i++) { omap_drm_irq_uninstall() 325 wake_up(&dev->vblank[i].queue); omap_drm_irq_uninstall() 326 dev->vblank[i].enabled = false; omap_drm_irq_uninstall() 327 dev->vblank[i].last = omap_drm_irq_uninstall() 328 dev->driver->get_vblank_counter(dev, i); omap_drm_irq_uninstall() 330 spin_unlock_irqrestore(&dev->vbl_lock, irqflags); omap_drm_irq_uninstall() 336 if (dev->driver->irq_uninstall) omap_drm_irq_uninstall() 337 dev->driver->irq_uninstall(dev); omap_drm_irq_uninstall() 339 dispc_free_irq(dev); omap_drm_irq_uninstall()
/linux-4.1.27/include/trace/events/
H A D	rpm.h	19 TP_PROTO(struct device dev, int flags), 21 TP_ARGS(dev, flags), 24 __string( name, dev_name(dev) ) 35 __assign_str(name, dev_name(dev)); 38 &dev->power.usage_count); 39 __entry->disable_depth = dev->power.disable_depth; 40 __entry->runtime_auto = dev->power.runtime_auto; 41 __entry->request_pending = dev->power.request_pending; 42 __entry->irq_safe = dev->power.irq_safe; 44 &dev->power.child_count); 60 TP_PROTO(struct device dev, int flags), 62 TP_ARGS(dev, flags) 66 TP_PROTO(struct device dev, int flags), 68 TP_ARGS(dev, flags) 72 TP_PROTO(struct device dev, int flags), 74 TP_ARGS(dev, flags) 78 TP_PROTO(struct device *dev, unsigned long ip, int ret), 79 TP_ARGS(dev, ip, ret), 82 __string( name, dev_name(dev)) 88 __assign_str(name, dev_name(dev));
H A D	jbd.h	17 __field( dev_t, dev ) 22 __entry->dev = journal->j_fs_dev->bd_dev; 26 TP_printk("dev %d,%d result %d", 27 MAJOR(__entry->dev), MINOR(__entry->dev), 38 __field( dev_t, dev ) 43 __entry->dev = journal->j_fs_dev->bd_dev; 47 TP_printk("dev %d,%d transaction %d", 48 MAJOR(__entry->dev), MINOR(__entry->dev), 87 __field( dev_t, dev ) 92 __entry->dev = journal->j_fs_dev->bd_dev; 96 TP_printk("dev %d,%d transaction %d", 97 MAJOR(__entry->dev), MINOR(__entry->dev), 107 __field( dev_t, dev ) 113 __entry->dev = journal->j_fs_dev->bd_dev; 118 TP_printk("dev %d,%d transaction %d head %d", 119 MAJOR(__entry->dev), MINOR(__entry->dev), 129 __field( dev_t, dev ) 134 __entry->dev = journal->j_fs_dev->bd_dev; 138 TP_printk("dev %d,%d transaction %d", 139 MAJOR(__entry->dev), MINOR(__entry->dev), 151 __field( dev_t, dev ) 159 __entry->dev = journal->j_fs_dev->bd_dev; 166 TP_printk("dev %d,%d from %u to %u offset %lu freed %lu", 167 MAJOR(__entry->dev), MINOR(__entry->dev), 178 __field( dev_t, dev ) 183 __entry->dev = journal->j_fs_dev->bd_dev; 187 TP_printk("dev %d,%d write_op %x", MAJOR(__entry->dev), 188 MINOR(__entry->dev), __entry->write_op)
H A D	jbd2.h	20 __field( dev_t, dev ) 25 __entry->dev = journal->j_fs_dev->bd_dev; 29 TP_printk("dev %d,%d result %d", 30 MAJOR(__entry->dev), MINOR(__entry->dev), __entry->result) 40 __field( dev_t, dev ) 46 __entry->dev = journal->j_fs_dev->bd_dev; 51 TP_printk("dev %d,%d transaction %d sync %d", 52 MAJOR(__entry->dev), MINOR(__entry->dev), 97 __field( dev_t, dev ) 104 __entry->dev = journal->j_fs_dev->bd_dev; 110 TP_printk("dev %d,%d transaction %d sync %d head %d", 111 MAJOR(__entry->dev), MINOR(__entry->dev), 121 __field( dev_t, dev ) 126 __entry->dev = inode->i_sb->s_dev; 130 TP_printk("dev %d,%d ino %lu", 131 MAJOR(__entry->dev), MINOR(__entry->dev), 136 TP_PROTO(dev_t dev, unsigned long tid, unsigned int type, 139 TP_ARGS(dev, tid, type, line_no, requested_blocks), 142 __field( dev_t, dev ) 150 __entry->dev = dev; 157 TP_printk("dev %d,%d tid %lu type %u line_no %u " 159 MAJOR(__entry->dev), MINOR(__entry->dev), __entry->tid, 164 TP_PROTO(dev_t dev, unsigned long tid, unsigned int type, 168 TP_ARGS(dev, tid, type, line_no, buffer_credits, requested_blocks), 171 __field( dev_t, dev ) 180 __entry->dev = dev; 188 TP_printk("dev %d,%d tid %lu type %u line_no %u " 190 MAJOR(__entry->dev), MINOR(__entry->dev), __entry->tid, 196 TP_PROTO(dev_t dev, unsigned long tid, unsigned int type, 200 TP_ARGS(dev, tid, type, line_no, interval, sync, 204 __field( dev_t, dev ) 215 __entry->dev = dev; 225 TP_printk("dev %d,%d tid %lu type %u line_no %u interval %d " 227 MAJOR(__entry->dev), MINOR(__entry->dev), __entry->tid, 234 TP_PROTO(dev_t dev, unsigned long tid, 237 TP_ARGS(dev, tid, stats), 240 __field( dev_t, dev ) 254 __entry->dev = dev; 267 TP_printk("dev %d,%d tid %lu wait %u request_delay %u running %u " 270 MAJOR(__entry->dev), MINOR(__entry->dev), __entry->tid, 282 TP_PROTO(dev_t dev, unsigned long tid, 285 TP_ARGS(dev, tid, stats), 288 __field( dev_t, dev ) 297 __entry->dev = dev; 305 TP_printk("dev %d,%d tid %lu chp_time %u forced_to_close %u " 307 MAJOR(__entry->dev), MINOR(__entry->dev), __entry->tid, 320 __field( dev_t, dev ) 328 __entry->dev = journal->j_fs_dev->bd_dev; 335 TP_printk("dev %d,%d from %u to %u offset %lu freed %lu", 336 MAJOR(__entry->dev), MINOR(__entry->dev), 348 __field( dev_t, dev ) 353 __entry->dev = journal->j_fs_dev->bd_dev; 357 TP_printk("dev %d,%d write_op %x", MAJOR(__entry->dev), 358 MINOR(__entry->dev), __entry->write_op) 363 TP_PROTO(dev_t dev, unsigned long stall_ms), 365 TP_ARGS(dev, stall_ms), 368 __field( dev_t, dev ) 373 __entry->dev = dev; 377 TP_printk("dev %d,%d stall_ms %lu", 378 MAJOR(__entry->dev), MINOR(__entry->dev),
H A D	iommu.h	20 TP_PROTO(int group_id, struct device dev), 22 TP_ARGS(group_id, dev), 26 __string(device, dev_name(dev)) 31 __assign_str(device, dev_name(dev)); 41 TP_PROTO(int group_id, struct device dev), 43 TP_ARGS(group_id, dev) 49 TP_PROTO(int group_id, struct device dev), 51 TP_ARGS(group_id, dev) 56 TP_PROTO(struct device dev), 58 TP_ARGS(dev), 61 __string(device, dev_name(dev)) 65 __assign_str(device, dev_name(dev)); 74 TP_PROTO(struct device dev), 76 TP_ARGS(dev) 81 TP_PROTO(struct device dev), 83 TP_ARGS(dev) 134 TP_PROTO(struct device dev, unsigned long iova, int flags), 136 TP_ARGS(dev, iova, flags), 139 __string(device, dev_name(dev)) 140 __string(driver, dev_driver_string(dev)) 146 __assign_str(device, dev_name(dev)); 147 __assign_str(driver, dev_driver_string(dev)); 160 TP_PROTO(struct device dev, unsigned long iova, int flags), 162 TP_ARGS(dev, iova, flags)
/linux-4.1.27/drivers/gpu/drm/atmel-hlcdc/
H A D	atmel_hlcdc_dc.c	174 struct drm_device dev = data; atmel_hlcdc_dc_irq_handler() local 175 struct atmel_hlcdc_dc dc = dev->dev_private; atmel_hlcdc_dc_irq_handler() 201 static struct drm_framebuffer atmel_hlcdc_fb_create(struct drm_device dev, atmel_hlcdc_fb_create() argument 204 return drm_fb_cma_create(dev, file_priv, mode_cmd); atmel_hlcdc_fb_create() 207 static void atmel_hlcdc_fb_output_poll_changed(struct drm_device dev) atmel_hlcdc_fb_output_poll_changed() argument 209 struct atmel_hlcdc_dc dc = dev->dev_private; atmel_hlcdc_fb_output_poll_changed() 214 dc->fbdev = drm_fbdev_cma_init(dev, 24, atmel_hlcdc_fb_output_poll_changed() 215 dev->mode_config.num_crtc, atmel_hlcdc_fb_output_poll_changed() 216 dev->mode_config.num_connector); atmel_hlcdc_fb_output_poll_changed() 229 static int atmel_hlcdc_dc_modeset_init(struct drm_device dev) atmel_hlcdc_dc_modeset_init() argument 231 struct atmel_hlcdc_dc dc = dev->dev_private; atmel_hlcdc_dc_modeset_init() 236 drm_mode_config_init(dev); atmel_hlcdc_dc_modeset_init() 238 ret = atmel_hlcdc_create_outputs(dev); atmel_hlcdc_dc_modeset_init() 240 dev_err(dev->dev, "failed to create panel: %d\n", ret); atmel_hlcdc_dc_modeset_init() 244 planes = atmel_hlcdc_create_planes(dev); atmel_hlcdc_dc_modeset_init() 246 dev_err(dev->dev, "failed to create planes\n"); atmel_hlcdc_dc_modeset_init() 263 ret = atmel_hlcdc_crtc_create(dev); atmel_hlcdc_dc_modeset_init() 265 dev_err(dev->dev, "failed to create crtc\n"); atmel_hlcdc_dc_modeset_init() 269 dev->mode_config.min_width = dc->desc->min_width; atmel_hlcdc_dc_modeset_init() 270 dev->mode_config.min_height = dc->desc->min_height; atmel_hlcdc_dc_modeset_init() 271 dev->mode_config.max_width = dc->desc->max_width; atmel_hlcdc_dc_modeset_init() 272 dev->mode_config.max_height = dc->desc->max_height; atmel_hlcdc_dc_modeset_init() 273 dev->mode_config.funcs = &mode_config_funcs; atmel_hlcdc_dc_modeset_init() 278 static int atmel_hlcdc_dc_load(struct drm_device dev) atmel_hlcdc_dc_load() argument 280 struct platform_device pdev = to_platform_device(dev->dev); atmel_hlcdc_dc_load() 285 match = of_match_node(atmel_hlcdc_of_match, dev->dev->parent->of_node); atmel_hlcdc_dc_load() 287 dev_err(&pdev->dev, "invalid compatible string\n"); atmel_hlcdc_dc_load() 292 dev_err(&pdev->dev, "invalid hlcdc description\n"); atmel_hlcdc_dc_load() 296 dc = devm_kzalloc(dev->dev, sizeof(dc), GFP_KERNEL); atmel_hlcdc_dc_load() 305 dc->hlcdc = dev_get_drvdata(dev->dev->parent); atmel_hlcdc_dc_load() 306 dev->dev_private = dc; atmel_hlcdc_dc_load() 310 dev_err(dev->dev, "failed to enable periph_clk\n"); atmel_hlcdc_dc_load() 314 pm_runtime_enable(dev->dev); atmel_hlcdc_dc_load() 316 ret = atmel_hlcdc_dc_modeset_init(dev); atmel_hlcdc_dc_load() 318 dev_err(dev->dev, "failed to initialize mode setting\n"); atmel_hlcdc_dc_load() 322 drm_mode_config_reset(dev); atmel_hlcdc_dc_load() 324 ret = drm_vblank_init(dev, 1); atmel_hlcdc_dc_load() 326 dev_err(dev->dev, "failed to initialize vblank\n"); atmel_hlcdc_dc_load() 330 pm_runtime_get_sync(dev->dev); atmel_hlcdc_dc_load() 331 ret = drm_irq_install(dev, dc->hlcdc->irq); atmel_hlcdc_dc_load() 332 pm_runtime_put_sync(dev->dev); atmel_hlcdc_dc_load() 334 dev_err(dev->dev, "failed to install IRQ handler\n"); atmel_hlcdc_dc_load() 338 platform_set_drvdata(pdev, dev); atmel_hlcdc_dc_load() 340 drm_kms_helper_poll_init(dev); atmel_hlcdc_dc_load() 343 drm_helper_hpd_irq_event(dev); atmel_hlcdc_dc_load() 348 pm_runtime_disable(dev->dev); atmel_hlcdc_dc_load() 357 static void atmel_hlcdc_dc_unload(struct drm_device dev) atmel_hlcdc_dc_unload() argument 359 struct atmel_hlcdc_dc dc = dev->dev_private; atmel_hlcdc_dc_unload() 364 drm_kms_helper_poll_fini(dev); atmel_hlcdc_dc_unload() 365 drm_mode_config_cleanup(dev); atmel_hlcdc_dc_unload() 366 drm_vblank_cleanup(dev); atmel_hlcdc_dc_unload() 368 pm_runtime_get_sync(dev->dev); atmel_hlcdc_dc_unload() 369 drm_irq_uninstall(dev); atmel_hlcdc_dc_unload() 370 pm_runtime_put_sync(dev->dev); atmel_hlcdc_dc_unload() 372 dev->dev_private = NULL; atmel_hlcdc_dc_unload() 374 pm_runtime_disable(dev->dev); atmel_hlcdc_dc_unload() 379 static int atmel_hlcdc_dc_connector_plug_all(struct drm_device dev) atmel_hlcdc_dc_connector_plug_all() argument 384 mutex_lock(&dev->mode_config.mutex); atmel_hlcdc_dc_connector_plug_all() 385 list_for_each_entry(connector, &dev->mode_config.connector_list, head) { atmel_hlcdc_dc_connector_plug_all() 392 mutex_unlock(&dev->mode_config.mutex); atmel_hlcdc_dc_connector_plug_all() 396 list_for_each_entry(connector, &dev->mode_config.connector_list, head) { atmel_hlcdc_dc_connector_plug_all() 402 mutex_unlock(&dev->mode_config.mutex); atmel_hlcdc_dc_connector_plug_all() 407 static void atmel_hlcdc_dc_connector_unplug_all(struct drm_device dev) atmel_hlcdc_dc_connector_unplug_all() argument 409 mutex_lock(&dev->mode_config.mutex); atmel_hlcdc_dc_connector_unplug_all() 410 drm_connector_unplug_all(dev); atmel_hlcdc_dc_connector_unplug_all() 411 mutex_unlock(&dev->mode_config.mutex); atmel_hlcdc_dc_connector_unplug_all() 414 static void atmel_hlcdc_dc_preclose(struct drm_device dev, atmel_hlcdc_dc_preclose() argument 419 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) atmel_hlcdc_dc_preclose() 423 static void atmel_hlcdc_dc_lastclose(struct drm_device dev) atmel_hlcdc_dc_lastclose() argument 425 struct atmel_hlcdc_dc dc = dev->dev_private; atmel_hlcdc_dc_lastclose() 430 static int atmel_hlcdc_dc_irq_postinstall(struct drm_device dev) atmel_hlcdc_dc_irq_postinstall() argument 432 struct atmel_hlcdc_dc dc = dev->dev_private; atmel_hlcdc_dc_irq_postinstall() 447 static void atmel_hlcdc_dc_irq_uninstall(struct drm_device dev) atmel_hlcdc_dc_irq_uninstall() argument 449 struct atmel_hlcdc_dc dc = dev->dev_private; atmel_hlcdc_dc_irq_uninstall() 456 static int atmel_hlcdc_dc_enable_vblank(struct drm_device dev, int crtc) atmel_hlcdc_dc_enable_vblank() argument 458 struct atmel_hlcdc_dc dc = dev->dev_private; atmel_hlcdc_dc_enable_vblank() 466 static void atmel_hlcdc_dc_disable_vblank(struct drm_device dev, int crtc) atmel_hlcdc_dc_disable_vblank() argument 468 struct atmel_hlcdc_dc dc = dev->dev_private; atmel_hlcdc_dc_disable_vblank() 516 ddev = drm_dev_alloc(&atmel_hlcdc_dc_driver, &pdev->dev); atmel_hlcdc_dc_drm_probe() 520 ret = drm_dev_set_unique(ddev, dev_name(ddev->dev)); atmel_hlcdc_dc_drm_probe() 563 static int atmel_hlcdc_dc_drm_suspend(struct device dev) atmel_hlcdc_dc_drm_suspend() argument 565 struct drm_device drm_dev = dev_get_drvdata(dev); atmel_hlcdc_dc_drm_suspend() 568 if (pm_runtime_suspended(dev)) atmel_hlcdc_dc_drm_suspend() 578 static int atmel_hlcdc_dc_drm_resume(struct device dev) atmel_hlcdc_dc_drm_resume() argument 580 struct drm_device drm_dev = dev_get_drvdata(dev); atmel_hlcdc_dc_drm_resume() 583 if (pm_runtime_suspended(dev)) atmel_hlcdc_dc_drm_resume()
/linux-4.1.27/drivers/input/mouse/
H A D	amimouse.c	40 struct input_dev dev = data; amimouse_interrupt() local 62 input_report_rel(dev, REL_X, dx); amimouse_interrupt() 63 input_report_rel(dev, REL_Y, dy); amimouse_interrupt() 65 input_report_key(dev, BTN_LEFT, ciaa.pra & 0x40); amimouse_interrupt() 66 input_report_key(dev, BTN_MIDDLE, potgor & 0x0100); amimouse_interrupt() 67 input_report_key(dev, BTN_RIGHT, potgor & 0x0400); amimouse_interrupt() 69 input_sync(dev); amimouse_interrupt() 74 static int amimouse_open(struct input_dev dev) amimouse_open() argument 85 dev); amimouse_open() 87 dev_err(&dev->dev, "Can't allocate irq %d\n", IRQ_AMIGA_VERTB); amimouse_open() 92 static void amimouse_close(struct input_dev dev) amimouse_close() argument 94 free_irq(IRQ_AMIGA_VERTB, dev); amimouse_close() 100 struct input_dev dev; amimouse_probe() local 102 dev = input_allocate_device(); amimouse_probe() 103 if (!dev) amimouse_probe() 106 dev->name = pdev->name; amimouse_probe() 107 dev->phys = "amimouse/input0"; amimouse_probe() 108 dev->id.bustype = BUS_AMIGA; amimouse_probe() 109 dev->id.vendor = 0x0001; amimouse_probe() 110 dev->id.product = 0x0002; amimouse_probe() 111 dev->id.version = 0x0100; amimouse_probe() 113 dev->evbit[0] = BIT_MASK(EV_KEY) \| BIT_MASK(EV_REL); amimouse_probe() 114 dev->relbit[0] = BIT_MASK(REL_X) \| BIT_MASK(REL_Y); amimouse_probe() 115 dev->keybit[BIT_WORD(BTN_LEFT)] = BIT_MASK(BTN_LEFT) \| amimouse_probe() 117 dev->open = amimouse_open; amimouse_probe() 118 dev->close = amimouse_close; amimouse_probe() 119 dev->dev.parent = &pdev->dev; amimouse_probe() 121 err = input_register_device(dev); amimouse_probe() 123 input_free_device(dev); amimouse_probe() 127 platform_set_drvdata(pdev, dev); amimouse_probe() 134 struct input_dev *dev = platform_get_drvdata(pdev); amimouse_remove() local 136 input_unregister_device(dev); amimouse_remove()
H A D	appletouch.c	215 struct input_dev input; / input dev / 274 static int atp_geyser_init(struct atp dev) atp_geyser_init() argument 276 struct usb_device udev = dev->udev; atp_geyser_init() 284 dev_err(&dev->intf->dev, "Out of memory\n"); atp_geyser_init() 299 dev_err(&dev->intf->dev, "Failed to read mode from device.\n"); atp_geyser_init() 318 dev_err(&dev->intf->dev, "Failed to request geyser raw mode\n"); atp_geyser_init() 334 struct atp dev = container_of(work, struct atp, work); atp_reinit() local 338 atp_geyser_init(dev); atp_reinit() 340 retval = usb_submit_urb(dev->urb, GFP_ATOMIC); atp_reinit() 342 dev_err(&dev->intf->dev, atp_reinit() 347 static int atp_calculate_abs(struct atp dev, int offset, int nb_sensors, atp_calculate_abs() argument 353 Use offset to point xy_sensors at the first value in dev->xy_acc atp_calculate_abs() 356 int xy_sensors = dev->xy_acc + offset; atp_calculate_abs() 405 memset(dev->smooth, 0, 4 sizeof(dev->smooth[0])); atp_calculate_abs() 408 dev->smooth[i + 4] = xy_sensors[i] << ATP_SCALE; atp_calculate_abs() 409 memset(&dev->smooth[nb_sensors + 4], 0, 4 * sizeof(dev->smooth[0])); atp_calculate_abs() 413 dev->smooth_tmp[0] = (dev->smooth[0] + dev->smooth[1]) / 2; atp_calculate_abs() 417 dev->smooth_tmp[i] = (dev->smooth[i - 1] + atp_calculate_abs() 418 dev->smooth[i] * 2 + atp_calculate_abs() 419 dev->smooth[i + 1]) / 4; atp_calculate_abs() 422 dev->smooth_tmp[i] = (dev->smooth[i - 1] + dev->smooth[i]) / 2; atp_calculate_abs() 424 memcpy(dev->smooth, dev->smooth_tmp, sizeof(dev->smooth)); atp_calculate_abs() 432 if ((dev->smooth[i] >> ATP_SCALE) > 0) { atp_calculate_abs() 433 pcum += dev->smooth[i] * i; atp_calculate_abs() 434 psum += dev->smooth[i]; atp_calculate_abs() 461 struct atp dev = urb->context; atp_status_check() local 462 struct usb_interface intf = dev->intf; atp_status_check() 469 if (!dev->overflow_warned) { atp_status_check() 470 dev_warn(&intf->dev, atp_status_check() 472 dev->info->datalen, dev->urb->actual_length); atp_status_check() 473 dev->overflow_warned = true; atp_status_check() 479 dev_dbg(&intf->dev, atp_status_check() 485 dev_dbg(&intf->dev, atp_status_check() 492 if (dev->urb->actual_length != dev->info->datalen) { atp_status_check() 495 dev->data[0], dev->urb->actual_length); atp_status_check() 502 static void atp_detect_size(struct atp dev) atp_detect_size() argument 507 for (i = dev->info->xsensors; i < ATP_XSENSORS; i++) { atp_detect_size() 508 if (dev->xy_cur[i]) { atp_detect_size() 510 dev_info(&dev->intf->dev, atp_detect_size() 513 input_set_abs_params(dev->input, ABS_X, 0, atp_detect_size() 514 (dev->info->xsensors_17 - 1) atp_detect_size() 515 dev->info->xfact - 1, atp_detect_size() 516 dev->info->fuzz, 0); atp_detect_size() 533 struct atp dev = urb->context; atp_complete_geyser_1_2() local 542 if (dev->info == &geyser2_info) { atp_complete_geyser_1_2() 543 memset(dev->xy_cur, 0, sizeof(dev->xy_cur)); atp_complete_geyser_1_2() 553 dev->xy_cur[i] = dev->data[j]; atp_complete_geyser_1_2() 554 dev->xy_cur[i + 1] = dev->data[j + 1]; atp_complete_geyser_1_2() 559 dev->xy_cur[ATP_XSENSORS + i] = dev->data[j]; atp_complete_geyser_1_2() 560 dev->xy_cur[ATP_XSENSORS + i + 1] = dev->data[j + 1]; atp_complete_geyser_1_2() 565 dev->xy_cur[i + 0] = dev->data[5 i + 2]; atp_complete_geyser_1_2() 566 dev->xy_cur[i + 8] = dev->data[5 * i + 4]; atp_complete_geyser_1_2() 567 dev->xy_cur[i + 16] = dev->data[5 * i + 42]; atp_complete_geyser_1_2() 569 dev->xy_cur[i + 24] = dev->data[5 * i + 44]; atp_complete_geyser_1_2() 572 dev->xy_cur[ATP_XSENSORS + i] = dev->data[5 * i + 1]; atp_complete_geyser_1_2() 573 dev->xy_cur[ATP_XSENSORS + i + 8] = dev->data[5 * i + 3]; atp_complete_geyser_1_2() 577 dbg_dump("sample", dev->xy_cur); atp_complete_geyser_1_2() 579 if (!dev->valid) { atp_complete_geyser_1_2() 581 dev->valid = true; atp_complete_geyser_1_2() 582 dev->x_old = dev->y_old = -1; atp_complete_geyser_1_2() 585 memcpy(dev->xy_old, dev->xy_cur, sizeof(dev->xy_old)); atp_complete_geyser_1_2() 588 if (unlikely(!dev->size_detect_done)) { atp_complete_geyser_1_2() 589 atp_detect_size(dev); atp_complete_geyser_1_2() 590 dev->size_detect_done = 1; atp_complete_geyser_1_2() 597 signed char change = dev->xy_old[i] - dev->xy_cur[i]; atp_complete_geyser_1_2() 598 dev->xy_acc[i] -= change; atp_complete_geyser_1_2() 601 if (dev->xy_acc[i] < 0) atp_complete_geyser_1_2() 602 dev->xy_acc[i] = 0; atp_complete_geyser_1_2() 605 memcpy(dev->xy_old, dev->xy_cur, sizeof(dev->xy_old)); atp_complete_geyser_1_2() 607 dbg_dump("accumulator", dev->xy_acc); atp_complete_geyser_1_2() 609 x = atp_calculate_abs(dev, 0, ATP_XSENSORS, atp_complete_geyser_1_2() 610 dev->info->xfact, &x_z, &x_f); atp_complete_geyser_1_2() 611 y = atp_calculate_abs(dev, ATP_XSENSORS, ATP_YSENSORS, atp_complete_geyser_1_2() 612 dev->info->yfact, &y_z, &y_f); atp_complete_geyser_1_2() 613 key = dev->data[dev->info->datalen - 1] & ATP_STATUS_BUTTON; atp_complete_geyser_1_2() 617 if (x && y && fingers == dev->fingers_old) { atp_complete_geyser_1_2() 618 if (dev->x_old != -1) { atp_complete_geyser_1_2() 619 x = (dev->x_old * 7 + x) >> 3; atp_complete_geyser_1_2() 620 y = (dev->y_old * 7 + y) >> 3; atp_complete_geyser_1_2() 621 dev->x_old = x; atp_complete_geyser_1_2() 622 dev->y_old = y; atp_complete_geyser_1_2() 629 input_report_key(dev->input, BTN_TOUCH, 1); atp_complete_geyser_1_2() 630 input_report_abs(dev->input, ABS_X, x); atp_complete_geyser_1_2() 631 input_report_abs(dev->input, ABS_Y, y); atp_complete_geyser_1_2() 632 input_report_abs(dev->input, ABS_PRESSURE, atp_complete_geyser_1_2() 634 atp_report_fingers(dev->input, fingers); atp_complete_geyser_1_2() 636 dev->x_old = x; atp_complete_geyser_1_2() 637 dev->y_old = y; atp_complete_geyser_1_2() 641 dev->x_old = dev->y_old = -1; atp_complete_geyser_1_2() 642 dev->fingers_old = 0; atp_complete_geyser_1_2() 643 input_report_key(dev->input, BTN_TOUCH, 0); atp_complete_geyser_1_2() 644 input_report_abs(dev->input, ABS_PRESSURE, 0); atp_complete_geyser_1_2() 645 atp_report_fingers(dev->input, 0); atp_complete_geyser_1_2() 648 memset(dev->xy_acc, 0, sizeof(dev->xy_acc)); atp_complete_geyser_1_2() 651 if (fingers != dev->fingers_old) atp_complete_geyser_1_2() 652 dev->x_old = dev->y_old = -1; atp_complete_geyser_1_2() 653 dev->fingers_old = fingers; atp_complete_geyser_1_2() 655 input_report_key(dev->input, BTN_LEFT, key); atp_complete_geyser_1_2() 656 input_sync(dev->input); atp_complete_geyser_1_2() 659 retval = usb_submit_urb(dev->urb, GFP_ATOMIC); atp_complete_geyser_1_2() 661 dev_err(&dev->intf->dev, atp_complete_geyser_1_2() 673 struct atp dev = urb->context; atp_complete_geyser_3_4() local 690 dev->xy_cur[i] = dev->data[j + 1]; atp_complete_geyser_3_4() 691 dev->xy_cur[i + 1] = dev->data[j + 2]; atp_complete_geyser_3_4() 695 dev->xy_cur[ATP_XSENSORS + i] = dev->data[j + 1]; atp_complete_geyser_3_4() 696 dev->xy_cur[ATP_XSENSORS + i + 1] = dev->data[j + 2]; atp_complete_geyser_3_4() 699 dbg_dump("sample", dev->xy_cur); atp_complete_geyser_3_4() 702 if (dev->data[dev->info->datalen - 1] & ATP_STATUS_BASE_UPDATE) { atp_complete_geyser_3_4() 706 memcpy(dev->xy_old, dev->xy_cur, sizeof(dev->xy_old)); atp_complete_geyser_3_4() 712 dev->xy_acc[i] = dev->xy_cur[i] - dev->xy_old[i]; atp_complete_geyser_3_4() 715 if (dev->xy_acc[i] > 127) atp_complete_geyser_3_4() 716 dev->xy_acc[i] -= 256; atp_complete_geyser_3_4() 718 if (dev->xy_acc[i] < -127) atp_complete_geyser_3_4() 719 dev->xy_acc[i] += 256; atp_complete_geyser_3_4() 722 if (dev->xy_acc[i] < 0) atp_complete_geyser_3_4() 723 dev->xy_acc[i] = 0; atp_complete_geyser_3_4() 726 dbg_dump("accumulator", dev->xy_acc); atp_complete_geyser_3_4() 728 x = atp_calculate_abs(dev, 0, ATP_XSENSORS, atp_complete_geyser_3_4() 729 dev->info->xfact, &x_z, &x_f); atp_complete_geyser_3_4() 730 y = atp_calculate_abs(dev, ATP_XSENSORS, ATP_YSENSORS, atp_complete_geyser_3_4() 731 dev->info->yfact, &y_z, &y_f); atp_complete_geyser_3_4() 733 key = dev->data[dev->info->datalen - 1] & ATP_STATUS_BUTTON; atp_complete_geyser_3_4() 737 if (x && y && fingers == dev->fingers_old) { atp_complete_geyser_3_4() 738 if (dev->x_old != -1) { atp_complete_geyser_3_4() 739 x = (dev->x_old 7 + x) >> 3; atp_complete_geyser_3_4() 740 y = (dev->y_old * 7 + y) >> 3; atp_complete_geyser_3_4() 741 dev->x_old = x; atp_complete_geyser_3_4() 742 dev->y_old = y; atp_complete_geyser_3_4() 749 input_report_key(dev->input, BTN_TOUCH, 1); atp_complete_geyser_3_4() 750 input_report_abs(dev->input, ABS_X, x); atp_complete_geyser_3_4() 751 input_report_abs(dev->input, ABS_Y, y); atp_complete_geyser_3_4() 752 input_report_abs(dev->input, ABS_PRESSURE, atp_complete_geyser_3_4() 754 atp_report_fingers(dev->input, fingers); atp_complete_geyser_3_4() 756 dev->x_old = x; atp_complete_geyser_3_4() 757 dev->y_old = y; atp_complete_geyser_3_4() 761 dev->x_old = dev->y_old = -1; atp_complete_geyser_3_4() 762 dev->fingers_old = 0; atp_complete_geyser_3_4() 763 input_report_key(dev->input, BTN_TOUCH, 0); atp_complete_geyser_3_4() 764 input_report_abs(dev->input, ABS_PRESSURE, 0); atp_complete_geyser_3_4() 765 atp_report_fingers(dev->input, 0); atp_complete_geyser_3_4() 768 memset(dev->xy_acc, 0, sizeof(dev->xy_acc)); atp_complete_geyser_3_4() 771 if (fingers != dev->fingers_old) atp_complete_geyser_3_4() 772 dev->x_old = dev->y_old = -1; atp_complete_geyser_3_4() 773 dev->fingers_old = fingers; atp_complete_geyser_3_4() 775 input_report_key(dev->input, BTN_LEFT, key); atp_complete_geyser_3_4() 776 input_sync(dev->input); atp_complete_geyser_3_4() 790 dev->idlecount++; atp_complete_geyser_3_4() 791 if (dev->idlecount == 10) { atp_complete_geyser_3_4() 792 dev->x_old = dev->y_old = -1; atp_complete_geyser_3_4() 793 dev->idlecount = 0; atp_complete_geyser_3_4() 794 schedule_work(&dev->work); atp_complete_geyser_3_4() 799 dev->idlecount = 0; atp_complete_geyser_3_4() 802 retval = usb_submit_urb(dev->urb, GFP_ATOMIC); atp_complete_geyser_3_4() 804 dev_err(&dev->intf->dev, atp_complete_geyser_3_4() 811 struct atp dev = input_get_drvdata(input); atp_open() local 813 if (usb_submit_urb(dev->urb, GFP_ATOMIC)) atp_open() 816 dev->open = 1; atp_open() 822 struct atp dev = input_get_drvdata(input); atp_close() local 824 usb_kill_urb(dev->urb); atp_close() 825 cancel_work_sync(&dev->work); atp_close() 826 dev->open = 0; atp_close() 829 static int atp_handle_geyser(struct atp dev) atp_handle_geyser() argument 831 if (dev->info != &fountain_info) { atp_handle_geyser() 833 if (atp_geyser_init(dev)) atp_handle_geyser() 836 dev_info(&dev->intf->dev, "Geyser mode initialized.\n"); atp_handle_geyser() 845 struct atp dev; atp_probe() local 866 dev_err(&iface->dev, "Could not find int-in endpoint\n"); atp_probe() 871 dev = kzalloc(sizeof(struct atp), GFP_KERNEL); atp_probe() 873 if (!dev \|\| !input_dev) { atp_probe() 874 dev_err(&iface->dev, "Out of memory\n"); atp_probe() 878 dev->udev = udev; atp_probe() 879 dev->intf = iface; atp_probe() 880 dev->input = input_dev; atp_probe() 881 dev->info = info; atp_probe() 882 dev->overflow_warned = false; atp_probe() 884 dev->urb = usb_alloc_urb(0, GFP_KERNEL); atp_probe() 885 if (!dev->urb) atp_probe() 888 dev->data = usb_alloc_coherent(dev->udev, dev->info->datalen, GFP_KERNEL, atp_probe() 889 &dev->urb->transfer_dma); atp_probe() 890 if (!dev->data) atp_probe() 893 usb_fill_int_urb(dev->urb, udev, atp_probe() 895 dev->data, dev->info->datalen, atp_probe() 896 dev->info->callback, dev, 1); atp_probe() 898 error = atp_handle_geyser(dev); atp_probe() 902 usb_make_path(udev, dev->phys, sizeof(dev->phys)); atp_probe() 903 strlcat(dev->phys, "/input0", sizeof(dev->phys)); atp_probe() 906 input_dev->phys = dev->phys; atp_probe() 907 usb_to_input_id(dev->udev, &input_dev->id); atp_probe() 908 input_dev->dev.parent = &iface->dev; atp_probe() 910 input_set_drvdata(input_dev, dev); atp_probe() 918 (dev->info->xsensors - 1) * dev->info->xfact - 1, atp_probe() 919 dev->info->fuzz, 0); atp_probe() 921 (dev->info->ysensors - 1) * dev->info->yfact - 1, atp_probe() 922 dev->info->fuzz, 0); atp_probe() 932 error = input_register_device(dev->input); atp_probe() 937 usb_set_intfdata(iface, dev); atp_probe() 939 INIT_WORK(&dev->work, atp_reinit); atp_probe() 944 usb_free_coherent(dev->udev, dev->info->datalen, atp_probe() 945 dev->data, dev->urb->transfer_dma); atp_probe() 947 usb_free_urb(dev->urb); atp_probe() 950 kfree(dev); atp_probe() 957 struct atp dev = usb_get_intfdata(iface); atp_disconnect() local 960 if (dev) { atp_disconnect() 961 usb_kill_urb(dev->urb); atp_disconnect() 962 input_unregister_device(dev->input); atp_disconnect() 963 usb_free_coherent(dev->udev, dev->info->datalen, atp_disconnect() 964 dev->data, dev->urb->transfer_dma); atp_disconnect() 965 usb_free_urb(dev->urb); atp_disconnect() 966 kfree(dev); atp_disconnect() 968 dev_info(&iface->dev, "input: appletouch disconnected\n"); atp_disconnect() 971 static int atp_recover(struct atp dev) atp_recover() argument 975 error = atp_handle_geyser(dev); atp_recover() 979 if (dev->open && usb_submit_urb(dev->urb, GFP_ATOMIC)) atp_recover() 987 struct atp dev = usb_get_intfdata(iface); atp_suspend() local 989 usb_kill_urb(dev->urb); atp_suspend() 995 struct atp dev = usb_get_intfdata(iface); atp_resume() local 997 if (dev->open && usb_submit_urb(dev->urb, GFP_ATOMIC)) atp_resume() 1005 struct atp *dev = usb_get_intfdata(iface); atp_reset_resume() local 1007 return atp_recover(dev); atp_reset_resume()
/linux-4.1.27/arch/sh/drivers/dma/
H A D	dma-sysfs.c	26 static ssize_t dma_show_devices(struct device dev, dma_show_devices() argument 61 static ssize_t dma_show_dev_id(struct device dev, dma_show_dev_id() argument 64 struct dma_channel channel = to_dma_channel(dev); dma_show_dev_id() 68 static ssize_t dma_store_dev_id(struct device dev, dma_store_dev_id() argument 72 struct dma_channel channel = to_dma_channel(dev); dma_store_dev_id() 79 static ssize_t dma_store_config(struct device dev, dma_store_config() argument 83 struct dma_channel channel = to_dma_channel(dev); dma_store_config() 94 static ssize_t dma_show_mode(struct device dev, dma_show_mode() argument 97 struct dma_channel channel = to_dma_channel(dev); dma_show_mode() 101 static ssize_t dma_store_mode(struct device dev, dma_store_mode() argument 105 struct dma_channel channel = to_dma_channel(dev); dma_store_mode() 113 static ssize_t dma_show_##field(struct device dev, \ 116 struct dma_channel channel = to_dma_channel(dev); \ 126 struct device dev = &chan->dev; dma_create_sysfs_files() local 130 dev->id = chan->vchan; dma_create_sysfs_files() 131 dev->bus = &dma_subsys; dma_create_sysfs_files() 133 ret = device_register(dev); dma_create_sysfs_files() 137 ret \|= device_create_file(dev, &dev_attr_dev_id); dma_create_sysfs_files() 138 ret \|= device_create_file(dev, &dev_attr_count); dma_create_sysfs_files() 139 ret \|= device_create_file(dev, &dev_attr_mode); dma_create_sysfs_files() 140 ret \|= device_create_file(dev, &dev_attr_flags); dma_create_sysfs_files() 141 ret \|= device_create_file(dev, &dev_attr_config); dma_create_sysfs_files() 144 dev_err(&info->pdev->dev, "Failed creating attrs\n"); dma_create_sysfs_files() 149 return sysfs_create_link(&info->pdev->dev.kobj, &dev->kobj, name); dma_create_sysfs_files() 154 struct device *dev = &chan->dev; dma_remove_sysfs_files() local 157 device_remove_file(dev, &dev_attr_dev_id); dma_remove_sysfs_files() 158 device_remove_file(dev, &dev_attr_count); dma_remove_sysfs_files() 159 device_remove_file(dev, &dev_attr_mode); dma_remove_sysfs_files() 160 device_remove_file(dev, &dev_attr_flags); dma_remove_sysfs_files() 161 device_remove_file(dev, &dev_attr_config); dma_remove_sysfs_files() 164 sysfs_remove_link(&info->pdev->dev.kobj, name); dma_remove_sysfs_files() 166 device_unregister(dev); dma_remove_sysfs_files()
/linux-4.1.27/sound/soc/dwc/
H A D	designware_i2s.c	96 struct device dev; member in struct:dw_i2s_dev 115 static inline void i2s_disable_channels(struct dw_i2s_dev dev, u32 stream) i2s_disable_channels() argument 121 i2s_write_reg(dev->i2s_base, TER(i), 0); i2s_disable_channels() 124 i2s_write_reg(dev->i2s_base, RER(i), 0); i2s_disable_channels() 128 static inline void i2s_clear_irqs(struct dw_i2s_dev dev, u32 stream) i2s_clear_irqs() argument 134 i2s_read_reg(dev->i2s_base, TOR(i)); i2s_clear_irqs() 137 i2s_read_reg(dev->i2s_base, ROR(i)); i2s_clear_irqs() 141 static void i2s_start(struct dw_i2s_dev dev, i2s_start() argument 145 i2s_write_reg(dev->i2s_base, IER, 1); i2s_start() 148 i2s_write_reg(dev->i2s_base, ITER, 1); i2s_start() 150 i2s_write_reg(dev->i2s_base, IRER, 1); i2s_start() 152 i2s_write_reg(dev->i2s_base, CER, 1); i2s_start() 155 static void i2s_stop(struct dw_i2s_dev dev, i2s_stop() argument 160 i2s_clear_irqs(dev, substream->stream); i2s_stop() 162 i2s_write_reg(dev->i2s_base, ITER, 0); i2s_stop() 165 irq = i2s_read_reg(dev->i2s_base, IMR(i)); i2s_stop() 166 i2s_write_reg(dev->i2s_base, IMR(i), irq \| 0x30); i2s_stop() 169 i2s_write_reg(dev->i2s_base, IRER, 0); i2s_stop() 172 irq = i2s_read_reg(dev->i2s_base, IMR(i)); i2s_stop() 173 i2s_write_reg(dev->i2s_base, IMR(i), irq \| 0x03); i2s_stop() 177 if (!dev->active) { i2s_stop() 178 i2s_write_reg(dev->i2s_base, CER, 0); i2s_stop() 179 i2s_write_reg(dev->i2s_base, IER, 0); i2s_stop() 186 struct dw_i2s_dev dev = snd_soc_dai_get_drvdata(cpu_dai); dw_i2s_startup() local 189 if (!(dev->capability & DWC_I2S_RECORD) && dw_i2s_startup() 193 if (!(dev->capability & DWC_I2S_PLAY) && dw_i2s_startup() 198 dma_data = &dev->play_dma_data; dw_i2s_startup() 200 dma_data = &dev->capture_dma_data; dw_i2s_startup() 210 struct dw_i2s_dev dev = snd_soc_dai_get_drvdata(dai); dw_i2s_hw_params() local 211 struct i2s_clk_config_data config = &dev->config; dw_i2s_hw_params() 235 dev_err(dev->dev, "designware-i2s: unsuppted PCM fmt"); dw_i2s_hw_params() 248 dev_err(dev->dev, "channel not supported\n"); dw_i2s_hw_params() 252 i2s_disable_channels(dev, substream->stream); dw_i2s_hw_params() 256 i2s_write_reg(dev->i2s_base, TCR(ch_reg), dw_i2s_hw_params() 258 i2s_write_reg(dev->i2s_base, TFCR(ch_reg), 0x02); dw_i2s_hw_params() 259 irq = i2s_read_reg(dev->i2s_base, IMR(ch_reg)); dw_i2s_hw_params() 260 i2s_write_reg(dev->i2s_base, IMR(ch_reg), irq & ~0x30); dw_i2s_hw_params() 261 i2s_write_reg(dev->i2s_base, TER(ch_reg), 1); dw_i2s_hw_params() 263 i2s_write_reg(dev->i2s_base, RCR(ch_reg), dw_i2s_hw_params() 265 i2s_write_reg(dev->i2s_base, RFCR(ch_reg), 0x07); dw_i2s_hw_params() 266 irq = i2s_read_reg(dev->i2s_base, IMR(ch_reg)); dw_i2s_hw_params() 267 i2s_write_reg(dev->i2s_base, IMR(ch_reg), irq & ~0x03); dw_i2s_hw_params() 268 i2s_write_reg(dev->i2s_base, RER(ch_reg), 1); dw_i2s_hw_params() 272 i2s_write_reg(dev->i2s_base, CCR, ccr); dw_i2s_hw_params() 276 if (dev->i2s_clk_cfg) { dw_i2s_hw_params() 277 ret = dev->i2s_clk_cfg(config); dw_i2s_hw_params() 279 dev_err(dev->dev, "runtime audio clk config fail\n"); dw_i2s_hw_params() 285 ret = clk_set_rate(dev->clk, bitclk); dw_i2s_hw_params() 287 dev_err(dev->dev, "Can't set I2S clock rate: %d\n", dw_i2s_hw_params() 305 struct dw_i2s_dev dev = snd_soc_dai_get_drvdata(dai); dw_i2s_prepare() local 308 i2s_write_reg(dev->i2s_base, TXFFR, 1); dw_i2s_prepare() 310 i2s_write_reg(dev->i2s_base, RXFFR, 1); dw_i2s_prepare() 318 struct dw_i2s_dev dev = snd_soc_dai_get_drvdata(dai); dw_i2s_trigger() local 325 dev->active++; dw_i2s_trigger() 326 i2s_start(dev, substream); dw_i2s_trigger() 332 dev->active--; dw_i2s_trigger() 333 i2s_stop(dev, substream); dw_i2s_trigger() 358 struct dw_i2s_dev dev = snd_soc_dai_get_drvdata(dai); dw_i2s_suspend() local 360 clk_disable(dev->clk); dw_i2s_suspend() 366 struct dw_i2s_dev dev = snd_soc_dai_get_drvdata(dai); dw_i2s_resume() local 368 clk_enable(dev->clk); dw_i2s_resume() 410 static int dw_configure_dai(struct dw_i2s_dev dev, dw_configure_dai() argument 418 u32 comp1 = i2s_read_reg(dev->i2s_base, I2S_COMP_PARAM_1); dw_configure_dai() 419 u32 comp2 = i2s_read_reg(dev->i2s_base, I2S_COMP_PARAM_2); dw_configure_dai() 423 dev_dbg(dev->dev, " designware: play supported\n"); dw_configure_dai() 435 dev_dbg(dev->dev, "designware: record supported\n"); dw_configure_dai() 449 static int dw_configure_dai_by_pd(struct dw_i2s_dev dev, dw_configure_dai_by_pd() argument 454 u32 comp1 = i2s_read_reg(dev->i2s_base, I2S_COMP_PARAM_1); dw_configure_dai_by_pd() 461 ret = dw_configure_dai(dev, dw_i2s_dai, pdata->snd_rates); dw_configure_dai_by_pd() 466 dev->play_dma_data.pd.data = pdata->play_dma_data; dw_configure_dai_by_pd() 467 dev->capture_dma_data.pd.data = pdata->capture_dma_data; dw_configure_dai_by_pd() 468 dev->play_dma_data.pd.addr = res->start + I2S_TXDMA; dw_configure_dai_by_pd() 469 dev->capture_dma_data.pd.addr = res->start + I2S_RXDMA; dw_configure_dai_by_pd() 470 dev->play_dma_data.pd.max_burst = 16; dw_configure_dai_by_pd() 471 dev->capture_dma_data.pd.max_burst = 16; dw_configure_dai_by_pd() 472 dev->play_dma_data.pd.addr_width = bus_widths[idx]; dw_configure_dai_by_pd() 473 dev->capture_dma_data.pd.addr_width = bus_widths[idx]; dw_configure_dai_by_pd() 474 dev->play_dma_data.pd.filter = pdata->filter; dw_configure_dai_by_pd() 475 dev->capture_dma_data.pd.filter = pdata->filter; dw_configure_dai_by_pd() 480 static int dw_configure_dai_by_dt(struct dw_i2s_dev dev, dw_configure_dai_by_dt() argument 484 u32 comp1 = i2s_read_reg(dev->i2s_base, I2S_COMP_PARAM_1); dw_configure_dai_by_dt() 485 u32 comp2 = i2s_read_reg(dev->i2s_base, I2S_COMP_PARAM_2); dw_configure_dai_by_dt() 494 ret = dw_configure_dai(dev, dw_i2s_dai, SNDRV_PCM_RATE_8000_192000); dw_configure_dai_by_dt() 501 dev->capability \|= DWC_I2S_PLAY; dw_configure_dai_by_dt() 502 dev->play_dma_data.dt.addr = res->start + I2S_TXDMA; dw_configure_dai_by_dt() 503 dev->play_dma_data.dt.addr_width = bus_widths[idx]; dw_configure_dai_by_dt() 504 dev->play_dma_data.dt.chan_name = "TX"; dw_configure_dai_by_dt() 505 dev->play_dma_data.dt.fifo_size = fifo_depth dw_configure_dai_by_dt() 507 dev->play_dma_data.dt.maxburst = 16; dw_configure_dai_by_dt() 512 dev->capability \|= DWC_I2S_RECORD; dw_configure_dai_by_dt() 513 dev->capture_dma_data.dt.addr = res->start + I2S_RXDMA; dw_configure_dai_by_dt() 514 dev->capture_dma_data.dt.addr_width = bus_widths[idx]; dw_configure_dai_by_dt() 515 dev->capture_dma_data.dt.chan_name = "RX"; dw_configure_dai_by_dt() 516 dev->capture_dma_data.dt.fifo_size = fifo_depth * dw_configure_dai_by_dt() 518 dev->capture_dma_data.dt.maxburst = 16; dw_configure_dai_by_dt() 527 const struct i2s_platform_data pdata = pdev->dev.platform_data; dw_i2s_probe() 528 struct dw_i2s_dev dev; dw_i2s_probe() local 533 dev = devm_kzalloc(&pdev->dev, sizeof(dev), GFP_KERNEL); dw_i2s_probe() 534 if (!dev) { dw_i2s_probe() 535 dev_warn(&pdev->dev, "kzalloc fail\n"); dw_i2s_probe() 539 dw_i2s_dai = devm_kzalloc(&pdev->dev, sizeof(dw_i2s_dai), GFP_KERNEL); dw_i2s_probe() 548 dev->i2s_base = devm_ioremap_resource(&pdev->dev, res); dw_i2s_probe() 549 if (IS_ERR(dev->i2s_base)) dw_i2s_probe() 550 return PTR_ERR(dev->i2s_base); dw_i2s_probe() 552 dev->dev = &pdev->dev; dw_i2s_probe() 554 ret = dw_configure_dai_by_pd(dev, dw_i2s_dai, res, pdata); dw_i2s_probe() 558 dev->capability = pdata->cap; dw_i2s_probe() 559 dev->i2s_clk_cfg = pdata->i2s_clk_cfg; dw_i2s_probe() 560 if (!dev->i2s_clk_cfg) { dw_i2s_probe() 561 dev_err(&pdev->dev, "no clock configure method\n"); dw_i2s_probe() 565 dev->clk = devm_clk_get(&pdev->dev, NULL); dw_i2s_probe() 567 ret = dw_configure_dai_by_dt(dev, dw_i2s_dai, res); dw_i2s_probe() 571 dev->clk = devm_clk_get(&pdev->dev, "i2sclk"); dw_i2s_probe() 573 if (IS_ERR(dev->clk)) dw_i2s_probe() 574 return PTR_ERR(dev->clk); dw_i2s_probe() 576 ret = clk_prepare_enable(dev->clk); dw_i2s_probe() 580 dev_set_drvdata(&pdev->dev, dev); dw_i2s_probe() 581 ret = devm_snd_soc_register_component(&pdev->dev, &dw_i2s_component, dw_i2s_probe() 584 dev_err(&pdev->dev, "not able to register dai\n"); dw_i2s_probe() 589 ret = devm_snd_dmaengine_pcm_register(&pdev->dev, NULL, 0); dw_i2s_probe() 591 dev_err(&pdev->dev, dw_i2s_probe() 600 clk_disable_unprepare(dev->clk); dw_i2s_probe() 606 struct dw_i2s_dev *dev = dev_get_drvdata(&pdev->dev); dw_i2s_remove() local 608 clk_disable_unprepare(dev->clk); dw_i2s_remove()
/linux-4.1.27/drivers/media/usb/tm6000/
H A D	tm6000-core.c	35 int tm6000_read_write_usb(struct tm6000_core dev, u8 req_type, u8 req, tm6000_read_write_usb() argument 49 mutex_lock(&dev->usb_lock); tm6000_read_write_usb() 52 pipe = usb_rcvctrlpipe(dev->udev, 0); tm6000_read_write_usb() 54 pipe = usb_sndctrlpipe(dev->udev, 0); tm6000_read_write_usb() 59 printk(KERN_DEBUG "(dev %p, pipe %08x): ", dev->udev, pipe); tm6000_read_write_usb() 74 ret = usb_control_msg(dev->udev, pipe, req, req_type, value, index, tm6000_read_write_usb() 96 if (dev->quirks & TM6000_QUIRK_NO_USB_DELAY) tm6000_read_write_usb() 110 mutex_unlock(&dev->usb_lock); tm6000_read_write_usb() 114 int tm6000_set_reg(struct tm6000_core dev, u8 req, u16 value, u16 index) tm6000_set_reg() argument 117 tm6000_read_write_usb(dev, USB_DIR_OUT \| USB_TYPE_VENDOR, tm6000_set_reg() 122 int tm6000_get_reg(struct tm6000_core dev, u8 req, u16 value, u16 index) tm6000_get_reg() argument 127 rc = tm6000_read_write_usb(dev, USB_DIR_IN \| USB_TYPE_VENDOR, req, tm6000_get_reg() 137 int tm6000_set_reg_mask(struct tm6000_core dev, u8 req, u16 value, tm6000_set_reg_mask() argument 144 rc = tm6000_read_write_usb(dev, USB_DIR_IN \| USB_TYPE_VENDOR, req, tm6000_set_reg_mask() 155 return tm6000_read_write_usb(dev, USB_DIR_OUT \| USB_TYPE_VENDOR, tm6000_set_reg_mask() 160 int tm6000_get_reg16(struct tm6000_core dev, u8 req, u16 value, u16 index) tm6000_get_reg16() argument 165 rc = tm6000_read_write_usb(dev, USB_DIR_IN \| USB_TYPE_VENDOR, req, tm6000_get_reg16() 174 int tm6000_get_reg32(struct tm6000_core dev, u8 req, u16 value, u16 index) tm6000_get_reg32() argument 179 rc = tm6000_read_write_usb(dev, USB_DIR_IN \| USB_TYPE_VENDOR, req, tm6000_get_reg32() 188 int tm6000_i2c_reset(struct tm6000_core dev, u16 tsleep) tm6000_i2c_reset() argument 192 rc = tm6000_set_reg(dev, REQ_03_SET_GET_MCU_PIN, TM6000_GPIO_CLK, 0); tm6000_i2c_reset() 198 rc = tm6000_set_reg(dev, REQ_03_SET_GET_MCU_PIN, TM6000_GPIO_CLK, 1); tm6000_i2c_reset() 204 void tm6000_set_fourcc_format(struct tm6000_core dev) tm6000_set_fourcc_format() argument 206 if (dev->dev_type == TM6010) { tm6000_set_fourcc_format() 209 val = tm6000_get_reg(dev, TM6010_REQ07_RCC_ACTIVE_IF, 0) & 0xfc; tm6000_set_fourcc_format() 210 if (dev->fourcc == V4L2_PIX_FMT_UYVY) tm6000_set_fourcc_format() 211 tm6000_set_reg(dev, TM6010_REQ07_RCC_ACTIVE_IF, val); tm6000_set_fourcc_format() 213 tm6000_set_reg(dev, TM6010_REQ07_RCC_ACTIVE_IF, val \| 1); tm6000_set_fourcc_format() 215 if (dev->fourcc == V4L2_PIX_FMT_UYVY) tm6000_set_fourcc_format() 216 tm6000_set_reg(dev, TM6010_REQ07_RC1_TRESHOLD, 0xd0); tm6000_set_fourcc_format() 218 tm6000_set_reg(dev, TM6010_REQ07_RC1_TRESHOLD, 0x90); tm6000_set_fourcc_format() 222 static void tm6000_set_vbi(struct tm6000_core dev) tm6000_set_vbi() argument 229 if (dev->norm & V4L2_STD_525_60) tm6000_set_vbi() 232 if (dev->dev_type == TM6010) { tm6000_set_vbi() 233 tm6000_set_reg(dev, TM6010_REQ07_R3F_RESET, 0x01); tm6000_set_vbi() 234 tm6000_set_reg(dev, TM6010_REQ07_R41_TELETEXT_VBI_CODE1, 0x27); tm6000_set_vbi() 235 tm6000_set_reg(dev, TM6010_REQ07_R42_VBI_DATA_HIGH_LEVEL, 0x55); tm6000_set_vbi() 236 tm6000_set_reg(dev, TM6010_REQ07_R43_VBI_DATA_TYPE_LINE7, 0x66); tm6000_set_vbi() 237 tm6000_set_reg(dev, TM6010_REQ07_R44_VBI_DATA_TYPE_LINE8, 0x66); tm6000_set_vbi() 238 tm6000_set_reg(dev, TM6010_REQ07_R45_VBI_DATA_TYPE_LINE9, 0x66); tm6000_set_vbi() 239 tm6000_set_reg(dev, tm6000_set_vbi() 241 tm6000_set_reg(dev, tm6000_set_vbi() 243 tm6000_set_reg(dev, tm6000_set_vbi() 245 tm6000_set_reg(dev, tm6000_set_vbi() 247 tm6000_set_reg(dev, tm6000_set_vbi() 249 tm6000_set_reg(dev, tm6000_set_vbi() 251 tm6000_set_reg(dev, tm6000_set_vbi() 253 tm6000_set_reg(dev, tm6000_set_vbi() 255 tm6000_set_reg(dev, tm6000_set_vbi() 257 tm6000_set_reg(dev, tm6000_set_vbi() 259 tm6000_set_reg(dev, tm6000_set_vbi() 261 tm6000_set_reg(dev, tm6000_set_vbi() 263 tm6000_set_reg(dev, tm6000_set_vbi() 265 tm6000_set_reg(dev, tm6000_set_vbi() 267 tm6000_set_reg(dev, tm6000_set_vbi() 269 tm6000_set_reg(dev, tm6000_set_vbi() 271 tm6000_set_reg(dev, tm6000_set_vbi() 273 tm6000_set_reg(dev, tm6000_set_vbi() 275 tm6000_set_reg(dev, TM6010_REQ07_R58_VBI_CAPTION_DTO1, 0x35); tm6000_set_vbi() 276 tm6000_set_reg(dev, TM6010_REQ07_R59_VBI_CAPTION_DTO0, 0xa0); tm6000_set_vbi() 277 tm6000_set_reg(dev, TM6010_REQ07_R5A_VBI_TELETEXT_DTO1, 0x11); tm6000_set_vbi() 278 tm6000_set_reg(dev, TM6010_REQ07_R5B_VBI_TELETEXT_DTO0, 0x4c); tm6000_set_vbi() 279 tm6000_set_reg(dev, TM6010_REQ07_R40_TELETEXT_VBI_CODE0, 0x01); tm6000_set_vbi() 280 tm6000_set_reg(dev, TM6010_REQ07_R3F_RESET, 0x00); tm6000_set_vbi() 284 int tm6000_init_analog_mode(struct tm6000_core dev) tm6000_init_analog_mode() argument 288 if (dev->dev_type == TM6010) { tm6000_init_analog_mode() 291 if (!dev->radio) tm6000_init_analog_mode() 295 tm6000_set_reg_mask(dev, TM6010_REQ07_RCC_ACTIVE_IF, tm6000_init_analog_mode() 298 tm6000_set_reg_mask(dev, TM6010_REQ07_RC0_ACTIVE_VIDEO_SOURCE, tm6000_init_analog_mode() 302 tm6000_set_reg(dev, TM6010_REQ07_R3F_RESET, 0x01); tm6000_init_analog_mode() 304 if (dev->scaler) tm6000_init_analog_mode() 306 tm6000_set_reg(dev, TM6010_REQ07_RC0_ACTIVE_VIDEO_SOURCE, 0x20); tm6000_init_analog_mode() 308 tm6000_set_reg(dev, TM6010_REQ07_RC0_ACTIVE_VIDEO_SOURCE, 0x80); tm6000_init_analog_mode() 310 tm6000_set_reg(dev, TM6010_REQ07_RC3_HSTART1, 0x88); tm6000_init_analog_mode() 311 tm6000_set_reg(dev, TM6000_REQ07_RDA_CLK_SEL, 0x23); tm6000_init_analog_mode() 312 tm6000_set_reg(dev, TM6010_REQ07_RD1_ADDR_FOR_REQ1, 0xc0); tm6000_init_analog_mode() 313 tm6000_set_reg(dev, TM6010_REQ07_RD2_ADDR_FOR_REQ2, 0xd8); tm6000_init_analog_mode() 314 tm6000_set_reg(dev, TM6010_REQ07_RD6_ENDP_REQ1_REQ2, 0x06); tm6000_init_analog_mode() 315 tm6000_set_reg(dev, TM6000_REQ07_RDF_PWDOWN_ACLK, 0x1f); tm6000_init_analog_mode() 318 tm6000_set_reg(dev, TM6010_REQ07_RFF_SOFT_RESET, 0x08); tm6000_init_analog_mode() 319 tm6000_set_reg(dev, TM6010_REQ07_RFF_SOFT_RESET, 0x00); tm6000_init_analog_mode() 321 tm6000_set_fourcc_format(dev); tm6000_init_analog_mode() 324 tm6000_set_reg(dev, TM6010_REQ07_R3F_RESET, 0x00); tm6000_init_analog_mode() 340 f.frequency = dev->freq; tm6000_init_analog_mode() 341 v4l2_device_call_all(&dev->v4l2_dev, 0, tuner, s_frequency, &f); tm6000_init_analog_mode() 344 tm6000_set_standard(dev); tm6000_init_analog_mode() 345 tm6000_set_vbi(dev); tm6000_init_analog_mode() 346 tm6000_set_audio_bitrate(dev, 48000); tm6000_init_analog_mode() 349 if (dev->gpio.dvb_led) { tm6000_init_analog_mode() 350 tm6000_set_reg(dev, REQ_03_SET_GET_MCU_PIN, tm6000_init_analog_mode() 351 dev->gpio.dvb_led, 0x01); tm6000_init_analog_mode() 357 int tm6000_init_digital_mode(struct tm6000_core dev) tm6000_init_digital_mode() argument 359 if (dev->dev_type == TM6010) { tm6000_init_digital_mode() 361 tm6000_set_reg_mask(dev, TM6010_REQ07_RCC_ACTIVE_IF, tm6000_init_digital_mode() 364 tm6000_set_reg_mask(dev, TM6010_REQ07_RC0_ACTIVE_VIDEO_SOURCE, tm6000_init_digital_mode() 367 tm6000_set_reg(dev, TM6010_REQ07_RFE_POWER_DOWN, 0x28); tm6000_init_digital_mode() 368 tm6000_set_reg(dev, TM6010_REQ08_RE2_POWER_DOWN_CTRL1, 0xfc); tm6000_init_digital_mode() 369 tm6000_set_reg(dev, TM6010_REQ08_RE6_POWER_DOWN_CTRL2, 0xff); tm6000_init_digital_mode() 371 tm6000_set_reg(dev, TM6010_REQ07_RFF_SOFT_RESET, 0x08); tm6000_init_digital_mode() 372 tm6000_set_reg(dev, TM6010_REQ07_RFF_SOFT_RESET, 0x00); tm6000_init_digital_mode() 373 tm6000_set_reg(dev, TM6010_REQ07_R3F_RESET, 0x01); tm6000_init_digital_mode() 374 tm6000_set_reg(dev, TM6000_REQ07_RDF_PWDOWN_ACLK, 0x08); tm6000_init_digital_mode() 375 tm6000_set_reg(dev, TM6000_REQ07_RE2_VADC_STATUS_CTL, 0x0c); tm6000_init_digital_mode() 376 tm6000_set_reg(dev, TM6000_REQ07_RE8_VADC_PWDOWN_CTL, 0xff); tm6000_init_digital_mode() 377 tm6000_set_reg(dev, TM6000_REQ07_REB_VADC_AADC_MODE, 0xd8); tm6000_init_digital_mode() 378 tm6000_set_reg(dev, TM6010_REQ07_RC0_ACTIVE_VIDEO_SOURCE, 0x40); tm6000_init_digital_mode() 379 tm6000_set_reg(dev, TM6010_REQ07_RC1_TRESHOLD, 0xd0); tm6000_init_digital_mode() 380 tm6000_set_reg(dev, TM6010_REQ07_RC3_HSTART1, 0x09); tm6000_init_digital_mode() 381 tm6000_set_reg(dev, TM6000_REQ07_RDA_CLK_SEL, 0x37); tm6000_init_digital_mode() 382 tm6000_set_reg(dev, TM6010_REQ07_RD1_ADDR_FOR_REQ1, 0xd8); tm6000_init_digital_mode() 383 tm6000_set_reg(dev, TM6010_REQ07_RD2_ADDR_FOR_REQ2, 0xc0); tm6000_init_digital_mode() 384 tm6000_set_reg(dev, TM6010_REQ07_RD6_ENDP_REQ1_REQ2, 0x60); tm6000_init_digital_mode() 386 tm6000_set_reg(dev, TM6000_REQ07_RE2_VADC_STATUS_CTL, 0x0c); tm6000_init_digital_mode() 387 tm6000_set_reg(dev, TM6000_REQ07_RE8_VADC_PWDOWN_CTL, 0xff); tm6000_init_digital_mode() 388 tm6000_set_reg(dev, TM6000_REQ07_REB_VADC_AADC_MODE, 0x08); tm6000_init_digital_mode() 391 tm6000_set_reg(dev, REQ_04_EN_DISABLE_MCU_INT, 0x0020, 0x00); tm6000_init_digital_mode() 393 tm6000_set_reg(dev, REQ_04_EN_DISABLE_MCU_INT, 0x0020, 0x01); tm6000_init_digital_mode() 395 tm6000_set_reg(dev, REQ_04_EN_DISABLE_MCU_INT, 0x0020, 0x00); tm6000_init_digital_mode() 400 if (dev->gpio.dvb_led) { tm6000_init_digital_mode() 401 tm6000_set_reg(dev, REQ_03_SET_GET_MCU_PIN, tm6000_init_digital_mode() 402 dev->gpio.dvb_led, 0x00); tm6000_init_digital_mode() 568 int tm6000_init(struct tm6000_core dev) tm6000_init() argument 574 board = tm6000_get_reg32(dev, REQ_40_GET_VERSION, 0, 0); tm6000_init() 579 if (dev->dev_type != TM6000) tm6000_init() 580 dev->dev_type = TM6000; tm6000_init() 584 if (dev->dev_type != TM6010) tm6000_init() 585 dev->dev_type = TM6010; tm6000_init() 593 if (dev->dev_type == TM6010) { tm6000_init() 603 rc = tm6000_set_reg(dev, tab[i].req, tab[i].reg, tab[i].val); tm6000_init() 614 rc = tm6000_cards_setup(dev); tm6000_init() 620 int tm6000_set_audio_bitrate(struct tm6000_core dev, int bitrate) tm6000_set_audio_bitrate() argument 630 dev->audio_bitrate = bitrate; tm6000_set_audio_bitrate() 635 dev->audio_bitrate = bitrate; tm6000_set_audio_bitrate() 643 if (dev->dev_type == TM6010) { tm6000_set_audio_bitrate() 644 val = tm6000_set_reg(dev, TM6010_REQ08_R0A_A_I2S_MOD, areg_0a); tm6000_set_audio_bitrate() 648 val = tm6000_set_reg_mask(dev, TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG, tm6000_set_audio_bitrate() 653 val = tm6000_set_reg_mask(dev, TM6000_REQ07_REB_VADC_AADC_MODE, tm6000_set_audio_bitrate() 662 int tm6000_set_audio_rinput(struct tm6000_core dev) tm6000_set_audio_rinput() argument 664 if (dev->dev_type == TM6010) { tm6000_set_audio_rinput() 669 switch (dev->rinput.amux) { tm6000_set_audio_rinput() 686 dev->name); tm6000_set_audio_rinput() 691 tm6000_set_reg_mask(dev, TM6010_REQ08_RF0_DAUDIO_INPUT_CONFIG, tm6000_set_audio_rinput() 694 tm6000_set_reg_mask(dev, TM6010_REQ07_R07_OUTPUT_CONTROL, tm6000_set_audio_rinput() 699 switch (dev->rinput.amux) { tm6000_set_audio_rinput() 708 dev->name); tm6000_set_audio_rinput() 713 tm6000_set_reg_mask(dev, TM6000_REQ07_REB_VADC_AADC_MODE, tm6000_set_audio_rinput() 719 static void tm6010_set_mute_sif(struct tm6000_core dev, u8 mute) tm6010_set_mute_sif() argument 726 tm6000_set_reg_mask(dev, TM6010_REQ08_R0A_A_I2S_MOD, mute_reg, 0x08); tm6010_set_mute_sif() 729 static void tm6010_set_mute_adc(struct tm6000_core dev, u8 mute) tm6010_set_mute_adc() argument 736 if (dev->dev_type == TM6010) { tm6010_set_mute_adc() 737 tm6000_set_reg_mask(dev, TM6010_REQ08_RF2_LEFT_CHANNEL_VOL, tm6010_set_mute_adc() 739 tm6000_set_reg_mask(dev, TM6010_REQ08_RF3_RIGHT_CHANNEL_VOL, tm6010_set_mute_adc() 742 tm6000_set_reg_mask(dev, TM6000_REQ07_REC_VADC_AADC_LVOL, tm6010_set_mute_adc() 744 tm6000_set_reg_mask(dev, TM6000_REQ07_RED_VADC_AADC_RVOL, tm6010_set_mute_adc() 749 int tm6000_tvaudio_set_mute(struct tm6000_core dev, u8 mute) tm6000_tvaudio_set_mute() argument 753 if (dev->radio) tm6000_tvaudio_set_mute() 754 mux = dev->rinput.amux; tm6000_tvaudio_set_mute() 756 mux = dev->vinput[dev->input].amux; tm6000_tvaudio_set_mute() 761 if (dev->dev_type == TM6010) tm6000_tvaudio_set_mute() 762 tm6010_set_mute_sif(dev, mute); tm6000_tvaudio_set_mute() 766 " configuration.\n", dev->name); tm6000_tvaudio_set_mute() 772 tm6010_set_mute_adc(dev, mute); tm6000_tvaudio_set_mute() 781 static void tm6010_set_volume_sif(struct tm6000_core dev, int vol) tm6010_set_volume_sif() argument 790 tm6000_set_reg(dev, TM6010_REQ08_R07_A_LEFT_VOL, vol_reg); tm6010_set_volume_sif() 791 tm6000_set_reg(dev, TM6010_REQ08_R08_A_RIGHT_VOL, vol_reg); tm6010_set_volume_sif() 794 static void tm6010_set_volume_adc(struct tm6000_core dev, int vol) tm6010_set_volume_adc() argument 800 if (dev->dev_type == TM6010) { tm6010_set_volume_adc() 801 tm6000_set_reg(dev, TM6010_REQ08_RF2_LEFT_CHANNEL_VOL, vol_reg); tm6010_set_volume_adc() 802 tm6000_set_reg(dev, TM6010_REQ08_RF3_RIGHT_CHANNEL_VOL, vol_reg); tm6010_set_volume_adc() 804 tm6000_set_reg(dev, TM6000_REQ07_REC_VADC_AADC_LVOL, vol_reg); tm6010_set_volume_adc() 805 tm6000_set_reg(dev, TM6000_REQ07_RED_VADC_AADC_RVOL, vol_reg); tm6010_set_volume_adc() 809 void tm6000_set_volume(struct tm6000_core dev, int vol) tm6000_set_volume() argument 813 if (dev->radio) { tm6000_set_volume() 814 mux = dev->rinput.amux; tm6000_set_volume() 817 mux = dev->vinput[dev->input].amux; tm6000_set_volume() 822 if (dev->dev_type == TM6010) tm6000_set_volume() 823 tm6010_set_volume_sif(dev, vol); tm6000_set_volume() 827 " configuration.\n", dev->name); tm6000_set_volume() 831 tm6010_set_volume_adc(dev, vol); tm6000_set_volume() 845 void tm6000_remove_from_devlist(struct tm6000_core dev) tm6000_remove_from_devlist() argument 848 list_del(&dev->devlist); tm6000_remove_from_devlist() 852 void tm6000_add_into_devlist(struct tm6000_core dev) tm6000_add_into_devlist() argument 855 list_add_tail(&dev->devlist, &tm6000_devlist); tm6000_add_into_devlist() 865 int tm6000_call_fillbuf(struct tm6000_core dev, enum tm6000_ops_type type, tm6000_call_fillbuf() argument 875 ops->fillbuf(dev, buf, size); tm6000_call_fillbuf() 884 struct tm6000_core dev = NULL; tm6000_register_extension() local 888 list_for_each_entry(dev, &tm6000_devlist, devlist) { tm6000_register_extension() 889 ops->init(dev); tm6000_register_extension() 891 dev->name, ops->name); tm6000_register_extension() 900 struct tm6000_core dev = NULL; tm6000_unregister_extension() local 903 list_for_each_entry(dev, &tm6000_devlist, devlist) tm6000_unregister_extension() 904 ops->fini(dev); tm6000_unregister_extension() 912 void tm6000_init_extension(struct tm6000_core dev) tm6000_init_extension() argument 920 ops->init(dev); tm6000_init_extension() 926 void tm6000_close_extension(struct tm6000_core dev) tm6000_close_extension() argument 934 ops->fini(dev); tm6000_close_extension()
/linux-4.1.27/drivers/net/wireless/rtl818x/rtl8187/
H A D	rtl8225.c	25 static void rtl8225_write_bitbang(struct ieee80211_hw dev, u8 addr, u16 data) rtl8225_write_bitbang() argument 27 struct rtl8187_priv priv = dev->priv; rtl8225_write_bitbang() 68 static void rtl8225_write_8051(struct ieee80211_hw dev, u8 addr, __le16 data) rtl8225_write_8051() argument 70 struct rtl8187_priv priv = dev->priv; rtl8225_write_8051() 107 static void rtl8225_write(struct ieee80211_hw dev, u8 addr, u16 data) rtl8225_write() argument 109 struct rtl8187_priv priv = dev->priv; rtl8225_write() 112 rtl8225_write_8051(dev, addr, cpu_to_le16(data)); rtl8225_write() 114 rtl8225_write_bitbang(dev, addr, data); rtl8225_write() 117 static u16 rtl8225_read(struct ieee80211_hw dev, u8 addr) rtl8225_read() argument 119 struct rtl8187_priv priv = dev->priv; rtl8225_read() 281 static void rtl8225_rf_set_tx_power(struct ieee80211_hw dev, int channel) rtl8225_rf_set_tx_power() argument 283 struct rtl8187_priv priv = dev->priv; rtl8225_rf_set_tx_power() 307 rtl8225_write_phy_cck(dev, 0x44 + i, tmp++); rtl8225_rf_set_tx_power() 322 rtl8225_write_phy_ofdm(dev, 2, 0x42); rtl8225_rf_set_tx_power() 323 rtl8225_write_phy_ofdm(dev, 6, 0x00); rtl8225_rf_set_tx_power() 324 rtl8225_write_phy_ofdm(dev, 8, 0x00); rtl8225_rf_set_tx_power() 331 rtl8225_write_phy_ofdm(dev, 5, tmp); rtl8225_rf_set_tx_power() 332 rtl8225_write_phy_ofdm(dev, 7, tmp); rtl8225_rf_set_tx_power() 337 static void rtl8225_rf_init(struct ieee80211_hw dev) rtl8225_rf_init() argument 339 struct rtl8187_priv priv = dev->priv; rtl8225_rf_init() 342 rtl8225_write(dev, 0x0, 0x067); rtl8225_rf_init() 343 rtl8225_write(dev, 0x1, 0xFE0); rtl8225_rf_init() 344 rtl8225_write(dev, 0x2, 0x44D); rtl8225_rf_init() 345 rtl8225_write(dev, 0x3, 0x441); rtl8225_rf_init() 346 rtl8225_write(dev, 0x4, 0x486); rtl8225_rf_init() 347 rtl8225_write(dev, 0x5, 0xBC0); rtl8225_rf_init() 348 rtl8225_write(dev, 0x6, 0xAE6); rtl8225_rf_init() 349 rtl8225_write(dev, 0x7, 0x82A); rtl8225_rf_init() 350 rtl8225_write(dev, 0x8, 0x01F); rtl8225_rf_init() 351 rtl8225_write(dev, 0x9, 0x334); rtl8225_rf_init() 352 rtl8225_write(dev, 0xA, 0xFD4); rtl8225_rf_init() 353 rtl8225_write(dev, 0xB, 0x391); rtl8225_rf_init() 354 rtl8225_write(dev, 0xC, 0x050); rtl8225_rf_init() 355 rtl8225_write(dev, 0xD, 0x6DB); rtl8225_rf_init() 356 rtl8225_write(dev, 0xE, 0x029); rtl8225_rf_init() 357 rtl8225_write(dev, 0xF, 0x914); msleep(100); rtl8225_rf_init() 359 rtl8225_write(dev, 0x2, 0xC4D); msleep(200); rtl8225_rf_init() 360 rtl8225_write(dev, 0x2, 0x44D); msleep(200); rtl8225_rf_init() 362 if (!(rtl8225_read(dev, 6) & (1 << 7))) { rtl8225_rf_init() 363 rtl8225_write(dev, 0x02, 0x0c4d); rtl8225_rf_init() 365 rtl8225_write(dev, 0x02, 0x044d); rtl8225_rf_init() 367 if (!(rtl8225_read(dev, 6) & (1 << 7))) rtl8225_rf_init() 368 wiphy_warn(dev->wiphy, "RF Calibration Failed! %x\n", rtl8225_rf_init() 369 rtl8225_read(dev, 6)); rtl8225_rf_init() 372 rtl8225_write(dev, 0x0, 0x127); rtl8225_rf_init() 375 rtl8225_write(dev, 0x1, i + 1); rtl8225_rf_init() 376 rtl8225_write(dev, 0x2, rtl8225bcd_rxgain[i]); rtl8225_rf_init() 379 rtl8225_write(dev, 0x0, 0x027); rtl8225_rf_init() 380 rtl8225_write(dev, 0x0, 0x22F); rtl8225_rf_init() 383 rtl8225_write_phy_ofdm(dev, 0xB, rtl8225_agc[i]); rtl8225_rf_init() 384 rtl8225_write_phy_ofdm(dev, 0xA, 0x80 + i); rtl8225_rf_init() 389 rtl8225_write_phy_ofdm(dev, 0x00, 0x01); rtl8225_rf_init() 390 rtl8225_write_phy_ofdm(dev, 0x01, 0x02); rtl8225_rf_init() 391 rtl8225_write_phy_ofdm(dev, 0x02, 0x42); rtl8225_rf_init() 392 rtl8225_write_phy_ofdm(dev, 0x03, 0x00); rtl8225_rf_init() 393 rtl8225_write_phy_ofdm(dev, 0x04, 0x00); rtl8225_rf_init() 394 rtl8225_write_phy_ofdm(dev, 0x05, 0x00); rtl8225_rf_init() 395 rtl8225_write_phy_ofdm(dev, 0x06, 0x40); rtl8225_rf_init() 396 rtl8225_write_phy_ofdm(dev, 0x07, 0x00); rtl8225_rf_init() 397 rtl8225_write_phy_ofdm(dev, 0x08, 0x40); rtl8225_rf_init() 398 rtl8225_write_phy_ofdm(dev, 0x09, 0xfe); rtl8225_rf_init() 399 rtl8225_write_phy_ofdm(dev, 0x0a, 0x09); rtl8225_rf_init() 400 rtl8225_write_phy_ofdm(dev, 0x0b, 0x80); rtl8225_rf_init() 401 rtl8225_write_phy_ofdm(dev, 0x0c, 0x01); rtl8225_rf_init() 402 rtl8225_write_phy_ofdm(dev, 0x0e, 0xd3); rtl8225_rf_init() 403 rtl8225_write_phy_ofdm(dev, 0x0f, 0x38); rtl8225_rf_init() 404 rtl8225_write_phy_ofdm(dev, 0x10, 0x84); rtl8225_rf_init() 405 rtl8225_write_phy_ofdm(dev, 0x11, 0x06); rtl8225_rf_init() 406 rtl8225_write_phy_ofdm(dev, 0x12, 0x20); rtl8225_rf_init() 407 rtl8225_write_phy_ofdm(dev, 0x13, 0x20); rtl8225_rf_init() 408 rtl8225_write_phy_ofdm(dev, 0x14, 0x00); rtl8225_rf_init() 409 rtl8225_write_phy_ofdm(dev, 0x15, 0x40); rtl8225_rf_init() 410 rtl8225_write_phy_ofdm(dev, 0x16, 0x00); rtl8225_rf_init() 411 rtl8225_write_phy_ofdm(dev, 0x17, 0x40); rtl8225_rf_init() 412 rtl8225_write_phy_ofdm(dev, 0x18, 0xef); rtl8225_rf_init() 413 rtl8225_write_phy_ofdm(dev, 0x19, 0x19); rtl8225_rf_init() 414 rtl8225_write_phy_ofdm(dev, 0x1a, 0x20); rtl8225_rf_init() 415 rtl8225_write_phy_ofdm(dev, 0x1b, 0x76); rtl8225_rf_init() 416 rtl8225_write_phy_ofdm(dev, 0x1c, 0x04); rtl8225_rf_init() 417 rtl8225_write_phy_ofdm(dev, 0x1e, 0x95); rtl8225_rf_init() 418 rtl8225_write_phy_ofdm(dev, 0x1f, 0x75); rtl8225_rf_init() 419 rtl8225_write_phy_ofdm(dev, 0x20, 0x1f); rtl8225_rf_init() 420 rtl8225_write_phy_ofdm(dev, 0x21, 0x27); rtl8225_rf_init() 421 rtl8225_write_phy_ofdm(dev, 0x22, 0x16); rtl8225_rf_init() 422 rtl8225_write_phy_ofdm(dev, 0x24, 0x46); rtl8225_rf_init() 423 rtl8225_write_phy_ofdm(dev, 0x25, 0x20); rtl8225_rf_init() 424 rtl8225_write_phy_ofdm(dev, 0x26, 0x90); rtl8225_rf_init() 425 rtl8225_write_phy_ofdm(dev, 0x27, 0x88); rtl8225_rf_init() 427 rtl8225_write_phy_ofdm(dev, 0x0d, rtl8225_gain[2 4]); rtl8225_rf_init() 428 rtl8225_write_phy_ofdm(dev, 0x1b, rtl8225_gain[2 * 4 + 2]); rtl8225_rf_init() 429 rtl8225_write_phy_ofdm(dev, 0x1d, rtl8225_gain[2 * 4 + 3]); rtl8225_rf_init() 430 rtl8225_write_phy_ofdm(dev, 0x23, rtl8225_gain[2 * 4 + 1]); rtl8225_rf_init() 432 rtl8225_write_phy_cck(dev, 0x00, 0x98); rtl8225_rf_init() 433 rtl8225_write_phy_cck(dev, 0x03, 0x20); rtl8225_rf_init() 434 rtl8225_write_phy_cck(dev, 0x04, 0x7e); rtl8225_rf_init() 435 rtl8225_write_phy_cck(dev, 0x05, 0x12); rtl8225_rf_init() 436 rtl8225_write_phy_cck(dev, 0x06, 0xfc); rtl8225_rf_init() 437 rtl8225_write_phy_cck(dev, 0x07, 0x78); rtl8225_rf_init() 438 rtl8225_write_phy_cck(dev, 0x08, 0x2e); rtl8225_rf_init() 439 rtl8225_write_phy_cck(dev, 0x10, 0x9b); rtl8225_rf_init() 440 rtl8225_write_phy_cck(dev, 0x11, 0x88); rtl8225_rf_init() 441 rtl8225_write_phy_cck(dev, 0x12, 0x47); rtl8225_rf_init() 442 rtl8225_write_phy_cck(dev, 0x13, 0xd0); rtl8225_rf_init() 443 rtl8225_write_phy_cck(dev, 0x19, 0x00); rtl8225_rf_init() 444 rtl8225_write_phy_cck(dev, 0x1a, 0xa0); rtl8225_rf_init() 445 rtl8225_write_phy_cck(dev, 0x1b, 0x08); rtl8225_rf_init() 446 rtl8225_write_phy_cck(dev, 0x40, 0x86); rtl8225_rf_init() 447 rtl8225_write_phy_cck(dev, 0x41, 0x8d); rtl8225_rf_init() 448 rtl8225_write_phy_cck(dev, 0x42, 0x15); rtl8225_rf_init() 449 rtl8225_write_phy_cck(dev, 0x43, 0x18); rtl8225_rf_init() 450 rtl8225_write_phy_cck(dev, 0x44, 0x1f); rtl8225_rf_init() 451 rtl8225_write_phy_cck(dev, 0x45, 0x1e); rtl8225_rf_init() 452 rtl8225_write_phy_cck(dev, 0x46, 0x1a); rtl8225_rf_init() 453 rtl8225_write_phy_cck(dev, 0x47, 0x15); rtl8225_rf_init() 454 rtl8225_write_phy_cck(dev, 0x48, 0x10); rtl8225_rf_init() 455 rtl8225_write_phy_cck(dev, 0x49, 0x0a); rtl8225_rf_init() 456 rtl8225_write_phy_cck(dev, 0x4a, 0x05); rtl8225_rf_init() 457 rtl8225_write_phy_cck(dev, 0x4b, 0x02); rtl8225_rf_init() 458 rtl8225_write_phy_cck(dev, 0x4c, 0x05); rtl8225_rf_init() 462 rtl8225_rf_set_tx_power(dev, 1); rtl8225_rf_init() 465 rtl8225_write_phy_cck(dev, 0x10, 0x9b); /* B: 0xDB / rtl8225_rf_init() 466 rtl8225_write_phy_ofdm(dev, 0x26, 0x90); / B: 0x10 / rtl8225_rf_init() 473 rtl8225_write(dev, 0x0c, 0x50); rtl8225_rf_init() 474 rtl8225_write_phy_ofdm(dev, 0x0d, rtl8225_gain[2 4]); rtl8225_rf_init() 475 rtl8225_write_phy_ofdm(dev, 0x1b, rtl8225_gain[2 * 4 + 2]); rtl8225_rf_init() 476 rtl8225_write_phy_ofdm(dev, 0x1d, rtl8225_gain[2 * 4 + 3]); rtl8225_rf_init() 477 rtl8225_write_phy_ofdm(dev, 0x23, rtl8225_gain[2 * 4 + 1]); rtl8225_rf_init() 478 rtl8225_write_phy_cck(dev, 0x41, rtl8225_threshold[2]); rtl8225_rf_init() 532 static void rtl8225z2_rf_set_tx_power(struct ieee80211_hw dev, int channel) rtl8225z2_rf_set_tx_power() argument 534 struct rtl8187_priv priv = dev->priv; rtl8225z2_rf_set_tx_power() 560 rtl8225_write_phy_cck(dev, 0x44 + i, tmp++); rtl8225z2_rf_set_tx_power() 577 rtl8225_write_phy_ofdm(dev, 2, 0x42); rtl8225z2_rf_set_tx_power() 578 rtl8225_write_phy_ofdm(dev, 5, 0x00); rtl8225z2_rf_set_tx_power() 579 rtl8225_write_phy_ofdm(dev, 6, 0x40); rtl8225z2_rf_set_tx_power() 580 rtl8225_write_phy_ofdm(dev, 7, 0x00); rtl8225z2_rf_set_tx_power() 581 rtl8225_write_phy_ofdm(dev, 8, 0x40); rtl8225z2_rf_set_tx_power() 588 static void rtl8225z2_b_rf_set_tx_power(struct ieee80211_hw dev, int channel) rtl8225z2_b_rf_set_tx_power() argument 590 struct rtl8187_priv priv = dev->priv; rtl8225z2_b_rf_set_tx_power() 636 rtl8225_write_phy_cck(dev, 0x44 + i, tmp++); rtl8225z2_b_rf_set_tx_power() 646 rtl8225_write_phy_ofdm(dev, 0x87, 0x60); rtl8225z2_b_rf_set_tx_power() 647 rtl8225_write_phy_ofdm(dev, 0x89, 0x60); rtl8225z2_b_rf_set_tx_power() 649 rtl8225_write_phy_ofdm(dev, 0x87, 0x5c); rtl8225z2_b_rf_set_tx_power() 650 rtl8225_write_phy_ofdm(dev, 0x89, 0x5c); rtl8225z2_b_rf_set_tx_power() 654 rtl8225_write_phy_ofdm(dev, 0x87, 0x5c); rtl8225z2_b_rf_set_tx_power() 655 rtl8225_write_phy_ofdm(dev, 0x89, 0x5c); rtl8225z2_b_rf_set_tx_power() 657 rtl8225_write_phy_ofdm(dev, 0x87, 0x54); rtl8225z2_b_rf_set_tx_power() 658 rtl8225_write_phy_ofdm(dev, 0x89, 0x54); rtl8225z2_b_rf_set_tx_power() 660 rtl8225_write_phy_ofdm(dev, 0x87, 0x50); rtl8225z2_b_rf_set_tx_power() 661 rtl8225_write_phy_ofdm(dev, 0x89, 0x50); rtl8225z2_b_rf_set_tx_power() 692 static void rtl8225z2_rf_init(struct ieee80211_hw dev) rtl8225z2_rf_init() argument 694 struct rtl8187_priv priv = dev->priv; rtl8225z2_rf_init() 697 rtl8225_write(dev, 0x0, 0x2BF); rtl8225z2_rf_init() 698 rtl8225_write(dev, 0x1, 0xEE0); rtl8225z2_rf_init() 699 rtl8225_write(dev, 0x2, 0x44D); rtl8225z2_rf_init() 700 rtl8225_write(dev, 0x3, 0x441); rtl8225z2_rf_init() 701 rtl8225_write(dev, 0x4, 0x8C3); rtl8225z2_rf_init() 702 rtl8225_write(dev, 0x5, 0xC72); rtl8225z2_rf_init() 703 rtl8225_write(dev, 0x6, 0x0E6); rtl8225z2_rf_init() 704 rtl8225_write(dev, 0x7, 0x82A); rtl8225z2_rf_init() 705 rtl8225_write(dev, 0x8, 0x03F); rtl8225z2_rf_init() 706 rtl8225_write(dev, 0x9, 0x335); rtl8225z2_rf_init() 707 rtl8225_write(dev, 0xa, 0x9D4); rtl8225z2_rf_init() 708 rtl8225_write(dev, 0xb, 0x7BB); rtl8225z2_rf_init() 709 rtl8225_write(dev, 0xc, 0x850); rtl8225z2_rf_init() 710 rtl8225_write(dev, 0xd, 0xCDF); rtl8225z2_rf_init() 711 rtl8225_write(dev, 0xe, 0x02B); rtl8225z2_rf_init() 712 rtl8225_write(dev, 0xf, 0x114); rtl8225z2_rf_init() 715 rtl8225_write(dev, 0x0, 0x1B7); rtl8225z2_rf_init() 718 rtl8225_write(dev, 0x1, i + 1); rtl8225z2_rf_init() 719 rtl8225_write(dev, 0x2, rtl8225z2_rxgain[i]); rtl8225z2_rf_init() 722 rtl8225_write(dev, 0x3, 0x080); rtl8225z2_rf_init() 723 rtl8225_write(dev, 0x5, 0x004); rtl8225z2_rf_init() 724 rtl8225_write(dev, 0x0, 0x0B7); rtl8225z2_rf_init() 725 rtl8225_write(dev, 0x2, 0xc4D); rtl8225z2_rf_init() 728 rtl8225_write(dev, 0x2, 0x44D); rtl8225z2_rf_init() 731 if (!(rtl8225_read(dev, 6) & (1 << 7))) { rtl8225z2_rf_init() 732 rtl8225_write(dev, 0x02, 0x0C4D); rtl8225z2_rf_init() 734 rtl8225_write(dev, 0x02, 0x044D); rtl8225z2_rf_init() 736 if (!(rtl8225_read(dev, 6) & (1 << 7))) rtl8225z2_rf_init() 737 wiphy_warn(dev->wiphy, "RF Calibration Failed! %x\n", rtl8225z2_rf_init() 738 rtl8225_read(dev, 6)); rtl8225z2_rf_init() 743 rtl8225_write(dev, 0x0, 0x2BF); rtl8225z2_rf_init() 746 rtl8225_write_phy_ofdm(dev, 0xB, rtl8225_agc[i]); rtl8225z2_rf_init() 747 rtl8225_write_phy_ofdm(dev, 0xA, 0x80 + i); rtl8225z2_rf_init() 752 rtl8225_write_phy_ofdm(dev, 0x00, 0x01); rtl8225z2_rf_init() 753 rtl8225_write_phy_ofdm(dev, 0x01, 0x02); rtl8225z2_rf_init() 754 rtl8225_write_phy_ofdm(dev, 0x02, 0x42); rtl8225z2_rf_init() 755 rtl8225_write_phy_ofdm(dev, 0x03, 0x00); rtl8225z2_rf_init() 756 rtl8225_write_phy_ofdm(dev, 0x04, 0x00); rtl8225z2_rf_init() 757 rtl8225_write_phy_ofdm(dev, 0x05, 0x00); rtl8225z2_rf_init() 758 rtl8225_write_phy_ofdm(dev, 0x06, 0x40); rtl8225z2_rf_init() 759 rtl8225_write_phy_ofdm(dev, 0x07, 0x00); rtl8225z2_rf_init() 760 rtl8225_write_phy_ofdm(dev, 0x08, 0x40); rtl8225z2_rf_init() 761 rtl8225_write_phy_ofdm(dev, 0x09, 0xfe); rtl8225z2_rf_init() 762 rtl8225_write_phy_ofdm(dev, 0x0a, 0x08); rtl8225z2_rf_init() 763 rtl8225_write_phy_ofdm(dev, 0x0b, 0x80); rtl8225z2_rf_init() 764 rtl8225_write_phy_ofdm(dev, 0x0c, 0x01); rtl8225z2_rf_init() 765 rtl8225_write_phy_ofdm(dev, 0x0d, 0x43); rtl8225z2_rf_init() 766 rtl8225_write_phy_ofdm(dev, 0x0e, 0xd3); rtl8225z2_rf_init() 767 rtl8225_write_phy_ofdm(dev, 0x0f, 0x38); rtl8225z2_rf_init() 768 rtl8225_write_phy_ofdm(dev, 0x10, 0x84); rtl8225z2_rf_init() 769 rtl8225_write_phy_ofdm(dev, 0x11, 0x07); rtl8225z2_rf_init() 770 rtl8225_write_phy_ofdm(dev, 0x12, 0x20); rtl8225z2_rf_init() 771 rtl8225_write_phy_ofdm(dev, 0x13, 0x20); rtl8225z2_rf_init() 772 rtl8225_write_phy_ofdm(dev, 0x14, 0x00); rtl8225z2_rf_init() 773 rtl8225_write_phy_ofdm(dev, 0x15, 0x40); rtl8225z2_rf_init() 774 rtl8225_write_phy_ofdm(dev, 0x16, 0x00); rtl8225z2_rf_init() 775 rtl8225_write_phy_ofdm(dev, 0x17, 0x40); rtl8225z2_rf_init() 776 rtl8225_write_phy_ofdm(dev, 0x18, 0xef); rtl8225z2_rf_init() 777 rtl8225_write_phy_ofdm(dev, 0x19, 0x19); rtl8225z2_rf_init() 778 rtl8225_write_phy_ofdm(dev, 0x1a, 0x20); rtl8225z2_rf_init() 779 rtl8225_write_phy_ofdm(dev, 0x1b, 0x15); rtl8225z2_rf_init() 780 rtl8225_write_phy_ofdm(dev, 0x1c, 0x04); rtl8225z2_rf_init() 781 rtl8225_write_phy_ofdm(dev, 0x1d, 0xc5); rtl8225z2_rf_init() 782 rtl8225_write_phy_ofdm(dev, 0x1e, 0x95); rtl8225z2_rf_init() 783 rtl8225_write_phy_ofdm(dev, 0x1f, 0x75); rtl8225z2_rf_init() 784 rtl8225_write_phy_ofdm(dev, 0x20, 0x1f); rtl8225z2_rf_init() 785 rtl8225_write_phy_ofdm(dev, 0x21, 0x17); rtl8225z2_rf_init() 786 rtl8225_write_phy_ofdm(dev, 0x22, 0x16); rtl8225z2_rf_init() 787 rtl8225_write_phy_ofdm(dev, 0x23, 0x80); rtl8225z2_rf_init() 788 rtl8225_write_phy_ofdm(dev, 0x24, 0x46); rtl8225z2_rf_init() 789 rtl8225_write_phy_ofdm(dev, 0x25, 0x00); rtl8225z2_rf_init() 790 rtl8225_write_phy_ofdm(dev, 0x26, 0x90); rtl8225z2_rf_init() 791 rtl8225_write_phy_ofdm(dev, 0x27, 0x88); rtl8225z2_rf_init() 793 rtl8225_write_phy_ofdm(dev, 0x0b, rtl8225z2_gain_bg[4 * 3]); rtl8225z2_rf_init() 794 rtl8225_write_phy_ofdm(dev, 0x1b, rtl8225z2_gain_bg[4 * 3 + 1]); rtl8225z2_rf_init() 795 rtl8225_write_phy_ofdm(dev, 0x1d, rtl8225z2_gain_bg[4 * 3 + 2]); rtl8225z2_rf_init() 796 rtl8225_write_phy_ofdm(dev, 0x21, 0x37); rtl8225z2_rf_init() 798 rtl8225_write_phy_cck(dev, 0x00, 0x98); rtl8225z2_rf_init() 799 rtl8225_write_phy_cck(dev, 0x03, 0x20); rtl8225z2_rf_init() 800 rtl8225_write_phy_cck(dev, 0x04, 0x7e); rtl8225z2_rf_init() 801 rtl8225_write_phy_cck(dev, 0x05, 0x12); rtl8225z2_rf_init() 802 rtl8225_write_phy_cck(dev, 0x06, 0xfc); rtl8225z2_rf_init() 803 rtl8225_write_phy_cck(dev, 0x07, 0x78); rtl8225z2_rf_init() 804 rtl8225_write_phy_cck(dev, 0x08, 0x2e); rtl8225z2_rf_init() 805 rtl8225_write_phy_cck(dev, 0x10, 0x9b); rtl8225z2_rf_init() 806 rtl8225_write_phy_cck(dev, 0x11, 0x88); rtl8225z2_rf_init() 807 rtl8225_write_phy_cck(dev, 0x12, 0x47); rtl8225z2_rf_init() 808 rtl8225_write_phy_cck(dev, 0x13, 0xd0); rtl8225z2_rf_init() 809 rtl8225_write_phy_cck(dev, 0x19, 0x00); rtl8225z2_rf_init() 810 rtl8225_write_phy_cck(dev, 0x1a, 0xa0); rtl8225z2_rf_init() 811 rtl8225_write_phy_cck(dev, 0x1b, 0x08); rtl8225z2_rf_init() 812 rtl8225_write_phy_cck(dev, 0x40, 0x86); rtl8225z2_rf_init() 813 rtl8225_write_phy_cck(dev, 0x41, 0x8d); rtl8225z2_rf_init() 814 rtl8225_write_phy_cck(dev, 0x42, 0x15); rtl8225z2_rf_init() 815 rtl8225_write_phy_cck(dev, 0x43, 0x18); rtl8225z2_rf_init() 816 rtl8225_write_phy_cck(dev, 0x44, 0x36); rtl8225z2_rf_init() 817 rtl8225_write_phy_cck(dev, 0x45, 0x35); rtl8225z2_rf_init() 818 rtl8225_write_phy_cck(dev, 0x46, 0x2e); rtl8225z2_rf_init() 819 rtl8225_write_phy_cck(dev, 0x47, 0x25); rtl8225z2_rf_init() 820 rtl8225_write_phy_cck(dev, 0x48, 0x1c); rtl8225z2_rf_init() 821 rtl8225_write_phy_cck(dev, 0x49, 0x12); rtl8225z2_rf_init() 822 rtl8225_write_phy_cck(dev, 0x4a, 0x09); rtl8225z2_rf_init() 823 rtl8225_write_phy_cck(dev, 0x4b, 0x04); rtl8225z2_rf_init() 824 rtl8225_write_phy_cck(dev, 0x4c, 0x05); rtl8225z2_rf_init() 828 rtl8225z2_rf_set_tx_power(dev, 1); rtl8225z2_rf_init() 831 rtl8225_write_phy_cck(dev, 0x10, 0x9b); /* B: 0xDB / rtl8225z2_rf_init() 832 rtl8225_write_phy_ofdm(dev, 0x26, 0x90); / B: 0x10 / rtl8225z2_rf_init() 839 static void rtl8225z2_b_rf_init(struct ieee80211_hw dev) rtl8225z2_b_rf_init() argument 841 struct rtl8187_priv priv = dev->priv; rtl8225z2_b_rf_init() 844 rtl8225_write(dev, 0x0, 0x0B7); rtl8225z2_b_rf_init() 845 rtl8225_write(dev, 0x1, 0xEE0); rtl8225z2_b_rf_init() 846 rtl8225_write(dev, 0x2, 0x44D); rtl8225z2_b_rf_init() 847 rtl8225_write(dev, 0x3, 0x441); rtl8225z2_b_rf_init() 848 rtl8225_write(dev, 0x4, 0x8C3); rtl8225z2_b_rf_init() 849 rtl8225_write(dev, 0x5, 0xC72); rtl8225z2_b_rf_init() 850 rtl8225_write(dev, 0x6, 0x0E6); rtl8225z2_b_rf_init() 851 rtl8225_write(dev, 0x7, 0x82A); rtl8225z2_b_rf_init() 852 rtl8225_write(dev, 0x8, 0x03F); rtl8225z2_b_rf_init() 853 rtl8225_write(dev, 0x9, 0x335); rtl8225z2_b_rf_init() 854 rtl8225_write(dev, 0xa, 0x9D4); rtl8225z2_b_rf_init() 855 rtl8225_write(dev, 0xb, 0x7BB); rtl8225z2_b_rf_init() 856 rtl8225_write(dev, 0xc, 0x850); rtl8225z2_b_rf_init() 857 rtl8225_write(dev, 0xd, 0xCDF); rtl8225z2_b_rf_init() 858 rtl8225_write(dev, 0xe, 0x02B); rtl8225z2_b_rf_init() 859 rtl8225_write(dev, 0xf, 0x114); rtl8225z2_b_rf_init() 861 rtl8225_write(dev, 0x0, 0x1B7); rtl8225z2_b_rf_init() 864 rtl8225_write(dev, 0x1, i + 1); rtl8225z2_b_rf_init() 865 rtl8225_write(dev, 0x2, rtl8225z2_rxgain[i]); rtl8225z2_b_rf_init() 868 rtl8225_write(dev, 0x3, 0x080); rtl8225z2_b_rf_init() 869 rtl8225_write(dev, 0x5, 0x004); rtl8225z2_b_rf_init() 870 rtl8225_write(dev, 0x0, 0x0B7); rtl8225z2_b_rf_init() 872 rtl8225_write(dev, 0x2, 0xC4D); rtl8225z2_b_rf_init() 874 rtl8225_write(dev, 0x2, 0x44D); rtl8225z2_b_rf_init() 875 rtl8225_write(dev, 0x0, 0x2BF); rtl8225z2_b_rf_init() 881 rtl8225_write_phy_ofdm(dev, 0x80, 0x12); rtl8225z2_b_rf_init() 883 rtl8225_write_phy_ofdm(dev, 0xF, rtl8225z2_agc[i]); rtl8225z2_b_rf_init() 884 rtl8225_write_phy_ofdm(dev, 0xE, 0x80 + i); rtl8225z2_b_rf_init() 885 rtl8225_write_phy_ofdm(dev, 0xE, 0); rtl8225z2_b_rf_init() 887 rtl8225_write_phy_ofdm(dev, 0x80, 0x10); rtl8225z2_b_rf_init() 890 rtl8225_write_phy_ofdm(dev, i, rtl8225z2_ofdm[i]); rtl8225z2_b_rf_init() 892 rtl8225_write_phy_ofdm(dev, 0x97, 0x46); rtl8225z2_b_rf_init() 893 rtl8225_write_phy_ofdm(dev, 0xa4, 0xb6); rtl8225z2_b_rf_init() 894 rtl8225_write_phy_ofdm(dev, 0x85, 0xfc); rtl8225z2_b_rf_init() 895 rtl8225_write_phy_cck(dev, 0xc1, 0x88); rtl8225z2_b_rf_init() 898 static void rtl8225_rf_stop(struct ieee80211_hw dev) rtl8225_rf_stop() argument 900 rtl8225_write(dev, 0x4, 0x1f); rtl8225_rf_stop() 903 static void rtl8225_rf_set_channel(struct ieee80211_hw dev, rtl8225_rf_set_channel() argument 906 struct rtl8187_priv priv = dev->priv; rtl8225_rf_set_channel() 911 rtl8225_rf_set_tx_power(dev, chan); rtl8225_rf_set_channel() 913 rtl8225z2_rf_set_tx_power(dev, chan); rtl8225_rf_set_channel() 915 rtl8225z2_b_rf_set_tx_power(dev, chan); rtl8225_rf_set_channel() 917 rtl8225_write(dev, 0x7, rtl8225_chan[chan - 1]); rtl8225_rf_set_channel() 942 const struct rtl818x_rf_ops * rtl8187_detect_rf(struct ieee80211_hw dev) rtl8187_detect_rf() argument 945 struct rtl8187_priv priv = dev->priv; rtl8187_detect_rf() 948 rtl8225_write(dev, 0, 0x1B7); rtl8187_detect_rf() 950 reg8 = rtl8225_read(dev, 8); rtl8187_detect_rf() 951 reg9 = rtl8225_read(dev, 9); rtl8187_detect_rf() 953 rtl8225_write(dev, 0, 0x0B7); rtl8187_detect_rf()
/linux-4.1.27/drivers/scsi/libsas/
H A D	sas_discover.c	39 void sas_init_dev(struct domain_device dev) sas_init_dev() argument 41 switch (dev->dev_type) { sas_init_dev() 43 INIT_LIST_HEAD(&dev->ssp_dev.eh_list_node); sas_init_dev() 47 INIT_LIST_HEAD(&dev->ex_dev.children); sas_init_dev() 48 mutex_init(&dev->ex_dev.cmd_mutex); sas_init_dev() 70 struct domain_device dev; sas_get_port_device() local 73 dev = sas_alloc_device(); sas_get_port_device() 74 if (!dev) sas_get_port_device() 80 sas_put_device(dev); sas_get_port_device() 85 memcpy(dev->frame_rcvd, phy->frame_rcvd, min(sizeof(dev->frame_rcvd), sas_get_port_device() 90 if (dev->frame_rcvd[0] == 0x34 && port->oob_mode == SATA_OOB_MODE) { sas_get_port_device() 92 (struct dev_to_host_fis ) dev->frame_rcvd; sas_get_port_device() 96 dev->dev_type = SAS_SATA_PM; sas_get_port_device() 98 dev->dev_type = SAS_SATA_DEV; sas_get_port_device() 99 dev->tproto = SAS_PROTOCOL_SATA; sas_get_port_device() 102 (struct sas_identify_frame ) dev->frame_rcvd; sas_get_port_device() 103 dev->dev_type = id->dev_type; sas_get_port_device() 104 dev->iproto = id->initiator_bits; sas_get_port_device() 105 dev->tproto = id->target_bits; sas_get_port_device() 108 sas_init_dev(dev); sas_get_port_device() 110 dev->port = port; sas_get_port_device() 111 switch (dev->dev_type) { sas_get_port_device() 113 rc = sas_ata_init(dev); sas_get_port_device() 131 printk("ERROR: Unidentified device type %d\n", dev->dev_type); sas_get_port_device() 137 sas_put_device(dev); sas_get_port_device() 142 memcpy(dev->sas_addr, port->attached_sas_addr, SAS_ADDR_SIZE); sas_get_port_device() 143 sas_fill_in_rphy(dev, rphy); sas_get_port_device() 144 sas_hash_addr(dev->hashed_sas_addr, dev->sas_addr); sas_get_port_device() 145 port->port_dev = dev; sas_get_port_device() 146 dev->linkrate = port->linkrate; sas_get_port_device() 147 dev->min_linkrate = port->linkrate; sas_get_port_device() 148 dev->max_linkrate = port->linkrate; sas_get_port_device() 149 dev->pathways = port->num_phys; sas_get_port_device() 154 sas_device_set_phy(dev, port->port); sas_get_port_device() 156 dev->rphy = rphy; sas_get_port_device() 157 get_device(&dev->rphy->dev); sas_get_port_device() 159 if (dev_is_sata(dev) \|\| dev->dev_type == SAS_END_DEVICE) sas_get_port_device() 160 list_add_tail(&dev->disco_list_node, &port->disco_list); sas_get_port_device() 163 list_add_tail(&dev->dev_list_node, &port->dev_list); sas_get_port_device() 169 sas_phy_set_target(phy, dev); sas_get_port_device() 177 int sas_notify_lldd_dev_found(struct domain_device dev) sas_notify_lldd_dev_found() argument 180 struct sas_ha_struct sas_ha = dev->port->ha; sas_notify_lldd_dev_found() 187 res = i->dft->lldd_dev_found(dev); sas_notify_lldd_dev_found() 191 dev_name(sas_ha->dev), sas_notify_lldd_dev_found() 192 SAS_ADDR(dev->sas_addr), res); sas_notify_lldd_dev_found() 194 set_bit(SAS_DEV_FOUND, &dev->state); sas_notify_lldd_dev_found() 195 kref_get(&dev->kref); sas_notify_lldd_dev_found() 200 void sas_notify_lldd_dev_gone(struct domain_device dev) sas_notify_lldd_dev_gone() argument 202 struct sas_ha_struct sas_ha = dev->port->ha; sas_notify_lldd_dev_gone() 209 if (test_and_clear_bit(SAS_DEV_FOUND, &dev->state)) { sas_notify_lldd_dev_gone() 210 i->dft->lldd_dev_gone(dev); sas_notify_lldd_dev_gone() 211 sas_put_device(dev); sas_notify_lldd_dev_gone() 217 struct domain_device dev, n; sas_probe_devices() local 224 list_for_each_entry(dev, &port->disco_list, disco_list_node) { sas_probe_devices() 226 list_add_tail(&dev->dev_list_node, &port->dev_list); sas_probe_devices() 232 list_for_each_entry_safe(dev, n, &port->disco_list, disco_list_node) { sas_probe_devices() 235 err = sas_rphy_add(dev->rphy); sas_probe_devices() 237 sas_fail_probe(dev, __func__, err); sas_probe_devices() 239 list_del_init(&dev->disco_list_node); sas_probe_devices() 246 struct domain_device dev; sas_suspend_devices() local 260 list_for_each_entry(dev, &port->dev_list, dev_list_node) sas_suspend_devices() 261 sas_notify_lldd_dev_gone(dev); sas_suspend_devices() 290 int sas_discover_end_dev(struct domain_device dev) sas_discover_end_dev() argument 294 res = sas_notify_lldd_dev_found(dev); sas_discover_end_dev() 297 sas_discover_event(dev->port, DISCE_PROBE); sas_discover_end_dev() 306 struct domain_device dev = container_of(kref, typeof(dev), kref); sas_free_device() local 308 put_device(&dev->rphy->dev); sas_free_device() 309 dev->rphy = NULL; sas_free_device() 311 if (dev->parent) sas_free_device() 312 sas_put_device(dev->parent); sas_free_device() 314 sas_port_put_phy(dev->phy); sas_free_device() 315 dev->phy = NULL; sas_free_device() 318 if (dev->dev_type == SAS_EDGE_EXPANDER_DEVICE \|\| dev->dev_type == SAS_FANOUT_EXPANDER_DEVICE) sas_free_device() 319 kfree(dev->ex_dev.ex_phy); sas_free_device() 321 if (dev_is_sata(dev) && dev->sata_dev.ap) { sas_free_device() 322 ata_sas_port_destroy(dev->sata_dev.ap); sas_free_device() 323 dev->sata_dev.ap = NULL; sas_free_device() 326 kfree(dev); sas_free_device() 329 static void sas_unregister_common_dev(struct asd_sas_port port, struct domain_device dev) sas_unregister_common_dev() argument 333 sas_notify_lldd_dev_gone(dev); sas_unregister_common_dev() 334 if (!dev->parent) sas_unregister_common_dev() 335 dev->port->port_dev = NULL; sas_unregister_common_dev() 337 list_del_init(&dev->siblings); sas_unregister_common_dev() 340 list_del_init(&dev->dev_list_node); sas_unregister_common_dev() 341 if (dev_is_sata(dev)) sas_unregister_common_dev() 342 sas_ata_end_eh(dev->sata_dev.ap); sas_unregister_common_dev() 346 if (dev->dev_type == SAS_END_DEVICE && sas_unregister_common_dev() 347 !list_empty(&dev->ssp_dev.eh_list_node)) { sas_unregister_common_dev() 348 list_del_init(&dev->ssp_dev.eh_list_node); sas_unregister_common_dev() 353 sas_put_device(dev); sas_unregister_common_dev() 358 struct domain_device dev, n; sas_destruct_devices() local 364 list_for_each_entry_safe(dev, n, &port->destroy_list, disco_list_node) { sas_destruct_devices() 365 list_del_init(&dev->disco_list_node); sas_destruct_devices() 367 sas_remove_children(&dev->rphy->dev); sas_destruct_devices() 368 sas_rphy_delete(dev->rphy); sas_destruct_devices() 369 sas_unregister_common_dev(port, dev); sas_destruct_devices() 373 void sas_unregister_dev(struct asd_sas_port port, struct domain_device dev) sas_unregister_dev() argument 375 if (!test_bit(SAS_DEV_DESTROY, &dev->state) && sas_unregister_dev() 376 !list_empty(&dev->disco_list_node)) { sas_unregister_dev() 378 list_del_init(&dev->disco_list_node); sas_unregister_dev() 379 sas_rphy_free(dev->rphy); sas_unregister_dev() 380 sas_unregister_common_dev(port, dev); sas_unregister_dev() 384 if (!test_and_set_bit(SAS_DEV_DESTROY, &dev->state)) { sas_unregister_dev() 385 sas_rphy_unlink(dev->rphy); sas_unregister_dev() 386 list_move_tail(&dev->disco_list_node, &port->destroy_list); sas_unregister_dev() 387 sas_discover_event(dev->port, DISCE_DESTRUCT); sas_unregister_dev() 393 struct domain_device dev, n; sas_unregister_domain_devices() local 395 list_for_each_entry_safe_reverse(dev, n, &port->dev_list, dev_list_node) { sas_unregister_domain_devices() 397 set_bit(SAS_DEV_GONE, &dev->state); sas_unregister_domain_devices() 398 sas_unregister_dev(port, dev); sas_unregister_domain_devices() 401 list_for_each_entry_safe(dev, n, &port->disco_list, disco_list_node) sas_unregister_domain_devices() 402 sas_unregister_dev(port, dev); sas_unregister_domain_devices() 408 void sas_device_set_phy(struct domain_device dev, struct sas_port port) sas_device_set_phy() argument 413 if (!dev) sas_device_set_phy() 416 ha = dev->port->ha; sas_device_set_phy() 422 sas_port_put_phy(dev->phy); sas_device_set_phy() 423 dev->phy = new_phy; sas_device_set_phy() 441 struct domain_device *dev; sas_discover_domain() local 454 dev = port->port_dev; sas_discover_domain() 459 switch (dev->dev_type) { sas_discover_domain() 461 error = sas_discover_end_dev(dev); sas_discover_domain() 465 error = sas_discover_root_expander(dev); sas_discover_domain() 470 error = sas_discover_sata(dev); sas_discover_domain() 478 SAS_DPRINTK("unhandled device %d\n", dev->dev_type); sas_discover_domain() 483 sas_rphy_free(dev->rphy); sas_discover_domain() 484 list_del_init(&dev->disco_list_node); sas_discover_domain() 486 list_del_init(&dev->dev_list_node); sas_discover_domain() 489 sas_put_device(dev); sas_discover_domain()
/linux-4.1.27/drivers/pnp/pnpacpi/
H A D	core.c	56 static int pnpacpi_get_resources(struct pnp_dev dev) pnpacpi_get_resources() argument 58 pnp_dbg(&dev->dev, "get resources\n"); pnpacpi_get_resources() 59 return pnpacpi_parse_allocated_resource(dev); pnpacpi_get_resources() 62 static int pnpacpi_set_resources(struct pnp_dev dev) pnpacpi_set_resources() argument 68 pnp_dbg(&dev->dev, "set resources\n"); pnpacpi_set_resources() 70 acpi_dev = ACPI_COMPANION(&dev->dev); pnpacpi_set_resources() 72 dev_dbg(&dev->dev, "ACPI device not found in %s!\n", __func__); pnpacpi_set_resources() 76 if (WARN_ON_ONCE(acpi_dev != dev->data)) pnpacpi_set_resources() 77 dev->data = acpi_dev; pnpacpi_set_resources() 83 ret = pnpacpi_build_resource_template(dev, &buffer); pnpacpi_set_resources() 87 ret = pnpacpi_encode_resources(dev, &buffer); pnpacpi_set_resources() 103 static int pnpacpi_disable_resources(struct pnp_dev dev) pnpacpi_disable_resources() argument 108 dev_dbg(&dev->dev, "disable resources\n"); pnpacpi_disable_resources() 110 acpi_dev = ACPI_COMPANION(&dev->dev); pnpacpi_disable_resources() 112 dev_dbg(&dev->dev, "ACPI device not found in %s!\n", __func__); pnpacpi_disable_resources() 116 / acpi_unregister_gsi(pnp_irq(dev, 0)); / pnpacpi_disable_resources() 129 static bool pnpacpi_can_wakeup(struct pnp_dev dev) pnpacpi_can_wakeup() argument 131 struct acpi_device acpi_dev = ACPI_COMPANION(&dev->dev); pnpacpi_can_wakeup() 134 dev_dbg(&dev->dev, "ACPI device not found in %s!\n", __func__); pnpacpi_can_wakeup() 141 static int pnpacpi_suspend(struct pnp_dev dev, pm_message_t state) pnpacpi_suspend() argument 143 struct acpi_device acpi_dev = ACPI_COMPANION(&dev->dev); pnpacpi_suspend() 147 dev_dbg(&dev->dev, "ACPI device not found in %s!\n", __func__); pnpacpi_suspend() 151 if (device_can_wakeup(&dev->dev)) { pnpacpi_suspend() 152 error = acpi_pm_device_sleep_wake(&dev->dev, pnpacpi_suspend() 153 device_may_wakeup(&dev->dev)); pnpacpi_suspend() 159 int power_state = acpi_pm_device_sleep_state(&dev->dev, NULL, pnpacpi_suspend() 177 static int pnpacpi_resume(struct pnp_dev dev) pnpacpi_resume() argument 179 struct acpi_device acpi_dev = ACPI_COMPANION(&dev->dev); pnpacpi_resume() 183 dev_dbg(&dev->dev, "ACPI device not found in %s!\n", __func__); pnpacpi_resume() 187 if (device_may_wakeup(&dev->dev)) pnpacpi_resume() 188 acpi_pm_device_sleep_wake(&dev->dev, false); pnpacpi_resume() 224 struct pnp_dev dev; pnpacpi_add_device() local 247 dev = pnp_alloc_dev(&pnpacpi_protocol, num, pnpid); pnpacpi_add_device() 248 if (!dev) pnpacpi_add_device() 251 ACPI_COMPANION_SET(&dev->dev, device); pnpacpi_add_device() 252 dev->data = device; pnpacpi_add_device() 254 dev->active = device->status.enabled; pnpacpi_add_device() 256 dev->capabilities \|= PNP_CONFIGURABLE; pnpacpi_add_device() 257 dev->capabilities \|= PNP_READ; pnpacpi_add_device() 258 if (device->flags.dynamic_status && (dev->capabilities & PNP_CONFIGURABLE)) pnpacpi_add_device() 259 dev->capabilities \|= PNP_WRITE; pnpacpi_add_device() 261 dev->capabilities \|= PNP_REMOVABLE; pnpacpi_add_device() 263 dev->capabilities \|= PNP_DISABLE; pnpacpi_add_device() 266 strncpy(dev->name, acpi_device_name(device), sizeof(dev->name)); pnpacpi_add_device() 268 strncpy(dev->name, acpi_device_bid(device), sizeof(dev->name)); pnpacpi_add_device() 270 if (dev->active) pnpacpi_add_device() 271 pnpacpi_parse_allocated_resource(dev); pnpacpi_add_device() 273 if (dev->capabilities & PNP_CONFIGURABLE) pnpacpi_add_device() 274 pnpacpi_parse_resource_option_data(dev); pnpacpi_add_device() 281 pnp_add_id(dev, id->id); pnpacpi_add_device() 285 if (!dev->active) pnpacpi_add_device() 286 pnp_init_resources(dev); pnpacpi_add_device() 288 error = pnp_add_device(dev); pnpacpi_add_device() 290 put_device(&dev->dev); pnpacpi_add_device()
/linux-4.1.27/drivers/input/keyboard/
H A D	adp5520-keys.c	24 static void adp5520_keys_report_event(struct adp5520_keys dev, adp5520_keys_report_event() argument 31 input_report_key(dev->input, dev->keycode[i], value); adp5520_keys_report_event() 33 input_sync(dev->input); adp5520_keys_report_event() 39 struct adp5520_keys dev; adp5520_keys_notifier() local 43 dev = container_of(nb, struct adp5520_keys, notifier); adp5520_keys_notifier() 46 adp5520_read(dev->master, ADP5520_KP_INT_STAT_1, &reg_val_lo); adp5520_keys_notifier() 47 adp5520_read(dev->master, ADP5520_KP_INT_STAT_2, &reg_val_hi); adp5520_keys_notifier() 51 adp5520_read(dev->master, ADP5520_KP_INT_STAT_1, &reg_val_lo); adp5520_keys_notifier() 52 adp5520_read(dev->master, ADP5520_KP_INT_STAT_2, &reg_val_hi); adp5520_keys_notifier() 54 adp5520_keys_report_event(dev, keymask, 1); adp5520_keys_notifier() 58 adp5520_read(dev->master, ADP5520_KR_INT_STAT_1, &reg_val_lo); adp5520_keys_notifier() 59 adp5520_read(dev->master, ADP5520_KR_INT_STAT_2, &reg_val_hi); adp5520_keys_notifier() 63 adp5520_read(dev->master, ADP5520_KR_INT_STAT_1, &reg_val_lo); adp5520_keys_notifier() 64 adp5520_read(dev->master, ADP5520_KR_INT_STAT_2, &reg_val_hi); adp5520_keys_notifier() 66 adp5520_keys_report_event(dev, keymask, 0); adp5520_keys_notifier() 74 struct adp5520_keys_platform_data pdata = dev_get_platdata(&pdev->dev); adp5520_keys_probe() 76 struct adp5520_keys dev; adp5520_keys_probe() local 81 dev_err(&pdev->dev, "only ADP5520 supports Keypad\n"); adp5520_keys_probe() 86 dev_err(&pdev->dev, "missing platform data\n"); adp5520_keys_probe() 93 dev = devm_kzalloc(&pdev->dev, sizeof(dev), GFP_KERNEL); adp5520_keys_probe() 94 if (!dev) { adp5520_keys_probe() 95 dev_err(&pdev->dev, "failed to alloc memory\n"); adp5520_keys_probe() 99 input = devm_input_allocate_device(&pdev->dev); adp5520_keys_probe() 103 dev->master = pdev->dev.parent; adp5520_keys_probe() 104 dev->input = input; adp5520_keys_probe() 108 input->dev.parent = &pdev->dev; adp5520_keys_probe() 110 input_set_drvdata(input, dev); adp5520_keys_probe() 117 input->keycodesize = sizeof(dev->keycode[0]); adp5520_keys_probe() 119 input->keycode = dev->keycode; adp5520_keys_probe() 121 memcpy(dev->keycode, pdata->keymap, adp5520_keys_probe() 131 __set_bit(dev->keycode[i], input->keybit); adp5520_keys_probe() 136 dev_err(&pdev->dev, "unable to register input device\n"); adp5520_keys_probe() 142 ret = adp5520_set_bits(dev->master, ADP5520_GPIO_CFG_1, en_mask); adp5520_keys_probe() 151 ret \|= adp5520_set_bits(dev->master, ADP5520_LED_CONTROL, adp5520_keys_probe() 154 ret \|= adp5520_set_bits(dev->master, ADP5520_GPIO_PULLUP, adp5520_keys_probe() 158 dev_err(&pdev->dev, "failed to write\n"); adp5520_keys_probe() 162 dev->notifier.notifier_call = adp5520_keys_notifier; adp5520_keys_probe() 163 ret = adp5520_register_notifier(dev->master, &dev->notifier, adp5520_keys_probe() 166 dev_err(&pdev->dev, "failed to register notifier\n"); adp5520_keys_probe() 170 platform_set_drvdata(pdev, dev); adp5520_keys_probe() 176 struct adp5520_keys dev = platform_get_drvdata(pdev); adp5520_keys_remove() local 178 adp5520_unregister_notifier(dev->master, &dev->notifier, adp5520_keys_remove()
/linux-4.1.27/arch/sparc/include/asm/
H A D	dma-mapping.h	10 int dma_supported(struct device dev, u64 mask); 15 static inline void dma_cache_sync(struct device dev, void vaddr, size_t size, dma_cache_sync() argument 29 static inline struct dma_map_ops get_dma_ops(struct device dev) get_dma_ops() argument 36 if (dev->bus == &pci_bus_type) get_dma_ops() 46 static inline void dma_alloc_attrs(struct device dev, size_t size, dma_alloc_attrs() argument 50 struct dma_map_ops ops = get_dma_ops(dev); dma_alloc_attrs() 53 cpu_addr = ops->alloc(dev, size, dma_handle, flag, attrs); dma_alloc_attrs() 54 debug_dma_alloc_coherent(dev, size, dma_handle, cpu_addr); dma_alloc_attrs() 60 static inline void dma_free_attrs(struct device dev, size_t size, dma_free_attrs() argument 64 struct dma_map_ops ops = get_dma_ops(dev); dma_free_attrs() 66 debug_dma_free_coherent(dev, size, cpu_addr, dma_handle); dma_free_attrs() 67 ops->free(dev, size, cpu_addr, dma_handle, attrs); dma_free_attrs() 70 static inline int dma_mapping_error(struct device dev, dma_addr_t dma_addr) dma_mapping_error() argument 72 debug_dma_mapping_error(dev, dma_addr); dma_mapping_error() 76 static inline int dma_set_mask(struct device dev, u64 mask) dma_set_mask() argument 79 if (dev->bus == &pci_bus_type) { dma_set_mask() 80 if (!dev->dma_mask \|\| !dma_supported(dev, mask)) dma_set_mask() 82 dev->dma_mask = mask; dma_set_mask()
/linux-4.1.27/drivers/gpu/drm/tilcdc/
H A D	tilcdc_drv.c	52 static struct drm_framebuffer tilcdc_fb_create(struct drm_device dev, tilcdc_fb_create() argument 55 return drm_fb_cma_create(dev, file_priv, mode_cmd); tilcdc_fb_create() 58 static void tilcdc_fb_output_poll_changed(struct drm_device dev) tilcdc_fb_output_poll_changed() argument 60 struct tilcdc_drm_private priv = dev->dev_private; tilcdc_fb_output_poll_changed() 69 static int modeset_init(struct drm_device dev) modeset_init() argument 71 struct tilcdc_drm_private priv = dev->dev_private; modeset_init() 74 drm_mode_config_init(dev); modeset_init() 76 priv->crtc = tilcdc_crtc_create(dev); modeset_init() 80 mod->funcs->modeset_init(mod, dev); modeset_init() 85 dev_err(dev->dev, "no encoders/connectors found\n"); modeset_init() 86 drm_mode_config_cleanup(dev); modeset_init() 90 dev->mode_config.min_width = 0; modeset_init() 91 dev->mode_config.min_height = 0; modeset_init() 92 dev->mode_config.max_width = tilcdc_crtc_max_width(priv->crtc); modeset_init() 93 dev->mode_config.max_height = 2048; modeset_init() 94 dev->mode_config.funcs = &mode_config_funcs; modeset_init() 120 static int tilcdc_unload(struct drm_device dev) tilcdc_unload() argument 122 struct tilcdc_drm_private priv = dev->dev_private; tilcdc_unload() 125 drm_kms_helper_poll_fini(dev); tilcdc_unload() 126 drm_mode_config_cleanup(dev); tilcdc_unload() 127 drm_vblank_cleanup(dev); tilcdc_unload() 129 pm_runtime_get_sync(dev->dev); tilcdc_unload() 130 drm_irq_uninstall(dev); tilcdc_unload() 131 pm_runtime_put_sync(dev->dev); tilcdc_unload() 147 dev->dev_private = NULL; tilcdc_unload() 149 pm_runtime_disable(dev->dev); tilcdc_unload() 156 static int tilcdc_load(struct drm_device dev, unsigned long flags) tilcdc_load() argument 158 struct platform_device pdev = dev->platformdev; tilcdc_load() 159 struct device_node node = pdev->dev.of_node; tilcdc_load() 168 dev_err(dev->dev, "failed to allocate private data\n"); tilcdc_load() 172 dev->dev_private = priv; tilcdc_load() 182 dev_err(dev->dev, "failed to get memory resource\n"); tilcdc_load() 189 dev_err(dev->dev, "failed to ioremap\n"); tilcdc_load() 194 priv->clk = clk_get(dev->dev, "fck"); tilcdc_load() 196 dev_err(dev->dev, "failed to get functional clock\n"); tilcdc_load() 201 priv->disp_clk = clk_get(dev->dev, "dpll_disp_ck"); tilcdc_load() 203 dev_err(dev->dev, "failed to get display clock\n"); tilcdc_load() 214 dev_err(dev->dev, "failed to register cpufreq notifier\n"); tilcdc_load() 235 pm_runtime_enable(dev->dev); tilcdc_load() 238 pm_runtime_get_sync(dev->dev); tilcdc_load() 239 switch (tilcdc_read(dev, LCDC_PID_REG)) { tilcdc_load() 248 dev_warn(dev->dev, "Unknown PID Reg value 0x%08x, " tilcdc_load() 250 tilcdc_read(dev, LCDC_PID_REG)); tilcdc_load() 255 pm_runtime_put_sync(dev->dev); tilcdc_load() 257 ret = modeset_init(dev); tilcdc_load() 259 dev_err(dev->dev, "failed to initialize mode setting\n"); tilcdc_load() 263 ret = drm_vblank_init(dev, 1); tilcdc_load() 265 dev_err(dev->dev, "failed to initialize vblank\n"); tilcdc_load() 269 pm_runtime_get_sync(dev->dev); tilcdc_load() 270 ret = drm_irq_install(dev, platform_get_irq(dev->platformdev, 0)); tilcdc_load() 271 pm_runtime_put_sync(dev->dev); tilcdc_load() 273 dev_err(dev->dev, "failed to install IRQ handler\n"); tilcdc_load() 277 platform_set_drvdata(pdev, dev); tilcdc_load() 287 priv->fbdev = drm_fbdev_cma_init(dev, bpp, tilcdc_load() 288 dev->mode_config.num_crtc, tilcdc_load() 289 dev->mode_config.num_connector); tilcdc_load() 295 drm_kms_helper_poll_init(dev); tilcdc_load() 300 pm_runtime_get_sync(dev->dev); tilcdc_load() 301 drm_irq_uninstall(dev); tilcdc_load() 302 pm_runtime_put_sync(dev->dev); tilcdc_load() 305 drm_vblank_cleanup(dev); tilcdc_load() 308 drm_mode_config_cleanup(dev); tilcdc_load() 311 pm_runtime_disable(dev->dev); tilcdc_load() 330 dev->dev_private = NULL; tilcdc_load() 335 static void tilcdc_preclose(struct drm_device dev, struct drm_file file) tilcdc_preclose() argument 337 struct tilcdc_drm_private priv = dev->dev_private; tilcdc_preclose() 342 static void tilcdc_lastclose(struct drm_device dev) tilcdc_lastclose() argument 344 struct tilcdc_drm_private priv = dev->dev_private; tilcdc_lastclose() 350 struct drm_device dev = arg; tilcdc_irq() local 351 struct tilcdc_drm_private priv = dev->dev_private; tilcdc_irq() 355 static void tilcdc_irq_preinstall(struct drm_device dev) tilcdc_irq_preinstall() argument 357 tilcdc_clear_irqstatus(dev, 0xffffffff); tilcdc_irq_preinstall() 360 static int tilcdc_irq_postinstall(struct drm_device dev) tilcdc_irq_postinstall() argument 362 struct tilcdc_drm_private priv = dev->dev_private; tilcdc_irq_postinstall() 366 tilcdc_set(dev, LCDC_RASTER_CTRL_REG, LCDC_V1_UNDERFLOW_INT_ENA); tilcdc_irq_postinstall() 368 tilcdc_set(dev, LCDC_INT_ENABLE_SET_REG, LCDC_V2_UNDERFLOW_INT_ENA); tilcdc_irq_postinstall() 373 static void tilcdc_irq_uninstall(struct drm_device dev) tilcdc_irq_uninstall() argument 375 struct tilcdc_drm_private priv = dev->dev_private; tilcdc_irq_uninstall() 379 tilcdc_clear(dev, LCDC_RASTER_CTRL_REG, tilcdc_irq_uninstall() 381 tilcdc_clear(dev, LCDC_DMA_CTRL_REG, LCDC_V1_END_OF_FRAME_INT_ENA); tilcdc_irq_uninstall() 383 tilcdc_clear(dev, LCDC_INT_ENABLE_SET_REG, tilcdc_irq_uninstall() 391 static void enable_vblank(struct drm_device dev, bool enable) enable_vblank() argument 393 struct tilcdc_drm_private priv = dev->dev_private; enable_vblank() 406 tilcdc_set(dev, reg, mask); enable_vblank() 408 tilcdc_clear(dev, reg, mask); enable_vblank() 411 static int tilcdc_enable_vblank(struct drm_device dev, int crtc) tilcdc_enable_vblank() argument 413 enable_vblank(dev, true); tilcdc_enable_vblank() 417 static void tilcdc_disable_vblank(struct drm_device dev, int crtc) tilcdc_disable_vblank() argument 419 enable_vblank(dev, false); tilcdc_disable_vblank() 459 struct drm_device dev = node->minor->dev; tilcdc_regs_show() local 460 struct tilcdc_drm_private priv = dev->dev_private; tilcdc_regs_show() 463 pm_runtime_get_sync(dev->dev); tilcdc_regs_show() 470 tilcdc_read(dev, registers[i].reg)); tilcdc_regs_show() 472 pm_runtime_put_sync(dev->dev); tilcdc_regs_show() 480 struct drm_device dev = node->minor->dev; tilcdc_mm_show() local 481 return drm_mm_dump_table(m, &dev->vma_offset_manager->vm_addr_space_mm); tilcdc_mm_show() 492 struct drm_device dev = minor->dev; tilcdc_debugfs_init() local 505 dev_err(dev->dev, "could not install tilcdc_debugfs_list\n"); tilcdc_debugfs_init() 574 static int tilcdc_pm_suspend(struct device dev) tilcdc_pm_suspend() argument 576 struct drm_device ddev = dev_get_drvdata(dev); tilcdc_pm_suspend() 590 static int tilcdc_pm_resume(struct device dev) tilcdc_pm_resume() argument 592 struct drm_device *ddev = dev_get_drvdata(dev); tilcdc_pm_resume() 618 if (!pdev->dev.of_node) { tilcdc_pdev_probe() 619 dev_err(&pdev->dev, "device-tree data is missing\n"); tilcdc_pdev_probe()
/linux-4.1.27/drivers/usb/gadget/udc/
H A D	gr_udc.c	102 dev_dbg(ep->dev->dev, "%s: 0x%p, %d bytes data%s:\n", str, req, buflen, gr_dbgprint_request() 108 static void gr_dbgprint_devreq(struct gr_udc dev, u8 type, u8 request, gr_dbgprint_devreq() argument 111 dev_vdbg(dev->dev, "REQ: %02x.%02x v%04x i%04x l%04x\n", gr_dbgprint_devreq() 119 static void gr_dbgprint_devreq(struct gr_udc dev, u8 type, u8 request, gr_dbgprint_devreq() argument 189 struct gr_udc dev = seq->private; gr_seq_show() local 190 u32 control = gr_read32(&dev->regs->control); gr_seq_show() 191 u32 status = gr_read32(&dev->regs->status); gr_seq_show() 195 usb_state_string(dev->gadget.state)); gr_seq_show() 199 seq_printf(seq, "ep0state = %s\n", gr_ep0state_string(dev->ep0state)); gr_seq_show() 200 seq_printf(seq, "irq_enabled = %d\n", dev->irq_enabled); gr_seq_show() 201 seq_printf(seq, "remote_wakeup = %d\n", dev->remote_wakeup); gr_seq_show() 202 seq_printf(seq, "test_mode = %d\n", dev->test_mode); gr_seq_show() 205 list_for_each_entry(ep, &dev->ep_list, ep_list) gr_seq_show() 224 static void gr_dfs_create(struct gr_udc dev) gr_dfs_create() argument 228 dev->dfs_root = debugfs_create_dir(dev_name(dev->dev), NULL); gr_dfs_create() 229 dev->dfs_state = debugfs_create_file(name, 0444, dev->dfs_root, dev, gr_dfs_create() 233 static void gr_dfs_delete(struct gr_udc dev) gr_dfs_delete() argument 236 debugfs_remove(dev->dfs_state); gr_dfs_delete() 237 debugfs_remove(dev->dfs_root); gr_dfs_delete() 242 static void gr_dfs_create(struct gr_udc dev) {} gr_dfs_delete() argument 243 static void gr_dfs_delete(struct gr_udc dev) {} gr_dfs_delete() argument 256 dma_desc = dma_pool_alloc(ep->dev->desc_pool, gfp_flags, &paddr); gr_alloc_dma_desc() 258 dev_err(ep->dev->dev, "Could not allocate from DMA pool\n"); gr_alloc_dma_desc() 268 static inline void gr_free_dma_desc(struct gr_udc dev, gr_free_dma_desc() argument 271 dma_pool_free(dev->desc_pool, desc, (dma_addr_t)desc->paddr); gr_free_dma_desc() 275 static void gr_free_dma_desc_chain(struct gr_udc dev, struct gr_request req) gr_free_dma_desc_chain() argument 287 gr_free_dma_desc(dev, desc); gr_free_dma_desc_chain() 295 static void gr_ep0_setup(struct gr_udc dev, struct gr_request req); 301 * Must be called with dev->lock held and irqs disabled. 305 __releases(&dev->lock) 306 __acquires(&dev->lock) 308 struct gr_udc dev; variable in typeref:struct:gr_udc 317 dev = ep->dev; 318 usb_gadget_unmap_request(&dev->gadget, &req->req, ep->is_in); 319 gr_free_dma_desc_chain(dev, req); 335 dev_dbg(ep->dev->dev, "Overflow for ep %s\n", 351 if (req == dev->ep0reqo && !status) { 353 gr_ep0_setup(dev, req); 355 dev_err(dev->dev, 358 spin_unlock(&dev->lock); 362 spin_lock(&dev->lock); 383 Must be called with dev->lock held and with !ep->stopped. 425 * Must be called with dev->lock held, irqs disabled and with !ep->stopped. 440 * Must be called with dev->lock held. 529 gr_free_dma_desc_chain(ep->dev, req); gr_setup_out_desc_list() 591 gr_free_dma_desc_chain(ep->dev, req); gr_setup_in_desc_list() 596 /* Must be called with dev->lock held / gr_queue() 599 struct gr_udc dev = ep->dev; gr_queue() local 603 dev_err(dev->dev, "No ep descriptor for %s\n", ep->ep.name); gr_queue() 608 dev_err(dev->dev, gr_queue() 614 if (unlikely(!dev->driver \|\| dev->gadget.speed == USB_SPEED_UNKNOWN)) { gr_queue() 615 dev_err(dev->dev, "-ESHUTDOWN"); gr_queue() 620 if (dev->ep0state == GR_EP0_SUSPEND) { gr_queue() 621 dev_err(dev->dev, "-EBUSY"); gr_queue() 626 ret = usb_gadget_map_request(&dev->gadget, &req->req, ep->is_in); gr_queue() 628 dev_err(dev->dev, "usb_gadget_map_request"); gr_queue() 653 * Must be called with dev->lock held. 670 * Must be called with dev->lock held and irqs disabled. 689 * Must be called with dev->lock held. 705 * Must be called with dev->lock held. 707 static void gr_control_stall(struct gr_udc dev) gr_control_stall() argument 711 epctrl = gr_read32(&dev->epo[0].regs->epctrl); gr_control_stall() 712 gr_write32(&dev->epo[0].regs->epctrl, epctrl \| GR_EPCTRL_CS); gr_control_stall() 713 epctrl = gr_read32(&dev->epi[0].regs->epctrl); gr_control_stall() 714 gr_write32(&dev->epi[0].regs->epctrl, epctrl \| GR_EPCTRL_CS); gr_control_stall() 716 dev->ep0state = GR_EP0_STALL; gr_control_stall() 722 Must be called with dev->lock held. 739 gr_control_stall(ep->dev); gr_ep_halt_wedge() 740 dev_dbg(ep->dev->dev, "EP: stall ep0\n"); gr_ep_halt_wedge() 746 dev_dbg(ep->dev->dev, "EP: %s halt %s\n", gr_ep_halt_wedge() 769 /* Must be called with dev->lock held / gr_set_ep0state() 770 static inline void gr_set_ep0state(struct gr_udc dev, enum gr_ep0state value) gr_set_ep0state() argument 772 if (dev->ep0state != value) gr_set_ep0state() 773 dev_vdbg(dev->dev, "STATE: ep0state=%s\n", gr_set_ep0state() 775 dev->ep0state = value; gr_set_ep0state() 781 * Must be called with dev->lock held. 783 static void gr_disable_interrupts_and_pullup(struct gr_udc dev) gr_disable_interrupts_and_pullup() argument 785 gr_write32(&dev->regs->control, 0); gr_disable_interrupts_and_pullup() 787 dev->irq_enabled = 0; gr_disable_interrupts_and_pullup() 793 Must be called with dev->lock held and irqs disabled. 795 static void gr_stop_activity(struct gr_udc dev) gr_stop_activity() argument 799 list_for_each_entry(ep, &dev->ep_list, ep_list) gr_stop_activity() 802 gr_disable_interrupts_and_pullup(dev); gr_stop_activity() 804 gr_set_ep0state(dev, GR_EP0_DISCONNECT); gr_stop_activity() 805 usb_gadget_set_state(&dev->gadget, USB_STATE_NOTATTACHED); gr_stop_activity() 815 struct gr_udc dev; gr_ep0_testmode_complete() local 819 dev = ep->dev; gr_ep0_testmode_complete() 821 spin_lock(&dev->lock); gr_ep0_testmode_complete() 823 control = gr_read32(&dev->regs->control); gr_ep0_testmode_complete() 824 control \|= GR_CONTROL_TM \| (dev->test_mode << GR_CONTROL_TS_POS); gr_ep0_testmode_complete() 825 gr_write32(&dev->regs->control, control); gr_ep0_testmode_complete() 827 spin_unlock(&dev->lock); gr_ep0_testmode_complete() 838 * Must be called with dev->lock held. 840 static int gr_ep0_respond(struct gr_udc dev, u8 buf, int length, gr_ep0_respond() argument 844 u8 reqbuf = dev->ep0reqi->req.buf; gr_ep0_respond() 850 dev->ep0reqi->req.length = length; gr_ep0_respond() 851 dev->ep0reqi->req.complete = complete; gr_ep0_respond() 853 status = gr_queue_int(&dev->epi[0], dev->ep0reqi, GFP_ATOMIC); gr_ep0_respond() 855 dev_err(dev->dev, gr_ep0_respond() 864 Must be called with dev->lock held. 866 static inline int gr_ep0_respond_u16(struct gr_udc dev, u16 response) gr_ep0_respond_u16() argument 870 return gr_ep0_respond(dev, (u8 )&le_response, 2, gr_ep0_respond_u16() 877 * Must be called with dev->lock held. 879 static inline int gr_ep0_respond_empty(struct gr_udc dev) gr_ep0_respond_empty() argument 881 return gr_ep0_respond(dev, NULL, 0, gr_ep0_dummy_complete); gr_ep0_respond_empty() 889 Must be called with dev->lock held. 891 static void gr_set_address(struct gr_udc dev, u8 address) gr_set_address() argument 895 control = gr_read32(&dev->regs->control) & ~GR_CONTROL_UA_MASK; gr_set_address() 898 gr_write32(&dev->regs->control, control); gr_set_address() 905 Must be called with dev->lock held. 907 static int gr_device_request(struct gr_udc dev, u8 type, u8 request, gr_device_request() argument 915 dev_dbg(dev->dev, "STATUS: address %d\n", value & 0xff); gr_device_request() 916 gr_set_address(dev, value & 0xff); gr_device_request() 918 usb_gadget_set_state(&dev->gadget, USB_STATE_ADDRESS); gr_device_request() 920 usb_gadget_set_state(&dev->gadget, USB_STATE_DEFAULT); gr_device_request() 921 return gr_ep0_respond_empty(dev); gr_device_request() 925 response = 0x0001 \| (dev->remote_wakeup ? 0x0002 : 0); gr_device_request() 926 return gr_ep0_respond_u16(dev, response); gr_device_request() 932 dev->remote_wakeup = 1; gr_device_request() 933 return gr_ep0_respond_empty(dev); gr_device_request() 939 dev->test_mode = test; gr_device_request() 940 return gr_ep0_respond(dev, NULL, 0, gr_device_request() 950 dev->remote_wakeup = 0; gr_device_request() 951 return gr_ep0_respond_empty(dev); gr_device_request() 963 Must be called with dev->lock held. 965 static int gr_interface_request(struct gr_udc dev, u8 type, u8 request, gr_interface_request() argument 968 if (dev->gadget.state != USB_STATE_CONFIGURED) gr_interface_request() 979 return gr_ep0_respond_u16(dev, 0x0000); gr_interface_request() 997 Must be called with dev->lock held. 999 static int gr_endpoint_request(struct gr_udc dev, u8 type, u8 request, gr_endpoint_request() argument 1008 if ((is_in && epnum >= dev->nepi) \|\| (!is_in && epnum >= dev->nepo)) gr_endpoint_request() 1011 if (dev->gadget.state != USB_STATE_CONFIGURED && epnum != 0) gr_endpoint_request() 1014 ep = (is_in ? &dev->epi[epnum] : &dev->epo[epnum]); gr_endpoint_request() 1019 return gr_ep0_respond_u16(dev, halted ? 0x0001 : 0); gr_endpoint_request() 1026 status = gr_ep0_respond_empty(dev); gr_endpoint_request() 1038 status = gr_ep0_respond_empty(dev); gr_endpoint_request() 1047 / Must be called with dev->lock held / gr_ep0out_requeue() 1048 static void gr_ep0out_requeue(struct gr_udc dev) gr_ep0out_requeue() argument 1050 int ret = gr_queue_int(&dev->epo[0], dev->ep0reqo, GFP_ATOMIC); gr_ep0out_requeue() 1053 dev_err(dev->dev, "Could not queue ep0out setup request: %d\n", gr_ep0out_requeue() 1060 * Must be called with dev->lock held and irqs disabled 1062 static void gr_ep0_setup(struct gr_udc dev, struct gr_request req) 1063 __releases(&dev->lock) 1064 __acquires(&dev->lock) 1080 if (dev->ep0state == GR_EP0_STALL) { 1081 gr_set_ep0state(dev, GR_EP0_SETUP); 1086 if (dev->ep0state == GR_EP0_ISTATUS) { 1087 gr_set_ep0state(dev, GR_EP0_SETUP); 1089 dev_dbg(dev->dev, 1094 } else if (dev->ep0state != GR_EP0_SETUP) { 1095 dev_info(dev->dev, 1097 gr_ep0state_string(dev->ep0state)); 1098 gr_control_stall(dev); variable 1099 gr_set_ep0state(dev, GR_EP0_SETUP); 1102 dev_dbg(dev->dev, "Unexpected ZLP at state %s\n", 1103 gr_ep0state_string(dev->ep0state)); 1117 gr_dbgprint_devreq(dev, type, request, value, index, length); 1122 gr_set_ep0state(dev, GR_EP0_IDATA); 1124 gr_set_ep0state(dev, GR_EP0_ODATA); 1131 status = gr_device_request(dev, type, request, 1135 status = gr_endpoint_request(dev, type, request, 1139 status = gr_interface_request(dev, type, request, 1146 spin_unlock(&dev->lock); 1148 dev_vdbg(dev->dev, "DELEGATE\n"); 1149 status = dev->driver->setup(&dev->gadget, &u.ctrl); 1151 spin_lock(&dev->lock); 1156 dev_vdbg(dev->dev, "STALL\n"); 1157 gr_control_stall(dev); variable 1163 dev_dbg(dev->dev, "STATUS: deconfigured\n"); 1164 usb_gadget_set_state(&dev->gadget, USB_STATE_ADDRESS); 1167 dev_dbg(dev->dev, "STATUS: configured: %d\n", value); 1168 usb_gadget_set_state(&dev->gadget, 1174 if (dev->ep0state == GR_EP0_ODATA) 1175 gr_set_ep0state(dev, GR_EP0_OSTATUS); 1176 else if (dev->ep0state == GR_EP0_IDATA) 1177 gr_set_ep0state(dev, GR_EP0_ISTATUS); 1179 gr_set_ep0state(dev, GR_EP0_SETUP); 1182 gr_ep0out_requeue(dev); variable 1188 /* Must be called with dev->lock held and irqs disabled / gr_vbus_connected() 1189 static void gr_vbus_connected(struct gr_udc dev, u32 status) gr_vbus_connected() argument 1193 dev->gadget.speed = GR_SPEED(status); gr_vbus_connected() 1194 usb_gadget_set_state(&dev->gadget, USB_STATE_POWERED); gr_vbus_connected() 1199 gr_write32(&dev->regs->control, control); gr_vbus_connected() 1202 /* Must be called with dev->lock held / gr_enable_vbus_detect() 1203 static void gr_enable_vbus_detect(struct gr_udc dev) gr_enable_vbus_detect() argument 1207 dev->irq_enabled = 1; gr_enable_vbus_detect() 1209 gr_write32(&dev->regs->control, GR_CONTROL_VI); gr_enable_vbus_detect() 1212 status = gr_read32(&dev->regs->status); gr_enable_vbus_detect() 1214 gr_vbus_connected(dev, status); gr_enable_vbus_detect() 1217 /* Must be called with dev->lock held and irqs disabled / gr_vbus_disconnected() 1218 static void gr_vbus_disconnected(struct gr_udc dev) gr_vbus_disconnected() argument 1220 gr_stop_activity(dev); gr_vbus_disconnected() 1223 if (dev->driver && dev->driver->disconnect) { gr_vbus_disconnected() 1224 spin_unlock(&dev->lock); gr_vbus_disconnected() 1226 dev->driver->disconnect(&dev->gadget); gr_vbus_disconnected() 1228 spin_lock(&dev->lock); gr_vbus_disconnected() 1231 gr_enable_vbus_detect(dev); gr_vbus_disconnected() 1234 /* Must be called with dev->lock held and irqs disabled / gr_udc_usbreset() 1235 static void gr_udc_usbreset(struct gr_udc dev, u32 status) gr_udc_usbreset() argument 1237 gr_set_address(dev, 0); gr_udc_usbreset() 1238 gr_set_ep0state(dev, GR_EP0_SETUP); gr_udc_usbreset() 1239 usb_gadget_set_state(&dev->gadget, USB_STATE_DEFAULT); gr_udc_usbreset() 1240 dev->gadget.speed = GR_SPEED(status); gr_udc_usbreset() 1242 gr_ep_nuke(&dev->epo[0]); gr_udc_usbreset() 1243 gr_ep_nuke(&dev->epi[0]); gr_udc_usbreset() 1244 dev->epo[0].stopped = 0; gr_udc_usbreset() 1245 dev->epi[0].stopped = 0; gr_udc_usbreset() 1246 gr_ep0out_requeue(dev); gr_udc_usbreset() 1255 * Must be called with dev->lock held, irqs disabled and with !ep->stopped. 1280 * Must be called with dev->lock held, irqs disabled and with !ep->stopped. 1288 struct gr_udc dev = ep->dev; gr_handle_out_ep() local 1307 if ((ep == &dev->epo[0]) && (dev->ep0state == GR_EP0_OSTATUS)) { gr_handle_out_ep() 1312 ep0_setup that can change dev->ep0state. gr_handle_out_ep() 1314 gr_ep0_respond_empty(dev); gr_handle_out_ep() 1315 gr_set_ep0state(dev, GR_EP0_SETUP); gr_handle_out_ep() 1334 * Must be called with dev->lock held and irqs disabled. 1336 static int gr_handle_state_changes(struct gr_udc dev) gr_handle_state_changes() argument 1338 u32 status = gr_read32(&dev->regs->status); gr_handle_state_changes() 1340 int powstate = !(dev->gadget.state == USB_STATE_NOTATTACHED \|\| gr_handle_state_changes() 1341 dev->gadget.state == USB_STATE_ATTACHED); gr_handle_state_changes() 1345 dev_dbg(dev->dev, "STATUS: vbus valid detected\n"); gr_handle_state_changes() 1346 gr_vbus_connected(dev, status); gr_handle_state_changes() 1352 dev_dbg(dev->dev, "STATUS: vbus invalid detected\n"); gr_handle_state_changes() 1353 gr_vbus_disconnected(dev); gr_handle_state_changes() 1359 dev_dbg(dev->dev, "STATUS: USB reset - speed is %s\n", gr_handle_state_changes() 1361 gr_write32(&dev->regs->status, GR_STATUS_UR); gr_handle_state_changes() 1362 gr_udc_usbreset(dev, status); gr_handle_state_changes() 1367 if (dev->gadget.speed != GR_SPEED(status)) { gr_handle_state_changes() 1368 dev_dbg(dev->dev, "STATUS: USB Speed change to %s\n", gr_handle_state_changes() 1370 dev->gadget.speed = GR_SPEED(status); gr_handle_state_changes() 1375 if ((dev->ep0state != GR_EP0_SUSPEND) && !(status & GR_STATUS_SU)) { gr_handle_state_changes() 1376 dev_dbg(dev->dev, "STATUS: USB suspend\n"); gr_handle_state_changes() 1377 gr_set_ep0state(dev, GR_EP0_SUSPEND); gr_handle_state_changes() 1378 dev->suspended_from = dev->gadget.state; gr_handle_state_changes() 1379 usb_gadget_set_state(&dev->gadget, USB_STATE_SUSPENDED); gr_handle_state_changes() 1381 if ((dev->gadget.speed != USB_SPEED_UNKNOWN) && gr_handle_state_changes() 1382 dev->driver && dev->driver->suspend) { gr_handle_state_changes() 1383 spin_unlock(&dev->lock); gr_handle_state_changes() 1385 dev->driver->suspend(&dev->gadget); gr_handle_state_changes() 1387 spin_lock(&dev->lock); gr_handle_state_changes() 1393 if ((dev->ep0state == GR_EP0_SUSPEND) && (status & GR_STATUS_SU)) { gr_handle_state_changes() 1394 dev_dbg(dev->dev, "STATUS: USB resume\n"); gr_handle_state_changes() 1395 if (dev->suspended_from == USB_STATE_POWERED) gr_handle_state_changes() 1396 gr_set_ep0state(dev, GR_EP0_DISCONNECT); gr_handle_state_changes() 1398 gr_set_ep0state(dev, GR_EP0_SETUP); gr_handle_state_changes() 1399 usb_gadget_set_state(&dev->gadget, dev->suspended_from); gr_handle_state_changes() 1401 if ((dev->gadget.speed != USB_SPEED_UNKNOWN) && gr_handle_state_changes() 1402 dev->driver && dev->driver->resume) { gr_handle_state_changes() 1403 spin_unlock(&dev->lock); gr_handle_state_changes() 1405 dev->driver->resume(&dev->gadget); gr_handle_state_changes() 1407 spin_lock(&dev->lock); gr_handle_state_changes() 1418 struct gr_udc dev = _dev; gr_irq_handler() local 1424 spin_lock_irqsave(&dev->lock, flags); gr_irq_handler() 1426 if (!dev->irq_enabled) gr_irq_handler() 1434 for (i = 0; i < dev->nepi; i++) { gr_irq_handler() 1435 ep = &dev->epi[i]; gr_irq_handler() 1441 for (i = 0; i < dev->nepo; i++) { gr_irq_handler() 1442 ep = &dev->epo[i]; gr_irq_handler() 1448 handled = gr_handle_state_changes(dev) \|\| handled; gr_irq_handler() 1455 list_for_each_entry(ep, &dev->ep_list, ep_list) { gr_irq_handler() 1457 dev_err(dev->dev, gr_irq_handler() 1466 spin_unlock_irqrestore(&dev->lock, flags); gr_irq_handler() 1474 struct gr_udc dev = _dev; gr_irq() local 1476 if (!dev->irq_enabled) gr_irq() 1489 struct gr_udc dev; gr_ep_enable() local 1501 dev = ep->dev; gr_ep_enable() 1504 if (ep == &dev->epo[0] \|\| ep == &dev->epi[0]) gr_ep_enable() 1507 if (!dev->driver \|\| dev->gadget.speed == USB_SPEED_UNKNOWN) gr_ep_enable() 1520 if ((!ep->is_in && ep->num >= dev->nepo) \|\| gr_ep_enable() 1521 (ep->is_in && ep->num >= dev->nepi)) gr_ep_enable() 1533 dev_err(dev->dev, "Unknown transfer type for %s\n", gr_ep_enable() 1546 dev_err(dev->dev, gr_ep_enable() 1551 dev_err(dev->dev, gr_ep_enable() 1555 dev_err(dev->dev, "Hw buffer size %d < max payload %d * %d\n", gr_ep_enable() 1559 dev_err(dev->dev, "Max payload cannot be set to 0\n"); gr_ep_enable() 1562 dev_err(dev->dev, "Requested max payload %d > limit %d\n", gr_ep_enable() 1567 spin_lock(&ep->dev->lock); gr_ep_enable() 1570 spin_unlock(&ep->dev->lock); gr_ep_enable() 1612 spin_unlock(&ep->dev->lock); gr_ep_enable() 1614 dev_dbg(ep->dev->dev, "EP: %s enabled - %s with %d bytes/buffer\n", gr_ep_enable() 1623 struct gr_udc dev; gr_ep_disable() local 1630 dev = ep->dev; gr_ep_disable() 1633 if (ep == &dev->epo[0] \|\| ep == &dev->epi[0]) gr_ep_disable() 1636 if (dev->ep0state == GR_EP0_SUSPEND) gr_ep_disable() 1639 dev_dbg(ep->dev->dev, "EP: disable %s\n", ep->ep.name); gr_ep_disable() 1641 spin_lock_irqsave(&dev->lock, flags); gr_ep_disable() 1647 spin_unlock_irqrestore(&dev->lock, flags); gr_ep_disable() 1677 struct gr_udc dev; gr_queue_ext() local 1685 dev = ep->dev; gr_queue_ext() 1687 spin_lock(&ep->dev->lock); gr_queue_ext() 1695 if ((ep == &dev->epi[0]) && (dev->ep0state == GR_EP0_ODATA)) { gr_queue_ext() 1696 ep = &dev->epo[0]; gr_queue_ext() 1697 ep->ep.driver_data = dev->epi[0].ep.driver_data; gr_queue_ext() 1705 spin_unlock(&ep->dev->lock); gr_queue_ext() 1715 struct gr_udc dev; gr_dequeue() local 1722 dev = ep->dev; gr_dequeue() 1723 if (!dev->driver) gr_dequeue() 1727 if (dev->ep0state == GR_EP0_SUSPEND) gr_dequeue() 1730 spin_lock_irqsave(&dev->lock, flags); gr_dequeue() 1757 spin_unlock_irqrestore(&dev->lock, flags); gr_dequeue() 1772 spin_lock(&ep->dev->lock); gr_set_halt_wedge() 1783 spin_unlock(&ep->dev->lock); gr_set_halt_wedge() 1834 dev_vdbg(ep->dev->dev, "EP: flush fifo %s\n", ep->ep.name); gr_fifo_flush() 1836 spin_lock(&ep->dev->lock); gr_fifo_flush() 1842 spin_unlock(&ep->dev->lock); gr_fifo_flush() 1866 struct gr_udc dev; gr_get_frame() local 1870 dev = container_of(_gadget, struct gr_udc, gadget); gr_get_frame() 1871 return gr_read32(&dev->regs->status) & GR_STATUS_FN_MASK; gr_get_frame() 1876 struct gr_udc dev; gr_wakeup() local 1880 dev = container_of(_gadget, struct gr_udc, gadget); gr_wakeup() 1883 if (!dev->remote_wakeup) gr_wakeup() 1886 spin_lock(&dev->lock); gr_wakeup() 1888 gr_write32(&dev->regs->control, gr_wakeup() 1889 gr_read32(&dev->regs->control) \| GR_CONTROL_RW); gr_wakeup() 1891 spin_unlock(&dev->lock); gr_wakeup() 1898 struct gr_udc dev; gr_pullup() local 1903 dev = container_of(_gadget, struct gr_udc, gadget); gr_pullup() 1905 spin_lock(&dev->lock); gr_pullup() 1907 control = gr_read32(&dev->regs->control); gr_pullup() 1912 gr_write32(&dev->regs->control, control); gr_pullup() 1914 spin_unlock(&dev->lock); gr_pullup() 1922 struct gr_udc dev = to_gr_udc(gadget); gr_udc_start() local 1924 spin_lock(&dev->lock); gr_udc_start() 1928 dev->driver = driver; gr_udc_start() 1931 gr_enable_vbus_detect(dev); gr_udc_start() 1933 spin_unlock(&dev->lock); gr_udc_start() 1940 struct gr_udc dev = to_gr_udc(gadget); gr_udc_stop() local 1943 spin_lock_irqsave(&dev->lock, flags); gr_udc_stop() 1945 dev->driver = NULL; gr_udc_stop() 1946 gr_stop_activity(dev); gr_udc_stop() 1948 spin_unlock_irqrestore(&dev->lock, flags); gr_udc_stop() 1977 /* Must be called with dev->lock held / gr_ep_init() 1978 static int gr_ep_init(struct gr_udc dev, int num, int is_in, u32 maxplimit) gr_ep_init() argument 1986 ep = &dev->epi[num]; gr_ep_init() 1988 ep->regs = &dev->regs->epi[num]; gr_ep_init() 1990 ep = &dev->epo[num]; gr_ep_init() 1992 ep->regs = &dev->regs->epo[num]; gr_ep_init() 1998 ep->dev = dev; gr_ep_init() 2004 buf = devm_kzalloc(dev->dev, PAGE_SIZE, GFP_DMA \| GFP_ATOMIC); gr_ep_init() 2015 dev->ep0reqi = req; /* Complete gets set as used / gr_ep_init() 2017 dev->ep0reqo = req; / Completion treated separately / gr_ep_init() 2023 list_add_tail(&ep->ep.ep_list, &dev->gadget.ep_list); gr_ep_init() 2025 list_add_tail(&ep->ep_list, &dev->ep_list); gr_ep_init() 2027 ep->tailbuf = dma_alloc_coherent(dev->dev, ep->ep.maxpacket_limit, gr_ep_init() 2035 / Must be called with dev->lock held / gr_udc_init() 2036 static int gr_udc_init(struct gr_udc dev) gr_udc_init() argument 2038 struct device_node np = dev->dev->of_node; gr_udc_init() 2045 gr_set_address(dev, 0); gr_udc_init() 2047 INIT_LIST_HEAD(&dev->gadget.ep_list); gr_udc_init() 2048 dev->gadget.speed = USB_SPEED_UNKNOWN; gr_udc_init() 2049 dev->gadget.ep0 = &dev->epi[0].ep; gr_udc_init() 2051 INIT_LIST_HEAD(&dev->ep_list); gr_udc_init() 2052 gr_set_ep0state(dev, GR_EP0_DISCONNECT); gr_udc_init() 2054 for (i = 0; i < dev->nepo; i++) { gr_udc_init() 2057 ret = gr_ep_init(dev, i, 0, bufsize); gr_udc_init() 2062 for (i = 0; i < dev->nepi; i++) { gr_udc_init() 2065 ret = gr_ep_init(dev, i, 1, bufsize); gr_udc_init() 2071 dev->remote_wakeup = 0; gr_udc_init() 2076 gr_write32(&dev->epo[0].regs->epctrl, epctrl_val); gr_udc_init() 2077 gr_write32(&dev->epi[0].regs->epctrl, epctrl_val \| GR_EPCTRL_PI); gr_udc_init() 2078 gr_write32(&dev->epo[0].regs->dmactrl, dmactrl_val); gr_udc_init() 2079 gr_write32(&dev->epi[0].regs->dmactrl, dmactrl_val); gr_udc_init() 2084 static void gr_ep_remove(struct gr_udc dev, int num, int is_in) gr_ep_remove() argument 2089 ep = &dev->epi[num]; gr_ep_remove() 2091 ep = &dev->epo[num]; gr_ep_remove() 2094 dma_free_coherent(dev->dev, ep->ep.maxpacket_limit, gr_ep_remove() 2100 struct gr_udc dev = platform_get_drvdata(pdev); gr_remove() local 2103 if (dev->added) gr_remove() 2104 usb_del_gadget_udc(&dev->gadget); / Shuts everything down / gr_remove() 2105 if (dev->driver) gr_remove() 2108 gr_dfs_delete(dev); gr_remove() 2109 if (dev->desc_pool) gr_remove() 2110 dma_pool_destroy(dev->desc_pool); gr_remove() 2113 gr_free_request(&dev->epi[0].ep, &dev->ep0reqi->req); gr_remove() 2114 gr_free_request(&dev->epo[0].ep, &dev->ep0reqo->req); gr_remove() 2116 for (i = 0; i < dev->nepo; i++) gr_remove() 2117 gr_ep_remove(dev, i, 0); gr_remove() 2118 for (i = 0; i < dev->nepi; i++) gr_remove() 2119 gr_ep_remove(dev, i, 1); gr_remove() 2123 static int gr_request_irq(struct gr_udc dev, int irq) gr_request_irq() argument 2125 return devm_request_threaded_irq(dev->dev, irq, gr_irq, gr_irq_handler, gr_request_irq() 2126 IRQF_SHARED, driver_name, dev); gr_request_irq() 2131 struct gr_udc dev; gr_probe() local 2137 dev = devm_kzalloc(&pdev->dev, sizeof(dev), GFP_KERNEL); gr_probe() 2138 if (!dev) gr_probe() 2140 dev->dev = &pdev->dev; gr_probe() 2143 regs = devm_ioremap_resource(dev->dev, res); gr_probe() 2147 dev->irq = platform_get_irq(pdev, 0); gr_probe() 2148 if (dev->irq <= 0) { gr_probe() 2149 dev_err(dev->dev, "No irq found\n"); gr_probe() 2154 dev->irqi = platform_get_irq(pdev, 1); gr_probe() 2155 if (dev->irqi > 0) { gr_probe() 2156 dev->irqo = platform_get_irq(pdev, 2); gr_probe() 2157 if (dev->irqo <= 0) { gr_probe() 2158 dev_err(dev->dev, "Found irqi but not irqo\n"); gr_probe() 2162 dev->irqi = 0; gr_probe() 2165 dev->gadget.name = driver_name; gr_probe() 2166 dev->gadget.max_speed = USB_SPEED_HIGH; gr_probe() 2167 dev->gadget.ops = &gr_ops; gr_probe() 2169 spin_lock_init(&dev->lock); gr_probe() 2170 dev->regs = regs; gr_probe() 2172 platform_set_drvdata(pdev, dev); gr_probe() 2175 status = gr_read32(&dev->regs->status); gr_probe() 2176 dev->nepi = ((status & GR_STATUS_NEPI_MASK) >> GR_STATUS_NEPI_POS) + 1; gr_probe() 2177 dev->nepo = ((status & GR_STATUS_NEPO_MASK) >> GR_STATUS_NEPO_POS) + 1; gr_probe() 2180 dev_err(dev->dev, "Slave mode cores are not supported\n"); gr_probe() 2187 dev->desc_pool = dma_pool_create("desc_pool", dev->dev, gr_probe() 2189 if (!dev->desc_pool) { gr_probe() 2190 dev_err(dev->dev, "Could not allocate DMA pool"); gr_probe() 2194 spin_lock(&dev->lock); gr_probe() 2197 retval = usb_add_gadget_udc(dev->dev, &dev->gadget); gr_probe() 2199 dev_err(dev->dev, "Could not add gadget udc"); gr_probe() 2202 dev->added = 1; gr_probe() 2204 retval = gr_udc_init(dev); gr_probe() 2208 gr_dfs_create(dev); gr_probe() 2211 gr_disable_interrupts_and_pullup(dev); gr_probe() 2213 retval = gr_request_irq(dev, dev->irq); gr_probe() 2215 dev_err(dev->dev, "Failed to request irq %d\n", dev->irq); gr_probe() 2219 if (dev->irqi) { gr_probe() 2220 retval = gr_request_irq(dev, dev->irqi); gr_probe() 2222 dev_err(dev->dev, "Failed to request irqi %d\n", gr_probe() 2223 dev->irqi); gr_probe() 2226 retval = gr_request_irq(dev, dev->irqo); gr_probe() 2228 dev_err(dev->dev, "Failed to request irqo %d\n", gr_probe() 2229 dev->irqo); gr_probe() 2234 if (dev->irqi) gr_probe() 2235 dev_info(dev->dev, "regs: %p, irqs %d, %d, %d\n", dev->regs, gr_probe() 2236 dev->irq, dev->irqi, dev->irqo); gr_probe() 2238 dev_info(dev->dev, "regs: %p, irq %d\n", dev->regs, dev->irq); gr_probe() 2241 spin_unlock(&dev->lock); gr_probe()
H A D	net2272.c	130 dev_dbg(ep->dev->dev, "%s %s %02x !NAK\n", assert_out_naking() 191 struct net2272 dev; net2272_enable() local 201 dev = ep->dev; net2272_enable() 202 if (!dev->driver \|\| dev->gadget.speed == USB_SPEED_UNKNOWN) net2272_enable() 207 spin_lock_irqsave(&dev->lock, flags); net2272_enable() 224 if ((dev->gadget.speed == USB_SPEED_HIGH && max != 512) \|\| net2272_enable() 225 (dev->gadget.speed == USB_SPEED_FULL && max > 64)) { net2272_enable() 226 spin_unlock_irqrestore(&dev->lock, flags); net2272_enable() 244 tmp = (1 << ep->num) \| net2272_read(dev, IRQENB0); net2272_enable() 245 net2272_write(dev, IRQENB0, tmp); net2272_enable() 253 dev_dbg(dev->dev, "enabled %s (ep%d%s-%s) max %04x cfg %02x\n", net2272_enable() 258 spin_unlock_irqrestore(&dev->lock, flags); net2272_enable() 317 spin_lock_irqsave(&ep->dev->lock, flags); net2272_disable() 321 dev_vdbg(ep->dev->dev, "disabled %s\n", _ep->name); net2272_disable() 323 spin_unlock_irqrestore(&ep->dev->lock, flags); net2272_disable() 366 struct net2272 dev; net2272_done() local 370 if (ep->dev->protocol_stall) { net2272_done() 384 dev = ep->dev; net2272_done() 386 usb_gadget_unmap_request(&dev->gadget, &req->req, net2272_done() 390 dev_vdbg(dev->dev, "complete %s req %p stat %d len %u/%u buf %p\n", net2272_done() 396 spin_unlock(&dev->lock); net2272_done() 398 spin_lock(&dev->lock); net2272_done() 406 u16 __iomem ep_data = net2272_reg_addr(ep->dev, EP_DATA); net2272_write_packet() 414 dev_vdbg(ep->dev->dev, "write packet %s req %p max %u len %u avail %u\n", net2272_write_packet() 430 tmp = net2272_read(ep->dev, LOCCTL); net2272_write_packet() 431 net2272_write(ep->dev, LOCCTL, tmp & ~(1 << DATA_WIDTH)); net2272_write_packet() 433 net2272_write(ep->dev, LOCCTL, tmp); net2272_write_packet() 446 dev_vdbg(ep->dev->dev, "write_fifo %s actual %d len %d\n", net2272_write_fifo() 514 u16 __iomem ep_data = net2272_reg_addr(ep->dev, EP_DATA); net2272_read_packet() 520 dev_vdbg(ep->dev->dev, "read packet %s req %p len %u avail %u\n", net2272_read_packet() 562 dev_vdbg(ep->dev->dev, "read_fifo %s actual %d len %d\n", net2272_read_fifo() 581 dev_err(ep->dev->dev, net2272_read_fifo() 641 net2272_request_dma(struct net2272 dev, unsigned ep, u32 buf, net2272_request_dma() argument 644 dev_vdbg(dev->dev, "request_dma ep %d buf %08x len %d dir %d\n", net2272_request_dma() 648 if (dev->dma_busy) net2272_request_dma() 657 dev->dma_busy = 1; net2272_request_dma() 662 switch (dev->dev_id) { net2272_request_dma() 674 dev->rdk1.plx9054_base_addr + DMAMODE0); net2272_request_dma() 676 writel(0x100000, dev->rdk1.plx9054_base_addr + DMALADR0); net2272_request_dma() 677 writel(buf, dev->rdk1.plx9054_base_addr + DMAPADR0); net2272_request_dma() 678 writel(len, dev->rdk1.plx9054_base_addr + DMASIZ0); net2272_request_dma() 681 dev->rdk1.plx9054_base_addr + DMADPR0); net2272_request_dma() 683 readl(dev->rdk1.plx9054_base_addr + INTCSR), net2272_request_dma() 684 dev->rdk1.plx9054_base_addr + INTCSR); net2272_request_dma() 690 net2272_write(dev, DMAREQ, net2272_request_dma() 694 (dev->dma_eot_polarity << EOT_POLARITY) \| net2272_request_dma() 695 (dev->dma_dack_polarity << DACK_POLARITY) \| net2272_request_dma() 696 (dev->dma_dreq_polarity << DREQ_POLARITY) \| net2272_request_dma() 699 (void) net2272_read(dev, SCRATCH); net2272_request_dma() 705 net2272_start_dma(struct net2272 dev) net2272_start_dma() argument 709 switch (dev->dev_id) { net2272_start_dma() 712 dev->rdk1.plx9054_base_addr + DMACSR0); net2272_start_dma() 734 dev_vdbg(ep->dev->dev, "kick_dma %s req %p dma %08llx\n", net2272_kick_dma() 740 if (ep->dev->dma_busy) net2272_kick_dma() 752 if (net2272_request_dma(ep->dev, ep->num, req->req.dma, size, 0)) net2272_kick_dma() 762 if (net2272_request_dma(ep->dev, ep->num, req->req.dma, size, 1)) net2272_kick_dma() 781 net2272_write(ep->dev, DMAREQ, net2272_kick_dma() 785 (ep->dev->dma_eot_polarity << EOT_POLARITY) \| net2272_kick_dma() 786 (ep->dev->dma_dack_polarity << DACK_POLARITY) \| net2272_kick_dma() 787 (ep->dev->dma_dreq_polarity << DREQ_POLARITY) \| net2272_kick_dma() 797 net2272_start_dma(ep->dev); net2272_kick_dma() 802 static void net2272_cancel_dma(struct net2272 dev) net2272_cancel_dma() argument 805 switch (dev->dev_id) { net2272_cancel_dma() 807 writeb(0, dev->rdk1.plx9054_base_addr + DMACSR0); net2272_cancel_dma() 808 writeb(1 << CHANNEL_ABORT, dev->rdk1.plx9054_base_addr + DMACSR0); net2272_cancel_dma() 809 while (!(readb(dev->rdk1.plx9054_base_addr + DMACSR0) & net2272_cancel_dma() 815 dev->rdk1.plx9054_base_addr + DMACSR0); net2272_cancel_dma() 820 dev->dma_busy = 0; net2272_cancel_dma() 830 struct net2272 dev; net2272_queue() local 842 dev = ep->dev; net2272_queue() 843 if (!dev->driver \|\| dev->gadget.speed == USB_SPEED_UNKNOWN) net2272_queue() 848 status = usb_gadget_map_request(&dev->gadget, _req, net2272_queue() 854 dev_vdbg(dev->dev, "%s queue req %p, len %d buf %p dma %08llx %s\n", net2272_queue() 858 spin_lock_irqsave(&dev->lock, flags); net2272_queue() 868 dev_vdbg(dev->dev, "%s status ack\n", ep->ep.name); net2272_queue() 878 dev_dbg(dev->dev, "WARNING: returning ZLP short packet termination!\n"); net2272_queue() 920 spin_unlock_irqrestore(&dev->lock, flags); net2272_queue() 955 spin_lock_irqsave(&ep->dev->lock, flags); net2272_dequeue() 965 spin_unlock_irqrestore(&ep->dev->lock, flags); net2272_dequeue() 971 dev_dbg(ep->dev->dev, "unlink (%s) pio\n", _ep->name); net2272_dequeue() 977 spin_unlock_irqrestore(&ep->dev->lock, flags); net2272_dequeue() 993 if (!ep->dev->driver \|\| ep->dev->gadget.speed == USB_SPEED_UNKNOWN) net2272_set_halt_and_wedge() 998 spin_lock_irqsave(&ep->dev->lock, flags); net2272_set_halt_and_wedge() 1004 dev_vdbg(ep->dev->dev, "%s %s %s\n", _ep->name, net2272_set_halt_and_wedge() 1010 ep->dev->protocol_stall = 1; net2272_set_halt_and_wedge() 1020 spin_unlock_irqrestore(&ep->dev->lock, flags); net2272_set_halt_and_wedge() 1048 if (!ep->dev->driver \|\| ep->dev->gadget.speed == USB_SPEED_UNKNOWN) net2272_fifo_status() 1068 if (!ep->dev->driver \|\| ep->dev->gadget.speed == USB_SPEED_UNKNOWN) net2272_fifo_flush() 1095 struct net2272 dev; net2272_get_frame() local 1101 dev = container_of(_gadget, struct net2272, gadget); net2272_get_frame() 1102 spin_lock_irqsave(&dev->lock, flags); net2272_get_frame() 1104 ret = net2272_read(dev, FRAME1) << 8; net2272_get_frame() 1105 ret \|= net2272_read(dev, FRAME0); net2272_get_frame() 1107 spin_unlock_irqrestore(&dev->lock, flags); net2272_get_frame() 1114 struct net2272 dev; net2272_wakeup() local 1120 dev = container_of(_gadget, struct net2272, gadget); net2272_wakeup() 1122 spin_lock_irqsave(&dev->lock, flags); net2272_wakeup() 1123 tmp = net2272_read(dev, USBCTL0); net2272_wakeup() 1125 net2272_write(dev, USBCTL1, (1 << GENERATE_RESUME)); net2272_wakeup() 1127 spin_unlock_irqrestore(&dev->lock, flags); net2272_wakeup() 1146 struct net2272 dev; net2272_pullup() local 1152 dev = container_of(_gadget, struct net2272, gadget); net2272_pullup() 1154 spin_lock_irqsave(&dev->lock, flags); net2272_pullup() 1155 tmp = net2272_read(dev, USBCTL0); net2272_pullup() 1156 dev->softconnect = (is_on != 0); net2272_pullup() 1161 net2272_write(dev, USBCTL0, tmp); net2272_pullup() 1162 spin_unlock_irqrestore(&dev->lock, flags); net2272_pullup() 1185 struct net2272 dev; registers_show() local 1193 dev = dev_get_drvdata(_dev); registers_show() 1196 spin_lock_irqsave(&dev->lock, flags); registers_show() 1198 if (dev->driver) registers_show() 1199 s = dev->driver->driver.name; registers_show() 1208 driver_name, driver_vers, dev->chiprev, registers_show() 1209 net2272_read(dev, LOCCTL), registers_show() 1210 net2272_read(dev, IRQENB0), registers_show() 1211 net2272_read(dev, IRQENB1), registers_show() 1212 net2272_read(dev, IRQSTAT0), registers_show() 1213 net2272_read(dev, IRQSTAT1)); registers_show() 1218 t1 = net2272_read(dev, DMAREQ); registers_show() 1229 t1 = net2272_read(dev, USBCTL1); registers_show() 1233 else if (dev->gadget.speed == USB_SPEED_UNKNOWN) registers_show() 1241 net2272_read(dev, USBCTL0), t1, registers_show() 1242 net2272_read(dev, OURADDR), s); registers_show() 1250 ep = &dev->ep[i]; registers_show() 1303 spin_unlock_irqrestore(&dev->lock, flags); registers_show() 1312 net2272_set_fifo_mode(struct net2272 dev, int mode) net2272_set_fifo_mode() argument 1316 tmp = net2272_read(dev, LOCCTL) & 0x3f; net2272_set_fifo_mode() 1318 net2272_write(dev, LOCCTL, tmp); net2272_set_fifo_mode() 1320 INIT_LIST_HEAD(&dev->gadget.ep_list); net2272_set_fifo_mode() 1323 list_add_tail(&dev->ep[1].ep.ep_list, &dev->gadget.ep_list); net2272_set_fifo_mode() 1327 list_add_tail(&dev->ep[2].ep.ep_list, &dev->gadget.ep_list); net2272_set_fifo_mode() 1328 dev->ep[1].fifo_size = dev->ep[2].fifo_size = 512; net2272_set_fifo_mode() 1331 list_add_tail(&dev->ep[2].ep.ep_list, &dev->gadget.ep_list); net2272_set_fifo_mode() 1332 dev->ep[1].fifo_size = 1024; net2272_set_fifo_mode() 1333 dev->ep[2].fifo_size = 512; net2272_set_fifo_mode() 1336 list_add_tail(&dev->ep[2].ep.ep_list, &dev->gadget.ep_list); net2272_set_fifo_mode() 1337 dev->ep[1].fifo_size = dev->ep[2].fifo_size = 1024; net2272_set_fifo_mode() 1340 dev->ep[1].fifo_size = 1024; net2272_set_fifo_mode() 1345 list_add_tail(&dev->ep[3].ep.ep_list, &dev->gadget.ep_list); net2272_set_fifo_mode() 1346 dev->ep[3].fifo_size = 512; net2272_set_fifo_mode() 1352 net2272_usb_reset(struct net2272 dev) net2272_usb_reset() argument 1354 dev->gadget.speed = USB_SPEED_UNKNOWN; net2272_usb_reset() 1356 net2272_cancel_dma(dev); net2272_usb_reset() 1358 net2272_write(dev, IRQENB0, 0); net2272_usb_reset() 1359 net2272_write(dev, IRQENB1, 0); net2272_usb_reset() 1362 net2272_write(dev, IRQSTAT0, 0xff); net2272_usb_reset() 1363 net2272_write(dev, IRQSTAT1, ~(1 << SUSPEND_REQUEST_INTERRUPT)); net2272_usb_reset() 1365 net2272_write(dev, DMAREQ, net2272_usb_reset() 1369 (dev->dma_eot_polarity << EOT_POLARITY) \| net2272_usb_reset() 1370 (dev->dma_dack_polarity << DACK_POLARITY) \| net2272_usb_reset() 1371 (dev->dma_dreq_polarity << DREQ_POLARITY) \| net2272_usb_reset() 1374 net2272_cancel_dma(dev); net2272_usb_reset() 1375 net2272_set_fifo_mode(dev, (fifo_mode <= 3) ? fifo_mode : 0); net2272_usb_reset() 1381 net2272_write(dev, LOCCTL, net2272_read(dev, LOCCTL) \| (1 << DATA_WIDTH)); net2272_usb_reset() 1382 net2272_write(dev, LOCCTL1, (dma_mode << DMA_MODE)); net2272_usb_reset() 1386 net2272_usb_reinit(struct net2272 dev) net2272_usb_reinit() argument 1392 struct net2272_ep ep = &dev->ep[i]; net2272_usb_reinit() 1395 ep->dev = dev; net2272_usb_reinit() 1408 usb_ep_set_maxpacket_limit(&dev->ep[0].ep, 64); net2272_usb_reinit() 1410 dev->gadget.ep0 = &dev->ep[0].ep; net2272_usb_reinit() 1411 dev->ep[0].stopped = 0; net2272_usb_reinit() 1412 INIT_LIST_HEAD(&dev->gadget.ep0->ep_list); net2272_usb_reinit() 1416 net2272_ep0_start(struct net2272 dev) net2272_ep0_start() argument 1418 struct net2272_ep ep0 = &dev->ep[0]; net2272_ep0_start() 1426 net2272_write(dev, USBCTL0, net2272_ep0_start() 1427 (dev->softconnect << USB_DETECT_ENABLE) \| net2272_ep0_start() 1430 net2272_write(dev, IRQENB0, net2272_ep0_start() 1434 net2272_write(dev, IRQENB1, net2272_ep0_start() 1449 struct net2272 dev; net2272_start() local 1456 dev = container_of(_gadget, struct net2272, gadget); net2272_start() 1459 dev->ep[i].irqs = 0; net2272_start() 1461 dev->softconnect = 1; net2272_start() 1463 dev->driver = driver; net2272_start() 1468 net2272_ep0_start(dev); net2272_start() 1474 stop_activity(struct net2272 dev, struct usb_gadget_driver driver) stop_activity() argument 1479 if (dev->gadget.speed == USB_SPEED_UNKNOWN) stop_activity() 1485 net2272_usb_reset(dev); stop_activity() 1487 net2272_dequeue_all(&dev->ep[i]); stop_activity() 1491 spin_unlock(&dev->lock); stop_activity() 1492 driver->disconnect(&dev->gadget); stop_activity() 1493 spin_lock(&dev->lock); stop_activity() 1496 net2272_usb_reinit(dev); stop_activity() 1501 struct net2272 dev; net2272_stop() local 1504 dev = container_of(_gadget, struct net2272, gadget); net2272_stop() 1506 spin_lock_irqsave(&dev->lock, flags); net2272_stop() 1507 stop_activity(dev, NULL); net2272_stop() 1508 spin_unlock_irqrestore(&dev->lock, flags); net2272_stop() 1510 dev->driver = NULL; net2272_stop() 1530 dev_vdbg(ep->dev->dev, "handle_dma %s req %p\n", ep->ep.name, req); net2272_handle_dma() 1533 net2272_write(ep->dev, DMAREQ, net2272_handle_dma() 1537 \| (ep->dev->dma_eot_polarity << EOT_POLARITY) net2272_handle_dma() 1538 \| (ep->dev->dma_dack_polarity << DACK_POLARITY) net2272_handle_dma() 1539 \| (ep->dev->dma_dreq_polarity << DREQ_POLARITY) net2272_handle_dma() 1542 ep->dev->dma_busy = 0; net2272_handle_dma() 1568 if (net2272_read(ep->dev, IRQSTAT0) & net2272_handle_dma() 1571 net2272_cancel_dma(ep->dev); net2272_handle_dma() 1612 dev_vdbg(ep->dev->dev, "%s ack ep_stat0 %02x, ep_stat1 %02x, req %p\n", net2272_handle_ep() 1632 net2272_get_ep_by_addr(struct net2272 dev, u16 wIndex) net2272_get_ep_by_addr() argument 1637 return &dev->ep[0]; net2272_get_ep_by_addr() 1639 list_for_each_entry(ep, &dev->gadget.ep_list, ep.ep_list) { net2272_get_ep_by_addr() 1672 net2272_set_test_mode(struct net2272 dev, int mode) net2272_set_test_mode() argument 1679 net2272_write(dev, IRQENB0, 0x00); net2272_set_test_mode() 1680 net2272_write(dev, IRQENB1, 0x00); net2272_set_test_mode() 1683 net2272_write(dev, XCVRDIAG, 1 << FORCE_HIGH_SPEED); net2272_set_test_mode() 1685 net2272_write(dev, PAGESEL, 0); net2272_set_test_mode() 1686 net2272_write(dev, EP_STAT0, 1 << DATA_PACKET_TRANSMITTED_INTERRUPT); net2272_set_test_mode() 1687 net2272_write(dev, EP_RSPCLR, net2272_set_test_mode() 1690 net2272_write(dev, EP_CFG, 1 << ENDPOINT_DIRECTION); net2272_set_test_mode() 1691 net2272_write(dev, EP_STAT1, 1 << BUFFER_FLUSH); net2272_set_test_mode() 1694 while (!(net2272_read(dev, EP_STAT0) & net2272_set_test_mode() 1699 net2272_write(dev, USBTEST, mode); net2272_set_test_mode() 1704 net2272_write(dev, LOCCTL, net2272_read(dev, LOCCTL) & net2272_set_test_mode() 1708 net2272_write(dev, EP_DATA, net2272_test_packet[i]); net2272_set_test_mode() 1711 net2272_write(dev, EP_TRANSFER0, 0); net2272_set_test_mode() 1716 net2272_handle_stat0_irqs(struct net2272 dev, u8 stat) net2272_handle_stat0_irqs() argument 1730 if (dev->gadget.speed == USB_SPEED_UNKNOWN) { net2272_handle_stat0_irqs() 1731 if (net2272_read(dev, USBCTL1) & (1 << USB_HIGH_SPEED)) net2272_handle_stat0_irqs() 1732 dev->gadget.speed = USB_SPEED_HIGH; net2272_handle_stat0_irqs() 1734 dev->gadget.speed = USB_SPEED_FULL; net2272_handle_stat0_irqs() 1735 dev_dbg(dev->dev, "%s\n", net2272_handle_stat0_irqs() 1736 usb_speed_string(dev->gadget.speed)); net2272_handle_stat0_irqs() 1739 ep = &dev->ep[0]; net2272_handle_stat0_irqs() 1751 dev->protocol_stall = 0; net2272_handle_stat0_irqs() 1776 net2272_write(dev, PAGESEL, 0); net2272_handle_stat0_irqs() 1777 net2272_write(dev, EP_TRANSFER2, 0xff); net2272_handle_stat0_irqs() 1778 net2272_write(dev, EP_TRANSFER1, 0xff); net2272_handle_stat0_irqs() 1779 net2272_write(dev, EP_TRANSFER0, 0xff); net2272_handle_stat0_irqs() 1781 u.raw[0] = net2272_read(dev, SETUP0); net2272_handle_stat0_irqs() 1782 u.raw[1] = net2272_read(dev, SETUP1); net2272_handle_stat0_irqs() 1783 u.raw[2] = net2272_read(dev, SETUP2); net2272_handle_stat0_irqs() 1784 u.raw[3] = net2272_read(dev, SETUP3); net2272_handle_stat0_irqs() 1785 u.raw[4] = net2272_read(dev, SETUP4); net2272_handle_stat0_irqs() 1786 u.raw[5] = net2272_read(dev, SETUP5); net2272_handle_stat0_irqs() 1787 u.raw[6] = net2272_read(dev, SETUP6); net2272_handle_stat0_irqs() 1788 u.raw[7] = net2272_read(dev, SETUP7); net2272_handle_stat0_irqs() 1798 net2272_write(dev, IRQSTAT0, 1 << SETUP_PACKET_INTERRUPT); net2272_handle_stat0_irqs() 1825 e = net2272_get_ep_by_addr(dev, u.r.wIndex); net2272_handle_stat0_irqs() 1834 net2272_ep_write(&dev->ep[0], EP_IRQENB, 0); net2272_handle_stat0_irqs() 1835 writew(status, net2272_reg_addr(dev, EP_DATA)); net2272_handle_stat0_irqs() 1836 set_fifo_bytecount(&dev->ep[0], 0); net2272_handle_stat0_irqs() 1838 dev_vdbg(dev->dev, "%s stat %02x\n", net2272_handle_stat0_irqs() 1844 if (dev->gadget.is_selfpowered) net2272_handle_stat0_irqs() 1848 net2272_ep_write(&dev->ep[0], EP_IRQENB, 0); net2272_handle_stat0_irqs() 1849 writew(status, net2272_reg_addr(dev, EP_DATA)); net2272_handle_stat0_irqs() 1850 set_fifo_bytecount(&dev->ep[0], 0); net2272_handle_stat0_irqs() 1852 dev_vdbg(dev->dev, "device stat %02x\n", status); net2272_handle_stat0_irqs() 1859 net2272_ep_write(&dev->ep[0], EP_IRQENB, 0); net2272_handle_stat0_irqs() 1860 writew(status, net2272_reg_addr(dev, EP_DATA)); net2272_handle_stat0_irqs() 1861 set_fifo_bytecount(&dev->ep[0], 0); net2272_handle_stat0_irqs() 1863 dev_vdbg(dev->dev, "interface status %02x\n", status); net2272_handle_stat0_irqs() 1877 e = net2272_get_ep_by_addr(dev, u.r.wIndex); net2272_handle_stat0_irqs() 1881 dev_vdbg(dev->dev, "%s wedged, halt not cleared\n", net2272_handle_stat0_irqs() 1884 dev_vdbg(dev->dev, "%s clear halt\n", ep->ep.name); net2272_handle_stat0_irqs() 1895 net2272_set_test_mode(dev, (u.r.wIndex >> 8)); net2272_handle_stat0_irqs() 1897 dev_vdbg(dev->dev, "test mode: %d\n", u.r.wIndex); net2272_handle_stat0_irqs() 1904 e = net2272_get_ep_by_addr(dev, u.r.wIndex); net2272_handle_stat0_irqs() 1909 dev_vdbg(dev->dev, "%s set halt\n", ep->ep.name); net2272_handle_stat0_irqs() 1913 net2272_write(dev, OURADDR, u.r.wValue & 0xff); net2272_handle_stat0_irqs() 1919 dev_vdbg(dev->dev, "setup %02x.%02x v%04x i%04x " net2272_handle_stat0_irqs() 1924 spin_unlock(&dev->lock); net2272_handle_stat0_irqs() 1925 tmp = dev->driver->setup(&dev->gadget, &u.r); net2272_handle_stat0_irqs() 1926 spin_lock(&dev->lock); net2272_handle_stat0_irqs() 1932 dev_vdbg(dev->dev, "req %02x.%02x protocol STALL; stat %d\n", net2272_handle_stat0_irqs() 1934 dev->protocol_stall = 1; net2272_handle_stat0_irqs() 1938 net2272_cancel_dma(dev); net2272_handle_stat0_irqs() 1939 net2272_write(dev, IRQSTAT0, 1 << DMA_DONE_INTERRUPT); net2272_handle_stat0_irqs() 1941 num = (net2272_read(dev, DMAREQ) & (1 << DMA_ENDPOINT_SELECT)) net2272_handle_stat0_irqs() 1944 ep = &dev->ep[num]; net2272_handle_stat0_irqs() 1961 ep = &dev->ep[num]; net2272_handle_stat0_irqs() 1969 dev_dbg(dev->dev, "unhandled irqstat0 %02x\n", stat); net2272_handle_stat0_irqs() 1973 net2272_handle_stat1_irqs(struct net2272 dev, u8 stat) net2272_handle_stat1_irqs() argument 1989 net2272_write(dev, IRQSTAT1, tmp); net2272_handle_stat1_irqs() 1990 if (dev->gadget.speed != USB_SPEED_UNKNOWN) { net2272_handle_stat1_irqs() 1992 (net2272_read(dev, USBCTL1) & net2272_handle_stat1_irqs() 1995 dev_dbg(dev->dev, "disconnect %s\n", net2272_handle_stat1_irqs() 1996 dev->driver->driver.name); net2272_handle_stat1_irqs() 1998 (net2272_read(dev, USBCTL1) & mask) net2272_handle_stat1_irqs() 2001 dev_dbg(dev->dev, "reset %s\n", net2272_handle_stat1_irqs() 2002 dev->driver->driver.name); net2272_handle_stat1_irqs() 2006 stop_activity(dev, dev->driver); net2272_handle_stat1_irqs() 2007 net2272_ep0_start(dev); net2272_handle_stat1_irqs() 2008 spin_unlock(&dev->lock); net2272_handle_stat1_irqs() 2011 (&dev->gadget, dev->driver); net2272_handle_stat1_irqs() 2013 (dev->driver->disconnect) net2272_handle_stat1_irqs() 2014 (&dev->gadget); net2272_handle_stat1_irqs() 2015 spin_lock(&dev->lock); net2272_handle_stat1_irqs() 2027 net2272_write(dev, IRQSTAT1, tmp); net2272_handle_stat1_irqs() 2029 if (dev->driver->suspend) net2272_handle_stat1_irqs() 2030 dev->driver->suspend(&dev->gadget); net2272_handle_stat1_irqs() 2033 dev_dbg(dev->dev, "Suspend disabled, ignoring\n"); net2272_handle_stat1_irqs() 2036 if (dev->driver->resume) net2272_handle_stat1_irqs() 2037 dev->driver->resume(&dev->gadget); net2272_handle_stat1_irqs() 2044 net2272_write(dev, IRQSTAT1, stat); net2272_handle_stat1_irqs() 2053 dev_dbg(dev->dev, "unhandled irqstat1 %02x\n", stat); net2272_handle_stat1_irqs() 2058 struct net2272 dev = _dev; net2272_irq() local 2065 spin_lock(&dev->lock); net2272_irq() 2067 intcsr = readl(dev->rdk1.plx9054_base_addr + INTCSR); net2272_irq() 2071 dev->rdk1.plx9054_base_addr + INTCSR); net2272_irq() 2072 net2272_handle_stat1_irqs(dev, net2272_read(dev, IRQSTAT1)); net2272_irq() 2073 net2272_handle_stat0_irqs(dev, net2272_read(dev, IRQSTAT0)); net2272_irq() 2074 intcsr = readl(dev->rdk1.plx9054_base_addr + INTCSR); net2272_irq() 2076 dev->rdk1.plx9054_base_addr + INTCSR); net2272_irq() 2080 dev->rdk1.plx9054_base_addr + DMACSR0); net2272_irq() 2082 dmareq = net2272_read(dev, DMAREQ); net2272_irq() 2084 net2272_handle_dma(&dev->ep[2]); net2272_irq() 2086 net2272_handle_dma(&dev->ep[1]); net2272_irq() 2091 intcsr = readl(dev->rdk2.fpga_base_addr + RDK2_IRQSTAT); net2272_irq() 2093 spin_unlock(&dev->lock); net2272_irq() 2100 net2272_handle_stat1_irqs(dev, net2272_read(dev, IRQSTAT1)); net2272_irq() 2101 net2272_handle_stat0_irqs(dev, net2272_read(dev, IRQSTAT0)); net2272_irq() 2103 spin_unlock(&dev->lock); net2272_irq() 2108 static int net2272_present(struct net2272 dev) net2272_present() argument 2123 refval = net2272_read(dev, SCRATCH); net2272_present() 2125 net2272_write(dev, SCRATCH, ii); net2272_present() 2126 val = net2272_read(dev, SCRATCH); net2272_present() 2128 dev_dbg(dev->dev, net2272_present() 2136 net2272_write(dev, SCRATCH, refval); net2272_present() 2139 refval = net2272_read(dev, CHIPREV_2272); net2272_present() 2141 net2272_write(dev, CHIPREV_2272, ii); net2272_present() 2142 val = net2272_read(dev, CHIPREV_2272); net2272_present() 2144 dev_dbg(dev->dev, net2272_present() 2159 val = net2272_read(dev, CHIPREV_LEGACY); net2272_present() 2165 dev_dbg(dev->dev, net2272_present() 2177 val = net2272_read(dev, CHIPREV_2272); net2272_present() 2184 dev_dbg(dev->dev, net2272_present() 2192 dev_dbg(dev->dev, net2272_present() 2210 struct net2272 dev = dev_get_drvdata(_dev); net2272_gadget_release() local 2211 kfree(dev); net2272_gadget_release() 2217 net2272_remove(struct net2272 dev) net2272_remove() argument 2219 usb_del_gadget_udc(&dev->gadget); net2272_remove() 2220 free_irq(dev->irq, dev); net2272_remove() 2221 iounmap(dev->base_addr); net2272_remove() 2222 device_remove_file(dev->dev, &dev_attr_registers); net2272_remove() 2224 dev_info(dev->dev, "unbind\n"); net2272_remove() 2227 static struct net2272 net2272_probe_init(struct device dev, unsigned int irq) net2272_probe_init() argument 2232 dev_dbg(dev, "No IRQ!\n"); net2272_probe_init() 2243 ret->dev = dev; net2272_probe_init() 2254 net2272_probe_fin(struct net2272 dev, unsigned int irqflags) net2272_probe_fin() argument 2259 if (net2272_present(dev)) { net2272_probe_fin() 2260 dev_warn(dev->dev, "2272 not found!\n"); net2272_probe_fin() 2265 net2272_usb_reset(dev); net2272_probe_fin() 2266 net2272_usb_reinit(dev); net2272_probe_fin() 2268 ret = request_irq(dev->irq, net2272_irq, irqflags, driver_name, dev); net2272_probe_fin() 2270 dev_err(dev->dev, "request interrupt %i failed\n", dev->irq); net2272_probe_fin() 2274 dev->chiprev = net2272_read(dev, CHIPREV_2272); net2272_probe_fin() 2277 dev_info(dev->dev, "%s\n", driver_desc); net2272_probe_fin() 2278 dev_info(dev->dev, "irq %i, mem %p, chip rev %04x, dma %s\n", net2272_probe_fin() 2279 dev->irq, dev->base_addr, dev->chiprev, net2272_probe_fin() 2281 dev_info(dev->dev, "version: %s\n", driver_vers); net2272_probe_fin() 2283 ret = device_create_file(dev->dev, &dev_attr_registers); net2272_probe_fin() 2287 ret = usb_add_gadget_udc_release(dev->dev, &dev->gadget, net2272_probe_fin() 2295 device_remove_file(dev->dev, &dev_attr_registers); net2272_probe_fin() 2297 free_irq(dev->irq, dev); net2272_probe_fin() 2310 net2272_rdk1_probe(struct pci_dev pdev, struct net2272 dev) net2272_rdk1_probe() argument 2332 dev_dbg(dev->dev, "controller already in use\n"); net2272_rdk1_probe() 2340 dev_dbg(dev->dev, "can't map memory\n"); net2272_rdk1_probe() 2346 dev->rdk1.plx9054_base_addr = mem_mapped_addr[0]; net2272_rdk1_probe() 2347 dev->rdk1.epld_base_addr = mem_mapped_addr[2]; net2272_rdk1_probe() 2348 dev->base_addr = mem_mapped_addr[3]; net2272_rdk1_probe() 2351 tmp = readl(dev->rdk1.plx9054_base_addr + LBRD1); net2272_rdk1_probe() 2353 dev->rdk1.plx9054_base_addr + LBRD1); net2272_rdk1_probe() 2356 writel(readl(dev->rdk1.plx9054_base_addr + INTCSR) \| net2272_rdk1_probe() 2359 dev->rdk1.plx9054_base_addr + INTCSR); net2272_rdk1_probe() 2362 dev->rdk1.plx9054_base_addr + DMACSR0); net2272_rdk1_probe() 2372 dev->base_addr + EPLD_IO_CONTROL_REGISTER); net2272_rdk1_probe() 2375 writeb(readb(dev->base_addr + EPLD_IO_CONTROL_REGISTER) & net2272_rdk1_probe() 2377 dev->base_addr + EPLD_IO_CONTROL_REGISTER); net2272_rdk1_probe() 2393 net2272_rdk2_probe(struct pci_dev pdev, struct net2272 dev) net2272_rdk2_probe() argument 2410 dev_dbg(dev->dev, "controller already in use\n"); net2272_rdk2_probe() 2418 dev_dbg(dev->dev, "can't map memory\n"); net2272_rdk2_probe() 2424 dev->rdk2.fpga_base_addr = mem_mapped_addr[0]; net2272_rdk2_probe() 2425 dev->base_addr = mem_mapped_addr[1]; net2272_rdk2_probe() 2429 writel((1 << CHIP_RESET), dev->rdk2.fpga_base_addr + RDK2_LOCCTLRDK); net2272_rdk2_probe() 2431 writel((1 << BUS_WIDTH), dev->rdk2.fpga_base_addr + RDK2_LOCCTLRDK); net2272_rdk2_probe() 2433 dev_info(dev->dev, "RDK2 FPGA version %08x\n", net2272_rdk2_probe() 2434 readl(dev->rdk2.fpga_base_addr + RDK2_FPGAREV)); net2272_rdk2_probe() 2436 writel((1 << NET2272_PCI_IRQ), dev->rdk2.fpga_base_addr + RDK2_IRQENB); net2272_rdk2_probe() 2453 struct net2272 dev; net2272_pci_probe() local 2456 dev = net2272_probe_init(&pdev->dev, pdev->irq); net2272_pci_probe() 2457 if (IS_ERR(dev)) net2272_pci_probe() 2458 return PTR_ERR(dev); net2272_pci_probe() 2459 dev->dev_id = pdev->device; net2272_pci_probe() 2469 case PCI_DEVICE_ID_RDK1: ret = net2272_rdk1_probe(pdev, dev); break; net2272_pci_probe() 2470 case PCI_DEVICE_ID_RDK2: ret = net2272_rdk2_probe(pdev, dev); break; net2272_pci_probe() 2476 ret = net2272_probe_fin(dev, 0); net2272_pci_probe() 2480 pci_set_drvdata(pdev, dev); net2272_pci_probe() 2487 kfree(dev); net2272_pci_probe() 2493 net2272_rdk1_remove(struct pci_dev pdev, struct net2272 dev) net2272_rdk1_remove() argument 2498 writel(readl(dev->rdk1.plx9054_base_addr + INTCSR) & net2272_rdk1_remove() 2500 dev->rdk1.plx9054_base_addr + INTCSR); net2272_rdk1_remove() 2503 iounmap(dev->rdk1.plx9054_base_addr); net2272_rdk1_remove() 2504 iounmap(dev->rdk1.epld_base_addr); net2272_rdk1_remove() 2515 net2272_rdk2_remove(struct pci_dev pdev, struct net2272 dev) net2272_rdk2_remove() argument 2520 writel(readl(dev->rdk1.plx9054_base_addr + INTCSR) & net2272_rdk2_remove() 2522 dev->rdk1.plx9054_base_addr + INTCSR); net2272_rdk2_remove() 2526 iounmap(dev->rdk2.fpga_base_addr); net2272_rdk2_remove() 2536 struct net2272 dev = pci_get_drvdata(pdev); net2272_pci_remove() local 2538 net2272_remove(dev); net2272_pci_remove() 2541 case PCI_DEVICE_ID_RDK1: net2272_rdk1_remove(pdev, dev); break; net2272_pci_remove() 2542 case PCI_DEVICE_ID_RDK2: net2272_rdk2_remove(pdev, dev); break; net2272_pci_remove() 2548 kfree(dev); net2272_pci_remove() 2601 struct net2272 dev; net2272_plat_probe() local 2611 dev_err(&pdev->dev, "must provide irq/base addr"); net2272_plat_probe() 2615 dev = net2272_probe_init(&pdev->dev, irq_res->start); net2272_plat_probe() 2616 if (IS_ERR(dev)) net2272_plat_probe() 2617 return PTR_ERR(dev); net2272_plat_probe() 2632 dev->base_shift = iomem_bus->start; net2272_plat_probe() 2635 dev_dbg(dev->dev, "get request memory region!\n"); net2272_plat_probe() 2639 dev->base_addr = ioremap_nocache(base, len); net2272_plat_probe() 2640 if (!dev->base_addr) { net2272_plat_probe() 2641 dev_dbg(dev->dev, "can't map memory\n"); net2272_plat_probe() 2646 ret = net2272_probe_fin(dev, IRQF_TRIGGER_LOW); net2272_plat_probe() 2650 platform_set_drvdata(pdev, dev); net2272_plat_probe() 2651 dev_info(&pdev->dev, "running in 16-bit, %sbyte swap local bus mode\n", net2272_plat_probe() 2652 (net2272_read(dev, LOCCTL) & (1 << BYTE_SWAP)) ? "" : "no "); net2272_plat_probe() 2657 iounmap(dev->base_addr); net2272_plat_probe() 2667 struct net2272 *dev = platform_get_drvdata(pdev); net2272_plat_remove() local 2669 net2272_remove(dev); net2272_plat_remove() 2674 kfree(dev); net2272_plat_remove()
/linux-4.1.27/drivers/media/platform/exynos4-is/
H A D	fimc-lite-reg.c	23 void flite_hw_reset(struct fimc_lite dev) flite_hw_reset() argument 28 cfg = readl(dev->regs + FLITE_REG_CIGCTRL); flite_hw_reset() 30 writel(cfg, dev->regs + FLITE_REG_CIGCTRL); flite_hw_reset() 33 cfg = readl(dev->regs + FLITE_REG_CIGCTRL); flite_hw_reset() 40 writel(cfg, dev->regs + FLITE_REG_CIGCTRL); flite_hw_reset() 43 void flite_hw_clear_pending_irq(struct fimc_lite dev) flite_hw_clear_pending_irq() argument 45 u32 cfg = readl(dev->regs + FLITE_REG_CISTATUS); flite_hw_clear_pending_irq() 47 writel(cfg, dev->regs + FLITE_REG_CISTATUS); flite_hw_clear_pending_irq() 50 u32 flite_hw_get_interrupt_source(struct fimc_lite dev) flite_hw_get_interrupt_source() argument 52 u32 intsrc = readl(dev->regs + FLITE_REG_CISTATUS); flite_hw_get_interrupt_source() 56 void flite_hw_clear_last_capture_end(struct fimc_lite dev) flite_hw_clear_last_capture_end() argument 59 u32 cfg = readl(dev->regs + FLITE_REG_CISTATUS2); flite_hw_clear_last_capture_end() 61 writel(cfg, dev->regs + FLITE_REG_CISTATUS2); flite_hw_clear_last_capture_end() 64 void flite_hw_set_interrupt_mask(struct fimc_lite dev) flite_hw_set_interrupt_mask() argument 69 if (atomic_read(&dev->out_path) == FIMC_IO_DMA) { flite_hw_set_interrupt_mask() 80 cfg = readl(dev->regs + FLITE_REG_CIGCTRL); flite_hw_set_interrupt_mask() 83 writel(cfg, dev->regs + FLITE_REG_CIGCTRL); flite_hw_set_interrupt_mask() 86 void flite_hw_capture_start(struct fimc_lite dev) flite_hw_capture_start() argument 88 u32 cfg = readl(dev->regs + FLITE_REG_CIIMGCPT); flite_hw_capture_start() 90 writel(cfg, dev->regs + FLITE_REG_CIIMGCPT); flite_hw_capture_start() 93 void flite_hw_capture_stop(struct fimc_lite dev) flite_hw_capture_stop() argument 95 u32 cfg = readl(dev->regs + FLITE_REG_CIIMGCPT); flite_hw_capture_stop() 97 writel(cfg, dev->regs + FLITE_REG_CIIMGCPT); flite_hw_capture_stop() 104 void flite_hw_set_test_pattern(struct fimc_lite dev, bool on) flite_hw_set_test_pattern() argument 106 u32 cfg = readl(dev->regs + FLITE_REG_CIGCTRL); flite_hw_set_test_pattern() 111 writel(cfg, dev->regs + FLITE_REG_CIGCTRL); flite_hw_set_test_pattern() 130 void flite_hw_set_source_format(struct fimc_lite dev, struct flite_frame f) flite_hw_set_source_format() argument 142 v4l2_err(&dev->ve.vdev, flite_hw_set_source_format() 147 cfg = readl(dev->regs + FLITE_REG_CIGCTRL); flite_hw_set_source_format() 150 writel(cfg, dev->regs + FLITE_REG_CIGCTRL); flite_hw_set_source_format() 152 cfg = readl(dev->regs + FLITE_REG_CISRCSIZE); flite_hw_set_source_format() 157 writel(cfg, dev->regs + FLITE_REG_CISRCSIZE); flite_hw_set_source_format() 161 void flite_hw_set_window_offset(struct fimc_lite dev, struct flite_frame f) flite_hw_set_window_offset() argument 166 cfg = readl(dev->regs + FLITE_REG_CIWDOFST); flite_hw_set_window_offset() 170 writel(cfg, dev->regs + FLITE_REG_CIWDOFST); flite_hw_set_window_offset() 176 writel(cfg, dev->regs + FLITE_REG_CIWDOFST2); flite_hw_set_window_offset() 180 static void flite_hw_set_camera_port(struct fimc_lite dev, int id) flite_hw_set_camera_port() argument 182 u32 cfg = readl(dev->regs + FLITE_REG_CIGENERAL); flite_hw_set_camera_port() 187 writel(cfg, dev->regs + FLITE_REG_CIGENERAL); flite_hw_set_camera_port() 191 void flite_hw_set_camera_bus(struct fimc_lite dev, flite_hw_set_camera_bus() argument 194 u32 cfg = readl(dev->regs + FLITE_REG_CIGCTRL); flite_hw_set_camera_bus() 215 writel(cfg, dev->regs + FLITE_REG_CIGCTRL); flite_hw_set_camera_bus() 217 flite_hw_set_camera_port(dev, si->mux_id); flite_hw_set_camera_bus() 220 static void flite_hw_set_pack12(struct fimc_lite dev, int on) flite_hw_set_pack12() argument 222 u32 cfg = readl(dev->regs + FLITE_REG_CIODMAFMT); flite_hw_set_pack12() 229 writel(cfg, dev->regs + FLITE_REG_CIODMAFMT); flite_hw_set_pack12() 232 static void flite_hw_set_out_order(struct fimc_lite dev, struct flite_frame f) flite_hw_set_out_order() argument 240 u32 cfg = readl(dev->regs + FLITE_REG_CIODMAFMT); flite_hw_set_out_order() 247 writel(cfg \| pixcode[i][1], dev->regs + FLITE_REG_CIODMAFMT); flite_hw_set_out_order() 250 void flite_hw_set_dma_window(struct fimc_lite dev, struct flite_frame f) flite_hw_set_dma_window() argument 255 cfg = readl(dev->regs + FLITE_REG_CIOCAN); flite_hw_set_dma_window() 258 writel(cfg, dev->regs + FLITE_REG_CIOCAN); flite_hw_set_dma_window() 261 cfg = readl(dev->regs + FLITE_REG_CIOOFF); flite_hw_set_dma_window() 264 writel(cfg, dev->regs + FLITE_REG_CIOOFF); flite_hw_set_dma_window() 267 void flite_hw_set_dma_buffer(struct fimc_lite dev, struct flite_buffer buf) flite_hw_set_dma_buffer() argument 272 if (dev->dd->max_dma_bufs == 1) flite_hw_set_dma_buffer() 278 writel(buf->paddr, dev->regs + FLITE_REG_CIOSA); flite_hw_set_dma_buffer() 280 writel(buf->paddr, dev->regs + FLITE_REG_CIOSAN(index - 1)); flite_hw_set_dma_buffer() 282 cfg = readl(dev->regs + FLITE_REG_CIFCNTSEQ); flite_hw_set_dma_buffer() 284 writel(cfg, dev->regs + FLITE_REG_CIFCNTSEQ); flite_hw_set_dma_buffer() 287 void flite_hw_mask_dma_buffer(struct fimc_lite dev, u32 index) flite_hw_mask_dma_buffer() argument 291 if (dev->dd->max_dma_bufs == 1) flite_hw_mask_dma_buffer() 294 cfg = readl(dev->regs + FLITE_REG_CIFCNTSEQ); flite_hw_mask_dma_buffer() 296 writel(cfg, dev->regs + FLITE_REG_CIFCNTSEQ); flite_hw_mask_dma_buffer() 300 void flite_hw_set_output_dma(struct fimc_lite dev, struct flite_frame f, flite_hw_set_output_dma() argument 303 u32 cfg = readl(dev->regs + FLITE_REG_CIGCTRL); flite_hw_set_output_dma() 307 writel(cfg, dev->regs + FLITE_REG_CIGCTRL); flite_hw_set_output_dma() 312 writel(cfg, dev->regs + FLITE_REG_CIGCTRL); flite_hw_set_output_dma() 314 flite_hw_set_out_order(dev, f); flite_hw_set_output_dma() 315 flite_hw_set_dma_window(dev, f); flite_hw_set_output_dma() 316 flite_hw_set_pack12(dev, 0); flite_hw_set_output_dma() 319 void flite_hw_dump_regs(struct fimc_lite dev, const char label) flite_hw_dump_regs() argument 342 v4l2_info(&dev->subdev, "--- %s ---\n", label); flite_hw_dump_regs() 345 u32 cfg = readl(dev->regs + registers[i].offset); flite_hw_dump_regs() 346 v4l2_info(&dev->subdev, "%9s: 0x%08x\n", flite_hw_dump_regs()
/linux-4.1.27/drivers/usb/host/
H A D	ohci-platform.c	47 static int ohci_platform_power_on(struct platform_device dev) ohci_platform_power_on() argument 49 struct usb_hcd hcd = platform_get_drvdata(dev); ohci_platform_power_on() 88 static void ohci_platform_power_off(struct platform_device dev) ohci_platform_power_off() argument 90 struct usb_hcd hcd = platform_get_drvdata(dev); ohci_platform_power_off() 119 static int ohci_platform_probe(struct platform_device dev) ohci_platform_probe() argument 123 struct usb_ohci_pdata pdata = dev_get_platdata(&dev->dev); ohci_platform_probe() 139 err = dma_coerce_mask_and_coherent(&dev->dev, DMA_BIT_MASK(32)); ohci_platform_probe() 143 irq = platform_get_irq(dev, 0); ohci_platform_probe() 145 dev_err(&dev->dev, "no irq provided"); ohci_platform_probe() 149 hcd = usb_create_hcd(&ohci_platform_hc_driver, &dev->dev, ohci_platform_probe() 150 dev_name(&dev->dev)); ohci_platform_probe() 154 platform_set_drvdata(dev, hcd); ohci_platform_probe() 155 dev->dev.platform_data = pdata; ohci_platform_probe() 159 if (pdata == &ohci_platform_defaults && dev->dev.of_node) { ohci_platform_probe() 160 if (of_property_read_bool(dev->dev.of_node, "big-endian-regs")) ohci_platform_probe() 163 if (of_property_read_bool(dev->dev.of_node, "big-endian-desc")) ohci_platform_probe() 166 if (of_property_read_bool(dev->dev.of_node, "big-endian")) ohci_platform_probe() 169 if (of_property_read_bool(dev->dev.of_node, "no-big-frame-no")) ohci_platform_probe() 172 of_property_read_u32(dev->dev.of_node, "num-ports", ohci_platform_probe() 175 priv->num_phys = of_count_phandle_with_args(dev->dev.of_node, ohci_platform_probe() 179 priv->phys = devm_kcalloc(&dev->dev, priv->num_phys, ohci_platform_probe() 186 dev->dev.of_node, ohci_platform_probe() 192 dev_err(&dev->dev, "phy-names not provided"); ohci_platform_probe() 198 priv->phys[phy_num] = devm_phy_get(&dev->dev, ohci_platform_probe() 210 priv->clks[clk] = of_clk_get(dev->dev.of_node, clk); ohci_platform_probe() 222 priv->rst = devm_reset_control_get_optional(&dev->dev, NULL); ohci_platform_probe() 245 dev_err(&dev->dev, ohci_platform_probe() 253 dev_err(&dev->dev, ohci_platform_probe() 261 err = pdata->power_on(dev); ohci_platform_probe() 266 res_mem = platform_get_resource(dev, IORESOURCE_MEM, 0); ohci_platform_probe() 267 hcd->regs = devm_ioremap_resource(&dev->dev, res_mem); ohci_platform_probe() 281 platform_set_drvdata(dev, hcd); ohci_platform_probe() 287 pdata->power_off(dev); ohci_platform_probe() 296 dev->dev.platform_data = NULL; ohci_platform_probe() 303 static int ohci_platform_remove(struct platform_device dev) ohci_platform_remove() argument 305 struct usb_hcd hcd = platform_get_drvdata(dev); ohci_platform_remove() 306 struct usb_ohci_pdata pdata = dev_get_platdata(&dev->dev); ohci_platform_remove() 313 pdata->power_off(dev); ohci_platform_remove() 324 dev->dev.platform_data = NULL; ohci_platform_remove() 330 static int ohci_platform_suspend(struct device dev) ohci_platform_suspend() argument 332 struct usb_hcd hcd = dev_get_drvdata(dev); ohci_platform_suspend() 333 struct usb_ohci_pdata pdata = dev->platform_data; ohci_platform_suspend() 335 container_of(dev, struct platform_device, dev); ohci_platform_suspend() 336 bool do_wakeup = device_may_wakeup(dev); ohci_platform_suspend() 349 static int ohci_platform_resume(struct device dev) ohci_platform_resume() argument 351 struct usb_hcd hcd = dev_get_drvdata(dev); ohci_platform_resume() 352 struct usb_ohci_pdata *pdata = dev_get_platdata(dev); ohci_platform_resume() 354 container_of(dev, struct platform_device, dev); ohci_platform_resume()
/linux-4.1.27/include/net/
H A D	x25device.h	`9 static inline __be16 x25_type_trans(struct sk_buff skb, struct net_device dev) x25_type_trans() argument 11 skb->dev = dev; x25_type_trans()`
/linux-4.1.27/arch/arm/mach-footbridge/
H A D	cats-pci.c	19 static u8 cats_no_swizzle(struct pci_dev dev, u8 pin) cats_no_swizzle() argument 24 static int __init cats_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) cats_map_irq() argument 26 if (dev->irq >= 255) cats_map_irq() 29 if (dev->irq >= 128) cats_map_irq() 30 return dev->irq & 0x1f; cats_map_irq() 32 if (dev->irq >= 1 && dev->irq <= 4) cats_map_irq() 33 return irqmap_cats[dev->irq - 1]; cats_map_irq() 35 if (dev->irq != 0) cats_map_irq() 37 dev->bus->number, dev->devfn, dev->irq); cats_map_irq()
/linux-4.1.27/net/core/
H A D	link_watch.c	40 static unsigned char default_operstate(const struct net_device dev) default_operstate() argument 42 if (!netif_carrier_ok(dev)) default_operstate() 43 return (dev->ifindex != dev_get_iflink(dev) ? default_operstate() 46 if (netif_dormant(dev)) default_operstate() 53 static void rfc2863_policy(struct net_device dev) rfc2863_policy() argument 55 unsigned char operstate = default_operstate(dev); rfc2863_policy() 57 if (operstate == dev->operstate) rfc2863_policy() 62 switch(dev->link_mode) { rfc2863_policy() 73 dev->operstate = operstate; rfc2863_policy() 79 void linkwatch_init_dev(struct net_device dev) linkwatch_init_dev() argument 82 if (!netif_carrier_ok(dev) \|\| netif_dormant(dev)) linkwatch_init_dev() 83 rfc2863_policy(dev); linkwatch_init_dev() 87 static bool linkwatch_urgent_event(struct net_device dev) linkwatch_urgent_event() argument 89 if (!netif_running(dev)) linkwatch_urgent_event() 92 if (dev->ifindex != dev_get_iflink(dev)) linkwatch_urgent_event() 95 if (dev->priv_flags & IFF_TEAM_PORT) linkwatch_urgent_event() 98 return netif_carrier_ok(dev) && qdisc_tx_changing(dev); linkwatch_urgent_event() 102 static void linkwatch_add_event(struct net_device dev) linkwatch_add_event() argument 107 if (list_empty(&dev->link_watch_list)) { linkwatch_add_event() 108 list_add_tail(&dev->link_watch_list, &lweventlist); linkwatch_add_event() 109 dev_hold(dev); linkwatch_add_event() 144 static void linkwatch_do_dev(struct net_device dev) linkwatch_do_dev() argument 155 clear_bit(__LINK_STATE_LINKWATCH_PENDING, &dev->state); linkwatch_do_dev() 157 rfc2863_policy(dev); linkwatch_do_dev() 158 if (dev->flags & IFF_UP) { linkwatch_do_dev() 159 if (netif_carrier_ok(dev)) linkwatch_do_dev() 160 dev_activate(dev); linkwatch_do_dev() 162 dev_deactivate(dev); linkwatch_do_dev() 164 netdev_state_change(dev); linkwatch_do_dev() 166 dev_put(dev); linkwatch_do_dev() 171 struct net_device dev; __linkwatch_run_queue() local 194 dev = list_first_entry(&wrk, struct net_device, link_watch_list); __linkwatch_run_queue() 195 list_del_init(&dev->link_watch_list); __linkwatch_run_queue() 197 if (urgent_only && !linkwatch_urgent_event(dev)) { __linkwatch_run_queue() 198 list_add_tail(&dev->link_watch_list, &lweventlist); __linkwatch_run_queue() 202 linkwatch_do_dev(dev); __linkwatch_run_queue() 211 void linkwatch_forget_dev(struct net_device dev) linkwatch_forget_dev() argument 217 if (!list_empty(&dev->link_watch_list)) { linkwatch_forget_dev() 218 list_del_init(&dev->link_watch_list); linkwatch_forget_dev() 223 linkwatch_do_dev(dev); linkwatch_forget_dev() 242 void linkwatch_fire_event(struct net_device *dev) linkwatch_fire_event() argument 244 bool urgent = linkwatch_urgent_event(dev); linkwatch_fire_event() 246 if (!test_and_set_bit(__LINK_STATE_LINKWATCH_PENDING, &dev->state)) { linkwatch_fire_event() 247 linkwatch_add_event(dev); linkwatch_fire_event()
/linux-4.1.27/drivers/usb/gadget/function/
H A D	f_printer.c	266 struct printer_dev dev = ep->driver_data; rx_complete() local 270 spin_lock_irqsave(&dev->lock, flags); rx_complete() 279 list_add_tail(&req->list, &dev->rx_buffers); rx_complete() 280 DBG(dev, "G_Printer : rx length %d\n", req->actual); rx_complete() 282 list_add(&req->list, &dev->rx_reqs); rx_complete() 289 VDBG(dev, "rx shutdown, code %d\n", status); rx_complete() 290 list_add(&req->list, &dev->rx_reqs); rx_complete() 295 DBG(dev, "rx %s reset\n", ep->name); rx_complete() 296 list_add(&req->list, &dev->rx_reqs); rx_complete() 304 DBG(dev, "rx status %d\n", status); rx_complete() 305 list_add(&req->list, &dev->rx_reqs); rx_complete() 309 wake_up_interruptible(&dev->rx_wait); rx_complete() 310 spin_unlock_irqrestore(&dev->lock, flags); rx_complete() 315 struct printer_dev dev = ep->driver_data; tx_complete() local 319 VDBG(dev, "tx err %d\n", req->status); tx_complete() 328 spin_lock(&dev->lock); tx_complete() 333 list_add(&req->list, &dev->tx_reqs); tx_complete() 334 wake_up_interruptible(&dev->tx_wait); tx_complete() 335 if (likely(list_empty(&dev->tx_reqs_active))) tx_complete() 336 wake_up_interruptible(&dev->tx_flush_wait); tx_complete() 338 spin_unlock(&dev->lock); tx_complete() 346 struct printer_dev dev; printer_open() local 350 dev = container_of(inode->i_cdev, struct printer_dev, printer_cdev); printer_open() 352 spin_lock_irqsave(&dev->lock, flags); printer_open() 354 if (!dev->printer_cdev_open) { printer_open() 355 dev->printer_cdev_open = 1; printer_open() 356 fd->private_data = dev; printer_open() 359 dev->printer_status \|= PRINTER_SELECTED; printer_open() 362 spin_unlock_irqrestore(&dev->lock, flags); printer_open() 364 DBG(dev, "printer_open returned %x\n", ret); printer_open() 371 struct printer_dev dev = fd->private_data; printer_close() local 374 spin_lock_irqsave(&dev->lock, flags); printer_close() 375 dev->printer_cdev_open = 0; printer_close() 378 dev->printer_status &= ~PRINTER_SELECTED; printer_close() 379 spin_unlock_irqrestore(&dev->lock, flags); printer_close() 381 DBG(dev, "printer_close\n"); printer_close() 388 setup_rx_reqs(struct printer_dev dev) setup_rx_reqs() argument 392 while (likely(!list_empty(&dev->rx_reqs))) { setup_rx_reqs() 395 req = container_of(dev->rx_reqs.next, setup_rx_reqs() 409 spin_unlock(&dev->lock); setup_rx_reqs() 410 error = usb_ep_queue(dev->out_ep, req, GFP_ATOMIC); setup_rx_reqs() 411 spin_lock(&dev->lock); setup_rx_reqs() 413 DBG(dev, "rx submit --> %d\n", error); setup_rx_reqs() 414 list_add(&req->list, &dev->rx_reqs); setup_rx_reqs() 417 / if the req is empty, then add it into dev->rx_reqs_active. / setup_rx_reqs() 419 list_add(&req->list, &dev->rx_reqs_active); setup_rx_reqs() 426 struct printer_dev dev = fd->private_data; printer_read() local 441 DBG(dev, "printer_read trying to read %d bytes\n", (int)len); printer_read() 443 mutex_lock(&dev->lock_printer_io); printer_read() 444 spin_lock_irqsave(&dev->lock, flags); printer_read() 449 dev->reset_printer = 0; printer_read() 451 setup_rx_reqs(dev); printer_read() 454 current_rx_req = dev->current_rx_req; printer_read() 455 current_rx_bytes = dev->current_rx_bytes; printer_read() 456 current_rx_buf = dev->current_rx_buf; printer_read() 457 dev->current_rx_req = NULL; printer_read() 458 dev->current_rx_bytes = 0; printer_read() 459 dev->current_rx_buf = NULL; printer_read() 468 (likely(list_empty(&dev->rx_buffers)))) { printer_read() 470 spin_unlock_irqrestore(&dev->lock, flags); printer_read() 477 mutex_unlock(&dev->lock_printer_io); printer_read() 482 wait_event_interruptible(dev->rx_wait, printer_read() 483 (likely(!list_empty(&dev->rx_buffers)))); printer_read() 484 spin_lock_irqsave(&dev->lock, flags); printer_read() 488 while ((current_rx_bytes \|\| likely(!list_empty(&dev->rx_buffers))) printer_read() 491 req = container_of(dev->rx_buffers.next, printer_read() 500 list_add(&req->list, &dev->rx_reqs); printer_read() 506 spin_unlock_irqrestore(&dev->lock, flags); printer_read() 518 spin_lock_irqsave(&dev->lock, flags); printer_read() 521 if (dev->reset_printer) { printer_read() 522 list_add(&current_rx_req->list, &dev->rx_reqs); printer_read() 523 spin_unlock_irqrestore(&dev->lock, flags); printer_read() 524 mutex_unlock(&dev->lock_printer_io); printer_read() 537 list_add(&current_rx_req->list, &dev->rx_reqs); printer_read() 544 dev->current_rx_req = current_rx_req; printer_read() 545 dev->current_rx_bytes = current_rx_bytes; printer_read() 546 dev->current_rx_buf = current_rx_buf; printer_read() 548 spin_unlock_irqrestore(&dev->lock, flags); printer_read() 549 mutex_unlock(&dev->lock_printer_io); printer_read() 551 DBG(dev, "printer_read returned %d bytes\n", (int)bytes_copied); printer_read() 562 struct printer_dev dev = fd->private_data; printer_write() local 568 DBG(dev, "printer_write trying to send %d bytes\n", (int)len); printer_write() 573 mutex_lock(&dev->lock_printer_io); printer_write() 574 spin_lock_irqsave(&dev->lock, flags); printer_write() 577 dev->reset_printer = 0; printer_write() 580 if (likely(list_empty(&dev->tx_reqs))) { printer_write() 582 spin_unlock_irqrestore(&dev->lock, flags); printer_write() 589 mutex_unlock(&dev->lock_printer_io); printer_write() 594 wait_event_interruptible(dev->tx_wait, printer_write() 595 (likely(!list_empty(&dev->tx_reqs)))); printer_write() 596 spin_lock_irqsave(&dev->lock, flags); printer_write() 599 while (likely(!list_empty(&dev->tx_reqs)) && len) { printer_write() 606 req = container_of(dev->tx_reqs.next, struct usb_request, printer_write() 621 req->zero = ((len % dev->in_ep->maxpacket) == 0); printer_write() 624 spin_unlock_irqrestore(&dev->lock, flags); printer_write() 627 list_add(&req->list, &dev->tx_reqs); printer_write() 628 mutex_unlock(&dev->lock_printer_io); printer_write() 636 spin_lock_irqsave(&dev->lock, flags); printer_write() 639 if (dev->reset_printer) { printer_write() 640 list_add(&req->list, &dev->tx_reqs); printer_write() 641 spin_unlock_irqrestore(&dev->lock, flags); printer_write() 642 mutex_unlock(&dev->lock_printer_io); printer_write() 646 if (usb_ep_queue(dev->in_ep, req, GFP_ATOMIC)) { printer_write() 647 list_add(&req->list, &dev->tx_reqs); printer_write() 648 spin_unlock_irqrestore(&dev->lock, flags); printer_write() 649 mutex_unlock(&dev->lock_printer_io); printer_write() 653 list_add(&req->list, &dev->tx_reqs_active); printer_write() 657 spin_unlock_irqrestore(&dev->lock, flags); printer_write() 658 mutex_unlock(&dev->lock_printer_io); printer_write() 660 DBG(dev, "printer_write sent %d bytes\n", (int)bytes_copied); printer_write() 671 struct printer_dev dev = fd->private_data; printer_fsync() local 677 spin_lock_irqsave(&dev->lock, flags); printer_fsync() 678 tx_list_empty = (likely(list_empty(&dev->tx_reqs))); printer_fsync() 679 spin_unlock_irqrestore(&dev->lock, flags); printer_fsync() 683 wait_event_interruptible(dev->tx_flush_wait, printer_fsync() 684 (likely(list_empty(&dev->tx_reqs_active)))); printer_fsync() 694 struct printer_dev dev = fd->private_data; printer_poll() local 698 mutex_lock(&dev->lock_printer_io); printer_poll() 699 spin_lock_irqsave(&dev->lock, flags); printer_poll() 700 setup_rx_reqs(dev); printer_poll() 701 spin_unlock_irqrestore(&dev->lock, flags); printer_poll() 702 mutex_unlock(&dev->lock_printer_io); printer_poll() 704 poll_wait(fd, &dev->rx_wait, wait); printer_poll() 705 poll_wait(fd, &dev->tx_wait, wait); printer_poll() 707 spin_lock_irqsave(&dev->lock, flags); printer_poll() 708 if (likely(!list_empty(&dev->tx_reqs))) printer_poll() 711 if (likely(dev->current_rx_bytes) \|\| printer_poll() 712 likely(!list_empty(&dev->rx_buffers))) printer_poll() 715 spin_unlock_irqrestore(&dev->lock, flags); printer_poll() 723 struct printer_dev dev = fd->private_data; printer_ioctl() local 727 DBG(dev, "printer_ioctl: cmd=0x%4.4x, arg=%lu\n", code, arg); printer_ioctl() 731 spin_lock_irqsave(&dev->lock, flags); printer_ioctl() 735 status = (int)dev->printer_status; printer_ioctl() 738 dev->printer_status = (u8)arg; printer_ioctl() 742 DBG(dev, "printer_ioctl: ERROR cmd=0x%4.4xis not supported\n", printer_ioctl() 747 spin_unlock_irqrestore(&dev->lock, flags); printer_ioctl() 768 set_printer_interface(struct printer_dev dev) set_printer_interface() argument 772 dev->in_ep->desc = ep_desc(dev->gadget, &fs_ep_in_desc, &hs_ep_in_desc, set_printer_interface() 774 dev->in_ep->driver_data = dev; set_printer_interface() 776 dev->out_ep->desc = ep_desc(dev->gadget, &fs_ep_out_desc, set_printer_interface() 778 dev->out_ep->driver_data = dev; set_printer_interface() 780 result = usb_ep_enable(dev->in_ep); set_printer_interface() 782 DBG(dev, "enable %s --> %d\n", dev->in_ep->name, result); set_printer_interface() 786 result = usb_ep_enable(dev->out_ep); set_printer_interface() 788 DBG(dev, "enable %s --> %d\n", dev->in_ep->name, result); set_printer_interface() 795 (void) usb_ep_disable(dev->in_ep); set_printer_interface() 796 (void) usb_ep_disable(dev->out_ep); set_printer_interface() 797 dev->in_ep->desc = NULL; set_printer_interface() 798 dev->out_ep->desc = NULL; set_printer_interface() 805 static void printer_reset_interface(struct printer_dev dev) printer_reset_interface() argument 807 if (dev->interface < 0) printer_reset_interface() 810 DBG(dev, "%s\n", __func__); printer_reset_interface() 812 if (dev->in_ep->desc) printer_reset_interface() 813 usb_ep_disable(dev->in_ep); printer_reset_interface() 815 if (dev->out_ep->desc) printer_reset_interface() 816 usb_ep_disable(dev->out_ep); printer_reset_interface() 818 dev->in_ep->desc = NULL; printer_reset_interface() 819 dev->out_ep->desc = NULL; printer_reset_interface() 820 dev->interface = -1; printer_reset_interface() 824 static int set_interface(struct printer_dev dev, unsigned number) set_interface() argument 829 printer_reset_interface(dev); set_interface() 831 result = set_printer_interface(dev); set_interface() 833 printer_reset_interface(dev); set_interface() 835 dev->interface = number; set_interface() 838 INFO(dev, "Using interface %x\n", number); set_interface() 843 static void printer_soft_reset(struct printer_dev dev) printer_soft_reset() argument 847 INFO(dev, "Received Printer Reset Request\n"); printer_soft_reset() 849 if (usb_ep_disable(dev->in_ep)) printer_soft_reset() 850 DBG(dev, "Failed to disable USB in_ep\n"); printer_soft_reset() 851 if (usb_ep_disable(dev->out_ep)) printer_soft_reset() 852 DBG(dev, "Failed to disable USB out_ep\n"); printer_soft_reset() 854 if (dev->current_rx_req != NULL) { printer_soft_reset() 855 list_add(&dev->current_rx_req->list, &dev->rx_reqs); printer_soft_reset() 856 dev->current_rx_req = NULL; printer_soft_reset() 858 dev->current_rx_bytes = 0; printer_soft_reset() 859 dev->current_rx_buf = NULL; printer_soft_reset() 860 dev->reset_printer = 1; printer_soft_reset() 862 while (likely(!(list_empty(&dev->rx_buffers)))) { printer_soft_reset() 863 req = container_of(dev->rx_buffers.next, struct usb_request, printer_soft_reset() 866 list_add(&req->list, &dev->rx_reqs); printer_soft_reset() 869 while (likely(!(list_empty(&dev->rx_reqs_active)))) { printer_soft_reset() 870 req = container_of(dev->rx_buffers.next, struct usb_request, printer_soft_reset() 873 list_add(&req->list, &dev->rx_reqs); printer_soft_reset() 876 while (likely(!(list_empty(&dev->tx_reqs_active)))) { printer_soft_reset() 877 req = container_of(dev->tx_reqs_active.next, printer_soft_reset() 880 list_add(&req->list, &dev->tx_reqs); printer_soft_reset() 883 if (usb_ep_enable(dev->in_ep)) printer_soft_reset() 884 DBG(dev, "Failed to enable USB in_ep\n"); printer_soft_reset() 885 if (usb_ep_enable(dev->out_ep)) printer_soft_reset() 886 DBG(dev, "Failed to enable USB out_ep\n"); printer_soft_reset() 888 wake_up_interruptible(&dev->rx_wait); printer_soft_reset() 889 wake_up_interruptible(&dev->tx_wait); printer_soft_reset() 890 wake_up_interruptible(&dev->tx_flush_wait); printer_soft_reset() 898 struct printer_dev dev = func_to_printer(f); gprinter_req_match() local 927 return w_index == dev->interface; gprinter_req_match() 937 struct printer_dev dev = func_to_printer(f); printer_func_setup() local 945 DBG(dev, "ctrl req%02x.%02x v%04x i%04x l%d\n", printer_func_setup() 953 if ((wIndex>>8) != dev->interface) printer_func_setup() 956 value = (dev->pnp_string[0] << 8) \| dev->pnp_string[1]; printer_func_setup() 957 memcpy(req->buf, dev->pnp_string, value); printer_func_setup() 958 DBG(dev, "1284 PNP String: %x %s\n", value, printer_func_setup() 959 &dev->pnp_string[2]); printer_func_setup() 964 if (wIndex != dev->interface) printer_func_setup() 967 (u8 )req->buf = dev->printer_status; printer_func_setup() 973 if (wIndex != dev->interface) printer_func_setup() 976 printer_soft_reset(dev); printer_func_setup() 988 VDBG(dev, printer_func_setup() 1000 ERROR(dev, "%s:%d Error!\n", __func__, __LINE__); printer_func_setup() 1011 struct printer_dev dev = func_to_printer(f); printer_func_bind() local 1028 dev->gadget = gadget; printer_func_bind() 1034 dev_err(&cdev->gadget->dev, "can't autoconfigure on %s\n", printer_func_bind() 1056 dev->in_ep = in_ep; printer_func_bind() 1057 dev->out_ep = out_ep; printer_func_bind() 1060 for (i = 0; i < dev->q_len; i++) { printer_func_bind() 1061 req = printer_req_alloc(dev->in_ep, USB_BUFSIZE, GFP_KERNEL); printer_func_bind() 1064 list_add(&req->list, &dev->tx_reqs); printer_func_bind() 1067 for (i = 0; i < dev->q_len; i++) { printer_func_bind() 1068 req = printer_req_alloc(dev->out_ep, USB_BUFSIZE, GFP_KERNEL); printer_func_bind() 1071 list_add(&req->list, &dev->rx_reqs); printer_func_bind() 1075 devt = MKDEV(major, dev->minor); printer_func_bind() 1077 NULL, "g_printer%d", dev->minor); printer_func_bind() 1079 ERROR(dev, "Failed to create device: g_printer\n"); printer_func_bind() 1088 cdev_init(&dev->printer_cdev, &printer_io_operations); printer_func_bind() 1089 dev->printer_cdev.owner = THIS_MODULE; printer_func_bind() 1090 ret = cdev_add(&dev->printer_cdev, devt, 1); printer_func_bind() 1092 ERROR(dev, "Failed to open char device\n"); printer_func_bind() 1102 while (!list_empty(&dev->rx_reqs)) { printer_func_bind() 1103 req = container_of(dev->rx_reqs.next, struct usb_request, list); printer_func_bind() 1105 printer_req_free(dev->out_ep, req); printer_func_bind() 1109 while (!list_empty(&dev->tx_reqs)) { printer_func_bind() 1110 req = container_of(dev->tx_reqs.next, struct usb_request, list); printer_func_bind() 1112 printer_req_free(dev->in_ep, req); printer_func_bind() 1122 struct printer_dev dev = func_to_printer(f); printer_func_set_alt() local 1126 ret = set_interface(dev, intf); printer_func_set_alt() 1133 struct printer_dev dev = func_to_printer(f); printer_func_disable() local 1136 DBG(dev, "%s\n", __func__); printer_func_disable() 1138 spin_lock_irqsave(&dev->lock, flags); printer_func_disable() 1139 printer_reset_interface(dev); printer_func_disable() 1140 spin_unlock_irqrestore(&dev->lock, flags); printer_func_disable() 1322 struct printer_dev dev = func_to_printer(f); gprinter_free() local 1326 kfree(dev); gprinter_free() 1335 struct printer_dev dev; printer_func_unbind() local 1338 dev = func_to_printer(f); printer_func_unbind() 1340 device_destroy(usb_gadget_class, MKDEV(major, dev->minor)); printer_func_unbind() 1343 cdev_del(&dev->printer_cdev); printer_func_unbind() 1346 WARN_ON(!list_empty(&dev->tx_reqs_active)); printer_func_unbind() 1347 WARN_ON(!list_empty(&dev->rx_reqs_active)); printer_func_unbind() 1350 while (!list_empty(&dev->tx_reqs)) { printer_func_unbind() 1351 req = container_of(dev->tx_reqs.next, struct usb_request, printer_func_unbind() 1354 printer_req_free(dev->in_ep, req); printer_func_unbind() 1357 if (dev->current_rx_req != NULL) printer_func_unbind() 1358 printer_req_free(dev->out_ep, dev->current_rx_req); printer_func_unbind() 1360 while (!list_empty(&dev->rx_reqs)) { printer_func_unbind() 1361 req = container_of(dev->rx_reqs.next, printer_func_unbind() 1364 printer_req_free(dev->out_ep, req); printer_func_unbind() 1367 while (!list_empty(&dev->rx_buffers)) { printer_func_unbind() 1368 req = container_of(dev->rx_buffers.next, printer_func_unbind() 1371 printer_req_free(dev->out_ep, req); printer_func_unbind() 1378 struct printer_dev dev; gprinter_alloc() local 1389 dev = kzalloc(sizeof(*dev), GFP_KERNEL); gprinter_alloc() 1390 if (!dev) { gprinter_alloc() 1396 dev->minor = opts->minor; gprinter_alloc() 1397 dev->pnp_string = opts->pnp_string; gprinter_alloc() 1398 dev->q_len = opts->q_len; gprinter_alloc() 1401 dev->function.name = "printer"; gprinter_alloc() 1402 dev->function.bind = printer_func_bind; gprinter_alloc() 1403 dev->function.setup = printer_func_setup; gprinter_alloc() 1404 dev->function.unbind = printer_func_unbind; gprinter_alloc() 1405 dev->function.set_alt = printer_func_set_alt; gprinter_alloc() 1406 dev->function.disable = printer_func_disable; gprinter_alloc() 1407 dev->function.req_match = gprinter_req_match; gprinter_alloc() 1408 dev->function.free_func = gprinter_free; gprinter_alloc() 1410 INIT_LIST_HEAD(&dev->tx_reqs); gprinter_alloc() 1411 INIT_LIST_HEAD(&dev->rx_reqs); gprinter_alloc() 1412 INIT_LIST_HEAD(&dev->rx_buffers); gprinter_alloc() 1413 INIT_LIST_HEAD(&dev->tx_reqs_active); gprinter_alloc() 1414 INIT_LIST_HEAD(&dev->rx_reqs_active); gprinter_alloc() 1416 spin_lock_init(&dev->lock); gprinter_alloc() 1417 mutex_init(&dev->lock_printer_io); gprinter_alloc() 1418 init_waitqueue_head(&dev->rx_wait); gprinter_alloc() 1419 init_waitqueue_head(&dev->tx_wait); gprinter_alloc() 1420 init_waitqueue_head(&dev->tx_flush_wait); gprinter_alloc() 1422 dev->interface = -1; gprinter_alloc() 1423 dev->printer_cdev_open = 0; gprinter_alloc() 1424 dev->printer_status = PRINTER_NOT_ERROR; gprinter_alloc() 1425 dev->current_rx_req = NULL; gprinter_alloc() 1426 dev->current_rx_bytes = 0; gprinter_alloc() 1427 dev->current_rx_buf = NULL; gprinter_alloc() 1429 return &dev->function; gprinter_alloc()
/linux-4.1.27/drivers/mfd/
H A D	abx500-core.c	19 struct device dev; member in struct:abx500_device_entry 22 static void lookup_ops(struct device dev, struct abx500_ops *ops) lookup_ops() argument 28 if (dev_entry->dev == dev) { lookup_ops() 35 int abx500_register_ops(struct device dev, struct abx500_ops ops) abx500_register_ops() argument 39 dev_entry = devm_kzalloc(dev, abx500_register_ops() 43 dev_err(dev, "register_ops kzalloc failed"); abx500_register_ops() 46 dev_entry->dev = dev; abx500_register_ops() 54 void abx500_remove_ops(struct device dev) abx500_remove_ops() argument 59 if (dev_entry->dev == dev) abx500_remove_ops() 64 int abx500_set_register_interruptible(struct device dev, u8 bank, u8 reg, abx500_set_register_interruptible() argument 69 lookup_ops(dev->parent, &ops); abx500_set_register_interruptible() 71 return ops->set_register(dev, bank, reg, value); abx500_set_register_interruptible() 77 int abx500_get_register_interruptible(struct device dev, u8 bank, u8 reg, abx500_get_register_interruptible() argument 82 lookup_ops(dev->parent, &ops); abx500_get_register_interruptible() 84 return ops->get_register(dev, bank, reg, value); abx500_get_register_interruptible() 90 int abx500_get_register_page_interruptible(struct device dev, u8 bank, abx500_get_register_page_interruptible() argument 95 lookup_ops(dev->parent, &ops); abx500_get_register_page_interruptible() 97 return ops->get_register_page(dev, bank, abx500_get_register_page_interruptible() 104 int abx500_mask_and_set_register_interruptible(struct device dev, u8 bank, abx500_mask_and_set_register_interruptible() argument 109 lookup_ops(dev->parent, &ops); abx500_mask_and_set_register_interruptible() 111 return ops->mask_and_set_register(dev, bank, abx500_mask_and_set_register_interruptible() 118 int abx500_get_chip_id(struct device dev) abx500_get_chip_id() argument 122 lookup_ops(dev->parent, &ops); abx500_get_chip_id() 124 return ops->get_chip_id(dev); abx500_get_chip_id() 130 int abx500_event_registers_startup_state_get(struct device dev, u8 event) abx500_event_registers_startup_state_get() argument 134 lookup_ops(dev->parent, &ops); abx500_event_registers_startup_state_get() 136 return ops->event_registers_startup_state_get(dev, event); abx500_event_registers_startup_state_get() 142 int abx500_startup_irq_enabled(struct device dev, unsigned int irq) abx500_startup_irq_enabled() argument 146 lookup_ops(dev->parent, &ops); abx500_startup_irq_enabled() 148 return ops->startup_irq_enabled(dev, irq); abx500_startup_irq_enabled()
/linux-4.1.27/drivers/staging/rtl8192e/rtl8192e/
H A D	rtl_eeprom.c	28 static void eprom_cs(struct net_device dev, short bit) eprom_cs() argument 31 write_nic_byte(dev, EPROM_CMD, eprom_cs() 33 read_nic_byte(dev, EPROM_CMD)); eprom_cs() 35 write_nic_byte(dev, EPROM_CMD, read_nic_byte(dev, EPROM_CMD) eprom_cs() 42 static void eprom_ck_cycle(struct net_device dev) eprom_ck_cycle() argument 44 write_nic_byte(dev, EPROM_CMD, eprom_ck_cycle() 45 (1<<EPROM_CK_SHIFT) \| read_nic_byte(dev, EPROM_CMD)); eprom_ck_cycle() 47 write_nic_byte(dev, EPROM_CMD, eprom_ck_cycle() 48 read_nic_byte(dev, EPROM_CMD) & ~(1<<EPROM_CK_SHIFT)); eprom_ck_cycle() 53 static void eprom_w(struct net_device dev, short bit) eprom_w() argument 56 write_nic_byte(dev, EPROM_CMD, (1<<EPROM_W_SHIFT) \| eprom_w() 57 read_nic_byte(dev, EPROM_CMD)); eprom_w() 59 write_nic_byte(dev, EPROM_CMD, read_nic_byte(dev, EPROM_CMD) eprom_w() 66 static short eprom_r(struct net_device dev) eprom_r() argument 70 bit = (read_nic_byte(dev, EPROM_CMD) & (1<<EPROM_R_SHIFT)); eprom_r() 78 static void eprom_send_bits_string(struct net_device dev, short b[], int len) eprom_send_bits_string() argument 83 eprom_w(dev, b[i]); eprom_send_bits_string() 84 eprom_ck_cycle(dev); eprom_send_bits_string() 88 u32 eprom_read(struct net_device dev, u32 addr) eprom_read() argument 90 struct r8192_priv *priv = rtllib_priv(dev); eprom_read() 98 write_nic_byte(dev, EPROM_CMD, eprom_read() 121 eprom_cs(dev, 1); eprom_read() 122 eprom_ck_cycle(dev); eprom_read() 123 eprom_send_bits_string(dev, read_cmd, 3); eprom_read() 124 eprom_send_bits_string(dev, addr_str, addr_len); eprom_read() 126 eprom_w(dev, 0); eprom_read() 129 eprom_ck_cycle(dev); eprom_read() 130 ret \|= (eprom_r(dev)<<(15-i)); eprom_read() 133 eprom_cs(dev, 0); eprom_read() 134 eprom_ck_cycle(dev); eprom_read() 136 write_nic_byte(dev, EPROM_CMD, eprom_read()
/linux-4.1.27/drivers/connector/
H A D	cn_queue.c	35 cn_queue_alloc_callback_entry(struct cn_queue_dev dev, const char name, cn_queue_alloc_callback_entry() argument 50 atomic_inc(&dev->refcnt); cn_queue_alloc_callback_entry() 51 cbq->pdev = dev; cn_queue_alloc_callback_entry() 73 int cn_queue_add_callback(struct cn_queue_dev dev, const char name, cn_queue_add_callback() argument 81 cbq = cn_queue_alloc_callback_entry(dev, name, id, callback); cn_queue_add_callback() 85 spin_lock_bh(&dev->queue_lock); cn_queue_add_callback() 86 list_for_each_entry(__cbq, &dev->queue_list, callback_entry) { cn_queue_add_callback() 93 list_add_tail(&cbq->callback_entry, &dev->queue_list); cn_queue_add_callback() 94 spin_unlock_bh(&dev->queue_lock); cn_queue_add_callback() 107 void cn_queue_del_callback(struct cn_queue_dev dev, struct cb_id id) cn_queue_del_callback() argument 112 spin_lock_bh(&dev->queue_lock); cn_queue_del_callback() 113 list_for_each_entry_safe(cbq, n, &dev->queue_list, callback_entry) { cn_queue_del_callback() 120 spin_unlock_bh(&dev->queue_lock); cn_queue_del_callback() 128 struct cn_queue_dev dev; cn_queue_alloc_dev() local 130 dev = kzalloc(sizeof(dev), GFP_KERNEL); cn_queue_alloc_dev() 131 if (!dev) cn_queue_alloc_dev() 134 snprintf(dev->name, sizeof(dev->name), "%s", name); cn_queue_alloc_dev() 135 atomic_set(&dev->refcnt, 0); cn_queue_alloc_dev() 136 INIT_LIST_HEAD(&dev->queue_list); cn_queue_alloc_dev() 137 spin_lock_init(&dev->queue_lock); cn_queue_alloc_dev() 139 dev->nls = nls; cn_queue_alloc_dev() 141 return dev; cn_queue_alloc_dev() 144 void cn_queue_free_dev(struct cn_queue_dev *dev) cn_queue_free_dev() argument 148 spin_lock_bh(&dev->queue_lock); cn_queue_free_dev() 149 list_for_each_entry_safe(cbq, n, &dev->queue_list, callback_entry) cn_queue_free_dev() 151 spin_unlock_bh(&dev->queue_lock); cn_queue_free_dev() 153 while (atomic_read(&dev->refcnt)) { cn_queue_free_dev() 155 dev->name, atomic_read(&dev->refcnt)); cn_queue_free_dev() 159 kfree(dev); cn_queue_free_dev() 160 dev = NULL; cn_queue_free_dev()
/linux-4.1.27/drivers/net/ethernet/dec/tulip/
H A D	21142.c	32 struct net_device dev = tp->dev; t21142_media_task() local 43 dev_info(&dev->dev, "21143 negotiation status %08x, %s\n", t21142_media_task() 44 csr12, medianame[dev->if_port]); t21142_media_task() 45 if (tulip_media_cap[dev->if_port] & MediaIsMII) { t21142_media_task() 46 if (tulip_check_duplex(dev) < 0) { t21142_media_task() 47 netif_carrier_off(dev); t21142_media_task() 50 netif_carrier_on(dev); t21142_media_task() 56 dev_info(&dev->dev, t21142_media_task() 58 medianame[dev->if_port], csr12); t21142_media_task() 61 } else if (dev->if_port == 3) { t21142_media_task() 64 dev_info(&dev->dev, t21142_media_task() 67 t21142_start_nway(dev); t21142_media_task() 73 dev_info(&dev->dev, t21142_media_task() 78 dev->if_port = 0; t21142_media_task() 81 iowrite16(t21142_csr15[dev->if_port], ioaddr + CSR15); t21142_media_task() 82 iowrite32(t21142_csr13[dev->if_port], ioaddr + CSR13); t21142_media_task() 86 dev->if_port = 3; t21142_media_task() 93 dev_info(&dev->dev, "Testing new 21143 media %s\n", t21142_media_task() 94 medianame[dev->if_port]); t21142_media_task() 111 void t21142_start_nway(struct net_device dev) t21142_start_nway() argument 113 struct tulip_private tp = netdev_priv(dev); t21142_start_nway() 118 dev->if_port = 0; t21142_start_nway() 122 netdev_dbg(dev, "Restarting 21143 autonegotiation, csr14=%08x\n", t21142_start_nway() 139 void t21142_lnk_change(struct net_device dev, int csr5) t21142_lnk_change() argument 141 struct tulip_private *tp = netdev_priv(dev); t21142_lnk_change() 150 dev_info(&dev->dev, t21142_lnk_change() 161 if (!(csr12 & 0x8000)) dev->if_port = 0; t21142_lnk_change() 162 else if (negotiated & 0x0100) dev->if_port = 5; t21142_lnk_change() 163 else if (negotiated & 0x0080) dev->if_port = 3; t21142_lnk_change() 164 else if (negotiated & 0x0040) dev->if_port = 4; t21142_lnk_change() 165 else if (negotiated & 0x0020) dev->if_port = 0; t21142_lnk_change() 169 dev->if_port = 3; t21142_lnk_change() 171 tp->full_duplex = (tulip_media_cap[dev->if_port] & MediaAlwaysFD) ? 1:0; t21142_lnk_change() 175 dev_info(&dev->dev, t21142_lnk_change() 177 medianame[dev->if_port], t21142_lnk_change() 181 dev_info(&dev->dev, t21142_lnk_change() 183 medianame[dev->if_port], csr12); t21142_lnk_change() 189 if (tp->mtable->mleaf[i].media == dev->if_port) { t21142_lnk_change() 192 tulip_select_media(dev, startup); t21142_lnk_change() 198 tp->csr6 = (dev->if_port & 1 ? 0x838E0000 : 0x82420000) \| (tp->csr6 & 0x20ff); t21142_lnk_change() 206 netdev_dbg(dev, " Restarting Tx and Rx, CSR5 is %08x\n", t21142_lnk_change() 211 netdev_dbg(dev, " Setting CSR6 %08x/%x CSR12 %08x\n", t21142_lnk_change() 215 (dev->if_port == 3 \|\| dev->if_port == 5) && t21142_lnk_change() 220 t21142_start_nway(dev); t21142_lnk_change() 223 } else if (dev->if_port == 3 \|\| dev->if_port == 5) { t21142_lnk_change() 225 dev_info(&dev->dev, "21143 %s link beat %s\n", t21142_lnk_change() 226 medianame[dev->if_port], t21142_lnk_change() 230 t21142_start_nway(dev); t21142_lnk_change() 233 } else if (dev->if_port == 5) t21142_lnk_change() 235 } else if (dev->if_port == 0 \|\| dev->if_port == 4) { t21142_lnk_change() 237 dev_info(&dev->dev, "21143 10baseT link beat good\n"); t21142_lnk_change() 240 dev_info(&dev->dev, "21143 10mbps sensed media\n"); t21142_lnk_change() 241 dev->if_port = 0; t21142_lnk_change() 244 dev_info(&dev->dev, "21143 using NWay-set %s, csr6 %08x\n", t21142_lnk_change() 245 medianame[dev->if_port], tp->csr6); t21142_lnk_change() 248 dev_info(&dev->dev, "21143 100baseTx sensed media\n"); t21142_lnk_change() 249 dev->if_port = 3; t21142_lnk_change()
/linux-4.1.27/drivers/crypto/amcc/
H A D	crypto4xx_core.c	49 static void crypto4xx_hw_init(struct crypto4xx_device dev) crypto4xx_hw_init() argument 59 writel(PPC4XX_BYTE_ORDER, dev->ce_base + CRYPTO4XX_BYTE_ORDER_CFG); crypto4xx_hw_init() 70 writel(pe_dma_cfg.w, dev->ce_base + CRYPTO4XX_PE_DMA_CFG); crypto4xx_hw_init() 77 writel(pe_dma_cfg.w, dev->ce_base + CRYPTO4XX_PE_DMA_CFG); crypto4xx_hw_init() 78 writel(dev->pdr_pa, dev->ce_base + CRYPTO4XX_PDR_BASE); crypto4xx_hw_init() 79 writel(dev->pdr_pa, dev->ce_base + CRYPTO4XX_RDR_BASE); crypto4xx_hw_init() 80 writel(PPC4XX_PRNG_CTRL_AUTO_EN, dev->ce_base + CRYPTO4XX_PRNG_CTRL); crypto4xx_hw_init() 82 writel(rand_num, dev->ce_base + CRYPTO4XX_PRNG_SEED_L); crypto4xx_hw_init() 84 writel(rand_num, dev->ce_base + CRYPTO4XX_PRNG_SEED_H); crypto4xx_hw_init() 88 writel(ring_size.w, dev->ce_base + CRYPTO4XX_RING_SIZE); crypto4xx_hw_init() 90 writel(ring_ctrl.w, dev->ce_base + CRYPTO4XX_RING_CTRL); crypto4xx_hw_init() 91 device_ctrl = readl(dev->ce_base + CRYPTO4XX_DEVICE_CTRL); crypto4xx_hw_init() 93 writel(device_ctrl, dev->ce_base + CRYPTO4XX_DEVICE_CTRL); crypto4xx_hw_init() 94 writel(dev->gdr_pa, dev->ce_base + CRYPTO4XX_GATH_RING_BASE); crypto4xx_hw_init() 95 writel(dev->sdr_pa, dev->ce_base + CRYPTO4XX_SCAT_RING_BASE); crypto4xx_hw_init() 99 writel(part_ring_size.w, dev->ce_base + CRYPTO4XX_PART_RING_SIZE); crypto4xx_hw_init() 100 writel(PPC4XX_SD_BUFFER_SIZE, dev->ce_base + CRYPTO4XX_PART_RING_CFG); crypto4xx_hw_init() 104 writel(io_threshold.w, dev->ce_base + CRYPTO4XX_IO_THRESHOLD); crypto4xx_hw_init() 105 writel(0, dev->ce_base + CRYPTO4XX_PDR_BASE_UADDR); crypto4xx_hw_init() 106 writel(0, dev->ce_base + CRYPTO4XX_RDR_BASE_UADDR); crypto4xx_hw_init() 107 writel(0, dev->ce_base + CRYPTO4XX_PKT_SRC_UADDR); crypto4xx_hw_init() 108 writel(0, dev->ce_base + CRYPTO4XX_PKT_DEST_UADDR); crypto4xx_hw_init() 109 writel(0, dev->ce_base + CRYPTO4XX_SA_UADDR); crypto4xx_hw_init() 110 writel(0, dev->ce_base + CRYPTO4XX_GATH_RING_BASE_UADDR); crypto4xx_hw_init() 111 writel(0, dev->ce_base + CRYPTO4XX_SCAT_RING_BASE_UADDR); crypto4xx_hw_init() 118 writel(pe_dma_cfg.w, dev->ce_base + CRYPTO4XX_PE_DMA_CFG); crypto4xx_hw_init() 120 writel(PPC4XX_INTERRUPT_CLR, dev->ce_base + CRYPTO4XX_INT_CLR); crypto4xx_hw_init() 121 writel(PPC4XX_INT_DESCR_CNT, dev->ce_base + CRYPTO4XX_INT_DESCR_CNT); crypto4xx_hw_init() 122 writel(PPC4XX_INT_DESCR_CNT, dev->ce_base + CRYPTO4XX_INT_DESCR_CNT); crypto4xx_hw_init() 123 writel(PPC4XX_INT_CFG, dev->ce_base + CRYPTO4XX_INT_CFG); crypto4xx_hw_init() 124 writel(PPC4XX_PD_DONE_INT, dev->ce_base + CRYPTO4XX_INT_EN); crypto4xx_hw_init() 129 ctx->sa_in = dma_alloc_coherent(ctx->dev->core_dev->device, size 4, crypto4xx_alloc_sa() 134 ctx->sa_out = dma_alloc_coherent(ctx->dev->core_dev->device, size * 4, crypto4xx_alloc_sa() 137 dma_free_coherent(ctx->dev->core_dev->device, crypto4xx_alloc_sa() 153 dma_free_coherent(ctx->dev->core_dev->device, ctx->sa_len * 4, crypto4xx_free_sa() 156 dma_free_coherent(ctx->dev->core_dev->device, ctx->sa_len * 4, crypto4xx_free_sa() 166 ctx->state_record = dma_alloc_coherent(ctx->dev->core_dev->device, crypto4xx_alloc_state_record() 179 dma_free_coherent(ctx->dev->core_dev->device, crypto4xx_free_state_record() 191 static u32 crypto4xx_build_pdr(struct crypto4xx_device dev) crypto4xx_build_pdr() argument 195 dev->pdr = dma_alloc_coherent(dev->core_dev->device, crypto4xx_build_pdr() 197 &dev->pdr_pa, GFP_ATOMIC); crypto4xx_build_pdr() 198 if (!dev->pdr) crypto4xx_build_pdr() 201 dev->pdr_uinfo = kzalloc(sizeof(struct pd_uinfo) PPC4XX_NUM_PD, crypto4xx_build_pdr() 203 if (!dev->pdr_uinfo) { crypto4xx_build_pdr() 204 dma_free_coherent(dev->core_dev->device, crypto4xx_build_pdr() 206 dev->pdr, crypto4xx_build_pdr() 207 dev->pdr_pa); crypto4xx_build_pdr() 210 memset(dev->pdr, 0, sizeof(struct ce_pd) * PPC4XX_NUM_PD); crypto4xx_build_pdr() 211 dev->shadow_sa_pool = dma_alloc_coherent(dev->core_dev->device, crypto4xx_build_pdr() 213 &dev->shadow_sa_pool_pa, crypto4xx_build_pdr() 215 if (!dev->shadow_sa_pool) crypto4xx_build_pdr() 218 dev->shadow_sr_pool = dma_alloc_coherent(dev->core_dev->device, crypto4xx_build_pdr() 220 &dev->shadow_sr_pool_pa, GFP_ATOMIC); crypto4xx_build_pdr() 221 if (!dev->shadow_sr_pool) crypto4xx_build_pdr() 224 pd_uinfo = (struct pd_uinfo ) (dev->pdr_uinfo + crypto4xx_build_pdr() 228 pd_uinfo->sa_va = dev->shadow_sa_pool + 256 i; crypto4xx_build_pdr() 229 pd_uinfo->sa_pa = dev->shadow_sa_pool_pa + 256 * i; crypto4xx_build_pdr() 232 pd_uinfo->sr_va = dev->shadow_sr_pool + crypto4xx_build_pdr() 234 pd_uinfo->sr_pa = dev->shadow_sr_pool_pa + crypto4xx_build_pdr() 241 static void crypto4xx_destroy_pdr(struct crypto4xx_device dev) crypto4xx_destroy_pdr() argument 243 if (dev->pdr != NULL) crypto4xx_destroy_pdr() 244 dma_free_coherent(dev->core_dev->device, crypto4xx_destroy_pdr() 246 dev->pdr, dev->pdr_pa); crypto4xx_destroy_pdr() 247 if (dev->shadow_sa_pool) crypto4xx_destroy_pdr() 248 dma_free_coherent(dev->core_dev->device, 256 PPC4XX_NUM_PD, crypto4xx_destroy_pdr() 249 dev->shadow_sa_pool, dev->shadow_sa_pool_pa); crypto4xx_destroy_pdr() 250 if (dev->shadow_sr_pool) crypto4xx_destroy_pdr() 251 dma_free_coherent(dev->core_dev->device, crypto4xx_destroy_pdr() 253 dev->shadow_sr_pool, dev->shadow_sr_pool_pa); crypto4xx_destroy_pdr() 255 kfree(dev->pdr_uinfo); crypto4xx_destroy_pdr() 258 static u32 crypto4xx_get_pd_from_pdr_nolock(struct crypto4xx_device dev) crypto4xx_get_pd_from_pdr_nolock() argument 263 retval = dev->pdr_head; crypto4xx_get_pd_from_pdr_nolock() 264 tmp = (dev->pdr_head + 1) % PPC4XX_NUM_PD; crypto4xx_get_pd_from_pdr_nolock() 266 if (tmp == dev->pdr_tail) crypto4xx_get_pd_from_pdr_nolock() 269 dev->pdr_head = tmp; crypto4xx_get_pd_from_pdr_nolock() 274 static u32 crypto4xx_put_pd_to_pdr(struct crypto4xx_device dev, u32 idx) crypto4xx_put_pd_to_pdr() argument 279 pd_uinfo = (struct pd_uinfo )(dev->pdr_uinfo + crypto4xx_put_pd_to_pdr() 281 spin_lock_irqsave(&dev->core_dev->lock, flags); crypto4xx_put_pd_to_pdr() 282 if (dev->pdr_tail != PPC4XX_LAST_PD) crypto4xx_put_pd_to_pdr() 283 dev->pdr_tail++; crypto4xx_put_pd_to_pdr() 285 dev->pdr_tail = 0; crypto4xx_put_pd_to_pdr() 287 spin_unlock_irqrestore(&dev->core_dev->lock, flags); crypto4xx_put_pd_to_pdr() 292 static struct ce_pd crypto4xx_get_pdp(struct crypto4xx_device dev, crypto4xx_get_pdp() argument 295 pd_dma = dev->pdr_pa + sizeof(struct ce_pd) * idx; crypto4xx_get_pdp() 297 return dev->pdr + sizeof(struct ce_pd) * idx; crypto4xx_get_pdp() 305 static u32 crypto4xx_build_gdr(struct crypto4xx_device dev) crypto4xx_build_gdr() argument 307 dev->gdr = dma_alloc_coherent(dev->core_dev->device, crypto4xx_build_gdr() 309 &dev->gdr_pa, GFP_ATOMIC); crypto4xx_build_gdr() 310 if (!dev->gdr) crypto4xx_build_gdr() 313 memset(dev->gdr, 0, sizeof(struct ce_gd) PPC4XX_NUM_GD); crypto4xx_build_gdr() 318 static inline void crypto4xx_destroy_gdr(struct crypto4xx_device dev) crypto4xx_destroy_gdr() argument 320 dma_free_coherent(dev->core_dev->device, crypto4xx_destroy_gdr() 322 dev->gdr, dev->gdr_pa); crypto4xx_destroy_gdr() 329 u32 crypto4xx_get_n_gd(struct crypto4xx_device dev, int n) crypto4xx_get_n_gd() argument 336 retval = dev->gdr_head; crypto4xx_get_n_gd() 337 tmp = (dev->gdr_head + n) % PPC4XX_NUM_GD; crypto4xx_get_n_gd() 338 if (dev->gdr_head > dev->gdr_tail) { crypto4xx_get_n_gd() 339 if (tmp < dev->gdr_head && tmp >= dev->gdr_tail) crypto4xx_get_n_gd() 341 } else if (dev->gdr_head < dev->gdr_tail) { crypto4xx_get_n_gd() 342 if (tmp < dev->gdr_head \|\| tmp >= dev->gdr_tail) crypto4xx_get_n_gd() 345 dev->gdr_head = tmp; crypto4xx_get_n_gd() 350 static u32 crypto4xx_put_gd_to_gdr(struct crypto4xx_device dev) crypto4xx_put_gd_to_gdr() argument 354 spin_lock_irqsave(&dev->core_dev->lock, flags); crypto4xx_put_gd_to_gdr() 355 if (dev->gdr_tail == dev->gdr_head) { crypto4xx_put_gd_to_gdr() 356 spin_unlock_irqrestore(&dev->core_dev->lock, flags); crypto4xx_put_gd_to_gdr() 360 if (dev->gdr_tail != PPC4XX_LAST_GD) crypto4xx_put_gd_to_gdr() 361 dev->gdr_tail++; crypto4xx_put_gd_to_gdr() 363 dev->gdr_tail = 0; crypto4xx_put_gd_to_gdr() 365 spin_unlock_irqrestore(&dev->core_dev->lock, flags); crypto4xx_put_gd_to_gdr() 370 static inline struct ce_gd crypto4xx_get_gdp(struct crypto4xx_device dev, crypto4xx_get_gdp() argument 373 gd_dma = dev->gdr_pa + sizeof(struct ce_gd) * idx; crypto4xx_get_gdp() 375 return (struct ce_gd ) (dev->gdr + sizeof(struct ce_gd) idx); crypto4xx_get_gdp() 383 static u32 crypto4xx_build_sdr(struct crypto4xx_device dev) crypto4xx_build_sdr() argument 389 dev->sdr = dma_alloc_coherent(dev->core_dev->device, crypto4xx_build_sdr() 391 &dev->sdr_pa, GFP_ATOMIC); crypto4xx_build_sdr() 392 if (!dev->sdr) crypto4xx_build_sdr() 395 dev->scatter_buffer_size = PPC4XX_SD_BUFFER_SIZE; crypto4xx_build_sdr() 396 dev->scatter_buffer_va = crypto4xx_build_sdr() 397 dma_alloc_coherent(dev->core_dev->device, crypto4xx_build_sdr() 398 dev->scatter_buffer_size PPC4XX_NUM_SD, crypto4xx_build_sdr() 399 &dev->scatter_buffer_pa, GFP_ATOMIC); crypto4xx_build_sdr() 400 if (!dev->scatter_buffer_va) { crypto4xx_build_sdr() 401 dma_free_coherent(dev->core_dev->device, crypto4xx_build_sdr() 403 dev->sdr, dev->sdr_pa); crypto4xx_build_sdr() 407 sd_array = dev->sdr; crypto4xx_build_sdr() 410 sd_array[i].ptr = dev->scatter_buffer_pa + crypto4xx_build_sdr() 411 dev->scatter_buffer_size * i; crypto4xx_build_sdr() 417 static void crypto4xx_destroy_sdr(struct crypto4xx_device dev) crypto4xx_destroy_sdr() argument 419 if (dev->sdr != NULL) crypto4xx_destroy_sdr() 420 dma_free_coherent(dev->core_dev->device, crypto4xx_destroy_sdr() 422 dev->sdr, dev->sdr_pa); crypto4xx_destroy_sdr() 424 if (dev->scatter_buffer_va != NULL) crypto4xx_destroy_sdr() 425 dma_free_coherent(dev->core_dev->device, crypto4xx_destroy_sdr() 426 dev->scatter_buffer_size PPC4XX_NUM_SD, crypto4xx_destroy_sdr() 427 dev->scatter_buffer_va, crypto4xx_destroy_sdr() 428 dev->scatter_buffer_pa); crypto4xx_destroy_sdr() 435 static u32 crypto4xx_get_n_sd(struct crypto4xx_device dev, int n) crypto4xx_get_n_sd() argument 443 retval = dev->sdr_head; crypto4xx_get_n_sd() 444 tmp = (dev->sdr_head + n) % PPC4XX_NUM_SD; crypto4xx_get_n_sd() 445 if (dev->sdr_head > dev->gdr_tail) { crypto4xx_get_n_sd() 446 if (tmp < dev->sdr_head && tmp >= dev->sdr_tail) crypto4xx_get_n_sd() 448 } else if (dev->sdr_head < dev->sdr_tail) { crypto4xx_get_n_sd() 449 if (tmp < dev->sdr_head \|\| tmp >= dev->sdr_tail) crypto4xx_get_n_sd() 452 dev->sdr_head = tmp; crypto4xx_get_n_sd() 457 static u32 crypto4xx_put_sd_to_sdr(struct crypto4xx_device dev) crypto4xx_put_sd_to_sdr() argument 461 spin_lock_irqsave(&dev->core_dev->lock, flags); crypto4xx_put_sd_to_sdr() 462 if (dev->sdr_tail == dev->sdr_head) { crypto4xx_put_sd_to_sdr() 463 spin_unlock_irqrestore(&dev->core_dev->lock, flags); crypto4xx_put_sd_to_sdr() 466 if (dev->sdr_tail != PPC4XX_LAST_SD) crypto4xx_put_sd_to_sdr() 467 dev->sdr_tail++; crypto4xx_put_sd_to_sdr() 469 dev->sdr_tail = 0; crypto4xx_put_sd_to_sdr() 470 spin_unlock_irqrestore(&dev->core_dev->lock, flags); crypto4xx_put_sd_to_sdr() 475 static inline struct ce_sd crypto4xx_get_sdp(struct crypto4xx_device dev, crypto4xx_get_sdp() argument 478 sd_dma = dev->sdr_pa + sizeof(struct ce_sd) idx; crypto4xx_get_sdp() 480 return (struct ce_sd )(dev->sdr + sizeof(struct ce_sd) idx); crypto4xx_get_sdp() 483 static u32 crypto4xx_fill_one_page(struct crypto4xx_device dev, crypto4xx_fill_one_page() argument 489 if (length > dev->scatter_buffer_size) { crypto4xx_fill_one_page() 491 dev->scatter_buffer_va + crypto4xx_fill_one_page() 492 idx dev->scatter_buffer_size + offset, crypto4xx_fill_one_page() 493 dev->scatter_buffer_size); crypto4xx_fill_one_page() 495 length -= dev->scatter_buffer_size; crypto4xx_fill_one_page() 496 nbytes -= dev->scatter_buffer_size; crypto4xx_fill_one_page() 501 addr = addr + dev->scatter_buffer_size; crypto4xx_fill_one_page() 503 } else if (length < dev->scatter_buffer_size) { crypto4xx_fill_one_page() 505 dev->scatter_buffer_va + crypto4xx_fill_one_page() 506 idx dev->scatter_buffer_size + offset, length); crypto4xx_fill_one_page() 507 if ((offset + length) == dev->scatter_buffer_size) { crypto4xx_fill_one_page() 521 len = (nbytes <= dev->scatter_buffer_size) ? crypto4xx_fill_one_page() 522 (nbytes) : dev->scatter_buffer_size; crypto4xx_fill_one_page() 524 dev->scatter_buffer_va + crypto4xx_fill_one_page() 525 idx dev->scatter_buffer_size + offset, crypto4xx_fill_one_page() 539 static void crypto4xx_copy_pkt_to_dst(struct crypto4xx_device dev, crypto4xx_copy_pkt_to_dst() argument 560 addr = dma_map_page(dev->core_dev->device, sg_page(sg), crypto4xx_copy_pkt_to_dst() 565 while (crypto4xx_fill_one_page(dev, &addr, &len, crypto4xx_copy_pkt_to_dst() 572 len = (nbytes <= (dev->scatter_buffer_size - offset)) ? crypto4xx_copy_pkt_to_dst() 573 nbytes : (dev->scatter_buffer_size - offset); crypto4xx_copy_pkt_to_dst() 575 while (crypto4xx_fill_one_page(dev, &addr, &len, crypto4xx_copy_pkt_to_dst() 583 while (crypto4xx_fill_one_page(dev, &addr, crypto4xx_copy_pkt_to_dst() 607 static void crypto4xx_ret_sg_desc(struct crypto4xx_device dev, crypto4xx_ret_sg_desc() argument 613 crypto4xx_put_gd_to_gdr(dev); crypto4xx_ret_sg_desc() 619 crypto4xx_put_sd_to_sdr(dev); crypto4xx_ret_sg_desc() 626 static u32 crypto4xx_ablkcipher_done(struct crypto4xx_device dev, crypto4xx_ablkcipher_done() argument 639 crypto4xx_copy_pkt_to_dst(dev, pd, pd_uinfo, ablk_req->nbytes, crypto4xx_ablkcipher_done() 643 addr = dma_map_page(dev->core_dev->device, sg_page(dst), crypto4xx_ablkcipher_done() 646 crypto4xx_ret_sg_desc(dev, pd_uinfo); crypto4xx_ablkcipher_done() 653 static u32 crypto4xx_ahash_done(struct crypto4xx_device dev, crypto4xx_ahash_done() argument 664 crypto4xx_ret_sg_desc(dev, pd_uinfo); crypto4xx_ahash_done() 672 static u32 crypto4xx_pd_done(struct crypto4xx_device dev, u32 idx) crypto4xx_pd_done() argument 677 pd = dev->pdr + sizeof(struct ce_pd)idx; crypto4xx_pd_done() 678 pd_uinfo = dev->pdr_uinfo + sizeof(struct pd_uinfo)idx; crypto4xx_pd_done() 681 return crypto4xx_ablkcipher_done(dev, pd_uinfo, pd); crypto4xx_pd_done() 683 return crypto4xx_ahash_done(dev, pd_uinfo); crypto4xx_pd_done() 724 crypto4xx_destroy_pdr(core_dev->dev); crypto4xx_stop_all() 725 crypto4xx_destroy_gdr(core_dev->dev); crypto4xx_stop_all() 726 crypto4xx_destroy_sdr(core_dev->dev); crypto4xx_stop_all() 727 iounmap(core_dev->dev->ce_base); crypto4xx_stop_all() 728 kfree(core_dev->dev); crypto4xx_stop_all() 732 void crypto4xx_return_pd(struct crypto4xx_device dev, crypto4xx_return_pd() argument 737 dev->pdr_head = pd_entry; crypto4xx_return_pd() 786 struct crypto4xx_device dev = ctx->dev; crypto4xx_build_pd() local 826 spin_lock_irqsave(&dev->core_dev->lock, flags); crypto4xx_build_pd() 828 fst_gd = crypto4xx_get_n_gd(dev, num_gd); crypto4xx_build_pd() 830 spin_unlock_irqrestore(&dev->core_dev->lock, flags); crypto4xx_build_pd() 835 fst_sd = crypto4xx_get_n_sd(dev, num_sd); crypto4xx_build_pd() 838 dev->gdr_head = fst_gd; crypto4xx_build_pd() 839 spin_unlock_irqrestore(&dev->core_dev->lock, flags); crypto4xx_build_pd() 843 pd_entry = crypto4xx_get_pd_from_pdr_nolock(dev); crypto4xx_build_pd() 846 dev->gdr_head = fst_gd; crypto4xx_build_pd() 848 dev->sdr_head = fst_sd; crypto4xx_build_pd() 849 spin_unlock_irqrestore(&dev->core_dev->lock, flags); crypto4xx_build_pd() 852 spin_unlock_irqrestore(&dev->core_dev->lock, flags); crypto4xx_build_pd() 854 pd_uinfo = (struct pd_uinfo )(dev->pdr_uinfo + crypto4xx_build_pd() 856 pd = crypto4xx_get_pdp(dev, &pd_dma, pd_entry); crypto4xx_build_pd() 890 gd = crypto4xx_get_gdp(dev, &gd_dma, gd_idx); crypto4xx_build_pd() 899 addr = dma_map_page(dev->core_dev->device, sg_page(sg), crypto4xx_build_pd() 909 gd = crypto4xx_get_gdp(dev, &gd_dma, gd_idx); crypto4xx_build_pd() 913 pd->src = (u32)dma_map_page(dev->core_dev->device, sg_page(src), crypto4xx_build_pd() 939 pd->dest = (u32)dma_map_page(dev->core_dev->device, crypto4xx_build_pd() 951 sd = crypto4xx_get_sdp(dev, &sd_dma, sd_idx); crypto4xx_build_pd() 964 sd = crypto4xx_get_sdp(dev, &sd_dma, sd_idx); crypto4xx_build_pd() 985 writel(1, dev->ce_base + CRYPTO4XX_INT_DESCR_RD); crypto4xx_build_pd() 998 ctx->dev = amcc_alg->dev; crypto4xx_alg_init() 1040 alg->dev = sec_dev; crypto4xx_register_alg() 1083 struct device dev = (struct device )data; crypto4xx_bh_tasklet_cb() local 1084 struct crypto4xx_core_device core_dev = dev_get_drvdata(dev); crypto4xx_bh_tasklet_cb() 1089 while (core_dev->dev->pdr_head != core_dev->dev->pdr_tail) { crypto4xx_bh_tasklet_cb() 1090 tail = core_dev->dev->pdr_tail; crypto4xx_bh_tasklet_cb() 1091 pd_uinfo = core_dev->dev->pdr_uinfo + crypto4xx_bh_tasklet_cb() 1093 pd = core_dev->dev->pdr + sizeof(struct ce_pd) * tail; crypto4xx_bh_tasklet_cb() 1098 crypto4xx_pd_done(core_dev->dev, tail); crypto4xx_bh_tasklet_cb() 1099 crypto4xx_put_pd_to_pdr(core_dev->dev, tail); crypto4xx_bh_tasklet_cb() 1113 struct device dev = (struct device )data; crypto4xx_ce_interrupt_handler() local 1114 struct crypto4xx_core_device core_dev = dev_get_drvdata(dev); crypto4xx_ce_interrupt_handler() 1116 if (core_dev->dev->ce_base == 0) crypto4xx_ce_interrupt_handler() 1120 core_dev->dev->ce_base + CRYPTO4XX_INT_CLR); crypto4xx_ce_interrupt_handler() 1162 struct device dev = &ofdev->dev; crypto4xx_probe() local 1165 rc = of_address_to_resource(ofdev->dev.of_node, 0, &res); crypto4xx_probe() 1195 dev_set_drvdata(dev, core_dev); crypto4xx_probe() 1197 core_dev->dev = kzalloc(sizeof(struct crypto4xx_device), GFP_KERNEL); crypto4xx_probe() 1198 if (!core_dev->dev) crypto4xx_probe() 1201 core_dev->dev->core_dev = core_dev; crypto4xx_probe() 1202 core_dev->device = dev; crypto4xx_probe() 1204 INIT_LIST_HEAD(&core_dev->dev->alg_list); crypto4xx_probe() 1205 rc = crypto4xx_build_pdr(core_dev->dev); crypto4xx_probe() 1209 rc = crypto4xx_build_gdr(core_dev->dev); crypto4xx_probe() 1213 rc = crypto4xx_build_sdr(core_dev->dev); crypto4xx_probe() 1219 (unsigned long) dev); crypto4xx_probe() 1222 core_dev->irq = irq_of_parse_and_map(ofdev->dev.of_node, 0); crypto4xx_probe() 1224 core_dev->dev->name, dev); crypto4xx_probe() 1228 core_dev->dev->ce_base = of_iomap(ofdev->dev.of_node, 0); crypto4xx_probe() 1229 if (!core_dev->dev->ce_base) { crypto4xx_probe() 1230 dev_err(dev, "failed to of_iomap\n"); crypto4xx_probe() 1236 crypto4xx_hw_init(core_dev->dev); crypto4xx_probe() 1239 rc = crypto4xx_register_alg(core_dev->dev, crypto4xx_alg, crypto4xx_probe() 1247 iounmap(core_dev->dev->ce_base); crypto4xx_probe() 1249 free_irq(core_dev->irq, dev); crypto4xx_probe() 1253 crypto4xx_destroy_sdr(core_dev->dev); crypto4xx_probe() 1255 crypto4xx_destroy_gdr(core_dev->dev); crypto4xx_probe() 1257 crypto4xx_destroy_pdr(core_dev->dev); crypto4xx_probe() 1259 kfree(core_dev->dev); crypto4xx_probe() 1268 struct device dev = &ofdev->dev; crypto4xx_remove() local 1269 struct crypto4xx_core_device core_dev = dev_get_drvdata(dev); crypto4xx_remove() 1271 free_irq(core_dev->irq, dev); crypto4xx_remove() 1276 crypto4xx_unregister_alg(core_dev->dev); crypto4xx_remove()
/linux-4.1.27/sound/core/seq/
H A D	seq_midi_event.c	46 static void note_event(struct snd_midi_event dev, struct snd_seq_event ev); 47 static void one_param_ctrl_event(struct snd_midi_event dev, struct snd_seq_event ev); 48 static void pitchbend_ctrl_event(struct snd_midi_event dev, struct snd_seq_event ev); 49 static void two_param_ctrl_event(struct snd_midi_event dev, struct snd_seq_event ev); 50 static void one_param_event(struct snd_midi_event dev, struct snd_seq_event ev); 51 static void songpos_event(struct snd_midi_event dev, struct snd_seq_event ev); 64 void (encode)(struct snd_midi_event dev, struct snd_seq_event ev); 96 static int extra_decode_ctrl14(struct snd_midi_event dev, unsigned char buf, int len, 98 static int extra_decode_xrpn(struct snd_midi_event dev, unsigned char buf, int count, 103 int (decode)(struct snd_midi_event dev, unsigned char buf, int len, 117 struct snd_midi_event dev; snd_midi_event_new() local 120 dev = kzalloc(sizeof(dev), GFP_KERNEL); snd_midi_event_new() 121 if (dev == NULL) snd_midi_event_new() 124 dev->buf = kmalloc(bufsize, GFP_KERNEL); snd_midi_event_new() 125 if (dev->buf == NULL) { snd_midi_event_new() 126 kfree(dev); snd_midi_event_new() 130 dev->bufsize = bufsize; snd_midi_event_new() 131 dev->lastcmd = 0xff; snd_midi_event_new() 132 dev->type = ST_INVALID; snd_midi_event_new() 133 spin_lock_init(&dev->lock); snd_midi_event_new() 134 rdev = dev; snd_midi_event_new() 138 void snd_midi_event_free(struct snd_midi_event dev) snd_midi_event_free() argument 140 if (dev != NULL) { snd_midi_event_free() 141 kfree(dev->buf); snd_midi_event_free() 142 kfree(dev); snd_midi_event_free() 149 static inline void reset_encode(struct snd_midi_event dev) reset_encode() argument 151 dev->read = 0; reset_encode() 152 dev->qlen = 0; reset_encode() 153 dev->type = ST_INVALID; reset_encode() 156 void snd_midi_event_reset_encode(struct snd_midi_event dev) snd_midi_event_reset_encode() argument 160 spin_lock_irqsave(&dev->lock, flags); snd_midi_event_reset_encode() 161 reset_encode(dev); snd_midi_event_reset_encode() 162 spin_unlock_irqrestore(&dev->lock, flags); snd_midi_event_reset_encode() 165 void snd_midi_event_reset_decode(struct snd_midi_event dev) snd_midi_event_reset_decode() argument 169 spin_lock_irqsave(&dev->lock, flags); snd_midi_event_reset_decode() 170 dev->lastcmd = 0xff; snd_midi_event_reset_decode() 171 spin_unlock_irqrestore(&dev->lock, flags); snd_midi_event_reset_decode() 175 void snd_midi_event_init(struct snd_midi_event dev) 177 snd_midi_event_reset_encode(dev); 178 snd_midi_event_reset_decode(dev); 182 void snd_midi_event_no_status(struct snd_midi_event dev, int on) snd_midi_event_no_status() argument 184 dev->nostat = on ? 1 : 0; snd_midi_event_no_status() 191 int snd_midi_event_resize_buffer(struct snd_midi_event dev, int bufsize) 196 if (bufsize == dev->bufsize) 201 spin_lock_irqsave(&dev->lock, flags); 202 old_buf = dev->buf; 203 dev->buf = new_buf; 204 dev->bufsize = bufsize; 205 reset_encode(dev); 206 spin_unlock_irqrestore(&dev->lock, flags); 216 long snd_midi_event_encode(struct snd_midi_event dev, unsigned char buf, long count, snd_midi_event_encode() argument 225 rc = snd_midi_event_encode_byte(dev, buf++, ev); snd_midi_event_encode() 242 int snd_midi_event_encode_byte(struct snd_midi_event dev, int c, snd_midi_event_encode_byte() argument 258 spin_lock_irqsave(&dev->lock, flags); snd_midi_event_encode_byte() 260 (c != MIDI_CMD_COMMON_SYSEX_END \|\| dev->type != ST_SYSEX)) { snd_midi_event_encode_byte() 262 dev->buf[0] = c; snd_midi_event_encode_byte() 264 dev->type = (c & 0x0f) + ST_SPECIAL; snd_midi_event_encode_byte() 266 dev->type = (c >> 4) & 0x07; snd_midi_event_encode_byte() 267 dev->read = 1; snd_midi_event_encode_byte() 268 dev->qlen = status_event[dev->type].qlen; snd_midi_event_encode_byte() 270 if (dev->qlen > 0) { snd_midi_event_encode_byte() 272 dev->buf[dev->read++] = c; snd_midi_event_encode_byte() 273 if (dev->type != ST_SYSEX) snd_midi_event_encode_byte() 274 dev->qlen--; snd_midi_event_encode_byte() 277 dev->buf[1] = c; snd_midi_event_encode_byte() 278 dev->qlen = status_event[dev->type].qlen - 1; snd_midi_event_encode_byte() 279 dev->read = 2; snd_midi_event_encode_byte() 282 if (dev->qlen == 0) { snd_midi_event_encode_byte() 283 ev->type = status_event[dev->type].event; snd_midi_event_encode_byte() 286 if (status_event[dev->type].encode) /* set data values / snd_midi_event_encode_byte() 287 status_event[dev->type].encode(dev, ev); snd_midi_event_encode_byte() 288 if (dev->type >= ST_SPECIAL) snd_midi_event_encode_byte() 289 dev->type = ST_INVALID; snd_midi_event_encode_byte() 291 } else if (dev->type == ST_SYSEX) { snd_midi_event_encode_byte() 293 dev->read >= dev->bufsize) { snd_midi_event_encode_byte() 297 ev->data.ext.len = dev->read; snd_midi_event_encode_byte() 298 ev->data.ext.ptr = dev->buf; snd_midi_event_encode_byte() 300 dev->read = 0; / continue to parse / snd_midi_event_encode_byte() 302 reset_encode(dev); / all parsed / snd_midi_event_encode_byte() 307 spin_unlock_irqrestore(&dev->lock, flags); snd_midi_event_encode_byte() 312 static void note_event(struct snd_midi_event dev, struct snd_seq_event ev) note_event() argument 314 ev->data.note.channel = dev->buf[0] & 0x0f; note_event() 315 ev->data.note.note = dev->buf[1]; note_event() 316 ev->data.note.velocity = dev->buf[2]; note_event() 320 static void one_param_ctrl_event(struct snd_midi_event dev, struct snd_seq_event ev) one_param_ctrl_event() argument 322 ev->data.control.channel = dev->buf[0] & 0x0f; one_param_ctrl_event() 323 ev->data.control.value = dev->buf[1]; one_param_ctrl_event() 327 static void pitchbend_ctrl_event(struct snd_midi_event dev, struct snd_seq_event ev) pitchbend_ctrl_event() argument 329 ev->data.control.channel = dev->buf[0] & 0x0f; pitchbend_ctrl_event() 330 ev->data.control.value = (int)dev->buf[2] 128 + (int)dev->buf[1] - 8192; pitchbend_ctrl_event() 334 static void two_param_ctrl_event(struct snd_midi_event dev, struct snd_seq_event ev) two_param_ctrl_event() argument 336 ev->data.control.channel = dev->buf[0] & 0x0f; two_param_ctrl_event() 337 ev->data.control.param = dev->buf[1]; two_param_ctrl_event() 338 ev->data.control.value = dev->buf[2]; two_param_ctrl_event() 342 static void one_param_event(struct snd_midi_event dev, struct snd_seq_event ev) one_param_event() argument 344 ev->data.control.value = dev->buf[1]; one_param_event() 348 static void songpos_event(struct snd_midi_event dev, struct snd_seq_event ev) songpos_event() argument 350 ev->data.control.value = (int)dev->buf[2] * 128 + (int)dev->buf[1]; songpos_event() 357 long snd_midi_event_decode(struct snd_midi_event dev, unsigned char buf, long count, snd_midi_event_decode() argument 371 return extra_event[type].decode(dev, buf, count, ev); snd_midi_event_decode() 384 snd_midi_event_reset_decode(dev); snd_midi_event_decode() 391 spin_lock_irqsave(&dev->lock, flags); snd_midi_event_decode() 392 if ((cmd & 0xf0) == 0xf0 \|\| dev->lastcmd != cmd \|\| dev->nostat) { snd_midi_event_decode() 393 dev->lastcmd = cmd; snd_midi_event_decode() 394 spin_unlock_irqrestore(&dev->lock, flags); snd_midi_event_decode() 400 spin_unlock_irqrestore(&dev->lock, flags); snd_midi_event_decode() 449 static int extra_decode_ctrl14(struct snd_midi_event dev, unsigned char buf, extra_decode_ctrl14() argument 459 if (dev->nostat && count < 6) extra_decode_ctrl14() 461 if (cmd != dev->lastcmd \|\| dev->nostat) { extra_decode_ctrl14() 464 buf[idx++] = dev->lastcmd = cmd; extra_decode_ctrl14() 468 if (dev->nostat) extra_decode_ctrl14() 475 if (cmd != dev->lastcmd \|\| dev->nostat) { extra_decode_ctrl14() 478 buf[idx++] = dev->lastcmd = cmd; extra_decode_ctrl14() 487 static int extra_decode_xrpn(struct snd_midi_event dev, unsigned char buf, extra_decode_xrpn() argument 505 if (dev->nostat && count < 12) extra_decode_xrpn() 512 if (cmd != dev->lastcmd && !dev->nostat) { extra_decode_xrpn() 515 buf[idx++] = dev->lastcmd = cmd; extra_decode_xrpn() 519 if (dev->nostat) extra_decode_xrpn() 520 buf[idx++] = dev->lastcmd = cmd; extra_decode_xrpn()
/linux-4.1.27/drivers/gpu/drm/armada/
H A D	armada_drv.c	57 static bool is_componentized(struct device dev) is_componentized() argument 59 return dev->of_node \|\| dev->platform_data; is_componentized() 72 / Must be called with dev->event_lock held / __armada_drm_queue_unref_work() 73 void __armada_drm_queue_unref_work(struct drm_device dev, __armada_drm_queue_unref_work() argument 76 struct armada_private priv = dev->dev_private; __armada_drm_queue_unref_work() 82 void armada_drm_queue_unref_work(struct drm_device dev, armada_drm_queue_unref_work() argument 87 spin_lock_irqsave(&dev->event_lock, flags); armada_drm_queue_unref_work() 88 __armada_drm_queue_unref_work(dev, fb); armada_drm_queue_unref_work() 89 spin_unlock_irqrestore(&dev->event_lock, flags); armada_drm_queue_unref_work() 92 static int armada_drm_load(struct drm_device dev, unsigned long flags) armada_drm_load() argument 104 struct resource r = platform_get_resource(dev->platformdev, armada_drm_load() 121 if (!devm_request_mem_region(dev->dev, mem->start, armada_drm_load() 125 priv = devm_kzalloc(dev->dev, sizeof(priv), GFP_KERNEL); armada_drm_load() 131 platform_set_drvdata(dev->platformdev, dev); armada_drm_load() 132 dev->dev_private = priv; armada_drm_load() 135 id = platform_get_device_id(dev->platformdev); armada_drm_load() 145 drm_mode_config_init(dev); armada_drm_load() 146 dev->mode_config.min_width = 320; armada_drm_load() 147 dev->mode_config.min_height = 200; armada_drm_load() 153 dev->mode_config.max_width = 1920; armada_drm_load() 154 dev->mode_config.max_height = 2048; armada_drm_load() 156 dev->mode_config.preferred_depth = 24; armada_drm_load() 157 dev->mode_config.funcs = &armada_drm_mode_config_funcs; armada_drm_load() 167 irq = platform_get_irq(dev->platformdev, n); armada_drm_load() 171 ret = armada_drm_crtc_create(dev, dev->dev, res[n], irq, armada_drm_load() 177 if (is_componentized(dev->dev)) { armada_drm_load() 178 ret = component_bind_all(dev->dev, dev); armada_drm_load() 183 ret = armada_drm_connector_slave_create(dev, &tda19988_config); armada_drm_load() 189 ret = drm_vblank_init(dev, dev->mode_config.num_crtc); armada_drm_load() 193 dev->irq_enabled = true; armada_drm_load() 194 dev->vblank_disable_allowed = 1; armada_drm_load() 196 ret = armada_fbdev_init(dev); armada_drm_load() 200 drm_kms_helper_poll_init(dev); armada_drm_load() 205 if (is_componentized(dev->dev)) armada_drm_load() 206 component_unbind_all(dev->dev, dev); armada_drm_load() 208 drm_mode_config_cleanup(dev); armada_drm_load() 215 static int armada_drm_unload(struct drm_device dev) armada_drm_unload() argument 217 struct armada_private priv = dev->dev_private; armada_drm_unload() 219 drm_kms_helper_poll_fini(dev); armada_drm_unload() 220 armada_fbdev_fini(dev); armada_drm_unload() 222 if (is_componentized(dev->dev)) armada_drm_unload() 223 component_unbind_all(dev->dev, dev); armada_drm_unload() 225 drm_mode_config_cleanup(dev); armada_drm_unload() 228 dev->dev_private = NULL; armada_drm_unload() 242 drm_vblank_get(dcrtc->crtc.dev, dcrtc->num); armada_drm_vbl_event_add() 252 drm_vblank_put(dcrtc->crtc.dev, dcrtc->num); armada_drm_vbl_event_remove() 267 static int armada_drm_enable_vblank(struct drm_device dev, int crtc) armada_drm_enable_vblank() argument 269 struct armada_private priv = dev->dev_private; armada_drm_enable_vblank() 274 static void armada_drm_disable_vblank(struct drm_device dev, int crtc) armada_drm_disable_vblank() argument 276 struct armada_private priv = dev->dev_private; armada_drm_disable_vblank() 289 static void armada_drm_lastclose(struct drm_device dev) armada_drm_lastclose() argument 291 armada_fbdev_lastclose(dev); armada_drm_lastclose() 340 static int armada_drm_bind(struct device dev) armada_drm_bind() argument 342 return drm_platform_init(&armada_drm_driver, to_platform_device(dev)); armada_drm_bind() 345 static void armada_drm_unbind(struct device dev) armada_drm_unbind() argument 347 drm_put_dev(dev_get_drvdata(dev)); armada_drm_unbind() 350 static int compare_of(struct device dev, void data) compare_of() argument 352 return dev->of_node == data; compare_of() 355 static int compare_dev_name(struct device dev, void data) compare_dev_name() argument 358 return !strcmp(dev_name(dev), name); compare_dev_name() 361 static void armada_add_endpoints(struct device dev, armada_add_endpoints() argument 372 dev_warn(dev, "parent device of %s is not available\n", for_each_child_of_node() 378 component_match_add(dev, match, compare_of, remote); for_each_child_of_node() 383 static int armada_drm_find_components(struct device dev, armada_drm_find_components() argument 389 if (dev->of_node) { armada_drm_find_components() 390 struct device_node np = dev->of_node; armada_drm_find_components() 397 component_match_add(dev, match, compare_of, port); armada_drm_find_components() 402 dev_err(dev, "missing 'ports' property\n"); armada_drm_find_components() 411 armada_add_endpoints(dev, match, port); armada_drm_find_components() 414 } else if (dev->platform_data) { armada_drm_find_components() 415 char *devices = dev->platform_data; armada_drm_find_components() 419 component_match_add(dev, match, compare_dev_name, armada_drm_find_components() 423 dev_err(dev, "missing 'ports' property\n"); armada_drm_find_components() 432 armada_add_endpoints(dev, match, port); armada_drm_find_components() 448 if (is_componentized(&pdev->dev)) { armada_drm_probe() 452 ret = armada_drm_find_components(&pdev->dev, &match); armada_drm_probe() 456 return component_master_add_with_match(&pdev->dev, armada_drm_probe() 465 if (is_componentized(&pdev->dev)) armada_drm_remove() 466 component_master_del(&pdev->dev, &armada_master_ops); armada_drm_remove()
/linux-4.1.27/drivers/crypto/
H A D	sahara.c	242 static inline void sahara_write(struct sahara_dev dev, u32 data, u32 reg) sahara_write() argument 244 writel(data, dev->regs_base + reg); sahara_write() 247 static inline unsigned int sahara_read(struct sahara_dev dev, u32 reg) sahara_read() argument 249 return readl(dev->regs_base + reg); sahara_read() 252 static u32 sahara_aes_key_hdr(struct sahara_dev dev) sahara_aes_key_hdr() argument 258 if (dev->flags & FLAGS_CBC) { sahara_aes_key_hdr() 263 if (dev->flags & FLAGS_ENCRYPT) { sahara_aes_key_hdr() 271 static u32 sahara_aes_data_link_hdr(struct sahara_dev dev) sahara_aes_data_link_hdr() argument 355 static void sahara_decode_error(struct sahara_dev dev, unsigned int error) sahara_decode_error() argument 360 dev_err(dev->device, "%s: Error Register = 0x%08x\n", __func__, error); sahara_decode_error() 362 dev_err(dev->device, " - %s.\n", sahara_err_src[source]); sahara_decode_error() 366 dev_err(dev->device, " DMA read.\n"); sahara_decode_error() 368 dev_err(dev->device, " * DMA write.\n"); sahara_decode_error() 370 dev_err(dev->device, " * %s.\n", sahara_decode_error() 372 dev_err(dev->device, " * %s.\n", sahara_decode_error() 375 dev_err(dev->device, " * %s.\n", sahara_decode_error() 377 dev_err(dev->device, " * %s.\n", sahara_decode_error() 380 dev_err(dev->device, "\n"); sahara_decode_error() 385 static void sahara_decode_status(struct sahara_dev dev, unsigned int status) sahara_decode_status() argument 394 dev_dbg(dev->device, "%s: Status Register = 0x%08x\n", sahara_decode_status() 397 dev_dbg(dev->device, " - State = %d:\n", state); sahara_decode_status() 399 dev_dbg(dev->device, " Descriptor completed. IRQ pending.\n"); sahara_decode_status() 401 dev_dbg(dev->device, " * %s.\n", sahara_decode_status() 405 dev_dbg(dev->device, " - DAR Full.\n"); sahara_decode_status() 407 dev_dbg(dev->device, " - Error.\n"); sahara_decode_status() 409 dev_dbg(dev->device, " - Secure.\n"); sahara_decode_status() 411 dev_dbg(dev->device, " - Fail.\n"); sahara_decode_status() 413 dev_dbg(dev->device, " - RNG Reseed Request.\n"); sahara_decode_status() 415 dev_dbg(dev->device, " - RNG Active.\n"); sahara_decode_status() 417 dev_dbg(dev->device, " - MDHA Active.\n"); sahara_decode_status() 419 dev_dbg(dev->device, " - SKHA Active.\n"); sahara_decode_status() 422 dev_dbg(dev->device, " - Batch Mode.\n"); sahara_decode_status() 424 dev_dbg(dev->device, " - Decidated Mode.\n"); sahara_decode_status() 426 dev_dbg(dev->device, " - Debug Mode.\n"); sahara_decode_status() 428 dev_dbg(dev->device, " - Internal state = 0x%02x\n", sahara_decode_status() 431 dev_dbg(dev->device, "Current DAR: 0x%08x\n", sahara_decode_status() 432 sahara_read(dev, SAHARA_REG_CDAR)); sahara_decode_status() 433 dev_dbg(dev->device, "Initial DAR: 0x%08x\n\n", sahara_decode_status() 434 sahara_read(dev, SAHARA_REG_IDAR)); sahara_decode_status() 437 static void sahara_dump_descriptors(struct sahara_dev dev) sahara_dump_descriptors() argument 445 dev_dbg(dev->device, "Descriptor (%d) (0x%08x):\n", sahara_dump_descriptors() 446 i, dev->hw_phys_desc[i]); sahara_dump_descriptors() 447 dev_dbg(dev->device, "\thdr = 0x%08x\n", dev->hw_desc[i]->hdr); sahara_dump_descriptors() 448 dev_dbg(dev->device, "\tlen1 = %u\n", dev->hw_desc[i]->len1); sahara_dump_descriptors() 449 dev_dbg(dev->device, "\tp1 = 0x%08x\n", dev->hw_desc[i]->p1); sahara_dump_descriptors() 450 dev_dbg(dev->device, "\tlen2 = %u\n", dev->hw_desc[i]->len2); sahara_dump_descriptors() 451 dev_dbg(dev->device, "\tp2 = 0x%08x\n", dev->hw_desc[i]->p2); sahara_dump_descriptors() 452 dev_dbg(dev->device, "\tnext = 0x%08x\n", sahara_dump_descriptors() 453 dev->hw_desc[i]->next); sahara_dump_descriptors() 455 dev_dbg(dev->device, "\n"); sahara_dump_descriptors() 458 static void sahara_dump_links(struct sahara_dev dev) sahara_dump_links() argument 466 dev_dbg(dev->device, "Link (%d) (0x%08x):\n", sahara_dump_links() 467 i, dev->hw_phys_link[i]); sahara_dump_links() 468 dev_dbg(dev->device, "\tlen = %u\n", dev->hw_link[i]->len); sahara_dump_links() 469 dev_dbg(dev->device, "\tp = 0x%08x\n", dev->hw_link[i]->p); sahara_dump_links() 470 dev_dbg(dev->device, "\tnext = 0x%08x\n", sahara_dump_links() 471 dev->hw_link[i]->next); sahara_dump_links() 473 dev_dbg(dev->device, "\n"); sahara_dump_links() 476 static int sahara_hw_descriptor_create(struct sahara_dev dev) sahara_hw_descriptor_create() argument 478 struct sahara_ctx ctx = dev->ctx; sahara_hw_descriptor_create() 486 memcpy(dev->key_base, ctx->key, ctx->keylen); sahara_hw_descriptor_create() 489 if (dev->flags & FLAGS_CBC) { sahara_hw_descriptor_create() 490 dev->hw_desc[idx]->len1 = AES_BLOCK_SIZE; sahara_hw_descriptor_create() 491 dev->hw_desc[idx]->p1 = dev->iv_phys_base; sahara_hw_descriptor_create() 493 dev->hw_desc[idx]->len1 = 0; sahara_hw_descriptor_create() 494 dev->hw_desc[idx]->p1 = 0; sahara_hw_descriptor_create() 496 dev->hw_desc[idx]->len2 = ctx->keylen; sahara_hw_descriptor_create() 497 dev->hw_desc[idx]->p2 = dev->key_phys_base; sahara_hw_descriptor_create() 498 dev->hw_desc[idx]->next = dev->hw_phys_desc[1]; sahara_hw_descriptor_create() 500 dev->hw_desc[idx]->hdr = sahara_aes_key_hdr(dev); sahara_hw_descriptor_create() 505 dev->nb_in_sg = sahara_sg_length(dev->in_sg, dev->total); sahara_hw_descriptor_create() 506 dev->nb_out_sg = sahara_sg_length(dev->out_sg, dev->total); sahara_hw_descriptor_create() 507 if ((dev->nb_in_sg + dev->nb_out_sg) > SAHARA_MAX_HW_LINK) { sahara_hw_descriptor_create() 508 dev_err(dev->device, "not enough hw links (%d)\n", sahara_hw_descriptor_create() 509 dev->nb_in_sg + dev->nb_out_sg); sahara_hw_descriptor_create() 513 ret = dma_map_sg(dev->device, dev->in_sg, dev->nb_in_sg, sahara_hw_descriptor_create() 515 if (ret != dev->nb_in_sg) { sahara_hw_descriptor_create() 516 dev_err(dev->device, "couldn't map in sg\n"); sahara_hw_descriptor_create() 519 ret = dma_map_sg(dev->device, dev->out_sg, dev->nb_out_sg, sahara_hw_descriptor_create() 521 if (ret != dev->nb_out_sg) { sahara_hw_descriptor_create() 522 dev_err(dev->device, "couldn't map out sg\n"); sahara_hw_descriptor_create() 527 dev->hw_desc[idx]->p1 = dev->hw_phys_link[0]; sahara_hw_descriptor_create() 528 sg = dev->in_sg; sahara_hw_descriptor_create() 529 for (i = 0; i < dev->nb_in_sg; i++) { sahara_hw_descriptor_create() 530 dev->hw_link[i]->len = sg->length; sahara_hw_descriptor_create() 531 dev->hw_link[i]->p = sg->dma_address; sahara_hw_descriptor_create() 532 if (i == (dev->nb_in_sg - 1)) { sahara_hw_descriptor_create() 533 dev->hw_link[i]->next = 0; sahara_hw_descriptor_create() 535 dev->hw_link[i]->next = dev->hw_phys_link[i + 1]; sahara_hw_descriptor_create() 541 dev->hw_desc[idx]->p2 = dev->hw_phys_link[i]; sahara_hw_descriptor_create() 542 sg = dev->out_sg; sahara_hw_descriptor_create() 543 for (j = i; j < dev->nb_out_sg + i; j++) { sahara_hw_descriptor_create() 544 dev->hw_link[j]->len = sg->length; sahara_hw_descriptor_create() 545 dev->hw_link[j]->p = sg->dma_address; sahara_hw_descriptor_create() 546 if (j == (dev->nb_out_sg + i - 1)) { sahara_hw_descriptor_create() 547 dev->hw_link[j]->next = 0; sahara_hw_descriptor_create() 549 dev->hw_link[j]->next = dev->hw_phys_link[j + 1]; sahara_hw_descriptor_create() 555 dev->hw_desc[idx]->hdr = sahara_aes_data_link_hdr(dev); sahara_hw_descriptor_create() 556 dev->hw_desc[idx]->len1 = dev->total; sahara_hw_descriptor_create() 557 dev->hw_desc[idx]->len2 = dev->total; sahara_hw_descriptor_create() 558 dev->hw_desc[idx]->next = 0; sahara_hw_descriptor_create() 560 sahara_dump_descriptors(dev); sahara_hw_descriptor_create() 561 sahara_dump_links(dev); sahara_hw_descriptor_create() 563 sahara_write(dev, dev->hw_phys_desc[0], SAHARA_REG_DAR); sahara_hw_descriptor_create() 568 dma_unmap_sg(dev->device, dev->out_sg, dev->nb_out_sg, sahara_hw_descriptor_create() 571 dma_unmap_sg(dev->device, dev->in_sg, dev->nb_in_sg, sahara_hw_descriptor_create() 579 struct sahara_dev dev = dev_ptr; sahara_aes_process() local 586 dev_dbg(dev->device, sahara_aes_process() 591 dev->total = req->nbytes; sahara_aes_process() 592 dev->in_sg = req->src; sahara_aes_process() 593 dev->out_sg = req->dst; sahara_aes_process() 598 dev->flags = (dev->flags & ~FLAGS_MODE_MASK) \| rctx->mode; sahara_aes_process() 600 if ((dev->flags & FLAGS_CBC) && req->info) sahara_aes_process() 601 memcpy(dev->iv_base, req->info, AES_KEYSIZE_128); sahara_aes_process() 604 dev->ctx = ctx; sahara_aes_process() 606 reinit_completion(&dev->dma_completion); sahara_aes_process() 608 ret = sahara_hw_descriptor_create(dev); sahara_aes_process() 612 timeout = wait_for_completion_timeout(&dev->dma_completion, sahara_aes_process() 615 dev_err(dev->device, "AES timeout\n"); sahara_aes_process() 619 dma_unmap_sg(dev->device, dev->out_sg, dev->nb_out_sg, sahara_aes_process() 621 dma_unmap_sg(dev->device, dev->in_sg, dev->nb_in_sg, sahara_aes_process() 667 struct sahara_dev dev = dev_ptr; sahara_aes_crypt() local 670 dev_dbg(dev->device, "nbytes: %d, enc: %d, cbc: %d\n", sahara_aes_crypt() 674 dev_err(dev->device, sahara_aes_crypt() 681 mutex_lock(&dev->queue_mutex); sahara_aes_crypt() 682 err = ablkcipher_enqueue_request(&dev->queue, req); sahara_aes_crypt() 683 mutex_unlock(&dev->queue_mutex); sahara_aes_crypt() 685 wake_up_process(dev->kthread); sahara_aes_crypt() 788 static u32 sahara_sha_init_hdr(struct sahara_dev dev, sahara_sha_init_hdr() argument 811 static int sahara_sha_hw_links_create(struct sahara_dev dev, sahara_sha_hw_links_create() argument 819 dev->in_sg = rctx->in_sg; sahara_sha_hw_links_create() 821 dev->nb_in_sg = sahara_sg_length(dev->in_sg, rctx->total); sahara_sha_hw_links_create() 822 if ((dev->nb_in_sg) > SAHARA_MAX_HW_LINK) { sahara_sha_hw_links_create() 823 dev_err(dev->device, "not enough hw links (%d)\n", sahara_sha_hw_links_create() 824 dev->nb_in_sg + dev->nb_out_sg); sahara_sha_hw_links_create() 830 sg = dev->in_sg; sahara_sha_hw_links_create() 832 ret = dma_map_sg(dev->device, sg, 1, sahara_sha_hw_links_create() 837 dev->hw_link[i]->len = sg->length; sahara_sha_hw_links_create() 838 dev->hw_link[i]->p = sg->dma_address; sahara_sha_hw_links_create() 839 dev->hw_link[i]->next = dev->hw_phys_link[i + 1]; sahara_sha_hw_links_create() 843 dev->hw_link[i-1]->next = 0; sahara_sha_hw_links_create() 845 sg = dev->in_sg; sahara_sha_hw_links_create() 846 ret = dma_map_sg(dev->device, dev->in_sg, dev->nb_in_sg, sahara_sha_hw_links_create() 851 for (i = start; i < dev->nb_in_sg + start; i++) { sahara_sha_hw_links_create() 852 dev->hw_link[i]->len = sg->length; sahara_sha_hw_links_create() 853 dev->hw_link[i]->p = sg->dma_address; sahara_sha_hw_links_create() 854 if (i == (dev->nb_in_sg + start - 1)) { sahara_sha_hw_links_create() 855 dev->hw_link[i]->next = 0; sahara_sha_hw_links_create() 857 dev->hw_link[i]->next = dev->hw_phys_link[i + 1]; sahara_sha_hw_links_create() 866 static int sahara_sha_hw_data_descriptor_create(struct sahara_dev dev, sahara_sha_hw_data_descriptor_create() argument 876 dev->hw_desc[index]->hdr = sahara_sha_init_hdr(dev, rctx); sahara_sha_hw_data_descriptor_create() 879 dev->hw_desc[index]->hdr = SAHARA_HDR_MDHA_HASH; sahara_sha_hw_data_descriptor_create() 881 dev->hw_desc[index]->len1 = rctx->total; sahara_sha_hw_data_descriptor_create() 882 if (dev->hw_desc[index]->len1 == 0) { sahara_sha_hw_data_descriptor_create() 884 dev->hw_desc[index]->p1 = 0; sahara_sha_hw_data_descriptor_create() 888 dev->hw_desc[index]->p1 = dev->hw_phys_link[index]; sahara_sha_hw_data_descriptor_create() 889 i = sahara_sha_hw_links_create(dev, rctx, index); sahara_sha_hw_data_descriptor_create() 896 dev->hw_desc[index]->p2 = dev->hw_phys_link[i]; sahara_sha_hw_data_descriptor_create() 900 dev->hw_link[i]->p = dev->context_phys_base; sahara_sha_hw_data_descriptor_create() 902 dev->hw_link[i]->len = result_len; sahara_sha_hw_data_descriptor_create() 903 dev->hw_desc[index]->len2 = result_len; sahara_sha_hw_data_descriptor_create() 905 dev->hw_link[i]->next = 0; sahara_sha_hw_data_descriptor_create() 919 static int sahara_sha_hw_context_descriptor_create(struct sahara_dev dev, sahara_sha_hw_context_descriptor_create() argument 924 dev->hw_desc[index]->hdr = sahara_sha_init_hdr(dev, rctx); sahara_sha_hw_context_descriptor_create() 926 dev->hw_desc[index]->len1 = rctx->context_size; sahara_sha_hw_context_descriptor_create() 927 dev->hw_desc[index]->p1 = dev->hw_phys_link[index]; sahara_sha_hw_context_descriptor_create() 928 dev->hw_desc[index]->len2 = 0; sahara_sha_hw_context_descriptor_create() 929 dev->hw_desc[index]->p2 = 0; sahara_sha_hw_context_descriptor_create() 931 dev->hw_link[index]->len = rctx->context_size; sahara_sha_hw_context_descriptor_create() 932 dev->hw_link[index]->p = dev->context_phys_base; sahara_sha_hw_context_descriptor_create() 933 dev->hw_link[index]->next = 0; sahara_sha_hw_context_descriptor_create() 1033 static void sahara_sha_unmap_sg(struct sahara_dev dev, sahara_sha_unmap_sg() argument 1039 sg = dev->in_sg; sahara_sha_unmap_sg() 1041 dma_unmap_sg(dev->device, sg, 1, DMA_TO_DEVICE); sahara_sha_unmap_sg() 1045 dma_unmap_sg(dev->device, dev->in_sg, dev->nb_in_sg, sahara_sha_unmap_sg() 1052 struct sahara_dev dev = dev_ptr; sahara_sha_process() local 1062 sahara_sha_hw_data_descriptor_create(dev, rctx, req, 0); sahara_sha_process() 1063 dev->hw_desc[0]->next = 0; sahara_sha_process() 1066 memcpy(dev->context_base, rctx->context, rctx->context_size); sahara_sha_process() 1068 sahara_sha_hw_context_descriptor_create(dev, rctx, req, 0); sahara_sha_process() 1069 dev->hw_desc[0]->next = dev->hw_phys_desc[1]; sahara_sha_process() 1070 sahara_sha_hw_data_descriptor_create(dev, rctx, req, 1); sahara_sha_process() 1071 dev->hw_desc[1]->next = 0; sahara_sha_process() 1074 sahara_dump_descriptors(dev); sahara_sha_process() 1075 sahara_dump_links(dev); sahara_sha_process() 1077 reinit_completion(&dev->dma_completion); sahara_sha_process() 1079 sahara_write(dev, dev->hw_phys_desc[0], SAHARA_REG_DAR); sahara_sha_process() 1081 timeout = wait_for_completion_timeout(&dev->dma_completion, sahara_sha_process() 1084 dev_err(dev->device, "SHA timeout\n"); sahara_sha_process() 1089 sahara_sha_unmap_sg(dev, rctx); sahara_sha_process() 1091 memcpy(rctx->context, dev->context_base, rctx->context_size); sahara_sha_process() 1101 struct sahara_dev dev = (struct sahara_dev )data; sahara_queue_manage() local 1109 mutex_lock(&dev->queue_mutex); sahara_queue_manage() 1110 backlog = crypto_get_backlog(&dev->queue); sahara_queue_manage() 1111 async_req = crypto_dequeue_request(&dev->queue); sahara_queue_manage() 1112 mutex_unlock(&dev->queue_mutex); sahara_queue_manage() 1145 struct sahara_dev dev = dev_ptr; sahara_sha_enqueue() local 1159 mutex_lock(&dev->queue_mutex); sahara_sha_enqueue() 1160 ret = crypto_enqueue_request(&dev->queue, &req->base); sahara_sha_enqueue() 1161 mutex_unlock(&dev->queue_mutex); sahara_sha_enqueue() 1163 wake_up_process(dev->kthread); sahara_sha_enqueue() 1373 struct sahara_dev dev = (struct sahara_dev )data; sahara_irq_handler() local 1374 unsigned int stat = sahara_read(dev, SAHARA_REG_STATUS); sahara_irq_handler() 1375 unsigned int err = sahara_read(dev, SAHARA_REG_ERRSTATUS); sahara_irq_handler() 1377 sahara_write(dev, SAHARA_CMD_CLEAR_INT \| SAHARA_CMD_CLEAR_ERR, sahara_irq_handler() 1380 sahara_decode_status(dev, stat); sahara_irq_handler() 1385 dev->error = 0; sahara_irq_handler() 1387 sahara_decode_error(dev, err); sahara_irq_handler() 1388 dev->error = -EINVAL; sahara_irq_handler() 1391 complete(&dev->dma_completion); sahara_irq_handler() 1397 static int sahara_register_algs(struct sahara_dev dev) sahara_register_algs() argument 1415 if (dev->version > SAHARA_VERSION_3) sahara_register_algs() 1439 static void sahara_unregister_algs(struct sahara_dev dev) sahara_unregister_algs() argument 1449 if (dev->version > SAHARA_VERSION_3) sahara_unregister_algs() 1469 struct sahara_dev dev; sahara_probe() local 1476 dev = devm_kzalloc(&pdev->dev, sizeof(struct sahara_dev), GFP_KERNEL); sahara_probe() 1477 if (dev == NULL) { sahara_probe() 1478 dev_err(&pdev->dev, "unable to alloc data struct.\n"); sahara_probe() 1482 dev->device = &pdev->dev; sahara_probe() 1483 platform_set_drvdata(pdev, dev); sahara_probe() 1487 dev->regs_base = devm_ioremap_resource(&pdev->dev, res); sahara_probe() 1488 if (IS_ERR(dev->regs_base)) sahara_probe() 1489 return PTR_ERR(dev->regs_base); sahara_probe() 1494 dev_err(&pdev->dev, "failed to get irq resource\n"); sahara_probe() 1498 err = devm_request_irq(&pdev->dev, irq, sahara_irq_handler, sahara_probe() 1499 0, dev_name(&pdev->dev), dev); sahara_probe() 1501 dev_err(&pdev->dev, "failed to request irq\n"); sahara_probe() 1506 dev->clk_ipg = devm_clk_get(&pdev->dev, "ipg"); sahara_probe() 1507 if (IS_ERR(dev->clk_ipg)) { sahara_probe() 1508 dev_err(&pdev->dev, "Could not get ipg clock\n"); sahara_probe() 1509 return PTR_ERR(dev->clk_ipg); sahara_probe() 1512 dev->clk_ahb = devm_clk_get(&pdev->dev, "ahb"); sahara_probe() 1513 if (IS_ERR(dev->clk_ahb)) { sahara_probe() 1514 dev_err(&pdev->dev, "Could not get ahb clock\n"); sahara_probe() 1515 return PTR_ERR(dev->clk_ahb); sahara_probe() 1519 dev->hw_desc[0] = dma_alloc_coherent(&pdev->dev, sahara_probe() 1521 &dev->hw_phys_desc[0], GFP_KERNEL); sahara_probe() 1522 if (!dev->hw_desc[0]) { sahara_probe() 1523 dev_err(&pdev->dev, "Could not allocate hw descriptors\n"); sahara_probe() 1526 dev->hw_desc[1] = dev->hw_desc[0] + 1; sahara_probe() 1527 dev->hw_phys_desc[1] = dev->hw_phys_desc[0] + sahara_probe() 1531 dev->key_base = dma_alloc_coherent(&pdev->dev, 2 * AES_KEYSIZE_128, sahara_probe() 1532 &dev->key_phys_base, GFP_KERNEL); sahara_probe() 1533 if (!dev->key_base) { sahara_probe() 1534 dev_err(&pdev->dev, "Could not allocate memory for key\n"); sahara_probe() 1538 dev->iv_base = dev->key_base + AES_KEYSIZE_128; sahara_probe() 1539 dev->iv_phys_base = dev->key_phys_base + AES_KEYSIZE_128; sahara_probe() 1542 dev->context_base = dma_alloc_coherent(&pdev->dev, sahara_probe() 1544 &dev->context_phys_base, GFP_KERNEL); sahara_probe() 1545 if (!dev->context_base) { sahara_probe() 1546 dev_err(&pdev->dev, "Could not allocate memory for MDHA context\n"); sahara_probe() 1552 dev->hw_link[0] = dma_alloc_coherent(&pdev->dev, sahara_probe() 1554 &dev->hw_phys_link[0], GFP_KERNEL); sahara_probe() 1555 if (!dev->hw_link[0]) { sahara_probe() 1556 dev_err(&pdev->dev, "Could not allocate hw links\n"); sahara_probe() 1561 dev->hw_phys_link[i] = dev->hw_phys_link[i - 1] + sahara_probe() 1563 dev->hw_link[i] = dev->hw_link[i - 1] + 1; sahara_probe() 1566 crypto_init_queue(&dev->queue, SAHARA_QUEUE_LENGTH); sahara_probe() 1568 spin_lock_init(&dev->lock); sahara_probe() 1569 mutex_init(&dev->queue_mutex); sahara_probe() 1571 dev_ptr = dev; sahara_probe() 1573 dev->kthread = kthread_run(sahara_queue_manage, dev, "sahara_crypto"); sahara_probe() 1574 if (IS_ERR(dev->kthread)) { sahara_probe() 1575 err = PTR_ERR(dev->kthread); sahara_probe() 1579 init_completion(&dev->dma_completion); sahara_probe() 1581 clk_prepare_enable(dev->clk_ipg); sahara_probe() 1582 clk_prepare_enable(dev->clk_ahb); sahara_probe() 1584 version = sahara_read(dev, SAHARA_REG_VERSION); sahara_probe() 1585 if (of_device_is_compatible(pdev->dev.of_node, "fsl,imx27-sahara")) { sahara_probe() 1588 } else if (of_device_is_compatible(pdev->dev.of_node, sahara_probe() 1595 dev_err(&pdev->dev, "SAHARA version %d not supported\n", sahara_probe() 1600 dev->version = version; sahara_probe() 1602 sahara_write(dev, SAHARA_CMD_RESET \| SAHARA_CMD_MODE_BATCH, sahara_probe() 1604 sahara_write(dev, SAHARA_CONTROL_SET_THROTTLE(0) \| sahara_probe() 1610 err = sahara_register_algs(dev); sahara_probe() 1614 dev_info(&pdev->dev, "SAHARA version %d initialized\n", version); sahara_probe() 1619 dma_free_coherent(&pdev->dev, sahara_probe() 1621 dev->hw_link[0], dev->hw_phys_link[0]); sahara_probe() 1622 clk_disable_unprepare(dev->clk_ipg); sahara_probe() 1623 clk_disable_unprepare(dev->clk_ahb); sahara_probe() 1624 kthread_stop(dev->kthread); sahara_probe() 1627 dma_free_coherent(&pdev->dev, sahara_probe() 1629 dev->key_base, dev->key_phys_base); sahara_probe() 1630 dma_free_coherent(&pdev->dev, sahara_probe() 1632 dev->context_base, dev->context_phys_base); sahara_probe() 1634 dma_free_coherent(&pdev->dev, sahara_probe() 1636 dev->hw_desc[0], dev->hw_phys_desc[0]); sahara_probe() 1643 struct sahara_dev *dev = platform_get_drvdata(pdev); sahara_remove() local 1645 dma_free_coherent(&pdev->dev, sahara_remove() 1647 dev->hw_link[0], dev->hw_phys_link[0]); sahara_remove() 1648 dma_free_coherent(&pdev->dev, sahara_remove() 1650 dev->key_base, dev->key_phys_base); sahara_remove() 1651 dma_free_coherent(&pdev->dev, sahara_remove() 1653 dev->hw_desc[0], dev->hw_phys_desc[0]); sahara_remove() 1655 kthread_stop(dev->kthread); sahara_remove() 1657 sahara_unregister_algs(dev); sahara_remove() 1659 clk_disable_unprepare(dev->clk_ipg); sahara_remove() 1660 clk_disable_unprepare(dev->clk_ahb); sahara_remove()
H A D	s5p-sss.c	133 #define SSS_REG(dev, reg) ((dev)->ioaddr + (SSS_REG_##reg)) 134 #define SSS_READ(dev, reg) __raw_readl(SSS_REG(dev, reg)) 135 #define SSS_WRITE(dev, reg, val) __raw_writel((val), SSS_REG(dev, reg)) 137 #define SSS_AES_REG(dev, reg) ((dev)->aes_ioaddr + SSS_REG_##reg) 138 #define SSS_AES_WRITE(dev, reg, val) __raw_writel((val), \ 139 SSS_AES_REG(dev, reg)) 167 struct s5p_aes_dev dev; member in struct:s5p_aes_ctx 175 struct device dev; member in struct:s5p_aes_dev 220 if (IS_ENABLED(CONFIG_OF) && (pdev->dev.of_node)) { find_s5p_sss_version() 223 pdev->dev.of_node); find_s5p_sss_version() 230 static void s5p_set_dma_indata(struct s5p_aes_dev dev, struct scatterlist sg) s5p_set_dma_indata() argument 232 SSS_WRITE(dev, FCBRDMAS, sg_dma_address(sg)); s5p_set_dma_indata() 233 SSS_WRITE(dev, FCBRDMAL, sg_dma_len(sg)); s5p_set_dma_indata() 236 static void s5p_set_dma_outdata(struct s5p_aes_dev dev, struct scatterlist sg) s5p_set_dma_outdata() argument 238 SSS_WRITE(dev, FCBTDMAS, sg_dma_address(sg)); s5p_set_dma_outdata() 239 SSS_WRITE(dev, FCBTDMAL, sg_dma_len(sg)); s5p_set_dma_outdata() 242 static void s5p_aes_complete(struct s5p_aes_dev dev, int err) s5p_aes_complete() argument 245 dev->req->base.complete(&dev->req->base, err); s5p_aes_complete() 246 dev->busy = false; s5p_aes_complete() 249 static void s5p_unset_outdata(struct s5p_aes_dev dev) s5p_unset_outdata() argument 251 dma_unmap_sg(dev->dev, dev->sg_dst, 1, DMA_FROM_DEVICE); s5p_unset_outdata() 254 static void s5p_unset_indata(struct s5p_aes_dev dev) s5p_unset_indata() argument 256 dma_unmap_sg(dev->dev, dev->sg_src, 1, DMA_TO_DEVICE); s5p_unset_indata() 259 static int s5p_set_outdata(struct s5p_aes_dev dev, struct scatterlist sg) s5p_set_outdata() argument 272 err = dma_map_sg(dev->dev, sg, 1, DMA_FROM_DEVICE); s5p_set_outdata() 278 dev->sg_dst = sg; s5p_set_outdata() 285 static int s5p_set_indata(struct s5p_aes_dev dev, struct scatterlist sg) s5p_set_indata() argument 298 err = dma_map_sg(dev->dev, sg, 1, DMA_TO_DEVICE); s5p_set_indata() 304 dev->sg_src = sg; s5p_set_indata() 316 static bool s5p_aes_tx(struct s5p_aes_dev dev) s5p_aes_tx() argument 321 s5p_unset_outdata(dev); s5p_aes_tx() 323 if (!sg_is_last(dev->sg_dst)) { s5p_aes_tx() 324 err = s5p_set_outdata(dev, sg_next(dev->sg_dst)); s5p_aes_tx() 326 s5p_aes_complete(dev, err); s5p_aes_tx() 330 s5p_aes_complete(dev, err); s5p_aes_tx() 332 dev->busy = true; s5p_aes_tx() 333 tasklet_schedule(&dev->tasklet); s5p_aes_tx() 344 static bool s5p_aes_rx(struct s5p_aes_dev dev) s5p_aes_rx() argument 349 s5p_unset_indata(dev); s5p_aes_rx() 351 if (!sg_is_last(dev->sg_src)) { s5p_aes_rx() 352 err = s5p_set_indata(dev, sg_next(dev->sg_src)); s5p_aes_rx() 354 s5p_aes_complete(dev, err); s5p_aes_rx() 365 struct s5p_aes_dev dev = platform_get_drvdata(pdev); s5p_aes_interrupt() local 371 spin_lock_irqsave(&dev->lock, flags); s5p_aes_interrupt() 373 status = SSS_READ(dev, FCINTSTAT); s5p_aes_interrupt() 375 set_dma_rx = s5p_aes_rx(dev); s5p_aes_interrupt() 377 set_dma_tx = s5p_aes_tx(dev); s5p_aes_interrupt() 379 SSS_WRITE(dev, FCINTPEND, status); s5p_aes_interrupt() 388 s5p_set_dma_outdata(dev, dev->sg_dst); s5p_aes_interrupt() 390 s5p_set_dma_indata(dev, dev->sg_src); s5p_aes_interrupt() 392 spin_unlock_irqrestore(&dev->lock, flags); s5p_aes_interrupt() 397 static void s5p_set_aes(struct s5p_aes_dev dev, s5p_set_aes() argument 403 memcpy(dev->aes_ioaddr + SSS_REG_AES_IV_DATA(0), iv, 0x10); s5p_set_aes() 406 keystart = dev->aes_ioaddr + SSS_REG_AES_KEY_DATA(0); s5p_set_aes() 408 keystart = dev->aes_ioaddr + SSS_REG_AES_KEY_DATA(2); s5p_set_aes() 410 keystart = dev->aes_ioaddr + SSS_REG_AES_KEY_DATA(4); s5p_set_aes() 415 static void s5p_aes_crypt_start(struct s5p_aes_dev dev, unsigned long mode) s5p_aes_crypt_start() argument 417 struct ablkcipher_request req = dev->req; s5p_aes_crypt_start() 432 if (dev->ctx->keylen == AES_KEYSIZE_192) s5p_aes_crypt_start() 434 else if (dev->ctx->keylen == AES_KEYSIZE_256) s5p_aes_crypt_start() 446 spin_lock_irqsave(&dev->lock, flags); s5p_aes_crypt_start() 448 SSS_WRITE(dev, FCINTENCLR, s5p_aes_crypt_start() 450 SSS_WRITE(dev, FCFIFOCTRL, 0x00); s5p_aes_crypt_start() 452 err = s5p_set_indata(dev, req->src); s5p_aes_crypt_start() 456 err = s5p_set_outdata(dev, req->dst); s5p_aes_crypt_start() 460 SSS_AES_WRITE(dev, AES_CONTROL, aes_control); s5p_aes_crypt_start() 461 s5p_set_aes(dev, dev->ctx->aes_key, req->info, dev->ctx->keylen); s5p_aes_crypt_start() 463 s5p_set_dma_indata(dev, req->src); s5p_aes_crypt_start() 464 s5p_set_dma_outdata(dev, req->dst); s5p_aes_crypt_start() 466 SSS_WRITE(dev, FCINTENSET, s5p_aes_crypt_start() 469 spin_unlock_irqrestore(&dev->lock, flags); s5p_aes_crypt_start() 474 s5p_unset_indata(dev); s5p_aes_crypt_start() 477 s5p_aes_complete(dev, err); s5p_aes_crypt_start() 478 spin_unlock_irqrestore(&dev->lock, flags); s5p_aes_crypt_start() 483 struct s5p_aes_dev dev = (struct s5p_aes_dev )data; s5p_tasklet_cb() local 488 spin_lock_irqsave(&dev->lock, flags); s5p_tasklet_cb() 489 backlog = crypto_get_backlog(&dev->queue); s5p_tasklet_cb() 490 async_req = crypto_dequeue_request(&dev->queue); s5p_tasklet_cb() 493 dev->busy = false; s5p_tasklet_cb() 494 spin_unlock_irqrestore(&dev->lock, flags); s5p_tasklet_cb() 497 spin_unlock_irqrestore(&dev->lock, flags); s5p_tasklet_cb() 502 dev->req = ablkcipher_request_cast(async_req); s5p_tasklet_cb() 503 dev->ctx = crypto_tfm_ctx(dev->req->base.tfm); s5p_tasklet_cb() 504 reqctx = ablkcipher_request_ctx(dev->req); s5p_tasklet_cb() 506 s5p_aes_crypt_start(dev, reqctx->mode); s5p_tasklet_cb() 509 static int s5p_aes_handle_req(struct s5p_aes_dev dev, s5p_aes_handle_req() argument 515 spin_lock_irqsave(&dev->lock, flags); s5p_aes_handle_req() 516 err = ablkcipher_enqueue_request(&dev->queue, req); s5p_aes_handle_req() 517 if (dev->busy) { s5p_aes_handle_req() 518 spin_unlock_irqrestore(&dev->lock, flags); s5p_aes_handle_req() 521 dev->busy = true; s5p_aes_handle_req() 523 spin_unlock_irqrestore(&dev->lock, flags); s5p_aes_handle_req() 525 tasklet_schedule(&dev->tasklet); s5p_aes_handle_req() 536 struct s5p_aes_dev dev = ctx->dev; s5p_aes_crypt() local 545 return s5p_aes_handle_req(dev, req); s5p_aes_crypt() 589 ctx->dev = s5p_dev; s5p_aes_cra_init() 645 struct device dev = &pdev->dev; s5p_aes_probe() local 652 pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL); s5p_aes_probe() 657 pdata->ioaddr = devm_ioremap_resource(&pdev->dev, res); s5p_aes_probe() 663 pdata->clk = devm_clk_get(dev, "secss"); s5p_aes_probe() 665 dev_err(dev, "failed to find secss clock source\n"); s5p_aes_probe() 671 dev_err(dev, "Enabling SSS clk failed, err %d\n", err); s5p_aes_probe() 682 dev_warn(dev, "feed control interrupt is not available.\n"); s5p_aes_probe() 685 err = devm_request_irq(dev, pdata->irq_fc, s5p_aes_interrupt, s5p_aes_probe() 688 dev_warn(dev, "feed control interrupt is not available.\n"); s5p_aes_probe() 694 pdata->dev = dev; s5p_aes_probe() 712 dev_err(dev, "can't register '%s': %d\n", algs[i].cra_name, err); s5p_aes_probe()
/linux-4.1.27/drivers/net/ethernet/natsemi/
H A D	ns83820.c	464 static inline struct ns83820 PRIV(struct net_device dev) PRIV() argument 466 return netdev_priv(dev); PRIV() 469 #define __kick_rx(dev) writel(CR_RXE, dev->base + CR) 473 struct ns83820 dev = PRIV(ndev); kick_rx() local 475 if (test_and_clear_bit(0, &dev->rx_info.idle)) { kick_rx() 477 writel(dev->rx_info.phy_descs + kick_rx() 478 (4 DESC_SIZE * dev->rx_info.next_rx), kick_rx() 479 dev->base + RXDP); kick_rx() 480 if (dev->rx_info.next_rx == dev->rx_info.next_empty) kick_rx() 483 __kick_rx(dev); kick_rx() 488 #define start_tx_okay(dev) \ 489 (((NR_TX_DESC-2 + dev->tx_done_idx - dev->tx_free_idx) % NR_TX_DESC) > MIN_TX_DESC_FREE) 504 static inline void build_rx_desc(struct ns83820 dev, __le32 desc, dma_addr_t link, dma_addr_t buf, u32 cmdsts, u32 extsts) build_rx_desc() argument 513 #define nr_rx_empty(dev) ((NR_RX_DESC-2 + dev->rx_info.next_rx - dev->rx_info.next_empty) % NR_RX_DESC) ns83820_add_rx_skb() 514 static inline int ns83820_add_rx_skb(struct ns83820 dev, struct sk_buff skb) ns83820_add_rx_skb() argument 521 next_empty = dev->rx_info.next_empty; ns83820_add_rx_skb() 524 if (unlikely(nr_rx_empty(dev) <= 2)) { ns83820_add_rx_skb() 531 dev->rx_info.next_empty, ns83820_add_rx_skb() 532 dev->rx_info.nr_used, ns83820_add_rx_skb() 533 dev->rx_info.next_rx ns83820_add_rx_skb() 537 sg = dev->rx_info.descs + (next_empty * DESC_SIZE); ns83820_add_rx_skb() 538 BUG_ON(NULL != dev->rx_info.skbs[next_empty]); ns83820_add_rx_skb() 539 dev->rx_info.skbs[next_empty] = skb; ns83820_add_rx_skb() 541 dev->rx_info.next_empty = (next_empty + 1) % NR_RX_DESC; ns83820_add_rx_skb() 543 buf = pci_map_single(dev->pci_dev, skb->data, ns83820_add_rx_skb() 545 build_rx_desc(dev, sg, 0, buf, cmdsts, 0); ns83820_add_rx_skb() 547 if (likely(next_empty != dev->rx_info.next_rx)) ns83820_add_rx_skb() 548 dev->rx_info.descs[((NR_RX_DESC + next_empty - 1) % NR_RX_DESC) * DESC_SIZE] = cpu_to_le32(dev->rx_info.phy_descs + (next_empty * DESC_SIZE * 4)); ns83820_add_rx_skb() 555 struct ns83820 dev = PRIV(ndev); rx_refill() local 559 if (unlikely(nr_rx_empty(dev) <= 2)) rx_refill() 564 spin_lock_irqsave(&dev->rx_info.lock, flags); rx_refill() 576 spin_lock_irqsave(&dev->rx_info.lock, flags); rx_refill() 577 res = ns83820_add_rx_skb(dev, skb); rx_refill() 579 spin_unlock_irqrestore(&dev->rx_info.lock, flags); rx_refill() 586 spin_unlock_irqrestore(&dev->rx_info.lock, flags); rx_refill() 599 struct ns83820 dev = container_of(work, struct ns83820, tq_refill); queue_refill() local 600 struct net_device ndev = dev->ndev; queue_refill() 603 if (dev->rx_info.up) queue_refill() 607 static inline void clear_rx_desc(struct ns83820 dev, unsigned i) clear_rx_desc() argument 609 build_rx_desc(dev, dev->rx_info.descs + (DESC_SIZE * i), 0, 0, CMDSTS_OWN, 0); clear_rx_desc() 614 struct ns83820 dev = PRIV(ndev); phy_intr() local 620 cfg = readl(dev->base + CFG) ^ SPDSTS_POLARITY; phy_intr() 622 if (dev->CFG_cache & CFG_TBI_EN) { phy_intr() 624 tbisr = readl(dev->base + TBISR); phy_intr() 625 tanar = readl(dev->base + TANAR); phy_intr() 626 tanlpar = readl(dev->base + TANLPAR); phy_intr() 634 writel(readl(dev->base + TXCFG) phy_intr() 636 dev->base + TXCFG); phy_intr() 637 writel(readl(dev->base + RXCFG) \| RXCFG_RX_FD, phy_intr() 638 dev->base + RXCFG); phy_intr() 640 writel(readl(dev->base + GPIOR) \| GPIOR_GP1_OUT, phy_intr() 641 dev->base + GPIOR); phy_intr() 651 writel((readl(dev->base + TXCFG) phy_intr() 653 dev->base + TXCFG); phy_intr() 654 writel(readl(dev->base + RXCFG) & ~RXCFG_RX_FD, phy_intr() 655 dev->base + RXCFG); phy_intr() 657 writel(readl(dev->base + GPIOR) & ~GPIOR_GP1_OUT, phy_intr() 658 dev->base + GPIOR); phy_intr() 665 new_cfg = dev->CFG_cache & ~(CFG_SB \| CFG_MODE_1000 \| CFG_SPDSTS); phy_intr() 677 writel(readl(dev->base + TXCFG) phy_intr() 679 dev->base + TXCFG); phy_intr() 680 writel(readl(dev->base + RXCFG) \| RXCFG_RX_FD, phy_intr() 681 dev->base + RXCFG); phy_intr() 683 writel(readl(dev->base + TXCFG) phy_intr() 685 dev->base + TXCFG); phy_intr() 686 writel(readl(dev->base + RXCFG) & ~(RXCFG_RX_FD), phy_intr() 687 dev->base + RXCFG); phy_intr() 691 ((new_cfg ^ dev->CFG_cache) != 0)) { phy_intr() 692 writel(new_cfg, dev->base + CFG); phy_intr() 693 dev->CFG_cache = new_cfg; phy_intr() 696 dev->CFG_cache &= ~CFG_SPDSTS; phy_intr() 697 dev->CFG_cache \|= cfg & CFG_SPDSTS; phy_intr() 703 dev->linkstate != newlinkstate) { phy_intr() 711 dev->linkstate != newlinkstate) { phy_intr() 716 dev->linkstate = newlinkstate; phy_intr() 721 struct ns83820 dev = PRIV(ndev); ns83820_setup_rx() local 727 dev->rx_info.idle = 1; ns83820_setup_rx() 728 dev->rx_info.next_rx = 0; ns83820_setup_rx() 729 dev->rx_info.next_rx_desc = dev->rx_info.descs; ns83820_setup_rx() 730 dev->rx_info.next_empty = 0; ns83820_setup_rx() 733 clear_rx_desc(dev, i); ns83820_setup_rx() 735 writel(0, dev->base + RXDP_HI); ns83820_setup_rx() 736 writel(dev->rx_info.phy_descs, dev->base + RXDP); ns83820_setup_rx() 742 spin_lock_irq(&dev->rx_info.lock); ns83820_setup_rx() 744 writel(0x0001, dev->base + CCSR); ns83820_setup_rx() 745 writel(0, dev->base + RFCR); ns83820_setup_rx() 746 writel(0x7fc00000, dev->base + RFCR); ns83820_setup_rx() 747 writel(0xffc00000, dev->base + RFCR); ns83820_setup_rx() 749 dev->rx_info.up = 1; ns83820_setup_rx() 754 spin_lock(&dev->misc_lock); ns83820_setup_rx() 755 dev->IMR_cache \|= ISR_PHY; ns83820_setup_rx() 756 dev->IMR_cache \|= ISR_RXRCMP; ns83820_setup_rx() 757 //dev->IMR_cache \|= ISR_RXERR; ns83820_setup_rx() 758 //dev->IMR_cache \|= ISR_RXOK; ns83820_setup_rx() 759 dev->IMR_cache \|= ISR_RXORN; ns83820_setup_rx() 760 dev->IMR_cache \|= ISR_RXSOVR; ns83820_setup_rx() 761 dev->IMR_cache \|= ISR_RXDESC; ns83820_setup_rx() 762 dev->IMR_cache \|= ISR_RXIDLE; ns83820_setup_rx() 763 dev->IMR_cache \|= ISR_TXDESC; ns83820_setup_rx() 764 dev->IMR_cache \|= ISR_TXIDLE; ns83820_setup_rx() 766 writel(dev->IMR_cache, dev->base + IMR); ns83820_setup_rx() 767 writel(1, dev->base + IER); ns83820_setup_rx() 768 spin_unlock(&dev->misc_lock); ns83820_setup_rx() 772 spin_unlock_irq(&dev->rx_info.lock); ns83820_setup_rx() 777 static void ns83820_cleanup_rx(struct ns83820 dev) ns83820_cleanup_rx() argument 782 dprintk("ns83820_cleanup_rx(%p)\n", dev); ns83820_cleanup_rx() 785 spin_lock_irqsave(&dev->misc_lock, flags); ns83820_cleanup_rx() 786 dev->IMR_cache &= ~(ISR_RXOK \| ISR_RXDESC \| ISR_RXERR \| ISR_RXEARLY \| ISR_RXIDLE); ns83820_cleanup_rx() 787 writel(dev->IMR_cache, dev->base + IMR); ns83820_cleanup_rx() 788 spin_unlock_irqrestore(&dev->misc_lock, flags); ns83820_cleanup_rx() 791 dev->rx_info.up = 0; ns83820_cleanup_rx() 792 synchronize_irq(dev->pci_dev->irq); ns83820_cleanup_rx() 795 readl(dev->base + IMR); ns83820_cleanup_rx() 798 writel(0, dev->base + RXDP_HI); ns83820_cleanup_rx() 799 writel(0, dev->base + RXDP); ns83820_cleanup_rx() 802 struct sk_buff skb = dev->rx_info.skbs[i]; ns83820_cleanup_rx() 803 dev->rx_info.skbs[i] = NULL; ns83820_cleanup_rx() 804 clear_rx_desc(dev, i); ns83820_cleanup_rx() 811 struct ns83820 dev = PRIV(ndev); ns83820_rx_kick() local 812 /if (nr_rx_empty(dev) >= NR_RX_DESC/4)/ { ns83820_rx_kick() 813 if (dev->rx_info.up) { ns83820_rx_kick() 819 if (dev->rx_info.up && nr_rx_empty(dev) > NR_RX_DESC3/4) ns83820_rx_kick() 820 schedule_work(&dev->tq_refill); ns83820_rx_kick() 823 if (dev->rx_info.idle) ns83820_rx_kick() 832 struct ns83820 dev = PRIV(ndev); local 833 struct rx_info info = &dev->rx_info; 843 readl(dev->base + RXDP), 844 (long)(dev->rx_info.phy_descs), 845 (int)dev->rx_info.next_rx, 846 (dev->rx_info.descs + (DESC_SIZE * dev->rx_info.next_rx)), 847 (int)dev->rx_info.next_empty, 848 (dev->rx_info.descs + (DESC_SIZE * dev->rx_info.next_empty)) 873 clear_rx_desc(dev, next_rx); 875 pci_unmap_single(dev->pci_dev, bufptr, 943 struct ns83820 dev = PRIV(ndev); rx_action() local 945 writel(ihr, dev->base + IHR); rx_action() 947 spin_lock_irq(&dev->misc_lock); rx_action() 948 dev->IMR_cache \|= ISR_RXDESC; rx_action() 949 writel(dev->IMR_cache, dev->base + IMR); rx_action() 950 spin_unlock_irq(&dev->misc_lock); rx_action() 958 static inline void kick_tx(struct ns83820 dev) kick_tx() argument 961 dev, dev->tx_idx, dev->tx_free_idx); kick_tx() 962 writel(CR_TXE, dev->base + CR); kick_tx() 970 struct ns83820 dev = PRIV(ndev); do_tx_done() local 975 tx_done_idx = dev->tx_done_idx; do_tx_done() 976 desc = dev->tx_descs + (tx_done_idx DESC_SIZE); do_tx_done() 979 tx_done_idx, dev->tx_free_idx, le32_to_cpu(desc[DESC_CMDSTS])); do_tx_done() 980 while ((tx_done_idx != dev->tx_free_idx) && do_tx_done() 994 tx_done_idx, dev->tx_free_idx, cmdsts); do_tx_done() 995 skb = dev->tx_skbs[tx_done_idx]; do_tx_done() 996 dev->tx_skbs[tx_done_idx] = NULL; do_tx_done() 1002 pci_unmap_single(dev->pci_dev, do_tx_done() 1007 atomic_dec(&dev->nr_tx_skbs); do_tx_done() 1009 pci_unmap_page(dev->pci_dev, do_tx_done() 1015 dev->tx_done_idx = tx_done_idx; do_tx_done() 1018 desc = dev->tx_descs + (tx_done_idx * DESC_SIZE); do_tx_done() 1024 if (netif_queue_stopped(ndev) && start_tx_okay(dev)) { do_tx_done() 1031 static void ns83820_cleanup_tx(struct ns83820 dev) ns83820_cleanup_tx() argument 1036 struct sk_buff skb = dev->tx_skbs[i]; ns83820_cleanup_tx() 1037 dev->tx_skbs[i] = NULL; ns83820_cleanup_tx() 1039 __le32 desc = dev->tx_descs + (i DESC_SIZE); ns83820_cleanup_tx() 1040 pci_unmap_single(dev->pci_dev, ns83820_cleanup_tx() 1045 atomic_dec(&dev->nr_tx_skbs); ns83820_cleanup_tx() 1049 memset(dev->tx_descs, 0, NR_TX_DESC * DESC_SIZE * 4); ns83820_cleanup_tx() 1061 struct ns83820 dev = PRIV(ndev); ns83820_hard_start_xmit() local 1076 if (unlikely(dev->CFG_cache & CFG_LNKSTS)) { ns83820_hard_start_xmit() 1078 if (unlikely(dev->CFG_cache & CFG_LNKSTS)) ns83820_hard_start_xmit() 1083 last_idx = free_idx = dev->tx_free_idx; ns83820_hard_start_xmit() 1084 tx_done_idx = dev->tx_done_idx; ns83820_hard_start_xmit() 1092 if (dev->tx_done_idx != tx_done_idx) { ns83820_hard_start_xmit() 1100 if (free_idx == dev->tx_intr_idx) { ns83820_hard_start_xmit() 1102 dev->tx_intr_idx = (dev->tx_intr_idx + NR_TX_DESC/4) % NR_TX_DESC; ns83820_hard_start_xmit() 1138 buf = pci_map_single(dev->pci_dev, skb->data, len, PCI_DMA_TODEVICE); ns83820_hard_start_xmit() 1140 first_desc = dev->tx_descs + (free_idx DESC_SIZE); ns83820_hard_start_xmit() 1143 volatile __le32 desc = dev->tx_descs + (free_idx DESC_SIZE); ns83820_hard_start_xmit() 1149 desc[DESC_LINK] = cpu_to_le32(dev->tx_phy_descs + (free_idx * DESC_SIZE * 4)); ns83820_hard_start_xmit() 1161 buf = skb_frag_dma_map(&dev->pci_dev->dev, frag, 0, ns83820_hard_start_xmit() 1172 spin_lock_irq(&dev->tx_lock); ns83820_hard_start_xmit() 1173 dev->tx_skbs[last_idx] = skb; ns83820_hard_start_xmit() 1175 dev->tx_free_idx = free_idx; ns83820_hard_start_xmit() 1176 atomic_inc(&dev->nr_tx_skbs); ns83820_hard_start_xmit() 1177 spin_unlock_irq(&dev->tx_lock); ns83820_hard_start_xmit() 1179 kick_tx(dev); ns83820_hard_start_xmit() 1182 if (stopped && (dev->tx_done_idx != tx_done_idx) && start_tx_okay(dev)) ns83820_hard_start_xmit() 1188 static void ns83820_update_stats(struct ns83820 dev) ns83820_update_stats() argument 1190 struct net_device ndev = dev->ndev; ns83820_update_stats() 1191 u8 __iomem base = dev->base; ns83820_update_stats() 1209 struct ns83820 dev = PRIV(ndev); ns83820_get_stats() local 1212 spin_lock_irq(&dev->misc_lock); ns83820_get_stats() 1213 ns83820_update_stats(dev); ns83820_get_stats() 1214 spin_unlock_irq(&dev->misc_lock); ns83820_get_stats() 1223 struct ns83820 dev = PRIV(ndev); ns83820_get_settings() local 1241 cfg = readl(dev->base + CFG) ^ SPDSTS_POLARITY; ns83820_get_settings() 1242 tanar = readl(dev->base + TANAR); ns83820_get_settings() 1243 tbicr = readl(dev->base + TBICR); ns83820_get_settings() 1249 if (dev->CFG_cache & CFG_TBI_EN) { ns83820_get_settings() 1286 struct ns83820 dev = PRIV(ndev); ns83820_set_settings() local 1292 cfg = readl(dev->base + CFG) ^ SPDSTS_POLARITY; ns83820_set_settings() 1293 tanar = readl(dev->base + TANAR); ns83820_set_settings() 1295 if (dev->CFG_cache & CFG_TBI_EN) { ns83820_set_settings() 1305 spin_lock_irq(&dev->misc_lock); ns83820_set_settings() 1306 spin_lock(&dev->tx_lock); ns83820_set_settings() 1314 writel(readl(dev->base + TXCFG) ns83820_set_settings() 1316 dev->base + TXCFG); ns83820_set_settings() 1317 writel(readl(dev->base + RXCFG) \| RXCFG_RX_FD, ns83820_set_settings() 1318 dev->base + RXCFG); ns83820_set_settings() 1320 writel(readl(dev->base + GPIOR) \| GPIOR_GP1_OUT, ns83820_set_settings() 1321 dev->base + GPIOR); ns83820_set_settings() 1339 dev->base + TBICR); ns83820_set_settings() 1340 writel(TBICR_MR_AN_ENABLE, dev->base + TBICR); ns83820_set_settings() 1341 dev->linkstate = LINK_AUTONEGOTIATE; ns83820_set_settings() 1347 writel(0x00000000, dev->base + TBICR); ns83820_set_settings() 1355 spin_unlock(&dev->tx_lock); ns83820_set_settings() 1356 spin_unlock_irq(&dev->misc_lock); ns83820_set_settings() 1364 struct ns83820 dev = PRIV(ndev); ns83820_get_drvinfo() local 1367 strlcpy(info->bus_info, pci_name(dev->pci_dev), sizeof(info->bus_info)); ns83820_get_drvinfo() 1372 struct ns83820 dev = PRIV(ndev); ns83820_get_link() local 1373 u32 cfg = readl(dev->base + CFG) ^ SPDSTS_POLARITY; ns83820_get_link() 1384 static inline void ns83820_disable_interrupts(struct ns83820 dev) ns83820_disable_interrupts() argument 1386 writel(0, dev->base + IMR); ns83820_disable_interrupts() 1387 writel(0, dev->base + IER); ns83820_disable_interrupts() 1388 readl(dev->base + IER); ns83820_disable_interrupts() 1392 static void ns83820_mib_isr(struct ns83820 dev) ns83820_mib_isr() argument 1395 spin_lock_irqsave(&dev->misc_lock, flags); ns83820_mib_isr() 1396 ns83820_update_stats(dev); ns83820_mib_isr() 1397 spin_unlock_irqrestore(&dev->misc_lock, flags); ns83820_mib_isr() 1404 struct ns83820 dev = PRIV(ndev); ns83820_irq() local 1408 dev->ihr = 0; ns83820_irq() 1410 isr = readl(dev->base + ISR); ns83820_irq() 1418 struct ns83820 dev = PRIV(ndev); ns83820_do_isr() local 1427 dev->rx_info.idle = 1; ns83820_do_isr() 1433 prefetch(dev->rx_info.next_rx_desc); ns83820_do_isr() 1435 spin_lock_irqsave(&dev->misc_lock, flags); ns83820_do_isr() 1436 dev->IMR_cache &= ~(ISR_RXDESC \| ISR_RXOK); ns83820_do_isr() 1437 writel(dev->IMR_cache, dev->base + IMR); ns83820_do_isr() 1438 spin_unlock_irqrestore(&dev->misc_lock, flags); ns83820_do_isr() 1440 tasklet_schedule(&dev->rx_tasklet); ns83820_do_isr() 1442 //writel(4, dev->base + IHR); ns83820_do_isr() 1458 if ((ISR_RXRCMP & isr) && dev->rx_info.up) ns83820_do_isr() 1459 writel(CR_RXE, dev->base + CR); ns83820_do_isr() 1463 txdp = readl(dev->base + TXDP); ns83820_do_isr() 1465 txdp -= dev->tx_phy_descs; ns83820_do_isr() 1466 dev->tx_idx = txdp / (DESC_SIZE * 4); ns83820_do_isr() 1467 if (dev->tx_idx >= NR_TX_DESC) { ns83820_do_isr() 1469 dev->tx_idx = 0; ns83820_do_isr() 1476 if (dev->tx_idx != dev->tx_free_idx) ns83820_do_isr() 1477 kick_tx(dev); ns83820_do_isr() 1484 spin_lock_irqsave(&dev->tx_lock, flags); ns83820_do_isr() 1486 spin_unlock_irqrestore(&dev->tx_lock, flags); ns83820_do_isr() 1490 if ((dev->tx_done_idx == dev->tx_free_idx) && ns83820_do_isr() 1491 (dev->IMR_cache & ISR_TXOK)) { ns83820_do_isr() 1492 spin_lock_irqsave(&dev->misc_lock, flags); ns83820_do_isr() 1493 dev->IMR_cache &= ~ISR_TXOK; ns83820_do_isr() 1494 writel(dev->IMR_cache, dev->base + IMR); ns83820_do_isr() 1495 spin_unlock_irqrestore(&dev->misc_lock, flags); ns83820_do_isr() 1505 if ((ISR_TXIDLE & isr) && (dev->tx_done_idx != dev->tx_free_idx)) { ns83820_do_isr() 1506 spin_lock_irqsave(&dev->misc_lock, flags); ns83820_do_isr() 1507 dev->IMR_cache \|= ISR_TXOK; ns83820_do_isr() 1508 writel(dev->IMR_cache, dev->base + IMR); ns83820_do_isr() 1509 spin_unlock_irqrestore(&dev->misc_lock, flags); ns83820_do_isr() 1514 ns83820_mib_isr(dev); ns83820_do_isr() 1521 if (dev->ihr) ns83820_do_isr() 1522 writel(dev->ihr, dev->base + IHR); ns83820_do_isr() 1526 static void ns83820_do_reset(struct ns83820 dev, u32 which) ns83820_do_reset() argument 1529 writel(which, dev->base + CR); ns83820_do_reset() 1532 } while (readl(dev->base + CR) & which); ns83820_do_reset() 1538 struct ns83820 dev = PRIV(ndev); ns83820_stop() local 1541 del_timer_sync(&dev->tx_watchdog); ns83820_stop() 1543 ns83820_disable_interrupts(dev); ns83820_stop() 1545 dev->rx_info.up = 0; ns83820_stop() 1546 synchronize_irq(dev->pci_dev->irq); ns83820_stop() 1548 ns83820_do_reset(dev, CR_RST); ns83820_stop() 1550 synchronize_irq(dev->pci_dev->irq); ns83820_stop() 1552 spin_lock_irq(&dev->misc_lock); ns83820_stop() 1553 dev->IMR_cache &= ~(ISR_TXURN \| ISR_TXIDLE \| ISR_TXERR \| ISR_TXDESC \| ISR_TXOK); ns83820_stop() 1554 spin_unlock_irq(&dev->misc_lock); ns83820_stop() 1556 ns83820_cleanup_rx(dev); ns83820_stop() 1557 ns83820_cleanup_tx(dev); ns83820_stop() 1564 struct ns83820 dev = PRIV(ndev); ns83820_tx_timeout() local 1569 spin_lock_irqsave(&dev->tx_lock, flags); ns83820_tx_timeout() 1571 tx_done_idx = dev->tx_done_idx; ns83820_tx_timeout() 1572 desc = dev->tx_descs + (tx_done_idx DESC_SIZE); ns83820_tx_timeout() 1576 tx_done_idx, dev->tx_free_idx, le32_to_cpu(desc[DESC_CMDSTS])); ns83820_tx_timeout() 1581 isr = readl(dev->base + ISR); ns83820_tx_timeout() 1582 printk("irq: %08x imr: %08x\n", isr, dev->IMR_cache); ns83820_tx_timeout() 1589 tx_done_idx = dev->tx_done_idx; ns83820_tx_timeout() 1590 desc = dev->tx_descs + (tx_done_idx * DESC_SIZE); ns83820_tx_timeout() 1594 tx_done_idx, dev->tx_free_idx, le32_to_cpu(desc[DESC_CMDSTS])); ns83820_tx_timeout() 1596 spin_unlock_irqrestore(&dev->tx_lock, flags); ns83820_tx_timeout() 1602 struct ns83820 dev = PRIV(ndev); ns83820_tx_watch() local 1606 dev->tx_done_idx, dev->tx_free_idx, atomic_read(&dev->nr_tx_skbs) ns83820_tx_watch() 1611 dev->tx_done_idx != dev->tx_free_idx) { ns83820_tx_watch() 1614 dev->tx_done_idx, dev->tx_free_idx, ns83820_tx_watch() 1615 atomic_read(&dev->nr_tx_skbs)); ns83820_tx_watch() 1619 mod_timer(&dev->tx_watchdog, jiffies + 2HZ); ns83820_tx_watch() 1624 struct ns83820 dev = PRIV(ndev); ns83820_open() local 1631 writel(0, dev->base + PQCR); ns83820_open() 1637 memset(dev->tx_descs, 0, 4 NR_TX_DESC * DESC_SIZE); ns83820_open() 1639 dev->tx_descs[(i * DESC_SIZE) + DESC_LINK] ns83820_open() 1641 dev->tx_phy_descs ns83820_open() 1645 dev->tx_idx = 0; ns83820_open() 1646 dev->tx_done_idx = 0; ns83820_open() 1647 desc = dev->tx_phy_descs; ns83820_open() 1648 writel(0, dev->base + TXDP_HI); ns83820_open() 1649 writel(desc, dev->base + TXDP); ns83820_open() 1651 init_timer(&dev->tx_watchdog); ns83820_open() 1652 dev->tx_watchdog.data = (unsigned long)ndev; ns83820_open() 1653 dev->tx_watchdog.function = ns83820_tx_watch; ns83820_open() 1654 mod_timer(&dev->tx_watchdog, jiffies + 2HZ); ns83820_open() 1665 static void ns83820_getmac(struct ns83820 dev, u8 mac) ns83820_getmac() argument 1674 writel(i2, dev->base + RFCR); ns83820_getmac() 1675 data = readl(dev->base + RFDR); ns83820_getmac() 1692 struct ns83820 dev = PRIV(ndev); ns83820_set_multicast() local 1693 u8 __iomem rfcr = dev->base + RFCR; ns83820_set_multicast() 1708 spin_lock_irq(&dev->misc_lock); ns83820_set_multicast() 1713 spin_unlock_irq(&dev->misc_lock); ns83820_set_multicast() 1718 struct ns83820 dev = PRIV(ndev); ns83820_run_bist() local 1728 writel(enable, dev->base + PTSCR); ns83820_run_bist() 1731 status = readl(dev->base + PTSCR); ns83820_run_bist() 1756 static void ns83820_mii_write_bit(struct ns83820 dev, int bit) ns83820_mii_write_bit() argument 1759 dev->MEAR_cache &= ~MEAR_MDC; ns83820_mii_write_bit() 1760 writel(dev->MEAR_cache, dev->base + MEAR); ns83820_mii_write_bit() 1761 readl(dev->base + MEAR); ns83820_mii_write_bit() 1764 dev->MEAR_cache \|= MEAR_MDDIR; ns83820_mii_write_bit() 1766 dev->MEAR_cache \|= MEAR_MDIO; ns83820_mii_write_bit() 1768 dev->MEAR_cache &= ~MEAR_MDIO; ns83820_mii_write_bit() 1771 writel(dev->MEAR_cache, dev->base + MEAR); ns83820_mii_write_bit() 1772 readl(dev->base + MEAR); ns83820_mii_write_bit() 1778 dev->MEAR_cache \|= MEAR_MDC; ns83820_mii_write_bit() 1779 writel(dev->MEAR_cache, dev->base + MEAR); ns83820_mii_write_bit() 1780 readl(dev->base + MEAR); ns83820_mii_write_bit() 1786 static int ns83820_mii_read_bit(struct ns83820 dev) ns83820_mii_read_bit() argument 1791 dev->MEAR_cache &= ~MEAR_MDC; ns83820_mii_read_bit() 1792 dev->MEAR_cache &= ~MEAR_MDDIR; ns83820_mii_read_bit() 1793 writel(dev->MEAR_cache, dev->base + MEAR); ns83820_mii_read_bit() 1794 readl(dev->base + MEAR); ns83820_mii_read_bit() 1800 bit = (readl(dev->base + MEAR) & MEAR_MDIO) ? 1 : 0; ns83820_mii_read_bit() 1801 dev->MEAR_cache \|= MEAR_MDC; ns83820_mii_read_bit() 1802 writel(dev->MEAR_cache, dev->base + MEAR); ns83820_mii_read_bit() 1810 static unsigned ns83820_mii_read_reg(struct ns83820 dev, unsigned phy, unsigned reg) ns83820_mii_read_reg() argument 1817 ns83820_mii_read_bit(dev); ns83820_mii_read_reg() 1819 ns83820_mii_write_bit(dev, 0); /* start / ns83820_mii_read_reg() 1820 ns83820_mii_write_bit(dev, 1); ns83820_mii_read_reg() 1821 ns83820_mii_write_bit(dev, 1); / opcode read / ns83820_mii_read_reg() 1822 ns83820_mii_write_bit(dev, 0); ns83820_mii_read_reg() 1826 ns83820_mii_write_bit(dev, phy & (0x10 >> i)); ns83820_mii_read_reg() 1830 ns83820_mii_write_bit(dev, reg & (0x10 >> i)); ns83820_mii_read_reg() 1832 ns83820_mii_read_bit(dev); / turn around cycles / ns83820_mii_read_reg() 1833 ns83820_mii_read_bit(dev); ns83820_mii_read_reg() 1838 data \|= ns83820_mii_read_bit(dev); ns83820_mii_read_reg() 1844 static unsigned ns83820_mii_write_reg(struct ns83820 dev, unsigned phy, unsigned reg, unsigned data) ns83820_mii_write_reg() argument 1850 ns83820_mii_read_bit(dev); ns83820_mii_write_reg() 1852 ns83820_mii_write_bit(dev, 0); /* start / ns83820_mii_write_reg() 1853 ns83820_mii_write_bit(dev, 1); ns83820_mii_write_reg() 1854 ns83820_mii_write_bit(dev, 0); / opcode read / ns83820_mii_write_reg() 1855 ns83820_mii_write_bit(dev, 1); ns83820_mii_write_reg() 1859 ns83820_mii_write_bit(dev, phy & (0x10 >> i)); ns83820_mii_write_reg() 1863 ns83820_mii_write_bit(dev, reg & (0x10 >> i)); ns83820_mii_write_reg() 1865 ns83820_mii_read_bit(dev); / turn around cycles / ns83820_mii_write_reg() 1866 ns83820_mii_read_bit(dev); ns83820_mii_write_reg() 1870 ns83820_mii_write_bit(dev, (data >> (15 - i)) & 1); ns83820_mii_write_reg() 1877 struct ns83820 dev = PRIV(ndev); ns83820_probe_phy() local 1886 ns83820_mii_read_reg(dev, 1, 0x09); ns83820_probe_phy() 1887 ns83820_mii_write_reg(dev, 1, 0x10, 0x0d3e); ns83820_probe_phy() 1889 tmp = ns83820_mii_read_reg(dev, 1, 0x00); ns83820_probe_phy() 1890 ns83820_mii_write_reg(dev, 1, 0x00, tmp \| 0x8000); ns83820_probe_phy() 1892 ns83820_mii_read_reg(dev, 1, 0x09); ns83820_probe_phy() 1900 a = ns83820_mii_read_reg(dev, i, MII_PHYIDR1); ns83820_probe_phy() 1901 b = ns83820_mii_read_reg(dev, i, MII_PHYIDR2); ns83820_probe_phy() 1909 ns83820_mii_read_reg(dev, i, 0 + j), ns83820_probe_phy() 1910 ns83820_mii_read_reg(dev, i, 1 + j), ns83820_probe_phy() 1911 ns83820_mii_read_reg(dev, i, 2 + j), ns83820_probe_phy() 1912 ns83820_mii_read_reg(dev, i, 3 + j) ns83820_probe_phy() 1919 ns83820_mii_write_reg(dev, 1, 0x16, 0x000d); ns83820_probe_phy() 1920 ns83820_mii_write_reg(dev, 1, 0x1e, 0x810e); ns83820_probe_phy() 1921 a = ns83820_mii_read_reg(dev, 1, 0x1d); ns83820_probe_phy() 1923 ns83820_mii_write_reg(dev, 1, 0x16, 0x000d); ns83820_probe_phy() 1924 ns83820_mii_write_reg(dev, 1, 0x1e, 0x810e); ns83820_probe_phy() 1925 b = ns83820_mii_read_reg(dev, 1, 0x1d); ns83820_probe_phy() 1947 struct ns83820 dev; ns83820_init_one() local 1959 dev_warn(&pci_dev->dev, "pci_set_dma_mask failed!\n"); ns83820_init_one() 1968 dev = PRIV(ndev); ns83820_init_one() 1969 dev->ndev = ndev; ns83820_init_one() 1971 spin_lock_init(&dev->rx_info.lock); ns83820_init_one() 1972 spin_lock_init(&dev->tx_lock); ns83820_init_one() 1973 spin_lock_init(&dev->misc_lock); ns83820_init_one() 1974 dev->pci_dev = pci_dev; ns83820_init_one() 1976 SET_NETDEV_DEV(ndev, &pci_dev->dev); ns83820_init_one() 1978 INIT_WORK(&dev->tq_refill, queue_refill); ns83820_init_one() 1979 tasklet_init(&dev->rx_tasklet, rx_action, (unsigned long)ndev); ns83820_init_one() 1983 dev_info(&pci_dev->dev, "pci_enable_dev failed: %d\n", err); ns83820_init_one() 1989 dev->base = ioremap_nocache(addr, PAGE_SIZE); ns83820_init_one() 1990 dev->tx_descs = pci_alloc_consistent(pci_dev, ns83820_init_one() 1991 4 DESC_SIZE * NR_TX_DESC, &dev->tx_phy_descs); ns83820_init_one() 1992 dev->rx_info.descs = pci_alloc_consistent(pci_dev, ns83820_init_one() 1993 4 * DESC_SIZE * NR_RX_DESC, &dev->rx_info.phy_descs); ns83820_init_one() 1995 if (!dev->base \|\| !dev->tx_descs \|\| !dev->rx_info.descs) ns83820_init_one() 1999 dev->tx_descs, (long)dev->tx_phy_descs, ns83820_init_one() 2000 dev->rx_info.descs, (long)dev->rx_info.phy_descs); ns83820_init_one() 2002 ns83820_disable_interrupts(dev); ns83820_init_one() 2004 dev->IMR_cache = 0; ns83820_init_one() 2009 dev_info(&pci_dev->dev, "unable to register irq %d, err %d\n", ns83820_init_one() 2016 * because some of the setup code uses dev->name. It's Wrong(tm) - ns83820_init_one() 2024 dev_info(&pci_dev->dev, "unable to get netdev name: %d\n", err); ns83820_init_one() 2029 ndev->name, le32_to_cpu(readl(dev->base + 0x22c)), ns83820_init_one() 2037 ns83820_do_reset(dev, CR_RST); ns83820_init_one() 2040 writel(PTSCR_RBIST_RST, dev->base + PTSCR); ns83820_init_one() 2048 dev->CFG_cache = readl(dev->base + CFG); ns83820_init_one() 2050 if ((dev->CFG_cache & CFG_PCI64_DET)) { ns83820_init_one() 2053 /dev->CFG_cache \|= CFG_DATA64_EN;/ ns83820_init_one() 2054 if (!(dev->CFG_cache & CFG_DATA64_EN)) ns83820_init_one() 2058 dev->CFG_cache &= ~(CFG_DATA64_EN); ns83820_init_one() 2060 dev->CFG_cache &= (CFG_TBI_EN \| CFG_MRM_DIS \| CFG_MWI_DIS \| ns83820_init_one() 2063 dev->CFG_cache \|= CFG_PINT_DUPSTS \| CFG_PINT_LNKSTS \| CFG_PINT_SPDSTS \| ns83820_init_one() 2065 dev->CFG_cache \|= CFG_REQALG; ns83820_init_one() 2066 dev->CFG_cache \|= CFG_POW; ns83820_init_one() 2067 dev->CFG_cache \|= CFG_TMRTEST; ns83820_init_one() 2073 dev->CFG_cache \|= CFG_M64ADDR; ns83820_init_one() 2075 dev->CFG_cache \|= CFG_T64ADDR; ns83820_init_one() 2078 dev->CFG_cache &= ~CFG_BEM; ns83820_init_one() 2081 if (dev->CFG_cache & CFG_TBI_EN) { ns83820_init_one() 2084 writel(readl(dev->base + GPIOR) \| 0x3e8, dev->base + GPIOR); ns83820_init_one() 2087 writel(readl(dev->base + TANAR) ns83820_init_one() 2089 dev->base + TANAR); ns83820_init_one() 2093 dev->base + TBICR); ns83820_init_one() 2094 writel(TBICR_MR_AN_ENABLE, dev->base + TBICR); ns83820_init_one() 2095 dev->linkstate = LINK_AUTONEGOTIATE; ns83820_init_one() 2097 dev->CFG_cache \|= CFG_MODE_1000; ns83820_init_one() 2100 writel(dev->CFG_cache, dev->base + CFG); ns83820_init_one() 2101 dprintk("CFG: %08x\n", dev->CFG_cache); ns83820_init_one() 2105 writel(dev->CFG_cache \| CFG_PHY_RST, dev->base + CFG); ns83820_init_one() 2107 writel(dev->CFG_cache, dev->base + CFG); ns83820_init_one() 2113 if (readl(dev->base + SRR)) ns83820_init_one() 2114 writel(readl(dev->base+0x20c) \| 0xfe00, dev->base + 0x20c); ns83820_init_one() 2126 dev->base + TXCFG); ns83820_init_one() 2129 writel(0x000, dev->base + IHR); ns83820_init_one() 2130 writel(0x100, dev->base + IHR); ns83820_init_one() 2131 writel(0x000, dev->base + IHR); ns83820_init_one() 2142 \| (RXCFG_MXDMA512) \| 0, dev->base + RXCFG); ns83820_init_one() 2145 writel(0, dev->base + PQCR); ns83820_init_one() 2165 writel(VRCR_INIT_VALUE, dev->base + VRCR); ns83820_init_one() 2176 writel(VTCR_INIT_VALUE, dev->base + VTCR); ns83820_init_one() 2179 /* writel(0, dev->base + PCR); / ns83820_init_one() 2182 dev->base + PCR); ns83820_init_one() 2185 writel(0, dev->base + WCSR); ns83820_init_one() 2187 ns83820_getmac(dev, ndev->dev_addr); ns83820_init_one() 2206 (unsigned)readl(dev->base + SRR) >> 8, ns83820_init_one() 2207 (unsigned)readl(dev->base + SRR) & 0xff, ns83820_init_one() 2226 ns83820_disable_interrupts(dev); / paranoia / ns83820_init_one() 2231 if (dev->base) ns83820_init_one() 2232 iounmap(dev->base); ns83820_init_one() 2233 pci_free_consistent(pci_dev, 4 DESC_SIZE * NR_TX_DESC, dev->tx_descs, dev->tx_phy_descs); ns83820_init_one() 2234 pci_free_consistent(pci_dev, 4 * DESC_SIZE * NR_RX_DESC, dev->rx_info.descs, dev->rx_info.phy_descs); ns83820_init_one() 2245 struct ns83820 dev = PRIV(ndev); / ok even if NULL / ns83820_remove_one() local 2250 ns83820_disable_interrupts(dev); / paranoia / ns83820_remove_one() 2253 free_irq(dev->pci_dev->irq, ndev); ns83820_remove_one() 2254 iounmap(dev->base); ns83820_remove_one() 2255 pci_free_consistent(dev->pci_dev, 4 DESC_SIZE * NR_TX_DESC, ns83820_remove_one() 2256 dev->tx_descs, dev->tx_phy_descs); ns83820_remove_one() 2257 pci_free_consistent(dev->pci_dev, 4 * DESC_SIZE * NR_RX_DESC, ns83820_remove_one() 2258 dev->rx_info.descs, dev->rx_info.phy_descs); ns83820_remove_one() 2259 pci_disable_device(dev->pci_dev); ns83820_remove_one()
/linux-4.1.27/drivers/media/pci/cx23885/
H A D	cx23885-f300.c	35 static void f300_set_line(struct cx23885_dev dev, u32 line, u8 lvl) f300_set_line() argument 37 cx23885_gpio_enable(dev, line, 1); f300_set_line() 39 cx23885_gpio_set(dev, line); f300_set_line() 41 cx23885_gpio_clear(dev, line); f300_set_line() 44 static u8 f300_get_line(struct cx23885_dev dev, u32 line) f300_get_line() argument 46 cx23885_gpio_enable(dev, line, 0); f300_get_line() 48 return cx23885_gpio_get(dev, line); f300_get_line() 51 static void f300_send_byte(struct cx23885_dev dev, u8 dta) f300_send_byte() argument 56 f300_set_line(dev, F300_CLK, 0); f300_send_byte() 58 f300_set_line(dev, F300_DATA, (dta & 0x80) >> 7);/ msb first / f300_send_byte() 61 f300_set_line(dev, F300_CLK, 1); f300_send_byte() 66 static u8 f300_get_byte(struct cx23885_dev dev) f300_get_byte() argument 71 f300_set_line(dev, F300_CLK, 0); f300_get_byte() 74 f300_set_line(dev, F300_CLK, 1); f300_get_byte() 76 dta \|= f300_get_line(dev, F300_DATA);/* msb first / f300_get_byte() 86 struct cx23885_dev dev = port->dev; f300_xfer() local 95 f300_set_line(dev, F300_RESET, 1); f300_xfer() 96 f300_set_line(dev, F300_CLK, 1); f300_xfer() 98 f300_set_line(dev, F300_DATA, 1); f300_xfer() 102 f300_set_line(dev, F300_RESET, 0);/* begin to send data / f300_xfer() 105 f300_send_byte(dev, 0xe0);/ the slave address is 0xe0, write / f300_xfer() 111 f300_send_byte(dev, buf[i]); f300_xfer() 113 f300_set_line(dev, F300_RESET, 1);/ sent data over / f300_xfer() 114 f300_set_line(dev, F300_DATA, 1); f300_xfer() 120 if (f300_get_line(dev, F300_BUSY) == 0) f300_xfer() 129 f300_set_line(dev, F300_RESET, 0);/ready.../ f300_xfer() 131 f300_send_byte(dev, 0xe1);/ 0xe1 is Read / f300_xfer() 133 temp = f300_get_byte(dev);/get the data length / f300_xfer() 138 f300_get_byte(dev);/ get data to empty buffer / f300_xfer() 140 f300_set_line(dev, F300_RESET, 1);/ received data over */ f300_xfer() 141 f300_set_line(dev, F300_DATA, 1); f300_xfer()
/linux-4.1.27/include/linux/usb/
H A D	ezusb.h	`4 extern int ezusb_fx1_set_reset(struct usb_device dev, unsigned char reset_bit); 5 extern int ezusb_fx1_ihex_firmware_download(struct usb_device dev,`
/linux-4.1.27/net/atm/
H A D	addr.c	39 static void notify_sigd(const struct atm_dev dev) notify_sigd() argument 43 pvc.sap_addr.itf = dev->number; notify_sigd() 47 void atm_reset_addr(struct atm_dev dev, enum atm_addr_type_t atype) atm_reset_addr() argument 53 spin_lock_irqsave(&dev->lock, flags); atm_reset_addr() 55 head = &dev->lecs; atm_reset_addr() 57 head = &dev->local; list_for_each_entry_safe() 62 spin_unlock_irqrestore(&dev->lock, flags); 63 if (head == &dev->local) 64 notify_sigd(dev); 67 int atm_add_addr(struct atm_dev dev, const struct sockaddr_atmsvc addr, atm_add_addr() argument 78 spin_lock_irqsave(&dev->lock, flags); atm_add_addr() 80 head = &dev->lecs; atm_add_addr() 82 head = &dev->local; list_for_each_entry() 85 spin_unlock_irqrestore(&dev->lock, flags); list_for_each_entry() 91 spin_unlock_irqrestore(&dev->lock, flags); 96 spin_unlock_irqrestore(&dev->lock, flags); 97 if (head == &dev->local) 98 notify_sigd(dev); 102 int atm_del_addr(struct atm_dev dev, const struct sockaddr_atmsvc addr, atm_del_addr() argument 113 spin_lock_irqsave(&dev->lock, flags); atm_del_addr() 115 head = &dev->lecs; atm_del_addr() 117 head = &dev->local; list_for_each_entry() 121 spin_unlock_irqrestore(&dev->lock, flags); list_for_each_entry() 123 if (head == &dev->local) list_for_each_entry() 124 notify_sigd(dev); list_for_each_entry() 128 spin_unlock_irqrestore(&dev->lock, flags); 132 int atm_get_addr(struct atm_dev dev, struct sockaddr_atmsvc __user buf, atm_get_addr() argument 141 spin_lock_irqsave(&dev->lock, flags); atm_get_addr() 143 head = &dev->lecs; atm_get_addr() 145 head = &dev->local; atm_get_addr() 150 spin_unlock_irqrestore(&dev->lock, flags); atm_get_addr() 155 spin_unlock_irqrestore(&dev->lock, flags); atm_get_addr()
/linux-4.1.27/net/netrom/
H A D	nr_dev.c	43 int nr_rx_ip(struct sk_buff skb, struct net_device dev) nr_rx_ip() argument 45 struct net_device_stats stats = &dev->stats; nr_rx_ip() 47 if (!netif_running(dev)) { nr_rx_ip() 58 skb->dev = dev; nr_rx_ip() 68 static int nr_header(struct sk_buff skb, struct net_device dev, nr_header() argument 74 memcpy(buff, (saddr != NULL) ? saddr : dev->dev_addr, dev->addr_len); nr_header() 81 memcpy(buff, daddr, dev->addr_len); nr_header() 101 static int __must_check nr_set_mac_address(struct net_device dev, void addr) nr_set_mac_address() argument 106 if (!memcmp(dev->dev_addr, sa->sa_data, dev->addr_len)) nr_set_mac_address() 109 if (dev->flags & IFF_UP) { nr_set_mac_address() 114 ax25_listen_release((ax25_address )dev->dev_addr, NULL); nr_set_mac_address() 117 memcpy(dev->dev_addr, sa->sa_data, dev->addr_len); nr_set_mac_address() 122 static int nr_open(struct net_device dev) nr_open() argument 126 err = ax25_listen_register((ax25_address )dev->dev_addr, NULL); nr_open() 130 netif_start_queue(dev); nr_open() 135 static int nr_close(struct net_device dev) nr_close() argument 137 ax25_listen_release((ax25_address )dev->dev_addr, NULL); nr_close() 138 netif_stop_queue(dev); nr_close() 142 static netdev_tx_t nr_xmit(struct sk_buff skb, struct net_device dev) nr_xmit() argument 144 struct net_device_stats stats = &dev->stats; nr_xmit() 170 void nr_setup(struct net_device dev) nr_setup() argument 172 dev->mtu = NR_MAX_PACKET_SIZE; nr_setup() 173 dev->netdev_ops = &nr_netdev_ops; nr_setup() 174 dev->header_ops = &nr_header_ops; nr_setup() 175 dev->hard_header_len = NR_NETWORK_LEN + NR_TRANSPORT_LEN; nr_setup() 176 dev->addr_len = AX25_ADDR_LEN; nr_setup() 177 dev->type = ARPHRD_NETROM; nr_setup() 180 dev->flags = IFF_NOARP; nr_setup()
/linux-4.1.27/arch/x86/include/asm/xen/
H A D	pci.h	18 int xen_find_device_domain_owner(struct pci_dev dev); 19 int xen_register_device_domain_owner(struct pci_dev dev, uint16_t domain); 20 int xen_unregister_device_domain_owner(struct pci_dev dev); 26 static inline int xen_find_device_domain_owner(struct pci_dev dev) xen_find_device_domain_owner() argument 30 static inline int xen_register_device_domain_owner(struct pci_dev dev, xen_register_device_domain_owner() argument 35 static inline int xen_unregister_device_domain_owner(struct pci_dev dev) xen_unregister_device_domain_owner() argument 47 int (enable_msi)(struct pci_dev dev, int vectors[]); 48 void (disable_msi)(struct pci_dev dev); 49 int (enable_msix)(struct pci_dev dev, int vectors[], int nvec); 50 void (disable_msix)(struct pci_dev dev); 55 static inline int xen_pci_frontend_enable_msi(struct pci_dev dev, xen_pci_frontend_enable_msi() argument 59 return xen_pci_frontend->enable_msi(dev, vectors); xen_pci_frontend_enable_msi() 62 static inline void xen_pci_frontend_disable_msi(struct pci_dev dev) xen_pci_frontend_disable_msi() argument 65 xen_pci_frontend->disable_msi(dev); xen_pci_frontend_disable_msi() 67 static inline int xen_pci_frontend_enable_msix(struct pci_dev dev, xen_pci_frontend_enable_msix() argument 71 return xen_pci_frontend->enable_msix(dev, vectors, nvec); xen_pci_frontend_enable_msix() 74 static inline void xen_pci_frontend_disable_msix(struct pci_dev dev) xen_pci_frontend_disable_msix() argument 77 xen_pci_frontend->disable_msix(dev); xen_pci_frontend_disable_msix()
/linux-4.1.27/fs/xfs/
H A D	xfs_message.h	33 #define xfs_printk_ratelimited(func, dev, fmt, ...) \ 39 func(dev, fmt, ##__VA_ARGS__); \ 42 #define xfs_emerg_ratelimited(dev, fmt, ...) \ 43 xfs_printk_ratelimited(xfs_emerg, dev, fmt, ##__VA_ARGS__) 44 #define xfs_alert_ratelimited(dev, fmt, ...) \ 45 xfs_printk_ratelimited(xfs_alert, dev, fmt, ##__VA_ARGS__) 46 #define xfs_crit_ratelimited(dev, fmt, ...) \ 47 xfs_printk_ratelimited(xfs_crit, dev, fmt, ##__VA_ARGS__) 48 #define xfs_err_ratelimited(dev, fmt, ...) \ 49 xfs_printk_ratelimited(xfs_err, dev, fmt, ##__VA_ARGS__) 50 #define xfs_warn_ratelimited(dev, fmt, ...) \ 51 xfs_printk_ratelimited(xfs_warn, dev, fmt, ##__VA_ARGS__) 52 #define xfs_notice_ratelimited(dev, fmt, ...) \ 53 xfs_printk_ratelimited(xfs_notice, dev, fmt, ##__VA_ARGS__) 54 #define xfs_info_ratelimited(dev, fmt, ...) \ 55 xfs_printk_ratelimited(xfs_info, dev, fmt, ##__VA_ARGS__) 56 #define xfs_debug_ratelimited(dev, fmt, ...) \ 57 xfs_printk_ratelimited(xfs_debug, dev, fmt, ##__VA_ARGS__)

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