1/* 2 * Adaptec AAC series RAID controller driver 3 * (c) Copyright 2001 Red Hat Inc. 4 * 5 * based on the old aacraid driver that is.. 6 * Adaptec aacraid device driver for Linux. 7 * 8 * Copyright (c) 2000-2010 Adaptec, Inc. 9 * 2010 PMC-Sierra, Inc. (aacraid@pmc-sierra.com) 10 * 11 * This program is free software; you can redistribute it and/or modify 12 * it under the terms of the GNU General Public License as published by 13 * the Free Software Foundation; either version 2, or (at your option) 14 * any later version. 15 * 16 * This program is distributed in the hope that it will be useful, 17 * but WITHOUT ANY WARRANTY; without even the implied warranty of 18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 19 * GNU General Public License for more details. 20 * 21 * You should have received a copy of the GNU General Public License 22 * along with this program; see the file COPYING. If not, write to 23 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. 24 * 25 * Module Name: 26 * comminit.c 27 * 28 * Abstract: This supports the initialization of the host adapter commuication interface. 29 * This is a platform dependent module for the pci cyclone board. 30 * 31 */ 32 33#include <linux/kernel.h> 34#include <linux/init.h> 35#include <linux/types.h> 36#include <linux/pci.h> 37#include <linux/spinlock.h> 38#include <linux/slab.h> 39#include <linux/blkdev.h> 40#include <linux/delay.h> 41#include <linux/completion.h> 42#include <linux/mm.h> 43#include <scsi/scsi_host.h> 44 45#include "aacraid.h" 46 47static void aac_define_int_mode(struct aac_dev *dev); 48 49struct aac_common aac_config = { 50 .irq_mod = 1 51}; 52 53static inline int aac_is_msix_mode(struct aac_dev *dev) 54{ 55 u32 status; 56 57 status = src_readl(dev, MUnit.OMR); 58 return (status & AAC_INT_MODE_MSIX); 59} 60 61static inline void aac_change_to_intx(struct aac_dev *dev) 62{ 63 aac_src_access_devreg(dev, AAC_DISABLE_MSIX); 64 aac_src_access_devreg(dev, AAC_ENABLE_INTX); 65} 66 67static int aac_alloc_comm(struct aac_dev *dev, void **commaddr, unsigned long commsize, unsigned long commalign) 68{ 69 unsigned char *base; 70 unsigned long size, align; 71 const unsigned long fibsize = dev->max_fib_size; 72 const unsigned long printfbufsiz = 256; 73 unsigned long host_rrq_size = 0; 74 struct aac_init *init; 75 dma_addr_t phys; 76 unsigned long aac_max_hostphysmempages; 77 78 if (dev->comm_interface == AAC_COMM_MESSAGE_TYPE1 || 79 dev->comm_interface == AAC_COMM_MESSAGE_TYPE2) 80 host_rrq_size = (dev->scsi_host_ptr->can_queue 81 + AAC_NUM_MGT_FIB) * sizeof(u32); 82 size = fibsize + sizeof(struct aac_init) + commsize + 83 commalign + printfbufsiz + host_rrq_size; 84 85 base = pci_alloc_consistent(dev->pdev, size, &phys); 86 87 if(base == NULL) 88 { 89 printk(KERN_ERR "aacraid: unable to create mapping.\n"); 90 return 0; 91 } 92 dev->comm_addr = (void *)base; 93 dev->comm_phys = phys; 94 dev->comm_size = size; 95 96 if (dev->comm_interface == AAC_COMM_MESSAGE_TYPE1 || 97 dev->comm_interface == AAC_COMM_MESSAGE_TYPE2) { 98 dev->host_rrq = (u32 *)(base + fibsize); 99 dev->host_rrq_pa = phys + fibsize; 100 memset(dev->host_rrq, 0, host_rrq_size); 101 } 102 103 dev->init = (struct aac_init *)(base + fibsize + host_rrq_size); 104 dev->init_pa = phys + fibsize + host_rrq_size; 105 106 init = dev->init; 107 108 init->InitStructRevision = cpu_to_le32(ADAPTER_INIT_STRUCT_REVISION); 109 if (dev->max_fib_size != sizeof(struct hw_fib)) 110 init->InitStructRevision = cpu_to_le32(ADAPTER_INIT_STRUCT_REVISION_4); 111 init->Sa_MSIXVectors = cpu_to_le32(Sa_MINIPORT_REVISION); 112 init->fsrev = cpu_to_le32(dev->fsrev); 113 114 /* 115 * Adapter Fibs are the first thing allocated so that they 116 * start page aligned 117 */ 118 dev->aif_base_va = (struct hw_fib *)base; 119 120 init->AdapterFibsVirtualAddress = 0; 121 init->AdapterFibsPhysicalAddress = cpu_to_le32((u32)phys); 122 init->AdapterFibsSize = cpu_to_le32(fibsize); 123 init->AdapterFibAlign = cpu_to_le32(sizeof(struct hw_fib)); 124 /* 125 * number of 4k pages of host physical memory. The aacraid fw needs 126 * this number to be less than 4gb worth of pages. New firmware doesn't 127 * have any issues with the mapping system, but older Firmware did, and 128 * had *troubles* dealing with the math overloading past 32 bits, thus 129 * we must limit this field. 130 */ 131 aac_max_hostphysmempages = dma_get_required_mask(&dev->pdev->dev) >> 12; 132 if (aac_max_hostphysmempages < AAC_MAX_HOSTPHYSMEMPAGES) 133 init->HostPhysMemPages = cpu_to_le32(aac_max_hostphysmempages); 134 else 135 init->HostPhysMemPages = cpu_to_le32(AAC_MAX_HOSTPHYSMEMPAGES); 136 137 init->InitFlags = cpu_to_le32(INITFLAGS_DRIVER_USES_UTC_TIME | 138 INITFLAGS_DRIVER_SUPPORTS_PM); 139 init->MaxIoCommands = cpu_to_le32(dev->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB); 140 init->MaxIoSize = cpu_to_le32(dev->scsi_host_ptr->max_sectors << 9); 141 init->MaxFibSize = cpu_to_le32(dev->max_fib_size); 142 init->MaxNumAif = cpu_to_le32(dev->max_num_aif); 143 144 if (dev->comm_interface == AAC_COMM_MESSAGE) { 145 init->InitFlags |= cpu_to_le32(INITFLAGS_NEW_COMM_SUPPORTED); 146 dprintk((KERN_WARNING"aacraid: New Comm Interface enabled\n")); 147 } else if (dev->comm_interface == AAC_COMM_MESSAGE_TYPE1) { 148 init->InitStructRevision = cpu_to_le32(ADAPTER_INIT_STRUCT_REVISION_6); 149 init->InitFlags |= cpu_to_le32(INITFLAGS_NEW_COMM_SUPPORTED | 150 INITFLAGS_NEW_COMM_TYPE1_SUPPORTED | INITFLAGS_FAST_JBOD_SUPPORTED); 151 init->HostRRQ_AddrHigh = cpu_to_le32((u32)((u64)dev->host_rrq_pa >> 32)); 152 init->HostRRQ_AddrLow = cpu_to_le32((u32)(dev->host_rrq_pa & 0xffffffff)); 153 dprintk((KERN_WARNING"aacraid: New Comm Interface type1 enabled\n")); 154 } else if (dev->comm_interface == AAC_COMM_MESSAGE_TYPE2) { 155 init->InitStructRevision = cpu_to_le32(ADAPTER_INIT_STRUCT_REVISION_7); 156 init->InitFlags |= cpu_to_le32(INITFLAGS_NEW_COMM_SUPPORTED | 157 INITFLAGS_NEW_COMM_TYPE2_SUPPORTED | INITFLAGS_FAST_JBOD_SUPPORTED); 158 init->HostRRQ_AddrHigh = cpu_to_le32((u32)((u64)dev->host_rrq_pa >> 32)); 159 init->HostRRQ_AddrLow = cpu_to_le32((u32)(dev->host_rrq_pa & 0xffffffff)); 160 /* number of MSI-X */ 161 init->Sa_MSIXVectors = cpu_to_le32(dev->max_msix); 162 dprintk((KERN_WARNING"aacraid: New Comm Interface type2 enabled\n")); 163 } 164 165 /* 166 * Increment the base address by the amount already used 167 */ 168 base = base + fibsize + host_rrq_size + sizeof(struct aac_init); 169 phys = (dma_addr_t)((ulong)phys + fibsize + host_rrq_size + 170 sizeof(struct aac_init)); 171 172 /* 173 * Align the beginning of Headers to commalign 174 */ 175 align = (commalign - ((uintptr_t)(base) & (commalign - 1))); 176 base = base + align; 177 phys = phys + align; 178 /* 179 * Fill in addresses of the Comm Area Headers and Queues 180 */ 181 *commaddr = base; 182 init->CommHeaderAddress = cpu_to_le32((u32)phys); 183 /* 184 * Increment the base address by the size of the CommArea 185 */ 186 base = base + commsize; 187 phys = phys + commsize; 188 /* 189 * Place the Printf buffer area after the Fast I/O comm area. 190 */ 191 dev->printfbuf = (void *)base; 192 init->printfbuf = cpu_to_le32(phys); 193 init->printfbufsiz = cpu_to_le32(printfbufsiz); 194 memset(base, 0, printfbufsiz); 195 return 1; 196} 197 198static void aac_queue_init(struct aac_dev * dev, struct aac_queue * q, u32 *mem, int qsize) 199{ 200 atomic_set(&q->numpending, 0); 201 q->dev = dev; 202 init_waitqueue_head(&q->cmdready); 203 INIT_LIST_HEAD(&q->cmdq); 204 init_waitqueue_head(&q->qfull); 205 spin_lock_init(&q->lockdata); 206 q->lock = &q->lockdata; 207 q->headers.producer = (__le32 *)mem; 208 q->headers.consumer = (__le32 *)(mem+1); 209 *(q->headers.producer) = cpu_to_le32(qsize); 210 *(q->headers.consumer) = cpu_to_le32(qsize); 211 q->entries = qsize; 212} 213 214/** 215 * aac_send_shutdown - shutdown an adapter 216 * @dev: Adapter to shutdown 217 * 218 * This routine will send a VM_CloseAll (shutdown) request to the adapter. 219 */ 220 221int aac_send_shutdown(struct aac_dev * dev) 222{ 223 struct fib * fibctx; 224 struct aac_close *cmd; 225 int status; 226 227 fibctx = aac_fib_alloc(dev); 228 if (!fibctx) 229 return -ENOMEM; 230 aac_fib_init(fibctx); 231 232 cmd = (struct aac_close *) fib_data(fibctx); 233 234 cmd->command = cpu_to_le32(VM_CloseAll); 235 cmd->cid = cpu_to_le32(0xfffffffe); 236 237 status = aac_fib_send(ContainerCommand, 238 fibctx, 239 sizeof(struct aac_close), 240 FsaNormal, 241 -2 /* Timeout silently */, 1, 242 NULL, NULL); 243 244 if (status >= 0) 245 aac_fib_complete(fibctx); 246 /* FIB should be freed only after getting the response from the F/W */ 247 if (status != -ERESTARTSYS) 248 aac_fib_free(fibctx); 249 dev->adapter_shutdown = 1; 250 if ((dev->pdev->device == PMC_DEVICE_S7 || 251 dev->pdev->device == PMC_DEVICE_S8 || 252 dev->pdev->device == PMC_DEVICE_S9) && 253 dev->msi_enabled) 254 aac_src_access_devreg(dev, AAC_ENABLE_INTX); 255 return status; 256} 257 258/** 259 * aac_comm_init - Initialise FSA data structures 260 * @dev: Adapter to initialise 261 * 262 * Initializes the data structures that are required for the FSA commuication 263 * interface to operate. 264 * Returns 265 * 1 - if we were able to init the commuication interface. 266 * 0 - If there were errors initing. This is a fatal error. 267 */ 268 269static int aac_comm_init(struct aac_dev * dev) 270{ 271 unsigned long hdrsize = (sizeof(u32) * NUMBER_OF_COMM_QUEUES) * 2; 272 unsigned long queuesize = sizeof(struct aac_entry) * TOTAL_QUEUE_ENTRIES; 273 u32 *headers; 274 struct aac_entry * queues; 275 unsigned long size; 276 struct aac_queue_block * comm = dev->queues; 277 /* 278 * Now allocate and initialize the zone structures used as our 279 * pool of FIB context records. The size of the zone is based 280 * on the system memory size. We also initialize the mutex used 281 * to protect the zone. 282 */ 283 spin_lock_init(&dev->fib_lock); 284 285 /* 286 * Allocate the physically contiguous space for the commuication 287 * queue headers. 288 */ 289 290 size = hdrsize + queuesize; 291 292 if (!aac_alloc_comm(dev, (void * *)&headers, size, QUEUE_ALIGNMENT)) 293 return -ENOMEM; 294 295 queues = (struct aac_entry *)(((ulong)headers) + hdrsize); 296 297 /* Adapter to Host normal priority Command queue */ 298 comm->queue[HostNormCmdQueue].base = queues; 299 aac_queue_init(dev, &comm->queue[HostNormCmdQueue], headers, HOST_NORM_CMD_ENTRIES); 300 queues += HOST_NORM_CMD_ENTRIES; 301 headers += 2; 302 303 /* Adapter to Host high priority command queue */ 304 comm->queue[HostHighCmdQueue].base = queues; 305 aac_queue_init(dev, &comm->queue[HostHighCmdQueue], headers, HOST_HIGH_CMD_ENTRIES); 306 307 queues += HOST_HIGH_CMD_ENTRIES; 308 headers +=2; 309 310 /* Host to adapter normal priority command queue */ 311 comm->queue[AdapNormCmdQueue].base = queues; 312 aac_queue_init(dev, &comm->queue[AdapNormCmdQueue], headers, ADAP_NORM_CMD_ENTRIES); 313 314 queues += ADAP_NORM_CMD_ENTRIES; 315 headers += 2; 316 317 /* host to adapter high priority command queue */ 318 comm->queue[AdapHighCmdQueue].base = queues; 319 aac_queue_init(dev, &comm->queue[AdapHighCmdQueue], headers, ADAP_HIGH_CMD_ENTRIES); 320 321 queues += ADAP_HIGH_CMD_ENTRIES; 322 headers += 2; 323 324 /* adapter to host normal priority response queue */ 325 comm->queue[HostNormRespQueue].base = queues; 326 aac_queue_init(dev, &comm->queue[HostNormRespQueue], headers, HOST_NORM_RESP_ENTRIES); 327 queues += HOST_NORM_RESP_ENTRIES; 328 headers += 2; 329 330 /* adapter to host high priority response queue */ 331 comm->queue[HostHighRespQueue].base = queues; 332 aac_queue_init(dev, &comm->queue[HostHighRespQueue], headers, HOST_HIGH_RESP_ENTRIES); 333 334 queues += HOST_HIGH_RESP_ENTRIES; 335 headers += 2; 336 337 /* host to adapter normal priority response queue */ 338 comm->queue[AdapNormRespQueue].base = queues; 339 aac_queue_init(dev, &comm->queue[AdapNormRespQueue], headers, ADAP_NORM_RESP_ENTRIES); 340 341 queues += ADAP_NORM_RESP_ENTRIES; 342 headers += 2; 343 344 /* host to adapter high priority response queue */ 345 comm->queue[AdapHighRespQueue].base = queues; 346 aac_queue_init(dev, &comm->queue[AdapHighRespQueue], headers, ADAP_HIGH_RESP_ENTRIES); 347 348 comm->queue[AdapNormCmdQueue].lock = comm->queue[HostNormRespQueue].lock; 349 comm->queue[AdapHighCmdQueue].lock = comm->queue[HostHighRespQueue].lock; 350 comm->queue[AdapNormRespQueue].lock = comm->queue[HostNormCmdQueue].lock; 351 comm->queue[AdapHighRespQueue].lock = comm->queue[HostHighCmdQueue].lock; 352 353 return 0; 354} 355 356struct aac_dev *aac_init_adapter(struct aac_dev *dev) 357{ 358 u32 status[5]; 359 struct Scsi_Host * host = dev->scsi_host_ptr; 360 extern int aac_sync_mode; 361 362 /* 363 * Check the preferred comm settings, defaults from template. 364 */ 365 dev->management_fib_count = 0; 366 spin_lock_init(&dev->manage_lock); 367 spin_lock_init(&dev->sync_lock); 368 dev->max_fib_size = sizeof(struct hw_fib); 369 dev->sg_tablesize = host->sg_tablesize = (dev->max_fib_size 370 - sizeof(struct aac_fibhdr) 371 - sizeof(struct aac_write) + sizeof(struct sgentry)) 372 / sizeof(struct sgentry); 373 dev->comm_interface = AAC_COMM_PRODUCER; 374 dev->raw_io_interface = dev->raw_io_64 = 0; 375 376 377 /* 378 * Enable INTX mode, if not done already Enabled 379 */ 380 if (aac_is_msix_mode(dev)) { 381 aac_change_to_intx(dev); 382 dev_info(&dev->pdev->dev, "Changed firmware to INTX mode"); 383 } 384 385 if ((!aac_adapter_sync_cmd(dev, GET_ADAPTER_PROPERTIES, 386 0, 0, 0, 0, 0, 0, 387 status+0, status+1, status+2, status+3, NULL)) && 388 (status[0] == 0x00000001)) { 389 dev->doorbell_mask = status[3]; 390 if (status[1] & le32_to_cpu(AAC_OPT_NEW_COMM_64)) 391 dev->raw_io_64 = 1; 392 dev->sync_mode = aac_sync_mode; 393 if (dev->a_ops.adapter_comm && 394 (status[1] & le32_to_cpu(AAC_OPT_NEW_COMM))) { 395 dev->comm_interface = AAC_COMM_MESSAGE; 396 dev->raw_io_interface = 1; 397 if ((status[1] & le32_to_cpu(AAC_OPT_NEW_COMM_TYPE1))) { 398 /* driver supports TYPE1 (Tupelo) */ 399 dev->comm_interface = AAC_COMM_MESSAGE_TYPE1; 400 } else if ((status[1] & le32_to_cpu(AAC_OPT_NEW_COMM_TYPE2))) { 401 /* driver supports TYPE2 (Denali) */ 402 dev->comm_interface = AAC_COMM_MESSAGE_TYPE2; 403 } else if ((status[1] & le32_to_cpu(AAC_OPT_NEW_COMM_TYPE4)) || 404 (status[1] & le32_to_cpu(AAC_OPT_NEW_COMM_TYPE3))) { 405 /* driver doesn't TYPE3 and TYPE4 */ 406 /* switch to sync. mode */ 407 dev->comm_interface = AAC_COMM_MESSAGE_TYPE2; 408 dev->sync_mode = 1; 409 } 410 } 411 if ((dev->comm_interface == AAC_COMM_MESSAGE) && 412 (status[2] > dev->base_size)) { 413 aac_adapter_ioremap(dev, 0); 414 dev->base_size = status[2]; 415 if (aac_adapter_ioremap(dev, status[2])) { 416 /* remap failed, go back ... */ 417 dev->comm_interface = AAC_COMM_PRODUCER; 418 if (aac_adapter_ioremap(dev, AAC_MIN_FOOTPRINT_SIZE)) { 419 printk(KERN_WARNING 420 "aacraid: unable to map adapter.\n"); 421 return NULL; 422 } 423 } 424 } 425 } 426 dev->max_msix = 0; 427 dev->msi_enabled = 0; 428 dev->adapter_shutdown = 0; 429 if ((!aac_adapter_sync_cmd(dev, GET_COMM_PREFERRED_SETTINGS, 430 0, 0, 0, 0, 0, 0, 431 status+0, status+1, status+2, status+3, status+4)) 432 && (status[0] == 0x00000001)) { 433 /* 434 * status[1] >> 16 maximum command size in KB 435 * status[1] & 0xFFFF maximum FIB size 436 * status[2] >> 16 maximum SG elements to driver 437 * status[2] & 0xFFFF maximum SG elements from driver 438 * status[3] & 0xFFFF maximum number FIBs outstanding 439 */ 440 host->max_sectors = (status[1] >> 16) << 1; 441 /* Multiple of 32 for PMC */ 442 dev->max_fib_size = status[1] & 0xFFE0; 443 host->sg_tablesize = status[2] >> 16; 444 dev->sg_tablesize = status[2] & 0xFFFF; 445 if (dev->pdev->device == PMC_DEVICE_S7 || 446 dev->pdev->device == PMC_DEVICE_S8 || 447 dev->pdev->device == PMC_DEVICE_S9) 448 host->can_queue = ((status[3] >> 16) ? (status[3] >> 16) : 449 (status[3] & 0xFFFF)) - AAC_NUM_MGT_FIB; 450 else 451 host->can_queue = (status[3] & 0xFFFF) - AAC_NUM_MGT_FIB; 452 dev->max_num_aif = status[4] & 0xFFFF; 453 /* 454 * NOTE: 455 * All these overrides are based on a fixed internal 456 * knowledge and understanding of existing adapters, 457 * acbsize should be set with caution. 458 */ 459 if (acbsize == 512) { 460 host->max_sectors = AAC_MAX_32BIT_SGBCOUNT; 461 dev->max_fib_size = 512; 462 dev->sg_tablesize = host->sg_tablesize 463 = (512 - sizeof(struct aac_fibhdr) 464 - sizeof(struct aac_write) + sizeof(struct sgentry)) 465 / sizeof(struct sgentry); 466 host->can_queue = AAC_NUM_IO_FIB; 467 } else if (acbsize == 2048) { 468 host->max_sectors = 512; 469 dev->max_fib_size = 2048; 470 host->sg_tablesize = 65; 471 dev->sg_tablesize = 81; 472 host->can_queue = 512 - AAC_NUM_MGT_FIB; 473 } else if (acbsize == 4096) { 474 host->max_sectors = 1024; 475 dev->max_fib_size = 4096; 476 host->sg_tablesize = 129; 477 dev->sg_tablesize = 166; 478 host->can_queue = 256 - AAC_NUM_MGT_FIB; 479 } else if (acbsize == 8192) { 480 host->max_sectors = 2048; 481 dev->max_fib_size = 8192; 482 host->sg_tablesize = 257; 483 dev->sg_tablesize = 337; 484 host->can_queue = 128 - AAC_NUM_MGT_FIB; 485 } else if (acbsize > 0) { 486 printk("Illegal acbsize=%d ignored\n", acbsize); 487 } 488 } 489 { 490 491 if (numacb > 0) { 492 if (numacb < host->can_queue) 493 host->can_queue = numacb; 494 else 495 printk("numacb=%d ignored\n", numacb); 496 } 497 } 498 499 if (host->can_queue > AAC_NUM_IO_FIB) 500 host->can_queue = AAC_NUM_IO_FIB; 501 502 if (dev->pdev->device == PMC_DEVICE_S6 || 503 dev->pdev->device == PMC_DEVICE_S7 || 504 dev->pdev->device == PMC_DEVICE_S8 || 505 dev->pdev->device == PMC_DEVICE_S9) 506 aac_define_int_mode(dev); 507 /* 508 * Ok now init the communication subsystem 509 */ 510 511 dev->queues = kzalloc(sizeof(struct aac_queue_block), GFP_KERNEL); 512 if (dev->queues == NULL) { 513 printk(KERN_ERR "Error could not allocate comm region.\n"); 514 return NULL; 515 } 516 517 if (aac_comm_init(dev)<0){ 518 kfree(dev->queues); 519 return NULL; 520 } 521 /* 522 * Initialize the list of fibs 523 */ 524 if (aac_fib_setup(dev) < 0) { 525 kfree(dev->queues); 526 return NULL; 527 } 528 529 INIT_LIST_HEAD(&dev->fib_list); 530 INIT_LIST_HEAD(&dev->sync_fib_list); 531 532 return dev; 533} 534 535static void aac_define_int_mode(struct aac_dev *dev) 536{ 537 538 int i, msi_count; 539 540 msi_count = i = 0; 541 /* max. vectors from GET_COMM_PREFERRED_SETTINGS */ 542 if (dev->max_msix == 0 || 543 dev->pdev->device == PMC_DEVICE_S6 || 544 dev->sync_mode) { 545 dev->max_msix = 1; 546 dev->vector_cap = 547 dev->scsi_host_ptr->can_queue + 548 AAC_NUM_MGT_FIB; 549 return; 550 } 551 552 msi_count = min(dev->max_msix, 553 (unsigned int)num_online_cpus()); 554 555 dev->max_msix = msi_count; 556 557 if (msi_count > AAC_MAX_MSIX) 558 msi_count = AAC_MAX_MSIX; 559 560 for (i = 0; i < msi_count; i++) 561 dev->msixentry[i].entry = i; 562 563 if (msi_count > 1 && 564 pci_find_capability(dev->pdev, PCI_CAP_ID_MSIX)) { 565 i = pci_enable_msix(dev->pdev, 566 dev->msixentry, 567 msi_count); 568 /* Check how many MSIX vectors are allocated */ 569 if (i >= 0) { 570 dev->msi_enabled = 1; 571 if (i) { 572 msi_count = i; 573 if (pci_enable_msix(dev->pdev, 574 dev->msixentry, 575 msi_count)) { 576 dev->msi_enabled = 0; 577 printk(KERN_ERR "%s%d: MSIX not supported!! Will try MSI 0x%x.\n", 578 dev->name, dev->id, i); 579 } 580 } 581 } else { 582 dev->msi_enabled = 0; 583 printk(KERN_ERR "%s%d: MSIX not supported!! Will try MSI 0x%x.\n", 584 dev->name, dev->id, i); 585 } 586 } 587 588 if (!dev->msi_enabled) { 589 msi_count = 1; 590 i = pci_enable_msi(dev->pdev); 591 592 if (!i) { 593 dev->msi_enabled = 1; 594 dev->msi = 1; 595 } else { 596 printk(KERN_ERR "%s%d: MSI not supported!! Will try INTx 0x%x.\n", 597 dev->name, dev->id, i); 598 } 599 } 600 601 if (!dev->msi_enabled) 602 dev->max_msix = msi_count = 1; 603 else { 604 if (dev->max_msix > msi_count) 605 dev->max_msix = msi_count; 606 } 607 dev->vector_cap = 608 (dev->scsi_host_ptr->can_queue + AAC_NUM_MGT_FIB) / 609 msi_count; 610} 611