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Searched refs:hwirq (Results 1 – 200 of 219) sorted by relevance

12

/linux-4.4.14/arch/powerpc/sysdev/
Dmpic_u3msi.c66 static u64 find_ht_magic_addr(struct pci_dev *pdev, unsigned int hwirq) in find_ht_magic_addr() argument
80 static u64 find_u4_magic_addr(struct pci_dev *pdev, unsigned int hwirq) in find_u4_magic_addr() argument
102 return 0xf8004000 | (hwirq << 4); in find_u4_magic_addr()
110 irq_hw_number_t hwirq; in u3msi_teardown_msi_irqs() local
116 hwirq = virq_to_hw(entry->irq); in u3msi_teardown_msi_irqs()
119 msi_bitmap_free_hwirqs(&msi_mpic->msi_bitmap, hwirq, 1); in u3msi_teardown_msi_irqs()
131 int hwirq; in u3msi_setup_msi_irqs() local
145 hwirq = msi_bitmap_alloc_hwirqs(&msi_mpic->msi_bitmap, 1); in u3msi_setup_msi_irqs()
146 if (hwirq < 0) { in u3msi_setup_msi_irqs()
148 return hwirq; in u3msi_setup_msi_irqs()
[all …]
Dfsl_msi.c73 irq_hw_number_t hwirq = irqd_to_hwirq(irqd); in fsl_msi_print_chip() local
76 srs = (hwirq >> msi_data->srs_shift) & MSI_SRS_MASK; in fsl_msi_print_chip()
110 int rc, hwirq; in fsl_msi_init_allocator() local
121 for (hwirq = 0; hwirq < NR_MSI_IRQS_MAX; hwirq++) in fsl_msi_init_allocator()
122 msi_bitmap_reserve_hwirq(&msi_data->bitmap, hwirq); in fsl_msi_init_allocator()
131 irq_hw_number_t hwirq; in fsl_teardown_msi_irqs() local
136 hwirq = virq_to_hw(entry->irq); in fsl_teardown_msi_irqs()
140 msi_bitmap_free_hwirqs(&msi_data->bitmap, hwirq, 1); in fsl_teardown_msi_irqs()
146 static void fsl_compose_msi_msg(struct pci_dev *pdev, int hwirq, in fsl_compose_msi_msg() argument
174 msg->data = __swab32(hwirq); in fsl_compose_msi_msg()
[all …]
Dppc4xx_hsta_msi.c45 int irq, hwirq; in hsta_setup_msi_irqs() local
62 hwirq = ppc4xx_hsta_msi.irq_map[irq]; in hsta_setup_msi_irqs()
63 if (hwirq == NO_IRQ) { in hsta_setup_msi_irqs()
79 pr_debug("%s: Setup irq %d (0x%0llx)\n", __func__, hwirq, in hsta_setup_msi_irqs()
82 if (irq_set_msi_desc(hwirq, entry)) { in hsta_setup_msi_irqs()
85 __func__, hwirq); in hsta_setup_msi_irqs()
89 pci_write_msi_msg(hwirq, &msg); in hsta_setup_msi_irqs()
95 static int hsta_find_hwirq_offset(int hwirq) in hsta_find_hwirq_offset() argument
101 if (ppc4xx_hsta_msi.irq_map[irq] == hwirq) in hsta_find_hwirq_offset()
Dmpic_msi.c22 void mpic_msi_reserve_hwirq(struct mpic *mpic, irq_hw_number_t hwirq) in mpic_msi_reserve_hwirq() argument
28 msi_bitmap_reserve_hwirq(&mpic->msi_bitmap, hwirq); in mpic_msi_reserve_hwirq()
34 irq_hw_number_t hwirq; in mpic_msi_reserve_u3_hwirqs() local
68 oirq.args_count, &hwirq, &flags); in mpic_msi_reserve_u3_hwirqs()
69 msi_bitmap_reserve_hwirq(&mpic->msi_bitmap, hwirq); in mpic_msi_reserve_u3_hwirqs()
Dmv64x60_pic.c212 irq_hw_number_t hwirq) in mv64x60_host_map() argument
218 level1 = (hwirq & MV64x60_LEVEL1_MASK) >> MV64x60_LEVEL1_OFFSET; in mv64x60_host_map()
274 irq_hw_number_t hwirq; in mv64x60_get_irq() local
292 hwirq = (level1 << MV64x60_LEVEL1_OFFSET) | __ilog2(cause); in mv64x60_get_irq()
293 virq = irq_linear_revmap(mv64x60_irq_host, hwirq); in mv64x60_get_irq()
Dmpic.h15 extern void mpic_msi_reserve_hwirq(struct mpic *mpic, irq_hw_number_t hwirq);
20 irq_hw_number_t hwirq) in mpic_msi_reserve_hwirq() argument
Dppc4xx_msi.c127 irq_hw_number_t hwirq; in ppc4xx_teardown_msi_irqs() local
134 hwirq = virq_to_hw(entry->irq); in ppc4xx_teardown_msi_irqs()
137 msi_bitmap_free_hwirqs(&msi_data->bitmap, hwirq, 1); in ppc4xx_teardown_msi_irqs()
Dmsi_bitmap.c56 void msi_bitmap_reserve_hwirq(struct msi_bitmap *bmp, unsigned int hwirq) in msi_bitmap_reserve_hwirq() argument
60 pr_debug("msi_bitmap: reserving hwirq 0x%x\n", hwirq); in msi_bitmap_reserve_hwirq()
63 bitmap_allocate_region(bmp->bitmap, hwirq, 0); in msi_bitmap_reserve_hwirq()
Dcpm1.c135 unsigned int sirq = NO_IRQ, hwirq, eirq; in cpm_pic_init() local
161 hwirq = (unsigned int)virq_to_hw(sirq); in cpm_pic_init()
164 ((hwirq/2) << 13) | CICR_HP_MASK); in cpm_pic_init()
/linux-4.4.14/kernel/irq/
Dirqdomain.c27 irq_hw_number_t hwirq, int node);
304 irq_hw_number_t hwirq; in irq_domain_disassociate() local
310 hwirq = irq_data->hwirq; in irq_domain_disassociate()
325 irq_data->hwirq = 0; in irq_domain_disassociate()
328 if (hwirq < domain->revmap_size) { in irq_domain_disassociate()
329 domain->linear_revmap[hwirq] = 0; in irq_domain_disassociate()
332 radix_tree_delete(&domain->revmap_tree, hwirq); in irq_domain_disassociate()
338 irq_hw_number_t hwirq) in irq_domain_associate() argument
343 if (WARN(hwirq >= domain->hwirq_max, in irq_domain_associate()
344 "error: hwirq 0x%x is too large for %s\n", (int)hwirq, domain->name)) in irq_domain_associate()
[all …]
Dmsi.c106 irq_hw_number_t hwirq = ops->get_hwirq(info, arg); in msi_domain_alloc() local
109 if (irq_find_mapping(domain, hwirq) > 0) in msi_domain_alloc()
117 ret = ops->msi_init(domain, info, virq + i, hwirq + i, arg); in msi_domain_alloc()
155 return arg->hwirq; in msi_domain_ops_get_hwirq()
178 unsigned int virq, irq_hw_number_t hwirq, in msi_domain_ops_init() argument
181 irq_domain_set_hwirq_and_chip(domain, virq, hwirq, info->chip, in msi_domain_ops_init()
Dirqdesc.c365 int __handle_domain_irq(struct irq_domain *domain, unsigned int hwirq, in __handle_domain_irq() argument
369 unsigned int irq = hwirq; in __handle_domain_irq()
376 irq = irq_find_mapping(domain, hwirq); in __handle_domain_irq()
/linux-4.4.14/arch/powerpc/platforms/85xx/
Dsocrates_fpga_pic.c114 unsigned int irq_line, hwirq = irqd_to_hwirq(d); in socrates_fpga_pic_ack() local
117 irq_line = fpga_irqs[hwirq].irq_line; in socrates_fpga_pic_ack()
121 mask |= (1 << (hwirq + 16)); in socrates_fpga_pic_ack()
129 unsigned int hwirq = irqd_to_hwirq(d); in socrates_fpga_pic_mask() local
133 irq_line = fpga_irqs[hwirq].irq_line; in socrates_fpga_pic_mask()
137 mask &= ~(1 << hwirq); in socrates_fpga_pic_mask()
145 unsigned int hwirq = irqd_to_hwirq(d); in socrates_fpga_pic_mask_ack() local
149 irq_line = fpga_irqs[hwirq].irq_line; in socrates_fpga_pic_mask_ack()
153 mask &= ~(1 << hwirq); in socrates_fpga_pic_mask_ack()
154 mask |= (1 << (hwirq + 16)); in socrates_fpga_pic_mask_ack()
[all …]
/linux-4.4.14/drivers/irqchip/
Dirq-or1k-pic.c32 mtspr(SPR_PICMR, mfspr(SPR_PICMR) & ~(1UL << data->hwirq)); in or1k_pic_mask()
37 mtspr(SPR_PICMR, mfspr(SPR_PICMR) | (1UL << data->hwirq)); in or1k_pic_unmask()
42 mtspr(SPR_PICSR, (1UL << data->hwirq)); in or1k_pic_ack()
47 mtspr(SPR_PICMR, mfspr(SPR_PICMR) & ~(1UL << data->hwirq)); in or1k_pic_mask_ack()
48 mtspr(SPR_PICSR, (1UL << data->hwirq)); in or1k_pic_mask_ack()
59 mtspr(SPR_PICSR, mfspr(SPR_PICSR) & ~(1UL << data->hwirq)); in or1k_pic_or1200_ack()
64 mtspr(SPR_PICMR, mfspr(SPR_PICMR) & ~(1UL << data->hwirq)); in or1k_pic_or1200_mask_ack()
65 mtspr(SPR_PICSR, mfspr(SPR_PICSR) & ~(1UL << data->hwirq)); in or1k_pic_or1200_mask_ack()
107 int hwirq; in pic_get_irq() local
109 hwirq = ffs(mfspr(SPR_PICSR) >> first); in pic_get_irq()
[all …]
Dirq-armada-370-xp.c94 irq_hw_number_t hwirq = irqd_to_hwirq(d); in armada_370_xp_irq_mask() local
96 if (!is_percpu_irq(hwirq)) in armada_370_xp_irq_mask()
97 writel(hwirq, main_int_base + in armada_370_xp_irq_mask()
100 writel(hwirq, per_cpu_int_base + in armada_370_xp_irq_mask()
106 irq_hw_number_t hwirq = irqd_to_hwirq(d); in armada_370_xp_irq_unmask() local
108 if (!is_percpu_irq(hwirq)) in armada_370_xp_irq_unmask()
109 writel(hwirq, main_int_base + in armada_370_xp_irq_unmask()
112 writel(hwirq, per_cpu_int_base + in armada_370_xp_irq_unmask()
120 int hwirq; in armada_370_xp_alloc_msi() local
123 hwirq = find_first_zero_bit(&msi_used, PCI_MSI_DOORBELL_NR); in armada_370_xp_alloc_msi()
[all …]
Dirq-mmp.c67 int hwirq; in icu_mask_ack_irq() local
70 hwirq = d->irq - data->virq_base; in icu_mask_ack_irq()
72 r = readl_relaxed(mmp_icu_base + (hwirq << 2)); in icu_mask_ack_irq()
75 writel_relaxed(r, mmp_icu_base + (hwirq << 2)); in icu_mask_ack_irq()
79 && (hwirq == data->clr_mfp_hwirq)) in icu_mask_ack_irq()
82 r = readl_relaxed(data->reg_mask) | (1 << hwirq); in icu_mask_ack_irq()
91 int hwirq; in icu_mask_irq() local
94 hwirq = d->irq - data->virq_base; in icu_mask_irq()
96 r = readl_relaxed(mmp_icu_base + (hwirq << 2)); in icu_mask_irq()
99 writel_relaxed(r, mmp_icu_base + (hwirq << 2)); in icu_mask_irq()
[all …]
Dirq-vf610-mscm-ir.c92 irq_hw_number_t hwirq = data->hwirq; in vf610_mscm_ir_enable() local
96 irsprc = readw_relaxed(chip_data->mscm_ir_base + MSCM_IRSPRC(hwirq)); in vf610_mscm_ir_enable()
102 chip_data->mscm_ir_base + MSCM_IRSPRC(hwirq)); in vf610_mscm_ir_enable()
109 irq_hw_number_t hwirq = data->hwirq; in vf610_mscm_ir_disable() local
112 writew_relaxed(0x0, chip_data->mscm_ir_base + MSCM_IRSPRC(hwirq)); in vf610_mscm_ir_disable()
132 irq_hw_number_t hwirq; in vf610_mscm_ir_domain_alloc() local
142 hwirq = fwspec->param[0]; in vf610_mscm_ir_domain_alloc()
144 irq_domain_set_hwirq_and_chip(domain, virq + i, hwirq + i, in vf610_mscm_ir_domain_alloc()
166 unsigned long *hwirq, in vf610_mscm_ir_domain_translate() argument
171 *hwirq = fwspec->param[0]; in vf610_mscm_ir_domain_translate()
Dirq-xtensa-mx.c70 unsigned int mask = 1u << d->hwirq; in xtensa_mx_irq_mask()
74 set_er(1u << (xtensa_get_ext_irq_no(d->hwirq) - in xtensa_mx_irq_mask()
85 unsigned int mask = 1u << d->hwirq; in xtensa_mx_irq_unmask()
89 set_er(1u << (xtensa_get_ext_irq_no(d->hwirq) - in xtensa_mx_irq_unmask()
100 variant_irq_enable(d->hwirq); in xtensa_mx_irq_enable()
107 variant_irq_disable(d->hwirq); in xtensa_mx_irq_disable()
112 set_sr(1 << d->hwirq, intclear); in xtensa_mx_irq_ack()
117 set_sr(1 << d->hwirq, intset); in xtensa_mx_irq_retrigger()
126 set_er(mask, MIROUT(d->hwirq - HW_IRQ_MX_BASE)); in xtensa_mx_irq_set_affinity()
Dirq-mtk-sysirq.c32 irq_hw_number_t hwirq = data->hwirq; in mtk_sysirq_set_type() local
38 offset = hwirq & 0x1f; in mtk_sysirq_set_type()
39 reg_index = hwirq >> 5; in mtk_sysirq_set_type()
72 unsigned long *hwirq, in mtk_sysirq_domain_translate() argument
83 *hwirq = fwspec->param[1]; in mtk_sysirq_domain_translate()
95 irq_hw_number_t hwirq; in mtk_sysirq_domain_alloc() local
106 hwirq = fwspec->param[1]; in mtk_sysirq_domain_alloc()
108 irq_domain_set_hwirq_and_chip(domain, virq + i, hwirq + i, in mtk_sysirq_domain_alloc()
Dirq-imx-gpcv2.c88 unsigned int idx = d->hwirq / 32; in imx_gpcv2_irq_set_wake()
95 mask = 1 << d->hwirq % 32; in imx_gpcv2_irq_set_wake()
116 reg = cd->gpc_base + cd->cpu2wakeup + d->hwirq / 32 * 4; in imx_gpcv2_irq_unmask()
118 val &= ~(1 << d->hwirq % 32); in imx_gpcv2_irq_unmask()
132 reg = cd->gpc_base + cd->cpu2wakeup + d->hwirq / 32 * 4; in imx_gpcv2_irq_mask()
134 val |= 1 << (d->hwirq % 32); in imx_gpcv2_irq_mask()
155 unsigned long *hwirq, in imx_gpcv2_domain_translate() argument
166 *hwirq = fwspec->param[1]; in imx_gpcv2_domain_translate()
180 irq_hw_number_t hwirq; in imx_gpcv2_domain_alloc() local
185 err = imx_gpcv2_domain_translate(domain, fwspec, &hwirq, &type); in imx_gpcv2_domain_alloc()
[all …]
Dirq-bcm2835.c103 writel_relaxed(HWIRQ_BIT(d->hwirq), intc.disable[HWIRQ_BANK(d->hwirq)]); in armctrl_mask_irq()
108 writel_relaxed(HWIRQ_BIT(d->hwirq), intc.enable[HWIRQ_BANK(d->hwirq)]); in armctrl_unmask_irq()
242 u32 hwirq; in bcm2835_handle_irq() local
244 while ((hwirq = get_next_armctrl_hwirq()) != ~0) in bcm2835_handle_irq()
245 handle_IRQ(irq_linear_revmap(intc.domain, hwirq), regs); in bcm2835_handle_irq()
250 u32 hwirq; in bcm2836_chained_handle_irq() local
252 while ((hwirq = get_next_armctrl_hwirq()) != ~0) in bcm2836_chained_handle_irq()
253 generic_handle_irq(irq_linear_revmap(intc.domain, hwirq)); in bcm2836_chained_handle_irq()
Dirq-xtensa-pic.c46 cached_irq_mask &= ~(1 << d->hwirq); in xtensa_irq_mask()
52 cached_irq_mask |= 1 << d->hwirq; in xtensa_irq_unmask()
58 variant_irq_enable(d->hwirq); in xtensa_irq_enable()
65 variant_irq_disable(d->hwirq); in xtensa_irq_disable()
70 set_sr(1 << d->hwirq, intclear); in xtensa_irq_ack()
75 set_sr(1 << d->hwirq, intset); in xtensa_irq_retrigger()
Dirq-nvic.c44 nvic_handle_irq(irq_hw_number_t hwirq, struct pt_regs *regs) in nvic_handle_irq() argument
46 unsigned int irq = irq_linear_revmap(nvic_irq_domain, hwirq); in nvic_handle_irq()
53 unsigned long *hwirq, unsigned int *type) in nvic_irq_domain_translate() argument
57 *hwirq = fwspec->param[0]; in nvic_irq_domain_translate()
66 irq_hw_number_t hwirq; in nvic_irq_domain_alloc() local
70 ret = nvic_irq_domain_translate(domain, fwspec, &hwirq, &type); in nvic_irq_domain_alloc()
75 irq_map_generic_chip(domain, virq + i, hwirq + i); in nvic_irq_domain_alloc()
Dirq-crossbar.c79 irq_hw_number_t hwirq) in allocate_gic_irq() argument
91 cb->irq_map[i] = hwirq; in allocate_gic_irq()
110 cb->write(i, hwirq); in allocate_gic_irq()
119 irq_hw_number_t hwirq; in crossbar_domain_alloc() local
127 hwirq = fwspec->param[1]; in crossbar_domain_alloc()
128 if ((hwirq + nr_irqs) > cb->max_crossbar_sources) in crossbar_domain_alloc()
132 int err = allocate_gic_irq(d, virq + i, hwirq + i); in crossbar_domain_alloc()
137 irq_domain_set_hwirq_and_chip(d, virq + i, hwirq + i, in crossbar_domain_alloc()
166 cb->irq_map[d->hwirq] = IRQ_FREE; in crossbar_domain_free()
167 cb->write(d->hwirq, cb->safe_map); in crossbar_domain_free()
[all …]
Dirq-keystone.c69 kirq->mask |= BIT(d->hwirq); in keystone_irq_setmask()
70 dev_dbg(kirq->dev, "mask %lu [%x]\n", d->hwirq, kirq->mask); in keystone_irq_setmask()
77 kirq->mask &= ~BIT(d->hwirq); in keystone_irq_unmask()
78 dev_dbg(kirq->dev, "unmask %lu [%x]\n", d->hwirq, kirq->mask); in keystone_irq_unmask()
200 int hwirq; in keystone_irq_remove() local
202 for (hwirq = 0; hwirq < KEYSTONE_N_IRQ; hwirq++) in keystone_irq_remove()
203 irq_dispose_mapping(irq_find_mapping(kirq->irqd, hwirq)); in keystone_irq_remove()
Dirq-vt8500.c87 void __iomem *stat_reg = base + VT8500_ICIS + (d->hwirq < 32 ? 0 : 4); in vt8500_irq_mask()
91 edge = readb(base + VT8500_ICDC + d->hwirq) & VT8500_EDGE; in vt8500_irq_mask()
95 status |= (1 << (d->hwirq & 0x1f)); in vt8500_irq_mask()
98 dctr = readb(base + VT8500_ICDC + d->hwirq); in vt8500_irq_mask()
100 writeb(dctr, base + VT8500_ICDC + d->hwirq); in vt8500_irq_mask()
110 dctr = readb(base + VT8500_ICDC + d->hwirq); in vt8500_irq_unmask()
112 writeb(dctr, base + VT8500_ICDC + d->hwirq); in vt8500_irq_unmask()
121 dctr = readb(base + VT8500_ICDC + d->hwirq); in vt8500_irq_set_type()
140 writeb(dctr, base + VT8500_ICDC + d->hwirq); in vt8500_irq_set_type()
Dirq-gic-v2m.c112 msg->data = data->hwirq; in gicv2m_compose_msi_msg()
129 irq_hw_number_t hwirq) in gicv2m_irq_gic_domain_alloc() argument
139 fwspec.param[1] = hwirq - 32; in gicv2m_irq_gic_domain_alloc()
155 static void gicv2m_unalloc_msi(struct v2m_data *v2m, unsigned int hwirq) in gicv2m_unalloc_msi() argument
159 pos = hwirq - v2m->spi_start; in gicv2m_unalloc_msi()
161 pr_err("Failed to teardown msi. Invalid hwirq %d\n", hwirq); in gicv2m_unalloc_msi()
174 int hwirq, offset, err = 0; in gicv2m_irq_domain_alloc() local
190 hwirq = v2m->spi_start + offset; in gicv2m_irq_domain_alloc()
192 err = gicv2m_irq_gic_domain_alloc(domain, virq, hwirq); in gicv2m_irq_domain_alloc()
194 gicv2m_unalloc_msi(v2m, hwirq); in gicv2m_irq_domain_alloc()
[all …]
Dirq-sun4i.c138 u32 hwirq; in sun4i_handle_irq() local
150 hwirq = readl(sun4i_irq_base + SUN4I_IRQ_VECTOR_REG) >> 2; in sun4i_handle_irq()
151 if (hwirq == 0 && in sun4i_handle_irq()
156 handle_domain_irq(sun4i_irq_domain, hwirq, regs); in sun4i_handle_irq()
157 hwirq = readl(sun4i_irq_base + SUN4I_IRQ_VECTOR_REG) >> 2; in sun4i_handle_irq()
158 } while (hwirq != 0); in sun4i_handle_irq()
Dirq-clps711x.c97 irq_hw_number_t hwirq = irqd_to_hwirq(d); in clps711x_intc_eoi() local
99 writel_relaxed(0, clps711x_intc->base + clps711x_irqs[hwirq].eoi); in clps711x_intc_eoi()
104 irq_hw_number_t hwirq = irqd_to_hwirq(d); in clps711x_intc_mask() local
105 void __iomem *intmr = clps711x_intc->intmr[hwirq / 16]; in clps711x_intc_mask()
109 tmp &= ~(1 << (hwirq % 16)); in clps711x_intc_mask()
115 irq_hw_number_t hwirq = irqd_to_hwirq(d); in clps711x_intc_unmask() local
116 void __iomem *intmr = clps711x_intc->intmr[hwirq / 16]; in clps711x_intc_unmask()
120 tmp |= 1 << (hwirq % 16); in clps711x_intc_unmask()
Dirq-bcm7038-l1.c136 int hwirq; in bcm7038_l1_irq_handle() local
143 for_each_set_bit(hwirq, &pending, IRQS_PER_WORD) { in bcm7038_l1_irq_handle()
145 base + hwirq)); in bcm7038_l1_irq_handle()
155 u32 word = d->hwirq / IRQS_PER_WORD; in __bcm7038_l1_unmask()
156 u32 mask = BIT(d->hwirq % IRQS_PER_WORD); in __bcm7038_l1_unmask()
166 u32 word = d->hwirq / IRQS_PER_WORD; in __bcm7038_l1_mask()
167 u32 mask = BIT(d->hwirq % IRQS_PER_WORD); in __bcm7038_l1_mask()
180 __bcm7038_l1_unmask(d, intc->affinity[d->hwirq]); in bcm7038_l1_unmask()
190 __bcm7038_l1_mask(d, intc->affinity[d->hwirq]); in bcm7038_l1_mask()
200 irq_hw_number_t hw = d->hwirq; in bcm7038_l1_set_affinity()
Dirq-tegra.c96 mask = BIT(d->hwirq % 32); in tegra_ictlr_write_mask()
127 u32 irq = d->hwirq; in tegra_set_wake()
226 unsigned long *hwirq, in tegra_ictlr_domain_translate() argument
237 *hwirq = fwspec->param[1]; in tegra_ictlr_domain_translate()
252 irq_hw_number_t hwirq; in tegra_ictlr_domain_alloc() local
260 hwirq = fwspec->param[1]; in tegra_ictlr_domain_alloc()
261 if (hwirq >= (num_ictlrs * 32)) in tegra_ictlr_domain_alloc()
265 int ictlr = (hwirq + i) / 32; in tegra_ictlr_domain_alloc()
267 irq_domain_set_hwirq_and_chip(domain, virq + i, hwirq + i, in tegra_ictlr_domain_alloc()
Dirq-bcm2836.c102 d->hwirq - LOCAL_IRQ_CNTPSIRQ, in bcm2836_arm_irqchip_mask_timer_irq()
109 d->hwirq - LOCAL_IRQ_CNTPSIRQ, in bcm2836_arm_irqchip_unmask_timer_irq()
149 static void bcm2836_arm_irqchip_register_irq(int hwirq, struct irq_chip *chip) in bcm2836_arm_irqchip_register_irq() argument
151 int irq = irq_create_mapping(intc.domain, hwirq); in bcm2836_arm_irqchip_register_irq()
176 u32 hwirq = ffs(stat) - 1; in bcm2836_arm_irqchip_handle_irq() local
178 handle_IRQ(irq_linear_revmap(intc.domain, hwirq), regs); in bcm2836_arm_irqchip_handle_irq()
Dirq-mxs.c81 return bit << ((d->hwirq & 3) << 3); in icoll_intr_bitshift()
88 return icoll_priv.intr + ((d->hwirq >> 2) * 0x10); in icoll_intr_reg()
105 icoll_priv.intr + CLR_REG + HW_ICOLL_INTERRUPTn(d->hwirq)); in icoll_mask_irq()
111 icoll_priv.intr + SET_REG + HW_ICOLL_INTERRUPTn(d->hwirq)); in icoll_unmask_irq()
122 __raw_writel(ASM9260_BM_CLEAR_BIT(d->hwirq), in asm9260_unmask_irq()
124 ASM9260_HW_ICOLL_CLEARn(d->hwirq)); in asm9260_unmask_irq()
Dirq-metag-ext.c132 irq_hw_number_t hw = data->hwirq; in meta_intc_startup_irq()
157 irq_hw_number_t hw = data->hwirq; in meta_intc_shutdown_irq()
178 irq_hw_number_t hw = data->hwirq; in meta_intc_ack_irq()
200 irq_hw_number_t hw = data->hwirq; in record_irq_is_masked()
216 irq_hw_number_t hw = data->hwirq; in record_irq_is_unmasked()
267 irq_hw_number_t hw = data->hwirq; in meta_intc_mask_irq()
290 irq_hw_number_t hw = data->hwirq; in meta_intc_unmask_irq()
313 irq_hw_number_t hw = data->hwirq; in meta_intc_mask_irq_nomask()
334 irq_hw_number_t hw = data->hwirq; in meta_intc_unmask_edge_irq_nomask()
375 irq_hw_number_t hw = data->hwirq; in meta_intc_unmask_level_irq_nomask()
[all …]
Dirq-digicolor.c39 u32 status, hwirq; in digicolor_handle_irq() local
44 hwirq = ffs(status) - 1; in digicolor_handle_irq()
48 hwirq = ffs(status) - 1 + 32; in digicolor_handle_irq()
53 handle_domain_irq(digicolor_irq_domain, hwirq, regs); in digicolor_handle_irq()
Dirq-moxart.c49 int hwirq; in handle_irq() local
54 hwirq = ffs(irqstat) - 1; in handle_irq()
55 handle_IRQ(irq_linear_revmap(intc.domain, hwirq), regs); in handle_irq()
56 irqstat &= ~(1 << hwirq); in handle_irq()
Dirq-orion.c44 u32 hwirq = __fls(stat); in orion_handle_irq() local
46 gc->irq_base + hwirq, regs); in orion_handle_irq()
47 stat &= ~(1 << hwirq); in orion_handle_irq()
118 u32 hwirq = __fls(stat); in orion_bridge_irq_handler() local
120 generic_handle_irq(irq_find_mapping(d, gc->irq_base + hwirq)); in orion_bridge_irq_handler()
121 stat &= ~(1 << hwirq); in orion_bridge_irq_handler()
Dirq-sa11x0.c42 reg &= ~BIT(d->hwirq); in sa1100_mask_irq()
51 reg |= BIT(d->hwirq); in sa1100_unmask_irq()
57 return sa11x0_sc_set_wake(d->hwirq, on); in sa1100_set_wake()
69 unsigned int irq, irq_hw_number_t hwirq) in sa1100_normal_irqdomain_map() argument
Dirq-vic.c195 irq_hw_number_t hwirq) in vic_irqdomain_map() argument
200 if (!(v->valid_sources & (1 << hwirq))) in vic_irqdomain_map()
230 u32 stat, hwirq; in vic_handle_irq_cascaded() local
237 hwirq = ffs(stat) - 1; in vic_handle_irq_cascaded()
238 generic_handle_irq(irq_find_mapping(vic->domain, hwirq)); in vic_handle_irq_cascaded()
319 unsigned int irq = d->hwirq; in vic_ack_irq()
328 unsigned int irq = d->hwirq; in vic_mask_irq()
335 unsigned int irq = d->hwirq; in vic_unmask_irq()
357 unsigned int off = d->hwirq; in vic_set_wake()
Dirq-atmel-aic-common.c122 u32 hwirq; in aic_common_ext_irq_of_init() local
129 of_property_for_each_u32(node, "atmel,external-irqs", prop, p, hwirq) { in aic_common_ext_irq_of_init()
130 gc = irq_get_domain_generic_chip(domain, hwirq); in aic_common_ext_irq_of_init()
133 hwirq, domain->revmap_size); in aic_common_ext_irq_of_init()
138 aic->ext_irqs |= (1 << (hwirq % 32)); in aic_common_ext_irq_of_init()
Dirq-gic-v3.c65 return d->hwirq; in gic_irq()
78 if (d->hwirq <= 1023) /* SPI -> dist_base */ in gic_dist_base()
221 if (d->hwirq >= gic_data.irq_nr) /* PPI/SPI only */ in gic_irq_set_irqchip_state()
248 if (d->hwirq >= gic_data.irq_nr) /* PPI/SPI only */ in gic_irq_get_irqchip_state()
761 unsigned long *hwirq, in gic_irq_domain_translate() argument
770 *hwirq = fwspec->param[1] + 32; in gic_irq_domain_translate()
773 *hwirq = fwspec->param[1] + 16; in gic_irq_domain_translate()
776 *hwirq = fwspec->param[1]; in gic_irq_domain_translate()
793 irq_hw_number_t hwirq; in gic_irq_domain_alloc() local
797 ret = gic_irq_domain_translate(domain, fwspec, &hwirq, &type); in gic_irq_domain_alloc()
[all …]
Dirq-metag.c124 irq_hw_number_t hw = data->hwirq; in metag_internal_irq_ack()
141 irq_hw_number_t hw = data->hwirq; in metag_internal_irq_mask()
160 irq_hw_number_t hw = data->hwirq; in metag_internal_irq_unmask()
196 irq_hw_number_t hw = data->hwirq; in metag_internal_irq_set_affinity()
Dirq-versatile-fpga.c55 u32 mask = 1 << d->hwirq; in fpga_irq_mask()
63 u32 mask = 1 << d->hwirq; in fpga_irq_unmask()
121 irq_hw_number_t hwirq) in fpga_irqdomain_map() argument
126 if (!(f->valid & BIT(hwirq))) in fpga_irqdomain_map()
Dirq-s3c24xx.c224 if ((data->hwirq >= 4) && (data->hwirq <= 7)) { in s3c_irqext_type()
227 gpcon_offset = (data->hwirq) * 2; in s3c_irqext_type()
228 extint_offset = (data->hwirq) * 4; in s3c_irqext_type()
229 } else if ((data->hwirq >= 8) && (data->hwirq <= 15)) { in s3c_irqext_type()
232 gpcon_offset = (data->hwirq - 8) * 2; in s3c_irqext_type()
233 extint_offset = (data->hwirq - 8) * 4; in s3c_irqext_type()
234 } else if ((data->hwirq >= 16) && (data->hwirq <= 23)) { in s3c_irqext_type()
237 gpcon_offset = (data->hwirq - 8) * 2; in s3c_irqext_type()
238 extint_offset = (data->hwirq - 16) * 4; in s3c_irqext_type()
253 if ((data->hwirq >= 0) && (data->hwirq <= 3)) { in s3c_irqext0_type()
[all …]
Dirq-dw-apb-ictl.c42 u32 hwirq = ffs(stat) - 1; in dw_apb_ictl_handler() local
43 u32 virq = irq_find_mapping(d, gc->irq_base + hwirq); in dw_apb_ictl_handler()
46 stat &= ~(1 << hwirq); in dw_apb_ictl_handler()
Dirq-gic-v3-its.c563 return d->hwirq - its_dev->event_map.lpi_base; in its_get_event_id()
569 irq_hw_number_t hwirq = d->hwirq; in lpi_set_config() local
571 u8 *cfg = page_address(gic_rdists->prop_page) + hwirq - 8192; in lpi_set_config()
1200 static int its_alloc_device_irq(struct its_device *dev, irq_hw_number_t *hwirq) in its_alloc_device_irq() argument
1209 *hwirq = dev->event_map.lpi_base + idx; in its_alloc_device_irq()
1261 irq_hw_number_t hwirq) in its_irq_gic_domain_alloc() argument
1269 fwspec.param[1] = hwirq; in its_irq_gic_domain_alloc()
1283 irq_hw_number_t hwirq; in its_irq_domain_alloc() local
1288 err = its_alloc_device_irq(its_dev, &hwirq); in its_irq_domain_alloc()
1292 err = its_irq_gic_domain_alloc(domain, virq + i, hwirq); in its_irq_domain_alloc()
[all …]
Dirq-mips-gic.c365 gic_reset_mask(GIC_HWIRQ_TO_SHARED(d->hwirq)); in gic_mask_irq()
370 gic_set_mask(GIC_HWIRQ_TO_SHARED(d->hwirq)); in gic_unmask_irq()
375 unsigned int irq = GIC_HWIRQ_TO_SHARED(d->hwirq); in gic_ack_irq()
382 unsigned int irq = GIC_HWIRQ_TO_SHARED(d->hwirq); in gic_set_type()
436 unsigned int irq = GIC_HWIRQ_TO_SHARED(d->hwirq); in gic_set_affinity()
511 int intr = GIC_HWIRQ_TO_LOCAL(d->hwirq); in gic_mask_local_irq()
518 int intr = GIC_HWIRQ_TO_LOCAL(d->hwirq); in gic_unmask_local_irq()
531 int intr = GIC_HWIRQ_TO_LOCAL(d->hwirq); in gic_mask_local_irq_all_vpes()
545 int intr = GIC_HWIRQ_TO_LOCAL(d->hwirq); in gic_unmask_local_irq_all_vpes()
Dirq-atmel-aic5.c97 irq_reg_writel(gc, d->hwirq, AT91_AIC5_SSR); in aic5_mask()
114 irq_reg_writel(gc, d->hwirq, AT91_AIC5_SSR); in aic5_unmask()
127 irq_reg_writel(bgc, d->hwirq, AT91_AIC5_SSR); in aic5_retrigger()
142 irq_reg_writel(bgc, d->hwirq, AT91_AIC5_SSR); in aic5_set_type()
Dirq-i8259.c358 int hwirq = i8259_irq(); in i8259_irq_dispatch() local
361 if (hwirq < 0) in i8259_irq_dispatch()
364 irq = irq_linear_revmap(domain, hwirq); in i8259_irq_dispatch()
Dspear-shirq.c221 int i, parent_irq, virq_base, hwirq = 0, nr_irqs = 0; in shirq_init() local
250 hwirq); in shirq_init()
254 hwirq += shirq_blocks[i]->nr_irqs; in shirq_init()
Dirq-bcm7120-l2.c73 int hwirq; in bcm7120_l2_intc_irq_handle() local
81 for_each_set_bit(hwirq, &pending, IRQS_PER_WORD) { in bcm7120_l2_intc_irq_handle()
83 base + hwirq)); in bcm7120_l2_intc_irq_handle()
Dirq-gic.c154 return d->hwirq; in gic_irq()
962 unsigned long *hwirq, in gic_irq_domain_translate() argument
970 *hwirq = fwspec->param[1] + 16; in gic_irq_domain_translate()
977 *hwirq += 16; in gic_irq_domain_translate()
987 *hwirq = fwspec->param[0]; in gic_irq_domain_translate()
1018 irq_hw_number_t hwirq; in gic_irq_domain_alloc() local
1022 ret = gic_irq_domain_translate(domain, fwspec, &hwirq, &type); in gic_irq_domain_alloc()
1027 gic_irq_domain_map(domain, virq + i, hwirq + i); in gic_irq_domain_alloc()
Dexynos-combiner.c56 u32 mask = 1 << (data->hwirq % 32); in combiner_mask_irq()
63 u32 mask = 1 << (data->hwirq % 32); in combiner_unmask_irq()
Dirq-atmel-aic.c95 smr = irq_reg_readl(gc, AT91_AIC_SMR(d->hwirq)); in aic_set_type()
100 irq_reg_writel(gc, smr, AT91_AIC_SMR(d->hwirq)); in aic_set_type()
Dirq-imgpdc.c153 unsigned int syswake = hwirq_to_syswake(data->hwirq); in syswake_irq_set_type()
199 irq_hw_number_t hw = data->hwirq; in pdc_irq_set_wake()
Dirq-hip04.c88 return d->hwirq; in hip04_irq()
/linux-4.4.14/arch/powerpc/platforms/pasemi/
Dmsi.c66 irq_hw_number_t hwirq; in pasemi_msi_teardown_msi_irqs() local
74 hwirq = virq_to_hw(entry->irq); in pasemi_msi_teardown_msi_irqs()
77 msi_bitmap_free_hwirqs(&msi_mpic->msi_bitmap, hwirq, ALLOC_CHUNK); in pasemi_msi_teardown_msi_irqs()
88 int hwirq; in pasemi_msi_setup_msi_irqs() local
104 hwirq = msi_bitmap_alloc_hwirqs(&msi_mpic->msi_bitmap, in pasemi_msi_setup_msi_irqs()
106 if (hwirq < 0) { in pasemi_msi_setup_msi_irqs()
108 return hwirq; in pasemi_msi_setup_msi_irqs()
111 virq = irq_create_mapping(msi_mpic->irqhost, hwirq); in pasemi_msi_setup_msi_irqs()
114 hwirq); in pasemi_msi_setup_msi_irqs()
115 msi_bitmap_free_hwirqs(&msi_mpic->msi_bitmap, hwirq, in pasemi_msi_setup_msi_irqs()
[all …]
/linux-4.4.14/arch/microblaze/kernel/
Dintc.c59 unsigned long mask = 1 << d->hwirq; in intc_enable_or_unmask()
61 pr_debug("enable_or_unmask: %ld\n", d->hwirq); in intc_enable_or_unmask()
75 pr_debug("disable: %ld\n", d->hwirq); in intc_disable_or_mask()
76 write_fn(1 << d->hwirq, intc_baseaddr + CIE); in intc_disable_or_mask()
81 pr_debug("ack: %ld\n", d->hwirq); in intc_ack()
82 write_fn(1 << d->hwirq, intc_baseaddr + IAR); in intc_ack()
87 unsigned long mask = 1 << d->hwirq; in intc_mask_ack()
89 pr_debug("disable_and_ack: %ld\n", d->hwirq); in intc_mask_ack()
106 unsigned int hwirq, irq = -1; in get_irq() local
108 hwirq = read_fn(intc_baseaddr + IVR); in get_irq()
[all …]
/linux-4.4.14/arch/powerpc/sysdev/ge/
Dge_pic.c114 unsigned int hwirq = irqd_to_hwirq(d); in gef_pic_mask() local
119 mask &= ~(1 << hwirq); in gef_pic_mask()
135 unsigned int hwirq = irqd_to_hwirq(d); in gef_pic_unmask() local
140 mask |= (1 << hwirq); in gef_pic_unmask()
157 irq_hw_number_t hwirq) in gef_pic_host_map() argument
232 int hwirq; in gef_pic_get_irq() local
241 for (hwirq = GEF_PIC_NUM_IRQS - 1; hwirq > -1; hwirq--) { in gef_pic_get_irq()
242 if (active & (0x1 << hwirq)) in gef_pic_get_irq()
246 (irq_hw_number_t)hwirq); in gef_pic_get_irq()
/linux-4.4.14/arch/arm/mach-lpc32xx/
Dirq.c214 get_controller(d->hwirq, &ctrl, &mask); in lpc32xx_mask_irq()
224 get_controller(d->hwirq, &ctrl, &mask); in lpc32xx_unmask_irq()
234 get_controller(d->hwirq, &ctrl, &mask); in lpc32xx_ack_irq()
239 if (lpc32xx_events[d->hwirq].mask != 0) in lpc32xx_ack_irq()
240 __raw_writel(lpc32xx_events[d->hwirq].mask, in lpc32xx_ack_irq()
241 lpc32xx_events[d->hwirq].event_group->rawstat_reg); in lpc32xx_ack_irq()
285 __lpc32xx_set_irq_type(d->hwirq, 1, 1); in lpc32xx_set_irq_type()
291 __lpc32xx_set_irq_type(d->hwirq, 0, 1); in lpc32xx_set_irq_type()
297 __lpc32xx_set_irq_type(d->hwirq, 0, 0); in lpc32xx_set_irq_type()
303 __lpc32xx_set_irq_type(d->hwirq, 1, 0); in lpc32xx_set_irq_type()
[all …]
/linux-4.4.14/drivers/pci/host/
Dpci-xgene-msi.c135 static u32 hwirq_to_reg_set(unsigned long hwirq) in hwirq_to_reg_set() argument
137 return (hwirq / (NR_HW_IRQS * IRQS_PER_IDX)); in hwirq_to_reg_set()
140 static u32 hwirq_to_group(unsigned long hwirq) in hwirq_to_group() argument
142 return (hwirq % NR_HW_IRQS); in hwirq_to_group()
145 static u32 hwirq_to_msi_data(unsigned long hwirq) in hwirq_to_msi_data() argument
147 return ((hwirq / NR_HW_IRQS) % IRQS_PER_IDX); in hwirq_to_msi_data()
153 u32 reg_set = hwirq_to_reg_set(data->hwirq); in xgene_compose_msi_msg()
154 u32 group = hwirq_to_group(data->hwirq); in xgene_compose_msi_msg()
159 msg->data = hwirq_to_msi_data(data->hwirq); in xgene_compose_msi_msg()
171 static int hwirq_to_cpu(unsigned long hwirq) in hwirq_to_cpu() argument
[all …]
Dpcie-altera-msi.c102 phys_addr_t addr = msi->vector_phy + (data->hwirq * sizeof(u32)); in altera_compose_msi_msg()
106 msg->data = data->hwirq; in altera_compose_msi_msg()
109 (int)data->hwirq, msg->address_hi, msg->address_lo); in altera_compose_msi_msg()
164 if (!test_bit(d->hwirq, msi->used)) { in altera_irq_domain_free()
166 d->hwirq); in altera_irq_domain_free()
168 __clear_bit(d->hwirq, msi->used); in altera_irq_domain_free()
170 mask &= ~(1 << d->hwirq); in altera_irq_domain_free()
Dpcie-xilinx.c286 int hwirq; in xilinx_pcie_msi_setup_irq() local
290 hwirq = xilinx_pcie_assign_msi(port); in xilinx_pcie_msi_setup_irq()
291 if (hwirq < 0) in xilinx_pcie_msi_setup_irq()
292 return hwirq; in xilinx_pcie_msi_setup_irq()
294 irq = irq_create_mapping(port->irq_domain, hwirq); in xilinx_pcie_msi_setup_irq()
335 irq_hw_number_t hwirq) in xilinx_pcie_msi_map() argument
373 irq_hw_number_t hwirq) in xilinx_pcie_intx_map() argument
Dpcie-rcar.c649 int hwirq; in rcar_msi_setup_irq() local
651 hwirq = rcar_msi_alloc(msi); in rcar_msi_setup_irq()
652 if (hwirq < 0) in rcar_msi_setup_irq()
653 return hwirq; in rcar_msi_setup_irq()
655 irq = irq_create_mapping(msi->domain, hwirq); in rcar_msi_setup_irq()
657 rcar_msi_free(msi, hwirq); in rcar_msi_setup_irq()
665 msg.data = hwirq; in rcar_msi_setup_irq()
677 rcar_msi_free(msi, d->hwirq); in rcar_msi_teardown_irq()
689 irq_hw_number_t hwirq) in rcar_msi_map() argument
Dpci-tegra.c1203 int hwirq; in tegra_msi_setup_irq() local
1205 hwirq = tegra_msi_alloc(msi); in tegra_msi_setup_irq()
1206 if (hwirq < 0) in tegra_msi_setup_irq()
1207 return hwirq; in tegra_msi_setup_irq()
1209 irq = irq_create_mapping(msi->domain, hwirq); in tegra_msi_setup_irq()
1211 tegra_msi_free(msi, hwirq); in tegra_msi_setup_irq()
1220 msg.data = hwirq; in tegra_msi_setup_irq()
1232 irq_hw_number_t hwirq = irqd_to_hwirq(d); in tegra_msi_teardown_irq() local
1235 tegra_msi_free(msi, hwirq); in tegra_msi_teardown_irq()
1247 irq_hw_number_t hwirq) in tegra_msi_map() argument
Dpcie-designware.c374 clear_irq_range(pp, irq, 1, data->hwirq); in dw_msi_teardown_irq()
392 irq_hw_number_t hwirq) in dw_pcie_msi_map() argument
/linux-4.4.14/drivers/vfio/platform/
Dvfio_platform_irq.c33 disable_irq_nosync(irq_ctx->hwirq); in vfio_platform_mask()
93 enable_irq(irq_ctx->hwirq); in vfio_platform_unmask()
159 disable_irq_nosync(irq_ctx->hwirq); in vfio_automasked_irq_handler()
188 irq_clear_status_flags(irq->hwirq, IRQ_NOAUTOEN); in vfio_set_trigger()
189 free_irq(irq->hwirq, irq); in vfio_set_trigger()
199 irq->hwirq, vdev->name); in vfio_set_trigger()
211 irq_set_status_flags(irq->hwirq, IRQ_NOAUTOEN); in vfio_set_trigger()
212 ret = request_irq(irq->hwirq, handler, 0, irq->name, irq); in vfio_set_trigger()
221 enable_irq(irq->hwirq); in vfio_set_trigger()
252 handler(irq->hwirq, irq); in vfio_platform_set_irq_trigger()
[all …]
Dvfio_platform_private.h33 int hwirq; member
/linux-4.4.14/drivers/misc/cxl/
Dirq.c224 irq_hw_number_t hwirq = irqd_to_hwirq(irq_get_irq_data(irq)); in cxl_irq_afu() local
230 irq_off = hwirq - ctx->irqs.offset[r]; in cxl_irq_afu()
240 ctx->pe, irq, hwirq); in cxl_irq_afu()
244 trace_cxl_afu_irq(ctx, afu_irq, irq, hwirq); in cxl_irq_afu()
246 afu_irq, ctx->pe, irq, hwirq); in cxl_irq_afu()
262 unsigned int cxl_map_irq(struct cxl *adapter, irq_hw_number_t hwirq, in cxl_map_irq() argument
269 virq = irq_create_mapping(NULL, hwirq); in cxl_map_irq()
275 cxl_setup_irq(adapter, hwirq, virq); in cxl_map_irq()
277 pr_devel("hwirq %#lx mapped to virq %u\n", hwirq, virq); in cxl_map_irq()
300 int hwirq, virq; in cxl_register_one_irq() local
[all …]
Dapi.c133 irq_hw_number_t hwirq; in cxl_map_afu_irq() local
138 hwirq = cxl_find_afu_irq(ctx, num); in cxl_map_afu_irq()
139 if (!hwirq) in cxl_map_afu_irq()
142 return cxl_map_irq(ctx->afu->adapter, hwirq, handler, cookie, name); in cxl_map_afu_irq()
148 irq_hw_number_t hwirq; in cxl_unmap_afu_irq() local
151 hwirq = cxl_find_afu_irq(ctx, num); in cxl_unmap_afu_irq()
152 if (!hwirq) in cxl_unmap_afu_irq()
155 virq = irq_find_mapping(NULL, hwirq); in cxl_unmap_afu_irq()
Dtrace.h125 TP_PROTO(struct cxl_context *ctx, int afu_irq, int virq, irq_hw_number_t hwirq),
127 TP_ARGS(ctx, afu_irq, virq, hwirq),
135 __field(irq_hw_number_t, hwirq)
144 __entry->hwirq = hwirq;
153 __entry->hwirq
Dcxl.h508 void cxl_release_one_irq(struct cxl *adapter, int hwirq);
511 int cxl_setup_irq(struct cxl *adapter, unsigned int hwirq, unsigned int virq);
703 unsigned int cxl_map_irq(struct cxl *adapter, irq_hw_number_t hwirq,
Dpci.c435 int cxl_setup_irq(struct cxl *adapter, unsigned int hwirq, in cxl_setup_irq() argument
440 return pnv_cxl_ioda_msi_setup(dev, hwirq, virq); in cxl_setup_irq()
485 void cxl_release_one_irq(struct cxl *adapter, int hwirq) in cxl_release_one_irq() argument
489 return pnv_cxl_release_hwirqs(dev, hwirq, 1); in cxl_release_one_irq()
/linux-4.4.14/arch/arm/mach-imx/
Dgpc.c104 unsigned int idx = d->hwirq / 32; in imx_gpc_irq_set_wake()
107 mask = 1 << d->hwirq % 32; in imx_gpc_irq_set_wake()
139 void imx_gpc_hwirq_unmask(unsigned int hwirq) in imx_gpc_hwirq_unmask() argument
144 reg = gpc_base + GPC_IMR1 + hwirq / 32 * 4; in imx_gpc_hwirq_unmask()
146 val &= ~(1 << hwirq % 32); in imx_gpc_hwirq_unmask()
150 void imx_gpc_hwirq_mask(unsigned int hwirq) in imx_gpc_hwirq_mask() argument
155 reg = gpc_base + GPC_IMR1 + hwirq / 32 * 4; in imx_gpc_hwirq_mask()
157 val |= 1 << (hwirq % 32); in imx_gpc_hwirq_mask()
163 imx_gpc_hwirq_unmask(d->hwirq); in imx_gpc_irq_unmask()
169 imx_gpc_hwirq_mask(d->hwirq); in imx_gpc_irq_mask()
[all …]
Davic.c63 irq = d->hwirq; in avic_set_irq_fiq()
95 int idx = d->hwirq >> 5; in avic_irq_suspend()
105 int idx = d->hwirq >> 5; in avic_irq_resume()
D3ds_debugboard.c118 u32 expio = d->hwirq; in expio_mask_irq()
127 u32 expio = d->hwirq; in expio_ack_irq()
137 u32 expio = d->hwirq; in expio_unmask_irq()
Dcommon.h104 void imx_gpc_hwirq_mask(unsigned int hwirq);
105 void imx_gpc_hwirq_unmask(unsigned int hwirq);
Dtzic.c83 int idx = d->hwirq >> 5; in tzic_irq_suspend()
90 int idx = d->hwirq >> 5; in tzic_irq_resume()
Dmach-mx31ads.c181 u32 expio = d->hwirq; in expio_mask_irq()
193 u32 expio = d->hwirq; in expio_ack_irq()
204 u32 expio = d->hwirq; in expio_unmask_irq()
/linux-4.4.14/arch/arc/kernel/
Dmcip.c198 __mcip_cmd_data(CMD_IDU_SET_MASK, data->hwirq, 1); in idu_irq_mask()
207 __mcip_cmd_data(CMD_IDU_SET_MASK, data->hwirq, 0); in idu_irq_unmask()
225 idu_set_dest(data->hwirq, cpumask_bits(&online)[0]); in idu_irq_set_affinity()
226 idu_set_mode(data->hwirq, IDU_M_TRIG_LEVEL, IDU_M_DISTRI_RR); in idu_irq_set_affinity()
256 static int idu_irq_map(struct irq_domain *d, unsigned int virq, irq_hw_number_t hwirq) in idu_irq_map() argument
268 irq_hw_number_t hwirq = *out_hwirq = intspec[0]; in idu_irq_xlate() local
278 idu_set_dest(hwirq, BIT(num_online_cpus()) - 1); in idu_irq_xlate()
279 idu_set_mode(hwirq, IDU_M_TRIG_LEVEL, IDU_M_DISTRI_RR); in idu_irq_xlate()
290 hwirq, cpu); in idu_irq_xlate()
293 idu_set_dest(hwirq, cpu); in idu_irq_xlate()
[all …]
/linux-4.4.14/arch/powerpc/platforms/powernv/
Dopal-irqchip.c53 int virq, hwirq = 0; in opal_handle_events() local
63 hwirq = fls64(events) - 1; in opal_handle_events()
64 if (BIT_ULL(hwirq) & mask) { in opal_handle_events()
66 hwirq); in opal_handle_events()
70 events &= ~BIT_ULL(hwirq); in opal_handle_events()
76 clear_bit(d->hwirq, &opal_event_irqchip.mask); in opal_event_mask()
83 set_bit(d->hwirq, &opal_event_irqchip.mask); in opal_event_unmask()
125 irq_hw_number_t hwirq) in opal_event_map() argument
Dpci.c54 int hwirq; in pnv_setup_msi_irqs() local
70 hwirq = msi_bitmap_alloc_hwirqs(&phb->msi_bmp, 1); in pnv_setup_msi_irqs()
71 if (hwirq < 0) { in pnv_setup_msi_irqs()
76 virq = irq_create_mapping(NULL, phb->msi_base + hwirq); in pnv_setup_msi_irqs()
80 msi_bitmap_free_hwirqs(&phb->msi_bmp, hwirq, 1); in pnv_setup_msi_irqs()
83 rc = phb->msi_setup(phb, pdev, phb->msi_base + hwirq, in pnv_setup_msi_irqs()
88 msi_bitmap_free_hwirqs(&phb->msi_bmp, hwirq, 1); in pnv_setup_msi_irqs()
102 irq_hw_number_t hwirq; in pnv_teardown_msi_irqs() local
110 hwirq = virq_to_hw(entry->irq); in pnv_teardown_msi_irqs()
113 msi_bitmap_free_hwirqs(&phb->msi_bmp, hwirq - phb->msi_base, 1); in pnv_teardown_msi_irqs()
Dpci-ioda.c2526 int hwirq = msi_bitmap_alloc_hwirqs(&phb->msi_bmp, num); in pnv_cxl_alloc_hwirqs() local
2528 if (hwirq < 0) { in pnv_cxl_alloc_hwirqs()
2533 return phb->msi_base + hwirq; in pnv_cxl_alloc_hwirqs()
2537 void pnv_cxl_release_hwirqs(struct pci_dev *dev, int hwirq, int num) in pnv_cxl_release_hwirqs() argument
2542 msi_bitmap_free_hwirqs(&phb->msi_bmp, hwirq - phb->msi_base, num); in pnv_cxl_release_hwirqs()
2551 int i, hwirq; in pnv_cxl_release_hwirq_ranges() local
2559 hwirq = irqs->offset[i] - phb->msi_base; in pnv_cxl_release_hwirq_ranges()
2560 msi_bitmap_free_hwirqs(&phb->msi_bmp, hwirq, in pnv_cxl_release_hwirq_ranges()
2571 int i, hwirq, try; in pnv_cxl_alloc_hwirq_ranges() local
2579 hwirq = msi_bitmap_alloc_hwirqs(&phb->msi_bmp, try); in pnv_cxl_alloc_hwirq_ranges()
[all …]
Dpci-p5ioc2.c45 unsigned int hwirq, unsigned int virq, in pnv_pci_p5ioc2_msi_setup() argument
50 msg->data = hwirq - phb->msi_base; in pnv_pci_p5ioc2_msi_setup()
Dpci.h105 unsigned int hwirq, unsigned int virq,
/linux-4.4.14/include/linux/
Dirqdomain.h279 irq_hw_number_t hwirq);
287 irq_hw_number_t hwirq);
302 irq_hw_number_t hwirq) in irq_linear_revmap() argument
304 return hwirq < domain->revmap_size ? domain->linear_revmap[hwirq] : 0; in irq_linear_revmap()
307 irq_hw_number_t hwirq);
314 irq_hw_number_t hwirq) in irq_create_identity_mapping() argument
316 return irq_create_strict_mappings(host, hwirq, hwirq, 1); in irq_create_identity_mapping()
336 irq_hw_number_t hwirq, struct irq_chip *chip,
372 irq_hw_number_t hwirq,
Dirqdesc.h152 int __handle_domain_irq(struct irq_domain *domain, unsigned int hwirq,
156 unsigned int hwirq, struct pt_regs *regs) in handle_domain_irq() argument
158 return __handle_domain_irq(domain, hwirq, true, regs); in handle_domain_irq()
Dirq.h166 unsigned long hwirq; member
304 return d->hwirq; in irqd_to_hwirq()
Dmsi.h205 unsigned int virq, irq_hw_number_t hwirq,
/linux-4.4.14/drivers/gpio/
Dgpio-ts5500.c41 u8 hwirq; member
282 return priv->hwirq; in ts5500_gpio_to_irq()
293 if (priv->hwirq == 7) in ts5500_enable_irq()
295 else if (priv->hwirq == 6) in ts5500_enable_irq()
297 else if (priv->hwirq == 1) in ts5500_enable_irq()
311 if (priv->hwirq == 7) in ts5500_disable_irq()
313 else if (priv->hwirq == 6) in ts5500_disable_irq()
315 else if (priv->hwirq == 1) in ts5500_disable_irq()
318 dev_err(priv->gpio_chip.dev, "invalid hwirq %d\n", priv->hwirq); in ts5500_disable_irq()
344 priv->hwirq = res->start; in ts5500_dio_probe()
[all …]
Dgpio-sa1100.c81 mask = BIT(d->hwirq); in sa1100_gpio_type()
109 GEDR = BIT(d->hwirq); in sa1100_gpio_ack()
114 unsigned int mask = BIT(d->hwirq); in sa1100_gpio_mask()
124 unsigned int mask = BIT(d->hwirq); in sa1100_gpio_unmask()
135 PWER |= BIT(d->hwirq); in sa1100_gpio_wake()
137 PWER &= ~BIT(d->hwirq); in sa1100_gpio_wake()
154 unsigned int irq, irq_hw_number_t hwirq) in sa1100_gpio_irqdomain_map() argument
Dgpio-rcar.c103 unsigned int hwirq, in gpio_rcar_config_interrupt_input_mode() argument
118 gpio_rcar_modify_bit(p, POSNEG, hwirq, !active_high_rising_edge); in gpio_rcar_config_interrupt_input_mode()
121 gpio_rcar_modify_bit(p, EDGLEVEL, hwirq, !level_trigger); in gpio_rcar_config_interrupt_input_mode()
125 gpio_rcar_modify_bit(p, BOTHEDGE, hwirq, both); in gpio_rcar_config_interrupt_input_mode()
128 gpio_rcar_modify_bit(p, IOINTSEL, hwirq, true); in gpio_rcar_config_interrupt_input_mode()
132 gpio_rcar_write(p, INTCLR, BIT(hwirq)); in gpio_rcar_config_interrupt_input_mode()
142 unsigned int hwirq = irqd_to_hwirq(d); in gpio_rcar_irq_set_type() local
144 dev_dbg(&p->pdev->dev, "sense irq = %d, type = %d\n", hwirq, type); in gpio_rcar_irq_set_type()
148 gpio_rcar_config_interrupt_input_mode(p, hwirq, true, true, in gpio_rcar_irq_set_type()
152 gpio_rcar_config_interrupt_input_mode(p, hwirq, false, true, in gpio_rcar_irq_set_type()
[all …]
Dgpio-dwapb.c136 int hwirq = fls(irq_status) - 1; in dwapb_do_irq() local
137 int gpio_irq = irq_find_mapping(gpio->domain, hwirq); in dwapb_do_irq()
140 irq_status &= ~BIT(hwirq); in dwapb_do_irq()
144 dwapb_toggle_trigger(gpio, hwirq); in dwapb_do_irq()
171 val |= BIT(d->hwirq); in dwapb_irq_enable()
186 val &= ~BIT(d->hwirq); in dwapb_irq_disable()
219 int bit = d->hwirq; in dwapb_irq_set_type()
301 unsigned int hwirq, ngpio = gc->ngpio; in dwapb_configure_irqs() local
369 for (hwirq = 0 ; hwirq < ngpio ; hwirq++) in dwapb_configure_irqs()
370 irq_create_mapping(gpio->domain, hwirq); in dwapb_configure_irqs()
[all …]
Dgpio-xlp.c140 xlp_gpio_set_reg(priv->gpio_intr_en, d->hwirq, 0x0); in xlp_gpio_irq_disable()
141 __clear_bit(d->hwirq, priv->gpio_enabled_mask); in xlp_gpio_irq_disable()
152 xlp_gpio_set_reg(priv->gpio_intr_en, d->hwirq, 0x0); in xlp_gpio_irq_mask_ack()
153 xlp_gpio_set_reg(priv->gpio_intr_stat, d->hwirq, 0x1); in xlp_gpio_irq_mask_ack()
154 __clear_bit(d->hwirq, priv->gpio_enabled_mask); in xlp_gpio_irq_mask_ack()
165 xlp_gpio_set_reg(priv->gpio_intr_en, d->hwirq, 0x1); in xlp_gpio_irq_unmask()
166 __set_bit(d->hwirq, priv->gpio_enabled_mask); in xlp_gpio_irq_unmask()
197 xlp_gpio_set_reg(priv->gpio_intr_type, d->hwirq, irq_type); in xlp_gpio_set_irq_type()
198 xlp_gpio_set_reg(priv->gpio_intr_pol, d->hwirq, pol); in xlp_gpio_set_irq_type()
Dgpio-lynxpoint.c153 u32 hwirq = irqd_to_hwirq(d); in lp_irq_type() local
156 unsigned long reg = lp_gpio_reg(&lg->chip, hwirq, LP_CONFIG1); in lp_irq_type()
158 if (hwirq >= lg->chip.ngpio) in lp_irq_type()
277 u32 hwirq = irqd_to_hwirq(d); in lp_irq_enable() local
278 unsigned long reg = lp_gpio_reg(&lg->chip, hwirq, LP_INT_ENABLE); in lp_irq_enable()
282 outl(inl(reg) | BIT(hwirq % 32), reg); in lp_irq_enable()
290 u32 hwirq = irqd_to_hwirq(d); in lp_irq_disable() local
291 unsigned long reg = lp_gpio_reg(&lg->chip, hwirq, LP_INT_ENABLE); in lp_irq_disable()
295 outl(inl(reg) & ~BIT(hwirq % 32), reg); in lp_irq_disable()
Dgpio-etraxfs.c231 unsigned int grpirq = etraxfs_gpio_to_group_irq(d->hwirq); in etraxfs_gpio_irq_ack()
241 unsigned int grpirq = etraxfs_gpio_to_group_irq(d->hwirq); in etraxfs_gpio_irq_mask()
254 unsigned int grpirq = etraxfs_gpio_to_group_irq(d->hwirq); in etraxfs_gpio_irq_unmask()
267 unsigned int grpirq = etraxfs_gpio_to_group_irq(d->hwirq); in etraxfs_gpio_irq_set_type()
304 unsigned int grpirq = etraxfs_gpio_to_group_irq(d->hwirq); in etraxfs_gpio_irq_request_resources()
311 ret = gpiochip_lock_as_irq(&chip->bgc.gc, d->hwirq); in etraxfs_gpio_irq_request_resources()
317 unsigned int pin = etraxfs_gpio_to_group_pin(chip, d->hwirq); in etraxfs_gpio_irq_request_resources()
335 unsigned int grpirq = etraxfs_gpio_to_group_irq(d->hwirq); in etraxfs_gpio_irq_release_resources()
339 gpiochip_unlock_as_irq(&chip->bgc.gc, d->hwirq); in etraxfs_gpio_irq_release_resources()
Dgpio-vf610.c141 int gpio = d->hwirq; in vf610_gpio_irq_ack()
172 port->irqc[d->hwirq] = irqc; in vf610_gpio_irq_set_type()
186 void __iomem *pcr_base = port->base + PORT_PCR(d->hwirq); in vf610_gpio_irq_mask()
195 void __iomem *pcr_base = port->base + PORT_PCR(d->hwirq); in vf610_gpio_irq_unmask()
197 vf610_gpio_writel(port->irqc[d->hwirq] << PORT_PCR_IRQC_OFFSET, in vf610_gpio_irq_unmask()
Dgpio-bcm-kona.c332 unsigned gpio = d->hwirq; in bcm_kona_gpio_irq_ack()
353 unsigned gpio = d->hwirq; in bcm_kona_gpio_irq_mask()
374 unsigned gpio = d->hwirq; in bcm_kona_gpio_irq_unmask()
395 unsigned gpio = d->hwirq; in bcm_kona_gpio_irq_set_type()
457 int hwirq = GPIO_PER_BANK * bank_id + bit; in bcm_kona_gpio_irq_handler() local
460 hwirq); in bcm_kona_gpio_irq_handler()
479 if (gpiochip_lock_as_irq(&kona_gpio->gpio_chip, d->hwirq)) { in bcm_kona_gpio_irq_reqres()
482 d->hwirq); in bcm_kona_gpio_irq_reqres()
492 gpiochip_unlock_as_irq(&kona_gpio->gpio_chip, d->hwirq); in bcm_kona_gpio_irq_relres()
519 irq_hw_number_t hwirq) in bcm_kona_gpio_irq_map() argument
Dgpio-tegra.c182 int gpio = d->hwirq; in tegra_gpio_irq_ack()
189 int gpio = d->hwirq; in tegra_gpio_irq_mask()
196 int gpio = d->hwirq; in tegra_gpio_irq_unmask()
203 int gpio = d->hwirq; in tegra_gpio_irq_set_type()
264 int gpio = d->hwirq; in tegra_gpio_irq_shutdown()
362 int gpio = d->hwirq; in tegra_gpio_irq_set_wake()
Dgpio-grgpio.c134 u32 mask = BIT(d->hwirq); in grgpio_irq_set_type()
177 int offset = d->hwirq; in grgpio_irq_mask()
190 int offset = d->hwirq; in grgpio_irq_unmask()
244 irq_hw_number_t hwirq) in grgpio_irq_map() argument
250 int offset = hwirq; in grgpio_irq_map()
Dgpio-adnp.c344 unsigned int reg = d->hwirq >> adnp->reg_shift; in adnp_irq_mask()
345 unsigned int pos = d->hwirq & 7; in adnp_irq_mask()
354 unsigned int reg = d->hwirq >> adnp->reg_shift; in adnp_irq_unmask()
355 unsigned int pos = d->hwirq & 7; in adnp_irq_unmask()
364 unsigned int reg = d->hwirq >> adnp->reg_shift; in adnp_irq_set_type()
365 unsigned int pos = d->hwirq & 7; in adnp_irq_set_type()
Dgpio-sodaville.c56 if (d->hwirq < 8) in sdv_gpio_pub_set_type()
65 reg &= ~BIT(4 * (d->hwirq % 8)); in sdv_gpio_pub_set_type()
69 reg |= BIT(4 * (d->hwirq % 8)); in sdv_gpio_pub_set_type()
Dgpio-tc3589x.c106 int offset = d->hwirq; in tc3589x_gpio_irq_set_type()
171 int offset = d->hwirq; in tc3589x_gpio_irq_mask()
182 int offset = d->hwirq; in tc3589x_gpio_irq_unmask()
Dgpio-pca953x.c381 chip->irq_mask[d->hwirq / BANK_SZ] &= ~(1 << (d->hwirq % BANK_SZ)); in pca953x_irq_mask()
389 chip->irq_mask[d->hwirq / BANK_SZ] |= 1 << (d->hwirq % BANK_SZ); in pca953x_irq_unmask()
427 int bank_nb = d->hwirq / BANK_SZ; in pca953x_irq_set_type()
428 u8 mask = 1 << (d->hwirq % BANK_SZ); in pca953x_irq_set_type()
Dgpio-mcp23s08.c388 unsigned int pos = data->hwirq; in mcp23s08_irq_mask()
396 unsigned int pos = data->hwirq; in mcp23s08_irq_unmask()
404 unsigned int pos = data->hwirq; in mcp23s08_irq_set_type()
448 if (gpiochip_lock_as_irq(&mcp->chip, data->hwirq)) { in mcp23s08_irq_reqres()
451 data->hwirq); in mcp23s08_irq_reqres()
462 gpiochip_unlock_as_irq(&mcp->chip, data->hwirq); in mcp23s08_irq_relres()
Dgpio-zynq.c313 device_pin_num = irq_data->hwirq; in zynq_gpio_irq_mask()
334 device_pin_num = irq_data->hwirq; in zynq_gpio_irq_unmask()
354 device_pin_num = irq_data->hwirq; in zynq_gpio_irq_ack()
405 device_pin_num = irq_data->hwirq; in zynq_gpio_set_irq_type()
Dgpio-vr41xx.c141 if (gpiochip_lock_as_irq(&vr41xx_gpio_chip, data->hwirq)) in startup_giuint()
144 data->hwirq); in startup_giuint()
153 gpiochip_unlock_as_irq(&vr41xx_gpio_chip, data->hwirq); in shutdown_giuint()
Dgpio-stmpe.c127 int offset = d->hwirq; in stmpe_gpio_irq_set_type()
197 int offset = d->hwirq; in stmpe_gpio_irq_mask()
208 int offset = d->hwirq; in stmpe_gpio_irq_unmask()
Dgpio-tz1090.c351 tz1090_gpio_irq_type(bank, data->hwirq, type); in gpio_set_irq_type()
355 tz1090_gpio_irq_next_edge(bank, data->hwirq); in gpio_set_irq_type()
357 tz1090_gpio_irq_polarity(bank, data->hwirq, polarity); in gpio_set_irq_type()
Dgpio-mxs.c87 u32 pin_mask = 1 << d->hwirq; in mxs_gpio_set_irq_type()
96 val = gpio_get_value(port->bgc.gc.base + d->hwirq); in mxs_gpio_set_irq_type()
Dgpio-brcmstb.c100 brcmstb_gpio_set_imask(bank, d->hwirq, false); in brcmstb_gpio_irq_mask()
108 brcmstb_gpio_set_imask(bank, d->hwirq, true); in brcmstb_gpio_irq_unmask()
116 u32 mask = BIT(d->hwirq); in brcmstb_gpio_irq_set_type()
Dgpio-em.c256 irq_hw_number_t hwirq) in em_gio_irq_domain_map() argument
260 pr_debug("gio: map hw irq = %d, irq = %d\n", (int)hwirq, irq); in em_gio_irq_domain_map()
Dgpio-pcf857x.c233 gpio->irq_enabled |= (1 << data->hwirq); in pcf857x_irq_enable()
240 gpio->irq_enabled &= ~(1 << data->hwirq); in pcf857x_irq_disable()
Dgpio-max732x.c361 chip->irq_mask_cur &= ~(1 << d->hwirq); in max732x_irq_mask()
369 chip->irq_mask_cur |= 1 << d->hwirq; in max732x_irq_unmask()
404 uint16_t off = d->hwirq; in max732x_irq_set_type()
Dgpio-sx150x.c359 unsigned n = d->hwirq; in sx150x_irq_mask()
368 unsigned n = d->hwirq; in sx150x_irq_unmask()
382 n = d->hwirq; in sx150x_irq_set_type()
Dgpio-omap.c491 unsigned offset = d->hwirq; in omap_gpio_irq_type()
652 unsigned offset = d->hwirq; in omap_gpio_wake_enable()
787 unsigned offset = d->hwirq; in omap_gpio_irq_startup()
811 unsigned offset = d->hwirq; in omap_gpio_irq_shutdown()
847 unsigned offset = d->hwirq; in omap_gpio_ack_irq()
855 unsigned offset = d->hwirq; in omap_gpio_mask_irq()
867 unsigned offset = d->hwirq; in omap_gpio_unmask_irq()
Dgpio-mxc.c174 u32 gpio_idx = d->hwirq; in gpio_set_irq_type()
325 u32 gpio_idx = d->hwirq; in gpio_set_wake_irq()
Dgpio-crystalcove.c224 int gpio = data->hwirq; in crystalcove_bus_sync_unlock()
Dgpiolib.c542 irq_hw_number_t hwirq) in gpiochip_irq_map() argument
592 if (gpiochip_lock_as_irq(chip, d->hwirq)) { in gpiochip_irq_reqres()
595 d->hwirq); in gpiochip_irq_reqres()
606 gpiochip_unlock_as_irq(chip, d->hwirq); in gpiochip_irq_relres()
/linux-4.4.14/arch/nios2/kernel/
Dirq.c31 asmlinkage void do_IRQ(int hwirq, struct pt_regs *regs) in do_IRQ() argument
37 irq = irq_find_mapping(NULL, hwirq); in do_IRQ()
46 ienable |= (1 << d->hwirq); in chip_unmask()
52 ienable &= ~(1 << d->hwirq); in chip_mask()
/linux-4.4.14/drivers/gpu/drm/msm/mdp/mdp5/
Dmdp5_irq.c108 irq_hw_number_t hwirq = fls(intr) - 1; in mdp5_irq() local
110 mdp5_kms->irqcontroller.domain, hwirq)); in mdp5_irq()
111 intr &= ~(1 << hwirq); in mdp5_irq()
153 clear_bit(irqd->hwirq, &mdp5_kms->irqcontroller.enabled_mask); in mdp5_hw_mask_irq()
161 set_bit(irqd->hwirq, &mdp5_kms->irqcontroller.enabled_mask); in mdp5_hw_unmask_irq()
172 unsigned int irq, irq_hw_number_t hwirq) in mdp5_hw_irqdomain_map() argument
176 if (!(VALID_IRQS & (1 << hwirq))) in mdp5_hw_irqdomain_map()
/linux-4.4.14/Documentation/
DIRQ-domain.txt27 the controller-local IRQ (hwirq) number into the Linux IRQ number
30 The irq_domain library adds mapping between hwirq and IRQ numbers on
36 structure to hwirq numbers (Device Tree and ACPI GSI so far), and can
47 between hwirq and IRQ numbers. Mappings are added to the irq_domain
49 hwirq number as arguments. If a mapping for the hwirq doesn't already
51 the hwirq, and call the .map() callback so the driver can perform any
55 be used to find the Linux IRQ number from the hwirq number.
62 needs to know the associated hwirq number (such as in the irq_chip
63 callbacks) then it can be directly obtained from irq_data->hwirq.
66 There are several mechanisms available for reverse mapping from hwirq
[all …]
/linux-4.4.14/drivers/pinctrl/samsung/
Dpinctrl-s3c24xx.c172 int index = bank->eint_offset + data->hwirq; in s3c24xx_eint_type()
195 s3c24xx_eint_set_function(d, bank, data->hwirq); in s3c24xx_eint_type()
207 int parent_irq = eint_data->parents[data->hwirq]; in s3c2410_eint0_3_ack()
218 int parent_irq = eint_data->parents[data->hwirq]; in s3c2410_eint0_3_mask()
229 int parent_irq = eint_data->parents[data->hwirq]; in s3c2410_eint0_3_unmask()
250 virq = irq_linear_revmap(eint_data->domains[data->hwirq], data->hwirq); in s3c2410_demux_eint0_3()
264 unsigned long bitval = 1UL << data->hwirq; in s3c2412_eint0_3_ack()
275 mask |= (1UL << data->hwirq); in s3c2412_eint0_3_mask()
286 mask &= ~(1UL << data->hwirq); in s3c2412_eint0_3_unmask()
308 virq = irq_linear_revmap(eint_data->domains[data->hwirq], data->hwirq); in s3c2412_demux_eint0_3()
[all …]
Dpinctrl-s3c64xx.c312 unsigned char index = EINT_OFFS(bank->eint_offset) + irqd->hwirq; in s3c64xx_gpio_irq_set_mask()
338 unsigned char index = EINT_OFFS(bank->eint_offset) + irqd->hwirq; in s3c64xx_gpio_irq_ack()
363 shift = EINT_OFFS(bank->eint_offset) + irqd->hwirq; in s3c64xx_gpio_irq_set_type()
371 s3c64xx_irq_set_function(d, bank, irqd->hwirq); in s3c64xx_gpio_irq_set_type()
526 val |= 1 << ddata->eints[irqd->hwirq]; in s3c64xx_eint0_irq_set_mask()
528 val &= ~(1 << ddata->eints[irqd->hwirq]); in s3c64xx_eint0_irq_set_mask()
548 writel(1 << ddata->eints[irqd->hwirq], in s3c64xx_eint0_irq_ack()
573 shift = ddata->eints[irqd->hwirq]; in s3c64xx_eint0_irq_set_type()
585 s3c64xx_irq_set_function(d, bank, irqd->hwirq); in s3c64xx_eint0_irq_set_type()
Dpinctrl-exynos.c72 mask |= 1 << irqd->hwirq; in exynos_irq_mask()
86 writel(1 << irqd->hwirq, d->virt_base + reg_pend); in exynos_irq_ack()
113 mask &= ~(1 << irqd->hwirq); in exynos_irq_unmask()
125 unsigned int shift = EXYNOS_EINT_CON_LEN * irqd->hwirq; in exynos_irq_set_type()
170 unsigned int shift = EXYNOS_EINT_CON_LEN * irqd->hwirq; in exynos_irq_request_resources()
177 ret = gpiochip_lock_as_irq(&bank->gpio_chip, irqd->hwirq); in exynos_irq_request_resources()
180 bank->name, irqd->hwirq); in exynos_irq_request_resources()
185 shift = irqd->hwirq * bank_type->fld_width[PINCFG_TYPE_FUNC]; in exynos_irq_request_resources()
209 unsigned int shift = EXYNOS_EINT_CON_LEN * irqd->hwirq; in exynos_irq_release_resources()
216 shift = irqd->hwirq * bank_type->fld_width[PINCFG_TYPE_FUNC]; in exynos_irq_release_resources()
[all …]
Dpinctrl-exynos5440.c854 gpio_int |= 1 << irqd->hwirq; in exynos5440_gpio_irq_unmask()
865 gpio_int &= ~(1 << irqd->hwirq); in exynos5440_gpio_irq_mask()
/linux-4.4.14/arch/arm/mach-omap2/
Domap-wakeupgen.c127 _wakeupgen_clear(d->hwirq, irq_target_cpu[d->hwirq]); in wakeupgen_mask()
140 _wakeupgen_set(d->hwirq, irq_target_cpu[d->hwirq]); in wakeupgen_unmask()
405 unsigned long *hwirq, in wakeupgen_domain_translate() argument
416 *hwirq = fwspec->param[1]; in wakeupgen_domain_translate()
430 irq_hw_number_t hwirq; in wakeupgen_domain_alloc() local
438 hwirq = fwspec->param[1]; in wakeupgen_domain_alloc()
439 if (hwirq >= MAX_IRQS) in wakeupgen_domain_alloc()
443 irq_domain_set_hwirq_and_chip(domain, virq + i, hwirq + i, in wakeupgen_domain_alloc()
Domap4-common.c304 unsigned int omap4_xlate_irq(unsigned int hwirq) in omap4_xlate_irq() argument
313 return hwirq; in omap4_xlate_irq()
318 irq_data.args[1] = hwirq - OMAP44XX_IRQ_GIC_START; in omap4_xlate_irq()
323 irq = hwirq; in omap4_xlate_irq()
Dcommon.h237 unsigned int omap4_xlate_irq(unsigned int hwirq);
/linux-4.4.14/arch/c6x/platforms/
Dmegamod-pic.c248 irq_hw_number_t hwirq; in init_megamod_pic() local
261 hwirq = irq_data->hwirq; in init_megamod_pic()
267 if (hwirq < 4 || hwirq >= NR_PRIORITY_IRQS) { in init_megamod_pic()
269 np->full_name, i, hwirq); in init_megamod_pic()
274 mapping[hwirq - 4] = i; in init_megamod_pic()
277 np->full_name, i, hwirq); in init_megamod_pic()
/linux-4.4.14/drivers/pinctrl/
Dpinctrl-adi2.c196 static inline u32 hwirq_to_pintbit(struct gpio_port *port, int hwirq) in hwirq_to_pintbit() argument
198 return port->pint_assign ? BIT(hwirq) << PINT_HI_OFFSET : BIT(hwirq); in hwirq_to_pintbit()
260 unsigned pintbit = hwirq_to_pintbit(port, d->hwirq); in adi_gpio_ack_irq()
283 unsigned pintbit = hwirq_to_pintbit(port, d->hwirq); in adi_gpio_mask_ack_irq()
311 writel(hwirq_to_pintbit(port, d->hwirq), &regs->mask_clear); in adi_gpio_mask_irq()
326 writel(hwirq_to_pintbit(port, d->hwirq), &regs->mask_set); in adi_gpio_unmask_irq()
349 port_setup(port, d->hwirq, true); in adi_gpio_irq_startup()
350 writew(BIT(d->hwirq), &port->regs->dir_clear); in adi_gpio_irq_startup()
351 writew(readw(&port->regs->inen) | BIT(d->hwirq), &port->regs->inen); in adi_gpio_irq_startup()
353 writel(hwirq_to_pintbit(port, d->hwirq), &regs->mask_set); in adi_gpio_irq_startup()
[all …]
Dpinctrl-pistachio.c1229 gpio_mask_writel(bank, GPIO_INTERRUPT_STATUS, data->hwirq, 0); in pistachio_gpio_irq_ack()
1236 gpio_mask_writel(bank, GPIO_INTERRUPT_EN, data->hwirq, 0); in pistachio_gpio_irq_mask()
1243 gpio_mask_writel(bank, GPIO_INTERRUPT_EN, data->hwirq, 1); in pistachio_gpio_irq_unmask()
1250 pistachio_gpio_direction_input(chip, data->hwirq); in pistachio_gpio_irq_startup()
1262 gpio_mask_writel(bank, GPIO_INPUT_POLARITY, data->hwirq, 1); in pistachio_gpio_irq_set_type()
1263 gpio_mask_writel(bank, GPIO_INTERRUPT_TYPE, data->hwirq, in pistachio_gpio_irq_set_type()
1265 gpio_mask_writel(bank, GPIO_INTERRUPT_EDGE, data->hwirq, in pistachio_gpio_irq_set_type()
1269 gpio_mask_writel(bank, GPIO_INPUT_POLARITY, data->hwirq, 0); in pistachio_gpio_irq_set_type()
1270 gpio_mask_writel(bank, GPIO_INTERRUPT_TYPE, data->hwirq, in pistachio_gpio_irq_set_type()
1272 gpio_mask_writel(bank, GPIO_INTERRUPT_EDGE, data->hwirq, in pistachio_gpio_irq_set_type()
[all …]
Dpinctrl-amd.c333 pin_reg = readl(gpio_dev->base + (d->hwirq)*4); in amd_gpio_irq_enable()
345 writel(pin_reg, gpio_dev->base + (d->hwirq)*4); in amd_gpio_irq_enable()
357 pin_reg = readl(gpio_dev->base + (d->hwirq)*4); in amd_gpio_irq_disable()
360 writel(pin_reg, gpio_dev->base + (d->hwirq)*4); in amd_gpio_irq_disable()
372 pin_reg = readl(gpio_dev->base + (d->hwirq)*4); in amd_gpio_irq_mask()
374 writel(pin_reg, gpio_dev->base + (d->hwirq)*4); in amd_gpio_irq_mask()
386 pin_reg = readl(gpio_dev->base + (d->hwirq)*4); in amd_gpio_irq_unmask()
388 writel(pin_reg, gpio_dev->base + (d->hwirq)*4); in amd_gpio_irq_unmask()
415 pin_reg = readl(gpio_dev->base + (d->hwirq)*4); in amd_gpio_irq_set_type()
469 writel(pin_reg, gpio_dev->base + (d->hwirq)*4); in amd_gpio_irq_set_type()
Dpinctrl-coh901.c433 struct u300_gpio_port *port = &gpio->ports[d->hwirq >> 3]; in u300_gpio_irq_type()
434 int offset = d->hwirq; in u300_gpio_irq_type()
470 struct u300_gpio_port *port = &gpio->ports[d->hwirq >> 3]; in u300_gpio_irq_enable()
471 int offset = d->hwirq; in u300_gpio_irq_enable()
476 d->hwirq, port->name, offset); in u300_gpio_irq_enable()
487 int offset = d->hwirq; in u300_gpio_irq_disable()
Dpinctrl-at91-pio4.c163 struct atmel_pin *pin = atmel_pioctrl->pins[d->hwirq]; in atmel_gpio_irq_set_type()
205 struct atmel_pin *pin = atmel_pioctrl->pins[d->hwirq]; in atmel_gpio_irq_mask()
214 struct atmel_pin *pin = atmel_pioctrl->pins[d->hwirq]; in atmel_gpio_irq_unmask()
225 int bank = ATMEL_PIO_BANK(d->hwirq); in atmel_gpio_irq_set_wake()
226 int line = ATMEL_PIO_LINE(d->hwirq); in atmel_gpio_irq_set_wake()
Dpinctrl-single.c1544 irq_hw_number_t hwirq; member
1651 pcswi->hwirq)); in pcs_irq_handle()
1697 irq_hw_number_t hwirq) in pcs_irqdomain_map() argument
1708 pcswi->reg = pcs->base + hwirq; in pcs_irqdomain_map()
1709 pcswi->hwirq = hwirq; in pcs_irqdomain_map()
Dpinctrl-at91.c1407 unsigned mask = 1 << d->hwirq; in gpio_irq_mask()
1417 unsigned mask = 1 << d->hwirq; in gpio_irq_unmask()
1439 unsigned mask = 1 << d->hwirq; in alt_gpio_irq_type()
1496 unsigned mask = 1 << d->hwirq; in gpio_irq_set_wake()
/linux-4.4.14/arch/mips/lantiq/
Dirq.c85 int offset = d->hwirq - MIPS_CPU_IRQ_CASCADE; in ltq_disable_irq()
96 int offset = d->hwirq - MIPS_CPU_IRQ_CASCADE; in ltq_mask_and_ack_irq()
107 int offset = d->hwirq - MIPS_CPU_IRQ_CASCADE; in ltq_ack_irq()
117 int offset = d->hwirq - MIPS_CPU_IRQ_CASCADE; in ltq_enable_irq()
129 if (d->hwirq == ltq_eiu_irq[i].start) { in ltq_eiu_settype()
156 type, d->hwirq); in ltq_eiu_settype()
161 irq_set_handler(d->hwirq, handle_edge_irq); in ltq_eiu_settype()
177 if (d->hwirq == ltq_eiu_irq[i].start) { in ltq_startup_eiu_irq()
199 if (d->hwirq == ltq_eiu_irq[i].start) { in ltq_shutdown_eiu_irq()
/linux-4.4.14/arch/arm/mach-davinci/
Dcp_intc.c36 cp_intc_write(d->hwirq, CP_INTC_SYS_STAT_IDX_CLR); in cp_intc_ack_irq()
44 cp_intc_write(d->hwirq, CP_INTC_SYS_ENABLE_IDX_CLR); in cp_intc_mask_irq()
51 cp_intc_write(d->hwirq, CP_INTC_SYS_ENABLE_IDX_SET); in cp_intc_unmask_irq()
56 unsigned reg = BIT_WORD(d->hwirq); in cp_intc_set_irq_type()
57 unsigned mask = BIT_MASK(d->hwirq); in cp_intc_set_irq_type()
/linux-4.4.14/arch/arm/mach-dove/
Dirq.c130 unsigned int hwirq = 1 + __fls(stat); in dove_legacy_handle_irq() local
131 handle_IRQ(hwirq, regs); in dove_legacy_handle_irq()
137 unsigned int hwirq = 33 + __fls(stat); in dove_legacy_handle_irq() local
138 handle_IRQ(hwirq, regs); in dove_legacy_handle_irq()
/linux-4.4.14/drivers/mfd/
Dmt6397-core.c81 int shift = data->hwirq & 0xf; in mt6397_irq_disable()
82 int reg = data->hwirq >> 4; in mt6397_irq_disable()
90 int shift = data->hwirq & 0xf; in mt6397_irq_enable()
91 int reg = data->hwirq >> 4; in mt6397_irq_enable()
100 int shift = irq_data->hwirq & 0xf; in mt6397_irq_set_wake()
101 int reg = irq_data->hwirq >> 4; in mt6397_irq_set_wake()
Dlp8788-irq.c70 irqd->enabled[data->hwirq] = 1; in lp8788_irq_enable()
77 irqd->enabled[data->hwirq] = 0; in lp8788_irq_disable()
90 enum lp8788_int_id irq = data->hwirq; in lp8788_irq_bus_sync_unlock()
136 irq_hw_number_t hwirq) in lp8788_irq_map() argument
Dwm831x-irq.c378 data->hwirq); in wm831x_irq_enable()
387 data->hwirq); in wm831x_irq_disable()
397 irq = data->hwirq; in wm831x_irq_set_type()
Dtps6586x.c241 unsigned int __irq = irq_data->hwirq; in tps6586x_irq_enable()
252 unsigned int __irq = irq_data->hwirq; in tps6586x_irq_disable()
Dmax8998-irq.c103 return &max8998_irqs[data->hwirq]; in irq_to_max8998_irq()
Dstmpe.c938 int offset = data->hwirq; in stmpe_irq_mask()
948 int offset = data->hwirq; in stmpe_irq_unmask()
964 irq_hw_number_t hwirq) in stmpe_irq_map() argument
Dtwl6030-irq.c347 irq_hw_number_t hwirq) in twl6030_irq_map() argument
D88pm860x-core.c539 pm860x_irqs[data->hwirq].enable = pm860x_irqs[data->hwirq].offs; in pm860x_irq_enable()
544 pm860x_irqs[data->hwirq].enable = 0; in pm860x_irq_disable()
Dmax8997-irq.c145 return &max8997_irqs[data->hwirq]; in irq_to_max8997_irq()
Dtc3589x.c210 irq_hw_number_t hwirq) in tc3589x_irq_map() argument
Dpm8921-core.c286 irq_hw_number_t hwirq) in pm8xxx_irq_domain_map() argument
/linux-4.4.14/drivers/pinctrl/mediatek/
Dpinctrl-mtk-common.c791 pin = mtk_find_pin_by_eint_num(pctl, d->hwirq); in mtk_pinctrl_irq_request_resources()
816 pin = mtk_find_pin_by_eint_num(pctl, d->hwirq); in mtk_pinctrl_irq_release_resources()
883 static int mtk_eint_flip_edge(struct mtk_pinctrl *pctl, int hwirq) in mtk_eint_flip_edge() argument
888 u32 mask = BIT(hwirq & 0x1f); in mtk_eint_flip_edge()
889 u32 port = (hwirq >> 5) & eint_offsets->port_mask; in mtk_eint_flip_edge()
893 pin = mtk_find_pin_by_eint_num(pctl, hwirq); in mtk_eint_flip_edge()
914 u32 mask = BIT(d->hwirq & 0x1f); in mtk_eint_mask()
915 void __iomem *reg = mtk_eint_get_offset(pctl, d->hwirq, in mtk_eint_mask()
926 u32 mask = BIT(d->hwirq & 0x1f); in mtk_eint_unmask()
927 void __iomem *reg = mtk_eint_get_offset(pctl, d->hwirq, in mtk_eint_unmask()
[all …]
/linux-4.4.14/arch/xtensa/kernel/
Dirq.c33 asmlinkage void do_IRQ(int hwirq, struct pt_regs *regs) in do_IRQ() argument
35 int irq = irq_find_mapping(NULL, hwirq); in do_IRQ()
37 if (hwirq >= NR_IRQS) { in do_IRQ()
39 __func__, hwirq); in do_IRQ()
/linux-4.4.14/arch/arm/mach-exynos/
Dsuspend.c52 unsigned int hwirq; member
156 if (wkup_irq->hwirq == data->hwirq) { in exynos_irq_set_wake()
183 unsigned long *hwirq, in exynos_pmu_domain_translate() argument
194 *hwirq = fwspec->param[1]; in exynos_pmu_domain_translate()
208 irq_hw_number_t hwirq; in exynos_pmu_domain_alloc() local
216 hwirq = fwspec->param[1]; in exynos_pmu_domain_alloc()
219 irq_domain_set_hwirq_and_chip(domain, virq + i, hwirq + i, in exynos_pmu_domain_alloc()
/linux-4.4.14/drivers/spmi/
Dspmi-pmic-arb.c408 u8 sid = d->hwirq >> 24; in qpnpint_spmi_write()
409 u8 per = d->hwirq >> 16; in qpnpint_spmi_write()
421 u8 sid = d->hwirq >> 24; in qpnpint_spmi_read()
422 u8 per = d->hwirq >> 16; in qpnpint_spmi_read()
477 u8 irq = d->hwirq >> 8; in qpnpint_irq_ack()
478 u8 apid = d->hwirq; in qpnpint_irq_ack()
493 u8 irq = d->hwirq >> 8; in qpnpint_irq_mask()
494 u8 apid = d->hwirq; in qpnpint_irq_mask()
515 u8 irq = d->hwirq >> 8; in qpnpint_irq_unmask()
516 u8 apid = d->hwirq; in qpnpint_irq_unmask()
[all …]
/linux-4.4.14/arch/arm/mach-orion5x/
Dirq.c45 unsigned int hwirq = 1 + __fls(stat); in orion5x_legacy_handle_irq() local
46 handle_IRQ(hwirq, regs); in orion5x_legacy_handle_irq()
/linux-4.4.14/arch/powerpc/include/asm/
Dpnv-pci.h17 int pnv_cxl_ioda_msi_setup(struct pci_dev *dev, unsigned int hwirq,
20 void pnv_cxl_release_hwirqs(struct pci_dev *dev, int hwirq, int num);
Dmsi_bitmap.h28 void msi_bitmap_reserve_hwirq(struct msi_bitmap *bmp, unsigned int hwirq);
/linux-4.4.14/arch/x86/kernel/apic/
Dhtirq.c69 irq_hw_number_t hwirq; in htirq_domain_alloc() local
76 hwirq = (info->ht_idx & 0xFF) | in htirq_domain_alloc()
79 if (irq_find_mapping(domain, hwirq) > 0) in htirq_domain_alloc()
99 irq_domain_set_info(domain, virq, hwirq, &ht_irq_chip, ht_cfg, in htirq_domain_alloc()
Dmsi.c200 irq_hw_number_t hwirq, msi_alloc_info_t *arg) in dmar_msi_init() argument
290 irq_hw_number_t hwirq, msi_alloc_info_t *arg) in hpet_msi_init() argument
/linux-4.4.14/drivers/bcma/
Ddriver_gpio.c130 int hwirq, err; in bcma_gpio_irq_init() local
135 hwirq = bcma_core_irq(cc->core, 0); in bcma_gpio_irq_init()
136 err = request_irq(hwirq, bcma_gpio_irq_handler, IRQF_SHARED, "gpio", in bcma_gpio_irq_init()
150 free_irq(hwirq, cc); in bcma_gpio_irq_init()
/linux-4.4.14/arch/powerpc/platforms/pseries/
Dmsi.c384 int hwirq, virq, i, quota, rc; in rtas_setup_msi_irqs() local
466 hwirq = rtas_query_irq_number(pdn, i++); in rtas_setup_msi_irqs()
467 if (hwirq < 0) { in rtas_setup_msi_irqs()
469 return hwirq; in rtas_setup_msi_irqs()
472 virq = irq_create_mapping(NULL, hwirq); in rtas_setup_msi_irqs()
475 pr_debug("rtas_msi: Failed mapping hwirq %d\n", hwirq); in rtas_setup_msi_irqs()
/linux-4.4.14/drivers/staging/board/
Dboard.c80 unsigned int hwirq = res->start; in gic_fixup_resource() local
89 irq_data.args[1] = hwirq - irqc_base; in gic_fixup_resource()
112 pr_debug("hwirq %u -> virq %u\n", hwirq, virq); in gic_fixup_resource()
/linux-4.4.14/drivers/ssb/
Ddriver_gpio.c150 int gpio, hwirq, err; in ssb_gpio_irq_chipco_domain_init() local
169 hwirq = ssb_mips_irq(bus->chipco.dev) + 2; in ssb_gpio_irq_chipco_domain_init()
170 err = request_irq(hwirq, ssb_gpio_irq_chipco_handler, IRQF_SHARED, in ssb_gpio_irq_chipco_domain_init()
347 int gpio, hwirq, err; in ssb_gpio_irq_extif_domain_init() local
366 hwirq = ssb_mips_irq(bus->extif.dev) + 2; in ssb_gpio_irq_extif_domain_init()
367 err = request_irq(hwirq, ssb_gpio_irq_extif_handler, IRQF_SHARED, in ssb_gpio_irq_extif_domain_init()
/linux-4.4.14/arch/arm/mach-s3c24xx/
Dirq-pm.c43 unsigned long irqbit = 1 << data->hwirq; in s3c_irq_wake()
49 state ? "enabled" : "disabled", data->hwirq); in s3c_irq_wake()
/linux-4.4.14/arch/c6x/kernel/
Dirq.c38 unsigned int prio = data->hwirq; in mask_core_irq()
47 unsigned int prio = data->hwirq; in unmask_core_irq()
/linux-4.4.14/drivers/pinctrl/sunxi/
Dpinctrl-sunxi.c552 pctl->irq_array[d->hwirq], "irq"); in sunxi_pinctrl_irq_request_resources()
557 pctl->irq_array[d->hwirq] - pctl->desc->pin_base); in sunxi_pinctrl_irq_request_resources()
565 sunxi_pmx_set(pctl->pctl_dev, pctl->irq_array[d->hwirq], func->muxval); in sunxi_pinctrl_irq_request_resources()
575 pctl->irq_array[d->hwirq] - pctl->desc->pin_base); in sunxi_pinctrl_irq_release_resources()
581 u32 reg = sunxi_irq_cfg_reg(d->hwirq, pctl->desc->irq_bank_base); in sunxi_pinctrl_irq_set_type()
582 u8 index = sunxi_irq_cfg_offset(d->hwirq); in sunxi_pinctrl_irq_set_type()
628 u32 status_reg = sunxi_irq_status_reg(d->hwirq, in sunxi_pinctrl_irq_ack()
630 u8 status_idx = sunxi_irq_status_offset(d->hwirq); in sunxi_pinctrl_irq_ack()
639 u32 reg = sunxi_irq_ctrl_reg(d->hwirq, pctl->desc->irq_bank_base); in sunxi_pinctrl_irq_mask()
640 u8 idx = sunxi_irq_ctrl_offset(d->hwirq); in sunxi_pinctrl_irq_mask()
[all …]
/linux-4.4.14/drivers/base/
Dplatform-msi.c58 arg->hwirq = platform_msi_calc_hwirq(desc); in platform_msi_set_desc()
63 unsigned int virq, irq_hw_number_t hwirq, in platform_msi_init() argument
66 return irq_domain_set_hwirq_and_chip(domain, virq, hwirq, in platform_msi_init()
/linux-4.4.14/drivers/pinctrl/qcom/
Dpinctrl-msm.c575 g = &pctrl->soc->groups[d->hwirq]; in msm_gpio_irq_mask()
583 clear_bit(d->hwirq, pctrl->enabled_irqs); in msm_gpio_irq_mask()
596 g = &pctrl->soc->groups[d->hwirq]; in msm_gpio_irq_unmask()
608 set_bit(d->hwirq, pctrl->enabled_irqs); in msm_gpio_irq_unmask()
621 g = &pctrl->soc->groups[d->hwirq]; in msm_gpio_irq_ack()
632 if (test_bit(d->hwirq, pctrl->dual_edge_irqs)) in msm_gpio_irq_ack()
646 g = &pctrl->soc->groups[d->hwirq]; in msm_gpio_irq_set_type()
654 set_bit(d->hwirq, pctrl->dual_edge_irqs); in msm_gpio_irq_set_type()
656 clear_bit(d->hwirq, pctrl->dual_edge_irqs); in msm_gpio_irq_set_type()
719 if (test_bit(d->hwirq, pctrl->dual_edge_irqs)) in msm_gpio_irq_set_type()
/linux-4.4.14/drivers/soc/dove/
Dpmu.c240 u32 hwirq = fls(stat) - 1; in pmu_irq_handler() local
242 stat &= ~(1 << hwirq); in pmu_irq_handler()
243 done &= ~(1 << hwirq); in pmu_irq_handler()
245 generic_handle_irq(irq_find_mapping(domain, hwirq)); in pmu_irq_handler()
/linux-4.4.14/arch/mips/ralink/
Dirq.c73 rt_intc_w32(BIT(d->hwirq), INTC_REG_ENABLE); in ralink_intc_irq_unmask()
78 rt_intc_w32(BIT(d->hwirq), INTC_REG_DISABLE); in ralink_intc_irq_mask()
/linux-4.4.14/include/asm-generic/
Dmsi.h23 irq_hw_number_t hwirq; member
/linux-4.4.14/drivers/pinctrl/sirf/
Dpinctrl-sirf.c422 struct sirfsoc_gpio_bank *bank = sirfsoc_gpio_to_bank(sgpio, d->hwirq); in sirfsoc_gpio_irq_ack()
423 int idx = sirfsoc_gpio_to_bankoff(d->hwirq); in sirfsoc_gpio_irq_ack()
461 struct sirfsoc_gpio_bank *bank = sirfsoc_gpio_to_bank(sgpio, d->hwirq); in sirfsoc_gpio_irq_mask()
463 __sirfsoc_gpio_irq_mask(sgpio, bank, d->hwirq % SIRFSOC_GPIO_BANK_SIZE); in sirfsoc_gpio_irq_mask()
470 struct sirfsoc_gpio_bank *bank = sirfsoc_gpio_to_bank(sgpio, d->hwirq); in sirfsoc_gpio_irq_unmask()
471 int idx = sirfsoc_gpio_to_bankoff(d->hwirq); in sirfsoc_gpio_irq_unmask()
491 struct sirfsoc_gpio_bank *bank = sirfsoc_gpio_to_bank(sgpio, d->hwirq); in sirfsoc_gpio_irq_type()
492 int idx = sirfsoc_gpio_to_bankoff(d->hwirq); in sirfsoc_gpio_irq_type()
/linux-4.4.14/arch/metag/kernel/
Dirq.c32 tbi_startup_interrupt(data->hwirq); in startup_meta_irq()
38 tbi_shutdown_interrupt(data->hwirq); in shutdown_meta_irq()
/linux-4.4.14/arch/s390/pci/
Dpci.c384 unsigned int hwirq, msi_vecs; in arch_setup_msi_irqs() local
411 hwirq = 0; in arch_setup_msi_irqs()
422 msg.data = hwirq; in arch_setup_msi_irqs()
426 airq_iv_set_data(zdev->aibv, hwirq, irq); in arch_setup_msi_irqs()
427 hwirq++; in arch_setup_msi_irqs()
439 if (hwirq-- == 0) in arch_setup_msi_irqs()
/linux-4.4.14/arch/mips/pci/
Dpci-ar2315.c341 ar2315_pci_reg_mask(apc, AR2315_PCI_IMR, BIT(d->hwirq), 0); in ar2315_pci_irq_mask()
347 u32 m = BIT(d->hwirq); in ar2315_pci_irq_mask_ack()
357 ar2315_pci_reg_mask(apc, AR2315_PCI_IMR, 0, BIT(d->hwirq)); in ar2315_pci_irq_unmask()
Dpci-rt3883.c165 rt3883_pci_w32(rpc, t | BIT(d->hwirq), RT3883_PCI_REG_PCIENA); in rt3883_pci_irq_unmask()
178 rt3883_pci_w32(rpc, t & ~BIT(d->hwirq), RT3883_PCI_REG_PCIENA); in rt3883_pci_irq_mask()
/linux-4.4.14/drivers/pinctrl/nomadik/
Dpinctrl-nomadik.c652 writel(nmk_gpio_get_bitmask(d->hwirq), nmk_chip->addr + NMK_GPIO_IC); in nmk_gpio_irq_ack()
723 bitmask = nmk_gpio_get_bitmask(d->hwirq); in nmk_gpio_irq_maskunmask()
731 __nmk_gpio_irq_modify(nmk_chip, d->hwirq, NORMAL, enable); in nmk_gpio_irq_maskunmask()
734 __nmk_gpio_set_wake(nmk_chip, d->hwirq, enable); in nmk_gpio_irq_maskunmask()
762 bitmask = nmk_gpio_get_bitmask(d->hwirq); in nmk_gpio_irq_set_wake()
769 __nmk_gpio_set_wake(nmk_chip, d->hwirq, on); in nmk_gpio_irq_set_wake()
792 bitmask = nmk_gpio_get_bitmask(d->hwirq); in nmk_gpio_irq_set_type()
804 __nmk_gpio_irq_modify(nmk_chip, d->hwirq, NORMAL, false); in nmk_gpio_irq_set_type()
807 __nmk_gpio_irq_modify(nmk_chip, d->hwirq, WAKE, false); in nmk_gpio_irq_set_type()
818 __nmk_gpio_irq_modify(nmk_chip, d->hwirq, NORMAL, true); in nmk_gpio_irq_set_type()
[all …]
Dpinctrl-abx500.c338 int hwirq; in abx500_gpio_to_irq() local
352 hwirq = gpio - cluster->start + cluster->to_irq; in abx500_gpio_to_irq()
353 return irq_create_mapping(pct->parent->domain, hwirq); in abx500_gpio_to_irq()
/linux-4.4.14/arch/mips/ath25/
Dar2315.c98 ar2315_rst_reg_mask(AR2315_IMR, 0, BIT(d->hwirq)); in ar2315_misc_irq_unmask()
103 ar2315_rst_reg_mask(AR2315_IMR, BIT(d->hwirq), 0); in ar2315_misc_irq_mask()
Dar5312.c101 ar5312_rst_reg_mask(AR5312_IMR, 0, BIT(d->hwirq)); in ar5312_misc_irq_unmask()
107 ar5312_rst_reg_mask(AR5312_IMR, BIT(d->hwirq), 0); in ar5312_misc_irq_mask()
/linux-4.4.14/virt/kvm/arm/
Dvgic-v2.c53 lr_desc.hwirq = (val & GICH_LR_PHYSID_CPUID) >> GICH_LR_PHYSID_CPUID_SHIFT; in vgic_v2_get_lr()
75 lr_val |= (u32)lr_desc.hwirq << GICH_LR_PHYSID_CPUID_SHIFT; in vgic_v2_set_lr()
Dvgic-v3.c72 lr_desc.hwirq = (val >> ICH_LR_PHYS_ID_SHIFT) & GENMASK(9, 0); in vgic_v3_get_lr()
111 lr_val |= ((u64)lr_desc.hwirq) << ICH_LR_PHYS_ID_SHIFT; in vgic_v3_set_lr()
/linux-4.4.14/Documentation/devicetree/bindings/interrupt-controller/
Dsnps,archs-idu-intc.txt34 * <hwirq distribution>
/linux-4.4.14/arch/sh/boards/mach-x3proto/
Dgpio.c89 irq_hw_number_t hwirq) in x3proto_gpio_irq_map() argument
/linux-4.4.14/arch/arc/boot/dts/
Dnsim_hs_idu.dts44 * <hwirq distribution>
Dvdk_axc003_idu.dtsi39 * <hwirq distribution>
Dnsimosci_hs_idu.dts49 * <hwirq distribution>
Daxc003_idu.dtsi38 * <hwirq distribution>
/linux-4.4.14/drivers/clk/at91/
Dpmc.c72 pmc_write(pmc, AT91_PMC_IDR, 1 << d->hwirq); in pmc_irq_mask()
79 pmc_write(pmc, AT91_PMC_IER, 1 << d->hwirq); in pmc_irq_unmask()
/linux-4.4.14/drivers/base/regmap/
Dregmap-irq.c167 const struct regmap_irq *irq_data = irq_to_regmap_irq(d, data->hwirq); in regmap_irq_enable()
176 const struct regmap_irq *irq_data = irq_to_regmap_irq(d, data->hwirq); in regmap_irq_disable()
185 const struct regmap_irq *irq_data = irq_to_regmap_irq(d, data->hwirq); in regmap_irq_set_wake()
/linux-4.4.14/drivers/pinctrl/bcm/
Dpinctrl-cygnus-gpio.c182 unsigned gpio = d->hwirq; in cygnus_gpio_irq_ack()
201 unsigned gpio = d->hwirq; in cygnus_gpio_irq_set_mask()
232 unsigned gpio = d->hwirq; in cygnus_gpio_irq_set_type()
/linux-4.4.14/arch/powerpc/platforms/embedded6xx/
Dflipper-pic.c103 irq_hw_number_t hwirq) in flipper_pic_map() argument
Dhlwd-pic.c96 irq_hw_number_t hwirq) in hlwd_pic_map() argument
/linux-4.4.14/drivers/pinctrl/spear/
Dpinctrl-plgpio.c284 int offset = d->hwirq; in plgpio_irq_disable()
303 int offset = d->hwirq; in plgpio_irq_enable()
322 int offset = d->hwirq; in plgpio_irq_set_type()
/linux-4.4.14/arch/arm/mach-pxa/
Dpxa_cplds_irqs.c81 irq_hw_number_t hwirq) in cplds_irq_domain_map() argument
/linux-4.4.14/arch/powerpc/platforms/ps3/
Dinterrupt.c671 irq_hw_number_t hwirq) in ps3_host_map() argument
673 DBG("%s:%d: hwirq %lu, virq %u\n", __func__, __LINE__, hwirq, in ps3_host_map()
/linux-4.4.14/include/kvm/
Darm_vgic.h99 unsigned hwirq:10; member
/linux-4.4.14/arch/powerpc/sysdev/xics/
Dxics-common.c218 irq = desc->irq_data.hwirq; in xics_migrate_irqs_away()
/linux-4.4.14/arch/powerpc/kernel/
Dirq.c638 return WARN_ON(!irq_data) ? 0 : irq_data->hwirq; in virq_to_hw()

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