1/* 2 * Support Hypertransport IRQ 3 * 4 * Copyright (C) 1997, 1998, 1999, 2000, 2009 Ingo Molnar, Hajnalka Szabo 5 * Moved from arch/x86/kernel/apic/io_apic.c. 6 * Jiang Liu <jiang.liu@linux.intel.com> 7 * Add support of hierarchical irqdomain 8 * 9 * This program is free software; you can redistribute it and/or modify 10 * it under the terms of the GNU General Public License version 2 as 11 * published by the Free Software Foundation. 12 */ 13#include <linux/mm.h> 14#include <linux/interrupt.h> 15#include <linux/init.h> 16#include <linux/device.h> 17#include <linux/pci.h> 18#include <linux/htirq.h> 19#include <asm/irqdomain.h> 20#include <asm/hw_irq.h> 21#include <asm/apic.h> 22#include <asm/hypertransport.h> 23 24static struct irq_domain *htirq_domain; 25 26/* 27 * Hypertransport interrupt support 28 */ 29static int 30ht_set_affinity(struct irq_data *data, const struct cpumask *mask, bool force) 31{ 32 struct irq_data *parent = data->parent_data; 33 int ret; 34 35 ret = parent->chip->irq_set_affinity(parent, mask, force); 36 if (ret >= 0) { 37 struct ht_irq_msg msg; 38 struct irq_cfg *cfg = irqd_cfg(data); 39 40 fetch_ht_irq_msg(data->irq, &msg); 41 msg.address_lo &= ~(HT_IRQ_LOW_VECTOR_MASK | 42 HT_IRQ_LOW_DEST_ID_MASK); 43 msg.address_lo |= HT_IRQ_LOW_VECTOR(cfg->vector) | 44 HT_IRQ_LOW_DEST_ID(cfg->dest_apicid); 45 msg.address_hi &= ~(HT_IRQ_HIGH_DEST_ID_MASK); 46 msg.address_hi |= HT_IRQ_HIGH_DEST_ID(cfg->dest_apicid); 47 write_ht_irq_msg(data->irq, &msg); 48 } 49 50 return ret; 51} 52 53static struct irq_chip ht_irq_chip = { 54 .name = "PCI-HT", 55 .irq_mask = mask_ht_irq, 56 .irq_unmask = unmask_ht_irq, 57 .irq_ack = irq_chip_ack_parent, 58 .irq_set_affinity = ht_set_affinity, 59 .irq_retrigger = irq_chip_retrigger_hierarchy, 60 .flags = IRQCHIP_SKIP_SET_WAKE, 61}; 62 63static int htirq_domain_alloc(struct irq_domain *domain, unsigned int virq, 64 unsigned int nr_irqs, void *arg) 65{ 66 struct ht_irq_cfg *ht_cfg; 67 struct irq_alloc_info *info = arg; 68 struct pci_dev *dev; 69 irq_hw_number_t hwirq; 70 int ret; 71 72 if (nr_irqs > 1 || !info) 73 return -EINVAL; 74 75 dev = info->ht_dev; 76 hwirq = (info->ht_idx & 0xFF) | 77 PCI_DEVID(dev->bus->number, dev->devfn) << 8 | 78 (pci_domain_nr(dev->bus) & 0xFFFFFFFF) << 24; 79 if (irq_find_mapping(domain, hwirq) > 0) 80 return -EEXIST; 81 82 ht_cfg = kmalloc(sizeof(*ht_cfg), GFP_KERNEL); 83 if (!ht_cfg) 84 return -ENOMEM; 85 86 ret = irq_domain_alloc_irqs_parent(domain, virq, nr_irqs, info); 87 if (ret < 0) { 88 kfree(ht_cfg); 89 return ret; 90 } 91 92 /* Initialize msg to a value that will never match the first write. */ 93 ht_cfg->msg.address_lo = 0xffffffff; 94 ht_cfg->msg.address_hi = 0xffffffff; 95 ht_cfg->dev = info->ht_dev; 96 ht_cfg->update = info->ht_update; 97 ht_cfg->pos = info->ht_pos; 98 ht_cfg->idx = 0x10 + (info->ht_idx * 2); 99 irq_domain_set_info(domain, virq, hwirq, &ht_irq_chip, ht_cfg, 100 handle_edge_irq, ht_cfg, "edge"); 101 102 return 0; 103} 104 105static void htirq_domain_free(struct irq_domain *domain, unsigned int virq, 106 unsigned int nr_irqs) 107{ 108 struct irq_data *irq_data = irq_domain_get_irq_data(domain, virq); 109 110 BUG_ON(nr_irqs != 1); 111 kfree(irq_data->chip_data); 112 irq_domain_free_irqs_top(domain, virq, nr_irqs); 113} 114 115static void htirq_domain_activate(struct irq_domain *domain, 116 struct irq_data *irq_data) 117{ 118 struct ht_irq_msg msg; 119 struct irq_cfg *cfg = irqd_cfg(irq_data); 120 121 msg.address_hi = HT_IRQ_HIGH_DEST_ID(cfg->dest_apicid); 122 msg.address_lo = 123 HT_IRQ_LOW_BASE | 124 HT_IRQ_LOW_DEST_ID(cfg->dest_apicid) | 125 HT_IRQ_LOW_VECTOR(cfg->vector) | 126 ((apic->irq_dest_mode == 0) ? 127 HT_IRQ_LOW_DM_PHYSICAL : 128 HT_IRQ_LOW_DM_LOGICAL) | 129 HT_IRQ_LOW_RQEOI_EDGE | 130 ((apic->irq_delivery_mode != dest_LowestPrio) ? 131 HT_IRQ_LOW_MT_FIXED : 132 HT_IRQ_LOW_MT_ARBITRATED) | 133 HT_IRQ_LOW_IRQ_MASKED; 134 write_ht_irq_msg(irq_data->irq, &msg); 135} 136 137static void htirq_domain_deactivate(struct irq_domain *domain, 138 struct irq_data *irq_data) 139{ 140 struct ht_irq_msg msg; 141 142 memset(&msg, 0, sizeof(msg)); 143 write_ht_irq_msg(irq_data->irq, &msg); 144} 145 146static const struct irq_domain_ops htirq_domain_ops = { 147 .alloc = htirq_domain_alloc, 148 .free = htirq_domain_free, 149 .activate = htirq_domain_activate, 150 .deactivate = htirq_domain_deactivate, 151}; 152 153void arch_init_htirq_domain(struct irq_domain *parent) 154{ 155 if (disable_apic) 156 return; 157 158 htirq_domain = irq_domain_add_tree(NULL, &htirq_domain_ops, NULL); 159 if (!htirq_domain) 160 pr_warn("failed to initialize irqdomain for HTIRQ.\n"); 161 else 162 htirq_domain->parent = parent; 163} 164 165int arch_setup_ht_irq(int idx, int pos, struct pci_dev *dev, 166 ht_irq_update_t *update) 167{ 168 struct irq_alloc_info info; 169 170 if (!htirq_domain) 171 return -ENOSYS; 172 173 init_irq_alloc_info(&info, NULL); 174 info.ht_idx = idx; 175 info.ht_pos = pos; 176 info.ht_dev = dev; 177 info.ht_update = update; 178 179 return irq_domain_alloc_irqs(htirq_domain, 1, dev_to_node(&dev->dev), 180 &info); 181} 182 183void arch_teardown_ht_irq(unsigned int irq) 184{ 185 irq_domain_free_irqs(irq, 1); 186} 187