1/* Copyright (c) 2010, Code Aurora Forum. All rights reserved. 2 * 3 * This program is free software; you can redistribute it and/or modify 4 * it under the terms of the GNU General Public License version 2 and 5 * only version 2 as published by the Free Software Foundation. 6 * 7 * This program is distributed in the hope that it will be useful, 8 * but WITHOUT ANY WARRANTY; without even the implied warranty of 9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 10 * GNU General Public License for more details. 11 * 12 * You should have received a copy of the GNU General Public License 13 * along with this program; if not, write to the Free Software 14 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 15 * 02110-1301, USA. 16 */ 17#include <linux/gpio.h> 18#include <linux/i2c.h> 19#include <linux/init.h> 20#include <linux/interrupt.h> 21#include <linux/irq.h> 22#include <linux/module.h> 23#include <linux/mutex.h> 24#include <linux/slab.h> 25#include <linux/i2c/sx150x.h> 26#include <linux/of.h> 27#include <linux/of_address.h> 28#include <linux/of_irq.h> 29#include <linux/of_gpio.h> 30#include <linux/of_device.h> 31 32#define NO_UPDATE_PENDING -1 33 34/* The chip models of sx150x */ 35#define SX150X_456 0 36#define SX150X_789 1 37 38struct sx150x_456_pri { 39 u8 reg_pld_mode; 40 u8 reg_pld_table0; 41 u8 reg_pld_table1; 42 u8 reg_pld_table2; 43 u8 reg_pld_table3; 44 u8 reg_pld_table4; 45 u8 reg_advance; 46}; 47 48struct sx150x_789_pri { 49 u8 reg_drain; 50 u8 reg_polarity; 51 u8 reg_clock; 52 u8 reg_misc; 53 u8 reg_reset; 54 u8 ngpios; 55}; 56 57struct sx150x_device_data { 58 u8 model; 59 u8 reg_pullup; 60 u8 reg_pulldn; 61 u8 reg_dir; 62 u8 reg_data; 63 u8 reg_irq_mask; 64 u8 reg_irq_src; 65 u8 reg_sense; 66 u8 ngpios; 67 union { 68 struct sx150x_456_pri x456; 69 struct sx150x_789_pri x789; 70 } pri; 71}; 72 73struct sx150x_chip { 74 struct gpio_chip gpio_chip; 75 struct i2c_client *client; 76 const struct sx150x_device_data *dev_cfg; 77 int irq_summary; 78 int irq_base; 79 int irq_update; 80 u32 irq_sense; 81 u32 irq_masked; 82 u32 dev_sense; 83 u32 dev_masked; 84 struct irq_chip irq_chip; 85 struct mutex lock; 86}; 87 88static const struct sx150x_device_data sx150x_devices[] = { 89 [0] = { /* sx1508q */ 90 .model = SX150X_789, 91 .reg_pullup = 0x03, 92 .reg_pulldn = 0x04, 93 .reg_dir = 0x07, 94 .reg_data = 0x08, 95 .reg_irq_mask = 0x09, 96 .reg_irq_src = 0x0c, 97 .reg_sense = 0x0b, 98 .pri.x789 = { 99 .reg_drain = 0x05, 100 .reg_polarity = 0x06, 101 .reg_clock = 0x0f, 102 .reg_misc = 0x10, 103 .reg_reset = 0x7d, 104 }, 105 .ngpios = 8, 106 }, 107 [1] = { /* sx1509q */ 108 .model = SX150X_789, 109 .reg_pullup = 0x07, 110 .reg_pulldn = 0x09, 111 .reg_dir = 0x0f, 112 .reg_data = 0x11, 113 .reg_irq_mask = 0x13, 114 .reg_irq_src = 0x19, 115 .reg_sense = 0x17, 116 .pri.x789 = { 117 .reg_drain = 0x0b, 118 .reg_polarity = 0x0d, 119 .reg_clock = 0x1e, 120 .reg_misc = 0x1f, 121 .reg_reset = 0x7d, 122 }, 123 .ngpios = 16 124 }, 125 [2] = { /* sx1506q */ 126 .model = SX150X_456, 127 .reg_pullup = 0x05, 128 .reg_pulldn = 0x07, 129 .reg_dir = 0x03, 130 .reg_data = 0x01, 131 .reg_irq_mask = 0x09, 132 .reg_irq_src = 0x0f, 133 .reg_sense = 0x0d, 134 .pri.x456 = { 135 .reg_pld_mode = 0x21, 136 .reg_pld_table0 = 0x23, 137 .reg_pld_table1 = 0x25, 138 .reg_pld_table2 = 0x27, 139 .reg_pld_table3 = 0x29, 140 .reg_pld_table4 = 0x2b, 141 .reg_advance = 0xad, 142 }, 143 .ngpios = 16 144 }, 145}; 146 147static const struct i2c_device_id sx150x_id[] = { 148 {"sx1508q", 0}, 149 {"sx1509q", 1}, 150 {"sx1506q", 2}, 151 {} 152}; 153MODULE_DEVICE_TABLE(i2c, sx150x_id); 154 155static const struct of_device_id sx150x_of_match[] = { 156 { .compatible = "semtech,sx1508q" }, 157 { .compatible = "semtech,sx1509q" }, 158 { .compatible = "semtech,sx1506q" }, 159 {}, 160}; 161MODULE_DEVICE_TABLE(of, sx150x_of_match); 162 163struct sx150x_chip *to_sx150x(struct gpio_chip *gc) 164{ 165 return container_of(gc, struct sx150x_chip, gpio_chip); 166} 167 168static s32 sx150x_i2c_write(struct i2c_client *client, u8 reg, u8 val) 169{ 170 s32 err = i2c_smbus_write_byte_data(client, reg, val); 171 172 if (err < 0) 173 dev_warn(&client->dev, 174 "i2c write fail: can't write %02x to %02x: %d\n", 175 val, reg, err); 176 return err; 177} 178 179static s32 sx150x_i2c_read(struct i2c_client *client, u8 reg, u8 *val) 180{ 181 s32 err = i2c_smbus_read_byte_data(client, reg); 182 183 if (err >= 0) 184 *val = err; 185 else 186 dev_warn(&client->dev, 187 "i2c read fail: can't read from %02x: %d\n", 188 reg, err); 189 return err; 190} 191 192static inline bool offset_is_oscio(struct sx150x_chip *chip, unsigned offset) 193{ 194 return (chip->dev_cfg->ngpios == offset); 195} 196 197/* 198 * These utility functions solve the common problem of locating and setting 199 * configuration bits. Configuration bits are grouped into registers 200 * whose indexes increase downwards. For example, with eight-bit registers, 201 * sixteen gpios would have their config bits grouped in the following order: 202 * REGISTER N-1 [ f e d c b a 9 8 ] 203 * N [ 7 6 5 4 3 2 1 0 ] 204 * 205 * For multi-bit configurations, the pattern gets wider: 206 * REGISTER N-3 [ f f e e d d c c ] 207 * N-2 [ b b a a 9 9 8 8 ] 208 * N-1 [ 7 7 6 6 5 5 4 4 ] 209 * N [ 3 3 2 2 1 1 0 0 ] 210 * 211 * Given the address of the starting register 'N', the index of the gpio 212 * whose configuration we seek to change, and the width in bits of that 213 * configuration, these functions allow us to locate the correct 214 * register and mask the correct bits. 215 */ 216static inline void sx150x_find_cfg(u8 offset, u8 width, 217 u8 *reg, u8 *mask, u8 *shift) 218{ 219 *reg -= offset * width / 8; 220 *mask = (1 << width) - 1; 221 *shift = (offset * width) % 8; 222 *mask <<= *shift; 223} 224 225static s32 sx150x_write_cfg(struct sx150x_chip *chip, 226 u8 offset, u8 width, u8 reg, u8 val) 227{ 228 u8 mask; 229 u8 data; 230 u8 shift; 231 s32 err; 232 233 sx150x_find_cfg(offset, width, ®, &mask, &shift); 234 err = sx150x_i2c_read(chip->client, reg, &data); 235 if (err < 0) 236 return err; 237 238 data &= ~mask; 239 data |= (val << shift) & mask; 240 return sx150x_i2c_write(chip->client, reg, data); 241} 242 243static int sx150x_get_io(struct sx150x_chip *chip, unsigned offset) 244{ 245 u8 reg = chip->dev_cfg->reg_data; 246 u8 mask; 247 u8 data; 248 u8 shift; 249 s32 err; 250 251 sx150x_find_cfg(offset, 1, ®, &mask, &shift); 252 err = sx150x_i2c_read(chip->client, reg, &data); 253 if (err >= 0) 254 err = (data & mask) != 0 ? 1 : 0; 255 256 return err; 257} 258 259static void sx150x_set_oscio(struct sx150x_chip *chip, int val) 260{ 261 sx150x_i2c_write(chip->client, 262 chip->dev_cfg->pri.x789.reg_clock, 263 (val ? 0x1f : 0x10)); 264} 265 266static void sx150x_set_io(struct sx150x_chip *chip, unsigned offset, int val) 267{ 268 sx150x_write_cfg(chip, 269 offset, 270 1, 271 chip->dev_cfg->reg_data, 272 (val ? 1 : 0)); 273} 274 275static int sx150x_io_input(struct sx150x_chip *chip, unsigned offset) 276{ 277 return sx150x_write_cfg(chip, 278 offset, 279 1, 280 chip->dev_cfg->reg_dir, 281 1); 282} 283 284static int sx150x_io_output(struct sx150x_chip *chip, unsigned offset, int val) 285{ 286 int err; 287 288 err = sx150x_write_cfg(chip, 289 offset, 290 1, 291 chip->dev_cfg->reg_data, 292 (val ? 1 : 0)); 293 if (err >= 0) 294 err = sx150x_write_cfg(chip, 295 offset, 296 1, 297 chip->dev_cfg->reg_dir, 298 0); 299 return err; 300} 301 302static int sx150x_gpio_get(struct gpio_chip *gc, unsigned offset) 303{ 304 struct sx150x_chip *chip = to_sx150x(gc); 305 int status = -EINVAL; 306 307 if (!offset_is_oscio(chip, offset)) { 308 mutex_lock(&chip->lock); 309 status = sx150x_get_io(chip, offset); 310 mutex_unlock(&chip->lock); 311 } 312 313 return status; 314} 315 316static void sx150x_gpio_set(struct gpio_chip *gc, unsigned offset, int val) 317{ 318 struct sx150x_chip *chip = to_sx150x(gc); 319 320 mutex_lock(&chip->lock); 321 if (offset_is_oscio(chip, offset)) 322 sx150x_set_oscio(chip, val); 323 else 324 sx150x_set_io(chip, offset, val); 325 mutex_unlock(&chip->lock); 326} 327 328static int sx150x_gpio_direction_input(struct gpio_chip *gc, unsigned offset) 329{ 330 struct sx150x_chip *chip = to_sx150x(gc); 331 int status = -EINVAL; 332 333 if (!offset_is_oscio(chip, offset)) { 334 mutex_lock(&chip->lock); 335 status = sx150x_io_input(chip, offset); 336 mutex_unlock(&chip->lock); 337 } 338 return status; 339} 340 341static int sx150x_gpio_direction_output(struct gpio_chip *gc, 342 unsigned offset, 343 int val) 344{ 345 struct sx150x_chip *chip = to_sx150x(gc); 346 int status = 0; 347 348 if (!offset_is_oscio(chip, offset)) { 349 mutex_lock(&chip->lock); 350 status = sx150x_io_output(chip, offset, val); 351 mutex_unlock(&chip->lock); 352 } 353 return status; 354} 355 356static void sx150x_irq_mask(struct irq_data *d) 357{ 358 struct sx150x_chip *chip = to_sx150x(irq_data_get_irq_chip_data(d)); 359 unsigned n = d->hwirq; 360 361 chip->irq_masked |= (1 << n); 362 chip->irq_update = n; 363} 364 365static void sx150x_irq_unmask(struct irq_data *d) 366{ 367 struct sx150x_chip *chip = to_sx150x(irq_data_get_irq_chip_data(d)); 368 unsigned n = d->hwirq; 369 370 chip->irq_masked &= ~(1 << n); 371 chip->irq_update = n; 372} 373 374static int sx150x_irq_set_type(struct irq_data *d, unsigned int flow_type) 375{ 376 struct sx150x_chip *chip = to_sx150x(irq_data_get_irq_chip_data(d)); 377 unsigned n, val = 0; 378 379 if (flow_type & (IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW)) 380 return -EINVAL; 381 382 n = d->hwirq; 383 384 if (flow_type & IRQ_TYPE_EDGE_RISING) 385 val |= 0x1; 386 if (flow_type & IRQ_TYPE_EDGE_FALLING) 387 val |= 0x2; 388 389 chip->irq_sense &= ~(3UL << (n * 2)); 390 chip->irq_sense |= val << (n * 2); 391 chip->irq_update = n; 392 return 0; 393} 394 395static irqreturn_t sx150x_irq_thread_fn(int irq, void *dev_id) 396{ 397 struct sx150x_chip *chip = (struct sx150x_chip *)dev_id; 398 unsigned nhandled = 0; 399 unsigned sub_irq; 400 unsigned n; 401 s32 err; 402 u8 val; 403 int i; 404 405 for (i = (chip->dev_cfg->ngpios / 8) - 1; i >= 0; --i) { 406 err = sx150x_i2c_read(chip->client, 407 chip->dev_cfg->reg_irq_src - i, 408 &val); 409 if (err < 0) 410 continue; 411 412 sx150x_i2c_write(chip->client, 413 chip->dev_cfg->reg_irq_src - i, 414 val); 415 for (n = 0; n < 8; ++n) { 416 if (val & (1 << n)) { 417 sub_irq = irq_find_mapping( 418 chip->gpio_chip.irqdomain, 419 (i * 8) + n); 420 handle_nested_irq(sub_irq); 421 ++nhandled; 422 } 423 } 424 } 425 426 return (nhandled > 0 ? IRQ_HANDLED : IRQ_NONE); 427} 428 429static void sx150x_irq_bus_lock(struct irq_data *d) 430{ 431 struct sx150x_chip *chip = to_sx150x(irq_data_get_irq_chip_data(d)); 432 433 mutex_lock(&chip->lock); 434} 435 436static void sx150x_irq_bus_sync_unlock(struct irq_data *d) 437{ 438 struct sx150x_chip *chip = to_sx150x(irq_data_get_irq_chip_data(d)); 439 unsigned n; 440 441 if (chip->irq_update == NO_UPDATE_PENDING) 442 goto out; 443 444 n = chip->irq_update; 445 chip->irq_update = NO_UPDATE_PENDING; 446 447 /* Avoid updates if nothing changed */ 448 if (chip->dev_sense == chip->irq_sense && 449 chip->dev_masked == chip->irq_masked) 450 goto out; 451 452 chip->dev_sense = chip->irq_sense; 453 chip->dev_masked = chip->irq_masked; 454 455 if (chip->irq_masked & (1 << n)) { 456 sx150x_write_cfg(chip, n, 1, chip->dev_cfg->reg_irq_mask, 1); 457 sx150x_write_cfg(chip, n, 2, chip->dev_cfg->reg_sense, 0); 458 } else { 459 sx150x_write_cfg(chip, n, 1, chip->dev_cfg->reg_irq_mask, 0); 460 sx150x_write_cfg(chip, n, 2, chip->dev_cfg->reg_sense, 461 chip->irq_sense >> (n * 2)); 462 } 463out: 464 mutex_unlock(&chip->lock); 465} 466 467static void sx150x_init_chip(struct sx150x_chip *chip, 468 struct i2c_client *client, 469 kernel_ulong_t driver_data, 470 struct sx150x_platform_data *pdata) 471{ 472 mutex_init(&chip->lock); 473 474 chip->client = client; 475 chip->dev_cfg = &sx150x_devices[driver_data]; 476 chip->gpio_chip.dev = &client->dev; 477 chip->gpio_chip.label = client->name; 478 chip->gpio_chip.direction_input = sx150x_gpio_direction_input; 479 chip->gpio_chip.direction_output = sx150x_gpio_direction_output; 480 chip->gpio_chip.get = sx150x_gpio_get; 481 chip->gpio_chip.set = sx150x_gpio_set; 482 chip->gpio_chip.base = pdata->gpio_base; 483 chip->gpio_chip.can_sleep = true; 484 chip->gpio_chip.ngpio = chip->dev_cfg->ngpios; 485#ifdef CONFIG_OF_GPIO 486 chip->gpio_chip.of_node = client->dev.of_node; 487 chip->gpio_chip.of_gpio_n_cells = 2; 488#endif 489 if (pdata->oscio_is_gpo) 490 ++chip->gpio_chip.ngpio; 491 492 chip->irq_chip.name = client->name; 493 chip->irq_chip.irq_mask = sx150x_irq_mask; 494 chip->irq_chip.irq_unmask = sx150x_irq_unmask; 495 chip->irq_chip.irq_set_type = sx150x_irq_set_type; 496 chip->irq_chip.irq_bus_lock = sx150x_irq_bus_lock; 497 chip->irq_chip.irq_bus_sync_unlock = sx150x_irq_bus_sync_unlock; 498 chip->irq_summary = -1; 499 chip->irq_base = -1; 500 chip->irq_masked = ~0; 501 chip->irq_sense = 0; 502 chip->dev_masked = ~0; 503 chip->dev_sense = 0; 504 chip->irq_update = NO_UPDATE_PENDING; 505} 506 507static int sx150x_init_io(struct sx150x_chip *chip, u8 base, u16 cfg) 508{ 509 int err = 0; 510 unsigned n; 511 512 for (n = 0; err >= 0 && n < (chip->dev_cfg->ngpios / 8); ++n) 513 err = sx150x_i2c_write(chip->client, base - n, cfg >> (n * 8)); 514 return err; 515} 516 517static int sx150x_reset(struct sx150x_chip *chip) 518{ 519 int err; 520 521 err = i2c_smbus_write_byte_data(chip->client, 522 chip->dev_cfg->pri.x789.reg_reset, 523 0x12); 524 if (err < 0) 525 return err; 526 527 err = i2c_smbus_write_byte_data(chip->client, 528 chip->dev_cfg->pri.x789.reg_reset, 529 0x34); 530 return err; 531} 532 533static int sx150x_init_hw(struct sx150x_chip *chip, 534 struct sx150x_platform_data *pdata) 535{ 536 int err = 0; 537 538 if (pdata->reset_during_probe) { 539 err = sx150x_reset(chip); 540 if (err < 0) 541 return err; 542 } 543 544 if (chip->dev_cfg->model == SX150X_789) 545 err = sx150x_i2c_write(chip->client, 546 chip->dev_cfg->pri.x789.reg_misc, 547 0x01); 548 else 549 err = sx150x_i2c_write(chip->client, 550 chip->dev_cfg->pri.x456.reg_advance, 551 0x04); 552 if (err < 0) 553 return err; 554 555 err = sx150x_init_io(chip, chip->dev_cfg->reg_pullup, 556 pdata->io_pullup_ena); 557 if (err < 0) 558 return err; 559 560 err = sx150x_init_io(chip, chip->dev_cfg->reg_pulldn, 561 pdata->io_pulldn_ena); 562 if (err < 0) 563 return err; 564 565 if (chip->dev_cfg->model == SX150X_789) { 566 err = sx150x_init_io(chip, 567 chip->dev_cfg->pri.x789.reg_drain, 568 pdata->io_open_drain_ena); 569 if (err < 0) 570 return err; 571 572 err = sx150x_init_io(chip, 573 chip->dev_cfg->pri.x789.reg_polarity, 574 pdata->io_polarity); 575 if (err < 0) 576 return err; 577 } else { 578 /* Set all pins to work in normal mode */ 579 err = sx150x_init_io(chip, 580 chip->dev_cfg->pri.x456.reg_pld_mode, 581 0); 582 if (err < 0) 583 return err; 584 } 585 586 587 if (pdata->oscio_is_gpo) 588 sx150x_set_oscio(chip, 0); 589 590 return err; 591} 592 593static int sx150x_install_irq_chip(struct sx150x_chip *chip, 594 int irq_summary, 595 int irq_base) 596{ 597 int err; 598 599 chip->irq_summary = irq_summary; 600 chip->irq_base = irq_base; 601 602 /* Add gpio chip to irq subsystem */ 603 err = gpiochip_irqchip_add(&chip->gpio_chip, 604 &chip->irq_chip, chip->irq_base, 605 handle_edge_irq, IRQ_TYPE_EDGE_BOTH); 606 if (err) { 607 dev_err(&chip->client->dev, 608 "could not connect irqchip to gpiochip\n"); 609 return err; 610 } 611 612 err = devm_request_threaded_irq(&chip->client->dev, 613 irq_summary, NULL, sx150x_irq_thread_fn, 614 IRQF_ONESHOT | IRQF_SHARED | IRQF_TRIGGER_FALLING, 615 chip->irq_chip.name, chip); 616 if (err < 0) { 617 chip->irq_summary = -1; 618 chip->irq_base = -1; 619 } 620 621 return err; 622} 623 624static int sx150x_probe(struct i2c_client *client, 625 const struct i2c_device_id *id) 626{ 627 static const u32 i2c_funcs = I2C_FUNC_SMBUS_BYTE_DATA | 628 I2C_FUNC_SMBUS_WRITE_WORD_DATA; 629 struct sx150x_platform_data *pdata; 630 struct sx150x_chip *chip; 631 int rc; 632 633 pdata = dev_get_platdata(&client->dev); 634 if (!pdata) 635 return -EINVAL; 636 637 if (!i2c_check_functionality(client->adapter, i2c_funcs)) 638 return -ENOSYS; 639 640 chip = devm_kzalloc(&client->dev, 641 sizeof(struct sx150x_chip), GFP_KERNEL); 642 if (!chip) 643 return -ENOMEM; 644 645 sx150x_init_chip(chip, client, id->driver_data, pdata); 646 rc = sx150x_init_hw(chip, pdata); 647 if (rc < 0) 648 return rc; 649 650 rc = gpiochip_add(&chip->gpio_chip); 651 if (rc) 652 return rc; 653 654 if (pdata->irq_summary >= 0) { 655 rc = sx150x_install_irq_chip(chip, 656 pdata->irq_summary, 657 pdata->irq_base); 658 if (rc < 0) 659 goto probe_fail_post_gpiochip_add; 660 } 661 662 i2c_set_clientdata(client, chip); 663 664 return 0; 665probe_fail_post_gpiochip_add: 666 gpiochip_remove(&chip->gpio_chip); 667 return rc; 668} 669 670static int sx150x_remove(struct i2c_client *client) 671{ 672 struct sx150x_chip *chip; 673 674 chip = i2c_get_clientdata(client); 675 gpiochip_remove(&chip->gpio_chip); 676 677 return 0; 678} 679 680static struct i2c_driver sx150x_driver = { 681 .driver = { 682 .name = "sx150x", 683 .owner = THIS_MODULE, 684 .of_match_table = of_match_ptr(sx150x_of_match), 685 }, 686 .probe = sx150x_probe, 687 .remove = sx150x_remove, 688 .id_table = sx150x_id, 689}; 690 691static int __init sx150x_init(void) 692{ 693 return i2c_add_driver(&sx150x_driver); 694} 695subsys_initcall(sx150x_init); 696 697static void __exit sx150x_exit(void) 698{ 699 return i2c_del_driver(&sx150x_driver); 700} 701module_exit(sx150x_exit); 702 703MODULE_AUTHOR("Gregory Bean <gbean@codeaurora.org>"); 704MODULE_DESCRIPTION("Driver for Semtech SX150X I2C GPIO Expanders"); 705MODULE_LICENSE("GPL v2"); 706