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Searched refs:mask (Results 1 – 200 of 4543) sorted by relevance

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/linux-4.1.27/drivers/mfd/
Dsec-irq.c30 .mask = S2MPS11_IRQ_PWRONF_MASK,
34 .mask = S2MPS11_IRQ_PWRONR_MASK,
38 .mask = S2MPS11_IRQ_JIGONBF_MASK,
42 .mask = S2MPS11_IRQ_JIGONBR_MASK,
46 .mask = S2MPS11_IRQ_ACOKBF_MASK,
50 .mask = S2MPS11_IRQ_ACOKBR_MASK,
54 .mask = S2MPS11_IRQ_PWRON1S_MASK,
58 .mask = S2MPS11_IRQ_MRB_MASK,
62 .mask = S2MPS11_IRQ_RTC60S_MASK,
66 .mask = S2MPS11_IRQ_RTCA1_MASK,
[all …]
Dda9063-irq.c34 u8 mask; member
41 .mask = DA9063_M_ONKEY,
45 .mask = DA9063_M_ALARM,
49 .mask = DA9063_M_TICK,
53 .mask = DA9063_M_ADC_RDY,
57 .mask = DA9063_M_SEQ_RDY,
62 .mask = DA9063_M_WAKE,
66 .mask = DA9063_M_TEMP,
70 .mask = DA9063_M_COMP_1V2,
74 .mask = DA9063_M_LDO_LIM,
[all …]
Dwm8350-irq.c42 int mask; member
50 .mask = WM8350_OC_LS_EINT,
56 .mask = WM8350_UV_DC1_EINT,
61 .mask = WM8350_UV_DC2_EINT,
66 .mask = WM8350_UV_DC3_EINT,
71 .mask = WM8350_UV_DC4_EINT,
76 .mask = WM8350_UV_DC5_EINT,
81 .mask = WM8350_UV_DC6_EINT,
86 .mask = WM8350_UV_LDO1_EINT,
91 .mask = WM8350_UV_LDO2_EINT,
[all …]
Dda9052-irq.c41 .mask = DA9052_IRQ_MASK_POS_1,
45 .mask = DA9052_IRQ_MASK_POS_2,
49 .mask = DA9052_IRQ_MASK_POS_3,
53 .mask = DA9052_IRQ_MASK_POS_4,
57 .mask = DA9052_IRQ_MASK_POS_5,
61 .mask = DA9052_IRQ_MASK_POS_6,
65 .mask = DA9052_IRQ_MASK_POS_7,
69 .mask = DA9052_IRQ_MASK_POS_8,
73 .mask = DA9052_IRQ_MASK_POS_1,
77 .mask = DA9052_IRQ_MASK_POS_2,
[all …]
Dwm831x-irq.c33 int mask; member
40 .mask = WM831X_TEMP_THW_EINT,
45 .mask = WM831X_GP1_EINT,
50 .mask = WM831X_GP2_EINT,
55 .mask = WM831X_GP3_EINT,
60 .mask = WM831X_GP4_EINT,
65 .mask = WM831X_GP5_EINT,
70 .mask = WM831X_GP6_EINT,
75 .mask = WM831X_GP7_EINT,
80 .mask = WM831X_GP8_EINT,
[all …]
Dpalmas.c52 .mask = TPS65917_RESERVED,
55 .mask = TPS65917_INT1_STATUS_PWRON,
58 .mask = TPS65917_INT1_STATUS_LONG_PRESS_KEY,
61 .mask = TPS65917_RESERVED,
64 .mask = TPS65917_INT1_STATUS_PWRDOWN,
67 .mask = TPS65917_INT1_STATUS_HOTDIE,
70 .mask = TPS65917_INT1_STATUS_VSYS_MON,
73 .mask = TPS65917_RESERVED,
77 .mask = TPS65917_RESERVED,
81 .mask = TPS65917_INT2_STATUS_OTP_ERROR,
[all …]
Dwm8994-irq.c34 .mask = WM8994_TEMP_SHUT_EINT,
38 .mask = WM8994_MIC1_DET_EINT,
42 .mask = WM8994_MIC1_SHRT_EINT,
46 .mask = WM8994_MIC2_DET_EINT,
50 .mask = WM8994_MIC2_SHRT_EINT,
54 .mask = WM8994_FLL1_LOCK_EINT,
58 .mask = WM8994_FLL2_LOCK_EINT,
62 .mask = WM8994_SRC1_LOCK_EINT,
66 .mask = WM8994_SRC2_LOCK_EINT,
70 .mask = WM8994_AIF1DRC1_SIG_DET,
[all …]
Dwm5110-tables.c276 .mask = ARIZONA_MICD_CLAMP_FALL_EINT1
279 .mask = ARIZONA_MICD_CLAMP_RISE_EINT1
281 [ARIZONA_IRQ_GP5_FALL] = { .mask = ARIZONA_GP5_FALL_EINT1 },
282 [ARIZONA_IRQ_GP5_RISE] = { .mask = ARIZONA_GP5_RISE_EINT1 },
283 [ARIZONA_IRQ_JD_FALL] = { .mask = ARIZONA_JD1_FALL_EINT1 },
284 [ARIZONA_IRQ_JD_RISE] = { .mask = ARIZONA_JD1_RISE_EINT1 },
301 [ARIZONA_IRQ_GP4] = { .reg_offset = 0, .mask = ARIZONA_GP4_EINT1 },
302 [ARIZONA_IRQ_GP3] = { .reg_offset = 0, .mask = ARIZONA_GP3_EINT1 },
303 [ARIZONA_IRQ_GP2] = { .reg_offset = 0, .mask = ARIZONA_GP2_EINT1 },
304 [ARIZONA_IRQ_GP1] = { .reg_offset = 0, .mask = ARIZONA_GP1_EINT1 },
[all …]
Das3722.c85 .mask = AS3722_INTERRUPT_MASK1_LID,
88 .mask = AS3722_INTERRUPT_MASK1_ACOK,
91 .mask = AS3722_INTERRUPT_MASK1_ENABLE1,
94 .mask = AS3722_INTERRUPT_MASK1_OCURR_ALARM_SD0,
97 .mask = AS3722_INTERRUPT_MASK1_ONKEY_LONG,
100 .mask = AS3722_INTERRUPT_MASK1_ONKEY,
103 .mask = AS3722_INTERRUPT_MASK1_OVTMP,
106 .mask = AS3722_INTERRUPT_MASK1_LOWBAT,
111 .mask = AS3722_INTERRUPT_MASK2_SD0_LV,
115 .mask = AS3722_INTERRUPT_MASK2_SD1_LV,
[all …]
Dtps65910.c60 .mask = INT_MSK_PWRHOLD_F_IT_MSK_MASK,
64 .mask = INT_MSK_VMBHI_IT_MSK_MASK,
68 .mask = INT_MSK_PWRON_IT_MSK_MASK,
72 .mask = INT_MSK_PWRON_LP_IT_MSK_MASK,
76 .mask = INT_MSK_PWRHOLD_R_IT_MSK_MASK,
80 .mask = INT_MSK_HOTDIE_IT_MSK_MASK,
84 .mask = INT_MSK_RTC_ALARM_IT_MSK_MASK,
88 .mask = INT_MSK_RTC_PERIOD_IT_MSK_MASK,
94 .mask = INT_MSK2_GPIO0_R_IT_MSK_MASK,
98 .mask = INT_MSK2_GPIO0_F_IT_MSK_MASK,
[all …]
Dmax77693.c68 { .mask = LED_IRQ_FLED2_OPEN, },
69 { .mask = LED_IRQ_FLED2_SHORT, },
70 { .mask = LED_IRQ_FLED1_OPEN, },
71 { .mask = LED_IRQ_FLED1_SHORT, },
72 { .mask = LED_IRQ_MAX_FLASH, },
86 { .mask = TOPSYS_IRQ_T120C_INT, },
87 { .mask = TOPSYS_IRQ_T140C_INT, },
88 { .mask = TOPSYS_IRQ_LOWSYS_INT, },
102 { .mask = CHG_IRQ_BYP_I, },
103 { .mask = CHG_IRQ_THM_I, },
[all …]
Dmax8998-irq.c22 int mask; member
28 .mask = MAX8998_IRQ_DCINF_MASK,
32 .mask = MAX8998_IRQ_DCINR_MASK,
36 .mask = MAX8998_IRQ_JIGF_MASK,
40 .mask = MAX8998_IRQ_JIGR_MASK,
44 .mask = MAX8998_IRQ_PWRONF_MASK,
48 .mask = MAX8998_IRQ_PWRONR_MASK,
52 .mask = MAX8998_IRQ_WTSREVNT_MASK,
56 .mask = MAX8998_IRQ_SMPLEVNT_MASK,
60 .mask = MAX8998_IRQ_ALARM1_MASK,
[all …]
Dtps65218.c91 unsigned int mask, unsigned int val, unsigned int level) in tps65218_update_bits() argument
102 data &= ~mask; in tps65218_update_bits()
103 data |= val & mask; in tps65218_update_bits()
115 unsigned int mask, unsigned int val, unsigned int level) in tps65218_set_bits() argument
117 return tps65218_update_bits(tps, reg, mask, val, level); in tps65218_set_bits()
122 unsigned int mask, unsigned int level) in tps65218_clear_bits() argument
124 return tps65218_update_bits(tps, reg, mask, 0, level); in tps65218_clear_bits()
148 .mask = TPS65218_INT1_PRGC,
151 .mask = TPS65218_INT1_CC_AQC,
154 .mask = TPS65218_INT1_HOT,
[all …]
Dmax8907.c119 { .reg_offset = 0, .mask = 1 << 0, },
120 { .reg_offset = 0, .mask = 1 << 1, },
121 { .reg_offset = 0, .mask = 1 << 2, },
122 { .reg_offset = 1, .mask = 1 << 0, },
123 { .reg_offset = 1, .mask = 1 << 1, },
124 { .reg_offset = 1, .mask = 1 << 2, },
125 { .reg_offset = 1, .mask = 1 << 3, },
126 { .reg_offset = 1, .mask = 1 << 4, },
127 { .reg_offset = 1, .mask = 1 << 5, },
128 { .reg_offset = 1, .mask = 1 << 6, },
[all …]
Dda9150-core.c134 void da9150_set_bits(struct da9150 *da9150, u16 reg, u8 mask, u8 val) in da9150_set_bits() argument
138 ret = regmap_update_bits(da9150->regmap, reg, mask, val); in da9150_set_bits()
170 .mask = DA9150_E_VBUS_MASK,
174 .mask = DA9150_E_CHG_MASK,
178 .mask = DA9150_E_TCLASS_MASK,
182 .mask = DA9150_E_TJUNC_MASK,
186 .mask = DA9150_E_VFAULT_MASK,
190 .mask = DA9150_E_CONF_MASK,
194 .mask = DA9150_E_DAT_MASK,
198 .mask = DA9150_E_DTYPE_MASK,
[all …]
Dmax14577.c203 { .reg_offset = 0, .mask = MAX14577_INT1_ADC_MASK, },
204 { .reg_offset = 0, .mask = MAX14577_INT1_ADCLOW_MASK, },
205 { .reg_offset = 0, .mask = MAX14577_INT1_ADCERR_MASK, },
207 { .reg_offset = 1, .mask = MAX14577_INT2_CHGTYP_MASK, },
208 { .reg_offset = 1, .mask = MAX14577_INT2_CHGDETRUN_MASK, },
209 { .reg_offset = 1, .mask = MAX14577_INT2_DCDTMR_MASK, },
210 { .reg_offset = 1, .mask = MAX14577_INT2_DBCHG_MASK, },
211 { .reg_offset = 1, .mask = MAX14577_INT2_VBVOLT_MASK, },
213 { .reg_offset = 2, .mask = MAX14577_INT3_EOC_MASK, },
214 { .reg_offset = 2, .mask = MAX14577_INT3_CGMBC_MASK, },
[all …]
Dtps65090.c79 .mask = TPS65090_INT1_MASK_VAC_STATUS_CHANGE,
82 .mask = TPS65090_INT1_MASK_VSYS_STATUS_CHANGE,
85 .mask = TPS65090_INT1_MASK_BAT_STATUS_CHANGE,
88 .mask = TPS65090_INT1_MASK_CHARGING_STATUS_CHANGE,
91 .mask = TPS65090_INT1_MASK_CHARGING_COMPLETE,
94 .mask = TPS65090_INT1_MASK_OVERLOAD_DCDC1,
97 .mask = TPS65090_INT1_MASK_OVERLOAD_DCDC2,
102 .mask = TPS65090_INT2_MASK_OVERLOAD_DCDC3,
106 .mask = TPS65090_INT2_MASK_OVERLOAD_FET1,
110 .mask = TPS65090_INT2_MASK_OVERLOAD_FET2,
[all …]
D88pm805.c92 .mask = PM805_INT1_HP1_SHRT,
95 .mask = PM805_INT1_HP2_SHRT,
98 .mask = PM805_INT1_MIC_CONFLICT,
101 .mask = PM805_INT1_CLIP_FAULT,
104 .mask = PM805_INT1_LDO_OFF,
107 .mask = PM805_INT1_SRC_DPLL_LOCK,
112 .mask = PM805_INT2_MIC_DET,
116 .mask = PM805_INT2_SHRT_BTN_DET,
120 .mask = PM805_INT2_VOLM_BTN_DET,
124 .mask = PM805_INT2_VOLP_BTN_DET,
[all …]
Dwm5102-tables.c103 .mask = ARIZONA_MICD_CLAMP_FALL_EINT1
106 .mask = ARIZONA_MICD_CLAMP_RISE_EINT1
108 [ARIZONA_IRQ_GP5_FALL] = { .mask = ARIZONA_GP5_FALL_EINT1 },
109 [ARIZONA_IRQ_GP5_RISE] = { .mask = ARIZONA_GP5_RISE_EINT1 },
110 [ARIZONA_IRQ_JD_FALL] = { .mask = ARIZONA_JD1_FALL_EINT1 },
111 [ARIZONA_IRQ_JD_RISE] = { .mask = ARIZONA_JD1_RISE_EINT1 },
127 [ARIZONA_IRQ_GP4] = { .reg_offset = 0, .mask = ARIZONA_GP4_EINT1 },
128 [ARIZONA_IRQ_GP3] = { .reg_offset = 0, .mask = ARIZONA_GP3_EINT1 },
129 [ARIZONA_IRQ_GP2] = { .reg_offset = 0, .mask = ARIZONA_GP2_EINT1 },
130 [ARIZONA_IRQ_GP1] = { .reg_offset = 0, .mask = ARIZONA_GP1_EINT1 },
[all …]
D88pm800.c170 .mask = PM800_ONKEY_INT_ENA1,
173 .mask = PM800_EXTON_INT_ENA1,
176 .mask = PM800_CHG_INT_ENA1,
179 .mask = PM800_BAT_INT_ENA1,
182 .mask = PM800_RTC_INT_ENA1,
185 .mask = PM800_CLASSD_OC_INT_ENA1,
190 .mask = PM800_VBAT_INT_ENA2,
194 .mask = PM800_VSYS_INT_ENA2,
198 .mask = PM800_VCHG_INT_ENA2,
202 .mask = PM800_TINT_INT_ENA2,
[all …]
Dwm8997-tables.c45 [ARIZONA_IRQ_GP5_FALL] = { .mask = ARIZONA_GP5_FALL_EINT1 },
46 [ARIZONA_IRQ_GP5_RISE] = { .mask = ARIZONA_GP5_RISE_EINT1 },
47 [ARIZONA_IRQ_JD_FALL] = { .mask = ARIZONA_JD1_FALL_EINT1 },
48 [ARIZONA_IRQ_JD_RISE] = { .mask = ARIZONA_JD1_RISE_EINT1 },
63 [ARIZONA_IRQ_GP4] = { .reg_offset = 0, .mask = ARIZONA_GP4_EINT1 },
64 [ARIZONA_IRQ_GP3] = { .reg_offset = 0, .mask = ARIZONA_GP3_EINT1 },
65 [ARIZONA_IRQ_GP2] = { .reg_offset = 0, .mask = ARIZONA_GP2_EINT1 },
66 [ARIZONA_IRQ_GP1] = { .reg_offset = 0, .mask = ARIZONA_GP1_EINT1 },
69 .reg_offset = 2, .mask = ARIZONA_SPK_OVERHEAT_WARN_EINT1
72 .reg_offset = 2, .mask = ARIZONA_SPK_OVERHEAT_EINT1
[all …]
/linux-4.1.27/drivers/video/fbdev/riva/
Dnvreg.h31 #define MASKEXPAND(mask) BITMASK(1?mask,0?mask) argument
34 #define SetBF(mask,value) ((value) << (0?mask)) argument
35 #define GetBF(var,mask) (((unsigned)((var) & MASKEXPAND(mask))) >> (0?mask) ) argument
37 #define MaskAndSetBF(var,mask,value) (var)=(((var)&(~MASKEXPAND(mask)) \ argument
38 | SetBF(mask,value)))
51 #define DEVICE_DEF(device,mask,value) \ argument
52 SetBF(NV_##device##_##mask,NV_##device##_##mask##_##value)
53 #define DEVICE_VALUE(device,mask,value) SetBF(NV_##device##_##mask,value) argument
54 #define DEVICE_MASK(device,mask) MASKEXPAND(NV_##device##_##mask) argument
59 #define PDAC_Def(mask,value) DEVICE_DEF(PDAC,mask,value) argument
[all …]
/linux-4.1.27/include/sound/
Dpcm_params.h46 static inline void snd_mask_none(struct snd_mask *mask) in snd_mask_none() argument
48 memset(mask, 0, sizeof(*mask)); in snd_mask_none()
51 static inline void snd_mask_any(struct snd_mask *mask) in snd_mask_any() argument
53 memset(mask, 0xff, SNDRV_MASK_SIZE * sizeof(u_int32_t)); in snd_mask_any()
56 static inline int snd_mask_empty(const struct snd_mask *mask) in snd_mask_empty() argument
60 if (mask->bits[i]) in snd_mask_empty()
65 static inline unsigned int snd_mask_min(const struct snd_mask *mask) in snd_mask_min() argument
69 if (mask->bits[i]) in snd_mask_min()
70 return __ffs(mask->bits[i]) + (i << 5); in snd_mask_min()
75 static inline unsigned int snd_mask_max(const struct snd_mask *mask) in snd_mask_max() argument
[all …]
/linux-4.1.27/arch/frv/include/asm/
Dbitops.h30 unsigned long atomic_test_and_ANDNOT_mask(unsigned long mask, volatile unsigned long *v) in atomic_test_and_ANDNOT_mask() argument
45 : "NPr"(~mask) in atomic_test_and_ANDNOT_mask()
53 unsigned long atomic_test_and_OR_mask(unsigned long mask, volatile unsigned long *v) in atomic_test_and_OR_mask() argument
68 : "NPr"(mask) in atomic_test_and_OR_mask()
76 unsigned long atomic_test_and_XOR_mask(unsigned long mask, volatile unsigned long *v) in atomic_test_and_XOR_mask() argument
91 : "NPr"(mask) in atomic_test_and_XOR_mask()
100 extern unsigned long atomic_test_and_ANDNOT_mask(unsigned long mask, volatile unsigned long *v);
101 extern unsigned long atomic_test_and_OR_mask(unsigned long mask, volatile unsigned long *v);
102 extern unsigned long atomic_test_and_XOR_mask(unsigned long mask, volatile unsigned long *v);
106 #define atomic_clear_mask(mask, v) atomic_test_and_ANDNOT_mask((mask), (v)) argument
[all …]
/linux-4.1.27/drivers/video/fbdev/
Dc2p_core.h21 unsigned int shift, u32 mask) in _transp() argument
23 u32 t = (d[i1] ^ (d[i2] >> shift)) & mask; in _transp()
62 u32 mask = get_mask(n); in transp8() local
67 _transp(d, 0, 1, n, mask); in transp8()
69 _transp(d, 2, 3, n, mask); in transp8()
71 _transp(d, 4, 5, n, mask); in transp8()
73 _transp(d, 6, 7, n, mask); in transp8()
78 _transp(d, 0, 2, n, mask); in transp8()
79 _transp(d, 1, 3, n, mask); in transp8()
81 _transp(d, 4, 6, n, mask); in transp8()
[all …]
Datafb_iplan2p8.c114 u32 pval[4], v, v1, mask; in atafb_iplan2p8_copyarea() local
120 mask = 0xff00ff00; in atafb_iplan2p8_copyarea()
135 pval[0] = (*src32++ << 8) & mask; in atafb_iplan2p8_copyarea()
136 pval[1] = (*src32++ << 8) & mask; in atafb_iplan2p8_copyarea()
137 pval[2] = (*src32++ << 8) & mask; in atafb_iplan2p8_copyarea()
138 pval[3] = (*src32++ << 8) & mask; in atafb_iplan2p8_copyarea()
140 pval[0] = dst32[0] & mask; in atafb_iplan2p8_copyarea()
141 pval[1] = dst32[1] & mask; in atafb_iplan2p8_copyarea()
142 pval[2] = dst32[2] & mask; in atafb_iplan2p8_copyarea()
143 pval[3] = dst32[3] & mask; in atafb_iplan2p8_copyarea()
[all …]
Datafb_utils.h300 static inline void fill8_2col(u8 *dst, u8 fg, u8 bg, u32 mask) in fill8_2col() argument
306 mask |= mask << 8; in fill8_2col()
308 mask |= mask << 16; in fill8_2col()
310 tmp = (mask & fgm[0]) ^ bgm[0]; in fill8_2col()
318 tmp = (mask & fgm[1]) ^ bgm[1]; in fill8_2col()
374 static inline void memmove32_col(void *dst, void *src, u32 mask, u32 h, u32 bytes) in memmove32_col() argument
381 v = (*s++ & mask) | (*d & ~mask); in memmove32_col()
384 v = (*s++ & mask) | (*d & ~mask); in memmove32_col()
388 v = (*s++ & mask) | (*d & ~mask); in memmove32_col()
390 v = (*s++ & mask) | (*d & ~mask); in memmove32_col()
Datafb_iplan2p4.c107 u32 pval[4], v, v1, mask; in atafb_iplan2p4_copyarea() local
113 mask = 0xff00ff00; in atafb_iplan2p4_copyarea()
128 pval[0] = (*src32++ << 8) & mask; in atafb_iplan2p4_copyarea()
129 pval[1] = (*src32++ << 8) & mask; in atafb_iplan2p4_copyarea()
131 pval[0] = dst32[0] & mask; in atafb_iplan2p4_copyarea()
132 pval[1] = dst32[1] & mask; in atafb_iplan2p4_copyarea()
137 v1 = v & mask; in atafb_iplan2p4_copyarea()
141 v1 = v & mask; in atafb_iplan2p4_copyarea()
147 dst32[0] = (dst32[0] & mask) | pval[0]; in atafb_iplan2p4_copyarea()
148 dst32[1] = (dst32[1] & mask) | pval[1]; in atafb_iplan2p4_copyarea()
[all …]
/linux-4.1.27/arch/arm/mach-lpc32xx/
Dirq.c78 u32 mask; member
87 .mask = LPC32XX_CLKPWR_EXTSRC_GPI_08_BIT,
91 .mask = LPC32XX_CLKPWR_EXTSRC_GPI_09_BIT,
95 .mask = LPC32XX_CLKPWR_EXTSRC_GPI_19_BIT,
99 .mask = LPC32XX_CLKPWR_EXTSRC_GPI_07_BIT,
103 .mask = LPC32XX_CLKPWR_EXTSRC_GPI_00_BIT,
107 .mask = LPC32XX_CLKPWR_EXTSRC_GPI_01_BIT,
111 .mask = LPC32XX_CLKPWR_EXTSRC_GPI_02_BIT,
115 .mask = LPC32XX_CLKPWR_EXTSRC_GPI_03_BIT,
119 .mask = LPC32XX_CLKPWR_EXTSRC_GPI_04_BIT,
[all …]
/linux-4.1.27/arch/sparc/include/asm/
Dbitops_32.h21 unsigned long ___set_bit(unsigned long *addr, unsigned long mask);
22 unsigned long ___clear_bit(unsigned long *addr, unsigned long mask);
23 unsigned long ___change_bit(unsigned long *addr, unsigned long mask);
33 unsigned long *ADDR, mask; in test_and_set_bit() local
36 mask = 1 << (nr & 31); in test_and_set_bit()
38 return ___set_bit(ADDR, mask) != 0; in test_and_set_bit()
43 unsigned long *ADDR, mask; in set_bit() local
46 mask = 1 << (nr & 31); in set_bit()
48 (void) ___set_bit(ADDR, mask); in set_bit()
53 unsigned long *ADDR, mask; in test_and_clear_bit() local
[all …]
Dobio.h103 int mask; in bw_get_intr_mask() local
106 "=r" (mask) : in bw_get_intr_mask()
109 return mask; in bw_get_intr_mask()
112 static inline void bw_clear_intr_mask(int sbus_level, int mask) in bw_clear_intr_mask() argument
115 "r" (mask), in bw_clear_intr_mask()
179 unsigned mask; in cc_get_imsk() local
182 "=r" (mask) : in cc_get_imsk()
185 return mask; in cc_get_imsk()
188 static inline void cc_set_imsk(unsigned mask) in cc_set_imsk() argument
191 "r" (mask), in cc_set_imsk()
[all …]
/linux-4.1.27/arch/mips/lib/
Dbitops.c24 unsigned long mask; in __mips_set_bit() local
28 mask = 1UL << bit; in __mips_set_bit()
30 *a |= mask; in __mips_set_bit()
46 unsigned long mask; in __mips_clear_bit() local
50 mask = 1UL << bit; in __mips_clear_bit()
52 *a &= ~mask; in __mips_clear_bit()
68 unsigned long mask; in __mips_change_bit() local
72 mask = 1UL << bit; in __mips_change_bit()
74 *a ^= mask; in __mips_change_bit()
91 unsigned long mask; in __mips_test_and_set_bit() local
[all …]
/linux-4.1.27/arch/arm/mach-rpc/
Dirq.c12 unsigned int val, mask; in iomd_ack_irq_a() local
14 mask = 1 << d->irq; in iomd_ack_irq_a()
16 iomd_writeb(val & ~mask, IOMD_IRQMASKA); in iomd_ack_irq_a()
17 iomd_writeb(mask, IOMD_IRQCLRA); in iomd_ack_irq_a()
22 unsigned int val, mask; in iomd_mask_irq_a() local
24 mask = 1 << d->irq; in iomd_mask_irq_a()
26 iomd_writeb(val & ~mask, IOMD_IRQMASKA); in iomd_mask_irq_a()
31 unsigned int val, mask; in iomd_unmask_irq_a() local
33 mask = 1 << d->irq; in iomd_unmask_irq_a()
35 iomd_writeb(val | mask, IOMD_IRQMASKA); in iomd_unmask_irq_a()
[all …]
/linux-4.1.27/include/linux/
Dfsnotify.h29 static inline int fsnotify_parent(struct path *path, struct dentry *dentry, __u32 mask) in fsnotify_parent() argument
34 return __fsnotify_parent(path, dentry, mask); in fsnotify_parent()
38 static inline int fsnotify_perm(struct file *file, int mask) in fsnotify_perm() argument
47 if (!(mask & (MAY_READ | MAY_OPEN))) in fsnotify_perm()
49 if (mask & MAY_OPEN) in fsnotify_perm()
51 else if (mask & MAY_READ) in fsnotify_perm()
138 __u32 mask = FS_DELETE; in fsnotify_nameremove() local
141 mask |= FS_ISDIR; in fsnotify_nameremove()
143 fsnotify_parent(NULL, dentry, mask); in fsnotify_nameremove()
183 __u32 mask = (FS_CREATE | FS_ISDIR); in fsnotify_mkdir() local
[all …]
Dcpumask.h148 static inline unsigned int cpumask_any_but(const struct cpumask *mask, in cpumask_any_but() argument
159 #define for_each_cpu(cpu, mask) \ argument
160 for ((cpu) = 0; (cpu) < 1; (cpu)++, (void)mask)
161 #define for_each_cpu_not(cpu, mask) \ argument
162 for ((cpu) = 0; (cpu) < 1; (cpu)++, (void)mask)
163 #define for_each_cpu_and(cpu, mask, and) \ argument
164 for ((cpu) = 0; (cpu) < 1; (cpu)++, (void)mask, (void)and)
208 int cpumask_any_but(const struct cpumask *mask, unsigned int cpu);
218 #define for_each_cpu(cpu, mask) \ argument
220 (cpu) = cpumask_next((cpu), (mask)), \
[all …]
Dioprio.h14 #define IOPRIO_PRIO_CLASS(mask) ((mask) >> IOPRIO_CLASS_SHIFT) argument
15 #define IOPRIO_PRIO_DATA(mask) ((mask) & IOPRIO_PRIO_MASK) argument
18 #define ioprio_valid(mask) (IOPRIO_PRIO_CLASS((mask)) != IOPRIO_CLASS_NONE) argument
/linux-4.1.27/drivers/gpio/
Dgpio-vr41xx.c235 u16 mask; in vr41xx_set_irq_trigger() local
238 mask = 1 << pin; in vr41xx_set_irq_trigger()
240 giu_set(GIUINTTYPL, mask); in vr41xx_set_irq_trigger()
242 giu_set(GIUINTHTSELL, mask); in vr41xx_set_irq_trigger()
244 giu_clear(GIUINTHTSELL, mask); in vr41xx_set_irq_trigger()
248 giu_set(GIUFEDGEINHL, mask); in vr41xx_set_irq_trigger()
249 giu_clear(GIUREDGEINHL, mask); in vr41xx_set_irq_trigger()
252 giu_clear(GIUFEDGEINHL, mask); in vr41xx_set_irq_trigger()
253 giu_set(GIUREDGEINHL, mask); in vr41xx_set_irq_trigger()
256 giu_set(GIUFEDGEINHL, mask); in vr41xx_set_irq_trigger()
[all …]
Dgpio-sa1100.c79 unsigned int mask; in sa1100_gpio_type() local
81 mask = BIT(d->hwirq); in sa1100_gpio_type()
84 if ((GPIO_IRQ_rising_edge | GPIO_IRQ_falling_edge) & mask) in sa1100_gpio_type()
90 GPIO_IRQ_rising_edge |= mask; in sa1100_gpio_type()
92 GPIO_IRQ_rising_edge &= ~mask; in sa1100_gpio_type()
94 GPIO_IRQ_falling_edge |= mask; in sa1100_gpio_type()
96 GPIO_IRQ_falling_edge &= ~mask; in sa1100_gpio_type()
114 unsigned int mask = BIT(d->hwirq); in sa1100_gpio_mask() local
116 GPIO_IRQ_mask &= ~mask; in sa1100_gpio_mask()
118 GRER &= ~mask; in sa1100_gpio_mask()
[all …]
Dgpio-loongson.c40 u32 mask; in loongson_gpio_direction_input() local
43 mask = 1 << gpio; in loongson_gpio_direction_input()
45 temp |= mask; in loongson_gpio_direction_input()
56 u32 mask; in loongson_gpio_direction_output() local
60 mask = 1 << gpio; in loongson_gpio_direction_output()
62 temp &= (~mask); in loongson_gpio_direction_output()
72 u32 mask; in loongson_gpio_get_value() local
74 mask = 1 << (gpio + LOONGSON_GPIO_IN_OFFSET); in loongson_gpio_get_value()
79 return (val & mask) != 0; in loongson_gpio_get_value()
86 u32 mask; in loongson_gpio_set_value() local
[all …]
Dgpio-stmpe.c49 u8 mask = 1 << (offset % 8); in stmpe_gpio_get() local
56 return !!(ret & mask); in stmpe_gpio_get()
65 u8 mask = 1 << (offset % 8); in stmpe_gpio_set() local
72 stmpe_set_bits(stmpe, reg, mask, val ? mask : 0); in stmpe_gpio_set()
74 stmpe_reg_write(stmpe, reg, mask); in stmpe_gpio_set()
83 u8 mask = 1 << (offset % 8); in stmpe_gpio_direction_output() local
87 return stmpe_set_bits(stmpe, reg, mask, mask); in stmpe_gpio_direction_output()
96 u8 mask = 1 << (offset % 8); in stmpe_gpio_direction_input() local
98 return stmpe_set_bits(stmpe, reg, mask, 0); in stmpe_gpio_direction_input()
129 int mask = 1 << (offset % 8); in stmpe_gpio_irq_set_type() local
[all …]
/linux-4.1.27/arch/sh/include/asm/
Dbitops-llsc.h6 int mask; in set_bit() local
11 mask = 1 << (nr & 0x1f); in set_bit()
20 : "r" (a), "r" (mask) in set_bit()
27 int mask; in clear_bit() local
32 mask = 1 << (nr & 0x1f); in clear_bit()
41 : "r" (a), "r" (~mask) in clear_bit()
48 int mask; in change_bit() local
53 mask = 1 << (nr & 0x1f); in change_bit()
62 : "r" (a), "r" (mask) in change_bit()
69 int mask, retval; in test_and_set_bit() local
[all …]
Dbitops-grb.h6 int mask; in set_bit() local
11 mask = 1 << (nr & 0x1f); in set_bit()
24 : "r" (mask) in set_bit()
30 int mask; in clear_bit() local
35 mask = ~(1 << (nr & 0x1f)); in clear_bit()
47 : "r" (mask) in clear_bit()
53 int mask; in change_bit() local
58 mask = 1 << (nr & 0x1f); in change_bit()
70 : "r" (mask) in change_bit()
76 int mask, retval; in test_and_set_bit() local
[all …]
Dbitops-op32.h30 unsigned long mask = BIT_MASK(nr); in __set_bit() local
33 *p |= mask; in __set_bit()
48 unsigned long mask = BIT_MASK(nr); in __clear_bit() local
51 *p &= ~mask; in __clear_bit()
75 unsigned long mask = BIT_MASK(nr); in __change_bit() local
78 *p ^= mask; in __change_bit()
93 unsigned long mask = BIT_MASK(nr); in __test_and_set_bit() local
97 *p = old | mask; in __test_and_set_bit()
98 return (old & mask) != 0; in __test_and_set_bit()
112 unsigned long mask = BIT_MASK(nr); in __test_and_clear_bit() local
[all …]
Dword-at-a-time.h17 static inline long count_masked_bytes(long mask) in count_masked_bytes() argument
20 long a = (0x0ff0001+mask) >> 23; in count_masked_bytes()
22 return a & mask; in count_masked_bytes()
28 unsigned long mask = ((a - c->one_bits) & ~a) & c->high_bits; in has_zero() local
29 *bits = mask; in has_zero()
30 return mask; in has_zero()
45 #define zero_bytemask(mask) (mask) argument
47 static inline unsigned long find_zero(unsigned long mask) in find_zero() argument
49 return count_masked_bytes(mask); in find_zero()
/linux-4.1.27/arch/m32r/include/asm/
Dsmp.h16 unsigned long mask[PHYSID_ARRAY_SIZE]; member
21 #define physid_set(physid, map) set_bit(physid, (map).mask)
22 #define physid_clear(physid, map) clear_bit(physid, (map).mask)
23 #define physid_isset(physid, map) test_bit(physid, (map).mask)
24 #define physid_test_and_set(physid, map) test_and_set_bit(physid, (map).mask)
26 #define physids_and(dst, src1, src2) bitmap_and((dst).mask, (src1).mask, (src2).mask, MA…
27 #define physids_or(dst, src1, src2) bitmap_or((dst).mask, (src1).mask, (src2).mask, MAX…
28 #define physids_clear(map) bitmap_zero((map).mask, MAX_APICS)
29 #define physids_complement(dst, src) bitmap_complement((dst).mask,(src).mask, MAX_APICS)
30 #define physids_empty(map) bitmap_empty((map).mask, MAX_APICS)
[all …]
Dbitops.h46 __u32 mask; in set_bit() local
52 mask = (1 << (nr & 0x1F)); in set_bit()
61 : "r" (a), "r" (mask) in set_bit()
82 __u32 mask; in clear_bit() local
88 mask = (1 << (nr & 0x1F)); in clear_bit()
98 : "r" (a), "r" (~mask) in clear_bit()
118 __u32 mask; in change_bit() local
124 mask = (1 << (nr & 0x1F)); in change_bit()
133 : "r" (a), "r" (mask) in change_bit()
152 __u32 mask, oldbit; in test_and_set_bit() local
[all …]
/linux-4.1.27/arch/arm/mach-ixp4xx/
Dixp4xx_qmgr.c119 u32 mask = 1 << (queue & (HALF_QUEUES - 1)); in qmgr_enable_irq() local
122 __raw_writel(__raw_readl(&qmgr_regs->irqen[half]) | mask, in qmgr_enable_irq()
131 u32 mask = 1 << (queue & (HALF_QUEUES - 1)); in qmgr_disable_irq() local
134 __raw_writel(__raw_readl(&qmgr_regs->irqen[half]) & ~mask, in qmgr_disable_irq()
136 __raw_writel(mask, &qmgr_regs->irqstat[half]); /* clear */ in qmgr_disable_irq()
140 static inline void shift_mask(u32 *mask) in shift_mask() argument
142 mask[3] = mask[3] << 1 | mask[2] >> 31; in shift_mask()
143 mask[2] = mask[2] << 1 | mask[1] >> 31; in shift_mask()
144 mask[1] = mask[1] << 1 | mask[0] >> 31; in shift_mask()
145 mask[0] <<= 1; in shift_mask()
[all …]
/linux-4.1.27/drivers/memory/tegra/
Dtegra124.c34 .mask = 0xff,
48 .mask = 0xff,
62 .mask = 0xff,
76 .mask = 0xff,
90 .mask = 0xff,
104 .mask = 0xff,
118 .mask = 0xff,
132 .mask = 0xff,
146 .mask = 0xff,
160 .mask = 0xff,
[all …]
Dtegra30.c34 .mask = 0xff,
48 .mask = 0xff,
62 .mask = 0xff,
76 .mask = 0xff,
90 .mask = 0xff,
104 .mask = 0xff,
118 .mask = 0xff,
132 .mask = 0xff,
146 .mask = 0xff,
160 .mask = 0xff,
[all …]
Dtegra114.c34 .mask = 0xff,
48 .mask = 0xff,
62 .mask = 0xff,
76 .mask = 0xff,
90 .mask = 0xff,
104 .mask = 0xff,
118 .mask = 0xff,
132 .mask = 0xff,
146 .mask = 0xff,
160 .mask = 0xff,
[all …]
/linux-4.1.27/include/uapi/linux/iio/
Devents.h28 #define IIO_EVENT_CODE_EXTRACT_TYPE(mask) ((mask >> 56) & 0xFF) argument
30 #define IIO_EVENT_CODE_EXTRACT_DIR(mask) ((mask >> 48) & 0x7F) argument
32 #define IIO_EVENT_CODE_EXTRACT_CHAN_TYPE(mask) ((mask >> 32) & 0xFF) argument
36 #define IIO_EVENT_CODE_EXTRACT_CHAN(mask) ((__s16)(mask & 0xFFFF)) argument
37 #define IIO_EVENT_CODE_EXTRACT_CHAN2(mask) ((__s16)(((mask) >> 16) & 0xFFFF)) argument
39 #define IIO_EVENT_CODE_EXTRACT_MODIFIER(mask) ((mask >> 40) & 0xFF) argument
40 #define IIO_EVENT_CODE_EXTRACT_DIFF(mask) (((mask) >> 55) & 0x1) argument
/linux-4.1.27/drivers/media/pci/ivtv/
Divtv-gpio.c161 u16 mask, data; in subdev_s_clock_freq() local
163 mask = itv->card->gpio_audio_freq.mask; in subdev_s_clock_freq()
176 if (mask) in subdev_s_clock_freq()
177 write_reg((read_reg(IVTV_REG_GPIO_OUT) & ~mask) | (data & mask), IVTV_REG_GPIO_OUT); in subdev_s_clock_freq()
184 u16 mask; in subdev_g_tuner() local
186 mask = itv->card->gpio_audio_detect.mask; in subdev_g_tuner()
187 if (mask == 0 || (read_reg(IVTV_REG_GPIO_IN) & mask)) in subdev_g_tuner()
198 u16 mask, data; in subdev_s_tuner() local
200 mask = itv->card->gpio_audio_mode.mask; in subdev_s_tuner()
217 if (mask) in subdev_s_tuner()
[all …]
/linux-4.1.27/arch/x86/include/asm/
Dmpspec.h93 unsigned long mask[PHYSID_ARRAY_SIZE]; member
98 #define physid_set(physid, map) set_bit(physid, (map).mask)
99 #define physid_clear(physid, map) clear_bit(physid, (map).mask)
100 #define physid_isset(physid, map) test_bit(physid, (map).mask)
102 test_and_set_bit(physid, (map).mask)
105 bitmap_and((dst).mask, (src1).mask, (src2).mask, MAX_LOCAL_APIC)
108 bitmap_or((dst).mask, (src1).mask, (src2).mask, MAX_LOCAL_APIC)
111 bitmap_zero((map).mask, MAX_LOCAL_APIC)
114 bitmap_complement((dst).mask, (src).mask, MAX_LOCAL_APIC)
117 bitmap_empty((map).mask, MAX_LOCAL_APIC)
[all …]
Dword-at-a-time.h27 static inline long count_masked_bytes(unsigned long mask) in count_masked_bytes() argument
29 return mask*0x0001020304050608ul >> 56; in count_masked_bytes()
35 static inline long count_masked_bytes(long mask) in count_masked_bytes() argument
38 long a = (0x0ff0001+mask) >> 23; in count_masked_bytes()
40 return a & mask; in count_masked_bytes()
48 unsigned long mask = ((a - c->one_bits) & ~a) & c->high_bits; in has_zero() local
49 *bits = mask; in has_zero()
50 return mask; in has_zero()
65 #define zero_bytemask(mask) (mask) argument
67 static inline unsigned long find_zero(unsigned long mask) in find_zero() argument
[all …]
Dxsave.h74 static inline int xsave_state_booting(struct xsave_struct *fx, u64 mask) in xsave_state_booting() argument
76 u32 lmask = mask; in xsave_state_booting()
77 u32 hmask = mask >> 32; in xsave_state_booting()
101 static inline int xrstor_state_booting(struct xsave_struct *fx, u64 mask) in xrstor_state_booting() argument
103 u32 lmask = mask; in xrstor_state_booting()
104 u32 hmask = mask >> 32; in xrstor_state_booting()
127 static inline int xsave_state(struct xsave_struct *fx, u64 mask) in xsave_state() argument
129 u32 lmask = mask; in xsave_state()
130 u32 hmask = mask >> 32; in xsave_state()
163 static inline int xrstor_state(struct xsave_struct *fx, u64 mask) in xrstor_state() argument
[all …]
Dipi.h49 static inline int __prepare_ICR2(unsigned int mask) in __prepare_ICR2() argument
51 return SET_APIC_DEST_FIELD(mask); in __prepare_ICR2()
93 __default_send_IPI_dest_field(unsigned int mask, int vector, unsigned int dest) in __default_send_IPI_dest_field() argument
108 cfg = __prepare_ICR2(mask); in __default_send_IPI_dest_field()
122 extern void default_send_IPI_mask_sequence_phys(const struct cpumask *mask,
124 extern void default_send_IPI_mask_allbutself_phys(const struct cpumask *mask,
149 extern void default_send_IPI_mask_sequence_logical(const struct cpumask *mask,
151 extern void default_send_IPI_mask_allbutself_logical(const struct cpumask *mask,
153 extern void default_send_IPI_mask_logical(const struct cpumask *mask,
Dtlbflush.h39 static inline void cr4_set_bits(unsigned long mask) in cr4_set_bits() argument
44 if ((cr4 | mask) != cr4) { in cr4_set_bits()
45 cr4 |= mask; in cr4_set_bits()
52 static inline void cr4_clear_bits(unsigned long mask) in cr4_clear_bits() argument
57 if ((cr4 & ~mask) != cr4) { in cr4_clear_bits()
58 cr4 &= ~mask; in cr4_clear_bits()
79 static inline void cr4_set_bits_and_update_boot(unsigned long mask) in cr4_set_bits_and_update_boot() argument
81 mmu_cr4_features |= mask; in cr4_set_bits_and_update_boot()
84 cr4_set_bits(mask); in cr4_set_bits_and_update_boot()
265 #define flush_tlb_others(mask, mm, start, end) \ argument
[all …]
/linux-4.1.27/fs/ocfs2/cluster/
Dmasklog.h134 #define __mlog_test_u64(mask, bits) \ argument
135 ( (u32)(mask & 0xffffffff) & bits.words[0] || \
136 ((u64)(mask) >> 32) & bits.words[1] )
137 #define __mlog_set_u64(mask, bits) do { \ argument
138 bits.words[0] |= (u32)(mask & 0xffffffff); \
139 bits.words[1] |= (u64)(mask) >> 32; \
141 #define __mlog_clear_u64(mask, bits) do { \ argument
142 bits.words[0] &= ~((u32)(mask & 0xffffffff)); \
143 bits.words[1] &= ~((u64)(mask) >> 32); \
145 #define MLOG_BITS_RHS(mask) { \ argument
[all …]
Dmasklog.c36 static ssize_t mlog_mask_show(u64 mask, char *buf) in mlog_mask_show() argument
40 if (__mlog_test_u64(mask, mlog_and_bits)) in mlog_mask_show()
42 else if (__mlog_test_u64(mask, mlog_not_bits)) in mlog_mask_show()
50 static ssize_t mlog_mask_store(u64 mask, const char *buf, size_t count) in mlog_mask_store() argument
53 __mlog_set_u64(mask, mlog_and_bits); in mlog_mask_store()
54 __mlog_clear_u64(mask, mlog_not_bits); in mlog_mask_store()
56 __mlog_set_u64(mask, mlog_not_bits); in mlog_mask_store()
57 __mlog_clear_u64(mask, mlog_and_bits); in mlog_mask_store()
59 __mlog_clear_u64(mask, mlog_not_bits); in mlog_mask_store()
60 __mlog_clear_u64(mask, mlog_and_bits); in mlog_mask_store()
[all …]
/linux-4.1.27/tools/testing/selftests/powerpc/primitives/
Dword-at-a-time.h22 unsigned long mask = (val & c->low_bits) + c->low_bits; in prep_zero_mask() local
23 return ~(mask | rhs); in prep_zero_mask()
26 #define create_zero_mask(mask) (mask) argument
28 static inline long find_zero(unsigned long mask) in find_zero() argument
32 asm (PPC_CNTLZL "%0,%1" : "=r" (leading_zero_bits) : "r" (mask)); in find_zero()
85 static inline unsigned long find_zero(unsigned long mask) in find_zero() argument
87 return mask >> 3; in find_zero()
91 static inline unsigned long zero_bytemask(unsigned long mask) in zero_bytemask() argument
93 return (1UL << mask) - 1; in zero_bytemask()
113 static inline long count_masked_bytes(long mask) in count_masked_bytes() argument
[all …]
/linux-4.1.27/arch/powerpc/include/asm/
Dword-at-a-time.h22 unsigned long mask = (val & c->low_bits) + c->low_bits; in prep_zero_mask() local
23 return ~(mask | rhs); in prep_zero_mask()
26 #define create_zero_mask(mask) (mask) argument
28 static inline long find_zero(unsigned long mask) in find_zero() argument
32 asm (PPC_CNTLZL "%0,%1" : "=r" (leading_zero_bits) : "r" (mask)); in find_zero()
85 static inline unsigned long find_zero(unsigned long mask) in find_zero() argument
87 return mask >> 3; in find_zero()
91 static inline unsigned long zero_bytemask(unsigned long mask) in zero_bytemask() argument
93 return (1UL << mask) - 1; in zero_bytemask()
113 static inline long count_masked_bytes(long mask) in count_masked_bytes() argument
[all …]
Dpmac_pfunc.h63 int (*write_gpio)(PMF_STD_ARGS, u8 value, u8 mask);
64 int (*read_gpio)(PMF_STD_ARGS, u8 mask, int rshift, u8 xor);
66 int (*write_reg32)(PMF_STD_ARGS, u32 offset, u32 value, u32 mask);
68 int (*write_reg16)(PMF_STD_ARGS, u32 offset, u16 value, u16 mask);
70 int (*write_reg8)(PMF_STD_ARGS, u32 offset, u8 value, u8 mask);
75 int (*wait_reg32)(PMF_STD_ARGS, u32 offset, u32 value, u32 mask);
76 int (*wait_reg16)(PMF_STD_ARGS, u32 offset, u16 value, u16 mask);
77 int (*wait_reg8)(PMF_STD_ARGS, u32 offset, u8 value, u8 mask);
96 int (*read_reg32_msrx)(PMF_STD_ARGS, u32 offset, u32 mask, u32 shift,
98 int (*read_reg16_msrx)(PMF_STD_ARGS, u32 offset, u32 mask, u32 shift,
[all …]
/linux-4.1.27/arch/metag/include/asm/
Dbitops.h15 unsigned long mask = 1UL << (bit & 31); in set_bit() local
21 *p |= mask; in set_bit()
28 unsigned long mask = 1UL << (bit & 31); in clear_bit() local
34 *p &= ~mask; in clear_bit()
41 unsigned long mask = 1UL << (bit & 31); in change_bit() local
47 *p ^= mask; in change_bit()
55 unsigned long mask = 1UL << (bit & 31); in test_and_set_bit() local
61 if (!(old & mask)) { in test_and_set_bit()
63 *p = old | mask; in test_and_set_bit()
67 return (old & mask) != 0; in test_and_set_bit()
[all …]
/linux-4.1.27/lib/
Dcpumask.c34 int cpumask_any_but(const struct cpumask *mask, unsigned int cpu) in cpumask_any_but() argument
39 for_each_cpu(i, mask) in cpumask_any_but()
61 bool alloc_cpumask_var_node(cpumask_var_t *mask, gfp_t flags, int node) in alloc_cpumask_var_node() argument
63 *mask = kmalloc_node(cpumask_size(), flags, node); in alloc_cpumask_var_node()
66 if (!*mask) { in alloc_cpumask_var_node()
72 return *mask != NULL; in alloc_cpumask_var_node()
76 bool zalloc_cpumask_var_node(cpumask_var_t *mask, gfp_t flags, int node) in zalloc_cpumask_var_node() argument
78 return alloc_cpumask_var_node(mask, flags | __GFP_ZERO, node); in zalloc_cpumask_var_node()
92 bool alloc_cpumask_var(cpumask_var_t *mask, gfp_t flags) in alloc_cpumask_var() argument
94 return alloc_cpumask_var_node(mask, flags, NUMA_NO_NODE); in alloc_cpumask_var()
[all …]
Dkfifo.c35 return (fifo->mask + 1) - (fifo->in - fifo->out); in kfifo_unused()
53 fifo->mask = 0; in __kfifo_alloc()
60 fifo->mask = 0; in __kfifo_alloc()
63 fifo->mask = size - 1; in __kfifo_alloc()
76 fifo->mask = 0; in __kfifo_free()
93 fifo->mask = 0; in __kfifo_init()
96 fifo->mask = size - 1; in __kfifo_init()
105 unsigned int size = fifo->mask + 1; in kfifo_copy_in()
109 off &= fifo->mask; in kfifo_copy_in()
144 unsigned int size = fifo->mask + 1; in kfifo_copy_out()
[all …]
/linux-4.1.27/arch/powerpc/sysdev/
Dipic.c38 .mask = IPIC_SIMSR_H,
45 .mask = IPIC_SIMSR_H,
52 .mask = IPIC_SIMSR_H,
59 .mask = IPIC_SIMSR_H,
66 .mask = IPIC_SIMSR_H,
73 .mask = IPIC_SIMSR_H,
80 .mask = IPIC_SIMSR_H,
87 .mask = IPIC_SIMSR_H,
94 .mask = IPIC_SIMSR_H,
101 .mask = IPIC_SIMSR_H,
[all …]
/linux-4.1.27/drivers/video/fbdev/core/
Dfb_draw.h14 comp(unsigned long a, unsigned long b, unsigned long mask) in comp() argument
16 return ((a ^ b) & mask) ^ b; in comp()
103 u32 mask; in fb_shifted_pixels_mask_u32() local
106 mask = FB_SHIFT_HIGH(p, ~(u32)0, index); in fb_shifted_pixels_mask_u32()
108 mask = 0xff << FB_LEFT_POS(p, 8); in fb_shifted_pixels_mask_u32()
109 mask = FB_SHIFT_LOW(p, mask, index & (bswapmask)) & mask; in fb_shifted_pixels_mask_u32()
110 mask = FB_SHIFT_HIGH(p, mask, index & ~(bswapmask)); in fb_shifted_pixels_mask_u32()
115 mask |= FB_SHIFT_HIGH(p, ~(u32)0, in fb_shifted_pixels_mask_u32()
118 return mask; in fb_shifted_pixels_mask_u32()
125 unsigned long mask; in fb_shifted_pixels_mask_long() local
[all …]
/linux-4.1.27/include/asm-generic/bitops/
Dnon-atomic.h17 unsigned long mask = BIT_MASK(nr); in __set_bit() local
20 *p |= mask; in __set_bit()
25 unsigned long mask = BIT_MASK(nr); in __clear_bit() local
28 *p &= ~mask; in __clear_bit()
42 unsigned long mask = BIT_MASK(nr); in __change_bit() local
45 *p ^= mask; in __change_bit()
59 unsigned long mask = BIT_MASK(nr); in __test_and_set_bit() local
63 *p = old | mask; in __test_and_set_bit()
64 return (old & mask) != 0; in __test_and_set_bit()
78 unsigned long mask = BIT_MASK(nr); in __test_and_clear_bit() local
[all …]
Datomic.h67 unsigned long mask = BIT_MASK(nr); in set_bit() local
72 *p |= mask; in set_bit()
88 unsigned long mask = BIT_MASK(nr); in clear_bit() local
93 *p &= ~mask; in clear_bit()
109 unsigned long mask = BIT_MASK(nr); in change_bit() local
114 *p ^= mask; in change_bit()
129 unsigned long mask = BIT_MASK(nr); in test_and_set_bit() local
136 *p = old | mask; in test_and_set_bit()
139 return (old & mask) != 0; in test_and_set_bit()
153 unsigned long mask = BIT_MASK(nr); in test_and_clear_bit() local
[all …]
/linux-4.1.27/net/netlabel/
Dnetlabel_addrlist.c66 if (iter->valid && (addr & iter->mask) == iter->addr) in netlbl_af4list_search()
85 __be32 mask, in netlbl_af4list_search_exact() argument
91 if (iter->valid && iter->addr == addr && iter->mask == mask) in netlbl_af4list_search_exact()
117 ipv6_masked_addr_cmp(&iter->addr, &iter->mask, addr) == 0) in netlbl_af6list_search()
136 const struct in6_addr *mask, in netlbl_af6list_search_exact() argument
144 ipv6_addr_equal(&iter->mask, mask)) in netlbl_af6list_search_exact()
168 iter->addr == entry->addr && iter->mask == entry->mask) in netlbl_af4list_add()
177 ntohl(entry->mask) > ntohl(iter->mask)) { in netlbl_af4list_add()
206 ipv6_addr_equal(&iter->mask, &entry->mask)) in netlbl_af6list_add()
215 ipv6_addr_cmp(&entry->mask, &iter->mask) > 0) { in netlbl_af6list_add()
[all …]
/linux-4.1.27/arch/mips/pci/
Dpci-malta.c93 resource_size_t start, end, map, start1, end1, map1, map2, map3, mask; in mips_pcibios_init() local
129 mask = ~(start ^ end); in mips_pcibios_init()
132 mask != ~((mask & -mask) - 1)); in mips_pcibios_init()
135 gt64120_controller.mem_offset = (start & mask) - (map & mask); in mips_pcibios_init()
146 mask = ~(start ^ end); in mips_pcibios_init()
149 mask != ~((mask & -mask) - 1)); in mips_pcibios_init()
150 gt64120_io_resource.start = map & mask; in mips_pcibios_init()
151 gt64120_io_resource.end = (map & mask) | ~mask; in mips_pcibios_init()
199 MSC_READ(MSC01_PCI_SC2PMMSKL, mask); in mips_pcibios_init()
201 msc_mem_resource.start = start & mask; in mips_pcibios_init()
[all …]
/linux-4.1.27/arch/tile/include/asm/
Dbitops_64.h25 unsigned long mask = (1UL << (nr % BITS_PER_LONG)); in set_bit() local
26 __insn_fetchor((void *)(addr + nr / BITS_PER_LONG), mask); in set_bit()
31 unsigned long mask = (1UL << (nr % BITS_PER_LONG)); in clear_bit() local
32 __insn_fetchand((void *)(addr + nr / BITS_PER_LONG), ~mask); in clear_bit()
37 unsigned long mask = (1UL << (nr % BITS_PER_LONG)); in change_bit() local
43 oldval = cmpxchg(addr, guess, guess ^ mask); in change_bit()
58 unsigned long mask = (1UL << (nr % BITS_PER_LONG)); in test_and_set_bit() local
60 val = (__insn_fetchor((void *)(addr + nr / BITS_PER_LONG), mask) in test_and_set_bit()
61 & mask) != 0; in test_and_set_bit()
70 unsigned long mask = (1UL << (nr % BITS_PER_LONG)); in test_and_clear_bit() local
[all …]
Dbitops_32.h22 unsigned long _atomic_or(volatile unsigned long *p, unsigned long mask);
23 unsigned long _atomic_andn(volatile unsigned long *p, unsigned long mask);
24 unsigned long _atomic_xor(volatile unsigned long *p, unsigned long mask);
85 unsigned long mask = BIT_MASK(nr); in test_and_set_bit() local
88 return (_atomic_or(addr, mask) & mask) != 0; in test_and_set_bit()
101 unsigned long mask = BIT_MASK(nr); in test_and_clear_bit() local
104 return (_atomic_andn(addr, mask) & mask) != 0; in test_and_clear_bit()
118 unsigned long mask = BIT_MASK(nr); in test_and_change_bit() local
121 return (_atomic_xor(addr, mask) & mask) != 0; in test_and_change_bit()
/linux-4.1.27/arch/arm/mach-imx/
Diomux-v1.c50 unsigned long mask, unsigned long value) in imx_iomuxv1_rmwl() argument
54 reg &= ~mask; in imx_iomuxv1_rmwl()
63 unsigned long mask = 1 << pin; in imx_iomuxv1_set_puen() local
65 imx_iomuxv1_rmwl(MXC_PUEN(port), mask, on ? mask : 0); in imx_iomuxv1_set_puen()
71 unsigned long mask = 1 << pin; in imx_iomuxv1_set_ddir() local
73 imx_iomuxv1_rmwl(MXC_DDIR(port), mask, out ? mask : 0); in imx_iomuxv1_set_ddir()
79 unsigned long mask = 1 << pin; in imx_iomuxv1_set_gpr() local
81 imx_iomuxv1_rmwl(MXC_GPR(port), mask, af ? mask : 0); in imx_iomuxv1_set_gpr()
87 unsigned long mask = 1 << pin; in imx_iomuxv1_set_gius() local
89 imx_iomuxv1_rmwl(MXC_GIUS(port), mask, inuse ? mask : 0); in imx_iomuxv1_set_gius()
[all …]
/linux-4.1.27/drivers/pinctrl/spear/
Dpinctrl-spear320.c37 .mask = 0x00000007,
45 .mask = 0x00000007,
53 .mask = 0x00000007,
61 .mask = 0x00000007,
69 .mask = 0x00000001,
466 .mask = PMX_PL_69_MASK,
470 .mask = PMX_PL_70_MASK | PMX_PL_71_72_MASK | PMX_PL_73_MASK |
478 .mask = PMX_PL_80_TO_85_MASK | PMX_PL_86_87_MASK |
484 .mask = PMX_PL_90_91_MASK | PMX_PL_92_93_MASK |
523 .mask = PMX_TIMER_0_1_MASK | PMX_TIMER_2_3_MASK,
[all …]
Dpinctrl-spear1340.c220 .mask = PADS_AS_GPIO_REG0_MASK,
224 .mask = PADS_AS_GPIO_REGS_MASK,
228 .mask = PADS_AS_GPIO_REGS_MASK,
232 .mask = PADS_AS_GPIO_REGS_MASK,
236 .mask = PADS_AS_GPIO_REGS_MASK,
240 .mask = PADS_AS_GPIO_REGS_MASK,
244 .mask = PADS_AS_GPIO_REGS_MASK,
248 .mask = PADS_AS_GPIO_REG7_MASK,
281 .mask = FSMC_8BIT_REG7_MASK,
306 .mask = KBD_ROW_COL_MASK,
[all …]
Dpinctrl-spear1310.c242 .mask = PMX_I2C0_MASK,
246 .mask = PMX_I2C0_MASK,
278 .mask = PMX_SSP0_MASK,
282 .mask = PMX_SSP0_MASK,
307 .mask = PMX_SSP0_CS0_MASK,
311 .mask = PMX_SSP0_CS0_MASK,
336 .mask = PMX_SSP0_CS1_2_MASK,
340 .mask = PMX_SSP0_CS1_2_MASK,
373 .mask = PMX_I2S0_MASK,
377 .mask = PMX_I2S0_MASK,
[all …]
Dpinctrl-spear300.c44 .mask = 0x0000000F,
52 .mask = 0x0000000F,
60 .mask = 0x0000000F,
68 .mask = 0x0000000F,
76 .mask = 0x0000000F,
84 .mask = 0x0000000F,
92 .mask = 0x0000000F,
100 .mask = 0x0000000F,
108 .mask = 0x0000000F,
116 .mask = 0x0000000F,
[all …]
/linux-4.1.27/drivers/input/joystick/
Danalog.c115 int mask; member
124 unsigned char mask; member
207 if (analog->mask & ANALOG_HAT_FCS) in analog_decode()
215 if (analog->mask & (0x10 << i)) in analog_decode()
218 if (analog->mask & ANALOG_HBTN_CHF) in analog_decode()
222 if (analog->mask & ANALOG_BTN_TL) in analog_decode()
224 if (analog->mask & ANALOG_BTN_TR) in analog_decode()
226 if (analog->mask & ANALOG_BTN_TL2) in analog_decode()
228 if (analog->mask & ANALOG_BTN_TR2) in analog_decode()
232 if (analog->mask & (1 << i)) in analog_decode()
[all …]
/linux-4.1.27/include/asm-generic/
Dword-at-a-time.h23 unsigned long mask = (val & c->low_bits) + c->low_bits; in prep_zero_mask() local
24 return ~(mask | rhs); in prep_zero_mask()
27 #define create_zero_mask(mask) (mask) argument
29 static inline long find_zero(unsigned long mask) in find_zero() argument
33 if (mask >> 32) in find_zero()
34 mask >>= 32; in find_zero()
38 if (mask >> 16) in find_zero()
39 mask >>= 16; in find_zero()
42 return (mask >> 8) ? byte : byte + 1; in find_zero()
53 #define zero_bytemask(mask) (~1ul << __fls(mask)) argument
/linux-4.1.27/fs/hfs/
Dbitmap.c32 u32 mask, start, len, n; in hfs_find_set_zero_bits() local
48 mask = (1U << 31) >> i; in hfs_find_set_zero_bits()
49 for (; i < 32; mask >>= 1, i++) { in hfs_find_set_zero_bits()
50 if (!(n & mask)) in hfs_find_set_zero_bits()
60 mask = 1 << 31; in hfs_find_set_zero_bits()
61 for (i = 0; i < 32; mask >>= 1, i++) { in hfs_find_set_zero_bits()
62 if (!(n & mask)) in hfs_find_set_zero_bits()
76 n |= mask; in hfs_find_set_zero_bits()
79 mask >>= 1; in hfs_find_set_zero_bits()
80 if (!--len || n & mask) in hfs_find_set_zero_bits()
[all …]
/linux-4.1.27/arch/nios2/include/asm/
Dasm-macros.h30 .macro ANDI32 reg1, reg2, mask
31 .if \mask & 0xffff
32 .if \mask & 0xffff0000
33 movhi \reg1, %hi(\mask)
34 movui \reg1, %lo(\mask)
37 andi \reg1, \reg2, %lo(\mask)
40 andhi \reg1, \reg2, %hi(\mask)
50 .macro ORI32 reg1, reg2, mask
51 .if \mask & 0xffff
52 .if \mask & 0xffff0000
[all …]
/linux-4.1.27/arch/xtensa/include/asm/
Dbitops.h106 unsigned long mask = 1UL << (bit & 31); in set_bit() local
117 : "a" (mask), "a" (p) in set_bit()
124 unsigned long mask = 1UL << (bit & 31); in clear_bit() local
135 : "a" (~mask), "a" (p) in clear_bit()
142 unsigned long mask = 1UL << (bit & 31); in change_bit() local
153 : "a" (mask), "a" (p) in change_bit()
161 unsigned long mask = 1UL << (bit & 31); in test_and_set_bit() local
172 : "a" (mask), "a" (p) in test_and_set_bit()
175 return tmp & mask; in test_and_set_bit()
182 unsigned long mask = 1UL << (bit & 31); in test_and_clear_bit() local
[all …]
/linux-4.1.27/arch/alpha/kernel/
Dsys_rawhide.c47 rawhide_update_irq_hw(int hose, int mask) in rawhide_update_irq_hw() argument
49 *(vuip)MCPCIA_INT_MASK0(MCPCIA_HOSE2MID(hose)) = mask; in rawhide_update_irq_hw()
60 unsigned int mask, hose; in rawhide_enable_irq() local
69 mask = 1 << irq; in rawhide_enable_irq()
72 mask |= cached_irq_masks[hose]; in rawhide_enable_irq()
73 cached_irq_masks[hose] = mask; in rawhide_enable_irq()
74 rawhide_update_irq_hw(hose, mask); in rawhide_enable_irq()
81 unsigned int mask, hose; in rawhide_disable_irq() local
90 mask = ~(1 << irq) | hose_irq_masks[hose]; in rawhide_disable_irq()
93 mask &= cached_irq_masks[hose]; in rawhide_disable_irq()
[all …]
Dsys_sable.c42 void (*update_irq_hw)(unsigned long bit, unsigned long mask);
93 sable_update_irq_hw(unsigned long bit, unsigned long mask) in sable_update_irq_hw() argument
99 mask >>= 16; in sable_update_irq_hw()
102 mask >>= 8; in sable_update_irq_hw()
105 outb(mask, port); in sable_update_irq_hw()
292 lynx_update_irq_hw(unsigned long bit, unsigned long mask) in lynx_update_irq_hw() argument
302 *(vulp)T2_DIR = mask; in lynx_update_irq_hw()
447 unsigned long bit, mask; in sable_lynx_enable_irq() local
451 mask = sable_lynx_irq_swizzle->shadow_mask &= ~(1UL << bit); in sable_lynx_enable_irq()
452 sable_lynx_irq_swizzle->update_irq_hw(bit, mask); in sable_lynx_enable_irq()
[all …]
Dsys_eiger.c43 eiger_update_irq_hw(unsigned long irq, unsigned long mask) in eiger_update_irq_hw() argument
47 mask = (irq >= 64 ? mask << 16 : mask >> ((irq - 16) & 0x30)); in eiger_update_irq_hw()
49 outl(mask & 0xffff0000UL, regaddr); in eiger_update_irq_hw()
56 unsigned long mask; in eiger_enable_irq() local
57 mask = (cached_irq_mask[irq >= 64] &= ~(1UL << (irq & 63))); in eiger_enable_irq()
58 eiger_update_irq_hw(irq, mask); in eiger_enable_irq()
65 unsigned long mask; in eiger_disable_irq() local
66 mask = (cached_irq_mask[irq >= 64] |= 1UL << (irq & 63)); in eiger_disable_irq()
67 eiger_update_irq_hw(irq, mask); in eiger_disable_irq()
Dsys_takara.c37 takara_update_irq_hw(unsigned long irq, unsigned long mask) in takara_update_irq_hw() argument
41 mask = (irq >= 64 ? mask << 16 : mask >> ((irq - 16) & 0x30)); in takara_update_irq_hw()
43 outl(mask & 0xffff0000UL, regaddr); in takara_update_irq_hw()
50 unsigned long mask; in takara_enable_irq() local
51 mask = (cached_irq_mask[irq >= 64] &= ~(1UL << (irq & 63))); in takara_enable_irq()
52 takara_update_irq_hw(irq, mask); in takara_enable_irq()
59 unsigned long mask; in takara_disable_irq() local
60 mask = (cached_irq_mask[irq >= 64] |= 1UL << (irq & 63)); in takara_disable_irq()
61 takara_update_irq_hw(irq, mask); in takara_disable_irq()
/linux-4.1.27/crypto/
Dapi.c60 u32 mask) in __crypto_alg_lookup() argument
71 if ((q->cra_flags ^ type) & mask) in __crypto_alg_lookup()
76 ((struct crypto_larval *)q)->mask != mask) in __crypto_alg_lookup()
109 struct crypto_larval *crypto_larval_alloc(const char *name, u32 type, u32 mask) in crypto_larval_alloc() argument
117 larval->mask = mask; in crypto_larval_alloc()
130 u32 mask) in crypto_larval_add() argument
135 larval = crypto_larval_alloc(name, type, mask); in crypto_larval_add()
142 alg = __crypto_alg_lookup(name, type, mask); in crypto_larval_add()
195 struct crypto_alg *crypto_alg_lookup(const char *name, u32 type, u32 mask) in crypto_alg_lookup() argument
200 alg = __crypto_alg_lookup(name, type, mask); in crypto_alg_lookup()
[all …]
Daead.c83 u32 mask) in crypto_aead_ctxsize() argument
93 static int crypto_init_aead_ops(struct crypto_tfm *tfm, u32 type, u32 mask) in crypto_init_aead_ops() argument
177 static int crypto_init_nivaead_ops(struct crypto_tfm *tfm, u32 type, u32 mask) in crypto_init_nivaead_ops() argument
254 const char *name, u32 type, u32 mask) in crypto_grab_nivaead() argument
261 mask |= CRYPTO_ALG_TYPE_MASK | CRYPTO_ALG_GENIV; in crypto_grab_nivaead()
263 alg = crypto_alg_mod_lookup(name, type, mask); in crypto_grab_nivaead()
267 err = crypto_init_spawn(&spawn->base, alg, spawn->base.inst, mask); in crypto_grab_nivaead()
274 u32 mask) in aead_geniv_alloc() argument
288 algt->mask) in aead_geniv_alloc()
302 mask |= crypto_requires_sync(algt->type, algt->mask); in aead_geniv_alloc()
[all …]
Dpcrypt.c53 cpumask_var_t mask; member
82 if (cpumask_test_cpu(cpu, cpumask->mask)) in pcrypt_do_parallel()
85 if (!cpumask_weight(cpumask->mask)) in pcrypt_do_parallel()
88 cpu_index = cpu % cpumask_weight(cpumask->mask); in pcrypt_do_parallel()
90 cpu = cpumask_first(cpumask->mask); in pcrypt_do_parallel()
92 cpu = cpumask_next(cpu, cpumask->mask); in pcrypt_do_parallel()
348 u32 type, u32 mask) in pcrypt_alloc_aead() argument
353 alg = crypto_get_attr_alg(tb, type, (mask & CRYPTO_ALG_TYPE_MASK)); in pcrypt_alloc_aead()
392 switch (algt->type & algt->mask & CRYPTO_ALG_TYPE_MASK) { in pcrypt_alloc()
394 return pcrypt_alloc_aead(tb, algt->type, algt->mask); in pcrypt_alloc()
[all …]
/linux-4.1.27/arch/sh/include/mach-common/mach/
Dmagicpanelr2.h22 #define SETBITS_OUTB(mask, reg) __raw_writeb(__raw_readb(reg) | mask, reg) argument
23 #define SETBITS_OUTW(mask, reg) __raw_writew(__raw_readw(reg) | mask, reg) argument
24 #define SETBITS_OUTL(mask, reg) __raw_writel(__raw_readl(reg) | mask, reg) argument
25 #define CLRBITS_OUTB(mask, reg) __raw_writeb(__raw_readb(reg) & ~mask, reg) argument
26 #define CLRBITS_OUTW(mask, reg) __raw_writew(__raw_readw(reg) & ~mask, reg) argument
27 #define CLRBITS_OUTL(mask, reg) __raw_writel(__raw_readl(reg) & ~mask, reg) argument
/linux-4.1.27/arch/arm/mm/
Ddump.c48 u64 mask; member
56 .mask = L_PTE_USER,
61 .mask = L_PTE_RDONLY,
66 .mask = L_PTE_XN,
71 .mask = L_PTE_SHARED,
76 .mask = L_PTE_MT_MASK,
80 .mask = L_PTE_MT_MASK,
84 .mask = L_PTE_MT_MASK,
88 .mask = L_PTE_MT_MASK,
93 .mask = L_PTE_MT_MASK,
[all …]
/linux-4.1.27/arch/s390/include/asm/
Dbitops.h122 unsigned long mask; in set_bit() local
136 mask = 1UL << (nr & (BITS_PER_LONG - 1)); in set_bit()
137 __BITOPS_LOOP(addr, mask, __BITOPS_OR, __BITOPS_NO_BARRIER); in set_bit()
143 unsigned long mask; in clear_bit() local
157 mask = ~(1UL << (nr & (BITS_PER_LONG - 1))); in clear_bit()
158 __BITOPS_LOOP(addr, mask, __BITOPS_AND, __BITOPS_NO_BARRIER); in clear_bit()
164 unsigned long mask; in change_bit() local
178 mask = 1UL << (nr & (BITS_PER_LONG - 1)); in change_bit()
179 __BITOPS_LOOP(addr, mask, __BITOPS_XOR, __BITOPS_NO_BARRIER); in change_bit()
186 unsigned long old, mask; in test_and_set_bit() local
[all …]
Dprocessor.h148 regs->psw.mask = PSW_USER_BITS | PSW_MASK_EA | PSW_MASK_BA; \
155 regs->psw.mask = PSW_USER_BITS | PSW_MASK_BA; \
218 static inline void __load_psw_mask (unsigned long mask) in __load_psw_mask() argument
223 psw.mask = mask; in __load_psw_mask()
238 unsigned long mask; in __rewind_psw() local
240 mask = (psw.mask & PSW_MASK_EA) ? -1UL : in __rewind_psw()
241 (psw.mask & PSW_MASK_BA) ? (1UL << 31) - 1 : in __rewind_psw()
243 return (psw.addr - ilc) & mask; in __rewind_psw()
259 dw_psw.mask = PSW_MASK_BASE | PSW_MASK_WAIT | PSW_MASK_BA | PSW_MASK_EA; in disabled_wait()
305 __set_psw_mask(unsigned long mask) in __set_psw_mask() argument
[all …]
/linux-4.1.27/sound/soc/
Dsoc-ops.c76 val = (reg_val >> e->shift_l) & e->mask; in snd_soc_get_enum_double()
80 val = (reg_val >> e->shift_l) & e->mask; in snd_soc_get_enum_double()
105 unsigned int mask; in snd_soc_put_enum_double() local
110 mask = e->mask << e->shift_l; in snd_soc_put_enum_double()
115 mask |= e->mask << e->shift_r; in snd_soc_put_enum_double()
118 return snd_soc_component_update_bits(component, e->reg, mask, val); in snd_soc_put_enum_double()
138 unsigned int reg, unsigned int mask, unsigned int shift, in snd_soc_read_signed() argument
148 val = (val >> shift) & mask; in snd_soc_read_signed()
260 unsigned int mask = (1 << fls(max)) - 1; in snd_soc_get_volsw() local
266 mask = BIT(sign_bit + 1) - 1; in snd_soc_get_volsw()
[all …]
Dsoc-io.c66 unsigned int mask, unsigned int val, bool *change) in snd_soc_component_update_bits_legacy() argument
80 new = (old & ~mask) | (val & mask); in snd_soc_component_update_bits_legacy()
102 unsigned int reg, unsigned int mask, unsigned int val) in snd_soc_component_update_bits() argument
108 ret = regmap_update_bits_check(component->regmap, reg, mask, in snd_soc_component_update_bits()
112 mask, val, &change); in snd_soc_component_update_bits()
138 unsigned int reg, unsigned int mask, unsigned int val) in snd_soc_component_update_bits_async() argument
145 mask, val, &change); in snd_soc_component_update_bits_async()
148 mask, val, &change); in snd_soc_component_update_bits_async()
183 unsigned int reg, unsigned int mask, unsigned int value) in snd_soc_component_test_bits() argument
191 new = (old & ~mask) | value; in snd_soc_component_test_bits()
[all …]
/linux-4.1.27/arch/powerpc/platforms/85xx/
Dsocrates_fpga_pic.c114 uint32_t mask; in socrates_fpga_pic_ack() local
118 mask = socrates_fpga_pic_read(FPGA_PIC_IRQMASK(irq_line)) in socrates_fpga_pic_ack()
120 mask |= (1 << (hwirq + 16)); in socrates_fpga_pic_ack()
121 socrates_fpga_pic_write(FPGA_PIC_IRQMASK(irq_line), mask); in socrates_fpga_pic_ack()
130 u32 mask; in socrates_fpga_pic_mask() local
134 mask = socrates_fpga_pic_read(FPGA_PIC_IRQMASK(irq_line)) in socrates_fpga_pic_mask()
136 mask &= ~(1 << hwirq); in socrates_fpga_pic_mask()
137 socrates_fpga_pic_write(FPGA_PIC_IRQMASK(irq_line), mask); in socrates_fpga_pic_mask()
146 u32 mask; in socrates_fpga_pic_mask_ack() local
150 mask = socrates_fpga_pic_read(FPGA_PIC_IRQMASK(irq_line)) in socrates_fpga_pic_mask_ack()
[all …]
/linux-4.1.27/arch/mips/kernel/
Dirq-gt641xx.c47 u32 mask; in mask_gt641xx_irq() local
50 mask = GT_READ(GT_INTRMASK_OFS); in mask_gt641xx_irq()
51 mask &= ~GT641XX_IRQ_TO_BIT(d->irq); in mask_gt641xx_irq()
52 GT_WRITE(GT_INTRMASK_OFS, mask); in mask_gt641xx_irq()
59 u32 cause, mask; in mask_ack_gt641xx_irq() local
62 mask = GT_READ(GT_INTRMASK_OFS); in mask_ack_gt641xx_irq()
63 mask &= ~GT641XX_IRQ_TO_BIT(d->irq); in mask_ack_gt641xx_irq()
64 GT_WRITE(GT_INTRMASK_OFS, mask); in mask_ack_gt641xx_irq()
75 u32 mask; in unmask_gt641xx_irq() local
78 mask = GT_READ(GT_INTRMASK_OFS); in unmask_gt641xx_irq()
[all …]
/linux-4.1.27/arch/sparc/kernel/
Dleon_kernel.c43 #define LEON_IMASK(cpu) (&leon3_irqctrl_regs->mask[cpu])
71 unsigned long mask, oldmask; in leon_eirq_setup() local
86 mask = 1 << eirq; in leon_eirq_setup()
88 LEON3_BYPASS_STORE_PA(LEON_IMASK(boot_cpu_id), (oldmask | mask)); in leon_eirq_setup()
94 unsigned long mask; in leon_get_irqmask() local
100 mask = 0; in leon_get_irqmask()
102 mask = LEON_HARD_INT(irq); in leon_get_irqmask()
104 return mask; in leon_get_irqmask()
110 cpumask_t mask; in irq_choose_cpu() local
112 cpumask_and(&mask, cpu_online_mask, affinity); in irq_choose_cpu()
[all …]
/linux-4.1.27/drivers/block/drbd/
Ddrbd_state.h37 ({ union drbd_state mask; mask.i = 0; mask.T = T##_MASK; mask; }), \
40 ({ union drbd_state mask; mask.i = 0; mask.T1 = T1##_MASK; \
41 mask.T2 = T2##_MASK; mask; }), \
45 ({ union drbd_state mask; mask.i = 0; mask.T1 = T1##_MASK; \
46 mask.T2 = T2##_MASK; mask.T3 = T3##_MASK; mask; }), \
112 union drbd_state mask,
132 _conn_request_state(struct drbd_connection *connection, union drbd_state mask, union drbd_state val,
136 conn_request_state(struct drbd_connection *connection, union drbd_state mask, union drbd_state val,
153 union drbd_state mask, in drbd_request_state() argument
156 return _drbd_request_state(device, mask, val, CS_VERBOSE + CS_ORDERED); in drbd_request_state()
/linux-4.1.27/fs/nfsd/
Dnfs4acl.c73 int mask = NFS4_ANYONE_MODE; in mask_from_posix() local
76 mask |= NFS4_OWNER_MODE; in mask_from_posix()
78 mask |= NFS4_READ_MODE; in mask_from_posix()
80 mask |= NFS4_WRITE_MODE; in mask_from_posix()
82 mask |= NFS4_ACE_DELETE_CHILD; in mask_from_posix()
84 mask |= NFS4_EXECUTE_MODE; in mask_from_posix()
85 return mask; in mask_from_posix()
91 u32 mask = 0; in deny_mask_from_posix() local
94 mask |= NFS4_READ_MODE; in deny_mask_from_posix()
96 mask |= NFS4_WRITE_MODE; in deny_mask_from_posix()
[all …]
/linux-4.1.27/arch/mips/bcm63xx/
Dprom.c23 u32 reg, mask; in prom_init() local
33 mask = CKCTL_3368_ALL_SAFE_EN; in prom_init()
35 mask = CKCTL_6328_ALL_SAFE_EN; in prom_init()
37 mask = CKCTL_6338_ALL_SAFE_EN; in prom_init()
39 mask = CKCTL_6345_ALL_SAFE_EN; in prom_init()
41 mask = CKCTL_6348_ALL_SAFE_EN; in prom_init()
43 mask = CKCTL_6358_ALL_SAFE_EN; in prom_init()
45 mask = CKCTL_6362_ALL_SAFE_EN; in prom_init()
47 mask = CKCTL_6368_ALL_SAFE_EN; in prom_init()
49 mask = 0; in prom_init()
[all …]
Dclk.c41 static void bcm_hwclock_set(u32 mask, int enable) in bcm_hwclock_set() argument
47 reg |= mask; in bcm_hwclock_set()
49 reg &= ~mask; in bcm_hwclock_set()
58 u32 mask; in enet_misc_set() local
61 mask = CKCTL_6338_ENET_EN; in enet_misc_set()
63 mask = CKCTL_6345_ENET_EN; in enet_misc_set()
65 mask = CKCTL_6348_ENET_EN; in enet_misc_set()
68 mask = CKCTL_6358_EMUSB_EN; in enet_misc_set()
69 bcm_hwclock_set(mask, enable); in enet_misc_set()
88 u32 mask; in enetx_set() local
[all …]
Dgpio.c42 u32 mask; in bcm63xx_gpio_set() local
51 mask = 1 << gpio; in bcm63xx_gpio_set()
55 mask = 1 << (gpio - 32); in bcm63xx_gpio_set()
61 *v |= mask; in bcm63xx_gpio_set()
63 *v &= ~mask; in bcm63xx_gpio_set()
71 u32 mask; in bcm63xx_gpio_get() local
78 mask = 1 << gpio; in bcm63xx_gpio_get()
81 mask = 1 << (gpio - 32); in bcm63xx_gpio_get()
84 return !!(bcm_gpio_readl(reg) & mask); in bcm63xx_gpio_get()
91 u32 mask; in bcm63xx_gpio_set_direction() local
[all …]
/linux-4.1.27/arch/parisc/include/asm/
Dbitops.h31 unsigned long mask = 1UL << CHOP_SHIFTCOUNT(nr); in set_bit() local
36 *addr |= mask; in set_bit()
42 unsigned long mask = ~(1UL << CHOP_SHIFTCOUNT(nr)); in clear_bit() local
47 *addr &= mask; in clear_bit()
53 unsigned long mask = 1UL << CHOP_SHIFTCOUNT(nr); in change_bit() local
58 *addr ^= mask; in change_bit()
64 unsigned long mask = 1UL << CHOP_SHIFTCOUNT(nr); in test_and_set_bit() local
72 set = (old & mask) ? 1 : 0; in test_and_set_bit()
74 *addr = old | mask; in test_and_set_bit()
82 unsigned long mask = 1UL << CHOP_SHIFTCOUNT(nr); in test_and_clear_bit() local
[all …]
/linux-4.1.27/drivers/gpu/drm/nouveau/nvkm/subdev/bus/
Dhwsq.h16 u32 mask; member
21 hwsq_stride(u32 addr, u32 stride, u32 mask) in hwsq_stride() argument
28 .mask = mask, in hwsq_stride()
41 .mask = 0x3, in hwsq_reg2()
54 .mask = 0x1, in hwsq_reg()
96 u32 mask, off = 0; in hwsq_wr32() local
101 for (mask = reg->mask; mask > 0; mask = (mask & ~1) >> 1) { in hwsq_wr32()
102 if (mask & 1) in hwsq_wr32()
116 hwsq_mask(struct hwsq *ram, struct hwsq_reg *reg, u32 mask, u32 data) in hwsq_mask() argument
119 if (temp != ((temp & ~mask) | data) || reg->force) in hwsq_mask()
[all …]
/linux-4.1.27/drivers/pinctrl/sirf/
Dpinctrl-prima2.c138 .mask = BIT(0) | BIT(1) | BIT(2) | BIT(3) | BIT(4) | BIT(5) |
144 .mask = BIT(31),
162 .mask = BIT(0) | BIT(1) | BIT(2) | BIT(3) | BIT(4) | BIT(5) |
168 .mask = BIT(31),
171 .mask = BIT(16) | BIT(17),
189 .mask = BIT(0) | BIT(1) | BIT(2) | BIT(3) | BIT(4) | BIT(5) |
195 .mask = BIT(31),
198 .mask = BIT(16) | BIT(17) | BIT(18) | BIT(19) | BIT(20) |
218 .mask = BIT(0) | BIT(1) | BIT(2) | BIT(3) | BIT(4) | BIT(5) |
224 .mask = BIT(31),
[all …]
Dpinctrl-atlas6.c134 .mask = BIT(30) | BIT(31),
137 .mask = BIT(1) | BIT(6) | BIT(7) | BIT(8) | BIT(9) |
158 .mask = BIT(1) | BIT(6) | BIT(7) | BIT(8) | BIT(9) |
164 .mask = BIT(30) | BIT(31),
167 .mask = BIT(16) | BIT(17),
185 .mask = BIT(1) | BIT(6) | BIT(7) | BIT(8) | BIT(9) |
191 .mask = BIT(30) | BIT(31),
194 .mask = BIT(16) | BIT(17) | BIT(18) | BIT(19) | BIT(20) |
214 .mask = BIT(1) | BIT(6) | BIT(7) | BIT(8) | BIT(9) | BIT(10) |
220 .mask = BIT(30) | BIT(31),
[all …]
/linux-4.1.27/arch/mips/include/asm/vr41xx/
Dvr41xx.h87 extern void vr41xx_enable_piuint(uint16_t mask);
88 extern void vr41xx_disable_piuint(uint16_t mask);
98 extern void vr41xx_enable_aiuint(uint16_t mask);
99 extern void vr41xx_disable_aiuint(uint16_t mask);
105 extern void vr41xx_enable_kiuint(uint16_t mask);
106 extern void vr41xx_disable_kiuint(uint16_t mask);
114 extern void vr41xx_enable_dsiuint(uint16_t mask);
115 extern void vr41xx_disable_dsiuint(uint16_t mask);
123 extern void vr41xx_enable_firint(uint16_t mask);
124 extern void vr41xx_disable_firint(uint16_t mask);
[all …]
/linux-4.1.27/arch/avr32/include/asm/
Dbitops.h45 unsigned long mask = 1UL << (nr % BITS_PER_LONG); in set_bit() local
53 : "m"(*p), "r"(mask) in set_bit()
84 unsigned long mask = 1UL << (nr % BITS_PER_LONG); in clear_bit() local
92 : "m"(*p), "r"(mask) in clear_bit()
109 unsigned long mask = 1UL << (nr % BITS_PER_LONG); in change_bit() local
119 : "m"(*p), "r"(mask) in change_bit()
134 unsigned long mask = 1UL << (nr % BITS_PER_LONG); in test_and_set_bit() local
156 : "m"(*p), "r"(mask) in test_and_set_bit()
160 return (old & mask) != 0; in test_and_set_bit()
174 unsigned long mask = 1UL << (nr % BITS_PER_LONG); in test_and_clear_bit() local
[all …]
/linux-4.1.27/arch/unicore32/kernel/
Dirq.c46 unsigned int mask; in puv3_gpio_type() local
49 mask = 1 << d->irq; in puv3_gpio_type()
51 mask = GPIO_MASK(d->irq); in puv3_gpio_type()
54 if ((GPIO_IRQ_rising_edge | GPIO_IRQ_falling_edge) & mask) in puv3_gpio_type()
60 GPIO_IRQ_rising_edge |= mask; in puv3_gpio_type()
62 GPIO_IRQ_rising_edge &= ~mask; in puv3_gpio_type()
64 GPIO_IRQ_falling_edge |= mask; in puv3_gpio_type()
66 GPIO_IRQ_falling_edge &= ~mask; in puv3_gpio_type()
118 unsigned int mask; in puv3_gpio_handler() local
120 mask = readl(GPIO_GEDR); in puv3_gpio_handler()
[all …]
/linux-4.1.27/drivers/pinctrl/
Dpinctrl-at91.c153 enum at91_mux (*get_periph)(void __iomem *pio, unsigned mask);
154 void (*mux_A_periph)(void __iomem *pio, unsigned mask);
155 void (*mux_B_periph)(void __iomem *pio, unsigned mask);
156 void (*mux_C_periph)(void __iomem *pio, unsigned mask);
157 void (*mux_D_periph)(void __iomem *pio, unsigned mask);
159 void (*set_deglitch)(void __iomem *pio, unsigned mask, bool is_on);
161 void (*set_debounce)(void __iomem *pio, unsigned mask, bool is_on, u32 div);
163 void (*set_pulldown)(void __iomem *pio, unsigned mask, bool is_on);
165 void (*disable_schmitt_trig)(void __iomem *pio, unsigned mask);
363 static void at91_mux_disable_interrupt(void __iomem *pio, unsigned mask) in at91_mux_disable_interrupt() argument
[all …]
/linux-4.1.27/drivers/staging/lustre/include/linux/libcfs/
Dlibcfs_debug.h60 int libcfs_debug_mask2str(char *str, int size, int mask, int is_subsys);
61 int libcfs_debug_str2mask(int *mask, const char *str, int is_subsys);
182 #define LIBCFS_DEBUG_MSG_DATA_INIT(data, mask, cdls) \ argument
189 (data)->msg_mask = (mask); \
192 #define LIBCFS_DEBUG_MSG_DATA_DECL(dataname, mask, cdls) \ argument
199 dataname.msg_mask = (mask)
204 static inline int cfs_cdebug_show(unsigned int mask, unsigned int subsystem) in cfs_cdebug_show() argument
206 return mask & D_CANTMASK || in cfs_cdebug_show()
207 ((libcfs_debug & mask) && (libcfs_subsystem_debug & subsystem)); in cfs_cdebug_show()
210 #define __CDEBUG(cdls, mask, format, ...) \ argument
[all …]
/linux-4.1.27/arch/avr32/mach-at32ap/
Dpio.c107 u32 mask = 1 << pin_index; in at32_select_gpio() local
122 pio_writel(pio, SODR, mask); in at32_select_gpio()
124 pio_writel(pio, CODR, mask); in at32_select_gpio()
126 pio_writel(pio, MDER, mask); in at32_select_gpio()
128 pio_writel(pio, MDDR, mask); in at32_select_gpio()
129 pio_writel(pio, PUDR, mask); in at32_select_gpio()
130 pio_writel(pio, OER, mask); in at32_select_gpio()
133 pio_writel(pio, PUER, mask); in at32_select_gpio()
135 pio_writel(pio, PUDR, mask); in at32_select_gpio()
137 pio_writel(pio, IFER, mask); in at32_select_gpio()
[all …]
/linux-4.1.27/kernel/irq/
Dgeneric-chip.c39 u32 mask = d->mask; in irq_gc_mask_disable_reg() local
42 irq_reg_writel(gc, mask, ct->regs.disable); in irq_gc_mask_disable_reg()
43 *ct->mask_cache &= ~mask; in irq_gc_mask_disable_reg()
58 u32 mask = d->mask; in irq_gc_mask_set_bit() local
61 *ct->mask_cache |= mask; in irq_gc_mask_set_bit()
62 irq_reg_writel(gc, *ct->mask_cache, ct->regs.mask); in irq_gc_mask_set_bit()
78 u32 mask = d->mask; in irq_gc_mask_clr_bit() local
81 *ct->mask_cache &= ~mask; in irq_gc_mask_clr_bit()
82 irq_reg_writel(gc, *ct->mask_cache, ct->regs.mask); in irq_gc_mask_clr_bit()
98 u32 mask = d->mask; in irq_gc_unmask_enable_reg() local
[all …]
/linux-4.1.27/fs/hfsplus/
Dbitmap.c25 u32 mask, start, len, n; in hfsplus_block_allocate() local
54 mask = (1U << 31) >> i; in hfsplus_block_allocate()
55 for (; i < 32; mask >>= 1, i++) { in hfsplus_block_allocate()
56 if (!(n & mask)) in hfsplus_block_allocate()
68 mask = 1 << 31; in hfsplus_block_allocate()
69 for (i = 0; i < 32; mask >>= 1, i++) { in hfsplus_block_allocate()
70 if (!(n & mask)) in hfsplus_block_allocate()
105 n |= mask; in hfsplus_block_allocate()
108 mask >>= 1; in hfsplus_block_allocate()
109 if (!--len || n & mask) in hfsplus_block_allocate()
[all …]
/linux-4.1.27/net/openvswitch/
Dflow_table.c59 bool full, const struct sw_flow_mask *mask) in ovs_flow_mask_key() argument
61 int start = full ? 0 : mask->range.start; in ovs_flow_mask_key()
62 int len = full ? sizeof *dst : range_n_bytes(&mask->range); in ovs_flow_mask_key()
63 const long *m = (const long *)((const u8 *)&mask->key + start); in ovs_flow_mask_key()
88 flow->mask = NULL; in ovs_flow_alloc()
471 const struct sw_flow_mask *mask) in masked_flow_lookup() argument
478 ovs_flow_mask_key(&masked_key, unmasked, false, mask); in masked_flow_lookup()
479 hash = flow_hash(&masked_key, &mask->range); in masked_flow_lookup()
482 if (flow->mask == mask && flow->flow_table.hash == hash && in masked_flow_lookup()
483 flow_cmp_masked_key(flow, &masked_key, &mask->range)) in masked_flow_lookup()
[all …]
Dactions.c193 const __be32 *mpls_lse, const __be32 *mask) in set_mpls() argument
204 lse = MASKED(*stack, *mpls_lse, *mask); in set_mpls()
245 const u16 *mask = (const u16 *)mask_; in ether_addr_copy_masked() local
247 SET_MASKED(dst[0], src[0], mask[0]); in ether_addr_copy_masked()
248 SET_MASKED(dst[1], src[1], mask[1]); in ether_addr_copy_masked()
249 SET_MASKED(dst[2], src[2], mask[2]); in ether_addr_copy_masked()
254 const struct ovs_key_ethernet *mask) in set_eth_addr() argument
265 mask->eth_src); in set_eth_addr()
267 mask->eth_dst); in set_eth_addr()
331 const __be32 mask[4], __be32 masked[4]) in mask_ipv6_addr()
[all …]
/linux-4.1.27/arch/arm/mach-pxa/
Dmfp-pxa2xx.c46 unsigned int mask; /* bit mask in PWER or PKWR */ member
57 unsigned long gafr, mask = GPIO_bit(gpio); in __mfp_config_gpio() local
77 GPDR(gpio) |= mask; in __mfp_config_gpio()
79 GPDR(gpio) &= ~mask; in __mfp_config_gpio()
84 PGSR(bank) |= mask; in __mfp_config_gpio()
88 PGSR(bank) &= ~mask; in __mfp_config_gpio()
102 gpdr_lpm[bank] |= mask; in __mfp_config_gpio()
104 gpdr_lpm[bank] &= ~mask; in __mfp_config_gpio()
193 PKWR |= d->mask; in gpio_set_wake()
195 PKWR &= ~d->mask; in gpio_set_wake()
[all …]
Dpxa3xx.c249 unsigned long flags, mask = 0; in pxa3xx_set_wake() local
253 mask = ADXER_MFP_WSSP3; in pxa3xx_set_wake()
256 mask = ADXER_WMSL0; in pxa3xx_set_wake()
260 mask = ADXER_WUSBH; in pxa3xx_set_wake()
263 mask = ADXER_WKP; in pxa3xx_set_wake()
266 mask = ADXER_MFP_WAC97; in pxa3xx_set_wake()
269 mask = ADXER_WUSIM0; in pxa3xx_set_wake()
272 mask = ADXER_MFP_WSSP2; in pxa3xx_set_wake()
275 mask = ADXER_MFP_WI2C; in pxa3xx_set_wake()
278 mask = ADXER_MFP_WUART3; in pxa3xx_set_wake()
[all …]
/linux-4.1.27/drivers/staging/ozwpan/
Dozdbg.h32 #define oz_want_dbg(mask) \ argument
33 ((OZ_WANT_DBG && (OZ_DBG_##mask == OZ_DBG_ON)) || \
34 (OZ_WANT_VERBOSE_DBG && (OZ_DBG_##mask & oz_dbg_mask)))
36 #define oz_dbg(mask, fmt, ...) \ argument
38 if (oz_want_dbg(mask)) \
42 #define oz_cdev_dbg(cdev, mask, fmt, ...) \ argument
44 if (oz_want_dbg(mask)) \
48 #define oz_pd_dbg(pd, mask, fmt, ...) \ argument
50 if (oz_want_dbg(mask)) \
/linux-4.1.27/arch/m68k/amiga/
Dcia.c51 unsigned char cia_set_irq(struct ciabase *base, unsigned char mask) in cia_set_irq() argument
56 if (mask & CIA_ICR_SETCLR) in cia_set_irq()
57 base->icr_data |= mask; in cia_set_irq()
59 base->icr_data &= ~mask; in cia_set_irq()
69 unsigned char cia_able_irq(struct ciabase *base, unsigned char mask) in cia_able_irq() argument
75 base->cia->icr = mask; in cia_able_irq()
76 if (mask & CIA_ICR_SETCLR) in cia_able_irq()
77 base->icr_mask |= mask; in cia_able_irq()
79 base->icr_mask &= ~mask; in cia_able_irq()
105 unsigned char mask; in cia_irq_enable() local
[all …]
/linux-4.1.27/drivers/clk/ti/
Dmux.c45 val &= mux->mask; in ti_clk_mux_get_parent()
88 val = mux->mask << (mux->shift + 16); in ti_clk_mux_set_parent()
91 val &= ~(mux->mask << mux->shift); in ti_clk_mux_set_parent()
111 u8 shift, u32 mask, u8 clk_mux_flags, in _register_mux() argument
134 mux->mask = mask; in _register_mux()
155 u32 mask; in ti_clk_register_mux() local
162 mask = mux->num_parents; in ti_clk_register_mux()
164 mask--; in ti_clk_register_mux()
166 mask = (1 << fls(mask)) - 1; in ti_clk_register_mux()
177 flags, (void __iomem *)reg, mux->bit_shift, mask, in ti_clk_register_mux()
[all …]
/linux-4.1.27/drivers/staging/comedi/drivers/
Ddt2817.c49 unsigned int mask; in dt2817_dio_insn_config() local
53 mask = 0x000000ff; in dt2817_dio_insn_config()
55 mask = 0x0000ff00; in dt2817_dio_insn_config()
57 mask = 0x00ff0000; in dt2817_dio_insn_config()
59 mask = 0xff000000; in dt2817_dio_insn_config()
61 ret = comedi_dio_insn_config(dev, s, insn, data, mask); in dt2817_dio_insn_config()
85 unsigned int mask; in dt2817_dio_insn_bits() local
88 mask = comedi_dio_update_state(s, data); in dt2817_dio_insn_bits()
89 if (mask) { in dt2817_dio_insn_bits()
90 if (mask & 0x000000ff) in dt2817_dio_insn_bits()
[all …]
/linux-4.1.27/drivers/leds/
Dleds-ot200.c22 u8 mask; member
34 .mask = BIT(0),
39 .mask = BIT(1),
44 .mask = BIT(2),
49 .mask = BIT(6),
54 .mask = BIT(5),
59 .mask = BIT(4),
64 .mask = BIT(3),
69 .mask = BIT(2),
74 .mask = BIT(1),
[all …]
/linux-4.1.27/arch/x86/kernel/apic/
Dipi.c21 void default_send_IPI_mask_sequence_phys(const struct cpumask *mask, int vector) in default_send_IPI_mask_sequence_phys() argument
32 for_each_cpu(query_cpu, mask) { in default_send_IPI_mask_sequence_phys()
39 void default_send_IPI_mask_allbutself_phys(const struct cpumask *mask, in default_send_IPI_mask_allbutself_phys() argument
49 for_each_cpu(query_cpu, mask) { in default_send_IPI_mask_allbutself_phys()
60 void default_send_IPI_mask_sequence_logical(const struct cpumask *mask, in default_send_IPI_mask_sequence_logical() argument
73 for_each_cpu(query_cpu, mask) in default_send_IPI_mask_sequence_logical()
80 void default_send_IPI_mask_allbutself_logical(const struct cpumask *mask, in default_send_IPI_mask_allbutself_logical() argument
90 for_each_cpu(query_cpu, mask) { in default_send_IPI_mask_allbutself_logical()
105 unsigned long mask = cpumask_bits(cpumask)[0]; in default_send_IPI_mask_logical() local
108 if (!mask) in default_send_IPI_mask_logical()
[all …]
/linux-4.1.27/arch/arm/include/asm/
Dword-at-a-time.h21 unsigned long mask = ((a - c->one_bits) & ~a) & c->high_bits; in has_zero() local
22 *bits = mask; in has_zero()
23 return mask; in has_zero()
34 static inline unsigned long find_zero(unsigned long mask) in find_zero() argument
40 ret = fls(mask) >> 3; in find_zero()
43 ret = (0x0ff0001 + mask) >> 23; in find_zero()
45 ret &= mask; in find_zero()
51 #define zero_bytemask(mask) (mask) argument
Dbitops.h38 unsigned long mask = 1UL << (bit & 31); in ____atomic_set_bit() local
43 *p |= mask; in ____atomic_set_bit()
50 unsigned long mask = 1UL << (bit & 31); in ____atomic_clear_bit() local
55 *p &= ~mask; in ____atomic_clear_bit()
62 unsigned long mask = 1UL << (bit & 31); in ____atomic_change_bit() local
67 *p ^= mask; in ____atomic_change_bit()
76 unsigned long mask = 1UL << (bit & 31); in ____atomic_test_and_set_bit() local
82 *p = res | mask; in ____atomic_test_and_set_bit()
85 return (res & mask) != 0; in ____atomic_test_and_set_bit()
93 unsigned long mask = 1UL << (bit & 31); in ____atomic_test_and_clear_bit() local
[all …]
/linux-4.1.27/fs/notify/
Dfsnotify.c90 int __fsnotify_parent(struct path *path, struct dentry *dentry, __u32 mask) in __fsnotify_parent() argument
107 else if (p_inode->i_fsnotify_mask & mask) { in __fsnotify_parent()
110 mask |= FS_EVENT_ON_CHILD; in __fsnotify_parent()
113 ret = fsnotify(p_inode, mask, path, FSNOTIFY_EVENT_PATH, in __fsnotify_parent()
116 ret = fsnotify(p_inode, mask, dentry->d_inode, FSNOTIFY_EVENT_INODE, in __fsnotify_parent()
129 __u32 mask, void *data, in send_to_group() argument
143 if (mask & FS_MODIFY) { in send_to_group()
155 inode_test_mask = (mask & ~FS_EVENT_ON_CHILD); in send_to_group()
156 inode_test_mask &= inode_mark->mask; in send_to_group()
162 vfsmount_test_mask = (mask & ~FS_EVENT_ON_CHILD); in send_to_group()
[all …]
/linux-4.1.27/arch/mips/paravirt/
Dparavirt-irq.c68 unsigned int mask = 0x100 << cd->bit; in irq_core_set_enable_local() local
74 set_c0_status(mask); in irq_core_set_enable_local()
76 clear_c0_status(mask); in irq_core_set_enable_local()
175 u32 mask = 1u << data->irq; in irq_pci_enable() local
177 __raw_writel(mask, mips_irq_chip + mips_irq_chip_reg_en_w1s); in irq_pci_enable()
182 u32 mask = 1u << data->irq; in irq_pci_disable() local
184 __raw_writel(mask, mips_irq_chip + mips_irq_chip_reg_en_w1c); in irq_pci_disable()
193 u32 mask = 1u << data->irq; in irq_pci_mask() local
195 __raw_writel(mask, mips_irq_chip + mips_irq_chip_reg_en_w1c); in irq_pci_mask()
200 u32 mask = 1u << data->irq; in irq_pci_unmask() local
[all …]
/linux-4.1.27/drivers/gpu/drm/nouveau/nvkm/subdev/fb/
Dramfuc.h16 u32 mask; member
21 ramfuc_stride(u32 addr, u32 stride, u32 mask) in ramfuc_stride() argument
27 .mask = mask, in ramfuc_stride()
39 .mask = 0x3, in ramfuc_reg2()
51 .mask = 0x1, in ramfuc_reg()
93 unsigned int mask, off = 0; in ramfuc_wr32() local
98 for (mask = reg->mask; mask > 0; mask = (mask & ~1) >> 1) { in ramfuc_wr32()
99 if (mask & 1) in ramfuc_wr32()
112 ramfuc_mask(struct ramfuc *ram, struct ramfuc_reg *reg, u32 mask, u32 data) in ramfuc_mask() argument
115 if (temp != ((temp & ~mask) | data) || reg->force) { in ramfuc_mask()
[all …]
Dramgk104.c141 gk104_ram_train(struct gk104_ramfuc *fuc, u32 mask, u32 data) in gk104_ram_train() argument
146 ram_mask(fuc, 0x10f910, mask, data); in gk104_ram_train()
147 ram_mask(fuc, 0x10f914, mask, data); in gk104_ram_train()
235 u32 mask = _mask | _copy; in gk104_ram_nuts() local
242 u32 next = (prev & ~mask) | data; in gk104_ram_nuts()
258 u32 mask, data; in gk104_ram_calc_gddr5() local
302 mask = 0x800f07e0; in gk104_ram_calc_gddr5()
325 mask |= 0x03000000; in gk104_ram_calc_gddr5()
327 mask |= 0x00002000; in gk104_ram_calc_gddr5()
329 mask |= 0x00004000; in gk104_ram_calc_gddr5()
[all …]
/linux-4.1.27/drivers/infiniband/hw/qib/
Dqib_twsi.c91 u32 mask; in scl_out() local
95 mask = 1UL << dd->gpio_scl_num; in scl_out()
98 dd->f_gpio_mod(dd, 0, bit ? 0 : mask, mask); in scl_out()
110 if (mask & dd->f_gpio_mod(dd, 0, 0, 0)) in scl_out()
123 u32 mask; in sda_out() local
125 mask = 1UL << dd->gpio_sda_num; in sda_out()
128 dd->f_gpio_mod(dd, 0, bit ? 0 : mask, mask); in sda_out()
137 u32 read_val, mask; in sda_in() local
140 mask = (1UL << bnum); in sda_in()
142 dd->f_gpio_mod(dd, 0, 0, mask); in sda_in()
[all …]
Dqib_qsfp.c50 u32 out, mask; in qsfp_read() local
71 mask = QSFP_GPIO_MOD_SEL_N | QSFP_GPIO_MOD_RST_N | QSFP_GPIO_LP_MODE; in qsfp_read()
74 mask <<= QSFP_GPIO_PORT2_SHIFT; in qsfp_read()
78 dd->f_gpio_mod(dd, out, mask, mask); in qsfp_read()
128 dd->f_gpio_mod(dd, mask, mask, mask); in qsfp_read()
161 u32 out, mask; in qib_qsfp_write() local
181 mask = QSFP_GPIO_MOD_SEL_N | QSFP_GPIO_MOD_RST_N | QSFP_GPIO_LP_MODE; in qib_qsfp_write()
184 mask <<= QSFP_GPIO_PORT2_SHIFT; in qib_qsfp_write()
187 dd->f_gpio_mod(dd, out, mask, mask); in qib_qsfp_write()
233 dd->f_gpio_mod(dd, mask, mask, mask); in qib_qsfp_write()
[all …]
/linux-4.1.27/security/apparmor/
Dresource.c107 (profile->rlimits.mask & (1 << resource) && in aa_task_setrlimit()
123 unsigned int mask = 0; in __aa_transition_rlimits() local
130 if (old->rlimits.mask) { in __aa_transition_rlimits()
131 for (i = 0, mask = 1; i < RLIM_NLIMITS; i++, mask <<= 1) { in __aa_transition_rlimits()
132 if (old->rlimits.mask & mask) { in __aa_transition_rlimits()
142 if (!new->rlimits.mask) in __aa_transition_rlimits()
144 for (i = 0, mask = 1; i < RLIM_NLIMITS; i++, mask <<= 1) { in __aa_transition_rlimits()
145 if (!(new->rlimits.mask & mask)) in __aa_transition_rlimits()
/linux-4.1.27/drivers/irqchip/
Dirq-xtensa-mx.c71 unsigned int mask = 1u << d->hwirq; in xtensa_mx_irq_mask() local
73 if (mask & (XCHAL_INTTYPE_MASK_EXTERN_EDGE | in xtensa_mx_irq_mask()
78 mask = __this_cpu_read(cached_irq_mask) & ~mask; in xtensa_mx_irq_mask()
79 __this_cpu_write(cached_irq_mask, mask); in xtensa_mx_irq_mask()
80 set_sr(mask, intenable); in xtensa_mx_irq_mask()
86 unsigned int mask = 1u << d->hwirq; in xtensa_mx_irq_unmask() local
88 if (mask & (XCHAL_INTTYPE_MASK_EXTERN_EDGE | in xtensa_mx_irq_unmask()
93 mask |= __this_cpu_read(cached_irq_mask); in xtensa_mx_irq_unmask()
94 __this_cpu_write(cached_irq_mask, mask); in xtensa_mx_irq_unmask()
95 set_sr(mask, intenable); in xtensa_mx_irq_unmask()
[all …]
Dirq-hip04.c96 u32 mask = 1 << (hip04_irq(d) % 32); in hip04_mask_irq() local
99 writel_relaxed(mask, hip04_dist_base(d) + GIC_DIST_ENABLE_CLEAR + in hip04_mask_irq()
106 u32 mask = 1 << (hip04_irq(d) % 32); in hip04_unmask_irq() local
109 writel_relaxed(mask, hip04_dist_base(d) + GIC_DIST_ENABLE_SET + in hip04_unmask_irq()
150 u32 val, mask, bit; in hip04_irq_set_affinity() local
162 mask = 0xffff << shift; in hip04_irq_set_affinity()
164 val = readl_relaxed(reg) & ~mask; in hip04_irq_set_affinity()
210 u32 mask, i; in hip04_get_cpumask() local
212 for (i = mask = 0; i < 32; i += 2) { in hip04_get_cpumask()
213 mask = readl_relaxed(base + GIC_DIST_TARGET + i * 2); in hip04_get_cpumask()
[all …]
/linux-4.1.27/arch/powerpc/sysdev/qe_lib/
Dqe_ic.c38 .mask = 0x00008000,
44 .mask = 0x00004000,
50 .mask = 0x00002000,
56 .mask = 0x00000040,
62 .mask = 0x00000020,
68 .mask = 0x00000010,
74 .mask = 0x00000008,
80 .mask = 0x00000004,
86 .mask = 0x00000002,
92 .mask = 0x10000000,
[all …]
/linux-4.1.27/arch/mips/include/asm/mach-pmcs-msp71xx/
Dmsp_regops.h73 u32 const mask, in set_value_reg32() argument
89 : "ir" (~mask), "ir" (value), GCC_OFF_SMALL_ASM() (*addr)); in set_value_reg32()
96 u32 const mask) in set_reg32() argument
110 : "ir" (mask), GCC_OFF_SMALL_ASM() (*addr)); in set_reg32()
117 u32 const mask) in clear_reg32() argument
131 : "ir" (~mask), GCC_OFF_SMALL_ASM() (*addr)); in clear_reg32()
138 u32 const mask) in toggle_reg32() argument
152 : "ir" (mask), GCC_OFF_SMALL_ASM() (*addr)); in toggle_reg32()
159 u32 const mask) in read_reg32() argument
170 : "m" (*addr), "ir" (mask)); in read_reg32()
/linux-4.1.27/fs/notify/fanotify/
Dfanotify.c44 if (event->mask & FAN_ALL_PERM_EVENTS) in fanotify_merge()
58 test_event->mask |= event->mask; in fanotify_merge()
123 marks_mask = (vfsmnt_mark->mask | inode_mark->mask); in fanotify_should_send_event()
131 !(inode_mark->mask & FS_EVENT_ON_CHILD)) in fanotify_should_send_event()
133 marks_mask = inode_mark->mask; in fanotify_should_send_event()
136 marks_mask = vfsmnt_mark->mask; in fanotify_should_send_event()
153 struct fanotify_event_info *fanotify_alloc_event(struct inode *inode, u32 mask, in fanotify_alloc_event() argument
159 if (mask & FAN_ALL_PERM_EVENTS) { in fanotify_alloc_event()
175 fsnotify_init_event(&event->fse, inode, mask); in fanotify_alloc_event()
191 u32 mask, void *data, int data_type, in fanotify_handle_event() argument
[all …]
Dfanotify_user.c131 metadata->mask = fsn_event->mask & FAN_ALL_OUTGOING_EVENTS; in fill_event_metadata()
133 if (unlikely(fsn_event->mask & FAN_Q_OVERFLOW)) in fill_event_metadata()
224 if (event->mask & FAN_ALL_PERM_EVENTS) in copy_event_to_user()
301 if (!(kevent->mask & FAN_ALL_PERM_EVENTS)) { in fanotify_read()
486 __u32 mask, in fanotify_mark_remove_from_mask() argument
494 __u32 tmask = fsn_mark->mask & ~mask; in fanotify_mark_remove_from_mask()
499 oldmask = fsn_mark->mask; in fanotify_mark_remove_from_mask()
502 __u32 tmask = fsn_mark->ignored_mask & ~mask; in fanotify_mark_remove_from_mask()
508 *destroy = !(fsn_mark->mask | fsn_mark->ignored_mask); in fanotify_mark_remove_from_mask()
511 return mask & oldmask; in fanotify_mark_remove_from_mask()
[all …]
/linux-4.1.27/drivers/usb/chipidea/
Dci.h293 static inline u32 hw_read_id_reg(struct ci_hdrc *ci, u32 offset, u32 mask) in hw_read_id_reg() argument
295 return ioread32(ci->hw_bank.abs + offset) & mask; in hw_read_id_reg()
306 u32 mask, u32 data) in hw_write_id_reg() argument
308 if (~mask) in hw_write_id_reg()
309 data = (ioread32(ci->hw_bank.abs + offset) & ~mask) in hw_write_id_reg()
310 | (data & mask); in hw_write_id_reg()
323 static inline u32 hw_read(struct ci_hdrc *ci, enum ci_hw_regs reg, u32 mask) in hw_read() argument
325 return ioread32(ci->hw_bank.regmap[reg]) & mask; in hw_read()
356 u32 mask, u32 data) in hw_write() argument
358 if (~mask) in hw_write()
[all …]
/linux-4.1.27/arch/powerpc/mm/
Dslice.c50 static void slice_print_mask(const char *label, struct slice_mask mask) in slice_print_mask() argument
59 *(p++) = (mask.low_slices & (1 << i)) ? '1' : '0'; in slice_print_mask()
64 *(p++) = (mask.high_slices & (1ul << i)) ? '1' : '0'; in slice_print_mask()
74 static void slice_print_mask(const char *label, struct slice_mask mask) {} in slice_print_mask() argument
174 static int slice_check_fit(struct slice_mask mask, struct slice_mask available) in slice_check_fit() argument
176 return (mask.low_slices & available.low_slices) == mask.low_slices && in slice_check_fit()
177 (mask.high_slices & available.high_slices) == mask.high_slices; in slice_check_fit()
196 static void slice_convert(struct mm_struct *mm, struct slice_mask mask, int psize) in slice_convert() argument
205 slice_print_mask(" mask", mask); in slice_convert()
214 if (mask.low_slices & (1u << i)) in slice_convert()
[all …]
/linux-4.1.27/sound/pci/ac97/
Dac97_patch.h25 #define AC97_SINGLE_VALUE(reg,shift,mask,invert) \ argument
26 ((reg) | ((shift) << 8) | ((shift) << 12) | ((mask) << 16) | \
28 #define AC97_PAGE_SINGLE_VALUE(reg,shift,mask,invert,page) \ argument
29 (AC97_SINGLE_VALUE(reg,shift,mask,invert) | (1<<25) | ((page) << 26))
30 #define AC97_SINGLE(xname, reg, shift, mask, invert) \ argument
34 .private_value = AC97_SINGLE_VALUE(reg, shift, mask, invert) }
35 #define AC97_PAGE_SINGLE(xname, reg, shift, mask, invert, page) \ argument
39 .private_value = AC97_PAGE_SINGLE_VALUE(reg, shift, mask, invert, page) }
40 #define AC97_DOUBLE(xname, reg, shift_left, shift_right, mask, invert) \ argument
44 ….private_value = (reg) | ((shift_left) << 8) | ((shift_right) << 12) | ((mask) << 16) | ((invert) …
[all …]
/linux-4.1.27/arch/m68k/68000/
Dints.c80 int mask; in process_int() local
88 mask = 0x00000001; in process_int()
91 mask = 0x00000010; in process_int()
96 mask = 0x00000100; in process_int()
99 mask = 0x00001000; in process_int()
106 mask = 0x00010000; in process_int()
109 mask = 0x00100000; in process_int()
114 mask = 0x01000000; in process_int()
117 mask = 0x10000000; in process_int()
123 while (! (mask & pend)) { in process_int()
[all …]
/linux-4.1.27/arch/arm/mach-footbridge/
Disa-irq.c35 unsigned int mask = 1 << (d->irq & 7); in isa_mask_pic_lo_irq() local
37 outb(inb(PIC_MASK_LO) | mask, PIC_MASK_LO); in isa_mask_pic_lo_irq()
42 unsigned int mask = 1 << (d->irq & 7); in isa_ack_pic_lo_irq() local
44 outb(inb(PIC_MASK_LO) | mask, PIC_MASK_LO); in isa_ack_pic_lo_irq()
50 unsigned int mask = 1 << (d->irq & 7); in isa_unmask_pic_lo_irq() local
52 outb(inb(PIC_MASK_LO) & ~mask, PIC_MASK_LO); in isa_unmask_pic_lo_irq()
63 unsigned int mask = 1 << (d->irq & 7); in isa_mask_pic_hi_irq() local
65 outb(inb(PIC_MASK_HI) | mask, PIC_MASK_HI); in isa_mask_pic_hi_irq()
70 unsigned int mask = 1 << (d->irq & 7); in isa_ack_pic_hi_irq() local
72 outb(inb(PIC_MASK_HI) | mask, PIC_MASK_HI); in isa_ack_pic_hi_irq()
[all …]
/linux-4.1.27/arch/powerpc/platforms/powermac/
Dpfunc_base.c43 static int macio_do_gpio_write(PMF_STD_ARGS, u8 value, u8 mask) in macio_do_gpio_write() argument
56 tmp = (tmp & ~mask) | (value & mask); in macio_do_gpio_write()
65 static int macio_do_gpio_read(PMF_STD_ARGS, u8 mask, int rshift, u8 xor) in macio_do_gpio_read() argument
75 *args->u[0].p = ((value & mask) >> rshift) ^ xor; in macio_do_gpio_read()
144 static int macio_do_write_reg32(PMF_STD_ARGS, u32 offset, u32 value, u32 mask) in macio_do_write_reg32() argument
150 MACIO_OUT32(offset, (MACIO_IN32(offset) & ~mask) | (value & mask)); in macio_do_write_reg32()
167 static int macio_do_write_reg8(PMF_STD_ARGS, u32 offset, u8 value, u8 mask) in macio_do_write_reg8() argument
173 MACIO_OUT8(offset, (MACIO_IN8(offset) & ~mask) | (value & mask)); in macio_do_write_reg8()
190 static int macio_do_read_reg32_msrx(PMF_STD_ARGS, u32 offset, u32 mask, in macio_do_read_reg32_msrx() argument
199 *args->u[0].p = ((MACIO_IN32(offset) & mask) >> shift) ^ xor; in macio_do_read_reg32_msrx()
[all …]
/linux-4.1.27/sound/soc/sh/rcar/
Dadg.c65 u32 mask, val; in rsnd_adg_set_cmd_timsel_gen2() local
70 mask = 0xffff << shift; in rsnd_adg_set_cmd_timsel_gen2()
72 rsnd_mod_bset(mod, CMDOUT_TIMSEL, mask, val); in rsnd_adg_set_cmd_timsel_gen2()
84 u32 mask, ws; in rsnd_adg_set_src_timsel_gen2() local
94 mask = 0xffff << shift; in rsnd_adg_set_src_timsel_gen2()
98 rsnd_mod_bset(mod, SRCIN_TIMSEL0, mask, in); in rsnd_adg_set_src_timsel_gen2()
99 rsnd_mod_bset(mod, SRCOUT_TIMSEL0, mask, out); in rsnd_adg_set_src_timsel_gen2()
102 rsnd_mod_bset(mod, SRCIN_TIMSEL1, mask, in); in rsnd_adg_set_src_timsel_gen2()
103 rsnd_mod_bset(mod, SRCOUT_TIMSEL1, mask, out); in rsnd_adg_set_src_timsel_gen2()
106 rsnd_mod_bset(mod, SRCIN_TIMSEL2, mask, in); in rsnd_adg_set_src_timsel_gen2()
[all …]
/linux-4.1.27/drivers/net/wireless/iwlwifi/
Diwl-io.h54 static inline void iwl_set_bit(struct iwl_trans *trans, u32 reg, u32 mask) in iwl_set_bit() argument
56 iwl_trans_set_bits_mask(trans, reg, mask, mask); in iwl_set_bit()
59 static inline void iwl_clear_bit(struct iwl_trans *trans, u32 reg, u32 mask) in iwl_clear_bit() argument
61 iwl_trans_set_bits_mask(trans, reg, mask, 0); in iwl_clear_bit()
65 u32 bits, u32 mask, int timeout);
66 int iwl_poll_direct_bit(struct iwl_trans *trans, u32 addr, u32 mask,
78 u32 bits, u32 mask, int timeout);
79 void iwl_set_bits_prph(struct iwl_trans *trans, u32 ofs, u32 mask);
81 u32 bits, u32 mask);
82 void iwl_clear_bits_prph(struct iwl_trans *trans, u32 ofs, u32 mask);
Diwl-io.c42 u32 bits, u32 mask, int timeout) in iwl_poll_bit() argument
47 if ((iwl_read32(trans, addr) & mask) == (bits & mask)) in iwl_poll_bit()
81 int iwl_poll_direct_bit(struct iwl_trans *trans, u32 addr, u32 mask, in iwl_poll_direct_bit() argument
87 if ((iwl_read_direct32(trans, addr) & mask) == mask) in iwl_poll_direct_bit()
135 u32 bits, u32 mask, int timeout) in iwl_poll_prph_bit() argument
140 if ((iwl_read_prph(trans, addr) & mask) == (bits & mask)) in iwl_poll_prph_bit()
149 void iwl_set_bits_prph(struct iwl_trans *trans, u32 ofs, u32 mask) in iwl_set_bits_prph() argument
155 __iwl_read_prph(trans, ofs) | mask); in iwl_set_bits_prph()
162 u32 bits, u32 mask) in iwl_set_bits_mask_prph() argument
168 (__iwl_read_prph(trans, ofs) & mask) | bits); in iwl_set_bits_mask_prph()
[all …]
/linux-4.1.27/arch/tile/include/uapi/arch/
Dsim_def.h293 #define SIM_TRACE_SPR_ARG(mask) \ argument
294 (SIM_CONTROL_SET_TRACING | ((mask) << _SIM_CONTROL_OPERATOR_BITS))
349 #define SIM_DUMP_SPR_ARG(mask) \ argument
350 (SIM_CONTROL_DUMP | ((mask) << _SIM_CONTROL_OPERATOR_BITS))
384 #define SIM_PROFILER_CHIP_CLEAR_SPR_ARG(mask) \ argument
385 (SIM_CONTROL_PROFILER_CHIP_CLEAR | ((mask) << _SIM_CONTROL_OPERATOR_BITS))
388 #define SIM_PROFILER_CHIP_DISABLE_SPR_ARG(mask) \ argument
389 (SIM_CONTROL_PROFILER_CHIP_DISABLE | ((mask) << _SIM_CONTROL_OPERATOR_BITS))
392 #define SIM_PROFILER_CHIP_ENABLE_SPR_ARG(mask) \ argument
393 (SIM_CONTROL_PROFILER_CHIP_ENABLE | ((mask) << _SIM_CONTROL_OPERATOR_BITS))
/linux-4.1.27/arch/arm/kernel/
Dsleep.S37 .macro compute_mpidr_hash dst, rs0, rs1, rs2, mpidr, mask
38 and \mpidr, \mpidr, \mask @ mask out MPIDR bits
39 and \dst, \mpidr, #0xff @ mask=aff0
42 and \mask, \mpidr, #0xff00 @ mask = aff1
43 ARM( orr \dst, \dst, \mask, lsr \rs1 ) @ dst|=(aff1>>rs1)
44 THUMB( lsr \mask, \mask, \rs1 )
45 THUMB( orr \dst, \dst, \mask )
46 and \mask, \mpidr, #0xff0000 @ mask = aff2
47 ARM( orr \dst, \dst, \mask, lsr \rs2 ) @ dst|=(aff2>>rs2)
48 THUMB( lsr \mask, \mask, \rs2 )
[all …]
/linux-4.1.27/sound/pci/
Dak4531_codec.c65 #define AK4531_SINGLE(xname, xindex, reg, shift, mask, invert) \ argument
69 .private_value = reg | (shift << 16) | (mask << 24) | (invert << 22) }
70 #define AK4531_SINGLE_TLV(xname, xindex, reg, shift, mask, invert, xtlv) \ argument
76 .private_value = reg | (shift << 16) | (mask << 24) | (invert << 22), \
81 int mask = (kcontrol->private_value >> 24) & 0xff; in snd_ak4531_info_single() local
83 uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER; in snd_ak4531_info_single()
86 uinfo->value.integer.max = mask; in snd_ak4531_info_single()
95 int mask = (kcontrol->private_value >> 24) & 0xff; in snd_ak4531_get_single() local
100 val = (ak4531->regs[reg] >> shift) & mask; in snd_ak4531_get_single()
103 val = mask - val; in snd_ak4531_get_single()
[all …]
/linux-4.1.27/drivers/infiniband/hw/ehca/
Dehca_tools.h132 #define EHCA_BMASK_SHIFTPOS(mask) (((mask) >> 16) & 0xffff) argument
135 #define EHCA_BMASK_MASK(mask) (~0ULL >> ((64 - (mask)) & 0xffff)) argument
143 #define EHCA_BMASK_SET(mask, value) \ argument
144 ((EHCA_BMASK_MASK(mask) & ((u64)(value))) << EHCA_BMASK_SHIFTPOS(mask))
149 #define EHCA_BMASK_GET(mask, value) \ argument
150 (EHCA_BMASK_MASK(mask) & (((u64)(value)) >> EHCA_BMASK_SHIFTPOS(mask)))
/linux-4.1.27/arch/arm/plat-samsung/
Dwakeup-mask.c23 struct samsung_wakeup_mask *mask, int nr_mask) in samsung_sync_wakemask() argument
30 for (; nr_mask > 0; nr_mask--, mask++) { in samsung_sync_wakemask()
31 if (mask->irq == NO_WAKEUP_IRQ) { in samsung_sync_wakemask()
32 val |= mask->bit; in samsung_sync_wakemask()
36 data = irq_get_irq_data(mask->irq); in samsung_sync_wakemask()
40 val &= ~mask->bit; in samsung_sync_wakemask()
42 val |= mask->bit; in samsung_sync_wakemask()
Dpm-gpio.c133 u32 gpcon, old, new, mask; in samsung_gpio_pm_2bit_resume() local
145 for (nr = 0, mask = 0x03; nr < 32; nr += 2, mask <<= 2) { in samsung_gpio_pm_2bit_resume()
146 old = (old_gpcon & mask) >> nr; in samsung_gpio_pm_2bit_resume()
147 new = (gps_gpcon & mask) >> nr; in samsung_gpio_pm_2bit_resume()
172 change_mask |= mask; in samsung_gpio_pm_2bit_resume()
210 u32 old, new, mask; in samsung_gpio_pm_4bit_mask() local
214 for (nr = 0, mask = 0x0f; nr < 16; nr += 4, mask <<= 4) { in samsung_gpio_pm_4bit_mask()
215 old = (old_gpcon & mask) >> nr; in samsung_gpio_pm_4bit_mask()
216 new = (gps_gpcon & mask) >> nr; in samsung_gpio_pm_4bit_mask()
241 change_mask |= mask; in samsung_gpio_pm_4bit_mask()
[all …]
/linux-4.1.27/drivers/bcma/
Ddriver_chipcommon.c19 u32 mask, u32 value) in bcma_cc_write32_masked() argument
21 value &= mask; in bcma_cc_write32_masked()
22 value |= bcma_cc_read32(cc, offset) & ~mask; in bcma_cc_write32_masked()
205 void bcma_chipco_irq_mask(struct bcma_drv_cc *cc, u32 mask, u32 value) in bcma_chipco_irq_mask() argument
207 bcma_cc_write32_masked(cc, BCMA_CC_IRQMASK, mask, value); in bcma_chipco_irq_mask()
210 u32 bcma_chipco_irq_status(struct bcma_drv_cc *cc, u32 mask) in bcma_chipco_irq_status() argument
212 return bcma_cc_read32(cc, BCMA_CC_IRQSTAT) & mask; in bcma_chipco_irq_status()
215 u32 bcma_chipco_gpio_in(struct bcma_drv_cc *cc, u32 mask) in bcma_chipco_gpio_in() argument
217 return bcma_cc_read32(cc, BCMA_CC_GPIOIN) & mask; in bcma_chipco_gpio_in()
220 u32 bcma_chipco_gpio_out(struct bcma_drv_cc *cc, u32 mask, u32 value) in bcma_chipco_gpio_out() argument
[all …]
/linux-4.1.27/arch/xtensa/kernel/
Dirq.c91 u32 mask = 1 << hw; in xtensa_irq_map() local
93 if (mask & XCHAL_INTTYPE_MASK_SOFTWARE) { in xtensa_irq_map()
97 } else if (mask & XCHAL_INTTYPE_MASK_EXTERN_EDGE) { in xtensa_irq_map()
101 } else if (mask & XCHAL_INTTYPE_MASK_EXTERN_LEVEL) { in xtensa_irq_map()
105 } else if (mask & XCHAL_INTTYPE_MASK_TIMER) { in xtensa_irq_map()
120 unsigned mask = XCHAL_INTTYPE_MASK_EXTERN_EDGE | in xtensa_map_ext_irq() local
124 for (i = 0; mask; ++i, mask >>= 1) { in xtensa_map_ext_irq()
125 if ((mask & 1) && ext_irq-- == 0) in xtensa_map_ext_irq()
133 unsigned mask = (XCHAL_INTTYPE_MASK_EXTERN_EDGE | in xtensa_get_ext_irq_no() local
136 return hweight32(mask); in xtensa_get_ext_irq_no()
/linux-4.1.27/drivers/media/rc/img-ir/
Dimg-ir-nec.c61 data_m = in->mask & 0xff; in img_ir_nec_filter()
63 if ((in->data | in->mask) & 0xff000000) { in img_ir_nec_filter()
67 addr_m = bitrev8(in->mask >> 24); in img_ir_nec_filter()
69 addr_inv_m = bitrev8(in->mask >> 16); in img_ir_nec_filter()
71 data_m = bitrev8(in->mask >> 8); in img_ir_nec_filter()
73 data_inv_m = bitrev8(in->mask >> 0); in img_ir_nec_filter()
74 } else if ((in->data | in->mask) & 0x00ff0000) { in img_ir_nec_filter()
78 addr_m = (in->mask >> 16) & 0xff; in img_ir_nec_filter()
80 addr_inv_m = (in->mask >> 8) & 0xff; in img_ir_nec_filter()
87 addr_m = (in->mask >> 8) & 0xff; in img_ir_nec_filter()
[all …]
/linux-4.1.27/drivers/ssb/
Dembedded.c69 u32 ssb_gpio_in(struct ssb_bus *bus, u32 mask) in ssb_gpio_in() argument
76 res = ssb_chipco_gpio_in(&bus->chipco, mask); in ssb_gpio_in()
78 res = ssb_extif_gpio_in(&bus->extif, mask); in ssb_gpio_in()
87 u32 ssb_gpio_out(struct ssb_bus *bus, u32 mask, u32 value) in ssb_gpio_out() argument
94 res = ssb_chipco_gpio_out(&bus->chipco, mask, value); in ssb_gpio_out()
96 res = ssb_extif_gpio_out(&bus->extif, mask, value); in ssb_gpio_out()
105 u32 ssb_gpio_outen(struct ssb_bus *bus, u32 mask, u32 value) in ssb_gpio_outen() argument
112 res = ssb_chipco_gpio_outen(&bus->chipco, mask, value); in ssb_gpio_outen()
114 res = ssb_extif_gpio_outen(&bus->extif, mask, value); in ssb_gpio_outen()
123 u32 ssb_gpio_control(struct ssb_bus *bus, u32 mask, u32 value) in ssb_gpio_control() argument
[all …]
Ddriver_extif.c31 u32 mask, u32 value) in extif_write32_masked() argument
33 value &= mask; in extif_write32_masked()
34 value |= extif_read32(extif, offset) & ~mask; in extif_write32_masked()
148 u32 ssb_extif_gpio_in(struct ssb_extif *extif, u32 mask) in ssb_extif_gpio_in() argument
150 return extif_read32(extif, SSB_EXTIF_GPIO_IN) & mask; in ssb_extif_gpio_in()
153 u32 ssb_extif_gpio_out(struct ssb_extif *extif, u32 mask, u32 value) in ssb_extif_gpio_out() argument
160 mask, value); in ssb_extif_gpio_out()
166 u32 ssb_extif_gpio_outen(struct ssb_extif *extif, u32 mask, u32 value) in ssb_extif_gpio_outen() argument
173 mask, value); in ssb_extif_gpio_outen()
179 u32 ssb_extif_gpio_polarity(struct ssb_extif *extif, u32 mask, u32 value) in ssb_extif_gpio_polarity() argument
[all …]
/linux-4.1.27/arch/arm64/include/asm/
Dword-at-a-time.h32 unsigned long mask = ((a - c->one_bits) & ~a) & c->high_bits; in has_zero() local
33 *bits = mask; in has_zero()
34 return mask; in has_zero()
45 static inline unsigned long find_zero(unsigned long mask) in find_zero() argument
47 return fls64(mask) >> 3; in find_zero()
50 #define zero_bytemask(mask) (mask) argument
/linux-4.1.27/sound/isa/cs423x/
Dcs4236_lib.c394 #define CS4236_SINGLE(xname, xindex, reg, shift, mask, invert) \ argument
398 .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24) }
400 #define CS4236_SINGLE_TLV(xname, xindex, reg, shift, mask, invert, xtlv) \ argument
405 .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24), \
410 int mask = (kcontrol->private_value >> 16) & 0xff; in snd_cs4236_info_single() local
412 uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER; in snd_cs4236_info_single()
415 uinfo->value.integer.max = mask; in snd_cs4236_info_single()
425 int mask = (kcontrol->private_value >> 16) & 0xff; in snd_cs4236_get_single() local
429 ucontrol->value.integer.value[0] = (chip->eimage[CS4236_REG(reg)] >> shift) & mask; in snd_cs4236_get_single()
432 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0]; in snd_cs4236_get_single()
[all …]
/linux-4.1.27/sound/oss/
Dvidc.h20 unsigned long obuf, int mask);
22 unsigned long obuf, int mask);
24 unsigned long obuf, int mask);
26 unsigned long obuf, int mask);
28 unsigned long obuf, int mask);
30 unsigned long obuf, int mask);
43 unsigned long obuf, int mask);
/linux-4.1.27/drivers/scsi/aic7xxx/
Daic7xxx.reg107 mask STIMESEL 0x18
132 mask PHASE_MASK CDI|IOI|MSGI
133 mask P_DATAOUT 0x00
134 mask P_DATAIN IOI
135 mask P_DATAOUT_DT P_DATAOUT|MSGI
136 mask P_DATAIN_DT P_DATAIN|MSGI
137 mask P_COMMAND CDI
138 mask P_MESGOUT CDI|MSGI
139 mask P_STATUS CDI|IOI
140 mask P_MESGIN CDI|IOI|MSGI
[all …]
/linux-4.1.27/drivers/gpu/drm/nouveau/nvkm/engine/pm/
Dgk104.c94 u32 mask; in gk104_pm_ctor() local
114 mask = (1 << nv_rd32(priv, 0x022430)) - 1; in gk104_pm_ctor()
115 mask &= ~nv_rd32(priv, 0x022504); in gk104_pm_ctor()
116 mask &= ~nv_rd32(priv, 0x022584); in gk104_pm_ctor()
118 ret = nvkm_perfdom_new(&priv->base, "gpc", mask, 0x180000, in gk104_pm_ctor()
124 mask = (1 << nv_rd32(priv, 0x022438)) - 1; in gk104_pm_ctor()
125 mask &= ~nv_rd32(priv, 0x022548); in gk104_pm_ctor()
126 mask &= ~nv_rd32(priv, 0x0225c8); in gk104_pm_ctor()
128 ret = nvkm_perfdom_new(&priv->base, "part", mask, 0x1a0000, in gk104_pm_ctor()
/linux-4.1.27/arch/arm64/kernel/
Dsleep.S37 .macro compute_mpidr_hash dst, rs0, rs1, rs2, rs3, mpidr, mask
38 and \mpidr, \mpidr, \mask // mask out MPIDR bits
41 and \mask, \mpidr, #0xff00 // mask = aff1
42 lsr \mask ,\mask, \rs1
43 orr \dst, \dst, \mask // dst|=(aff1>>rs1)
44 and \mask, \mpidr, #0xff0000 // mask = aff2
45 lsr \mask ,\mask, \rs2
46 orr \dst, \dst, \mask // dst|=(aff2>>rs2)
47 and \mask, \mpidr, #0xff00000000 // mask = aff3
48 lsr \mask ,\mask, \rs3
[all …]
/linux-4.1.27/drivers/infiniband/core/
Dpacker.c73 __be32 mask; in ib_pack() local
84 mask = cpu_to_be32(((1ull << desc[i].size_bits) - 1) << shift); in ib_pack()
86 *addr = (*addr & ~mask) | (cpu_to_be32(val) & mask); in ib_pack()
90 __be64 mask; in ib_pack() local
101 mask = cpu_to_be64((~0ull >> (64 - desc[i].size_bits)) << shift); in ib_pack()
103 *addr = (*addr & ~mask) | (cpu_to_be64(val) & mask); in ib_pack()
163 u32 mask; in ib_unpack() local
167 mask = ((1ull << desc[i].size_bits) - 1) << shift; in ib_unpack()
169 val = (be32_to_cpup(addr) & mask) >> shift; in ib_unpack()
177 u64 mask; in ib_unpack() local
[all …]
/linux-4.1.27/arch/mn10300/include/asm/
Dbitops.h61 int mask; in __clear_bit() local
64 mask = 1 << (nr & 0x1f); in __clear_bit()
65 *a &= ~mask; in __clear_bit()
81 int mask; in __change_bit() local
85 mask = 1 << (nr & 0x1f); in __change_bit()
86 *a ^= mask; in __change_bit()
138 int mask, retval; in __test_and_change_bit() local
142 mask = 1 << (nr & 0x1f); in __test_and_change_bit()
143 retval = (mask & *a) != 0; in __test_and_change_bit()
144 *a ^= mask; in __test_and_change_bit()
/linux-4.1.27/drivers/clk/qcom/
Dclk-pll.c41 u32 mask, val; in clk_pll_enable() local
43 mask = PLL_OUTCTRL | PLL_RESET_N | PLL_BYPASSNL; in clk_pll_enable()
49 if ((val & mask) == mask || val & PLL_VOTE_FSM_ENA) in clk_pll_enable()
81 u32 mask; in clk_pll_disable() local
88 mask = PLL_OUTCTRL | PLL_RESET_N | PLL_BYPASSNL; in clk_pll_disable()
89 regmap_update_bits(pll->clkr.regmap, pll->mode_reg, mask, 0); in clk_pll_disable()
235 u32 mask; in clk_pll_set_fsm_mode() local
242 mask = PLL_BIAS_COUNT_MASK << PLL_BIAS_COUNT_SHIFT; in clk_pll_set_fsm_mode()
243 mask |= PLL_LOCK_COUNT_MASK << PLL_LOCK_COUNT_SHIFT; in clk_pll_set_fsm_mode()
244 regmap_update_bits(regmap, pll->mode_reg, mask, val); in clk_pll_set_fsm_mode()
[all …]
Dreset.c35 u32 mask; in qcom_reset_assert() local
39 mask = BIT(map->bit); in qcom_reset_assert()
41 return regmap_update_bits(rst->regmap, map->reg, mask, mask); in qcom_reset_assert()
49 u32 mask; in qcom_reset_deassert() local
53 mask = BIT(map->bit); in qcom_reset_deassert()
55 return regmap_update_bits(rst->regmap, map->reg, mask, 0); in qcom_reset_deassert()
/linux-4.1.27/arch/arm/mach-omap2/
Dcm2xxx.c46 static void _write_clktrctrl(u8 c, s16 module, u32 mask) in _write_clktrctrl() argument
51 v &= ~mask; in _write_clktrctrl()
52 v |= c << __ffs(mask); in _write_clktrctrl()
56 static bool omap2xxx_cm_is_clkdm_in_hwsup(s16 module, u32 mask) in omap2xxx_cm_is_clkdm_in_hwsup() argument
61 v &= mask; in omap2xxx_cm_is_clkdm_in_hwsup()
62 v >>= __ffs(mask); in omap2xxx_cm_is_clkdm_in_hwsup()
67 static void omap2xxx_cm_clkdm_enable_hwsup(s16 module, u32 mask) in omap2xxx_cm_clkdm_enable_hwsup() argument
69 _write_clktrctrl(OMAP24XX_CLKSTCTRL_ENABLE_AUTO, module, mask); in omap2xxx_cm_clkdm_enable_hwsup()
72 static void omap2xxx_cm_clkdm_disable_hwsup(s16 module, u32 mask) in omap2xxx_cm_clkdm_disable_hwsup() argument
74 _write_clktrctrl(OMAP24XX_CLKSTCTRL_DISABLE_AUTO, module, mask); in omap2xxx_cm_clkdm_disable_hwsup()
[all …]
/linux-4.1.27/arch/alpha/lib/
Ddivide.S53 #define mask $0 macro
110 bis $31,1,mask
125 s8addq mask,$31,mask
131 addq mask,mask,mask
137 2: DIV_ONLY(addq quotient,mask,tmp2)
138 srl mask,1,mask
144 bne mask,2b
/linux-4.1.27/arch/powerpc/sysdev/ge/
Dge_pic.c115 u32 mask; in gef_pic_mask() local
118 mask = in_be32(gef_pic_irq_reg_base + GEF_PIC_INTR_MASK(0)); in gef_pic_mask()
119 mask &= ~(1 << hwirq); in gef_pic_mask()
120 out_be32(gef_pic_irq_reg_base + GEF_PIC_INTR_MASK(0), mask); in gef_pic_mask()
136 u32 mask; in gef_pic_unmask() local
139 mask = in_be32(gef_pic_irq_reg_base + GEF_PIC_INTR_MASK(0)); in gef_pic_unmask()
140 mask |= (1 << hwirq); in gef_pic_unmask()
141 out_be32(gef_pic_irq_reg_base + GEF_PIC_INTR_MASK(0), mask); in gef_pic_unmask()
230 u32 cause, mask, active; in gef_pic_get_irq() local
236 mask = in_be32(gef_pic_irq_reg_base + GEF_PIC_INTR_MASK(0)); in gef_pic_get_irq()
[all …]
/linux-4.1.27/sound/mips/
Dad1843.c203 int w, mask, oldval, newbits; in ad1843_write_bits() local
206 mask = ((1 << field->nbits) - 1) << field->lo_bit; in ad1843_write_bits()
207 oldval = (w & mask) >> field->lo_bit; in ad1843_write_bits()
208 newbits = (newval << field->lo_bit) & mask; in ad1843_write_bits()
209 w = (w & ~mask) | newbits; in ad1843_write_bits()
232 int w = 0, mask, *value, reg = -1; in ad1843_read_multi() local
243 mask = (1 << fp->nbits) - 1; in ad1843_read_multi()
244 *value = w >> fp->lo_bit & mask; in ad1843_read_multi()
266 int w, m, mask, bits; in ad1843_write_multi() local
268 mask = 0; in ad1843_write_multi()
[all …]
/linux-4.1.27/arch/m68k/include/asm/
Datariints.h117 { unsigned char mask, *reg; in get_mfp_bit() local
119 mask = 1 << (irq & 7); in get_mfp_bit()
122 return( *reg & mask ); in get_mfp_bit()
127 { unsigned char mask, *reg; in set_mfp_bit() local
129 mask = 1 << (irq & 7); in set_mfp_bit()
133 : : "di" (mask), "m" (*reg) : "memory" ); in set_mfp_bit()
138 { unsigned char mask, *reg; in clear_mfp_bit() local
140 mask = ~(1 << (irq & 7)); in clear_mfp_bit()
145 : : "di" (mask), "m" (*reg) : "memory" ); in clear_mfp_bit()
148 : : "di" (mask), "m" (*reg) : "memory" ); in clear_mfp_bit()
/linux-4.1.27/arch/mips/rb532/
Dirq.c50 u32 mask; /* mask of valid bits in pending/mask registers */ member
62 .mask = 0x0000efff,
65 .mask = 0x00001fff,
68 .mask = 0x00000007,
71 .mask = 0x0003ffff,
74 .mask = 0xffffffff,
136 unsigned int group, intr_bit, mask, irq_nr = d->irq; in rb532_disable_irq() local
148 mask = READ_MASK(addr); in rb532_disable_irq()
149 mask |= intr_bit; in rb532_disable_irq()
150 WRITE_MASK(addr, mask); in rb532_disable_irq()
[all …]
/linux-4.1.27/drivers/iio/accel/
Dst_accel_core.c199 .mask = ST_ACCEL_1_ODR_MASK,
213 .mask = ST_ACCEL_1_ODR_MASK,
218 .mask = ST_SENSORS_DEFAULT_AXIS_MASK,
222 .mask = ST_ACCEL_1_FS_MASK,
248 .mask = ST_ACCEL_1_BDU_MASK,
269 .mask = ST_ACCEL_2_ODR_MASK,
279 .mask = ST_ACCEL_2_PW_MASK,
285 .mask = ST_SENSORS_DEFAULT_AXIS_MASK,
289 .mask = ST_ACCEL_2_FS_MASK,
310 .mask = ST_ACCEL_2_BDU_MASK,
[all …]
/linux-4.1.27/drivers/iio/gyro/
Dst_gyro_core.c141 .mask = ST_GYRO_1_ODR_MASK,
151 .mask = ST_GYRO_1_PW_MASK,
157 .mask = ST_SENSORS_DEFAULT_AXIS_MASK,
161 .mask = ST_GYRO_1_FS_MASK,
182 .mask = ST_GYRO_1_BDU_MASK,
203 .mask = ST_GYRO_2_ODR_MASK,
213 .mask = ST_GYRO_2_PW_MASK,
219 .mask = ST_SENSORS_DEFAULT_AXIS_MASK,
223 .mask = ST_GYRO_2_FS_MASK,
244 .mask = ST_GYRO_2_BDU_MASK,
[all …]
/linux-4.1.27/arch/mips/cavium-octeon/
Docteon-irq.c145 unsigned int mask = 0x100 << cd->bit; in octeon_irq_core_set_enable_local() local
151 set_c0_status(mask); in octeon_irq_core_set_enable_local()
153 clear_c0_status(mask); in octeon_irq_core_set_enable_local()
424 u64 mask; in octeon_irq_ciu_enable_v2() local
429 mask = 1ull << (cd->bit); in octeon_irq_ciu_enable_v2()
438 cvmx_write_csr(CVMX_CIU_INTX_EN0_W1S(index), mask); in octeon_irq_ciu_enable_v2()
442 cvmx_write_csr(CVMX_CIU_INTX_EN1_W1S(index), mask); in octeon_irq_ciu_enable_v2()
451 u64 mask; in octeon_irq_ciu_enable_sum2() local
457 mask = 1ull << (cd->bit); in octeon_irq_ciu_enable_sum2()
459 cvmx_write_csr(CVMX_CIU_EN2_PPX_IP4_W1S(index), mask); in octeon_irq_ciu_enable_sum2()
[all …]
/linux-4.1.27/kernel/time/
Dtimecounter.c28 tc->mask = (1ULL << cc->shift) - 1; in timecounter_init()
53 cycle_delta = (cycle_now - tc->cycle_last) & tc->cc->mask; in timecounter_read_delta()
57 tc->mask, &tc->frac); in timecounter_read_delta()
83 cycle_t cycles, u64 mask, u64 frac) in cc_cyc2ns_backwards() argument
95 u64 delta = (cycle_tstamp - tc->cycle_last) & tc->cc->mask; in timecounter_cyc2time()
103 if (delta > tc->cc->mask / 2) { in timecounter_cyc2time()
104 delta = (tc->cycle_last - cycle_tstamp) & tc->cc->mask; in timecounter_cyc2time()
105 nsec -= cc_cyc2ns_backwards(tc->cc, delta, tc->mask, frac); in timecounter_cyc2time()
107 nsec += cyclecounter_cyc2ns(tc->cc, delta, tc->mask, &frac); in timecounter_cyc2time()
/linux-4.1.27/arch/arm64/mm/
Ddump.c79 u64 mask; member
87 .mask = PTE_USER,
92 .mask = PTE_RDONLY,
97 .mask = PTE_PXN,
102 .mask = PTE_SHARED,
107 .mask = PTE_AF,
112 .mask = PTE_NG,
117 .mask = PTE_UXN,
121 .mask = PTE_ATTRINDX_MASK,
125 .mask = PTE_ATTRINDX_MASK,
[all …]
/linux-4.1.27/drivers/gpu/drm/exynos/
Dregs-rotator.h66 #define ROT_ALIGN(x, align, mask) (((x) + (1 << ((align) - 1))) & (mask)) argument
68 #define ROT_MIN(min, mask) (((min) + ~(mask)) & (mask)) argument
70 #define ROT_MAX(max, mask) ((max) & (mask)) argument
/linux-4.1.27/drivers/crypto/ux500/cryp/
Dcryp_p.h23 #define CRYP_SET_BITS(reg_name, mask) \ argument
24 writel_relaxed((readl_relaxed(reg_name) | mask), reg_name)
26 #define CRYP_WRITE_BIT(reg_name, val, mask) \ argument
27 writel_relaxed(((readl_relaxed(reg_name) & ~(mask)) |\
28 ((val) & (mask))), reg_name)
33 #define CRYP_PUT_BITS(reg, val, shift, mask) \ argument
34 writel_relaxed(((readl_relaxed(reg) & ~(mask)) | \
35 (((u32)val << shift) & (mask))), reg)
/linux-4.1.27/drivers/staging/sm750fb/
Dsm750_cursor.c99 u8 color,mask,opr; in hw_cursor_setData() local
128 mask = *pmsk++; in hw_cursor_setData()
136 opr = mask ^ color; in hw_cursor_setData()
138 opr = mask & color; in hw_cursor_setData()
153 if(mask & (0x80>>j)){ in hw_cursor_setData()
155 opr = mask ^ color; in hw_cursor_setData()
157 opr = mask & color; in hw_cursor_setData()
190 u8 color, mask; in hw_cursor_setData2() local
210 mask = *pmsk++; in hw_cursor_setData2()
216 opr = mask ^ color; in hw_cursor_setData2()
[all …]
/linux-4.1.27/tools/testing/selftests/powerpc/pmu/
Dlib.c20 cpu_set_t mask; in pick_online_cpu() local
23 CPU_ZERO(&mask); in pick_online_cpu()
25 if (sched_getaffinity(0, sizeof(mask), &mask)) { in pick_online_cpu()
32 if (CPU_ISSET(cpu, &mask)) in pick_online_cpu()
37 if (CPU_ISSET(cpu, &mask)) in pick_online_cpu()
46 cpu_set_t mask; in bind_to_cpu() local
50 CPU_ZERO(&mask); in bind_to_cpu()
51 CPU_SET(cpu, &mask); in bind_to_cpu()
53 return sched_setaffinity(0, sizeof(mask), &mask); in bind_to_cpu()
/linux-4.1.27/drivers/gpu/drm/nouveau/nvkm/core/
Dparent.c36 u64 mask; in nvkm_parent_sclass() local
49 mask = nv_parent(parent)->engine; in nvkm_parent_sclass()
50 while (mask) { in nvkm_parent_sclass()
51 int i = __ffs64(mask); in nvkm_parent_sclass()
70 mask &= ~(1ULL << i); in nvkm_parent_sclass()
83 u64 mask; in nvkm_parent_lclass() local
92 mask = nv_parent(parent)->engine; in nvkm_parent_lclass()
93 while (i = __ffs64(mask), mask) { in nvkm_parent_lclass()
103 mask &= ~(1ULL << i); in nvkm_parent_lclass()
/linux-4.1.27/include/linux/ssb/
Dssb_embedded.h11 u32 ssb_gpio_in(struct ssb_bus *bus, u32 mask);
12 u32 ssb_gpio_out(struct ssb_bus *bus, u32 mask, u32 value);
13 u32 ssb_gpio_outen(struct ssb_bus *bus, u32 mask, u32 value);
14 u32 ssb_gpio_control(struct ssb_bus *bus, u32 mask, u32 value);
15 u32 ssb_gpio_intmask(struct ssb_bus *bus, u32 mask, u32 value);
16 u32 ssb_gpio_polarity(struct ssb_bus *bus, u32 mask, u32 value);
/linux-4.1.27/arch/powerpc/math-emu/
Dmtfsf.c11 u32 mask; in mtfsf() local
15 mask = 0x0f; in mtfsf()
17 mask = ~0; in mtfsf()
19 mask = ((FM & 1) | in mtfsf()
29 fpscr = ((__FPU_FPSCR & ~mask) | (frB[1] & mask)) & in mtfsf()
/linux-4.1.27/arch/m68k/q40/
Dq40ints.c168 struct IRQ_TABLE{ unsigned mask; int irq ;}; member
176 { .mask = Q40_IRQ3_MASK, .irq = 3 }, /* ser 1 */
177 { .mask = Q40_IRQ4_MASK, .irq = 4 }, /* ser 2 */
178 { .mask = Q40_IRQ14_MASK, .irq = 14 }, /* IDE 1 */
179 { .mask = Q40_IRQ15_MASK, .irq = 15 }, /* IDE 2 */
180 { .mask = Q40_IRQ6_MASK, .irq = 6 }, /* floppy, handled elsewhere */
181 { .mask = Q40_IRQ7_MASK, .irq = 7 }, /* par */
182 { .mask = Q40_IRQ5_MASK, .irq = 5 },
183 { .mask = Q40_IRQ10_MASK, .irq = 10 },
231 for (i = 0; eirqs[i].mask; i++) { in q40_irq_handler()
[all …]
/linux-4.1.27/include/crypto/
Dalgapi.h25 unsigned int (*ctxsize)(struct crypto_alg *alg, u32 type, u32 mask);
27 int (*init)(struct crypto_tfm *tfm, u32 type, u32 mask);
31 struct crypto_alg *(*lookup)(const char *name, u32 type, u32 mask);
65 u32 mask; member
143 struct crypto_instance *inst, u32 mask);
150 u32 mask);
164 u32 type, u32 mask);
167 u32 type, u32 mask) in crypto_attr_alg() argument
169 return crypto_attr_alg2(rta, NULL, type, mask); in crypto_attr_alg()
262 u32 mask = CRYPTO_ALG_TYPE_MASK; in crypto_spawn_blkcipher() local
[all …]
/linux-4.1.27/fs/affs/
Dbitmap.c43 u32 blk, bmap, bit, mask, tmp; in affs_free_block() local
68 mask = 1 << (bit & 31); in affs_free_block()
73 if (tmp & mask) in affs_free_block()
75 *data = cpu_to_be32(tmp | mask); in affs_free_block()
79 *(__be32 *)bh->b_data = cpu_to_be32(tmp - mask); in affs_free_block()
121 u32 blk, bmap, bit, mask, mask2, tmp; in affs_alloc_block() local
184 mask = ~0UL << (bit & 31); in affs_alloc_block()
188 if (tmp & mask) in affs_alloc_block()
201 mask = ~0; in affs_alloc_block()
205 bit = ffs(tmp & mask) - 1; in affs_alloc_block()
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/linux-4.1.27/arch/s390/kernel/
Dtopology.c30 cpumask_t mask; member
50 cpumask_t mask; in cpu_group_map() local
52 cpumask_copy(&mask, cpumask_of(cpu)); in cpu_group_map()
54 return mask; in cpu_group_map()
56 if (cpumask_test_cpu(cpu, &info->mask)) in cpu_group_map()
57 return info->mask; in cpu_group_map()
59 return mask; in cpu_group_map()
64 cpumask_t mask; in cpu_thread_map() local
67 cpumask_copy(&mask, cpumask_of(cpu)); in cpu_thread_map()
69 return mask; in cpu_thread_map()
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/linux-4.1.27/arch/x86/kernel/cpu/mtrr/
Dgeneric.c67 static u64 get_mtrr_size(u64 mask) in get_mtrr_size() argument
71 mask >>= PAGE_SHIFT; in get_mtrr_size()
72 mask |= size_or_mask; in get_mtrr_size()
73 size = -mask; in get_mtrr_size()
115 u64 base, mask; in __mtrr_type_lookup() local
164 mask = (((u64)mtrr_state.var_ranges[i].mask_hi) << 32) + in __mtrr_type_lookup()
167 start_state = ((start & mask) == (base & mask)); in __mtrr_type_lookup()
168 end_state = ((end & mask) == (base & mask)); in __mtrr_type_lookup()
185 *partial_end = base + get_mtrr_size(mask); in __mtrr_type_lookup()
198 if ((start & mask) != (base & mask)) in __mtrr_type_lookup()
[all …]
/linux-4.1.27/arch/mips/vr41xx/common/
Dicu.c155 void vr41xx_enable_piuint(uint16_t mask) in vr41xx_enable_piuint() argument
163 icu1_set(MPIUINTREG, mask); in vr41xx_enable_piuint()
170 void vr41xx_disable_piuint(uint16_t mask) in vr41xx_disable_piuint() argument
178 icu1_clear(MPIUINTREG, mask); in vr41xx_disable_piuint()
185 void vr41xx_enable_aiuint(uint16_t mask) in vr41xx_enable_aiuint() argument
193 icu1_set(MAIUINTREG, mask); in vr41xx_enable_aiuint()
200 void vr41xx_disable_aiuint(uint16_t mask) in vr41xx_disable_aiuint() argument
208 icu1_clear(MAIUINTREG, mask); in vr41xx_disable_aiuint()
215 void vr41xx_enable_kiuint(uint16_t mask) in vr41xx_enable_kiuint() argument
223 icu1_set(MKIUINTREG, mask); in vr41xx_enable_kiuint()
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/linux-4.1.27/arch/mips/include/asm/
Ddma-mapping.h35 static inline int dma_supported(struct device *dev, u64 mask) in dma_supported() argument
38 return ops->dma_supported(dev, mask); in dma_supported()
41 static inline int dma_mapping_error(struct device *dev, u64 mask) in dma_mapping_error() argument
45 debug_dma_mapping_error(dev, mask); in dma_mapping_error()
46 return ops->mapping_error(dev, mask); in dma_mapping_error()
50 dma_set_mask(struct device *dev, u64 mask) in dma_set_mask() argument
54 if(!dev->dma_mask || !dma_supported(dev, mask)) in dma_set_mask()
58 return ops->set_dma_mask(dev, mask); in dma_set_mask()
60 *dev->dma_mask = mask; in dma_set_mask()
/linux-4.1.27/arch/powerpc/kernel/
Ddma-iommu.c76 static int dma_iommu_dma_supported(struct device *dev, u64 mask) in dma_iommu_dma_supported() argument
82 ", table unavailable\n", mask); in dma_iommu_dma_supported()
86 if (tbl->it_offset > (mask >> tbl->it_page_shift)) { in dma_iommu_dma_supported()
89 mask, tbl->it_offset << tbl->it_page_shift); in dma_iommu_dma_supported()
98 u64 mask; in dma_iommu_get_required_mask() local
102 mask = 1ULL < (fls_long(tbl->it_offset + tbl->it_size) - 1); in dma_iommu_get_required_mask()
103 mask += mask - 1; in dma_iommu_get_required_mask()
105 return mask; in dma_iommu_get_required_mask()
/linux-4.1.27/arch/sh/boards/mach-dreamcast/
Dirq.c68 __u32 mask; in disable_systemasic_irq() local
70 mask = inl(emr); in disable_systemasic_irq()
71 mask &= ~(1 << EVENT_BIT(irq)); in disable_systemasic_irq()
72 outl(mask, emr); in disable_systemasic_irq()
80 __u32 mask; in enable_systemasic_irq() local
82 mask = inl(emr); in enable_systemasic_irq()
83 mask |= (1 << EVENT_BIT(irq)); in enable_systemasic_irq()
84 outl(mask, emr); in enable_systemasic_irq()
/linux-4.1.27/drivers/gpu/drm/nouveau/nvkm/subdev/gpio/
Dnv10.c53 u32 reg, mask, data; in nv10_gpio_drive() local
58 mask = 0x00000011; in nv10_gpio_drive()
64 mask = 0x00000003; in nv10_gpio_drive()
70 mask = 0x00000003; in nv10_gpio_drive()
76 nv_mask(gpio, reg, mask << line, data << line); in nv10_gpio_drive()
91 nv10_gpio_intr_mask(struct nvkm_gpio *gpio, u32 type, u32 mask, u32 data) in nv10_gpio_intr_mask() argument
95 inte = (inte & ~(mask << 16)) | (data << 16); in nv10_gpio_intr_mask()
97 inte = (inte & ~mask) | data; in nv10_gpio_intr_mask()
/linux-4.1.27/drivers/staging/lustre/lustre/libcfs/linux/
Dlinux-cpu.c81 static void cfs_cpu_core_siblings(int cpu, cpumask_t *mask) in cfs_cpu_core_siblings() argument
84 cpumask_copy(mask, topology_core_cpumask(cpu)); in cfs_cpu_core_siblings()
88 static void cfs_cpu_ht_siblings(int cpu, cpumask_t *mask) in cfs_cpu_ht_siblings() argument
90 cpumask_copy(mask, topology_thread_cpumask(cpu)); in cfs_cpu_ht_siblings()
93 static void cfs_node_to_cpumask(int node, cpumask_t *mask) in cfs_node_to_cpumask() argument
95 cpumask_copy(mask, cpumask_of_node(node)); in cfs_node_to_cpumask()
384 cfs_cpt_set_cpumask(struct cfs_cpt_table *cptab, int cpt, cpumask_t *mask) in cfs_cpt_set_cpumask() argument
388 if (cpumask_weight(mask) == 0 || in cfs_cpt_set_cpumask()
389 cpumask_any_and(mask, cpu_online_mask) >= nr_cpu_ids) { in cfs_cpt_set_cpumask()
395 for_each_cpu(i, mask) { in cfs_cpt_set_cpumask()
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