Lines Matching refs:mask

65 	u32 mask, val;  in rsnd_adg_set_cmd_timsel_gen2()  local
70 mask = 0xffff << shift; in rsnd_adg_set_cmd_timsel_gen2()
72 rsnd_mod_bset(mod, CMDOUT_TIMSEL, mask, val); in rsnd_adg_set_cmd_timsel_gen2()
84 u32 mask, ws; in rsnd_adg_set_src_timsel_gen2() local
94 mask = 0xffff << shift; in rsnd_adg_set_src_timsel_gen2()
98 rsnd_mod_bset(mod, SRCIN_TIMSEL0, mask, in); in rsnd_adg_set_src_timsel_gen2()
99 rsnd_mod_bset(mod, SRCOUT_TIMSEL0, mask, out); in rsnd_adg_set_src_timsel_gen2()
102 rsnd_mod_bset(mod, SRCIN_TIMSEL1, mask, in); in rsnd_adg_set_src_timsel_gen2()
103 rsnd_mod_bset(mod, SRCOUT_TIMSEL1, mask, out); in rsnd_adg_set_src_timsel_gen2()
106 rsnd_mod_bset(mod, SRCIN_TIMSEL2, mask, in); in rsnd_adg_set_src_timsel_gen2()
107 rsnd_mod_bset(mod, SRCOUT_TIMSEL2, mask, out); in rsnd_adg_set_src_timsel_gen2()
110 rsnd_mod_bset(mod, SRCIN_TIMSEL3, mask, in); in rsnd_adg_set_src_timsel_gen2()
111 rsnd_mod_bset(mod, SRCOUT_TIMSEL3, mask, out); in rsnd_adg_set_src_timsel_gen2()
114 rsnd_mod_bset(mod, SRCIN_TIMSEL4, mask, in); in rsnd_adg_set_src_timsel_gen2()
115 rsnd_mod_bset(mod, SRCOUT_TIMSEL4, mask, out); in rsnd_adg_set_src_timsel_gen2()
207 u32 mask, val; in rsnd_adg_set_convert_clk_gen1() local
234 mask = 0xFF << shift; in rsnd_adg_set_convert_clk_gen1()
241 rsnd_mod_bset(mod, AUDIO_CLK_SEL3, mask, val); in rsnd_adg_set_convert_clk_gen1()
244 rsnd_mod_bset(mod, AUDIO_CLK_SEL4, mask, val); in rsnd_adg_set_convert_clk_gen1()
247 rsnd_mod_bset(mod, AUDIO_CLK_SEL5, mask, val); in rsnd_adg_set_convert_clk_gen1()
264 u32 mask = 0xFF << shift; in rsnd_adg_set_ssi_clk() local
277 rsnd_mod_bset(mod, AUDIO_CLK_SEL0, mask, val); in rsnd_adg_set_ssi_clk()
280 rsnd_mod_bset(mod, AUDIO_CLK_SEL1, mask, val); in rsnd_adg_set_ssi_clk()
283 rsnd_mod_bset(mod, AUDIO_CLK_SEL2, mask, val); in rsnd_adg_set_ssi_clk()