Lines Matching refs:mask
145 unsigned int mask = 0x100 << cd->bit; in octeon_irq_core_set_enable_local() local
151 set_c0_status(mask); in octeon_irq_core_set_enable_local()
153 clear_c0_status(mask); in octeon_irq_core_set_enable_local()
424 u64 mask; in octeon_irq_ciu_enable_v2() local
429 mask = 1ull << (cd->bit); in octeon_irq_ciu_enable_v2()
438 cvmx_write_csr(CVMX_CIU_INTX_EN0_W1S(index), mask); in octeon_irq_ciu_enable_v2()
442 cvmx_write_csr(CVMX_CIU_INTX_EN1_W1S(index), mask); in octeon_irq_ciu_enable_v2()
451 u64 mask; in octeon_irq_ciu_enable_sum2() local
457 mask = 1ull << (cd->bit); in octeon_irq_ciu_enable_sum2()
459 cvmx_write_csr(CVMX_CIU_EN2_PPX_IP4_W1S(index), mask); in octeon_irq_ciu_enable_sum2()
467 u64 mask; in octeon_irq_ciu_disable_local_sum2() local
473 mask = 1ull << (cd->bit); in octeon_irq_ciu_disable_local_sum2()
475 cvmx_write_csr(CVMX_CIU_EN2_PPX_IP4_W1C(index), mask); in octeon_irq_ciu_disable_local_sum2()
480 u64 mask; in octeon_irq_ciu_ack_sum2() local
486 mask = 1ull << (cd->bit); in octeon_irq_ciu_ack_sum2()
488 cvmx_write_csr(CVMX_CIU_SUM2_PPX_IP4(index), mask); in octeon_irq_ciu_ack_sum2()
495 u64 mask; in octeon_irq_ciu_disable_all_sum2() local
498 mask = 1ull << (cd->bit); in octeon_irq_ciu_disable_all_sum2()
503 cvmx_write_csr(CVMX_CIU_EN2_PPX_IP4_W1C(coreid), mask); in octeon_irq_ciu_disable_all_sum2()
513 u64 mask; in octeon_irq_ciu_enable_local_v2() local
517 mask = 1ull << (cd->bit); in octeon_irq_ciu_enable_local_v2()
522 cvmx_write_csr(CVMX_CIU_INTX_EN0_W1S(index), mask); in octeon_irq_ciu_enable_local_v2()
526 cvmx_write_csr(CVMX_CIU_INTX_EN1_W1S(index), mask); in octeon_irq_ciu_enable_local_v2()
532 u64 mask; in octeon_irq_ciu_disable_local_v2() local
536 mask = 1ull << (cd->bit); in octeon_irq_ciu_disable_local_v2()
541 cvmx_write_csr(CVMX_CIU_INTX_EN0_W1C(index), mask); in octeon_irq_ciu_disable_local_v2()
545 cvmx_write_csr(CVMX_CIU_INTX_EN1_W1C(index), mask); in octeon_irq_ciu_disable_local_v2()
554 u64 mask; in octeon_irq_ciu_ack() local
558 mask = 1ull << (cd->bit); in octeon_irq_ciu_ack()
562 cvmx_write_csr(CVMX_CIU_INTX_SUM0(index), mask); in octeon_irq_ciu_ack()
564 cvmx_write_csr(CVMX_CIU_INT_SUM1, mask); in octeon_irq_ciu_ack()
575 u64 mask; in octeon_irq_ciu_disable_all_v2() local
579 mask = 1ull << (cd->bit); in octeon_irq_ciu_disable_all_v2()
586 cvmx_write_csr(CVMX_CIU_INTX_EN0_W1C(index), mask); in octeon_irq_ciu_disable_all_v2()
593 cvmx_write_csr(CVMX_CIU_INTX_EN1_W1C(index), mask); in octeon_irq_ciu_disable_all_v2()
605 u64 mask; in octeon_irq_ciu_enable_all_v2() local
609 mask = 1ull << (cd->bit); in octeon_irq_ciu_enable_all_v2()
616 cvmx_write_csr(CVMX_CIU_INTX_EN0_W1S(index), mask); in octeon_irq_ciu_enable_all_v2()
623 cvmx_write_csr(CVMX_CIU_INTX_EN1_W1S(index), mask); in octeon_irq_ciu_enable_all_v2()
691 u64 mask; in octeon_irq_ciu_gpio_ack() local
694 mask = 1ull << (cd->gpio_line); in octeon_irq_ciu_gpio_ack()
696 cvmx_write_csr(CVMX_GPIO_INT_CLR, mask); in octeon_irq_ciu_gpio_ack()
799 u64 mask; in octeon_irq_ciu_set_affinity_v2() local
806 mask = 1ull << cd->bit; in octeon_irq_ciu_set_affinity_v2()
815 cvmx_write_csr(CVMX_CIU_INTX_EN0_W1S(index), mask); in octeon_irq_ciu_set_affinity_v2()
818 cvmx_write_csr(CVMX_CIU_INTX_EN0_W1C(index), mask); in octeon_irq_ciu_set_affinity_v2()
828 cvmx_write_csr(CVMX_CIU_INTX_EN1_W1S(index), mask); in octeon_irq_ciu_set_affinity_v2()
831 cvmx_write_csr(CVMX_CIU_INTX_EN1_W1C(index), mask); in octeon_irq_ciu_set_affinity_v2()
844 u64 mask; in octeon_irq_ciu_set_affinity_sum2() local
851 mask = 1ull << cd->bit; in octeon_irq_ciu_set_affinity_sum2()
858 cvmx_write_csr(CVMX_CIU_EN2_PPX_IP4_W1S(index), mask); in octeon_irq_ciu_set_affinity_sum2()
860 cvmx_write_csr(CVMX_CIU_EN2_PPX_IP4_W1C(index), mask); in octeon_irq_ciu_set_affinity_sum2()
1594 u64 mask; in octeon_irq_ciu2_wd_enable() local
1600 mask = 1ull << (cd->bit); in octeon_irq_ciu2_wd_enable()
1604 cvmx_write_csr(en_addr, mask); in octeon_irq_ciu2_wd_enable()
1610 u64 mask; in octeon_irq_ciu2_enable() local
1617 mask = 1ull << (cd->bit); in octeon_irq_ciu2_enable()
1621 cvmx_write_csr(en_addr, mask); in octeon_irq_ciu2_enable()
1626 u64 mask; in octeon_irq_ciu2_enable_local() local
1632 mask = 1ull << (cd->bit); in octeon_irq_ciu2_enable_local()
1636 cvmx_write_csr(en_addr, mask); in octeon_irq_ciu2_enable_local()
1642 u64 mask; in octeon_irq_ciu2_disable_local() local
1648 mask = 1ull << (cd->bit); in octeon_irq_ciu2_disable_local()
1652 cvmx_write_csr(en_addr, mask); in octeon_irq_ciu2_disable_local()
1658 u64 mask; in octeon_irq_ciu2_ack() local
1664 mask = 1ull << (cd->bit); in octeon_irq_ciu2_ack()
1667 cvmx_write_csr(en_addr, mask); in octeon_irq_ciu2_ack()
1674 u64 mask; in octeon_irq_ciu2_disable_all() local
1678 mask = 1ull << (cd->bit); in octeon_irq_ciu2_disable_all()
1683 cvmx_write_csr(en_addr, mask); in octeon_irq_ciu2_disable_all()
1690 u64 mask; in octeon_irq_ciu2_mbox_enable_all() local
1692 mask = 1ull << (data->irq - OCTEON_IRQ_MBOX0); in octeon_irq_ciu2_mbox_enable_all()
1697 cvmx_write_csr(en_addr, mask); in octeon_irq_ciu2_mbox_enable_all()
1704 u64 mask; in octeon_irq_ciu2_mbox_disable_all() local
1706 mask = 1ull << (data->irq - OCTEON_IRQ_MBOX0); in octeon_irq_ciu2_mbox_disable_all()
1711 cvmx_write_csr(en_addr, mask); in octeon_irq_ciu2_mbox_disable_all()
1717 u64 mask; in octeon_irq_ciu2_mbox_enable_local() local
1721 mask = 1ull << (data->irq - OCTEON_IRQ_MBOX0); in octeon_irq_ciu2_mbox_enable_local()
1723 cvmx_write_csr(en_addr, mask); in octeon_irq_ciu2_mbox_enable_local()
1728 u64 mask; in octeon_irq_ciu2_mbox_disable_local() local
1732 mask = 1ull << (data->irq - OCTEON_IRQ_MBOX0); in octeon_irq_ciu2_mbox_disable_local()
1734 cvmx_write_csr(en_addr, mask); in octeon_irq_ciu2_mbox_disable_local()
1743 u64 mask; in octeon_irq_ciu2_set_affinity() local
1750 mask = 1ull << cd->bit; in octeon_irq_ciu2_set_affinity()
1764 cvmx_write_csr(en_addr, mask); in octeon_irq_ciu2_set_affinity()