293 static inline u32 hw_read_id_reg(struct ci_hdrc *ci, u32 offset, u32 mask)  in hw_read_id_reg()  argument
295 	return ioread32(ci->hw_bank.abs + offset) & mask;  in hw_read_id_reg()
306 			    u32 mask, u32 data)  in hw_write_id_reg()  argument
308 	if (~mask)  in hw_write_id_reg()
309 		data = (ioread32(ci->hw_bank.abs + offset) & ~mask)  in hw_write_id_reg()
310 			| (data & mask);  in hw_write_id_reg()
323 static inline u32 hw_read(struct ci_hdrc *ci, enum ci_hw_regs reg, u32 mask)  in hw_read()  argument
325 	return ioread32(ci->hw_bank.regmap[reg]) & mask;  in hw_read()
356 			    u32 mask, u32 data)  in hw_write()  argument
358 	if (~mask)  in hw_write()
359 		data = (ioread32(ci->hw_bank.regmap[reg]) & ~mask)  in hw_write()
360 			| (data & mask);  in hw_write()
374 				    u32 mask)  in hw_test_and_clear()  argument
376 	u32 val = ioread32(ci->hw_bank.regmap[reg]) & mask;  in hw_test_and_clear()
392 				    u32 mask, u32 data)  in hw_test_and_write()  argument
396 	hw_write(ci, reg, mask, data);  in hw_test_and_write()
397 	return (val & mask) >> __ffs(mask);  in hw_test_and_write()
426 int hw_wait_reg(struct ci_hdrc *ci, enum ci_hw_regs reg, u32 mask,