| /linux-4.4.14/drivers/bus/ |
| D | omap_l3_smx.h | 43 static const u64 shift = 1; variable
45 #define L3_STATUS_0_MPUIA_BRST (shift << 0)
46 #define L3_STATUS_0_MPUIA_RSP (shift << 1)
47 #define L3_STATUS_0_MPUIA_INBAND (shift << 2)
48 #define L3_STATUS_0_IVAIA_BRST (shift << 6)
49 #define L3_STATUS_0_IVAIA_RSP (shift << 7)
50 #define L3_STATUS_0_IVAIA_INBAND (shift << 8)
51 #define L3_STATUS_0_SGXIA_BRST (shift << 9)
52 #define L3_STATUS_0_SGXIA_RSP (shift << 10)
53 #define L3_STATUS_0_SGXIA_MERROR (shift << 11)
[all …]
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| /linux-4.4.14/drivers/memory/tegra/ |
| D | tegra114.c | 31 .shift = 0,
45 .shift = 0,
59 .shift = 16,
73 .shift = 16,
87 .shift = 0,
101 .shift = 0,
115 .shift = 0,
129 .shift = 0,
143 .shift = 16,
157 .shift = 0,
[all …]
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| D | tegra30.c | 31 .shift = 0,
45 .shift = 0,
59 .shift = 16,
73 .shift = 16,
87 .shift = 0,
101 .shift = 0,
115 .shift = 16,
129 .shift = 16,
143 .shift = 0,
157 .shift = 0,
[all …]
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| D | tegra210.c | 33 .shift = 0,
47 .shift = 0,
61 .shift = 16,
75 .shift = 16,
89 .shift = 0,
103 .shift = 0,
117 .shift = 0,
131 .shift = 0,
145 .shift = 0,
159 .shift = 0,
[all …]
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| D | tegra124.c | 73 .shift = 0,
87 .shift = 0,
101 .shift = 16,
115 .shift = 16,
129 .shift = 0,
143 .shift = 0,
157 .shift = 0,
171 .shift = 0,
185 .shift = 0,
199 .shift = 0,
[all …]
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| /linux-4.4.14/include/linux/ |
| D | bitops.h | 88 static inline __u64 rol64(__u64 word, unsigned int shift) in rol64() argument
90 return (word << shift) | (word >> (64 - shift)); in rol64()
98 static inline __u64 ror64(__u64 word, unsigned int shift) in ror64() argument
100 return (word >> shift) | (word << (64 - shift)); in ror64()
108 static inline __u32 rol32(__u32 word, unsigned int shift) in rol32() argument
110 return (word << shift) | (word >> ((-shift) & 31)); in rol32()
118 static inline __u32 ror32(__u32 word, unsigned int shift) in ror32() argument
120 return (word >> shift) | (word << (32 - shift)); in ror32()
128 static inline __u16 rol16(__u16 word, unsigned int shift) in rol16() argument
130 return (word << shift) | (word >> (16 - shift)); in rol16()
[all …]
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| D | math64.h | 139 static inline u64 mul_u64_u32_shr(u64 a, u32 mul, unsigned int shift) in mul_u64_u32_shr() argument
141 return (u64)(((unsigned __int128)a * mul) >> shift); in mul_u64_u32_shr()
146 static inline u64 mul_u64_u64_shr(u64 a, u64 mul, unsigned int shift) in mul_u64_u64_shr() argument
148 return (u64)(((unsigned __int128)a * mul) >> shift); in mul_u64_u64_shr()
155 static inline u64 mul_u64_u32_shr(u64 a, u32 mul, unsigned int shift) in mul_u64_u32_shr() argument
163 ret = ((u64)al * mul) >> shift; in mul_u64_u32_shr()
165 ret += ((u64)ah * mul) << (32 - shift); in mul_u64_u32_shr()
172 static inline u64 mul_u64_u64_shr(u64 a, u64 b, unsigned int shift) in mul_u64_u64_shr() argument
207 if (shift == 0) in mul_u64_u64_shr()
209 if (shift < 64) in mul_u64_u64_shr()
[all …]
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| D | bitmap.h | 97 unsigned int shift, unsigned int nbits);
99 unsigned int shift, unsigned int nbits);
306 unsigned int shift, int nbits) in bitmap_shift_right() argument
309 *dst = (*src & BITMAP_LAST_WORD_MASK(nbits)) >> shift; in bitmap_shift_right()
311 __bitmap_shift_right(dst, src, shift, nbits); in bitmap_shift_right()
315 unsigned int shift, unsigned int nbits) in bitmap_shift_left() argument
318 *dst = (*src << shift) & BITMAP_LAST_WORD_MASK(nbits); in bitmap_shift_left()
320 __bitmap_shift_left(dst, src, shift, nbits); in bitmap_shift_left()
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| D | proportions.h | 23 int shift; member
44 int prop_descriptor_init(struct prop_descriptor *pd, int shift, gfp_t gfp);
60 int shift; member
113 int shift; member
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| D | clocksource.h | 74 u32 shift; member
176 static inline s64 clocksource_cyc2ns(cycle_t cycles, u32 mult, u32 shift) in clocksource_cyc2ns() argument
178 return ((u64) cycles * mult) >> shift; in clocksource_cyc2ns()
191 clocks_calc_max_nsecs(u32 mult, u32 shift, u32 maxadj, u64 mask, u64 *max_cycles);
193 clocks_calc_mult_shift(u32 *mult, u32 *shift, u32 from, u32 to, u32 minsec);
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| D | clockchips.h | 107 u32 shift; member
171 div_sc(unsigned long ticks, unsigned long nsec, int shift) in div_sc() argument
173 u64 tmp = ((u64)ticks) << shift; in div_sc()
195 return clocks_calc_mult_shift(&ce->mult, &ce->shift, NSEC_PER_SEC, freq, minsec); in clockevents_calc_mult_shift()
|
| /linux-4.4.14/arch/alpha/include/uapi/asm/ |
| D | compiler.h | 13 # define __kernel_insbl(val, shift) __builtin_alpha_insbl(val, shift) argument
14 # define __kernel_inswl(val, shift) __builtin_alpha_inswl(val, shift) argument
15 # define __kernel_insql(val, shift) __builtin_alpha_insql(val, shift) argument
16 # define __kernel_inslh(val, shift) __builtin_alpha_inslh(val, shift) argument
17 # define __kernel_extbl(val, shift) __builtin_alpha_extbl(val, shift) argument
18 # define __kernel_extwl(val, shift) __builtin_alpha_extwl(val, shift) argument
21 # define __kernel_insbl(val, shift) \ argument
23 __asm__("insbl %2,%1,%0" : "=r"(__kir) : "rI"(shift), "r"(val)); \
25 # define __kernel_inswl(val, shift) \ argument
27 __asm__("inswl %2,%1,%0" : "=r"(__kir) : "rI"(shift), "r"(val)); \
[all …]
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| /linux-4.4.14/include/drm/ |
| D | drm_fixed.h | 99 unsigned shift, sign = (a >> 63) & 1; in drm_fixp_msbset() local
101 for (shift = 62; shift > 0; --shift) in drm_fixp_msbset()
102 if (((a >> shift) & 1) != sign) in drm_fixp_msbset()
103 return shift; in drm_fixp_msbset()
110 unsigned shift = drm_fixp_msbset(a) + drm_fixp_msbset(b); in drm_fixp_mul() local
113 if (shift > 61) { in drm_fixp_mul()
114 shift = shift - 61; in drm_fixp_mul()
115 a >>= (shift >> 1) + (shift & 1); in drm_fixp_mul()
116 b >>= shift >> 1; in drm_fixp_mul()
118 shift = 0; in drm_fixp_mul()
[all …]
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| /linux-4.4.14/drivers/mfd/ |
| D | tmio_core.c | 12 int tmio_core_mmc_enable(void __iomem *cnf, int shift, unsigned long base) in tmio_core_mmc_enable() argument
15 sd_config_write16(cnf, shift, CNF_CMD, SDCREN); in tmio_core_mmc_enable()
16 sd_config_write32(cnf, shift, CNF_CTL_BASE, base & 0xfffe); in tmio_core_mmc_enable()
19 sd_config_write8(cnf, shift, CNF_PWR_CTL_3, 0x01); in tmio_core_mmc_enable()
22 sd_config_write8(cnf, shift, CNF_STOP_CLK_CTL, 0x1f); in tmio_core_mmc_enable()
25 sd_config_write8(cnf, shift, CNF_PWR_CTL_2, 0x00); in tmio_core_mmc_enable()
31 int tmio_core_mmc_resume(void __iomem *cnf, int shift, unsigned long base) in tmio_core_mmc_resume() argument
35 sd_config_write16(cnf, shift, CNF_CMD, SDCREN); in tmio_core_mmc_resume()
36 sd_config_write32(cnf, shift, CNF_CTL_BASE, base & 0xfffe); in tmio_core_mmc_resume()
42 void tmio_core_mmc_pwr(void __iomem *cnf, int shift, int state) in tmio_core_mmc_pwr() argument
[all …]
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| D | lm3533-core.c | 175 int shift; in lm3533_set_hvled_config() local
184 shift = hvled - 1; in lm3533_set_hvled_config()
185 mask = LM3533_BL_ID_MASK << shift; in lm3533_set_hvled_config()
186 val = bl << shift; in lm3533_set_hvled_config()
203 int shift; in lm3533_set_lvled_config() local
214 shift = 2 * lvled; in lm3533_set_lvled_config()
217 shift = 2 * (lvled - 4); in lm3533_set_lvled_config()
220 mask = LM3533_LED_ID_MASK << shift; in lm3533_set_lvled_config()
221 val = led << shift; in lm3533_set_lvled_config()
269 int shift; in show_output() local
[all …]
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| D | htc-egpio.c | 190 int shift; in egpio_set() local
200 shift = pos << ei->reg_shift; in egpio_set()
203 reg, (egpio->cached_values >> shift) & ei->reg_mask); in egpio_set()
210 egpio_writew((egpio->cached_values >> shift) & ei->reg_mask, ei, reg); in egpio_set()
232 int shift; in egpio_write_cache() local
239 for (shift = 0; shift < egpio->chip.ngpio; in egpio_write_cache()
240 shift += (1<<ei->reg_shift)) { in egpio_write_cache()
242 int reg = egpio->reg_start + egpio_pos(ei, shift); in egpio_write_cache()
244 if (!((egpio->is_out >> shift) & ei->reg_mask)) in egpio_write_cache()
248 (egpio->cached_values >> shift) & ei->reg_mask, in egpio_write_cache()
[all …]
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| D | mt6397-core.c | 81 int shift = data->hwirq & 0xf; in mt6397_irq_disable() local
84 mt6397->irq_masks_cur[reg] &= ~BIT(shift); in mt6397_irq_disable()
90 int shift = data->hwirq & 0xf; in mt6397_irq_enable() local
93 mt6397->irq_masks_cur[reg] |= BIT(shift); in mt6397_irq_enable()
100 int shift = irq_data->hwirq & 0xf; in mt6397_irq_set_wake() local
104 mt6397->wake_mask[reg] |= BIT(shift); in mt6397_irq_set_wake()
106 mt6397->wake_mask[reg] &= ~BIT(shift); in mt6397_irq_set_wake()
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| /linux-4.4.14/arch/arm/boot/dts/ |
| D | omap24xx-clocks.dtsi | 15 ti,bit-shift = <2>;
29 ti,bit-shift = <6>;
81 ti,bit-shift = <23>;
97 ti,bit-shift = <6>;
106 ti,bit-shift = <6>;
135 ti,bit-shift = <2>;
136 ti,idlest-shift = <8>;
145 ti,bit-shift = <6>;
146 ti,idlest-shift = <9>;
155 ti,bit-shift = <5>;
[all …]
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| D | omap44xx-clocks.dtsi | 27 ti,bit-shift = <8>;
53 ti,bit-shift = <10>;
154 ti,autoidle-shift = <8>;
181 ti,bit-shift = <24>;
191 ti,autoidle-shift = <8>;
201 ti,bit-shift = <23>;
223 ti,autoidle-shift = <8>;
234 ti,autoidle-shift = <8>;
253 ti,autoidle-shift = <8>;
290 ti,autoidle-shift = <8>;
[all …]
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| D | omap3xxx-clocks.dtsi | 28 ti,bit-shift = <6>;
39 ti,bit-shift = <7>;
88 ti,bit-shift = <4>;
102 ti,bit-shift = <2>;
116 ti,bit-shift = <6>;
143 ti,bit-shift = <2>;
224 ti,bit-shift = <0x1b>;
248 ti,bit-shift = <16>;
266 ti,bit-shift = <0xc>;
295 ti,bit-shift = <27>;
[all …]
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| D | omap54xx-clocks.dtsi | 21 ti,bit-shift = <8>;
41 ti,bit-shift = <10>;
148 ti,bit-shift = <24>;
174 ti,bit-shift = <23>;
309 ti,bit-shift = <23>;
388 ti,bit-shift = <4>;
406 ti,bit-shift = <8>;
416 ti,bit-shift = <11>;
424 ti,bit-shift = <24>;
433 ti,bit-shift = <26>;
[all …]
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| D | omap2430-clocks.dtsi | 29 ti,bit-shift = <2>;
43 ti,bit-shift = <4>;
59 ti,bit-shift = <0>;
67 ti,bit-shift = <5>;
83 ti,bit-shift = <0>;
105 ti,bit-shift = <1>;
113 ti,bit-shift = <3>;
121 ti,bit-shift = <3>;
129 ti,bit-shift = <4>;
137 ti,bit-shift = <4>;
[all …]
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| D | dra7xx-clocks.dtsi | 209 ti,autoidle-shift = <8>;
229 ti,autoidle-shift = <8>;
240 ti,autoidle-shift = <8>;
250 ti,bit-shift = <23>;
272 ti,autoidle-shift = <8>;
298 ti,autoidle-shift = <8>;
324 ti,bit-shift = <23>;
340 ti,autoidle-shift = <8>;
358 ti,bit-shift = <23>;
374 ti,autoidle-shift = <8>;
[all …]
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| D | omap34xx-omap36xx-clocks.dtsi | 23 ti,bit-shift = <3>;
32 ti,bit-shift = <2>;
40 ti,bit-shift = <1>;
48 ti,bit-shift = <0>;
55 ti,bit-shift = <0>;
65 ti,bit-shift = <0>;
73 ti,bit-shift = <1>;
89 ti,bit-shift = <4>;
97 ti,bit-shift = <29>;
105 ti,bit-shift = <26>;
[all …]
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| D | omap2420-clocks.dtsi | 16 ti,bit-shift = <15>;
24 ti,bit-shift = <8>;
38 ti,bit-shift = <11>;
48 ti,bit-shift = <1>;
56 ti,bit-shift = <5>;
72 ti,bit-shift = <10>;
80 ti,bit-shift = <8>;
103 ti,bit-shift = <8>;
111 ti,bit-shift = <28>;
119 ti,bit-shift = <28>;
[all …]
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| D | omap3430es1-clocks.dtsi | 16 ti,bit-shift = <0>;
41 ti,bit-shift = <1>;
49 ti,bit-shift = <2>;
57 ti,bit-shift = <3>;
65 ti,bit-shift = <5>;
72 ti,bit-shift = <0>;
80 ti,bit-shift = <8>;
104 ti,bit-shift = <4>;
112 ti,bit-shift = <8>;
128 ti,bit-shift = <0>;
[all …]
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| D | am35xx-clocks.dtsi | 16 ti,bit-shift = <1>;
24 ti,bit-shift = <9>;
32 ti,bit-shift = <2>;
40 ti,bit-shift = <10>;
48 ti,bit-shift = <0>;
56 ti,bit-shift = <8>;
64 ti,bit-shift = <3>;
73 ti,bit-shift = <4>;
93 ti,bit-shift = <23>;
101 ti,bit-shift = <23>;
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| D | am43xx-clocks.dtsi | 15 ti,bit-shift = <31>;
23 ti,bit-shift = <29>;
31 ti,bit-shift = <22>;
111 ti,bit-shift = <0>;
119 ti,bit-shift = <1>;
127 ti,bit-shift = <2>;
135 ti,bit-shift = <4>;
143 ti,bit-shift = <5>;
151 ti,bit-shift = <6>;
216 ti,autoidle-shift = <8>;
[all …]
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| D | omap36xx-am35xx-omap3430es2plus-clocks.dtsi | 50 ti,bit-shift = <1>;
112 ti,bit-shift = <0>;
120 ti,bit-shift = <0>;
128 ti,bit-shift = <1>;
136 ti,bit-shift = <2>;
144 ti,bit-shift = <2>;
152 ti,bit-shift = <30>;
160 ti,bit-shift = <30>;
167 ti,bit-shift = <0>;
177 ti,bit-shift = <0>;
[all …]
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| D | am33xx-clocks.dtsi | 15 ti,bit-shift = <22>;
103 ti,bit-shift = <0>;
111 ti,bit-shift = <1>;
119 ti,bit-shift = <2>;
299 ti,bit-shift = <1>;
323 ti,bit-shift = <1>;
346 ti,bit-shift = <1>;
403 ti,bit-shift = <8>;
419 ti,bit-shift = <1>;
504 ti,bit-shift = <18>;
[all …]
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| D | omap36xx-clocks.dtsi | 22 ti,bit-shift = <0x1e>;
32 ti,bit-shift = <0x1b>;
41 ti,bit-shift = <0xc>;
50 ti,bit-shift = <0x1c>;
59 ti,bit-shift = <0x1f>;
69 ti,bit-shift = <18>;
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| D | omap36xx-omap3430es2plus-clocks.dtsi | 15 ti,bit-shift = <0>;
23 ti,bit-shift = <8>;
47 ti,bit-shift = <4>;
63 ti,bit-shift = <0>;
70 ti,bit-shift = <9>;
150 ti,bit-shift = <3>;
166 ti,bit-shift = <9>;
|
| /linux-4.4.14/drivers/clk/imx/ |
| D | clk.h | 52 void __iomem *reg, u8 shift, u32 exclusive_mask);
55 void __iomem *reg, u8 shift) in imx_clk_gate2() argument
58 shift, 0, &imx_ccm_lock, NULL); in imx_clk_gate2()
62 const char *parent, void __iomem *reg, u8 shift, in imx_clk_gate2_shared() argument
66 shift, 0, &imx_ccm_lock, share_count); in imx_clk_gate2_shared()
73 void __iomem *reg, u8 shift, u8 width,
76 struct clk *imx_clk_busy_mux(const char *name, void __iomem *reg, u8 shift,
81 void __iomem *reg, u8 shift, u8 width,
85 u8 shift, u8 width, const char **parents,
94 void __iomem *reg, u8 shift, u8 width) in imx_clk_divider() argument
[all …]
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| D | clk-busy.c | 21 static int clk_busy_wait(void __iomem *reg, u8 shift) in clk_busy_wait() argument
25 while (readl_relaxed(reg) & (1 << shift)) in clk_busy_wait()
36 u8 shift; member
70 ret = clk_busy_wait(busy->reg, busy->shift); in clk_busy_divider_set_rate()
82 void __iomem *reg, u8 shift, u8 width, in imx_clk_busy_divider() argument
94 busy->shift = busy_shift; in imx_clk_busy_divider()
97 busy->div.shift = shift; in imx_clk_busy_divider()
121 u8 shift; member
145 ret = clk_busy_wait(busy->reg, busy->shift); in clk_busy_mux_set_parent()
155 struct clk *imx_clk_busy_mux(const char *name, void __iomem *reg, u8 shift, in imx_clk_busy_mux() argument
[all …]
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| D | clk-fixup-mux.c | 59 val &= ~(mux->mask << mux->shift); in clk_fixup_mux_set_parent()
60 val |= index << mux->shift; in clk_fixup_mux_set_parent()
75 u8 shift, u8 width, const char **parents, in imx_clk_fixup_mux() argument
96 fixup_mux->mux.shift = shift; in imx_clk_fixup_mux()
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| D | clk-fixup-div.c | 79 val &= ~(div_mask(div) << div->shift); in clk_fixup_div_set_rate()
80 val |= value << div->shift; in clk_fixup_div_set_rate()
96 void __iomem *reg, u8 shift, u8 width, in imx_clk_fixup_divider() argument
117 fixup_div->divider.shift = shift; in imx_clk_fixup_divider()
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| /linux-4.4.14/drivers/net/wireless/brcm80211/brcmsmac/phy/ |
| D | phy_qmath.c | 109 s32 qm_shl32(s32 op, int shift) in qm_shl32() argument
114 if (shift > 31) in qm_shl32()
115 shift = 31; in qm_shl32()
116 else if (shift < -31) in qm_shl32()
117 shift = -31; in qm_shl32()
118 if (shift >= 0) { in qm_shl32()
119 for (i = 0; i < shift; i++) in qm_shl32()
122 result = result >> (-shift); in qm_shl32()
134 s16 qm_shl16(s16 op, int shift) in qm_shl16() argument
139 if (shift > 15) in qm_shl16()
[all …]
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| D | phy_qmath.h | 32 s32 qm_shl32(s32 op, int shift);
34 s16 qm_shl16(s16 op, int shift);
36 s16 qm_shr16(s16 op, int shift);
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| /linux-4.4.14/drivers/video/fbdev/core/ |
| D | sysimgblt.c | 57 u32 color = 0, val, shift; in color_imageblit() local
67 shift = 0; in color_imageblit()
74 shift = start_index; in color_imageblit()
83 val |= FB_SHIFT_HIGH(p, color, shift); in color_imageblit()
84 if (shift >= null_bits) { in color_imageblit()
87 val = (shift == null_bits) ? 0 : in color_imageblit()
88 FB_SHIFT_LOW(p, color, 32 - shift); in color_imageblit()
90 shift += bpp; in color_imageblit()
91 shift &= (32 - 1); in color_imageblit()
94 if (shift) { in color_imageblit()
[all …]
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| D | cfbimgblt.c | 82 u32 color = 0, val, shift; in color_imageblit() local
93 shift = 0; in color_imageblit()
100 shift = start_index; in color_imageblit()
109 val |= FB_SHIFT_HIGH(p, color, shift ^ bswapmask); in color_imageblit()
110 if (shift >= null_bits) { in color_imageblit()
113 val = (shift == null_bits) ? 0 : in color_imageblit()
114 FB_SHIFT_LOW(p, color, 32 - shift); in color_imageblit()
116 shift += bpp; in color_imageblit()
117 shift &= (32 - 1); in color_imageblit()
120 if (shift) { in color_imageblit()
[all …]
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| D | syscopyarea.c | 32 int const shift = dst_idx-src_idx; in bitcpy() local
38 if (!shift) { in bitcpy()
80 right = shift & (bits - 1); in bitcpy()
81 left = -shift & (bits - 1); in bitcpy()
87 if (shift > 0) { in bitcpy()
110 if (shift > 0) { in bitcpy()
175 int shift; in bitcpy_rev() local
182 shift = dst_idx-src_idx; in bitcpy_rev()
187 if (!shift) { in bitcpy_rev()
227 int const left = shift & (bits-1); in bitcpy_rev()
[all …]
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| D | cfbcopyarea.c | 51 int const shift = dst_idx-src_idx; in bitcpy() local
66 if (!shift) { in bitcpy()
110 int const left = shift & (bits - 1); in bitcpy()
111 int const right = -shift & (bits - 1); in bitcpy()
119 if (shift > 0) { in bitcpy()
143 if (shift > 0) { in bitcpy()
217 int shift; in bitcpy_rev() local
234 shift = dst_idx-src_idx; in bitcpy_rev()
239 if (!shift) { in bitcpy_rev()
283 int const left = shift & (bits-1); in bitcpy_rev()
[all …]
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| /linux-4.4.14/lib/ |
| D | proportions.c | 76 int prop_descriptor_init(struct prop_descriptor *pd, int shift, gfp_t gfp) in prop_descriptor_init() argument
80 if (shift > PROP_MAX_SHIFT) in prop_descriptor_init()
81 shift = PROP_MAX_SHIFT; in prop_descriptor_init()
84 pd->pg[0].shift = shift; in prop_descriptor_init()
105 void prop_change_shift(struct prop_descriptor *pd, int shift) in prop_change_shift() argument
112 if (shift > PROP_MAX_SHIFT) in prop_change_shift()
113 shift = PROP_MAX_SHIFT; in prop_change_shift()
118 offset = pd->pg[pd->index].shift - shift; in prop_change_shift()
122 pd->pg[index].shift = shift; in prop_change_shift()
194 pl->shift = 0; in prop_local_init_percpu()
[all …]
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| D | radix-tree.c | 394 unsigned int height, shift, offset; in __radix_tree_create() local
407 shift = (height-1) * RADIX_TREE_MAP_SHIFT; in __radix_tree_create()
426 offset = (index >> shift) & RADIX_TREE_MAP_MASK; in __radix_tree_create()
429 shift -= RADIX_TREE_MAP_SHIFT; in __radix_tree_create()
495 unsigned int height, shift; in __radix_tree_lookup() local
518 shift = (height-1) * RADIX_TREE_MAP_SHIFT; in __radix_tree_lookup()
522 slot = node->slots + ((index >> shift) & RADIX_TREE_MAP_MASK); in __radix_tree_lookup()
527 shift -= RADIX_TREE_MAP_SHIFT; in __radix_tree_lookup()
595 unsigned int height, shift; in radix_tree_tag_set() local
602 shift = (height - 1) * RADIX_TREE_MAP_SHIFT; in radix_tree_tag_set()
[all …]
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| D | iommu-helper.c | 10 unsigned long shift, in iommu_is_span_boundary() argument
15 shift = (shift + index) & (boundary_size - 1); in iommu_is_span_boundary()
16 return shift + nr > boundary_size; in iommu_is_span_boundary()
21 unsigned long shift, unsigned long boundary_size, in iommu_area_alloc() argument
31 if (iommu_is_span_boundary(index, nr, shift, boundary_size)) { in iommu_area_alloc()
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| D | ts_bm.c | 67 int shift = bm->patlen - 1, bs; in bm_find() local
76 while (shift < text_len) { in bm_find()
78 shift, text[shift]); in bm_find()
80 if ((icase ? toupper(text[shift-i]) in bm_find()
81 : text[shift-i]) in bm_find()
87 return consumed += (shift-(bm->patlen-1)); in bm_find()
89 next: bs = bm->bad_shift[text[shift-i]]; in bm_find()
92 shift = max_t(int, shift-i+bs, shift+bm->good_shift[i]); in bm_find()
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| D | iommu-common.c | 113 unsigned long shift; in iommu_tbl_range_alloc() local
152 shift = iommu->table_map_base >> iommu->table_shift; in iommu_tbl_range_alloc()
153 if (limit + shift > mask) { in iommu_tbl_range_alloc()
154 limit = mask - shift + 1; in iommu_tbl_range_alloc()
182 shift = 0; in iommu_tbl_range_alloc()
185 n = iommu_area_alloc(iommu->map, limit, start, npages, shift, in iommu_tbl_range_alloc()
256 unsigned long shift = iommu->table_shift; in iommu_tbl_range_free() local
259 entry = (dma_addr - iommu->table_map_base) >> shift; in iommu_tbl_range_free()
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| /linux-4.4.14/drivers/clk/sunxi/ |
| D | clk-sun6i-ar100.c | 41 int shift = (val >> SUN6I_AR100_SHIFT_SHIFT) & SUN6I_AR100_SHIFT_MASK; in ar100_recalc_rate() local
44 return (parent_rate >> shift) / (div + 1); in ar100_recalc_rate()
61 int shift; in ar100_determine_rate() local
75 shift = ffs(div) - 1; in ar100_determine_rate()
76 if (shift > SUN6I_AR100_SHIFT_MAX) in ar100_determine_rate()
77 shift = SUN6I_AR100_SHIFT_MAX; in ar100_determine_rate()
79 div >>= shift; in ar100_determine_rate()
87 shift++; in ar100_determine_rate()
89 if (shift > SUN6I_AR100_SHIFT_MAX) in ar100_determine_rate()
97 if (shift > SUN6I_AR100_SHIFT_MAX) in ar100_determine_rate()
[all …]
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| /linux-4.4.14/drivers/infiniband/hw/cxgb3/ |
| D | iwch_mem.c | 56 struct iwch_mr *mhp, int shift) in iwch_register_mem() argument
67 shift - 12, in iwch_register_mem()
80 int shift, in iwch_reregister_mem() argument
97 shift - 12, in iwch_reregister_mem()
139 int *shift, in build_phys_page_list() argument
169 for (*shift = PAGE_SHIFT; *shift < 27; ++(*shift)) in build_phys_page_list()
170 if ((1ULL << *shift) & mask) in build_phys_page_list()
173 buffer_list[0].size += buffer_list[0].addr & ((1ULL << *shift) - 1); in build_phys_page_list()
174 buffer_list[0].addr &= ~0ull << *shift; in build_phys_page_list()
179 (1ULL << *shift) - 1) >> *shift; in build_phys_page_list()
[all …]
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| /linux-4.4.14/arch/powerpc/mm/ |
| D | tlb_nohash.c | 60 .shift = 12,
64 .shift = 21,
68 .shift = 22,
72 .shift = 24,
76 .shift = 26,
80 .shift = 28,
84 .shift = 30,
91 .shift = 12,
96 .shift = 14,
100 .shift = 16,
[all …]
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| D | hugetlbpage.c | 416 if (mmu_psize_defs[i].shift == 0 || gpage_npages[i] == 0) in reserve_hugetlb_gpages()
527 unsigned int shift = hugepd_shift(*hpdp); in free_hugepd_range() local
547 pgtable_free_tlb(tlb, hugepte, pdshift - shift); in free_hugepd_range()
708 unsigned shift; in follow_huge_addr() local
713 ptep = find_linux_pte_or_hugepte(mm->pgd, address, &is_thp, &shift); in follow_huge_addr()
722 if (!shift || is_thp) in follow_huge_addr()
729 mask = (1UL << shift) - 1; in follow_huge_addr()
814 int shift = __ffs(size); in add_huge_page_size() local
824 || (shift > SLICE_HIGH_SHIFT) || (shift <= PAGE_SHIFT)) in add_huge_page_size()
828 if ((mmu_psize = shift_to_mmu_psize(shift)) < 0) in add_huge_page_size()
[all …]
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| D | hash_native_64.c | 84 va &= ~((1ul << mmu_psize_defs[apsize].shift) - 1); in __tlbie()
132 va &= ~((1ul << mmu_psize_defs[apsize].shift) - 1); in __tlbiel()
345 hash = hpt_hash(vpn, mmu_psize_defs[psize].shift, ssize); in native_hpte_find()
442 unsigned long hpte_v, want_v, shift; in native_hugepage_invalidate() local
445 shift = mmu_psize_defs[psize].shift; in native_hugepage_invalidate()
446 max_hpte_count = 1U << (PMD_SHIFT - shift); in native_hugepage_invalidate()
456 addr = s_addr + (i * (1ul << shift)); in native_hugepage_invalidate()
458 hash = hpt_hash(vpn, shift, ssize); in native_hugepage_invalidate()
488 int i, shift; in __hpte_actual_psize() local
506 shift = mmu_psize_defs[i].shift - LP_SHIFT; in __hpte_actual_psize()
[all …]
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| D | hash_utils_64.c | 132 .shift = 12,
146 .shift = 12,
153 .shift = 24,
187 unsigned int step, shift; in htab_bolt_mapping() local
190 shift = mmu_psize_defs[psize].shift; in htab_bolt_mapping()
191 step = 1 << shift; in htab_bolt_mapping()
232 hash = hpt_hash(vpn, shift, ssize); in htab_bolt_mapping()
254 unsigned int step, shift; in htab_remove_mapping() local
256 shift = mmu_psize_defs[psize].shift; in htab_remove_mapping()
257 step = 1 << shift; in htab_remove_mapping()
[all …]
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| D | init_64.c | 106 void pgtable_cache_add(unsigned shift, void (*ctor)(void *)) in pgtable_cache_add() argument
109 unsigned long table_size = sizeof(void *) << shift; in pgtable_cache_add()
127 BUG_ON((shift < 1) || (shift > MAX_PGTABLE_INDEX_SIZE)); in pgtable_cache_add()
129 if (PGT_CACHE(shift)) in pgtable_cache_add()
133 name = kasprintf(GFP_KERNEL, "pgtable-2^%d", shift); in pgtable_cache_add()
136 pgtable_cache[shift - 1] = new; in pgtable_cache_add()
137 pr_debug("Allocated pgtable cache for order %d\n", shift); in pgtable_cache_add()
301 unsigned long page_size = 1 << mmu_psize_defs[mmu_vmemmap_psize].shift; in vmemmap_populate()
364 unsigned long page_size = 1 << mmu_psize_defs[mmu_vmemmap_psize].shift; in vmemmap_free()
432 unsigned long page_size = 1 << mmu_psize_defs[mmu_vmemmap_psize].shift; in realmode_pfn_to_page()
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| D | hugetlbpage-hash64.c | 23 int ssize, unsigned int shift, unsigned int mmu_psize) in __hash_page_huge() argument
30 BUG_ON(shift != mmu_psize_defs[mmu_psize].shift); in __hash_page_huge()
66 sz = ((1UL) << shift); in __hash_page_huge()
77 hash = hpt_hash(vpn, shift, ssize); in __hash_page_huge()
89 unsigned long hash = hpt_hash(vpn, shift, ssize); in __hash_page_huge()
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| D | hugetlbpage-book3e.c | 83 unsigned long psize, tsize, shift; in book3e_hugetlb_preload() local
99 shift = mmu_psize_defs[psize].shift; in book3e_hugetlb_preload()
102 shift = __ilog2(psize); in book3e_hugetlb_preload()
103 tsize = shift - 10; in book3e_hugetlb_preload()
124 mas2 = ea & ~((1UL << shift) - 1); in book3e_hugetlb_preload()
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| D | hugepage-hash64.c | 30 unsigned long vpn, hash, shift, slot; in __hash_page_thp() local
83 shift = mmu_psize_defs[psize].shift; in __hash_page_thp()
84 index = (ea & ~HPAGE_PMD_MASK) >> shift; in __hash_page_thp()
103 hash = hpt_hash(vpn, shift, ssize); in __hash_page_thp()
129 hash = hpt_hash(vpn, shift, ssize); in __hash_page_thp()
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| /linux-4.4.14/samples/bpf/ |
| D | lathist_kern.c | 43 unsigned int shift; in log2() local
46 shift = (v > 0xFF) << 3; v >>= shift; r |= shift; in log2()
47 shift = (v > 0xF) << 2; v >>= shift; r |= shift; in log2()
48 shift = (v > 0x3) << 1; v >>= shift; r |= shift; in log2()
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| D | tracex2_kern.c | 46 unsigned int shift; in log2() local
49 shift = (v > 0xFF) << 3; v >>= shift; r |= shift; in log2()
50 shift = (v > 0xF) << 2; v >>= shift; r |= shift; in log2()
51 shift = (v > 0x3) << 1; v >>= shift; r |= shift; in log2()
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| /linux-4.4.14/drivers/infiniband/core/ |
| D | packer.c | 71 int shift; in ib_pack() local
76 shift = 32 - desc[i].offset_bits - desc[i].size_bits; in ib_pack()
80 structure) << shift; in ib_pack()
84 mask = cpu_to_be32(((1ull << desc[i].size_bits) - 1) << shift); in ib_pack()
88 int shift; in ib_pack() local
93 shift = 64 - desc[i].offset_bits - desc[i].size_bits; in ib_pack()
97 structure) << shift; in ib_pack()
101 mask = cpu_to_be64((~0ull >> (64 - desc[i].size_bits)) << shift); in ib_pack()
161 int shift; in ib_unpack() local
166 shift = 32 - desc[i].offset_bits - desc[i].size_bits; in ib_unpack()
[all …]
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| /linux-4.4.14/arch/m32r/lib/ |
| D | ashxdi3.S | 10 ; input r2 shift val
26 ; case 32 =< shift
32 1: ; case shift <32
46 ; case 32 =< shift
51 1: ; case shift <32
63 ; case 32 =< shift
68 1: ; case shift <32
83 ; case 32 =< shift
89 1: ; case shift <32
103 ; case 32 =< shift
[all …]
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| /linux-4.4.14/drivers/md/persistent-data/ |
| D | dm-btree-remove.c | 56 static void node_shift(struct btree_node *n, int shift) in node_shift() argument
61 if (shift < 0) { in node_shift()
62 shift = -shift; in node_shift()
63 BUG_ON(shift > nr_entries); in node_shift()
64 BUG_ON((void *) key_ptr(n, shift) >= value_ptr(n, shift)); in node_shift()
66 key_ptr(n, shift), in node_shift()
67 (nr_entries - shift) * sizeof(__le64)); in node_shift()
69 value_ptr(n, shift), in node_shift()
70 (nr_entries - shift) * value_size); in node_shift()
72 BUG_ON(nr_entries + shift > le32_to_cpu(n->header.max_entries)); in node_shift()
[all …]
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| /linux-4.4.14/arch/arm64/kernel/ |
| D | insn.c | 279 int shift; in aarch64_get_imm_shift_mask() local
284 shift = 0; in aarch64_get_imm_shift_mask()
288 shift = 5; in aarch64_get_imm_shift_mask()
292 shift = 5; in aarch64_get_imm_shift_mask()
296 shift = 5; in aarch64_get_imm_shift_mask()
300 shift = 10; in aarch64_get_imm_shift_mask()
304 shift = 12; in aarch64_get_imm_shift_mask()
308 shift = 15; in aarch64_get_imm_shift_mask()
313 shift = 10; in aarch64_get_imm_shift_mask()
317 shift = 16; in aarch64_get_imm_shift_mask()
[all …]
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| /linux-4.4.14/include/linux/mfd/ |
| D | tmio.h | 47 #define sd_config_write8(base, shift, reg, val) \ argument
48 tmio_iowrite8((val), (base) + ((reg) << (shift)))
49 #define sd_config_write16(base, shift, reg, val) \ argument
50 tmio_iowrite16((val), (base) + ((reg) << (shift)))
51 #define sd_config_write32(base, shift, reg, val) \ argument
53 tmio_iowrite16((val), (base) + ((reg) << (shift))); \
54 tmio_iowrite16((val) >> 16, (base) + ((reg + 2) << (shift))); \
103 int tmio_core_mmc_enable(void __iomem *cnf, int shift, unsigned long base);
104 int tmio_core_mmc_resume(void __iomem *cnf, int shift, unsigned long base);
105 void tmio_core_mmc_pwr(void __iomem *cnf, int shift, int state);
[all …]
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| /linux-4.4.14/drivers/media/platform/davinci/ |
| D | vpss.c | 242 u32 utemp, mask = 0x1, shift = 0; in dm355_enable_clock() local
249 shift = 2; in dm355_enable_clock()
252 shift = 3; in dm355_enable_clock()
255 shift = 4; in dm355_enable_clock()
258 shift = 5; in dm355_enable_clock()
261 shift = 6; in dm355_enable_clock()
272 utemp &= ~(mask << shift); in dm355_enable_clock()
274 utemp |= (mask << shift); in dm355_enable_clock()
284 u32 utemp, mask = 0x1, shift = 0, offset = DM365_ISP5_PCCR; in dm365_enable_clock() local
292 shift = 1; in dm365_enable_clock()
[all …]
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| /linux-4.4.14/drivers/clk/meson/ |
| D | clkc.h | 22 #define SETPMASK(width, shift) GENMASK(shift + width - 1, shift) argument
23 #define CLRPMASK(width, shift) (~SETPMASK(width, shift)) argument
25 #define PARM_GET(width, shift, reg) \ argument
26 (((reg) & SETPMASK(width, shift)) >> (shift))
27 #define PARM_SET(width, shift, reg, val) \ argument
28 (((reg) & CLRPMASK(width, shift)) | (val << (shift)))
34 u8 shift; member
40 .shift = (_s), \
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| D | clkc.c | 69 mux->shift = composite_conf->mux_parm.shift; in meson_clk_register_composite()
87 div->shift = composite_conf->div_parm.shift; in meson_clk_register_composite()
103 gate->bit_idx = composite_conf->gate_parm.shift; in meson_clk_register_composite()
148 mult = PARM_GET(p->width, p->shift, reg); in meson_clk_register_fixed_factor()
157 mult = PARM_GET(p->width, p->shift, reg); in meson_clk_register_fixed_factor()
186 rate = PARM_GET(r->width, r->shift, reg); in meson_clk_register_fixed_rate()
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| /linux-4.4.14/arch/powerpc/sysdev/qe_lib/ |
| D | ucc.c | 88 unsigned int *reg_num, unsigned int *shift) in get_cmxucr_reg() argument
94 *shift = 16 - 8 * (ucc_num & 2); in get_cmxucr_reg()
101 unsigned int shift; in ucc_mux_set_grant_tsa_bkpt() local
107 get_cmxucr_reg(ucc_num, &cmxucr, ®_num, &shift); in ucc_mux_set_grant_tsa_bkpt()
110 setbits32(cmxucr, mask << shift); in ucc_mux_set_grant_tsa_bkpt()
112 clrbits32(cmxucr, mask << shift); in ucc_mux_set_grant_tsa_bkpt()
122 unsigned int shift; in ucc_set_qe_mux_rxtx() local
133 get_cmxucr_reg(ucc_num, &cmxucr, ®_num, &shift); in ucc_set_qe_mux_rxtx()
206 shift += 4; in ucc_set_qe_mux_rxtx()
208 clrsetbits_be32(cmxucr, QE_CMXUCR_TX_CLK_SRC_MASK << shift, in ucc_set_qe_mux_rxtx()
[all …]
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| D | qe_ic.c | 434 u32 temp, control_reg = QEIC_CICNR, shift = 0; in qe_ic_set_high_priority() local
441 shift = CICNR_ZCC1T_SHIFT; in qe_ic_set_high_priority()
444 shift = CICNR_WCC1T_SHIFT; in qe_ic_set_high_priority()
447 shift = CICNR_YCC1T_SHIFT; in qe_ic_set_high_priority()
450 shift = CICNR_XCC1T_SHIFT; in qe_ic_set_high_priority()
453 shift = CRICR_RTA1T_SHIFT; in qe_ic_set_high_priority()
457 shift = CRICR_RTB1T_SHIFT; in qe_ic_set_high_priority()
464 shift += (2 - priority) * 2; in qe_ic_set_high_priority()
466 temp &= ~(SIGNAL_MASK << shift); in qe_ic_set_high_priority()
467 temp |= (high ? SIGNAL_HIGH : SIGNAL_LOW) << shift; in qe_ic_set_high_priority()
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| /linux-4.4.14/drivers/clk/ |
| D | clk-axm5516.c | 81 u32 shift; member
97 div = 1 + ((ctrl >> divclk->shift) & ((1 << divclk->width)-1)); in axxia_divclk_recalc_rate()
116 u32 shift; member
131 parent = (ctrl >> mux->shift) & ((1 << mux->width) - 1); in axxia_clkmux_get_parent()
219 .shift = 0,
233 .shift = 4,
247 .shift = 8,
261 .shift = 12,
275 .shift = 0,
289 .shift = 4,
[all …]
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| D | clk-mux.c | 44 val = clk_readl(mux->reg) >> mux->shift; in clk_mux_get_parent()
91 val = mux->mask << (mux->shift + 16); in clk_mux_set_parent()
94 val &= ~(mux->mask << mux->shift); in clk_mux_set_parent()
96 val |= index << mux->shift; in clk_mux_set_parent()
122 void __iomem *reg, u8 shift, u32 mask, in clk_register_mux_table() argument
132 if (width + shift > 16) { in clk_register_mux_table()
156 mux->shift = shift; in clk_register_mux_table()
175 void __iomem *reg, u8 shift, u8 width, in clk_register_mux() argument
181 flags, reg, shift, mask, clk_mux_flags, in clk_register_mux()
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| D | clk-divider.c | 145 val = clk_readl(divider->reg) >> divider->shift; in clk_divider_recalc_rate()
357 bestdiv = readl(divider->reg) >> divider->shift; in clk_divider_round_rate()
402 val = div_mask(divider->width) << (divider->shift + 16); in clk_divider_set_rate()
405 val &= ~(div_mask(divider->width) << divider->shift); in clk_divider_set_rate()
407 val |= value << divider->shift; in clk_divider_set_rate()
433 void __iomem *reg, u8 shift, u8 width, in _register_divider() argument
442 if (width + shift > 16) { in _register_divider()
464 div->shift = shift; in _register_divider()
494 void __iomem *reg, u8 shift, u8 width, in clk_register_divider() argument
497 return _register_divider(dev, name, parent_name, flags, reg, shift, in clk_register_divider()
[all …]
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| /linux-4.4.14/drivers/regulator/ |
| D | max8998.c | 117 int *reg, int *shift) in max8998_get_enable_register() argument
124 *shift = 3 - (ldo - MAX8998_LDO2); in max8998_get_enable_register()
128 *shift = 7 - (ldo - MAX8998_LDO6); in max8998_get_enable_register()
132 *shift = 7 - (ldo - MAX8998_LDO14); in max8998_get_enable_register()
136 *shift = 7 - (ldo - MAX8998_BUCK1); in max8998_get_enable_register()
140 *shift = 7 - (ldo - MAX8998_EN32KHZ_AP); in max8998_get_enable_register()
144 *shift = 7 - (ldo - MAX8998_ESAFEOUT1); in max8998_get_enable_register()
157 int ret, reg, shift = 8; in max8998_ldo_is_enabled() local
160 ret = max8998_get_enable_register(rdev, ®, &shift); in max8998_ldo_is_enabled()
168 return val & (1 << shift); in max8998_ldo_is_enabled()
[all …]
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| /linux-4.4.14/drivers/s390/char/ |
| D | defkeymap.map | 145 shift control keycode 65 = F13
146 shift control keycode 66 = F14
147 shift control keycode 67 = F15
148 shift control keycode 68 = F16
149 shift control keycode 69 = F17
150 shift control keycode 70 = F18
151 shift control keycode 71 = F19
152 shift control keycode 72 = F20
153 shift control keycode 73 = F21
154 shift control keycode 113 = F1
[all …]
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| /linux-4.4.14/mm/ |
| D | mm_init.c | 71 int shift, width; in mminit_verify_pageflags_layout() local
74 shift = 8 * sizeof(unsigned long); in mminit_verify_pageflags_layout()
75 width = shift - SECTIONS_WIDTH - NODES_WIDTH - ZONES_WIDTH - LAST_CPUPID_SHIFT; in mminit_verify_pageflags_layout()
101 shift, width, width, NR_PAGEFLAGS, NR_PAGEFLAGS, 0); in mminit_verify_pageflags_layout()
112 shift -= SECTIONS_WIDTH; in mminit_verify_pageflags_layout()
113 BUG_ON(shift != SECTIONS_PGSHIFT); in mminit_verify_pageflags_layout()
116 shift -= NODES_WIDTH; in mminit_verify_pageflags_layout()
117 BUG_ON(shift != NODES_PGSHIFT); in mminit_verify_pageflags_layout()
120 shift -= ZONES_WIDTH; in mminit_verify_pageflags_layout()
121 BUG_ON(shift != ZONES_PGSHIFT); in mminit_verify_pageflags_layout()
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| /linux-4.4.14/drivers/net/ethernet/ti/ |
| D | cpsw_ale.c | 463 int shift, port_shift; member
472 .shift = 31,
480 .shift = 30,
488 .shift = 29,
496 .shift = 8,
504 .shift = 7,
512 .shift = 6,
520 .shift = 5,
528 .shift = 4,
536 .shift = 3,
[all …]
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| /linux-4.4.14/drivers/net/ethernet/mellanox/mlxsw/ |
| D | item.h | 47 unsigned char shift; /* shift in bits */ member
83 tmp >>= item->shift; in __mlxsw_item_get16()
86 tmp <<= item->shift; in __mlxsw_item_get16()
96 u16 mask = GENMASK(item->size.bits - 1, 0) << item->shift; in __mlxsw_item_set16()
100 val <<= item->shift; in __mlxsw_item_set16()
116 tmp >>= item->shift; in __mlxsw_item_get32()
119 tmp <<= item->shift; in __mlxsw_item_get32()
129 u32 mask = GENMASK(item->size.bits - 1, 0) << item->shift; in __mlxsw_item_set32()
133 val <<= item->shift; in __mlxsw_item_set32()
149 tmp >>= item->shift; in __mlxsw_item_get64()
[all …]
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| /linux-4.4.14/drivers/gpu/ipu-v3/ |
| D | ipu-smfc.c | 46 u32 val, shift; in ipu_smfc_set_burstsize() local
50 shift = smfc->chno * 4; in ipu_smfc_set_burstsize()
52 val &= ~(0xf << shift); in ipu_smfc_set_burstsize()
53 val |= burstsize << shift; in ipu_smfc_set_burstsize()
66 u32 val, shift; in ipu_smfc_map_channel() local
70 shift = smfc->chno * 3; in ipu_smfc_map_channel()
72 val &= ~(0x7 << shift); in ipu_smfc_map_channel()
73 val |= ((csi_id << 2) | mipi_id) << shift; in ipu_smfc_map_channel()
86 u32 val, shift; in ipu_smfc_set_watermark() local
90 shift = smfc->chno * 6 + (smfc->chno > 1 ? 4 : 0); in ipu_smfc_set_watermark()
[all …]
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| /linux-4.4.14/arch/mips/pci/ |
| D | ops-vr41xx.c | 93 int shift; in pci_config_write() local
102 shift = (where & 3) << 3; in pci_config_write()
103 data &= ~(0xffU << shift); in pci_config_write()
104 data |= ((val & 0xffU) << shift); in pci_config_write()
107 shift = (where & 2) << 3; in pci_config_write()
108 data &= ~(0xffffU << shift); in pci_config_write()
109 data |= ((val & 0xffffU) << shift); in pci_config_write()
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| D | ops-bridge.c | 51 u32 cf, shift, mask; in pci_conf0_read_config() local
96 shift = ((where & 3) << 3); in pci_conf0_read_config()
98 *value = (cf >> shift) & mask; in pci_conf0_read_config()
112 u32 cf, shift, mask; in pci_conf1_read_config() local
160 shift = ((where & 3) << 3); in pci_conf1_read_config()
162 *value = (cf >> shift) & mask; in pci_conf1_read_config()
184 u32 cf, shift, mask, smask; in pci_conf0_write_config() local
231 shift = ((where & 3) << 3); in pci_conf0_write_config()
233 smask = mask << shift; in pci_conf0_write_config()
235 cf = (cf & ~smask) | ((value & mask) << shift); in pci_conf0_write_config()
[all …]
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| D | ops-emma2rh.c | 134 int shift; in pci_config_write() local
151 shift = (where & 3) << 3; in pci_config_write()
152 data &= ~(0xffU << shift); in pci_config_write()
153 data |= ((val & 0xffU) << shift); in pci_config_write()
156 shift = (where & 2) << 3; in pci_config_write()
157 data &= ~(0xffffU << shift); in pci_config_write()
158 data |= ((val & 0xffffU) << shift); in pci_config_write()
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| /linux-4.4.14/drivers/media/platform/soc_camera/ |
| D | soc_scale_crop.h | 26 unsigned int shift, unsigned int scale) in soc_camera_shift_scale() argument
28 return DIV_ROUND_CLOSEST(size << shift, scale); in soc_camera_shift_scale()
31 #define soc_camera_calc_scale(in, shift, out) soc_camera_shift_scale(in, shift, out) argument
41 bool host_can_scale, unsigned int shift);
45 unsigned int shift);
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| D | soc_scale_crop.c | 310 bool host_can_scale, unsigned int shift) in soc_camera_client_scale() argument
338 scale_h = soc_camera_calc_scale(rect->width, shift, mf_tmp->width); in soc_camera_client_scale()
339 scale_v = soc_camera_calc_scale(rect->height, shift, mf_tmp->height); in soc_camera_client_scale()
349 *width = soc_camera_shift_scale(subrect->width, shift, scale_h); in soc_camera_client_scale()
350 *height = soc_camera_shift_scale(subrect->height, shift, scale_v); in soc_camera_client_scale()
366 unsigned int shift) in soc_camera_calc_client_output() argument
395 scale_h = soc_camera_calc_scale(subrect->width, shift, pix->width); in soc_camera_calc_client_output()
396 scale_v = soc_camera_calc_scale(subrect->height, shift, pix->height); in soc_camera_calc_client_output()
404 mf->width = soc_camera_shift_scale(rect->width, shift, scale_h); in soc_camera_calc_client_output()
405 mf->height = soc_camera_shift_scale(rect->height, shift, scale_v); in soc_camera_calc_client_output()
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| /linux-4.4.14/sound/pci/ac97/ |
| D | ac97_patch.h | 25 #define AC97_SINGLE_VALUE(reg,shift,mask,invert) \ argument
26 ((reg) | ((shift) << 8) | ((shift) << 12) | ((mask) << 16) | \
28 #define AC97_PAGE_SINGLE_VALUE(reg,shift,mask,invert,page) \ argument
29 (AC97_SINGLE_VALUE(reg,shift,mask,invert) | (1<<25) | ((page) << 26))
30 #define AC97_SINGLE(xname, reg, shift, mask, invert) \ argument
34 .private_value = AC97_SINGLE_VALUE(reg, shift, mask, invert) }
35 #define AC97_PAGE_SINGLE(xname, reg, shift, mask, invert, page) \ argument
39 .private_value = AC97_PAGE_SINGLE_VALUE(reg, shift, mask, invert, page) }
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| /linux-4.4.14/drivers/clk/rockchip/ |
| D | clk-mmc-phase.c | 27 int shift; member
63 raw_value = readl(mmc_clock->reg) >> (mmc_clock->shift); in rockchip_mmc_get_phase()
126 writel(HIWORD_UPDATE(raw_value, 0x07ff, mmc_clock->shift), mmc_clock->reg); in rockchip_mmc_set_phase()
130 mmc_clock->reg, raw_value>>(mmc_clock->shift), in rockchip_mmc_set_phase()
145 void __iomem *reg, int shift) in rockchip_clk_register_mmc() argument
162 mmc_clock->shift = shift; in rockchip_clk_register_mmc()
168 if (mmc_clock->shift == ROCKCHIP_MMC_INIT_STATE_SHIFT) in rockchip_clk_register_mmc()
171 mmc_clock->shift), mmc_clock->reg); in rockchip_clk_register_mmc()
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| D | clk-inverter.c | 25 int shift; member
39 val = readl(inv_clock->reg) >> inv_clock->shift; in rockchip_inv_get_phase()
58 writel(HIWORD_UPDATE(val, INVERTER_MASK, inv_clock->shift), in rockchip_inv_set_phase()
67 reg &= ~BIT(inv_clock->shift); in rockchip_inv_set_phase()
84 void __iomem *reg, int shift, int flags, in rockchip_clk_register_inverter() argument
103 inv_clock->shift = shift; in rockchip_clk_register_inverter()
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| /linux-4.4.14/drivers/clk/ti/ |
| D | autoidle.c | 29 u8 shift; member
79 val &= ~(1 << clk->shift); in _allow_autoidle()
81 val |= (1 << clk->shift); in _allow_autoidle()
93 val |= (1 << clk->shift); in _deny_autoidle()
95 val &= ~(1 << clk->shift); in _deny_autoidle()
141 u32 shift; in of_ti_clk_autoidle_setup() local
145 if (of_property_read_u32(node, "ti,autoidle-shift", &shift)) in of_ti_clk_autoidle_setup()
153 clk->shift = shift; in of_ti_clk_autoidle_setup()
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| D | mux.c | 44 val = ti_clk_ll_ops->clk_readl(mux->reg) >> mux->shift; in ti_clk_mux_get_parent()
84 val = mux->mask << (mux->shift + 16); in ti_clk_mux_set_parent()
87 val &= ~(mux->mask << mux->shift); in ti_clk_mux_set_parent()
89 val |= index << mux->shift; in ti_clk_mux_set_parent()
104 u8 shift, u32 mask, u8 clk_mux_flags, in _register_mux() argument
126 mux->shift = shift; in _register_mux()
187 u32 shift = 0; in of_mux_clk_setup() local
206 of_property_read_u32(node, "ti,bit-shift", &shift); in of_mux_clk_setup()
222 flags, reg, shift, mask, clk_mux_flags, NULL); in of_mux_clk_setup()
247 mux->shift = setup->bit_shift; in ti_clk_build_component_mux()
[all …]
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| D | divider.c | 105 val = ti_clk_ll_ops->clk_readl(divider->reg) >> divider->shift; in ti_clk_divider_recalc_rate()
231 val = div_mask(divider) << (divider->shift + 16); in ti_clk_divider_set_rate()
234 val &= ~(div_mask(divider) << divider->shift); in ti_clk_divider_set_rate()
236 val |= value << divider->shift; in ti_clk_divider_set_rate()
251 u8 shift, u8 width, u8 clk_divider_flags, in _register_divider() argument
259 if (width + shift > 16) { in _register_divider()
280 div->shift = shift; in _register_divider()
377 div->shift = setup->bit_shift; in ti_clk_build_component_div()
519 u32 *flags, u8 *div_flags, u8 *width, u8 *shift) in ti_clk_divider_populate() argument
528 *shift = val; in ti_clk_divider_populate()
[all …]
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| /linux-4.4.14/drivers/clk/mxs/ |
| D | clk.h | 25 int mxs_clk_wait(void __iomem *reg, u8 shift);
34 void __iomem *reg, u8 shift, u8 width, u8 busy);
37 void __iomem *reg, u8 shift, u8 width, u8 busy);
45 const char *parent_name, void __iomem *reg, u8 shift) in mxs_clk_gate() argument
48 reg, shift, CLK_GATE_SET_TO_DISABLE, in mxs_clk_gate()
53 u8 shift, u8 width, const char *const *parent_names, int num_parents) in mxs_clk_mux() argument
57 reg, shift, width, 0, &mxs_lock); in mxs_clk_mux()
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| D | clk-frac.c | 32 u8 shift; member
46 div = readl_relaxed(frac->reg) >> frac->shift; in clk_frac_recalc_rate()
101 val &= ~(((1 << frac->width) - 1) << frac->shift); in clk_frac_set_rate()
102 val |= div << frac->shift; in clk_frac_set_rate()
117 void __iomem *reg, u8 shift, u8 width, u8 busy) in mxs_clk_frac() argument
134 frac->shift = shift; in mxs_clk_frac()
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| /linux-4.4.14/arch/sh/drivers/pci/ |
| D | ops-sh4.c | 68 int shift; in sh4_pci_write() local
78 shift = (where & 3) << 3; in sh4_pci_write()
79 data &= ~(0xff << shift); in sh4_pci_write()
80 data |= ((val & 0xff) << shift); in sh4_pci_write()
83 shift = (where & 2) << 3; in sh4_pci_write()
84 data &= ~(0xffff << shift); in sh4_pci_write()
85 data |= ((val & 0xffff) << shift); in sh4_pci_write()
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| D | ops-sh7786.c | 132 int shift, ret; in sh7786_pcie_write() local
151 shift = (where & 3) << 3; in sh7786_pcie_write()
152 data &= ~(0xff << shift); in sh7786_pcie_write()
153 data |= ((val & 0xff) << shift); in sh7786_pcie_write()
155 shift = (where & 2) << 3; in sh7786_pcie_write()
156 data &= ~(0xffff << shift); in sh7786_pcie_write()
157 data |= ((val & 0xffff) << shift); in sh7786_pcie_write()
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| /linux-4.4.14/arch/powerpc/sysdev/ |
| D | cpm2.c | 146 int shift; in cpm2_clk_setup() local
216 shift = 24; in cpm2_clk_setup()
220 shift = 16; in cpm2_clk_setup()
224 shift = 8; in cpm2_clk_setup()
228 shift = 0; in cpm2_clk_setup()
232 shift = 24; in cpm2_clk_setup()
236 shift = 16; in cpm2_clk_setup()
240 shift = 8; in cpm2_clk_setup()
256 bits <<= shift; in cpm2_clk_setup()
257 mask <<= shift; in cpm2_clk_setup()
[all …]
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| /linux-4.4.14/sound/soc/ |
| D | soc-ops.c | 138 unsigned int reg, unsigned int mask, unsigned int shift, in snd_soc_read_signed() argument
148 val = (val >> shift) & mask; in snd_soc_read_signed()
255 unsigned int shift = mc->shift; in snd_soc_get_volsw() local
268 ret = snd_soc_read_signed(component, reg, mask, shift, sign_bit, &val); in snd_soc_get_volsw()
282 ret = snd_soc_read_signed(component, reg2, mask, shift, in snd_soc_get_volsw()
315 unsigned int shift = mc->shift; in snd_soc_put_volsw() local
333 val_mask = mask << shift; in snd_soc_put_volsw()
334 val = val << shift; in snd_soc_put_volsw()
343 val2 = val2 << shift; in snd_soc_put_volsw()
377 unsigned int shift = mc->shift; in snd_soc_get_volsw_sx() local
[all …]
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| /linux-4.4.14/arch/mn10300/include/asm/ |
| D | bitops.h | 29 const unsigned shift = (nr) & 7; \
34 : "a"(_a), "d"(1 << shift), "m"(*_a) \
46 const unsigned shift = (nr) & 7; \
51 : "a"(_a), "d"(1 << shift), "m"(*_a) \
97 const unsigned shift = (nr) & 7; \
104 : "a"(_a), "d"(1 << shift), "m"(*_a) \
118 const unsigned shift = (nr) & 7; \
125 : "a"(_a), "d"(1 << shift), "m"(*_a) \
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| /linux-4.4.14/drivers/gpu/drm/nouveau/nvkm/subdev/gpio/ |
| D | nv50.c | 58 nv50_gpio_location(int line, u32 *reg, u32 *shift) in nv50_gpio_location() argument
66 *shift = (line & 7) << 2; in nv50_gpio_location()
74 u32 reg, shift; in nv50_gpio_drive() local
76 if (nv50_gpio_location(line, ®, &shift)) in nv50_gpio_drive()
79 nvkm_mask(device, reg, 3 << shift, (((dir ^ 1) << 1) | out) << shift); in nv50_gpio_drive()
87 u32 reg, shift; in nv50_gpio_sense() local
89 if (nv50_gpio_location(line, ®, &shift)) in nv50_gpio_sense()
92 return !!(nvkm_rd32(device, reg) & (4 << shift)); in nv50_gpio_sense()
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| /linux-4.4.14/arch/arm/mach-imx/ |
| D | iomux-v1.c | 95 unsigned long shift = (pin & 0xf) << 1; in imx_iomuxv1_set_ocr() local
96 unsigned long mask = 3 << shift; in imx_iomuxv1_set_ocr()
97 unsigned long value = ocr << shift; in imx_iomuxv1_set_ocr()
106 unsigned long shift = (pin & 0xf) << 1; in imx_iomuxv1_set_iconfa() local
107 unsigned long mask = 3 << shift; in imx_iomuxv1_set_iconfa()
108 unsigned long value = aout << shift; in imx_iomuxv1_set_iconfa()
117 unsigned long shift = (pin & 0xf) << 1; in imx_iomuxv1_set_iconfb() local
118 unsigned long mask = 3 << shift; in imx_iomuxv1_set_iconfb()
119 unsigned long value = bout << shift; in imx_iomuxv1_set_iconfb()
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| /linux-4.4.14/arch/powerpc/include/asm/ |
| D | pgalloc-64.h | 39 #define PGT_CACHE(shift) ({ \ argument
40 BUG_ON(!(shift)); \
41 pgtable_cache[(shift) - 1]; \
125 void *table, int shift) in pgtable_free_tlb() argument
128 BUG_ON(shift > MAX_PGTABLE_INDEX_SIZE); in pgtable_free_tlb()
129 pgf |= shift; in pgtable_free_tlb()
136 unsigned shift = (unsigned long)_table & MAX_PGTABLE_INDEX_SIZE; in __tlb_remove_table() local
138 pgtable_free(table, shift); in __tlb_remove_table()
142 void *table, int shift) in pgtable_free_tlb() argument
144 pgtable_free(table, shift); in pgtable_free_tlb()
[all …]
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| D | kvm_book3s_64.h | 104 int i, shift; in __hpte_actual_psize() local
122 shift = mmu_psize_defs[i].shift - LP_SHIFT; in __hpte_actual_psize()
123 if (shift > LP_BITS) in __hpte_actual_psize()
124 shift = LP_BITS; in __hpte_actual_psize()
125 mask = (1 << shift) - 1; in __hpte_actual_psize()
144 if (!mmu_psize_defs[b_psize].shift) in compute_tlbie_rb()
198 rb |= (va_low << mmu_psize_defs[b_psize].shift) & 0x7ff000; in compute_tlbie_rb()
202 rb &= ~((1ul << mmu_psize_defs[a_psize].shift) - 1); in compute_tlbie_rb()
208 aval_shift = 64 - (77 - mmu_psize_defs[b_psize].shift) + 1; in compute_tlbie_rb()
235 if (!mmu_psize_defs[size].shift) in __hpte_page_size()
[all …]
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| D | pgalloc-32.h | 61 void *table, int shift) in pgtable_free_tlb() argument
64 BUG_ON(shift > MAX_PGTABLE_INDEX_SIZE); in pgtable_free_tlb()
65 pgf |= shift; in pgtable_free_tlb()
72 unsigned shift = (unsigned long)_table & MAX_PGTABLE_INDEX_SIZE; in __tlb_remove_table() local
74 pgtable_free(table, shift); in __tlb_remove_table()
78 void *table, int shift) in pgtable_free_tlb() argument
80 pgtable_free(table, shift); in pgtable_free_tlb()
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| D | mmu-hash64.h | 140 unsigned int shift; /* number of bits */ member
148 static inline int shift_to_mmu_psize(unsigned int shift) in shift_to_mmu_psize() argument
153 if (mmu_psize_defs[psize].shift == shift) in shift_to_mmu_psize()
160 if (mmu_psize_defs[mmu_psize].shift) in mmu_psize_to_shift()
161 return mmu_psize_defs[mmu_psize].shift; in mmu_psize_to_shift()
280 unsigned int shift = mmu_psize_defs[actual_psize].shift; in hpte_encode_r() local
281 return (pa & ~((1ul << shift) - 1)) | (penc << LP_SHIFT); in hpte_encode_r()
302 unsigned int shift, int ssize) in hpt_hash() argument
311 ((vpn & mask) >> (shift - VPN_SHIFT)); in hpt_hash()
316 ((vpn & mask) >> (shift - VPN_SHIFT)) ; in hpt_hash()
[all …]
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| D | pte-hash64-64k.h | 81 #define pte_iterate_hashed_subpages(rpte, psize, vpn, index, shift) \ argument
86 shift = mmu_psize_defs[psize].shift; \
88 vpn += (1L << (shift - VPN_SHIFT))) { \
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| D | mmu-book3e.h | 251 unsigned int shift; /* number of bits */ member
260 static inline int shift_to_mmu_psize(unsigned int shift) in shift_to_mmu_psize() argument
265 if (mmu_psize_defs[psize].shift == shift) in shift_to_mmu_psize()
272 if (mmu_psize_defs[mmu_psize].shift) in mmu_psize_to_shift()
273 return mmu_psize_defs[mmu_psize].shift; in mmu_psize_to_shift()
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| D | pmac_pfunc.h | 96 int (*read_reg32_msrx)(PMF_STD_ARGS, u32 offset, u32 mask, u32 shift,
98 int (*read_reg16_msrx)(PMF_STD_ARGS, u32 offset, u32 mask, u32 shift,
100 int (*read_reg8_msrx)(PMF_STD_ARGS, u32 offset, u32 mask, u32 shift,
103 int (*write_reg32_slm)(PMF_STD_ARGS, u32 offset, u32 shift, u32 mask);
104 int (*write_reg16_slm)(PMF_STD_ARGS, u32 offset, u32 shift, u32 mask);
105 int (*write_reg8_slm)(PMF_STD_ARGS, u32 offset, u32 shift, u32 mask);
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| /linux-4.4.14/drivers/ata/ |
| D | pata_platform.c | 58 unsigned int shift) in pata_platform_setup_port() argument
61 ioaddr->data_addr = ioaddr->cmd_addr + (ATA_REG_DATA << shift); in pata_platform_setup_port()
62 ioaddr->error_addr = ioaddr->cmd_addr + (ATA_REG_ERR << shift); in pata_platform_setup_port()
63 ioaddr->feature_addr = ioaddr->cmd_addr + (ATA_REG_FEATURE << shift); in pata_platform_setup_port()
64 ioaddr->nsect_addr = ioaddr->cmd_addr + (ATA_REG_NSECT << shift); in pata_platform_setup_port()
65 ioaddr->lbal_addr = ioaddr->cmd_addr + (ATA_REG_LBAL << shift); in pata_platform_setup_port()
66 ioaddr->lbam_addr = ioaddr->cmd_addr + (ATA_REG_LBAM << shift); in pata_platform_setup_port()
67 ioaddr->lbah_addr = ioaddr->cmd_addr + (ATA_REG_LBAH << shift); in pata_platform_setup_port()
68 ioaddr->device_addr = ioaddr->cmd_addr + (ATA_REG_DEVICE << shift); in pata_platform_setup_port()
69 ioaddr->status_addr = ioaddr->cmd_addr + (ATA_REG_STATUS << shift); in pata_platform_setup_port()
[all …]
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| /linux-4.4.14/drivers/clk/at91/ |
| D | clk-peripheral.c | 139 int shift = 0; in clk_sam9x5_peripheral_autodiv() local
150 for (; shift < PERIPHERAL_MAX_SHIFT; shift++) { in clk_sam9x5_peripheral_autodiv()
151 if (parent_rate >> shift <= periph->range.max) in clk_sam9x5_peripheral_autodiv()
157 periph->div = shift; in clk_sam9x5_peripheral_autodiv()
242 int shift = 0; in clk_sam9x5_peripheral_round_rate() local
253 for (; shift <= PERIPHERAL_MAX_SHIFT; shift++) { in clk_sam9x5_peripheral_round_rate()
254 cur_rate = *parent_rate >> shift; in clk_sam9x5_peripheral_round_rate()
265 for (; shift <= PERIPHERAL_MAX_SHIFT; shift++) { in clk_sam9x5_peripheral_round_rate()
266 cur_rate = *parent_rate >> shift; in clk_sam9x5_peripheral_round_rate()
288 int shift; in clk_sam9x5_peripheral_set_rate() local
[all …]
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| D | clk-programmable.c | 64 int shift; in clk_programmable_determine_rate() local
73 for (shift = 0; shift < PROG_PRES_MASK; shift++) { in clk_programmable_determine_rate()
74 tmp_rate = parent_rate >> shift; in clk_programmable_determine_rate()
146 int shift = 0; in clk_programmable_set_rate() local
153 shift = fls(div) - 1; in clk_programmable_set_rate()
155 if (div != (1<<shift)) in clk_programmable_set_rate()
158 if (shift >= PROG_PRES_MASK) in clk_programmable_set_rate()
162 tmp | (shift << layout->pres_shift)); in clk_programmable_set_rate()
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| /linux-4.4.14/arch/arm/mach-omap2/ |
| D | prminst44xx.c | 100 int omap4_prminst_is_hardreset_asserted(u8 shift, u8 part, s16 inst, in omap4_prminst_is_hardreset_asserted() argument
106 v &= 1 << shift; in omap4_prminst_is_hardreset_asserted()
107 v >>= shift; in omap4_prminst_is_hardreset_asserted()
124 int omap4_prminst_assert_hardreset(u8 shift, u8 part, s16 inst, in omap4_prminst_assert_hardreset() argument
127 u32 mask = 1 << shift; in omap4_prminst_assert_hardreset()
153 int omap4_prminst_deassert_hardreset(u8 shift, u8 st_shift, u8 part, s16 inst, in omap4_prminst_deassert_hardreset() argument
157 u32 mask = 1 << shift; in omap4_prminst_deassert_hardreset()
161 if (omap4_prminst_is_hardreset_asserted(shift, part, inst, in omap4_prminst_deassert_hardreset()
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| D | prm.h | 146 int (*assert_hardreset)(u8 shift, u8 part, s16 prm_mod, u16 offset);
147 int (*deassert_hardreset)(u8 shift, u8 st_shift, u8 part, s16 prm_mod,
149 int (*is_hardreset_asserted)(u8 shift, u8 part, s16 prm_mod,
160 int omap_prm_assert_hardreset(u8 shift, u8 part, s16 prm_mod, u16 offset);
161 int omap_prm_deassert_hardreset(u8 shift, u8 st_shift, u8 part, s16 prm_mod,
163 int omap_prm_is_hardreset_asserted(u8 shift, u8 part, s16 prm_mod, u16 offset);
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| D | prm33xx.c | 67 static int am33xx_prm_is_hardreset_asserted(u8 shift, u8 part, s16 inst, in am33xx_prm_is_hardreset_asserted() argument
73 v &= 1 << shift; in am33xx_prm_is_hardreset_asserted()
74 v >>= shift; in am33xx_prm_is_hardreset_asserted()
93 static int am33xx_prm_assert_hardreset(u8 shift, u8 part, s16 inst, in am33xx_prm_assert_hardreset() argument
96 u32 mask = 1 << shift; in am33xx_prm_assert_hardreset()
122 static int am33xx_prm_deassert_hardreset(u8 shift, u8 st_shift, u8 part, in am33xx_prm_deassert_hardreset() argument
130 if (am33xx_prm_is_hardreset_asserted(shift, 0, inst, rstctrl_offs) == 0) in am33xx_prm_deassert_hardreset()
137 mask = 1 << shift; in am33xx_prm_deassert_hardreset()
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| D | prminst44xx.h | 30 extern int omap4_prminst_is_hardreset_asserted(u8 shift, u8 part, s16 inst,
32 extern int omap4_prminst_assert_hardreset(u8 shift, u8 part, s16 inst,
34 int omap4_prminst_deassert_hardreset(u8 shift, u8 st_shift, u8 part,
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| /linux-4.4.14/arch/x86/entry/vsyscall/ |
| D | vsyscall_gtod.c | 38 vdata->shift = tk->tkr_mono.shift; in update_vsyscall()
47 << tk->tkr_mono.shift); in update_vsyscall()
49 (((u64)NSEC_PER_SEC) << tk->tkr_mono.shift)) { in update_vsyscall()
51 ((u64)NSEC_PER_SEC) << tk->tkr_mono.shift; in update_vsyscall()
57 tk->tkr_mono.shift); in update_vsyscall()
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| /linux-4.4.14/drivers/gpu/drm/radeon/ |
| D | sumo_smc.c | 169 u32 shift = 0; in sumo_set_tdp_limit() local
176 shift = 16; in sumo_set_tdp_limit()
180 shift = 0; in sumo_set_tdp_limit()
184 shift = 16; in sumo_set_tdp_limit()
188 shift = 0; in sumo_set_tdp_limit()
192 shift = 16; in sumo_set_tdp_limit()
196 shift = 0; in sumo_set_tdp_limit()
203 sclk_dpm_tdp_limit &= ~(mask << shift); in sumo_set_tdp_limit()
204 sclk_dpm_tdp_limit |= (tdp_limit << shift); in sumo_set_tdp_limit()
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| /linux-4.4.14/arch/arm64/net/ |
| D | bpf_jit.h | 105 #define A64_LSL(sf, Rd, Rn, shift) ({ \ argument
107 A64_UBFM(sf, Rd, Rn, (unsigned)-(shift) % sz, sz - 1 - (shift)); \
110 #define A64_LSR(sf, Rd, Rn, shift) A64_UBFM(sf, Rd, Rn, shift, (sf) ? 63 : 31) argument
112 #define A64_ASR(sf, Rd, Rn, shift) A64_SBFM(sf, Rd, Rn, shift, (sf) ? 63 : 31) argument
119 #define A64_MOVEW(sf, Rd, imm16, shift, type) \ argument
120 aarch64_insn_gen_movewide(Rd, imm16, shift, \
125 #define A64_MOVN(sf, Rd, imm16, shift) A64_MOVEW(sf, Rd, imm16, shift, INVERSE) argument
126 #define A64_MOVZ(sf, Rd, imm16, shift) A64_MOVEW(sf, Rd, imm16, shift, ZERO) argument
127 #define A64_MOVK(sf, Rd, imm16, shift) A64_MOVEW(sf, Rd, imm16, shift, KEEP) argument
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| /linux-4.4.14/drivers/clk/st/ |
| D | clkgen.h | 17 unsigned int shift; member
23 return (readl(base + field->offset) >> field->shift) & field->mask; in clkgen_read()
31 ~(field->mask << field->shift)) | (val << field->shift), in clkgen_write()
40 .shift = _shift, \
|
| D | clkgen-mux.c | 245 genamux->mux.shift = muxdata->mux_start_bit + (idx * mux_width); in clk_register_genamux()
246 if (genamux->mux.shift > 31) { in clk_register_genamux()
252 genamux->mux.shift -= 32; in clk_register_genamux()
460 u8 shift; member
472 .shift = 31,
478 .shift = 1,
518 reg + data->offset, data->shift, 1, in st_of_clkgena_prediv_setup()
537 u8 shift; member
546 .shift = 0,
552 .shift = 0,
[all …]
|
| /linux-4.4.14/drivers/clk/mmp/ |
| D | clk.h | 41 #define MMP_CLK_BITS_MASK(width, shift) \ argument
42 (((1 << (width)) - 1) << (shift))
43 #define MMP_CLK_BITS_GET_VAL(data, width, shift) \ argument
44 ((data & MMP_CLK_BITS_MASK(width, shift)) >> (shift))
45 #define MMP_CLK_BITS_SET_VAL(val, width, shift) \ argument
46 (((val) << (shift)) & MMP_CLK_BITS_MASK(width, shift))
202 u8 shift; member
217 u8 shift; member
|
| D | clk-mix.c | 138 u8 width, shift; in _set_rate() local
157 shift = ri->shift_div; in _set_rate()
158 mux_div &= ~MMP_CLK_BITS_MASK(width, shift); in _set_rate()
159 mux_div |= MMP_CLK_BITS_SET_VAL(div_val, width, shift); in _set_rate()
164 shift = ri->shift_mux; in _set_rate()
165 mux_div &= ~MMP_CLK_BITS_MASK(width, shift); in _set_rate()
166 mux_div |= MMP_CLK_BITS_SET_VAL(mux_val, width, shift); in _set_rate()
295 u8 width, shift; in mmp_clk_mix_get_parent() local
311 shift = mix->reg_info.shift_mux; in mmp_clk_mix_get_parent()
313 mux_val = MMP_CLK_BITS_GET_VAL(mux_div, width, shift); in mmp_clk_mix_get_parent()
[all …]
|
| /linux-4.4.14/drivers/video/console/ |
| D | fbcon_rotate.h | 43 int shift = (8 - (width % 8)) & 7; in rotate_ud() local
48 for (j = 0; j < width - shift; j++) { in rotate_ud()
50 pattern_set_bit(width - (1 + j + shift), in rotate_ud()
61 int shift = (8 - (height % 8)) & 7; in rotate_cw() local
69 pattern_set_bit(height - 1 - i - shift, j, in rotate_cw()
79 int shift = (8 - (width % 8)) & 7; in rotate_ccw() local
87 pattern_set_bit(i, width - 1 - j - shift, in rotate_ccw()
|
| /linux-4.4.14/drivers/pinctrl/samsung/ |
| D | pinctrl-s3c64xx.c | 278 u8 shift; in s3c64xx_irq_set_function() local
284 shift = pin; in s3c64xx_irq_set_function()
285 if (bank_type->fld_width[PINCFG_TYPE_FUNC] * shift >= 32) { in s3c64xx_irq_set_function()
288 shift -= 8; in s3c64xx_irq_set_function()
291 shift = shift * bank_type->fld_width[PINCFG_TYPE_FUNC]; in s3c64xx_irq_set_function()
297 val &= ~(mask << shift); in s3c64xx_irq_set_function()
298 val |= bank->eint_func << shift; in s3c64xx_irq_set_function()
350 u8 shift; in s3c64xx_gpio_irq_set_type() local
363 shift = EINT_OFFS(bank->eint_offset) + irqd->hwirq; in s3c64xx_gpio_irq_set_type()
364 shift = 4 * (shift / 4); /* 4 EINTs per trigger selector */ in s3c64xx_gpio_irq_set_type()
[all …]
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| /linux-4.4.14/arch/tile/kernel/ |
| D | time.c | 247 u64 quot = (u64)nsecs >> dev->shift; in ns2cycles()
248 u64 rem = (u64)nsecs & ((1ULL << dev->shift) - 1); in ns2cycles()
249 return quot * dev->mult + ((rem * dev->mult) >> dev->shift); in ns2cycles()
270 vdso_data->shift = tk->tkr_mono.shift; in update_vsyscall()
279 << tk->tkr_mono.shift); in update_vsyscall()
281 (((u64)NSEC_PER_SEC) << tk->tkr_mono.shift)) { in update_vsyscall()
283 ((u64)NSEC_PER_SEC) << tk->tkr_mono.shift; in update_vsyscall()
289 tk->tkr_mono.shift); in update_vsyscall()
|
| /linux-4.4.14/drivers/infiniband/hw/mlx5/ |
| D | mem.c | 45 void mlx5_ib_cont_pages(struct ib_umem *umem, u64 addr, int *count, int *shift, in mlx5_ib_cont_pages() argument
64 *shift = PAGE_SHIFT; in mlx5_ib_cont_pages()
119 *shift = page_shift + m; in mlx5_ib_cont_pages()
155 int shift = page_shift - umem_page_shift; in __mlx5_ib_populate_pas() local
156 int mask = (1 << shift) - 1; in __mlx5_ib_populate_pas()
167 WARN_ON(shift != 0); in __mlx5_ib_populate_pas()
188 pas[i >> shift] = cpu_to_be64(cur); in __mlx5_ib_populate_pas()
190 i >> shift, be64_to_cpu(pas[i >> shift])); in __mlx5_ib_populate_pas()
|
| /linux-4.4.14/arch/ia64/kernel/ |
| D | patch.c | 48 unsigned long shift; in ia64_patch() local
51 shift = 5 + 41 * (insn_addr % 16); /* 5 bits of template, then 3 x 41-bit instructions */ in ia64_patch()
52 if (shift >= 64) { in ia64_patch()
53 m1 = mask << (shift - 64); in ia64_patch()
54 v1 = val << (shift - 64); in ia64_patch()
56 m0 = mask << shift; m1 = mask >> (64 - shift); in ia64_patch()
57 v0 = val << shift; v1 = val >> (64 - shift); in ia64_patch()
|
| /linux-4.4.14/drivers/mmc/host/ |
| D | sdhci-pltfm.h | 66 int shift = (reg & 0x2) * 8; in sdhci_be32bs_writew() local
82 clrsetbits_be32(host->ioaddr + base, 0xffff << shift, val << shift); in sdhci_be32bs_writew()
88 int shift = (reg & 0x3) * 8; in sdhci_be32bs_writeb() local
90 clrsetbits_be32(host->ioaddr + base , 0xff << shift, val << shift); in sdhci_be32bs_writeb()
|
| /linux-4.4.14/arch/x86/math-emu/ |
| D | poly_2xm1.c | 54 long int exponent, shift; in poly_2xm1() local
73 shift = (argSignif.msw & 0x40000000) ? 3 : 2; in poly_2xm1()
79 shift = 1; in poly_2xm1()
85 shift = 0; in poly_2xm1()
101 if (shift) { in poly_2xm1()
107 mul_Xsig_Xsig(&accumulator, shiftterm[shift]); in poly_2xm1()
|
| /linux-4.4.14/drivers/gpu/drm/nouveau/nvkm/engine/disp/ |
| D | sorgf119.c | 73 const u32 shift = g94_sor_dp_lane_map(device, ln); in gf119_sor_dp_drv_ctl() local
91 data[0] = nvkm_rd32(device, 0x61c118 + loff) & ~(0x000000ff << shift); in gf119_sor_dp_drv_ctl()
92 data[1] = nvkm_rd32(device, 0x61c120 + loff) & ~(0x000000ff << shift); in gf119_sor_dp_drv_ctl()
96 nvkm_wr32(device, 0x61c118 + loff, data[0] | (ocfg.dc << shift)); in gf119_sor_dp_drv_ctl()
97 nvkm_wr32(device, 0x61c120 + loff, data[1] | (ocfg.pe << shift)); in gf119_sor_dp_drv_ctl()
99 data[3] = nvkm_rd32(device, 0x61c13c + loff) & ~(0x000000ff << shift); in gf119_sor_dp_drv_ctl()
100 nvkm_wr32(device, 0x61c13c + loff, data[3] | (ocfg.pc << shift)); in gf119_sor_dp_drv_ctl()
|
| D | sorgm204.c | 98 const u32 shift = gm204_sor_dp_lane_map(device, ln); in gm204_sor_dp_drv_ctl() local
117 data[0] = nvkm_rd32(device, 0x61c118 + loff) & ~(0x000000ff << shift); in gm204_sor_dp_drv_ctl()
118 data[1] = nvkm_rd32(device, 0x61c120 + loff) & ~(0x000000ff << shift); in gm204_sor_dp_drv_ctl()
122 nvkm_wr32(device, 0x61c118 + loff, data[0] | (ocfg.dc << shift)); in gm204_sor_dp_drv_ctl()
123 nvkm_wr32(device, 0x61c120 + loff, data[1] | (ocfg.pe << shift)); in gm204_sor_dp_drv_ctl()
125 data[3] = nvkm_rd32(device, 0x61c13c + loff) & ~(0x000000ff << shift); in gm204_sor_dp_drv_ctl()
126 nvkm_wr32(device, 0x61c13c + loff, data[3] | (ocfg.pc << shift)); in gm204_sor_dp_drv_ctl()
|
| /linux-4.4.14/drivers/clk/shmobile/ |
| D | clk-r8a73a4.c | 41 unsigned int shift; member
68 unsigned int shift, reg; in r8a73a4_cpg_register_clock() local
156 u32 shift = 8; in r8a73a4_cpg_register_clock() local
161 shift = 0; in r8a73a4_cpg_register_clock()
164 mult = 0x20 - ((clk_readl(cpg->reg + CPG_FRQCRC) >> shift) in r8a73a4_cpg_register_clock()
179 shift = c->shift; in r8a73a4_cpg_register_clock()
187 cpg->reg + reg, shift, 4, 0, in r8a73a4_cpg_register_clock()
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| D | clk-sh73a0.c | 46 unsigned int shift; member
81 unsigned int shift, reg, width; in sh73a0_cpg_register_clock() local
135 shift = 24; in sh73a0_cpg_register_clock()
145 shift = c->shift; in sh73a0_cpg_register_clock()
159 cpg->reg + reg, shift, width, 0, in sh73a0_cpg_register_clock()
|
| /linux-4.4.14/Documentation/devicetree/bindings/regulator/ |
| D | anatop-regulator.txt | 6 - anatop-vol-bit-shift: Bit shift for the register
14 - anatop-delay-bit-shift: Bit shift for the step time register
30 anatop-vol-bit-shift = <9>;
33 anatop-delay-bit-shift = <24>;
|
| /linux-4.4.14/scripts/dtc/ |
| D | fdtdump.c | 59 int depth, sz, shift; in dump_blob() local
64 shift = 4; in dump_blob()
109 printf("%*s%s {\n", depth * shift, "", s); in dump_blob()
118 printf("%*s};\n", depth * shift, ""); in dump_blob()
123 printf("%*s// [NOP]\n", depth * shift, ""); in dump_blob()
128 fprintf(stderr, "%*s ** Unknown tag 0x%08x\n", depth * shift, "", tag); in dump_blob()
139 printf("%*s%s", depth * shift, "", s); in dump_blob()
|
| /linux-4.4.14/arch/sh/boards/mach-x3proto/ |
| D | ilsel.c | 66 unsigned int tmp, shift; in __ilsel_enable() local
72 shift = mk_ilsel_shift(bit); in __ilsel_enable()
75 __func__, bit, addr, shift, set); in __ilsel_enable()
78 tmp &= ~(0xf << shift); in __ilsel_enable()
79 tmp |= set << shift; in __ilsel_enable()
|
| /linux-4.4.14/drivers/pinctrl/uniphier/ |
| D | pinctrl-uniphier-core.c | 128 unsigned int pupdctrl, reg, shift, val; in uniphier_conf_pin_bias_get() local
160 shift = pupdctrl % 32; in uniphier_conf_pin_bias_get()
166 val = (val >> shift) & 1; in uniphier_conf_pin_bias_get()
181 unsigned int drvctrl, reg, shift, mask, width, val; in uniphier_conf_pin_drive_get() local
214 shift = drvctrl % 32; in uniphier_conf_pin_drive_get()
221 *strength = supported_strength[(val >> shift) & mask]; in uniphier_conf_pin_drive_get()
288 unsigned int pupdctrl, reg, shift; in uniphier_conf_pin_bias_set() local
350 shift = pupdctrl % 32; in uniphier_conf_pin_bias_set()
352 return regmap_update_bits(priv->regmap, reg, 1 << shift, val << shift); in uniphier_conf_pin_bias_set()
365 unsigned int drvctrl, reg, shift, mask, width, val; in uniphier_conf_pin_drive_set() local
[all …]
|
| /linux-4.4.14/drivers/hwtracing/intel_th/ |
| D | gth.c | 73 int shift = (port & 3) * 8; in gth_output_set() local
76 val &= ~(0xff << shift); in gth_output_set()
77 val |= config << shift; in gth_output_set()
85 int shift = (port & 3) * 8; in gth_output_get() local
88 val &= 0xff << shift; in gth_output_get()
89 val >>= shift; in gth_output_get()
98 int shift = (port & 1) * 16; in gth_smcfreq_set() local
102 val &= ~(0xffff << shift); in gth_smcfreq_set()
103 val |= freq << shift; in gth_smcfreq_set()
110 int shift = (port & 1) * 16; in gth_smcfreq_get() local
[all …]
|
| /linux-4.4.14/drivers/staging/most/hdm-dim2/ |
| D | dim2_hal.c | 220 u8 const shift = (ch_addr % 2) * 16; in dim2_configure_cat() local
224 mask[idx] = (u32)0xFFFF << shift; in dim2_configure_cat()
225 value[idx] = cat << shift; in dim2_configure_cat()
233 u8 const shift = (ch_addr % 2) * 16; in dim2_clear_cat() local
237 mask[idx] = (u32)0xFFFF << shift; in dim2_clear_cat()
284 u8 const shift = idx * 16; in dim2_start_ctrl_async() local
290 bit_mask(ADT1_PS_BIT + shift) | in dim2_start_ctrl_async()
291 bit_mask(ADT1_RDY_BIT + shift) | in dim2_start_ctrl_async()
292 (ADT1_CTRL_ASYNC_BD_MASK << (ADT1_BD_SHIFT + shift)); in dim2_start_ctrl_async()
294 (true << (ADT1_PS_BIT + shift)) | in dim2_start_ctrl_async()
[all …]
|
| /linux-4.4.14/drivers/clk/hisilicon/ |
| D | clkdivider-hi6220.c | 37 u8 shift; member
53 val = readl_relaxed(dclk->reg) >> dclk->shift; in hi6220_clkdiv_recalc_rate()
84 data &= ~(div_mask(dclk->width) << dclk->shift); in hi6220_clkdiv_set_rate()
85 data |= value << dclk->shift; in hi6220_clkdiv_set_rate()
104 u8 shift, u8 width, u32 mask_bit, spinlock_t *lock) in hi6220_register_clkdiv() argument
141 div->shift = shift; in hi6220_register_clkdiv()
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| D | clk.h | 62 u8 shift; member
75 u8 shift; member
88 u8 shift; member
111 u8 shift, u8 width, u32 mask_bit, spinlock_t *lock);
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| /linux-4.4.14/drivers/net/ethernet/hisilicon/hns/ |
| D | hns_dsaf_reg.h | 921 #define dsaf_set_field(origin, mask, shift, val) \ argument
924 (origin) |= (((val) << (shift)) & (mask)); \
927 #define dsaf_set_bit(origin, shift, val) \ argument
928 dsaf_set_field((origin), (1ull << (shift)), (shift), (val))
931 u32 shift, u32 val) in dsaf_set_reg_field() argument
935 dsaf_set_field(origin, mask, shift, val); in dsaf_set_reg_field()
939 #define dsaf_set_dev_field(dev, reg, mask, shift, val) \ argument
940 dsaf_set_reg_field((dev)->io_base, (reg), (mask), (shift), (val))
945 #define dsaf_get_field(origin, mask, shift) (((origin) & (mask)) >> (shift)) argument
947 #define dsaf_get_bit(origin, shift) \ argument
[all …]
|
| /linux-4.4.14/drivers/clk/tegra/ |
| D | clk-super.c | 46 u8 source, shift; in clk_super_get_parent() local
54 shift = (state == super_state(SUPER_STATE_IDLE)) ? in clk_super_get_parent()
58 source = (val >> shift) & super_state_to_src_mask(mux); in clk_super_get_parent()
76 u8 parent_index, shift; in clk_super_set_parent() local
86 shift = (state == super_state(SUPER_STATE_IDLE)) ? in clk_super_set_parent()
111 val &= ~((super_state_to_src_mask(mux)) << shift); in clk_super_set_parent()
112 val |= (index & (super_state_to_src_mask(mux))) << shift; in clk_super_set_parent()
|
| D | clk-divider.c | 25 #define pll_out_override(p) (BIT((p->shift - 6)))
74 reg = readl_relaxed(divider->reg) >> divider->shift; in clk_frac_div_recalc_rate()
122 val &= ~(div_mask(divider) << divider->shift); in clk_frac_div_set_rate()
123 val |= div << divider->shift; in clk_frac_div_set_rate()
151 unsigned long flags, u8 clk_divider_flags, u8 shift, u8 width, in tegra_clk_register_divider() argument
172 divider->shift = shift; in tegra_clk_register_divider()
|
| /linux-4.4.14/drivers/misc/echo/ |
| D | echo.c | 119 static inline void lms_adapt_bg(struct oslec_state *ec, int clean, int shift) in lms_adapt_bg() argument
129 if (shift > 0) in lms_adapt_bg()
130 factor = clean << shift; in lms_adapt_bg()
132 factor = clean >> -shift; in lms_adapt_bg()
190 static inline void lms_adapt_bg(struct oslec_state *ec, int clean, int shift) in lms_adapt_bg() argument
199 if (shift > 0) in lms_adapt_bg()
200 factor = clean << shift; in lms_adapt_bg()
202 factor = clean >> -shift; in lms_adapt_bg()
456 ec->shift = 0; in oslec_update()
458 int p, logp, shift; in oslec_update() local
[all …]
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| /linux-4.4.14/kernel/time/ |
| D | timekeeping.c | 69 while (tk->tkr_mono.xtime_nsec >= ((u64)NSEC_PER_SEC << tk->tkr_mono.shift)) { in tk_normalize_xtime()
70 tk->tkr_mono.xtime_nsec -= (u64)NSEC_PER_SEC << tk->tkr_mono.shift; in tk_normalize_xtime()
80 ts.tv_nsec = (long)(tk->tkr_mono.xtime_nsec >> tk->tkr_mono.shift); in tk_xtime()
87 tk->tkr_mono.xtime_nsec = (u64)ts->tv_nsec << tk->tkr_mono.shift; in tk_set_xtime()
93 tk->tkr_mono.xtime_nsec += (u64)ts->tv_nsec << tk->tkr_mono.shift; in tk_xtime_add()
249 tmp <<= clock->shift; in tk_setup_internals()
263 ((u64) interval * clock->mult) >> clock->shift; in tk_setup_internals()
267 int shift_change = clock->shift - old_clock->shift; in tk_setup_internals()
275 tk->tkr_mono.shift = clock->shift; in tk_setup_internals()
276 tk->tkr_raw.shift = clock->shift; in tk_setup_internals()
[all …]
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| D | sched_clock.c | 44 u32 shift; member
91 static inline u64 notrace cyc_to_ns(u64 cyc, u32 mult, u32 shift) in cyc_to_ns() argument
93 return (cyc * mult) >> shift; in cyc_to_ns()
108 res = rd->epoch_ns + cyc_to_ns(cyc, rd->mult, rd->shift); in sched_clock()
151 ns = rd.epoch_ns + cyc_to_ns((cyc - rd.epoch_cyc) & rd.sched_clock_mask, rd.mult, rd.shift); in update_sched_clock()
196 ns = rd.epoch_ns + cyc_to_ns((cyc - rd.epoch_cyc) & rd.sched_clock_mask, rd.mult, rd.shift); in sched_clock_register()
202 rd.shift = new_shift; in sched_clock_register()
|
| /linux-4.4.14/drivers/net/ethernet/hisilicon/ |
| D | hns_mdio.c | 116 #define mdio_set_field(origin, mask, shift, val) \ argument
118 (origin) &= (~((mask) << (shift))); \
119 (origin) |= (((val) & (mask)) << (shift)); \
122 #define mdio_get_field(origin, mask, shift) (((origin) >> (shift)) & (mask)) argument
124 static void mdio_set_reg_field(void *base, u32 reg, u32 mask, u32 shift, in mdio_set_reg_field() argument
129 mdio_set_field(origin, mask, shift, val); in mdio_set_reg_field()
133 #define MDIO_SET_REG_FIELD(dev, reg, mask, shift, val) \ argument
134 mdio_set_reg_field((dev)->vbase, (reg), (mask), (shift), (val))
136 static u32 mdio_get_reg_field(void *base, u32 reg, u32 mask, u32 shift) in mdio_get_reg_field() argument
141 return mdio_get_field(origin, mask, shift); in mdio_get_reg_field()
[all …]
|
| /linux-4.4.14/Documentation/devicetree/bindings/mmc/ |
| D | exynos-dw-mshc.txt | 30 * samsung,dw-mshc-sdr-timing: Specifies the value of CIU clock phase shift value
31 in transmit mode and CIU clock phase shift value in receive mode for single
35 * samsung,dw-mshc-ddr-timing: Specifies the value of CUI clock phase shift value
36 in transmit mode and CIU clock phase shift value in receive mode for double
40 shift value for hs400 mode operation.
45 - First Cell: CIU clock phase shift value for tx mode.
46 - Second Cell: CIU clock phase shift value for rx mode.
49 - valid value for tx phase shift and rx phase shift is 0 to 7.
50 - when CIU clock divider value is set to 3, all possible 8 phase shift
53 phase shift clocks should be 0.
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| /linux-4.4.14/drivers/pcmcia/ |
| D | sa11xx_base.h | 69 #define MECR_SET(mecr, sock, shift, mask, bs) \ argument
70 ((mecr)=((mecr)&~(((mask)<<(shift))<<\
72 (((bs)<<(shift))<<((sock)==0?MECR_SOCKET_0_SHIFT:MECR_SOCKET_1_SHIFT)))
74 #define MECR_GET(mecr, sock, shift, mask) \ argument
76 (shift))&(mask))
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| /linux-4.4.14/drivers/misc/cxl/ |
| D | vphb.c | 114 u32 *mask, int *shift) in cxl_pcie_config_info() argument
132 *shift = ((addr & 0x3) * 8); in cxl_pcie_config_info()
171 int shift, rc; in cxl_pcie_read_config() local
175 &mask, &shift); in cxl_pcie_read_config()
183 *val = (in_le32(ioaddr) >> shift) & mask; in cxl_pcie_read_config()
192 int shift, rc; in cxl_pcie_write_config() local
195 &mask, &shift); in cxl_pcie_write_config()
203 mask <<= shift; in cxl_pcie_write_config()
204 val <<= shift; in cxl_pcie_write_config()
|
| /linux-4.4.14/Documentation/devicetree/bindings/clock/ti/ |
| D | gate.txt | 39 - ti,bit-shift : bit shift for programming the clock gate, invalid for
50 ti,bit-shift = <25>;
58 ti,bit-shift = <23>;
66 ti,bit-shift = <0>;
74 ti,bit-shift = <1>;
87 ti,bit-shift = <0x1b>;
96 ti,bit-shift = <3>;
104 ti,bit-shift = <15>;
|
| D | mux.txt | 32 the number of bits to shift the control field in the register can be
33 supplied. If the shift value is missing it is the same as supplying
34 a zero shift.
45 - ti,bit-shift : number of bits to shift the bit-mask, defaults to
66 ti,bit-shift = <24>;
74 ti,bit-shift = <4>;
|
| D | apll.txt | 26 - ti,idlest-shift : bit-shift for the idlest field (OMAP2 only)
27 - ti,bit-shift : bit-shift for enable and autoidle fields (OMAP2 only)
41 ti,bit-shift = <2>;
42 ti,idlest-shift = <8>;
|
| D | divider.txt | 46 the number of bits to shift that mask, if necessary. If the shift value
47 is missing it is the same as supplying a zero shift.
64 - ti,bit-shift : number of bits to shift the divider value, defaults to 0
73 - ti,autoidle-shift : bit shift of the autoidle enable bit for the clock,
93 ti,bit-shift = <24>;
111 ti,bit-shift = <8>;
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| D | autoidle.txt | 15 - ti,autoidle-shift : bit shift of the autoidle enable bit
24 ti,autoidle-shift = <8>;
35 ti,autoidle-shift = <8>;
|
| D | interface.txt | 31 - ti,bit-shift : bit shift for the bit enabling/disabling the clock (default 0)
39 ti,bit-shift = <3>;
47 ti,bit-shift = <0>;
55 ti,bit-shift = <0>;
|
| /linux-4.4.14/arch/mips/alchemy/common/ |
| D | clock.c | 361 int shift; /* offset in register */ member
490 v |= (1 << 1) << c->shift; in alchemy_clk_fgv1_en()
500 unsigned long v = alchemy_rdsys(c->reg) >> (c->shift + 1); in alchemy_clk_fgv1_isen()
512 v &= ~((1 << 1) << c->shift); in alchemy_clk_fgv1_dis()
525 v |= (1 << c->shift); in alchemy_clk_fgv1_setp()
527 v &= ~(1 << c->shift); in alchemy_clk_fgv1_setp()
538 return (alchemy_rdsys(c->reg) >> c->shift) & 1; in alchemy_clk_fgv1_getp()
546 int sh = c->shift + 2; in alchemy_clk_fgv1_setr()
565 unsigned long v = alchemy_rdsys(c->reg) >> (c->shift + 2); in alchemy_clk_fgv1_recalc()
593 v &= ~(3 << c->shift); in __alchemy_clk_fgv2_en()
[all …]
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| /linux-4.4.14/drivers/net/wireless/brcm80211/include/ |
| D | brcmu_utils.h | 183 static inline void brcmu_maskset32(u32 *var, u32 mask, u8 shift, u32 value) in brcmu_maskset32() argument
185 value = (value << shift) & mask; in brcmu_maskset32()
188 static inline u32 brcmu_maskget32(u32 var, u32 mask, u8 shift) in brcmu_maskget32() argument
190 return (var & mask) >> shift; in brcmu_maskget32()
192 static inline void brcmu_maskset16(u16 *var, u16 mask, u8 shift, u16 value) in brcmu_maskset16() argument
194 value = (value << shift) & mask; in brcmu_maskset16()
197 static inline u16 brcmu_maskget16(u16 var, u16 mask, u8 shift) in brcmu_maskget16() argument
199 return (var & mask) >> shift; in brcmu_maskget16()
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| /linux-4.4.14/drivers/pinctrl/ |
| D | pinctrl-tz1090-pdc.c | 651 u32 *reg, u32 *width, u32 *mask, u32 *shift, in tz1090_pdc_pinconf_reg() argument
675 *shift = REG_GPIO_CONTROL2_PU_PD_S + pin*2; in tz1090_pdc_pinconf_reg()
679 *mask = (BIT(*width) - 1) << *shift; in tz1090_pdc_pinconf_reg()
690 u32 reg, width, mask, shift, val, tmp, arg; in tz1090_pdc_pinconf_get() local
694 ®, &width, &mask, &shift, &val); in tz1090_pdc_pinconf_get()
700 arg = ((tmp & mask) >> shift) == val; in tz1090_pdc_pinconf_get()
720 u32 reg, width, mask, shift, val, tmp; in tz1090_pdc_pinconf_set() local
733 ®, &width, &mask, &shift, &val); in tz1090_pdc_pinconf_set()
749 tmp |= val << shift; in tz1090_pdc_pinconf_set()
773 u32 *mask, u32 *shift, const int **map) in tz1090_pdc_pinconf_group_reg() argument
[all …]
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| D | pinctrl-tz1090.c | 1288 unsigned int index, shift; in tz1090_pinctrl_gpio_select() local
1296 shift = pin & 0x1f; in tz1090_pinctrl_gpio_select()
1302 gpio_en &= ~BIT(shift); in tz1090_pinctrl_gpio_select()
1304 gpio_en |= BIT(shift); in tz1090_pinctrl_gpio_select()
1327 unsigned int index, shift; in tz1090_pinctrl_perip_select() local
1335 shift = pin & 0x1f; in tz1090_pinctrl_perip_select()
1341 pin_en &= ~BIT(shift); in tz1090_pinctrl_perip_select()
1343 pin_en |= BIT(shift); in tz1090_pinctrl_perip_select()
1531 unsigned char shift; member
1642 u32 *reg, u32 *width, u32 *mask, u32 *shift, in tz1090_pinconf_reg() argument
[all …]
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| /linux-4.4.14/include/linux/fsl/ |
| D | guts.h | 134 unsigned int shift = 16 + (8 * (1 - co) + 2 * (3 - ch)); in guts_set_dmacr() local
136 clrsetbits_be32(&guts->dmacr, 3 << shift, device << shift); in guts_set_dmacr()
171 unsigned int shift = 2 * (co + 1) - (ch & 1) - 1; in guts_set_pmuxcr_dma() local
173 clrsetbits_be32(&guts->pmuxcr, 1 << shift, value << shift); in guts_set_pmuxcr_dma()
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| /linux-4.4.14/drivers/clk/qcom/ |
| D | clk-regmap-mux.c | 35 val >>= mux->shift; in mux_get_parent()
45 unsigned int mask = GENMASK(mux->width + mux->shift - 1, mux->shift); in mux_set_parent()
49 val <<= mux->shift; in mux_set_parent()
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| /linux-4.4.14/drivers/iio/dac/ |
| D | ad5064.c | 129 unsigned int addr, unsigned int val, unsigned int shift) in ad5064_write() argument
131 val <<= shift; in ad5064_write()
268 chan->address, val, chan->scan_type.shift); in ad5064_write_raw()
310 .shift = (_shift), \
315 #define DECLARE_AD5064_CHANNELS(name, bits, shift) \ argument
317 AD5064_CHANNEL(0, 0, bits, shift), \
318 AD5064_CHANNEL(1, 1, bits, shift), \
319 AD5064_CHANNEL(2, 2, bits, shift), \
320 AD5064_CHANNEL(3, 3, bits, shift), \
321 AD5064_CHANNEL(4, 4, bits, shift), \
[all …]
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| /linux-4.4.14/drivers/misc/ |
| D | cs5535-mfgpt.c | 51 int shift = (cmp == MFGPT_CMP1) ? 0 : 8; in cs5535_mfgpt_toggle_event() local
75 mask = 1 << (timer->nr + shift); in cs5535_mfgpt_toggle_event()
80 mask = 1 << (timer->nr + shift); in cs5535_mfgpt_toggle_event()
103 int shift; in cs5535_mfgpt_set_irq() local
119 shift = ((cmp == MFGPT_CMP1 ? 0 : 4) + timer->nr % 4) * 4; in cs5535_mfgpt_set_irq()
120 if (((zsel >> shift) & 0xF) == 2) in cs5535_mfgpt_set_irq()
125 *irq = (zsel >> shift) & 0xF; in cs5535_mfgpt_set_irq()
140 zsel = (zsel & ~(0xF << shift)) | (*irq << shift); in cs5535_mfgpt_set_irq()
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| /linux-4.4.14/drivers/media/pci/netup_unidvb/ |
| D | netup_unidvb_ci.c | 66 u16 shift = (state->nr == 1) ? CAM1_SHIFT : 0; in netup_unidvb_ci_slot_ts_ctl() local
73 writew(BIT_CAM_BYPASS << shift, dev->bmmio0 + CAM_CTRLSTAT_CLR); in netup_unidvb_ci_slot_ts_ctl()
95 u16 shift = (state->nr == 1) ? CAM1_SHIFT : 0; in netup_unidvb_ci_slot_reset() local
104 writew(BIT_CAM_RESET << shift, dev->bmmio0 + CAM_CTRLSTAT_READ_SET); in netup_unidvb_ci_slot_reset()
109 if (ci_stat & (BIT_CAM_READY << shift)) in netup_unidvb_ci_slot_reset()
113 if (!(ci_stat & (BIT_CAM_READY << shift)) && reset_counter > 0) { in netup_unidvb_ci_slot_reset()
128 u16 shift = (state->nr == 1) ? CAM1_SHIFT : 0; in netup_unidvb_poll_ci_slot_status() local
134 if (ci_stat & (BIT_CAM_READY << shift)) { in netup_unidvb_poll_ci_slot_status()
137 } else if (ci_stat & (BIT_CAM_PRESENT << shift)) { in netup_unidvb_poll_ci_slot_status()
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| /linux-4.4.14/arch/arm/plat-orion/ |
| D | mpp.c | 45 int shift, gpio_mode; in orion_mpp_conf() local
59 shift = (num & 7) << 2; in orion_mpp_conf()
60 mpp_ctrl[num / 8] &= ~(0xf << shift); in orion_mpp_conf()
61 mpp_ctrl[num / 8] |= sel << shift; in orion_mpp_conf()
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| /linux-4.4.14/arch/m68k/math-emu/ |
| D | multi_arith.h | 66 int shift; in fp_overnormalize() local
69 asm ("bfffo %1{#0,#32},%0" : "=d" (shift) : "dm" (reg->mant.m32[0])); in fp_overnormalize()
70 reg->mant.m32[0] = (reg->mant.m32[0] << shift) | (reg->mant.m32[1] >> (32 - shift)); in fp_overnormalize()
71 reg->mant.m32[1] = (reg->mant.m32[1] << shift); in fp_overnormalize()
73 asm ("bfffo %1{#0,#32},%0" : "=d" (shift) : "dm" (reg->mant.m32[1])); in fp_overnormalize()
74 reg->mant.m32[0] = (reg->mant.m32[1] << shift); in fp_overnormalize()
76 shift += 32; in fp_overnormalize()
79 return shift; in fp_overnormalize()
245 int shift) in fp_putmant128() argument
249 switch (shift) { in fp_putmant128()
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| /linux-4.4.14/drivers/staging/comedi/kcomedilib/ |
| D | kcomedilib_main.c | 181 unsigned int shift; in comedi_dio_bitfield2() local
203 shift = base_channel; in comedi_dio_bitfield2()
204 if (shift) { in comedi_dio_bitfield2()
206 data[0] <<= shift; in comedi_dio_bitfield2()
207 data[1] <<= shift; in comedi_dio_bitfield2()
210 shift = 0; in comedi_dio_bitfield2()
214 *bits = data[1] >> shift; in comedi_dio_bitfield2()
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| /linux-4.4.14/drivers/pinctrl/bcm/ |
| D | pinctrl-cygnus-gpio.c | 125 unsigned int shift = CYGNUS_GPIO_SHIFT(gpio); in cygnus_set_bit() local
130 val |= BIT(shift); in cygnus_set_bit()
132 val &= ~BIT(shift); in cygnus_set_bit()
140 unsigned int shift = CYGNUS_GPIO_SHIFT(gpio); in cygnus_get_bit() local
142 return !!(readl(chip->base + offset) & BIT(shift)); in cygnus_get_bit()
185 unsigned int shift = CYGNUS_GPIO_SHIFT(gpio); in cygnus_gpio_irq_ack() local
186 u32 val = BIT(shift); in cygnus_gpio_irq_ack()
361 unsigned int shift = CYGNUS_GPIO_SHIFT(gpio); in cygnus_gpio_get() local
363 return !!(readl(chip->base + offset) & BIT(shift)); in cygnus_gpio_get()
425 unsigned int i, offset, shift; in cygnus_gpio_set_strength() local
[all …]
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| /linux-4.4.14/arch/arm/vfp/ |
| D | vfp.h | 12 static inline u32 vfp_shiftright32jamming(u32 val, unsigned int shift) in vfp_shiftright32jamming() argument
14 if (shift) { in vfp_shiftright32jamming()
15 if (shift < 32) in vfp_shiftright32jamming()
16 val = val >> shift | ((val << (32 - shift)) != 0); in vfp_shiftright32jamming()
23 static inline u64 vfp_shiftright64jamming(u64 val, unsigned int shift) in vfp_shiftright64jamming() argument
25 if (shift) { in vfp_shiftright64jamming()
26 if (shift < 64) in vfp_shiftright64jamming()
27 val = val >> shift | ((val << (64 - shift)) != 0); in vfp_shiftright64jamming()
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| /linux-4.4.14/drivers/hwmon/ |
| D | asc7621.c | 123 u8 shift[3]; member
213 shift[0]) & param->mask[0]); in show_bitmask()
229 reqval = (reqval & param->mask[0]) << param->shift[0]; in store_bitmask()
233 reqval |= (currval & ~(param->mask[0] << param->shift[0])); in store_bitmask()
470 ((data->reg[param->msb[0]] >> param->shift[0]) & param->mask[0]); in show_ap2_temp()
501 newval = (newval & param->mask[0]) << param->shift[0]; in store_ap2_temp()
503 newval |= (currval & ~(param->mask[0] << param->shift[0])); in store_ap2_temp()
521 config = (data->reg[param->msb[0]] >> param->shift[0]) & param->mask[0]; in show_pwm_ac()
522 altbit = (data->reg[param->msb[1]] >> param->shift[1]) & param->mask[1]; in show_pwm_ac()
556 config = (config & param->mask[0]) << param->shift[0]; in store_pwm_ac()
[all …]
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| /linux-4.4.14/sound/soc/sh/rcar/ |
| D | adg.c | 100 int shift = (id % 2) ? 16 : 0; in rsnd_adg_set_cmd_timsel_gen2() local
105 val = val << shift; in rsnd_adg_set_cmd_timsel_gen2()
106 mask = 0xffff << shift; in rsnd_adg_set_cmd_timsel_gen2()
122 int shift = (id % 2) ? 16 : 0; in rsnd_adg_set_src_timsel_gen2() local
133 in = in << shift; in rsnd_adg_set_src_timsel_gen2()
134 out = out << shift; in rsnd_adg_set_src_timsel_gen2()
135 mask = 0xffff << shift; in rsnd_adg_set_src_timsel_gen2()
253 int idx, sel, div, shift; in rsnd_adg_set_convert_clk_gen1() local
280 shift = (id % 4) * 8; in rsnd_adg_set_convert_clk_gen1()
281 mask = 0xFF << shift; in rsnd_adg_set_convert_clk_gen1()
[all …]
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| /linux-4.4.14/drivers/infiniband/hw/cxgb4/ |
| D | mem.c | 373 struct c4iw_mr *mhp, int shift) in register_mem() argument
383 mhp->attr.len : -1, shift - 12, in register_mem()
396 struct c4iw_mr *mhp, int shift, int npages) in reregister_mem() argument
408 mhp->attr.va_fbo, mhp->attr.len, shift - 12, in reregister_mem()
437 int *shift, __be64 **page_list) in build_phys_page_list() argument
466 for (*shift = PAGE_SHIFT; *shift < 27; ++(*shift)) in build_phys_page_list()
467 if ((1ULL << *shift) & mask) in build_phys_page_list()
470 buffer_list[0].size += buffer_list[0].addr & ((1ULL << *shift) - 1); in build_phys_page_list()
471 buffer_list[0].addr &= ~0ull << *shift; in build_phys_page_list()
476 (1ULL << *shift) - 1) >> *shift; in build_phys_page_list()
[all …]
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| /linux-4.4.14/drivers/pinctrl/mvebu/ |
| D | pinctrl-orion.c | 37 unsigned shift = (pid % MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS; in orion_mpp_ctrl_get() local
41 *config = (readl(mpp_base + off) >> shift) & MVEBU_MPP_MASK; in orion_mpp_ctrl_get()
44 *config = (readl(high_mpp_base) >> shift) & MVEBU_MPP_MASK; in orion_mpp_ctrl_get()
52 unsigned shift = (pid % MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS; in orion_mpp_ctrl_set() local
56 u32 reg = readl(mpp_base + off) & ~(MVEBU_MPP_MASK << shift); in orion_mpp_ctrl_set()
57 writel(reg | (config << shift), mpp_base + off); in orion_mpp_ctrl_set()
60 u32 reg = readl(high_mpp_base) & ~(MVEBU_MPP_MASK << shift); in orion_mpp_ctrl_set()
61 writel(reg | (config << shift), high_mpp_base); in orion_mpp_ctrl_set()
|
| D | pinctrl-mvebu.h | 184 unsigned shift = (pid % MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS; in default_mpp_ctrl_get() local
186 *config = (readl(base + off) >> shift) & MVEBU_MPP_MASK; in default_mpp_ctrl_get()
195 unsigned shift = (pid % MVEBU_MPPS_PER_REG) * MVEBU_MPP_BITS; in default_mpp_ctrl_set() local
198 reg = readl(base + off) & ~(MVEBU_MPP_MASK << shift); in default_mpp_ctrl_set()
199 writel(reg | (config << shift), base + off); in default_mpp_ctrl_set()
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| /linux-4.4.14/arch/arm64/include/asm/ |
| D | cpufeature.h | 57 u8 shift; member
145 return (u64)GENMASK(ftrp->shift + ftrp->width - 1, ftrp->shift); in arm64_ftr_mask()
151 cpuid_feature_extract_field_width(val, ftrp->shift, ftrp->width) : in arm64_ftr_value()
152 cpuid_feature_extract_unsigned_field_width(val, ftrp->shift, ftrp->width); in arm64_ftr_value()
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| /linux-4.4.14/net/sunrpc/auth_gss/ |
| D | gss_krb5_wrap.c | 401 static void rotate_buf_a_little(struct xdr_buf *buf, unsigned int shift) in rotate_buf_a_little() argument
407 BUG_ON(shift > LOCAL_BUF_LEN); in rotate_buf_a_little()
409 read_bytes_from_xdr_buf(buf, 0, head, shift); in rotate_buf_a_little()
410 for (i = 0; i + shift < buf->len; i += LOCAL_BUF_LEN) { in rotate_buf_a_little()
411 this_len = min(LOCAL_BUF_LEN, buf->len - (i + shift)); in rotate_buf_a_little()
412 read_bytes_from_xdr_buf(buf, i+shift, tmp, this_len); in rotate_buf_a_little()
415 write_bytes_to_xdr_buf(buf, buf->len - shift, head, shift); in rotate_buf_a_little()
418 static void _rotate_left(struct xdr_buf *buf, unsigned int shift) in _rotate_left() argument
423 shift %= buf->len; in _rotate_left()
424 while (shifted < shift) { in _rotate_left()
[all …]
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| /linux-4.4.14/fs/xfs/ |
| D | xfs_iomap.c | 436 int shift = 0; in xfs_quota_calc_throttle() local
448 shift = 2; in xfs_quota_calc_throttle()
450 shift += 2; in xfs_quota_calc_throttle()
452 shift += 2; in xfs_quota_calc_throttle()
459 if ((freesp >> shift) < (*qblocks >> *qshift)) { in xfs_quota_calc_throttle()
461 *qshift = shift; in xfs_quota_calc_throttle()
480 int shift = 0; in xfs_iomap_prealloc_size() local
503 shift = 2; in xfs_iomap_prealloc_size()
505 shift++; in xfs_iomap_prealloc_size()
507 shift++; in xfs_iomap_prealloc_size()
[all …]
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| /linux-4.4.14/arch/m68k/fpsp040/ |
| D | sgetem.S | 89 | For denormalized numbers, shift the mantissa until the j-bit = 1,
96 bsr shft |shift mantissa bits till msbit is set
119 exg %d0,%d1 |shift ls mant to ms mant
121 lsll %d3,%d0 |shift first 1 to integer bit in ms mant
128 lsll %d3,%d0 |shift ms mant until j-bit is set
130 lsll %d3,%d1 |shift ls mant by count
132 subl %d3,%d5 |sub 32 from shift for ls mant
133 lsrl %d5,%d6 |shift off all bits but those that will
135 orl %d6,%d0 |shift the ls mant bits into the ms mant
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| /linux-4.4.14/drivers/macintosh/ |
| D | windfarm_smu_sat.c | 53 int shift; member
165 val = ((sat->cache[i] << 8) + sat->cache[i+1]) << sens->shift; in wf_sat_sensor_get()
214 int shift, cpu, index; in wf_sat_probe() local
265 shift = 4; in wf_sat_probe()
269 shift = 8; in wf_sat_probe()
273 shift = 10; in wf_sat_probe()
286 sens->shift = shift; in wf_sat_probe()
313 sens->shift = 0; in wf_sat_probe()
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| /linux-4.4.14/sound/isa/gus/ |
| D | gus_mixer.c | 32 #define GF1_SINGLE(xname, xindex, shift, invert) \ argument
36 .private_value = shift | (invert << 8) }
43 int shift = kcontrol->private_value & 0xff; in snd_gf1_get_single() local
46 ucontrol->value.integer.value[0] = (gus->mix_cntrl_reg >> shift) & 1; in snd_gf1_get_single()
56 int shift = kcontrol->private_value & 0xff; in snd_gf1_put_single() local
64 nval <<= shift; in snd_gf1_put_single()
67 nval = (oval & ~(1 << shift)) | nval; in snd_gf1_put_single()
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| /linux-4.4.14/drivers/iio/humidity/ |
| D | hdc100x.c | 49 int shift; member
53 .shift = 10,
57 .shift = 8,
121 int shift = hdc100x_resolution_shift[chan].shift; in hdc100x_set_it_time() local
128 hdc100x_resolution_shift[chan].mask << shift, in hdc100x_set_it_time()
129 i << shift); in hdc100x_set_it_time()
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| /linux-4.4.14/arch/cris/include/arch-v32/mach-a3/mach/hwregs/iop/asm/ |
| D | iop_version_defs_asm.h | 17 #define REG_FIELD_X_( value, shift ) ((value) << shift) argument
23 #define REG_STATE_X_( k, shift ) (k << shift) argument
|
| /linux-4.4.14/arch/x86/include/asm/ |
| D | pvclock.h | 23 static inline u64 pvclock_scale_delta(u64 delta, u32 mul_frac, int shift) in pvclock_scale_delta() argument
32 if (shift < 0) in pvclock_scale_delta()
33 delta >>= -shift; in pvclock_scale_delta()
35 delta <<= shift; in pvclock_scale_delta()
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| /linux-4.4.14/arch/cris/include/arch-v32/arch/hwregs/iop/asm/ |
| D | iop_version_defs_asm.h | 20 #define REG_FIELD_X_( value, shift ) ((value) << shift) argument
26 #define REG_STATE_X_( k, shift ) (k << shift) argument
|
| D | iop_scrc_in_defs_asm.h | 20 #define REG_FIELD_X_( value, shift ) ((value) << shift) argument
26 #define REG_STATE_X_( k, shift ) (k << shift) argument
|
| D | iop_scrc_out_defs_asm.h | 20 #define REG_FIELD_X_( value, shift ) ((value) << shift) argument
26 #define REG_STATE_X_( k, shift ) (k << shift) argument
|
| /linux-4.4.14/drivers/pinctrl/freescale/ |
| D | pinctrl-mxs.c | 204 u8 bank, shift; in mxs_pinctrl_set_mux() local
213 shift = pin % 16 * 2; in mxs_pinctrl_set_mux()
215 writel(0x3 << shift, reg + CLR); in mxs_pinctrl_set_mux()
216 writel(g->muxsel[i] << shift, reg + SET); in mxs_pinctrl_set_mux()
259 u8 ma, vol, pull, bank, shift; in mxs_pinconf_group_set() local
282 shift = pin % 8 * 4; in mxs_pinconf_group_set()
283 writel(0x3 << shift, reg + CLR); in mxs_pinconf_group_set()
284 writel(ma << shift, reg + SET); in mxs_pinconf_group_set()
289 shift = pin % 8 * 4 + 2; in mxs_pinconf_group_set()
291 writel(1 << shift, reg + SET); in mxs_pinconf_group_set()
[all …]
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| /linux-4.4.14/drivers/sh/intc/ |
| D | access.c | 59 unsigned int shift = _INTC_SHIFT(handle); in intc_set_field_from_handle() local
61 value &= ~(((1 << width) - 1) << shift); in intc_set_field_from_handle()
62 value |= field_value << shift; in intc_set_field_from_handle()
69 unsigned int shift = _INTC_SHIFT(handle); in intc_get_field_from_handle() local
70 unsigned int mask = ((1 << width) - 1) << shift; in intc_get_field_from_handle()
72 return (value & mask) >> shift; in intc_get_field_from_handle()
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| /linux-4.4.14/arch/cris/include/arch-v32/arch/hwregs/asm/ |
| D | irq_nmi_defs_asm.h | 20 #define REG_FIELD_X_( value, shift ) ((value) << shift) argument
26 #define REG_STATE_X_( k, shift ) (k << shift) argument
|
| D | strcop_defs_asm.h | 20 #define REG_FIELD_X_( value, shift ) ((value) << shift) argument
26 #define REG_STATE_X_( k, shift ) (k << shift) argument
|
| D | cris_defs_asm.h | 20 #define REG_FIELD_X_( value, shift ) ((value) << shift) argument
26 #define REG_STATE_X_( k, shift ) (k << shift) argument
|
| D | strmux_defs_asm.h | 20 #define REG_FIELD_X_( value, shift ) ((value) << shift) argument
26 #define REG_STATE_X_( k, shift ) (k << shift) argument
|
| /linux-4.4.14/arch/x86/kernel/apic/ |
| D | x2apic_uv_x.c | 545 int shift = UVH_RH_GAM_GRU_OVERLAY_CONFIG_MMR_BASE_SHFT; in map_gru_high() local
557 map_high("GRU", gru.s.base, shift, shift, max_pnode, map_wb); in map_gru_high()
558 gru_start_paddr = ((u64)gru.s.base << shift); in map_gru_high()
559 gru_end_paddr = gru_start_paddr + (1UL << shift) * (max_pnode + 1); in map_gru_high()
565 int shift = UVH_RH_GAM_MMR_OVERLAY_CONFIG_MMR_BASE_SHFT; in map_mmr_high() local
569 map_high("MMR", mmr.s.base, shift, shift, max_pnode, map_uc); in map_mmr_high()
602 int i, n, shift, m_io, max_io; in map_mmioh_high_uv3() local
615 shift = UV3H_RH_GAM_MMIOH_OVERLAY_CONFIG0_MMR_BASE_SHFT; in map_mmioh_high_uv3()
650 addr1 = (base << shift) + in map_mmioh_high_uv3()
652 addr2 = (base << shift) + in map_mmioh_high_uv3()
[all …]
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| /linux-4.4.14/arch/mips/mti-sead3/ |
| D | sead3-platform.c | 106 #define LEDFLAGS(bits, shift) \ argument
107 ((bits << 8) | (shift << 8))
109 #define LEDBITS(id, shift, bits) \ argument
110 .name = id #shift, \
111 .flags = LEDFLAGS(bits, shift)
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| /linux-4.4.14/drivers/isdn/mISDN/ |
| D | dsp_audio.c | 396 int shift; in dsp_change_volume() local
403 shift = volume + 8; in dsp_change_volume()
404 if (shift < 0) in dsp_change_volume()
405 shift = 0; in dsp_change_volume()
407 shift = volume + 7; in dsp_change_volume()
408 if (shift > 15) in dsp_change_volume()
409 shift = 15; in dsp_change_volume()
411 volume_change = dsp_audio_volume_change[shift]; in dsp_change_volume()
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| /linux-4.4.14/arch/blackfin/mach-bf609/ |
| D | clock.c | 191 div = (div & clk->mask) >> clk->shift; in sys_clk_get_rate()
239 div = (div & clk->mask) >> clk->shift; in sys_clk_set_rate()
250 clk_reg_write_mask(CGU0_DIV, div << clk->shift, in sys_clk_set_rate()
297 .shift = CGU0_DIV_CSEL_SHIFT,
319 .shift = CGU0_DIV_SYSSEL_SHIFT,
329 .shift = CGU0_DIV_S0SEL_SHIFT,
338 .shift = CGU0_DIV_S1SEL_SHIFT,
347 .shift = CGU0_DIV_DSEL_SHIFT,
356 .shift = CGU0_DIV_OSEL_SHIFT,
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| /linux-4.4.14/arch/mips/include/asm/mach-ralink/ |
| D | pinmux.h | 16 { .name = _name, .mask = _mask, .shift = _shift, \
21 { .name = _name, .mask = _mask, .shift = _shift, \
45 const u32 shift; member
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| /linux-4.4.14/Documentation/devicetree/bindings/clock/ |
| D | keystone-pll.txt | 47 - bit-shift : number of bits to shift the bit-mask
59 bit-shift = <23>;
69 - bit-shift : number of bits to shift the bit-mask
81 bit-shift = <0>;
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| /linux-4.4.14/arch/arm/common/ |
| D | it8152.c | 183 int shift; in it8152_pci_read_config() local
185 shift = (where & 3); in it8152_pci_read_config()
188 v = (__raw_readl(IT8152_PCI_CFG_DATA) >> (8 * (shift))); in it8152_pci_read_config()
201 int shift; in it8152_pci_write_config() local
208 shift = (where & 3); in it8152_pci_write_config()
214 vtemp &= ~(mask << (8 * shift)); in it8152_pci_write_config()
218 v = (value << (8 * shift)); in it8152_pci_write_config()
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| /linux-4.4.14/drivers/misc/altera-stapl/ |
| D | altera-comp.c | 57 u32 shift = 0; in altera_read_packed() local
63 & (0xff >> (CHAR_BITS - *bits_avail))) << shift); in altera_read_packed()
66 result &= (0xffff >> (SHORT_BITS - (bits + shift))); in altera_read_packed()
71 shift += *bits_avail; in altera_read_packed()
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| /linux-4.4.14/arch/powerpc/kernel/ |
| D | syscalls.c | 46 unsigned long fd, unsigned long off, int shift) in do_mmap2() argument
53 if (shift) { in do_mmap2()
54 if (off & ((1 << shift) - 1)) in do_mmap2()
56 off >>= shift; in do_mmap2()
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