145 	val = clk_readl(divider->reg) >> divider->shift;  in clk_divider_recalc_rate()
357 		bestdiv = readl(divider->reg) >> divider->shift;  in clk_divider_round_rate()
402 		val = div_mask(divider->width) << (divider->shift + 16);  in clk_divider_set_rate()
405 		val &= ~(div_mask(divider->width) << divider->shift);  in clk_divider_set_rate()
407 	val |= value << divider->shift;  in clk_divider_set_rate()
433 		void __iomem *reg, u8 shift, u8 width,  in _register_divider()  argument
442 		if (width + shift > 16) {  in _register_divider()
464 	div->shift = shift;  in _register_divider()
494 		void __iomem *reg, u8 shift, u8 width,  in clk_register_divider()  argument
497 	return _register_divider(dev, name, parent_name, flags, reg, shift,  in clk_register_divider()
518 		void __iomem *reg, u8 shift, u8 width,  in clk_register_divider_table()  argument
522 	return _register_divider(dev, name, parent_name, flags, reg, shift,  in clk_register_divider_table()