361 	int shift;		/* offset in register		  */  member
490 	v |= (1 << 1) << c->shift;  in alchemy_clk_fgv1_en()
500 	unsigned long v = alchemy_rdsys(c->reg) >> (c->shift + 1);  in alchemy_clk_fgv1_isen()
512 	v &= ~((1 << 1) << c->shift);  in alchemy_clk_fgv1_dis()
525 		v |= (1 << c->shift);  in alchemy_clk_fgv1_setp()
527 		v &= ~(1 << c->shift);  in alchemy_clk_fgv1_setp()
538 	return (alchemy_rdsys(c->reg) >> c->shift) & 1;  in alchemy_clk_fgv1_getp()
546 	int sh = c->shift + 2;  in alchemy_clk_fgv1_setr()
565 	unsigned long v = alchemy_rdsys(c->reg) >> (c->shift + 2);  in alchemy_clk_fgv1_recalc()
593 	v &= ~(3 << c->shift);  in __alchemy_clk_fgv2_en()
594 	v |= (c->parent & 3) << c->shift;  in __alchemy_clk_fgv2_en()
616 	return ((alchemy_rdsys(c->reg) >> c->shift) & 3) != 0;  in alchemy_clk_fgv2_isen()
626 	v &= ~(3 << c->shift);	/* set input mux to "disabled" state */  in alchemy_clk_fgv2_dis()
666 	int sh = c->shift + 2;  in alchemy_clk_fgv2_setr()
690 	int sh = c->shift + 2;  in alchemy_clk_fgv2_recalc()
775 		a->shift = 10 * (i < 3 ? i : i - 3);  in alchemy_clk_init_fgens()
789 			a->parent = (v >> a->shift) & 3;  in alchemy_clk_init_fgens()
816 	return (((v >> c->shift) >> 2) & 7) != 0;  in alchemy_clk_csrc_isen()
823 	v &= ~((7 << 2) << c->shift);  in __alchemy_clk_csrc_en()
824 	v |= ((c->parent & 7) << 2) << c->shift;  in __alchemy_clk_csrc_en()
849 	v &= ~((3 << 2) << c->shift);	/* mux to "disabled" state */  in alchemy_clk_csrc_dis()
880 	unsigned long v = (alchemy_rdsys(c->reg) >> c->shift) & 3;  in alchemy_clk_csrc_recalc()
910 	v &= ~(3 << c->shift);  in alchemy_clk_csrc_setr()
911 	v |= (i & 3) << c->shift;  in alchemy_clk_csrc_setr()
999 		a->shift = i * 5;  in alchemy_clk_setup_imux()
1008 		a->parent = ((v >> a->shift) >> 2) & 7;  in alchemy_clk_setup_imux()