128 	unsigned int pupdctrl, reg, shift, val;  in uniphier_conf_pin_bias_get()  local
160 	shift = pupdctrl % 32;  in uniphier_conf_pin_bias_get()
166 	val = (val >> shift) & 1;  in uniphier_conf_pin_bias_get()
181 	unsigned int drvctrl, reg, shift, mask, width, val;  in uniphier_conf_pin_drive_get()  local
214 	shift = drvctrl % 32;  in uniphier_conf_pin_drive_get()
221 	*strength = supported_strength[(val >> shift) & mask];  in uniphier_conf_pin_drive_get()
288 	unsigned int pupdctrl, reg, shift;  in uniphier_conf_pin_bias_set()  local
350 	shift = pupdctrl % 32;  in uniphier_conf_pin_bias_set()
352 	return regmap_update_bits(priv->regmap, reg, 1 << shift, val << shift);  in uniphier_conf_pin_bias_set()
365 	unsigned int drvctrl, reg, shift, mask, width, val;  in uniphier_conf_pin_drive_set()  local
404 	shift = drvctrl % 32;  in uniphier_conf_pin_drive_set()
408 				  mask << shift, val << shift);  in uniphier_conf_pin_drive_set()
539 	unsigned reg, reg_end, shift, mask;  in uniphier_pmx_set_one_mux()  local
550 	shift = pin * mux_bits % 32;  in uniphier_pmx_set_one_mux()
559 					 mask << shift, muxval << shift);  in uniphier_pmx_set_one_mux()