bank (reference) in projects: linux-4.4.14

Searched refs:bank (Results 1 – 200 of 583) sorted by relevance

/linux-4.4.14/drivers/gpio/
D	gpio-omap.c	80 void (set_dataout)(struct gpio_bank bank, unsigned gpio, int enable); 88 #define BANK_USED(bank) (bank->mod_usage \|\| bank->irq_usage) argument 99 static void omap_set_gpio_direction(struct gpio_bank bank, int gpio, in omap_set_gpio_direction() argument 102 void __iomem reg = bank->base; in omap_set_gpio_direction() 105 reg += bank->regs->direction; in omap_set_gpio_direction() 112 bank->context.oe = l; in omap_set_gpio_direction() 117 static void omap_set_gpio_dataout_reg(struct gpio_bank bank, unsigned offset, in omap_set_gpio_dataout_reg() argument 120 void __iomem reg = bank->base; in omap_set_gpio_dataout_reg() 124 reg += bank->regs->set_dataout; in omap_set_gpio_dataout_reg() 125 bank->context.dataout \|= l; in omap_set_gpio_dataout_reg() [all …]
D	gpio-tz1090.c	93 static inline void tz1090_gpio_write(struct tz1090_gpio_bank bank, in tz1090_gpio_write() argument 96 iowrite32(data, bank->reg + reg_offs); in tz1090_gpio_write() 99 static inline u32 tz1090_gpio_read(struct tz1090_gpio_bank bank, in tz1090_gpio_read() argument 102 return ioread32(bank->reg + reg_offs); in tz1090_gpio_read() 106 static inline void _tz1090_gpio_clear_bit(struct tz1090_gpio_bank bank, in _tz1090_gpio_clear_bit() argument 112 value = tz1090_gpio_read(bank, reg_offs); in _tz1090_gpio_clear_bit() 114 tz1090_gpio_write(bank, reg_offs, value); in _tz1090_gpio_clear_bit() 117 static void tz1090_gpio_clear_bit(struct tz1090_gpio_bank bank, in tz1090_gpio_clear_bit() argument 124 _tz1090_gpio_clear_bit(bank, reg_offs, offset); in tz1090_gpio_clear_bit() 129 static inline void _tz1090_gpio_set_bit(struct tz1090_gpio_bank *bank, in _tz1090_gpio_set_bit() argument [all …]
D	gpio-brcmstb.c	26 #define GIO_ODEN(bank) (((bank) * GIO_BANK_SIZE) + 0x00) argument 27 #define GIO_DATA(bank) (((bank) * GIO_BANK_SIZE) + 0x04) argument 28 #define GIO_IODIR(bank) (((bank) * GIO_BANK_SIZE) + 0x08) argument 29 #define GIO_EC(bank) (((bank) * GIO_BANK_SIZE) + 0x0c) argument 30 #define GIO_EI(bank) (((bank) * GIO_BANK_SIZE) + 0x10) argument 31 #define GIO_MASK(bank) (((bank) * GIO_BANK_SIZE) + 0x14) argument 32 #define GIO_LEVEL(bank) (((bank) * GIO_BANK_SIZE) + 0x18) argument 33 #define GIO_STAT(bank) (((bank) * GIO_BANK_SIZE) + 0x1c) argument 70 struct brcmstb_gpio_bank *bank = brcmstb_gpio_gc_to_bank(gc); in brcmstb_gpio_gc_to_priv() local 71 return bank->parent_priv; in brcmstb_gpio_gc_to_priv() [all …]
D	gpio-f7188x.c	63 struct f7188x_gpio_bank bank; member 196 struct f7188x_gpio_bank bank = in f7188x_gpio_direction_in() local 198 struct f7188x_sio sio = bank->data->sio; in f7188x_gpio_direction_in() 206 dir = superio_inb(sio->addr, gpio_dir(bank->regbase)); in f7188x_gpio_direction_in() 208 superio_outb(sio->addr, gpio_dir(bank->regbase), dir); in f7188x_gpio_direction_in() 218 struct f7188x_gpio_bank bank = in f7188x_gpio_get() local 220 struct f7188x_sio *sio = bank->data->sio; in f7188x_gpio_get() 228 dir = superio_inb(sio->addr, gpio_dir(bank->regbase)); in f7188x_gpio_get() 231 data = superio_inb(sio->addr, gpio_data_out(bank->regbase)); in f7188x_gpio_get() 233 data = superio_inb(sio->addr, gpio_data_in(bank->regbase)); in f7188x_gpio_get() [all …]
D	gpio-adp5588.c	70 unsigned bank = ADP5588_BANK(off); in adp5588_gpio_get_value() local 76 if (dev->dir[bank] & bit) in adp5588_gpio_get_value() 77 val = dev->dat_out[bank]; in adp5588_gpio_get_value() 79 val = adp5588_gpio_read(dev->client, GPIO_DAT_STAT1 + bank); in adp5588_gpio_get_value() 89 unsigned bank, bit; in adp5588_gpio_set_value() local 93 bank = ADP5588_BANK(off); in adp5588_gpio_set_value() 98 dev->dat_out[bank] \|= bit; in adp5588_gpio_set_value() 100 dev->dat_out[bank] &= ~bit; in adp5588_gpio_set_value() 102 adp5588_gpio_write(dev->client, GPIO_DAT_OUT1 + bank, in adp5588_gpio_set_value() 103 dev->dat_out[bank]); in adp5588_gpio_set_value() [all …]
D	gpio-tegra.c	65 int bank; member 96 static int tegra_gpio_compose(int bank, int port, int bit) in tegra_gpio_compose() argument 98 return (bank << 5) \| ((port & 0x3) << 3) \| (bit & 0x7); in tegra_gpio_compose() 204 struct tegra_gpio_bank bank = irq_data_get_irq_chip_data(d); in tegra_gpio_irq_set_type() local 242 spin_lock_irqsave(&bank->lvl_lock[port], flags); in tegra_gpio_irq_set_type() 249 spin_unlock_irqrestore(&bank->lvl_lock[port], flags); in tegra_gpio_irq_set_type() 275 struct tegra_gpio_bank bank = irq_desc_get_handler_data(desc); in tegra_gpio_irq_handler() local 280 int gpio = tegra_gpio_compose(bank->bank, port, 0); in tegra_gpio_irq_handler() 316 struct tegra_gpio_bank *bank = &tegra_gpio_banks[b]; in tegra_gpio_resume() local 318 for (p = 0; p < ARRAY_SIZE(bank->oe); p++) { in tegra_gpio_resume() [all …]
D	gpio-bcm-kona.c	35 #define GPIO_OUT_STATUS(bank) (0x00000000 + ((bank) << 2)) argument 36 #define GPIO_IN_STATUS(bank) (0x00000020 + ((bank) << 2)) argument 37 #define GPIO_OUT_SET(bank) (0x00000040 + ((bank) << 2)) argument 38 #define GPIO_OUT_CLEAR(bank) (0x00000060 + ((bank) << 2)) argument 39 #define GPIO_INT_STATUS(bank) (0x00000080 + ((bank) << 2)) argument 40 #define GPIO_INT_MASK(bank) (0x000000a0 + ((bank) << 2)) argument 41 #define GPIO_INT_MSKCLR(bank) (0x000000c0 + ((bank) << 2)) argument 42 #define GPIO_PWD_STATUS(bank) (0x00000500 + ((bank) << 2)) argument 441 struct bcm_kona_gpio_bank *bank = irq_desc_get_handler_data(desc); in bcm_kona_gpio_irq_handler() local 451 reg_base = bank->kona_gpio->reg_base; in bcm_kona_gpio_irq_handler() [all …]
D	gpio-xgene.c	140 unsigned int bank; in xgene_gpio_suspend() local 142 for (bank = 0; bank < XGENE_MAX_GPIO_BANKS; bank++) { in xgene_gpio_suspend() 143 bank_offset = GPIO_SET_DR_OFFSET + bank * GPIO_BANK_STRIDE; in xgene_gpio_suspend() 144 gpio->set_dr_val[bank] = ioread32(gpio->base + bank_offset); in xgene_gpio_suspend() 153 unsigned int bank; in xgene_gpio_resume() local 155 for (bank = 0; bank < XGENE_MAX_GPIO_BANKS; bank++) { in xgene_gpio_resume() 156 bank_offset = GPIO_SET_DR_OFFSET + bank * GPIO_BANK_STRIDE; in xgene_gpio_resume() 157 iowrite32(gpio->set_dr_val[bank], gpio->base + bank_offset); in xgene_gpio_resume()
D	gpio-ep93xx.c	323 void __iomem mmio_base, struct ep93xx_gpio_bank bank) in ep93xx_gpio_add_bank() argument 325 void __iomem data = mmio_base + bank->data; in ep93xx_gpio_add_bank() 326 void __iomem dir = mmio_base + bank->dir; in ep93xx_gpio_add_bank() 333 bgc->gc.label = bank->label; in ep93xx_gpio_add_bank() 334 bgc->gc.base = bank->base; in ep93xx_gpio_add_bank() 336 if (bank->has_debounce) { in ep93xx_gpio_add_bank() 362 struct ep93xx_gpio_bank *bank = &ep93xx_gpio_banks[i]; in ep93xx_gpio_probe() local 365 ep93xx_gpio->mmio_base, bank)) in ep93xx_gpio_probe() 367 bank->label); in ep93xx_gpio_probe()
D	gpio-74x164.c	`72 u8 bank = offset / 8; in gen_74x164_get_value() local 77 ret = (chip->buffer[bank] >> pin) & 0x1; in gen_74x164_get_value() 87 u8 bank = offset / 8; in gen_74x164_set_value() local 92 chip->buffer[bank] \|= (1 << pin); in gen_74x164_set_value() 94 chip->buffer[bank] &= ~(1 << pin); in gen_74x164_set_value()`
D	gpio-davinci.c	`464 unsigned gpio, bank; in davinci_gpio_irq_setup() local 532 for (gpio = 0, bank = 0; gpio < ngpio; bank++, gpio += 32) { in davinci_gpio_irq_setup() 533 chips[bank].chip.to_irq = gpio_to_irq_banked; in davinci_gpio_irq_setup() 534 chips[bank].irq_domain = irq_domain; in davinci_gpio_irq_setup() 574 for (gpio = 0, bank = 0; gpio < ngpio; bank++, bank_irq++, gpio += 16) { in davinci_gpio_irq_setup() 588 binten \|= BIT(bank); in davinci_gpio_irq_setup()`
D	gpio-zynq.c	`155 int bank; in zynq_gpio_get_bank_pin() local 157 for (bank = 0; bank < gpio->p_data->max_bank; bank++) { in zynq_gpio_get_bank_pin() 158 if ((pin_num >= gpio->p_data->bank_min[bank]) && in zynq_gpio_get_bank_pin() 159 (pin_num <= gpio->p_data->bank_max[bank])) { in zynq_gpio_get_bank_pin() 160 *bank_num = bank; in zynq_gpio_get_bank_pin() 162 gpio->p_data->bank_min[bank]; in zynq_gpio_get_bank_pin()`
/linux-4.4.14/arch/powerpc/sysdev/
D	axonram.c	75 struct axon_ram_bank bank = device->dev.platform_data; in axon_ram_sysfs_ecc() local 77 BUG_ON(!bank); in axon_ram_sysfs_ecc() 79 return sprintf(buf, "%ld\n", bank->ecc_counter); in axon_ram_sysfs_ecc() 93 struct axon_ram_bank bank = device->dev.platform_data; in axon_ram_irq_handler() local 95 BUG_ON(!bank); in axon_ram_irq_handler() 98 bank->ecc_counter++; in axon_ram_irq_handler() 109 struct axon_ram_bank bank = bio->bi_bdev->bd_disk->private_data; in axon_ram_make_request() local 116 phys_mem = bank->io_addr + (bio->bi_iter.bi_sector << in axon_ram_make_request() 118 phys_end = bank->io_addr + bank->size; in axon_ram_make_request() 147 struct axon_ram_bank bank = device->bd_disk->private_data; in axon_ram_direct_access() local [all …]
D	fsl_lbc.c	`76 for (i = 0; i < ARRAY_SIZE(lbc->bank); i++) { in fsl_lbc_find() 77 u32 br = in_be32(&lbc->bank[i].br); in fsl_lbc_find() 78 u32 or = in_be32(&lbc->bank[i].or); in fsl_lbc_find() 99 int bank; in fsl_upm_find() local 103 bank = fsl_lbc_find(addr_base); in fsl_upm_find() 104 if (bank < 0) in fsl_upm_find() 105 return bank; in fsl_upm_find() 111 br = in_be32(&lbc->bank[bank].br); in fsl_upm_find()`
/linux-4.4.14/drivers/crypto/qat/qat_common/
D	adf_transport.c	80 static int adf_reserve_ring(struct adf_etr_bank_data bank, uint32_t ring) in adf_reserve_ring() argument 82 spin_lock(&bank->lock); in adf_reserve_ring() 83 if (bank->ring_mask & (1 << ring)) { in adf_reserve_ring() 84 spin_unlock(&bank->lock); in adf_reserve_ring() 87 bank->ring_mask \|= (1 << ring); in adf_reserve_ring() 88 spin_unlock(&bank->lock); in adf_reserve_ring() 92 static void adf_unreserve_ring(struct adf_etr_bank_data bank, uint32_t ring) in adf_unreserve_ring() argument 94 spin_lock(&bank->lock); in adf_unreserve_ring() 95 bank->ring_mask &= ~(1 << ring); in adf_unreserve_ring() 96 spin_unlock(&bank->lock); in adf_unreserve_ring() [all …]
D	adf_transport_access_macros.h	119 #define READ_CSR_RING_HEAD(csr_base_addr, bank, ring) \ argument 120 ADF_CSR_RD(csr_base_addr, (ADF_RING_BUNDLE_SIZE * bank) + \ 122 #define READ_CSR_RING_TAIL(csr_base_addr, bank, ring) \ argument 123 ADF_CSR_RD(csr_base_addr, (ADF_RING_BUNDLE_SIZE * bank) + \ 125 #define READ_CSR_E_STAT(csr_base_addr, bank) \ argument 126 ADF_CSR_RD(csr_base_addr, (ADF_RING_BUNDLE_SIZE * bank) + \ 128 #define WRITE_CSR_RING_CONFIG(csr_base_addr, bank, ring, value) \ argument 129 ADF_CSR_WR(csr_base_addr, (ADF_RING_BUNDLE_SIZE * bank) + \ 131 #define WRITE_CSR_RING_BASE(csr_base_addr, bank, ring, value) \ argument 136 ADF_CSR_WR(csr_base_addr, (ADF_RING_BUNDLE_SIZE * bank) + \ [all …]
D	adf_transport_debug.c	88 struct adf_etr_bank_data bank = ring->bank; in adf_ring_show() local 89 void __iomem csr = ring->bank->csr_addr; in adf_ring_show() 94 head = READ_CSR_RING_HEAD(csr, bank->bank_number, in adf_ring_show() 96 tail = READ_CSR_RING_TAIL(csr, bank->bank_number, in adf_ring_show() 98 empty = READ_CSR_E_STAT(csr, bank->bank_number); in adf_ring_show() 104 ring->ring_number, ring->bank->bank_number); in adf_ring_show() 164 ring->bank->bank_debug_dir, in adf_ring_debugfs_add() 206 struct adf_etr_bank_data bank = sfile->private; in adf_bank_show() local 210 bank->bank_number); in adf_bank_show() 213 struct adf_etr_ring_data ring = &bank->rings[ring_id]; in adf_bank_show() [all …]
D	adf_transport_internal.h	`64 struct adf_etr_bank_data bank; member 97 int adf_bank_debugfs_add(struct adf_etr_bank_data bank); 98 void adf_bank_debugfs_rm(struct adf_etr_bank_data bank); 102 static inline int adf_bank_debugfs_add(struct adf_etr_bank_data bank) in adf_bank_debugfs_add() argument 107 #define adf_bank_debugfs_rm(bank) do {} while (0) argument`
D	qat_crypto.c	`165 unsigned long bank; in qat_crypto_create_instances() local 194 if (kstrtoul(val, 10, &bank)) in qat_crypto_create_instances() 215 if (adf_create_ring(accel_dev, SEC, bank, num_msg_sym, in qat_crypto_create_instances() 221 if (adf_create_ring(accel_dev, SEC, bank, num_msg_asym, in qat_crypto_create_instances() 227 if (adf_create_ring(accel_dev, SEC, bank, num_msg_sym, in qat_crypto_create_instances() 233 if (adf_create_ring(accel_dev, SEC, bank, num_msg_asym, in qat_crypto_create_instances()`
D	adf_hw_arbiter.c	`135 WRITE_CSR_ARB_RINGSRVARBEN(ring->bank->csr_addr, in adf_update_ring_arb() 136 ring->bank->bank_number, in adf_update_ring_arb() 137 ring->bank->ring_mask & 0xFF); in adf_update_ring_arb()`
/linux-4.4.14/drivers/pinctrl/sh-pfc/
D	sh_pfc.h	205 #define PORT_GP_CFG_1(bank, pin, fn, sfx, cfg) fn(bank, pin, GP_##bank##_##pin, sfx, cfg) argument 206 #define PORT_GP_1(bank, pin, fn, sfx) PORT_GP_CFG_1(bank, pin, fn, sfx, 0) argument 208 #define PORT_GP_CFG_32(bank, fn, sfx, cfg) \ argument 209 PORT_GP_CFG_1(bank, 0, fn, sfx, cfg), PORT_GP_CFG_1(bank, 1, fn, sfx, cfg), \ 210 PORT_GP_CFG_1(bank, 2, fn, sfx, cfg), PORT_GP_CFG_1(bank, 3, fn, sfx, cfg), \ 211 PORT_GP_CFG_1(bank, 4, fn, sfx, cfg), PORT_GP_CFG_1(bank, 5, fn, sfx, cfg), \ 212 PORT_GP_CFG_1(bank, 6, fn, sfx, cfg), PORT_GP_CFG_1(bank, 7, fn, sfx, cfg), \ 213 PORT_GP_CFG_1(bank, 8, fn, sfx, cfg), PORT_GP_CFG_1(bank, 9, fn, sfx, cfg), \ 214 PORT_GP_CFG_1(bank, 10, fn, sfx, cfg), PORT_GP_CFG_1(bank, 11, fn, sfx, cfg), \ 215 PORT_GP_CFG_1(bank, 12, fn, sfx, cfg), PORT_GP_CFG_1(bank, 13, fn, sfx, cfg), \ [all …]
/linux-4.4.14/drivers/pinctrl/
D	pinctrl-rockchip.c	164 void (pull_calc_reg)(struct rockchip_pin_bank bank, 167 void (drv_calc_reg)(struct rockchip_pin_bank bank, 385 static int rockchip_get_mux(struct rockchip_pin_bank bank, int pin) in rockchip_get_mux() argument 387 struct rockchip_pinctrl info = bank->drvdata; in rockchip_get_mux() 397 if (bank->iomux[iomux_num].type & IOMUX_UNROUTED) { in rockchip_get_mux() 402 if (bank->iomux[iomux_num].type & IOMUX_GPIO_ONLY) in rockchip_get_mux() 405 regmap = (bank->iomux[iomux_num].type & IOMUX_SOURCE_PMU) in rockchip_get_mux() 409 mask = (bank->iomux[iomux_num].type & IOMUX_WIDTH_4BIT) ? 0xf : 0x3; in rockchip_get_mux() 410 reg = bank->iomux[iomux_num].offset; in rockchip_get_mux() 411 if (bank->iomux[iomux_num].type & IOMUX_WIDTH_4BIT) { in rockchip_get_mux() [all …]
D	pinctrl-st.c	408 struct st_gpio_bank bank = gpio_range_to_bank(range); in st_get_pio_control() local 410 return &bank->pc; in st_get_pio_control() 706 static inline void __st_gpio_set(struct st_gpio_bank bank, in __st_gpio_set() argument 710 writel(BIT(offset), bank->base + REG_PIO_SET_POUT); in __st_gpio_set() 712 writel(BIT(offset), bank->base + REG_PIO_CLR_POUT); in __st_gpio_set() 715 static void st_gpio_direction(struct st_gpio_bank bank, in st_gpio_direction() argument 739 writel(BIT(offset), bank->base + REG_PIO_SET_PC(i)); in st_gpio_direction() 741 writel(BIT(offset), bank->base + REG_PIO_CLR_PC(i)); in st_gpio_direction() 747 struct st_gpio_bank bank = gpio_chip_to_bank(chip); in st_gpio_get() local 749 return !!(readl(bank->base + REG_PIO_PIN) & BIT(offset)); in st_gpio_get() [all …]
D	pinctrl-pistachio.c	61 #define GPIO_BANK_BASE(bank) (0x200 + 0x24 * (bank)) argument 855 static inline u32 gpio_readl(struct pistachio_gpio_bank bank, u32 reg) in gpio_readl() argument 857 return readl(bank->base + reg); in gpio_readl() 860 static inline void gpio_writel(struct pistachio_gpio_bank bank, u32 val, in gpio_writel() argument 863 writel(val, bank->base + reg); in gpio_writel() 866 static inline void gpio_mask_writel(struct pistachio_gpio_bank bank, in gpio_mask_writel() argument 873 gpio_writel(bank, (0x10000 \| val) << bit, reg); in gpio_mask_writel() 876 static inline void gpio_enable(struct pistachio_gpio_bank bank, in gpio_enable() argument 879 gpio_mask_writel(bank, GPIO_BIT_EN, offset, 1); in gpio_enable() 882 static inline void gpio_disable(struct pistachio_gpio_bank *bank, in gpio_disable() argument [all …]
D	pinctrl-tegra.c	48 static inline u32 pmx_readl(struct tegra_pmx pmx, u32 bank, u32 reg) in pmx_readl() argument 50 return readl(pmx->regs[bank] + reg); in pmx_readl() 53 static inline void pmx_writel(struct tegra_pmx pmx, u32 val, u32 bank, u32 reg) in pmx_writel() argument 55 writel(val, pmx->regs[bank] + reg); in pmx_writel() 306 s8 bank, s16 reg, s8 bit, s8 width) in tegra_pinconf_reg() argument 310 bank = g->pupd_bank; in tegra_pinconf_reg() 316 bank = g->tri_bank; in tegra_pinconf_reg() 322 bank = g->mux_bank; in tegra_pinconf_reg() 328 bank = g->mux_bank; in tegra_pinconf_reg() 334 *bank = g->mux_bank; in tegra_pinconf_reg() [all …]
D	pinctrl-at91-pio4.c	89 unsigned bank; member 138 unsigned int bank, unsigned int reg) in atmel_gpio_read() argument 141 + ATMEL_PIO_BANK_OFFSET * bank + reg); in atmel_gpio_read() 145 unsigned int bank, unsigned int reg, in atmel_gpio_write() argument 149 + ATMEL_PIO_BANK_OFFSET * bank + reg); in atmel_gpio_write() 166 atmel_gpio_write(atmel_pioctrl, pin->bank, ATMEL_PIO_MSKR, in atmel_gpio_irq_set_type() 168 reg = atmel_gpio_read(atmel_pioctrl, pin->bank, ATMEL_PIO_CFGR); in atmel_gpio_irq_set_type() 197 atmel_gpio_write(atmel_pioctrl, pin->bank, ATMEL_PIO_CFGR, reg); in atmel_gpio_irq_set_type() 207 atmel_gpio_write(atmel_pioctrl, pin->bank, ATMEL_PIO_IDR, in atmel_gpio_irq_mask() 216 atmel_gpio_write(atmel_pioctrl, pin->bank, ATMEL_PIO_IER, in atmel_gpio_irq_unmask() [all …]
D	pinctrl-falcon.c	96 static void lantiq_load_pin_desc(struct pinctrl_pin_desc d, int bank, int len) in lantiq_load_pin_desc() argument 98 int base = bank PINS; in lantiq_load_pin_desc() 109 pad_count[bank] = len; in lantiq_load_pin_desc() 442 const __be32 bank = of_get_property(np, "lantiq,bank", NULL); in pinctrl_falcon_probe() local 454 if (!bank \|\| bank >= PORTS) in pinctrl_falcon_probe() 458 falcon_info.clk[bank] = clk_get(&ppdev->dev, NULL); in pinctrl_falcon_probe() 459 if (IS_ERR(falcon_info.clk[bank])) { in pinctrl_falcon_probe() 461 return PTR_ERR(falcon_info.clk[bank]); in pinctrl_falcon_probe() 463 falcon_info.membase[bank] = devm_ioremap_resource(&pdev->dev, in pinctrl_falcon_probe() 465 if (IS_ERR(falcon_info.membase[*bank])) in pinctrl_falcon_probe() [all …]
D	pinctrl-at91.c	108 uint32_t bank; member 321 unsigned int bank) in pin_to_controller() argument 323 if (!gpio_chips[bank]) in pin_to_controller() 326 return gpio_chips[bank]->regbase; in pin_to_controller() 646 pin->bank + 'A', pin->pin, pin->mux - 1 + 'A', pin->conf); in at91_pin_dbg() 649 pin->bank + 'A', pin->pin, pin->conf); in at91_pin_dbg() 659 if (pin->bank >= gpio_banks) { in pin_check_config() 661 name, index, pin->bank, gpio_banks); in pin_check_config() 665 if (!gpio_chips[pin->bank]) { in pin_check_config() 667 name, index, pin->bank); in pin_check_config() [all …]
/linux-4.4.14/arch/arm/mach-s3c24xx/
D	iotiming-s3c2412.c	45 unsigned int bank; in s3c2412_print_timing() local 47 for (bank = 0; bank < MAX_BANKS; bank++) { in s3c2412_print_timing() 48 bt = iot->bank[bank].io_2412; in s3c2412_print_timing() 53 "wstoen=%d.%d wstwen=%d.%d wstbrd=%d.%d\n", pfx, bank, in s3c2412_print_timing() 146 int bank; in s3c2412_iotiming_calc() local 149 for (bank = 0; bank < MAX_BANKS; bank++) { in s3c2412_iotiming_calc() 150 bt = iot->bank[bank].io_2412; in s3c2412_iotiming_calc() 157 __func__, bank); in s3c2412_iotiming_calc() 180 int bank; in s3c2412_iotiming_set() local 184 for (bank = 0; bank < MAX_BANKS; bank++) { in s3c2412_iotiming_set() [all …]
D	iotiming-s3c2410.c	39 int bank; in s3c2410_print_timing() local 41 for (bank = 0; bank < MAX_BANKS; bank++) { in s3c2410_print_timing() 42 bt = timings->bank[bank].io_2410; in s3c2410_print_timing() 47 "Tcoh=%d.%d, Tcah=%d.%d\n", pfx, bank, in s3c2410_print_timing() 60 static inline void __iomem *bank_reg(unsigned int bank) in bank_reg() argument 62 return S3C2410_BANKCON0 + (bank << 2); in bank_reg() 366 int bank; in s3c2410_iotiming_calc() local 369 for (bank = 0; bank < MAX_BANKS; bank++) { in s3c2410_iotiming_calc() 370 bankcon = __raw_readl(bank_reg(bank)); in s3c2410_iotiming_calc() 371 bt = iot->bank[bank].io_2410; in s3c2410_iotiming_calc() [all …]
/linux-4.4.14/arch/unicore32/include/asm/
D	memblock.h	`29 struct membank bank[NR_BANKS]; member 37 #define bank_pfn_start(bank) __phys_to_pfn((bank)->start) argument 38 #define bank_pfn_end(bank) __phys_to_pfn((bank)->start + (bank)->size) argument 39 #define bank_pfn_size(bank) ((bank)->size >> PAGE_SHIFT) argument 40 #define bank_phys_start(bank) ((bank)->start) argument 41 #define bank_phys_end(bank) ((bank)->start + (bank)->size) argument 42 #define bank_phys_size(bank) ((bank)->size) argument`
/linux-4.4.14/arch/x86/kernel/cpu/mcheck/
D	mce_amd.c	85 static inline bool is_shared_bank(int bank) in is_shared_bank() argument 88 return (bank == 4); in is_shared_bank() 111 static bool lvt_interrupt_supported(unsigned int bank, u32 msr_high_bits) in lvt_interrupt_supported() argument 116 if (bank == 4) in lvt_interrupt_supported() 133 b->bank, b->block, b->address, hi, lo); in lvt_off_valid() 140 b->cpu, apic, b->bank, b->block, b->address, hi, lo); in lvt_off_valid() 256 unsigned int bank, block; in mce_amd_feature_init() local 259 for (bank = 0; bank < mca_cfg.banks; ++bank) { in mce_amd_feature_init() 262 address = MSR_IA32_MCx_MISC(bank); in mce_amd_feature_init() 283 per_cpu(bank_map, cpu) \|= (1 << bank); in mce_amd_feature_init() [all …]
D	mce_intel.c	152 int bank; in cmci_toggle_interrupt_mode() local 157 for_each_set_bit(bank, owned, MAX_NR_BANKS) { in cmci_toggle_interrupt_mode() 158 rdmsrl(MSR_IA32_MCx_CTL2(bank), val); in cmci_toggle_interrupt_mode() 165 wrmsrl(MSR_IA32_MCx_CTL2(bank), val); in cmci_toggle_interrupt_mode() 350 static void __cmci_disable_bank(int bank) in __cmci_disable_bank() argument 354 if (!test_bit(bank, this_cpu_ptr(mce_banks_owned))) in __cmci_disable_bank() 356 rdmsrl(MSR_IA32_MCx_CTL2(bank), val); in __cmci_disable_bank() 358 wrmsrl(MSR_IA32_MCx_CTL2(bank), val); in __cmci_disable_bank() 359 __clear_bit(bank, this_cpu_ptr(mce_banks_owned)); in __cmci_disable_bank() 410 void cmci_disable_bank(int bank) in cmci_disable_bank() argument [all …]
D	mce-internal.h	`49 void cmci_disable_bank(int bank); 54 static inline void cmci_disable_bank(int bank) { } in cmci_disable_bank() argument`
D	mce.c	116 static void (quirk_no_way_out)(int bank, struct mce m, struct pt_regs regs); 233 m->extcpu, m->mcgstatus, m->bank, m->status); in print_mce() 356 unsigned bank = __this_cpu_read(injectm.bank); in msr_to_offset() local 360 if (msr == MSR_IA32_MCx_STATUS(bank)) in msr_to_offset() 362 if (msr == MSR_IA32_MCx_ADDR(bank)) in msr_to_offset() 364 if (msr == MSR_IA32_MCx_MISC(bank)) in msr_to_offset() 585 m.bank = i; in machine_check_poll() 1062 m.bank = i; in do_machine_check() 1225 m.bank = MCE_THERMAL_BANK; in mce_log_therm_throt_event() 1454 static void quirk_sandybridge_ifu(int bank, struct mce m, struct pt_regs *regs) in quirk_sandybridge_ifu() argument [all …]
/linux-4.4.14/drivers/pinctrl/samsung/
D	pinctrl-exynos.c	63 struct samsung_pin_bank bank = irq_data_get_irq_chip_data(irqd); in exynos_irq_mask() local 64 struct samsung_pinctrl_drv_data d = bank->drvdata; in exynos_irq_mask() 65 unsigned long reg_mask = our_chip->eint_mask + bank->eint_offset; in exynos_irq_mask() 69 spin_lock_irqsave(&bank->slock, flags); in exynos_irq_mask() 75 spin_unlock_irqrestore(&bank->slock, flags); in exynos_irq_mask() 82 struct samsung_pin_bank bank = irq_data_get_irq_chip_data(irqd); in exynos_irq_ack() local 83 struct samsung_pinctrl_drv_data d = bank->drvdata; in exynos_irq_ack() 84 unsigned long reg_pend = our_chip->eint_pend + bank->eint_offset; in exynos_irq_ack() 93 struct samsung_pin_bank bank = irq_data_get_irq_chip_data(irqd); in exynos_irq_unmask() local 94 struct samsung_pinctrl_drv_data d = bank->drvdata; in exynos_irq_unmask() [all …]
D	pinctrl-s3c24xx.c	106 struct samsung_pin_bank bank; member 144 struct samsung_pin_bank bank, int pin) in s3c24xx_eint_set_function() argument 146 const struct samsung_pin_bank_type bank_type = bank->type; in s3c24xx_eint_set_function() 154 reg = d->virt_base + bank->pctl_offset; in s3c24xx_eint_set_function() 158 spin_lock_irqsave(&bank->slock, flags); in s3c24xx_eint_set_function() 162 val \|= bank->eint_func << shift; in s3c24xx_eint_set_function() 165 spin_unlock_irqrestore(&bank->slock, flags); in s3c24xx_eint_set_function() 170 struct samsung_pin_bank bank = irq_data_get_irq_chip_data(data); in s3c24xx_eint_type() local 171 struct samsung_pinctrl_drv_data *d = bank->drvdata; in s3c24xx_eint_type() 172 int index = bank->eint_offset + data->hwirq; in s3c24xx_eint_type() [all …]
D	pinctrl-samsung.c	343 struct samsung_pin_bank *bank) in pin_to_reg_bank() argument 355 if (bank) in pin_to_reg_bank() 356 bank = b; in pin_to_reg_bank() 365 struct samsung_pin_bank bank; in samsung_pinmux_setup() local 377 &reg, &pin_offset, &bank); in samsung_pinmux_setup() 378 type = bank->type; in samsung_pinmux_setup() 387 spin_lock_irqsave(&bank->slock, flags); in samsung_pinmux_setup() 395 spin_unlock_irqrestore(&bank->slock, flags); in samsung_pinmux_setup() 421 struct samsung_pin_bank bank; in samsung_pinconf_rw() local 430 &pin_offset, &bank); in samsung_pinconf_rw() [all …]
D	pinctrl-s3c64xx.c	218 struct samsung_pin_bank bank; member 273 struct samsung_pin_bank bank, int pin) in s3c64xx_irq_set_function() argument 275 const struct samsung_pin_bank_type bank_type = bank->type; in s3c64xx_irq_set_function() 283 reg = d->virt_base + bank->pctl_offset; in s3c64xx_irq_set_function() 294 spin_lock_irqsave(&bank->slock, flags); in s3c64xx_irq_set_function() 298 val \|= bank->eint_func << shift; in s3c64xx_irq_set_function() 301 spin_unlock_irqrestore(&bank->slock, flags); in s3c64xx_irq_set_function() 310 struct samsung_pin_bank bank = irq_data_get_irq_chip_data(irqd); in s3c64xx_gpio_irq_set_mask() local 311 struct samsung_pinctrl_drv_data *d = bank->drvdata; in s3c64xx_gpio_irq_set_mask() 312 unsigned char index = EINT_OFFS(bank->eint_offset) + irqd->hwirq; in s3c64xx_gpio_irq_set_mask() [all …]
/linux-4.4.14/drivers/dma/ipu/
D	ipu_irq.c	75 struct ipu_irq_bank bank; member 99 struct ipu_irq_bank bank; in ipu_irq_unmask() local 105 bank = map->bank; in ipu_irq_unmask() 106 if (!bank) { in ipu_irq_unmask() 112 reg = ipu_read_reg(bank->ipu, bank->control); in ipu_irq_unmask() 114 ipu_write_reg(bank->ipu, reg, bank->control); in ipu_irq_unmask() 122 struct ipu_irq_bank *bank; in ipu_irq_mask() local 128 bank = map->bank; in ipu_irq_mask() 129 if (!bank) { in ipu_irq_mask() 135 reg = ipu_read_reg(bank->ipu, bank->control); in ipu_irq_mask() [all …]
/linux-4.4.14/arch/mips/sgi-ip22/
D	ip22-mc.c	35 static inline unsigned int get_bank_config(int bank) in get_bank_config() argument 37 unsigned int res = bank > 1 ? sgimc->mconfig1 : sgimc->mconfig0; in get_bank_config() 38 return bank % 2 ? res & 0xffff : res >> 16; in get_bank_config() 52 struct mem bank[4]; in probe_memory() local 56 for (i = 0; i < ARRAY_SIZE(bank); i++) { in probe_memory() 61 bank[cnt].size = get_bank_size(tmp); in probe_memory() 62 bank[cnt].addr = get_bank_addr(tmp); in probe_memory() 64 i, bank[cnt].size / 1024 / 1024, bank[cnt].addr); in probe_memory() 74 if (bank[i-1].addr > bank[i].addr) { in probe_memory() 75 addr = bank[i].addr; in probe_memory() [all …]
/linux-4.4.14/sound/pci/au88x0/
D	au88x0_wt.h	`20 #define WT_CTRL(bank) (((((bank)&1)<<0xd) + 0x00)<<2) /* 0x0000 / argument 21 #define WT_SRAMP(bank) (((((bank)&1)<<0xd) + 0x01)<<2) / 0x0004 / argument 22 #define WT_DSREG(bank) (((((bank)&1)<<0xd) + 0x02)<<2) / 0x0008 / argument 23 #define WT_MRAMP(bank) (((((bank)&1)<<0xd) + 0x03)<<2) / 0x000c / argument 24 #define WT_GMODE(bank) (((((bank)&1)<<0xd) + 0x04)<<2) / 0x0010 / argument 25 #define WT_ARAMP(bank) (((((bank)&1)<<0xd) + 0x05)<<2) / 0x0014 */ argument`
/linux-4.4.14/drivers/pinctrl/sunxi/
D	pinctrl-sunxi.h	32 #define SUNXI_PINCTRL_PIN(bank, pin) \ argument 33 PINCTRL_PIN(P ## bank ## _BASE + (pin), "P" #bank #pin) 179 u8 bank = pin / PINS_PER_BANK; in sunxi_mux_reg() local 180 u32 offset = bank * BANK_MEM_SIZE; in sunxi_mux_reg() 194 u8 bank = pin / PINS_PER_BANK; in sunxi_data_reg() local 195 u32 offset = bank * BANK_MEM_SIZE; in sunxi_data_reg() 209 u8 bank = pin / PINS_PER_BANK; in sunxi_dlevel_reg() local 210 u32 offset = bank * BANK_MEM_SIZE; in sunxi_dlevel_reg() 224 u8 bank = pin / PINS_PER_BANK; in sunxi_pull_reg() local 225 u32 offset = bank * BANK_MEM_SIZE; in sunxi_pull_reg() [all …]
/linux-4.4.14/drivers/leds/
D	leds-tca6507.c	170 struct bank { struct 175 } bank[3]; member 186 int bank; /* Bank used, or -1 / member 292 static void set_code(struct tca6507_chip tca, int reg, int bank, int new) in set_code() argument 296 if (bank) { in set_code() 309 static void set_level(struct tca6507_chip tca, int bank, int level) in set_level() argument 311 switch (bank) { in set_level() 314 set_code(tca, TCA6507_MAX_INTENSITY, bank, level); in set_level() 320 tca->bank[bank].level = level; in set_level() 324 static void set_times(struct tca6507_chip tca, int bank) in set_times() argument [all …]
D	leds-mc13783.c	`62 unsigned int reg, bank, off, shift; in mc13xxx_led_work() local 81 bank = off / 3; in mc13xxx_led_work() 82 reg = 3 + bank; in mc13xxx_led_work() 83 shift = (off - bank * 3) * 5 + 6; in mc13xxx_led_work() 95 bank = off / 2; in mc13xxx_led_work() 96 reg = 2 + bank; in mc13xxx_led_work() 97 shift = (off - bank * 2) * 12 + 3; in mc13xxx_led_work()`
/linux-4.4.14/drivers/memory/
D	jz4780-nemc.c	67 unsigned int bank, count = 0; in jz4780_nemc_num_banks() local 72 bank = of_read_number(prop, 1); in jz4780_nemc_num_banks() 73 if (!(referenced & BIT(bank))) { in jz4780_nemc_num_banks() 74 referenced \|= BIT(bank); in jz4780_nemc_num_banks() 89 void jz4780_nemc_set_type(struct device dev, unsigned int bank, in jz4780_nemc_set_type() argument 100 nfcsr &= ~(NEMC_NFCSR_TNFEn(bank) \| NEMC_NFCSR_NFEn(bank)); in jz4780_nemc_set_type() 103 nfcsr &= ~NEMC_NFCSR_TNFEn(bank); in jz4780_nemc_set_type() 104 nfcsr \|= NEMC_NFCSR_NFEn(bank); in jz4780_nemc_set_type() 121 void jz4780_nemc_assert(struct device dev, unsigned int bank, bool assert) in jz4780_nemc_assert() argument 129 nfcsr \|= NEMC_NFCSR_NFCEn(bank); in jz4780_nemc_assert() [all …]
/linux-4.4.14/arch/xtensa/mm/
D	init.c	43 sysmem.bank[i].start, sysmem.bank[i].end, in sysmem_dump() 44 (sysmem.bank[i].end - sysmem.bank[i].start) >> 10); in sysmem_dump() 56 if (sysmem.bank[i].start <= start) in find_bank() 57 it = sysmem.bank + i; in find_bank() 72 unsigned n = sysmem.nr_banks - (from - sysmem.bank); in move_banks() 118 it = sysmem.bank; in add_sysmem_bank() 122 if (it - sysmem.bank < sysmem.nr_banks && in add_sysmem_bank() 141 for (i = it + 1 - sysmem.bank; i < sysmem.nr_banks; ++i) in add_sysmem_bank() 142 if (sysmem.bank[i].start - it->start <= sz) { in add_sysmem_bank() 143 if (sz < sysmem.bank[i].end - it->start) in add_sysmem_bank() [all …]
/linux-4.4.14/drivers/pinctrl/sirf/
D	pinctrl-sirf.c	422 struct sirfsoc_gpio_bank bank = sirfsoc_gpio_to_bank(sgpio, d->hwirq); in sirfsoc_gpio_irq_ack() local 427 offset = SIRFSOC_GPIO_CTRL(bank->id, idx); in sirfsoc_gpio_irq_ack() 439 struct sirfsoc_gpio_bank bank, in __sirfsoc_gpio_irq_mask() argument 445 offset = SIRFSOC_GPIO_CTRL(bank->id, idx); in __sirfsoc_gpio_irq_mask() 461 struct sirfsoc_gpio_bank bank = sirfsoc_gpio_to_bank(sgpio, d->hwirq); in sirfsoc_gpio_irq_mask() local 463 __sirfsoc_gpio_irq_mask(sgpio, bank, d->hwirq % SIRFSOC_GPIO_BANK_SIZE); in sirfsoc_gpio_irq_mask() 470 struct sirfsoc_gpio_bank bank = sirfsoc_gpio_to_bank(sgpio, d->hwirq); in sirfsoc_gpio_irq_unmask() local 475 offset = SIRFSOC_GPIO_CTRL(bank->id, idx); in sirfsoc_gpio_irq_unmask() 491 struct sirfsoc_gpio_bank *bank = sirfsoc_gpio_to_bank(sgpio, d->hwirq); in sirfsoc_gpio_irq_type() local 496 offset = SIRFSOC_GPIO_CTRL(bank->id, idx); in sirfsoc_gpio_irq_type() [all …]
D	pinctrl-atlas7.c	235 u32 bank; member 246 .bank = b, \ 4993 u32 bank, u32 ad_sel) in __atlas7_pmx_pin_ad_sel() argument 4999 pmx->regs[bank] + CLR_REG(conf->ad_ctrl_reg)); in __atlas7_pmx_pin_ad_sel() 5002 regv = readl(pmx->regs[bank] + conf->ad_ctrl_reg); in __atlas7_pmx_pin_ad_sel() 5005 pmx->regs[bank] + conf->ad_ctrl_reg); in __atlas7_pmx_pin_ad_sel() 5007 regv = readl(pmx->regs[bank] + conf->ad_ctrl_reg); in __atlas7_pmx_pin_ad_sel() 5009 bank, conf->ad_ctrl_reg, regv); in __atlas7_pmx_pin_ad_sel() 5014 struct atlas7_pad_config *conf, u32 bank) in __atlas7_pmx_pin_analog_enable() argument 5020 return __atlas7_pmx_pin_ad_sel(pmx, conf, bank, 0); in __atlas7_pmx_pin_analog_enable() [all …]
D	pinctrl-sirf.h	`36 #define SIRFSOC_GPIO_NUM(bank, index) (((bank)*(32)) + (index)) argument`
/linux-4.4.14/drivers/hwspinlock/
D	u8500_hsem.c	97 struct hwspinlock_device bank; in u8500_hsem_probe() local 122 bank = kzalloc(sizeof(bank) + num_locks * sizeof(hwlock), GFP_KERNEL); in u8500_hsem_probe() 123 if (!bank) { in u8500_hsem_probe() 128 platform_set_drvdata(pdev, bank); in u8500_hsem_probe() 130 for (i = 0, hwlock = &bank->lock[0]; i < num_locks; i++, hwlock++) in u8500_hsem_probe() 136 ret = hwspin_lock_register(bank, &pdev->dev, &u8500_hwspinlock_ops, in u8500_hsem_probe() 145 kfree(bank); in u8500_hsem_probe() 153 struct hwspinlock_device bank = platform_get_drvdata(pdev); in u8500_hsem_remove() local 154 void __iomem *io_base = bank->lock[0].priv - HSEM_REGISTER_OFFSET; in u8500_hsem_remove() 160 ret = hwspin_lock_unregister(bank); in u8500_hsem_remove() [all …]
D	hwspinlock_core.c	121 ret = hwlock->bank->ops->trylock(hwlock); in __hwspin_trylock() 203 if (hwlock->bank->ops->relax) in __hwspin_lock_timeout() 204 hwlock->bank->ops->relax(hwlock); in __hwspin_lock_timeout() 249 hwlock->bank->ops->unlock(hwlock); in __hwspin_unlock() 321 if (hwlock->bank->dev->of_node == args.np) { in of_hwspin_lock_get_id() 331 if (id < 0 \|\| id >= hwlock->bank->num_locks) { in of_hwspin_lock_get_id() 335 id += hwlock->bank->base_id; in of_hwspin_lock_get_id() 408 int hwspin_lock_register(struct hwspinlock_device bank, struct device dev, in hwspin_lock_register() argument 414 if (!bank \|\| !ops \|\| !dev \|\| !num_locks \|\| !ops->trylock \|\| in hwspin_lock_register() 420 bank->dev = dev; in hwspin_lock_register() [all …]
D	omap_hwspinlock.c	85 struct hwspinlock_device bank; in omap_hwspinlock_probe() local 135 bank = kzalloc(sizeof(bank) + num_locks * sizeof(hwlock), GFP_KERNEL); in omap_hwspinlock_probe() 136 if (!bank) { in omap_hwspinlock_probe() 141 platform_set_drvdata(pdev, bank); in omap_hwspinlock_probe() 143 for (i = 0, hwlock = &bank->lock[0]; i < num_locks; i++, hwlock++) in omap_hwspinlock_probe() 146 ret = hwspin_lock_register(bank, &pdev->dev, &omap_hwspinlock_ops, in omap_hwspinlock_probe() 154 kfree(bank); in omap_hwspinlock_probe() 163 struct hwspinlock_device bank = platform_get_drvdata(pdev); in omap_hwspinlock_remove() local 164 void __iomem *io_base = bank->lock[0].priv - LOCK_BASE_OFFSET; in omap_hwspinlock_remove() 167 ret = hwspin_lock_unregister(bank); in omap_hwspinlock_remove() [all …]
D	qcom_hwspinlock.c	84 struct hwspinlock_device bank; in qcom_hwspinlock_probe() local 117 bank = devm_kzalloc(&pdev->dev, sizeof(bank) + array_size, GFP_KERNEL); in qcom_hwspinlock_probe() 118 if (!bank) in qcom_hwspinlock_probe() 121 platform_set_drvdata(pdev, bank); in qcom_hwspinlock_probe() 128 bank->lock[i].priv = devm_regmap_field_alloc(&pdev->dev, in qcom_hwspinlock_probe() 134 ret = hwspin_lock_register(bank, &pdev->dev, &qcom_hwspinlock_ops, in qcom_hwspinlock_probe() 144 struct hwspinlock_device *bank = platform_get_drvdata(pdev); in qcom_hwspinlock_remove() local 147 ret = hwspin_lock_unregister(bank); in qcom_hwspinlock_remove()
D	hwspinlock_internal.h	`49 struct hwspinlock_device *bank; member 72 int local_id = hwlock - &hwlock->bank->lock[0]; in hwlock_to_id() 74 return hwlock->bank->base_id + local_id; in hwlock_to_id()`
D	sirf_hwspinlock.c	`25 struct hwspinlock_device bank; member 76 hwlock = &hwspin->bank.lock[idx]; in sirf_hwspinlock_probe() 84 ret = hwspin_lock_register(&hwspin->bank, &pdev->dev, in sirf_hwspinlock_probe() 104 ret = hwspin_lock_unregister(&hwspin->bank); in sirf_hwspinlock_remove()`
/linux-4.4.14/drivers/staging/vme/devices/
D	vme_pio2_gpio.c	39 if ((card->bank[PIO2_CHANNEL_BANK[offset]].config == OUTPUT) \| in pio2_gpio_get() 40 (card->bank[PIO2_CHANNEL_BANK[offset]].config == NOFIT)) { in pio2_gpio_get() 58 if (card->bank[PIO2_CHANNEL_BANK[offset]].config != BOTH) in pio2_gpio_get() 64 if (card->bank[PIO2_CHANNEL_BANK[offset]].config != BOTH) in pio2_gpio_get() 77 if ((card->bank[PIO2_CHANNEL_BANK[offset]].config == INPUT) \| in pio2_gpio_set() 78 (card->bank[PIO2_CHANNEL_BANK[offset]].config == NOFIT)) { in pio2_gpio_set() 85 reg = card->bank[PIO2_CHANNEL_BANK[offset]].value \| in pio2_gpio_set() 88 reg = card->bank[PIO2_CHANNEL_BANK[offset]].value & in pio2_gpio_set() 98 card->bank[PIO2_CHANNEL_BANK[offset]].value = reg; in pio2_gpio_set() 107 if ((card->bank[PIO2_CHANNEL_BANK[offset]].config == OUTPUT) \| in pio2_gpio_dir_in() [all …]
/linux-4.4.14/arch/mips/sgi-ip32/
D	ip32-memory.c	`25 int bank; in prom_meminit() local 29 for (bank=0; bank < CRIME_MAXBANKS; bank++) { in prom_meminit() 30 u64 bankctl = crime->bank_ctrl[bank]; in prom_meminit() 32 if (bank != 0 && base == 0) in prom_meminit() 40 bank, base, size >> 20); in prom_meminit()`
/linux-4.4.14/arch/blackfin/kernel/
D	bfin_gpio.c	547 u16 bank, mask, i; in bfin_gpio_pm_standby_ctrl() local 551 bank = gpio_bank(i); in bfin_gpio_pm_standby_ctrl() 554 bfin_internal_set_wake(sic_iwr_irqs[bank], ctrl); in bfin_gpio_pm_standby_ctrl() 561 int i, bank; in bfin_gpio_pm_hibernate_suspend() local 569 bank = gpio_bank(i); in bfin_gpio_pm_hibernate_suspend() 572 gpio_bank_saved[bank].fer = port_fer[bank]; in bfin_gpio_pm_hibernate_suspend() 574 gpio_bank_saved[bank].mux = port_mux[bank]; in bfin_gpio_pm_hibernate_suspend() 576 if (bank == 0) in bfin_gpio_pm_hibernate_suspend() 577 gpio_bank_saved[bank].mux = bfin_read_PORT_MUX(); in bfin_gpio_pm_hibernate_suspend() 580 gpio_bank_saved[bank].data = gpio_array[bank]->data; in bfin_gpio_pm_hibernate_suspend() [all …]
/linux-4.4.14/drivers/mfd/
D	ab8500-sysctrl.c	91 static inline bool valid_bank(u8 bank) in valid_bank() argument 93 return ((bank == AB8500_SYS_CTRL1_BLOCK) \|\| in valid_bank() 94 (bank == AB8500_SYS_CTRL2_BLOCK)); in valid_bank() 99 u8 bank; in ab8500_sysctrl_read() local 104 bank = (reg >> 8); in ab8500_sysctrl_read() 105 if (!valid_bank(bank)) in ab8500_sysctrl_read() 108 return abx500_get_register_interruptible(sysctrl_dev, bank, in ab8500_sysctrl_read() 115 u8 bank; in ab8500_sysctrl_write() local 120 bank = (reg >> 8); in ab8500_sysctrl_write() 121 if (!valid_bank(bank)) in ab8500_sysctrl_write() [all …]
D	abx500-core.c	64 int abx500_set_register_interruptible(struct device dev, u8 bank, u8 reg, in abx500_set_register_interruptible() argument 71 return ops->set_register(dev, bank, reg, value); in abx500_set_register_interruptible() 77 int abx500_get_register_interruptible(struct device dev, u8 bank, u8 reg, in abx500_get_register_interruptible() argument 84 return ops->get_register(dev, bank, reg, value); in abx500_get_register_interruptible() 90 int abx500_get_register_page_interruptible(struct device dev, u8 bank, in abx500_get_register_page_interruptible() argument 97 return ops->get_register_page(dev, bank, in abx500_get_register_page_interruptible() 104 int abx500_mask_and_set_register_interruptible(struct device dev, u8 bank, in abx500_mask_and_set_register_interruptible() argument 111 return ops->mask_and_set_register(dev, bank, in abx500_mask_and_set_register_interruptible()
D	asic3.c	152 int bank; in asic3_irq_demux() local 164 for (bank = 0; bank < ASIC3_NUM_GPIO_BANKS; bank++) { in asic3_irq_demux() 165 if (status & (1 << bank)) { in asic3_irq_demux() 169 + bank * ASIC3_GPIO_BASE_INCR; in asic3_irq_demux() 189 (ASIC3_GPIOS_PER_BANK * bank) in asic3_irq_demux() 192 if (asic->irq_bothedge[bank] & bit) in asic3_irq_demux() 228 u32 val, bank, index; in asic3_mask_gpio_irq() local 231 bank = asic3_irq_to_bank(asic, data->irq); in asic3_mask_gpio_irq() 235 val = asic3_read_register(asic, bank + ASIC3_GPIO_MASK); in asic3_mask_gpio_irq() 237 asic3_write_register(asic, bank + ASIC3_GPIO_MASK, val); in asic3_mask_gpio_irq() [all …]
D	ab8500-debugfs.c	137 u32 bank; /* target bank / member 1285 static int ab8500_registers_print(struct device dev, u32 bank, in ab8500_registers_print() argument 1290 for (i = 0; i < debug_ranges[bank].num_ranges; i++) { in ab8500_registers_print() 1293 for (reg = debug_ranges[bank].range[i].first; in ab8500_registers_print() 1294 reg <= debug_ranges[bank].range[i].last; in ab8500_registers_print() 1300 (u8)bank, (u8)reg, &value); in ab8500_registers_print() 1308 bank, reg, value); in ab8500_registers_print() 1315 bank, reg, value); in ab8500_registers_print() 1326 u32 bank = debug_bank; in ab8500_print_bank_registers() local 1330 seq_printf(s, " bank 0x%02X:\n", bank); in ab8500_print_bank_registers() [all …]
D	ezx-pcap.c	`25 u8 bank; member 257 if (pcap->adc_queue[head]->bank == PCAP_ADC_BANK_1) in pcap_adc_trigger() 304 int pcap_adc_async(struct pcap_chip pcap, u8 bank, u32 flags, u8 ch[], in pcap_adc_async() argument 314 req->bank = bank; in pcap_adc_async() 347 int pcap_adc_sync(struct pcap_chip pcap, u8 bank, u32 flags, u8 ch[], in pcap_adc_sync() argument 354 ret = pcap_adc_async(pcap, bank, flags, ch, pcap_adc_sync_cb, in pcap_adc_sync()`
/linux-4.4.14/drivers/uio/
D	uio_fsl_elbc_gpcm.c	57 u32 bank; member 79 struct fsl_lbc_bank bank = &priv->lbc->bank[priv->bank]; in reg_show() local 83 in_be32(&bank->br)); in reg_show() 87 in_be32(&bank->or)); in reg_show() 99 struct fsl_lbc_bank bank = &priv->lbc->bank[priv->bank]; in reg_store() local 111 reg_br_cur = in_be32(&bank->br); in reg_store() 112 reg_or_cur = in_be32(&bank->or); in reg_store() 126 out_be32(&bank->br, reg_new \| BR_V); in reg_store() 134 out_be32(&bank->or, reg_new); in reg_store() 218 if (priv->bank >= MAX_BANKS) { in check_of_data() [all …]
/linux-4.4.14/Documentation/devicetree/bindings/pinctrl/
D	pinctrl-st.txt	14 GPIO bank can have one of the two possible types of interrupt-wirings. 20 \| \|----> [gpio-bank (n) ] 21 \| \|----> [gpio-bank (n + 1)] 22 [irqN]-- \| irq-mux \|----> [gpio-bank (n + 2)] 23 \| \|----> [gpio-bank (... )] 24 \|_________\|----> [gpio-bank (n + 7)] 26 Second type has a dedicated interrupt per gpio bank. 28 [irqN]----> [gpio-bank (n)] 38 bank are capable of retiming. Retiming is mainly used to improve the 40 - ranges : defines mapping between pin controller node (parent) to gpio-bank [all …]
D	pinctrl-sirf.txt	`10 - sirf,pullups : if n-th bit of m-th bank is set, set a pullup on GPIO-n of bank m 11 - sirf,pulldowns : if n-th bit of m-th bank is set, set a pulldown on GPIO-n of bank m`
D	rockchip,pinctrl.txt	`41 - compatible: "rockchip,gpio-bank" 42 - reg: register of the gpio bank (different than the iomux registerset) 43 - interrupts: base interrupt of the gpio bank in the interrupt controller 44 - clocks: clock that drives this bank 45 - gpio-controller: identifies the node as a gpio controller and pin bank. 81 compatible = "rockchip,gpio-bank"; 144 compatible = "rockchip,gpio-bank";`
D	samsung-pinctrl.txt	28 bank node must contain following properties: 30 - gpio-controller: identifies the node as a gpio controller and pin bank. 60 an example, the pins in GPA0 bank of the pin controller can be represented 63 "[pin bank name]-[pin number within the bank]". 72 function selector register of the pin-bank. 111 In addition, following properties must be present in node of every bank 146 In addition, following properties must be present in node of every bank 160 Node of every bank of pins supporting direct wake-up interrupts (without 166 wakeup interrupts from pins of the bank, must contain interrupts for all 167 pins of the bank. [all …]
D	allwinner,sunxi-pinctrl.txt	`4 each bank has 32 pins. Each pin has 7 multiplexing functions, with 82 cell with 3 arguments, first the number of the bank, then the pin 83 inside that bank, and finally the flags for the GPIO/interrupts.`
/linux-4.4.14/drivers/mtd/nand/
D	jz4740_nand.c	328 struct jz_nand *nand, unsigned char bank, in jz_nand_detect_bank() argument 341 gpio = JZ_GPIO_MEM_CS0 + bank - 1; in jz_nand_detect_bank() 342 sprintf(gpio_name, "NAND CS%d", bank); in jz_nand_detect_bank() 352 sprintf(res_name, "bank%d", bank); in jz_nand_detect_bank() 354 &nand->bank_mem[bank - 1], in jz_nand_detect_bank() 355 &nand->bank_base[bank - 1]); in jz_nand_detect_bank() 362 ctrl \|= JZ_NAND_CTRL_ENABLE_CHIP(bank - 1); in jz_nand_detect_bank() 393 dev_info(&pdev->dev, "Found chip %i on bank %i\n", chipnr, bank); in jz_nand_detect_bank() 397 dev_info(&pdev->dev, "No chip found on bank %i\n", bank); in jz_nand_detect_bank() 398 ctrl &= ~(JZ_NAND_CTRL_ENABLE_CHIP(bank - 1)); in jz_nand_detect_bank() [all …]
D	fsmc_nand.c	308 unsigned int bank; member 326 void (select_chip)(uint32_t bank, uint32_t busw); 365 unsigned int bank = host->bank; in fsmc_cmd_ctrl() local 381 pc = readl(FSMC_NAND_REG(regs, bank, PC)); in fsmc_cmd_ctrl() 386 writel_relaxed(pc, FSMC_NAND_REG(regs, bank, PC)); in fsmc_cmd_ctrl() 401 static void fsmc_nand_setup(void __iomem regs, uint32_t bank, in fsmc_nand_setup() argument 430 FSMC_NAND_REG(regs, bank, PC)); in fsmc_nand_setup() 433 FSMC_NAND_REG(regs, bank, PC)); in fsmc_nand_setup() 435 writel_relaxed(readl(FSMC_NAND_REG(regs, bank, PC)) \| tclr \| tar, in fsmc_nand_setup() 436 FSMC_NAND_REG(regs, bank, PC)); in fsmc_nand_setup() [all …]
D	fsl_elbc_nand.c	56 int bank; /* Chip select bank number */ member 216 in_be32(&lbc->fbcr), priv->bank); in fsl_elbc_run_command() 220 out_be32(&lbc->lsor, priv->bank); in fsl_elbc_run_command() 675 clrbits32(&lbc->bank[priv->bank].or, OR_FCM_PGS); in fsl_elbc_chip_init_tail() 678 setbits32(&lbc->bank[priv->bank].or, OR_FCM_PGS); in fsl_elbc_chip_init_tail() 680 if ((in_be32(&lbc->bank[priv->bank].br) & BR_DECC) == in fsl_elbc_chip_init_tail() 746 dev_dbg(priv->dev, "eLBC Set Information for bank %d\n", priv->bank); in fsl_elbc_chip_init() 754 if (in_be32(&lbc->bank[priv->bank].or) & OR_FCM_PGS) in fsl_elbc_chip_init() 780 if ((in_be32(&lbc->bank[priv->bank].br) & BR_DECC) == in fsl_elbc_chip_init() 807 elbc_fcm_ctrl->chips[priv->bank] = NULL; in fsl_elbc_chip_remove() [all …]
D	fsl_ifc_nand.c	48 int bank; /* Chip select bank number / member 304 ifc_out32(priv->bank << IFC_NAND_CSEL_SHIFT, in fsl_ifc_run_command() 831 uint32_t cs = priv->bank; in fsl_ifc_sram_init() 889 if ((ifc_in32(&ifc->cspr_cs[priv->bank].cspr)) & CSPR_PORT_SIZE_16) in fsl_ifc_chip_init() 909 if (ifc_in32(&ifc->cspr_cs[priv->bank].cspr) & CSPR_PORT_SIZE_16) { in fsl_ifc_chip_init() 922 csor = ifc_in32(&ifc->csor_cs[priv->bank].csor); in fsl_ifc_chip_init() 1003 ifc_nand_ctrl->chips[priv->bank] = NULL; in fsl_ifc_chip_remove() 1008 static int match_bank(struct fsl_ifc_regs __iomem ifc, int bank, in match_bank() argument 1011 u32 cspr = ifc_in32(&ifc->cspr_cs[bank].cspr); in match_bank() 1031 int bank; in fsl_ifc_nand_probe() local [all …]
/linux-4.4.14/arch/unicore32/mm/
D	init.c	70 struct membank bank = &mi->bank[i]; in show_mem() local 74 pfn1 = bank_pfn_start(bank); in show_mem() 75 pfn2 = bank_pfn_end(bank); in show_mem() 114 struct membank bank = &mi->bank[i]; in find_limits() local 117 start = bank_pfn_start(bank); in find_limits() 118 end = bank_pfn_end(bank); in find_limits() 124 if (bank->highmem) in find_limits() 246 sort(&meminfo.bank, meminfo.nr_banks, sizeof(meminfo.bank[0]), in uc32_memblock_init() 250 memblock_add(mi->bank[i].start, mi->bank[i].size); in uc32_memblock_init() 356 struct membank *bank = &mi->bank[i]; in free_unused_memmap() local [all …]
/linux-4.4.14/arch/arm/mach-omap2/
D	powerdomain.h	187 int (pwrdm_set_mem_onst)(struct powerdomain pwrdm, u8 bank, u8 pwrst); 188 int (pwrdm_set_mem_retst)(struct powerdomain pwrdm, u8 bank, u8 pwrst); 192 int (pwrdm_read_mem_pwrst)(struct powerdomain pwrdm, u8 bank); 193 int (pwrdm_read_prev_mem_pwrst)(struct powerdomain pwrdm, u8 bank); 194 int (pwrdm_read_mem_retst)(struct powerdomain pwrdm, u8 bank); 228 int pwrdm_set_mem_onst(struct powerdomain pwrdm, u8 bank, u8 pwrst); 229 int pwrdm_set_mem_retst(struct powerdomain pwrdm, u8 bank, u8 pwrst); 234 int pwrdm_read_mem_pwrst(struct powerdomain pwrdm, u8 bank); 235 int pwrdm_read_prev_mem_pwrst(struct powerdomain pwrdm, u8 bank); 236 int pwrdm_read_mem_retst(struct powerdomain *pwrdm, u8 bank); [all …]
D	powerdomain-common.c	`50 u32 omap2_pwrdm_get_mem_bank_onstate_mask(u8 bank) in omap2_pwrdm_get_mem_bank_onstate_mask() argument 52 switch (bank) { in omap2_pwrdm_get_mem_bank_onstate_mask() 70 u32 omap2_pwrdm_get_mem_bank_retst_mask(u8 bank) in omap2_pwrdm_get_mem_bank_retst_mask() argument 72 switch (bank) { in omap2_pwrdm_get_mem_bank_retst_mask() 90 u32 omap2_pwrdm_get_mem_bank_stst_mask(u8 bank) in omap2_pwrdm_get_mem_bank_stst_mask() argument 92 switch (bank) { in omap2_pwrdm_get_mem_bank_stst_mask()`
D	prm2xxx_3xxx.c	114 int omap2_pwrdm_set_mem_onst(struct powerdomain pwrdm, u8 bank, in omap2_pwrdm_set_mem_onst() argument 119 m = omap2_pwrdm_get_mem_bank_onstate_mask(bank); in omap2_pwrdm_set_mem_onst() 127 int omap2_pwrdm_set_mem_retst(struct powerdomain pwrdm, u8 bank, in omap2_pwrdm_set_mem_retst() argument 132 m = omap2_pwrdm_get_mem_bank_retst_mask(bank); in omap2_pwrdm_set_mem_retst() 140 int omap2_pwrdm_read_mem_pwrst(struct powerdomain pwrdm, u8 bank) in omap2_pwrdm_read_mem_pwrst() argument 144 m = omap2_pwrdm_get_mem_bank_stst_mask(bank); in omap2_pwrdm_read_mem_pwrst() 150 int omap2_pwrdm_read_mem_retst(struct powerdomain pwrdm, u8 bank) in omap2_pwrdm_read_mem_retst() argument 154 m = omap2_pwrdm_get_mem_bank_retst_mask(bank); in omap2_pwrdm_read_mem_retst()
D	powerdomain.c	647 int pwrdm_set_mem_onst(struct powerdomain pwrdm, u8 bank, u8 pwrst) in pwrdm_set_mem_onst() argument 654 if (pwrdm->banks < (bank + 1)) in pwrdm_set_mem_onst() 657 if (!(pwrdm->pwrsts_mem_on[bank] & (1 << pwrst))) in pwrdm_set_mem_onst() 661 pwrdm->name, bank, pwrst); in pwrdm_set_mem_onst() 664 ret = arch_pwrdm->pwrdm_set_mem_onst(pwrdm, bank, pwrst); in pwrdm_set_mem_onst() 685 int pwrdm_set_mem_retst(struct powerdomain pwrdm, u8 bank, u8 pwrst) in pwrdm_set_mem_retst() argument 692 if (pwrdm->banks < (bank + 1)) in pwrdm_set_mem_retst() 695 if (!(pwrdm->pwrsts_mem_ret[bank] & (1 << pwrst))) in pwrdm_set_mem_retst() 699 pwrdm->name, bank, pwrst); in pwrdm_set_mem_retst() 702 ret = arch_pwrdm->pwrdm_set_mem_retst(pwrdm, bank, pwrst); in pwrdm_set_mem_retst() [all …]
D	prm33xx.c	246 static int am33xx_pwrdm_set_mem_onst(struct powerdomain pwrdm, u8 bank, in am33xx_pwrdm_set_mem_onst() argument 251 m = pwrdm->mem_on_mask[bank]; in am33xx_pwrdm_set_mem_onst() 261 static int am33xx_pwrdm_set_mem_retst(struct powerdomain pwrdm, u8 bank, in am33xx_pwrdm_set_mem_retst() argument 266 m = pwrdm->mem_ret_mask[bank]; in am33xx_pwrdm_set_mem_retst() 276 static int am33xx_pwrdm_read_mem_pwrst(struct powerdomain pwrdm, u8 bank) in am33xx_pwrdm_read_mem_pwrst() argument 280 m = pwrdm->mem_pwrst_mask[bank]; in am33xx_pwrdm_read_mem_pwrst() 291 static int am33xx_pwrdm_read_mem_retst(struct powerdomain pwrdm, u8 bank) in am33xx_pwrdm_read_mem_retst() argument 295 m = pwrdm->mem_retst_mask[bank]; in am33xx_pwrdm_read_mem_retst()
D	prm44xx.c	498 static int omap4_pwrdm_set_mem_onst(struct powerdomain pwrdm, u8 bank, in omap4_pwrdm_set_mem_onst() argument 503 m = omap2_pwrdm_get_mem_bank_onstate_mask(bank); in omap4_pwrdm_set_mem_onst() 512 static int omap4_pwrdm_set_mem_retst(struct powerdomain pwrdm, u8 bank, in omap4_pwrdm_set_mem_retst() argument 517 m = omap2_pwrdm_get_mem_bank_retst_mask(bank); in omap4_pwrdm_set_mem_retst() 578 static int omap4_pwrdm_read_mem_pwrst(struct powerdomain pwrdm, u8 bank) in omap4_pwrdm_read_mem_pwrst() argument 582 m = omap2_pwrdm_get_mem_bank_stst_mask(bank); in omap4_pwrdm_read_mem_pwrst() 592 static int omap4_pwrdm_read_mem_retst(struct powerdomain pwrdm, u8 bank) in omap4_pwrdm_read_mem_retst() argument 596 m = omap2_pwrdm_get_mem_bank_retst_mask(bank); in omap4_pwrdm_read_mem_retst() 620 static int omap4_pwrdm_read_prev_mem_pwrst(struct powerdomain *pwrdm, u8 bank) in omap4_pwrdm_read_prev_mem_pwrst() argument 632 return omap4_pwrdm_read_mem_retst(pwrdm, bank); in omap4_pwrdm_read_prev_mem_pwrst()
D	prm2xxx_3xxx.h	`113 extern int omap2_pwrdm_set_mem_onst(struct powerdomain pwrdm, u8 bank, 115 extern int omap2_pwrdm_set_mem_retst(struct powerdomain pwrdm, u8 bank, 117 extern int omap2_pwrdm_read_mem_pwrst(struct powerdomain pwrdm, u8 bank); 118 extern int omap2_pwrdm_read_mem_retst(struct powerdomain pwrdm, u8 bank);`
/linux-4.4.14/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/
D	gpio.txt	`10 - compatible : "fsl,cpm1-pario-bank-a", "fsl,cpm1-pario-bank-b", 11 "fsl,cpm1-pario-bank-c", "fsl,cpm1-pario-bank-d", 12 "fsl,cpm1-pario-bank-e", "fsl,cpm2-pario-bank" 21 compatible = "fsl,cpm1-pario-bank-a"; 28 compatible = "fsl,cpm1-pario-bank-b"; 35 compatible = "fsl,cpm1-pario-bank-e";`
/linux-4.4.14/Documentation/devicetree/bindings/gpio/
D	gpio-tz1090.txt	`9 - #address-cells: Should be 1 (for bank subnodes) 11 - #size-cells: Should be 0 (for bank subnodes) 13 - Each bank of GPIOs should have a subnode to represent it. 16 - reg: Index of bank in the range 0 to 2. 23 [gpio number within the gpio bank] 37 - interrupts: Interrupt for the entire bank 44 [gpio number within the gpio bank] 68 /* bank 0 with an interrupt / 69 gpios0: bank@0 { 79 / bank 2 without interrupt */ [all …]`
D	brcm,brcmstb-gpio.txt	`4 registers with each set controlling a bank of up to 32 pins. A single 24 - brcm,gpio-bank-widths: 25 Number of GPIO lines for each bank. Number of elements must 70 brcm,gpio-bank-widths = <32 32 32 24>; 85 brcm,gpio-bank-widths = <18 4>;`
D	gpio-nmk.txt	`17 - gpio-bank : Specifies which bank a controller owns. 30 gpio-bank = <1>;`
D	brcm,kona-gpio.txt	`8 support up to 8 banks of 32 GPIOs where each bank has its own IRQ. The 17 interrupt per GPIO bank. The number of interrupts listed depends on the 18 number of GPIO banks on the SoC. The interrupts must be ordered by bank, 19 starting with bank 0. There is always a 1:1 mapping between banks and`
D	gpio-mcp23s08.txt	`53 those that have 16 IOs) have two IO banks: IO 0-7 form bank 1 and 54 IO 8-15 are bank 2. These chips have two different interrupt outputs: 55 One for bank 1 and another for bank 2. If irq-mirror is set, both 56 interrupts are generated regardless of the bank that an input change 58 bank they belong to.`
D	gpio_lpc32xx.txt	`8 1) bank: 26 #gpio-cells = <3>; /* bank, pin, flags */`
D	gpio.txt	`55 gpio-specifier may encode: bank, pin position inside the bank, 184 compatible = "fsl,qe-pario-bank-a", "fsl,qe-pario-bank"; 198 compatible = "fsl,qe-pario-bank-e", "fsl,qe-pario-bank"; 252 compatible = "fsl,qe-pario-bank-e", "fsl,qe-pario-bank"; 266 compatible = "fsl,qe-pario-bank-e", "fsl,qe-pario-bank";`
/linux-4.4.14/drivers/mtd/devices/
D	spear_smi.c	196 u32 bank; member 221 static int spear_smi_read_sr(struct spear_smi dev, u32 bank) in spear_smi_read_sr() argument 234 writel((bank << BANK_SHIFT) \| RD_STATUS_REG \| TFIE, in spear_smi_read_sr() 264 static int spear_smi_wait_till_ready(struct spear_smi dev, u32 bank, in spear_smi_wait_till_ready() argument 272 status = spear_smi_read_sr(dev, bank); in spear_smi_wait_till_ready() 379 static int spear_smi_write_enable(struct spear_smi *dev, u32 bank) in spear_smi_write_enable() argument 392 writel((bank << BANK_SHIFT) \| WE \| TFIE, dev->io_base + SMI_CR2); in spear_smi_write_enable() 407 if (dev->status & (1 << (bank + WM_SHIFT))) in spear_smi_write_enable() 445 u32 bank, u32 command, u32 bytes) in spear_smi_erase_sector() argument 450 ret = spear_smi_wait_till_ready(dev, bank, SMI_MAX_TIME_OUT); in spear_smi_erase_sector() [all …]
/linux-4.4.14/drivers/reset/
D	reset-zynq.c	40 int bank = id / BITS_PER_LONG; in zynq_reset_assert() local 44 bank, offset); in zynq_reset_assert() 47 priv->offset + (bank * 4), in zynq_reset_assert() 57 int bank = id / BITS_PER_LONG; in zynq_reset_deassert() local 61 bank, offset); in zynq_reset_deassert() 64 priv->offset + (bank * 4), in zynq_reset_deassert() 74 int bank = id / BITS_PER_LONG; in zynq_reset_status() local 80 bank, offset); in zynq_reset_status() 82 ret = regmap_read(priv->slcr, priv->offset + (bank * 4), &reg); in zynq_reset_status()
D	reset-socfpga.c	41 int bank = id / BITS_PER_LONG; in socfpga_reset_assert() local 48 reg = readl(data->membase + data->modrst_offset + (bank * NR_BANKS)); in socfpga_reset_assert() 50 (bank * NR_BANKS)); in socfpga_reset_assert() 63 int bank = id / BITS_PER_LONG; in socfpga_reset_deassert() local 70 reg = readl(data->membase + data->modrst_offset + (bank * NR_BANKS)); in socfpga_reset_deassert() 72 (bank * NR_BANKS)); in socfpga_reset_deassert() 84 int bank = id / BITS_PER_LONG; in socfpga_reset_status() local 88 reg = readl(data->membase + data->modrst_offset + (bank * NR_BANKS)); in socfpga_reset_status()
D	reset-sunxi.c	`37 int bank = id / BITS_PER_LONG; in sunxi_reset_assert() local 44 reg = readl(data->membase + (bank * 4)); in sunxi_reset_assert() 45 writel(reg & ~BIT(offset), data->membase + (bank * 4)); in sunxi_reset_assert() 58 int bank = id / BITS_PER_LONG; in sunxi_reset_deassert() local 65 reg = readl(data->membase + (bank * 4)); in sunxi_reset_deassert() 66 writel(reg \| BIT(offset), data->membase + (bank * 4)); in sunxi_reset_deassert()`
/linux-4.4.14/drivers/pinctrl/meson/
D	pinctrl-meson.c	77 struct meson_bank *bank) in meson_get_bank() argument 84 bank = &domain->data->banks[i]; in meson_get_bank() 104 struct meson_bank *bank) in meson_get_domain_and_bank() argument 114 return meson_get_bank(d, pin, bank); in meson_get_domain_and_bank() 130 static void meson_calc_reg_and_bit(struct meson_bank bank, unsigned int pin, in meson_calc_reg_and_bit() argument 134 struct meson_reg_desc desc = &bank->regs[reg_type]; in meson_calc_reg_and_bit() 137 bit = desc->bit + pin - bank->first; in meson_calc_reg_and_bit() 294 struct meson_bank *bank; in meson_pinconf_set() local 300 ret = meson_get_domain_and_bank(pc, pin, &domain, &bank); in meson_pinconf_set() 312 meson_calc_reg_and_bit(bank, pin, REG_PULL, &reg, &bit); in meson_pinconf_set() [all …]
/linux-4.4.14/drivers/clk/rockchip/
D	softrst.c	37 int bank = id / softrst->num_per_reg; in rockchip_softrst_assert() local 42 softrst->reg_base + (bank * 4)); in rockchip_softrst_assert() 49 reg = readl(softrst->reg_base + (bank * 4)); in rockchip_softrst_assert() 50 writel(reg \| BIT(offset), softrst->reg_base + (bank * 4)); in rockchip_softrst_assert() 64 int bank = id / softrst->num_per_reg; in rockchip_softrst_deassert() local 68 writel((BIT(offset) << 16), softrst->reg_base + (bank * 4)); in rockchip_softrst_deassert() 75 reg = readl(softrst->reg_base + (bank * 4)); in rockchip_softrst_deassert() 76 writel(reg & ~BIT(offset), softrst->reg_base + (bank * 4)); in rockchip_softrst_deassert()
/linux-4.4.14/drivers/media/common/b2c2/
D	flexcop-sram.c	`75 static void flexcop_sram_write(struct adapter adapter, u32 bank, u32 addr, u8 buf, u32 len) 81 command = bank \| addr \| 0x04000000 \| (buf << 0x10); 100 static void flex_sram_read(struct adapter adapter, u32 bank, u32 addr, u8 *buf, u32 len) 106 command = bank \| addr \| 0x04008000; 141 u32 bank; 143 bank = 0; 146 bank = (addr & 0x18000) << 0x0d; 151 bank = 0x20000000; 153 bank = 0x10000000; 155 flex_sram_write(adapter, bank, addr & 0x7fff, buf, len); [all …]`
/linux-4.4.14/include/linux/mtd/
D	fsmc.h	`54 #define FSMC_NOR_REG(base, bank, reg) (base + \ argument 55 FSMC_NOR_BANK_SZ * (bank) + \ 100 #define FSMC_NAND_REG(base, bank, reg) (base + FSMC_NOR_REG_SIZE + \ argument 101 (FSMC_NAND_BANK_SZ * (bank)) + \ 157 unsigned int bank; member 161 void (*select_bank)(uint32_t bank, uint32_t busw); 169 unsigned long base, uint32_t bank, uint32_t width);`
/linux-4.4.14/drivers/irqchip/
D	irq-metag-ext.c	453 unsigned int bank, irq_no, status; in meta_intc_irq_demux() local 459 for (bank = 0; bank < priv->nr_banks; ++bank) { in meta_intc_irq_demux() 462 status = metag_in32(stat_addr) & priv->unmasked[bank]; in meta_intc_irq_demux() 464 for (hw = bank*32; status; status >>= 1, ++hw) { in meta_intc_irq_demux() 623 unsigned int bank; in meta_intc_suspend() local 636 for (bank = 0; bank < priv->nr_banks; ++bank) { in meta_intc_suspend() 657 if (priv->levels_altered[bank]) in meta_intc_suspend() 658 context->levels[bank] = metag_in32(level_addr); in meta_intc_suspend() 661 context->masks[bank] = metag_in32(mask_addr); in meta_intc_suspend() 690 unsigned int bank; in meta_intc_resume() local [all …]
D	irq-bcm2835.c	`207 static u32 armctrl_translate_bank(int bank) in armctrl_translate_bank() argument 209 u32 stat = readl_relaxed(intc.pending[bank]); in armctrl_translate_bank() 211 return MAKE_HWIRQ(bank, ffs(stat) - 1); in armctrl_translate_bank() 214 static u32 armctrl_translate_shortcut(int bank, u32 stat) in armctrl_translate_shortcut() argument 216 return MAKE_HWIRQ(bank, shortcuts[ffs(stat >> SHORTCUT_SHIFT) - 1]); in armctrl_translate_shortcut()`
/linux-4.4.14/arch/alpha/kernel/
D	sys_ruffian.c	`183 unsigned long bank_addr, bank, ret = 0; in ruffian_get_bank_size() local 188 bank = *(vulp)bank_addr; in ruffian_get_bank_size() 191 if (bank & 0x01) { in ruffian_get_bank_size() 204 bank = (bank & 0x1e) >> 1; in ruffian_get_bank_size() 205 if (bank < ARRAY_SIZE(size)) in ruffian_get_bank_size() 206 ret = size[bank]; in ruffian_get_bank_size()`
/linux-4.4.14/Documentation/devicetree/bindings/powerpc/fsl/cpm_qe/qe/
D	par_io.txt	`26 the new device trees. Instead, each Par I/O bank should be represented 31 - compatible : should be "fsl,<chip>-qe-pario-bank", 32 "fsl,mpc8323-qe-pario-bank". 39 compatible = "fsl,mpc8360-qe-pario-bank", 40 "fsl,mpc8323-qe-pario-bank"; 47 compatible = "fsl,mpc8360-qe-pario-bank", 48 "fsl,mpc8323-qe-pario-bank";`
/linux-4.4.14/arch/powerpc/boot/dts/
D	media5200.dts	`117 bank-width = <4>; // Width in bytes of the flash bank 118 device-width = <2>; // Two devices on each bank 124 bank-width = <4>; // Width in bytes of the flash bank 125 device-width = <2>; // Two devices on each bank 131 #interrupt-cells = <2>; // 0:bank 1:id; no type field 135 interrupts = <0 0 3 // IRQ bank 0 136 1 1 3>; // IRQ bank 1`
D	pdm360ng.dts	`31 bank-width = <0x1>; 50 bank-width = <4>; 85 bank-width = <2>; 91 bank-width = <2>;`
D	pcm032.dts	`114 bank-width = <4>; 151 bank-width = <2>; 160 * bank-width = <4>; 166 * bank-width = <4>;`
/linux-4.4.14/arch/x86/platform/scx200/
D	scx200_32.c	`50 int bank; in scx200_init_shadow() local 53 for (bank = 0; bank < 2; ++bank) in scx200_init_shadow() 54 scx200_gpio_shadow[bank] = inl(scx200_gpio_base + 0x10 * bank); in scx200_init_shadow()`
/linux-4.4.14/arch/unicore32/kernel/
D	setup.c	`136 struct membank *bank = &meminfo.bank[meminfo.nr_banks]; in uc32_add_memory() local 150 bank->start = PAGE_ALIGN(start); in uc32_add_memory() 151 bank->size = size & PAGE_MASK; in uc32_add_memory() 157 if (bank->size == 0) in uc32_add_memory() 207 if (mi->bank[i].size == 0) in request_standard_resources() 212 res->start = mi->bank[i].start; in request_standard_resources() 213 res->end = mi->bank[i].start + mi->bank[i].size - 1; in request_standard_resources()`
/linux-4.4.14/arch/arm/boot/dts/
D	stih415-pinctrl.dtsi	`61 st,bank-name = "PIO0"; 69 st,bank-name = "PIO1"; 77 st,bank-name = "PIO2"; 85 st,bank-name = "PIO3"; 93 st,bank-name = "PIO4"; 215 st,bank-name = "PIO5"; 223 st,bank-name = "PIO6"; 231 st,bank-name = "PIO7"; 239 st,bank-name = "PIO8"; 247 st,bank-name = "PIO9"; [all …]`
D	stih416-pinctrl.dtsi	`65 st,bank-name = "PIO0"; 73 st,bank-name = "PIO1"; 81 st,bank-name = "PIO2"; 89 st,bank-name = "PIO3"; 97 st,bank-name = "PIO4"; 105 st,bank-name = "PIO40"; 261 st,bank-name = "PIO5"; 269 st,bank-name = "PIO6"; 277 st,bank-name = "PIO7"; 285 st,bank-name = "PIO8"; [all …]`
D	omap-zoom-common.dtsi	`19 bank-width = <2>; 55 bank-width = <2>; 66 bank-width = <2>; 77 bank-width = <2>;`
D	stih407-pinctrl.dtsi	`65 st,bank-name = "PIO0"; 73 st,bank-name = "PIO1"; 81 st,bank-name = "PIO2"; 89 st,bank-name = "PIO3"; 97 st,bank-name = "PIO4"; 106 st,bank-name = "PIO5"; 380 st,bank-name = "PIO10"; 388 st,bank-name = "PIO11"; 396 st,bank-name = "PIO12"; 404 st,bank-name = "PIO13"; [all …]`
D	bcm2835.dtsi	`93 * Each bank has a GPIO interrupt for itself. 94 * There is an overall "any bank" interrupt. 96 * Since the BCM2835 only has 2 banks, the 2nd bank 98 * 3rd bank's interrupt signal.`
/linux-4.4.14/sound/synth/emux/
D	soundfont.c	56 int bank, int instr); 67 int bank, int preset, int key); 69 int preset, int bank, struct snd_sf_zone **table, 71 static int get_index(int bank, int instr, int key); 204 int bank, instr; in snd_soundfont_load() local 205 bank = ((unsigned short)patch.optarg >> 8) & 0xff; in snd_soundfont_load() 207 if (! remove_info(sflist, sflist->currsf, bank, instr)) in snd_soundfont_load() 448 zp->bank == map.map_bank && in load_map() 470 zp->bank = map.map_bank; in load_map() 491 int bank, int instr) in remove_info() argument [all …]
/linux-4.4.14/Documentation/hwmon/
D	w83795	`64 41 \| FANCTL1 \| 10h (bank 2) \| pwm1 65 43 \| FANCTL2 \| 11h (bank 2) \| pwm2 66 45 \| FANCTL3 \| 12h (bank 2) \| pwm3 67 47 \| FANCTL4 \| 13h (bank 2) \| pwm4 68 49 \| FANCTL5 \| 14h (bank 2) \| pwm5 69 51 \| FANCTL6 \| 15h (bank 2) \| pwm6 70 53 \| FANCTL7 \| 16h (bank 2) \| pwm7 71 55 \| FANCTL8 \| 17h (bank 2) \| pwm8 117 33 \| FANCTL1 \| 10h (bank 2) \| pwm1 118 35 \| FANCTL2 \| 11h (bank 2) \| pwm2`
D	abituguru-datasheet	59 level we will call banks. A bank holds data for one or more sensors. The data 60 in a bank for a sensor is one or more bytes large. 62 The number of bytes is fixed for a given bank, you should always read or write 64 less then the number of bytes for a given bank are undetermined. 66 See below for all known bank addresses, numbers of sensors in that bank, 70 terminoligy for the addressing within a bank this is not 100% correct, in 71 bank 0x24 for example the addressing within the bank selects a PWM output not 75 uGuru determines if a read from or a write to the bank is taking place, thus 96 not yet reported 0x08 at DATA and you proceed with writing a bank address. 99 Sending bank and sensor addresses to the uGuru [all …]
/linux-4.4.14/drivers/input/keyboard/
D	adp5588-keys.c	77 unsigned int bank = ADP5588_BANK(kpad->gpiomap[off]); in adp5588_gpio_get_value() local 83 if (kpad->dir[bank] & bit) in adp5588_gpio_get_value() 84 val = kpad->dat_out[bank]; in adp5588_gpio_get_value() 86 val = adp5588_read(kpad->client, GPIO_DAT_STAT1 + bank); in adp5588_gpio_get_value() 97 unsigned int bank = ADP5588_BANK(kpad->gpiomap[off]); in adp5588_gpio_set_value() local 103 kpad->dat_out[bank] \|= bit; in adp5588_gpio_set_value() 105 kpad->dat_out[bank] &= ~bit; in adp5588_gpio_set_value() 107 adp5588_write(kpad->client, GPIO_DAT_OUT1 + bank, in adp5588_gpio_set_value() 108 kpad->dat_out[bank]); in adp5588_gpio_set_value() 116 unsigned int bank = ADP5588_BANK(kpad->gpiomap[off]); in adp5588_gpio_direction_input() local [all …]
D	adp5589-keys.c	224 u8 (*bank) (u8 offset); member 286 .bank = adp5589_bank, 367 .bank = adp5585_bank, 391 unsigned int bank = kpad->var->bank(kpad->gpiomap[off]); in adp5589_gpio_get_value() local 395 kpad->var->reg(ADP5589_GPI_STATUS_A) + bank) & in adp5589_gpio_get_value() 403 unsigned int bank = kpad->var->bank(kpad->gpiomap[off]); in adp5589_gpio_set_value() local 409 kpad->dat_out[bank] \|= bit; in adp5589_gpio_set_value() 411 kpad->dat_out[bank] &= ~bit; in adp5589_gpio_set_value() 414 bank, kpad->dat_out[bank]); in adp5589_gpio_set_value() 422 unsigned int bank = kpad->var->bank(kpad->gpiomap[off]); in adp5589_gpio_direction_input() local [all …]
/linux-4.4.14/drivers/cpufreq/
D	s3c24xx-cpufreq-debugfs.c	`125 int bank; in io_show() local 147 for (bank = 0; bank < MAX_BANKS; bank++) { in io_show() 148 iob = &iot->bank[bank]; in io_show() 150 seq_printf(seq, "bank %d: ", bank); in io_show()`
/linux-4.4.14/arch/mips/jz4740/
D	setup.c	`39 u32 ctrl, bus, bank, rows, cols; in jz4740_detect_mem() local 45 bank = 1 + ((ctrl >> 19) & 1); in jz4740_detect_mem() 50 bus, bank, rows, cols); in jz4740_detect_mem() 53 size = 1 << (bus + bank + cols + rows); in jz4740_detect_mem()`
/linux-4.4.14/arch/arm/mach-omap1/
D	irq.c	70 static inline unsigned int irq_bank_readl(int bank, int offset) in irq_bank_readl() argument 72 return readl_relaxed(irq_banks[bank].va + offset); in irq_bank_readl() 74 static inline void irq_bank_writel(unsigned long value, int bank, int offset) in irq_bank_writel() argument 76 writel_relaxed(value, irq_banks[bank].va + offset); in irq_bank_writel() 104 signed int bank; in omap_irq_set_cfg() local 107 bank = IRQ_BANK(irq); in omap_irq_set_cfg() 109 fiq = bank ? 0 : (fiq & 0x1); in omap_irq_set_cfg() 112 irq_bank_writel(val, bank, offset); in omap_irq_set_cfg()
/linux-4.4.14/drivers/clk/qcom/
D	clk-rcg.c	66 static int reg_to_bank(struct clk_dyn_rcg *rcg, u32 bank) in reg_to_bank() argument 68 bank &= BIT(rcg->mux_sel_bit); in reg_to_bank() 69 return !!bank; in reg_to_bank() 77 int bank; in clk_dyn_rcg_get_parent() local 84 bank = reg_to_bank(rcg, reg); in clk_dyn_rcg_get_parent() 85 s = &rcg->s[bank]; in clk_dyn_rcg_get_parent() 87 ret = regmap_read(rcg->clkr.regmap, rcg->ns_reg[bank], &ns); in clk_dyn_rcg_get_parent() 209 int bank, new_bank, ret, index; in configure_bank() local 224 bank = reg_to_bank(rcg, reg); in configure_bank() 225 new_bank = enabled ? !bank : bank; in configure_bank() [all …]
/linux-4.4.14/include/linux/
D	scx200_gpio.h	`10 #define __SCx200_GPIO_BANK unsigned bank = index>>5 11 #define __SCx200_GPIO_IOADDR unsigned short ioaddr = scx200_gpio_base+0x10bank 12 #define __SCx200_GPIO_SHADOW unsigned long shadow = scx200_gpio_shadow+bank 35 return (scx200_gpio_shadow[bank] & (1<<index)) ? 1 : 0; in scx200_gpio_current()`
D	jz4780-nemc.h	`38 extern void jz4780_nemc_set_type(struct device dev, unsigned int bank, 40 extern void jz4780_nemc_assert(struct device dev, unsigned int bank,`
D	hwspinlock.h	`64 int hwspin_lock_register(struct hwspinlock_device bank, struct device dev, 66 int hwspin_lock_unregister(struct hwspinlock_device *bank);`
D	dmi.h	`113 extern void dmi_memdev_name(u16 handle, const char bank, const char device); 141 static inline void dmi_memdev_name(u16 handle, const char **bank, in dmi_memdev_name() argument`
D	cper.h	`352 __u16 bank; member 372 __u16 bank; member 392 __u16 bank; member`
/linux-4.4.14/include/linux/mfd/
D	abx500.h	`26 u8 bank; member 308 int abx500_set_register_interruptible(struct device dev, u8 bank, u8 reg, 310 int abx500_get_register_interruptible(struct device dev, u8 bank, u8 reg, 312 int abx500_get_register_page_interruptible(struct device dev, u8 bank, 314 int abx500_set_register_page_interruptible(struct device dev, u8 bank, 328 int abx500_mask_and_set_register_interruptible(struct device *dev, u8 bank,`
D	asic3.h	`58 #define ASIC3_GPIO(bank, gpio) \ argument 59 ((ASIC3_GPIOS_PER_BANK * ASIC3_GPIO_BANK_##bank) + (gpio)) 78 #define ASIC3_BANK_TO_BASE(bank) (ASIC3_GPIO_A_BASE + ((bank) * 0x100)) argument`
/linux-4.4.14/arch/blackfin/mach-common/
D	pm.c	`107 register u32 way, bank, subbank, set; in flushinv_all_dcache() local 111 for (bank = 0; bank < 2; ++bank) { in flushinv_all_dcache() 112 if (!(dmem_ctl & (1 << (DMC1_P - bank)))) in flushinv_all_dcache() 121 bank << 23 \| in flushinv_all_dcache()`
D	ints-priority.c	219 u32 bank, bit, wakeup = 0; in bfin_internal_set_wake() local 221 bank = BFIN_SYSIRQ(irq) / 32; in bfin_internal_set_wake() 257 bfin_sic_iwr[bank] \|= (1 << bit); in bfin_internal_set_wake() 261 bfin_sic_iwr[bank] &= ~(1 << bit); in bfin_internal_set_wake() 914 u32 bank; in sec_suspend() local 916 for (bank = 0; bank < NR_PINT_SYS_IRQS; bank++) in sec_suspend() 917 save_pint_sec_ctl[bank] = bfin_read_SEC_SCTL(bank + BFIN_SYSIRQ(IRQ_PINT0)); in sec_suspend() 923 u32 bank; in sec_resume() local 930 for (bank = 0; bank < NR_PINT_SYS_IRQS; bank++) in sec_resume() 931 bfin_write_SEC_SCTL(bank + BFIN_SYSIRQ(IRQ_PINT0), save_pint_sec_ctl[bank]); in sec_resume()
/linux-4.4.14/drivers/net/irda/
D	nsc-ircc.c	1048 __u8 bank; in nsc_ircc_read_dongle_id() local 1050 bank = inb(iobase+BSR); in nsc_ircc_read_dongle_id() 1071 outb(bank, iobase+BSR); in nsc_ircc_read_dongle_id() 1086 int bank; in nsc_ircc_init_dongle_interface() local 1089 bank = inb(iobase+BSR); in nsc_ircc_init_dongle_interface() 1159 outb(bank, iobase+BSR); in nsc_ircc_init_dongle_interface() 1171 __u8 bank; in nsc_ircc_change_dongle_speed() local 1174 bank = inb(iobase+BSR); in nsc_ircc_change_dongle_speed() 1244 outb(bank, iobase+BSR); in nsc_ircc_change_dongle_speed() 1259 __u8 bank; in nsc_ircc_change_speed() local [all …]
D	ali-ircc.h	`222 static inline void switch_bank(int iobase, int bank) in switch_bank() argument 224 outb(bank, iobase+FIR_MCR); in switch_bank()`
/linux-4.4.14/drivers/net/ethernet/microchip/
D	encx24j600-regmap.c	29 int bank) in encx24j600_switch_bank() argument 33 int bank_opcode = BANK_SELECT(bank); in encx24j600_switch_bank() 36 ctx->bank = bank; in encx24j600_switch_bank() 71 u8 bank = ((reg & BANK_MASK) >> BANK_SHIFT); in regmap_encx24j600_sfr_read() local 79 if ((banked_reg < 0x16) && (ctx->bank != bank)) in regmap_encx24j600_sfr_read() 80 ret = encx24j600_switch_bank(ctx, bank); in regmap_encx24j600_sfr_read() 122 u8 bank = ((reg & BANK_MASK) >> BANK_SHIFT); in regmap_encx24j600_sfr_update() local 132 if ((banked_reg < 0x16) && (ctx->bank != bank)) in regmap_encx24j600_sfr_update() 133 ret = encx24j600_switch_bank(ctx, bank); in regmap_encx24j600_sfr_update()
D	encx24j600_hw.h	`14 int bank; member 21 #define BANK_SELECT(bank) (0xC0 \| ((bank & (BANK_MASK >> BANK_SHIFT)) << 1)) argument`
/linux-4.4.14/arch/um/drivers/
D	pty.c	`81 char pty, bank, cp; in getmaster() local 85 for (bank = "pqrs"; bank; bank++) { in getmaster() 86 line[strlen("/dev/pty")] = *bank; in getmaster()`
/linux-4.4.14/sound/pci/ymfpci/
D	ymfpci_main.c	315 pos = le32_to_cpu(voice->bank[chip->active_bank].start); in snd_ymfpci_pcm_interrupt() 338 struct snd_ymfpci_playback_bank bank; in snd_ymfpci_pcm_interrupt() local 341 bank = &voice->bank[next_bank]; in snd_ymfpci_pcm_interrupt() 343 bank->left_gain_end = volume; in snd_ymfpci_pcm_interrupt() 345 bank->eff2_gain_end = volume; in snd_ymfpci_pcm_interrupt() 347 bank = &ypcm->voices[1]->bank[next_bank]; in snd_ymfpci_pcm_interrupt() 349 bank->right_gain_end = volume; in snd_ymfpci_pcm_interrupt() 351 bank->eff3_gain_end = volume; in snd_ymfpci_pcm_interrupt() 506 struct snd_ymfpci_playback_bank bank; in snd_ymfpci_pcm_init_voice() local 551 bank = &voice->bank[nbank]; in snd_ymfpci_pcm_init_voice() [all …]
/linux-4.4.14/arch/x86/kernel/cpu/
D	perf_event_amd_iommu.c	151 int shift, bank, cntr, retval; in get_next_avail_iommu_bnk_cntr() local 157 for (bank = 0, shift = 0; bank < max_banks; bank++) { in get_next_avail_iommu_bnk_cntr() 159 shift = bank + (bank3) + cntr; in get_next_avail_iommu_bnk_cntr() 164 retval = ((u16)((u16)bank<<8) \| (u8)(cntr)); in get_next_avail_iommu_bnk_cntr() 176 u8 bank, u8 cntr) in clear_avail_iommu_bnk_cntr() argument 185 if ((bank > max_banks) \|\| (cntr > max_cntrs)) in clear_avail_iommu_bnk_cntr() 188 shift = bank + cntr + (bank3); in clear_avail_iommu_bnk_cntr()
/linux-4.4.14/Documentation/devicetree/bindings/net/
D	cavium-mix.txt	`10 bank contains the MIX registers. The second bank the corresponding 11 AGL registers. The third bank are the AGL registers shared by all 12 MIX devices present. The fourth bank is the AGL_PRT_CTL shared by`
D	gpmc-eth.txt	`18 Child nodes need to specify the GPMC bus address width using the "bank-width" 23 OMAP2+ board, "bank-width = <2>;" and "reg-io-width = <4>;". 26 - bank-width: Address width of the device in bytes. GPMC supports 8-bit 65 bank-width = <2>;`
/linux-4.4.14/include/trace/events/
D	mce.h	`31 __field( u8, bank ) 49 __entry->bank = m->bank; 56 __entry->bank, __entry->status,`
/linux-4.4.14/arch/arm/mach-pxa/
D	mfp-pxa2xx.c	`58 int bank = gpio_to_bank(gpio); in __mfp_config_gpio() local 68 gafr = (uorl == 0) ? GAFR_L(bank) : GAFR_U(bank); in __mfp_config_gpio() 72 GAFR_L(bank) = gafr; in __mfp_config_gpio() 74 GAFR_U(bank) = gafr; in __mfp_config_gpio() 84 PGSR(bank) \|= mask; in __mfp_config_gpio() 88 PGSR(bank) &= ~mask; in __mfp_config_gpio() 102 gpdr_lpm[bank] \|= mask; in __mfp_config_gpio() 104 gpdr_lpm[bank] &= ~mask; in __mfp_config_gpio()`
D	generic.h	`23 mi->bank[__nr].start = (__start), \ 24 mi->bank[__nr].size = (__size)`
/linux-4.4.14/drivers/media/dvb-frontends/
D	cxd2820r_core.c	110 u8 bank = (reginfo >> 8) & 0xff; in cxd2820r_wr_regs() local 120 if (bank != priv->bank[i2c]) { in cxd2820r_wr_regs() 121 ret = cxd2820r_wr_regs_i2c(priv, i2c_addr, 0x00, &bank, 1); in cxd2820r_wr_regs() 124 priv->bank[i2c] = bank; in cxd2820r_wr_regs() 136 u8 bank = (reginfo >> 8) & 0xff; in cxd2820r_rd_regs() local 146 if (bank != priv->bank[i2c]) { in cxd2820r_rd_regs() 147 ret = cxd2820r_wr_regs_i2c(priv, i2c_addr, 0x00, &bank, 1); in cxd2820r_rd_regs() 150 priv->bank[i2c] = bank; in cxd2820r_rd_regs() 715 priv->bank[0] = priv->bank[1] = 0xff; in cxd2820r_attach()
/linux-4.4.14/arch/arm/kernel/
D	tcm.c	`110 static int __init setup_tcm_bank(u8 type, u8 bank, u8 banks, in setup_tcm_bank() argument 126 : "r" (bank)); in setup_tcm_bank() 139 type ? "I" : "D", bank); in setup_tcm_bank() 143 type ? "I" : "D", bank); in setup_tcm_bank() 148 bank, in setup_tcm_bank() 175 bank, in setup_tcm_bank()`
/linux-4.4.14/drivers/acpi/
D	acpi_extlog.c	`65 #define ELOG_IDX(cpu, bank) \ argument 66 (cpu_physical_id(cpu) * l1_percpu_entry + (bank)) 74 static struct acpi_hest_generic_status *extlog_elog_entry_check(int cpu, int bank) in extlog_elog_entry_check() argument 81 idx = ELOG_IDX(cpu, bank); in extlog_elog_entry_check() 140 int bank = mce->bank; in extlog_print() local 149 estatus = extlog_elog_entry_check(cpu, bank); in extlog_print()`
/linux-4.4.14/drivers/pinctrl/bcm/
D	pinctrl-bcm2835.c	91 int bank; member 385 int bank = irqdata->bank; in bcm2835_gpio_irq_handler() local 391 events = bcm2835_gpio_rd(pc, GPEDS0 + bank * 4); in bcm2835_gpio_irq_handler() 392 events &= pc->enabled_irq_map[bank]; in bcm2835_gpio_irq_handler() 394 gpio = (32 * bank) + offset; in bcm2835_gpio_irq_handler() 448 unsigned bank = GPIO_REG_OFFSET(gpio); in bcm2835_gpio_irq_enable() local 451 spin_lock_irqsave(&pc->irq_lock[bank], flags); in bcm2835_gpio_irq_enable() 452 set_bit(offset, &pc->enabled_irq_map[bank]); in bcm2835_gpio_irq_enable() 454 spin_unlock_irqrestore(&pc->irq_lock[bank], flags); in bcm2835_gpio_irq_enable() 462 unsigned bank = GPIO_REG_OFFSET(gpio); in bcm2835_gpio_irq_disable() local [all …]
/linux-4.4.14/drivers/pinctrl/vt8500/
D	pinctrl-wmt.c	96 u32 bank = WMT_BANK_FROM_PIN(pin); in wmt_set_pinmux() local 98 u32 reg_en = data->banks[bank].reg_en; in wmt_set_pinmux() 99 u32 reg_dir = data->banks[bank].reg_dir; in wmt_set_pinmux() 433 u32 bank = WMT_BANK_FROM_PIN(pin); in wmt_pinconf_set() local 435 u32 reg_pull_en = data->banks[bank].reg_pull_en; in wmt_pinconf_set() 436 u32 reg_pull_cfg = data->banks[bank].reg_pull_cfg; in wmt_pinconf_set() 492 u32 bank = WMT_BANK_FROM_PIN(offset); in wmt_gpio_get_direction() local 494 u32 reg_dir = data->banks[bank].reg_dir; in wmt_gpio_get_direction() 507 u32 bank = WMT_BANK_FROM_PIN(offset); in wmt_gpio_get_value() local 509 u32 reg_data_in = data->banks[bank].reg_data_in; in wmt_gpio_get_value() [all …]
/linux-4.4.14/Documentation/devicetree/bindings/powerpc/4xx/
D	ndfc.txt	`9 - bank-settings : NDFC bank configuration register value (default 0). 20 bank-settings = <0x80002222>;`
/linux-4.4.14/Documentation/devicetree/bindings/mips/cavium/
D	ciu2.txt	`10 - reg: The base address of the CIU's register bank. 12 - #interrupt-cells: Must be <2>. The first cell is the bank within 14 the bit within the bank and may also have a value between 0 and 63.`
D	ciu.txt	`10 - reg: The base address of the CIU's register bank. 12 - #interrupt-cells: Must be <2>. The first cell is the bank within 14 within the bank and may have a value between 0 and 63.`
/linux-4.4.14/arch/powerpc/platforms/85xx/
D	p1022_ds.c	233 br0 = in_be32(&lbc->bank[0].br); in p1022ds_set_monitor_port() 234 br1 = in_be32(&lbc->bank[1].br); in p1022ds_set_monitor_port() 235 or0 = in_be32(&lbc->bank[0].or); in p1022ds_set_monitor_port() 236 or1 = in_be32(&lbc->bank[1].or); in p1022ds_set_monitor_port() 252 out_be32(&lbc->bank[0].br, br0); in p1022ds_set_monitor_port() 253 out_be32(&lbc->bank[0].or, or0); in p1022ds_set_monitor_port() 258 out_be32(&lbc->bank[1].br, br1); in p1022ds_set_monitor_port() 259 out_be32(&lbc->bank[1].or, or1); in p1022ds_set_monitor_port()
/linux-4.4.14/Documentation/devicetree/bindings/mtd/
D	mtd-physmap.txt	`12 - bank-width : Width (in bytes) of the bank. Equal to the 15 omitted, assumed to be equal to 'bank-width'. 52 bank-width = <4>; 75 bank-width = <2>; 87 bank-width = <2>;`
D	fsmc-nand.txt	`10 - bank-width : Width (in bytes) of the device. If not present, the width 32 - bank: default NAND bank to use (0-3 are valid, 0 is the default). 52 bank-width = <1>; 55 bank = <1>;`
D	orion-nand.txt	`11 - bank-width : Width in bytes of the device. Default is 1 25 bank-width = <1>;`
/linux-4.4.14/drivers/usb/host/
D	sl811-hcd.c	137 u8 bank, in setup_packet() argument 145 addr = SL811HS_PACKET_BUF(bank == 0); in setup_packet() 151 sl811_write(sl811, bank + SL11H_BUFADDRREG, addr); in setup_packet() 157 sl811_write(sl811, bank + SL11H_HOSTCTLREG, in setup_packet() 168 u8 bank, in status_packet() argument 179 sl811_write(sl811, bank + SL11H_BUFADDRREG, 0); in status_packet() 188 sl811_write(sl811, bank + SL11H_HOSTCTLREG, control); in status_packet() 202 u8 bank, in in_packet() argument 212 addr = SL811HS_PACKET_BUF(bank == 0); in in_packet() 219 sl811_write(sl811, bank + SL11H_BUFADDRREG, addr); in in_packet() [all …]
/linux-4.4.14/Documentation/sh/
D	register-banks.txt	`1 Notes on register bank usage in the kernel 8 bank (selected by SR.RB, only r0 ... r7 are banked), whereas other families 15 r0 ... r7 if SR.RB is set to the bank we are interested in, otherwise ldc/stc 17 when in the context of another bank. The developer must keep the SR.RB value`
/linux-4.4.14/drivers/input/misc/
D	pmic8xxx-pwrkey.c	172 u8 vref_sel, vlow_sel, band, vprog, bank; in pm8058_disable_smps_locally_set_pull_down() local 175 bank = PM8058_REGULATOR_BANK_SEL(7); in pm8058_disable_smps_locally_set_pull_down() 176 error = regmap_write(regmap, test2_addr, bank); in pm8058_disable_smps_locally_set_pull_down() 218 bank = PM8058_REGULATOR_BANK_SEL(1); in pm8058_disable_smps_locally_set_pull_down() 219 error = regmap_write(regmap, test2_addr, bank); in pm8058_disable_smps_locally_set_pull_down() 232 bank = PM8058_REGULATOR_BANK_SEL(7); in pm8058_disable_smps_locally_set_pull_down() 233 error = regmap_write(regmap, test2_addr, bank); in pm8058_disable_smps_locally_set_pull_down()
/linux-4.4.14/arch/powerpc/platforms/powermac/
D	nvram.c	83 static int (core99_write_bank)(int bank, u8 datas); 84 static int (core99_erase_bank)(int bank); 279 static int sm_erase_bank(int bank) in sm_erase_bank() argument 286 DBG("nvram: Sharp/Micron Erasing bank %d...\n", bank); in sm_erase_bank() 310 static int sm_write_bank(int bank, u8 datas) in sm_write_bank() argument 317 DBG("nvram: Sharp/Micron Writing bank %d...\n", bank); in sm_write_bank() 344 static int amd_erase_bank(int bank) in amd_erase_bank() argument 351 DBG("nvram: AMD Erasing bank %d...\n", bank); in amd_erase_bank() 390 static int amd_write_bank(int bank, u8* datas) in amd_write_bank() argument 397 DBG("nvram: AMD Writing bank %d...\n", bank); in amd_write_bank()
/linux-4.4.14/drivers/net/wireless/mediatek/mt7601u/
D	trace.h	`150 TP_PROTO(struct mt7601u_dev dev, u8 bank, u8 reg, u8 val), 151 TP_ARGS(dev, bank, reg, val), 154 __field(u8, bank) 161 __entry->bank = bank; 165 DEV_PR_ARG, __entry->bank, __entry->reg, __entry->val 170 TP_PROTO(struct mt7601u_dev dev, u8 bank, u8 reg, u8 val), 171 TP_ARGS(dev, bank, reg, val) 175 TP_PROTO(struct mt7601u_dev *dev, u8 bank, u8 reg, u8 val), 176 TP_ARGS(dev, bank, reg, val)`
D	phy.c	27 mt7601u_rf_wr(struct mt7601u_dev dev, u8 bank, u8 offset, u8 value) in mt7601u_rf_wr() argument 45 MT76_SET(MT_RF_CSR_CFG_REG_BANK, bank) \| in mt7601u_rf_wr() 49 trace_rf_write(dev, bank, offset, value); in mt7601u_rf_wr() 55 bank, offset, ret); in mt7601u_rf_wr() 61 mt7601u_rf_rr(struct mt7601u_dev dev, u8 bank, u8 offset) in mt7601u_rf_rr() argument 77 mt7601u_wr(dev, MT_RF_CSR_CFG, MT76_SET(MT_RF_CSR_CFG_REG_BANK, bank) \| in mt7601u_rf_rr() 86 MT76_GET(MT_RF_CSR_CFG_REG_BANK, val) == bank) { in mt7601u_rf_rr() 88 trace_rf_read(dev, bank, offset, ret); in mt7601u_rf_rr() 95 bank, offset, ret); in mt7601u_rf_rr() 101 mt7601u_rf_rmw(struct mt7601u_dev *dev, u8 bank, u8 offset, u8 mask, u8 val) in mt7601u_rf_rmw() argument [all …]
/linux-4.4.14/include/linux/platform_data/
D	gpio-rcar.h	`27 #define RCAR_GP_PIN(bank, pin) (((bank) * 32) + (pin)) argument`
D	gpio-davinci.h	`49 #define GPIO_TO_PIN(bank, gpio) (16 * (bank) + (gpio)) argument`
/linux-4.4.14/drivers/crypto/qat/qat_dh895xcc/
D	adf_isr.c	`98 struct adf_etr_bank_data bank = bank_ptr; in adf_msix_isr_bundle() local 100 WRITE_CSR_INT_FLAG_AND_COL(bank->csr_addr, bank->bank_number, 0); in adf_msix_isr_bundle() 101 tasklet_hi_schedule(&bank->resp_handler); in adf_msix_isr_bundle() 175 struct adf_etr_bank_data bank = &etr_data->banks[i]; in adf_request_irqs() local 182 adf_msix_isr_bundle, 0, name, bank); in adf_request_irqs()`
/linux-4.4.14/sound/drivers/opl3/
D	opl3_synth.c	213 err = snd_opl3_load_patch(opl3, inst.prog, inst.bank, type, in snd_opl3_write() 252 int prog, int bank, int type, in snd_opl3_load_patch() argument 260 patch = snd_opl3_find_patch(opl3, prog, bank, 1); in snd_opl3_load_patch() 314 struct fm_patch snd_opl3_find_patch(struct snd_opl3 opl3, int prog, int bank, in snd_opl3_find_patch() argument 318 unsigned int key = (prog + bank) % OPL3_PATCH_HASH_SIZE; in snd_opl3_find_patch() 322 if (patch->prog == prog && patch->bank == bank) in snd_opl3_find_patch() 332 patch->bank = bank; in snd_opl3_find_patch()
D	opl3_midi.c	`312 unsigned char prg, bank; in snd_opl3_note_on() local 334 bank = 128; in snd_opl3_note_on() 337 bank = chan->gm_bank_select; in snd_opl3_note_on() 346 bank = 127; in snd_opl3_note_on() 359 patch = snd_opl3_find_patch(opl3, prg, bank, 0); in snd_opl3_note_on() 607 bank = 128; in snd_opl3_note_on() 611 bank = 0; in snd_opl3_note_on()`
/linux-4.4.14/drivers/hwmon/
D	asb100.c	861 int res, bank; in asb100_read_value() local 865 bank = (reg >> 8) & 0x0f; in asb100_read_value() 866 if (bank > 2) in asb100_read_value() 868 i2c_smbus_write_byte_data(client, ASB100_REG_BANK, bank); in asb100_read_value() 870 if (bank == 0 \|\| bank > 2) { in asb100_read_value() 874 cl = data->lm75[bank - 1]; in asb100_read_value() 894 if (bank > 2) in asb100_read_value() 906 int bank; in asb100_write_value() local 910 bank = (reg >> 8) & 0x0f; in asb100_write_value() 911 if (bank > 2) in asb100_write_value() [all …]
D	nct7904.c	81 static int nct7904_bank_lock(struct nct7904_data *data, unsigned bank) in nct7904_bank_lock() argument 86 if (data->bank_sel == bank) in nct7904_bank_lock() 88 ret = i2c_smbus_write_byte_data(data->client, BANK_SEL_REG, bank); in nct7904_bank_lock() 90 data->bank_sel = bank; in nct7904_bank_lock() 103 unsigned bank, unsigned reg) in nct7904_read_reg() argument 108 ret = nct7904_bank_lock(data, bank); in nct7904_read_reg() 121 unsigned bank, unsigned reg) in nct7904_read_reg16() argument 126 ret = nct7904_bank_lock(data, bank); in nct7904_read_reg16() 143 unsigned bank, unsigned reg, u8 val) in nct7904_write_reg() argument 148 ret = nct7904_bank_lock(data, bank); in nct7904_write_reg()
D	abituguru3.c	750 static int abituguru3_read(struct abituguru3_data *data, u8 bank, u8 offset, in abituguru3_read() argument 763 "sending 0x1A, status: 0x%02x\n", (unsigned int)bank, in abituguru3_read() 768 outb(bank, data->addr + ABIT_UGURU3_CMD); in abituguru3_read() 773 (unsigned int)bank, (unsigned int)offset, x); in abituguru3_read() 782 (unsigned int)bank, (unsigned int)offset, x); in abituguru3_read() 791 (unsigned int)bank, (unsigned int)offset, x); in abituguru3_read() 800 (unsigned int)bank, (unsigned int)offset, x); in abituguru3_read() 813 u8 bank, u8 offset, u8 count, in abituguru3_read_increment_offset() argument 819 x = abituguru3_read(data, bank, offset + i, count, in abituguru3_read_increment_offset()
/linux-4.4.14/drivers/net/ethernet/micrel/
D	ks8842.c	183 static inline void ks8842_select_bank(struct ks8842_adapter adapter, u16 bank) in ks8842_select_bank() argument 185 iowrite16(bank, adapter->hw_addr + REG_SELECT_BANK); in ks8842_select_bank() 188 static inline void ks8842_write8(struct ks8842_adapter adapter, u16 bank, in ks8842_write8() argument 191 ks8842_select_bank(adapter, bank); in ks8842_write8() 195 static inline void ks8842_write16(struct ks8842_adapter adapter, u16 bank, in ks8842_write16() argument 198 ks8842_select_bank(adapter, bank); in ks8842_write16() 202 static inline void ks8842_enable_bits(struct ks8842_adapter adapter, u16 bank, in ks8842_enable_bits() argument 206 ks8842_select_bank(adapter, bank); in ks8842_enable_bits() 212 static inline void ks8842_clear_bits(struct ks8842_adapter *adapter, u16 bank, in ks8842_clear_bits() argument 216 ks8842_select_bank(adapter, bank); in ks8842_clear_bits() [all …]
/linux-4.4.14/arch/metag/boot/dts/include/dt-bindings/gpio/
D	tegra-gpio.h	`48 #define TEGRA_GPIO(bank, offset) \ argument 49 ((TEGRA_GPIO_BANK_ID_##bank * 8) + offset)`
/linux-4.4.14/arch/arm/boot/dts/include/dt-bindings/gpio/
D	tegra-gpio.h	`48 #define TEGRA_GPIO(bank, offset) \ argument 49 ((TEGRA_GPIO_BANK_ID_##bank * 8) + offset)`
/linux-4.4.14/arch/arm64/boot/dts/include/dt-bindings/gpio/
D	tegra-gpio.h	`48 #define TEGRA_GPIO(bank, offset) \ argument 49 ((TEGRA_GPIO_BANK_ID_##bank * 8) + offset)`
/linux-4.4.14/arch/powerpc/boot/dts/include/dt-bindings/gpio/
D	tegra-gpio.h	`48 #define TEGRA_GPIO(bank, offset) \ argument 49 ((TEGRA_GPIO_BANK_ID_##bank * 8) + offset)`
/linux-4.4.14/arch/mips/boot/dts/include/dt-bindings/gpio/
D	tegra-gpio.h	`48 #define TEGRA_GPIO(bank, offset) \ argument 49 ((TEGRA_GPIO_BANK_ID_##bank * 8) + offset)`
/linux-4.4.14/arch/cris/boot/dts/include/dt-bindings/gpio/
D	tegra-gpio.h	`48 #define TEGRA_GPIO(bank, offset) \ argument 49 ((TEGRA_GPIO_BANK_ID_##bank * 8) + offset)`
/linux-4.4.14/include/dt-bindings/gpio/
D	tegra-gpio.h	`48 #define TEGRA_GPIO(bank, offset) \ argument 49 ((TEGRA_GPIO_BANK_ID_##bank * 8) + offset)`
/linux-4.4.14/drivers/crypto/qat/qat_dh895xccvf/
D	adf_isr.c	`178 struct adf_etr_bank_data *bank = &etr_data->banks[0]; in adf_isr() local 181 WRITE_CSR_INT_FLAG_AND_COL(bank->csr_addr, bank->bank_number, in adf_isr() 183 tasklet_hi_schedule(&bank->resp_handler); in adf_isr()`
D	adf_drv.c	`127 unsigned long val, bank = 0; in adf_dev_configure() local 136 (void *)&bank, ADF_DEC)) in adf_dev_configure() 139 val = bank; in adf_dev_configure() 184 (int)bank); in adf_dev_configure()`
/linux-4.4.14/arch/arm/mach-sa1100/
D	generic.h	`17 mi->bank[__nr].start = (__start), \ 18 mi->bank[__nr].size = (__size)`
/linux-4.4.14/Documentation/devicetree/bindings/interrupt-controller/
D	brcm,bcm2835-armctrl-ic.txt	`21 The 1st cell is the interrupt bank; 0 for interrupts in the "IRQ basic 25 The 2nd cell contains the interrupt number within the bank. Valid values 26 are 0..7 for bank 0, and 0..31 for bank 1.`
/linux-4.4.14/arch/arm/mach-imx/
D	hardware.h	`126 #define IMX_GPIO_NR(bank, nr) (((bank) - 1) * 32 + (nr)) argument`
/linux-4.4.14/arch/metag/boot/dts/
D	tz1090.dtsi	`65 gpios0: bank@0 { 74 gpios1: bank@1 { 83 gpios2: bank@2 {`
/linux-4.4.14/arch/ia64/kernel/
D	mca.c	897 const u64 *bank; in finish_pt_regs() local 930 bank = ms->pmsa_bank1_gr; in finish_pt_regs() 932 bank = ms->pmsa_bank0_gr; in finish_pt_regs() 933 copy_reg(&bank[16-16], ms->pmsa_nat_bits, &regs->r16, nat); in finish_pt_regs() 934 copy_reg(&bank[17-16], ms->pmsa_nat_bits, &regs->r17, nat); in finish_pt_regs() 935 copy_reg(&bank[18-16], ms->pmsa_nat_bits, &regs->r18, nat); in finish_pt_regs() 936 copy_reg(&bank[19-16], ms->pmsa_nat_bits, &regs->r19, nat); in finish_pt_regs() 937 copy_reg(&bank[20-16], ms->pmsa_nat_bits, &regs->r20, nat); in finish_pt_regs() 938 copy_reg(&bank[21-16], ms->pmsa_nat_bits, &regs->r21, nat); in finish_pt_regs() 939 copy_reg(&bank[22-16], ms->pmsa_nat_bits, &regs->r22, nat); in finish_pt_regs() [all …]
/linux-4.4.14/arch/arc/boot/dts/
D	abilis_tb101.dtsi	`51 pctl_gpio_a: pctl-gpio-a { /* GPIO bank A / 64 pctl_gpio_c: pctl-gpio-c { / GPIO bank C / 77 pctl_gpio_e: pctl-gpio-e { / GPIO bank E / 90 pctl_gpio_g: pctl-gpio-g { / GPIO bank G / 97 pctl_gpio_j: pctl-gpio-j { / GPIO bank J / 100 pctl_gpio_k: pctl-gpio-k { / GPIO bank K / 138 pctl_gpio_l: pctl-gpio-l { / GPIO bank L / 141 pctl_gpio_m: pctl-gpio-m { / GPIO bank M */`
D	abilis_tb100.dtsi	`51 pctl_gpio_a: pctl-gpio-a { /* GPIO bank A / 64 pctl_gpio_c: pctl-gpio-c { / GPIO bank C / 77 pctl_gpio_e: pctl-gpio-e { / GPIO bank E / 90 pctl_gpio_g: pctl-gpio-g { / GPIO bank G / 97 pctl_gpio_j: pctl-gpio-j { / GPIO bank J / 100 pctl_gpio_k: pctl-gpio-k { / GPIO bank K / 132 pctl_gpio_l: pctl-gpio-l { / GPIO bank L / 135 pctl_gpio_m: pctl-gpio-m { / GPIO bank M */`
/linux-4.4.14/drivers/pinctrl/freescale/
D	pinctrl-mxs.h	`23 #define PINID(bank, pin) ((bank) * 32 + (pin)) argument`
D	pinctrl-mxs.c	`204 u8 bank, shift; in mxs_pinctrl_set_mux() local 209 bank = PINID_TO_BANK(g->pins[i]); in mxs_pinctrl_set_mux() 212 reg += bank * 0x20 + pin / 16 * 0x10; in mxs_pinctrl_set_mux() 259 u8 ma, vol, pull, bank, shift; in mxs_pinconf_group_set() local 273 bank = PINID_TO_BANK(g->pins[i]); in mxs_pinconf_group_set() 278 reg += bank * 0x40 + pin / 8 * 0x10; in mxs_pinconf_group_set() 299 reg += bank * 0x10; in mxs_pinconf_group_set()`
/linux-4.4.14/sound/pci/cs46xx/
D	cs46xx_lib.h	`62 unsigned int bank = reg >> 16; in snd_cs46xx_poke() local 70 writel(val, chip->region.idx[bank+1].remap_addr + offset); in snd_cs46xx_poke() 75 unsigned int bank = reg >> 16; in snd_cs46xx_peek() local 77 return readl(chip->region.idx[bank+1].remap_addr + offset); in snd_cs46xx_peek()`
/linux-4.4.14/drivers/clk/tegra/
D	clk-periph.c	`148 struct tegra_clk_periph_regs *bank; in _tegra_clk_register_periph() local 164 bank = get_reg_bank(periph->gate.clk_num); in _tegra_clk_register_periph() 165 if (!bank) in _tegra_clk_register_periph() 174 periph->gate.regs = bank; in _tegra_clk_register_periph()`
/linux-4.4.14/drivers/edac/
D	octeon_edac-lmc.c	`34 unsigned long bank; member 95 fadr.cn61xx.fbank = pvt->bank; in octeon_lmc_edac_poll_o2() 158 TEMPLATE_SHOW(bank); 159 TEMPLATE_STORE(bank); 205 static DEVICE_ATTR(bank, S_IRUGO \| S_IWUSR,`
D	synopsys_edac.c	`109 u32 bank; member 173 p->ceinfo.bank = (regval & ADDR_BANK_MASK) >> ADDR_BANK_SHIFT; in synps_edac_geterror_info() 187 p->ueinfo.bank = (regval & ADDR_BANK_MASK) >> ADDR_BANK_SHIFT; in synps_edac_geterror_info() 215 "CE", pinf->row, pinf->bank, pinf->col); in synps_edac_handle_error() 225 "UE", pinf->row, pinf->bank, pinf->col); in synps_edac_handle_error()`
D	i5000_edac.c	468 int bank; in i5000_process_fatal_error_info() local 481 bank = NREC_BANK(info->nrecmema); in i5000_process_fatal_error_info() 488 rank, channel, bank, in i5000_process_fatal_error_info() 525 bank, ras, cas, allErrors, specific); in i5000_process_fatal_error_info() 553 int bank; in i5000_process_nonfatal_error_info() local 576 bank = NREC_BANK(info->nrecmema); in i5000_process_nonfatal_error_info() 583 rank, channel, channel + 1, branch >> 1, bank, in i5000_process_nonfatal_error_info() 624 rank, bank, ras, cas, ue_errors, specific); in i5000_process_nonfatal_error_info() 648 bank = REC_BANK(info->recmema); in i5000_process_nonfatal_error_info() 655 rank, channel, branch >> 1, bank, in i5000_process_nonfatal_error_info() [all …]
D	ghes_edac.c	`300 p += sprintf(p, "bank:%d ", mem_err->bank); in ghes_edac_report_mem_error() 308 const char bank = NULL, device = NULL; in ghes_edac_report_mem_error() local 309 dmi_memdev_name(mem_err->mem_dev_handle, &bank, &device); in ghes_edac_report_mem_error() 310 if (bank != NULL && device != NULL) in ghes_edac_report_mem_error() 311 p += sprintf(p, "DIMM location:%s %s ", bank, device); in ghes_edac_report_mem_error()`
/linux-4.4.14/drivers/firmware/efi/
D	cper.c	`228 n += scnprintf(msg + n, len - n, "bank: %d ", mem->bank); in cper_mem_err_location() 255 const char bank = NULL, device = NULL; in cper_dimm_err_location() local 262 dmi_memdev_name(mem->mem_dev_handle, &bank, &device); in cper_dimm_err_location() 263 if (bank && device) in cper_dimm_err_location() 264 n = snprintf(msg, len, "DIMM location: %s %s ", bank, device); in cper_dimm_err_location() 281 cmem->bank = mem->bank; in cper_mem_err_pack()`
/linux-4.4.14/Documentation/devicetree/bindings/arm/
D	picoxcell.txt	`15 - reg : The register bank for the timer. 23 - reg : The register bank for the device.`
/linux-4.4.14/drivers/staging/rtl8723au/hal/
D	rtl8723a_hal_init.c	346 hal_EfuseSwitchToBank(struct rtw_adapter padapter, u8 bank) in hal_EfuseSwitchToBank() argument 351 DBG_8723A("%s: Efuse switch bank to %d\n", __func__, bank); in hal_EfuseSwitchToBank() 354 switch (bank) { in hal_EfuseSwitchToBank() 478 u8 bank; in hal_ReadEFuse_BT() local 504 for (bank = 1; bank < EFUSE_MAX_BANK; bank++) { in hal_ReadEFuse_BT() 505 if (hal_EfuseSwitchToBank(padapter, bank) == false) { in hal_ReadEFuse_BT() 566 __func__, bank, eFuse_Addr - 1); in hal_ReadEFuse_BT() 583 used = (EFUSE_BT_REAL_BANK_CONTENT_LEN (bank - 1)) + eFuse_Addr - 1; in hal_ReadEFuse_BT() 654 u8 bank, startBank; in rtl8723a_EfuseGetCurrentSize_BT() local 671 for (bank = startBank; bank < EFUSE_MAX_BANK; bank++) { in rtl8723a_EfuseGetCurrentSize_BT() [all …]
/linux-4.4.14/include/sound/
D	opl3.h	`272 unsigned char bank; member 381 int prog, int bank, int type, 385 struct fm_patch snd_opl3_find_patch(struct snd_opl3 opl3, int prog, int bank,`
D	soundfont.h	`34 unsigned char bank; /* Midi bank for this zone */ member 116 int preset, int bank,`
/linux-4.4.14/arch/cris/arch-v32/kernel/
D	kgdb_asm.S	`345 ;; Nothing in S6 - S7, bank 0. 365 ;; Nothing in S13 - S15, bank 0 370 ;; Bank 1 and bank 2 have the same layout, hence the loop. 398 ;; Nothing in S7 - S15, bank 1 and 2 465 ;; Nothing in S15, bank 3`
/linux-4.4.14/Documentation/x86/x86_64/
D	machinecheck	`9 a hardware subsystem) and subevents in a bank. The exact meaning 26 (N bank number) 27 64bit Hex bitmask enabling/disabling specific subevents for bank N 32 per bank. This is not visible here`

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