Lines Matching refs:bank
164 void (*pull_calc_reg)(struct rockchip_pin_bank *bank,
167 void (*drv_calc_reg)(struct rockchip_pin_bank *bank,
385 static int rockchip_get_mux(struct rockchip_pin_bank *bank, int pin) in rockchip_get_mux() argument
387 struct rockchip_pinctrl *info = bank->drvdata; in rockchip_get_mux()
397 if (bank->iomux[iomux_num].type & IOMUX_UNROUTED) { in rockchip_get_mux()
402 if (bank->iomux[iomux_num].type & IOMUX_GPIO_ONLY) in rockchip_get_mux()
405 regmap = (bank->iomux[iomux_num].type & IOMUX_SOURCE_PMU) in rockchip_get_mux()
409 mask = (bank->iomux[iomux_num].type & IOMUX_WIDTH_4BIT) ? 0xf : 0x3; in rockchip_get_mux()
410 reg = bank->iomux[iomux_num].offset; in rockchip_get_mux()
411 if (bank->iomux[iomux_num].type & IOMUX_WIDTH_4BIT) { in rockchip_get_mux()
439 static int rockchip_set_mux(struct rockchip_pin_bank *bank, int pin, int mux) in rockchip_set_mux() argument
441 struct rockchip_pinctrl *info = bank->drvdata; in rockchip_set_mux()
452 if (bank->iomux[iomux_num].type & IOMUX_UNROUTED) { in rockchip_set_mux()
457 if (bank->iomux[iomux_num].type & IOMUX_GPIO_ONLY) { in rockchip_set_mux()
468 bank->bank_num, pin, mux); in rockchip_set_mux()
470 regmap = (bank->iomux[iomux_num].type & IOMUX_SOURCE_PMU) in rockchip_set_mux()
474 mask = (bank->iomux[iomux_num].type & IOMUX_WIDTH_4BIT) ? 0xf : 0x3; in rockchip_set_mux()
475 reg = bank->iomux[iomux_num].offset; in rockchip_set_mux()
476 if (bank->iomux[iomux_num].type & IOMUX_WIDTH_4BIT) { in rockchip_set_mux()
484 spin_lock_irqsave(&bank->slock, flags); in rockchip_set_mux()
491 spin_unlock_irqrestore(&bank->slock, flags); in rockchip_set_mux()
500 static void rk2928_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank, in rk2928_calc_pull_reg_and_bit() argument
504 struct rockchip_pinctrl *info = bank->drvdata; in rk2928_calc_pull_reg_and_bit()
508 *reg += bank->bank_num * RK2928_PULL_BANK_STRIDE; in rk2928_calc_pull_reg_and_bit()
520 static void rk3188_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank, in rk3188_calc_pull_reg_and_bit() argument
524 struct rockchip_pinctrl *info = bank->drvdata; in rk3188_calc_pull_reg_and_bit()
527 if (bank->bank_num == 0 && pin_num < 12) { in rk3188_calc_pull_reg_and_bit()
529 : bank->regmap_pull; in rk3188_calc_pull_reg_and_bit()
541 *reg += bank->bank_num * RK3188_PULL_BANK_STRIDE; in rk3188_calc_pull_reg_and_bit()
555 static void rk3288_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank, in rk3288_calc_pull_reg_and_bit() argument
559 struct rockchip_pinctrl *info = bank->drvdata; in rk3288_calc_pull_reg_and_bit()
562 if (bank->bank_num == 0) { in rk3288_calc_pull_reg_and_bit()
575 *reg += bank->bank_num * RK3188_PULL_BANK_STRIDE; in rk3288_calc_pull_reg_and_bit()
589 static void rk3288_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank, in rk3288_calc_drv_reg_and_bit() argument
593 struct rockchip_pinctrl *info = bank->drvdata; in rk3288_calc_drv_reg_and_bit()
596 if (bank->bank_num == 0) { in rk3288_calc_drv_reg_and_bit()
609 *reg += bank->bank_num * RK3288_DRV_BANK_STRIDE; in rk3288_calc_drv_reg_and_bit()
620 static void rk3368_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank, in rk3368_calc_pull_reg_and_bit() argument
624 struct rockchip_pinctrl *info = bank->drvdata; in rk3368_calc_pull_reg_and_bit()
627 if (bank->bank_num == 0) { in rk3368_calc_pull_reg_and_bit()
640 *reg += bank->bank_num * RK3188_PULL_BANK_STRIDE; in rk3368_calc_pull_reg_and_bit()
651 static void rk3368_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank, in rk3368_calc_drv_reg_and_bit() argument
655 struct rockchip_pinctrl *info = bank->drvdata; in rk3368_calc_drv_reg_and_bit()
658 if (bank->bank_num == 0) { in rk3368_calc_drv_reg_and_bit()
671 *reg += bank->bank_num * RK3288_DRV_BANK_STRIDE; in rk3368_calc_drv_reg_and_bit()
681 static int rockchip_get_drive_perpin(struct rockchip_pin_bank *bank, in rockchip_get_drive_perpin() argument
684 struct rockchip_pinctrl *info = bank->drvdata; in rockchip_get_drive_perpin()
691 ctrl->drv_calc_reg(bank, pin_num, ®map, ®, &bit); in rockchip_get_drive_perpin()
703 static int rockchip_set_drive_perpin(struct rockchip_pin_bank *bank, in rockchip_set_drive_perpin() argument
706 struct rockchip_pinctrl *info = bank->drvdata; in rockchip_set_drive_perpin()
714 ctrl->drv_calc_reg(bank, pin_num, ®map, ®, &bit); in rockchip_set_drive_perpin()
730 spin_lock_irqsave(&bank->slock, flags); in rockchip_set_drive_perpin()
738 spin_unlock_irqrestore(&bank->slock, flags); in rockchip_set_drive_perpin()
743 static int rockchip_get_pull(struct rockchip_pin_bank *bank, int pin_num) in rockchip_get_pull() argument
745 struct rockchip_pinctrl *info = bank->drvdata; in rockchip_get_pull()
756 ctrl->pull_calc_reg(bank, pin_num, ®map, ®, &bit); in rockchip_get_pull()
792 static int rockchip_set_pull(struct rockchip_pin_bank *bank, in rockchip_set_pull() argument
795 struct rockchip_pinctrl *info = bank->drvdata; in rockchip_set_pull()
804 bank->bank_num, pin_num, pull); in rockchip_set_pull()
810 ctrl->pull_calc_reg(bank, pin_num, ®map, ®, &bit); in rockchip_set_pull()
814 spin_lock_irqsave(&bank->slock, flags); in rockchip_set_pull()
821 spin_unlock_irqrestore(&bank->slock, flags); in rockchip_set_pull()
826 spin_lock_irqsave(&bank->slock, flags); in rockchip_set_pull()
845 spin_unlock_irqrestore(&bank->slock, flags); in rockchip_set_pull()
853 spin_unlock_irqrestore(&bank->slock, flags); in rockchip_set_pull()
900 struct rockchip_pin_bank *bank; in rockchip_pmx_set() local
911 bank = pin_to_bank(info, pins[cnt]); in rockchip_pmx_set()
912 ret = rockchip_set_mux(bank, pins[cnt] - bank->pin_base, in rockchip_pmx_set()
921 rockchip_set_mux(bank, pins[cnt] - bank->pin_base, 0); in rockchip_pmx_set()
937 struct rockchip_pin_bank *bank; in _rockchip_pmx_gpio_set_direction() local
942 bank = gc_to_pin_bank(chip); in _rockchip_pmx_gpio_set_direction()
944 ret = rockchip_set_mux(bank, pin, RK_FUNC_GPIO); in _rockchip_pmx_gpio_set_direction()
948 clk_enable(bank->clk); in _rockchip_pmx_gpio_set_direction()
949 spin_lock_irqsave(&bank->slock, flags); in _rockchip_pmx_gpio_set_direction()
951 data = readl_relaxed(bank->reg_base + GPIO_SWPORT_DDR); in _rockchip_pmx_gpio_set_direction()
957 writel_relaxed(data, bank->reg_base + GPIO_SWPORT_DDR); in _rockchip_pmx_gpio_set_direction()
959 spin_unlock_irqrestore(&bank->slock, flags); in _rockchip_pmx_gpio_set_direction()
960 clk_disable(bank->clk); in _rockchip_pmx_gpio_set_direction()
1020 struct rockchip_pin_bank *bank = pin_to_bank(info, pin); in rockchip_pinconf_set() local
1032 rc = rockchip_set_pull(bank, pin - bank->pin_base, in rockchip_pinconf_set()
1047 rc = rockchip_set_pull(bank, pin - bank->pin_base, in rockchip_pinconf_set()
1053 rockchip_gpio_set(&bank->gpio_chip, in rockchip_pinconf_set()
1054 pin - bank->pin_base, arg); in rockchip_pinconf_set()
1055 rc = _rockchip_pmx_gpio_set_direction(&bank->gpio_chip, in rockchip_pinconf_set()
1056 pin - bank->pin_base, false); in rockchip_pinconf_set()
1065 rc = rockchip_set_drive_perpin(bank, in rockchip_pinconf_set()
1066 pin - bank->pin_base, arg); in rockchip_pinconf_set()
1084 struct rockchip_pin_bank *bank = pin_to_bank(info, pin); in rockchip_pinconf_get() local
1091 if (rockchip_get_pull(bank, pin - bank->pin_base) != param) in rockchip_pinconf_get()
1103 if (rockchip_get_pull(bank, pin - bank->pin_base) != param) in rockchip_pinconf_get()
1109 rc = rockchip_get_mux(bank, pin - bank->pin_base); in rockchip_pinconf_get()
1113 rc = rockchip_gpio_get(&bank->gpio_chip, pin - bank->pin_base); in rockchip_pinconf_get()
1124 rc = rockchip_get_drive_perpin(bank, pin - bank->pin_base); in rockchip_pinconf_get()
1171 struct rockchip_pin_bank *bank; in rockchip_pinctrl_parse_groups() local
1210 bank = bank_num_to_bank(info, num); in rockchip_pinctrl_parse_groups()
1211 if (IS_ERR(bank)) in rockchip_pinctrl_parse_groups()
1212 return PTR_ERR(bank); in rockchip_pinctrl_parse_groups()
1214 grp->pins[j] = bank->pin_base + be32_to_cpu(*list++); in rockchip_pinctrl_parse_groups()
1320 int pin, bank, ret; in rockchip_pinctrl_register() local
1339 for (bank = 0 , k = 0; bank < info->ctrl->nr_banks; bank++) { in rockchip_pinctrl_register()
1340 pin_bank = &info->ctrl->pin_banks[bank]; in rockchip_pinctrl_register()
1359 for (bank = 0; bank < info->ctrl->nr_banks; ++bank) { in rockchip_pinctrl_register()
1360 pin_bank = &info->ctrl->pin_banks[bank]; in rockchip_pinctrl_register()
1362 pin_bank->grange.id = bank; in rockchip_pinctrl_register()
1379 struct rockchip_pin_bank *bank = gc_to_pin_bank(gc); in rockchip_gpio_set() local
1380 void __iomem *reg = bank->reg_base + GPIO_SWPORT_DR; in rockchip_gpio_set()
1384 clk_enable(bank->clk); in rockchip_gpio_set()
1385 spin_lock_irqsave(&bank->slock, flags); in rockchip_gpio_set()
1393 spin_unlock_irqrestore(&bank->slock, flags); in rockchip_gpio_set()
1394 clk_disable(bank->clk); in rockchip_gpio_set()
1403 struct rockchip_pin_bank *bank = gc_to_pin_bank(gc); in rockchip_gpio_get() local
1406 clk_enable(bank->clk); in rockchip_gpio_get()
1407 data = readl(bank->reg_base + GPIO_EXT_PORT); in rockchip_gpio_get()
1408 clk_disable(bank->clk); in rockchip_gpio_get()
1442 struct rockchip_pin_bank *bank = gc_to_pin_bank(gc); in rockchip_gpio_to_irq() local
1445 if (!bank->domain) in rockchip_gpio_to_irq()
1448 virq = irq_create_mapping(bank->domain, offset); in rockchip_gpio_to_irq()
1471 struct rockchip_pin_bank *bank = irq_desc_get_handler_data(desc); in rockchip_irq_demux() local
1474 dev_dbg(bank->drvdata->dev, "got irq for bank %s\n", bank->name); in rockchip_irq_demux()
1478 pend = readl_relaxed(bank->reg_base + GPIO_INT_STATUS); in rockchip_irq_demux()
1485 virq = irq_linear_revmap(bank->domain, irq); in rockchip_irq_demux()
1488 dev_err(bank->drvdata->dev, "unmapped irq %d\n", irq); in rockchip_irq_demux()
1492 dev_dbg(bank->drvdata->dev, "handling irq %d\n", irq); in rockchip_irq_demux()
1498 if (bank->toggle_edge_mode & BIT(irq)) { in rockchip_irq_demux()
1502 data = readl_relaxed(bank->reg_base + GPIO_EXT_PORT); in rockchip_irq_demux()
1504 spin_lock_irqsave(&bank->slock, flags); in rockchip_irq_demux()
1506 polarity = readl_relaxed(bank->reg_base + in rockchip_irq_demux()
1513 bank->reg_base + GPIO_INT_POLARITY); in rockchip_irq_demux()
1515 spin_unlock_irqrestore(&bank->slock, flags); in rockchip_irq_demux()
1518 data = readl_relaxed(bank->reg_base + in rockchip_irq_demux()
1532 struct rockchip_pin_bank *bank = gc->private; in rockchip_irq_set_type() local
1541 ret = rockchip_set_mux(bank, d->hwirq, RK_FUNC_GPIO); in rockchip_irq_set_type()
1545 clk_enable(bank->clk); in rockchip_irq_set_type()
1546 spin_lock_irqsave(&bank->slock, flags); in rockchip_irq_set_type()
1548 data = readl_relaxed(bank->reg_base + GPIO_SWPORT_DDR); in rockchip_irq_set_type()
1550 writel_relaxed(data, bank->reg_base + GPIO_SWPORT_DDR); in rockchip_irq_set_type()
1552 spin_unlock_irqrestore(&bank->slock, flags); in rockchip_irq_set_type()
1559 spin_lock_irqsave(&bank->slock, flags); in rockchip_irq_set_type()
1567 bank->toggle_edge_mode |= mask; in rockchip_irq_set_type()
1574 data = readl(bank->reg_base + GPIO_EXT_PORT); in rockchip_irq_set_type()
1581 bank->toggle_edge_mode &= ~mask; in rockchip_irq_set_type()
1586 bank->toggle_edge_mode &= ~mask; in rockchip_irq_set_type()
1591 bank->toggle_edge_mode &= ~mask; in rockchip_irq_set_type()
1596 bank->toggle_edge_mode &= ~mask; in rockchip_irq_set_type()
1602 spin_unlock_irqrestore(&bank->slock, flags); in rockchip_irq_set_type()
1603 clk_disable(bank->clk); in rockchip_irq_set_type()
1611 spin_unlock_irqrestore(&bank->slock, flags); in rockchip_irq_set_type()
1612 clk_disable(bank->clk); in rockchip_irq_set_type()
1620 struct rockchip_pin_bank *bank = gc->private; in rockchip_irq_suspend() local
1622 clk_enable(bank->clk); in rockchip_irq_suspend()
1623 bank->saved_masks = irq_reg_readl(gc, GPIO_INTMASK); in rockchip_irq_suspend()
1625 clk_disable(bank->clk); in rockchip_irq_suspend()
1631 struct rockchip_pin_bank *bank = gc->private; in rockchip_irq_resume() local
1633 clk_enable(bank->clk); in rockchip_irq_resume()
1634 irq_reg_writel(gc, bank->saved_masks, GPIO_INTMASK); in rockchip_irq_resume()
1635 clk_disable(bank->clk); in rockchip_irq_resume()
1641 struct rockchip_pin_bank *bank = gc->private; in rockchip_irq_gc_mask_clr_bit() local
1643 clk_enable(bank->clk); in rockchip_irq_gc_mask_clr_bit()
1650 struct rockchip_pin_bank *bank = gc->private; in rockchip_irq_gc_mask_set_bit() local
1653 clk_disable(bank->clk); in rockchip_irq_gc_mask_set_bit()
1660 struct rockchip_pin_bank *bank = ctrl->pin_banks; in rockchip_interrupts_register() local
1666 for (i = 0; i < ctrl->nr_banks; ++i, ++bank) { in rockchip_interrupts_register()
1667 if (!bank->valid) { in rockchip_interrupts_register()
1669 bank->name); in rockchip_interrupts_register()
1673 ret = clk_enable(bank->clk); in rockchip_interrupts_register()
1676 bank->name); in rockchip_interrupts_register()
1680 bank->domain = irq_domain_add_linear(bank->of_node, 32, in rockchip_interrupts_register()
1682 if (!bank->domain) { in rockchip_interrupts_register()
1684 bank->name); in rockchip_interrupts_register()
1685 clk_disable(bank->clk); in rockchip_interrupts_register()
1689 ret = irq_alloc_domain_generic_chips(bank->domain, 32, 1, in rockchip_interrupts_register()
1694 bank->name); in rockchip_interrupts_register()
1695 irq_domain_remove(bank->domain); in rockchip_interrupts_register()
1696 clk_disable(bank->clk); in rockchip_interrupts_register()
1705 writel_relaxed(0xffffffff, bank->reg_base + GPIO_INTMASK); in rockchip_interrupts_register()
1706 writel_relaxed(0xffffffff, bank->reg_base + GPIO_INTEN); in rockchip_interrupts_register()
1708 gc = irq_get_domain_generic_chip(bank->domain, 0); in rockchip_interrupts_register()
1709 gc->reg_base = bank->reg_base; in rockchip_interrupts_register()
1710 gc->private = bank; in rockchip_interrupts_register()
1721 gc->wake_enabled = IRQ_MSK(bank->nr_pins); in rockchip_interrupts_register()
1723 irq_set_chained_handler_and_data(bank->irq, in rockchip_interrupts_register()
1724 rockchip_irq_demux, bank); in rockchip_interrupts_register()
1728 irq_create_mapping(bank->domain, j); in rockchip_interrupts_register()
1730 clk_disable(bank->clk); in rockchip_interrupts_register()
1740 struct rockchip_pin_bank *bank = ctrl->pin_banks; in rockchip_gpiolib_register() local
1745 for (i = 0; i < ctrl->nr_banks; ++i, ++bank) { in rockchip_gpiolib_register()
1746 if (!bank->valid) { in rockchip_gpiolib_register()
1748 bank->name); in rockchip_gpiolib_register()
1752 bank->gpio_chip = rockchip_gpiolib_chip; in rockchip_gpiolib_register()
1754 gc = &bank->gpio_chip; in rockchip_gpiolib_register()
1755 gc->base = bank->pin_base; in rockchip_gpiolib_register()
1756 gc->ngpio = bank->nr_pins; in rockchip_gpiolib_register()
1758 gc->of_node = bank->of_node; in rockchip_gpiolib_register()
1759 gc->label = bank->name; in rockchip_gpiolib_register()
1774 for (--i, --bank; i >= 0; --i, --bank) { in rockchip_gpiolib_register()
1775 if (!bank->valid) in rockchip_gpiolib_register()
1777 gpiochip_remove(&bank->gpio_chip); in rockchip_gpiolib_register()
1786 struct rockchip_pin_bank *bank = ctrl->pin_banks; in rockchip_gpiolib_unregister() local
1789 for (i = 0; i < ctrl->nr_banks; ++i, ++bank) { in rockchip_gpiolib_unregister()
1790 if (!bank->valid) in rockchip_gpiolib_unregister()
1792 gpiochip_remove(&bank->gpio_chip); in rockchip_gpiolib_unregister()
1798 static int rockchip_get_bank_data(struct rockchip_pin_bank *bank, in rockchip_get_bank_data() argument
1804 if (of_address_to_resource(bank->of_node, 0, &res)) { in rockchip_get_bank_data()
1809 bank->reg_base = devm_ioremap_resource(info->dev, &res); in rockchip_get_bank_data()
1810 if (IS_ERR(bank->reg_base)) in rockchip_get_bank_data()
1811 return PTR_ERR(bank->reg_base); in rockchip_get_bank_data()
1817 if (of_device_is_compatible(bank->of_node, in rockchip_get_bank_data()
1821 node = of_parse_phandle(bank->of_node->parent, in rockchip_get_bank_data()
1824 if (of_address_to_resource(bank->of_node, 1, &res)) { in rockchip_get_bank_data()
1836 bank->regmap_pull = devm_regmap_init_mmio(info->dev, in rockchip_get_bank_data()
1842 bank->irq = irq_of_parse_and_map(bank->of_node, 0); in rockchip_get_bank_data()
1844 bank->clk = of_clk_get(bank->of_node, 0); in rockchip_get_bank_data()
1845 if (IS_ERR(bank->clk)) in rockchip_get_bank_data()
1846 return PTR_ERR(bank->clk); in rockchip_get_bank_data()
1848 return clk_prepare(bank->clk); in rockchip_get_bank_data()
1862 struct rockchip_pin_bank *bank; in rockchip_pinctrl_get_soc_data() local
1872 bank = ctrl->pin_banks; in rockchip_pinctrl_get_soc_data()
1873 for (i = 0; i < ctrl->nr_banks; ++i, ++bank) { in rockchip_pinctrl_get_soc_data()
1874 if (!strcmp(bank->name, np->name)) { in rockchip_pinctrl_get_soc_data()
1875 bank->of_node = np; in rockchip_pinctrl_get_soc_data()
1877 if (!rockchip_get_bank_data(bank, d)) in rockchip_pinctrl_get_soc_data()
1878 bank->valid = true; in rockchip_pinctrl_get_soc_data()
1887 bank = ctrl->pin_banks; in rockchip_pinctrl_get_soc_data()
1888 for (i = 0; i < ctrl->nr_banks; ++i, ++bank) { in rockchip_pinctrl_get_soc_data()
1891 spin_lock_init(&bank->slock); in rockchip_pinctrl_get_soc_data()
1892 bank->drvdata = d; in rockchip_pinctrl_get_soc_data()
1893 bank->pin_base = ctrl->nr_pins; in rockchip_pinctrl_get_soc_data()
1894 ctrl->nr_pins += bank->nr_pins; in rockchip_pinctrl_get_soc_data()
1898 struct rockchip_iomux *iom = &bank->iomux[j]; in rockchip_pinctrl_get_soc_data()
1901 if (bank_pins >= bank->nr_pins) in rockchip_pinctrl_get_soc_data()