Lines Matching refs:bank
63 struct samsung_pin_bank *bank = irq_data_get_irq_chip_data(irqd); in exynos_irq_mask() local
64 struct samsung_pinctrl_drv_data *d = bank->drvdata; in exynos_irq_mask()
65 unsigned long reg_mask = our_chip->eint_mask + bank->eint_offset; in exynos_irq_mask()
69 spin_lock_irqsave(&bank->slock, flags); in exynos_irq_mask()
75 spin_unlock_irqrestore(&bank->slock, flags); in exynos_irq_mask()
82 struct samsung_pin_bank *bank = irq_data_get_irq_chip_data(irqd); in exynos_irq_ack() local
83 struct samsung_pinctrl_drv_data *d = bank->drvdata; in exynos_irq_ack()
84 unsigned long reg_pend = our_chip->eint_pend + bank->eint_offset; in exynos_irq_ack()
93 struct samsung_pin_bank *bank = irq_data_get_irq_chip_data(irqd); in exynos_irq_unmask() local
94 struct samsung_pinctrl_drv_data *d = bank->drvdata; in exynos_irq_unmask()
95 unsigned long reg_mask = our_chip->eint_mask + bank->eint_offset; in exynos_irq_unmask()
110 spin_lock_irqsave(&bank->slock, flags); in exynos_irq_unmask()
116 spin_unlock_irqrestore(&bank->slock, flags); in exynos_irq_unmask()
123 struct samsung_pin_bank *bank = irq_data_get_irq_chip_data(irqd); in exynos_irq_set_type() local
124 struct samsung_pinctrl_drv_data *d = bank->drvdata; in exynos_irq_set_type()
127 unsigned long reg_con = our_chip->eint_con + bank->eint_offset; in exynos_irq_set_type()
167 struct samsung_pin_bank *bank = irq_data_get_irq_chip_data(irqd); in exynos_irq_request_resources() local
168 const struct samsung_pin_bank_type *bank_type = bank->type; in exynos_irq_request_resources()
169 struct samsung_pinctrl_drv_data *d = bank->drvdata; in exynos_irq_request_resources()
171 unsigned long reg_con = our_chip->eint_con + bank->eint_offset; in exynos_irq_request_resources()
177 ret = gpiochip_lock_as_irq(&bank->gpio_chip, irqd->hwirq); in exynos_irq_request_resources()
179 dev_err(bank->gpio_chip.dev, "unable to lock pin %s-%lu IRQ\n", in exynos_irq_request_resources()
180 bank->name, irqd->hwirq); in exynos_irq_request_resources()
184 reg_con = bank->pctl_offset + bank_type->reg_offset[PINCFG_TYPE_FUNC]; in exynos_irq_request_resources()
188 spin_lock_irqsave(&bank->slock, flags); in exynos_irq_request_resources()
195 spin_unlock_irqrestore(&bank->slock, flags); in exynos_irq_request_resources()
206 struct samsung_pin_bank *bank = irq_data_get_irq_chip_data(irqd); in exynos_irq_release_resources() local
207 const struct samsung_pin_bank_type *bank_type = bank->type; in exynos_irq_release_resources()
208 struct samsung_pinctrl_drv_data *d = bank->drvdata; in exynos_irq_release_resources()
210 unsigned long reg_con = our_chip->eint_con + bank->eint_offset; in exynos_irq_release_resources()
215 reg_con = bank->pctl_offset + bank_type->reg_offset[PINCFG_TYPE_FUNC]; in exynos_irq_release_resources()
221 spin_lock_irqsave(&bank->slock, flags); in exynos_irq_release_resources()
228 spin_unlock_irqrestore(&bank->slock, flags); in exynos_irq_release_resources()
230 gpiochip_unlock_as_irq(&bank->gpio_chip, irqd->hwirq); in exynos_irq_release_resources()
273 struct samsung_pin_bank *bank = d->pin_banks; in exynos_eint_gpio_irq() local
282 bank += (group - 1); in exynos_eint_gpio_irq()
284 virq = irq_linear_revmap(bank->irq_domain, pin); in exynos_eint_gpio_irq()
303 struct samsung_pin_bank *bank; in exynos_eint_gpio_init() local
320 bank = d->pin_banks; in exynos_eint_gpio_init()
321 for (i = 0; i < d->nr_banks; ++i, ++bank) { in exynos_eint_gpio_init()
322 if (bank->eint_type != EINT_TYPE_GPIO) in exynos_eint_gpio_init()
324 bank->irq_domain = irq_domain_add_linear(bank->of_node, in exynos_eint_gpio_init()
325 bank->nr_pins, &exynos_eint_irqd_ops, bank); in exynos_eint_gpio_init()
326 if (!bank->irq_domain) { in exynos_eint_gpio_init()
332 bank->soc_priv = devm_kzalloc(d->dev, in exynos_eint_gpio_init()
334 if (!bank->soc_priv) { in exynos_eint_gpio_init()
335 irq_domain_remove(bank->irq_domain); in exynos_eint_gpio_init()
340 bank->irq_chip = &exynos_gpio_irq_chip; in exynos_eint_gpio_init()
346 for (--i, --bank; i >= 0; --i, --bank) { in exynos_eint_gpio_init()
347 if (bank->eint_type != EINT_TYPE_GPIO) in exynos_eint_gpio_init()
349 irq_domain_remove(bank->irq_domain); in exynos_eint_gpio_init()
364 struct samsung_pin_bank *bank = irq_data_get_irq_chip_data(irqd); in exynos_wkup_irq_set_wake() local
365 unsigned long bit = 1UL << (2 * bank->eint_offset + irqd->hwirq); in exynos_wkup_irq_set_wake()
425 struct samsung_pin_bank *bank = eintd->bank; in exynos_irq_eint0_15() local
435 eint_irq = irq_linear_revmap(bank->irq_domain, eintd->irq); in exynos_irq_eint0_15()
486 struct samsung_pin_bank *bank; in exynos_eint_wkup_init() local
508 bank = d->pin_banks; in exynos_eint_wkup_init()
509 for (i = 0; i < d->nr_banks; ++i, ++bank) { in exynos_eint_wkup_init()
510 if (bank->eint_type != EINT_TYPE_WKUP) in exynos_eint_wkup_init()
513 bank->irq_domain = irq_domain_add_linear(bank->of_node, in exynos_eint_wkup_init()
514 bank->nr_pins, &exynos_eint_irqd_ops, bank); in exynos_eint_wkup_init()
515 if (!bank->irq_domain) { in exynos_eint_wkup_init()
520 bank->irq_chip = irq_chip; in exynos_eint_wkup_init()
522 if (!of_find_property(bank->of_node, "interrupts", NULL)) { in exynos_eint_wkup_init()
523 bank->eint_type = EINT_TYPE_WKUP_MUX; in exynos_eint_wkup_init()
528 weint_data = devm_kzalloc(dev, bank->nr_pins in exynos_eint_wkup_init()
535 for (idx = 0; idx < bank->nr_pins; ++idx) { in exynos_eint_wkup_init()
536 irq = irq_of_parse_and_map(bank->of_node, idx); in exynos_eint_wkup_init()
539 bank->name, idx); in exynos_eint_wkup_init()
543 weint_data[idx].bank = bank; in exynos_eint_wkup_init()
569 bank = d->pin_banks; in exynos_eint_wkup_init()
571 for (i = 0; i < d->nr_banks; ++i, ++bank) { in exynos_eint_wkup_init()
572 if (bank->eint_type != EINT_TYPE_WKUP_MUX) in exynos_eint_wkup_init()
575 muxed_data->banks[idx++] = bank; in exynos_eint_wkup_init()
584 struct samsung_pin_bank *bank) in exynos_pinctrl_suspend_bank() argument
586 struct exynos_eint_gpio_save *save = bank->soc_priv; in exynos_pinctrl_suspend_bank()
590 + bank->eint_offset); in exynos_pinctrl_suspend_bank()
592 + 2 * bank->eint_offset); in exynos_pinctrl_suspend_bank()
594 + 2 * bank->eint_offset + 4); in exynos_pinctrl_suspend_bank()
596 pr_debug("%s: save con %#010x\n", bank->name, save->eint_con); in exynos_pinctrl_suspend_bank()
597 pr_debug("%s: save fltcon0 %#010x\n", bank->name, save->eint_fltcon0); in exynos_pinctrl_suspend_bank()
598 pr_debug("%s: save fltcon1 %#010x\n", bank->name, save->eint_fltcon1); in exynos_pinctrl_suspend_bank()
603 struct samsung_pin_bank *bank = drvdata->pin_banks; in exynos_pinctrl_suspend() local
606 for (i = 0; i < drvdata->nr_banks; ++i, ++bank) in exynos_pinctrl_suspend()
607 if (bank->eint_type == EINT_TYPE_GPIO) in exynos_pinctrl_suspend()
608 exynos_pinctrl_suspend_bank(drvdata, bank); in exynos_pinctrl_suspend()
613 struct samsung_pin_bank *bank) in exynos_pinctrl_resume_bank() argument
615 struct exynos_eint_gpio_save *save = bank->soc_priv; in exynos_pinctrl_resume_bank()
618 pr_debug("%s: con %#010x => %#010x\n", bank->name, in exynos_pinctrl_resume_bank()
620 + bank->eint_offset), save->eint_con); in exynos_pinctrl_resume_bank()
621 pr_debug("%s: fltcon0 %#010x => %#010x\n", bank->name, in exynos_pinctrl_resume_bank()
623 + 2 * bank->eint_offset), save->eint_fltcon0); in exynos_pinctrl_resume_bank()
624 pr_debug("%s: fltcon1 %#010x => %#010x\n", bank->name, in exynos_pinctrl_resume_bank()
626 + 2 * bank->eint_offset + 4), save->eint_fltcon1); in exynos_pinctrl_resume_bank()
629 + bank->eint_offset); in exynos_pinctrl_resume_bank()
631 + 2 * bank->eint_offset); in exynos_pinctrl_resume_bank()
633 + 2 * bank->eint_offset + 4); in exynos_pinctrl_resume_bank()
638 struct samsung_pin_bank *bank = drvdata->pin_banks; in exynos_pinctrl_resume() local
641 for (i = 0; i < drvdata->nr_banks; ++i, ++bank) in exynos_pinctrl_resume()
642 if (bank->eint_type == EINT_TYPE_GPIO) in exynos_pinctrl_resume()
643 exynos_pinctrl_resume_bank(drvdata, bank); in exynos_pinctrl_resume()